Commit 6f3ed2f71f3548b399214f604d820cd2dd2887f3 | zig

author	Jakub Konka <kubkon@jakubkonka.com> 2020-12-16 12:39:30+01:00
committer	Jakub Konka <kubkon@jakubkonka.com> 2020-12-16 18:13:52+01:00
log	6f3ed2f71f3548b399214f604d820cd2dd2887f3
tree	3d3e25dd7e53bb40f25fb25769e18c2ec3d1d6c8
parent	38bf94280bb9735a005673d3eae132f75795b854

Update target details

llvm commit b2851aea80e5a8f0cfd6c3c5a56a6b00fb28c6b6
zig-llvm-target-details-generator commit
4299674ecabeb668b0d84285cd1b41a652a391b1

15 files changed, 2040 insertions(+), 1500 deletions(-)

lib
- std
  - target
    aarch64.zig
    amdgpu.zig
    arm.zig
    avr.zig
    bpf.zig
    hexagon.zig
    mips.zig
    msp430.zig
    nvptx.zig
    powerpc.zig
    riscv.zig
    sparc.zig
    systemz.zig
    wasm.zig
    x86.zig

lib/std/target/aarch64.zig+529-263

...	...	@@ -8,9 +8,18 @@ const CpuFeature = std.Target.Cpu.Feature;
8	8	const CpuModel = std.Target.Cpu.Model;
9	9
10	10	pub const Feature = enum {
11		a34,
	11	CONTEXTIDREL2,
	12	a35,
	13	a53,
	14	a55,
	15	a57,
	16	a64fx,
12	17	a65,
	18	a72,
	19	a73,
	20	a75,
13	21	a76,
	22	a77,
14	23	aes,
15	24	aggressive_fma,
16	25	alternate_sextload_cvt_f32_pattern,
...	...	@@ -36,10 +45,14 @@ pub const Feature = enum {
36	45	call_saved_x18,
37	46	call_saved_x8,
38	47	call_saved_x9,
	48	carmel,
39	49	ccdp,
40	50	ccidx,
41	51	ccpp,
42	52	complxnum,
	53	cortex_a78,
	54	cortex_r82,
	55	cortex_x1,
43	56	crc,
44	57	crypto,
45	58	custom_cheap_as_move,
...	...	@@ -49,9 +62,11 @@ pub const Feature = enum {
49	62	ecv,
50	63	ete,
51	64	exynos_cheap_as_move,
	65	exynosm3,
52	66	exynosm4,
53	67	f32mm,
54	68	f64mm,
	69	falkor,
55	70	fgt,
56	71	fmi,
57	72	force_32bit_jump_tables,
...	...	@@ -67,8 +82,9 @@ pub const Feature = enum {
67	82	fuse_literals,
68	83	harden_sls_blr,
69	84	harden_sls_retbr,
70		i8mm,
	85	_i8mm,
71	86	jsconv,
	87	kryo,
72	88	lor,
73	89	lse,
74	90	lsl_fast,
...	...	@@ -77,8 +93,11 @@ pub const Feature = enum {
77	93	neon,
78	94	neoversee1,
79	95	neoversen1,
	96	neoversen2,
	97	neoversev1,
80	98	no_neg_immediates,
81	99	nv,
	100	outline_atomics,
82	101	pa,
83	102	pan,
84	103	pan_rwv,
...	...	@@ -88,7 +107,6 @@ pub const Feature = enum {
88	107	predres,
89	108	rand,
90	109	ras,
91		rasv8_4,
92	110	rcpc,
93	111	rcpc_immo,
94	112	rdm,
...	...	@@ -117,6 +135,7 @@ pub const Feature = enum {
117	135	reserve_x6,
118	136	reserve_x7,
119	137	reserve_x9,
	138	saphira,
120	139	sb,
121	140	sel2,
122	141	sha2,
...	...	@@ -136,6 +155,12 @@ pub const Feature = enum {
136	155	sve2_sha3,
137	156	sve2_sm4,
138	157	tagged_globals,
	158	thunderx,
	159	thunderx2t99,
	160	thunderx3t110,
	161	thunderxt81,
	162	thunderxt83,
	163	thunderxt88,
139	164	tlb_rmi,
140	165	tme,
141	166	tpidr_el1,
...	...	@@ -143,18 +168,19 @@ pub const Feature = enum {
143	168	tpidr_el3,
144	169	tracev8_4,
145	170	trbe,
	171	tsv110,
146	172	uaops,
147	173	use_aa,
148	174	use_experimental_zeroing_pseudos,
149	175	use_postra_scheduler,
150	176	use_reciprocal_square_root,
151		v8a,
152	177	v8_1a,
153	178	v8_2a,
154	179	v8_3a,
155	180	v8_4a,
156	181	v8_5a,
157	182	v8_6a,
	183	v8r,
158	184	vh,
159	185	zcm,
160	186	zcz,
...	...	@@ -166,18 +192,87 @@ pub const Feature = enum {
166	192	pub usingnamespace CpuFeature.feature_set_fns(Feature);
167	193
168	194	pub const all_features = blk: {
169		@setEvalBranchQuota(2000);
	195	@setEvalBranchQuota(10000);
170	196	const len = @typeInfo(Feature).Enum.fields.len;
171	197	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
172	198	var result: [len]CpuFeature = undefined;
173		result[@enumToInt(Feature.a34)] = .{
	199	result[@enumToInt(Feature.CONTEXTIDREL2)] = .{
	200	.llvm_name = "CONTEXTIDREL2",
	201	.description = "Enable RW operand CONTEXTIDR_EL2",
	202	.dependencies = featureSet(&[_]Feature{}),
	203	};
	204	result[@enumToInt(Feature.a35)] = .{
174	205	.llvm_name = "a35",
175		.description = "Cortex-A34 ARM processors",
	206	.description = "Cortex-A35 ARM processors",
	207	.dependencies = featureSet(&[_]Feature{
	208	.crc,
	209	.crypto,
	210	.fp_armv8,
	211	.neon,
	212	.perfmon,
	213	}),
	214	};
	215	result[@enumToInt(Feature.a53)] = .{
	216	.llvm_name = "a53",
	217	.description = "Cortex-A53 ARM processors",
	218	.dependencies = featureSet(&[_]Feature{
	219	.balance_fp_ops,
	220	.crc,
	221	.crypto,
	222	.custom_cheap_as_move,
	223	.fp_armv8,
	224	.fuse_aes,
	225	.neon,
	226	.perfmon,
	227	.use_aa,
	228	.use_postra_scheduler,
	229	}),
	230	};
	231	result[@enumToInt(Feature.a55)] = .{
	232	.llvm_name = "a55",
	233	.description = "Cortex-A55 ARM processors",
	234	.dependencies = featureSet(&[_]Feature{
	235	.crypto,
	236	.dotprod,
	237	.fp_armv8,
	238	.fullfp16,
	239	.fuse_aes,
	240	.neon,
	241	.perfmon,
	242	.rcpc,
	243	.v8_2a,
	244	}),
	245	};
	246	result[@enumToInt(Feature.a57)] = .{
	247	.llvm_name = "a57",
	248	.description = "Cortex-A57 ARM processors",
176	249	.dependencies = featureSet(&[_]Feature{
	250	.balance_fp_ops,
177	251	.crc,
178	252	.crypto,
	253	.custom_cheap_as_move,
	254	.fp_armv8,
	255	.fuse_aes,
	256	.fuse_literals,
	257	.neon,
	258	.perfmon,
	259	.predictable_select_expensive,
	260	.use_postra_scheduler,
	261	}),
	262	};
	263	result[@enumToInt(Feature.a64fx)] = .{
	264	.llvm_name = "a64fx",
	265	.description = "Fujitsu A64FX processors",
	266	.dependencies = featureSet(&[_]Feature{
	267	.complxnum,
	268	.fp_armv8,
	269	.fullfp16,
	270	.neon,
179	271	.perfmon,
180		.v8a,
	272	.sha2,
	273	.sve,
	274	.use_postra_scheduler,
	275	.v8_2a,
181	276	}),
182	277	};
183	278	result[@enumToInt(Feature.a65)] = .{
...	...	@@ -195,18 +290,72 @@ pub const all_features = blk: {
195	290	.v8_2a,
196	291	}),
197	292	};
	293	result[@enumToInt(Feature.a72)] = .{
	294	.llvm_name = "a72",
	295	.description = "Cortex-A72 ARM processors",
	296	.dependencies = featureSet(&[_]Feature{
	297	.crc,
	298	.crypto,
	299	.fp_armv8,
	300	.fuse_aes,
	301	.neon,
	302	.perfmon,
	303	}),
	304	};
	305	result[@enumToInt(Feature.a73)] = .{
	306	.llvm_name = "a73",
	307	.description = "Cortex-A73 ARM processors",
	308	.dependencies = featureSet(&[_]Feature{
	309	.crc,
	310	.crypto,
	311	.fp_armv8,
	312	.fuse_aes,
	313	.neon,
	314	.perfmon,
	315	}),
	316	};
	317	result[@enumToInt(Feature.a75)] = .{
	318	.llvm_name = "a75",
	319	.description = "Cortex-A75 ARM processors",
	320	.dependencies = featureSet(&[_]Feature{
	321	.crypto,
	322	.dotprod,
	323	.fp_armv8,
	324	.fullfp16,
	325	.fuse_aes,
	326	.neon,
	327	.perfmon,
	328	.rcpc,
	329	.v8_2a,
	330	}),
	331	};
198	332	result[@enumToInt(Feature.a76)] = .{
199	333	.llvm_name = "a76",
200	334	.description = "Cortex-A76 ARM processors",
201	335	.dependencies = featureSet(&[_]Feature{
202	336	.crypto,
203	337	.dotprod,
	338	.fp_armv8,
204	339	.fullfp16,
	340	.neon,
205	341	.rcpc,
206	342	.ssbs,
207	343	.v8_2a,
208	344	}),
209	345	};
	346	result[@enumToInt(Feature.a77)] = .{
	347	.llvm_name = "a77",
	348	.description = "Cortex-A77 ARM processors",
	349	.dependencies = featureSet(&[_]Feature{
	350	.crypto,
	351	.dotprod,
	352	.fp_armv8,
	353	.fullfp16,
	354	.neon,
	355	.rcpc,
	356	.v8_2a,
	357	}),
	358	};
210	359	result[@enumToInt(Feature.aes)] = .{
211	360	.llvm_name = "aes",
212	361	.description = "Enable AES support",
...	...	@@ -415,6 +564,16 @@ pub const all_features = blk: {
415	564	.description = "Make X9 callee saved.",
416	565	.dependencies = featureSet(&[_]Feature{}),
417	566	};
	567	result[@enumToInt(Feature.carmel)] = .{
	568	.llvm_name = "carmel",
	569	.description = "Nvidia Carmel processors",
	570	.dependencies = featureSet(&[_]Feature{
	571	.crypto,
	572	.fullfp16,
	573	.neon,
	574	.v8_2a,
	575	}),
	576	};
418	577	result[@enumToInt(Feature.ccdp)] = .{
419	578	.llvm_name = "ccdp",
420	579	.description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
...	...	@@ -437,6 +596,49 @@ pub const all_features = blk: {
437	596	.neon,
438	597	}),
439	598	};
	599	result[@enumToInt(Feature.cortex_a78)] = .{
	600	.llvm_name = "cortex-a78",
	601	.description = "Cortex-A78 ARM processors",
	602	.dependencies = featureSet(&[_]Feature{
	603	.crypto,
	604	.dotprod,
	605	.fp_armv8,
	606	.fullfp16,
	607	.fuse_aes,
	608	.neon,
	609	.perfmon,
	610	.rcpc,
	611	.spe,
	612	.ssbs,
	613	.use_postra_scheduler,
	614	.v8_2a,
	615	}),
	616	};
	617	result[@enumToInt(Feature.cortex_r82)] = .{
	618	.llvm_name = "cortex-r82",
	619	.description = "Cortex-R82 ARM Processors",
	620	.dependencies = featureSet(&[_]Feature{
	621	.use_postra_scheduler,
	622	.v8r,
	623	}),
	624	};
	625	result[@enumToInt(Feature.cortex_x1)] = .{
	626	.llvm_name = "cortex-x1",
	627	.description = "Cortex-X1 ARM processors",
	628	.dependencies = featureSet(&[_]Feature{
	629	.crypto,
	630	.dotprod,
	631	.fp_armv8,
	632	.fullfp16,
	633	.fuse_aes,
	634	.neon,
	635	.perfmon,
	636	.rcpc,
	637	.spe,
	638	.use_postra_scheduler,
	639	.v8_2a,
	640	}),
	641	};
440	642	result[@enumToInt(Feature.crc)] = .{
441	643	.llvm_name = "crc",
442	644	.description = "Enable ARMv8 CRC-32 checksum instructions",
...	...	@@ -490,6 +692,25 @@ pub const all_features = blk: {
490	692	.custom_cheap_as_move,
491	693	}),
492	694	};
	695	result[@enumToInt(Feature.exynosm3)] = .{
	696	.llvm_name = "exynosm3",
	697	.description = "Samsung Exynos-M3 processors",
	698	.dependencies = featureSet(&[_]Feature{
	699	.crc,
	700	.crypto,
	701	.exynos_cheap_as_move,
	702	.force_32bit_jump_tables,
	703	.fuse_address,
	704	.fuse_aes,
	705	.fuse_csel,
	706	.fuse_literals,
	707	.lsl_fast,
	708	.perfmon,
	709	.predictable_select_expensive,
	710	.use_postra_scheduler,
	711	.zcz_fp,
	712	}),
	713	};
493	714	result[@enumToInt(Feature.exynosm4)] = .{
494	715	.llvm_name = "exynosm4",
495	716	.description = "Samsung Exynos-M4 processors",
...	...	@@ -527,6 +748,24 @@ pub const all_features = blk: {
527	748	.sve,
528	749	}),
529	750	};
	751	result[@enumToInt(Feature.falkor)] = .{
	752	.llvm_name = "falkor",
	753	.description = "Qualcomm Falkor processors",
	754	.dependencies = featureSet(&[_]Feature{
	755	.crc,
	756	.crypto,
	757	.custom_cheap_as_move,
	758	.fp_armv8,
	759	.lsl_fast,
	760	.neon,
	761	.perfmon,
	762	.predictable_select_expensive,
	763	.rdm,
	764	.slow_strqro_store,
	765	.use_postra_scheduler,
	766	.zcz,
	767	}),
	768	};
530	769	result[@enumToInt(Feature.fgt)] = .{
531	770	.llvm_name = "fgt",
532	771	.description = "Enable fine grained virtualization traps extension",
...	...	@@ -606,7 +845,7 @@ pub const all_features = blk: {
606	845	.description = "Harden against straight line speculation across RET and BR instructions",
607	846	.dependencies = featureSet(&[_]Feature{}),
608	847	};
609		result[@enumToInt(Feature.i8mm)] = .{
	848	result[@enumToInt(Feature._i8mm)] = .{
610	849	.llvm_name = "i8mm",
611	850	.description = "Enable Matrix Multiply Int8 Extension",
612	851	.dependencies = featureSet(&[_]Feature{}),
...	...	@@ -618,6 +857,22 @@ pub const all_features = blk: {
618	857	.fp_armv8,
619	858	}),
620	859	};
	860	result[@enumToInt(Feature.kryo)] = .{
	861	.llvm_name = "kryo",
	862	.description = "Qualcomm Kryo processors",
	863	.dependencies = featureSet(&[_]Feature{
	864	.crc,
	865	.crypto,
	866	.custom_cheap_as_move,
	867	.fp_armv8,
	868	.lsl_fast,
	869	.neon,
	870	.perfmon,
	871	.predictable_select_expensive,
	872	.use_postra_scheduler,
	873	.zcz,
	874	}),
	875	};
621	876	result[@enumToInt(Feature.lor)] = .{
622	877	.llvm_name = "lor",
623	878	.description = "Enables ARM v8.1 Limited Ordering Regions extension",
...	...	@@ -679,6 +934,42 @@ pub const all_features = blk: {
679	934	.v8_2a,
680	935	}),
681	936	};
	937	result[@enumToInt(Feature.neoversen2)] = .{
	938	.llvm_name = "neoversen2",
	939	.description = "Neoverse N2 ARM processors",
	940	.dependencies = featureSet(&[_]Feature{
	941	.bf16,
	942	.ete,
	943	._i8mm,
	944	.mte,
	945	.sve2,
	946	.sve2_bitperm,
	947	.trbe,
	948	.v8_5a,
	949	}),
	950	};
	951	result[@enumToInt(Feature.neoversev1)] = .{
	952	.llvm_name = "neoversev1",
	953	.description = "Neoverse V1 ARM processors",
	954	.dependencies = featureSet(&[_]Feature{
	955	.bf16,
	956	.ccdp,
	957	.crypto,
	958	.fp_armv8,
	959	.fp16fml,
	960	.fullfp16,
	961	.fuse_aes,
	962	._i8mm,
	963	.neon,
	964	.perfmon,
	965	.rand,
	966	.spe,
	967	.ssbs,
	968	.sve,
	969	.use_postra_scheduler,
	970	.v8_4a,
	971	}),
	972	};
682	973	result[@enumToInt(Feature.no_neg_immediates)] = .{
683	974	.llvm_name = "no-neg-immediates",
684	975	.description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
...	...	@@ -686,7 +977,12 @@ pub const all_features = blk: {
686	977	};
687	978	result[@enumToInt(Feature.nv)] = .{
688	979	.llvm_name = "nv",
689		.description = "Enable v8.4-A Nested Virtualization extension",
	980	.description = "Enable v8.4-A Nested Virtualization Enchancement",
	981	.dependencies = featureSet(&[_]Feature{}),
	982	};
	983	result[@enumToInt(Feature.outline_atomics)] = .{
	984	.llvm_name = "outline-atomics",
	985	.description = "Enable out of line atomics to support LSE instructions",
690	986	.dependencies = featureSet(&[_]Feature{}),
691	987	};
692	988	result[@enumToInt(Feature.pa)] = .{
...	...	@@ -736,13 +1032,6 @@ pub const all_features = blk: {
736	1032	.description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",
737	1033	.dependencies = featureSet(&[_]Feature{}),
738	1034	};
739		result[@enumToInt(Feature.rasv8_4)] = .{
740		.llvm_name = "rasv8_4",
741		.description = "Enable v8.4-A Reliability, Availability and Serviceability extension",
742		.dependencies = featureSet(&[_]Feature{
743		.ras,
744		}),
745		};
746	1035	result[@enumToInt(Feature.rcpc)] = .{
747	1036	.llvm_name = "rcpc",
748	1037	.description = "Enable support for RCPC extension",
...	...	@@ -885,6 +1174,23 @@ pub const all_features = blk: {
885	1174	.description = "Reserve X9, making it unavailable as a GPR",
886	1175	.dependencies = featureSet(&[_]Feature{}),
887	1176	};
	1177	result[@enumToInt(Feature.saphira)] = .{
	1178	.llvm_name = "saphira",
	1179	.description = "Qualcomm Saphira processors",
	1180	.dependencies = featureSet(&[_]Feature{
	1181	.crypto,
	1182	.custom_cheap_as_move,
	1183	.fp_armv8,
	1184	.lsl_fast,
	1185	.neon,
	1186	.perfmon,
	1187	.predictable_select_expensive,
	1188	.spe,
	1189	.use_postra_scheduler,
	1190	.v8_4a,
	1191	.zcz,
	1192	}),
	1193	};
888	1194	result[@enumToInt(Feature.sb)] = .{
889	1195	.llvm_name = "sb",
890	1196	.description = "Enable v8.5 Speculation Barrier",
...	...	@@ -955,7 +1261,9 @@ pub const all_features = blk: {
955	1261	result[@enumToInt(Feature.sve)] = .{
956	1262	.llvm_name = "sve",
957	1263	.description = "Enable Scalable Vector Extension (SVE) instructions",
958		.dependencies = featureSet(&[_]Feature{}),
	1264	.dependencies = featureSet(&[_]Feature{
	1265	.fullfp16,
	1266	}),
959	1267	};
960	1268	result[@enumToInt(Feature.sve2)] = .{
961	1269	.llvm_name = "sve2",
...	...	@@ -1000,15 +1308,104 @@ pub const all_features = blk: {
1000	1308	.description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
1001	1309	.dependencies = featureSet(&[_]Feature{}),
1002	1310	};
1003		result[@enumToInt(Feature.tlb_rmi)] = .{
1004		.llvm_name = "tlb-rmi",
1005		.description = "Enable v8.4-A TLB Range and Maintenance Instructions",
1006		.dependencies = featureSet(&[_]Feature{}),
1007		};
1008		result[@enumToInt(Feature.tme)] = .{
1009		.llvm_name = "tme",
1010		.description = "Enable Transactional Memory Extension",
1011		.dependencies = featureSet(&[_]Feature{}),
	1311	result[@enumToInt(Feature.thunderx)] = .{
	1312	.llvm_name = "thunderx",
	1313	.description = "Cavium ThunderX processors",
	1314	.dependencies = featureSet(&[_]Feature{
	1315	.crc,
	1316	.crypto,
	1317	.fp_armv8,
	1318	.neon,
	1319	.perfmon,
	1320	.predictable_select_expensive,
	1321	.use_postra_scheduler,
	1322	}),
	1323	};
	1324	result[@enumToInt(Feature.thunderx2t99)] = .{
	1325	.llvm_name = "thunderx2t99",
	1326	.description = "Cavium ThunderX2 processors",
	1327	.dependencies = featureSet(&[_]Feature{
	1328	.aggressive_fma,
	1329	.arith_bcc_fusion,
	1330	.crc,
	1331	.crypto,
	1332	.fp_armv8,
	1333	.lse,
	1334	.neon,
	1335	.predictable_select_expensive,
	1336	.use_postra_scheduler,
	1337	.v8_1a,
	1338	}),
	1339	};
	1340	result[@enumToInt(Feature.thunderx3t110)] = .{
	1341	.llvm_name = "thunderx3t110",
	1342	.description = "Marvell ThunderX3 processors",
	1343	.dependencies = featureSet(&[_]Feature{
	1344	.aggressive_fma,
	1345	.arith_bcc_fusion,
	1346	.balance_fp_ops,
	1347	.crc,
	1348	.crypto,
	1349	.fp_armv8,
	1350	.lse,
	1351	.neon,
	1352	.pa,
	1353	.perfmon,
	1354	.predictable_select_expensive,
	1355	.strict_align,
	1356	.use_aa,
	1357	.use_postra_scheduler,
	1358	.v8_3a,
	1359	}),
	1360	};
	1361	result[@enumToInt(Feature.thunderxt81)] = .{
	1362	.llvm_name = "thunderxt81",
	1363	.description = "Cavium ThunderX processors",
	1364	.dependencies = featureSet(&[_]Feature{
	1365	.crc,
	1366	.crypto,
	1367	.fp_armv8,
	1368	.neon,
	1369	.perfmon,
	1370	.predictable_select_expensive,
	1371	.use_postra_scheduler,
	1372	}),
	1373	};
	1374	result[@enumToInt(Feature.thunderxt83)] = .{
	1375	.llvm_name = "thunderxt83",
	1376	.description = "Cavium ThunderX processors",
	1377	.dependencies = featureSet(&[_]Feature{
	1378	.crc,
	1379	.crypto,
	1380	.fp_armv8,
	1381	.neon,
	1382	.perfmon,
	1383	.predictable_select_expensive,
	1384	.use_postra_scheduler,
	1385	}),
	1386	};
	1387	result[@enumToInt(Feature.thunderxt88)] = .{
	1388	.llvm_name = "thunderxt88",
	1389	.description = "Cavium ThunderX processors",
	1390	.dependencies = featureSet(&[_]Feature{
	1391	.crc,
	1392	.crypto,
	1393	.fp_armv8,
	1394	.neon,
	1395	.perfmon,
	1396	.predictable_select_expensive,
	1397	.use_postra_scheduler,
	1398	}),
	1399	};
	1400	result[@enumToInt(Feature.tlb_rmi)] = .{
	1401	.llvm_name = "tlb-rmi",
	1402	.description = "Enable v8.4-A TLB Range and Maintenance Instructions",
	1403	.dependencies = featureSet(&[_]Feature{}),
	1404	};
	1405	result[@enumToInt(Feature.tme)] = .{
	1406	.llvm_name = "tme",
	1407	.description = "Enable Transactional Memory Extension",
	1408	.dependencies = featureSet(&[_]Feature{}),
1012	1409	};
1013	1410	result[@enumToInt(Feature.tpidr_el1)] = .{
1014	1411	.llvm_name = "tpidr-el1",
...	...	@@ -1035,6 +1432,24 @@ pub const all_features = blk: {
1035	1432	.description = "Enable Trace Buffer Extension",
1036	1433	.dependencies = featureSet(&[_]Feature{}),
1037	1434	};
	1435	result[@enumToInt(Feature.tsv110)] = .{
	1436	.llvm_name = "tsv110",
	1437	.description = "HiSilicon TS-V110 processors",
	1438	.dependencies = featureSet(&[_]Feature{
	1439	.crypto,
	1440	.custom_cheap_as_move,
	1441	.dotprod,
	1442	.fp_armv8,
	1443	.fp16fml,
	1444	.fullfp16,
	1445	.fuse_aes,
	1446	.neon,
	1447	.perfmon,
	1448	.spe,
	1449	.use_postra_scheduler,
	1450	.v8_2a,
	1451	}),
	1452	};
1038	1453	result[@enumToInt(Feature.uaops)] = .{
1039	1454	.llvm_name = "uaops",
1040	1455	.description = "Enable v8.2 UAO PState",
...	...	@@ -1060,14 +1475,6 @@ pub const all_features = blk: {
1060	1475	.description = "Use the reciprocal square root approximation",
1061	1476	.dependencies = featureSet(&[_]Feature{}),
1062	1477	};
1063		result[@enumToInt(Feature.v8a)] = .{
1064		.llvm_name = null,
1065		.description = "Support ARM v8a instructions",
1066		.dependencies = featureSet(&[_]Feature{
1067		.fp_armv8,
1068		.neon,
1069		}),
1070		};
1071	1478	result[@enumToInt(Feature.v8_1a)] = .{
1072	1479	.llvm_name = "v8.1a",
1073	1480	.description = "Support ARM v8.1a instructions",
...	...	@@ -1078,7 +1485,6 @@ pub const all_features = blk: {
1078	1485	.pan,
1079	1486	.rdm,
1080	1487	.vh,
1081		.v8a,
1082	1488	}),
1083	1489	};
1084	1490	result[@enumToInt(Feature.v8_2a)] = .{
...	...	@@ -1115,7 +1521,6 @@ pub const all_features = blk: {
1115	1521	.mpam,
1116	1522	.nv,
1117	1523	.pmu,
1118		.rasv8_4,
1119	1524	.rcpc_immo,
1120	1525	.sel2,
1121	1526	.tlb_rmi,
...	...	@@ -1146,14 +1551,52 @@ pub const all_features = blk: {
1146	1551	.bf16,
1147	1552	.ecv,
1148	1553	.fgt,
1149		.i8mm,
	1554	._i8mm,
1150	1555	.v8_5a,
1151	1556	}),
1152	1557	};
	1558	result[@enumToInt(Feature.v8r)] = .{
	1559	.llvm_name = "v8r",
	1560	.description = "Support ARM v8r instructions",
	1561	.dependencies = featureSet(&[_]Feature{
	1562	.CONTEXTIDREL2,
	1563	.ccidx,
	1564	.ccpp,
	1565	.complxnum,
	1566	.crc,
	1567	.dit,
	1568	.dotprod,
	1569	.fmi,
	1570	.fp16fml,
	1571	.fullfp16,
	1572	.jsconv,
	1573	.lse,
	1574	.pa,
	1575	.pan,
	1576	.pan_rwv,
	1577	.perfmon,
	1578	.predres,
	1579	.ras,
	1580	.rcpc,
	1581	.rcpc_immo,
	1582	.rdm,
	1583	.sb,
	1584	.sel2,
	1585	.sha3,
	1586	.sm4,
	1587	.specrestrict,
	1588	.ssbs,
	1589	.tlb_rmi,
	1590	.tracev8_4,
	1591	.uaops,
	1592	}),
	1593	};
1153	1594	result[@enumToInt(Feature.vh)] = .{
1154	1595	.llvm_name = "vh",
1155	1596	.description = "Enables ARM v8.1 Virtual Host extension",
1156		.dependencies = featureSet(&[_]Feature{}),
	1597	.dependencies = featureSet(&[_]Feature{
	1598	.CONTEXTIDREL2,
	1599	}),
1157	1600	};
1158	1601	result[@enumToInt(Feature.zcm)] = .{
1159	1602	.llvm_name = "zcm",
...	...	@@ -1196,15 +1639,7 @@ pub const cpu = struct {
1196	1639	.name = "a64fx",
1197	1640	.llvm_name = "a64fx",
1198	1641	.features = featureSet(&[_]Feature{
1199		.complxnum,
1200		.fp_armv8,
1201		.fullfp16,
1202		.neon,
1203		.perfmon,
1204		.sha2,
1205		.sve,
1206		.use_postra_scheduler,
1207		.v8_2a,
	1642	.a64fx,
1208	1643	}),
1209	1644	};
1210	1645	pub const apple_a10 = CpuModel{
...	...	@@ -1281,68 +1716,42 @@ pub const cpu = struct {
1281	1716	.name = "carmel",
1282	1717	.llvm_name = "carmel",
1283	1718	.features = featureSet(&[_]Feature{
1284		.crypto,
1285		.fullfp16,
1286		.neon,
1287		.v8_2a,
	1719	.carmel,
1288	1720	}),
1289	1721	};
1290	1722	pub const cortex_a34 = CpuModel{
1291	1723	.name = "cortex_a34",
1292	1724	.llvm_name = "cortex-a34",
1293	1725	.features = featureSet(&[_]Feature{
1294		.a34,
	1726	.a35,
1295	1727	}),
1296	1728	};
1297	1729	pub const cortex_a35 = CpuModel{
1298	1730	.name = "cortex_a35",
1299	1731	.llvm_name = "cortex-a35",
1300	1732	.features = featureSet(&[_]Feature{
1301		.a34,
	1733	.a35,
1302	1734	}),
1303	1735	};
1304	1736	pub const cortex_a53 = CpuModel{
1305	1737	.name = "cortex_a53",
1306	1738	.llvm_name = "cortex-a53",
1307	1739	.features = featureSet(&[_]Feature{
1308		.balance_fp_ops,
1309		.crc,
1310		.crypto,
1311		.custom_cheap_as_move,
1312		.fuse_aes,
1313		.perfmon,
1314		.use_aa,
1315		.use_postra_scheduler,
1316		.v8a,
	1740	.a53,
1317	1741	}),
1318	1742	};
1319	1743	pub const cortex_a55 = CpuModel{
1320	1744	.name = "cortex_a55",
1321	1745	.llvm_name = "cortex-a55",
1322	1746	.features = featureSet(&[_]Feature{
1323		.crypto,
1324		.dotprod,
1325		.fullfp16,
1326		.fuse_aes,
1327		.perfmon,
1328		.rcpc,
1329		.v8_2a,
	1747	.a55,
1330	1748	}),
1331	1749	};
1332	1750	pub const cortex_a57 = CpuModel{
1333	1751	.name = "cortex_a57",
1334	1752	.llvm_name = "cortex-a57",
1335	1753	.features = featureSet(&[_]Feature{
1336		.balance_fp_ops,
1337		.crc,
1338		.crypto,
1339		.custom_cheap_as_move,
1340		.fuse_aes,
1341		.fuse_literals,
1342		.perfmon,
1343		.predictable_select_expensive,
1344		.use_postra_scheduler,
1345		.v8a,
	1754	.a57,
1346	1755	}),
1347	1756	};
1348	1757	pub const cortex_a65 = CpuModel{
...	...	@@ -1363,35 +1772,21 @@ pub const cpu = struct {
1363	1772	.name = "cortex_a72",
1364	1773	.llvm_name = "cortex-a72",
1365	1774	.features = featureSet(&[_]Feature{
1366		.crc,
1367		.crypto,
1368		.fuse_aes,
1369		.perfmon,
1370		.v8a,
	1775	.a72,
1371	1776	}),
1372	1777	};
1373	1778	pub const cortex_a73 = CpuModel{
1374	1779	.name = "cortex_a73",
1375	1780	.llvm_name = "cortex-a73",
1376	1781	.features = featureSet(&[_]Feature{
1377		.crc,
1378		.crypto,
1379		.fuse_aes,
1380		.perfmon,
1381		.v8a,
	1782	.a73,
1382	1783	}),
1383	1784	};
1384	1785	pub const cortex_a75 = CpuModel{
1385	1786	.name = "cortex_a75",
1386	1787	.llvm_name = "cortex-a75",
1387	1788	.features = featureSet(&[_]Feature{
1388		.crypto,
1389		.dotprod,
1390		.fullfp16,
1391		.fuse_aes,
1392		.perfmon,
1393		.rcpc,
1394		.v8_2a,
	1789	.a75,
1395	1790	}),
1396	1791	};
1397	1792	pub const cortex_a76 = CpuModel{
...	...	@@ -1412,48 +1807,28 @@ pub const cpu = struct {
1412	1807	.name = "cortex_a77",
1413	1808	.llvm_name = "cortex-a77",
1414	1809	.features = featureSet(&[_]Feature{
1415		.crypto,
1416		.dotprod,
1417		.fp_armv8,
1418		.fullfp16,
1419		.neon,
1420		.rcpc,
1421		.v8_2a,
	1810	.a77,
1422	1811	}),
1423	1812	};
1424	1813	pub const cortex_a78 = CpuModel{
1425	1814	.name = "cortex_a78",
1426	1815	.llvm_name = "cortex-a78",
1427	1816	.features = featureSet(&[_]Feature{
1428		.crypto,
1429		.dotprod,
1430		.fp_armv8,
1431		.fullfp16,
1432		.fuse_aes,
1433		.neon,
1434		.perfmon,
1435		.rcpc,
1436		.spe,
1437		.ssbs,
1438		.use_postra_scheduler,
1439		.v8_2a,
	1817	.cortex_a78,
	1818	}),
	1819	};
	1820	pub const cortex_r82 = CpuModel{
	1821	.name = "cortex_r82",
	1822	.llvm_name = "cortex-r82",
	1823	.features = featureSet(&[_]Feature{
	1824	.cortex_r82,
1440	1825	}),
1441	1826	};
1442	1827	pub const cortex_x1 = CpuModel{
1443	1828	.name = "cortex_x1",
1444	1829	.llvm_name = "cortex-x1",
1445	1830	.features = featureSet(&[_]Feature{
1446		.crypto,
1447		.dotprod,
1448		.fp_armv8,
1449		.fullfp16,
1450		.fuse_aes,
1451		.neon,
1452		.perfmon,
1453		.rcpc,
1454		.spe,
1455		.use_postra_scheduler,
1456		.v8_2a,
	1831	.cortex_x1,
1457	1832	}),
1458	1833	};
1459	1834	pub const cyclone = CpuModel{
...	...	@@ -1463,59 +1838,11 @@ pub const cpu = struct {
1463	1838	.apple_a7,
1464	1839	}),
1465	1840	};
1466		pub const exynos_m1 = CpuModel{
1467		.name = "exynos_m1",
1468		.llvm_name = null,
1469		.features = featureSet(&[_]Feature{
1470		.crc,
1471		.crypto,
1472		.exynos_cheap_as_move,
1473		.force_32bit_jump_tables,
1474		.fuse_aes,
1475		.perfmon,
1476		.slow_misaligned_128store,
1477		.slow_paired_128,
1478		.use_postra_scheduler,
1479		.use_reciprocal_square_root,
1480		.v8a,
1481		.zcz_fp,
1482		}),
1483		};
1484		pub const exynos_m2 = CpuModel{
1485		.name = "exynos_m2",
1486		.llvm_name = null,
1487		.features = featureSet(&[_]Feature{
1488		.crc,
1489		.crypto,
1490		.exynos_cheap_as_move,
1491		.force_32bit_jump_tables,
1492		.fuse_aes,
1493		.perfmon,
1494		.slow_misaligned_128store,
1495		.slow_paired_128,
1496		.use_postra_scheduler,
1497		.v8a,
1498		.zcz_fp,
1499		}),
1500		};
1501	1841	pub const exynos_m3 = CpuModel{
1502	1842	.name = "exynos_m3",
1503	1843	.llvm_name = "exynos-m3",
1504	1844	.features = featureSet(&[_]Feature{
1505		.crc,
1506		.crypto,
1507		.exynos_cheap_as_move,
1508		.force_32bit_jump_tables,
1509		.fuse_address,
1510		.fuse_aes,
1511		.fuse_csel,
1512		.fuse_literals,
1513		.lsl_fast,
1514		.perfmon,
1515		.predictable_select_expensive,
1516		.use_postra_scheduler,
1517		.v8a,
1518		.zcz_fp,
	1845	.exynosm3,
1519	1846	}),
1520	1847	};
1521	1848	pub const exynos_m4 = CpuModel{
...	...	@@ -1536,17 +1863,7 @@ pub const cpu = struct {
1536	1863	.name = "falkor",
1537	1864	.llvm_name = "falkor",
1538	1865	.features = featureSet(&[_]Feature{
1539		.crc,
1540		.crypto,
1541		.custom_cheap_as_move,
1542		.lsl_fast,
1543		.perfmon,
1544		.predictable_select_expensive,
1545		.rdm,
1546		.slow_strqro_store,
1547		.use_postra_scheduler,
1548		.v8a,
1549		.zcz,
	1866	.falkor,
1550	1867	}),
1551	1868	};
1552	1869	pub const generic = CpuModel{
...	...	@@ -1554,25 +1871,18 @@ pub const cpu = struct {
1554	1871	.llvm_name = "generic",
1555	1872	.features = featureSet(&[_]Feature{
1556	1873	.ete,
	1874	.fp_armv8,
1557	1875	.fuse_aes,
	1876	.neon,
1558	1877	.perfmon,
1559	1878	.use_postra_scheduler,
1560		.v8a,
1561	1879	}),
1562	1880	};
1563	1881	pub const kryo = CpuModel{
1564	1882	.name = "kryo",
1565	1883	.llvm_name = "kryo",
1566	1884	.features = featureSet(&[_]Feature{
1567		.crc,
1568		.crypto,
1569		.custom_cheap_as_move,
1570		.lsl_fast,
1571		.perfmon,
1572		.predictable_select_expensive,
1573		.use_postra_scheduler,
1574		.zcz,
1575		.v8a,
	1885	.kryo,
1576	1886	}),
1577	1887	};
1578	1888	pub const neoverse_e1 = CpuModel{
...	...	@@ -1589,118 +1899,74 @@ pub const cpu = struct {
1589	1899	.neoversen1,
1590	1900	}),
1591	1901	};
	1902	pub const neoverse_n2 = CpuModel{
	1903	.name = "neoverse_n2",
	1904	.llvm_name = "neoverse-n2",
	1905	.features = featureSet(&[_]Feature{
	1906	.neoversen2,
	1907	}),
	1908	};
	1909	pub const neoverse_v1 = CpuModel{
	1910	.name = "neoverse_v1",
	1911	.llvm_name = "neoverse-v1",
	1912	.features = featureSet(&[_]Feature{
	1913	.neoversev1,
	1914	}),
	1915	};
1592	1916	pub const saphira = CpuModel{
1593	1917	.name = "saphira",
1594	1918	.llvm_name = "saphira",
1595	1919	.features = featureSet(&[_]Feature{
1596		.crypto,
1597		.custom_cheap_as_move,
1598		.lsl_fast,
1599		.perfmon,
1600		.predictable_select_expensive,
1601		.spe,
1602		.use_postra_scheduler,
1603		.v8_4a,
1604		.zcz,
	1920	.saphira,
1605	1921	}),
1606	1922	};
1607	1923	pub const thunderx = CpuModel{
1608	1924	.name = "thunderx",
1609	1925	.llvm_name = "thunderx",
1610	1926	.features = featureSet(&[_]Feature{
1611		.crc,
1612		.crypto,
1613		.perfmon,
1614		.predictable_select_expensive,
1615		.use_postra_scheduler,
1616		.v8a,
	1927	.thunderx,
1617	1928	}),
1618	1929	};
1619	1930	pub const thunderx2t99 = CpuModel{
1620	1931	.name = "thunderx2t99",
1621	1932	.llvm_name = "thunderx2t99",
1622	1933	.features = featureSet(&[_]Feature{
1623		.aggressive_fma,
1624		.arith_bcc_fusion,
1625		.crc,
1626		.crypto,
1627		.lse,
1628		.predictable_select_expensive,
1629		.use_postra_scheduler,
1630		.v8_1a,
	1934	.thunderx2t99,
1631	1935	}),
1632	1936	};
1633	1937	pub const thunderx3t110 = CpuModel{
1634	1938	.name = "thunderx3t110",
1635	1939	.llvm_name = "thunderx3t110",
1636	1940	.features = featureSet(&[_]Feature{
1637		.aggressive_fma,
1638		.arith_bcc_fusion,
1639		.balance_fp_ops,
1640		.crc,
1641		.crypto,
1642		.fp_armv8,
1643		.lse,
1644		.neon,
1645		.pa,
1646		.perfmon,
1647		.predictable_select_expensive,
1648		.strict_align,
1649		.use_aa,
1650		.use_postra_scheduler,
1651		.v8_3a,
	1941	.thunderx3t110,
1652	1942	}),
1653	1943	};
1654	1944	pub const thunderxt81 = CpuModel{
1655	1945	.name = "thunderxt81",
1656	1946	.llvm_name = "thunderxt81",
1657	1947	.features = featureSet(&[_]Feature{
1658		.crc,
1659		.crypto,
1660		.perfmon,
1661		.predictable_select_expensive,
1662		.use_postra_scheduler,
1663		.v8a,
	1948	.thunderxt81,
1664	1949	}),
1665	1950	};
1666	1951	pub const thunderxt83 = CpuModel{
1667	1952	.name = "thunderxt83",
1668	1953	.llvm_name = "thunderxt83",
1669	1954	.features = featureSet(&[_]Feature{
1670		.crc,
1671		.crypto,
1672		.perfmon,
1673		.predictable_select_expensive,
1674		.use_postra_scheduler,
1675		.v8a,
	1955	.thunderxt83,
1676	1956	}),
1677	1957	};
1678	1958	pub const thunderxt88 = CpuModel{
1679	1959	.name = "thunderxt88",
1680	1960	.llvm_name = "thunderxt88",
1681	1961	.features = featureSet(&[_]Feature{
1682		.crc,
1683		.crypto,
1684		.perfmon,
1685		.predictable_select_expensive,
1686		.use_postra_scheduler,
1687		.v8a,
	1962	.thunderxt88,
1688	1963	}),
1689	1964	};
1690	1965	pub const tsv110 = CpuModel{
1691	1966	.name = "tsv110",
1692	1967	.llvm_name = "tsv110",
1693	1968	.features = featureSet(&[_]Feature{
1694		.crypto,
1695		.custom_cheap_as_move,
1696		.dotprod,
1697		.fp16fml,
1698		.fullfp16,
1699		.fuse_aes,
1700		.perfmon,
1701		.spe,
1702		.use_postra_scheduler,
1703		.v8_2a,
	1969	.tsv110,
1704	1970	}),
1705	1971	};
1706	1972	};

lib/std/target/amdgpu.zig+149-46

...	...	@@ -16,7 +16,6 @@ pub const Feature = enum {
16	16	atomic_fadd_insts,
17	17	auto_waitcnt_before_barrier,
18	18	ci_insts,
19		code_object_v3,
20	19	cumode,
21	20	dl_insts,
22	21	dot1_insts,
...	...	@@ -54,6 +53,8 @@ pub const Feature = enum {
54	53	gfx9,
55	54	gfx9_insts,
56	55	half_rate_64_ops,
	56	image_gather4_d16_bug,
	57	image_store_d16_bug,
57	58	inst_fwd_prefetch_bug,
58	59	int_clamp_insts,
59	60	inv_2pi_inline_imm,
...	...	@@ -104,7 +105,9 @@ pub const Feature = enum {
104	105	sram_ecc,
105	106	trap_handler,
106	107	trig_reduced_range,
	108	unaligned_access_mode,
107	109	unaligned_buffer_access,
	110	unaligned_ds_access,
108	111	unaligned_scratch_access,
109	112	unpacked_d16_vmem,
110	113	unsafe_ds_offset_folding,
...	...	@@ -125,6 +128,7 @@ pub const Feature = enum {
125	128	pub usingnamespace CpuFeature.feature_set_fns(Feature);
126	129
127	130	pub const all_features = blk: {
	131	@setEvalBranchQuota(10000);
128	132	const len = @typeInfo(Feature).Enum.fields.len;
129	133	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
130	134	var result: [len]CpuFeature = undefined;
...	...	@@ -170,11 +174,6 @@ pub const all_features = blk: {
170	174	.description = "Additional instructions for CI+",
171	175	.dependencies = featureSet(&[_]Feature{}),
172	176	};
173		result[@enumToInt(Feature.code_object_v3)] = .{
174		.llvm_name = "code-object-v3",
175		.description = "Generate code object version 3",
176		.dependencies = featureSet(&[_]Feature{}),
177		};
178	177	result[@enumToInt(Feature.cumode)] = .{
179	178	.llvm_name = "cumode",
180	179	.description = "Enable CU wavefront execution mode",
...	...	@@ -353,6 +352,8 @@ pub const all_features = blk: {
353	352	.sdwa_omod,
354	353	.sdwa_scalar,
355	354	.sdwa_sdst,
	355	.unaligned_buffer_access,
	356	.unaligned_ds_access,
356	357	.vop3_literal,
357	358	.vop3p,
358	359	.vscnt,
...	...	@@ -418,6 +419,8 @@ pub const all_features = blk: {
418	419	.sdwa_omod,
419	420	.sdwa_scalar,
420	421	.sdwa_sdst,
	422	.unaligned_buffer_access,
	423	.unaligned_ds_access,
421	424	.vgpr_index_mode,
422	425	.vop3p,
423	426	.wavefrontsize64,
...	...	@@ -433,6 +436,16 @@ pub const all_features = blk: {
433	436	.description = "Most fp64 instructions are half rate instead of quarter",
434	437	.dependencies = featureSet(&[_]Feature{}),
435	438	};
	439	result[@enumToInt(Feature.image_gather4_d16_bug)] = .{
	440	.llvm_name = "image-gather4-d16-bug",
	441	.description = "Image Gather4 D16 hardware bug",
	442	.dependencies = featureSet(&[_]Feature{}),
	443	};
	444	result[@enumToInt(Feature.image_store_d16_bug)] = .{
	445	.llvm_name = "image-store-d16-bug",
	446	.description = "Image Store D16 hardware bug",
	447	.dependencies = featureSet(&[_]Feature{}),
	448	};
436	449	result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{
437	450	.llvm_name = "inst-fwd-prefetch-bug",
438	451	.description = "S_INST_PREFETCH instruction causes shader to hang",
...	...	@@ -455,7 +468,7 @@ pub const all_features = blk: {
455	468	};
456	469	result[@enumToInt(Feature.lds_misaligned_bug)] = .{
457	470	.llvm_name = "lds-misaligned-bug",
458		.description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
	471	.description = "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode",
459	472	.dependencies = featureSet(&[_]Feature{}),
460	473	};
461	474	result[@enumToInt(Feature.ldsbankcount16)] = .{
...	...	@@ -659,6 +672,7 @@ pub const all_features = blk: {
659	672	.no_sram_ecc_support,
660	673	.s_memtime_inst,
661	674	.trig_reduced_range,
	675	.unaligned_buffer_access,
662	676	.wavefrontsize64,
663	677	}),
664	678	};
...	...	@@ -710,9 +724,19 @@ pub const all_features = blk: {
710	724	.description = "Requires use of fract on arguments to trig instructions",
711	725	.dependencies = featureSet(&[_]Feature{}),
712	726	};
	727	result[@enumToInt(Feature.unaligned_access_mode)] = .{
	728	.llvm_name = "unaligned-access-mode",
	729	.description = "Enable unaligned global, local and region loads and stores if the hardware supports it",
	730	.dependencies = featureSet(&[_]Feature{}),
	731	};
713	732	result[@enumToInt(Feature.unaligned_buffer_access)] = .{
714	733	.llvm_name = "unaligned-buffer-access",
715		.description = "Support unaligned global loads and stores",
	734	.description = "Hardware supports unaligned global loads and stores",
	735	.dependencies = featureSet(&[_]Feature{}),
	736	};
	737	result[@enumToInt(Feature.unaligned_ds_access)] = .{
	738	.llvm_name = "unaligned-ds-access",
	739	.description = "Hardware supports unaligned local and region loads and stores",
716	740	.dependencies = featureSet(&[_]Feature{}),
717	741	};
718	742	result[@enumToInt(Feature.unaligned_scratch_access)] = .{
...	...	@@ -778,6 +802,7 @@ pub const all_features = blk: {
778	802	.sdwa_mav,
779	803	.sdwa_out_mods_vopc,
780	804	.trig_reduced_range,
	805	.unaligned_buffer_access,
781	806	.vgpr_index_mode,
782	807	.wavefrontsize64,
783	808	}),
...	...	@@ -830,7 +855,6 @@ pub const cpu = struct {
830	855	.name = "bonaire",
831	856	.llvm_name = "bonaire",
832	857	.features = featureSet(&[_]Feature{
833		.code_object_v3,
834	858	.ldsbankcount32,
835	859	.no_xnack_support,
836	860	.sea_islands,
...	...	@@ -840,7 +864,6 @@ pub const cpu = struct {
840	864	.name = "carrizo",
841	865	.llvm_name = "carrizo",
842	866	.features = featureSet(&[_]Feature{
843		.code_object_v3,
844	867	.fast_fmaf,
845	868	.half_rate_64_ops,
846	869	.ldsbankcount32,
...	...	@@ -853,7 +876,6 @@ pub const cpu = struct {
853	876	.name = "fiji",
854	877	.llvm_name = "fiji",
855	878	.features = featureSet(&[_]Feature{
856		.code_object_v3,
857	879	.ldsbankcount32,
858	880	.no_xnack_support,
859	881	.unpacked_d16_vmem,
...	...	@@ -879,7 +901,6 @@ pub const cpu = struct {
879	901	.name = "gfx1010",
880	902	.llvm_name = "gfx1010",
881	903	.features = featureSet(&[_]Feature{
882		.code_object_v3,
883	904	.dl_insts,
884	905	.ds_src2_insts,
885	906	.flat_segment_offset_bug,
...	...	@@ -909,7 +930,6 @@ pub const cpu = struct {
909	930	.name = "gfx1011",
910	931	.llvm_name = "gfx1011",
911	932	.features = featureSet(&[_]Feature{
912		.code_object_v3,
913	933	.dl_insts,
914	934	.dot1_insts,
915	935	.dot2_insts,
...	...	@@ -921,6 +941,7 @@ pub const cpu = struct {
921	941	.gfx10,
922	942	.inst_fwd_prefetch_bug,
923	943	.lds_branch_vmem_war_hazard,
	944	.lds_misaligned_bug,
924	945	.ldsbankcount32,
925	946	.mad_mac_f32_insts,
926	947	.no_xnack_support,
...	...	@@ -942,7 +963,6 @@ pub const cpu = struct {
942	963	.name = "gfx1012",
943	964	.llvm_name = "gfx1012",
944	965	.features = featureSet(&[_]Feature{
945		.code_object_v3,
946	966	.dl_insts,
947	967	.dot1_insts,
948	968	.dot2_insts,
...	...	@@ -976,7 +996,60 @@ pub const cpu = struct {
976	996	.name = "gfx1030",
977	997	.llvm_name = "gfx1030",
978	998	.features = featureSet(&[_]Feature{
979		.code_object_v3,
	999	.dl_insts,
	1000	.dot1_insts,
	1001	.dot2_insts,
	1002	.dot5_insts,
	1003	.dot6_insts,
	1004	.gfx10,
	1005	.gfx10_3_insts,
	1006	.gfx10_b_encoding,
	1007	.ldsbankcount32,
	1008	.no_xnack_support,
	1009	.nsa_encoding,
	1010	.wavefrontsize32,
	1011	}),
	1012	};
	1013	pub const gfx1031 = CpuModel{
	1014	.name = "gfx1031",
	1015	.llvm_name = "gfx1031",
	1016	.features = featureSet(&[_]Feature{
	1017	.dl_insts,
	1018	.dot1_insts,
	1019	.dot2_insts,
	1020	.dot5_insts,
	1021	.dot6_insts,
	1022	.gfx10,
	1023	.gfx10_3_insts,
	1024	.gfx10_b_encoding,
	1025	.ldsbankcount32,
	1026	.no_xnack_support,
	1027	.nsa_encoding,
	1028	.wavefrontsize32,
	1029	}),
	1030	};
	1031	pub const gfx1032 = CpuModel{
	1032	.name = "gfx1032",
	1033	.llvm_name = "gfx1032",
	1034	.features = featureSet(&[_]Feature{
	1035	.dl_insts,
	1036	.dot1_insts,
	1037	.dot2_insts,
	1038	.dot5_insts,
	1039	.dot6_insts,
	1040	.gfx10,
	1041	.gfx10_3_insts,
	1042	.gfx10_b_encoding,
	1043	.ldsbankcount32,
	1044	.no_xnack_support,
	1045	.nsa_encoding,
	1046	.wavefrontsize32,
	1047	}),
	1048	};
	1049	pub const gfx1033 = CpuModel{
	1050	.name = "gfx1033",
	1051	.llvm_name = "gfx1033",
	1052	.features = featureSet(&[_]Feature{
980	1053	.dl_insts,
981	1054	.dot1_insts,
982	1055	.dot2_insts,
...	...	@@ -995,7 +1068,6 @@ pub const cpu = struct {
995	1068	.name = "gfx600",
996	1069	.llvm_name = "gfx600",
997	1070	.features = featureSet(&[_]Feature{
998		.code_object_v3,
999	1071	.fast_fmaf,
1000	1072	.half_rate_64_ops,
1001	1073	.ldsbankcount32,
...	...	@@ -1007,7 +1079,15 @@ pub const cpu = struct {
1007	1079	.name = "gfx601",
1008	1080	.llvm_name = "gfx601",
1009	1081	.features = featureSet(&[_]Feature{
1010		.code_object_v3,
	1082	.ldsbankcount32,
	1083	.no_xnack_support,
	1084	.southern_islands,
	1085	}),
	1086	};
	1087	pub const gfx602 = CpuModel{
	1088	.name = "gfx602",
	1089	.llvm_name = "gfx602",
	1090	.features = featureSet(&[_]Feature{
1011	1091	.ldsbankcount32,
1012	1092	.no_xnack_support,
1013	1093	.southern_islands,
...	...	@@ -1017,7 +1097,6 @@ pub const cpu = struct {
1017	1097	.name = "gfx700",
1018	1098	.llvm_name = "gfx700",
1019	1099	.features = featureSet(&[_]Feature{
1020		.code_object_v3,
1021	1100	.ldsbankcount32,
1022	1101	.no_xnack_support,
1023	1102	.sea_islands,
...	...	@@ -1027,7 +1106,6 @@ pub const cpu = struct {
1027	1106	.name = "gfx701",
1028	1107	.llvm_name = "gfx701",
1029	1108	.features = featureSet(&[_]Feature{
1030		.code_object_v3,
1031	1109	.fast_fmaf,
1032	1110	.half_rate_64_ops,
1033	1111	.ldsbankcount32,
...	...	@@ -1039,7 +1117,6 @@ pub const cpu = struct {
1039	1117	.name = "gfx702",
1040	1118	.llvm_name = "gfx702",
1041	1119	.features = featureSet(&[_]Feature{
1042		.code_object_v3,
1043	1120	.fast_fmaf,
1044	1121	.ldsbankcount16,
1045	1122	.no_xnack_support,
...	...	@@ -1050,7 +1127,6 @@ pub const cpu = struct {
1050	1127	.name = "gfx703",
1051	1128	.llvm_name = "gfx703",
1052	1129	.features = featureSet(&[_]Feature{
1053		.code_object_v3,
1054	1130	.ldsbankcount16,
1055	1131	.no_xnack_support,
1056	1132	.sea_islands,
...	...	@@ -1060,17 +1136,24 @@ pub const cpu = struct {
1060	1136	.name = "gfx704",
1061	1137	.llvm_name = "gfx704",
1062	1138	.features = featureSet(&[_]Feature{
1063		.code_object_v3,
1064	1139	.ldsbankcount32,
1065	1140	.no_xnack_support,
1066	1141	.sea_islands,
1067	1142	}),
1068	1143	};
	1144	pub const gfx705 = CpuModel{
	1145	.name = "gfx705",
	1146	.llvm_name = "gfx705",
	1147	.features = featureSet(&[_]Feature{
	1148	.ldsbankcount16,
	1149	.no_xnack_support,
	1150	.sea_islands,
	1151	}),
	1152	};
1069	1153	pub const gfx801 = CpuModel{
1070	1154	.name = "gfx801",
1071	1155	.llvm_name = "gfx801",
1072	1156	.features = featureSet(&[_]Feature{
1073		.code_object_v3,
1074	1157	.fast_fmaf,
1075	1158	.half_rate_64_ops,
1076	1159	.ldsbankcount32,
...	...	@@ -1083,7 +1166,6 @@ pub const cpu = struct {
1083	1166	.name = "gfx802",
1084	1167	.llvm_name = "gfx802",
1085	1168	.features = featureSet(&[_]Feature{
1086		.code_object_v3,
1087	1169	.ldsbankcount32,
1088	1170	.no_xnack_support,
1089	1171	.sgpr_init_bug,
...	...	@@ -1095,18 +1177,29 @@ pub const cpu = struct {
1095	1177	.name = "gfx803",
1096	1178	.llvm_name = "gfx803",
1097	1179	.features = featureSet(&[_]Feature{
1098		.code_object_v3,
1099	1180	.ldsbankcount32,
1100	1181	.no_xnack_support,
1101	1182	.unpacked_d16_vmem,
1102	1183	.volcanic_islands,
1103	1184	}),
1104	1185	};
	1186	pub const gfx805 = CpuModel{
	1187	.name = "gfx805",
	1188	.llvm_name = "gfx805",
	1189	.features = featureSet(&[_]Feature{
	1190	.ldsbankcount32,
	1191	.no_xnack_support,
	1192	.sgpr_init_bug,
	1193	.unpacked_d16_vmem,
	1194	.volcanic_islands,
	1195	}),
	1196	};
1105	1197	pub const gfx810 = CpuModel{
1106	1198	.name = "gfx810",
1107	1199	.llvm_name = "gfx810",
1108	1200	.features = featureSet(&[_]Feature{
1109		.code_object_v3,
	1201	.image_gather4_d16_bug,
	1202	.image_store_d16_bug,
1110	1203	.ldsbankcount16,
1111	1204	.volcanic_islands,
1112	1205	.xnack,
...	...	@@ -1116,8 +1209,8 @@ pub const cpu = struct {
1116	1209	.name = "gfx900",
1117	1210	.llvm_name = "gfx900",
1118	1211	.features = featureSet(&[_]Feature{
1119		.code_object_v3,
1120	1212	.gfx9,
	1213	.image_gather4_d16_bug,
1121	1214	.ldsbankcount32,
1122	1215	.mad_mix_insts,
1123	1216	.no_sram_ecc_support,
...	...	@@ -1128,8 +1221,8 @@ pub const cpu = struct {
1128	1221	.name = "gfx902",
1129	1222	.llvm_name = "gfx902",
1130	1223	.features = featureSet(&[_]Feature{
1131		.code_object_v3,
1132	1224	.gfx9,
	1225	.image_gather4_d16_bug,
1133	1226	.ldsbankcount32,
1134	1227	.mad_mix_insts,
1135	1228	.no_sram_ecc_support,
...	...	@@ -1140,9 +1233,9 @@ pub const cpu = struct {
1140	1233	.name = "gfx904",
1141	1234	.llvm_name = "gfx904",
1142	1235	.features = featureSet(&[_]Feature{
1143		.code_object_v3,
1144	1236	.fma_mix_insts,
1145	1237	.gfx9,
	1238	.image_gather4_d16_bug,
1146	1239	.ldsbankcount32,
1147	1240	.no_sram_ecc_support,
1148	1241	.no_xnack_support,
...	...	@@ -1152,13 +1245,13 @@ pub const cpu = struct {
1152	1245	.name = "gfx906",
1153	1246	.llvm_name = "gfx906",
1154	1247	.features = featureSet(&[_]Feature{
1155		.code_object_v3,
1156	1248	.dl_insts,
1157	1249	.dot1_insts,
1158	1250	.dot2_insts,
1159	1251	.fma_mix_insts,
1160	1252	.gfx9,
1161	1253	.half_rate_64_ops,
	1254	.image_gather4_d16_bug,
1162	1255	.ldsbankcount32,
1163	1256	.no_xnack_support,
1164	1257	}),
...	...	@@ -1168,7 +1261,6 @@ pub const cpu = struct {
1168	1261	.llvm_name = "gfx908",
1169	1262	.features = featureSet(&[_]Feature{
1170	1263	.atomic_fadd_insts,
1171		.code_object_v3,
1172	1264	.dl_insts,
1173	1265	.dot1_insts,
1174	1266	.dot2_insts,
...	...	@@ -1179,6 +1271,7 @@ pub const cpu = struct {
1179	1271	.fma_mix_insts,
1180	1272	.gfx9,
1181	1273	.half_rate_64_ops,
	1274	.image_gather4_d16_bug,
1182	1275	.ldsbankcount32,
1183	1276	.mai_insts,
1184	1277	.mfma_inline_literal_bug,
...	...	@@ -1190,8 +1283,19 @@ pub const cpu = struct {
1190	1283	.name = "gfx909",
1191	1284	.llvm_name = "gfx909",
1192	1285	.features = featureSet(&[_]Feature{
1193		.code_object_v3,
1194	1286	.gfx9,
	1287	.image_gather4_d16_bug,
	1288	.ldsbankcount32,
	1289	.mad_mix_insts,
	1290	.xnack,
	1291	}),
	1292	};
	1293	pub const gfx90c = CpuModel{
	1294	.name = "gfx90c",
	1295	.llvm_name = "gfx90c",
	1296	.features = featureSet(&[_]Feature{
	1297	.gfx9,
	1298	.image_gather4_d16_bug,
1195	1299	.ldsbankcount32,
1196	1300	.mad_mix_insts,
1197	1301	.xnack,
...	...	@@ -1201,7 +1305,6 @@ pub const cpu = struct {
1201	1305	.name = "hainan",
1202	1306	.llvm_name = "hainan",
1203	1307	.features = featureSet(&[_]Feature{
1204		.code_object_v3,
1205	1308	.ldsbankcount32,
1206	1309	.no_xnack_support,
1207	1310	.southern_islands,
...	...	@@ -1211,7 +1314,6 @@ pub const cpu = struct {
1211	1314	.name = "hawaii",
1212	1315	.llvm_name = "hawaii",
1213	1316	.features = featureSet(&[_]Feature{
1214		.code_object_v3,
1215	1317	.fast_fmaf,
1216	1318	.half_rate_64_ops,
1217	1319	.ldsbankcount32,
...	...	@@ -1223,7 +1325,6 @@ pub const cpu = struct {
1223	1325	.name = "iceland",
1224	1326	.llvm_name = "iceland",
1225	1327	.features = featureSet(&[_]Feature{
1226		.code_object_v3,
1227	1328	.ldsbankcount32,
1228	1329	.no_xnack_support,
1229	1330	.sgpr_init_bug,
...	...	@@ -1235,7 +1336,6 @@ pub const cpu = struct {
1235	1336	.name = "kabini",
1236	1337	.llvm_name = "kabini",
1237	1338	.features = featureSet(&[_]Feature{
1238		.code_object_v3,
1239	1339	.ldsbankcount16,
1240	1340	.no_xnack_support,
1241	1341	.sea_islands,
...	...	@@ -1245,7 +1345,6 @@ pub const cpu = struct {
1245	1345	.name = "kaveri",
1246	1346	.llvm_name = "kaveri",
1247	1347	.features = featureSet(&[_]Feature{
1248		.code_object_v3,
1249	1348	.ldsbankcount32,
1250	1349	.no_xnack_support,
1251	1350	.sea_islands,
...	...	@@ -1255,7 +1354,6 @@ pub const cpu = struct {
1255	1354	.name = "mullins",
1256	1355	.llvm_name = "mullins",
1257	1356	.features = featureSet(&[_]Feature{
1258		.code_object_v3,
1259	1357	.ldsbankcount16,
1260	1358	.no_xnack_support,
1261	1359	.sea_islands,
...	...	@@ -1265,7 +1363,6 @@ pub const cpu = struct {
1265	1363	.name = "oland",
1266	1364	.llvm_name = "oland",
1267	1365	.features = featureSet(&[_]Feature{
1268		.code_object_v3,
1269	1366	.ldsbankcount32,
1270	1367	.no_xnack_support,
1271	1368	.southern_islands,
...	...	@@ -1275,7 +1372,6 @@ pub const cpu = struct {
1275	1372	.name = "pitcairn",
1276	1373	.llvm_name = "pitcairn",
1277	1374	.features = featureSet(&[_]Feature{
1278		.code_object_v3,
1279	1375	.ldsbankcount32,
1280	1376	.no_xnack_support,
1281	1377	.southern_islands,
...	...	@@ -1285,7 +1381,6 @@ pub const cpu = struct {
1285	1381	.name = "polaris10",
1286	1382	.llvm_name = "polaris10",
1287	1383	.features = featureSet(&[_]Feature{
1288		.code_object_v3,
1289	1384	.ldsbankcount32,
1290	1385	.no_xnack_support,
1291	1386	.unpacked_d16_vmem,
...	...	@@ -1296,7 +1391,6 @@ pub const cpu = struct {
1296	1391	.name = "polaris11",
1297	1392	.llvm_name = "polaris11",
1298	1393	.features = featureSet(&[_]Feature{
1299		.code_object_v3,
1300	1394	.ldsbankcount32,
1301	1395	.no_xnack_support,
1302	1396	.unpacked_d16_vmem,
...	...	@@ -1307,7 +1401,8 @@ pub const cpu = struct {
1307	1401	.name = "stoney",
1308	1402	.llvm_name = "stoney",
1309	1403	.features = featureSet(&[_]Feature{
1310		.code_object_v3,
	1404	.image_gather4_d16_bug,
	1405	.image_store_d16_bug,
1311	1406	.ldsbankcount16,
1312	1407	.volcanic_islands,
1313	1408	.xnack,
...	...	@@ -1317,7 +1412,6 @@ pub const cpu = struct {
1317	1412	.name = "tahiti",
1318	1413	.llvm_name = "tahiti",
1319	1414	.features = featureSet(&[_]Feature{
1320		.code_object_v3,
1321	1415	.fast_fmaf,
1322	1416	.half_rate_64_ops,
1323	1417	.ldsbankcount32,
...	...	@@ -1329,7 +1423,17 @@ pub const cpu = struct {
1329	1423	.name = "tonga",
1330	1424	.llvm_name = "tonga",
1331	1425	.features = featureSet(&[_]Feature{
1332		.code_object_v3,
	1426	.ldsbankcount32,
	1427	.no_xnack_support,
	1428	.sgpr_init_bug,
	1429	.unpacked_d16_vmem,
	1430	.volcanic_islands,
	1431	}),
	1432	};
	1433	pub const tongapro = CpuModel{
	1434	.name = "tongapro",
	1435	.llvm_name = "tongapro",
	1436	.features = featureSet(&[_]Feature{
1333	1437	.ldsbankcount32,
1334	1438	.no_xnack_support,
1335	1439	.sgpr_init_bug,
...	...	@@ -1341,7 +1445,6 @@ pub const cpu = struct {
1341	1445	.name = "verde",
1342	1446	.llvm_name = "verde",
1343	1447	.features = featureSet(&[_]Feature{
1344		.code_object_v3,
1345	1448	.ldsbankcount32,
1346	1449	.no_xnack_support,
1347	1450	.southern_islands,

lib/std/target/arm.zig+831-677

...	...	@@ -10,10 +10,60 @@ const CpuModel = std.Target.Cpu.Model;
10	10	pub const Feature = enum {
11	11	@"32bit",
12	12	@"8msecext",
	13	a12,
	14	a15,
	15	a17,
	16	a32,
	17	a35,
	18	a5,
	19	a53,
	20	a55,
	21	a57,
	22	a7,
	23	a72,
	24	a73,
	25	a75,
13	26	a76,
	27	a77,
	28	a8,
	29	a9,
14	30	aclass,
15	31	acquire_release,
16	32	aes,
	33	armv2,
	34	armv2a,
	35	armv3,
	36	armv3m,
	37	armv4,
	38	armv4t,
	39	armv5t,
	40	armv5te,
	41	armv5tej,
	42	armv6,
	43	armv6_m,
	44	armv6j,
	45	armv6k,
	46	armv6kz,
	47	armv6s_m,
	48	armv6t2,
	49	armv7_a,
	50	armv7_m,
	51	armv7_r,
	52	armv7e_m,
	53	armv7k,
	54	armv7s,
	55	armv7ve,
	56	armv8_a,
	57	armv8_m_base,
	58	armv8_m_main,
	59	armv8_r,
	60	armv8_1_a,
	61	armv8_1_m_main,
	62	armv8_2_a,
	63	armv8_3_a,
	64	armv8_4_a,
	65	armv8_5_a,
	66	armv8_6_a,
17	67	avoid_movs_shop,
18	68	avoid_partial_cpsr,
19	69	bf16,
...	...	@@ -27,6 +77,8 @@ pub const Feature = enum {
27	77	cdecp6,
28	78	cdecp7,
29	79	cheap_predicable_cpsr,
	80	cortex_a78,
	81	cortex_x1,
30	82	crc,
31	83	crypto,
32	84	d32,
...	...	@@ -39,13 +91,13 @@ pub const Feature = enum {
39	91	execute_only,
40	92	expand_fp_mlx,
41	93	exynos,
42		fp16,
43		fp16fml,
44		fp64,
45	94	fp_armv8,
46	95	fp_armv8d16,
47	96	fp_armv8d16sp,
48	97	fp_armv8sp,
	98	fp16,
	99	fp16fml,
	100	fp64,
49	101	fpao,
50	102	fpregs,
51	103	fpregs16,
...	...	@@ -53,30 +105,13 @@ pub const Feature = enum {
53	105	fullfp16,
54	106	fuse_aes,
55	107	fuse_literals,
56		has_v4t,
57		has_v5t,
58		has_v5te,
59		has_v6,
60		has_v6k,
61		has_v6m,
62		has_v6t2,
63		has_v7,
64		has_v7clrex,
65		has_v8_1a,
66		has_v8_1m_main,
67		has_v8_2a,
68		has_v8_3a,
69		has_v8_4a,
70		has_v8_5a,
71		has_v8_6a,
72		has_v8,
73		has_v8m,
74		has_v8m_main,
75	108	hwdiv,
76	109	hwdiv_arm,
77		i8mm,
	110	_i8mm,
78	111	iwmmxt,
79	112	iwmmxt2,
	113	krait,
	114	kryo,
80	115	lob,
81	116	long_calls,
82	117	loop_align,
...	...	@@ -93,6 +128,7 @@ pub const Feature = enum {
93	128	neon,
94	129	neon_fpmovs,
95	130	neonfp,
	131	neoverse_v1,
96	132	no_branch_predictor,
97	133	no_movt,
98	134	no_neg_immediates,
...	...	@@ -103,6 +139,9 @@ pub const Feature = enum {
103	139	prefer_vmovsr,
104	140	prof_unpr,
105	141	r4,
	142	r5,
	143	r52,
	144	r7,
106	145	ras,
107	146	rclass,
108	147	read_tp_hard,
...	...	@@ -121,37 +160,20 @@ pub const Feature = enum {
121	160	splat_vfp_neon,
122	161	strict_align,
123	162	swift,
124		thumb2,
125	163	thumb_mode,
	164	thumb2,
126	165	trustzone,
127	166	use_misched,
128		v2,
129		v2a,
130		v3,
131		v3m,
132		v4,
133	167	v4t,
134	168	v5t,
135	169	v5te,
136		v5tej,
137	170	v6,
138		v6j,
139	171	v6k,
140		v6kz,
141	172	v6m,
142		v6sm,
143	173	v6t2,
144		v7a,
145		v7em,
146		v7k,
147		v7m,
148		v7r,
149		v7s,
150		v7ve,
151		v8a,
152		v8m,
153		v8m_main,
154		v8r,
	174	v7,
	175	v7clrex,
	176	v8,
155	177	v8_1a,
156	178	v8_1m_main,
157	179	v8_2a,
...	...	@@ -159,6 +181,8 @@ pub const Feature = enum {
159	181	v8_4a,
160	182	v8_5a,
161	183	v8_6a,
	184	v8m,
	185	v8m_main,
162	186	vfp2,
163	187	vfp2sp,
164	188	vfp3,
...	...	@@ -195,11 +219,91 @@ pub const all_features = blk: {
195	219	.description = "Enable support for ARMv8-M Security Extensions",
196	220	.dependencies = featureSet(&[_]Feature{}),
197	221	};
	222	result[@enumToInt(Feature.a12)] = .{
	223	.llvm_name = "a12",
	224	.description = "Cortex-A12 ARM processors",
	225	.dependencies = featureSet(&[_]Feature{}),
	226	};
	227	result[@enumToInt(Feature.a15)] = .{
	228	.llvm_name = "a15",
	229	.description = "Cortex-A15 ARM processors",
	230	.dependencies = featureSet(&[_]Feature{}),
	231	};
	232	result[@enumToInt(Feature.a17)] = .{
	233	.llvm_name = "a17",
	234	.description = "Cortex-A17 ARM processors",
	235	.dependencies = featureSet(&[_]Feature{}),
	236	};
	237	result[@enumToInt(Feature.a32)] = .{
	238	.llvm_name = "a32",
	239	.description = "Cortex-A32 ARM processors",
	240	.dependencies = featureSet(&[_]Feature{}),
	241	};
	242	result[@enumToInt(Feature.a35)] = .{
	243	.llvm_name = "a35",
	244	.description = "Cortex-A35 ARM processors",
	245	.dependencies = featureSet(&[_]Feature{}),
	246	};
	247	result[@enumToInt(Feature.a5)] = .{
	248	.llvm_name = "a5",
	249	.description = "Cortex-A5 ARM processors",
	250	.dependencies = featureSet(&[_]Feature{}),
	251	};
	252	result[@enumToInt(Feature.a53)] = .{
	253	.llvm_name = "a53",
	254	.description = "Cortex-A53 ARM processors",
	255	.dependencies = featureSet(&[_]Feature{}),
	256	};
	257	result[@enumToInt(Feature.a55)] = .{
	258	.llvm_name = "a55",
	259	.description = "Cortex-A55 ARM processors",
	260	.dependencies = featureSet(&[_]Feature{}),
	261	};
	262	result[@enumToInt(Feature.a57)] = .{
	263	.llvm_name = "a57",
	264	.description = "Cortex-A57 ARM processors",
	265	.dependencies = featureSet(&[_]Feature{}),
	266	};
	267	result[@enumToInt(Feature.a7)] = .{
	268	.llvm_name = "a7",
	269	.description = "Cortex-A7 ARM processors",
	270	.dependencies = featureSet(&[_]Feature{}),
	271	};
	272	result[@enumToInt(Feature.a72)] = .{
	273	.llvm_name = "a72",
	274	.description = "Cortex-A72 ARM processors",
	275	.dependencies = featureSet(&[_]Feature{}),
	276	};
	277	result[@enumToInt(Feature.a73)] = .{
	278	.llvm_name = "a73",
	279	.description = "Cortex-A73 ARM processors",
	280	.dependencies = featureSet(&[_]Feature{}),
	281	};
	282	result[@enumToInt(Feature.a75)] = .{
	283	.llvm_name = "a75",
	284	.description = "Cortex-A75 ARM processors",
	285	.dependencies = featureSet(&[_]Feature{}),
	286	};
198	287	result[@enumToInt(Feature.a76)] = .{
199	288	.llvm_name = "a76",
200	289	.description = "Cortex-A76 ARM processors",
201	290	.dependencies = featureSet(&[_]Feature{}),
202	291	};
	292	result[@enumToInt(Feature.a77)] = .{
	293	.llvm_name = "a77",
	294	.description = "Cortex-A77 ARM processors",
	295	.dependencies = featureSet(&[_]Feature{}),
	296	};
	297	result[@enumToInt(Feature.a8)] = .{
	298	.llvm_name = "a8",
	299	.description = "Cortex-A8 ARM processors",
	300	.dependencies = featureSet(&[_]Feature{}),
	301	};
	302	result[@enumToInt(Feature.a9)] = .{
	303	.llvm_name = "a9",
	304	.description = "Cortex-A9 ARM processors",
	305	.dependencies = featureSet(&[_]Feature{}),
	306	};
203	307	result[@enumToInt(Feature.aclass)] = .{
204	308	.llvm_name = "aclass",
205	309	.description = "Is application profile ('A' series)",
...	...	@@ -217,6 +321,387 @@ pub const all_features = blk: {
217	321	.neon,
218	322	}),
219	323	};
	324	result[@enumToInt(Feature.armv2)] = .{
	325	.llvm_name = "armv2",
	326	.description = "ARMv2 architecture",
	327	.dependencies = featureSet(&[_]Feature{}),
	328	};
	329	result[@enumToInt(Feature.armv2a)] = .{
	330	.llvm_name = "armv2a",
	331	.description = "ARMv2a architecture",
	332	.dependencies = featureSet(&[_]Feature{}),
	333	};
	334	result[@enumToInt(Feature.armv3)] = .{
	335	.llvm_name = "armv3",
	336	.description = "ARMv3 architecture",
	337	.dependencies = featureSet(&[_]Feature{}),
	338	};
	339	result[@enumToInt(Feature.armv3m)] = .{
	340	.llvm_name = "armv3m",
	341	.description = "ARMv3m architecture",
	342	.dependencies = featureSet(&[_]Feature{}),
	343	};
	344	result[@enumToInt(Feature.armv4)] = .{
	345	.llvm_name = "armv4",
	346	.description = "ARMv4 architecture",
	347	.dependencies = featureSet(&[_]Feature{}),
	348	};
	349	result[@enumToInt(Feature.armv4t)] = .{
	350	.llvm_name = "armv4t",
	351	.description = "ARMv4t architecture",
	352	.dependencies = featureSet(&[_]Feature{
	353	.v4t,
	354	}),
	355	};
	356	result[@enumToInt(Feature.armv5t)] = .{
	357	.llvm_name = "armv5t",
	358	.description = "ARMv5t architecture",
	359	.dependencies = featureSet(&[_]Feature{
	360	.v5t,
	361	}),
	362	};
	363	result[@enumToInt(Feature.armv5te)] = .{
	364	.llvm_name = "armv5te",
	365	.description = "ARMv5te architecture",
	366	.dependencies = featureSet(&[_]Feature{
	367	.v5te,
	368	}),
	369	};
	370	result[@enumToInt(Feature.armv5tej)] = .{
	371	.llvm_name = "armv5tej",
	372	.description = "ARMv5tej architecture",
	373	.dependencies = featureSet(&[_]Feature{
	374	.v5te,
	375	}),
	376	};
	377	result[@enumToInt(Feature.armv6)] = .{
	378	.llvm_name = "armv6",
	379	.description = "ARMv6 architecture",
	380	.dependencies = featureSet(&[_]Feature{
	381	.dsp,
	382	.v6,
	383	}),
	384	};
	385	result[@enumToInt(Feature.armv6_m)] = .{
	386	.llvm_name = "armv6-m",
	387	.description = "ARMv6m architecture",
	388	.dependencies = featureSet(&[_]Feature{
	389	.db,
	390	.mclass,
	391	.noarm,
	392	.strict_align,
	393	.thumb_mode,
	394	.v6m,
	395	}),
	396	};
	397	result[@enumToInt(Feature.armv6j)] = .{
	398	.llvm_name = "armv6j",
	399	.description = "ARMv7a architecture",
	400	.dependencies = featureSet(&[_]Feature{
	401	.armv6,
	402	}),
	403	};
	404	result[@enumToInt(Feature.armv6k)] = .{
	405	.llvm_name = "armv6k",
	406	.description = "ARMv6k architecture",
	407	.dependencies = featureSet(&[_]Feature{
	408	.v6k,
	409	}),
	410	};
	411	result[@enumToInt(Feature.armv6kz)] = .{
	412	.llvm_name = "armv6kz",
	413	.description = "ARMv6kz architecture",
	414	.dependencies = featureSet(&[_]Feature{
	415	.trustzone,
	416	.v6k,
	417	}),
	418	};
	419	result[@enumToInt(Feature.armv6s_m)] = .{
	420	.llvm_name = "armv6s-m",
	421	.description = "ARMv6sm architecture",
	422	.dependencies = featureSet(&[_]Feature{
	423	.db,
	424	.mclass,
	425	.noarm,
	426	.strict_align,
	427	.thumb_mode,
	428	.v6m,
	429	}),
	430	};
	431	result[@enumToInt(Feature.armv6t2)] = .{
	432	.llvm_name = "armv6t2",
	433	.description = "ARMv6t2 architecture",
	434	.dependencies = featureSet(&[_]Feature{
	435	.dsp,
	436	.v6t2,
	437	}),
	438	};
	439	result[@enumToInt(Feature.armv7_a)] = .{
	440	.llvm_name = "armv7-a",
	441	.description = "ARMv7a architecture",
	442	.dependencies = featureSet(&[_]Feature{
	443	.aclass,
	444	.db,
	445	.dsp,
	446	.neon,
	447	.v7,
	448	}),
	449	};
	450	result[@enumToInt(Feature.armv7_m)] = .{
	451	.llvm_name = "armv7-m",
	452	.description = "ARMv7m architecture",
	453	.dependencies = featureSet(&[_]Feature{
	454	.db,
	455	.hwdiv,
	456	.mclass,
	457	.noarm,
	458	.thumb_mode,
	459	.thumb2,
	460	.v7,
	461	}),
	462	};
	463	result[@enumToInt(Feature.armv7_r)] = .{
	464	.llvm_name = "armv7-r",
	465	.description = "ARMv7r architecture",
	466	.dependencies = featureSet(&[_]Feature{
	467	.db,
	468	.dsp,
	469	.hwdiv,
	470	.rclass,
	471	.v7,
	472	}),
	473	};
	474	result[@enumToInt(Feature.armv7e_m)] = .{
	475	.llvm_name = "armv7e-m",
	476	.description = "ARMv7em architecture",
	477	.dependencies = featureSet(&[_]Feature{
	478	.db,
	479	.dsp,
	480	.hwdiv,
	481	.mclass,
	482	.noarm,
	483	.thumb_mode,
	484	.thumb2,
	485	.v7,
	486	}),
	487	};
	488	result[@enumToInt(Feature.armv7k)] = .{
	489	.llvm_name = "armv7k",
	490	.description = "ARMv7a architecture",
	491	.dependencies = featureSet(&[_]Feature{
	492	.armv7_a,
	493	}),
	494	};
	495	result[@enumToInt(Feature.armv7s)] = .{
	496	.llvm_name = "armv7s",
	497	.description = "ARMv7a architecture",
	498	.dependencies = featureSet(&[_]Feature{
	499	.armv7_a,
	500	}),
	501	};
	502	result[@enumToInt(Feature.armv7ve)] = .{
	503	.llvm_name = "armv7ve",
	504	.description = "ARMv7ve architecture",
	505	.dependencies = featureSet(&[_]Feature{
	506	.aclass,
	507	.db,
	508	.dsp,
	509	.mp,
	510	.neon,
	511	.trustzone,
	512	.v7,
	513	.virtualization,
	514	}),
	515	};
	516	result[@enumToInt(Feature.armv8_a)] = .{
	517	.llvm_name = "armv8-a",
	518	.description = "ARMv8a architecture",
	519	.dependencies = featureSet(&[_]Feature{
	520	.aclass,
	521	.crc,
	522	.crypto,
	523	.db,
	524	.dsp,
	525	.fp_armv8,
	526	.mp,
	527	.neon,
	528	.trustzone,
	529	.v8,
	530	.virtualization,
	531	}),
	532	};
	533	result[@enumToInt(Feature.armv8_m_base)] = .{
	534	.llvm_name = "armv8-m.base",
	535	.description = "ARMv8mBaseline architecture",
	536	.dependencies = featureSet(&[_]Feature{
	537	.@"8msecext",
	538	.acquire_release,
	539	.db,
	540	.hwdiv,
	541	.mclass,
	542	.noarm,
	543	.strict_align,
	544	.thumb_mode,
	545	.v7clrex,
	546	.v8m,
	547	}),
	548	};
	549	result[@enumToInt(Feature.armv8_m_main)] = .{
	550	.llvm_name = "armv8-m.main",
	551	.description = "ARMv8mMainline architecture",
	552	.dependencies = featureSet(&[_]Feature{
	553	.@"8msecext",
	554	.acquire_release,
	555	.db,
	556	.hwdiv,
	557	.mclass,
	558	.noarm,
	559	.thumb_mode,
	560	.v8m_main,
	561	}),
	562	};
	563	result[@enumToInt(Feature.armv8_r)] = .{
	564	.llvm_name = "armv8-r",
	565	.description = "ARMv8r architecture",
	566	.dependencies = featureSet(&[_]Feature{
	567	.crc,
	568	.db,
	569	.dfb,
	570	.dsp,
	571	.fp_armv8,
	572	.mp,
	573	.neon,
	574	.rclass,
	575	.v8,
	576	.virtualization,
	577	}),
	578	};
	579	result[@enumToInt(Feature.armv8_1_a)] = .{
	580	.llvm_name = "armv8.1-a",
	581	.description = "ARMv81a architecture",
	582	.dependencies = featureSet(&[_]Feature{
	583	.aclass,
	584	.crc,
	585	.crypto,
	586	.db,
	587	.dsp,
	588	.fp_armv8,
	589	.mp,
	590	.neon,
	591	.trustzone,
	592	.v8_1a,
	593	.virtualization,
	594	}),
	595	};
	596	result[@enumToInt(Feature.armv8_1_m_main)] = .{
	597	.llvm_name = "armv8.1-m.main",
	598	.description = "ARMv81mMainline architecture",
	599	.dependencies = featureSet(&[_]Feature{
	600	.@"8msecext",
	601	.acquire_release,
	602	.db,
	603	.hwdiv,
	604	.lob,
	605	.mclass,
	606	.noarm,
	607	.ras,
	608	.thumb_mode,
	609	.v8_1m_main,
	610	}),
	611	};
	612	result[@enumToInt(Feature.armv8_2_a)] = .{
	613	.llvm_name = "armv8.2-a",
	614	.description = "ARMv82a architecture",
	615	.dependencies = featureSet(&[_]Feature{
	616	.aclass,
	617	.crc,
	618	.crypto,
	619	.db,
	620	.dsp,
	621	.fp_armv8,
	622	.mp,
	623	.neon,
	624	.ras,
	625	.trustzone,
	626	.v8_2a,
	627	.virtualization,
	628	}),
	629	};
	630	result[@enumToInt(Feature.armv8_3_a)] = .{
	631	.llvm_name = "armv8.3-a",
	632	.description = "ARMv83a architecture",
	633	.dependencies = featureSet(&[_]Feature{
	634	.aclass,
	635	.crc,
	636	.crypto,
	637	.db,
	638	.dsp,
	639	.fp_armv8,
	640	.mp,
	641	.neon,
	642	.ras,
	643	.trustzone,
	644	.v8_3a,
	645	.virtualization,
	646	}),
	647	};
	648	result[@enumToInt(Feature.armv8_4_a)] = .{
	649	.llvm_name = "armv8.4-a",
	650	.description = "ARMv84a architecture",
	651	.dependencies = featureSet(&[_]Feature{
	652	.aclass,
	653	.crc,
	654	.crypto,
	655	.db,
	656	.dotprod,
	657	.dsp,
	658	.fp_armv8,
	659	.mp,
	660	.neon,
	661	.ras,
	662	.trustzone,
	663	.v8_4a,
	664	.virtualization,
	665	}),
	666	};
	667	result[@enumToInt(Feature.armv8_5_a)] = .{
	668	.llvm_name = "armv8.5-a",
	669	.description = "ARMv85a architecture",
	670	.dependencies = featureSet(&[_]Feature{
	671	.aclass,
	672	.crc,
	673	.crypto,
	674	.db,
	675	.dotprod,
	676	.dsp,
	677	.fp_armv8,
	678	.mp,
	679	.neon,
	680	.ras,
	681	.trustzone,
	682	.v8_5a,
	683	.virtualization,
	684	}),
	685	};
	686	result[@enumToInt(Feature.armv8_6_a)] = .{
	687	.llvm_name = "armv8.6-a",
	688	.description = "ARMv86a architecture",
	689	.dependencies = featureSet(&[_]Feature{
	690	.aclass,
	691	.crc,
	692	.crypto,
	693	.db,
	694	.dotprod,
	695	.dsp,
	696	.fp_armv8,
	697	.mp,
	698	.neon,
	699	.ras,
	700	.trustzone,
	701	.v8_6a,
	702	.virtualization,
	703	}),
	704	};
220	705	result[@enumToInt(Feature.avoid_movs_shop)] = .{
221	706	.llvm_name = "avoid-movs-shop",
222	707	.description = "Avoid movs instructions with shifter operand",
...	...	@@ -302,6 +787,16 @@ pub const all_features = blk: {
302	787	.description = "Disable +1 predication cost for instructions updating CPSR",
303	788	.dependencies = featureSet(&[_]Feature{}),
304	789	};
	790	result[@enumToInt(Feature.cortex_a78)] = .{
	791	.llvm_name = "cortex-a78",
	792	.description = "Cortex-A78 ARM processors",
	793	.dependencies = featureSet(&[_]Feature{}),
	794	};
	795	result[@enumToInt(Feature.cortex_x1)] = .{
	796	.llvm_name = "cortex-x1",
	797	.description = "Cortex-X1 ARM processors",
	798	.dependencies = featureSet(&[_]Feature{}),
	799	};
305	800	result[@enumToInt(Feature.crc)] = .{
306	801	.llvm_name = "crc",
307	802	.description = "Enable support for CRC instructions",
...	...	@@ -386,25 +881,6 @@ pub const all_features = blk: {
386	881	.zcz,
387	882	}),
388	883	};
389		result[@enumToInt(Feature.fp16)] = .{
390		.llvm_name = "fp16",
391		.description = "Enable half-precision floating point",
392		.dependencies = featureSet(&[_]Feature{}),
393		};
394		result[@enumToInt(Feature.fp16fml)] = .{
395		.llvm_name = "fp16fml",
396		.description = "Enable full half-precision floating point fml instructions",
397		.dependencies = featureSet(&[_]Feature{
398		.fullfp16,
399		}),
400		};
401		result[@enumToInt(Feature.fp64)] = .{
402		.llvm_name = "fp64",
403		.description = "Floating point unit supports double precision",
404		.dependencies = featureSet(&[_]Feature{
405		.fpregs64,
406		}),
407		};
408	884	result[@enumToInt(Feature.fp_armv8)] = .{
409	885	.llvm_name = "fp-armv8",
410	886	.description = "Enable ARMv8 FP",
...	...	@@ -439,186 +915,67 @@ pub const all_features = blk: {
439	915	.vfp4sp,
440	916	}),
441	917	};
442		result[@enumToInt(Feature.fpao)] = .{
443		.llvm_name = "fpao",
444		.description = "Enable fast computation of positive address offsets",
445		.dependencies = featureSet(&[_]Feature{}),
446		};
447		result[@enumToInt(Feature.fpregs)] = .{
448		.llvm_name = "fpregs",
449		.description = "Enable FP registers",
450		.dependencies = featureSet(&[_]Feature{}),
451		};
452		result[@enumToInt(Feature.fpregs16)] = .{
453		.llvm_name = "fpregs16",
454		.description = "Enable 16-bit FP registers",
455		.dependencies = featureSet(&[_]Feature{
456		.fpregs,
457		}),
458		};
459		result[@enumToInt(Feature.fpregs64)] = .{
460		.llvm_name = "fpregs64",
461		.description = "Enable 64-bit FP registers",
462		.dependencies = featureSet(&[_]Feature{
463		.fpregs,
464		}),
465		};
466		result[@enumToInt(Feature.fullfp16)] = .{
467		.llvm_name = "fullfp16",
468		.description = "Enable full half-precision floating point",
469		.dependencies = featureSet(&[_]Feature{
470		.fp_armv8d16sp,
471		.fpregs16,
472		}),
473		};
474		result[@enumToInt(Feature.fuse_aes)] = .{
475		.llvm_name = "fuse-aes",
476		.description = "CPU fuses AES crypto operations",
477		.dependencies = featureSet(&[_]Feature{}),
478		};
479		result[@enumToInt(Feature.fuse_literals)] = .{
480		.llvm_name = "fuse-literals",
481		.description = "CPU fuses literal generation operations",
482		.dependencies = featureSet(&[_]Feature{}),
483		};
484		result[@enumToInt(Feature.has_v4t)] = .{
485		.llvm_name = "v4t",
486		.description = "Support ARM v4T instructions",
487		.dependencies = featureSet(&[_]Feature{}),
488		};
489		result[@enumToInt(Feature.has_v5t)] = .{
490		.llvm_name = "v5t",
491		.description = "Support ARM v5T instructions",
492		.dependencies = featureSet(&[_]Feature{
493		.has_v4t,
494		}),
495		};
496		result[@enumToInt(Feature.has_v5te)] = .{
497		.llvm_name = "v5te",
498		.description = "Support ARM v5TE, v5TEj, and v5TExp instructions",
499		.dependencies = featureSet(&[_]Feature{
500		.has_v5t,
501		}),
502		};
503		result[@enumToInt(Feature.has_v6)] = .{
504		.llvm_name = "v6",
505		.description = "Support ARM v6 instructions",
506		.dependencies = featureSet(&[_]Feature{
507		.has_v5te,
508		}),
509		};
510		result[@enumToInt(Feature.has_v6k)] = .{
511		.llvm_name = "v6k",
512		.description = "Support ARM v6k instructions",
513		.dependencies = featureSet(&[_]Feature{
514		.has_v6,
515		}),
516		};
517		result[@enumToInt(Feature.has_v6m)] = .{
518		.llvm_name = "v6m",
519		.description = "Support ARM v6M instructions",
520		.dependencies = featureSet(&[_]Feature{
521		.has_v6,
522		}),
523		};
524		result[@enumToInt(Feature.has_v6t2)] = .{
525		.llvm_name = "v6t2",
526		.description = "Support ARM v6t2 instructions",
527		.dependencies = featureSet(&[_]Feature{
528		.thumb2,
529		.has_v6k,
530		.has_v8m,
531		}),
532		};
533		result[@enumToInt(Feature.has_v7)] = .{
534		.llvm_name = "v7",
535		.description = "Support ARM v7 instructions",
536		.dependencies = featureSet(&[_]Feature{
537		.perfmon,
538		.has_v6t2,
539		.has_v7clrex,
540		}),
541		};
542		result[@enumToInt(Feature.has_v7clrex)] = .{
543		.llvm_name = "v7clrex",
544		.description = "Has v7 clrex instruction",
	918	result[@enumToInt(Feature.fp16)] = .{
	919	.llvm_name = "fp16",
	920	.description = "Enable half-precision floating point",
545	921	.dependencies = featureSet(&[_]Feature{}),
546	922	};
547		result[@enumToInt(Feature.has_v8)] = .{
548		.llvm_name = "v8",
549		.description = "Support ARM v8 instructions",
550		.dependencies = featureSet(&[_]Feature{
551		.acquire_release,
552		.has_v7,
553		}),
554		};
555		result[@enumToInt(Feature.has_v8_1a)] = .{
556		.llvm_name = "v8.1a",
557		.description = "Support ARM v8.1a instructions",
558		.dependencies = featureSet(&[_]Feature{
559		.has_v8,
560		}),
561		};
562		result[@enumToInt(Feature.has_v8_1m_main)] = .{
563		.llvm_name = "v8.1m.main",
564		.description = "Support ARM v8-1M Mainline instructions",
565		.dependencies = featureSet(&[_]Feature{
566		.has_v8m_main,
567		}),
568		};
569		result[@enumToInt(Feature.has_v8_2a)] = .{
570		.llvm_name = "v8.2a",
571		.description = "Support ARM v8.2a instructions",
	923	result[@enumToInt(Feature.fp16fml)] = .{
	924	.llvm_name = "fp16fml",
	925	.description = "Enable full half-precision floating point fml instructions",
572	926	.dependencies = featureSet(&[_]Feature{
573		.has_v8_1a,
	927	.fullfp16,
574	928	}),
575	929	};
576		result[@enumToInt(Feature.has_v8_3a)] = .{
577		.llvm_name = "v8.3a",
578		.description = "Support ARM v8.3a instructions",
	930	result[@enumToInt(Feature.fp64)] = .{
	931	.llvm_name = "fp64",
	932	.description = "Floating point unit supports double precision",
579	933	.dependencies = featureSet(&[_]Feature{
580		.has_v8_2a,
	934	.fpregs64,
581	935	}),
582	936	};
583		result[@enumToInt(Feature.has_v8_4a)] = .{
584		.llvm_name = "v8.4a",
585		.description = "Support ARM v8.4a instructions",
586		.dependencies = featureSet(&[_]Feature{
587		.dotprod,
588		.has_v8_3a,
589		}),
	937	result[@enumToInt(Feature.fpao)] = .{
	938	.llvm_name = "fpao",
	939	.description = "Enable fast computation of positive address offsets",
	940	.dependencies = featureSet(&[_]Feature{}),
590	941	};
591		result[@enumToInt(Feature.has_v8_5a)] = .{
592		.llvm_name = "v8.5a",
593		.description = "Support ARM v8.5a instructions",
594		.dependencies = featureSet(&[_]Feature{
595		.sb,
596		.has_v8_4a,
597		}),
	942	result[@enumToInt(Feature.fpregs)] = .{
	943	.llvm_name = "fpregs",
	944	.description = "Enable FP registers",
	945	.dependencies = featureSet(&[_]Feature{}),
598	946	};
599		result[@enumToInt(Feature.has_v8_6a)] = .{
600		.llvm_name = "v8.6a",
601		.description = "Support ARM v8.6a instructions",
	947	result[@enumToInt(Feature.fpregs16)] = .{
	948	.llvm_name = "fpregs16",
	949	.description = "Enable 16-bit FP registers",
602	950	.dependencies = featureSet(&[_]Feature{
603		.bf16,
604		.i8mm,
605		.has_v8_5a,
	951	.fpregs,
606	952	}),
607	953	};
608		result[@enumToInt(Feature.has_v8m)] = .{
609		.llvm_name = "v8m",
610		.description = "Support ARM v8M Baseline instructions",
	954	result[@enumToInt(Feature.fpregs64)] = .{
	955	.llvm_name = "fpregs64",
	956	.description = "Enable 64-bit FP registers",
611	957	.dependencies = featureSet(&[_]Feature{
612		.has_v6m,
	958	.fpregs,
613	959	}),
614	960	};
615		result[@enumToInt(Feature.has_v8m_main)] = .{
616		.llvm_name = "v8m.main",
617		.description = "Support ARM v8M Mainline instructions",
	961	result[@enumToInt(Feature.fullfp16)] = .{
	962	.llvm_name = "fullfp16",
	963	.description = "Enable full half-precision floating point",
618	964	.dependencies = featureSet(&[_]Feature{
619		.has_v7,
	965	.fp_armv8d16sp,
	966	.fpregs16,
620	967	}),
621	968	};
	969	result[@enumToInt(Feature.fuse_aes)] = .{
	970	.llvm_name = "fuse-aes",
	971	.description = "CPU fuses AES crypto operations",
	972	.dependencies = featureSet(&[_]Feature{}),
	973	};
	974	result[@enumToInt(Feature.fuse_literals)] = .{
	975	.llvm_name = "fuse-literals",
	976	.description = "CPU fuses literal generation operations",
	977	.dependencies = featureSet(&[_]Feature{}),
	978	};
622	979	result[@enumToInt(Feature.hwdiv)] = .{
623	980	.llvm_name = "hwdiv",
624	981	.description = "Enable divide instructions in Thumb",
...	...	@@ -629,7 +986,7 @@ pub const all_features = blk: {
629	986	.description = "Enable divide instructions in ARM mode",
630	987	.dependencies = featureSet(&[_]Feature{}),
631	988	};
632		result[@enumToInt(Feature.i8mm)] = .{
	989	result[@enumToInt(Feature._i8mm)] = .{
633	990	.llvm_name = "i8mm",
634	991	.description = "Enable Matrix Multiply Int8 Extension",
635	992	.dependencies = featureSet(&[_]Feature{
...	...	@@ -640,16 +997,26 @@ pub const all_features = blk: {
640	997	.llvm_name = "iwmmxt",
641	998	.description = "ARMv5te architecture",
642	999	.dependencies = featureSet(&[_]Feature{
643		.has_v5te,
	1000	.armv5te,
644	1001	}),
645	1002	};
646	1003	result[@enumToInt(Feature.iwmmxt2)] = .{
647	1004	.llvm_name = "iwmmxt2",
648	1005	.description = "ARMv5te architecture",
649	1006	.dependencies = featureSet(&[_]Feature{
650		.has_v5te,
	1007	.armv5te,
651	1008	}),
652	1009	};
	1010	result[@enumToInt(Feature.krait)] = .{
	1011	.llvm_name = "krait",
	1012	.description = "Qualcomm Krait processors",
	1013	.dependencies = featureSet(&[_]Feature{}),
	1014	};
	1015	result[@enumToInt(Feature.kryo)] = .{
	1016	.llvm_name = "kryo",
	1017	.description = "Qualcomm Kryo processors",
	1018	.dependencies = featureSet(&[_]Feature{}),
	1019	};
653	1020	result[@enumToInt(Feature.lob)] = .{
654	1021	.llvm_name = "lob",
655	1022	.description = "Enable Low Overhead Branch extensions",
...	...	@@ -692,7 +1059,7 @@ pub const all_features = blk: {
692	1059	.dsp,
693	1060	.fpregs16,
694	1061	.fpregs64,
695		.has_v8_1m_main,
	1062	.v8_1m_main,
696	1063	}),
697	1064	};
698	1065	result[@enumToInt(Feature.mve_fp)] = .{
...	...	@@ -741,6 +1108,11 @@ pub const all_features = blk: {
741	1108	.description = "Use NEON for single precision FP",
742	1109	.dependencies = featureSet(&[_]Feature{}),
743	1110	};
	1111	result[@enumToInt(Feature.neoverse_v1)] = .{
	1112	.llvm_name = "neoverse-v1",
	1113	.description = "Neoverse-V1 ARM processors",
	1114	.dependencies = featureSet(&[_]Feature{}),
	1115	};
744	1116	result[@enumToInt(Feature.no_branch_predictor)] = .{
745	1117	.llvm_name = "no-branch-predictor",
746	1118	.description = "Has no branch predictor",
...	...	@@ -791,6 +1163,21 @@ pub const all_features = blk: {
791	1163	.description = "Cortex-R4 ARM processors",
792	1164	.dependencies = featureSet(&[_]Feature{}),
793	1165	};
	1166	result[@enumToInt(Feature.r5)] = .{
	1167	.llvm_name = "r5",
	1168	.description = "Cortex-R5 ARM processors",
	1169	.dependencies = featureSet(&[_]Feature{}),
	1170	};
	1171	result[@enumToInt(Feature.r52)] = .{
	1172	.llvm_name = "r52",
	1173	.description = "Cortex-R52 ARM processors",
	1174	.dependencies = featureSet(&[_]Feature{}),
	1175	};
	1176	result[@enumToInt(Feature.r7)] = .{
	1177	.llvm_name = "r7",
	1178	.description = "Cortex-R7 ARM processors",
	1179	.dependencies = featureSet(&[_]Feature{}),
	1180	};
794	1181	result[@enumToInt(Feature.ras)] = .{
795	1182	.llvm_name = "ras",
796	1183	.description = "Enable Reliability, Availability and Serviceability extensions",
...	...	@@ -885,16 +1272,16 @@ pub const all_features = blk: {
885	1272	.description = "Swift ARM processors",
886	1273	.dependencies = featureSet(&[_]Feature{}),
887	1274	};
888		result[@enumToInt(Feature.thumb2)] = .{
889		.llvm_name = "thumb2",
890		.description = "Enable Thumb2 instructions",
891		.dependencies = featureSet(&[_]Feature{}),
892		};
893	1275	result[@enumToInt(Feature.thumb_mode)] = .{
894	1276	.llvm_name = "thumb-mode",
895	1277	.description = "Thumb mode",
896	1278	.dependencies = featureSet(&[_]Feature{}),
897	1279	};
	1280	result[@enumToInt(Feature.thumb2)] = .{
	1281	.llvm_name = "thumb2",
	1282	.description = "Enable Thumb2 instructions",
	1283	.dependencies = featureSet(&[_]Feature{}),
	1284	};
898	1285	result[@enumToInt(Feature.trustzone)] = .{
899	1286	.llvm_name = "trustzone",
900	1287	.description = "Enable support for TrustZone security extensions",
...	...	@@ -905,399 +1292,142 @@ pub const all_features = blk: {
905	1292	.description = "Use the MachineScheduler",
906	1293	.dependencies = featureSet(&[_]Feature{}),
907	1294	};
908		result[@enumToInt(Feature.v2)] = .{
909		.llvm_name = "armv2",
910		.description = "ARMv2 architecture",
911		.dependencies = featureSet(&[_]Feature{
912		.strict_align,
913		}),
914		};
915		result[@enumToInt(Feature.v2a)] = .{
916		.llvm_name = "armv2a",
917		.description = "ARMv2a architecture",
918		.dependencies = featureSet(&[_]Feature{
919		.strict_align,
920		}),
921		};
922		result[@enumToInt(Feature.v3)] = .{
923		.llvm_name = "armv3",
924		.description = "ARMv3 architecture",
925		.dependencies = featureSet(&[_]Feature{
926		.strict_align,
927		}),
928		};
929		result[@enumToInt(Feature.v3m)] = .{
930		.llvm_name = "armv3m",
931		.description = "ARMv3m architecture",
932		.dependencies = featureSet(&[_]Feature{
933		.strict_align,
934		}),
935		};
936		result[@enumToInt(Feature.v4)] = .{
937		.llvm_name = "armv4",
938		.description = "ARMv4 architecture",
939		.dependencies = featureSet(&[_]Feature{
940		.strict_align,
941		}),
942		};
943	1295	result[@enumToInt(Feature.v4t)] = .{
944		.llvm_name = "armv4t",
945		.description = "ARMv4t architecture",
946		.dependencies = featureSet(&[_]Feature{
947		.strict_align,
948		.has_v4t,
949		}),
	1296	.llvm_name = "v4t",
	1297	.description = "Support ARM v4T instructions",
	1298	.dependencies = featureSet(&[_]Feature{}),
950	1299	};
951	1300	result[@enumToInt(Feature.v5t)] = .{
952		.llvm_name = "armv5t",
953		.description = "ARMv5t architecture",
	1301	.llvm_name = "v5t",
	1302	.description = "Support ARM v5T instructions",
954	1303	.dependencies = featureSet(&[_]Feature{
955		.strict_align,
956		.has_v5t,
	1304	.v4t,
957	1305	}),
958	1306	};
959	1307	result[@enumToInt(Feature.v5te)] = .{
960		.llvm_name = "armv5te",
961		.description = "ARMv5te architecture",
962		.dependencies = featureSet(&[_]Feature{
963		.strict_align,
964		.has_v5te,
965		}),
966		};
967		result[@enumToInt(Feature.v5tej)] = .{
968		.llvm_name = "armv5tej",
969		.description = "ARMv5tej architecture",
	1308	.llvm_name = "v5te",
	1309	.description = "Support ARM v5TE, v5TEj, and v5TExp instructions",
970	1310	.dependencies = featureSet(&[_]Feature{
971		.strict_align,
972		.has_v5te,
	1311	.v5t,
973	1312	}),
974	1313	};
975	1314	result[@enumToInt(Feature.v6)] = .{
976		.llvm_name = "armv6",
977		.description = "ARMv6 architecture",
978		.dependencies = featureSet(&[_]Feature{
979		.dsp,
980		.has_v6,
981		}),
982		};
983		result[@enumToInt(Feature.v6m)] = .{
984		.llvm_name = "armv6-m",
985		.description = "ARMv6m architecture",
986		.dependencies = featureSet(&[_]Feature{
987		.db,
988		.mclass,
989		.noarm,
990		.strict_align,
991		.thumb_mode,
992		.has_v6m,
993		}),
994		};
995		result[@enumToInt(Feature.v6j)] = .{
996		.llvm_name = "armv6j",
997		.description = "ARMv7a architecture",
	1315	.llvm_name = "v6",
	1316	.description = "Support ARM v6 instructions",
998	1317	.dependencies = featureSet(&[_]Feature{
999		.v6,
	1318	.v5te,
1000	1319	}),
1001	1320	};
1002	1321	result[@enumToInt(Feature.v6k)] = .{
1003		.llvm_name = "armv6k",
1004		.description = "ARMv6k architecture",
1005		.dependencies = featureSet(&[_]Feature{
1006		.has_v6k,
1007		}),
1008		};
1009		result[@enumToInt(Feature.v6kz)] = .{
1010		.llvm_name = "armv6kz",
1011		.description = "ARMv6kz architecture",
1012		.dependencies = featureSet(&[_]Feature{
1013		.trustzone,
1014		.has_v6k,
1015		}),
1016		};
1017		result[@enumToInt(Feature.v6sm)] = .{
1018		.llvm_name = "armv6s-m",
1019		.description = "ARMv6sm architecture",
1020		.dependencies = featureSet(&[_]Feature{
1021		.db,
1022		.mclass,
1023		.noarm,
1024		.strict_align,
1025		.thumb_mode,
1026		.has_v6m,
1027		}),
1028		};
1029		result[@enumToInt(Feature.v6t2)] = .{
1030		.llvm_name = "armv6t2",
1031		.description = "ARMv6t2 architecture",
1032		.dependencies = featureSet(&[_]Feature{
1033		.dsp,
1034		.has_v6t2,
1035		}),
1036		};
1037		result[@enumToInt(Feature.v7a)] = .{
1038		.llvm_name = "armv7-a",
1039		.description = "ARMv7a architecture",
1040		.dependencies = featureSet(&[_]Feature{
1041		.aclass,
1042		.db,
1043		.dsp,
1044		.neon,
1045		.has_v7,
1046		}),
1047		};
1048		result[@enumToInt(Feature.v7m)] = .{
1049		.llvm_name = "armv7-m",
1050		.description = "ARMv7m architecture",
1051		.dependencies = featureSet(&[_]Feature{
1052		.db,
1053		.hwdiv,
1054		.mclass,
1055		.noarm,
1056		.thumb_mode,
1057		.thumb2,
1058		.has_v7,
1059		}),
1060		};
1061		result[@enumToInt(Feature.v7r)] = .{
1062		.llvm_name = "armv7-r",
1063		.description = "ARMv7r architecture",
1064		.dependencies = featureSet(&[_]Feature{
1065		.db,
1066		.dsp,
1067		.hwdiv,
1068		.rclass,
1069		.has_v7,
1070		}),
1071		};
1072		result[@enumToInt(Feature.v7em)] = .{
1073		.llvm_name = "armv7e-m",
1074		.description = "ARMv7em architecture",
1075		.dependencies = featureSet(&[_]Feature{
1076		.db,
1077		.dsp,
1078		.hwdiv,
1079		.mclass,
1080		.noarm,
1081		.thumb_mode,
1082		.thumb2,
1083		.has_v7,
1084		}),
1085		};
1086		result[@enumToInt(Feature.v7k)] = .{
1087		.llvm_name = "armv7k",
1088		.description = "ARMv7a architecture",
1089		.dependencies = featureSet(&[_]Feature{
1090		.v7a,
1091		}),
1092		};
1093		result[@enumToInt(Feature.v7s)] = .{
1094		.llvm_name = "armv7s",
1095		.description = "ARMv7a architecture",
1096		.dependencies = featureSet(&[_]Feature{
1097		.v7a,
1098		}),
1099		};
1100		result[@enumToInt(Feature.v7ve)] = .{
1101		.llvm_name = "armv7ve",
1102		.description = "ARMv7ve architecture",
	1322	.llvm_name = "v6k",
	1323	.description = "Support ARM v6k instructions",
1103	1324	.dependencies = featureSet(&[_]Feature{
1104		.aclass,
1105		.db,
1106		.dsp,
1107		.mp,
1108		.neon,
1109		.trustzone,
1110		.has_v7,
1111		.virtualization,
	1325	.v6,
1112	1326	}),
1113	1327	};
1114		result[@enumToInt(Feature.v8a)] = .{
1115		.llvm_name = "armv8-a",
1116		.description = "ARMv8a architecture",
	1328	result[@enumToInt(Feature.v6m)] = .{
	1329	.llvm_name = "v6m",
	1330	.description = "Support ARM v6M instructions",
1117	1331	.dependencies = featureSet(&[_]Feature{
1118		.aclass,
1119		.crc,
1120		.crypto,
1121		.db,
1122		.dsp,
1123		.fp_armv8,
1124		.mp,
1125		.neon,
1126		.trustzone,
1127		.has_v8,
1128		.virtualization,
	1332	.v6,
1129	1333	}),
1130	1334	};
1131		result[@enumToInt(Feature.v8m)] = .{
1132		.llvm_name = "armv8-m.base",
1133		.description = "ARMv8mBaseline architecture",
	1335	result[@enumToInt(Feature.v6t2)] = .{
	1336	.llvm_name = "v6t2",
	1337	.description = "Support ARM v6t2 instructions",
1134	1338	.dependencies = featureSet(&[_]Feature{
1135		.@"8msecext",
1136		.acquire_release,
1137		.db,
1138		.hwdiv,
1139		.mclass,
1140		.noarm,
1141		.strict_align,
1142		.thumb_mode,
1143		.has_v7clrex,
1144		.has_v8m,
	1339	.thumb2,
	1340	.v6k,
	1341	.v8m,
1145	1342	}),
1146	1343	};
1147		result[@enumToInt(Feature.v8m_main)] = .{
1148		.llvm_name = "armv8-m.main",
1149		.description = "ARMv8mMainline architecture",
	1344	result[@enumToInt(Feature.v7)] = .{
	1345	.llvm_name = "v7",
	1346	.description = "Support ARM v7 instructions",
1150	1347	.dependencies = featureSet(&[_]Feature{
1151		.@"8msecext",
1152		.acquire_release,
1153		.db,
1154		.hwdiv,
1155		.mclass,
1156		.noarm,
1157		.thumb_mode,
1158		.has_v8m_main,
	1348	.perfmon,
	1349	.v6t2,
	1350	.v7clrex,
1159	1351	}),
1160	1352	};
1161		result[@enumToInt(Feature.v8r)] = .{
1162		.llvm_name = "armv8-r",
1163		.description = "ARMv8r architecture",
	1353	result[@enumToInt(Feature.v7clrex)] = .{
	1354	.llvm_name = "v7clrex",
	1355	.description = "Has v7 clrex instruction",
	1356	.dependencies = featureSet(&[_]Feature{}),
	1357	};
	1358	result[@enumToInt(Feature.v8)] = .{
	1359	.llvm_name = "v8",
	1360	.description = "Support ARM v8 instructions",
1164	1361	.dependencies = featureSet(&[_]Feature{
1165		.crc,
1166		.db,
1167		.dfb,
1168		.dsp,
1169		.fp_armv8,
1170		.mp,
1171		.neon,
1172		.rclass,
1173		.has_v8,
1174		.virtualization,
	1362	.acquire_release,
	1363	.v7,
1175	1364	}),
1176	1365	};
1177	1366	result[@enumToInt(Feature.v8_1a)] = .{
1178		.llvm_name = "armv8.1-a",
1179		.description = "ARMv81a architecture",
	1367	.llvm_name = "v8.1a",
	1368	.description = "Support ARM v8.1a instructions",
1180	1369	.dependencies = featureSet(&[_]Feature{
1181		.aclass,
1182		.crc,
1183		.crypto,
1184		.db,
1185		.dsp,
1186		.fp_armv8,
1187		.mp,
1188		.neon,
1189		.trustzone,
1190		.has_v8_1a,
1191		.virtualization,
	1370	.v8,
1192	1371	}),
1193	1372	};
1194	1373	result[@enumToInt(Feature.v8_1m_main)] = .{
1195		.llvm_name = "armv8.1-m.main",
1196		.description = "ARMv81mMainline architecture",
	1374	.llvm_name = "v8.1m.main",
	1375	.description = "Support ARM v8-1M Mainline instructions",
1197	1376	.dependencies = featureSet(&[_]Feature{
1198		.@"8msecext",
1199		.acquire_release,
1200		.db,
1201		.hwdiv,
1202		.lob,
1203		.mclass,
1204		.noarm,
1205		.ras,
1206		.thumb_mode,
1207		.has_v8_1m_main,
	1377	.v8m_main,
1208	1378	}),
1209	1379	};
1210	1380	result[@enumToInt(Feature.v8_2a)] = .{
1211		.llvm_name = "armv8.2-a",
1212		.description = "ARMv82a architecture",
	1381	.llvm_name = "v8.2a",
	1382	.description = "Support ARM v8.2a instructions",
1213	1383	.dependencies = featureSet(&[_]Feature{
1214		.aclass,
1215		.crc,
1216		.crypto,
1217		.db,
1218		.dsp,
1219		.fp_armv8,
1220		.mp,
1221		.neon,
1222		.ras,
1223		.trustzone,
1224		.has_v8_2a,
1225		.virtualization,
	1384	.v8_1a,
1226	1385	}),
1227	1386	};
1228	1387	result[@enumToInt(Feature.v8_3a)] = .{
1229		.llvm_name = "armv8.3-a",
1230		.description = "ARMv83a architecture",
	1388	.llvm_name = "v8.3a",
	1389	.description = "Support ARM v8.3a instructions",
1231	1390	.dependencies = featureSet(&[_]Feature{
1232		.aclass,
1233		.crc,
1234		.crypto,
1235		.db,
1236		.dsp,
1237		.fp_armv8,
1238		.mp,
1239		.neon,
1240		.ras,
1241		.trustzone,
1242		.has_v8_3a,
1243		.virtualization,
	1391	.v8_2a,
1244	1392	}),
1245	1393	};
1246	1394	result[@enumToInt(Feature.v8_4a)] = .{
1247		.llvm_name = "armv8.4-a",
1248		.description = "ARMv84a architecture",
	1395	.llvm_name = "v8.4a",
	1396	.description = "Support ARM v8.4a instructions",
1249	1397	.dependencies = featureSet(&[_]Feature{
1250		.aclass,
1251		.crc,
1252		.crypto,
1253		.db,
1254	1398	.dotprod,
1255		.dsp,
1256		.fp_armv8,
1257		.mp,
1258		.neon,
1259		.ras,
1260		.trustzone,
1261		.has_v8_4a,
1262		.virtualization,
	1399	.v8_3a,
1263	1400	}),
1264	1401	};
1265	1402	result[@enumToInt(Feature.v8_5a)] = .{
1266		.llvm_name = "armv8.5-a",
1267		.description = "ARMv85a architecture",
	1403	.llvm_name = "v8.5a",
	1404	.description = "Support ARM v8.5a instructions",
1268	1405	.dependencies = featureSet(&[_]Feature{
1269		.aclass,
1270		.crc,
1271		.crypto,
1272		.db,
1273		.dotprod,
1274		.dsp,
1275		.fp_armv8,
1276		.mp,
1277		.neon,
1278		.ras,
1279		.trustzone,
1280		.has_v8_5a,
1281		.virtualization,
	1406	.sb,
	1407	.v8_4a,
1282	1408	}),
1283	1409	};
1284	1410	result[@enumToInt(Feature.v8_6a)] = .{
1285		.llvm_name = "armv8.6-a",
1286		.description = "ARMv86a architecture",
	1411	.llvm_name = "v8.6a",
	1412	.description = "Support ARM v8.6a instructions",
1287	1413	.dependencies = featureSet(&[_]Feature{
1288		.aclass,
1289		.crc,
1290		.crypto,
1291		.db,
1292		.dotprod,
1293		.dsp,
1294		.fp_armv8,
1295		.mp,
1296		.neon,
1297		.ras,
1298		.trustzone,
1299		.has_v8_6a,
1300		.virtualization,
	1414	.bf16,
	1415	._i8mm,
	1416	.v8_5a,
	1417	}),
	1418	};
	1419	result[@enumToInt(Feature.v8m)] = .{
	1420	.llvm_name = "v8m",
	1421	.description = "Support ARM v8M Baseline instructions",
	1422	.dependencies = featureSet(&[_]Feature{
	1423	.v6m,
	1424	}),
	1425	};
	1426	result[@enumToInt(Feature.v8m_main)] = .{
	1427	.llvm_name = "v8m.main",
	1428	.description = "Support ARM v8M Mainline instructions",
	1429	.dependencies = featureSet(&[_]Feature{
	1430	.v7,
1301	1431	}),
1302	1432	};
1303	1433	result[@enumToInt(Feature.vfp2)] = .{
...	...	@@ -1417,7 +1547,7 @@ pub const all_features = blk: {
1417	1547	.llvm_name = "xscale",
1418	1548	.description = "ARMv5te architecture",
1419	1549	.dependencies = featureSet(&[_]Feature{
1420		.has_v5te,
	1550	.armv5te,
1421	1551	}),
1422	1552	};
1423	1553	result[@enumToInt(Feature.zcz)] = .{
...	...	@@ -1438,49 +1568,49 @@ pub const cpu = struct {
1438	1568	.name = "arm1020e",
1439	1569	.llvm_name = "arm1020e",
1440	1570	.features = featureSet(&[_]Feature{
1441		.v5te,
	1571	.armv5te,
1442	1572	}),
1443	1573	};
1444	1574	pub const arm1020t = CpuModel{
1445	1575	.name = "arm1020t",
1446	1576	.llvm_name = "arm1020t",
1447	1577	.features = featureSet(&[_]Feature{
1448		.v5t,
	1578	.armv5t,
1449	1579	}),
1450	1580	};
1451	1581	pub const arm1022e = CpuModel{
1452	1582	.name = "arm1022e",
1453	1583	.llvm_name = "arm1022e",
1454	1584	.features = featureSet(&[_]Feature{
1455		.v5te,
	1585	.armv5te,
1456	1586	}),
1457	1587	};
1458	1588	pub const arm10e = CpuModel{
1459	1589	.name = "arm10e",
1460	1590	.llvm_name = "arm10e",
1461	1591	.features = featureSet(&[_]Feature{
1462		.v5te,
	1592	.armv5te,
1463	1593	}),
1464	1594	};
1465	1595	pub const arm10tdmi = CpuModel{
1466	1596	.name = "arm10tdmi",
1467	1597	.llvm_name = "arm10tdmi",
1468	1598	.features = featureSet(&[_]Feature{
1469		.v5t,
	1599	.armv5t,
1470	1600	}),
1471	1601	};
1472	1602	pub const arm1136j_s = CpuModel{
1473	1603	.name = "arm1136j_s",
1474	1604	.llvm_name = "arm1136j-s",
1475	1605	.features = featureSet(&[_]Feature{
1476		.v6,
	1606	.armv6,
1477	1607	}),
1478	1608	};
1479	1609	pub const arm1136jf_s = CpuModel{
1480	1610	.name = "arm1136jf_s",
1481	1611	.llvm_name = "arm1136jf-s",
1482	1612	.features = featureSet(&[_]Feature{
1483		.v6,
	1613	.armv6,
1484	1614	.slowfpvmlx,
1485	1615	.vfp2,
1486	1616	}),
...	...	@@ -1489,14 +1619,14 @@ pub const cpu = struct {
1489	1619	.name = "arm1156t2_s",
1490	1620	.llvm_name = "arm1156t2-s",
1491	1621	.features = featureSet(&[_]Feature{
1492		.v6t2,
	1622	.armv6t2,
1493	1623	}),
1494	1624	};
1495	1625	pub const arm1156t2f_s = CpuModel{
1496	1626	.name = "arm1156t2f_s",
1497	1627	.llvm_name = "arm1156t2f-s",
1498	1628	.features = featureSet(&[_]Feature{
1499		.v6t2,
	1629	.armv6t2,
1500	1630	.slowfpvmlx,
1501	1631	.vfp2,
1502	1632	}),
...	...	@@ -1505,21 +1635,21 @@ pub const cpu = struct {
1505	1635	.name = "arm1176j_s",
1506	1636	.llvm_name = "arm1176j-s",
1507	1637	.features = featureSet(&[_]Feature{
1508		.v6kz,
	1638	.armv6kz,
1509	1639	}),
1510	1640	};
1511	1641	pub const arm1176jz_s = CpuModel{
1512	1642	.name = "arm1176jz_s",
1513	1643	.llvm_name = "arm1176jz-s",
1514	1644	.features = featureSet(&[_]Feature{
1515		.v6kz,
	1645	.armv6kz,
1516	1646	}),
1517	1647	};
1518	1648	pub const arm1176jzf_s = CpuModel{
1519	1649	.name = "arm1176jzf_s",
1520	1650	.llvm_name = "arm1176jzf-s",
1521	1651	.features = featureSet(&[_]Feature{
1522		.v6kz,
	1652	.armv6kz,
1523	1653	.slowfpvmlx,
1524	1654	.vfp2,
1525	1655	}),
...	...	@@ -1528,133 +1658,127 @@ pub const cpu = struct {
1528	1658	.name = "arm710t",
1529	1659	.llvm_name = "arm710t",
1530	1660	.features = featureSet(&[_]Feature{
1531		.v4t,
	1661	.armv4t,
1532	1662	}),
1533	1663	};
1534	1664	pub const arm720t = CpuModel{
1535	1665	.name = "arm720t",
1536	1666	.llvm_name = "arm720t",
1537	1667	.features = featureSet(&[_]Feature{
1538		.v4t,
	1668	.armv4t,
1539	1669	}),
1540	1670	};
1541	1671	pub const arm7tdmi = CpuModel{
1542	1672	.name = "arm7tdmi",
1543	1673	.llvm_name = "arm7tdmi",
1544	1674	.features = featureSet(&[_]Feature{
1545		.v4t,
	1675	.armv4t,
1546	1676	}),
1547	1677	};
1548	1678	pub const arm7tdmi_s = CpuModel{
1549	1679	.name = "arm7tdmi_s",
1550	1680	.llvm_name = "arm7tdmi-s",
1551	1681	.features = featureSet(&[_]Feature{
1552		.v4t,
	1682	.armv4t,
1553	1683	}),
1554	1684	};
1555	1685	pub const arm8 = CpuModel{
1556	1686	.name = "arm8",
1557	1687	.llvm_name = "arm8",
1558	1688	.features = featureSet(&[_]Feature{
1559		.v4,
	1689	.armv4,
1560	1690	}),
1561	1691	};
1562	1692	pub const arm810 = CpuModel{
1563	1693	.name = "arm810",
1564	1694	.llvm_name = "arm810",
1565	1695	.features = featureSet(&[_]Feature{
1566		.v4,
	1696	.armv4,
1567	1697	}),
1568	1698	};
1569	1699	pub const arm9 = CpuModel{
1570	1700	.name = "arm9",
1571	1701	.llvm_name = "arm9",
1572	1702	.features = featureSet(&[_]Feature{
1573		.v4t,
	1703	.armv4t,
1574	1704	}),
1575	1705	};
1576	1706	pub const arm920 = CpuModel{
1577	1707	.name = "arm920",
1578	1708	.llvm_name = "arm920",
1579	1709	.features = featureSet(&[_]Feature{
1580		.v4t,
	1710	.armv4t,
1581	1711	}),
1582	1712	};
1583	1713	pub const arm920t = CpuModel{
1584	1714	.name = "arm920t",
1585	1715	.llvm_name = "arm920t",
1586	1716	.features = featureSet(&[_]Feature{
1587		.v4t,
	1717	.armv4t,
1588	1718	}),
1589	1719	};
1590	1720	pub const arm922t = CpuModel{
1591	1721	.name = "arm922t",
1592	1722	.llvm_name = "arm922t",
1593	1723	.features = featureSet(&[_]Feature{
1594		.v4t,
	1724	.armv4t,
1595	1725	}),
1596	1726	};
1597	1727	pub const arm926ej_s = CpuModel{
1598	1728	.name = "arm926ej_s",
1599	1729	.llvm_name = "arm926ej-s",
1600	1730	.features = featureSet(&[_]Feature{
1601		.v5te,
	1731	.armv5te,
1602	1732	}),
1603	1733	};
1604	1734	pub const arm940t = CpuModel{
1605	1735	.name = "arm940t",
1606	1736	.llvm_name = "arm940t",
1607	1737	.features = featureSet(&[_]Feature{
1608		.v4t,
	1738	.armv4t,
1609	1739	}),
1610	1740	};
1611	1741	pub const arm946e_s = CpuModel{
1612	1742	.name = "arm946e_s",
1613	1743	.llvm_name = "arm946e-s",
1614	1744	.features = featureSet(&[_]Feature{
1615		.v5te,
	1745	.armv5te,
1616	1746	}),
1617	1747	};
1618	1748	pub const arm966e_s = CpuModel{
1619	1749	.name = "arm966e_s",
1620	1750	.llvm_name = "arm966e-s",
1621	1751	.features = featureSet(&[_]Feature{
1622		.v5te,
	1752	.armv5te,
1623	1753	}),
1624	1754	};
1625	1755	pub const arm968e_s = CpuModel{
1626	1756	.name = "arm968e_s",
1627	1757	.llvm_name = "arm968e-s",
1628	1758	.features = featureSet(&[_]Feature{
1629		.v5te,
	1759	.armv5te,
1630	1760	}),
1631	1761	};
1632	1762	pub const arm9e = CpuModel{
1633	1763	.name = "arm9e",
1634	1764	.llvm_name = "arm9e",
1635	1765	.features = featureSet(&[_]Feature{
1636		.v5te,
	1766	.armv5te,
1637	1767	}),
1638	1768	};
1639	1769	pub const arm9tdmi = CpuModel{
1640	1770	.name = "arm9tdmi",
1641	1771	.llvm_name = "arm9tdmi",
1642	1772	.features = featureSet(&[_]Feature{
1643		.v4t,
1644		}),
1645		};
1646		pub const baseline = CpuModel{
1647		.name = "baseline",
1648		.llvm_name = "generic",
1649		.features = featureSet(&[_]Feature{
1650		.v7a,
	1773	.armv4t,
1651	1774	}),
1652	1775	};
1653	1776	pub const cortex_a12 = CpuModel{
1654	1777	.name = "cortex_a12",
1655	1778	.llvm_name = "cortex-a12",
1656	1779	.features = featureSet(&[_]Feature{
1657		.v7a,
	1780	.a12,
	1781	.armv7_a,
1658	1782	.avoid_partial_cpsr,
1659	1783	.mp,
1660	1784	.ret_addr_stack,
...	...	@@ -1668,7 +1792,8 @@ pub const cpu = struct {
1668	1792	.name = "cortex_a15",
1669	1793	.llvm_name = "cortex-a15",
1670	1794	.features = featureSet(&[_]Feature{
1671		.v7a,
	1795	.a15,
	1796	.armv7_a,
1672	1797	.avoid_partial_cpsr,
1673	1798	.dont_widen_vmovs,
1674	1799	.mp,
...	...	@@ -1685,7 +1810,8 @@ pub const cpu = struct {
1685	1810	.name = "cortex_a17",
1686	1811	.llvm_name = "cortex-a17",
1687	1812	.features = featureSet(&[_]Feature{
1688		.v7a,
	1813	.a17,
	1814	.armv7_a,
1689	1815	.avoid_partial_cpsr,
1690	1816	.mp,
1691	1817	.ret_addr_stack,
...	...	@@ -1699,29 +1825,31 @@ pub const cpu = struct {
1699	1825	.name = "cortex_a32",
1700	1826	.llvm_name = "cortex-a32",
1701	1827	.features = featureSet(&[_]Feature{
	1828	.armv8_a,
1702	1829	.crc,
1703	1830	.crypto,
1704	1831	.hwdiv,
1705	1832	.hwdiv_arm,
1706		.v8a,
1707	1833	}),
1708	1834	};
1709	1835	pub const cortex_a35 = CpuModel{
1710	1836	.name = "cortex_a35",
1711	1837	.llvm_name = "cortex-a35",
1712	1838	.features = featureSet(&[_]Feature{
	1839	.a35,
	1840	.armv8_a,
1713	1841	.crc,
1714	1842	.crypto,
1715	1843	.hwdiv,
1716	1844	.hwdiv_arm,
1717		.v8a,
1718	1845	}),
1719	1846	};
1720	1847	pub const cortex_a5 = CpuModel{
1721	1848	.name = "cortex_a5",
1722	1849	.llvm_name = "cortex-a5",
1723	1850	.features = featureSet(&[_]Feature{
1724		.v7a,
	1851	.a5,
	1852	.armv7_a,
1725	1853	.mp,
1726	1854	.ret_addr_stack,
1727	1855	.slow_fp_brcc,
...	...	@@ -1736,7 +1864,8 @@ pub const cpu = struct {
1736	1864	.name = "cortex_a53",
1737	1865	.llvm_name = "cortex-a53",
1738	1866	.features = featureSet(&[_]Feature{
1739		.v8a,
	1867	.a53,
	1868	.armv8_a,
1740	1869	.crc,
1741	1870	.crypto,
1742	1871	.fpao,
...	...	@@ -1748,7 +1877,8 @@ pub const cpu = struct {
1748	1877	.name = "cortex_a55",
1749	1878	.llvm_name = "cortex-a55",
1750	1879	.features = featureSet(&[_]Feature{
1751		.v8_2a,
	1880	.a55,
	1881	.armv8_2_a,
1752	1882	.dotprod,
1753	1883	.hwdiv,
1754	1884	.hwdiv_arm,
...	...	@@ -1758,7 +1888,8 @@ pub const cpu = struct {
1758	1888	.name = "cortex_a57",
1759	1889	.llvm_name = "cortex-a57",
1760	1890	.features = featureSet(&[_]Feature{
1761		.v8a,
	1891	.a57,
	1892	.armv8_a,
1762	1893	.avoid_partial_cpsr,
1763	1894	.cheap_predicable_cpsr,
1764	1895	.crc,
...	...	@@ -1772,7 +1903,8 @@ pub const cpu = struct {
1772	1903	.name = "cortex_a7",
1773	1904	.llvm_name = "cortex-a7",
1774	1905	.features = featureSet(&[_]Feature{
1775		.v7a,
	1906	.a7,
	1907	.armv7_a,
1776	1908	.mp,
1777	1909	.ret_addr_stack,
1778	1910	.slow_fp_brcc,
...	...	@@ -1789,7 +1921,8 @@ pub const cpu = struct {
1789	1921	.name = "cortex_a72",
1790	1922	.llvm_name = "cortex-a72",
1791	1923	.features = featureSet(&[_]Feature{
1792		.v8a,
	1924	.a72,
	1925	.armv8_a,
1793	1926	.crc,
1794	1927	.crypto,
1795	1928	.hwdiv,
...	...	@@ -1800,7 +1933,8 @@ pub const cpu = struct {
1800	1933	.name = "cortex_a73",
1801	1934	.llvm_name = "cortex-a73",
1802	1935	.features = featureSet(&[_]Feature{
1803		.v8a,
	1936	.a73,
	1937	.armv8_a,
1804	1938	.crc,
1805	1939	.crypto,
1806	1940	.hwdiv,
...	...	@@ -1811,7 +1945,8 @@ pub const cpu = struct {
1811	1945	.name = "cortex_a75",
1812	1946	.llvm_name = "cortex-a75",
1813	1947	.features = featureSet(&[_]Feature{
1814		.v8_2a,
	1948	.a75,
	1949	.armv8_2_a,
1815	1950	.dotprod,
1816	1951	.hwdiv,
1817	1952	.hwdiv_arm,
...	...	@@ -1822,7 +1957,7 @@ pub const cpu = struct {
1822	1957	.llvm_name = "cortex-a76",
1823	1958	.features = featureSet(&[_]Feature{
1824	1959	.a76,
1825		.v8_2a,
	1960	.armv8_2_a,
1826	1961	.crc,
1827	1962	.crypto,
1828	1963	.dotprod,
...	...	@@ -1836,7 +1971,7 @@ pub const cpu = struct {
1836	1971	.llvm_name = "cortex-a76ae",
1837	1972	.features = featureSet(&[_]Feature{
1838	1973	.a76,
1839		.v8_2a,
	1974	.armv8_2_a,
1840	1975	.crc,
1841	1976	.crypto,
1842	1977	.dotprod,
...	...	@@ -1849,7 +1984,8 @@ pub const cpu = struct {
1849	1984	.name = "cortex_a77",
1850	1985	.llvm_name = "cortex-a77",
1851	1986	.features = featureSet(&[_]Feature{
1852		.v8_2a,
	1987	.a77,
	1988	.armv8_2_a,
1853	1989	.crc,
1854	1990	.crypto,
1855	1991	.dotprod,
...	...	@@ -1862,7 +1998,8 @@ pub const cpu = struct {
1862	1998	.name = "cortex_a78",
1863	1999	.llvm_name = "cortex-a78",
1864	2000	.features = featureSet(&[_]Feature{
1865		.v8_2a,
	2001	.armv8_2_a,
	2002	.cortex_a78,
1866	2003	.crc,
1867	2004	.crypto,
1868	2005	.dotprod,
...	...	@@ -1875,7 +2012,8 @@ pub const cpu = struct {
1875	2012	.name = "cortex_a8",
1876	2013	.llvm_name = "cortex-a8",
1877	2014	.features = featureSet(&[_]Feature{
1878		.v7a,
	2015	.a8,
	2016	.armv7_a,
1879	2017	.nonpipelined_vfp,
1880	2018	.ret_addr_stack,
1881	2019	.slow_fp_brcc,
...	...	@@ -1890,7 +2028,8 @@ pub const cpu = struct {
1890	2028	.name = "cortex_a9",
1891	2029	.llvm_name = "cortex-a9",
1892	2030	.features = featureSet(&[_]Feature{
1893		.v7a,
	2031	.a9,
	2032	.armv7_a,
1894	2033	.avoid_partial_cpsr,
1895	2034	.expand_fp_mlx,
1896	2035	.fp16,
...	...	@@ -1909,28 +2048,28 @@ pub const cpu = struct {
1909	2048	.name = "cortex_m0",
1910	2049	.llvm_name = "cortex-m0",
1911	2050	.features = featureSet(&[_]Feature{
1912		.v6m,
	2051	.armv6_m,
1913	2052	}),
1914	2053	};
1915	2054	pub const cortex_m0plus = CpuModel{
1916	2055	.name = "cortex_m0plus",
1917	2056	.llvm_name = "cortex-m0plus",
1918	2057	.features = featureSet(&[_]Feature{
1919		.v6m,
	2058	.armv6_m,
1920	2059	}),
1921	2060	};
1922	2061	pub const cortex_m1 = CpuModel{
1923	2062	.name = "cortex_m1",
1924	2063	.llvm_name = "cortex-m1",
1925	2064	.features = featureSet(&[_]Feature{
1926		.v6m,
	2065	.armv6_m,
1927	2066	}),
1928	2067	};
1929	2068	pub const cortex_m23 = CpuModel{
1930	2069	.name = "cortex_m23",
1931	2070	.llvm_name = "cortex-m23",
1932	2071	.features = featureSet(&[_]Feature{
1933		.v8m,
	2072	.armv8_m_base,
1934	2073	.no_movt,
1935	2074	}),
1936	2075	};
...	...	@@ -1938,7 +2077,7 @@ pub const cpu = struct {
1938	2077	.name = "cortex_m3",
1939	2078	.llvm_name = "cortex-m3",
1940	2079	.features = featureSet(&[_]Feature{
1941		.v7m,
	2080	.armv7_m,
1942	2081	.loop_align,
1943	2082	.m3,
1944	2083	.no_branch_predictor,
...	...	@@ -1949,7 +2088,7 @@ pub const cpu = struct {
1949	2088	.name = "cortex_m33",
1950	2089	.llvm_name = "cortex-m33",
1951	2090	.features = featureSet(&[_]Feature{
1952		.v8m_main,
	2091	.armv8_m_main,
1953	2092	.dsp,
1954	2093	.fp_armv8d16sp,
1955	2094	.loop_align,
...	...	@@ -1963,7 +2102,7 @@ pub const cpu = struct {
1963	2102	.name = "cortex_m35p",
1964	2103	.llvm_name = "cortex-m35p",
1965	2104	.features = featureSet(&[_]Feature{
1966		.v8m_main,
	2105	.armv8_m_main,
1967	2106	.dsp,
1968	2107	.fp_armv8d16sp,
1969	2108	.loop_align,
...	...	@@ -1977,7 +2116,7 @@ pub const cpu = struct {
1977	2116	.name = "cortex_m4",
1978	2117	.llvm_name = "cortex-m4",
1979	2118	.features = featureSet(&[_]Feature{
1980		.v7em,
	2119	.armv7e_m,
1981	2120	.loop_align,
1982	2121	.no_branch_predictor,
1983	2122	.slowfpvfmx,
...	...	@@ -1990,7 +2129,7 @@ pub const cpu = struct {
1990	2129	.name = "cortex_m55",
1991	2130	.llvm_name = "cortex-m55",
1992	2131	.features = featureSet(&[_]Feature{
1993		.v8_1m_main,
	2132	.armv8_1_m_main,
1994	2133	.dsp,
1995	2134	.fp_armv8d16,
1996	2135	.loop_align,
...	...	@@ -2004,15 +2143,16 @@ pub const cpu = struct {
2004	2143	.name = "cortex_m7",
2005	2144	.llvm_name = "cortex-m7",
2006	2145	.features = featureSet(&[_]Feature{
2007		.v7em,
	2146	.armv7e_m,
2008	2147	.fp_armv8d16,
	2148	.use_misched,
2009	2149	}),
2010	2150	};
2011	2151	pub const cortex_r4 = CpuModel{
2012	2152	.name = "cortex_r4",
2013	2153	.llvm_name = "cortex-r4",
2014	2154	.features = featureSet(&[_]Feature{
2015		.v7r,
	2155	.armv7_r,
2016	2156	.avoid_partial_cpsr,
2017	2157	.r4,
2018	2158	.ret_addr_stack,
...	...	@@ -2022,7 +2162,7 @@ pub const cpu = struct {
2022	2162	.name = "cortex_r4f",
2023	2163	.llvm_name = "cortex-r4f",
2024	2164	.features = featureSet(&[_]Feature{
2025		.v7r,
	2165	.armv7_r,
2026	2166	.avoid_partial_cpsr,
2027	2167	.r4,
2028	2168	.ret_addr_stack,
...	...	@@ -2036,9 +2176,10 @@ pub const cpu = struct {
2036	2176	.name = "cortex_r5",
2037	2177	.llvm_name = "cortex-r5",
2038	2178	.features = featureSet(&[_]Feature{
2039		.v7r,
	2179	.armv7_r,
2040	2180	.avoid_partial_cpsr,
2041	2181	.hwdiv_arm,
	2182	.r5,
2042	2183	.ret_addr_stack,
2043	2184	.slow_fp_brcc,
2044	2185	.slowfpvfmx,
...	...	@@ -2050,8 +2191,9 @@ pub const cpu = struct {
2050	2191	.name = "cortex_r52",
2051	2192	.llvm_name = "cortex-r52",
2052	2193	.features = featureSet(&[_]Feature{
2053		.v8r,
	2194	.armv8_r,
2054	2195	.fpao,
	2196	.r52,
2055	2197	.use_misched,
2056	2198	}),
2057	2199	};
...	...	@@ -2059,11 +2201,12 @@ pub const cpu = struct {
2059	2201	.name = "cortex_r7",
2060	2202	.llvm_name = "cortex-r7",
2061	2203	.features = featureSet(&[_]Feature{
2062		.v7r,
	2204	.armv7_r,
2063	2205	.avoid_partial_cpsr,
2064	2206	.fp16,
2065	2207	.hwdiv_arm,
2066	2208	.mp,
	2209	.r7,
2067	2210	.ret_addr_stack,
2068	2211	.slow_fp_brcc,
2069	2212	.slowfpvfmx,
...	...	@@ -2075,7 +2218,7 @@ pub const cpu = struct {
2075	2218	.name = "cortex_r8",
2076	2219	.llvm_name = "cortex-r8",
2077	2220	.features = featureSet(&[_]Feature{
2078		.v7r,
	2221	.armv7_r,
2079	2222	.avoid_partial_cpsr,
2080	2223	.fp16,
2081	2224	.hwdiv_arm,
...	...	@@ -2091,7 +2234,8 @@ pub const cpu = struct {
2091	2234	.name = "cortex_x1",
2092	2235	.llvm_name = "cortex-x1",
2093	2236	.features = featureSet(&[_]Feature{
2094		.v8_2a,
	2237	.armv8_2_a,
	2238	.cortex_x1,
2095	2239	.crc,
2096	2240	.crypto,
2097	2241	.dotprod,
...	...	@@ -2104,7 +2248,7 @@ pub const cpu = struct {
2104	2248	.name = "cyclone",
2105	2249	.llvm_name = "cyclone",
2106	2250	.features = featureSet(&[_]Feature{
2107		.v8a,
	2251	.armv8_a,
2108	2252	.avoid_movs_shop,
2109	2253	.avoid_partial_cpsr,
2110	2254	.crypto,
...	...	@@ -2126,30 +2270,14 @@ pub const cpu = struct {
2126	2270	.name = "ep9312",
2127	2271	.llvm_name = "ep9312",
2128	2272	.features = featureSet(&[_]Feature{
2129		.v4t,
2130		}),
2131		};
2132		pub const exynos_m1 = CpuModel{
2133		.name = "exynos_m1",
2134		.llvm_name = null,
2135		.features = featureSet(&[_]Feature{
2136		.v8a,
2137		.exynos,
2138		}),
2139		};
2140		pub const exynos_m2 = CpuModel{
2141		.name = "exynos_m2",
2142		.llvm_name = null,
2143		.features = featureSet(&[_]Feature{
2144		.v8a,
2145		.exynos,
	2273	.armv4t,
2146	2274	}),
2147	2275	};
2148	2276	pub const exynos_m3 = CpuModel{
2149	2277	.name = "exynos_m3",
2150	2278	.llvm_name = "exynos-m3",
2151	2279	.features = featureSet(&[_]Feature{
2152		.v8_2a,
	2280	.armv8_a,
2153	2281	.exynos,
2154	2282	}),
2155	2283	};
...	...	@@ -2157,7 +2285,7 @@ pub const cpu = struct {
2157	2285	.name = "exynos_m4",
2158	2286	.llvm_name = "exynos-m4",
2159	2287	.features = featureSet(&[_]Feature{
2160		.v8_2a,
	2288	.armv8_2_a,
2161	2289	.dotprod,
2162	2290	.exynos,
2163	2291	.fullfp16,
...	...	@@ -2167,10 +2295,10 @@ pub const cpu = struct {
2167	2295	.name = "exynos_m5",
2168	2296	.llvm_name = "exynos-m5",
2169	2297	.features = featureSet(&[_]Feature{
	2298	.armv8_2_a,
2170	2299	.dotprod,
2171	2300	.exynos,
2172	2301	.fullfp16,
2173		.v8_2a,
2174	2302	}),
2175	2303	};
2176	2304	pub const generic = CpuModel{
...	...	@@ -2182,20 +2310,21 @@ pub const cpu = struct {
2182	2310	.name = "iwmmxt",
2183	2311	.llvm_name = "iwmmxt",
2184	2312	.features = featureSet(&[_]Feature{
2185		.v5te,
	2313	.armv5te,
2186	2314	}),
2187	2315	};
2188	2316	pub const krait = CpuModel{
2189	2317	.name = "krait",
2190	2318	.llvm_name = "krait",
2191	2319	.features = featureSet(&[_]Feature{
	2320	.armv7_a,
2192	2321	.avoid_partial_cpsr,
2193	2322	.fp16,
2194	2323	.hwdiv,
2195	2324	.hwdiv_arm,
	2325	.krait,
2196	2326	.muxed_units,
2197	2327	.ret_addr_stack,
2198		.v7a,
2199	2328	.vfp4,
2200	2329	.vldn_align,
2201	2330	.vmlx_forwarding,
...	...	@@ -2205,18 +2334,19 @@ pub const cpu = struct {
2205	2334	.name = "kryo",
2206	2335	.llvm_name = "kryo",
2207	2336	.features = featureSet(&[_]Feature{
	2337	.armv8_a,
2208	2338	.crc,
2209	2339	.crypto,
2210	2340	.hwdiv,
2211	2341	.hwdiv_arm,
2212		.v8a,
	2342	.kryo,
2213	2343	}),
2214	2344	};
2215	2345	pub const mpcore = CpuModel{
2216	2346	.name = "mpcore",
2217	2347	.llvm_name = "mpcore",
2218	2348	.features = featureSet(&[_]Feature{
2219		.v6k,
	2349	.armv6k,
2220	2350	.slowfpvmlx,
2221	2351	.vfp2,
2222	2352	}),
...	...	@@ -2225,14 +2355,14 @@ pub const cpu = struct {
2225	2355	.name = "mpcorenovfp",
2226	2356	.llvm_name = "mpcorenovfp",
2227	2357	.features = featureSet(&[_]Feature{
2228		.v6k,
	2358	.armv6k,
2229	2359	}),
2230	2360	};
2231	2361	pub const neoverse_n1 = CpuModel{
2232	2362	.name = "neoverse_n1",
2233	2363	.llvm_name = "neoverse-n1",
2234	2364	.features = featureSet(&[_]Feature{
2235		.v8_2a,
	2365	.armv8_2_a,
2236	2366	.crc,
2237	2367	.crypto,
2238	2368	.dotprod,
...	...	@@ -2240,18 +2370,42 @@ pub const cpu = struct {
2240	2370	.hwdiv_arm,
2241	2371	}),
2242	2372	};
	2373	pub const neoverse_n2 = CpuModel{
	2374	.name = "neoverse_n2",
	2375	.llvm_name = "neoverse-n2",
	2376	.features = featureSet(&[_]Feature{
	2377	.armv8_5_a,
	2378	.bf16,
	2379	._i8mm,
	2380	.perfmon,
	2381	}),
	2382	};
	2383	pub const neoverse_v1 = CpuModel{
	2384	.name = "neoverse_v1",
	2385	.llvm_name = "neoverse-v1",
	2386	.features = featureSet(&[_]Feature{
	2387	.armv8_4_a,
	2388	.bf16,
	2389	.crc,
	2390	.crypto,
	2391	.fullfp16,
	2392	.hwdiv,
	2393	.hwdiv_arm,
	2394	._i8mm,
	2395	}),
	2396	};
2243	2397	pub const sc000 = CpuModel{
2244	2398	.name = "sc000",
2245	2399	.llvm_name = "sc000",
2246	2400	.features = featureSet(&[_]Feature{
2247		.v6m,
	2401	.armv6_m,
2248	2402	}),
2249	2403	};
2250	2404	pub const sc300 = CpuModel{
2251	2405	.name = "sc300",
2252	2406	.llvm_name = "sc300",
2253	2407	.features = featureSet(&[_]Feature{
2254		.v7m,
	2408	.armv7_m,
2255	2409	.m3,
2256	2410	.no_branch_predictor,
2257	2411	.use_misched,
...	...	@@ -2261,35 +2415,35 @@ pub const cpu = struct {
2261	2415	.name = "strongarm",
2262	2416	.llvm_name = "strongarm",
2263	2417	.features = featureSet(&[_]Feature{
2264		.v4,
	2418	.armv4,
2265	2419	}),
2266	2420	};
2267	2421	pub const strongarm110 = CpuModel{
2268	2422	.name = "strongarm110",
2269	2423	.llvm_name = "strongarm110",
2270	2424	.features = featureSet(&[_]Feature{
2271		.v4,
	2425	.armv4,
2272	2426	}),
2273	2427	};
2274	2428	pub const strongarm1100 = CpuModel{
2275	2429	.name = "strongarm1100",
2276	2430	.llvm_name = "strongarm1100",
2277	2431	.features = featureSet(&[_]Feature{
2278		.v4,
	2432	.armv4,
2279	2433	}),
2280	2434	};
2281	2435	pub const strongarm1110 = CpuModel{
2282	2436	.name = "strongarm1110",
2283	2437	.llvm_name = "strongarm1110",
2284	2438	.features = featureSet(&[_]Feature{
2285		.v4,
	2439	.armv4,
2286	2440	}),
2287	2441	};
2288	2442	pub const swift = CpuModel{
2289	2443	.name = "swift",
2290	2444	.llvm_name = "swift",
2291	2445	.features = featureSet(&[_]Feature{
2292		.v7a,
	2446	.armv7_a,
2293	2447	.avoid_movs_shop,
2294	2448	.avoid_partial_cpsr,
2295	2449	.disable_postra_scheduler,
...	...	@@ -2317,7 +2471,7 @@ pub const cpu = struct {
2317	2471	.name = "xscale",
2318	2472	.llvm_name = "xscale",
2319	2473	.features = featureSet(&[_]Feature{
2320		.v5te,
	2474	.armv5te,
2321	2475	}),
2322	2476	};
2323	2477	};

lib/std/target/avr.zig+63-6

...	...	@@ -47,6 +47,7 @@ pub const Feature = enum {
47	47	pub usingnamespace CpuFeature.feature_set_fns(Feature);
48	48
49	49	pub const all_features = blk: {
	50	@setEvalBranchQuota(10000);
50	51	const len = @typeInfo(Feature).Enum.fields.len;
51	52	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
52	53	var result: [len]CpuFeature = undefined;
...	...	@@ -163,7 +164,6 @@ pub const all_features = blk: {
163	164	.dependencies = featureSet(&[_]Feature{
164	165	.avr0,
165	166	.@"break",
166		.memmappedregs,
167	167	.sram,
168	168	.tinyencoding,
169	169	}),
...	...	@@ -802,6 +802,13 @@ pub const cpu = struct {
802	802	.avr5,
803	803	}),
804	804	};
	805	pub const atmega168pb = CpuModel{
	806	.name = "atmega168pb",
	807	.llvm_name = "atmega168pb",
	808	.features = featureSet(&[_]Feature{
	809	.avr5,
	810	}),
	811	};
805	812	pub const atmega169 = CpuModel{
806	813	.name = "atmega169",
807	814	.llvm_name = "atmega169",
...	...	@@ -949,6 +956,13 @@ pub const cpu = struct {
949	956	.avr5,
950	957	}),
951	958	};
	959	pub const atmega324pb = CpuModel{
	960	.name = "atmega324pb",
	961	.llvm_name = "atmega324pb",
	962	.features = featureSet(&[_]Feature{
	963	.avr5,
	964	}),
	965	};
952	966	pub const atmega325 = CpuModel{
953	967	.name = "atmega325",
954	968	.llvm_name = "atmega325",
...	...	@@ -1019,6 +1033,13 @@ pub const cpu = struct {
1019	1033	.avr5,
1020	1034	}),
1021	1035	};
	1036	pub const atmega328pb = CpuModel{
	1037	.name = "atmega328pb",
	1038	.llvm_name = "atmega328pb",
	1039	.features = featureSet(&[_]Feature{
	1040	.avr5,
	1041	}),
	1042	};
1022	1043	pub const atmega329 = CpuModel{
1023	1044	.name = "atmega329",
1024	1045	.llvm_name = "atmega329",
...	...	@@ -1166,6 +1187,13 @@ pub const cpu = struct {
1166	1187	.avr4,
1167	1188	}),
1168	1189	};
	1190	pub const atmega48pb = CpuModel{
	1191	.name = "atmega48pb",
	1192	.llvm_name = "atmega48pb",
	1193	.features = featureSet(&[_]Feature{
	1194	.avr4,
	1195	}),
	1196	};
1169	1197	pub const atmega64 = CpuModel{
1170	1198	.name = "atmega64",
1171	1199	.llvm_name = "atmega64",
...	...	@@ -1338,7 +1366,11 @@ pub const cpu = struct {
1338	1366	.name = "atmega8",
1339	1367	.llvm_name = "atmega8",
1340	1368	.features = featureSet(&[_]Feature{
1341		.avr4,
	1369	.avr2,
	1370	.lpmx,
	1371	.movw,
	1372	.mul,
	1373	.spm,
1342	1374	}),
1343	1375	};
1344	1376	pub const atmega8515 = CpuModel{
...	...	@@ -1391,11 +1423,22 @@ pub const cpu = struct {
1391	1423	.avr4,
1392	1424	}),
1393	1425	};
	1426	pub const atmega88pb = CpuModel{
	1427	.name = "atmega88pb",
	1428	.llvm_name = "atmega88pb",
	1429	.features = featureSet(&[_]Feature{
	1430	.avr4,
	1431	}),
	1432	};
1394	1433	pub const atmega8a = CpuModel{
1395	1434	.name = "atmega8a",
1396	1435	.llvm_name = "atmega8a",
1397	1436	.features = featureSet(&[_]Feature{
1398		.avr4,
	1437	.avr2,
	1438	.lpmx,
	1439	.movw,
	1440	.mul,
	1441	.spm,
1399	1442	}),
1400	1443	};
1401	1444	pub const atmega8hva = CpuModel{
...	...	@@ -1595,6 +1638,13 @@ pub const cpu = struct {
1595	1638	.avr25,
1596	1639	}),
1597	1640	};
	1641	pub const attiny441 = CpuModel{
	1642	.name = "attiny441",
	1643	.llvm_name = "attiny441",
	1644	.features = featureSet(&[_]Feature{
	1645	.avr25,
	1646	}),
	1647	};
1598	1648	pub const attiny44a = CpuModel{
1599	1649	.name = "attiny44a",
1600	1650	.llvm_name = "attiny44a",
...	...	@@ -1651,6 +1701,13 @@ pub const cpu = struct {
1651	1701	.avr25,
1652	1702	}),
1653	1703	};
	1704	pub const attiny841 = CpuModel{
	1705	.name = "attiny841",
	1706	.llvm_name = "attiny841",
	1707	.features = featureSet(&[_]Feature{
	1708	.avr25,
	1709	}),
	1710	};
1654	1711	pub const attiny84a = CpuModel{
1655	1712	.name = "attiny84a",
1656	1713	.llvm_name = "attiny84a",
...	...	@@ -1802,7 +1859,7 @@ pub const cpu = struct {
1802	1859	.name = "atxmega16e5",
1803	1860	.llvm_name = "atxmega16e5",
1804	1861	.features = featureSet(&[_]Feature{
1805		.xmega,
	1862	.xmegau,
1806	1863	}),
1807	1864	};
1808	1865	pub const atxmega192a3 = CpuModel{
...	...	@@ -1907,7 +1964,7 @@ pub const cpu = struct {
1907	1964	.name = "atxmega32e5",
1908	1965	.llvm_name = "atxmega32e5",
1909	1966	.features = featureSet(&[_]Feature{
1910		.xmega,
	1967	.xmegau,
1911	1968	}),
1912	1969	};
1913	1970	pub const atxmega32x1 = CpuModel{
...	...	@@ -2005,7 +2062,7 @@ pub const cpu = struct {
2005	2062	.name = "atxmega8e5",
2006	2063	.llvm_name = "atxmega8e5",
2007	2064	.features = featureSet(&[_]Feature{
2008		.xmega,
	2065	.xmegau,
2009	2066	}),
2010	2067	};
2011	2068	pub const avr1 = CpuModel{

lib/std/target/bpf.zig+1

...	...	@@ -16,6 +16,7 @@ pub const Feature = enum {
16	16	pub usingnamespace CpuFeature.feature_set_fns(Feature);
17	17
18	18	pub const all_features = blk: {
	19	@setEvalBranchQuota(10000);
19	20	const len = @typeInfo(Feature).Enum.fields.len;
20	21	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
21	22	var result: [len]CpuFeature = undefined;

lib/std/target/hexagon.zig+1

...	...	@@ -44,6 +44,7 @@ pub const Feature = enum {
44	44	pub usingnamespace CpuFeature.feature_set_fns(Feature);
45	45
46	46	pub const all_features = blk: {
	47	@setEvalBranchQuota(10000);
47	48	const len = @typeInfo(Feature).Enum.fields.len;
48	49	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
49	50	var result: [len]CpuFeature = undefined;

lib/std/target/mips.zig+1

...	...	@@ -65,6 +65,7 @@ pub const Feature = enum {
65	65	pub usingnamespace CpuFeature.feature_set_fns(Feature);
66	66
67	67	pub const all_features = blk: {
	68	@setEvalBranchQuota(10000);
68	69	const len = @typeInfo(Feature).Enum.fields.len;
69	70	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
70	71	var result: [len]CpuFeature = undefined;

lib/std/target/msp430.zig+1

...	...	@@ -17,6 +17,7 @@ pub const Feature = enum {
17	17	pub usingnamespace CpuFeature.feature_set_fns(Feature);
18	18
19	19	pub const all_features = blk: {
	20	@setEvalBranchQuota(10000);
20	21	const len = @typeInfo(Feature).Enum.fields.len;
21	22	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
22	23	var result: [len]CpuFeature = undefined;

lib/std/target/nvptx.zig+1

...	...	@@ -41,6 +41,7 @@ pub const Feature = enum {
41	41	pub usingnamespace CpuFeature.feature_set_fns(Feature);
42	42
43	43	pub const all_features = blk: {
	44	@setEvalBranchQuota(10000);
44	45	const len = @typeInfo(Feature).Enum.fields.len;
45	46	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
46	47	var result: [len]CpuFeature = undefined;

lib/std/target/powerpc.zig+66-62

...	...	@@ -32,6 +32,7 @@ pub const Feature = enum {
32	32	fsqrt,
33	33	fuse_addi_load,
34	34	fuse_addis_load,
	35	fuse_store,
35	36	fusion,
36	37	hard_float,
37	38	htm,
...	...	@@ -44,7 +45,9 @@ pub const Feature = enum {
44	45	lfiwax,
45	46	longcall,
46	47	mfocrf,
	48	mma,
47	49	msync,
	50	paired_vector_memops,
48	51	partword_atomics,
49	52	pcrelative_memops,
50	53	popcntd,
...	...	@@ -59,7 +62,6 @@ pub const Feature = enum {
59	62	ppc6xx,
60	63	predictable_select_expensive,
61	64	prefix_instrs,
62		qpx,
63	65	recipprec,
64	66	secure_plt,
65	67	slow_popcntd,
...	...	@@ -73,6 +75,7 @@ pub const Feature = enum {
73	75	pub usingnamespace CpuFeature.feature_set_fns(Feature);
74	76
75	77	pub const all_features = blk: {
	78	@setEvalBranchQuota(10000);
76	79	const len = @typeInfo(Feature).Enum.fields.len;
77	80	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
78	81	var result: [len]CpuFeature = undefined;
...	...	@@ -228,6 +231,13 @@ pub const all_features = blk: {
228	231	.fusion,
229	232	}),
230	233	};
	234	result[@enumToInt(Feature.fuse_store)] = .{
	235	.llvm_name = "fuse-store",
	236	.description = "Target supports store clustering",
	237	.dependencies = featureSet(&[_]Feature{
	238	.fusion,
	239	}),
	240	};
231	241	result[@enumToInt(Feature.fusion)] = .{
232	242	.llvm_name = "fusion",
233	243	.description = "Target supports instruction fusion",
...	...	@@ -292,6 +302,15 @@ pub const all_features = blk: {
292	302	.description = "Enable the MFOCRF instruction",
293	303	.dependencies = featureSet(&[_]Feature{}),
294	304	};
	305	result[@enumToInt(Feature.mma)] = .{
	306	.llvm_name = "mma",
	307	.description = "Enable MMA instructions",
	308	.dependencies = featureSet(&[_]Feature{
	309	.paired_vector_memops,
	310	.power8_vector,
	311	.power9_altivec,
	312	}),
	313	};
295	314	result[@enumToInt(Feature.msync)] = .{
296	315	.llvm_name = "msync",
297	316	.description = "Has only the msync instruction instead of sync",
...	...	@@ -299,6 +318,13 @@ pub const all_features = blk: {
299	318	.booke,
300	319	}),
301	320	};
	321	result[@enumToInt(Feature.paired_vector_memops)] = .{
	322	.llvm_name = "paired-vector-memops",
	323	.description = "32Byte load and store instructions",
	324	.dependencies = featureSet(&[_]Feature{
	325	.isa_v30_instructions,
	326	}),
	327	};
302	328	result[@enumToInt(Feature.partword_atomics)] = .{
303	329	.llvm_name = "partword-atomics",
304	330	.description = "Enable l[bh]arx and st[bh]cx.",
...	...	@@ -309,6 +335,7 @@ pub const all_features = blk: {
309	335	.description = "Enable PC relative Memory Ops",
310	336	.dependencies = featureSet(&[_]Feature{
311	337	.isa_v30_instructions,
	338	.prefix_instrs,
312	339	}),
313	340	};
314	341	result[@enumToInt(Feature.popcntd)] = .{
...	...	@@ -390,13 +417,6 @@ pub const all_features = blk: {
390	417	.power9_altivec,
391	418	}),
392	419	};
393		result[@enumToInt(Feature.qpx)] = .{
394		.llvm_name = "qpx",
395		.description = "Enable QPX instructions",
396		.dependencies = featureSet(&[_]Feature{
397		.fpu,
398		}),
399		};
400	420	result[@enumToInt(Feature.recipprec)] = .{
401	421	.llvm_name = "recipprec",
402	422	.description = "Assume higher precision reciprocal estimates",
...	...	@@ -452,8 +472,8 @@ pub const all_features = blk: {
452	472	};
453	473
454	474	pub const cpu = struct {
455		pub const @"ppc440" = CpuModel{
456		.name = "ppc440",
	475	pub const @"440" = CpuModel{
	476	.name = "440",
457	477	.llvm_name = "440",
458	478	.features = featureSet(&[_]Feature{
459	479	.booke,
...	...	@@ -464,8 +484,8 @@ pub const cpu = struct {
464	484	.msync,
465	485	}),
466	486	};
467		pub const @"ppc450" = CpuModel{
468		.name = "ppc450",
	487	pub const @"450" = CpuModel{
	488	.name = "450",
469	489	.llvm_name = "450",
470	490	.features = featureSet(&[_]Feature{
471	491	.booke,
...	...	@@ -476,70 +496,70 @@ pub const cpu = struct {
476	496	.msync,
477	497	}),
478	498	};
479		pub const @"ppc601" = CpuModel{
480		.name = "ppc601",
	499	pub const @"601" = CpuModel{
	500	.name = "601",
481	501	.llvm_name = "601",
482	502	.features = featureSet(&[_]Feature{
483	503	.fpu,
484	504	}),
485	505	};
486		pub const @"ppc602" = CpuModel{
487		.name = "ppc602",
	506	pub const @"602" = CpuModel{
	507	.name = "602",
488	508	.llvm_name = "602",
489	509	.features = featureSet(&[_]Feature{
490	510	.fpu,
491	511	}),
492	512	};
493		pub const @"ppc603" = CpuModel{
494		.name = "ppc603",
	513	pub const @"603" = CpuModel{
	514	.name = "603",
495	515	.llvm_name = "603",
496	516	.features = featureSet(&[_]Feature{
497	517	.fres,
498	518	.frsqrte,
499	519	}),
500	520	};
501		pub const @"ppc603e" = CpuModel{
502		.name = "ppc603e",
	521	pub const @"603e" = CpuModel{
	522	.name = "603e",
503	523	.llvm_name = "603e",
504	524	.features = featureSet(&[_]Feature{
505	525	.fres,
506	526	.frsqrte,
507	527	}),
508	528	};
509		pub const @"ppc603ev" = CpuModel{
510		.name = "ppc603ev",
	529	pub const @"603ev" = CpuModel{
	530	.name = "603ev",
511	531	.llvm_name = "603ev",
512	532	.features = featureSet(&[_]Feature{
513	533	.fres,
514	534	.frsqrte,
515	535	}),
516	536	};
517		pub const @"ppc604" = CpuModel{
518		.name = "ppc604",
	537	pub const @"604" = CpuModel{
	538	.name = "604",
519	539	.llvm_name = "604",
520	540	.features = featureSet(&[_]Feature{
521	541	.fres,
522	542	.frsqrte,
523	543	}),
524	544	};
525		pub const @"ppc604e" = CpuModel{
526		.name = "ppc604e",
	545	pub const @"604e" = CpuModel{
	546	.name = "604e",
527	547	.llvm_name = "604e",
528	548	.features = featureSet(&[_]Feature{
529	549	.fres,
530	550	.frsqrte,
531	551	}),
532	552	};
533		pub const @"ppc620" = CpuModel{
534		.name = "ppc620",
	553	pub const @"620" = CpuModel{
	554	.name = "620",
535	555	.llvm_name = "620",
536	556	.features = featureSet(&[_]Feature{
537	557	.fres,
538	558	.frsqrte,
539	559	}),
540	560	};
541		pub const @"ppc7400" = CpuModel{
542		.name = "ppc7400",
	561	pub const @"7400" = CpuModel{
	562	.name = "7400",
543	563	.llvm_name = "7400",
544	564	.features = featureSet(&[_]Feature{
545	565	.altivec,
...	...	@@ -547,8 +567,8 @@ pub const cpu = struct {
547	567	.frsqrte,
548	568	}),
549	569	};
550		pub const @"ppc7450" = CpuModel{
551		.name = "ppc7450",
	570	pub const @"7450" = CpuModel{
	571	.name = "7450",
552	572	.llvm_name = "7450",
553	573	.features = featureSet(&[_]Feature{
554	574	.altivec,
...	...	@@ -556,16 +576,16 @@ pub const cpu = struct {
556	576	.frsqrte,
557	577	}),
558	578	};
559		pub const @"ppc750" = CpuModel{
560		.name = "ppc750",
	579	pub const @"750" = CpuModel{
	580	.name = "750",
561	581	.llvm_name = "750",
562	582	.features = featureSet(&[_]Feature{
563	583	.fres,
564	584	.frsqrte,
565	585	}),
566	586	};
567		pub const @"ppc970" = CpuModel{
568		.name = "ppc970",
	587	pub const @"970" = CpuModel{
	588	.name = "970",
569	589	.llvm_name = "970",
570	590	.features = featureSet(&[_]Feature{
571	591	.@"64bit",
...	...	@@ -602,32 +622,6 @@ pub const cpu = struct {
602	622	.stfiwx,
603	623	}),
604	624	};
605		pub const a2q = CpuModel{
606		.name = "a2q",
607		.llvm_name = "a2q",
608		.features = featureSet(&[_]Feature{
609		.@"64bit",
610		.booke,
611		.cmpb,
612		.fcpsgn,
613		.fpcvt,
614		.fprnd,
615		.fre,
616		.fres,
617		.frsqrte,
618		.frsqrtes,
619		.fsqrt,
620		.icbt,
621		.isel,
622		.ldbrx,
623		.lfiwax,
624		.mfocrf,
625		.qpx,
626		.recipprec,
627		.slow_popcntd,
628		.stfiwx,
629		}),
630		};
631	625	pub const e500 = CpuModel{
632	626	.name = "e500",
633	627	.llvm_name = "e500",
...	...	@@ -681,6 +675,7 @@ pub const cpu = struct {
681	675	.frsqrte,
682	676	.frsqrtes,
683	677	.fsqrt,
	678	.fuse_store,
684	679	.htm,
685	680	.icbt,
686	681	.isa_v30_instructions,
...	...	@@ -689,6 +684,8 @@ pub const cpu = struct {
689	684	.ldbrx,
690	685	.lfiwax,
691	686	.mfocrf,
	687	.mma,
	688	.paired_vector_memops,
692	689	.partword_atomics,
693	690	.pcrelative_memops,
694	691	.popcntd,
...	...	@@ -697,6 +694,8 @@ pub const cpu = struct {
697	694	.power8_vector,
698	695	.power9_altivec,
699	696	.power9_vector,
	697	.ppc_postra_sched,
	698	.ppc_prera_sched,
700	699	.predictable_select_expensive,
701	700	.prefix_instrs,
702	701	.recipprec,
...	...	@@ -837,6 +836,7 @@ pub const cpu = struct {
837	836	.frsqrte,
838	837	.frsqrtes,
839	838	.fsqrt,
	839	.fuse_store,
840	840	.htm,
841	841	.icbt,
842	842	.isa_v30_instructions,
...	...	@@ -845,6 +845,8 @@ pub const cpu = struct {
845	845	.ldbrx,
846	846	.lfiwax,
847	847	.mfocrf,
	848	.mma,
	849	.paired_vector_memops,
848	850	.partword_atomics,
849	851	.pcrelative_memops,
850	852	.popcntd,
...	...	@@ -853,6 +855,8 @@ pub const cpu = struct {
853	855	.power8_vector,
854	856	.power9_altivec,
855	857	.power9_vector,
	858	.ppc_postra_sched,
	859	.ppc_prera_sched,
856	860	.predictable_select_expensive,
857	861	.prefix_instrs,
858	862	.recipprec,

lib/std/target/riscv.zig+59-23

...	...	@@ -25,6 +25,9 @@ pub const Feature = enum {
25	25	experimental_zbr,
26	26	experimental_zbs,
27	27	experimental_zbt,
	28	experimental_zfh,
	29	experimental_zvamo,
	30	experimental_zvlsseg,
28	31	f,
29	32	m,
30	33	no_rvc_hints,
...	...	@@ -66,6 +69,7 @@ pub const Feature = enum {
66	69	pub usingnamespace CpuFeature.feature_set_fns(Feature);
67	70
68	71	pub const all_features = blk: {
	72	@setEvalBranchQuota(10000);
69	73	const len = @typeInfo(Feature).Enum.fields.len;
70	74	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
71	75	var result: [len]CpuFeature = undefined;
...	...	@@ -168,6 +172,27 @@ pub const all_features = blk: {
168	172	.description = "'Zbt' (Ternary 'B' Instructions)",
169	173	.dependencies = featureSet(&[_]Feature{}),
170	174	};
	175	result[@enumToInt(Feature.experimental_zfh)] = .{
	176	.llvm_name = "experimental-zfh",
	177	.description = "'Zfh' (Half-Precision Floating-Point)",
	178	.dependencies = featureSet(&[_]Feature{
	179	.f,
	180	}),
	181	};
	182	result[@enumToInt(Feature.experimental_zvamo)] = .{
	183	.llvm_name = "experimental-zvamo",
	184	.description = "'Zvamo'(Vector AMO Operations)",
	185	.dependencies = featureSet(&[_]Feature{
	186	.experimental_v,
	187	}),
	188	};
	189	result[@enumToInt(Feature.experimental_zvlsseg)] = .{
	190	.llvm_name = "experimental-zvlsseg",
	191	.description = "'Zvlsseg' (Vector segment load/store instructions)",
	192	.dependencies = featureSet(&[_]Feature{
	193	.experimental_v,
	194	}),
	195	};
171	196	result[@enumToInt(Feature.f)] = .{
172	197	.llvm_name = "f",
173	198	.description = "'F' (Single-Precision Floating-Point)",
...	...	@@ -357,29 +382,6 @@ pub const all_features = blk: {
357	382	};
358	383
359	384	pub const cpu = struct {
360		pub const baseline_rv32 = CpuModel{
361		.name = "baseline_rv32",
362		.llvm_name = null,
363		.features = featureSet(&[_]Feature{
364		.a,
365		.c,
366		.d,
367		.f,
368		.m,
369		}),
370		};
371		pub const baseline_rv64 = CpuModel{
372		.name = "baseline_rv64",
373		.llvm_name = null,
374		.features = featureSet(&[_]Feature{
375		.@"64bit",
376		.a,
377		.c,
378		.d,
379		.f,
380		.m,
381		}),
382		};
383	385	pub const generic_rv32 = CpuModel{
384	386	.name = "generic_rv32",
385	387	.llvm_name = "generic-rv32",
...	...	@@ -404,6 +406,18 @@ pub const cpu = struct {
404	406	.@"64bit",
405	407	}),
406	408	};
	409	pub const sifive_7_rv32 = CpuModel{
	410	.name = "sifive_7_rv32",
	411	.llvm_name = "sifive-7-rv32",
	412	.features = featureSet(&[_]Feature{}),
	413	};
	414	pub const sifive_7_rv64 = CpuModel{
	415	.name = "sifive_7_rv64",
	416	.llvm_name = "sifive-7-rv64",
	417	.features = featureSet(&[_]Feature{
	418	.@"64bit",
	419	}),
	420	};
407	421	pub const sifive_e31 = CpuModel{
408	422	.name = "sifive_e31",
409	423	.llvm_name = "sifive-e31",
...	...	@@ -413,6 +427,16 @@ pub const cpu = struct {
413	427	.m,
414	428	}),
415	429	};
	430	pub const sifive_e76 = CpuModel{
	431	.name = "sifive_e76",
	432	.llvm_name = "sifive-e76",
	433	.features = featureSet(&[_]Feature{
	434	.a,
	435	.c,
	436	.f,
	437	.m,
	438	}),
	439	};
416	440	pub const sifive_u54 = CpuModel{
417	441	.name = "sifive_u54",
418	442	.llvm_name = "sifive-u54",
...	...	@@ -425,4 +449,16 @@ pub const cpu = struct {
425	449	.m,
426	450	}),
427	451	};
	452	pub const sifive_u74 = CpuModel{
	453	.name = "sifive_u74",
	454	.llvm_name = "sifive-u74",
	455	.features = featureSet(&[_]Feature{
	456	.@"64bit",
	457	.a,
	458	.c,
	459	.d,
	460	.f,
	461	.m,
	462	}),
	463	};
428	464	};

lib/std/target/sparc.zig+6

...	...	@@ -32,6 +32,7 @@ pub const Feature = enum {
32	32	pub usingnamespace CpuFeature.feature_set_fns(Feature);
33	33
34	34	pub const all_features = blk: {
	35	@setEvalBranchQuota(10000);
35	36	const len = @typeInfo(Feature).Enum.fields.len;
36	37	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
37	38	var result: [len]CpuFeature = undefined;
...	...	@@ -160,6 +161,11 @@ pub const cpu = struct {
160	161	.llvm_name = "f934",
161	162	.features = featureSet(&[_]Feature{}),
162	163	};
	164	pub const generic = CpuModel{
	165	.name = "generic",
	166	.llvm_name = "generic",
	167	.features = featureSet(&[_]Feature{}),
	168	};
163	169	pub const gr712rc = CpuModel{
164	170	.name = "gr712rc",
165	171	.llvm_name = "gr712rc",

lib/std/target/systemz.zig+1

...	...	@@ -49,6 +49,7 @@ pub const Feature = enum {
49	49	pub usingnamespace CpuFeature.feature_set_fns(Feature);
50	50
51	51	pub const all_features = blk: {
	52	@setEvalBranchQuota(10000);
52	53	const len = @typeInfo(Feature).Enum.fields.len;
53	54	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
54	55	var result: [len]CpuFeature = undefined;

lib/std/target/wasm.zig+1

...	...	@@ -24,6 +24,7 @@ pub const Feature = enum {
24	24	pub usingnamespace CpuFeature.feature_set_fns(Feature);
25	25
26	26	pub const all_features = blk: {
	27	@setEvalBranchQuota(10000);
27	28	const len = @typeInfo(Feature).Enum.fields.len;
28	29	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
29	30	var result: [len]CpuFeature = undefined;

lib/std/target/x86.zig+330-423

...	...	@@ -8,9 +8,12 @@ const CpuFeature = std.Target.Cpu.Feature;
8	8	const CpuModel = std.Target.Cpu.Model;
9	9
10	10	pub const Feature = enum {
	11	@"16bit_mode",
	12	@"32bit_mode",
11	13	@"3dnow",
12	14	@"3dnowa",
13	15	@"64bit",
	16	@"64bit_mode",
14	17	adx,
15	18	aes,
16	19	amx_bf16,
...	...	@@ -33,6 +36,7 @@ pub const Feature = enum {
33	36	avx512vnni,
34	37	avx512vp2intersect,
35	38	avx512vpopcntdq,
	39	avxvnni,
36	40	bmi,
37	41	bmi2,
38	42	branchfusion,
...	...	@@ -64,11 +68,14 @@ pub const Feature = enum {
64	68	fma,
65	69	fma4,
66	70	fsgsbase,
	71	fsrm,
67	72	fxsr,
68	73	gfni,
	74	hreset,
69	75	idivl_to_divb,
70	76	idivq_to_divl,
71	77	invpcid,
	78	kl,
72	79	lea_sp,
73	80	lea_uses_ag,
74	81	lvi_cfi,
...	...	@@ -76,12 +83,10 @@ pub const Feature = enum {
76	83	lwp,
77	84	lzcnt,
78	85	macrofusion,
79		merge_to_threeway_branch,
80	86	mmx,
81	87	movbe,
82	88	movdir64b,
83	89	movdiri,
84		mpx,
85	90	mwaitx,
86	91	nopl,
87	92	pad_short_functions,
...	...	@@ -129,6 +134,7 @@ pub const Feature = enum {
129	134	ssse3,
130	135	tbm,
131	136	tsxldtrk,
	137	uintr,
132	138	use_aa,
133	139	use_glm_div_sqrt_costs,
134	140	vaes,
...	...	@@ -136,6 +142,7 @@ pub const Feature = enum {
136	142	vzeroupper,
137	143	waitpkg,
138	144	wbnoinvd,
	145	widekl,
139	146	x87,
140	147	xop,
141	148	xsave,
...	...	@@ -147,9 +154,20 @@ pub const Feature = enum {
147	154	pub usingnamespace CpuFeature.feature_set_fns(Feature);
148	155
149	156	pub const all_features = blk: {
	157	@setEvalBranchQuota(10000);
150	158	const len = @typeInfo(Feature).Enum.fields.len;
151	159	std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
152	160	var result: [len]CpuFeature = undefined;
	161	result[@enumToInt(Feature.@"16bit_mode")] = .{
	162	.llvm_name = "16bit-mode",
	163	.description = "16-bit mode (i8086)",
	164	.dependencies = featureSet(&[_]Feature{}),
	165	};
	166	result[@enumToInt(Feature.@"32bit_mode")] = .{
	167	.llvm_name = "32bit-mode",
	168	.description = "32-bit mode (80386)",
	169	.dependencies = featureSet(&[_]Feature{}),
	170	};
153	171	result[@enumToInt(Feature.@"3dnow")] = .{
154	172	.llvm_name = "3dnow",
155	173	.description = "Enable 3DNow! instructions",
...	...	@@ -169,6 +187,11 @@ pub const all_features = blk: {
169	187	.description = "Support 64-bit instructions",
170	188	.dependencies = featureSet(&[_]Feature{}),
171	189	};
	190	result[@enumToInt(Feature.@"64bit_mode")] = .{
	191	.llvm_name = "64bit-mode",
	192	.description = "64-bit mode (x86_64)",
	193	.dependencies = featureSet(&[_]Feature{}),
	194	};
172	195	result[@enumToInt(Feature.adx)] = .{
173	196	.llvm_name = "adx",
174	197	.description = "Support ADX instructions",
...	...	@@ -321,6 +344,13 @@ pub const all_features = blk: {
321	344	.avx512f,
322	345	}),
323	346	};
	347	result[@enumToInt(Feature.avxvnni)] = .{
	348	.llvm_name = "avxvnni",
	349	.description = "Support AVX_VNNI encoding",
	350	.dependencies = featureSet(&[_]Feature{
	351	.avx2,
	352	}),
	353	};
324	354	result[@enumToInt(Feature.bmi)] = .{
325	355	.llvm_name = "bmi",
326	356	.description = "Support BMI instructions",
...	...	@@ -485,6 +515,11 @@ pub const all_features = blk: {
485	515	.description = "Support FS/GS Base instructions",
486	516	.dependencies = featureSet(&[_]Feature{}),
487	517	};
	518	result[@enumToInt(Feature.fsrm)] = .{
	519	.llvm_name = "fsrm",
	520	.description = "REP MOVSB of short lengths is faster",
	521	.dependencies = featureSet(&[_]Feature{}),
	522	};
488	523	result[@enumToInt(Feature.fxsr)] = .{
489	524	.llvm_name = "fxsr",
490	525	.description = "Support fxsave/fxrestore instructions",
...	...	@@ -497,6 +532,11 @@ pub const all_features = blk: {
497	532	.sse2,
498	533	}),
499	534	};
	535	result[@enumToInt(Feature.hreset)] = .{
	536	.llvm_name = "hreset",
	537	.description = "Has hreset instruction",
	538	.dependencies = featureSet(&[_]Feature{}),
	539	};
500	540	result[@enumToInt(Feature.idivl_to_divb)] = .{
501	541	.llvm_name = "idivl-to-divb",
502	542	.description = "Use 8-bit divide for positive values less than 256",
...	...	@@ -512,6 +552,13 @@ pub const all_features = blk: {
512	552	.description = "Invalidate Process-Context Identifier",
513	553	.dependencies = featureSet(&[_]Feature{}),
514	554	};
	555	result[@enumToInt(Feature.kl)] = .{
	556	.llvm_name = "kl",
	557	.description = "Support Key Locker kl Instructions",
	558	.dependencies = featureSet(&[_]Feature{
	559	.sse2,
	560	}),
	561	};
515	562	result[@enumToInt(Feature.lea_sp)] = .{
516	563	.llvm_name = "lea-sp",
517	564	.description = "Use LEA for adjusting the stack pointer",
...	...	@@ -547,11 +594,6 @@ pub const all_features = blk: {
547	594	.description = "Various instructions can be fused with conditional branches",
548	595	.dependencies = featureSet(&[_]Feature{}),
549	596	};
550		result[@enumToInt(Feature.merge_to_threeway_branch)] = .{
551		.llvm_name = "merge-to-threeway-branch",
552		.description = "Merge branches to a three-way conditional branch",
553		.dependencies = featureSet(&[_]Feature{}),
554		};
555	597	result[@enumToInt(Feature.mmx)] = .{
556	598	.llvm_name = "mmx",
557	599	.description = "Enable MMX instructions",
...	...	@@ -572,11 +614,6 @@ pub const all_features = blk: {
572	614	.description = "Support movdiri instruction",
573	615	.dependencies = featureSet(&[_]Feature{}),
574	616	};
575		result[@enumToInt(Feature.mpx)] = .{
576		.llvm_name = "mpx",
577		.description = "Deprecated. Support MPX instructions",
578		.dependencies = featureSet(&[_]Feature{}),
579		};
580	617	result[@enumToInt(Feature.mwaitx)] = .{
581	618	.llvm_name = "mwaitx",
582	619	.description = "Enable MONITORX/MWAITX timer functionality",
...	...	@@ -691,7 +728,7 @@ pub const all_features = blk: {
691	728	};
692	729	result[@enumToInt(Feature.sahf)] = .{
693	730	.llvm_name = "sahf",
694		.description = "Support LAHF and SAHF instructions",
	731	.description = "Support LAHF and SAHF instructions in 64-bit mode",
695	732	.dependencies = featureSet(&[_]Feature{}),
696	733	};
697	734	result[@enumToInt(Feature.serialize)] = .{
...	...	@@ -835,6 +872,11 @@ pub const all_features = blk: {
835	872	.description = "Support TSXLDTRK instructions",
836	873	.dependencies = featureSet(&[_]Feature{}),
837	874	};
	875	result[@enumToInt(Feature.uintr)] = .{
	876	.llvm_name = "uintr",
	877	.description = "Has UINTR Instructions",
	878	.dependencies = featureSet(&[_]Feature{}),
	879	};
838	880	result[@enumToInt(Feature.use_aa)] = .{
839	881	.llvm_name = "use-aa",
840	882	.description = "Use alias analysis during codegen",
...	...	@@ -876,6 +918,13 @@ pub const all_features = blk: {
876	918	.description = "Write Back No Invalidate",
877	919	.dependencies = featureSet(&[_]Feature{}),
878	920	};
	921	result[@enumToInt(Feature.widekl)] = .{
	922	.llvm_name = "widekl",
	923	.description = "Support Key Locker wide Instructions",
	924	.dependencies = featureSet(&[_]Feature{
	925	.kl,
	926	}),
	927	};
879	928	result[@enumToInt(Feature.x87)] = .{
880	929	.llvm_name = "x87",
881	930	.description = "Enable X87 float instructions",
...	...	@@ -923,6 +972,53 @@ pub const all_features = blk: {
923	972	};
924	973
925	974	pub const cpu = struct {
	975	pub const alderlake = CpuModel{
	976	.name = "alderlake",
	977	.llvm_name = "alderlake",
	978	.features = featureSet(&[_]Feature{
	979	.@"64bit",
	980	.adx,
	981	.aes,
	982	.avx,
	983	.avx2,
	984	.avxvnni,
	985	.bmi,
	986	.bmi2,
	987	.cldemote,
	988	.clflushopt,
	989	.cmov,
	990	.cx16,
	991	.cx8,
	992	.ermsb,
	993	.f16c,
	994	.fma,
	995	.fsgsbase,
	996	.fxsr,
	997	.hreset,
	998	.invpcid,
	999	.lzcnt,
	1000	.mmx,
	1001	.movbe,
	1002	.nopl,
	1003	.pclmul,
	1004	.popcnt,
	1005	.prfchw,
	1006	.ptwrite,
	1007	.rdrnd,
	1008	.rdseed,
	1009	.sahf,
	1010	.serialize,
	1011	.sgx,
	1012	.sse2,
	1013	.sse4_2,
	1014	.waitpkg,
	1015	.x87,
	1016	.xsave,
	1017	.xsavec,
	1018	.xsaveopt,
	1019	.xsaves,
	1020	}),
	1021	};
926	1022	pub const amdfam10 = CpuModel{
927	1023	.name = "amdfam10",
928	1024	.llvm_name = "amdfam10",
...	...	@@ -932,16 +1028,13 @@ pub const cpu = struct {
932	1028	.cmov,
933	1029	.cx16,
934	1030	.cx8,
935		.fast_scalar_shift_masks,
936	1031	.fxsr,
937	1032	.lzcnt,
938	1033	.nopl,
939	1034	.popcnt,
940	1035	.prfchw,
941	1036	.sahf,
942		.slow_shld,
943	1037	.sse4a,
944		.vzeroupper,
945	1038	.x87,
946	1039	}),
947	1040	};
...	...	@@ -953,9 +1046,6 @@ pub const cpu = struct {
953	1046	.cmov,
954	1047	.cx8,
955	1048	.nopl,
956		.slow_shld,
957		.slow_unaligned_mem_16,
958		.vzeroupper,
959	1049	.x87,
960	1050	}),
961	1051	};
...	...	@@ -968,10 +1058,7 @@ pub const cpu = struct {
968	1058	.cx8,
969	1059	.fxsr,
970	1060	.nopl,
971		.slow_shld,
972		.slow_unaligned_mem_16,
973	1061	.sse,
974		.vzeroupper,
975	1062	.x87,
976	1063	}),
977	1064	};
...	...	@@ -983,13 +1070,9 @@ pub const cpu = struct {
983	1070	.@"64bit",
984	1071	.cmov,
985	1072	.cx8,
986		.fast_scalar_shift_masks,
987	1073	.fxsr,
988	1074	.nopl,
989		.slow_shld,
990		.slow_unaligned_mem_16,
991	1075	.sse2,
992		.vzeroupper,
993	1076	.x87,
994	1077	}),
995	1078	};
...	...	@@ -1002,10 +1085,7 @@ pub const cpu = struct {
1002	1085	.cx8,
1003	1086	.fxsr,
1004	1087	.nopl,
1005		.slow_shld,
1006		.slow_unaligned_mem_16,
1007	1088	.sse,
1008		.vzeroupper,
1009	1089	.x87,
1010	1090	}),
1011	1091	};
...	...	@@ -1017,9 +1097,6 @@ pub const cpu = struct {
1017	1097	.cmov,
1018	1098	.cx8,
1019	1099	.nopl,
1020		.slow_shld,
1021		.slow_unaligned_mem_16,
1022		.vzeroupper,
1023	1100	.x87,
1024	1101	}),
1025	1102	};
...	...	@@ -1032,10 +1109,7 @@ pub const cpu = struct {
1032	1109	.cx8,
1033	1110	.fxsr,
1034	1111	.nopl,
1035		.slow_shld,
1036		.slow_unaligned_mem_16,
1037	1112	.sse,
1038		.vzeroupper,
1039	1113	.x87,
1040	1114	}),
1041	1115	};
...	...	@@ -1047,13 +1121,9 @@ pub const cpu = struct {
1047	1121	.@"64bit",
1048	1122	.cmov,
1049	1123	.cx8,
1050		.fast_scalar_shift_masks,
1051	1124	.fxsr,
1052	1125	.nopl,
1053		.slow_shld,
1054		.slow_unaligned_mem_16,
1055	1126	.sse2,
1056		.vzeroupper,
1057	1127	.x87,
1058	1128	}),
1059	1129	};
...	...	@@ -1066,13 +1136,9 @@ pub const cpu = struct {
1066	1136	.cmov,
1067	1137	.cx16,
1068	1138	.cx8,
1069		.fast_scalar_shift_masks,
1070	1139	.fxsr,
1071	1140	.nopl,
1072		.slow_shld,
1073		.slow_unaligned_mem_16,
1074	1141	.sse3,
1075		.vzeroupper,
1076	1142	.x87,
1077	1143	}),
1078	1144	};
...	...	@@ -1085,19 +1151,11 @@ pub const cpu = struct {
1085	1151	.cx16,
1086	1152	.cx8,
1087	1153	.fxsr,
1088		.idivl_to_divb,
1089		.idivq_to_divl,
1090		.lea_sp,
1091		.lea_uses_ag,
1092	1154	.mmx,
1093	1155	.movbe,
1094	1156	.nopl,
1095		.pad_short_functions,
1096	1157	.sahf,
1097		.slow_two_mem_ops,
1098		.slow_unaligned_mem_16,
1099	1158	.ssse3,
1100		.vzeroupper,
1101	1159	.x87,
1102	1160	}),
1103	1161	};
...	...	@@ -1110,16 +1168,13 @@ pub const cpu = struct {
1110	1168	.cmov,
1111	1169	.cx16,
1112	1170	.cx8,
1113		.fast_scalar_shift_masks,
1114	1171	.fxsr,
1115	1172	.lzcnt,
1116	1173	.nopl,
1117	1174	.popcnt,
1118	1175	.prfchw,
1119	1176	.sahf,
1120		.slow_shld,
1121	1177	.sse4a,
1122		.vzeroupper,
1123	1178	.x87,
1124	1179	}),
1125	1180	};
...	...	@@ -1129,12 +1184,9 @@ pub const cpu = struct {
1129	1184	.features = featureSet(&[_]Feature{
1130	1185	.@"64bit",
1131	1186	.aes,
1132		.branchfusion,
1133	1187	.cmov,
1134	1188	.cx16,
1135	1189	.cx8,
1136		.fast_11bytenop,
1137		.fast_scalar_shift_masks,
1138	1190	.fxsr,
1139	1191	.lwp,
1140	1192	.lzcnt,
...	...	@@ -1144,8 +1196,6 @@ pub const cpu = struct {
1144	1196	.popcnt,
1145	1197	.prfchw,
1146	1198	.sahf,
1147		.slow_shld,
1148		.vzeroupper,
1149	1199	.x87,
1150	1200	.xop,
1151	1201	.xsave,
...	...	@@ -1158,14 +1208,11 @@ pub const cpu = struct {
1158	1208	.@"64bit",
1159	1209	.aes,
1160	1210	.bmi,
1161		.branchfusion,
1162	1211	.cmov,
1163	1212	.cx16,
1164	1213	.cx8,
1165	1214	.f16c,
1166		.fast_11bytenop,
1167	1215	.fast_bextr,
1168		.fast_scalar_shift_masks,
1169	1216	.fma,
1170	1217	.fxsr,
1171	1218	.lwp,
...	...	@@ -1176,9 +1223,7 @@ pub const cpu = struct {
1176	1223	.popcnt,
1177	1224	.prfchw,
1178	1225	.sahf,
1179		.slow_shld,
1180	1226	.tbm,
1181		.vzeroupper,
1182	1227	.x87,
1183	1228	.xop,
1184	1229	.xsave,
...	...	@@ -1191,14 +1236,11 @@ pub const cpu = struct {
1191	1236	.@"64bit",
1192	1237	.aes,
1193	1238	.bmi,
1194		.branchfusion,
1195	1239	.cmov,
1196	1240	.cx16,
1197	1241	.cx8,
1198	1242	.f16c,
1199		.fast_11bytenop,
1200	1243	.fast_bextr,
1201		.fast_scalar_shift_masks,
1202	1244	.fma,
1203	1245	.fsgsbase,
1204	1246	.fxsr,
...	...	@@ -1210,9 +1252,7 @@ pub const cpu = struct {
1210	1252	.popcnt,
1211	1253	.prfchw,
1212	1254	.sahf,
1213		.slow_shld,
1214	1255	.tbm,
1215		.vzeroupper,
1216	1256	.x87,
1217	1257	.xop,
1218	1258	.xsave,
...	...	@@ -1228,14 +1268,11 @@ pub const cpu = struct {
1228	1268	.avx2,
1229	1269	.bmi,
1230	1270	.bmi2,
1231		.branchfusion,
1232	1271	.cmov,
1233	1272	.cx16,
1234	1273	.cx8,
1235	1274	.f16c,
1236		.fast_11bytenop,
1237	1275	.fast_bextr,
1238		.fast_scalar_shift_masks,
1239	1276	.fma,
1240	1277	.fsgsbase,
1241	1278	.fxsr,
...	...	@@ -1250,9 +1287,7 @@ pub const cpu = struct {
1250	1287	.prfchw,
1251	1288	.rdrnd,
1252	1289	.sahf,
1253		.slow_shld,
1254	1290	.tbm,
1255		.vzeroupper,
1256	1291	.x87,
1257	1292	.xop,
1258	1293	.xsave,
...	...	@@ -1268,19 +1303,11 @@ pub const cpu = struct {
1268	1303	.cx16,
1269	1304	.cx8,
1270	1305	.fxsr,
1271		.idivl_to_divb,
1272		.idivq_to_divl,
1273		.lea_sp,
1274		.lea_uses_ag,
1275	1306	.mmx,
1276	1307	.movbe,
1277	1308	.nopl,
1278		.pad_short_functions,
1279	1309	.sahf,
1280		.slow_two_mem_ops,
1281		.slow_unaligned_mem_16,
1282	1310	.ssse3,
1283		.vzeroupper,
1284	1311	.x87,
1285	1312	}),
1286	1313	};
...	...	@@ -1299,20 +1326,11 @@ pub const cpu = struct {
1299	1326	.cx8,
1300	1327	.ermsb,
1301	1328	.f16c,
1302		.false_deps_lzcnt_tzcnt,
1303		.false_deps_popcnt,
1304		.fast_15bytenop,
1305		.fast_scalar_fsqrt,
1306		.fast_shld_rotate,
1307		.fast_variable_shuffle,
1308	1329	.fma,
1309	1330	.fsgsbase,
1310	1331	.fxsr,
1311		.idivq_to_divl,
1312	1332	.invpcid,
1313	1333	.lzcnt,
1314		.macrofusion,
1315		.merge_to_threeway_branch,
1316	1334	.mmx,
1317	1335	.movbe,
1318	1336	.nopl,
...	...	@@ -1322,9 +1340,8 @@ pub const cpu = struct {
1322	1340	.rdrnd,
1323	1341	.rdseed,
1324	1342	.sahf,
1325		.slow_3ops_lea,
	1343	.sse2,
1326	1344	.sse4_2,
1327		.vzeroupper,
1328	1345	.x87,
1329	1346	.xsave,
1330	1347	.xsaveopt,
...	...	@@ -1338,9 +1355,6 @@ pub const cpu = struct {
1338	1355	.cmov,
1339	1356	.cx16,
1340	1357	.cx8,
1341		.fast_15bytenop,
1342		.fast_scalar_shift_masks,
1343		.fast_vector_shift_masks,
1344	1358	.fxsr,
1345	1359	.lzcnt,
1346	1360	.mmx,
...	...	@@ -1348,10 +1362,8 @@ pub const cpu = struct {
1348	1362	.popcnt,
1349	1363	.prfchw,
1350	1364	.sahf,
1351		.slow_shld,
1352	1365	.sse4a,
1353	1366	.ssse3,
1354		.vzeroupper,
1355	1367	.x87,
1356	1368	}),
1357	1369	};
...	...	@@ -1367,12 +1379,6 @@ pub const cpu = struct {
1367	1379	.cx16,
1368	1380	.cx8,
1369	1381	.f16c,
1370		.fast_15bytenop,
1371		.fast_bextr,
1372		.fast_hops,
1373		.fast_lzcnt,
1374		.fast_scalar_shift_masks,
1375		.fast_vector_shift_masks,
1376	1382	.fxsr,
1377	1383	.lzcnt,
1378	1384	.mmx,
...	...	@@ -1382,7 +1388,6 @@ pub const cpu = struct {
1382	1388	.popcnt,
1383	1389	.prfchw,
1384	1390	.sahf,
1385		.slow_shld,
1386	1391	.sse4a,
1387	1392	.ssse3,
1388	1393	.x87,
...	...	@@ -1395,8 +1400,6 @@ pub const cpu = struct {
1395	1400	.llvm_name = "c3",
1396	1401	.features = featureSet(&[_]Feature{
1397	1402	.@"3dnow",
1398		.slow_unaligned_mem_16,
1399		.vzeroupper,
1400	1403	.x87,
1401	1404	}),
1402	1405	};
...	...	@@ -1408,9 +1411,7 @@ pub const cpu = struct {
1408	1411	.cx8,
1409	1412	.fxsr,
1410	1413	.mmx,
1411		.slow_unaligned_mem_16,
1412	1414	.sse,
1413		.vzeroupper,
1414	1415	.x87,
1415	1416	}),
1416	1417	};
...	...	@@ -1438,36 +1439,25 @@ pub const cpu = struct {
1438	1439	.cx8,
1439	1440	.ermsb,
1440	1441	.f16c,
1441		.fast_15bytenop,
1442		.fast_gather,
1443		.fast_scalar_fsqrt,
1444		.fast_shld_rotate,
1445		.fast_variable_shuffle,
1446		.fast_vector_fsqrt,
1447	1442	.fma,
1448	1443	.fsgsbase,
1449	1444	.fxsr,
1450		.idivq_to_divl,
1451	1445	.invpcid,
1452	1446	.lzcnt,
1453		.macrofusion,
1454		.merge_to_threeway_branch,
1455	1447	.mmx,
1456	1448	.movbe,
1457	1449	.nopl,
1458	1450	.pclmul,
1459	1451	.pku,
1460	1452	.popcnt,
1461		.prefer_256_bit,
1462	1453	.prfchw,
1463	1454	.rdrnd,
1464	1455	.rdseed,
1465	1456	.sahf,
1466	1457	.sgx,
1467	1458	.sha,
1468		.slow_3ops_lea,
	1459	.sse2,
1469	1460	.sse4_2,
1470		.vzeroupper,
1471	1461	.x87,
1472	1462	.xsave,
1473	1463	.xsavec,
...	...	@@ -1499,35 +1489,23 @@ pub const cpu = struct {
1499	1489	.cx8,
1500	1490	.ermsb,
1501	1491	.f16c,
1502		.false_deps_popcnt,
1503		.fast_15bytenop,
1504		.fast_gather,
1505		.fast_scalar_fsqrt,
1506		.fast_shld_rotate,
1507		.fast_variable_shuffle,
1508		.fast_vector_fsqrt,
1509	1492	.fma,
1510	1493	.fsgsbase,
1511	1494	.fxsr,
1512		.idivq_to_divl,
1513	1495	.invpcid,
1514	1496	.lzcnt,
1515		.macrofusion,
1516		.merge_to_threeway_branch,
1517	1497	.mmx,
1518	1498	.movbe,
1519	1499	.nopl,
1520	1500	.pclmul,
1521	1501	.pku,
1522	1502	.popcnt,
1523		.prefer_256_bit,
1524	1503	.prfchw,
1525	1504	.rdrnd,
1526	1505	.rdseed,
1527	1506	.sahf,
1528		.slow_3ops_lea,
	1507	.sse2,
1529	1508	.sse4_2,
1530		.vzeroupper,
1531	1509	.x87,
1532	1510	.xsave,
1533	1511	.xsavec,
...	...	@@ -1560,35 +1538,23 @@ pub const cpu = struct {
1560	1538	.cx8,
1561	1539	.ermsb,
1562	1540	.f16c,
1563		.false_deps_popcnt,
1564		.fast_15bytenop,
1565		.fast_gather,
1566		.fast_scalar_fsqrt,
1567		.fast_shld_rotate,
1568		.fast_variable_shuffle,
1569		.fast_vector_fsqrt,
1570	1541	.fma,
1571	1542	.fsgsbase,
1572	1543	.fxsr,
1573		.idivq_to_divl,
1574	1544	.invpcid,
1575	1545	.lzcnt,
1576		.macrofusion,
1577		.merge_to_threeway_branch,
1578	1546	.mmx,
1579	1547	.movbe,
1580	1548	.nopl,
1581	1549	.pclmul,
1582	1550	.pku,
1583	1551	.popcnt,
1584		.prefer_256_bit,
1585	1552	.prfchw,
1586	1553	.rdrnd,
1587	1554	.rdseed,
1588	1555	.sahf,
1589		.slow_3ops_lea,
	1556	.sse2,
1590	1557	.sse4_2,
1591		.vzeroupper,
1592	1558	.x87,
1593	1559	.xsave,
1594	1560	.xsavec,
...	...	@@ -1606,25 +1572,16 @@ pub const cpu = struct {
1606	1572	.cx16,
1607	1573	.cx8,
1608	1574	.f16c,
1609		.false_deps_popcnt,
1610		.fast_15bytenop,
1611		.fast_scalar_fsqrt,
1612		.fast_shld_rotate,
1613	1575	.fsgsbase,
1614	1576	.fxsr,
1615		.idivq_to_divl,
1616		.macrofusion,
1617		.merge_to_threeway_branch,
1618	1577	.mmx,
1619	1578	.nopl,
1620	1579	.pclmul,
1621	1580	.popcnt,
1622	1581	.rdrnd,
1623	1582	.sahf,
1624		.slow_3ops_lea,
1625		.slow_unaligned_mem_32,
	1583	.sse2,
1626	1584	.sse4_2,
1627		.vzeroupper,
1628	1585	.x87,
1629	1586	.xsave,
1630	1587	.xsaveopt,
...	...	@@ -1644,20 +1601,11 @@ pub const cpu = struct {
1644	1601	.cx8,
1645	1602	.ermsb,
1646	1603	.f16c,
1647		.false_deps_lzcnt_tzcnt,
1648		.false_deps_popcnt,
1649		.fast_15bytenop,
1650		.fast_scalar_fsqrt,
1651		.fast_shld_rotate,
1652		.fast_variable_shuffle,
1653	1604	.fma,
1654	1605	.fsgsbase,
1655	1606	.fxsr,
1656		.idivq_to_divl,
1657	1607	.invpcid,
1658	1608	.lzcnt,
1659		.macrofusion,
1660		.merge_to_threeway_branch,
1661	1609	.mmx,
1662	1610	.movbe,
1663	1611	.nopl,
...	...	@@ -1665,9 +1613,8 @@ pub const cpu = struct {
1665	1613	.popcnt,
1666	1614	.rdrnd,
1667	1615	.sahf,
1668		.slow_3ops_lea,
	1616	.sse2,
1669	1617	.sse4_2,
1670		.vzeroupper,
1671	1618	.x87,
1672	1619	.xsave,
1673	1620	.xsaveopt,
...	...	@@ -1682,13 +1629,10 @@ pub const cpu = struct {
1682	1629	.cx16,
1683	1630	.cx8,
1684	1631	.fxsr,
1685		.macrofusion,
1686	1632	.mmx,
1687	1633	.nopl,
1688	1634	.sahf,
1689		.slow_unaligned_mem_16,
1690	1635	.ssse3,
1691		.vzeroupper,
1692	1636	.x87,
1693	1637	}),
1694	1638	};
...	...	@@ -1701,13 +1645,12 @@ pub const cpu = struct {
1701	1645	.cx16,
1702	1646	.cx8,
1703	1647	.fxsr,
1704		.macrofusion,
1705	1648	.mmx,
1706	1649	.nopl,
1707	1650	.popcnt,
1708	1651	.sahf,
	1652	.sse2,
1709	1653	.sse4_2,
1710		.vzeroupper,
1711	1654	.x87,
1712	1655	}),
1713	1656	};
...	...	@@ -1720,23 +1663,14 @@ pub const cpu = struct {
1720	1663	.cmov,
1721	1664	.cx16,
1722	1665	.cx8,
1723		.false_deps_popcnt,
1724		.fast_15bytenop,
1725		.fast_scalar_fsqrt,
1726		.fast_shld_rotate,
1727	1666	.fxsr,
1728		.idivq_to_divl,
1729		.macrofusion,
1730		.merge_to_threeway_branch,
1731	1667	.mmx,
1732	1668	.nopl,
1733	1669	.pclmul,
1734	1670	.popcnt,
1735	1671	.sahf,
1736		.slow_3ops_lea,
1737		.slow_unaligned_mem_32,
	1672	.sse2,
1738	1673	.sse4_2,
1739		.vzeroupper,
1740	1674	.x87,
1741	1675	.xsave,
1742	1676	.xsaveopt,
...	...	@@ -1746,9 +1680,8 @@ pub const cpu = struct {
1746	1680	.name = "generic",
1747	1681	.llvm_name = "generic",
1748	1682	.features = featureSet(&[_]Feature{
	1683	.@"64bit",
1749	1684	.cx8,
1750		.slow_unaligned_mem_16,
1751		.vzeroupper,
1752	1685	.x87,
1753	1686	}),
1754	1687	};
...	...	@@ -1758,8 +1691,6 @@ pub const cpu = struct {
1758	1691	.features = featureSet(&[_]Feature{
1759	1692	.@"3dnowa",
1760	1693	.cx8,
1761		.slow_unaligned_mem_16,
1762		.vzeroupper,
1763	1694	.x87,
1764	1695	}),
1765	1696	};
...	...	@@ -1773,7 +1704,6 @@ pub const cpu = struct {
1773	1704	.cmov,
1774	1705	.cx16,
1775	1706	.cx8,
1776		.false_deps_popcnt,
1777	1707	.fsgsbase,
1778	1708	.fxsr,
1779	1709	.mmx,
...	...	@@ -1786,13 +1716,8 @@ pub const cpu = struct {
1786	1716	.rdseed,
1787	1717	.sahf,
1788	1718	.sha,
1789		.slow_incdec,
1790		.slow_lea,
1791		.slow_two_mem_ops,
1792	1719	.sse4_2,
1793	1720	.ssse3,
1794		.use_glm_div_sqrt_costs,
1795		.vzeroupper,
1796	1721	.x87,
1797	1722	.xsave,
1798	1723	.xsavec,
...	...	@@ -1825,13 +1750,8 @@ pub const cpu = struct {
1825	1750	.sahf,
1826	1751	.sgx,
1827	1752	.sha,
1828		.slow_incdec,
1829		.slow_lea,
1830		.slow_two_mem_ops,
1831	1753	.sse4_2,
1832	1754	.ssse3,
1833		.use_glm_div_sqrt_costs,
1834		.vzeroupper,
1835	1755	.x87,
1836	1756	.xsave,
1837	1757	.xsavec,
...	...	@@ -1853,20 +1773,11 @@ pub const cpu = struct {
1853	1773	.cx8,
1854	1774	.ermsb,
1855	1775	.f16c,
1856		.false_deps_lzcnt_tzcnt,
1857		.false_deps_popcnt,
1858		.fast_15bytenop,
1859		.fast_scalar_fsqrt,
1860		.fast_shld_rotate,
1861		.fast_variable_shuffle,
1862	1776	.fma,
1863	1777	.fsgsbase,
1864	1778	.fxsr,
1865		.idivq_to_divl,
1866	1779	.invpcid,
1867	1780	.lzcnt,
1868		.macrofusion,
1869		.merge_to_threeway_branch,
1870	1781	.mmx,
1871	1782	.movbe,
1872	1783	.nopl,
...	...	@@ -1874,9 +1785,8 @@ pub const cpu = struct {
1874	1785	.popcnt,
1875	1786	.rdrnd,
1876	1787	.sahf,
1877		.slow_3ops_lea,
	1788	.sse2,
1878	1789	.sse4_2,
1879		.vzeroupper,
1880	1790	.x87,
1881	1791	.xsave,
1882	1792	.xsaveopt,
...	...	@@ -1886,8 +1796,6 @@ pub const cpu = struct {
1886	1796	.name = "_i386",
1887	1797	.llvm_name = "i386",
1888	1798	.features = featureSet(&[_]Feature{
1889		.slow_unaligned_mem_16,
1890		.vzeroupper,
1891	1799	.x87,
1892	1800	}),
1893	1801	};
...	...	@@ -1895,8 +1803,6 @@ pub const cpu = struct {
1895	1803	.name = "_i486",
1896	1804	.llvm_name = "i486",
1897	1805	.features = featureSet(&[_]Feature{
1898		.slow_unaligned_mem_16,
1899		.vzeroupper,
1900	1806	.x87,
1901	1807	}),
1902	1808	};
...	...	@@ -1905,8 +1811,6 @@ pub const cpu = struct {
1905	1811	.llvm_name = "i586",
1906	1812	.features = featureSet(&[_]Feature{
1907	1813	.cx8,
1908		.slow_unaligned_mem_16,
1909		.vzeroupper,
1910	1814	.x87,
1911	1815	}),
1912	1816	};
...	...	@@ -1916,8 +1820,6 @@ pub const cpu = struct {
1916	1820	.features = featureSet(&[_]Feature{
1917	1821	.cmov,
1918	1822	.cx8,
1919		.slow_unaligned_mem_16,
1920		.vzeroupper,
1921	1823	.x87,
1922	1824	}),
1923	1825	};
...	...	@@ -1950,28 +1852,19 @@ pub const cpu = struct {
1950	1852	.cx8,
1951	1853	.ermsb,
1952	1854	.f16c,
1953		.fast_15bytenop,
1954		.fast_gather,
1955		.fast_scalar_fsqrt,
1956		.fast_shld_rotate,
1957		.fast_variable_shuffle,
1958		.fast_vector_fsqrt,
1959	1855	.fma,
1960	1856	.fsgsbase,
	1857	.fsrm,
1961	1858	.fxsr,
1962	1859	.gfni,
1963		.idivq_to_divl,
1964	1860	.invpcid,
1965	1861	.lzcnt,
1966		.macrofusion,
1967		.merge_to_threeway_branch,
1968	1862	.mmx,
1969	1863	.movbe,
1970	1864	.nopl,
1971	1865	.pclmul,
1972	1866	.pku,
1973	1867	.popcnt,
1974		.prefer_256_bit,
1975	1868	.prfchw,
1976	1869	.rdpid,
1977	1870	.rdrnd,
...	...	@@ -1979,11 +1872,10 @@ pub const cpu = struct {
1979	1872	.sahf,
1980	1873	.sgx,
1981	1874	.sha,
1982		.slow_3ops_lea,
	1875	.sse2,
1983	1876	.sse4_2,
1984	1877	.vaes,
1985	1878	.vpclmulqdq,
1986		.vzeroupper,
1987	1879	.x87,
1988	1880	.xsave,
1989	1881	.xsavec,
...	...	@@ -2020,21 +1912,13 @@ pub const cpu = struct {
2020	1912	.cx8,
2021	1913	.ermsb,
2022	1914	.f16c,
2023		.fast_15bytenop,
2024		.fast_gather,
2025		.fast_scalar_fsqrt,
2026		.fast_shld_rotate,
2027		.fast_variable_shuffle,
2028		.fast_vector_fsqrt,
2029	1915	.fma,
2030	1916	.fsgsbase,
	1917	.fsrm,
2031	1918	.fxsr,
2032	1919	.gfni,
2033		.idivq_to_divl,
2034	1920	.invpcid,
2035	1921	.lzcnt,
2036		.macrofusion,
2037		.merge_to_threeway_branch,
2038	1922	.mmx,
2039	1923	.movbe,
2040	1924	.nopl,
...	...	@@ -2042,7 +1926,6 @@ pub const cpu = struct {
2042	1926	.pconfig,
2043	1927	.pku,
2044	1928	.popcnt,
2045		.prefer_256_bit,
2046	1929	.prfchw,
2047	1930	.rdpid,
2048	1931	.rdrnd,
...	...	@@ -2050,11 +1933,10 @@ pub const cpu = struct {
2050	1933	.sahf,
2051	1934	.sgx,
2052	1935	.sha,
2053		.slow_3ops_lea,
	1936	.sse2,
2054	1937	.sse4_2,
2055	1938	.vaes,
2056	1939	.vpclmulqdq,
2057		.vzeroupper,
2058	1940	.wbnoinvd,
2059	1941	.x87,
2060	1942	.xsave,
...	...	@@ -2073,25 +1955,16 @@ pub const cpu = struct {
2073	1955	.cx16,
2074	1956	.cx8,
2075	1957	.f16c,
2076		.false_deps_popcnt,
2077		.fast_15bytenop,
2078		.fast_scalar_fsqrt,
2079		.fast_shld_rotate,
2080	1958	.fsgsbase,
2081	1959	.fxsr,
2082		.idivq_to_divl,
2083		.macrofusion,
2084		.merge_to_threeway_branch,
2085	1960	.mmx,
2086	1961	.nopl,
2087	1962	.pclmul,
2088	1963	.popcnt,
2089	1964	.rdrnd,
2090	1965	.sahf,
2091		.slow_3ops_lea,
2092		.slow_unaligned_mem_32,
	1966	.sse2,
2093	1967	.sse4_2,
2094		.vzeroupper,
2095	1968	.x87,
2096	1969	.xsave,
2097	1970	.xsaveopt,
...	...	@@ -2103,8 +1976,6 @@ pub const cpu = struct {
2103	1976	.features = featureSet(&[_]Feature{
2104	1977	.cx8,
2105	1978	.mmx,
2106		.slow_unaligned_mem_16,
2107		.vzeroupper,
2108	1979	.x87,
2109	1980	}),
2110	1981	};
...	...	@@ -2114,8 +1985,6 @@ pub const cpu = struct {
2114	1985	.features = featureSet(&[_]Feature{
2115	1986	.@"3dnow",
2116	1987	.cx8,
2117		.slow_unaligned_mem_16,
2118		.vzeroupper,
2119	1988	.x87,
2120	1989	}),
2121	1990	};
...	...	@@ -2125,8 +1994,6 @@ pub const cpu = struct {
2125	1994	.features = featureSet(&[_]Feature{
2126	1995	.@"3dnow",
2127	1996	.cx8,
2128		.slow_unaligned_mem_16,
2129		.vzeroupper,
2130	1997	.x87,
2131	1998	}),
2132	1999	};
...	...	@@ -2138,13 +2005,9 @@ pub const cpu = struct {
2138	2005	.@"64bit",
2139	2006	.cmov,
2140	2007	.cx8,
2141		.fast_scalar_shift_masks,
2142	2008	.fxsr,
2143	2009	.nopl,
2144		.slow_shld,
2145		.slow_unaligned_mem_16,
2146	2010	.sse2,
2147		.vzeroupper,
2148	2011	.x87,
2149	2012	}),
2150	2013	};
...	...	@@ -2157,13 +2020,9 @@ pub const cpu = struct {
2157	2020	.cmov,
2158	2021	.cx16,
2159	2022	.cx8,
2160		.fast_scalar_shift_masks,
2161	2023	.fxsr,
2162	2024	.nopl,
2163		.slow_shld,
2164		.slow_unaligned_mem_16,
2165	2025	.sse3,
2166		.vzeroupper,
2167	2026	.x87,
2168	2027	}),
2169	2028	};
...	...	@@ -2184,27 +2043,20 @@ pub const cpu = struct {
2184	2043	.cx16,
2185	2044	.cx8,
2186	2045	.f16c,
2187		.fast_gather,
2188	2046	.fma,
2189	2047	.fsgsbase,
2190	2048	.fxsr,
2191		.idivq_to_divl,
2192	2049	.lzcnt,
2193	2050	.mmx,
2194	2051	.movbe,
2195	2052	.nopl,
2196	2053	.pclmul,
2197	2054	.popcnt,
2198		.prefer_mask_registers,
2199	2055	.prefetchwt1,
2200	2056	.prfchw,
2201	2057	.rdrnd,
2202	2058	.rdseed,
2203	2059	.sahf,
2204		.slow_3ops_lea,
2205		.slow_incdec,
2206		.slow_pmaddwd,
2207		.slow_two_mem_ops,
2208	2060	.x87,
2209	2061	.xsave,
2210	2062	.xsaveopt,
...	...	@@ -2228,27 +2080,20 @@ pub const cpu = struct {
2228	2080	.cx16,
2229	2081	.cx8,
2230	2082	.f16c,
2231		.fast_gather,
2232	2083	.fma,
2233	2084	.fsgsbase,
2234	2085	.fxsr,
2235		.idivq_to_divl,
2236	2086	.lzcnt,
2237	2087	.mmx,
2238	2088	.movbe,
2239	2089	.nopl,
2240	2090	.pclmul,
2241	2091	.popcnt,
2242		.prefer_mask_registers,
2243	2092	.prefetchwt1,
2244	2093	.prfchw,
2245	2094	.rdrnd,
2246	2095	.rdseed,
2247	2096	.sahf,
2248		.slow_3ops_lea,
2249		.slow_incdec,
2250		.slow_pmaddwd,
2251		.slow_two_mem_ops,
2252	2097	.x87,
2253	2098	.xsave,
2254	2099	.xsaveopt,
...	...	@@ -2258,7 +2103,7 @@ pub const cpu = struct {
2258	2103	.name = "lakemont",
2259	2104	.llvm_name = "lakemont",
2260	2105	.features = featureSet(&[_]Feature{
2261		.vzeroupper,
	2106	.cx8,
2262	2107	}),
2263	2108	};
2264	2109	pub const nehalem = CpuModel{
...	...	@@ -2270,13 +2115,12 @@ pub const cpu = struct {
2270	2115	.cx16,
2271	2116	.cx8,
2272	2117	.fxsr,
2273		.macrofusion,
2274	2118	.mmx,
2275	2119	.nopl,
2276	2120	.popcnt,
2277	2121	.sahf,
	2122	.sse2,
2278	2123	.sse4_2,
2279		.vzeroupper,
2280	2124	.x87,
2281	2125	}),
2282	2126	};
...	...	@@ -2291,9 +2135,7 @@ pub const cpu = struct {
2291	2135	.fxsr,
2292	2136	.mmx,
2293	2137	.nopl,
2294		.slow_unaligned_mem_16,
2295	2138	.sse3,
2296		.vzeroupper,
2297	2139	.x87,
2298	2140	}),
2299	2141	};
...	...	@@ -2305,13 +2147,9 @@ pub const cpu = struct {
2305	2147	.@"64bit",
2306	2148	.cmov,
2307	2149	.cx8,
2308		.fast_scalar_shift_masks,
2309	2150	.fxsr,
2310	2151	.nopl,
2311		.slow_shld,
2312		.slow_unaligned_mem_16,
2313	2152	.sse2,
2314		.vzeroupper,
2315	2153	.x87,
2316	2154	}),
2317	2155	};
...	...	@@ -2324,13 +2162,9 @@ pub const cpu = struct {
2324	2162	.cmov,
2325	2163	.cx16,
2326	2164	.cx8,
2327		.fast_scalar_shift_masks,
2328	2165	.fxsr,
2329	2166	.nopl,
2330		.slow_shld,
2331		.slow_unaligned_mem_16,
2332	2167	.sse3,
2333		.vzeroupper,
2334	2168	.x87,
2335	2169	}),
2336	2170	};
...	...	@@ -2343,13 +2177,10 @@ pub const cpu = struct {
2343	2177	.cx16,
2344	2178	.cx8,
2345	2179	.fxsr,
2346		.macrofusion,
2347	2180	.mmx,
2348	2181	.nopl,
2349	2182	.sahf,
2350		.slow_unaligned_mem_16,
2351	2183	.sse4_1,
2352		.vzeroupper,
2353	2184	.x87,
2354	2185	}),
2355	2186	};
...	...	@@ -2358,8 +2189,6 @@ pub const cpu = struct {
2358	2189	.llvm_name = "pentium",
2359	2190	.features = featureSet(&[_]Feature{
2360	2191	.cx8,
2361		.slow_unaligned_mem_16,
2362		.vzeroupper,
2363	2192	.x87,
2364	2193	}),
2365	2194	};
...	...	@@ -2372,9 +2201,7 @@ pub const cpu = struct {
2372	2201	.fxsr,
2373	2202	.mmx,
2374	2203	.nopl,
2375		.slow_unaligned_mem_16,
2376	2204	.sse2,
2377		.vzeroupper,
2378	2205	.x87,
2379	2206	}),
2380	2207	};
...	...	@@ -2384,8 +2211,6 @@ pub const cpu = struct {
2384	2211	.features = featureSet(&[_]Feature{
2385	2212	.cx8,
2386	2213	.mmx,
2387		.slow_unaligned_mem_16,
2388		.vzeroupper,
2389	2214	.x87,
2390	2215	}),
2391	2216	};
...	...	@@ -2398,8 +2223,6 @@ pub const cpu = struct {
2398	2223	.fxsr,
2399	2224	.mmx,
2400	2225	.nopl,
2401		.slow_unaligned_mem_16,
2402		.vzeroupper,
2403	2226	.x87,
2404	2227	}),
2405	2228	};
...	...	@@ -2412,9 +2235,7 @@ pub const cpu = struct {
2412	2235	.fxsr,
2413	2236	.mmx,
2414	2237	.nopl,
2415		.slow_unaligned_mem_16,
2416	2238	.sse,
2417		.vzeroupper,
2418	2239	.x87,
2419	2240	}),
2420	2241	};
...	...	@@ -2427,9 +2248,7 @@ pub const cpu = struct {
2427	2248	.fxsr,
2428	2249	.mmx,
2429	2250	.nopl,
2430		.slow_unaligned_mem_16,
2431	2251	.sse,
2432		.vzeroupper,
2433	2252	.x87,
2434	2253	}),
2435	2254	};
...	...	@@ -2442,9 +2261,7 @@ pub const cpu = struct {
2442	2261	.fxsr,
2443	2262	.mmx,
2444	2263	.nopl,
2445		.slow_unaligned_mem_16,
2446	2264	.sse2,
2447		.vzeroupper,
2448	2265	.x87,
2449	2266	}),
2450	2267	};
...	...	@@ -2457,9 +2274,7 @@ pub const cpu = struct {
2457	2274	.fxsr,
2458	2275	.mmx,
2459	2276	.nopl,
2460		.slow_unaligned_mem_16,
2461	2277	.sse2,
2462		.vzeroupper,
2463	2278	.x87,
2464	2279	}),
2465	2280	};
...	...	@@ -2470,8 +2285,6 @@ pub const cpu = struct {
2470	2285	.cmov,
2471	2286	.cx8,
2472	2287	.nopl,
2473		.slow_unaligned_mem_16,
2474		.vzeroupper,
2475	2288	.x87,
2476	2289	}),
2477	2290	};
...	...	@@ -2484,9 +2297,7 @@ pub const cpu = struct {
2484	2297	.fxsr,
2485	2298	.mmx,
2486	2299	.nopl,
2487		.slow_unaligned_mem_16,
2488	2300	.sse3,
2489		.vzeroupper,
2490	2301	.x87,
2491	2302	}),
2492	2303	};
...	...	@@ -2499,26 +2310,95 @@ pub const cpu = struct {
2499	2310	.cmov,
2500	2311	.cx16,
2501	2312	.cx8,
2502		.false_deps_popcnt,
2503		.fast_15bytenop,
2504		.fast_scalar_fsqrt,
2505		.fast_shld_rotate,
2506	2313	.fxsr,
2507		.idivq_to_divl,
2508		.macrofusion,
2509		.merge_to_threeway_branch,
2510	2314	.mmx,
2511	2315	.nopl,
2512	2316	.pclmul,
2513	2317	.popcnt,
2514	2318	.sahf,
2515		.slow_3ops_lea,
2516		.slow_unaligned_mem_32,
	2319	.sse2,
	2320	.sse4_2,
	2321	.x87,
	2322	.xsave,
	2323	.xsaveopt,
	2324	}),
	2325	};
	2326	pub const sapphirerapids = CpuModel{
	2327	.name = "sapphirerapids",
	2328	.llvm_name = "sapphirerapids",
	2329	.features = featureSet(&[_]Feature{
	2330	.@"64bit",
	2331	.adx,
	2332	.aes,
	2333	.amx_bf16,
	2334	.amx_int8,
	2335	.amx_tile,
	2336	.avx,
	2337	.avx2,
	2338	.avx512bf16,
	2339	.avx512bitalg,
	2340	.avx512bw,
	2341	.avx512cd,
	2342	.avx512dq,
	2343	.avx512f,
	2344	.avx512ifma,
	2345	.avx512vbmi,
	2346	.avx512vbmi2,
	2347	.avx512vl,
	2348	.avx512vnni,
	2349	.avx512vp2intersect,
	2350	.avx512vpopcntdq,
	2351	.avxvnni,
	2352	.bmi,
	2353	.bmi2,
	2354	.cldemote,
	2355	.clflushopt,
	2356	.clwb,
	2357	.cmov,
	2358	.cx16,
	2359	.cx8,
	2360	.enqcmd,
	2361	.ermsb,
	2362	.f16c,
	2363	.fma,
	2364	.fsgsbase,
	2365	.fsrm,
	2366	.fxsr,
	2367	.gfni,
	2368	.invpcid,
	2369	.lzcnt,
	2370	.mmx,
	2371	.movbe,
	2372	.movdir64b,
	2373	.movdiri,
	2374	.nopl,
	2375	.pclmul,
	2376	.pconfig,
	2377	.pku,
	2378	.popcnt,
	2379	.prfchw,
	2380	.ptwrite,
	2381	.rdpid,
	2382	.rdrnd,
	2383	.rdseed,
	2384	.sahf,
	2385	.serialize,
	2386	.sgx,
	2387	.sha,
	2388	.shstk,
	2389	.sse2,
2517	2390	.sse4_2,
2518		.vzeroupper,
	2391	.tsxldtrk,
	2392	.uintr,
	2393	.vaes,
	2394	.vpclmulqdq,
	2395	.waitpkg,
	2396	.wbnoinvd,
2519	2397	.x87,
2520	2398	.xsave,
	2399	.xsavec,
2521	2400	.xsaveopt,
	2401	.xsaves,
2522	2402	}),
2523	2403	};
2524	2404	pub const silvermont = CpuModel{
...	...	@@ -2529,10 +2409,7 @@ pub const cpu = struct {
2529	2409	.cmov,
2530	2410	.cx16,
2531	2411	.cx8,
2532		.false_deps_popcnt,
2533		.fast_7bytenop,
2534	2412	.fxsr,
2535		.idivq_to_divl,
2536	2413	.mmx,
2537	2414	.movbe,
2538	2415	.nopl,
...	...	@@ -2541,13 +2418,8 @@ pub const cpu = struct {
2541	2418	.prfchw,
2542	2419	.rdrnd,
2543	2420	.sahf,
2544		.slow_incdec,
2545		.slow_lea,
2546		.slow_pmulld,
2547		.slow_two_mem_ops,
2548	2421	.sse4_2,
2549	2422	.ssse3,
2550		.vzeroupper,
2551	2423	.x87,
2552	2424	}),
2553	2425	};
...	...	@@ -2574,35 +2446,23 @@ pub const cpu = struct {
2574	2446	.cx8,
2575	2447	.ermsb,
2576	2448	.f16c,
2577		.false_deps_popcnt,
2578		.fast_15bytenop,
2579		.fast_gather,
2580		.fast_scalar_fsqrt,
2581		.fast_shld_rotate,
2582		.fast_variable_shuffle,
2583		.fast_vector_fsqrt,
2584	2449	.fma,
2585	2450	.fsgsbase,
2586	2451	.fxsr,
2587		.idivq_to_divl,
2588	2452	.invpcid,
2589	2453	.lzcnt,
2590		.macrofusion,
2591		.merge_to_threeway_branch,
2592	2454	.mmx,
2593	2455	.movbe,
2594	2456	.nopl,
2595	2457	.pclmul,
2596	2458	.pku,
2597	2459	.popcnt,
2598		.prefer_256_bit,
2599	2460	.prfchw,
2600	2461	.rdrnd,
2601	2462	.rdseed,
2602	2463	.sahf,
2603		.slow_3ops_lea,
	2464	.sse2,
2604	2465	.sse4_2,
2605		.vzeroupper,
2606	2466	.x87,
2607	2467	.xsave,
2608	2468	.xsavec,
...	...	@@ -2627,21 +2487,11 @@ pub const cpu = struct {
2627	2487	.cx8,
2628	2488	.ermsb,
2629	2489	.f16c,
2630		.false_deps_popcnt,
2631		.fast_15bytenop,
2632		.fast_gather,
2633		.fast_scalar_fsqrt,
2634		.fast_shld_rotate,
2635		.fast_variable_shuffle,
2636		.fast_vector_fsqrt,
2637	2490	.fma,
2638	2491	.fsgsbase,
2639	2492	.fxsr,
2640		.idivq_to_divl,
2641	2493	.invpcid,
2642	2494	.lzcnt,
2643		.macrofusion,
2644		.merge_to_threeway_branch,
2645	2495	.mmx,
2646	2496	.movbe,
2647	2497	.nopl,
...	...	@@ -2652,9 +2502,8 @@ pub const cpu = struct {
2652	2502	.rdseed,
2653	2503	.sahf,
2654	2504	.sgx,
2655		.slow_3ops_lea,
	2505	.sse2,
2656	2506	.sse4_2,
2657		.vzeroupper,
2658	2507	.x87,
2659	2508	.xsave,
2660	2509	.xsavec,
...	...	@@ -2685,35 +2534,23 @@ pub const cpu = struct {
2685	2534	.cx8,
2686	2535	.ermsb,
2687	2536	.f16c,
2688		.false_deps_popcnt,
2689		.fast_15bytenop,
2690		.fast_gather,
2691		.fast_scalar_fsqrt,
2692		.fast_shld_rotate,
2693		.fast_variable_shuffle,
2694		.fast_vector_fsqrt,
2695	2537	.fma,
2696	2538	.fsgsbase,
2697	2539	.fxsr,
2698		.idivq_to_divl,
2699	2540	.invpcid,
2700	2541	.lzcnt,
2701		.macrofusion,
2702		.merge_to_threeway_branch,
2703	2542	.mmx,
2704	2543	.movbe,
2705	2544	.nopl,
2706	2545	.pclmul,
2707	2546	.pku,
2708	2547	.popcnt,
2709		.prefer_256_bit,
2710	2548	.prfchw,
2711	2549	.rdrnd,
2712	2550	.rdseed,
2713	2551	.sahf,
2714		.slow_3ops_lea,
	2552	.sse2,
2715	2553	.sse4_2,
2716		.vzeroupper,
2717	2554	.x87,
2718	2555	.xsave,
2719	2556	.xsavec,
...	...	@@ -2729,10 +2566,7 @@ pub const cpu = struct {
2729	2566	.cmov,
2730	2567	.cx16,
2731	2568	.cx8,
2732		.false_deps_popcnt,
2733		.fast_7bytenop,
2734	2569	.fxsr,
2735		.idivq_to_divl,
2736	2570	.mmx,
2737	2571	.movbe,
2738	2572	.nopl,
...	...	@@ -2741,13 +2575,8 @@ pub const cpu = struct {
2741	2575	.prfchw,
2742	2576	.rdrnd,
2743	2577	.sahf,
2744		.slow_incdec,
2745		.slow_lea,
2746		.slow_pmulld,
2747		.slow_two_mem_ops,
2748	2578	.sse4_2,
2749	2579	.ssse3,
2750		.vzeroupper,
2751	2580	.x87,
2752	2581	}),
2753	2582	};
...	...	@@ -2781,21 +2610,13 @@ pub const cpu = struct {
2781	2610	.cx8,
2782	2611	.ermsb,
2783	2612	.f16c,
2784		.fast_15bytenop,
2785		.fast_gather,
2786		.fast_scalar_fsqrt,
2787		.fast_shld_rotate,
2788		.fast_variable_shuffle,
2789		.fast_vector_fsqrt,
2790	2613	.fma,
2791	2614	.fsgsbase,
	2615	.fsrm,
2792	2616	.fxsr,
2793	2617	.gfni,
2794		.idivq_to_divl,
2795	2618	.invpcid,
2796	2619	.lzcnt,
2797		.macrofusion,
2798		.merge_to_threeway_branch,
2799	2620	.mmx,
2800	2621	.movbe,
2801	2622	.movdir64b,
...	...	@@ -2804,7 +2625,6 @@ pub const cpu = struct {
2804	2625	.pclmul,
2805	2626	.pku,
2806	2627	.popcnt,
2807		.prefer_256_bit,
2808	2628	.prfchw,
2809	2629	.rdpid,
2810	2630	.rdrnd,
...	...	@@ -2813,11 +2633,10 @@ pub const cpu = struct {
2813	2633	.sgx,
2814	2634	.sha,
2815	2635	.shstk,
2816		.slow_3ops_lea,
	2636	.sse2,
2817	2637	.sse4_2,
2818	2638	.vaes,
2819	2639	.vpclmulqdq,
2820		.vzeroupper,
2821	2640	.x87,
2822	2641	.xsave,
2823	2642	.xsavec,
...	...	@@ -2852,13 +2671,8 @@ pub const cpu = struct {
2852	2671	.sahf,
2853	2672	.sgx,
2854	2673	.sha,
2855		.slow_incdec,
2856		.slow_lea,
2857		.slow_two_mem_ops,
2858	2674	.sse4_2,
2859	2675	.ssse3,
2860		.use_glm_div_sqrt_costs,
2861		.vzeroupper,
2862	2676	.x87,
2863	2677	.xsave,
2864	2678	.xsavec,
...	...	@@ -2875,14 +2689,13 @@ pub const cpu = struct {
2875	2689	.cx16,
2876	2690	.cx8,
2877	2691	.fxsr,
2878		.macrofusion,
2879	2692	.mmx,
2880	2693	.nopl,
2881	2694	.pclmul,
2882	2695	.popcnt,
2883	2696	.sahf,
	2697	.sse2,
2884	2698	.sse4_2,
2885		.vzeroupper,
2886	2699	.x87,
2887	2700	}),
2888	2701	};
...	...	@@ -2891,8 +2704,6 @@ pub const cpu = struct {
2891	2704	.llvm_name = "winchip-c6",
2892	2705	.features = featureSet(&[_]Feature{
2893	2706	.mmx,
2894		.slow_unaligned_mem_16,
2895		.vzeroupper,
2896	2707	.x87,
2897	2708	}),
2898	2709	};
...	...	@@ -2901,8 +2712,6 @@ pub const cpu = struct {
2901	2712	.llvm_name = "winchip2",
2902	2713	.features = featureSet(&[_]Feature{
2903	2714	.@"3dnow",
2904		.slow_unaligned_mem_16,
2905		.vzeroupper,
2906	2715	.x87,
2907	2716	}),
2908	2717	};
...	...	@@ -2914,17 +2723,86 @@ pub const cpu = struct {
2914	2723	.cmov,
2915	2724	.cx8,
2916	2725	.fxsr,
2917		.idivq_to_divl,
2918		.macrofusion,
2919	2726	.mmx,
2920	2727	.nopl,
2921		.slow_3ops_lea,
2922		.slow_incdec,
2923	2728	.sse2,
2924		.vzeroupper,
2925	2729	.x87,
2926	2730	}),
2927	2731	};
	2732	pub const x86_64_v2 = CpuModel{
	2733	.name = "x86_64_v2",
	2734	.llvm_name = "x86-64-v2",
	2735	.features = featureSet(&[_]Feature{
	2736	.@"64bit",
	2737	.cmov,
	2738	.cx16,
	2739	.cx8,
	2740	.fxsr,
	2741	.mmx,
	2742	.nopl,
	2743	.popcnt,
	2744	.sahf,
	2745	.sse2,
	2746	.sse4_2,
	2747	.x87,
	2748	}),
	2749	};
	2750	pub const x86_64_v3 = CpuModel{
	2751	.name = "x86_64_v3",
	2752	.llvm_name = "x86-64-v3",
	2753	.features = featureSet(&[_]Feature{
	2754	.@"64bit",
	2755	.avx2,
	2756	.bmi,
	2757	.bmi2,
	2758	.cmov,
	2759	.cx16,
	2760	.cx8,
	2761	.f16c,
	2762	.fma,
	2763	.fxsr,
	2764	.lzcnt,
	2765	.mmx,
	2766	.movbe,
	2767	.nopl,
	2768	.popcnt,
	2769	.sahf,
	2770	.sse2,
	2771	.sse4_2,
	2772	.x87,
	2773	.xsave,
	2774	}),
	2775	};
	2776	pub const x86_64_v4 = CpuModel{
	2777	.name = "x86_64_v4",
	2778	.llvm_name = "x86-64-v4",
	2779	.features = featureSet(&[_]Feature{
	2780	.@"64bit",
	2781	.avx2,
	2782	.avx512bw,
	2783	.avx512cd,
	2784	.avx512dq,
	2785	.avx512vl,
	2786	.bmi,
	2787	.bmi2,
	2788	.cmov,
	2789	.cx16,
	2790	.cx8,
	2791	.f16c,
	2792	.fma,
	2793	.fxsr,
	2794	.lzcnt,
	2795	.mmx,
	2796	.movbe,
	2797	.nopl,
	2798	.popcnt,
	2799	.sahf,
	2800	.sse2,
	2801	.sse4_2,
	2802	.x87,
	2803	.xsave,
	2804	}),
	2805	};
2928	2806	pub const yonah = CpuModel{
2929	2807	.name = "yonah",
2930	2808	.llvm_name = "yonah",
...	...	@@ -2934,9 +2812,7 @@ pub const cpu = struct {
2934	2812	.fxsr,
2935	2813	.mmx,
2936	2814	.nopl,
2937		.slow_unaligned_mem_16,
2938	2815	.sse3,
2939		.vzeroupper,
2940	2816	.x87,
2941	2817	}),
2942	2818	};
...	...	@@ -2950,16 +2826,11 @@ pub const cpu = struct {
2950	2826	.avx2,
2951	2827	.bmi,
2952	2828	.bmi2,
2953		.branchfusion,
2954	2829	.clflushopt,
2955	2830	.clzero,
2956	2831	.cmov,
2957	2832	.cx16,
2958	2833	.f16c,
2959		.fast_15bytenop,
2960		.fast_bextr,
2961		.fast_lzcnt,
2962		.fast_scalar_shift_masks,
2963	2834	.fma,
2964	2835	.fsgsbase,
2965	2836	.fxsr,
...	...	@@ -2975,9 +2846,7 @@ pub const cpu = struct {
2975	2846	.rdseed,
2976	2847	.sahf,
2977	2848	.sha,
2978		.slow_shld,
2979	2849	.sse4a,
2980		.vzeroupper,
2981	2850	.x87,
2982	2851	.xsave,
2983	2852	.xsavec,
...	...	@@ -2995,17 +2864,12 @@ pub const cpu = struct {
2995	2864	.avx2,
2996	2865	.bmi,
2997	2866	.bmi2,
2998		.branchfusion,
2999	2867	.clflushopt,
3000	2868	.clwb,
3001	2869	.clzero,
3002	2870	.cmov,
3003	2871	.cx16,
3004	2872	.f16c,
3005		.fast_15bytenop,
3006		.fast_bextr,
3007		.fast_lzcnt,
3008		.fast_scalar_shift_masks,
3009	2873	.fma,
3010	2874	.fsgsbase,
3011	2875	.fxsr,
...	...	@@ -3022,9 +2886,52 @@ pub const cpu = struct {
3022	2886	.rdseed,
3023	2887	.sahf,
3024	2888	.sha,
3025		.slow_shld,
3026	2889	.sse4a,
3027		.vzeroupper,
	2890	.wbnoinvd,
	2891	.x87,
	2892	.xsave,
	2893	.xsavec,
	2894	.xsaveopt,
	2895	.xsaves,
	2896	}),
	2897	};
	2898	pub const znver3 = CpuModel{
	2899	.name = "znver3",
	2900	.llvm_name = "znver3",
	2901	.features = featureSet(&[_]Feature{
	2902	.@"64bit",
	2903	.adx,
	2904	.aes,
	2905	.avx2,
	2906	.bmi,
	2907	.bmi2,
	2908	.clflushopt,
	2909	.clwb,
	2910	.clzero,
	2911	.cmov,
	2912	.cx16,
	2913	.f16c,
	2914	.fma,
	2915	.fsgsbase,
	2916	.fxsr,
	2917	.invpcid,
	2918	.lzcnt,
	2919	.mmx,
	2920	.movbe,
	2921	.mwaitx,
	2922	.nopl,
	2923	.pclmul,
	2924	.pku,
	2925	.popcnt,
	2926	.prfchw,
	2927	.rdpid,
	2928	.rdrnd,
	2929	.rdseed,
	2930	.sahf,
	2931	.sha,
	2932	.sse4a,
	2933	.vaes,
	2934	.vpclmulqdq,
3028	2935	.wbnoinvd,
3029	2936	.x87,
3030	2937	.xsave,