authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-01-30 11:31:41-05:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-01-30 11:31:41-05:00
log70ee818d21c44ec0031b997916694327eb9fc37f
tree6078350717e2a11e25a38208274ff20d66b317f7
parentc75f65d38c2c0f5f8f443685a4d694a7ab9c1da3
signature Commit is signed but in an unrecognized format.

update target CPUs and features with llvm10's data

based on zig-llvm-target-details-generator commit 3aef1b9b4415ed3acfaea4ce8bc233e213548f71

9 files changed, 894 insertions(+), 86 deletions(-)

lib/std/target.zig+1-1
......@@ -566,7 +566,7 @@ pub const Target = union(enum) {
566566 pub const Set = struct {
567567 ints: [usize_count]usize,
568568
569 pub const needed_bit_count = 174;
569 pub const needed_bit_count = 175;
570570 pub const byte_count = (needed_bit_count + 7) / 8;
571571 pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize);
572572 pub const Index = std.math.Log2Int(@IntType(false, usize_count * @bitSizeOf(usize)));
lib/std/target/aarch64.zig+298-24
......@@ -6,6 +6,7 @@ pub const Feature = enum {
66 a53,
77 a55,
88 a57,
9 a65,
910 a72,
1011 a73,
1112 a75,
......@@ -15,6 +16,11 @@ pub const Feature = enum {
1516 alternate_sextload_cvt_f32_pattern,
1617 altnzcv,
1718 am,
19 apple_a10,
20 apple_a11,
21 apple_a12,
22 apple_a13,
23 apple_a7,
1824 arith_bcc_fusion,
1925 arith_cbz_fusion,
2026 balance_fp_ops,
......@@ -35,10 +41,10 @@ pub const Feature = enum {
3541 crc,
3642 crypto,
3743 custom_cheap_as_move,
38 cyclone,
3944 disable_latency_sched_heuristic,
4045 dit,
4146 dotprod,
47 ete,
4248 exynos_cheap_as_move,
4349 exynosm1,
4450 exynosm2,
......@@ -65,12 +71,15 @@ pub const Feature = enum {
6571 mpam,
6672 mte,
6773 neon,
74 neoversee1,
75 neoversen1,
6876 no_neg_immediates,
6977 nv,
7078 pa,
7179 pan,
7280 pan_rwv,
7381 perfmon,
82 pmu,
7483 predictable_select_expensive,
7584 predres,
7685 rand,
......@@ -122,16 +131,19 @@ pub const Feature = enum {
122131 sve2_bitperm,
123132 sve2_sha3,
124133 sve2_sm4,
134 tagged_globals,
125135 thunderx,
126136 thunderx2t99,
127137 thunderxt81,
128138 thunderxt83,
129139 thunderxt88,
130140 tlb_rmi,
141 tme,
131142 tpidr_el1,
132143 tpidr_el2,
133144 tpidr_el3,
134145 tracev8_4,
146 trbe,
135147 tsv110,
136148 uaops,
137149 use_aa,
......@@ -217,6 +229,21 @@ pub const all_features = blk: {
217229 .use_postra_scheduler,
218230 }),
219231 };
232 result[@enumToInt(Feature.a65)] = .{
233 .llvm_name = "a65",
234 .description = "Cortex-A65 ARM processors",
235 .dependencies = featureSet(&[_]Feature{
236 .crypto,
237 .dotprod,
238 .fp_armv8,
239 .fullfp16,
240 .neon,
241 .ras,
242 .rcpc,
243 .ssbs,
244 .v8_2a,
245 }),
246 };
220247 result[@enumToInt(Feature.a72)] = .{
221248 .llvm_name = "a72",
222249 .description = "Cortex-A72 ARM processors",
......@@ -297,6 +324,110 @@ pub const all_features = blk: {
297324 .description = "Enable v8.4-A Activity Monitors extension",
298325 .dependencies = featureSet(&[_]Feature{}),
299326 };
327 result[@enumToInt(Feature.apple_a10)] = .{
328 .llvm_name = "apple-a10",
329 .description = "Apple A10",
330 .dependencies = featureSet(&[_]Feature{
331 .alternate_sextload_cvt_f32_pattern,
332 .arith_bcc_fusion,
333 .arith_cbz_fusion,
334 .crc,
335 .crypto,
336 .disable_latency_sched_heuristic,
337 .fp_armv8,
338 .fuse_aes,
339 .fuse_crypto_eor,
340 .lor,
341 .neon,
342 .pan,
343 .perfmon,
344 .rdm,
345 .vh,
346 .zcm,
347 .zcz,
348 }),
349 };
350 result[@enumToInt(Feature.apple_a11)] = .{
351 .llvm_name = "apple-a11",
352 .description = "Apple A11",
353 .dependencies = featureSet(&[_]Feature{
354 .alternate_sextload_cvt_f32_pattern,
355 .arith_bcc_fusion,
356 .arith_cbz_fusion,
357 .crypto,
358 .disable_latency_sched_heuristic,
359 .fp_armv8,
360 .fullfp16,
361 .fuse_aes,
362 .fuse_crypto_eor,
363 .neon,
364 .perfmon,
365 .v8_2a,
366 .zcm,
367 .zcz,
368 }),
369 };
370 result[@enumToInt(Feature.apple_a12)] = .{
371 .llvm_name = "apple-a12",
372 .description = "Apple A12",
373 .dependencies = featureSet(&[_]Feature{
374 .alternate_sextload_cvt_f32_pattern,
375 .arith_bcc_fusion,
376 .arith_cbz_fusion,
377 .crypto,
378 .disable_latency_sched_heuristic,
379 .fp_armv8,
380 .fullfp16,
381 .fuse_aes,
382 .fuse_crypto_eor,
383 .neon,
384 .perfmon,
385 .v8_3a,
386 .zcm,
387 .zcz,
388 }),
389 };
390 result[@enumToInt(Feature.apple_a13)] = .{
391 .llvm_name = "apple-a13",
392 .description = "Apple A13",
393 .dependencies = featureSet(&[_]Feature{
394 .alternate_sextload_cvt_f32_pattern,
395 .arith_bcc_fusion,
396 .arith_cbz_fusion,
397 .crypto,
398 .disable_latency_sched_heuristic,
399 .fp_armv8,
400 .fp16fml,
401 .fullfp16,
402 .fuse_aes,
403 .fuse_crypto_eor,
404 .neon,
405 .perfmon,
406 .sha3,
407 .v8_4a,
408 .zcm,
409 .zcz,
410 }),
411 };
412 result[@enumToInt(Feature.apple_a7)] = .{
413 .llvm_name = "apple-a7",
414 .description = "Apple A7 (the CPU formerly known as Cyclone)",
415 .dependencies = featureSet(&[_]Feature{
416 .alternate_sextload_cvt_f32_pattern,
417 .arith_bcc_fusion,
418 .arith_cbz_fusion,
419 .crypto,
420 .disable_latency_sched_heuristic,
421 .fp_armv8,
422 .fuse_aes,
423 .fuse_crypto_eor,
424 .neon,
425 .perfmon,
426 .zcm,
427 .zcz,
428 .zcz_fp_workaround,
429 }),
430 };
300431 result[@enumToInt(Feature.arith_bcc_fusion)] = .{
301432 .llvm_name = "arith-bcc-fusion",
302433 .description = "CPU fuses arithmetic+bcc operations",
......@@ -403,25 +534,6 @@ pub const all_features = blk: {
403534 .description = "Use custom handling of cheap instructions",
404535 .dependencies = featureSet(&[_]Feature{}),
405536 };
406 result[@enumToInt(Feature.cyclone)] = .{
407 .llvm_name = "cyclone",
408 .description = "Cyclone",
409 .dependencies = featureSet(&[_]Feature{
410 .alternate_sextload_cvt_f32_pattern,
411 .arith_bcc_fusion,
412 .arith_cbz_fusion,
413 .crypto,
414 .disable_latency_sched_heuristic,
415 .fp_armv8,
416 .fuse_aes,
417 .fuse_crypto_eor,
418 .neon,
419 .perfmon,
420 .zcm,
421 .zcz,
422 .zcz_fp_workaround,
423 }),
424 };
425537 result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{
426538 .llvm_name = "disable-latency-sched-heuristic",
427539 .description = "Disable latency scheduling heuristic",
......@@ -437,6 +549,13 @@ pub const all_features = blk: {
437549 .description = "Enable dot product support",
438550 .dependencies = featureSet(&[_]Feature{}),
439551 };
552 result[@enumToInt(Feature.ete)] = .{
553 .llvm_name = "ete",
554 .description = "Enable Embedded Trace Extension",
555 .dependencies = featureSet(&[_]Feature{
556 .trbe,
557 }),
558 };
440559 result[@enumToInt(Feature.exynos_cheap_as_move)] = .{
441560 .llvm_name = "exynos-cheap-as-move",
442561 .description = "Use Exynos specific handling of cheap instructions",
......@@ -656,6 +775,35 @@ pub const all_features = blk: {
656775 .fp_armv8,
657776 }),
658777 };
778 result[@enumToInt(Feature.neoversee1)] = .{
779 .llvm_name = "neoversee1",
780 .description = "Neoverse E1 ARM processors",
781 .dependencies = featureSet(&[_]Feature{
782 .crypto,
783 .dotprod,
784 .fp_armv8,
785 .fullfp16,
786 .neon,
787 .rcpc,
788 .ssbs,
789 .v8_2a,
790 }),
791 };
792 result[@enumToInt(Feature.neoversen1)] = .{
793 .llvm_name = "neoversen1",
794 .description = "Neoverse N1 ARM processors",
795 .dependencies = featureSet(&[_]Feature{
796 .crypto,
797 .dotprod,
798 .fp_armv8,
799 .fullfp16,
800 .neon,
801 .rcpc,
802 .spe,
803 .ssbs,
804 .v8_2a,
805 }),
806 };
659807 result[@enumToInt(Feature.no_neg_immediates)] = .{
660808 .llvm_name = "no-neg-immediates",
661809 .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
......@@ -688,6 +836,11 @@ pub const all_features = blk: {
688836 .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
689837 .dependencies = featureSet(&[_]Feature{}),
690838 };
839 result[@enumToInt(Feature.pmu)] = .{
840 .llvm_name = "pmu",
841 .description = "Enable v8.4-A PMU extension",
842 .dependencies = featureSet(&[_]Feature{}),
843 };
691844 result[@enumToInt(Feature.predictable_select_expensive)] = .{
692845 .llvm_name = "predictable-select-expensive",
693846 .description = "Prefer likely predicted branches over selects",
......@@ -979,6 +1132,11 @@ pub const all_features = blk: {
9791132 .sve2,
9801133 }),
9811134 };
1135 result[@enumToInt(Feature.tagged_globals)] = .{
1136 .llvm_name = "tagged-globals",
1137 .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
1138 .dependencies = featureSet(&[_]Feature{}),
1139 };
9821140 result[@enumToInt(Feature.thunderx)] = .{
9831141 .llvm_name = "thunderx",
9841142 .description = "Cavium ThunderX processors",
......@@ -1052,6 +1210,11 @@ pub const all_features = blk: {
10521210 .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
10531211 .dependencies = featureSet(&[_]Feature{}),
10541212 };
1213 result[@enumToInt(Feature.tme)] = .{
1214 .llvm_name = "tme",
1215 .description = "Enable Transactional Memory Extension",
1216 .dependencies = featureSet(&[_]Feature{}),
1217 };
10551218 result[@enumToInt(Feature.tpidr_el1)] = .{
10561219 .llvm_name = "tpidr-el1",
10571220 .description = "Permit use of TPIDR_EL1 for the TLS base",
......@@ -1072,6 +1235,11 @@ pub const all_features = blk: {
10721235 .description = "Enable v8.4-A Trace extension",
10731236 .dependencies = featureSet(&[_]Feature{}),
10741237 };
1238 result[@enumToInt(Feature.trbe)] = .{
1239 .llvm_name = "trbe",
1240 .description = "Enable Trace Buffer Extension",
1241 .dependencies = featureSet(&[_]Feature{}),
1242 };
10751243 result[@enumToInt(Feature.tsv110)] = .{
10761244 .llvm_name = "tsv110",
10771245 .description = "HiSilicon TS-V110 processors",
......@@ -1164,6 +1332,7 @@ pub const all_features = blk: {
11641332 .fmi,
11651333 .mpam,
11661334 .nv,
1335 .pmu,
11671336 .rasv8_4,
11681337 .rcpc_immo,
11691338 .sel2,
......@@ -1229,11 +1398,74 @@ pub const all_features = blk: {
12291398};
12301399
12311400pub const cpu = struct {
1401 pub const apple_a10 = Cpu{
1402 .name = "apple_a10",
1403 .llvm_name = "apple-a10",
1404 .features = featureSet(&[_]Feature{
1405 .apple_a10,
1406 }),
1407 };
1408 pub const apple_a11 = Cpu{
1409 .name = "apple_a11",
1410 .llvm_name = "apple-a11",
1411 .features = featureSet(&[_]Feature{
1412 .apple_a11,
1413 }),
1414 };
1415 pub const apple_a12 = Cpu{
1416 .name = "apple_a12",
1417 .llvm_name = "apple-a12",
1418 .features = featureSet(&[_]Feature{
1419 .apple_a12,
1420 }),
1421 };
1422 pub const apple_a13 = Cpu{
1423 .name = "apple_a13",
1424 .llvm_name = "apple-a13",
1425 .features = featureSet(&[_]Feature{
1426 .apple_a13,
1427 }),
1428 };
1429 pub const apple_a7 = Cpu{
1430 .name = "apple_a7",
1431 .llvm_name = "apple-a7",
1432 .features = featureSet(&[_]Feature{
1433 .apple_a7,
1434 }),
1435 };
1436 pub const apple_a8 = Cpu{
1437 .name = "apple_a8",
1438 .llvm_name = "apple-a8",
1439 .features = featureSet(&[_]Feature{
1440 .apple_a7,
1441 }),
1442 };
1443 pub const apple_a9 = Cpu{
1444 .name = "apple_a9",
1445 .llvm_name = "apple-a9",
1446 .features = featureSet(&[_]Feature{
1447 .apple_a7,
1448 }),
1449 };
12321450 pub const apple_latest = Cpu{
12331451 .name = "apple_latest",
12341452 .llvm_name = "apple-latest",
12351453 .features = featureSet(&[_]Feature{
1236 .cyclone,
1454 .apple_a13,
1455 }),
1456 };
1457 pub const apple_s4 = Cpu{
1458 .name = "apple_s4",
1459 .llvm_name = "apple-s4",
1460 .features = featureSet(&[_]Feature{
1461 .apple_a12,
1462 }),
1463 };
1464 pub const apple_s5 = Cpu{
1465 .name = "apple_s5",
1466 .llvm_name = "apple-s5",
1467 .features = featureSet(&[_]Feature{
1468 .apple_a12,
12371469 }),
12381470 };
12391471 pub const cortex_a35 = Cpu{
......@@ -1264,6 +1496,20 @@ pub const cpu = struct {
12641496 .a57,
12651497 }),
12661498 };
1499 pub const cortex_a65 = Cpu{
1500 .name = "cortex_a65",
1501 .llvm_name = "cortex-a65",
1502 .features = featureSet(&[_]Feature{
1503 .a65,
1504 }),
1505 };
1506 pub const cortex_a65ae = Cpu{
1507 .name = "cortex_a65ae",
1508 .llvm_name = "cortex-a65ae",
1509 .features = featureSet(&[_]Feature{
1510 .a65,
1511 }),
1512 };
12671513 pub const cortex_a72 = Cpu{
12681514 .name = "cortex_a72",
12691515 .llvm_name = "cortex-a72",
......@@ -1303,19 +1549,19 @@ pub const cpu = struct {
13031549 .name = "cyclone",
13041550 .llvm_name = "cyclone",
13051551 .features = featureSet(&[_]Feature{
1306 .cyclone,
1552 .apple_a7,
13071553 }),
13081554 };
13091555 pub const exynos_m1 = Cpu{
13101556 .name = "exynos_m1",
1311 .llvm_name = "exynos-m1",
1557 .llvm_name = null,
13121558 .features = featureSet(&[_]Feature{
13131559 .exynosm1,
13141560 }),
13151561 };
13161562 pub const exynos_m2 = Cpu{
13171563 .name = "exynos_m2",
1318 .llvm_name = "exynos-m2",
1564 .llvm_name = null,
13191565 .features = featureSet(&[_]Feature{
13201566 .exynosm2,
13211567 }),
......@@ -1352,6 +1598,7 @@ pub const cpu = struct {
13521598 .name = "generic",
13531599 .llvm_name = "generic",
13541600 .features = featureSet(&[_]Feature{
1601 .ete,
13551602 .fp_armv8,
13561603 .fuse_aes,
13571604 .neon,
......@@ -1366,6 +1613,20 @@ pub const cpu = struct {
13661613 .kryo,
13671614 }),
13681615 };
1616 pub const neoverse_e1 = Cpu{
1617 .name = "neoverse_e1",
1618 .llvm_name = "neoverse-e1",
1619 .features = featureSet(&[_]Feature{
1620 .neoversee1,
1621 }),
1622 };
1623 pub const neoverse_n1 = Cpu{
1624 .name = "neoverse_n1",
1625 .llvm_name = "neoverse-n1",
1626 .features = featureSet(&[_]Feature{
1627 .neoversen1,
1628 }),
1629 };
13691630 pub const saphira = Cpu{
13701631 .name = "saphira",
13711632 .llvm_name = "saphira",
......@@ -1421,11 +1682,22 @@ pub const cpu = struct {
14211682/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
14221683/// compiler has inefficient memory and CPU usage, affecting build times.
14231684pub const all_cpus = &[_]*const Cpu{
1685 &cpu.apple_a10,
1686 &cpu.apple_a11,
1687 &cpu.apple_a12,
1688 &cpu.apple_a13,
1689 &cpu.apple_a7,
1690 &cpu.apple_a8,
1691 &cpu.apple_a9,
14241692 &cpu.apple_latest,
1693 &cpu.apple_s4,
1694 &cpu.apple_s5,
14251695 &cpu.cortex_a35,
14261696 &cpu.cortex_a53,
14271697 &cpu.cortex_a55,
14281698 &cpu.cortex_a57,
1699 &cpu.cortex_a65,
1700 &cpu.cortex_a65ae,
14291701 &cpu.cortex_a72,
14301702 &cpu.cortex_a73,
14311703 &cpu.cortex_a75,
......@@ -1440,6 +1712,8 @@ pub const all_cpus = &[_]*const Cpu{
14401712 &cpu.falkor,
14411713 &cpu.generic,
14421714 &cpu.kryo,
1715 &cpu.neoverse_e1,
1716 &cpu.neoverse_n1,
14431717 &cpu.saphira,
14441718 &cpu.thunderx,
14451719 &cpu.thunderx2t99,
lib/std/target/amdgpu.zig+7
......@@ -62,6 +62,7 @@ pub const Feature = enum {
6262 max_private_element_size_16,
6363 max_private_element_size_4,
6464 max_private_element_size_8,
65 mfma_inline_literal_bug,
6566 mimg_r128,
6667 movrel,
6768 no_data_dep_hazard,
......@@ -490,6 +491,11 @@ pub const all_features = blk: {
490491 .description = "Maximum private access size may be 8",
491492 .dependencies = featureSet(&[_]Feature{}),
492493 };
494 result[@enumToInt(Feature.mfma_inline_literal_bug)] = .{
495 .llvm_name = "mfma-inline-literal-bug",
496 .description = "MFMA cannot use inline literal as SrcC",
497 .dependencies = featureSet(&[_]Feature{}),
498 };
493499 result[@enumToInt(Feature.mimg_r128)] = .{
494500 .llvm_name = "mimg-r128",
495501 .description = "Support 128-bit texture resources",
......@@ -1102,6 +1108,7 @@ pub const cpu = struct {
11021108 .half_rate_64_ops,
11031109 .ldsbankcount32,
11041110 .mai_insts,
1111 .mfma_inline_literal_bug,
11051112 .pk_fmac_f16_inst,
11061113 .sram_ecc,
11071114 }),
lib/std/target/arm.zig+54-34
......@@ -100,6 +100,9 @@ pub const Feature = enum {
100100 muxed_units,
101101 mve,
102102 mve_fp,
103 mve1beat,
104 mve2beat,
105 mve4beat,
103106 nacl_trap,
104107 neon,
105108 neon_fpmovs,
......@@ -129,6 +132,7 @@ pub const Feature = enum {
129132 slow_odd_reg,
130133 slow_vdup32,
131134 slow_vgetlni32,
135 slowfpvfmx,
132136 slowfpvmlx,
133137 soft_float,
134138 splat_vfp_neon,
......@@ -137,7 +141,6 @@ pub const Feature = enum {
137141 thumb_mode,
138142 thumb2,
139143 trustzone,
140 use_aa,
141144 use_misched,
142145 v4t,
143146 v5t,
......@@ -158,8 +161,6 @@ pub const Feature = enum {
158161 v8m,
159162 v8m_main,
160163 vfp2,
161 vfp2d16,
162 vfp2d16sp,
163164 vfp2sp,
164165 vfp3,
165166 vfp3d16,
......@@ -746,9 +747,9 @@ pub const all_features = blk: {
746747 .slow_fp_brcc,
747748 .slow_vdup32,
748749 .slow_vgetlni32,
750 .slowfpvfmx,
749751 .slowfpvmlx,
750752 .splat_vfp_neon,
751 .use_aa,
752753 .wide_stride_vfp,
753754 .zcz,
754755 }),
......@@ -936,6 +937,21 @@ pub const all_features = blk: {
936937 .mve,
937938 }),
938939 };
940 result[@enumToInt(Feature.mve1beat)] = .{
941 .llvm_name = "mve1beat",
942 .description = "Model MVE instructions as a 1 beat per tick architecture",
943 .dependencies = featureSet(&[_]Feature{}),
944 };
945 result[@enumToInt(Feature.mve2beat)] = .{
946 .llvm_name = "mve2beat",
947 .description = "Model MVE instructions as a 2 beats per tick architecture",
948 .dependencies = featureSet(&[_]Feature{}),
949 };
950 result[@enumToInt(Feature.mve4beat)] = .{
951 .llvm_name = "mve4beat",
952 .description = "Model MVE instructions as a 4 beats per tick architecture",
953 .dependencies = featureSet(&[_]Feature{}),
954 };
939955 result[@enumToInt(Feature.nacl_trap)] = .{
940956 .llvm_name = "nacl-trap",
941957 .description = "NaCl trap",
......@@ -1085,6 +1101,11 @@ pub const all_features = blk: {
10851101 .description = "Has slow VGETLNi32 - prefer VMOV",
10861102 .dependencies = featureSet(&[_]Feature{}),
10871103 };
1104 result[@enumToInt(Feature.slowfpvfmx)] = .{
1105 .llvm_name = "slowfpvfmx",
1106 .description = "Disable VFP / NEON FMA instructions",
1107 .dependencies = featureSet(&[_]Feature{}),
1108 };
10881109 result[@enumToInt(Feature.slowfpvmlx)] = .{
10891110 .llvm_name = "slowfpvmlx",
10901111 .description = "Disable VFP / NEON MAC instructions",
......@@ -1127,11 +1148,6 @@ pub const all_features = blk: {
11271148 .description = "Enable support for TrustZone security extensions",
11281149 .dependencies = featureSet(&[_]Feature{}),
11291150 };
1130 result[@enumToInt(Feature.use_aa)] = .{
1131 .llvm_name = "use-aa",
1132 .description = "Use alias analysis during codegen",
1133 .dependencies = featureSet(&[_]Feature{}),
1134 };
11351151 result[@enumToInt(Feature.use_misched)] = .{
11361152 .llvm_name = "use-misched",
11371153 .description = "Use the MachineScheduler",
......@@ -1269,31 +1285,16 @@ pub const all_features = blk: {
12691285 result[@enumToInt(Feature.vfp2)] = .{
12701286 .llvm_name = "vfp2",
12711287 .description = "Enable VFP2 instructions",
1272 .dependencies = featureSet(&[_]Feature{
1273 .vfp2d16,
1274 .vfp2sp,
1275 }),
1276 };
1277 result[@enumToInt(Feature.vfp2d16)] = .{
1278 .llvm_name = "vfp2d16",
1279 .description = "Enable VFP2 instructions",
12801288 .dependencies = featureSet(&[_]Feature{
12811289 .fp64,
1282 .vfp2d16sp,
1283 }),
1284 };
1285 result[@enumToInt(Feature.vfp2d16sp)] = .{
1286 .llvm_name = "vfp2d16sp",
1287 .description = "Enable VFP2 instructions with no double precision",
1288 .dependencies = featureSet(&[_]Feature{
1289 .fpregs,
1290 .vfp2sp,
12901291 }),
12911292 };
12921293 result[@enumToInt(Feature.vfp2sp)] = .{
12931294 .llvm_name = "vfp2sp",
12941295 .description = "Enable VFP2 instructions with no double precision",
12951296 .dependencies = featureSet(&[_]Feature{
1296 .vfp2d16sp,
1297 .fpregs,
12971298 }),
12981299 };
12991300 result[@enumToInt(Feature.vfp3)] = .{
......@@ -1704,6 +1705,7 @@ pub const cpu = struct {
17041705 .mp,
17051706 .ret_addr_stack,
17061707 .slow_fp_brcc,
1708 .slowfpvfmx,
17071709 .slowfpvmlx,
17081710 .trustzone,
17091711 .vfp4,
......@@ -1758,6 +1760,7 @@ pub const cpu = struct {
17581760 .mp,
17591761 .ret_addr_stack,
17601762 .slow_fp_brcc,
1763 .slowfpvfmx,
17611764 .slowfpvmlx,
17621765 .trustzone,
17631766 .vfp4,
......@@ -1838,6 +1841,7 @@ pub const cpu = struct {
18381841 .nonpipelined_vfp,
18391842 .ret_addr_stack,
18401843 .slow_fp_brcc,
1844 .slowfpvfmx,
18411845 .slowfpvmlx,
18421846 .trustzone,
18431847 .vmlx_forwarding,
......@@ -1901,7 +1905,6 @@ pub const cpu = struct {
19011905 .loop_align,
19021906 .m3,
19031907 .no_branch_predictor,
1904 .use_aa,
19051908 .use_misched,
19061909 }),
19071910 };
......@@ -1914,8 +1917,8 @@ pub const cpu = struct {
19141917 .fp_armv8d16sp,
19151918 .loop_align,
19161919 .no_branch_predictor,
1920 .slowfpvfmx,
19171921 .slowfpvmlx,
1918 .use_aa,
19191922 .use_misched,
19201923 }),
19211924 };
......@@ -1928,8 +1931,8 @@ pub const cpu = struct {
19281931 .fp_armv8d16sp,
19291932 .loop_align,
19301933 .no_branch_predictor,
1934 .slowfpvfmx,
19311935 .slowfpvmlx,
1932 .use_aa,
19331936 .use_misched,
19341937 }),
19351938 };
......@@ -1940,8 +1943,8 @@ pub const cpu = struct {
19401943 .armv7e_m,
19411944 .loop_align,
19421945 .no_branch_predictor,
1946 .slowfpvfmx,
19431947 .slowfpvmlx,
1944 .use_aa,
19451948 .use_misched,
19461949 .vfp4d16sp,
19471950 }),
......@@ -1973,6 +1976,7 @@ pub const cpu = struct {
19731976 .r4,
19741977 .ret_addr_stack,
19751978 .slow_fp_brcc,
1979 .slowfpvfmx,
19761980 .slowfpvmlx,
19771981 .vfp3d16,
19781982 }),
......@@ -1987,6 +1991,7 @@ pub const cpu = struct {
19871991 .r5,
19881992 .ret_addr_stack,
19891993 .slow_fp_brcc,
1994 .slowfpvfmx,
19901995 .slowfpvmlx,
19911996 .vfp3d16,
19921997 }),
......@@ -1998,7 +2003,6 @@ pub const cpu = struct {
19982003 .armv8_r,
19992004 .fpao,
20002005 .r52,
2001 .use_aa,
20022006 .use_misched,
20032007 }),
20042008 };
......@@ -2014,6 +2018,7 @@ pub const cpu = struct {
20142018 .r7,
20152019 .ret_addr_stack,
20162020 .slow_fp_brcc,
2021 .slowfpvfmx,
20172022 .slowfpvmlx,
20182023 .vfp3d16,
20192024 }),
......@@ -2029,6 +2034,7 @@ pub const cpu = struct {
20292034 .mp,
20302035 .ret_addr_stack,
20312036 .slow_fp_brcc,
2037 .slowfpvfmx,
20322038 .slowfpvmlx,
20332039 .vfp3d16,
20342040 }),
......@@ -2047,6 +2053,7 @@ pub const cpu = struct {
20472053 .mp,
20482054 .neonfp,
20492055 .ret_addr_stack,
2056 .slowfpvfmx,
20502057 .slowfpvmlx,
20512058 .swift,
20522059 .use_misched,
......@@ -2063,7 +2070,7 @@ pub const cpu = struct {
20632070 };
20642071 pub const exynos_m1 = Cpu{
20652072 .name = "exynos_m1",
2066 .llvm_name = "exynos-m1",
2073 .llvm_name = null,
20672074 .features = featureSet(&[_]Feature{
20682075 .armv8_a,
20692076 .exynos,
......@@ -2071,7 +2078,7 @@ pub const cpu = struct {
20712078 };
20722079 pub const exynos_m2 = Cpu{
20732080 .name = "exynos_m2",
2074 .llvm_name = "exynos-m2",
2081 .llvm_name = null,
20752082 .features = featureSet(&[_]Feature{
20762083 .armv8_a,
20772084 .exynos,
......@@ -2162,6 +2169,18 @@ pub const cpu = struct {
21622169 .armv6k,
21632170 }),
21642171 };
2172 pub const neoverse_n1 = Cpu{
2173 .name = "neoverse_n1",
2174 .llvm_name = "neoverse-n1",
2175 .features = featureSet(&[_]Feature{
2176 .armv8_2_a,
2177 .crc,
2178 .crypto,
2179 .dotprod,
2180 .hwdiv,
2181 .hwdiv_arm,
2182 }),
2183 };
21652184 pub const sc000 = Cpu{
21662185 .name = "sc000",
21672186 .llvm_name = "sc000",
......@@ -2176,7 +2195,6 @@ pub const cpu = struct {
21762195 .armv7_m,
21772196 .m3,
21782197 .no_branch_predictor,
2179 .use_aa,
21802198 .use_misched,
21812199 }),
21822200 };
......@@ -2227,6 +2245,7 @@ pub const cpu = struct {
22272245 .slow_odd_reg,
22282246 .slow_vdup32,
22292247 .slow_vgetlni32,
2248 .slowfpvfmx,
22302249 .slowfpvmlx,
22312250 .swift,
22322251 .use_misched,
......@@ -2322,6 +2341,7 @@ pub const all_cpus = &[_]*const Cpu{
23222341 &cpu.kryo,
23232342 &cpu.mpcore,
23242343 &cpu.mpcorenovfp,
2344 &cpu.neoverse_n1,
23252345 &cpu.sc000,
23262346 &cpu.sc300,
23272347 &cpu.strongarm,
lib/std/target/mips.zig+32
......@@ -4,6 +4,7 @@ const Cpu = std.Target.Cpu;
44pub const Feature = enum {
55 abs2008,
66 cnmips,
7 cnmipsp,
78 crc,
89 dsp,
910 dspr2,
......@@ -51,6 +52,7 @@ pub const Feature = enum {
5152 use_tcc_in_div,
5253 vfpu,
5354 virt,
55 xgot,
5456};
5557
5658pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
......@@ -71,6 +73,13 @@ pub const all_features = blk: {
7173 .mips64r2,
7274 }),
7375 };
76 result[@enumToInt(Feature.cnmipsp)] = .{
77 .llvm_name = "cnmipsp",
78 .description = "Octeon+ cnMIPS Support",
79 .dependencies = featureSet(&[_]Feature{
80 .cnmips,
81 }),
82 };
7483 result[@enumToInt(Feature.crc)] = .{
7584 .llvm_name = "crc",
7685 .description = "Mips R6 CRC ASE",
......@@ -363,6 +372,11 @@ pub const all_features = blk: {
363372 .description = "Mips Virtualization ASE",
364373 .dependencies = featureSet(&[_]Feature{}),
365374 };
375 result[@enumToInt(Feature.xgot)] = .{
376 .llvm_name = "xgot",
377 .description = "Assume 32-bit GOT",
378 .dependencies = featureSet(&[_]Feature{}),
379 };
366380 const ti = @typeInfo(Feature);
367381 for (result) |*elem, i| {
368382 elem.index = i;
......@@ -372,6 +386,13 @@ pub const all_features = blk: {
372386};
373387
374388pub const cpu = struct {
389 pub const generic = Cpu{
390 .name = "generic",
391 .llvm_name = "generic",
392 .features = featureSet(&[_]Feature{
393 .mips32,
394 }),
395 };
375396 pub const mips1 = Cpu{
376397 .name = "mips1",
377398 .llvm_name = "mips1",
......@@ -485,6 +506,15 @@ pub const cpu = struct {
485506 .mips64r2,
486507 }),
487508 };
509 pub const @"octeon+" = Cpu{
510 .name = "octeon+",
511 .llvm_name = "octeon+",
512 .features = featureSet(&[_]Feature{
513 .cnmips,
514 .cnmipsp,
515 .mips64r2,
516 }),
517 };
488518 pub const p5600 = Cpu{
489519 .name = "p5600",
490520 .llvm_name = "p5600",
......@@ -498,6 +528,7 @@ pub const cpu = struct {
498528/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
499529/// compiler has inefficient memory and CPU usage, affecting build times.
500530pub const all_cpus = &[_]*const Cpu{
531 &cpu.generic,
501532 &cpu.mips1,
502533 &cpu.mips2,
503534 &cpu.mips3,
......@@ -514,5 +545,6 @@ pub const all_cpus = &[_]*const Cpu{
514545 &cpu.mips64r5,
515546 &cpu.mips64r6,
516547 &cpu.octeon,
548 &cpu.@"octeon+",
517549 &cpu.p5600,
518550};
lib/std/target/powerpc.zig+51
......@@ -4,6 +4,7 @@ const Cpu = std.Target.Cpu;
44pub const Feature = enum {
55 @"64bit",
66 @"64bitregs",
7 allow_unaligned_fp_access,
78 altivec,
89 booke,
910 bpermd,
......@@ -71,6 +72,11 @@ pub const all_features = blk: {
7172 .description = "Enable 64-bit registers usage for ppc32 [beta]",
7273 .dependencies = featureSet(&[_]Feature{}),
7374 };
75 result[@enumToInt(Feature.allow_unaligned_fp_access)] = .{
76 .llvm_name = "allow-unaligned-fp-access",
77 .description = "CPU does not trap on unaligned FP access",
78 .dependencies = featureSet(&[_]Feature{}),
79 };
7480 result[@enumToInt(Feature.altivec)] = .{
7581 .llvm_name = "altivec",
7682 .description = "Enable Altivec instructions",
......@@ -560,6 +566,7 @@ pub const cpu = struct {
560566 .booke,
561567 .icbt,
562568 .isel,
569 .spe,
563570 }),
564571 };
565572 pub const e500mc = Cpu{
......@@ -584,6 +591,45 @@ pub const cpu = struct {
584591 .stfiwx,
585592 }),
586593 };
594 pub const future = Cpu{
595 .name = "future",
596 .llvm_name = "future",
597 .features = featureSet(&[_]Feature{
598 .@"64bit",
599 .allow_unaligned_fp_access,
600 .altivec,
601 .bpermd,
602 .cmpb,
603 .crypto,
604 .direct_move,
605 .extdiv,
606 .fcpsgn,
607 .fpcvt,
608 .fprnd,
609 .fre,
610 .fres,
611 .frsqrte,
612 .frsqrtes,
613 .fsqrt,
614 .htm,
615 .icbt,
616 .isa_v30_instructions,
617 .isel,
618 .ldbrx,
619 .lfiwax,
620 .mfocrf,
621 .partword_atomics,
622 .popcntd,
623 .power8_altivec,
624 .power8_vector,
625 .power9_altivec,
626 .power9_vector,
627 .recipprec,
628 .stfiwx,
629 .two_const_nr,
630 .vsx,
631 }),
632 };
587633 pub const g3 = Cpu{
588634 .name = "g3",
589635 .llvm_name = "g3",
......@@ -662,6 +708,7 @@ pub const cpu = struct {
662708 .llvm_name = "ppc64le",
663709 .features = featureSet(&[_]Feature{
664710 .@"64bit",
711 .allow_unaligned_fp_access,
665712 .altivec,
666713 .bpermd,
667714 .cmpb,
......@@ -793,6 +840,7 @@ pub const cpu = struct {
793840 .llvm_name = "pwr7",
794841 .features = featureSet(&[_]Feature{
795842 .@"64bit",
843 .allow_unaligned_fp_access,
796844 .altivec,
797845 .bpermd,
798846 .cmpb,
......@@ -821,6 +869,7 @@ pub const cpu = struct {
821869 .llvm_name = "pwr8",
822870 .features = featureSet(&[_]Feature{
823871 .@"64bit",
872 .allow_unaligned_fp_access,
824873 .altivec,
825874 .bpermd,
826875 .cmpb,
......@@ -856,6 +905,7 @@ pub const cpu = struct {
856905 .llvm_name = "pwr9",
857906 .features = featureSet(&[_]Feature{
858907 .@"64bit",
908 .allow_unaligned_fp_access,
859909 .altivec,
860910 .bpermd,
861911 .cmpb,
......@@ -917,6 +967,7 @@ pub const all_cpus = &[_]*const Cpu{
917967 &cpu.e500,
918968 &cpu.e500mc,
919969 &cpu.e5500,
970 &cpu.future,
920971 &cpu.g3,
921972 &cpu.g4,
922973 &cpu.@"g4+",
lib/std/target/riscv.zig+196-2
......@@ -10,6 +10,38 @@ pub const Feature = enum {
1010 f,
1111 m,
1212 relax,
13 reserve_x1,
14 reserve_x10,
15 reserve_x11,
16 reserve_x12,
17 reserve_x13,
18 reserve_x14,
19 reserve_x15,
20 reserve_x16,
21 reserve_x17,
22 reserve_x18,
23 reserve_x19,
24 reserve_x2,
25 reserve_x20,
26 reserve_x21,
27 reserve_x22,
28 reserve_x23,
29 reserve_x24,
30 reserve_x25,
31 reserve_x26,
32 reserve_x27,
33 reserve_x28,
34 reserve_x29,
35 reserve_x3,
36 reserve_x30,
37 reserve_x31,
38 reserve_x4,
39 reserve_x5,
40 reserve_x6,
41 reserve_x7,
42 reserve_x8,
43 reserve_x9,
44 rvc_hints,
1345};
1446
1547pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
......@@ -60,6 +92,166 @@ pub const all_features = blk: {
6092 .description = "Enable Linker relaxation.",
6193 .dependencies = featureSet(&[_]Feature{}),
6294 };
95 result[@enumToInt(Feature.reserve_x1)] = .{
96 .llvm_name = "reserve-x1",
97 .description = "Reserve X1",
98 .dependencies = featureSet(&[_]Feature{}),
99 };
100 result[@enumToInt(Feature.reserve_x10)] = .{
101 .llvm_name = "reserve-x10",
102 .description = "Reserve X10",
103 .dependencies = featureSet(&[_]Feature{}),
104 };
105 result[@enumToInt(Feature.reserve_x11)] = .{
106 .llvm_name = "reserve-x11",
107 .description = "Reserve X11",
108 .dependencies = featureSet(&[_]Feature{}),
109 };
110 result[@enumToInt(Feature.reserve_x12)] = .{
111 .llvm_name = "reserve-x12",
112 .description = "Reserve X12",
113 .dependencies = featureSet(&[_]Feature{}),
114 };
115 result[@enumToInt(Feature.reserve_x13)] = .{
116 .llvm_name = "reserve-x13",
117 .description = "Reserve X13",
118 .dependencies = featureSet(&[_]Feature{}),
119 };
120 result[@enumToInt(Feature.reserve_x14)] = .{
121 .llvm_name = "reserve-x14",
122 .description = "Reserve X14",
123 .dependencies = featureSet(&[_]Feature{}),
124 };
125 result[@enumToInt(Feature.reserve_x15)] = .{
126 .llvm_name = "reserve-x15",
127 .description = "Reserve X15",
128 .dependencies = featureSet(&[_]Feature{}),
129 };
130 result[@enumToInt(Feature.reserve_x16)] = .{
131 .llvm_name = "reserve-x16",
132 .description = "Reserve X16",
133 .dependencies = featureSet(&[_]Feature{}),
134 };
135 result[@enumToInt(Feature.reserve_x17)] = .{
136 .llvm_name = "reserve-x17",
137 .description = "Reserve X17",
138 .dependencies = featureSet(&[_]Feature{}),
139 };
140 result[@enumToInt(Feature.reserve_x18)] = .{
141 .llvm_name = "reserve-x18",
142 .description = "Reserve X18",
143 .dependencies = featureSet(&[_]Feature{}),
144 };
145 result[@enumToInt(Feature.reserve_x19)] = .{
146 .llvm_name = "reserve-x19",
147 .description = "Reserve X19",
148 .dependencies = featureSet(&[_]Feature{}),
149 };
150 result[@enumToInt(Feature.reserve_x2)] = .{
151 .llvm_name = "reserve-x2",
152 .description = "Reserve X2",
153 .dependencies = featureSet(&[_]Feature{}),
154 };
155 result[@enumToInt(Feature.reserve_x20)] = .{
156 .llvm_name = "reserve-x20",
157 .description = "Reserve X20",
158 .dependencies = featureSet(&[_]Feature{}),
159 };
160 result[@enumToInt(Feature.reserve_x21)] = .{
161 .llvm_name = "reserve-x21",
162 .description = "Reserve X21",
163 .dependencies = featureSet(&[_]Feature{}),
164 };
165 result[@enumToInt(Feature.reserve_x22)] = .{
166 .llvm_name = "reserve-x22",
167 .description = "Reserve X22",
168 .dependencies = featureSet(&[_]Feature{}),
169 };
170 result[@enumToInt(Feature.reserve_x23)] = .{
171 .llvm_name = "reserve-x23",
172 .description = "Reserve X23",
173 .dependencies = featureSet(&[_]Feature{}),
174 };
175 result[@enumToInt(Feature.reserve_x24)] = .{
176 .llvm_name = "reserve-x24",
177 .description = "Reserve X24",
178 .dependencies = featureSet(&[_]Feature{}),
179 };
180 result[@enumToInt(Feature.reserve_x25)] = .{
181 .llvm_name = "reserve-x25",
182 .description = "Reserve X25",
183 .dependencies = featureSet(&[_]Feature{}),
184 };
185 result[@enumToInt(Feature.reserve_x26)] = .{
186 .llvm_name = "reserve-x26",
187 .description = "Reserve X26",
188 .dependencies = featureSet(&[_]Feature{}),
189 };
190 result[@enumToInt(Feature.reserve_x27)] = .{
191 .llvm_name = "reserve-x27",
192 .description = "Reserve X27",
193 .dependencies = featureSet(&[_]Feature{}),
194 };
195 result[@enumToInt(Feature.reserve_x28)] = .{
196 .llvm_name = "reserve-x28",
197 .description = "Reserve X28",
198 .dependencies = featureSet(&[_]Feature{}),
199 };
200 result[@enumToInt(Feature.reserve_x29)] = .{
201 .llvm_name = "reserve-x29",
202 .description = "Reserve X29",
203 .dependencies = featureSet(&[_]Feature{}),
204 };
205 result[@enumToInt(Feature.reserve_x3)] = .{
206 .llvm_name = "reserve-x3",
207 .description = "Reserve X3",
208 .dependencies = featureSet(&[_]Feature{}),
209 };
210 result[@enumToInt(Feature.reserve_x30)] = .{
211 .llvm_name = "reserve-x30",
212 .description = "Reserve X30",
213 .dependencies = featureSet(&[_]Feature{}),
214 };
215 result[@enumToInt(Feature.reserve_x31)] = .{
216 .llvm_name = "reserve-x31",
217 .description = "Reserve X31",
218 .dependencies = featureSet(&[_]Feature{}),
219 };
220 result[@enumToInt(Feature.reserve_x4)] = .{
221 .llvm_name = "reserve-x4",
222 .description = "Reserve X4",
223 .dependencies = featureSet(&[_]Feature{}),
224 };
225 result[@enumToInt(Feature.reserve_x5)] = .{
226 .llvm_name = "reserve-x5",
227 .description = "Reserve X5",
228 .dependencies = featureSet(&[_]Feature{}),
229 };
230 result[@enumToInt(Feature.reserve_x6)] = .{
231 .llvm_name = "reserve-x6",
232 .description = "Reserve X6",
233 .dependencies = featureSet(&[_]Feature{}),
234 };
235 result[@enumToInt(Feature.reserve_x7)] = .{
236 .llvm_name = "reserve-x7",
237 .description = "Reserve X7",
238 .dependencies = featureSet(&[_]Feature{}),
239 };
240 result[@enumToInt(Feature.reserve_x8)] = .{
241 .llvm_name = "reserve-x8",
242 .description = "Reserve X8",
243 .dependencies = featureSet(&[_]Feature{}),
244 };
245 result[@enumToInt(Feature.reserve_x9)] = .{
246 .llvm_name = "reserve-x9",
247 .description = "Reserve X9",
248 .dependencies = featureSet(&[_]Feature{}),
249 };
250 result[@enumToInt(Feature.rvc_hints)] = .{
251 .llvm_name = "rvc-hints",
252 .description = "Enable RVC Hint Instructions.",
253 .dependencies = featureSet(&[_]Feature{}),
254 };
63255 const ti = @typeInfo(Feature);
64256 for (result) |*elem, i| {
65257 elem.index = i;
......@@ -99,14 +291,16 @@ pub const cpu = struct {
99291 pub const generic_rv32 = Cpu{
100292 .name = "generic_rv32",
101293 .llvm_name = "generic-rv32",
102 .features = featureSet(&[_]Feature{}),
294 .features = featureSet(&[_]Feature{
295 .rvc_hints,
296 }),
103297 };
104
105298 pub const generic_rv64 = Cpu{
106299 .name = "generic_rv64",
107300 .llvm_name = "generic-rv64",
108301 .features = featureSet(&[_]Feature{
109302 .@"64bit",
303 .rvc_hints,
110304 }),
111305 };
112306};
lib/std/target/systemz.zig+42
......@@ -450,6 +450,47 @@ pub const cpu = struct {
450450 .vector_packed_decimal,
451451 }),
452452 };
453 pub const z15 = Cpu{
454 .name = "z15",
455 .llvm_name = "z15",
456 .features = featureSet(&[_]Feature{
457 .deflate_conversion,
458 .dfp_packed_conversion,
459 .dfp_zoned_conversion,
460 .distinct_ops,
461 .enhanced_dat_2,
462 .enhanced_sort,
463 .execution_hint,
464 .fast_serialization,
465 .fp_extension,
466 .guarded_storage,
467 .high_word,
468 .insert_reference_bits_multiple,
469 .interlocked_access1,
470 .load_and_trap,
471 .load_and_zero_rightmost_byte,
472 .load_store_on_cond,
473 .load_store_on_cond_2,
474 .message_security_assist_extension3,
475 .message_security_assist_extension4,
476 .message_security_assist_extension5,
477 .message_security_assist_extension7,
478 .message_security_assist_extension8,
479 .message_security_assist_extension9,
480 .miscellaneous_extensions,
481 .miscellaneous_extensions_2,
482 .miscellaneous_extensions_3,
483 .population_count,
484 .processor_assist,
485 .reset_reference_bits_multiple,
486 .transactional_execution,
487 .vector,
488 .vector_enhancements_1,
489 .vector_enhancements_2,
490 .vector_packed_decimal,
491 .vector_packed_decimal_enhancement,
492 }),
493 };
453494 pub const z196 = Cpu{
454495 .name = "z196",
455496 .llvm_name = "z196",
......@@ -505,6 +546,7 @@ pub const all_cpus = &[_]*const Cpu{
505546 &cpu.z10,
506547 &cpu.z13,
507548 &cpu.z14,
549 &cpu.z15,
508550 &cpu.z196,
509551 &cpu.zEC12,
510552};
lib/std/target/x86.zig+213-25
......@@ -2,9 +2,12 @@ const std = @import("../std.zig");
22const Cpu = std.Target.Cpu;
33
44pub const Feature = enum {
5 @"16bit_mode",
6 @"32bit_mode",
57 @"3dnow",
68 @"3dnowa",
79 @"64bit",
10 @"64bit_mode",
811 adx,
912 aes,
1013 avx,
......@@ -45,7 +48,6 @@ pub const Feature = enum {
4548 fast_gather,
4649 fast_hops,
4750 fast_lzcnt,
48 fast_partial_ymm_or_zmm_write,
4951 fast_scalar_fsqrt,
5052 fast_scalar_shift_masks,
5153 fast_shld_rotate,
......@@ -78,7 +80,9 @@ pub const Feature = enum {
7880 pconfig,
7981 pku,
8082 popcnt,
83 prefer_128_bit,
8184 prefer_256_bit,
85 prefer_mask_registers,
8286 prefetchwt1,
8387 prfchw,
8488 ptwrite,
......@@ -113,8 +117,11 @@ pub const Feature = enum {
113117 sse4a,
114118 ssse3,
115119 tbm,
120 use_aa,
121 use_glm_div_sqrt_costs,
116122 vaes,
117123 vpclmulqdq,
124 vzeroupper,
118125 waitpkg,
119126 wbnoinvd,
120127 x87,
......@@ -131,6 +138,16 @@ pub const all_features = blk: {
131138 const len = @typeInfo(Feature).Enum.fields.len;
132139 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
133140 var result: [len]Cpu.Feature = undefined;
141 result[@enumToInt(Feature.@"16bit_mode")] = .{
142 .llvm_name = "16bit-mode",
143 .description = "16-bit mode (i8086)",
144 .dependencies = featureSet(&[_]Feature{}),
145 };
146 result[@enumToInt(Feature.@"32bit_mode")] = .{
147 .llvm_name = "32bit-mode",
148 .description = "32-bit mode (80386)",
149 .dependencies = featureSet(&[_]Feature{}),
150 };
134151 result[@enumToInt(Feature.@"3dnow")] = .{
135152 .llvm_name = "3dnow",
136153 .description = "Enable 3DNow! instructions",
......@@ -150,6 +167,11 @@ pub const all_features = blk: {
150167 .description = "Support 64-bit instructions",
151168 .dependencies = featureSet(&[_]Feature{}),
152169 };
170 result[@enumToInt(Feature.@"64bit_mode")] = .{
171 .llvm_name = "64bit-mode",
172 .description = "64-bit mode (x86_64)",
173 .dependencies = featureSet(&[_]Feature{}),
174 };
153175 result[@enumToInt(Feature.adx)] = .{
154176 .llvm_name = "adx",
155177 .description = "Support ADX instructions",
......@@ -385,20 +407,13 @@ pub const all_features = blk: {
385407 result[@enumToInt(Feature.fast_hops)] = .{
386408 .llvm_name = "fast-hops",
387409 .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
388 .dependencies = featureSet(&[_]Feature{
389 .sse3,
390 }),
410 .dependencies = featureSet(&[_]Feature{}),
391411 };
392412 result[@enumToInt(Feature.fast_lzcnt)] = .{
393413 .llvm_name = "fast-lzcnt",
394414 .description = "LZCNT instructions are as fast as most simple integer ops",
395415 .dependencies = featureSet(&[_]Feature{}),
396416 };
397 result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{
398 .llvm_name = "fast-partial-ymm-or-zmm-write",
399 .description = "Partial writes to YMM/ZMM registers are fast",
400 .dependencies = featureSet(&[_]Feature{}),
401 };
402417 result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{
403418 .llvm_name = "fast-scalar-fsqrt",
404419 .description = "Scalar SQRT is fast (disable Newton-Raphson)",
......@@ -528,7 +543,7 @@ pub const all_features = blk: {
528543 };
529544 result[@enumToInt(Feature.mpx)] = .{
530545 .llvm_name = "mpx",
531 .description = "Support MPX instructions",
546 .description = "Deprecated. Support MPX instructions",
532547 .dependencies = featureSet(&[_]Feature{}),
533548 };
534549 result[@enumToInt(Feature.mwaitx)] = .{
......@@ -568,11 +583,21 @@ pub const all_features = blk: {
568583 .description = "Support POPCNT instruction",
569584 .dependencies = featureSet(&[_]Feature{}),
570585 };
586 result[@enumToInt(Feature.prefer_128_bit)] = .{
587 .llvm_name = "prefer-128-bit",
588 .description = "Prefer 128-bit AVX instructions",
589 .dependencies = featureSet(&[_]Feature{}),
590 };
571591 result[@enumToInt(Feature.prefer_256_bit)] = .{
572592 .llvm_name = "prefer-256-bit",
573593 .description = "Prefer 256-bit AVX instructions",
574594 .dependencies = featureSet(&[_]Feature{}),
575595 };
596 result[@enumToInt(Feature.prefer_mask_registers)] = .{
597 .llvm_name = "prefer-mask-registers",
598 .description = "Prefer AVX512 mask registers over PTEST/MOVMSK",
599 .dependencies = featureSet(&[_]Feature{}),
600 };
576601 result[@enumToInt(Feature.prefetchwt1)] = .{
577602 .llvm_name = "prefetchwt1",
578603 .description = "Prefetch with Intent to Write and T1 Hint",
......@@ -762,6 +787,16 @@ pub const all_features = blk: {
762787 .description = "Enable TBM instructions",
763788 .dependencies = featureSet(&[_]Feature{}),
764789 };
790 result[@enumToInt(Feature.use_aa)] = .{
791 .llvm_name = "use-aa",
792 .description = "Use alias analysis during codegen",
793 .dependencies = featureSet(&[_]Feature{}),
794 };
795 result[@enumToInt(Feature.use_glm_div_sqrt_costs)] = .{
796 .llvm_name = "use-glm-div-sqrt-costs",
797 .description = "Use Goldmont specific floating point div/sqrt costs",
798 .dependencies = featureSet(&[_]Feature{}),
799 };
765800 result[@enumToInt(Feature.vaes)] = .{
766801 .llvm_name = "vaes",
767802 .description = "Promote selected AES instructions to AVX512/AVX registers",
......@@ -778,6 +813,11 @@ pub const all_features = blk: {
778813 .pclmul,
779814 }),
780815 };
816 result[@enumToInt(Feature.vzeroupper)] = .{
817 .llvm_name = "vzeroupper",
818 .description = "Should insert vzeroupper instructions",
819 .dependencies = featureSet(&[_]Feature{}),
820 };
781821 result[@enumToInt(Feature.waitpkg)] = .{
782822 .llvm_name = "waitpkg",
783823 .description = "Wait and pause enhancements",
......@@ -846,6 +886,7 @@ pub const cpu = struct {
846886 .sahf,
847887 .slow_shld,
848888 .sse4a,
889 .vzeroupper,
849890 .x87,
850891 }),
851892 };
......@@ -859,6 +900,7 @@ pub const cpu = struct {
859900 .nopl,
860901 .slow_shld,
861902 .slow_unaligned_mem_16,
903 .vzeroupper,
862904 .x87,
863905 }),
864906 };
......@@ -874,6 +916,7 @@ pub const cpu = struct {
874916 .slow_shld,
875917 .slow_unaligned_mem_16,
876918 .sse,
919 .vzeroupper,
877920 .x87,
878921 }),
879922 };
......@@ -891,6 +934,7 @@ pub const cpu = struct {
891934 .slow_shld,
892935 .slow_unaligned_mem_16,
893936 .sse2,
937 .vzeroupper,
894938 .x87,
895939 }),
896940 };
......@@ -906,6 +950,7 @@ pub const cpu = struct {
906950 .slow_shld,
907951 .slow_unaligned_mem_16,
908952 .sse,
953 .vzeroupper,
909954 .x87,
910955 }),
911956 };
......@@ -919,6 +964,7 @@ pub const cpu = struct {
919964 .nopl,
920965 .slow_shld,
921966 .slow_unaligned_mem_16,
967 .vzeroupper,
922968 .x87,
923969 }),
924970 };
......@@ -934,6 +980,7 @@ pub const cpu = struct {
934980 .slow_shld,
935981 .slow_unaligned_mem_16,
936982 .sse,
983 .vzeroupper,
937984 .x87,
938985 }),
939986 };
......@@ -951,6 +998,7 @@ pub const cpu = struct {
951998 .slow_shld,
952999 .slow_unaligned_mem_16,
9531000 .sse2,
1001 .vzeroupper,
9541002 .x87,
9551003 }),
9561004 };
......@@ -969,6 +1017,7 @@ pub const cpu = struct {
9691017 .slow_shld,
9701018 .slow_unaligned_mem_16,
9711019 .sse3,
1020 .vzeroupper,
9721021 .x87,
9731022 }),
9741023 };
......@@ -993,6 +1042,7 @@ pub const cpu = struct {
9931042 .slow_two_mem_ops,
9941043 .slow_unaligned_mem_16,
9951044 .ssse3,
1045 .vzeroupper,
9961046 .x87,
9971047 }),
9981048 };
......@@ -1013,6 +1063,7 @@ pub const cpu = struct {
10131063 .sahf,
10141064 .slow_shld,
10151065 .sse4a,
1066 .vzeroupper,
10161067 .x87,
10171068 }),
10181069 };
......@@ -1038,6 +1089,7 @@ pub const cpu = struct {
10381089 .prfchw,
10391090 .sahf,
10401091 .slow_shld,
1092 .vzeroupper,
10411093 .x87,
10421094 .xop,
10431095 .xsave,
......@@ -1070,6 +1122,7 @@ pub const cpu = struct {
10701122 .sahf,
10711123 .slow_shld,
10721124 .tbm,
1125 .vzeroupper,
10731126 .x87,
10741127 .xop,
10751128 .xsave,
......@@ -1103,6 +1156,7 @@ pub const cpu = struct {
11031156 .sahf,
11041157 .slow_shld,
11051158 .tbm,
1159 .vzeroupper,
11061160 .x87,
11071161 .xop,
11081162 .xsave,
......@@ -1140,6 +1194,7 @@ pub const cpu = struct {
11401194 .sahf,
11411195 .slow_shld,
11421196 .tbm,
1197 .vzeroupper,
11431198 .x87,
11441199 .xop,
11451200 .xsave,
......@@ -1167,6 +1222,7 @@ pub const cpu = struct {
11671222 .slow_two_mem_ops,
11681223 .slow_unaligned_mem_16,
11691224 .ssse3,
1225 .vzeroupper,
11701226 .x87,
11711227 }),
11721228 };
......@@ -1209,6 +1265,7 @@ pub const cpu = struct {
12091265 .sahf,
12101266 .slow_3ops_lea,
12111267 .sse4_2,
1268 .vzeroupper,
12121269 .x87,
12131270 .xsave,
12141271 .xsaveopt,
......@@ -1235,6 +1292,7 @@ pub const cpu = struct {
12351292 .slow_shld,
12361293 .sse4a,
12371294 .ssse3,
1295 .vzeroupper,
12381296 .x87,
12391297 }),
12401298 };
......@@ -1254,7 +1312,6 @@ pub const cpu = struct {
12541312 .fast_bextr,
12551313 .fast_hops,
12561314 .fast_lzcnt,
1257 .fast_partial_ymm_or_zmm_write,
12581315 .fast_scalar_shift_masks,
12591316 .fast_vector_shift_masks,
12601317 .fxsr,
......@@ -1280,6 +1337,7 @@ pub const cpu = struct {
12801337 .features = featureSet(&[_]Feature{
12811338 .@"3dnow",
12821339 .slow_unaligned_mem_16,
1340 .vzeroupper,
12831341 .x87,
12841342 }),
12851343 };
......@@ -1293,6 +1351,7 @@ pub const cpu = struct {
12931351 .mmx,
12941352 .slow_unaligned_mem_16,
12951353 .sse,
1354 .vzeroupper,
12961355 .x87,
12971356 }),
12981357 };
......@@ -1335,11 +1394,11 @@ pub const cpu = struct {
13351394 .merge_to_threeway_branch,
13361395 .mmx,
13371396 .movbe,
1338 .mpx,
13391397 .nopl,
13401398 .pclmul,
13411399 .pku,
13421400 .popcnt,
1401 .prefer_256_bit,
13431402 .prfchw,
13441403 .rdrnd,
13451404 .rdseed,
......@@ -1348,6 +1407,7 @@ pub const cpu = struct {
13481407 .sha,
13491408 .slow_3ops_lea,
13501409 .sse4_2,
1410 .vzeroupper,
13511411 .x87,
13521412 .xsave,
13531413 .xsavec,
......@@ -1395,17 +1455,18 @@ pub const cpu = struct {
13951455 .merge_to_threeway_branch,
13961456 .mmx,
13971457 .movbe,
1398 .mpx,
13991458 .nopl,
14001459 .pclmul,
14011460 .pku,
14021461 .popcnt,
1462 .prefer_256_bit,
14031463 .prfchw,
14041464 .rdrnd,
14051465 .rdseed,
14061466 .sahf,
14071467 .slow_3ops_lea,
14081468 .sse4_2,
1469 .vzeroupper,
14091470 .x87,
14101471 .xsave,
14111472 .xsavec,
......@@ -1454,17 +1515,18 @@ pub const cpu = struct {
14541515 .merge_to_threeway_branch,
14551516 .mmx,
14561517 .movbe,
1457 .mpx,
14581518 .nopl,
14591519 .pclmul,
14601520 .pku,
14611521 .popcnt,
1522 .prefer_256_bit,
14621523 .prfchw,
14631524 .rdrnd,
14641525 .rdseed,
14651526 .sahf,
14661527 .slow_3ops_lea,
14671528 .sse4_2,
1529 .vzeroupper,
14681530 .x87,
14691531 .xsave,
14701532 .xsavec,
......@@ -1499,6 +1561,7 @@ pub const cpu = struct {
14991561 .slow_3ops_lea,
15001562 .slow_unaligned_mem_32,
15011563 .sse4_2,
1564 .vzeroupper,
15021565 .x87,
15031566 .xsave,
15041567 .xsaveopt,
......@@ -1540,6 +1603,7 @@ pub const cpu = struct {
15401603 .sahf,
15411604 .slow_3ops_lea,
15421605 .sse4_2,
1606 .vzeroupper,
15431607 .x87,
15441608 .xsave,
15451609 .xsaveopt,
......@@ -1560,6 +1624,7 @@ pub const cpu = struct {
15601624 .sahf,
15611625 .slow_unaligned_mem_16,
15621626 .ssse3,
1627 .vzeroupper,
15631628 .x87,
15641629 }),
15651630 };
......@@ -1578,6 +1643,7 @@ pub const cpu = struct {
15781643 .popcnt,
15791644 .sahf,
15801645 .sse4_2,
1646 .vzeroupper,
15811647 .x87,
15821648 }),
15831649 };
......@@ -1605,6 +1671,7 @@ pub const cpu = struct {
16051671 .slow_3ops_lea,
16061672 .slow_unaligned_mem_32,
16071673 .sse4_2,
1674 .vzeroupper,
16081675 .x87,
16091676 .xsave,
16101677 .xsaveopt,
......@@ -1616,6 +1683,7 @@ pub const cpu = struct {
16161683 .features = featureSet(&[_]Feature{
16171684 .cx8,
16181685 .slow_unaligned_mem_16,
1686 .vzeroupper,
16191687 .x87,
16201688 }),
16211689 };
......@@ -1626,6 +1694,7 @@ pub const cpu = struct {
16261694 .@"3dnowa",
16271695 .cx8,
16281696 .slow_unaligned_mem_16,
1697 .vzeroupper,
16291698 .x87,
16301699 }),
16311700 };
......@@ -1644,7 +1713,6 @@ pub const cpu = struct {
16441713 .fxsr,
16451714 .mmx,
16461715 .movbe,
1647 .mpx,
16481716 .nopl,
16491717 .pclmul,
16501718 .popcnt,
......@@ -1658,6 +1726,8 @@ pub const cpu = struct {
16581726 .slow_two_mem_ops,
16591727 .sse4_2,
16601728 .ssse3,
1729 .use_glm_div_sqrt_costs,
1730 .vzeroupper,
16611731 .x87,
16621732 .xsave,
16631733 .xsavec,
......@@ -1679,7 +1749,6 @@ pub const cpu = struct {
16791749 .fxsr,
16801750 .mmx,
16811751 .movbe,
1682 .mpx,
16831752 .nopl,
16841753 .pclmul,
16851754 .popcnt,
......@@ -1696,6 +1765,8 @@ pub const cpu = struct {
16961765 .slow_two_mem_ops,
16971766 .sse4_2,
16981767 .ssse3,
1768 .use_glm_div_sqrt_costs,
1769 .vzeroupper,
16991770 .x87,
17001771 .xsave,
17011772 .xsavec,
......@@ -1739,6 +1810,7 @@ pub const cpu = struct {
17391810 .sahf,
17401811 .slow_3ops_lea,
17411812 .sse4_2,
1813 .vzeroupper,
17421814 .x87,
17431815 .xsave,
17441816 .xsaveopt,
......@@ -1749,6 +1821,7 @@ pub const cpu = struct {
17491821 .llvm_name = "i386",
17501822 .features = featureSet(&[_]Feature{
17511823 .slow_unaligned_mem_16,
1824 .vzeroupper,
17521825 .x87,
17531826 }),
17541827 };
......@@ -1757,6 +1830,7 @@ pub const cpu = struct {
17571830 .llvm_name = "i486",
17581831 .features = featureSet(&[_]Feature{
17591832 .slow_unaligned_mem_16,
1833 .vzeroupper,
17601834 .x87,
17611835 }),
17621836 };
......@@ -1766,6 +1840,7 @@ pub const cpu = struct {
17661840 .features = featureSet(&[_]Feature{
17671841 .cx8,
17681842 .slow_unaligned_mem_16,
1843 .vzeroupper,
17691844 .x87,
17701845 }),
17711846 };
......@@ -1776,6 +1851,7 @@ pub const cpu = struct {
17761851 .cmov,
17771852 .cx8,
17781853 .slow_unaligned_mem_16,
1854 .vzeroupper,
17791855 .x87,
17801856 }),
17811857 };
......@@ -1824,11 +1900,11 @@ pub const cpu = struct {
18241900 .merge_to_threeway_branch,
18251901 .mmx,
18261902 .movbe,
1827 .mpx,
18281903 .nopl,
18291904 .pclmul,
18301905 .pku,
18311906 .popcnt,
1907 .prefer_256_bit,
18321908 .prfchw,
18331909 .rdpid,
18341910 .rdrnd,
......@@ -1840,6 +1916,7 @@ pub const cpu = struct {
18401916 .sse4_2,
18411917 .vaes,
18421918 .vpclmulqdq,
1919 .vzeroupper,
18431920 .x87,
18441921 .xsave,
18451922 .xsavec,
......@@ -1892,12 +1969,12 @@ pub const cpu = struct {
18921969 .merge_to_threeway_branch,
18931970 .mmx,
18941971 .movbe,
1895 .mpx,
18961972 .nopl,
18971973 .pclmul,
18981974 .pconfig,
18991975 .pku,
19001976 .popcnt,
1977 .prefer_256_bit,
19011978 .prfchw,
19021979 .rdpid,
19031980 .rdrnd,
......@@ -1909,6 +1986,7 @@ pub const cpu = struct {
19091986 .sse4_2,
19101987 .vaes,
19111988 .vpclmulqdq,
1989 .vzeroupper,
19121990 .wbnoinvd,
19131991 .x87,
19141992 .xsave,
......@@ -1944,6 +2022,7 @@ pub const cpu = struct {
19442022 .slow_3ops_lea,
19452023 .slow_unaligned_mem_32,
19462024 .sse4_2,
2025 .vzeroupper,
19472026 .x87,
19482027 .xsave,
19492028 .xsaveopt,
......@@ -1956,6 +2035,7 @@ pub const cpu = struct {
19562035 .cx8,
19572036 .mmx,
19582037 .slow_unaligned_mem_16,
2038 .vzeroupper,
19592039 .x87,
19602040 }),
19612041 };
......@@ -1966,6 +2046,7 @@ pub const cpu = struct {
19662046 .@"3dnow",
19672047 .cx8,
19682048 .slow_unaligned_mem_16,
2049 .vzeroupper,
19692050 .x87,
19702051 }),
19712052 };
......@@ -1976,6 +2057,7 @@ pub const cpu = struct {
19762057 .@"3dnow",
19772058 .cx8,
19782059 .slow_unaligned_mem_16,
2060 .vzeroupper,
19792061 .x87,
19802062 }),
19812063 };
......@@ -1993,6 +2075,7 @@ pub const cpu = struct {
19932075 .slow_shld,
19942076 .slow_unaligned_mem_16,
19952077 .sse2,
2078 .vzeroupper,
19962079 .x87,
19972080 }),
19982081 };
......@@ -2011,6 +2094,7 @@ pub const cpu = struct {
20112094 .slow_shld,
20122095 .slow_unaligned_mem_16,
20132096 .sse3,
2097 .vzeroupper,
20142098 .x87,
20152099 }),
20162100 };
......@@ -2032,7 +2116,6 @@ pub const cpu = struct {
20322116 .cx8,
20332117 .f16c,
20342118 .fast_gather,
2035 .fast_partial_ymm_or_zmm_write,
20362119 .fma,
20372120 .fsgsbase,
20382121 .fxsr,
......@@ -2043,6 +2126,7 @@ pub const cpu = struct {
20432126 .nopl,
20442127 .pclmul,
20452128 .popcnt,
2129 .prefer_mask_registers,
20462130 .prefetchwt1,
20472131 .prfchw,
20482132 .rdrnd,
......@@ -2076,7 +2160,6 @@ pub const cpu = struct {
20762160 .cx8,
20772161 .f16c,
20782162 .fast_gather,
2079 .fast_partial_ymm_or_zmm_write,
20802163 .fma,
20812164 .fsgsbase,
20822165 .fxsr,
......@@ -2087,6 +2170,7 @@ pub const cpu = struct {
20872170 .nopl,
20882171 .pclmul,
20892172 .popcnt,
2173 .prefer_mask_registers,
20902174 .prefetchwt1,
20912175 .prfchw,
20922176 .rdrnd,
......@@ -2104,7 +2188,9 @@ pub const cpu = struct {
21042188 pub const lakemont = Cpu{
21052189 .name = "lakemont",
21062190 .llvm_name = "lakemont",
2107 .features = featureSet(&[_]Feature{}),
2191 .features = featureSet(&[_]Feature{
2192 .vzeroupper,
2193 }),
21082194 };
21092195 pub const nehalem = Cpu{
21102196 .name = "nehalem",
......@@ -2121,6 +2207,7 @@ pub const cpu = struct {
21212207 .popcnt,
21222208 .sahf,
21232209 .sse4_2,
2210 .vzeroupper,
21242211 .x87,
21252212 }),
21262213 };
......@@ -2137,6 +2224,7 @@ pub const cpu = struct {
21372224 .nopl,
21382225 .slow_unaligned_mem_16,
21392226 .sse3,
2227 .vzeroupper,
21402228 .x87,
21412229 }),
21422230 };
......@@ -2154,6 +2242,7 @@ pub const cpu = struct {
21542242 .slow_shld,
21552243 .slow_unaligned_mem_16,
21562244 .sse2,
2245 .vzeroupper,
21572246 .x87,
21582247 }),
21592248 };
......@@ -2172,6 +2261,7 @@ pub const cpu = struct {
21722261 .slow_shld,
21732262 .slow_unaligned_mem_16,
21742263 .sse3,
2264 .vzeroupper,
21752265 .x87,
21762266 }),
21772267 };
......@@ -2190,6 +2280,7 @@ pub const cpu = struct {
21902280 .sahf,
21912281 .slow_unaligned_mem_16,
21922282 .sse4_1,
2283 .vzeroupper,
21932284 .x87,
21942285 }),
21952286 };
......@@ -2199,6 +2290,7 @@ pub const cpu = struct {
21992290 .features = featureSet(&[_]Feature{
22002291 .cx8,
22012292 .slow_unaligned_mem_16,
2293 .vzeroupper,
22022294 .x87,
22032295 }),
22042296 };
......@@ -2213,6 +2305,7 @@ pub const cpu = struct {
22132305 .nopl,
22142306 .slow_unaligned_mem_16,
22152307 .sse2,
2308 .vzeroupper,
22162309 .x87,
22172310 }),
22182311 };
......@@ -2223,6 +2316,7 @@ pub const cpu = struct {
22232316 .cx8,
22242317 .mmx,
22252318 .slow_unaligned_mem_16,
2319 .vzeroupper,
22262320 .x87,
22272321 }),
22282322 };
......@@ -2236,6 +2330,7 @@ pub const cpu = struct {
22362330 .mmx,
22372331 .nopl,
22382332 .slow_unaligned_mem_16,
2333 .vzeroupper,
22392334 .x87,
22402335 }),
22412336 };
......@@ -2250,6 +2345,7 @@ pub const cpu = struct {
22502345 .nopl,
22512346 .slow_unaligned_mem_16,
22522347 .sse,
2348 .vzeroupper,
22532349 .x87,
22542350 }),
22552351 };
......@@ -2264,6 +2360,7 @@ pub const cpu = struct {
22642360 .nopl,
22652361 .slow_unaligned_mem_16,
22662362 .sse,
2363 .vzeroupper,
22672364 .x87,
22682365 }),
22692366 };
......@@ -2278,6 +2375,7 @@ pub const cpu = struct {
22782375 .nopl,
22792376 .slow_unaligned_mem_16,
22802377 .sse2,
2378 .vzeroupper,
22812379 .x87,
22822380 }),
22832381 };
......@@ -2292,6 +2390,7 @@ pub const cpu = struct {
22922390 .nopl,
22932391 .slow_unaligned_mem_16,
22942392 .sse2,
2393 .vzeroupper,
22952394 .x87,
22962395 }),
22972396 };
......@@ -2303,6 +2402,7 @@ pub const cpu = struct {
23032402 .cx8,
23042403 .nopl,
23052404 .slow_unaligned_mem_16,
2405 .vzeroupper,
23062406 .x87,
23072407 }),
23082408 };
......@@ -2317,6 +2417,7 @@ pub const cpu = struct {
23172417 .nopl,
23182418 .slow_unaligned_mem_16,
23192419 .sse3,
2420 .vzeroupper,
23202421 .x87,
23212422 }),
23222423 };
......@@ -2344,6 +2445,7 @@ pub const cpu = struct {
23442445 .slow_3ops_lea,
23452446 .slow_unaligned_mem_32,
23462447 .sse4_2,
2448 .vzeroupper,
23472449 .x87,
23482450 .xsave,
23492451 .xsaveopt,
......@@ -2374,6 +2476,7 @@ pub const cpu = struct {
23742476 .slow_two_mem_ops,
23752477 .sse4_2,
23762478 .ssse3,
2479 .vzeroupper,
23772480 .x87,
23782481 }),
23792482 };
......@@ -2416,17 +2519,18 @@ pub const cpu = struct {
24162519 .merge_to_threeway_branch,
24172520 .mmx,
24182521 .movbe,
2419 .mpx,
24202522 .nopl,
24212523 .pclmul,
24222524 .pku,
24232525 .popcnt,
2526 .prefer_256_bit,
24242527 .prfchw,
24252528 .rdrnd,
24262529 .rdseed,
24272530 .sahf,
24282531 .slow_3ops_lea,
24292532 .sse4_2,
2533 .vzeroupper,
24302534 .x87,
24312535 .xsave,
24322536 .xsavec,
......@@ -2467,7 +2571,6 @@ pub const cpu = struct {
24672571 .merge_to_threeway_branch,
24682572 .mmx,
24692573 .movbe,
2470 .mpx,
24712574 .nopl,
24722575 .pclmul,
24732576 .popcnt,
......@@ -2478,6 +2581,7 @@ pub const cpu = struct {
24782581 .sgx,
24792582 .slow_3ops_lea,
24802583 .sse4_2,
2584 .vzeroupper,
24812585 .x87,
24822586 .xsave,
24832587 .xsavec,
......@@ -2524,17 +2628,18 @@ pub const cpu = struct {
25242628 .merge_to_threeway_branch,
25252629 .mmx,
25262630 .movbe,
2527 .mpx,
25282631 .nopl,
25292632 .pclmul,
25302633 .pku,
25312634 .popcnt,
2635 .prefer_256_bit,
25322636 .prfchw,
25332637 .rdrnd,
25342638 .rdseed,
25352639 .sahf,
25362640 .slow_3ops_lea,
25372641 .sse4_2,
2642 .vzeroupper,
25382643 .x87,
25392644 .xsave,
25402645 .xsavec,
......@@ -2567,7 +2672,81 @@ pub const cpu = struct {
25672672 .slow_two_mem_ops,
25682673 .sse4_2,
25692674 .ssse3,
2675 .vzeroupper,
2676 .x87,
2677 }),
2678 };
2679 pub const tigerlake = Cpu{
2680 .name = "tigerlake",
2681 .llvm_name = "tigerlake",
2682 .features = featureSet(&[_]Feature{
2683 .@"64bit",
2684 .adx,
2685 .aes,
2686 .avx,
2687 .avx2,
2688 .avx512bitalg,
2689 .avx512bw,
2690 .avx512cd,
2691 .avx512dq,
2692 .avx512f,
2693 .avx512ifma,
2694 .avx512vbmi,
2695 .avx512vbmi2,
2696 .avx512vl,
2697 .avx512vnni,
2698 .avx512vp2intersect,
2699 .avx512vpopcntdq,
2700 .bmi,
2701 .bmi2,
2702 .clflushopt,
2703 .clwb,
2704 .cmov,
2705 .cx16,
2706 .cx8,
2707 .ermsb,
2708 .f16c,
2709 .fast_gather,
2710 .fast_scalar_fsqrt,
2711 .fast_shld_rotate,
2712 .fast_variable_shuffle,
2713 .fast_vector_fsqrt,
2714 .fma,
2715 .fsgsbase,
2716 .fxsr,
2717 .gfni,
2718 .idivq_to_divl,
2719 .invpcid,
2720 .lzcnt,
2721 .macrofusion,
2722 .merge_to_threeway_branch,
2723 .mmx,
2724 .movbe,
2725 .movdir64b,
2726 .movdiri,
2727 .nopl,
2728 .pclmul,
2729 .pku,
2730 .popcnt,
2731 .prefer_256_bit,
2732 .prfchw,
2733 .rdpid,
2734 .rdrnd,
2735 .rdseed,
2736 .sahf,
2737 .sgx,
2738 .sha,
2739 .shstk,
2740 .slow_3ops_lea,
2741 .sse4_2,
2742 .vaes,
2743 .vpclmulqdq,
2744 .vzeroupper,
25702745 .x87,
2746 .xsave,
2747 .xsavec,
2748 .xsaveopt,
2749 .xsaves,
25712750 }),
25722751 };
25732752 pub const tremont = Cpu{
......@@ -2588,7 +2767,6 @@ pub const cpu = struct {
25882767 .movbe,
25892768 .movdir64b,
25902769 .movdiri,
2591 .mpx,
25922770 .nopl,
25932771 .pclmul,
25942772 .popcnt,
......@@ -2605,6 +2783,8 @@ pub const cpu = struct {
26052783 .slow_two_mem_ops,
26062784 .sse4_2,
26072785 .ssse3,
2786 .use_glm_div_sqrt_costs,
2787 .vzeroupper,
26082788 .waitpkg,
26092789 .x87,
26102790 .xsave,
......@@ -2629,6 +2809,7 @@ pub const cpu = struct {
26292809 .popcnt,
26302810 .sahf,
26312811 .sse4_2,
2812 .vzeroupper,
26322813 .x87,
26332814 }),
26342815 };
......@@ -2638,6 +2819,7 @@ pub const cpu = struct {
26382819 .features = featureSet(&[_]Feature{
26392820 .mmx,
26402821 .slow_unaligned_mem_16,
2822 .vzeroupper,
26412823 .x87,
26422824 }),
26432825 };
......@@ -2647,6 +2829,7 @@ pub const cpu = struct {
26472829 .features = featureSet(&[_]Feature{
26482830 .@"3dnow",
26492831 .slow_unaligned_mem_16,
2832 .vzeroupper,
26502833 .x87,
26512834 }),
26522835 };
......@@ -2664,6 +2847,7 @@ pub const cpu = struct {
26642847 .slow_3ops_lea,
26652848 .slow_incdec,
26662849 .sse2,
2850 .vzeroupper,
26672851 .x87,
26682852 }),
26692853 };
......@@ -2678,6 +2862,7 @@ pub const cpu = struct {
26782862 .nopl,
26792863 .slow_unaligned_mem_16,
26802864 .sse3,
2865 .vzeroupper,
26812866 .x87,
26822867 }),
26832868 };
......@@ -2718,6 +2903,7 @@ pub const cpu = struct {
27182903 .sha,
27192904 .slow_shld,
27202905 .sse4a,
2906 .vzeroupper,
27212907 .x87,
27222908 .xsave,
27232909 .xsavec,
......@@ -2764,6 +2950,7 @@ pub const cpu = struct {
27642950 .sha,
27652951 .slow_shld,
27662952 .sse4a,
2953 .vzeroupper,
27672954 .wbnoinvd,
27682955 .x87,
27692956 .xsave,
......@@ -2848,6 +3035,7 @@ pub const all_cpus = &[_]*const Cpu{
28483035 &cpu.skylake,
28493036 &cpu.skylake_avx512,
28503037 &cpu.slm,
3038 &cpu.tigerlake,
28513039 &cpu.tremont,
28523040 &cpu.westmere,
28533041 &cpu.winchip_c6,