authorgravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-02-03 18:08:29+01:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-02-03 18:08:29+01:00
log74a01e3d64cc5d941486e5bd037f6f55e030339c
tree9cdbe1d2c262d78e9bfec6dff5c4167e216fcaf4
parente0b1170b676c04d1293970c717e13bdc01584671

stage2: remove the concept of register exceptions

5 files changed, 74 insertions(+), 116 deletions(-)

src/arch/aarch64/CodeGen.zig+7-7
......@@ -774,7 +774,7 @@ fn allocRegOrMem(self: *Self, inst: Air.Inst.Index, reg_ok: bool) !MCValue {
774774 const ptr_bits = self.target.cpu.arch.ptrBitWidth();
775775 const ptr_bytes: u64 = @divExact(ptr_bits, 8);
776776 if (abi_size <= ptr_bytes) {
777 if (self.register_manager.tryAllocReg(inst, &.{})) |reg| {
777 if (self.register_manager.tryAllocReg(inst)) |reg| {
778778 return MCValue{ .register = registerAlias(reg, abi_size) };
779779 }
780780 }
......@@ -797,7 +797,7 @@ pub fn spillInstruction(self: *Self, reg: Register, inst: Air.Inst.Index) !void
797797/// allocated. A second call to `copyToTmpRegister` may return the same register.
798798/// This can have a side effect of spilling instructions to the stack to free up a register.
799799fn copyToTmpRegister(self: *Self, ty: Type, mcv: MCValue) !Register {
800 const reg = try self.register_manager.allocReg(null, &.{});
800 const reg = try self.register_manager.allocReg(null);
801801 try self.genSetReg(ty, reg, mcv);
802802 return reg;
803803}
......@@ -806,7 +806,7 @@ fn copyToTmpRegister(self: *Self, ty: Type, mcv: MCValue) !Register {
806806/// `reg_owner` is the instruction that gets associated with the register in the register table.
807807/// This can have a side effect of spilling instructions to the stack to free up a register.
808808fn copyToNewRegister(self: *Self, reg_owner: Air.Inst.Index, mcv: MCValue) !MCValue {
809 const reg = try self.register_manager.allocReg(reg_owner, &.{});
809 const reg = try self.register_manager.allocReg(reg_owner);
810810 try self.genSetReg(self.air.typeOfIndex(reg_owner), reg, mcv);
811811 return MCValue{ .register = reg };
812812}
......@@ -1270,7 +1270,7 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
12701270 .memory,
12711271 .stack_offset,
12721272 => {
1273 const reg = try self.register_manager.allocReg(null, &.{});
1273 const reg = try self.register_manager.allocReg(null);
12741274 self.register_manager.freezeRegs(&.{reg});
12751275 defer self.register_manager.unfreezeRegs(&.{reg});
12761276
......@@ -1729,15 +1729,15 @@ fn airCmp(self: *Self, inst: Air.Inst.Index, op: math.CompareOperator) !void {
17291729 if (!lhs_is_register and !rhs_is_register) {
17301730 const regs = try self.register_manager.allocRegs(2, .{
17311731 Air.refToIndex(bin_op.rhs).?, Air.refToIndex(bin_op.lhs).?,
1732 }, &.{});
1732 });
17331733 lhs_mcv = MCValue{ .register = regs[0] };
17341734 rhs_mcv = MCValue{ .register = regs[1] };
17351735 } else if (!rhs_is_register) {
1736 rhs_mcv = MCValue{ .register = try self.register_manager.allocReg(Air.refToIndex(bin_op.rhs).?, &.{}) };
1736 rhs_mcv = MCValue{ .register = try self.register_manager.allocReg(Air.refToIndex(bin_op.rhs).?) };
17371737 }
17381738 }
17391739 if (!lhs_is_register) {
1740 lhs_mcv = MCValue{ .register = try self.register_manager.allocReg(Air.refToIndex(bin_op.lhs).?, &.{}) };
1740 lhs_mcv = MCValue{ .register = try self.register_manager.allocReg(Air.refToIndex(bin_op.lhs).?) };
17411741 }
17421742
17431743 // Move the operands to the newly allocated registers
src/arch/arm/CodeGen.zig+34-34
......@@ -750,7 +750,7 @@ fn allocRegOrMem(self: *Self, inst: Air.Inst.Index, reg_ok: bool) !MCValue {
750750 const ptr_bits = self.target.cpu.arch.ptrBitWidth();
751751 const ptr_bytes: u64 = @divExact(ptr_bits, 8);
752752 if (abi_size <= ptr_bytes) {
753 if (self.register_manager.tryAllocReg(inst, &.{})) |reg| {
753 if (self.register_manager.tryAllocReg(inst)) |reg| {
754754 return MCValue{ .register = reg };
755755 }
756756 }
......@@ -791,7 +791,7 @@ fn spillCompareFlagsIfOccupied(self: *Self) !void {
791791/// allocated. A second call to `copyToTmpRegister` may return the same register.
792792/// This can have a side effect of spilling instructions to the stack to free up a register.
793793fn copyToTmpRegister(self: *Self, ty: Type, mcv: MCValue) !Register {
794 const reg = try self.register_manager.allocReg(null, &.{});
794 const reg = try self.register_manager.allocReg(null);
795795 try self.genSetReg(ty, reg, mcv);
796796 return reg;
797797}
......@@ -800,7 +800,7 @@ fn copyToTmpRegister(self: *Self, ty: Type, mcv: MCValue) !Register {
800800/// `reg_owner` is the instruction that gets associated with the register in the register table.
801801/// This can have a side effect of spilling instructions to the stack to free up a register.
802802fn copyToNewRegister(self: *Self, reg_owner: Air.Inst.Index, mcv: MCValue) !MCValue {
803 const reg = try self.register_manager.allocReg(reg_owner, &.{});
803 const reg = try self.register_manager.allocReg(reg_owner);
804804 try self.genSetReg(self.air.typeOfIndex(reg_owner), reg, mcv);
805805 return MCValue{ .register = reg };
806806}
......@@ -1247,7 +1247,7 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void {
12471247 defer self.register_manager.unfreezeRegs(&.{base_mcv.register});
12481248
12491249 if (elem_size <= 4) {
1250 const dst_reg = try self.register_manager.allocReg(inst, &.{});
1250 const dst_reg = try self.register_manager.allocReg(inst);
12511251 self.register_manager.freezeRegs(&.{dst_reg});
12521252 defer self.register_manager.unfreezeRegs(&.{dst_reg});
12531253
......@@ -1285,7 +1285,7 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void {
12851285 } else {
12861286 const dst_mcv = try self.allocRegOrMem(inst, false);
12871287
1288 const addr_reg = try self.register_manager.allocReg(null, &.{});
1288 const addr_reg = try self.register_manager.allocReg(null);
12891289 self.register_manager.freezeRegs(&.{addr_reg});
12901290 defer self.register_manager.unfreezeRegs(&.{addr_reg});
12911291
......@@ -1437,7 +1437,7 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
14371437 },
14381438 .stack_offset => |off| {
14391439 if (elem_ty.abiSize(self.target.*) <= 4) {
1440 const tmp_reg = try self.register_manager.allocReg(null, &.{});
1440 const tmp_reg = try self.register_manager.allocReg(null);
14411441 self.register_manager.freezeRegs(&.{tmp_reg});
14421442 defer self.register_manager.unfreezeRegs(&.{tmp_reg});
14431443
......@@ -1451,7 +1451,7 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
14511451 // larger
14521452
14531453 const usize_ty = Type.initTag(.usize);
1454 const tmp_regs = try self.register_manager.allocRegs(2, .{ null, null }, &.{});
1454 const tmp_regs = try self.register_manager.allocRegs(2, .{ null, null });
14551455 self.register_manager.freezeRegs(&tmp_regs);
14561456 defer self.register_manager.unfreezeRegs(&tmp_regs);
14571457
......@@ -1475,7 +1475,7 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
14751475 try self.genSetStack(usize_ty, off + 4, MCValue{ .register = tmp_regs[1] });
14761476 } else {
14771477 // TODO optimize the register allocation
1478 const regs = try self.register_manager.allocRegs(4, .{ null, null, null, null }, &.{});
1478 const regs = try self.register_manager.allocRegs(4, .{ null, null, null, null });
14791479 self.register_manager.freezeRegs(&regs);
14801480 defer self.register_manager.unfreezeRegs(&regs);
14811481
......@@ -1524,7 +1524,7 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
15241524 .stack_offset,
15251525 .stack_argument_offset,
15261526 => {
1527 const reg = try self.register_manager.allocReg(null, &.{});
1527 const reg = try self.register_manager.allocReg(null);
15281528 self.register_manager.freezeRegs(&.{reg});
15291529 defer self.register_manager.unfreezeRegs(&.{reg});
15301530
......@@ -1597,7 +1597,7 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type
15971597 },
15981598 else => {
15991599 if (value_ty.abiSize(self.target.*) <= 4) {
1600 const tmp_reg = try self.register_manager.allocReg(null, &.{});
1600 const tmp_reg = try self.register_manager.allocReg(null);
16011601 self.register_manager.freezeRegs(&.{tmp_reg});
16021602 defer self.register_manager.unfreezeRegs(&.{tmp_reg});
16031603
......@@ -1774,14 +1774,14 @@ fn genArmBinIntOp(
17741774 if (reuse_lhs) {
17751775 // Allocate 0 or 1 registers
17761776 if (!rhs_is_register and rhs_should_be_register) {
1777 rhs_mcv = MCValue{ .register = try self.register_manager.allocReg(Air.refToIndex(op_rhs).?, &.{}) };
1777 rhs_mcv = MCValue{ .register = try self.register_manager.allocReg(Air.refToIndex(op_rhs).?) };
17781778 branch.inst_table.putAssumeCapacity(Air.refToIndex(op_rhs).?, rhs_mcv);
17791779 }
17801780 dst_mcv = lhs;
17811781 } else if (reuse_rhs and can_swap_lhs_and_rhs) {
17821782 // Allocate 0 or 1 registers
17831783 if (!lhs_is_register and lhs_should_be_register) {
1784 lhs_mcv = MCValue{ .register = try self.register_manager.allocReg(Air.refToIndex(op_lhs).?, &.{}) };
1784 lhs_mcv = MCValue{ .register = try self.register_manager.allocReg(Air.refToIndex(op_lhs).?) };
17851785 branch.inst_table.putAssumeCapacity(Air.refToIndex(op_lhs).?, lhs_mcv);
17861786 }
17871787 dst_mcv = rhs;
......@@ -1791,18 +1791,18 @@ fn genArmBinIntOp(
17911791 // Allocate 1 or 2 registers
17921792 if (lhs_should_be_register and rhs_should_be_register) {
17931793 if (lhs_is_register and rhs_is_register) {
1794 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst, &.{}) };
1794 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst) };
17951795 } else if (lhs_is_register) {
17961796 // Move RHS to register
1797 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst, &.{}) };
1797 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst) };
17981798 rhs_mcv = dst_mcv;
17991799 } else if (rhs_is_register) {
18001800 // Move LHS to register
1801 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst, &.{}) };
1801 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst) };
18021802 lhs_mcv = dst_mcv;
18031803 } else {
18041804 // Move LHS and RHS to register
1805 const regs = try self.register_manager.allocRegs(2, .{ inst, Air.refToIndex(op_rhs).? }, &.{});
1805 const regs = try self.register_manager.allocRegs(2, .{ inst, Air.refToIndex(op_rhs).? });
18061806 lhs_mcv = MCValue{ .register = regs[0] };
18071807 rhs_mcv = MCValue{ .register = regs[1] };
18081808 dst_mcv = lhs_mcv;
......@@ -1812,17 +1812,17 @@ fn genArmBinIntOp(
18121812 } else if (lhs_should_be_register) {
18131813 // RHS is immediate
18141814 if (lhs_is_register) {
1815 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst, &.{}) };
1815 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst) };
18161816 } else {
1817 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst, &.{}) };
1817 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst) };
18181818 lhs_mcv = dst_mcv;
18191819 }
18201820 } else if (rhs_should_be_register and can_swap_lhs_and_rhs) {
18211821 // LHS is immediate
18221822 if (rhs_is_register) {
1823 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst, &.{}) };
1823 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst) };
18241824 } else {
1825 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst, &.{}) };
1825 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst) };
18261826 rhs_mcv = dst_mcv;
18271827 }
18281828
......@@ -1983,32 +1983,32 @@ fn genArmMul(self: *Self, inst: Air.Inst.Index, op_lhs: Air.Inst.Ref, op_rhs: Ai
19831983 if (reuse_lhs) {
19841984 // Allocate 0 or 1 registers
19851985 if (!rhs_is_register) {
1986 rhs_mcv = MCValue{ .register = try self.register_manager.allocReg(Air.refToIndex(op_rhs).?, &.{}) };
1986 rhs_mcv = MCValue{ .register = try self.register_manager.allocReg(Air.refToIndex(op_rhs).?) };
19871987 branch.inst_table.putAssumeCapacity(Air.refToIndex(op_rhs).?, rhs_mcv);
19881988 }
19891989 dst_mcv = lhs;
19901990 } else if (reuse_rhs) {
19911991 // Allocate 0 or 1 registers
19921992 if (!lhs_is_register) {
1993 lhs_mcv = MCValue{ .register = try self.register_manager.allocReg(Air.refToIndex(op_lhs).?, &.{}) };
1993 lhs_mcv = MCValue{ .register = try self.register_manager.allocReg(Air.refToIndex(op_lhs).?) };
19941994 branch.inst_table.putAssumeCapacity(Air.refToIndex(op_lhs).?, lhs_mcv);
19951995 }
19961996 dst_mcv = rhs;
19971997 } else {
19981998 // Allocate 1 or 2 registers
19991999 if (lhs_is_register and rhs_is_register) {
2000 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst, &.{}) };
2000 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst) };
20012001 } else if (lhs_is_register) {
20022002 // Move RHS to register
2003 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst, &.{}) };
2003 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst) };
20042004 rhs_mcv = dst_mcv;
20052005 } else if (rhs_is_register) {
20062006 // Move LHS to register
2007 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst, &.{}) };
2007 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst) };
20082008 lhs_mcv = dst_mcv;
20092009 } else {
20102010 // Move LHS and RHS to register
2011 const regs = try self.register_manager.allocRegs(2, .{ inst, Air.refToIndex(op_rhs).? }, &.{});
2011 const regs = try self.register_manager.allocRegs(2, .{ inst, Air.refToIndex(op_rhs).? });
20122012 lhs_mcv = MCValue{ .register = regs[0] };
20132013 rhs_mcv = MCValue{ .register = regs[1] };
20142014 dst_mcv = lhs_mcv;
......@@ -2056,17 +2056,17 @@ fn genArmMulConstant(self: *Self, inst: Air.Inst.Index, op: Air.Inst.Ref, op_ind
20562056 // Allocate registers for operands and/or destination
20572057 if (reuse_lhs) {
20582058 // Allocate 1 register
2059 rhs_mcv = MCValue{ .register = try self.register_manager.allocReg(null, &.{}) };
2059 rhs_mcv = MCValue{ .register = try self.register_manager.allocReg(null) };
20602060 dst_mcv = lhs;
20612061 } else {
20622062 // Allocate 1 or 2 registers
20632063 if (lhs_is_register) {
20642064 // Move RHS to register
2065 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(null, &.{}) };
2065 dst_mcv = MCValue{ .register = try self.register_manager.allocReg(null) };
20662066 rhs_mcv = dst_mcv;
20672067 } else {
20682068 // Move LHS and RHS to register
2069 const regs = try self.register_manager.allocRegs(2, .{ null, null }, &.{});
2069 const regs = try self.register_manager.allocRegs(2, .{ null, null });
20702070 lhs_mcv = MCValue{ .register = regs[0] };
20712071 rhs_mcv = MCValue{ .register = regs[1] };
20722072 dst_mcv = lhs_mcv;
......@@ -2432,20 +2432,20 @@ fn airCmp(self: *Self, inst: Air.Inst.Index, op: math.CompareOperator) !void {
24322432 if (!lhs_is_register and !rhs_is_register) {
24332433 const regs = try self.register_manager.allocRegs(2, .{
24342434 Air.refToIndex(bin_op.lhs).?, Air.refToIndex(bin_op.rhs).?,
2435 }, &.{});
2435 });
24362436 lhs_mcv = MCValue{ .register = regs[0] };
24372437 rhs_mcv = MCValue{ .register = regs[1] };
24382438 } else if (!rhs_is_register) {
24392439 const track_inst = if (self.liveness.operandDies(inst, 1)) null else Air.refToIndex(bin_op.rhs).?;
2440 rhs_mcv = MCValue{ .register = try self.register_manager.allocReg(track_inst, &.{}) };
2440 rhs_mcv = MCValue{ .register = try self.register_manager.allocReg(track_inst) };
24412441 } else if (!lhs_is_register) {
24422442 const track_inst = if (self.liveness.operandDies(inst, 0)) null else Air.refToIndex(bin_op.lhs).?;
2443 lhs_mcv = MCValue{ .register = try self.register_manager.allocReg(track_inst, &.{}) };
2443 lhs_mcv = MCValue{ .register = try self.register_manager.allocReg(track_inst) };
24442444 }
24452445 } else {
24462446 if (!lhs_is_register) {
24472447 const track_inst = if (self.liveness.operandDies(inst, 0)) null else Air.refToIndex(bin_op.lhs).?;
2448 lhs_mcv = MCValue{ .register = try self.register_manager.allocReg(track_inst, &.{}) };
2448 lhs_mcv = MCValue{ .register = try self.register_manager.allocReg(track_inst) };
24492449 }
24502450 }
24512451
......@@ -3185,7 +3185,7 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
31853185 return self.genSetStack(ty, stack_offset, MCValue{ .register = reg });
31863186 } else {
31873187 // TODO optimize the register allocation
3188 const regs = try self.register_manager.allocRegs(5, .{ null, null, null, null, null }, &.{});
3188 const regs = try self.register_manager.allocRegs(5, .{ null, null, null, null, null });
31893189 const src_reg = regs[0];
31903190 const dst_reg = regs[1];
31913191 const len_reg = regs[2];
src/arch/riscv64/CodeGen.zig+4-4
......@@ -749,7 +749,7 @@ fn allocRegOrMem(self: *Self, inst: Air.Inst.Index, reg_ok: bool) !MCValue {
749749 const ptr_bits = self.target.cpu.arch.ptrBitWidth();
750750 const ptr_bytes: u64 = @divExact(ptr_bits, 8);
751751 if (abi_size <= ptr_bytes) {
752 if (self.register_manager.tryAllocReg(inst, &.{})) |reg| {
752 if (self.register_manager.tryAllocReg(inst)) |reg| {
753753 return MCValue{ .register = reg };
754754 }
755755 }
......@@ -772,7 +772,7 @@ pub fn spillInstruction(self: *Self, reg: Register, inst: Air.Inst.Index) !void
772772/// allocated. A second call to `copyToTmpRegister` may return the same register.
773773/// This can have a side effect of spilling instructions to the stack to free up a register.
774774fn copyToTmpRegister(self: *Self, ty: Type, mcv: MCValue) !Register {
775 const reg = try self.register_manager.allocReg(null, &.{});
775 const reg = try self.register_manager.allocReg(null);
776776 try self.genSetReg(ty, reg, mcv);
777777 return reg;
778778}
......@@ -781,7 +781,7 @@ fn copyToTmpRegister(self: *Self, ty: Type, mcv: MCValue) !Register {
781781/// `reg_owner` is the instruction that gets associated with the register in the register table.
782782/// This can have a side effect of spilling instructions to the stack to free up a register.
783783fn copyToNewRegister(self: *Self, reg_owner: Air.Inst.Index, mcv: MCValue) !MCValue {
784 const reg = try self.register_manager.allocReg(reg_owner, &.{});
784 const reg = try self.register_manager.allocReg(reg_owner);
785785 try self.genSetReg(self.air.typeOfIndex(reg_owner), reg, mcv);
786786 return MCValue{ .register = reg };
787787}
......@@ -1211,7 +1211,7 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
12111211 .memory,
12121212 .stack_offset,
12131213 => {
1214 const reg = try self.register_manager.allocReg(null, &.{});
1214 const reg = try self.register_manager.allocReg(null);
12151215 self.register_manager.freezeRegs(&.{reg});
12161216 defer self.register_manager.unfreezeRegs(&.{reg});
12171217
src/arch/x86_64/CodeGen.zig+11-11
......@@ -819,7 +819,7 @@ fn allocRegOrMem(self: *Self, inst: Air.Inst.Index, reg_ok: bool) !MCValue {
819819 const ptr_bits = self.target.cpu.arch.ptrBitWidth();
820820 const ptr_bytes: u64 = @divExact(ptr_bits, 8);
821821 if (abi_size <= ptr_bytes) {
822 if (self.register_manager.tryAllocReg(inst, &.{})) |reg| {
822 if (self.register_manager.tryAllocReg(inst)) |reg| {
823823 return MCValue{ .register = registerAlias(reg, abi_size) };
824824 }
825825 }
......@@ -842,7 +842,7 @@ pub fn spillInstruction(self: *Self, reg: Register, inst: Air.Inst.Index) !void
842842/// allocated. A second call to `copyToTmpRegister` may return the same register.
843843/// This can have a side effect of spilling instructions to the stack to free up a register.
844844fn copyToTmpRegister(self: *Self, ty: Type, mcv: MCValue) !Register {
845 const reg = try self.register_manager.allocReg(null, &.{});
845 const reg = try self.register_manager.allocReg(null);
846846 try self.genSetReg(ty, reg, mcv);
847847 return reg;
848848}
......@@ -851,7 +851,7 @@ fn copyToTmpRegister(self: *Self, ty: Type, mcv: MCValue) !Register {
851851/// `reg_owner` is the instruction that gets associated with the register in the register table.
852852/// This can have a side effect of spilling instructions to the stack to free up a register.
853853fn copyToNewRegister(self: *Self, reg_owner: Air.Inst.Index, ty: Type, mcv: MCValue) !MCValue {
854 const reg = try self.register_manager.allocReg(reg_owner, &.{});
854 const reg = try self.register_manager.allocReg(reg_owner);
855855 try self.genSetReg(ty, reg, mcv);
856856 return MCValue{ .register = reg };
857857}
......@@ -932,7 +932,7 @@ fn airTrunc(self: *Self, inst: Air.Inst.Index) !void {
932932 const reg = switch (operand) {
933933 .register => |reg| reg,
934934 else => inner: {
935 const reg = try self.register_manager.allocReg(inst, &.{});
935 const reg = try self.register_manager.allocReg(inst);
936936 try self.genSetReg(src_ty, reg, operand);
937937 break :inner reg;
938938 },
......@@ -1401,7 +1401,7 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void {
14011401 self.register_manager.freezeRegs(&.{offset_reg});
14021402 defer self.register_manager.unfreezeRegs(&.{offset_reg});
14031403
1404 const addr_reg = try self.register_manager.allocReg(null, &.{});
1404 const addr_reg = try self.register_manager.allocReg(null);
14051405 switch (slice_mcv) {
14061406 .stack_offset => |off| {
14071407 // mov reg, [rbp - 8]
......@@ -1459,7 +1459,7 @@ fn airArrayElemVal(self: *Self, inst: Air.Inst.Index) !void {
14591459 self.register_manager.freezeRegs(&.{offset_reg});
14601460 defer self.register_manager.unfreezeRegs(&.{offset_reg});
14611461
1462 const addr_reg = try self.register_manager.allocReg(null, &.{});
1462 const addr_reg = try self.register_manager.allocReg(null);
14631463 switch (array) {
14641464 .stack_offset => |off| {
14651465 // lea reg, [rbp]
......@@ -1640,7 +1640,7 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
16401640 },
16411641 .stack_offset => |off| {
16421642 if (abi_size <= 8) {
1643 const tmp_reg = try self.register_manager.allocReg(null, &.{});
1643 const tmp_reg = try self.register_manager.allocReg(null);
16441644 try self.load(.{ .register = tmp_reg }, ptr, ptr_ty);
16451645 return self.genSetStack(elem_ty, off, MCValue{ .register = tmp_reg });
16461646 }
......@@ -1648,7 +1648,7 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
16481648 self.register_manager.freezeRegs(&.{ .rax, .rcx });
16491649 defer self.register_manager.unfreezeRegs(&.{ .rax, .rcx });
16501650
1651 const regs = try self.register_manager.allocRegs(3, .{ null, null, null }, &.{});
1651 const regs = try self.register_manager.allocRegs(3, .{ null, null, null });
16521652 const addr_reg = regs[0];
16531653 const count_reg = regs[1];
16541654 const tmp_reg = regs[2];
......@@ -1957,7 +1957,7 @@ fn structFieldPtr(self: *Self, inst: Air.Inst.Index, operand: Air.Inst.Ref, inde
19571957 break :blk reg;
19581958 } else {
19591959 self.register_manager.freezeRegs(&.{reg});
1960 const result_reg = try self.register_manager.allocReg(inst, &.{});
1960 const result_reg = try self.register_manager.allocReg(inst);
19611961 try self.genSetReg(ptr_ty, result_reg, mcv);
19621962 break :blk result_reg;
19631963 }
......@@ -3386,7 +3386,7 @@ fn genSetStackArg(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerE
33863386 self.register_manager.freezeRegs(&.{ .rax, .rcx });
33873387 defer self.register_manager.unfreezeRegs(&.{ .rax, .rcx });
33883388
3389 const regs = try self.register_manager.allocRegs(3, .{ null, null, null }, &.{});
3389 const regs = try self.register_manager.allocRegs(3, .{ null, null, null });
33903390 const addr_reg = regs[0];
33913391 const count_reg = regs[1];
33923392 const tmp_reg = regs[2];
......@@ -3554,7 +3554,7 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerErro
35543554 self.register_manager.freezeRegs(&.{ .rax, .rcx, .rbp });
35553555 defer self.register_manager.unfreezeRegs(&.{ .rax, .rcx, .rbp });
35563556
3557 const regs = try self.register_manager.allocRegs(3, .{ null, null, null }, &.{});
3557 const regs = try self.register_manager.allocRegs(3, .{ null, null, null });
35583558 const addr_reg = regs[0];
35593559 const count_reg = regs[1];
35603560 const tmp_reg = regs[2];
src/register_manager.zig+18-60
......@@ -118,17 +118,12 @@ pub fn RegisterManager(
118118 /// Allocates a specified number of registers, optionally
119119 /// tracking them. Returns `null` if not enough registers are
120120 /// free.
121 ///
122 /// Exceptions are deprecated, use freezeRegs and unfreezeRegs
123 /// instead.
124121 pub fn tryAllocRegs(
125122 self: *Self,
126123 comptime count: comptime_int,
127124 insts: [count]?Air.Inst.Index,
128 exceptions: []const Register,
129125 ) ?[count]Register {
130126 comptime assert(count > 0 and count <= callee_preserved_regs.len);
131 assert(count + exceptions.len <= callee_preserved_regs.len);
132127
133128 const free_registers = @popCount(FreeRegInt, self.free_registers);
134129 if (free_registers < count) return null;
......@@ -137,7 +132,6 @@ pub fn RegisterManager(
137132 var i: usize = 0;
138133 for (callee_preserved_regs) |reg| {
139134 if (i >= count) break;
140 if (mem.indexOfScalar(Register, exceptions, reg) != null) continue;
141135 if (self.isRegFrozen(reg)) continue;
142136 if (self.isRegFree(reg)) {
143137 regs[i] = reg;
......@@ -163,29 +157,21 @@ pub fn RegisterManager(
163157 /// Allocates a register and optionally tracks it with a
164158 /// corresponding instruction. Returns `null` if all registers
165159 /// are allocated.
166 ///
167 /// Exceptions are deprecated, use freezeRegs and unfreezeRegs
168 /// instead.
169 pub fn tryAllocReg(self: *Self, inst: ?Air.Inst.Index, exceptions: []const Register) ?Register {
170 return if (tryAllocRegs(self, 1, .{inst}, exceptions)) |regs| regs[0] else null;
160 pub fn tryAllocReg(self: *Self, inst: ?Air.Inst.Index) ?Register {
161 return if (tryAllocRegs(self, 1, .{inst})) |regs| regs[0] else null;
171162 }
172163
173164 /// Allocates a specified number of registers, optionally
174 /// tracking them. Asserts that count + exceptions.len is not
165 /// tracking them. Asserts that count is not
175166 /// larger than the total number of registers available.
176 ///
177 /// Exceptions are deprecated, use freezeRegs and unfreezeRegs
178 /// instead.
179167 pub fn allocRegs(
180168 self: *Self,
181169 comptime count: comptime_int,
182170 insts: [count]?Air.Inst.Index,
183 exceptions: []const Register,
184171 ) ![count]Register {
185172 comptime assert(count > 0 and count <= callee_preserved_regs.len);
186 assert(count + exceptions.len <= callee_preserved_regs.len);
187173
188 const result = self.tryAllocRegs(count, insts, exceptions) orelse blk: {
174 const result = self.tryAllocRegs(count, insts) orelse blk: {
189175 // We'll take over the first count registers. Spill
190176 // the instructions that were previously there to a
191177 // stack allocations.
......@@ -193,7 +179,6 @@ pub fn RegisterManager(
193179 var i: usize = 0;
194180 for (callee_preserved_regs) |reg| {
195181 if (i >= count) break;
196 if (mem.indexOfScalar(Register, exceptions, reg) != null) continue;
197182 if (self.isRegFrozen(reg)) continue;
198183
199184 regs[i] = reg;
......@@ -229,11 +214,8 @@ pub fn RegisterManager(
229214
230215 /// Allocates a register and optionally tracks it with a
231216 /// corresponding instruction.
232 ///
233 /// Exceptions are deprecated, use freezeRegs and unfreezeRegs
234 /// instead.
235 pub fn allocReg(self: *Self, inst: ?Air.Inst.Index, exceptions: []const Register) !Register {
236 return (try self.allocRegs(1, .{inst}, exceptions))[0];
217 pub fn allocReg(self: *Self, inst: ?Air.Inst.Index) !Register {
218 return (try self.allocRegs(1, .{inst}))[0];
237219 }
238220
239221 /// Spills the register if it is currently allocated. If a
......@@ -365,9 +347,9 @@ test "tryAllocReg: no spilling" {
365347
366348 const mock_instruction: Air.Inst.Index = 1;
367349
368 try expectEqual(@as(?MockRegister1, .r2), function.register_manager.tryAllocReg(mock_instruction, &.{}));
369 try expectEqual(@as(?MockRegister1, .r3), function.register_manager.tryAllocReg(mock_instruction, &.{}));
370 try expectEqual(@as(?MockRegister1, null), function.register_manager.tryAllocReg(mock_instruction, &.{}));
350 try expectEqual(@as(?MockRegister1, .r2), function.register_manager.tryAllocReg(mock_instruction));
351 try expectEqual(@as(?MockRegister1, .r3), function.register_manager.tryAllocReg(mock_instruction));
352 try expectEqual(@as(?MockRegister1, null), function.register_manager.tryAllocReg(mock_instruction));
371353
372354 try expect(function.register_manager.isRegAllocated(.r2));
373355 try expect(function.register_manager.isRegAllocated(.r3));
......@@ -393,33 +375,25 @@ test "allocReg: spilling" {
393375
394376 const mock_instruction: Air.Inst.Index = 1;
395377
396 try expectEqual(@as(?MockRegister1, .r2), try function.register_manager.allocReg(mock_instruction, &.{}));
397 try expectEqual(@as(?MockRegister1, .r3), try function.register_manager.allocReg(mock_instruction, &.{}));
378 try expectEqual(@as(?MockRegister1, .r2), try function.register_manager.allocReg(mock_instruction));
379 try expectEqual(@as(?MockRegister1, .r3), try function.register_manager.allocReg(mock_instruction));
398380
399381 // Spill a register
400 try expectEqual(@as(?MockRegister1, .r2), try function.register_manager.allocReg(mock_instruction, &.{}));
382 try expectEqual(@as(?MockRegister1, .r2), try function.register_manager.allocReg(mock_instruction));
401383 try expectEqualSlices(MockRegister1, &[_]MockRegister1{.r2}, function.spilled.items);
402384
403385 // No spilling necessary
404386 function.register_manager.freeReg(.r3);
405 try expectEqual(@as(?MockRegister1, .r3), try function.register_manager.allocReg(mock_instruction, &.{}));
387 try expectEqual(@as(?MockRegister1, .r3), try function.register_manager.allocReg(mock_instruction));
406388 try expectEqualSlices(MockRegister1, &[_]MockRegister1{.r2}, function.spilled.items);
407389
408 // Exceptions
409 //
410 // TODO deprecated, remove test once no backend uses exceptions
411 // anymore
412 function.register_manager.freeReg(.r2);
413 function.register_manager.freeReg(.r3);
414 try expectEqual(@as(?MockRegister1, .r3), try function.register_manager.allocReg(mock_instruction, &.{.r2}));
415
416390 // Frozen registers
417391 function.register_manager.freeReg(.r3);
418392 {
419393 function.register_manager.freezeRegs(&.{.r2});
420394 defer function.register_manager.unfreezeRegs(&.{.r2});
421395
422 try expectEqual(@as(?MockRegister1, .r3), try function.register_manager.allocReg(mock_instruction, &.{}));
396 try expectEqual(@as(?MockRegister1, .r3), try function.register_manager.allocReg(mock_instruction));
423397 }
424398 try expect(!function.register_manager.frozenRegsExist());
425399}
......@@ -432,22 +406,13 @@ test "tryAllocRegs" {
432406 };
433407 defer function.deinit();
434408
435 try expectEqual([_]MockRegister2{ .r0, .r1, .r2 }, function.register_manager.tryAllocRegs(3, .{ null, null, null }, &.{}).?);
409 try expectEqual([_]MockRegister2{ .r0, .r1, .r2 }, function.register_manager.tryAllocRegs(3, .{ null, null, null }).?);
436410
437411 try expect(function.register_manager.isRegAllocated(.r0));
438412 try expect(function.register_manager.isRegAllocated(.r1));
439413 try expect(function.register_manager.isRegAllocated(.r2));
440414 try expect(!function.register_manager.isRegAllocated(.r3));
441415
442 // Exceptions
443 //
444 // TODO deprecated, remove test once no backend uses exceptions
445 // anymore
446 function.register_manager.freeReg(.r0);
447 function.register_manager.freeReg(.r1);
448 function.register_manager.freeReg(.r2);
449 try expectEqual([_]MockRegister2{ .r0, .r2, .r3 }, function.register_manager.tryAllocRegs(3, .{ null, null, null }, &.{.r1}).?);
450
451416 // Frozen registers
452417 function.register_manager.freeReg(.r0);
453418 function.register_manager.freeReg(.r2);
......@@ -456,7 +421,7 @@ test "tryAllocRegs" {
456421 function.register_manager.freezeRegs(&.{.r1});
457422 defer function.register_manager.unfreezeRegs(&.{.r1});
458423
459 try expectEqual([_]MockRegister2{ .r0, .r2, .r3 }, function.register_manager.tryAllocRegs(3, .{ null, null, null }, &.{}).?);
424 try expectEqual([_]MockRegister2{ .r0, .r2, .r3 }, function.register_manager.tryAllocRegs(3, .{ null, null, null }).?);
460425 }
461426 try expect(!function.register_manager.frozenRegsExist());
462427
......@@ -480,20 +445,13 @@ test "allocRegs" {
480445 mock_instruction,
481446 mock_instruction,
482447 mock_instruction,
483 }, &.{}));
448 }));
484449
485450 try expect(function.register_manager.isRegAllocated(.r0));
486451 try expect(function.register_manager.isRegAllocated(.r1));
487452 try expect(function.register_manager.isRegAllocated(.r2));
488453 try expect(!function.register_manager.isRegAllocated(.r3));
489454
490 // Exceptions
491 //
492 // TODO deprecated, remove test once no backend uses exceptions
493 // anymore
494 try expectEqual([_]MockRegister2{ .r0, .r2, .r3 }, try function.register_manager.allocRegs(3, .{ null, null, null }, &.{.r1}));
495 try expectEqualSlices(MockRegister2, &[_]MockRegister2{ .r0, .r2 }, function.spilled.items);
496
497455 // Frozen registers
498456 function.register_manager.freeReg(.r0);
499457 function.register_manager.freeReg(.r2);
......@@ -502,7 +460,7 @@ test "allocRegs" {
502460 function.register_manager.freezeRegs(&.{.r1});
503461 defer function.register_manager.unfreezeRegs(&.{.r1});
504462
505 try expectEqual([_]MockRegister2{ .r0, .r2, .r3 }, try function.register_manager.allocRegs(3, .{ null, null, null }, &.{}));
463 try expectEqual([_]MockRegister2{ .r0, .r2, .r3 }, try function.register_manager.allocRegs(3, .{ null, null, null }));
506464 }
507465 try expect(!function.register_manager.frozenRegsExist());
508466