| ... | @@ -34,11 +34,8 @@ | ... | @@ -34,11 +34,8 @@ |
| 34 | | 34 | |
| 35 | #include <stdint.h> | 35 | #include <stdint.h> |
| 36 | | 36 | |
| 37 | #ifdef __ARM_FEATURE_BF16 | | |
| 38 | #include <arm_bf16.h> | 37 | #include <arm_bf16.h> |
| 39 | typedef __bf16 bfloat16_t; | 38 | typedef __bf16 bfloat16_t; |
| 40 | #endif | | |
| 41 | | | |
| 42 | typedef float float32_t; | 39 | typedef float float32_t; |
| 43 | typedef __fp16 float16_t; | 40 | typedef __fp16 float16_t; |
| 44 | #ifdef __aarch64__ | 41 | #ifdef __aarch64__ |
| ... | @@ -428,7 +425,6 @@ typedef struct poly64x2x4_t { | ... | @@ -428,7 +425,6 @@ typedef struct poly64x2x4_t { |
| 428 | poly64x2_t val[4]; | 425 | poly64x2_t val[4]; |
| 429 | } poly64x2x4_t; | 426 | } poly64x2x4_t; |
| 430 | | 427 | |
| 431 | #ifdef __ARM_FEATURE_BF16 | | |
| 432 | typedef __attribute__((neon_vector_type(4))) bfloat16_t bfloat16x4_t; | 428 | typedef __attribute__((neon_vector_type(4))) bfloat16_t bfloat16x4_t; |
| 433 | typedef __attribute__((neon_vector_type(8))) bfloat16_t bfloat16x8_t; | 429 | typedef __attribute__((neon_vector_type(8))) bfloat16_t bfloat16x8_t; |
| 434 | | 430 | |
| ... | @@ -456,8 +452,6 @@ typedef struct bfloat16x8x4_t { | ... | @@ -456,8 +452,6 @@ typedef struct bfloat16x8x4_t { |
| 456 | bfloat16x8_t val[4]; | 452 | bfloat16x8_t val[4]; |
| 457 | } bfloat16x8x4_t; | 453 | } bfloat16x8x4_t; |
| 458 | | 454 | |
| 459 | #endif | | |
| 460 | | | |
| 461 | #define __ai static __inline__ __attribute__((__always_inline__, __nodebug__)) | 455 | #define __ai static __inline__ __attribute__((__always_inline__, __nodebug__)) |
| 462 | | 456 | |
| 463 | #ifdef __LITTLE_ENDIAN__ | 457 | #ifdef __LITTLE_ENDIAN__ |
| ... | @@ -6124,194 +6118,230 @@ __ai uint32x2_t vcvt_u32_f32(float32x2_t __p0) { | ... | @@ -6124,194 +6118,230 @@ __ai uint32x2_t vcvt_u32_f32(float32x2_t __p0) { |
| 6124 | #endif | 6118 | #endif |
| 6125 | | 6119 | |
| 6126 | #ifdef __LITTLE_ENDIAN__ | 6120 | #ifdef __LITTLE_ENDIAN__ |
| 6127 | #define vdupq_lane_s32(__p0_20, __p1_20) __extension__ ({ \ | 6121 | #define vdupq_lane_f16(__p0_20, __p1_20) __extension__ ({ \ |
| 6128 | int32x4_t __ret_20; \ | 6122 | float16x8_t __ret_20; \ |
| 6129 | int32x2_t __s0_20 = __p0_20; \ | 6123 | float16x4_t __s0_20 = __p0_20; \ |
| 6130 | __ret_20 = splatq_lane_s32(__s0_20, __p1_20); \ | 6124 | __ret_20 = splatq_lane_f16(__s0_20, __p1_20); \ |
| 6131 | __ret_20; \ | 6125 | __ret_20; \ |
| 6132 | }) | 6126 | }) |
| 6133 | #else | 6127 | #else |
| 6134 | #define vdupq_lane_s32(__p0_21, __p1_21) __extension__ ({ \ | 6128 | #define vdupq_lane_f16(__p0_21, __p1_21) __extension__ ({ \ |
| 6135 | int32x4_t __ret_21; \ | 6129 | float16x8_t __ret_21; \ |
| 6136 | int32x2_t __s0_21 = __p0_21; \ | 6130 | float16x4_t __s0_21 = __p0_21; \ |
| 6137 | int32x2_t __rev0_21; __rev0_21 = __builtin_shufflevector(__s0_21, __s0_21, 1, 0); \ | 6131 | float16x4_t __rev0_21; __rev0_21 = __builtin_shufflevector(__s0_21, __s0_21, 3, 2, 1, 0); \ |
| 6138 | __ret_21 = __noswap_splatq_lane_s32(__rev0_21, __p1_21); \ | 6132 | __ret_21 = __noswap_splatq_lane_f16(__rev0_21, __p1_21); \ |
| 6139 | __ret_21 = __builtin_shufflevector(__ret_21, __ret_21, 3, 2, 1, 0); \ | 6133 | __ret_21 = __builtin_shufflevector(__ret_21, __ret_21, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 6140 | __ret_21; \ | 6134 | __ret_21; \ |
| 6141 | }) | 6135 | }) |
| 6142 | #endif | 6136 | #endif |
| 6143 | | 6137 | |
| 6144 | #ifdef __LITTLE_ENDIAN__ | 6138 | #ifdef __LITTLE_ENDIAN__ |
| 6145 | #define vdupq_lane_s64(__p0_22, __p1_22) __extension__ ({ \ | 6139 | #define vdupq_lane_s32(__p0_22, __p1_22) __extension__ ({ \ |
| 6146 | int64x2_t __ret_22; \ | 6140 | int32x4_t __ret_22; \ |
| 6147 | int64x1_t __s0_22 = __p0_22; \ | 6141 | int32x2_t __s0_22 = __p0_22; \ |
| 6148 | __ret_22 = splatq_lane_s64(__s0_22, __p1_22); \ | 6142 | __ret_22 = splatq_lane_s32(__s0_22, __p1_22); \ |
| 6149 | __ret_22; \ | 6143 | __ret_22; \ |
| 6150 | }) | 6144 | }) |
| 6151 | #else | 6145 | #else |
| 6152 | #define vdupq_lane_s64(__p0_23, __p1_23) __extension__ ({ \ | 6146 | #define vdupq_lane_s32(__p0_23, __p1_23) __extension__ ({ \ |
| 6153 | int64x2_t __ret_23; \ | 6147 | int32x4_t __ret_23; \ |
| 6154 | int64x1_t __s0_23 = __p0_23; \ | 6148 | int32x2_t __s0_23 = __p0_23; \ |
| 6155 | __ret_23 = __noswap_splatq_lane_s64(__s0_23, __p1_23); \ | 6149 | int32x2_t __rev0_23; __rev0_23 = __builtin_shufflevector(__s0_23, __s0_23, 1, 0); \ |
| 6156 | __ret_23 = __builtin_shufflevector(__ret_23, __ret_23, 1, 0); \ | 6150 | __ret_23 = __noswap_splatq_lane_s32(__rev0_23, __p1_23); \ |
| | 6151 | __ret_23 = __builtin_shufflevector(__ret_23, __ret_23, 3, 2, 1, 0); \ |
| 6157 | __ret_23; \ | 6152 | __ret_23; \ |
| 6158 | }) | 6153 | }) |
| 6159 | #endif | 6154 | #endif |
| 6160 | | 6155 | |
| 6161 | #ifdef __LITTLE_ENDIAN__ | 6156 | #ifdef __LITTLE_ENDIAN__ |
| 6162 | #define vdupq_lane_s16(__p0_24, __p1_24) __extension__ ({ \ | 6157 | #define vdupq_lane_s64(__p0_24, __p1_24) __extension__ ({ \ |
| 6163 | int16x8_t __ret_24; \ | 6158 | int64x2_t __ret_24; \ |
| 6164 | int16x4_t __s0_24 = __p0_24; \ | 6159 | int64x1_t __s0_24 = __p0_24; \ |
| 6165 | __ret_24 = splatq_lane_s16(__s0_24, __p1_24); \ | 6160 | __ret_24 = splatq_lane_s64(__s0_24, __p1_24); \ |
| 6166 | __ret_24; \ | 6161 | __ret_24; \ |
| 6167 | }) | 6162 | }) |
| 6168 | #else | 6163 | #else |
| 6169 | #define vdupq_lane_s16(__p0_25, __p1_25) __extension__ ({ \ | 6164 | #define vdupq_lane_s64(__p0_25, __p1_25) __extension__ ({ \ |
| 6170 | int16x8_t __ret_25; \ | 6165 | int64x2_t __ret_25; \ |
| 6171 | int16x4_t __s0_25 = __p0_25; \ | 6166 | int64x1_t __s0_25 = __p0_25; \ |
| 6172 | int16x4_t __rev0_25; __rev0_25 = __builtin_shufflevector(__s0_25, __s0_25, 3, 2, 1, 0); \ | 6167 | __ret_25 = __noswap_splatq_lane_s64(__s0_25, __p1_25); \ |
| 6173 | __ret_25 = __noswap_splatq_lane_s16(__rev0_25, __p1_25); \ | 6168 | __ret_25 = __builtin_shufflevector(__ret_25, __ret_25, 1, 0); \ |
| 6174 | __ret_25 = __builtin_shufflevector(__ret_25, __ret_25, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 6175 | __ret_25; \ | 6169 | __ret_25; \ |
| 6176 | }) | 6170 | }) |
| 6177 | #endif | 6171 | #endif |
| 6178 | | 6172 | |
| 6179 | #ifdef __LITTLE_ENDIAN__ | 6173 | #ifdef __LITTLE_ENDIAN__ |
| 6180 | #define vdup_lane_u8(__p0_26, __p1_26) __extension__ ({ \ | 6174 | #define vdupq_lane_s16(__p0_26, __p1_26) __extension__ ({ \ |
| 6181 | uint8x8_t __ret_26; \ | 6175 | int16x8_t __ret_26; \ |
| 6182 | uint8x8_t __s0_26 = __p0_26; \ | 6176 | int16x4_t __s0_26 = __p0_26; \ |
| 6183 | __ret_26 = splat_lane_u8(__s0_26, __p1_26); \ | 6177 | __ret_26 = splatq_lane_s16(__s0_26, __p1_26); \ |
| 6184 | __ret_26; \ | 6178 | __ret_26; \ |
| 6185 | }) | 6179 | }) |
| 6186 | #else | 6180 | #else |
| 6187 | #define vdup_lane_u8(__p0_27, __p1_27) __extension__ ({ \ | 6181 | #define vdupq_lane_s16(__p0_27, __p1_27) __extension__ ({ \ |
| 6188 | uint8x8_t __ret_27; \ | 6182 | int16x8_t __ret_27; \ |
| 6189 | uint8x8_t __s0_27 = __p0_27; \ | 6183 | int16x4_t __s0_27 = __p0_27; \ |
| 6190 | uint8x8_t __rev0_27; __rev0_27 = __builtin_shufflevector(__s0_27, __s0_27, 7, 6, 5, 4, 3, 2, 1, 0); \ | 6184 | int16x4_t __rev0_27; __rev0_27 = __builtin_shufflevector(__s0_27, __s0_27, 3, 2, 1, 0); \ |
| 6191 | __ret_27 = __noswap_splat_lane_u8(__rev0_27, __p1_27); \ | 6185 | __ret_27 = __noswap_splatq_lane_s16(__rev0_27, __p1_27); \ |
| 6192 | __ret_27 = __builtin_shufflevector(__ret_27, __ret_27, 7, 6, 5, 4, 3, 2, 1, 0); \ | 6186 | __ret_27 = __builtin_shufflevector(__ret_27, __ret_27, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 6193 | __ret_27; \ | 6187 | __ret_27; \ |
| 6194 | }) | 6188 | }) |
| 6195 | #endif | 6189 | #endif |
| 6196 | | 6190 | |
| 6197 | #ifdef __LITTLE_ENDIAN__ | 6191 | #ifdef __LITTLE_ENDIAN__ |
| 6198 | #define vdup_lane_u32(__p0_28, __p1_28) __extension__ ({ \ | 6192 | #define vdup_lane_u8(__p0_28, __p1_28) __extension__ ({ \ |
| 6199 | uint32x2_t __ret_28; \ | 6193 | uint8x8_t __ret_28; \ |
| 6200 | uint32x2_t __s0_28 = __p0_28; \ | 6194 | uint8x8_t __s0_28 = __p0_28; \ |
| 6201 | __ret_28 = splat_lane_u32(__s0_28, __p1_28); \ | 6195 | __ret_28 = splat_lane_u8(__s0_28, __p1_28); \ |
| 6202 | __ret_28; \ | 6196 | __ret_28; \ |
| 6203 | }) | 6197 | }) |
| 6204 | #else | 6198 | #else |
| 6205 | #define vdup_lane_u32(__p0_29, __p1_29) __extension__ ({ \ | 6199 | #define vdup_lane_u8(__p0_29, __p1_29) __extension__ ({ \ |
| 6206 | uint32x2_t __ret_29; \ | 6200 | uint8x8_t __ret_29; \ |
| 6207 | uint32x2_t __s0_29 = __p0_29; \ | 6201 | uint8x8_t __s0_29 = __p0_29; \ |
| 6208 | uint32x2_t __rev0_29; __rev0_29 = __builtin_shufflevector(__s0_29, __s0_29, 1, 0); \ | 6202 | uint8x8_t __rev0_29; __rev0_29 = __builtin_shufflevector(__s0_29, __s0_29, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 6209 | __ret_29 = __noswap_splat_lane_u32(__rev0_29, __p1_29); \ | 6203 | __ret_29 = __noswap_splat_lane_u8(__rev0_29, __p1_29); \ |
| 6210 | __ret_29 = __builtin_shufflevector(__ret_29, __ret_29, 1, 0); \ | 6204 | __ret_29 = __builtin_shufflevector(__ret_29, __ret_29, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 6211 | __ret_29; \ | 6205 | __ret_29; \ |
| 6212 | }) | 6206 | }) |
| 6213 | #endif | 6207 | #endif |
| 6214 | | 6208 | |
| 6215 | #define vdup_lane_u64(__p0_30, __p1_30) __extension__ ({ \ | | |
| 6216 | uint64x1_t __ret_30; \ | | |
| 6217 | uint64x1_t __s0_30 = __p0_30; \ | | |
| 6218 | __ret_30 = splat_lane_u64(__s0_30, __p1_30); \ | | |
| 6219 | __ret_30; \ | | |
| 6220 | }) | | |
| 6221 | #ifdef __LITTLE_ENDIAN__ | 6209 | #ifdef __LITTLE_ENDIAN__ |
| 6222 | #define vdup_lane_u16(__p0_31, __p1_31) __extension__ ({ \ | 6210 | #define vdup_lane_u32(__p0_30, __p1_30) __extension__ ({ \ |
| 6223 | uint16x4_t __ret_31; \ | 6211 | uint32x2_t __ret_30; \ |
| 6224 | uint16x4_t __s0_31 = __p0_31; \ | 6212 | uint32x2_t __s0_30 = __p0_30; \ |
| 6225 | __ret_31 = splat_lane_u16(__s0_31, __p1_31); \ | 6213 | __ret_30 = splat_lane_u32(__s0_30, __p1_30); \ |
| 6226 | __ret_31; \ | 6214 | __ret_30; \ |
| 6227 | }) | 6215 | }) |
| 6228 | #else | 6216 | #else |
| 6229 | #define vdup_lane_u16(__p0_32, __p1_32) __extension__ ({ \ | 6217 | #define vdup_lane_u32(__p0_31, __p1_31) __extension__ ({ \ |
| 6230 | uint16x4_t __ret_32; \ | 6218 | uint32x2_t __ret_31; \ |
| 6231 | uint16x4_t __s0_32 = __p0_32; \ | 6219 | uint32x2_t __s0_31 = __p0_31; \ |
| 6232 | uint16x4_t __rev0_32; __rev0_32 = __builtin_shufflevector(__s0_32, __s0_32, 3, 2, 1, 0); \ | 6220 | uint32x2_t __rev0_31; __rev0_31 = __builtin_shufflevector(__s0_31, __s0_31, 1, 0); \ |
| 6233 | __ret_32 = __noswap_splat_lane_u16(__rev0_32, __p1_32); \ | 6221 | __ret_31 = __noswap_splat_lane_u32(__rev0_31, __p1_31); \ |
| 6234 | __ret_32 = __builtin_shufflevector(__ret_32, __ret_32, 3, 2, 1, 0); \ | 6222 | __ret_31 = __builtin_shufflevector(__ret_31, __ret_31, 1, 0); \ |
| 6235 | __ret_32; \ | 6223 | __ret_31; \ |
| 6236 | }) | 6224 | }) |
| 6237 | #endif | 6225 | #endif |
| 6238 | | 6226 | |
| | 6227 | #define vdup_lane_u64(__p0_32, __p1_32) __extension__ ({ \ |
| | 6228 | uint64x1_t __ret_32; \ |
| | 6229 | uint64x1_t __s0_32 = __p0_32; \ |
| | 6230 | __ret_32 = splat_lane_u64(__s0_32, __p1_32); \ |
| | 6231 | __ret_32; \ |
| | 6232 | }) |
| 6239 | #ifdef __LITTLE_ENDIAN__ | 6233 | #ifdef __LITTLE_ENDIAN__ |
| 6240 | #define vdup_lane_s8(__p0_33, __p1_33) __extension__ ({ \ | 6234 | #define vdup_lane_u16(__p0_33, __p1_33) __extension__ ({ \ |
| 6241 | int8x8_t __ret_33; \ | 6235 | uint16x4_t __ret_33; \ |
| 6242 | int8x8_t __s0_33 = __p0_33; \ | 6236 | uint16x4_t __s0_33 = __p0_33; \ |
| 6243 | __ret_33 = splat_lane_s8(__s0_33, __p1_33); \ | 6237 | __ret_33 = splat_lane_u16(__s0_33, __p1_33); \ |
| 6244 | __ret_33; \ | 6238 | __ret_33; \ |
| 6245 | }) | 6239 | }) |
| 6246 | #else | 6240 | #else |
| 6247 | #define vdup_lane_s8(__p0_34, __p1_34) __extension__ ({ \ | 6241 | #define vdup_lane_u16(__p0_34, __p1_34) __extension__ ({ \ |
| 6248 | int8x8_t __ret_34; \ | 6242 | uint16x4_t __ret_34; \ |
| 6249 | int8x8_t __s0_34 = __p0_34; \ | 6243 | uint16x4_t __s0_34 = __p0_34; \ |
| 6250 | int8x8_t __rev0_34; __rev0_34 = __builtin_shufflevector(__s0_34, __s0_34, 7, 6, 5, 4, 3, 2, 1, 0); \ | 6244 | uint16x4_t __rev0_34; __rev0_34 = __builtin_shufflevector(__s0_34, __s0_34, 3, 2, 1, 0); \ |
| 6251 | __ret_34 = __noswap_splat_lane_s8(__rev0_34, __p1_34); \ | 6245 | __ret_34 = __noswap_splat_lane_u16(__rev0_34, __p1_34); \ |
| 6252 | __ret_34 = __builtin_shufflevector(__ret_34, __ret_34, 7, 6, 5, 4, 3, 2, 1, 0); \ | 6246 | __ret_34 = __builtin_shufflevector(__ret_34, __ret_34, 3, 2, 1, 0); \ |
| 6253 | __ret_34; \ | 6247 | __ret_34; \ |
| 6254 | }) | 6248 | }) |
| 6255 | #endif | 6249 | #endif |
| 6256 | | 6250 | |
| 6257 | #ifdef __LITTLE_ENDIAN__ | 6251 | #ifdef __LITTLE_ENDIAN__ |
| 6258 | #define vdup_lane_f32(__p0_35, __p1_35) __extension__ ({ \ | 6252 | #define vdup_lane_s8(__p0_35, __p1_35) __extension__ ({ \ |
| 6259 | float32x2_t __ret_35; \ | 6253 | int8x8_t __ret_35; \ |
| 6260 | float32x2_t __s0_35 = __p0_35; \ | 6254 | int8x8_t __s0_35 = __p0_35; \ |
| 6261 | __ret_35 = splat_lane_f32(__s0_35, __p1_35); \ | 6255 | __ret_35 = splat_lane_s8(__s0_35, __p1_35); \ |
| 6262 | __ret_35; \ | 6256 | __ret_35; \ |
| 6263 | }) | 6257 | }) |
| 6264 | #else | 6258 | #else |
| 6265 | #define vdup_lane_f32(__p0_36, __p1_36) __extension__ ({ \ | 6259 | #define vdup_lane_s8(__p0_36, __p1_36) __extension__ ({ \ |
| 6266 | float32x2_t __ret_36; \ | 6260 | int8x8_t __ret_36; \ |
| 6267 | float32x2_t __s0_36 = __p0_36; \ | 6261 | int8x8_t __s0_36 = __p0_36; \ |
| 6268 | float32x2_t __rev0_36; __rev0_36 = __builtin_shufflevector(__s0_36, __s0_36, 1, 0); \ | 6262 | int8x8_t __rev0_36; __rev0_36 = __builtin_shufflevector(__s0_36, __s0_36, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 6269 | __ret_36 = __noswap_splat_lane_f32(__rev0_36, __p1_36); \ | 6263 | __ret_36 = __noswap_splat_lane_s8(__rev0_36, __p1_36); \ |
| 6270 | __ret_36 = __builtin_shufflevector(__ret_36, __ret_36, 1, 0); \ | 6264 | __ret_36 = __builtin_shufflevector(__ret_36, __ret_36, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 6271 | __ret_36; \ | 6265 | __ret_36; \ |
| 6272 | }) | 6266 | }) |
| 6273 | #endif | 6267 | #endif |
| 6274 | | 6268 | |
| 6275 | #ifdef __LITTLE_ENDIAN__ | 6269 | #ifdef __LITTLE_ENDIAN__ |
| 6276 | #define vdup_lane_s32(__p0_37, __p1_37) __extension__ ({ \ | 6270 | #define vdup_lane_f32(__p0_37, __p1_37) __extension__ ({ \ |
| 6277 | int32x2_t __ret_37; \ | 6271 | float32x2_t __ret_37; \ |
| 6278 | int32x2_t __s0_37 = __p0_37; \ | 6272 | float32x2_t __s0_37 = __p0_37; \ |
| 6279 | __ret_37 = splat_lane_s32(__s0_37, __p1_37); \ | 6273 | __ret_37 = splat_lane_f32(__s0_37, __p1_37); \ |
| 6280 | __ret_37; \ | 6274 | __ret_37; \ |
| 6281 | }) | 6275 | }) |
| 6282 | #else | 6276 | #else |
| 6283 | #define vdup_lane_s32(__p0_38, __p1_38) __extension__ ({ \ | 6277 | #define vdup_lane_f32(__p0_38, __p1_38) __extension__ ({ \ |
| 6284 | int32x2_t __ret_38; \ | 6278 | float32x2_t __ret_38; \ |
| 6285 | int32x2_t __s0_38 = __p0_38; \ | 6279 | float32x2_t __s0_38 = __p0_38; \ |
| 6286 | int32x2_t __rev0_38; __rev0_38 = __builtin_shufflevector(__s0_38, __s0_38, 1, 0); \ | 6280 | float32x2_t __rev0_38; __rev0_38 = __builtin_shufflevector(__s0_38, __s0_38, 1, 0); \ |
| 6287 | __ret_38 = __noswap_splat_lane_s32(__rev0_38, __p1_38); \ | 6281 | __ret_38 = __noswap_splat_lane_f32(__rev0_38, __p1_38); \ |
| 6288 | __ret_38 = __builtin_shufflevector(__ret_38, __ret_38, 1, 0); \ | 6282 | __ret_38 = __builtin_shufflevector(__ret_38, __ret_38, 1, 0); \ |
| 6289 | __ret_38; \ | 6283 | __ret_38; \ |
| 6290 | }) | 6284 | }) |
| 6291 | #endif | 6285 | #endif |
| 6292 | | 6286 | |
| 6293 | #define vdup_lane_s64(__p0_39, __p1_39) __extension__ ({ \ | 6287 | #ifdef __LITTLE_ENDIAN__ |
| 6294 | int64x1_t __ret_39; \ | 6288 | #define vdup_lane_f16(__p0_39, __p1_39) __extension__ ({ \ |
| 6295 | int64x1_t __s0_39 = __p0_39; \ | 6289 | float16x4_t __ret_39; \ |
| 6296 | __ret_39 = splat_lane_s64(__s0_39, __p1_39); \ | 6290 | float16x4_t __s0_39 = __p0_39; \ |
| | 6291 | __ret_39 = splat_lane_f16(__s0_39, __p1_39); \ |
| 6297 | __ret_39; \ | 6292 | __ret_39; \ |
| 6298 | }) | 6293 | }) |
| 6299 | #ifdef __LITTLE_ENDIAN__ | 6294 | #else |
| 6300 | #define vdup_lane_s16(__p0_40, __p1_40) __extension__ ({ \ | 6295 | #define vdup_lane_f16(__p0_40, __p1_40) __extension__ ({ \ |
| 6301 | int16x4_t __ret_40; \ | 6296 | float16x4_t __ret_40; \ |
| 6302 | int16x4_t __s0_40 = __p0_40; \ | 6297 | float16x4_t __s0_40 = __p0_40; \ |
| 6303 | __ret_40 = splat_lane_s16(__s0_40, __p1_40); \ | 6298 | float16x4_t __rev0_40; __rev0_40 = __builtin_shufflevector(__s0_40, __s0_40, 3, 2, 1, 0); \ |
| | 6299 | __ret_40 = __noswap_splat_lane_f16(__rev0_40, __p1_40); \ |
| | 6300 | __ret_40 = __builtin_shufflevector(__ret_40, __ret_40, 3, 2, 1, 0); \ |
| 6304 | __ret_40; \ | 6301 | __ret_40; \ |
| 6305 | }) | 6302 | }) |
| 6306 | #else | 6303 | #endif |
| 6307 | #define vdup_lane_s16(__p0_41, __p1_41) __extension__ ({ \ | 6304 | |
| 6308 | int16x4_t __ret_41; \ | 6305 | #ifdef __LITTLE_ENDIAN__ |
| 6309 | int16x4_t __s0_41 = __p0_41; \ | 6306 | #define vdup_lane_s32(__p0_41, __p1_41) __extension__ ({ \ |
| 6310 | int16x4_t __rev0_41; __rev0_41 = __builtin_shufflevector(__s0_41, __s0_41, 3, 2, 1, 0); \ | 6307 | int32x2_t __ret_41; \ |
| 6311 | __ret_41 = __noswap_splat_lane_s16(__rev0_41, __p1_41); \ | 6308 | int32x2_t __s0_41 = __p0_41; \ |
| 6312 | __ret_41 = __builtin_shufflevector(__ret_41, __ret_41, 3, 2, 1, 0); \ | 6309 | __ret_41 = splat_lane_s32(__s0_41, __p1_41); \ |
| 6313 | __ret_41; \ | 6310 | __ret_41; \ |
| 6314 | }) | 6311 | }) |
| | 6312 | #else |
| | 6313 | #define vdup_lane_s32(__p0_42, __p1_42) __extension__ ({ \ |
| | 6314 | int32x2_t __ret_42; \ |
| | 6315 | int32x2_t __s0_42 = __p0_42; \ |
| | 6316 | int32x2_t __rev0_42; __rev0_42 = __builtin_shufflevector(__s0_42, __s0_42, 1, 0); \ |
| | 6317 | __ret_42 = __noswap_splat_lane_s32(__rev0_42, __p1_42); \ |
| | 6318 | __ret_42 = __builtin_shufflevector(__ret_42, __ret_42, 1, 0); \ |
| | 6319 | __ret_42; \ |
| | 6320 | }) |
| | 6321 | #endif |
| | 6322 | |
| | 6323 | #define vdup_lane_s64(__p0_43, __p1_43) __extension__ ({ \ |
| | 6324 | int64x1_t __ret_43; \ |
| | 6325 | int64x1_t __s0_43 = __p0_43; \ |
| | 6326 | __ret_43 = splat_lane_s64(__s0_43, __p1_43); \ |
| | 6327 | __ret_43; \ |
| | 6328 | }) |
| | 6329 | #ifdef __LITTLE_ENDIAN__ |
| | 6330 | #define vdup_lane_s16(__p0_44, __p1_44) __extension__ ({ \ |
| | 6331 | int16x4_t __ret_44; \ |
| | 6332 | int16x4_t __s0_44 = __p0_44; \ |
| | 6333 | __ret_44 = splat_lane_s16(__s0_44, __p1_44); \ |
| | 6334 | __ret_44; \ |
| | 6335 | }) |
| | 6336 | #else |
| | 6337 | #define vdup_lane_s16(__p0_45, __p1_45) __extension__ ({ \ |
| | 6338 | int16x4_t __ret_45; \ |
| | 6339 | int16x4_t __s0_45 = __p0_45; \ |
| | 6340 | int16x4_t __rev0_45; __rev0_45 = __builtin_shufflevector(__s0_45, __s0_45, 3, 2, 1, 0); \ |
| | 6341 | __ret_45 = __noswap_splat_lane_s16(__rev0_45, __p1_45); \ |
| | 6342 | __ret_45 = __builtin_shufflevector(__ret_45, __ret_45, 3, 2, 1, 0); \ |
| | 6343 | __ret_45; \ |
| | 6344 | }) |
| 6315 | #endif | 6345 | #endif |
| 6316 | | 6346 | |
| 6317 | #ifdef __LITTLE_ENDIAN__ | 6347 | #ifdef __LITTLE_ENDIAN__ |
| ... | @@ -14668,245 +14698,245 @@ __ai int16x4_t vmla_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { | ... | @@ -14668,245 +14698,245 @@ __ai int16x4_t vmla_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { |
| 14668 | #endif | 14698 | #endif |
| 14669 | | 14699 | |
| 14670 | #ifdef __LITTLE_ENDIAN__ | 14700 | #ifdef __LITTLE_ENDIAN__ |
| 14671 | #define vmlaq_lane_u32(__p0_42, __p1_42, __p2_42, __p3_42) __extension__ ({ \ | 14701 | #define vmlaq_lane_u32(__p0_46, __p1_46, __p2_46, __p3_46) __extension__ ({ \ |
| 14672 | uint32x4_t __ret_42; \ | 14702 | uint32x4_t __ret_46; \ |
| 14673 | uint32x4_t __s0_42 = __p0_42; \ | 14703 | uint32x4_t __s0_46 = __p0_46; \ |
| 14674 | uint32x4_t __s1_42 = __p1_42; \ | 14704 | uint32x4_t __s1_46 = __p1_46; \ |
| 14675 | uint32x2_t __s2_42 = __p2_42; \ | 14705 | uint32x2_t __s2_46 = __p2_46; \ |
| 14676 | __ret_42 = __s0_42 + __s1_42 * splatq_lane_u32(__s2_42, __p3_42); \ | 14706 | __ret_46 = __s0_46 + __s1_46 * splatq_lane_u32(__s2_46, __p3_46); \ |
| 14677 | __ret_42; \ | | |
| 14678 | }) | | |
| 14679 | #else | | |
| 14680 | #define vmlaq_lane_u32(__p0_43, __p1_43, __p2_43, __p3_43) __extension__ ({ \ | | |
| 14681 | uint32x4_t __ret_43; \ | | |
| 14682 | uint32x4_t __s0_43 = __p0_43; \ | | |
| 14683 | uint32x4_t __s1_43 = __p1_43; \ | | |
| 14684 | uint32x2_t __s2_43 = __p2_43; \ | | |
| 14685 | uint32x4_t __rev0_43; __rev0_43 = __builtin_shufflevector(__s0_43, __s0_43, 3, 2, 1, 0); \ | | |
| 14686 | uint32x4_t __rev1_43; __rev1_43 = __builtin_shufflevector(__s1_43, __s1_43, 3, 2, 1, 0); \ | | |
| 14687 | uint32x2_t __rev2_43; __rev2_43 = __builtin_shufflevector(__s2_43, __s2_43, 1, 0); \ | | |
| 14688 | __ret_43 = __rev0_43 + __rev1_43 * __noswap_splatq_lane_u32(__rev2_43, __p3_43); \ | | |
| 14689 | __ret_43 = __builtin_shufflevector(__ret_43, __ret_43, 3, 2, 1, 0); \ | | |
| 14690 | __ret_43; \ | | |
| 14691 | }) | | |
| 14692 | #endif | | |
| 14693 | | | |
| 14694 | #ifdef __LITTLE_ENDIAN__ | | |
| 14695 | #define vmlaq_lane_u16(__p0_44, __p1_44, __p2_44, __p3_44) __extension__ ({ \ | | |
| 14696 | uint16x8_t __ret_44; \ | | |
| 14697 | uint16x8_t __s0_44 = __p0_44; \ | | |
| 14698 | uint16x8_t __s1_44 = __p1_44; \ | | |
| 14699 | uint16x4_t __s2_44 = __p2_44; \ | | |
| 14700 | __ret_44 = __s0_44 + __s1_44 * splatq_lane_u16(__s2_44, __p3_44); \ | | |
| 14701 | __ret_44; \ | | |
| 14702 | }) | | |
| 14703 | #else | | |
| 14704 | #define vmlaq_lane_u16(__p0_45, __p1_45, __p2_45, __p3_45) __extension__ ({ \ | | |
| 14705 | uint16x8_t __ret_45; \ | | |
| 14706 | uint16x8_t __s0_45 = __p0_45; \ | | |
| 14707 | uint16x8_t __s1_45 = __p1_45; \ | | |
| 14708 | uint16x4_t __s2_45 = __p2_45; \ | | |
| 14709 | uint16x8_t __rev0_45; __rev0_45 = __builtin_shufflevector(__s0_45, __s0_45, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 14710 | uint16x8_t __rev1_45; __rev1_45 = __builtin_shufflevector(__s1_45, __s1_45, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 14711 | uint16x4_t __rev2_45; __rev2_45 = __builtin_shufflevector(__s2_45, __s2_45, 3, 2, 1, 0); \ | | |
| 14712 | __ret_45 = __rev0_45 + __rev1_45 * __noswap_splatq_lane_u16(__rev2_45, __p3_45); \ | | |
| 14713 | __ret_45 = __builtin_shufflevector(__ret_45, __ret_45, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 14714 | __ret_45; \ | | |
| 14715 | }) | | |
| 14716 | #endif | | |
| 14717 | | | |
| 14718 | #ifdef __LITTLE_ENDIAN__ | | |
| 14719 | #define vmlaq_lane_f32(__p0_46, __p1_46, __p2_46, __p3_46) __extension__ ({ \ | | |
| 14720 | float32x4_t __ret_46; \ | | |
| 14721 | float32x4_t __s0_46 = __p0_46; \ | | |
| 14722 | float32x4_t __s1_46 = __p1_46; \ | | |
| 14723 | float32x2_t __s2_46 = __p2_46; \ | | |
| 14724 | __ret_46 = __s0_46 + __s1_46 * splatq_lane_f32(__s2_46, __p3_46); \ | | |
| 14725 | __ret_46; \ | 14707 | __ret_46; \ |
| 14726 | }) | 14708 | }) |
| 14727 | #else | 14709 | #else |
| 14728 | #define vmlaq_lane_f32(__p0_47, __p1_47, __p2_47, __p3_47) __extension__ ({ \ | 14710 | #define vmlaq_lane_u32(__p0_47, __p1_47, __p2_47, __p3_47) __extension__ ({ \ |
| 14729 | float32x4_t __ret_47; \ | 14711 | uint32x4_t __ret_47; \ |
| 14730 | float32x4_t __s0_47 = __p0_47; \ | 14712 | uint32x4_t __s0_47 = __p0_47; \ |
| 14731 | float32x4_t __s1_47 = __p1_47; \ | 14713 | uint32x4_t __s1_47 = __p1_47; \ |
| 14732 | float32x2_t __s2_47 = __p2_47; \ | 14714 | uint32x2_t __s2_47 = __p2_47; \ |
| 14733 | float32x4_t __rev0_47; __rev0_47 = __builtin_shufflevector(__s0_47, __s0_47, 3, 2, 1, 0); \ | 14715 | uint32x4_t __rev0_47; __rev0_47 = __builtin_shufflevector(__s0_47, __s0_47, 3, 2, 1, 0); \ |
| 14734 | float32x4_t __rev1_47; __rev1_47 = __builtin_shufflevector(__s1_47, __s1_47, 3, 2, 1, 0); \ | 14716 | uint32x4_t __rev1_47; __rev1_47 = __builtin_shufflevector(__s1_47, __s1_47, 3, 2, 1, 0); \ |
| 14735 | float32x2_t __rev2_47; __rev2_47 = __builtin_shufflevector(__s2_47, __s2_47, 1, 0); \ | 14717 | uint32x2_t __rev2_47; __rev2_47 = __builtin_shufflevector(__s2_47, __s2_47, 1, 0); \ |
| 14736 | __ret_47 = __rev0_47 + __rev1_47 * __noswap_splatq_lane_f32(__rev2_47, __p3_47); \ | 14718 | __ret_47 = __rev0_47 + __rev1_47 * __noswap_splatq_lane_u32(__rev2_47, __p3_47); \ |
| 14737 | __ret_47 = __builtin_shufflevector(__ret_47, __ret_47, 3, 2, 1, 0); \ | 14719 | __ret_47 = __builtin_shufflevector(__ret_47, __ret_47, 3, 2, 1, 0); \ |
| 14738 | __ret_47; \ | 14720 | __ret_47; \ |
| 14739 | }) | 14721 | }) |
| 14740 | #endif | 14722 | #endif |
| 14741 | | 14723 | |
| 14742 | #ifdef __LITTLE_ENDIAN__ | 14724 | #ifdef __LITTLE_ENDIAN__ |
| 14743 | #define vmlaq_lane_s32(__p0_48, __p1_48, __p2_48, __p3_48) __extension__ ({ \ | 14725 | #define vmlaq_lane_u16(__p0_48, __p1_48, __p2_48, __p3_48) __extension__ ({ \ |
| 14744 | int32x4_t __ret_48; \ | 14726 | uint16x8_t __ret_48; \ |
| 14745 | int32x4_t __s0_48 = __p0_48; \ | 14727 | uint16x8_t __s0_48 = __p0_48; \ |
| 14746 | int32x4_t __s1_48 = __p1_48; \ | 14728 | uint16x8_t __s1_48 = __p1_48; \ |
| 14747 | int32x2_t __s2_48 = __p2_48; \ | 14729 | uint16x4_t __s2_48 = __p2_48; \ |
| 14748 | __ret_48 = __s0_48 + __s1_48 * splatq_lane_s32(__s2_48, __p3_48); \ | 14730 | __ret_48 = __s0_48 + __s1_48 * splatq_lane_u16(__s2_48, __p3_48); \ |
| 14749 | __ret_48; \ | 14731 | __ret_48; \ |
| 14750 | }) | 14732 | }) |
| 14751 | #else | 14733 | #else |
| 14752 | #define vmlaq_lane_s32(__p0_49, __p1_49, __p2_49, __p3_49) __extension__ ({ \ | 14734 | #define vmlaq_lane_u16(__p0_49, __p1_49, __p2_49, __p3_49) __extension__ ({ \ |
| 14753 | int32x4_t __ret_49; \ | 14735 | uint16x8_t __ret_49; \ |
| 14754 | int32x4_t __s0_49 = __p0_49; \ | 14736 | uint16x8_t __s0_49 = __p0_49; \ |
| 14755 | int32x4_t __s1_49 = __p1_49; \ | 14737 | uint16x8_t __s1_49 = __p1_49; \ |
| 14756 | int32x2_t __s2_49 = __p2_49; \ | 14738 | uint16x4_t __s2_49 = __p2_49; \ |
| 14757 | int32x4_t __rev0_49; __rev0_49 = __builtin_shufflevector(__s0_49, __s0_49, 3, 2, 1, 0); \ | 14739 | uint16x8_t __rev0_49; __rev0_49 = __builtin_shufflevector(__s0_49, __s0_49, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 14758 | int32x4_t __rev1_49; __rev1_49 = __builtin_shufflevector(__s1_49, __s1_49, 3, 2, 1, 0); \ | 14740 | uint16x8_t __rev1_49; __rev1_49 = __builtin_shufflevector(__s1_49, __s1_49, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 14759 | int32x2_t __rev2_49; __rev2_49 = __builtin_shufflevector(__s2_49, __s2_49, 1, 0); \ | 14741 | uint16x4_t __rev2_49; __rev2_49 = __builtin_shufflevector(__s2_49, __s2_49, 3, 2, 1, 0); \ |
| 14760 | __ret_49 = __rev0_49 + __rev1_49 * __noswap_splatq_lane_s32(__rev2_49, __p3_49); \ | 14742 | __ret_49 = __rev0_49 + __rev1_49 * __noswap_splatq_lane_u16(__rev2_49, __p3_49); \ |
| 14761 | __ret_49 = __builtin_shufflevector(__ret_49, __ret_49, 3, 2, 1, 0); \ | 14743 | __ret_49 = __builtin_shufflevector(__ret_49, __ret_49, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 14762 | __ret_49; \ | 14744 | __ret_49; \ |
| 14763 | }) | 14745 | }) |
| 14764 | #endif | 14746 | #endif |
| 14765 | | 14747 | |
| 14766 | #ifdef __LITTLE_ENDIAN__ | 14748 | #ifdef __LITTLE_ENDIAN__ |
| 14767 | #define vmlaq_lane_s16(__p0_50, __p1_50, __p2_50, __p3_50) __extension__ ({ \ | 14749 | #define vmlaq_lane_f32(__p0_50, __p1_50, __p2_50, __p3_50) __extension__ ({ \ |
| 14768 | int16x8_t __ret_50; \ | 14750 | float32x4_t __ret_50; \ |
| 14769 | int16x8_t __s0_50 = __p0_50; \ | 14751 | float32x4_t __s0_50 = __p0_50; \ |
| 14770 | int16x8_t __s1_50 = __p1_50; \ | 14752 | float32x4_t __s1_50 = __p1_50; \ |
| 14771 | int16x4_t __s2_50 = __p2_50; \ | 14753 | float32x2_t __s2_50 = __p2_50; \ |
| 14772 | __ret_50 = __s0_50 + __s1_50 * splatq_lane_s16(__s2_50, __p3_50); \ | 14754 | __ret_50 = __s0_50 + __s1_50 * splatq_lane_f32(__s2_50, __p3_50); \ |
| 14773 | __ret_50; \ | 14755 | __ret_50; \ |
| 14774 | }) | 14756 | }) |
| 14775 | #else | 14757 | #else |
| 14776 | #define vmlaq_lane_s16(__p0_51, __p1_51, __p2_51, __p3_51) __extension__ ({ \ | 14758 | #define vmlaq_lane_f32(__p0_51, __p1_51, __p2_51, __p3_51) __extension__ ({ \ |
| 14777 | int16x8_t __ret_51; \ | 14759 | float32x4_t __ret_51; \ |
| 14778 | int16x8_t __s0_51 = __p0_51; \ | 14760 | float32x4_t __s0_51 = __p0_51; \ |
| 14779 | int16x8_t __s1_51 = __p1_51; \ | 14761 | float32x4_t __s1_51 = __p1_51; \ |
| 14780 | int16x4_t __s2_51 = __p2_51; \ | 14762 | float32x2_t __s2_51 = __p2_51; \ |
| 14781 | int16x8_t __rev0_51; __rev0_51 = __builtin_shufflevector(__s0_51, __s0_51, 7, 6, 5, 4, 3, 2, 1, 0); \ | 14763 | float32x4_t __rev0_51; __rev0_51 = __builtin_shufflevector(__s0_51, __s0_51, 3, 2, 1, 0); \ |
| 14782 | int16x8_t __rev1_51; __rev1_51 = __builtin_shufflevector(__s1_51, __s1_51, 7, 6, 5, 4, 3, 2, 1, 0); \ | 14764 | float32x4_t __rev1_51; __rev1_51 = __builtin_shufflevector(__s1_51, __s1_51, 3, 2, 1, 0); \ |
| 14783 | int16x4_t __rev2_51; __rev2_51 = __builtin_shufflevector(__s2_51, __s2_51, 3, 2, 1, 0); \ | 14765 | float32x2_t __rev2_51; __rev2_51 = __builtin_shufflevector(__s2_51, __s2_51, 1, 0); \ |
| 14784 | __ret_51 = __rev0_51 + __rev1_51 * __noswap_splatq_lane_s16(__rev2_51, __p3_51); \ | 14766 | __ret_51 = __rev0_51 + __rev1_51 * __noswap_splatq_lane_f32(__rev2_51, __p3_51); \ |
| 14785 | __ret_51 = __builtin_shufflevector(__ret_51, __ret_51, 7, 6, 5, 4, 3, 2, 1, 0); \ | 14767 | __ret_51 = __builtin_shufflevector(__ret_51, __ret_51, 3, 2, 1, 0); \ |
| 14786 | __ret_51; \ | 14768 | __ret_51; \ |
| 14787 | }) | 14769 | }) |
| 14788 | #endif | 14770 | #endif |
| 14789 | | 14771 | |
| 14790 | #ifdef __LITTLE_ENDIAN__ | 14772 | #ifdef __LITTLE_ENDIAN__ |
| 14791 | #define vmla_lane_u32(__p0_52, __p1_52, __p2_52, __p3_52) __extension__ ({ \ | 14773 | #define vmlaq_lane_s32(__p0_52, __p1_52, __p2_52, __p3_52) __extension__ ({ \ |
| 14792 | uint32x2_t __ret_52; \ | 14774 | int32x4_t __ret_52; \ |
| 14793 | uint32x2_t __s0_52 = __p0_52; \ | 14775 | int32x4_t __s0_52 = __p0_52; \ |
| 14794 | uint32x2_t __s1_52 = __p1_52; \ | 14776 | int32x4_t __s1_52 = __p1_52; \ |
| 14795 | uint32x2_t __s2_52 = __p2_52; \ | 14777 | int32x2_t __s2_52 = __p2_52; \ |
| 14796 | __ret_52 = __s0_52 + __s1_52 * splat_lane_u32(__s2_52, __p3_52); \ | 14778 | __ret_52 = __s0_52 + __s1_52 * splatq_lane_s32(__s2_52, __p3_52); \ |
| 14797 | __ret_52; \ | 14779 | __ret_52; \ |
| 14798 | }) | 14780 | }) |
| 14799 | #else | 14781 | #else |
| 14800 | #define vmla_lane_u32(__p0_53, __p1_53, __p2_53, __p3_53) __extension__ ({ \ | 14782 | #define vmlaq_lane_s32(__p0_53, __p1_53, __p2_53, __p3_53) __extension__ ({ \ |
| 14801 | uint32x2_t __ret_53; \ | 14783 | int32x4_t __ret_53; \ |
| 14802 | uint32x2_t __s0_53 = __p0_53; \ | 14784 | int32x4_t __s0_53 = __p0_53; \ |
| 14803 | uint32x2_t __s1_53 = __p1_53; \ | 14785 | int32x4_t __s1_53 = __p1_53; \ |
| 14804 | uint32x2_t __s2_53 = __p2_53; \ | 14786 | int32x2_t __s2_53 = __p2_53; \ |
| 14805 | uint32x2_t __rev0_53; __rev0_53 = __builtin_shufflevector(__s0_53, __s0_53, 1, 0); \ | 14787 | int32x4_t __rev0_53; __rev0_53 = __builtin_shufflevector(__s0_53, __s0_53, 3, 2, 1, 0); \ |
| 14806 | uint32x2_t __rev1_53; __rev1_53 = __builtin_shufflevector(__s1_53, __s1_53, 1, 0); \ | 14788 | int32x4_t __rev1_53; __rev1_53 = __builtin_shufflevector(__s1_53, __s1_53, 3, 2, 1, 0); \ |
| 14807 | uint32x2_t __rev2_53; __rev2_53 = __builtin_shufflevector(__s2_53, __s2_53, 1, 0); \ | 14789 | int32x2_t __rev2_53; __rev2_53 = __builtin_shufflevector(__s2_53, __s2_53, 1, 0); \ |
| 14808 | __ret_53 = __rev0_53 + __rev1_53 * __noswap_splat_lane_u32(__rev2_53, __p3_53); \ | 14790 | __ret_53 = __rev0_53 + __rev1_53 * __noswap_splatq_lane_s32(__rev2_53, __p3_53); \ |
| 14809 | __ret_53 = __builtin_shufflevector(__ret_53, __ret_53, 1, 0); \ | 14791 | __ret_53 = __builtin_shufflevector(__ret_53, __ret_53, 3, 2, 1, 0); \ |
| 14810 | __ret_53; \ | 14792 | __ret_53; \ |
| 14811 | }) | 14793 | }) |
| 14812 | #endif | 14794 | #endif |
| 14813 | | 14795 | |
| 14814 | #ifdef __LITTLE_ENDIAN__ | 14796 | #ifdef __LITTLE_ENDIAN__ |
| 14815 | #define vmla_lane_u16(__p0_54, __p1_54, __p2_54, __p3_54) __extension__ ({ \ | 14797 | #define vmlaq_lane_s16(__p0_54, __p1_54, __p2_54, __p3_54) __extension__ ({ \ |
| 14816 | uint16x4_t __ret_54; \ | 14798 | int16x8_t __ret_54; \ |
| 14817 | uint16x4_t __s0_54 = __p0_54; \ | 14799 | int16x8_t __s0_54 = __p0_54; \ |
| 14818 | uint16x4_t __s1_54 = __p1_54; \ | 14800 | int16x8_t __s1_54 = __p1_54; \ |
| 14819 | uint16x4_t __s2_54 = __p2_54; \ | 14801 | int16x4_t __s2_54 = __p2_54; \ |
| 14820 | __ret_54 = __s0_54 + __s1_54 * splat_lane_u16(__s2_54, __p3_54); \ | 14802 | __ret_54 = __s0_54 + __s1_54 * splatq_lane_s16(__s2_54, __p3_54); \ |
| 14821 | __ret_54; \ | 14803 | __ret_54; \ |
| 14822 | }) | 14804 | }) |
| 14823 | #else | 14805 | #else |
| 14824 | #define vmla_lane_u16(__p0_55, __p1_55, __p2_55, __p3_55) __extension__ ({ \ | 14806 | #define vmlaq_lane_s16(__p0_55, __p1_55, __p2_55, __p3_55) __extension__ ({ \ |
| 14825 | uint16x4_t __ret_55; \ | 14807 | int16x8_t __ret_55; \ |
| 14826 | uint16x4_t __s0_55 = __p0_55; \ | 14808 | int16x8_t __s0_55 = __p0_55; \ |
| 14827 | uint16x4_t __s1_55 = __p1_55; \ | 14809 | int16x8_t __s1_55 = __p1_55; \ |
| 14828 | uint16x4_t __s2_55 = __p2_55; \ | 14810 | int16x4_t __s2_55 = __p2_55; \ |
| 14829 | uint16x4_t __rev0_55; __rev0_55 = __builtin_shufflevector(__s0_55, __s0_55, 3, 2, 1, 0); \ | 14811 | int16x8_t __rev0_55; __rev0_55 = __builtin_shufflevector(__s0_55, __s0_55, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 14830 | uint16x4_t __rev1_55; __rev1_55 = __builtin_shufflevector(__s1_55, __s1_55, 3, 2, 1, 0); \ | 14812 | int16x8_t __rev1_55; __rev1_55 = __builtin_shufflevector(__s1_55, __s1_55, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 14831 | uint16x4_t __rev2_55; __rev2_55 = __builtin_shufflevector(__s2_55, __s2_55, 3, 2, 1, 0); \ | 14813 | int16x4_t __rev2_55; __rev2_55 = __builtin_shufflevector(__s2_55, __s2_55, 3, 2, 1, 0); \ |
| 14832 | __ret_55 = __rev0_55 + __rev1_55 * __noswap_splat_lane_u16(__rev2_55, __p3_55); \ | 14814 | __ret_55 = __rev0_55 + __rev1_55 * __noswap_splatq_lane_s16(__rev2_55, __p3_55); \ |
| 14833 | __ret_55 = __builtin_shufflevector(__ret_55, __ret_55, 3, 2, 1, 0); \ | 14815 | __ret_55 = __builtin_shufflevector(__ret_55, __ret_55, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 14834 | __ret_55; \ | 14816 | __ret_55; \ |
| 14835 | }) | 14817 | }) |
| 14836 | #endif | 14818 | #endif |
| 14837 | | 14819 | |
| 14838 | #ifdef __LITTLE_ENDIAN__ | 14820 | #ifdef __LITTLE_ENDIAN__ |
| 14839 | #define vmla_lane_f32(__p0_56, __p1_56, __p2_56, __p3_56) __extension__ ({ \ | 14821 | #define vmla_lane_u32(__p0_56, __p1_56, __p2_56, __p3_56) __extension__ ({ \ |
| 14840 | float32x2_t __ret_56; \ | 14822 | uint32x2_t __ret_56; \ |
| 14841 | float32x2_t __s0_56 = __p0_56; \ | 14823 | uint32x2_t __s0_56 = __p0_56; \ |
| 14842 | float32x2_t __s1_56 = __p1_56; \ | 14824 | uint32x2_t __s1_56 = __p1_56; \ |
| 14843 | float32x2_t __s2_56 = __p2_56; \ | 14825 | uint32x2_t __s2_56 = __p2_56; \ |
| 14844 | __ret_56 = __s0_56 + __s1_56 * splat_lane_f32(__s2_56, __p3_56); \ | 14826 | __ret_56 = __s0_56 + __s1_56 * splat_lane_u32(__s2_56, __p3_56); \ |
| 14845 | __ret_56; \ | 14827 | __ret_56; \ |
| 14846 | }) | 14828 | }) |
| 14847 | #else | 14829 | #else |
| 14848 | #define vmla_lane_f32(__p0_57, __p1_57, __p2_57, __p3_57) __extension__ ({ \ | 14830 | #define vmla_lane_u32(__p0_57, __p1_57, __p2_57, __p3_57) __extension__ ({ \ |
| 14849 | float32x2_t __ret_57; \ | 14831 | uint32x2_t __ret_57; \ |
| 14850 | float32x2_t __s0_57 = __p0_57; \ | 14832 | uint32x2_t __s0_57 = __p0_57; \ |
| 14851 | float32x2_t __s1_57 = __p1_57; \ | 14833 | uint32x2_t __s1_57 = __p1_57; \ |
| 14852 | float32x2_t __s2_57 = __p2_57; \ | 14834 | uint32x2_t __s2_57 = __p2_57; \ |
| 14853 | float32x2_t __rev0_57; __rev0_57 = __builtin_shufflevector(__s0_57, __s0_57, 1, 0); \ | 14835 | uint32x2_t __rev0_57; __rev0_57 = __builtin_shufflevector(__s0_57, __s0_57, 1, 0); \ |
| 14854 | float32x2_t __rev1_57; __rev1_57 = __builtin_shufflevector(__s1_57, __s1_57, 1, 0); \ | 14836 | uint32x2_t __rev1_57; __rev1_57 = __builtin_shufflevector(__s1_57, __s1_57, 1, 0); \ |
| 14855 | float32x2_t __rev2_57; __rev2_57 = __builtin_shufflevector(__s2_57, __s2_57, 1, 0); \ | 14837 | uint32x2_t __rev2_57; __rev2_57 = __builtin_shufflevector(__s2_57, __s2_57, 1, 0); \ |
| 14856 | __ret_57 = __rev0_57 + __rev1_57 * __noswap_splat_lane_f32(__rev2_57, __p3_57); \ | 14838 | __ret_57 = __rev0_57 + __rev1_57 * __noswap_splat_lane_u32(__rev2_57, __p3_57); \ |
| 14857 | __ret_57 = __builtin_shufflevector(__ret_57, __ret_57, 1, 0); \ | 14839 | __ret_57 = __builtin_shufflevector(__ret_57, __ret_57, 1, 0); \ |
| 14858 | __ret_57; \ | 14840 | __ret_57; \ |
| 14859 | }) | 14841 | }) |
| 14860 | #endif | 14842 | #endif |
| 14861 | | 14843 | |
| 14862 | #ifdef __LITTLE_ENDIAN__ | 14844 | #ifdef __LITTLE_ENDIAN__ |
| 14863 | #define vmla_lane_s32(__p0_58, __p1_58, __p2_58, __p3_58) __extension__ ({ \ | 14845 | #define vmla_lane_u16(__p0_58, __p1_58, __p2_58, __p3_58) __extension__ ({ \ |
| 14864 | int32x2_t __ret_58; \ | 14846 | uint16x4_t __ret_58; \ |
| 14865 | int32x2_t __s0_58 = __p0_58; \ | 14847 | uint16x4_t __s0_58 = __p0_58; \ |
| 14866 | int32x2_t __s1_58 = __p1_58; \ | 14848 | uint16x4_t __s1_58 = __p1_58; \ |
| 14867 | int32x2_t __s2_58 = __p2_58; \ | 14849 | uint16x4_t __s2_58 = __p2_58; \ |
| 14868 | __ret_58 = __s0_58 + __s1_58 * splat_lane_s32(__s2_58, __p3_58); \ | 14850 | __ret_58 = __s0_58 + __s1_58 * splat_lane_u16(__s2_58, __p3_58); \ |
| 14869 | __ret_58; \ | 14851 | __ret_58; \ |
| 14870 | }) | 14852 | }) |
| 14871 | #else | 14853 | #else |
| 14872 | #define vmla_lane_s32(__p0_59, __p1_59, __p2_59, __p3_59) __extension__ ({ \ | 14854 | #define vmla_lane_u16(__p0_59, __p1_59, __p2_59, __p3_59) __extension__ ({ \ |
| 14873 | int32x2_t __ret_59; \ | 14855 | uint16x4_t __ret_59; \ |
| 14874 | int32x2_t __s0_59 = __p0_59; \ | 14856 | uint16x4_t __s0_59 = __p0_59; \ |
| 14875 | int32x2_t __s1_59 = __p1_59; \ | 14857 | uint16x4_t __s1_59 = __p1_59; \ |
| 14876 | int32x2_t __s2_59 = __p2_59; \ | 14858 | uint16x4_t __s2_59 = __p2_59; \ |
| 14877 | int32x2_t __rev0_59; __rev0_59 = __builtin_shufflevector(__s0_59, __s0_59, 1, 0); \ | 14859 | uint16x4_t __rev0_59; __rev0_59 = __builtin_shufflevector(__s0_59, __s0_59, 3, 2, 1, 0); \ |
| 14878 | int32x2_t __rev1_59; __rev1_59 = __builtin_shufflevector(__s1_59, __s1_59, 1, 0); \ | 14860 | uint16x4_t __rev1_59; __rev1_59 = __builtin_shufflevector(__s1_59, __s1_59, 3, 2, 1, 0); \ |
| 14879 | int32x2_t __rev2_59; __rev2_59 = __builtin_shufflevector(__s2_59, __s2_59, 1, 0); \ | 14861 | uint16x4_t __rev2_59; __rev2_59 = __builtin_shufflevector(__s2_59, __s2_59, 3, 2, 1, 0); \ |
| 14880 | __ret_59 = __rev0_59 + __rev1_59 * __noswap_splat_lane_s32(__rev2_59, __p3_59); \ | 14862 | __ret_59 = __rev0_59 + __rev1_59 * __noswap_splat_lane_u16(__rev2_59, __p3_59); \ |
| 14881 | __ret_59 = __builtin_shufflevector(__ret_59, __ret_59, 1, 0); \ | 14863 | __ret_59 = __builtin_shufflevector(__ret_59, __ret_59, 3, 2, 1, 0); \ |
| 14882 | __ret_59; \ | 14864 | __ret_59; \ |
| 14883 | }) | 14865 | }) |
| 14884 | #endif | 14866 | #endif |
| 14885 | | 14867 | |
| 14886 | #ifdef __LITTLE_ENDIAN__ | 14868 | #ifdef __LITTLE_ENDIAN__ |
| 14887 | #define vmla_lane_s16(__p0_60, __p1_60, __p2_60, __p3_60) __extension__ ({ \ | 14869 | #define vmla_lane_f32(__p0_60, __p1_60, __p2_60, __p3_60) __extension__ ({ \ |
| 14888 | int16x4_t __ret_60; \ | 14870 | float32x2_t __ret_60; \ |
| 14889 | int16x4_t __s0_60 = __p0_60; \ | 14871 | float32x2_t __s0_60 = __p0_60; \ |
| 14890 | int16x4_t __s1_60 = __p1_60; \ | 14872 | float32x2_t __s1_60 = __p1_60; \ |
| 14891 | int16x4_t __s2_60 = __p2_60; \ | 14873 | float32x2_t __s2_60 = __p2_60; \ |
| 14892 | __ret_60 = __s0_60 + __s1_60 * splat_lane_s16(__s2_60, __p3_60); \ | 14874 | __ret_60 = __s0_60 + __s1_60 * splat_lane_f32(__s2_60, __p3_60); \ |
| 14893 | __ret_60; \ | 14875 | __ret_60; \ |
| 14894 | }) | 14876 | }) |
| 14895 | #else | 14877 | #else |
| 14896 | #define vmla_lane_s16(__p0_61, __p1_61, __p2_61, __p3_61) __extension__ ({ \ | 14878 | #define vmla_lane_f32(__p0_61, __p1_61, __p2_61, __p3_61) __extension__ ({ \ |
| 14897 | int16x4_t __ret_61; \ | 14879 | float32x2_t __ret_61; \ |
| 14898 | int16x4_t __s0_61 = __p0_61; \ | 14880 | float32x2_t __s0_61 = __p0_61; \ |
| 14899 | int16x4_t __s1_61 = __p1_61; \ | 14881 | float32x2_t __s1_61 = __p1_61; \ |
| 14900 | int16x4_t __s2_61 = __p2_61; \ | 14882 | float32x2_t __s2_61 = __p2_61; \ |
| 14901 | int16x4_t __rev0_61; __rev0_61 = __builtin_shufflevector(__s0_61, __s0_61, 3, 2, 1, 0); \ | 14883 | float32x2_t __rev0_61; __rev0_61 = __builtin_shufflevector(__s0_61, __s0_61, 1, 0); \ |
| 14902 | int16x4_t __rev1_61; __rev1_61 = __builtin_shufflevector(__s1_61, __s1_61, 3, 2, 1, 0); \ | 14884 | float32x2_t __rev1_61; __rev1_61 = __builtin_shufflevector(__s1_61, __s1_61, 1, 0); \ |
| 14903 | int16x4_t __rev2_61; __rev2_61 = __builtin_shufflevector(__s2_61, __s2_61, 3, 2, 1, 0); \ | 14885 | float32x2_t __rev2_61; __rev2_61 = __builtin_shufflevector(__s2_61, __s2_61, 1, 0); \ |
| 14904 | __ret_61 = __rev0_61 + __rev1_61 * __noswap_splat_lane_s16(__rev2_61, __p3_61); \ | 14886 | __ret_61 = __rev0_61 + __rev1_61 * __noswap_splat_lane_f32(__rev2_61, __p3_61); \ |
| 14905 | __ret_61 = __builtin_shufflevector(__ret_61, __ret_61, 3, 2, 1, 0); \ | 14887 | __ret_61 = __builtin_shufflevector(__ret_61, __ret_61, 1, 0); \ |
| 14906 | __ret_61; \ | 14888 | __ret_61; \ |
| 14907 | }) | 14889 | }) |
| 14908 | #endif | 14890 | #endif |
| 14909 | | 14891 | |
| | 14892 | #ifdef __LITTLE_ENDIAN__ |
| | 14893 | #define vmla_lane_s32(__p0_62, __p1_62, __p2_62, __p3_62) __extension__ ({ \ |
| | 14894 | int32x2_t __ret_62; \ |
| | 14895 | int32x2_t __s0_62 = __p0_62; \ |
| | 14896 | int32x2_t __s1_62 = __p1_62; \ |
| | 14897 | int32x2_t __s2_62 = __p2_62; \ |
| | 14898 | __ret_62 = __s0_62 + __s1_62 * splat_lane_s32(__s2_62, __p3_62); \ |
| | 14899 | __ret_62; \ |
| | 14900 | }) |
| | 14901 | #else |
| | 14902 | #define vmla_lane_s32(__p0_63, __p1_63, __p2_63, __p3_63) __extension__ ({ \ |
| | 14903 | int32x2_t __ret_63; \ |
| | 14904 | int32x2_t __s0_63 = __p0_63; \ |
| | 14905 | int32x2_t __s1_63 = __p1_63; \ |
| | 14906 | int32x2_t __s2_63 = __p2_63; \ |
| | 14907 | int32x2_t __rev0_63; __rev0_63 = __builtin_shufflevector(__s0_63, __s0_63, 1, 0); \ |
| | 14908 | int32x2_t __rev1_63; __rev1_63 = __builtin_shufflevector(__s1_63, __s1_63, 1, 0); \ |
| | 14909 | int32x2_t __rev2_63; __rev2_63 = __builtin_shufflevector(__s2_63, __s2_63, 1, 0); \ |
| | 14910 | __ret_63 = __rev0_63 + __rev1_63 * __noswap_splat_lane_s32(__rev2_63, __p3_63); \ |
| | 14911 | __ret_63 = __builtin_shufflevector(__ret_63, __ret_63, 1, 0); \ |
| | 14912 | __ret_63; \ |
| | 14913 | }) |
| | 14914 | #endif |
| | 14915 | |
| | 14916 | #ifdef __LITTLE_ENDIAN__ |
| | 14917 | #define vmla_lane_s16(__p0_64, __p1_64, __p2_64, __p3_64) __extension__ ({ \ |
| | 14918 | int16x4_t __ret_64; \ |
| | 14919 | int16x4_t __s0_64 = __p0_64; \ |
| | 14920 | int16x4_t __s1_64 = __p1_64; \ |
| | 14921 | int16x4_t __s2_64 = __p2_64; \ |
| | 14922 | __ret_64 = __s0_64 + __s1_64 * splat_lane_s16(__s2_64, __p3_64); \ |
| | 14923 | __ret_64; \ |
| | 14924 | }) |
| | 14925 | #else |
| | 14926 | #define vmla_lane_s16(__p0_65, __p1_65, __p2_65, __p3_65) __extension__ ({ \ |
| | 14927 | int16x4_t __ret_65; \ |
| | 14928 | int16x4_t __s0_65 = __p0_65; \ |
| | 14929 | int16x4_t __s1_65 = __p1_65; \ |
| | 14930 | int16x4_t __s2_65 = __p2_65; \ |
| | 14931 | int16x4_t __rev0_65; __rev0_65 = __builtin_shufflevector(__s0_65, __s0_65, 3, 2, 1, 0); \ |
| | 14932 | int16x4_t __rev1_65; __rev1_65 = __builtin_shufflevector(__s1_65, __s1_65, 3, 2, 1, 0); \ |
| | 14933 | int16x4_t __rev2_65; __rev2_65 = __builtin_shufflevector(__s2_65, __s2_65, 3, 2, 1, 0); \ |
| | 14934 | __ret_65 = __rev0_65 + __rev1_65 * __noswap_splat_lane_s16(__rev2_65, __p3_65); \ |
| | 14935 | __ret_65 = __builtin_shufflevector(__ret_65, __ret_65, 3, 2, 1, 0); \ |
| | 14936 | __ret_65; \ |
| | 14937 | }) |
| | 14938 | #endif |
| | 14939 | |
| 14910 | #ifdef __LITTLE_ENDIAN__ | 14940 | #ifdef __LITTLE_ENDIAN__ |
| 14911 | __ai uint32x4_t vmlaq_n_u32(uint32x4_t __p0, uint32x4_t __p1, uint32_t __p2) { | 14941 | __ai uint32x4_t vmlaq_n_u32(uint32x4_t __p0, uint32x4_t __p1, uint32_t __p2) { |
| 14912 | uint32x4_t __ret; | 14942 | uint32x4_t __ret; |
| ... | @@ -15330,245 +15360,245 @@ __ai int16x4_t vmls_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { | ... | @@ -15330,245 +15360,245 @@ __ai int16x4_t vmls_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { |
| 15330 | #endif | 15360 | #endif |
| 15331 | | 15361 | |
| 15332 | #ifdef __LITTLE_ENDIAN__ | 15362 | #ifdef __LITTLE_ENDIAN__ |
| 15333 | #define vmlsq_lane_u32(__p0_62, __p1_62, __p2_62, __p3_62) __extension__ ({ \ | 15363 | #define vmlsq_lane_u32(__p0_66, __p1_66, __p2_66, __p3_66) __extension__ ({ \ |
| 15334 | uint32x4_t __ret_62; \ | 15364 | uint32x4_t __ret_66; \ |
| 15335 | uint32x4_t __s0_62 = __p0_62; \ | 15365 | uint32x4_t __s0_66 = __p0_66; \ |
| 15336 | uint32x4_t __s1_62 = __p1_62; \ | 15366 | uint32x4_t __s1_66 = __p1_66; \ |
| 15337 | uint32x2_t __s2_62 = __p2_62; \ | 15367 | uint32x2_t __s2_66 = __p2_66; \ |
| 15338 | __ret_62 = __s0_62 - __s1_62 * splatq_lane_u32(__s2_62, __p3_62); \ | 15368 | __ret_66 = __s0_66 - __s1_66 * splatq_lane_u32(__s2_66, __p3_66); \ |
| 15339 | __ret_62; \ | | |
| 15340 | }) | | |
| 15341 | #else | | |
| 15342 | #define vmlsq_lane_u32(__p0_63, __p1_63, __p2_63, __p3_63) __extension__ ({ \ | | |
| 15343 | uint32x4_t __ret_63; \ | | |
| 15344 | uint32x4_t __s0_63 = __p0_63; \ | | |
| 15345 | uint32x4_t __s1_63 = __p1_63; \ | | |
| 15346 | uint32x2_t __s2_63 = __p2_63; \ | | |
| 15347 | uint32x4_t __rev0_63; __rev0_63 = __builtin_shufflevector(__s0_63, __s0_63, 3, 2, 1, 0); \ | | |
| 15348 | uint32x4_t __rev1_63; __rev1_63 = __builtin_shufflevector(__s1_63, __s1_63, 3, 2, 1, 0); \ | | |
| 15349 | uint32x2_t __rev2_63; __rev2_63 = __builtin_shufflevector(__s2_63, __s2_63, 1, 0); \ | | |
| 15350 | __ret_63 = __rev0_63 - __rev1_63 * __noswap_splatq_lane_u32(__rev2_63, __p3_63); \ | | |
| 15351 | __ret_63 = __builtin_shufflevector(__ret_63, __ret_63, 3, 2, 1, 0); \ | | |
| 15352 | __ret_63; \ | | |
| 15353 | }) | | |
| 15354 | #endif | | |
| 15355 | | | |
| 15356 | #ifdef __LITTLE_ENDIAN__ | | |
| 15357 | #define vmlsq_lane_u16(__p0_64, __p1_64, __p2_64, __p3_64) __extension__ ({ \ | | |
| 15358 | uint16x8_t __ret_64; \ | | |
| 15359 | uint16x8_t __s0_64 = __p0_64; \ | | |
| 15360 | uint16x8_t __s1_64 = __p1_64; \ | | |
| 15361 | uint16x4_t __s2_64 = __p2_64; \ | | |
| 15362 | __ret_64 = __s0_64 - __s1_64 * splatq_lane_u16(__s2_64, __p3_64); \ | | |
| 15363 | __ret_64; \ | | |
| 15364 | }) | | |
| 15365 | #else | | |
| 15366 | #define vmlsq_lane_u16(__p0_65, __p1_65, __p2_65, __p3_65) __extension__ ({ \ | | |
| 15367 | uint16x8_t __ret_65; \ | | |
| 15368 | uint16x8_t __s0_65 = __p0_65; \ | | |
| 15369 | uint16x8_t __s1_65 = __p1_65; \ | | |
| 15370 | uint16x4_t __s2_65 = __p2_65; \ | | |
| 15371 | uint16x8_t __rev0_65; __rev0_65 = __builtin_shufflevector(__s0_65, __s0_65, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 15372 | uint16x8_t __rev1_65; __rev1_65 = __builtin_shufflevector(__s1_65, __s1_65, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 15373 | uint16x4_t __rev2_65; __rev2_65 = __builtin_shufflevector(__s2_65, __s2_65, 3, 2, 1, 0); \ | | |
| 15374 | __ret_65 = __rev0_65 - __rev1_65 * __noswap_splatq_lane_u16(__rev2_65, __p3_65); \ | | |
| 15375 | __ret_65 = __builtin_shufflevector(__ret_65, __ret_65, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 15376 | __ret_65; \ | | |
| 15377 | }) | | |
| 15378 | #endif | | |
| 15379 | | | |
| 15380 | #ifdef __LITTLE_ENDIAN__ | | |
| 15381 | #define vmlsq_lane_f32(__p0_66, __p1_66, __p2_66, __p3_66) __extension__ ({ \ | | |
| 15382 | float32x4_t __ret_66; \ | | |
| 15383 | float32x4_t __s0_66 = __p0_66; \ | | |
| 15384 | float32x4_t __s1_66 = __p1_66; \ | | |
| 15385 | float32x2_t __s2_66 = __p2_66; \ | | |
| 15386 | __ret_66 = __s0_66 - __s1_66 * splatq_lane_f32(__s2_66, __p3_66); \ | | |
| 15387 | __ret_66; \ | 15369 | __ret_66; \ |
| 15388 | }) | 15370 | }) |
| 15389 | #else | 15371 | #else |
| 15390 | #define vmlsq_lane_f32(__p0_67, __p1_67, __p2_67, __p3_67) __extension__ ({ \ | 15372 | #define vmlsq_lane_u32(__p0_67, __p1_67, __p2_67, __p3_67) __extension__ ({ \ |
| 15391 | float32x4_t __ret_67; \ | 15373 | uint32x4_t __ret_67; \ |
| 15392 | float32x4_t __s0_67 = __p0_67; \ | 15374 | uint32x4_t __s0_67 = __p0_67; \ |
| 15393 | float32x4_t __s1_67 = __p1_67; \ | 15375 | uint32x4_t __s1_67 = __p1_67; \ |
| 15394 | float32x2_t __s2_67 = __p2_67; \ | 15376 | uint32x2_t __s2_67 = __p2_67; \ |
| 15395 | float32x4_t __rev0_67; __rev0_67 = __builtin_shufflevector(__s0_67, __s0_67, 3, 2, 1, 0); \ | 15377 | uint32x4_t __rev0_67; __rev0_67 = __builtin_shufflevector(__s0_67, __s0_67, 3, 2, 1, 0); \ |
| 15396 | float32x4_t __rev1_67; __rev1_67 = __builtin_shufflevector(__s1_67, __s1_67, 3, 2, 1, 0); \ | 15378 | uint32x4_t __rev1_67; __rev1_67 = __builtin_shufflevector(__s1_67, __s1_67, 3, 2, 1, 0); \ |
| 15397 | float32x2_t __rev2_67; __rev2_67 = __builtin_shufflevector(__s2_67, __s2_67, 1, 0); \ | 15379 | uint32x2_t __rev2_67; __rev2_67 = __builtin_shufflevector(__s2_67, __s2_67, 1, 0); \ |
| 15398 | __ret_67 = __rev0_67 - __rev1_67 * __noswap_splatq_lane_f32(__rev2_67, __p3_67); \ | 15380 | __ret_67 = __rev0_67 - __rev1_67 * __noswap_splatq_lane_u32(__rev2_67, __p3_67); \ |
| 15399 | __ret_67 = __builtin_shufflevector(__ret_67, __ret_67, 3, 2, 1, 0); \ | 15381 | __ret_67 = __builtin_shufflevector(__ret_67, __ret_67, 3, 2, 1, 0); \ |
| 15400 | __ret_67; \ | 15382 | __ret_67; \ |
| 15401 | }) | 15383 | }) |
| 15402 | #endif | 15384 | #endif |
| 15403 | | 15385 | |
| 15404 | #ifdef __LITTLE_ENDIAN__ | 15386 | #ifdef __LITTLE_ENDIAN__ |
| 15405 | #define vmlsq_lane_s32(__p0_68, __p1_68, __p2_68, __p3_68) __extension__ ({ \ | 15387 | #define vmlsq_lane_u16(__p0_68, __p1_68, __p2_68, __p3_68) __extension__ ({ \ |
| 15406 | int32x4_t __ret_68; \ | 15388 | uint16x8_t __ret_68; \ |
| 15407 | int32x4_t __s0_68 = __p0_68; \ | 15389 | uint16x8_t __s0_68 = __p0_68; \ |
| 15408 | int32x4_t __s1_68 = __p1_68; \ | 15390 | uint16x8_t __s1_68 = __p1_68; \ |
| 15409 | int32x2_t __s2_68 = __p2_68; \ | 15391 | uint16x4_t __s2_68 = __p2_68; \ |
| 15410 | __ret_68 = __s0_68 - __s1_68 * splatq_lane_s32(__s2_68, __p3_68); \ | 15392 | __ret_68 = __s0_68 - __s1_68 * splatq_lane_u16(__s2_68, __p3_68); \ |
| 15411 | __ret_68; \ | 15393 | __ret_68; \ |
| 15412 | }) | 15394 | }) |
| 15413 | #else | 15395 | #else |
| 15414 | #define vmlsq_lane_s32(__p0_69, __p1_69, __p2_69, __p3_69) __extension__ ({ \ | 15396 | #define vmlsq_lane_u16(__p0_69, __p1_69, __p2_69, __p3_69) __extension__ ({ \ |
| 15415 | int32x4_t __ret_69; \ | 15397 | uint16x8_t __ret_69; \ |
| 15416 | int32x4_t __s0_69 = __p0_69; \ | 15398 | uint16x8_t __s0_69 = __p0_69; \ |
| 15417 | int32x4_t __s1_69 = __p1_69; \ | 15399 | uint16x8_t __s1_69 = __p1_69; \ |
| 15418 | int32x2_t __s2_69 = __p2_69; \ | 15400 | uint16x4_t __s2_69 = __p2_69; \ |
| 15419 | int32x4_t __rev0_69; __rev0_69 = __builtin_shufflevector(__s0_69, __s0_69, 3, 2, 1, 0); \ | 15401 | uint16x8_t __rev0_69; __rev0_69 = __builtin_shufflevector(__s0_69, __s0_69, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 15420 | int32x4_t __rev1_69; __rev1_69 = __builtin_shufflevector(__s1_69, __s1_69, 3, 2, 1, 0); \ | 15402 | uint16x8_t __rev1_69; __rev1_69 = __builtin_shufflevector(__s1_69, __s1_69, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 15421 | int32x2_t __rev2_69; __rev2_69 = __builtin_shufflevector(__s2_69, __s2_69, 1, 0); \ | 15403 | uint16x4_t __rev2_69; __rev2_69 = __builtin_shufflevector(__s2_69, __s2_69, 3, 2, 1, 0); \ |
| 15422 | __ret_69 = __rev0_69 - __rev1_69 * __noswap_splatq_lane_s32(__rev2_69, __p3_69); \ | 15404 | __ret_69 = __rev0_69 - __rev1_69 * __noswap_splatq_lane_u16(__rev2_69, __p3_69); \ |
| 15423 | __ret_69 = __builtin_shufflevector(__ret_69, __ret_69, 3, 2, 1, 0); \ | 15405 | __ret_69 = __builtin_shufflevector(__ret_69, __ret_69, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 15424 | __ret_69; \ | 15406 | __ret_69; \ |
| 15425 | }) | 15407 | }) |
| 15426 | #endif | 15408 | #endif |
| 15427 | | 15409 | |
| 15428 | #ifdef __LITTLE_ENDIAN__ | 15410 | #ifdef __LITTLE_ENDIAN__ |
| 15429 | #define vmlsq_lane_s16(__p0_70, __p1_70, __p2_70, __p3_70) __extension__ ({ \ | 15411 | #define vmlsq_lane_f32(__p0_70, __p1_70, __p2_70, __p3_70) __extension__ ({ \ |
| 15430 | int16x8_t __ret_70; \ | 15412 | float32x4_t __ret_70; \ |
| 15431 | int16x8_t __s0_70 = __p0_70; \ | 15413 | float32x4_t __s0_70 = __p0_70; \ |
| 15432 | int16x8_t __s1_70 = __p1_70; \ | 15414 | float32x4_t __s1_70 = __p1_70; \ |
| 15433 | int16x4_t __s2_70 = __p2_70; \ | 15415 | float32x2_t __s2_70 = __p2_70; \ |
| 15434 | __ret_70 = __s0_70 - __s1_70 * splatq_lane_s16(__s2_70, __p3_70); \ | 15416 | __ret_70 = __s0_70 - __s1_70 * splatq_lane_f32(__s2_70, __p3_70); \ |
| 15435 | __ret_70; \ | 15417 | __ret_70; \ |
| 15436 | }) | 15418 | }) |
| 15437 | #else | 15419 | #else |
| 15438 | #define vmlsq_lane_s16(__p0_71, __p1_71, __p2_71, __p3_71) __extension__ ({ \ | 15420 | #define vmlsq_lane_f32(__p0_71, __p1_71, __p2_71, __p3_71) __extension__ ({ \ |
| 15439 | int16x8_t __ret_71; \ | 15421 | float32x4_t __ret_71; \ |
| 15440 | int16x8_t __s0_71 = __p0_71; \ | 15422 | float32x4_t __s0_71 = __p0_71; \ |
| 15441 | int16x8_t __s1_71 = __p1_71; \ | 15423 | float32x4_t __s1_71 = __p1_71; \ |
| 15442 | int16x4_t __s2_71 = __p2_71; \ | 15424 | float32x2_t __s2_71 = __p2_71; \ |
| 15443 | int16x8_t __rev0_71; __rev0_71 = __builtin_shufflevector(__s0_71, __s0_71, 7, 6, 5, 4, 3, 2, 1, 0); \ | 15425 | float32x4_t __rev0_71; __rev0_71 = __builtin_shufflevector(__s0_71, __s0_71, 3, 2, 1, 0); \ |
| 15444 | int16x8_t __rev1_71; __rev1_71 = __builtin_shufflevector(__s1_71, __s1_71, 7, 6, 5, 4, 3, 2, 1, 0); \ | 15426 | float32x4_t __rev1_71; __rev1_71 = __builtin_shufflevector(__s1_71, __s1_71, 3, 2, 1, 0); \ |
| 15445 | int16x4_t __rev2_71; __rev2_71 = __builtin_shufflevector(__s2_71, __s2_71, 3, 2, 1, 0); \ | 15427 | float32x2_t __rev2_71; __rev2_71 = __builtin_shufflevector(__s2_71, __s2_71, 1, 0); \ |
| 15446 | __ret_71 = __rev0_71 - __rev1_71 * __noswap_splatq_lane_s16(__rev2_71, __p3_71); \ | 15428 | __ret_71 = __rev0_71 - __rev1_71 * __noswap_splatq_lane_f32(__rev2_71, __p3_71); \ |
| 15447 | __ret_71 = __builtin_shufflevector(__ret_71, __ret_71, 7, 6, 5, 4, 3, 2, 1, 0); \ | 15429 | __ret_71 = __builtin_shufflevector(__ret_71, __ret_71, 3, 2, 1, 0); \ |
| 15448 | __ret_71; \ | 15430 | __ret_71; \ |
| 15449 | }) | 15431 | }) |
| 15450 | #endif | 15432 | #endif |
| 15451 | | 15433 | |
| 15452 | #ifdef __LITTLE_ENDIAN__ | 15434 | #ifdef __LITTLE_ENDIAN__ |
| 15453 | #define vmls_lane_u32(__p0_72, __p1_72, __p2_72, __p3_72) __extension__ ({ \ | 15435 | #define vmlsq_lane_s32(__p0_72, __p1_72, __p2_72, __p3_72) __extension__ ({ \ |
| 15454 | uint32x2_t __ret_72; \ | 15436 | int32x4_t __ret_72; \ |
| 15455 | uint32x2_t __s0_72 = __p0_72; \ | 15437 | int32x4_t __s0_72 = __p0_72; \ |
| 15456 | uint32x2_t __s1_72 = __p1_72; \ | 15438 | int32x4_t __s1_72 = __p1_72; \ |
| 15457 | uint32x2_t __s2_72 = __p2_72; \ | 15439 | int32x2_t __s2_72 = __p2_72; \ |
| 15458 | __ret_72 = __s0_72 - __s1_72 * splat_lane_u32(__s2_72, __p3_72); \ | 15440 | __ret_72 = __s0_72 - __s1_72 * splatq_lane_s32(__s2_72, __p3_72); \ |
| 15459 | __ret_72; \ | 15441 | __ret_72; \ |
| 15460 | }) | 15442 | }) |
| 15461 | #else | 15443 | #else |
| 15462 | #define vmls_lane_u32(__p0_73, __p1_73, __p2_73, __p3_73) __extension__ ({ \ | 15444 | #define vmlsq_lane_s32(__p0_73, __p1_73, __p2_73, __p3_73) __extension__ ({ \ |
| 15463 | uint32x2_t __ret_73; \ | 15445 | int32x4_t __ret_73; \ |
| 15464 | uint32x2_t __s0_73 = __p0_73; \ | 15446 | int32x4_t __s0_73 = __p0_73; \ |
| 15465 | uint32x2_t __s1_73 = __p1_73; \ | 15447 | int32x4_t __s1_73 = __p1_73; \ |
| 15466 | uint32x2_t __s2_73 = __p2_73; \ | 15448 | int32x2_t __s2_73 = __p2_73; \ |
| 15467 | uint32x2_t __rev0_73; __rev0_73 = __builtin_shufflevector(__s0_73, __s0_73, 1, 0); \ | 15449 | int32x4_t __rev0_73; __rev0_73 = __builtin_shufflevector(__s0_73, __s0_73, 3, 2, 1, 0); \ |
| 15468 | uint32x2_t __rev1_73; __rev1_73 = __builtin_shufflevector(__s1_73, __s1_73, 1, 0); \ | 15450 | int32x4_t __rev1_73; __rev1_73 = __builtin_shufflevector(__s1_73, __s1_73, 3, 2, 1, 0); \ |
| 15469 | uint32x2_t __rev2_73; __rev2_73 = __builtin_shufflevector(__s2_73, __s2_73, 1, 0); \ | 15451 | int32x2_t __rev2_73; __rev2_73 = __builtin_shufflevector(__s2_73, __s2_73, 1, 0); \ |
| 15470 | __ret_73 = __rev0_73 - __rev1_73 * __noswap_splat_lane_u32(__rev2_73, __p3_73); \ | 15452 | __ret_73 = __rev0_73 - __rev1_73 * __noswap_splatq_lane_s32(__rev2_73, __p3_73); \ |
| 15471 | __ret_73 = __builtin_shufflevector(__ret_73, __ret_73, 1, 0); \ | 15453 | __ret_73 = __builtin_shufflevector(__ret_73, __ret_73, 3, 2, 1, 0); \ |
| 15472 | __ret_73; \ | 15454 | __ret_73; \ |
| 15473 | }) | 15455 | }) |
| 15474 | #endif | 15456 | #endif |
| 15475 | | 15457 | |
| 15476 | #ifdef __LITTLE_ENDIAN__ | 15458 | #ifdef __LITTLE_ENDIAN__ |
| 15477 | #define vmls_lane_u16(__p0_74, __p1_74, __p2_74, __p3_74) __extension__ ({ \ | 15459 | #define vmlsq_lane_s16(__p0_74, __p1_74, __p2_74, __p3_74) __extension__ ({ \ |
| 15478 | uint16x4_t __ret_74; \ | 15460 | int16x8_t __ret_74; \ |
| 15479 | uint16x4_t __s0_74 = __p0_74; \ | 15461 | int16x8_t __s0_74 = __p0_74; \ |
| 15480 | uint16x4_t __s1_74 = __p1_74; \ | 15462 | int16x8_t __s1_74 = __p1_74; \ |
| 15481 | uint16x4_t __s2_74 = __p2_74; \ | 15463 | int16x4_t __s2_74 = __p2_74; \ |
| 15482 | __ret_74 = __s0_74 - __s1_74 * splat_lane_u16(__s2_74, __p3_74); \ | 15464 | __ret_74 = __s0_74 - __s1_74 * splatq_lane_s16(__s2_74, __p3_74); \ |
| 15483 | __ret_74; \ | 15465 | __ret_74; \ |
| 15484 | }) | 15466 | }) |
| 15485 | #else | 15467 | #else |
| 15486 | #define vmls_lane_u16(__p0_75, __p1_75, __p2_75, __p3_75) __extension__ ({ \ | 15468 | #define vmlsq_lane_s16(__p0_75, __p1_75, __p2_75, __p3_75) __extension__ ({ \ |
| 15487 | uint16x4_t __ret_75; \ | 15469 | int16x8_t __ret_75; \ |
| 15488 | uint16x4_t __s0_75 = __p0_75; \ | 15470 | int16x8_t __s0_75 = __p0_75; \ |
| 15489 | uint16x4_t __s1_75 = __p1_75; \ | 15471 | int16x8_t __s1_75 = __p1_75; \ |
| 15490 | uint16x4_t __s2_75 = __p2_75; \ | 15472 | int16x4_t __s2_75 = __p2_75; \ |
| 15491 | uint16x4_t __rev0_75; __rev0_75 = __builtin_shufflevector(__s0_75, __s0_75, 3, 2, 1, 0); \ | 15473 | int16x8_t __rev0_75; __rev0_75 = __builtin_shufflevector(__s0_75, __s0_75, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 15492 | uint16x4_t __rev1_75; __rev1_75 = __builtin_shufflevector(__s1_75, __s1_75, 3, 2, 1, 0); \ | 15474 | int16x8_t __rev1_75; __rev1_75 = __builtin_shufflevector(__s1_75, __s1_75, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 15493 | uint16x4_t __rev2_75; __rev2_75 = __builtin_shufflevector(__s2_75, __s2_75, 3, 2, 1, 0); \ | 15475 | int16x4_t __rev2_75; __rev2_75 = __builtin_shufflevector(__s2_75, __s2_75, 3, 2, 1, 0); \ |
| 15494 | __ret_75 = __rev0_75 - __rev1_75 * __noswap_splat_lane_u16(__rev2_75, __p3_75); \ | 15476 | __ret_75 = __rev0_75 - __rev1_75 * __noswap_splatq_lane_s16(__rev2_75, __p3_75); \ |
| 15495 | __ret_75 = __builtin_shufflevector(__ret_75, __ret_75, 3, 2, 1, 0); \ | 15477 | __ret_75 = __builtin_shufflevector(__ret_75, __ret_75, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 15496 | __ret_75; \ | 15478 | __ret_75; \ |
| 15497 | }) | 15479 | }) |
| 15498 | #endif | 15480 | #endif |
| 15499 | | 15481 | |
| 15500 | #ifdef __LITTLE_ENDIAN__ | 15482 | #ifdef __LITTLE_ENDIAN__ |
| 15501 | #define vmls_lane_f32(__p0_76, __p1_76, __p2_76, __p3_76) __extension__ ({ \ | 15483 | #define vmls_lane_u32(__p0_76, __p1_76, __p2_76, __p3_76) __extension__ ({ \ |
| 15502 | float32x2_t __ret_76; \ | 15484 | uint32x2_t __ret_76; \ |
| 15503 | float32x2_t __s0_76 = __p0_76; \ | 15485 | uint32x2_t __s0_76 = __p0_76; \ |
| 15504 | float32x2_t __s1_76 = __p1_76; \ | 15486 | uint32x2_t __s1_76 = __p1_76; \ |
| 15505 | float32x2_t __s2_76 = __p2_76; \ | 15487 | uint32x2_t __s2_76 = __p2_76; \ |
| 15506 | __ret_76 = __s0_76 - __s1_76 * splat_lane_f32(__s2_76, __p3_76); \ | 15488 | __ret_76 = __s0_76 - __s1_76 * splat_lane_u32(__s2_76, __p3_76); \ |
| 15507 | __ret_76; \ | 15489 | __ret_76; \ |
| 15508 | }) | 15490 | }) |
| 15509 | #else | 15491 | #else |
| 15510 | #define vmls_lane_f32(__p0_77, __p1_77, __p2_77, __p3_77) __extension__ ({ \ | 15492 | #define vmls_lane_u32(__p0_77, __p1_77, __p2_77, __p3_77) __extension__ ({ \ |
| 15511 | float32x2_t __ret_77; \ | 15493 | uint32x2_t __ret_77; \ |
| 15512 | float32x2_t __s0_77 = __p0_77; \ | 15494 | uint32x2_t __s0_77 = __p0_77; \ |
| 15513 | float32x2_t __s1_77 = __p1_77; \ | 15495 | uint32x2_t __s1_77 = __p1_77; \ |
| 15514 | float32x2_t __s2_77 = __p2_77; \ | 15496 | uint32x2_t __s2_77 = __p2_77; \ |
| 15515 | float32x2_t __rev0_77; __rev0_77 = __builtin_shufflevector(__s0_77, __s0_77, 1, 0); \ | 15497 | uint32x2_t __rev0_77; __rev0_77 = __builtin_shufflevector(__s0_77, __s0_77, 1, 0); \ |
| 15516 | float32x2_t __rev1_77; __rev1_77 = __builtin_shufflevector(__s1_77, __s1_77, 1, 0); \ | 15498 | uint32x2_t __rev1_77; __rev1_77 = __builtin_shufflevector(__s1_77, __s1_77, 1, 0); \ |
| 15517 | float32x2_t __rev2_77; __rev2_77 = __builtin_shufflevector(__s2_77, __s2_77, 1, 0); \ | 15499 | uint32x2_t __rev2_77; __rev2_77 = __builtin_shufflevector(__s2_77, __s2_77, 1, 0); \ |
| 15518 | __ret_77 = __rev0_77 - __rev1_77 * __noswap_splat_lane_f32(__rev2_77, __p3_77); \ | 15500 | __ret_77 = __rev0_77 - __rev1_77 * __noswap_splat_lane_u32(__rev2_77, __p3_77); \ |
| 15519 | __ret_77 = __builtin_shufflevector(__ret_77, __ret_77, 1, 0); \ | 15501 | __ret_77 = __builtin_shufflevector(__ret_77, __ret_77, 1, 0); \ |
| 15520 | __ret_77; \ | 15502 | __ret_77; \ |
| 15521 | }) | 15503 | }) |
| 15522 | #endif | 15504 | #endif |
| 15523 | | 15505 | |
| 15524 | #ifdef __LITTLE_ENDIAN__ | 15506 | #ifdef __LITTLE_ENDIAN__ |
| 15525 | #define vmls_lane_s32(__p0_78, __p1_78, __p2_78, __p3_78) __extension__ ({ \ | 15507 | #define vmls_lane_u16(__p0_78, __p1_78, __p2_78, __p3_78) __extension__ ({ \ |
| 15526 | int32x2_t __ret_78; \ | 15508 | uint16x4_t __ret_78; \ |
| 15527 | int32x2_t __s0_78 = __p0_78; \ | 15509 | uint16x4_t __s0_78 = __p0_78; \ |
| 15528 | int32x2_t __s1_78 = __p1_78; \ | 15510 | uint16x4_t __s1_78 = __p1_78; \ |
| 15529 | int32x2_t __s2_78 = __p2_78; \ | 15511 | uint16x4_t __s2_78 = __p2_78; \ |
| 15530 | __ret_78 = __s0_78 - __s1_78 * splat_lane_s32(__s2_78, __p3_78); \ | 15512 | __ret_78 = __s0_78 - __s1_78 * splat_lane_u16(__s2_78, __p3_78); \ |
| 15531 | __ret_78; \ | 15513 | __ret_78; \ |
| 15532 | }) | 15514 | }) |
| 15533 | #else | 15515 | #else |
| 15534 | #define vmls_lane_s32(__p0_79, __p1_79, __p2_79, __p3_79) __extension__ ({ \ | 15516 | #define vmls_lane_u16(__p0_79, __p1_79, __p2_79, __p3_79) __extension__ ({ \ |
| 15535 | int32x2_t __ret_79; \ | 15517 | uint16x4_t __ret_79; \ |
| 15536 | int32x2_t __s0_79 = __p0_79; \ | 15518 | uint16x4_t __s0_79 = __p0_79; \ |
| 15537 | int32x2_t __s1_79 = __p1_79; \ | 15519 | uint16x4_t __s1_79 = __p1_79; \ |
| 15538 | int32x2_t __s2_79 = __p2_79; \ | 15520 | uint16x4_t __s2_79 = __p2_79; \ |
| 15539 | int32x2_t __rev0_79; __rev0_79 = __builtin_shufflevector(__s0_79, __s0_79, 1, 0); \ | 15521 | uint16x4_t __rev0_79; __rev0_79 = __builtin_shufflevector(__s0_79, __s0_79, 3, 2, 1, 0); \ |
| 15540 | int32x2_t __rev1_79; __rev1_79 = __builtin_shufflevector(__s1_79, __s1_79, 1, 0); \ | 15522 | uint16x4_t __rev1_79; __rev1_79 = __builtin_shufflevector(__s1_79, __s1_79, 3, 2, 1, 0); \ |
| 15541 | int32x2_t __rev2_79; __rev2_79 = __builtin_shufflevector(__s2_79, __s2_79, 1, 0); \ | 15523 | uint16x4_t __rev2_79; __rev2_79 = __builtin_shufflevector(__s2_79, __s2_79, 3, 2, 1, 0); \ |
| 15542 | __ret_79 = __rev0_79 - __rev1_79 * __noswap_splat_lane_s32(__rev2_79, __p3_79); \ | 15524 | __ret_79 = __rev0_79 - __rev1_79 * __noswap_splat_lane_u16(__rev2_79, __p3_79); \ |
| 15543 | __ret_79 = __builtin_shufflevector(__ret_79, __ret_79, 1, 0); \ | 15525 | __ret_79 = __builtin_shufflevector(__ret_79, __ret_79, 3, 2, 1, 0); \ |
| 15544 | __ret_79; \ | 15526 | __ret_79; \ |
| 15545 | }) | 15527 | }) |
| 15546 | #endif | 15528 | #endif |
| 15547 | | 15529 | |
| 15548 | #ifdef __LITTLE_ENDIAN__ | 15530 | #ifdef __LITTLE_ENDIAN__ |
| 15549 | #define vmls_lane_s16(__p0_80, __p1_80, __p2_80, __p3_80) __extension__ ({ \ | 15531 | #define vmls_lane_f32(__p0_80, __p1_80, __p2_80, __p3_80) __extension__ ({ \ |
| 15550 | int16x4_t __ret_80; \ | 15532 | float32x2_t __ret_80; \ |
| 15551 | int16x4_t __s0_80 = __p0_80; \ | 15533 | float32x2_t __s0_80 = __p0_80; \ |
| 15552 | int16x4_t __s1_80 = __p1_80; \ | 15534 | float32x2_t __s1_80 = __p1_80; \ |
| 15553 | int16x4_t __s2_80 = __p2_80; \ | 15535 | float32x2_t __s2_80 = __p2_80; \ |
| 15554 | __ret_80 = __s0_80 - __s1_80 * splat_lane_s16(__s2_80, __p3_80); \ | 15536 | __ret_80 = __s0_80 - __s1_80 * splat_lane_f32(__s2_80, __p3_80); \ |
| 15555 | __ret_80; \ | 15537 | __ret_80; \ |
| 15556 | }) | 15538 | }) |
| 15557 | #else | 15539 | #else |
| 15558 | #define vmls_lane_s16(__p0_81, __p1_81, __p2_81, __p3_81) __extension__ ({ \ | 15540 | #define vmls_lane_f32(__p0_81, __p1_81, __p2_81, __p3_81) __extension__ ({ \ |
| 15559 | int16x4_t __ret_81; \ | 15541 | float32x2_t __ret_81; \ |
| 15560 | int16x4_t __s0_81 = __p0_81; \ | 15542 | float32x2_t __s0_81 = __p0_81; \ |
| 15561 | int16x4_t __s1_81 = __p1_81; \ | 15543 | float32x2_t __s1_81 = __p1_81; \ |
| 15562 | int16x4_t __s2_81 = __p2_81; \ | 15544 | float32x2_t __s2_81 = __p2_81; \ |
| 15563 | int16x4_t __rev0_81; __rev0_81 = __builtin_shufflevector(__s0_81, __s0_81, 3, 2, 1, 0); \ | 15545 | float32x2_t __rev0_81; __rev0_81 = __builtin_shufflevector(__s0_81, __s0_81, 1, 0); \ |
| 15564 | int16x4_t __rev1_81; __rev1_81 = __builtin_shufflevector(__s1_81, __s1_81, 3, 2, 1, 0); \ | 15546 | float32x2_t __rev1_81; __rev1_81 = __builtin_shufflevector(__s1_81, __s1_81, 1, 0); \ |
| 15565 | int16x4_t __rev2_81; __rev2_81 = __builtin_shufflevector(__s2_81, __s2_81, 3, 2, 1, 0); \ | 15547 | float32x2_t __rev2_81; __rev2_81 = __builtin_shufflevector(__s2_81, __s2_81, 1, 0); \ |
| 15566 | __ret_81 = __rev0_81 - __rev1_81 * __noswap_splat_lane_s16(__rev2_81, __p3_81); \ | 15548 | __ret_81 = __rev0_81 - __rev1_81 * __noswap_splat_lane_f32(__rev2_81, __p3_81); \ |
| 15567 | __ret_81 = __builtin_shufflevector(__ret_81, __ret_81, 3, 2, 1, 0); \ | 15549 | __ret_81 = __builtin_shufflevector(__ret_81, __ret_81, 1, 0); \ |
| 15568 | __ret_81; \ | 15550 | __ret_81; \ |
| 15569 | }) | 15551 | }) |
| 15570 | #endif | 15552 | #endif |
| 15571 | | 15553 | |
| | 15554 | #ifdef __LITTLE_ENDIAN__ |
| | 15555 | #define vmls_lane_s32(__p0_82, __p1_82, __p2_82, __p3_82) __extension__ ({ \ |
| | 15556 | int32x2_t __ret_82; \ |
| | 15557 | int32x2_t __s0_82 = __p0_82; \ |
| | 15558 | int32x2_t __s1_82 = __p1_82; \ |
| | 15559 | int32x2_t __s2_82 = __p2_82; \ |
| | 15560 | __ret_82 = __s0_82 - __s1_82 * splat_lane_s32(__s2_82, __p3_82); \ |
| | 15561 | __ret_82; \ |
| | 15562 | }) |
| | 15563 | #else |
| | 15564 | #define vmls_lane_s32(__p0_83, __p1_83, __p2_83, __p3_83) __extension__ ({ \ |
| | 15565 | int32x2_t __ret_83; \ |
| | 15566 | int32x2_t __s0_83 = __p0_83; \ |
| | 15567 | int32x2_t __s1_83 = __p1_83; \ |
| | 15568 | int32x2_t __s2_83 = __p2_83; \ |
| | 15569 | int32x2_t __rev0_83; __rev0_83 = __builtin_shufflevector(__s0_83, __s0_83, 1, 0); \ |
| | 15570 | int32x2_t __rev1_83; __rev1_83 = __builtin_shufflevector(__s1_83, __s1_83, 1, 0); \ |
| | 15571 | int32x2_t __rev2_83; __rev2_83 = __builtin_shufflevector(__s2_83, __s2_83, 1, 0); \ |
| | 15572 | __ret_83 = __rev0_83 - __rev1_83 * __noswap_splat_lane_s32(__rev2_83, __p3_83); \ |
| | 15573 | __ret_83 = __builtin_shufflevector(__ret_83, __ret_83, 1, 0); \ |
| | 15574 | __ret_83; \ |
| | 15575 | }) |
| | 15576 | #endif |
| | 15577 | |
| | 15578 | #ifdef __LITTLE_ENDIAN__ |
| | 15579 | #define vmls_lane_s16(__p0_84, __p1_84, __p2_84, __p3_84) __extension__ ({ \ |
| | 15580 | int16x4_t __ret_84; \ |
| | 15581 | int16x4_t __s0_84 = __p0_84; \ |
| | 15582 | int16x4_t __s1_84 = __p1_84; \ |
| | 15583 | int16x4_t __s2_84 = __p2_84; \ |
| | 15584 | __ret_84 = __s0_84 - __s1_84 * splat_lane_s16(__s2_84, __p3_84); \ |
| | 15585 | __ret_84; \ |
| | 15586 | }) |
| | 15587 | #else |
| | 15588 | #define vmls_lane_s16(__p0_85, __p1_85, __p2_85, __p3_85) __extension__ ({ \ |
| | 15589 | int16x4_t __ret_85; \ |
| | 15590 | int16x4_t __s0_85 = __p0_85; \ |
| | 15591 | int16x4_t __s1_85 = __p1_85; \ |
| | 15592 | int16x4_t __s2_85 = __p2_85; \ |
| | 15593 | int16x4_t __rev0_85; __rev0_85 = __builtin_shufflevector(__s0_85, __s0_85, 3, 2, 1, 0); \ |
| | 15594 | int16x4_t __rev1_85; __rev1_85 = __builtin_shufflevector(__s1_85, __s1_85, 3, 2, 1, 0); \ |
| | 15595 | int16x4_t __rev2_85; __rev2_85 = __builtin_shufflevector(__s2_85, __s2_85, 3, 2, 1, 0); \ |
| | 15596 | __ret_85 = __rev0_85 - __rev1_85 * __noswap_splat_lane_s16(__rev2_85, __p3_85); \ |
| | 15597 | __ret_85 = __builtin_shufflevector(__ret_85, __ret_85, 3, 2, 1, 0); \ |
| | 15598 | __ret_85; \ |
| | 15599 | }) |
| | 15600 | #endif |
| | 15601 | |
| 15572 | #ifdef __LITTLE_ENDIAN__ | 15602 | #ifdef __LITTLE_ENDIAN__ |
| 15573 | __ai uint32x4_t vmlsq_n_u32(uint32x4_t __p0, uint32x4_t __p1, uint32_t __p2) { | 15603 | __ai uint32x4_t vmlsq_n_u32(uint32x4_t __p0, uint32x4_t __p1, uint32_t __p2) { |
| 15574 | uint32x4_t __ret; | 15604 | uint32x4_t __ret; |
| ... | @@ -16608,215 +16638,215 @@ __ai poly8x16_t vmulq_p8(poly8x16_t __p0, poly8x16_t __p1) { | ... | @@ -16608,215 +16638,215 @@ __ai poly8x16_t vmulq_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| 16608 | #endif | 16638 | #endif |
| 16609 | | 16639 | |
| 16610 | #ifdef __LITTLE_ENDIAN__ | 16640 | #ifdef __LITTLE_ENDIAN__ |
| 16611 | #define vmulq_lane_u32(__p0_82, __p1_82, __p2_82) __extension__ ({ \ | 16641 | #define vmulq_lane_u32(__p0_86, __p1_86, __p2_86) __extension__ ({ \ |
| 16612 | uint32x4_t __ret_82; \ | 16642 | uint32x4_t __ret_86; \ |
| 16613 | uint32x4_t __s0_82 = __p0_82; \ | 16643 | uint32x4_t __s0_86 = __p0_86; \ |
| 16614 | uint32x2_t __s1_82 = __p1_82; \ | 16644 | uint32x2_t __s1_86 = __p1_86; \ |
| 16615 | __ret_82 = __s0_82 * splatq_lane_u32(__s1_82, __p2_82); \ | 16645 | __ret_86 = __s0_86 * splatq_lane_u32(__s1_86, __p2_86); \ |
| 16616 | __ret_82; \ | | |
| 16617 | }) | | |
| 16618 | #else | | |
| 16619 | #define vmulq_lane_u32(__p0_83, __p1_83, __p2_83) __extension__ ({ \ | | |
| 16620 | uint32x4_t __ret_83; \ | | |
| 16621 | uint32x4_t __s0_83 = __p0_83; \ | | |
| 16622 | uint32x2_t __s1_83 = __p1_83; \ | | |
| 16623 | uint32x4_t __rev0_83; __rev0_83 = __builtin_shufflevector(__s0_83, __s0_83, 3, 2, 1, 0); \ | | |
| 16624 | uint32x2_t __rev1_83; __rev1_83 = __builtin_shufflevector(__s1_83, __s1_83, 1, 0); \ | | |
| 16625 | __ret_83 = __rev0_83 * __noswap_splatq_lane_u32(__rev1_83, __p2_83); \ | | |
| 16626 | __ret_83 = __builtin_shufflevector(__ret_83, __ret_83, 3, 2, 1, 0); \ | | |
| 16627 | __ret_83; \ | | |
| 16628 | }) | | |
| 16629 | #endif | | |
| 16630 | | | |
| 16631 | #ifdef __LITTLE_ENDIAN__ | | |
| 16632 | #define vmulq_lane_u16(__p0_84, __p1_84, __p2_84) __extension__ ({ \ | | |
| 16633 | uint16x8_t __ret_84; \ | | |
| 16634 | uint16x8_t __s0_84 = __p0_84; \ | | |
| 16635 | uint16x4_t __s1_84 = __p1_84; \ | | |
| 16636 | __ret_84 = __s0_84 * splatq_lane_u16(__s1_84, __p2_84); \ | | |
| 16637 | __ret_84; \ | | |
| 16638 | }) | | |
| 16639 | #else | | |
| 16640 | #define vmulq_lane_u16(__p0_85, __p1_85, __p2_85) __extension__ ({ \ | | |
| 16641 | uint16x8_t __ret_85; \ | | |
| 16642 | uint16x8_t __s0_85 = __p0_85; \ | | |
| 16643 | uint16x4_t __s1_85 = __p1_85; \ | | |
| 16644 | uint16x8_t __rev0_85; __rev0_85 = __builtin_shufflevector(__s0_85, __s0_85, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 16645 | uint16x4_t __rev1_85; __rev1_85 = __builtin_shufflevector(__s1_85, __s1_85, 3, 2, 1, 0); \ | | |
| 16646 | __ret_85 = __rev0_85 * __noswap_splatq_lane_u16(__rev1_85, __p2_85); \ | | |
| 16647 | __ret_85 = __builtin_shufflevector(__ret_85, __ret_85, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 16648 | __ret_85; \ | | |
| 16649 | }) | | |
| 16650 | #endif | | |
| 16651 | | | |
| 16652 | #ifdef __LITTLE_ENDIAN__ | | |
| 16653 | #define vmulq_lane_f32(__p0_86, __p1_86, __p2_86) __extension__ ({ \ | | |
| 16654 | float32x4_t __ret_86; \ | | |
| 16655 | float32x4_t __s0_86 = __p0_86; \ | | |
| 16656 | float32x2_t __s1_86 = __p1_86; \ | | |
| 16657 | __ret_86 = __s0_86 * splatq_lane_f32(__s1_86, __p2_86); \ | | |
| 16658 | __ret_86; \ | 16646 | __ret_86; \ |
| 16659 | }) | 16647 | }) |
| 16660 | #else | 16648 | #else |
| 16661 | #define vmulq_lane_f32(__p0_87, __p1_87, __p2_87) __extension__ ({ \ | 16649 | #define vmulq_lane_u32(__p0_87, __p1_87, __p2_87) __extension__ ({ \ |
| 16662 | float32x4_t __ret_87; \ | 16650 | uint32x4_t __ret_87; \ |
| 16663 | float32x4_t __s0_87 = __p0_87; \ | 16651 | uint32x4_t __s0_87 = __p0_87; \ |
| 16664 | float32x2_t __s1_87 = __p1_87; \ | 16652 | uint32x2_t __s1_87 = __p1_87; \ |
| 16665 | float32x4_t __rev0_87; __rev0_87 = __builtin_shufflevector(__s0_87, __s0_87, 3, 2, 1, 0); \ | 16653 | uint32x4_t __rev0_87; __rev0_87 = __builtin_shufflevector(__s0_87, __s0_87, 3, 2, 1, 0); \ |
| 16666 | float32x2_t __rev1_87; __rev1_87 = __builtin_shufflevector(__s1_87, __s1_87, 1, 0); \ | 16654 | uint32x2_t __rev1_87; __rev1_87 = __builtin_shufflevector(__s1_87, __s1_87, 1, 0); \ |
| 16667 | __ret_87 = __rev0_87 * __noswap_splatq_lane_f32(__rev1_87, __p2_87); \ | 16655 | __ret_87 = __rev0_87 * __noswap_splatq_lane_u32(__rev1_87, __p2_87); \ |
| 16668 | __ret_87 = __builtin_shufflevector(__ret_87, __ret_87, 3, 2, 1, 0); \ | 16656 | __ret_87 = __builtin_shufflevector(__ret_87, __ret_87, 3, 2, 1, 0); \ |
| 16669 | __ret_87; \ | 16657 | __ret_87; \ |
| 16670 | }) | 16658 | }) |
| 16671 | #endif | 16659 | #endif |
| 16672 | | 16660 | |
| 16673 | #ifdef __LITTLE_ENDIAN__ | 16661 | #ifdef __LITTLE_ENDIAN__ |
| 16674 | #define vmulq_lane_s32(__p0_88, __p1_88, __p2_88) __extension__ ({ \ | 16662 | #define vmulq_lane_u16(__p0_88, __p1_88, __p2_88) __extension__ ({ \ |
| 16675 | int32x4_t __ret_88; \ | 16663 | uint16x8_t __ret_88; \ |
| 16676 | int32x4_t __s0_88 = __p0_88; \ | 16664 | uint16x8_t __s0_88 = __p0_88; \ |
| 16677 | int32x2_t __s1_88 = __p1_88; \ | 16665 | uint16x4_t __s1_88 = __p1_88; \ |
| 16678 | __ret_88 = __s0_88 * splatq_lane_s32(__s1_88, __p2_88); \ | 16666 | __ret_88 = __s0_88 * splatq_lane_u16(__s1_88, __p2_88); \ |
| 16679 | __ret_88; \ | 16667 | __ret_88; \ |
| 16680 | }) | 16668 | }) |
| 16681 | #else | 16669 | #else |
| 16682 | #define vmulq_lane_s32(__p0_89, __p1_89, __p2_89) __extension__ ({ \ | 16670 | #define vmulq_lane_u16(__p0_89, __p1_89, __p2_89) __extension__ ({ \ |
| 16683 | int32x4_t __ret_89; \ | 16671 | uint16x8_t __ret_89; \ |
| 16684 | int32x4_t __s0_89 = __p0_89; \ | 16672 | uint16x8_t __s0_89 = __p0_89; \ |
| 16685 | int32x2_t __s1_89 = __p1_89; \ | 16673 | uint16x4_t __s1_89 = __p1_89; \ |
| 16686 | int32x4_t __rev0_89; __rev0_89 = __builtin_shufflevector(__s0_89, __s0_89, 3, 2, 1, 0); \ | 16674 | uint16x8_t __rev0_89; __rev0_89 = __builtin_shufflevector(__s0_89, __s0_89, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 16687 | int32x2_t __rev1_89; __rev1_89 = __builtin_shufflevector(__s1_89, __s1_89, 1, 0); \ | 16675 | uint16x4_t __rev1_89; __rev1_89 = __builtin_shufflevector(__s1_89, __s1_89, 3, 2, 1, 0); \ |
| 16688 | __ret_89 = __rev0_89 * __noswap_splatq_lane_s32(__rev1_89, __p2_89); \ | 16676 | __ret_89 = __rev0_89 * __noswap_splatq_lane_u16(__rev1_89, __p2_89); \ |
| 16689 | __ret_89 = __builtin_shufflevector(__ret_89, __ret_89, 3, 2, 1, 0); \ | 16677 | __ret_89 = __builtin_shufflevector(__ret_89, __ret_89, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 16690 | __ret_89; \ | 16678 | __ret_89; \ |
| 16691 | }) | 16679 | }) |
| 16692 | #endif | 16680 | #endif |
| 16693 | | 16681 | |
| 16694 | #ifdef __LITTLE_ENDIAN__ | 16682 | #ifdef __LITTLE_ENDIAN__ |
| 16695 | #define vmulq_lane_s16(__p0_90, __p1_90, __p2_90) __extension__ ({ \ | 16683 | #define vmulq_lane_f32(__p0_90, __p1_90, __p2_90) __extension__ ({ \ |
| 16696 | int16x8_t __ret_90; \ | 16684 | float32x4_t __ret_90; \ |
| 16697 | int16x8_t __s0_90 = __p0_90; \ | 16685 | float32x4_t __s0_90 = __p0_90; \ |
| 16698 | int16x4_t __s1_90 = __p1_90; \ | 16686 | float32x2_t __s1_90 = __p1_90; \ |
| 16699 | __ret_90 = __s0_90 * splatq_lane_s16(__s1_90, __p2_90); \ | 16687 | __ret_90 = __s0_90 * splatq_lane_f32(__s1_90, __p2_90); \ |
| 16700 | __ret_90; \ | 16688 | __ret_90; \ |
| 16701 | }) | 16689 | }) |
| 16702 | #else | 16690 | #else |
| 16703 | #define vmulq_lane_s16(__p0_91, __p1_91, __p2_91) __extension__ ({ \ | 16691 | #define vmulq_lane_f32(__p0_91, __p1_91, __p2_91) __extension__ ({ \ |
| 16704 | int16x8_t __ret_91; \ | 16692 | float32x4_t __ret_91; \ |
| 16705 | int16x8_t __s0_91 = __p0_91; \ | 16693 | float32x4_t __s0_91 = __p0_91; \ |
| 16706 | int16x4_t __s1_91 = __p1_91; \ | 16694 | float32x2_t __s1_91 = __p1_91; \ |
| 16707 | int16x8_t __rev0_91; __rev0_91 = __builtin_shufflevector(__s0_91, __s0_91, 7, 6, 5, 4, 3, 2, 1, 0); \ | 16695 | float32x4_t __rev0_91; __rev0_91 = __builtin_shufflevector(__s0_91, __s0_91, 3, 2, 1, 0); \ |
| 16708 | int16x4_t __rev1_91; __rev1_91 = __builtin_shufflevector(__s1_91, __s1_91, 3, 2, 1, 0); \ | 16696 | float32x2_t __rev1_91; __rev1_91 = __builtin_shufflevector(__s1_91, __s1_91, 1, 0); \ |
| 16709 | __ret_91 = __rev0_91 * __noswap_splatq_lane_s16(__rev1_91, __p2_91); \ | 16697 | __ret_91 = __rev0_91 * __noswap_splatq_lane_f32(__rev1_91, __p2_91); \ |
| 16710 | __ret_91 = __builtin_shufflevector(__ret_91, __ret_91, 7, 6, 5, 4, 3, 2, 1, 0); \ | 16698 | __ret_91 = __builtin_shufflevector(__ret_91, __ret_91, 3, 2, 1, 0); \ |
| 16711 | __ret_91; \ | 16699 | __ret_91; \ |
| 16712 | }) | 16700 | }) |
| 16713 | #endif | 16701 | #endif |
| 16714 | | 16702 | |
| 16715 | #ifdef __LITTLE_ENDIAN__ | 16703 | #ifdef __LITTLE_ENDIAN__ |
| 16716 | #define vmul_lane_u32(__p0_92, __p1_92, __p2_92) __extension__ ({ \ | 16704 | #define vmulq_lane_s32(__p0_92, __p1_92, __p2_92) __extension__ ({ \ |
| 16717 | uint32x2_t __ret_92; \ | 16705 | int32x4_t __ret_92; \ |
| 16718 | uint32x2_t __s0_92 = __p0_92; \ | 16706 | int32x4_t __s0_92 = __p0_92; \ |
| 16719 | uint32x2_t __s1_92 = __p1_92; \ | 16707 | int32x2_t __s1_92 = __p1_92; \ |
| 16720 | __ret_92 = __s0_92 * splat_lane_u32(__s1_92, __p2_92); \ | 16708 | __ret_92 = __s0_92 * splatq_lane_s32(__s1_92, __p2_92); \ |
| 16721 | __ret_92; \ | 16709 | __ret_92; \ |
| 16722 | }) | 16710 | }) |
| 16723 | #else | 16711 | #else |
| 16724 | #define vmul_lane_u32(__p0_93, __p1_93, __p2_93) __extension__ ({ \ | 16712 | #define vmulq_lane_s32(__p0_93, __p1_93, __p2_93) __extension__ ({ \ |
| 16725 | uint32x2_t __ret_93; \ | 16713 | int32x4_t __ret_93; \ |
| 16726 | uint32x2_t __s0_93 = __p0_93; \ | 16714 | int32x4_t __s0_93 = __p0_93; \ |
| 16727 | uint32x2_t __s1_93 = __p1_93; \ | 16715 | int32x2_t __s1_93 = __p1_93; \ |
| 16728 | uint32x2_t __rev0_93; __rev0_93 = __builtin_shufflevector(__s0_93, __s0_93, 1, 0); \ | 16716 | int32x4_t __rev0_93; __rev0_93 = __builtin_shufflevector(__s0_93, __s0_93, 3, 2, 1, 0); \ |
| 16729 | uint32x2_t __rev1_93; __rev1_93 = __builtin_shufflevector(__s1_93, __s1_93, 1, 0); \ | 16717 | int32x2_t __rev1_93; __rev1_93 = __builtin_shufflevector(__s1_93, __s1_93, 1, 0); \ |
| 16730 | __ret_93 = __rev0_93 * __noswap_splat_lane_u32(__rev1_93, __p2_93); \ | 16718 | __ret_93 = __rev0_93 * __noswap_splatq_lane_s32(__rev1_93, __p2_93); \ |
| 16731 | __ret_93 = __builtin_shufflevector(__ret_93, __ret_93, 1, 0); \ | 16719 | __ret_93 = __builtin_shufflevector(__ret_93, __ret_93, 3, 2, 1, 0); \ |
| 16732 | __ret_93; \ | 16720 | __ret_93; \ |
| 16733 | }) | 16721 | }) |
| 16734 | #endif | 16722 | #endif |
| 16735 | | 16723 | |
| 16736 | #ifdef __LITTLE_ENDIAN__ | 16724 | #ifdef __LITTLE_ENDIAN__ |
| 16737 | #define vmul_lane_u16(__p0_94, __p1_94, __p2_94) __extension__ ({ \ | 16725 | #define vmulq_lane_s16(__p0_94, __p1_94, __p2_94) __extension__ ({ \ |
| 16738 | uint16x4_t __ret_94; \ | 16726 | int16x8_t __ret_94; \ |
| 16739 | uint16x4_t __s0_94 = __p0_94; \ | 16727 | int16x8_t __s0_94 = __p0_94; \ |
| 16740 | uint16x4_t __s1_94 = __p1_94; \ | 16728 | int16x4_t __s1_94 = __p1_94; \ |
| 16741 | __ret_94 = __s0_94 * splat_lane_u16(__s1_94, __p2_94); \ | 16729 | __ret_94 = __s0_94 * splatq_lane_s16(__s1_94, __p2_94); \ |
| 16742 | __ret_94; \ | 16730 | __ret_94; \ |
| 16743 | }) | 16731 | }) |
| 16744 | #else | 16732 | #else |
| 16745 | #define vmul_lane_u16(__p0_95, __p1_95, __p2_95) __extension__ ({ \ | 16733 | #define vmulq_lane_s16(__p0_95, __p1_95, __p2_95) __extension__ ({ \ |
| 16746 | uint16x4_t __ret_95; \ | 16734 | int16x8_t __ret_95; \ |
| 16747 | uint16x4_t __s0_95 = __p0_95; \ | 16735 | int16x8_t __s0_95 = __p0_95; \ |
| 16748 | uint16x4_t __s1_95 = __p1_95; \ | 16736 | int16x4_t __s1_95 = __p1_95; \ |
| 16749 | uint16x4_t __rev0_95; __rev0_95 = __builtin_shufflevector(__s0_95, __s0_95, 3, 2, 1, 0); \ | 16737 | int16x8_t __rev0_95; __rev0_95 = __builtin_shufflevector(__s0_95, __s0_95, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 16750 | uint16x4_t __rev1_95; __rev1_95 = __builtin_shufflevector(__s1_95, __s1_95, 3, 2, 1, 0); \ | 16738 | int16x4_t __rev1_95; __rev1_95 = __builtin_shufflevector(__s1_95, __s1_95, 3, 2, 1, 0); \ |
| 16751 | __ret_95 = __rev0_95 * __noswap_splat_lane_u16(__rev1_95, __p2_95); \ | 16739 | __ret_95 = __rev0_95 * __noswap_splatq_lane_s16(__rev1_95, __p2_95); \ |
| 16752 | __ret_95 = __builtin_shufflevector(__ret_95, __ret_95, 3, 2, 1, 0); \ | 16740 | __ret_95 = __builtin_shufflevector(__ret_95, __ret_95, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 16753 | __ret_95; \ | 16741 | __ret_95; \ |
| 16754 | }) | 16742 | }) |
| 16755 | #endif | 16743 | #endif |
| 16756 | | 16744 | |
| 16757 | #ifdef __LITTLE_ENDIAN__ | 16745 | #ifdef __LITTLE_ENDIAN__ |
| 16758 | #define vmul_lane_f32(__p0_96, __p1_96, __p2_96) __extension__ ({ \ | 16746 | #define vmul_lane_u32(__p0_96, __p1_96, __p2_96) __extension__ ({ \ |
| 16759 | float32x2_t __ret_96; \ | 16747 | uint32x2_t __ret_96; \ |
| 16760 | float32x2_t __s0_96 = __p0_96; \ | 16748 | uint32x2_t __s0_96 = __p0_96; \ |
| 16761 | float32x2_t __s1_96 = __p1_96; \ | 16749 | uint32x2_t __s1_96 = __p1_96; \ |
| 16762 | __ret_96 = __s0_96 * splat_lane_f32(__s1_96, __p2_96); \ | 16750 | __ret_96 = __s0_96 * splat_lane_u32(__s1_96, __p2_96); \ |
| 16763 | __ret_96; \ | 16751 | __ret_96; \ |
| 16764 | }) | 16752 | }) |
| 16765 | #else | 16753 | #else |
| 16766 | #define vmul_lane_f32(__p0_97, __p1_97, __p2_97) __extension__ ({ \ | 16754 | #define vmul_lane_u32(__p0_97, __p1_97, __p2_97) __extension__ ({ \ |
| 16767 | float32x2_t __ret_97; \ | 16755 | uint32x2_t __ret_97; \ |
| 16768 | float32x2_t __s0_97 = __p0_97; \ | 16756 | uint32x2_t __s0_97 = __p0_97; \ |
| 16769 | float32x2_t __s1_97 = __p1_97; \ | 16757 | uint32x2_t __s1_97 = __p1_97; \ |
| 16770 | float32x2_t __rev0_97; __rev0_97 = __builtin_shufflevector(__s0_97, __s0_97, 1, 0); \ | 16758 | uint32x2_t __rev0_97; __rev0_97 = __builtin_shufflevector(__s0_97, __s0_97, 1, 0); \ |
| 16771 | float32x2_t __rev1_97; __rev1_97 = __builtin_shufflevector(__s1_97, __s1_97, 1, 0); \ | 16759 | uint32x2_t __rev1_97; __rev1_97 = __builtin_shufflevector(__s1_97, __s1_97, 1, 0); \ |
| 16772 | __ret_97 = __rev0_97 * __noswap_splat_lane_f32(__rev1_97, __p2_97); \ | 16760 | __ret_97 = __rev0_97 * __noswap_splat_lane_u32(__rev1_97, __p2_97); \ |
| 16773 | __ret_97 = __builtin_shufflevector(__ret_97, __ret_97, 1, 0); \ | 16761 | __ret_97 = __builtin_shufflevector(__ret_97, __ret_97, 1, 0); \ |
| 16774 | __ret_97; \ | 16762 | __ret_97; \ |
| 16775 | }) | 16763 | }) |
| 16776 | #endif | 16764 | #endif |
| 16777 | | 16765 | |
| 16778 | #ifdef __LITTLE_ENDIAN__ | 16766 | #ifdef __LITTLE_ENDIAN__ |
| 16779 | #define vmul_lane_s32(__p0_98, __p1_98, __p2_98) __extension__ ({ \ | 16767 | #define vmul_lane_u16(__p0_98, __p1_98, __p2_98) __extension__ ({ \ |
| 16780 | int32x2_t __ret_98; \ | 16768 | uint16x4_t __ret_98; \ |
| 16781 | int32x2_t __s0_98 = __p0_98; \ | 16769 | uint16x4_t __s0_98 = __p0_98; \ |
| 16782 | int32x2_t __s1_98 = __p1_98; \ | 16770 | uint16x4_t __s1_98 = __p1_98; \ |
| 16783 | __ret_98 = __s0_98 * splat_lane_s32(__s1_98, __p2_98); \ | 16771 | __ret_98 = __s0_98 * splat_lane_u16(__s1_98, __p2_98); \ |
| 16784 | __ret_98; \ | 16772 | __ret_98; \ |
| 16785 | }) | 16773 | }) |
| 16786 | #else | 16774 | #else |
| 16787 | #define vmul_lane_s32(__p0_99, __p1_99, __p2_99) __extension__ ({ \ | 16775 | #define vmul_lane_u16(__p0_99, __p1_99, __p2_99) __extension__ ({ \ |
| 16788 | int32x2_t __ret_99; \ | 16776 | uint16x4_t __ret_99; \ |
| 16789 | int32x2_t __s0_99 = __p0_99; \ | 16777 | uint16x4_t __s0_99 = __p0_99; \ |
| 16790 | int32x2_t __s1_99 = __p1_99; \ | 16778 | uint16x4_t __s1_99 = __p1_99; \ |
| 16791 | int32x2_t __rev0_99; __rev0_99 = __builtin_shufflevector(__s0_99, __s0_99, 1, 0); \ | 16779 | uint16x4_t __rev0_99; __rev0_99 = __builtin_shufflevector(__s0_99, __s0_99, 3, 2, 1, 0); \ |
| 16792 | int32x2_t __rev1_99; __rev1_99 = __builtin_shufflevector(__s1_99, __s1_99, 1, 0); \ | 16780 | uint16x4_t __rev1_99; __rev1_99 = __builtin_shufflevector(__s1_99, __s1_99, 3, 2, 1, 0); \ |
| 16793 | __ret_99 = __rev0_99 * __noswap_splat_lane_s32(__rev1_99, __p2_99); \ | 16781 | __ret_99 = __rev0_99 * __noswap_splat_lane_u16(__rev1_99, __p2_99); \ |
| 16794 | __ret_99 = __builtin_shufflevector(__ret_99, __ret_99, 1, 0); \ | 16782 | __ret_99 = __builtin_shufflevector(__ret_99, __ret_99, 3, 2, 1, 0); \ |
| 16795 | __ret_99; \ | 16783 | __ret_99; \ |
| 16796 | }) | 16784 | }) |
| 16797 | #endif | 16785 | #endif |
| 16798 | | 16786 | |
| 16799 | #ifdef __LITTLE_ENDIAN__ | 16787 | #ifdef __LITTLE_ENDIAN__ |
| 16800 | #define vmul_lane_s16(__p0_100, __p1_100, __p2_100) __extension__ ({ \ | 16788 | #define vmul_lane_f32(__p0_100, __p1_100, __p2_100) __extension__ ({ \ |
| 16801 | int16x4_t __ret_100; \ | 16789 | float32x2_t __ret_100; \ |
| 16802 | int16x4_t __s0_100 = __p0_100; \ | 16790 | float32x2_t __s0_100 = __p0_100; \ |
| 16803 | int16x4_t __s1_100 = __p1_100; \ | 16791 | float32x2_t __s1_100 = __p1_100; \ |
| 16804 | __ret_100 = __s0_100 * splat_lane_s16(__s1_100, __p2_100); \ | 16792 | __ret_100 = __s0_100 * splat_lane_f32(__s1_100, __p2_100); \ |
| 16805 | __ret_100; \ | 16793 | __ret_100; \ |
| 16806 | }) | 16794 | }) |
| 16807 | #else | 16795 | #else |
| 16808 | #define vmul_lane_s16(__p0_101, __p1_101, __p2_101) __extension__ ({ \ | 16796 | #define vmul_lane_f32(__p0_101, __p1_101, __p2_101) __extension__ ({ \ |
| 16809 | int16x4_t __ret_101; \ | 16797 | float32x2_t __ret_101; \ |
| 16810 | int16x4_t __s0_101 = __p0_101; \ | 16798 | float32x2_t __s0_101 = __p0_101; \ |
| 16811 | int16x4_t __s1_101 = __p1_101; \ | 16799 | float32x2_t __s1_101 = __p1_101; \ |
| 16812 | int16x4_t __rev0_101; __rev0_101 = __builtin_shufflevector(__s0_101, __s0_101, 3, 2, 1, 0); \ | 16800 | float32x2_t __rev0_101; __rev0_101 = __builtin_shufflevector(__s0_101, __s0_101, 1, 0); \ |
| 16813 | int16x4_t __rev1_101; __rev1_101 = __builtin_shufflevector(__s1_101, __s1_101, 3, 2, 1, 0); \ | 16801 | float32x2_t __rev1_101; __rev1_101 = __builtin_shufflevector(__s1_101, __s1_101, 1, 0); \ |
| 16814 | __ret_101 = __rev0_101 * __noswap_splat_lane_s16(__rev1_101, __p2_101); \ | 16802 | __ret_101 = __rev0_101 * __noswap_splat_lane_f32(__rev1_101, __p2_101); \ |
| 16815 | __ret_101 = __builtin_shufflevector(__ret_101, __ret_101, 3, 2, 1, 0); \ | 16803 | __ret_101 = __builtin_shufflevector(__ret_101, __ret_101, 1, 0); \ |
| 16816 | __ret_101; \ | 16804 | __ret_101; \ |
| 16817 | }) | 16805 | }) |
| 16818 | #endif | 16806 | #endif |
| 16819 | | 16807 | |
| | 16808 | #ifdef __LITTLE_ENDIAN__ |
| | 16809 | #define vmul_lane_s32(__p0_102, __p1_102, __p2_102) __extension__ ({ \ |
| | 16810 | int32x2_t __ret_102; \ |
| | 16811 | int32x2_t __s0_102 = __p0_102; \ |
| | 16812 | int32x2_t __s1_102 = __p1_102; \ |
| | 16813 | __ret_102 = __s0_102 * splat_lane_s32(__s1_102, __p2_102); \ |
| | 16814 | __ret_102; \ |
| | 16815 | }) |
| | 16816 | #else |
| | 16817 | #define vmul_lane_s32(__p0_103, __p1_103, __p2_103) __extension__ ({ \ |
| | 16818 | int32x2_t __ret_103; \ |
| | 16819 | int32x2_t __s0_103 = __p0_103; \ |
| | 16820 | int32x2_t __s1_103 = __p1_103; \ |
| | 16821 | int32x2_t __rev0_103; __rev0_103 = __builtin_shufflevector(__s0_103, __s0_103, 1, 0); \ |
| | 16822 | int32x2_t __rev1_103; __rev1_103 = __builtin_shufflevector(__s1_103, __s1_103, 1, 0); \ |
| | 16823 | __ret_103 = __rev0_103 * __noswap_splat_lane_s32(__rev1_103, __p2_103); \ |
| | 16824 | __ret_103 = __builtin_shufflevector(__ret_103, __ret_103, 1, 0); \ |
| | 16825 | __ret_103; \ |
| | 16826 | }) |
| | 16827 | #endif |
| | 16828 | |
| | 16829 | #ifdef __LITTLE_ENDIAN__ |
| | 16830 | #define vmul_lane_s16(__p0_104, __p1_104, __p2_104) __extension__ ({ \ |
| | 16831 | int16x4_t __ret_104; \ |
| | 16832 | int16x4_t __s0_104 = __p0_104; \ |
| | 16833 | int16x4_t __s1_104 = __p1_104; \ |
| | 16834 | __ret_104 = __s0_104 * splat_lane_s16(__s1_104, __p2_104); \ |
| | 16835 | __ret_104; \ |
| | 16836 | }) |
| | 16837 | #else |
| | 16838 | #define vmul_lane_s16(__p0_105, __p1_105, __p2_105) __extension__ ({ \ |
| | 16839 | int16x4_t __ret_105; \ |
| | 16840 | int16x4_t __s0_105 = __p0_105; \ |
| | 16841 | int16x4_t __s1_105 = __p1_105; \ |
| | 16842 | int16x4_t __rev0_105; __rev0_105 = __builtin_shufflevector(__s0_105, __s0_105, 3, 2, 1, 0); \ |
| | 16843 | int16x4_t __rev1_105; __rev1_105 = __builtin_shufflevector(__s1_105, __s1_105, 3, 2, 1, 0); \ |
| | 16844 | __ret_105 = __rev0_105 * __noswap_splat_lane_s16(__rev1_105, __p2_105); \ |
| | 16845 | __ret_105 = __builtin_shufflevector(__ret_105, __ret_105, 3, 2, 1, 0); \ |
| | 16846 | __ret_105; \ |
| | 16847 | }) |
| | 16848 | #endif |
| | 16849 | |
| 16820 | #ifdef __LITTLE_ENDIAN__ | 16850 | #ifdef __LITTLE_ENDIAN__ |
| 16821 | __ai uint32x4_t vmulq_n_u32(uint32x4_t __p0, uint32_t __p1) { | 16851 | __ai uint32x4_t vmulq_n_u32(uint32x4_t __p0, uint32_t __p1) { |
| 16822 | uint32x4_t __ret; | 16852 | uint32x4_t __ret; |
| ... | @@ -17132,86 +17162,86 @@ __ai int32x4_t __noswap_vmull_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -17132,86 +17162,86 @@ __ai int32x4_t __noswap_vmull_s16(int16x4_t __p0, int16x4_t __p1) { |
| 17132 | #endif | 17162 | #endif |
| 17133 | | 17163 | |
| 17134 | #ifdef __LITTLE_ENDIAN__ | 17164 | #ifdef __LITTLE_ENDIAN__ |
| 17135 | #define vmull_lane_u32(__p0_102, __p1_102, __p2_102) __extension__ ({ \ | 17165 | #define vmull_lane_u32(__p0_106, __p1_106, __p2_106) __extension__ ({ \ |
| 17136 | uint64x2_t __ret_102; \ | 17166 | uint64x2_t __ret_106; \ |
| 17137 | uint32x2_t __s0_102 = __p0_102; \ | 17167 | uint32x2_t __s0_106 = __p0_106; \ |
| 17138 | uint32x2_t __s1_102 = __p1_102; \ | 17168 | uint32x2_t __s1_106 = __p1_106; \ |
| 17139 | __ret_102 = vmull_u32(__s0_102, splat_lane_u32(__s1_102, __p2_102)); \ | 17169 | __ret_106 = vmull_u32(__s0_106, splat_lane_u32(__s1_106, __p2_106)); \ |
| 17140 | __ret_102; \ | 17170 | __ret_106; \ |
| 17141 | }) | 17171 | }) |
| 17142 | #else | 17172 | #else |
| 17143 | #define vmull_lane_u32(__p0_103, __p1_103, __p2_103) __extension__ ({ \ | 17173 | #define vmull_lane_u32(__p0_107, __p1_107, __p2_107) __extension__ ({ \ |
| 17144 | uint64x2_t __ret_103; \ | 17174 | uint64x2_t __ret_107; \ |
| 17145 | uint32x2_t __s0_103 = __p0_103; \ | 17175 | uint32x2_t __s0_107 = __p0_107; \ |
| 17146 | uint32x2_t __s1_103 = __p1_103; \ | 17176 | uint32x2_t __s1_107 = __p1_107; \ |
| 17147 | uint32x2_t __rev0_103; __rev0_103 = __builtin_shufflevector(__s0_103, __s0_103, 1, 0); \ | 17177 | uint32x2_t __rev0_107; __rev0_107 = __builtin_shufflevector(__s0_107, __s0_107, 1, 0); \ |
| 17148 | uint32x2_t __rev1_103; __rev1_103 = __builtin_shufflevector(__s1_103, __s1_103, 1, 0); \ | 17178 | uint32x2_t __rev1_107; __rev1_107 = __builtin_shufflevector(__s1_107, __s1_107, 1, 0); \ |
| 17149 | __ret_103 = __noswap_vmull_u32(__rev0_103, __noswap_splat_lane_u32(__rev1_103, __p2_103)); \ | 17179 | __ret_107 = __noswap_vmull_u32(__rev0_107, __noswap_splat_lane_u32(__rev1_107, __p2_107)); \ |
| 17150 | __ret_103 = __builtin_shufflevector(__ret_103, __ret_103, 1, 0); \ | 17180 | __ret_107 = __builtin_shufflevector(__ret_107, __ret_107, 1, 0); \ |
| 17151 | __ret_103; \ | 17181 | __ret_107; \ |
| 17152 | }) | 17182 | }) |
| 17153 | #endif | 17183 | #endif |
| 17154 | | 17184 | |
| 17155 | #ifdef __LITTLE_ENDIAN__ | 17185 | #ifdef __LITTLE_ENDIAN__ |
| 17156 | #define vmull_lane_u16(__p0_104, __p1_104, __p2_104) __extension__ ({ \ | 17186 | #define vmull_lane_u16(__p0_108, __p1_108, __p2_108) __extension__ ({ \ |
| 17157 | uint32x4_t __ret_104; \ | 17187 | uint32x4_t __ret_108; \ |
| 17158 | uint16x4_t __s0_104 = __p0_104; \ | 17188 | uint16x4_t __s0_108 = __p0_108; \ |
| 17159 | uint16x4_t __s1_104 = __p1_104; \ | 17189 | uint16x4_t __s1_108 = __p1_108; \ |
| 17160 | __ret_104 = vmull_u16(__s0_104, splat_lane_u16(__s1_104, __p2_104)); \ | 17190 | __ret_108 = vmull_u16(__s0_108, splat_lane_u16(__s1_108, __p2_108)); \ |
| 17161 | __ret_104; \ | 17191 | __ret_108; \ |
| 17162 | }) | 17192 | }) |
| 17163 | #else | 17193 | #else |
| 17164 | #define vmull_lane_u16(__p0_105, __p1_105, __p2_105) __extension__ ({ \ | 17194 | #define vmull_lane_u16(__p0_109, __p1_109, __p2_109) __extension__ ({ \ |
| 17165 | uint32x4_t __ret_105; \ | 17195 | uint32x4_t __ret_109; \ |
| 17166 | uint16x4_t __s0_105 = __p0_105; \ | 17196 | uint16x4_t __s0_109 = __p0_109; \ |
| 17167 | uint16x4_t __s1_105 = __p1_105; \ | 17197 | uint16x4_t __s1_109 = __p1_109; \ |
| 17168 | uint16x4_t __rev0_105; __rev0_105 = __builtin_shufflevector(__s0_105, __s0_105, 3, 2, 1, 0); \ | 17198 | uint16x4_t __rev0_109; __rev0_109 = __builtin_shufflevector(__s0_109, __s0_109, 3, 2, 1, 0); \ |
| 17169 | uint16x4_t __rev1_105; __rev1_105 = __builtin_shufflevector(__s1_105, __s1_105, 3, 2, 1, 0); \ | 17199 | uint16x4_t __rev1_109; __rev1_109 = __builtin_shufflevector(__s1_109, __s1_109, 3, 2, 1, 0); \ |
| 17170 | __ret_105 = __noswap_vmull_u16(__rev0_105, __noswap_splat_lane_u16(__rev1_105, __p2_105)); \ | 17200 | __ret_109 = __noswap_vmull_u16(__rev0_109, __noswap_splat_lane_u16(__rev1_109, __p2_109)); \ |
| 17171 | __ret_105 = __builtin_shufflevector(__ret_105, __ret_105, 3, 2, 1, 0); \ | 17201 | __ret_109 = __builtin_shufflevector(__ret_109, __ret_109, 3, 2, 1, 0); \ |
| 17172 | __ret_105; \ | 17202 | __ret_109; \ |
| 17173 | }) | 17203 | }) |
| 17174 | #endif | 17204 | #endif |
| 17175 | | 17205 | |
| 17176 | #ifdef __LITTLE_ENDIAN__ | 17206 | #ifdef __LITTLE_ENDIAN__ |
| 17177 | #define vmull_lane_s32(__p0_106, __p1_106, __p2_106) __extension__ ({ \ | 17207 | #define vmull_lane_s32(__p0_110, __p1_110, __p2_110) __extension__ ({ \ |
| 17178 | int64x2_t __ret_106; \ | 17208 | int64x2_t __ret_110; \ |
| 17179 | int32x2_t __s0_106 = __p0_106; \ | 17209 | int32x2_t __s0_110 = __p0_110; \ |
| 17180 | int32x2_t __s1_106 = __p1_106; \ | 17210 | int32x2_t __s1_110 = __p1_110; \ |
| 17181 | __ret_106 = vmull_s32(__s0_106, splat_lane_s32(__s1_106, __p2_106)); \ | 17211 | __ret_110 = vmull_s32(__s0_110, splat_lane_s32(__s1_110, __p2_110)); \ |
| 17182 | __ret_106; \ | 17212 | __ret_110; \ |
| 17183 | }) | 17213 | }) |
| 17184 | #else | 17214 | #else |
| 17185 | #define vmull_lane_s32(__p0_107, __p1_107, __p2_107) __extension__ ({ \ | 17215 | #define vmull_lane_s32(__p0_111, __p1_111, __p2_111) __extension__ ({ \ |
| 17186 | int64x2_t __ret_107; \ | 17216 | int64x2_t __ret_111; \ |
| 17187 | int32x2_t __s0_107 = __p0_107; \ | 17217 | int32x2_t __s0_111 = __p0_111; \ |
| 17188 | int32x2_t __s1_107 = __p1_107; \ | 17218 | int32x2_t __s1_111 = __p1_111; \ |
| 17189 | int32x2_t __rev0_107; __rev0_107 = __builtin_shufflevector(__s0_107, __s0_107, 1, 0); \ | 17219 | int32x2_t __rev0_111; __rev0_111 = __builtin_shufflevector(__s0_111, __s0_111, 1, 0); \ |
| 17190 | int32x2_t __rev1_107; __rev1_107 = __builtin_shufflevector(__s1_107, __s1_107, 1, 0); \ | 17220 | int32x2_t __rev1_111; __rev1_111 = __builtin_shufflevector(__s1_111, __s1_111, 1, 0); \ |
| 17191 | __ret_107 = __noswap_vmull_s32(__rev0_107, __noswap_splat_lane_s32(__rev1_107, __p2_107)); \ | 17221 | __ret_111 = __noswap_vmull_s32(__rev0_111, __noswap_splat_lane_s32(__rev1_111, __p2_111)); \ |
| 17192 | __ret_107 = __builtin_shufflevector(__ret_107, __ret_107, 1, 0); \ | 17222 | __ret_111 = __builtin_shufflevector(__ret_111, __ret_111, 1, 0); \ |
| 17193 | __ret_107; \ | 17223 | __ret_111; \ |
| 17194 | }) | 17224 | }) |
| 17195 | #endif | 17225 | #endif |
| 17196 | | 17226 | |
| 17197 | #ifdef __LITTLE_ENDIAN__ | 17227 | #ifdef __LITTLE_ENDIAN__ |
| 17198 | #define vmull_lane_s16(__p0_108, __p1_108, __p2_108) __extension__ ({ \ | 17228 | #define vmull_lane_s16(__p0_112, __p1_112, __p2_112) __extension__ ({ \ |
| 17199 | int32x4_t __ret_108; \ | 17229 | int32x4_t __ret_112; \ |
| 17200 | int16x4_t __s0_108 = __p0_108; \ | 17230 | int16x4_t __s0_112 = __p0_112; \ |
| 17201 | int16x4_t __s1_108 = __p1_108; \ | 17231 | int16x4_t __s1_112 = __p1_112; \ |
| 17202 | __ret_108 = vmull_s16(__s0_108, splat_lane_s16(__s1_108, __p2_108)); \ | 17232 | __ret_112 = vmull_s16(__s0_112, splat_lane_s16(__s1_112, __p2_112)); \ |
| 17203 | __ret_108; \ | 17233 | __ret_112; \ |
| 17204 | }) | 17234 | }) |
| 17205 | #else | 17235 | #else |
| 17206 | #define vmull_lane_s16(__p0_109, __p1_109, __p2_109) __extension__ ({ \ | 17236 | #define vmull_lane_s16(__p0_113, __p1_113, __p2_113) __extension__ ({ \ |
| 17207 | int32x4_t __ret_109; \ | 17237 | int32x4_t __ret_113; \ |
| 17208 | int16x4_t __s0_109 = __p0_109; \ | 17238 | int16x4_t __s0_113 = __p0_113; \ |
| 17209 | int16x4_t __s1_109 = __p1_109; \ | 17239 | int16x4_t __s1_113 = __p1_113; \ |
| 17210 | int16x4_t __rev0_109; __rev0_109 = __builtin_shufflevector(__s0_109, __s0_109, 3, 2, 1, 0); \ | 17240 | int16x4_t __rev0_113; __rev0_113 = __builtin_shufflevector(__s0_113, __s0_113, 3, 2, 1, 0); \ |
| 17211 | int16x4_t __rev1_109; __rev1_109 = __builtin_shufflevector(__s1_109, __s1_109, 3, 2, 1, 0); \ | 17241 | int16x4_t __rev1_113; __rev1_113 = __builtin_shufflevector(__s1_113, __s1_113, 3, 2, 1, 0); \ |
| 17212 | __ret_109 = __noswap_vmull_s16(__rev0_109, __noswap_splat_lane_s16(__rev1_109, __p2_109)); \ | 17242 | __ret_113 = __noswap_vmull_s16(__rev0_113, __noswap_splat_lane_s16(__rev1_113, __p2_113)); \ |
| 17213 | __ret_109 = __builtin_shufflevector(__ret_109, __ret_109, 3, 2, 1, 0); \ | 17243 | __ret_113 = __builtin_shufflevector(__ret_113, __ret_113, 3, 2, 1, 0); \ |
| 17214 | __ret_109; \ | 17244 | __ret_113; \ |
| 17215 | }) | 17245 | }) |
| 17216 | #endif | 17246 | #endif |
| 17217 | | 17247 | |
| ... | @@ -19285,50 +19315,50 @@ __ai int32x4_t __noswap_vqdmlal_s16(int32x4_t __p0, int16x4_t __p1, int16x4_t __ | ... | @@ -19285,50 +19315,50 @@ __ai int32x4_t __noswap_vqdmlal_s16(int32x4_t __p0, int16x4_t __p1, int16x4_t __ |
| 19285 | #endif | 19315 | #endif |
| 19286 | | 19316 | |
| 19287 | #ifdef __LITTLE_ENDIAN__ | 19317 | #ifdef __LITTLE_ENDIAN__ |
| 19288 | #define vqdmlal_lane_s32(__p0_110, __p1_110, __p2_110, __p3_110) __extension__ ({ \ | 19318 | #define vqdmlal_lane_s32(__p0_114, __p1_114, __p2_114, __p3_114) __extension__ ({ \ |
| 19289 | int64x2_t __ret_110; \ | 19319 | int64x2_t __ret_114; \ |
| 19290 | int64x2_t __s0_110 = __p0_110; \ | 19320 | int64x2_t __s0_114 = __p0_114; \ |
| 19291 | int32x2_t __s1_110 = __p1_110; \ | 19321 | int32x2_t __s1_114 = __p1_114; \ |
| 19292 | int32x2_t __s2_110 = __p2_110; \ | 19322 | int32x2_t __s2_114 = __p2_114; \ |
| 19293 | __ret_110 = vqdmlal_s32(__s0_110, __s1_110, splat_lane_s32(__s2_110, __p3_110)); \ | 19323 | __ret_114 = vqdmlal_s32(__s0_114, __s1_114, splat_lane_s32(__s2_114, __p3_114)); \ |
| 19294 | __ret_110; \ | 19324 | __ret_114; \ |
| 19295 | }) | 19325 | }) |
| 19296 | #else | 19326 | #else |
| 19297 | #define vqdmlal_lane_s32(__p0_111, __p1_111, __p2_111, __p3_111) __extension__ ({ \ | 19327 | #define vqdmlal_lane_s32(__p0_115, __p1_115, __p2_115, __p3_115) __extension__ ({ \ |
| 19298 | int64x2_t __ret_111; \ | 19328 | int64x2_t __ret_115; \ |
| 19299 | int64x2_t __s0_111 = __p0_111; \ | 19329 | int64x2_t __s0_115 = __p0_115; \ |
| 19300 | int32x2_t __s1_111 = __p1_111; \ | 19330 | int32x2_t __s1_115 = __p1_115; \ |
| 19301 | int32x2_t __s2_111 = __p2_111; \ | 19331 | int32x2_t __s2_115 = __p2_115; \ |
| 19302 | int64x2_t __rev0_111; __rev0_111 = __builtin_shufflevector(__s0_111, __s0_111, 1, 0); \ | 19332 | int64x2_t __rev0_115; __rev0_115 = __builtin_shufflevector(__s0_115, __s0_115, 1, 0); \ |
| 19303 | int32x2_t __rev1_111; __rev1_111 = __builtin_shufflevector(__s1_111, __s1_111, 1, 0); \ | 19333 | int32x2_t __rev1_115; __rev1_115 = __builtin_shufflevector(__s1_115, __s1_115, 1, 0); \ |
| 19304 | int32x2_t __rev2_111; __rev2_111 = __builtin_shufflevector(__s2_111, __s2_111, 1, 0); \ | 19334 | int32x2_t __rev2_115; __rev2_115 = __builtin_shufflevector(__s2_115, __s2_115, 1, 0); \ |
| 19305 | __ret_111 = __noswap_vqdmlal_s32(__rev0_111, __rev1_111, __noswap_splat_lane_s32(__rev2_111, __p3_111)); \ | 19335 | __ret_115 = __noswap_vqdmlal_s32(__rev0_115, __rev1_115, __noswap_splat_lane_s32(__rev2_115, __p3_115)); \ |
| 19306 | __ret_111 = __builtin_shufflevector(__ret_111, __ret_111, 1, 0); \ | 19336 | __ret_115 = __builtin_shufflevector(__ret_115, __ret_115, 1, 0); \ |
| 19307 | __ret_111; \ | 19337 | __ret_115; \ |
| 19308 | }) | 19338 | }) |
| 19309 | #endif | 19339 | #endif |
| 19310 | | 19340 | |
| 19311 | #ifdef __LITTLE_ENDIAN__ | 19341 | #ifdef __LITTLE_ENDIAN__ |
| 19312 | #define vqdmlal_lane_s16(__p0_112, __p1_112, __p2_112, __p3_112) __extension__ ({ \ | 19342 | #define vqdmlal_lane_s16(__p0_116, __p1_116, __p2_116, __p3_116) __extension__ ({ \ |
| 19313 | int32x4_t __ret_112; \ | 19343 | int32x4_t __ret_116; \ |
| 19314 | int32x4_t __s0_112 = __p0_112; \ | 19344 | int32x4_t __s0_116 = __p0_116; \ |
| 19315 | int16x4_t __s1_112 = __p1_112; \ | 19345 | int16x4_t __s1_116 = __p1_116; \ |
| 19316 | int16x4_t __s2_112 = __p2_112; \ | 19346 | int16x4_t __s2_116 = __p2_116; \ |
| 19317 | __ret_112 = vqdmlal_s16(__s0_112, __s1_112, splat_lane_s16(__s2_112, __p3_112)); \ | 19347 | __ret_116 = vqdmlal_s16(__s0_116, __s1_116, splat_lane_s16(__s2_116, __p3_116)); \ |
| 19318 | __ret_112; \ | 19348 | __ret_116; \ |
| 19319 | }) | 19349 | }) |
| 19320 | #else | 19350 | #else |
| 19321 | #define vqdmlal_lane_s16(__p0_113, __p1_113, __p2_113, __p3_113) __extension__ ({ \ | 19351 | #define vqdmlal_lane_s16(__p0_117, __p1_117, __p2_117, __p3_117) __extension__ ({ \ |
| 19322 | int32x4_t __ret_113; \ | 19352 | int32x4_t __ret_117; \ |
| 19323 | int32x4_t __s0_113 = __p0_113; \ | 19353 | int32x4_t __s0_117 = __p0_117; \ |
| 19324 | int16x4_t __s1_113 = __p1_113; \ | 19354 | int16x4_t __s1_117 = __p1_117; \ |
| 19325 | int16x4_t __s2_113 = __p2_113; \ | 19355 | int16x4_t __s2_117 = __p2_117; \ |
| 19326 | int32x4_t __rev0_113; __rev0_113 = __builtin_shufflevector(__s0_113, __s0_113, 3, 2, 1, 0); \ | 19356 | int32x4_t __rev0_117; __rev0_117 = __builtin_shufflevector(__s0_117, __s0_117, 3, 2, 1, 0); \ |
| 19327 | int16x4_t __rev1_113; __rev1_113 = __builtin_shufflevector(__s1_113, __s1_113, 3, 2, 1, 0); \ | 19357 | int16x4_t __rev1_117; __rev1_117 = __builtin_shufflevector(__s1_117, __s1_117, 3, 2, 1, 0); \ |
| 19328 | int16x4_t __rev2_113; __rev2_113 = __builtin_shufflevector(__s2_113, __s2_113, 3, 2, 1, 0); \ | 19358 | int16x4_t __rev2_117; __rev2_117 = __builtin_shufflevector(__s2_117, __s2_117, 3, 2, 1, 0); \ |
| 19329 | __ret_113 = __noswap_vqdmlal_s16(__rev0_113, __rev1_113, __noswap_splat_lane_s16(__rev2_113, __p3_113)); \ | 19359 | __ret_117 = __noswap_vqdmlal_s16(__rev0_117, __rev1_117, __noswap_splat_lane_s16(__rev2_117, __p3_117)); \ |
| 19330 | __ret_113 = __builtin_shufflevector(__ret_113, __ret_113, 3, 2, 1, 0); \ | 19360 | __ret_117 = __builtin_shufflevector(__ret_117, __ret_117, 3, 2, 1, 0); \ |
| 19331 | __ret_113; \ | 19361 | __ret_117; \ |
| 19332 | }) | 19362 | }) |
| 19333 | #endif | 19363 | #endif |
| 19334 | | 19364 | |
| ... | @@ -19423,50 +19453,50 @@ __ai int32x4_t __noswap_vqdmlsl_s16(int32x4_t __p0, int16x4_t __p1, int16x4_t __ | ... | @@ -19423,50 +19453,50 @@ __ai int32x4_t __noswap_vqdmlsl_s16(int32x4_t __p0, int16x4_t __p1, int16x4_t __ |
| 19423 | #endif | 19453 | #endif |
| 19424 | | 19454 | |
| 19425 | #ifdef __LITTLE_ENDIAN__ | 19455 | #ifdef __LITTLE_ENDIAN__ |
| 19426 | #define vqdmlsl_lane_s32(__p0_114, __p1_114, __p2_114, __p3_114) __extension__ ({ \ | 19456 | #define vqdmlsl_lane_s32(__p0_118, __p1_118, __p2_118, __p3_118) __extension__ ({ \ |
| 19427 | int64x2_t __ret_114; \ | 19457 | int64x2_t __ret_118; \ |
| 19428 | int64x2_t __s0_114 = __p0_114; \ | 19458 | int64x2_t __s0_118 = __p0_118; \ |
| 19429 | int32x2_t __s1_114 = __p1_114; \ | 19459 | int32x2_t __s1_118 = __p1_118; \ |
| 19430 | int32x2_t __s2_114 = __p2_114; \ | 19460 | int32x2_t __s2_118 = __p2_118; \ |
| 19431 | __ret_114 = vqdmlsl_s32(__s0_114, __s1_114, splat_lane_s32(__s2_114, __p3_114)); \ | 19461 | __ret_118 = vqdmlsl_s32(__s0_118, __s1_118, splat_lane_s32(__s2_118, __p3_118)); \ |
| 19432 | __ret_114; \ | 19462 | __ret_118; \ |
| 19433 | }) | 19463 | }) |
| 19434 | #else | 19464 | #else |
| 19435 | #define vqdmlsl_lane_s32(__p0_115, __p1_115, __p2_115, __p3_115) __extension__ ({ \ | 19465 | #define vqdmlsl_lane_s32(__p0_119, __p1_119, __p2_119, __p3_119) __extension__ ({ \ |
| 19436 | int64x2_t __ret_115; \ | 19466 | int64x2_t __ret_119; \ |
| 19437 | int64x2_t __s0_115 = __p0_115; \ | 19467 | int64x2_t __s0_119 = __p0_119; \ |
| 19438 | int32x2_t __s1_115 = __p1_115; \ | 19468 | int32x2_t __s1_119 = __p1_119; \ |
| 19439 | int32x2_t __s2_115 = __p2_115; \ | 19469 | int32x2_t __s2_119 = __p2_119; \ |
| 19440 | int64x2_t __rev0_115; __rev0_115 = __builtin_shufflevector(__s0_115, __s0_115, 1, 0); \ | 19470 | int64x2_t __rev0_119; __rev0_119 = __builtin_shufflevector(__s0_119, __s0_119, 1, 0); \ |
| 19441 | int32x2_t __rev1_115; __rev1_115 = __builtin_shufflevector(__s1_115, __s1_115, 1, 0); \ | 19471 | int32x2_t __rev1_119; __rev1_119 = __builtin_shufflevector(__s1_119, __s1_119, 1, 0); \ |
| 19442 | int32x2_t __rev2_115; __rev2_115 = __builtin_shufflevector(__s2_115, __s2_115, 1, 0); \ | 19472 | int32x2_t __rev2_119; __rev2_119 = __builtin_shufflevector(__s2_119, __s2_119, 1, 0); \ |
| 19443 | __ret_115 = __noswap_vqdmlsl_s32(__rev0_115, __rev1_115, __noswap_splat_lane_s32(__rev2_115, __p3_115)); \ | 19473 | __ret_119 = __noswap_vqdmlsl_s32(__rev0_119, __rev1_119, __noswap_splat_lane_s32(__rev2_119, __p3_119)); \ |
| 19444 | __ret_115 = __builtin_shufflevector(__ret_115, __ret_115, 1, 0); \ | 19474 | __ret_119 = __builtin_shufflevector(__ret_119, __ret_119, 1, 0); \ |
| 19445 | __ret_115; \ | 19475 | __ret_119; \ |
| 19446 | }) | 19476 | }) |
| 19447 | #endif | 19477 | #endif |
| 19448 | | 19478 | |
| 19449 | #ifdef __LITTLE_ENDIAN__ | 19479 | #ifdef __LITTLE_ENDIAN__ |
| 19450 | #define vqdmlsl_lane_s16(__p0_116, __p1_116, __p2_116, __p3_116) __extension__ ({ \ | 19480 | #define vqdmlsl_lane_s16(__p0_120, __p1_120, __p2_120, __p3_120) __extension__ ({ \ |
| 19451 | int32x4_t __ret_116; \ | 19481 | int32x4_t __ret_120; \ |
| 19452 | int32x4_t __s0_116 = __p0_116; \ | 19482 | int32x4_t __s0_120 = __p0_120; \ |
| 19453 | int16x4_t __s1_116 = __p1_116; \ | 19483 | int16x4_t __s1_120 = __p1_120; \ |
| 19454 | int16x4_t __s2_116 = __p2_116; \ | 19484 | int16x4_t __s2_120 = __p2_120; \ |
| 19455 | __ret_116 = vqdmlsl_s16(__s0_116, __s1_116, splat_lane_s16(__s2_116, __p3_116)); \ | 19485 | __ret_120 = vqdmlsl_s16(__s0_120, __s1_120, splat_lane_s16(__s2_120, __p3_120)); \ |
| 19456 | __ret_116; \ | 19486 | __ret_120; \ |
| 19457 | }) | 19487 | }) |
| 19458 | #else | 19488 | #else |
| 19459 | #define vqdmlsl_lane_s16(__p0_117, __p1_117, __p2_117, __p3_117) __extension__ ({ \ | 19489 | #define vqdmlsl_lane_s16(__p0_121, __p1_121, __p2_121, __p3_121) __extension__ ({ \ |
| 19460 | int32x4_t __ret_117; \ | 19490 | int32x4_t __ret_121; \ |
| 19461 | int32x4_t __s0_117 = __p0_117; \ | 19491 | int32x4_t __s0_121 = __p0_121; \ |
| 19462 | int16x4_t __s1_117 = __p1_117; \ | 19492 | int16x4_t __s1_121 = __p1_121; \ |
| 19463 | int16x4_t __s2_117 = __p2_117; \ | 19493 | int16x4_t __s2_121 = __p2_121; \ |
| 19464 | int32x4_t __rev0_117; __rev0_117 = __builtin_shufflevector(__s0_117, __s0_117, 3, 2, 1, 0); \ | 19494 | int32x4_t __rev0_121; __rev0_121 = __builtin_shufflevector(__s0_121, __s0_121, 3, 2, 1, 0); \ |
| 19465 | int16x4_t __rev1_117; __rev1_117 = __builtin_shufflevector(__s1_117, __s1_117, 3, 2, 1, 0); \ | 19495 | int16x4_t __rev1_121; __rev1_121 = __builtin_shufflevector(__s1_121, __s1_121, 3, 2, 1, 0); \ |
| 19466 | int16x4_t __rev2_117; __rev2_117 = __builtin_shufflevector(__s2_117, __s2_117, 3, 2, 1, 0); \ | 19496 | int16x4_t __rev2_121; __rev2_121 = __builtin_shufflevector(__s2_121, __s2_121, 3, 2, 1, 0); \ |
| 19467 | __ret_117 = __noswap_vqdmlsl_s16(__rev0_117, __rev1_117, __noswap_splat_lane_s16(__rev2_117, __p3_117)); \ | 19497 | __ret_121 = __noswap_vqdmlsl_s16(__rev0_121, __rev1_121, __noswap_splat_lane_s16(__rev2_121, __p3_121)); \ |
| 19468 | __ret_117 = __builtin_shufflevector(__ret_117, __ret_117, 3, 2, 1, 0); \ | 19498 | __ret_121 = __builtin_shufflevector(__ret_121, __ret_121, 3, 2, 1, 0); \ |
| 19469 | __ret_117; \ | 19499 | __ret_121; \ |
| 19470 | }) | 19500 | }) |
| 19471 | #endif | 19501 | #endif |
| 19472 | | 19502 | |
| ... | @@ -19711,44 +19741,44 @@ __ai int32x4_t __noswap_vqdmull_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -19711,44 +19741,44 @@ __ai int32x4_t __noswap_vqdmull_s16(int16x4_t __p0, int16x4_t __p1) { |
| 19711 | #endif | 19741 | #endif |
| 19712 | | 19742 | |
| 19713 | #ifdef __LITTLE_ENDIAN__ | 19743 | #ifdef __LITTLE_ENDIAN__ |
| 19714 | #define vqdmull_lane_s32(__p0_118, __p1_118, __p2_118) __extension__ ({ \ | 19744 | #define vqdmull_lane_s32(__p0_122, __p1_122, __p2_122) __extension__ ({ \ |
| 19715 | int64x2_t __ret_118; \ | 19745 | int64x2_t __ret_122; \ |
| 19716 | int32x2_t __s0_118 = __p0_118; \ | 19746 | int32x2_t __s0_122 = __p0_122; \ |
| 19717 | int32x2_t __s1_118 = __p1_118; \ | 19747 | int32x2_t __s1_122 = __p1_122; \ |
| 19718 | __ret_118 = vqdmull_s32(__s0_118, splat_lane_s32(__s1_118, __p2_118)); \ | 19748 | __ret_122 = vqdmull_s32(__s0_122, splat_lane_s32(__s1_122, __p2_122)); \ |
| 19719 | __ret_118; \ | 19749 | __ret_122; \ |
| 19720 | }) | 19750 | }) |
| 19721 | #else | 19751 | #else |
| 19722 | #define vqdmull_lane_s32(__p0_119, __p1_119, __p2_119) __extension__ ({ \ | 19752 | #define vqdmull_lane_s32(__p0_123, __p1_123, __p2_123) __extension__ ({ \ |
| 19723 | int64x2_t __ret_119; \ | 19753 | int64x2_t __ret_123; \ |
| 19724 | int32x2_t __s0_119 = __p0_119; \ | 19754 | int32x2_t __s0_123 = __p0_123; \ |
| 19725 | int32x2_t __s1_119 = __p1_119; \ | 19755 | int32x2_t __s1_123 = __p1_123; \ |
| 19726 | int32x2_t __rev0_119; __rev0_119 = __builtin_shufflevector(__s0_119, __s0_119, 1, 0); \ | 19756 | int32x2_t __rev0_123; __rev0_123 = __builtin_shufflevector(__s0_123, __s0_123, 1, 0); \ |
| 19727 | int32x2_t __rev1_119; __rev1_119 = __builtin_shufflevector(__s1_119, __s1_119, 1, 0); \ | 19757 | int32x2_t __rev1_123; __rev1_123 = __builtin_shufflevector(__s1_123, __s1_123, 1, 0); \ |
| 19728 | __ret_119 = __noswap_vqdmull_s32(__rev0_119, __noswap_splat_lane_s32(__rev1_119, __p2_119)); \ | 19758 | __ret_123 = __noswap_vqdmull_s32(__rev0_123, __noswap_splat_lane_s32(__rev1_123, __p2_123)); \ |
| 19729 | __ret_119 = __builtin_shufflevector(__ret_119, __ret_119, 1, 0); \ | 19759 | __ret_123 = __builtin_shufflevector(__ret_123, __ret_123, 1, 0); \ |
| 19730 | __ret_119; \ | 19760 | __ret_123; \ |
| 19731 | }) | 19761 | }) |
| 19732 | #endif | 19762 | #endif |
| 19733 | | 19763 | |
| 19734 | #ifdef __LITTLE_ENDIAN__ | 19764 | #ifdef __LITTLE_ENDIAN__ |
| 19735 | #define vqdmull_lane_s16(__p0_120, __p1_120, __p2_120) __extension__ ({ \ | 19765 | #define vqdmull_lane_s16(__p0_124, __p1_124, __p2_124) __extension__ ({ \ |
| 19736 | int32x4_t __ret_120; \ | 19766 | int32x4_t __ret_124; \ |
| 19737 | int16x4_t __s0_120 = __p0_120; \ | 19767 | int16x4_t __s0_124 = __p0_124; \ |
| 19738 | int16x4_t __s1_120 = __p1_120; \ | 19768 | int16x4_t __s1_124 = __p1_124; \ |
| 19739 | __ret_120 = vqdmull_s16(__s0_120, splat_lane_s16(__s1_120, __p2_120)); \ | 19769 | __ret_124 = vqdmull_s16(__s0_124, splat_lane_s16(__s1_124, __p2_124)); \ |
| 19740 | __ret_120; \ | 19770 | __ret_124; \ |
| 19741 | }) | 19771 | }) |
| 19742 | #else | 19772 | #else |
| 19743 | #define vqdmull_lane_s16(__p0_121, __p1_121, __p2_121) __extension__ ({ \ | 19773 | #define vqdmull_lane_s16(__p0_125, __p1_125, __p2_125) __extension__ ({ \ |
| 19744 | int32x4_t __ret_121; \ | 19774 | int32x4_t __ret_125; \ |
| 19745 | int16x4_t __s0_121 = __p0_121; \ | 19775 | int16x4_t __s0_125 = __p0_125; \ |
| 19746 | int16x4_t __s1_121 = __p1_121; \ | 19776 | int16x4_t __s1_125 = __p1_125; \ |
| 19747 | int16x4_t __rev0_121; __rev0_121 = __builtin_shufflevector(__s0_121, __s0_121, 3, 2, 1, 0); \ | 19777 | int16x4_t __rev0_125; __rev0_125 = __builtin_shufflevector(__s0_125, __s0_125, 3, 2, 1, 0); \ |
| 19748 | int16x4_t __rev1_121; __rev1_121 = __builtin_shufflevector(__s1_121, __s1_121, 3, 2, 1, 0); \ | 19778 | int16x4_t __rev1_125; __rev1_125 = __builtin_shufflevector(__s1_125, __s1_125, 3, 2, 1, 0); \ |
| 19749 | __ret_121 = __noswap_vqdmull_s16(__rev0_121, __noswap_splat_lane_s16(__rev1_121, __p2_121)); \ | 19779 | __ret_125 = __noswap_vqdmull_s16(__rev0_125, __noswap_splat_lane_s16(__rev1_125, __p2_125)); \ |
| 19750 | __ret_121 = __builtin_shufflevector(__ret_121, __ret_121, 3, 2, 1, 0); \ | 19780 | __ret_125 = __builtin_shufflevector(__ret_125, __ret_125, 3, 2, 1, 0); \ |
| 19751 | __ret_121; \ | 19781 | __ret_125; \ |
| 19752 | }) | 19782 | }) |
| 19753 | #endif | 19783 | #endif |
| 19754 | | 19784 | |
| ... | @@ -32235,4366 +32265,5707 @@ __ai int16x4x2_t vzip_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -32235,4366 +32265,5707 @@ __ai int16x4x2_t vzip_s16(int16x4_t __p0, int16x4_t __p1) { |
| 32235 | } | 32265 | } |
| 32236 | #endif | 32266 | #endif |
| 32237 | | 32267 | |
| 32238 | #if !defined(__aarch64__) | | |
| 32239 | #ifdef __LITTLE_ENDIAN__ | 32268 | #ifdef __LITTLE_ENDIAN__ |
| 32240 | #define vdupq_lane_f16(__p0_122, __p1_122) __extension__ ({ \ | 32269 | #define splatq_lane_bf16(__p0, __p1) __extension__ ({ \ |
| 32241 | float16x8_t __ret_122; \ | 32270 | bfloat16x8_t __ret; \ |
| 32242 | float16x4_t __s0_122 = __p0_122; \ | 32271 | bfloat16x4_t __s0 = __p0; \ |
| 32243 | __ret_122 = splatq_lane_f16(__s0_122, __p1_122); \ | 32272 | __ret = (bfloat16x8_t) __builtin_neon_splatq_lane_bf16((int8x8_t)__s0, __p1, 11); \ |
| 32244 | __ret_122; \ | 32273 | __ret; \ |
| 32245 | }) | 32274 | }) |
| 32246 | #else | 32275 | #else |
| 32247 | #define vdupq_lane_f16(__p0_123, __p1_123) __extension__ ({ \ | 32276 | #define splatq_lane_bf16(__p0, __p1) __extension__ ({ \ |
| 32248 | float16x8_t __ret_123; \ | 32277 | bfloat16x8_t __ret; \ |
| 32249 | float16x4_t __s0_123 = __p0_123; \ | 32278 | bfloat16x4_t __s0 = __p0; \ |
| 32250 | float16x4_t __rev0_123; __rev0_123 = __builtin_shufflevector(__s0_123, __s0_123, 3, 2, 1, 0); \ | 32279 | bfloat16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 32251 | __ret_123 = __noswap_splatq_lane_f16(__rev0_123, __p1_123); \ | 32280 | __ret = (bfloat16x8_t) __builtin_neon_splatq_lane_bf16((int8x8_t)__rev0, __p1, 11); \ |
| 32252 | __ret_123 = __builtin_shufflevector(__ret_123, __ret_123, 7, 6, 5, 4, 3, 2, 1, 0); \ | 32281 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32253 | __ret_123; \ | 32282 | __ret; \ |
| | 32283 | }) |
| | 32284 | #define __noswap_splatq_lane_bf16(__p0, __p1) __extension__ ({ \ |
| | 32285 | bfloat16x8_t __ret; \ |
| | 32286 | bfloat16x4_t __s0 = __p0; \ |
| | 32287 | __ret = (bfloat16x8_t) __builtin_neon_splatq_lane_bf16((int8x8_t)__s0, __p1, 11); \ |
| | 32288 | __ret; \ |
| 32254 | }) | 32289 | }) |
| 32255 | #endif | 32290 | #endif |
| 32256 | | 32291 | |
| 32257 | #ifdef __LITTLE_ENDIAN__ | 32292 | #ifdef __LITTLE_ENDIAN__ |
| 32258 | #define vdup_lane_f16(__p0_124, __p1_124) __extension__ ({ \ | 32293 | #define splat_lane_bf16(__p0, __p1) __extension__ ({ \ |
| 32259 | float16x4_t __ret_124; \ | 32294 | bfloat16x4_t __ret; \ |
| 32260 | float16x4_t __s0_124 = __p0_124; \ | 32295 | bfloat16x4_t __s0 = __p0; \ |
| 32261 | __ret_124 = splat_lane_f16(__s0_124, __p1_124); \ | 32296 | __ret = (bfloat16x4_t) __builtin_neon_splat_lane_bf16((int8x8_t)__s0, __p1, 11); \ |
| 32262 | __ret_124; \ | 32297 | __ret; \ |
| 32263 | }) | 32298 | }) |
| 32264 | #else | 32299 | #else |
| 32265 | #define vdup_lane_f16(__p0_125, __p1_125) __extension__ ({ \ | 32300 | #define splat_lane_bf16(__p0, __p1) __extension__ ({ \ |
| 32266 | float16x4_t __ret_125; \ | 32301 | bfloat16x4_t __ret; \ |
| 32267 | float16x4_t __s0_125 = __p0_125; \ | 32302 | bfloat16x4_t __s0 = __p0; \ |
| 32268 | float16x4_t __rev0_125; __rev0_125 = __builtin_shufflevector(__s0_125, __s0_125, 3, 2, 1, 0); \ | 32303 | bfloat16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 32269 | __ret_125 = __noswap_splat_lane_f16(__rev0_125, __p1_125); \ | 32304 | __ret = (bfloat16x4_t) __builtin_neon_splat_lane_bf16((int8x8_t)__rev0, __p1, 11); \ |
| 32270 | __ret_125 = __builtin_shufflevector(__ret_125, __ret_125, 3, 2, 1, 0); \ | 32305 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 32271 | __ret_125; \ | 32306 | __ret; \ |
| | 32307 | }) |
| | 32308 | #define __noswap_splat_lane_bf16(__p0, __p1) __extension__ ({ \ |
| | 32309 | bfloat16x4_t __ret; \ |
| | 32310 | bfloat16x4_t __s0 = __p0; \ |
| | 32311 | __ret = (bfloat16x4_t) __builtin_neon_splat_lane_bf16((int8x8_t)__s0, __p1, 11); \ |
| | 32312 | __ret; \ |
| 32272 | }) | 32313 | }) |
| 32273 | #endif | 32314 | #endif |
| 32274 | | 32315 | |
| 32275 | #ifdef __LITTLE_ENDIAN__ | 32316 | #ifdef __LITTLE_ENDIAN__ |
| 32276 | #define vdupq_n_f16(__p0) __extension__ ({ \ | 32317 | #define splatq_laneq_bf16(__p0, __p1) __extension__ ({ \ |
| 32277 | float16x8_t __ret; \ | 32318 | bfloat16x8_t __ret; \ |
| 32278 | float16_t __s0 = __p0; \ | 32319 | bfloat16x8_t __s0 = __p0; \ |
| 32279 | __ret = (float16x8_t) {__s0, __s0, __s0, __s0, __s0, __s0, __s0, __s0}; \ | 32320 | __ret = (bfloat16x8_t) __builtin_neon_splatq_laneq_bf16((int8x16_t)__s0, __p1, 43); \ |
| 32280 | __ret; \ | 32321 | __ret; \ |
| 32281 | }) | 32322 | }) |
| 32282 | #else | 32323 | #else |
| 32283 | #define vdupq_n_f16(__p0) __extension__ ({ \ | 32324 | #define splatq_laneq_bf16(__p0, __p1) __extension__ ({ \ |
| 32284 | float16x8_t __ret; \ | 32325 | bfloat16x8_t __ret; \ |
| 32285 | float16_t __s0 = __p0; \ | 32326 | bfloat16x8_t __s0 = __p0; \ |
| 32286 | __ret = (float16x8_t) {__s0, __s0, __s0, __s0, __s0, __s0, __s0, __s0}; \ | 32327 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 32328 | __ret = (bfloat16x8_t) __builtin_neon_splatq_laneq_bf16((int8x16_t)__rev0, __p1, 43); \ |
| 32287 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 32329 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32288 | __ret; \ | 32330 | __ret; \ |
| 32289 | }) | 32331 | }) |
| | 32332 | #define __noswap_splatq_laneq_bf16(__p0, __p1) __extension__ ({ \ |
| | 32333 | bfloat16x8_t __ret; \ |
| | 32334 | bfloat16x8_t __s0 = __p0; \ |
| | 32335 | __ret = (bfloat16x8_t) __builtin_neon_splatq_laneq_bf16((int8x16_t)__s0, __p1, 43); \ |
| | 32336 | __ret; \ |
| | 32337 | }) |
| 32290 | #endif | 32338 | #endif |
| 32291 | | 32339 | |
| 32292 | #ifdef __LITTLE_ENDIAN__ | 32340 | #ifdef __LITTLE_ENDIAN__ |
| 32293 | #define vdup_n_f16(__p0) __extension__ ({ \ | 32341 | #define splat_laneq_bf16(__p0, __p1) __extension__ ({ \ |
| 32294 | float16x4_t __ret; \ | 32342 | bfloat16x4_t __ret; \ |
| 32295 | float16_t __s0 = __p0; \ | 32343 | bfloat16x8_t __s0 = __p0; \ |
| 32296 | __ret = (float16x4_t) {__s0, __s0, __s0, __s0}; \ | 32344 | __ret = (bfloat16x4_t) __builtin_neon_splat_laneq_bf16((int8x16_t)__s0, __p1, 43); \ |
| 32297 | __ret; \ | 32345 | __ret; \ |
| 32298 | }) | 32346 | }) |
| 32299 | #else | 32347 | #else |
| 32300 | #define vdup_n_f16(__p0) __extension__ ({ \ | 32348 | #define splat_laneq_bf16(__p0, __p1) __extension__ ({ \ |
| 32301 | float16x4_t __ret; \ | 32349 | bfloat16x4_t __ret; \ |
| 32302 | float16_t __s0 = __p0; \ | 32350 | bfloat16x8_t __s0 = __p0; \ |
| 32303 | __ret = (float16x4_t) {__s0, __s0, __s0, __s0}; \ | 32351 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 32352 | __ret = (bfloat16x4_t) __builtin_neon_splat_laneq_bf16((int8x16_t)__rev0, __p1, 43); \ |
| 32304 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 32353 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 32305 | __ret; \ | 32354 | __ret; \ |
| 32306 | }) | 32355 | }) |
| | 32356 | #define __noswap_splat_laneq_bf16(__p0, __p1) __extension__ ({ \ |
| | 32357 | bfloat16x4_t __ret; \ |
| | 32358 | bfloat16x8_t __s0 = __p0; \ |
| | 32359 | __ret = (bfloat16x4_t) __builtin_neon_splat_laneq_bf16((int8x16_t)__s0, __p1, 43); \ |
| | 32360 | __ret; \ |
| | 32361 | }) |
| 32307 | #endif | 32362 | #endif |
| 32308 | | 32363 | |
| 32309 | #ifdef __LITTLE_ENDIAN__ | 32364 | #ifdef __LITTLE_ENDIAN__ |
| 32310 | #define vmovq_n_f16(__p0) __extension__ ({ \ | 32365 | __ai __attribute__((target("bf16"))) float32x4_t vbfdotq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { |
| 32311 | float16x8_t __ret; \ | 32366 | float32x4_t __ret; |
| 32312 | float16_t __s0 = __p0; \ | 32367 | __ret = (float32x4_t) __builtin_neon_vbfdotq_f32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 32313 | __ret = (float16x8_t) {__s0, __s0, __s0, __s0, __s0, __s0, __s0, __s0}; \ | 32368 | return __ret; |
| 32314 | __ret; \ | 32369 | } |
| 32315 | }) | | |
| 32316 | #else | 32370 | #else |
| 32317 | #define vmovq_n_f16(__p0) __extension__ ({ \ | 32371 | __ai __attribute__((target("bf16"))) float32x4_t vbfdotq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { |
| 32318 | float16x8_t __ret; \ | 32372 | float32x4_t __ret; |
| 32319 | float16_t __s0 = __p0; \ | 32373 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 32320 | __ret = (float16x8_t) {__s0, __s0, __s0, __s0, __s0, __s0, __s0, __s0}; \ | 32374 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 32321 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 32375 | bfloat16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 32322 | __ret; \ | 32376 | __ret = (float32x4_t) __builtin_neon_vbfdotq_f32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); |
| 32323 | }) | 32377 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 32378 | return __ret; |
| | 32379 | } |
| | 32380 | __ai __attribute__((target("bf16"))) float32x4_t __noswap_vbfdotq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { |
| | 32381 | float32x4_t __ret; |
| | 32382 | __ret = (float32x4_t) __builtin_neon_vbfdotq_f32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| | 32383 | return __ret; |
| | 32384 | } |
| 32324 | #endif | 32385 | #endif |
| 32325 | | 32386 | |
| 32326 | #ifdef __LITTLE_ENDIAN__ | 32387 | #ifdef __LITTLE_ENDIAN__ |
| 32327 | #define vmov_n_f16(__p0) __extension__ ({ \ | 32388 | __ai __attribute__((target("bf16"))) float32x2_t vbfdot_f32(float32x2_t __p0, bfloat16x4_t __p1, bfloat16x4_t __p2) { |
| 32328 | float16x4_t __ret; \ | 32389 | float32x2_t __ret; |
| 32329 | float16_t __s0 = __p0; \ | 32390 | __ret = (float32x2_t) __builtin_neon_vbfdot_f32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 32330 | __ret = (float16x4_t) {__s0, __s0, __s0, __s0}; \ | 32391 | return __ret; |
| 32331 | __ret; \ | 32392 | } |
| 32332 | }) | | |
| 32333 | #else | 32393 | #else |
| 32334 | #define vmov_n_f16(__p0) __extension__ ({ \ | 32394 | __ai __attribute__((target("bf16"))) float32x2_t vbfdot_f32(float32x2_t __p0, bfloat16x4_t __p1, bfloat16x4_t __p2) { |
| 32335 | float16x4_t __ret; \ | 32395 | float32x2_t __ret; |
| 32336 | float16_t __s0 = __p0; \ | 32396 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 32337 | __ret = (float16x4_t) {__s0, __s0, __s0, __s0}; \ | 32397 | bfloat16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 32338 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 32398 | bfloat16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 32339 | __ret; \ | 32399 | __ret = (float32x2_t) __builtin_neon_vbfdot_f32((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); |
| 32340 | }) | 32400 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 32401 | return __ret; |
| | 32402 | } |
| | 32403 | __ai __attribute__((target("bf16"))) float32x2_t __noswap_vbfdot_f32(float32x2_t __p0, bfloat16x4_t __p1, bfloat16x4_t __p2) { |
| | 32404 | float32x2_t __ret; |
| | 32405 | __ret = (float32x2_t) __builtin_neon_vbfdot_f32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| | 32406 | return __ret; |
| | 32407 | } |
| 32341 | #endif | 32408 | #endif |
| 32342 | | 32409 | |
| 32343 | #ifdef __LITTLE_ENDIAN__ | 32410 | #ifdef __LITTLE_ENDIAN__ |
| 32344 | #define vqdmulhq_lane_s32(__p0_126, __p1_126, __p2_126) __extension__ ({ \ | 32411 | #define vbfdotq_lane_f32(__p0_126, __p1_126, __p2_126, __p3_126) __extension__ ({ \ |
| 32345 | int32x4_t __ret_126; \ | 32412 | float32x4_t __ret_126; \ |
| 32346 | int32x4_t __s0_126 = __p0_126; \ | 32413 | float32x4_t __s0_126 = __p0_126; \ |
| 32347 | int32x2_t __s1_126 = __p1_126; \ | 32414 | bfloat16x8_t __s1_126 = __p1_126; \ |
| 32348 | __ret_126 = vqdmulhq_s32(__s0_126, splatq_lane_s32(__s1_126, __p2_126)); \ | 32415 | bfloat16x4_t __s2_126 = __p2_126; \ |
| | 32416 | bfloat16x4_t __reint_126 = __s2_126; \ |
| | 32417 | float32x4_t __reint1_126 = splatq_lane_f32(*(float32x2_t *) &__reint_126, __p3_126); \ |
| | 32418 | __ret_126 = vbfdotq_f32(__s0_126, __s1_126, *(bfloat16x8_t *) &__reint1_126); \ |
| 32349 | __ret_126; \ | 32419 | __ret_126; \ |
| 32350 | }) | 32420 | }) |
| 32351 | #else | 32421 | #else |
| 32352 | #define vqdmulhq_lane_s32(__p0_127, __p1_127, __p2_127) __extension__ ({ \ | 32422 | #define vbfdotq_lane_f32(__p0_127, __p1_127, __p2_127, __p3_127) __extension__ ({ \ |
| 32353 | int32x4_t __ret_127; \ | 32423 | float32x4_t __ret_127; \ |
| 32354 | int32x4_t __s0_127 = __p0_127; \ | 32424 | float32x4_t __s0_127 = __p0_127; \ |
| 32355 | int32x2_t __s1_127 = __p1_127; \ | 32425 | bfloat16x8_t __s1_127 = __p1_127; \ |
| 32356 | int32x4_t __rev0_127; __rev0_127 = __builtin_shufflevector(__s0_127, __s0_127, 3, 2, 1, 0); \ | 32426 | bfloat16x4_t __s2_127 = __p2_127; \ |
| 32357 | int32x2_t __rev1_127; __rev1_127 = __builtin_shufflevector(__s1_127, __s1_127, 1, 0); \ | 32427 | float32x4_t __rev0_127; __rev0_127 = __builtin_shufflevector(__s0_127, __s0_127, 3, 2, 1, 0); \ |
| 32358 | __ret_127 = __noswap_vqdmulhq_s32(__rev0_127, __noswap_splatq_lane_s32(__rev1_127, __p2_127)); \ | 32428 | bfloat16x8_t __rev1_127; __rev1_127 = __builtin_shufflevector(__s1_127, __s1_127, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 32429 | bfloat16x4_t __rev2_127; __rev2_127 = __builtin_shufflevector(__s2_127, __s2_127, 3, 2, 1, 0); \ |
| | 32430 | bfloat16x4_t __reint_127 = __rev2_127; \ |
| | 32431 | float32x4_t __reint1_127 = __noswap_splatq_lane_f32(*(float32x2_t *) &__reint_127, __p3_127); \ |
| | 32432 | __ret_127 = __noswap_vbfdotq_f32(__rev0_127, __rev1_127, *(bfloat16x8_t *) &__reint1_127); \ |
| 32359 | __ret_127 = __builtin_shufflevector(__ret_127, __ret_127, 3, 2, 1, 0); \ | 32433 | __ret_127 = __builtin_shufflevector(__ret_127, __ret_127, 3, 2, 1, 0); \ |
| 32360 | __ret_127; \ | 32434 | __ret_127; \ |
| 32361 | }) | 32435 | }) |
| 32362 | #endif | 32436 | #endif |
| 32363 | | 32437 | |
| 32364 | #ifdef __LITTLE_ENDIAN__ | 32438 | #ifdef __LITTLE_ENDIAN__ |
| 32365 | #define vqdmulhq_lane_s16(__p0_128, __p1_128, __p2_128) __extension__ ({ \ | 32439 | #define vbfdot_lane_f32(__p0_128, __p1_128, __p2_128, __p3_128) __extension__ ({ \ |
| 32366 | int16x8_t __ret_128; \ | 32440 | float32x2_t __ret_128; \ |
| 32367 | int16x8_t __s0_128 = __p0_128; \ | 32441 | float32x2_t __s0_128 = __p0_128; \ |
| 32368 | int16x4_t __s1_128 = __p1_128; \ | 32442 | bfloat16x4_t __s1_128 = __p1_128; \ |
| 32369 | __ret_128 = vqdmulhq_s16(__s0_128, splatq_lane_s16(__s1_128, __p2_128)); \ | 32443 | bfloat16x4_t __s2_128 = __p2_128; \ |
| | 32444 | bfloat16x4_t __reint_128 = __s2_128; \ |
| | 32445 | float32x2_t __reint1_128 = splat_lane_f32(*(float32x2_t *) &__reint_128, __p3_128); \ |
| | 32446 | __ret_128 = vbfdot_f32(__s0_128, __s1_128, *(bfloat16x4_t *) &__reint1_128); \ |
| 32370 | __ret_128; \ | 32447 | __ret_128; \ |
| 32371 | }) | 32448 | }) |
| 32372 | #else | 32449 | #else |
| 32373 | #define vqdmulhq_lane_s16(__p0_129, __p1_129, __p2_129) __extension__ ({ \ | 32450 | #define vbfdot_lane_f32(__p0_129, __p1_129, __p2_129, __p3_129) __extension__ ({ \ |
| 32374 | int16x8_t __ret_129; \ | 32451 | float32x2_t __ret_129; \ |
| 32375 | int16x8_t __s0_129 = __p0_129; \ | 32452 | float32x2_t __s0_129 = __p0_129; \ |
| 32376 | int16x4_t __s1_129 = __p1_129; \ | 32453 | bfloat16x4_t __s1_129 = __p1_129; \ |
| 32377 | int16x8_t __rev0_129; __rev0_129 = __builtin_shufflevector(__s0_129, __s0_129, 7, 6, 5, 4, 3, 2, 1, 0); \ | 32454 | bfloat16x4_t __s2_129 = __p2_129; \ |
| 32378 | int16x4_t __rev1_129; __rev1_129 = __builtin_shufflevector(__s1_129, __s1_129, 3, 2, 1, 0); \ | 32455 | float32x2_t __rev0_129; __rev0_129 = __builtin_shufflevector(__s0_129, __s0_129, 1, 0); \ |
| 32379 | __ret_129 = __noswap_vqdmulhq_s16(__rev0_129, __noswap_splatq_lane_s16(__rev1_129, __p2_129)); \ | 32456 | bfloat16x4_t __rev1_129; __rev1_129 = __builtin_shufflevector(__s1_129, __s1_129, 3, 2, 1, 0); \ |
| 32380 | __ret_129 = __builtin_shufflevector(__ret_129, __ret_129, 7, 6, 5, 4, 3, 2, 1, 0); \ | 32457 | bfloat16x4_t __rev2_129; __rev2_129 = __builtin_shufflevector(__s2_129, __s2_129, 3, 2, 1, 0); \ |
| | 32458 | bfloat16x4_t __reint_129 = __rev2_129; \ |
| | 32459 | float32x2_t __reint1_129 = __noswap_splat_lane_f32(*(float32x2_t *) &__reint_129, __p3_129); \ |
| | 32460 | __ret_129 = __noswap_vbfdot_f32(__rev0_129, __rev1_129, *(bfloat16x4_t *) &__reint1_129); \ |
| | 32461 | __ret_129 = __builtin_shufflevector(__ret_129, __ret_129, 1, 0); \ |
| 32381 | __ret_129; \ | 32462 | __ret_129; \ |
| 32382 | }) | 32463 | }) |
| 32383 | #endif | 32464 | #endif |
| 32384 | | 32465 | |
| 32385 | #ifdef __LITTLE_ENDIAN__ | 32466 | #ifdef __LITTLE_ENDIAN__ |
| 32386 | #define vqdmulh_lane_s32(__p0_130, __p1_130, __p2_130) __extension__ ({ \ | 32467 | #define vbfdotq_laneq_f32(__p0_130, __p1_130, __p2_130, __p3_130) __extension__ ({ \ |
| 32387 | int32x2_t __ret_130; \ | 32468 | float32x4_t __ret_130; \ |
| 32388 | int32x2_t __s0_130 = __p0_130; \ | 32469 | float32x4_t __s0_130 = __p0_130; \ |
| 32389 | int32x2_t __s1_130 = __p1_130; \ | 32470 | bfloat16x8_t __s1_130 = __p1_130; \ |
| 32390 | __ret_130 = vqdmulh_s32(__s0_130, splat_lane_s32(__s1_130, __p2_130)); \ | 32471 | bfloat16x8_t __s2_130 = __p2_130; \ |
| | 32472 | bfloat16x8_t __reint_130 = __s2_130; \ |
| | 32473 | float32x4_t __reint1_130 = splatq_laneq_f32(*(float32x4_t *) &__reint_130, __p3_130); \ |
| | 32474 | __ret_130 = vbfdotq_f32(__s0_130, __s1_130, *(bfloat16x8_t *) &__reint1_130); \ |
| 32391 | __ret_130; \ | 32475 | __ret_130; \ |
| 32392 | }) | 32476 | }) |
| 32393 | #else | 32477 | #else |
| 32394 | #define vqdmulh_lane_s32(__p0_131, __p1_131, __p2_131) __extension__ ({ \ | 32478 | #define vbfdotq_laneq_f32(__p0_131, __p1_131, __p2_131, __p3_131) __extension__ ({ \ |
| 32395 | int32x2_t __ret_131; \ | 32479 | float32x4_t __ret_131; \ |
| 32396 | int32x2_t __s0_131 = __p0_131; \ | 32480 | float32x4_t __s0_131 = __p0_131; \ |
| 32397 | int32x2_t __s1_131 = __p1_131; \ | 32481 | bfloat16x8_t __s1_131 = __p1_131; \ |
| 32398 | int32x2_t __rev0_131; __rev0_131 = __builtin_shufflevector(__s0_131, __s0_131, 1, 0); \ | 32482 | bfloat16x8_t __s2_131 = __p2_131; \ |
| 32399 | int32x2_t __rev1_131; __rev1_131 = __builtin_shufflevector(__s1_131, __s1_131, 1, 0); \ | 32483 | float32x4_t __rev0_131; __rev0_131 = __builtin_shufflevector(__s0_131, __s0_131, 3, 2, 1, 0); \ |
| 32400 | __ret_131 = __noswap_vqdmulh_s32(__rev0_131, __noswap_splat_lane_s32(__rev1_131, __p2_131)); \ | 32484 | bfloat16x8_t __rev1_131; __rev1_131 = __builtin_shufflevector(__s1_131, __s1_131, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32401 | __ret_131 = __builtin_shufflevector(__ret_131, __ret_131, 1, 0); \ | 32485 | bfloat16x8_t __rev2_131; __rev2_131 = __builtin_shufflevector(__s2_131, __s2_131, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 32486 | bfloat16x8_t __reint_131 = __rev2_131; \ |
| | 32487 | float32x4_t __reint1_131 = __noswap_splatq_laneq_f32(*(float32x4_t *) &__reint_131, __p3_131); \ |
| | 32488 | __ret_131 = __noswap_vbfdotq_f32(__rev0_131, __rev1_131, *(bfloat16x8_t *) &__reint1_131); \ |
| | 32489 | __ret_131 = __builtin_shufflevector(__ret_131, __ret_131, 3, 2, 1, 0); \ |
| 32402 | __ret_131; \ | 32490 | __ret_131; \ |
| 32403 | }) | 32491 | }) |
| 32404 | #endif | 32492 | #endif |
| 32405 | | 32493 | |
| 32406 | #ifdef __LITTLE_ENDIAN__ | 32494 | #ifdef __LITTLE_ENDIAN__ |
| 32407 | #define vqdmulh_lane_s16(__p0_132, __p1_132, __p2_132) __extension__ ({ \ | 32495 | #define vbfdot_laneq_f32(__p0_132, __p1_132, __p2_132, __p3_132) __extension__ ({ \ |
| 32408 | int16x4_t __ret_132; \ | 32496 | float32x2_t __ret_132; \ |
| 32409 | int16x4_t __s0_132 = __p0_132; \ | 32497 | float32x2_t __s0_132 = __p0_132; \ |
| 32410 | int16x4_t __s1_132 = __p1_132; \ | 32498 | bfloat16x4_t __s1_132 = __p1_132; \ |
| 32411 | __ret_132 = vqdmulh_s16(__s0_132, splat_lane_s16(__s1_132, __p2_132)); \ | 32499 | bfloat16x8_t __s2_132 = __p2_132; \ |
| | 32500 | bfloat16x8_t __reint_132 = __s2_132; \ |
| | 32501 | float32x2_t __reint1_132 = splat_laneq_f32(*(float32x4_t *) &__reint_132, __p3_132); \ |
| | 32502 | __ret_132 = vbfdot_f32(__s0_132, __s1_132, *(bfloat16x4_t *) &__reint1_132); \ |
| 32412 | __ret_132; \ | 32503 | __ret_132; \ |
| 32413 | }) | 32504 | }) |
| 32414 | #else | 32505 | #else |
| 32415 | #define vqdmulh_lane_s16(__p0_133, __p1_133, __p2_133) __extension__ ({ \ | 32506 | #define vbfdot_laneq_f32(__p0_133, __p1_133, __p2_133, __p3_133) __extension__ ({ \ |
| 32416 | int16x4_t __ret_133; \ | 32507 | float32x2_t __ret_133; \ |
| 32417 | int16x4_t __s0_133 = __p0_133; \ | 32508 | float32x2_t __s0_133 = __p0_133; \ |
| 32418 | int16x4_t __s1_133 = __p1_133; \ | 32509 | bfloat16x4_t __s1_133 = __p1_133; \ |
| 32419 | int16x4_t __rev0_133; __rev0_133 = __builtin_shufflevector(__s0_133, __s0_133, 3, 2, 1, 0); \ | 32510 | bfloat16x8_t __s2_133 = __p2_133; \ |
| 32420 | int16x4_t __rev1_133; __rev1_133 = __builtin_shufflevector(__s1_133, __s1_133, 3, 2, 1, 0); \ | 32511 | float32x2_t __rev0_133; __rev0_133 = __builtin_shufflevector(__s0_133, __s0_133, 1, 0); \ |
| 32421 | __ret_133 = __noswap_vqdmulh_s16(__rev0_133, __noswap_splat_lane_s16(__rev1_133, __p2_133)); \ | 32512 | bfloat16x4_t __rev1_133; __rev1_133 = __builtin_shufflevector(__s1_133, __s1_133, 3, 2, 1, 0); \ |
| 32422 | __ret_133 = __builtin_shufflevector(__ret_133, __ret_133, 3, 2, 1, 0); \ | 32513 | bfloat16x8_t __rev2_133; __rev2_133 = __builtin_shufflevector(__s2_133, __s2_133, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 32514 | bfloat16x8_t __reint_133 = __rev2_133; \ |
| | 32515 | float32x2_t __reint1_133 = __noswap_splat_laneq_f32(*(float32x4_t *) &__reint_133, __p3_133); \ |
| | 32516 | __ret_133 = __noswap_vbfdot_f32(__rev0_133, __rev1_133, *(bfloat16x4_t *) &__reint1_133); \ |
| | 32517 | __ret_133 = __builtin_shufflevector(__ret_133, __ret_133, 1, 0); \ |
| 32423 | __ret_133; \ | 32518 | __ret_133; \ |
| 32424 | }) | 32519 | }) |
| 32425 | #endif | 32520 | #endif |
| 32426 | | 32521 | |
| 32427 | #ifdef __LITTLE_ENDIAN__ | 32522 | #ifdef __LITTLE_ENDIAN__ |
| 32428 | #define vqrdmulhq_lane_s32(__p0_134, __p1_134, __p2_134) __extension__ ({ \ | 32523 | __ai __attribute__((target("bf16"))) float32x4_t vbfmlalbq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { |
| 32429 | int32x4_t __ret_134; \ | 32524 | float32x4_t __ret; |
| 32430 | int32x4_t __s0_134 = __p0_134; \ | 32525 | __ret = (float32x4_t) __builtin_neon_vbfmlalbq_f32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 32431 | int32x2_t __s1_134 = __p1_134; \ | | |
| 32432 | __ret_134 = vqrdmulhq_s32(__s0_134, splatq_lane_s32(__s1_134, __p2_134)); \ | | |
| 32433 | __ret_134; \ | | |
| 32434 | }) | | |
| 32435 | #else | | |
| 32436 | #define vqrdmulhq_lane_s32(__p0_135, __p1_135, __p2_135) __extension__ ({ \ | | |
| 32437 | int32x4_t __ret_135; \ | | |
| 32438 | int32x4_t __s0_135 = __p0_135; \ | | |
| 32439 | int32x2_t __s1_135 = __p1_135; \ | | |
| 32440 | int32x4_t __rev0_135; __rev0_135 = __builtin_shufflevector(__s0_135, __s0_135, 3, 2, 1, 0); \ | | |
| 32441 | int32x2_t __rev1_135; __rev1_135 = __builtin_shufflevector(__s1_135, __s1_135, 1, 0); \ | | |
| 32442 | __ret_135 = __noswap_vqrdmulhq_s32(__rev0_135, __noswap_splatq_lane_s32(__rev1_135, __p2_135)); \ | | |
| 32443 | __ret_135 = __builtin_shufflevector(__ret_135, __ret_135, 3, 2, 1, 0); \ | | |
| 32444 | __ret_135; \ | | |
| 32445 | }) | | |
| 32446 | #endif | | |
| 32447 | | | |
| 32448 | #ifdef __LITTLE_ENDIAN__ | | |
| 32449 | #define vqrdmulhq_lane_s16(__p0_136, __p1_136, __p2_136) __extension__ ({ \ | | |
| 32450 | int16x8_t __ret_136; \ | | |
| 32451 | int16x8_t __s0_136 = __p0_136; \ | | |
| 32452 | int16x4_t __s1_136 = __p1_136; \ | | |
| 32453 | __ret_136 = vqrdmulhq_s16(__s0_136, splatq_lane_s16(__s1_136, __p2_136)); \ | | |
| 32454 | __ret_136; \ | | |
| 32455 | }) | | |
| 32456 | #else | | |
| 32457 | #define vqrdmulhq_lane_s16(__p0_137, __p1_137, __p2_137) __extension__ ({ \ | | |
| 32458 | int16x8_t __ret_137; \ | | |
| 32459 | int16x8_t __s0_137 = __p0_137; \ | | |
| 32460 | int16x4_t __s1_137 = __p1_137; \ | | |
| 32461 | int16x8_t __rev0_137; __rev0_137 = __builtin_shufflevector(__s0_137, __s0_137, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 32462 | int16x4_t __rev1_137; __rev1_137 = __builtin_shufflevector(__s1_137, __s1_137, 3, 2, 1, 0); \ | | |
| 32463 | __ret_137 = __noswap_vqrdmulhq_s16(__rev0_137, __noswap_splatq_lane_s16(__rev1_137, __p2_137)); \ | | |
| 32464 | __ret_137 = __builtin_shufflevector(__ret_137, __ret_137, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 32465 | __ret_137; \ | | |
| 32466 | }) | | |
| 32467 | #endif | | |
| 32468 | | | |
| 32469 | #ifdef __LITTLE_ENDIAN__ | | |
| 32470 | #define vqrdmulh_lane_s32(__p0_138, __p1_138, __p2_138) __extension__ ({ \ | | |
| 32471 | int32x2_t __ret_138; \ | | |
| 32472 | int32x2_t __s0_138 = __p0_138; \ | | |
| 32473 | int32x2_t __s1_138 = __p1_138; \ | | |
| 32474 | __ret_138 = vqrdmulh_s32(__s0_138, splat_lane_s32(__s1_138, __p2_138)); \ | | |
| 32475 | __ret_138; \ | | |
| 32476 | }) | | |
| 32477 | #else | | |
| 32478 | #define vqrdmulh_lane_s32(__p0_139, __p1_139, __p2_139) __extension__ ({ \ | | |
| 32479 | int32x2_t __ret_139; \ | | |
| 32480 | int32x2_t __s0_139 = __p0_139; \ | | |
| 32481 | int32x2_t __s1_139 = __p1_139; \ | | |
| 32482 | int32x2_t __rev0_139; __rev0_139 = __builtin_shufflevector(__s0_139, __s0_139, 1, 0); \ | | |
| 32483 | int32x2_t __rev1_139; __rev1_139 = __builtin_shufflevector(__s1_139, __s1_139, 1, 0); \ | | |
| 32484 | __ret_139 = __noswap_vqrdmulh_s32(__rev0_139, __noswap_splat_lane_s32(__rev1_139, __p2_139)); \ | | |
| 32485 | __ret_139 = __builtin_shufflevector(__ret_139, __ret_139, 1, 0); \ | | |
| 32486 | __ret_139; \ | | |
| 32487 | }) | | |
| 32488 | #endif | | |
| 32489 | | | |
| 32490 | #ifdef __LITTLE_ENDIAN__ | | |
| 32491 | #define vqrdmulh_lane_s16(__p0_140, __p1_140, __p2_140) __extension__ ({ \ | | |
| 32492 | int16x4_t __ret_140; \ | | |
| 32493 | int16x4_t __s0_140 = __p0_140; \ | | |
| 32494 | int16x4_t __s1_140 = __p1_140; \ | | |
| 32495 | __ret_140 = vqrdmulh_s16(__s0_140, splat_lane_s16(__s1_140, __p2_140)); \ | | |
| 32496 | __ret_140; \ | | |
| 32497 | }) | | |
| 32498 | #else | | |
| 32499 | #define vqrdmulh_lane_s16(__p0_141, __p1_141, __p2_141) __extension__ ({ \ | | |
| 32500 | int16x4_t __ret_141; \ | | |
| 32501 | int16x4_t __s0_141 = __p0_141; \ | | |
| 32502 | int16x4_t __s1_141 = __p1_141; \ | | |
| 32503 | int16x4_t __rev0_141; __rev0_141 = __builtin_shufflevector(__s0_141, __s0_141, 3, 2, 1, 0); \ | | |
| 32504 | int16x4_t __rev1_141; __rev1_141 = __builtin_shufflevector(__s1_141, __s1_141, 3, 2, 1, 0); \ | | |
| 32505 | __ret_141 = __noswap_vqrdmulh_s16(__rev0_141, __noswap_splat_lane_s16(__rev1_141, __p2_141)); \ | | |
| 32506 | __ret_141 = __builtin_shufflevector(__ret_141, __ret_141, 3, 2, 1, 0); \ | | |
| 32507 | __ret_141; \ | | |
| 32508 | }) | | |
| 32509 | #endif | | |
| 32510 | | | |
| 32511 | __ai poly8x8_t vreinterpret_p8_p16(poly16x4_t __p0) { | | |
| 32512 | poly8x8_t __ret; | | |
| 32513 | __ret = (poly8x8_t)(__p0); | | |
| 32514 | return __ret; | | |
| 32515 | } | | |
| 32516 | __ai poly8x8_t vreinterpret_p8_u8(uint8x8_t __p0) { | | |
| 32517 | poly8x8_t __ret; | | |
| 32518 | __ret = (poly8x8_t)(__p0); | | |
| 32519 | return __ret; | | |
| 32520 | } | | |
| 32521 | __ai poly8x8_t vreinterpret_p8_u32(uint32x2_t __p0) { | | |
| 32522 | poly8x8_t __ret; | | |
| 32523 | __ret = (poly8x8_t)(__p0); | | |
| 32524 | return __ret; | | |
| 32525 | } | | |
| 32526 | __ai poly8x8_t vreinterpret_p8_u64(uint64x1_t __p0) { | | |
| 32527 | poly8x8_t __ret; | | |
| 32528 | __ret = (poly8x8_t)(__p0); | | |
| 32529 | return __ret; | | |
| 32530 | } | | |
| 32531 | __ai poly8x8_t vreinterpret_p8_u16(uint16x4_t __p0) { | | |
| 32532 | poly8x8_t __ret; | | |
| 32533 | __ret = (poly8x8_t)(__p0); | | |
| 32534 | return __ret; | | |
| 32535 | } | | |
| 32536 | __ai poly8x8_t vreinterpret_p8_s8(int8x8_t __p0) { | | |
| 32537 | poly8x8_t __ret; | | |
| 32538 | __ret = (poly8x8_t)(__p0); | | |
| 32539 | return __ret; | | |
| 32540 | } | | |
| 32541 | __ai poly8x8_t vreinterpret_p8_f32(float32x2_t __p0) { | | |
| 32542 | poly8x8_t __ret; | | |
| 32543 | __ret = (poly8x8_t)(__p0); | | |
| 32544 | return __ret; | | |
| 32545 | } | | |
| 32546 | __ai poly8x8_t vreinterpret_p8_f16(float16x4_t __p0) { | | |
| 32547 | poly8x8_t __ret; | | |
| 32548 | __ret = (poly8x8_t)(__p0); | | |
| 32549 | return __ret; | | |
| 32550 | } | | |
| 32551 | __ai poly8x8_t vreinterpret_p8_s32(int32x2_t __p0) { | | |
| 32552 | poly8x8_t __ret; | | |
| 32553 | __ret = (poly8x8_t)(__p0); | | |
| 32554 | return __ret; | | |
| 32555 | } | | |
| 32556 | __ai poly8x8_t vreinterpret_p8_s64(int64x1_t __p0) { | | |
| 32557 | poly8x8_t __ret; | | |
| 32558 | __ret = (poly8x8_t)(__p0); | | |
| 32559 | return __ret; | | |
| 32560 | } | | |
| 32561 | __ai poly8x8_t vreinterpret_p8_s16(int16x4_t __p0) { | | |
| 32562 | poly8x8_t __ret; | | |
| 32563 | __ret = (poly8x8_t)(__p0); | | |
| 32564 | return __ret; | | |
| 32565 | } | | |
| 32566 | __ai poly16x4_t vreinterpret_p16_p8(poly8x8_t __p0) { | | |
| 32567 | poly16x4_t __ret; | | |
| 32568 | __ret = (poly16x4_t)(__p0); | | |
| 32569 | return __ret; | | |
| 32570 | } | | |
| 32571 | __ai poly16x4_t vreinterpret_p16_u8(uint8x8_t __p0) { | | |
| 32572 | poly16x4_t __ret; | | |
| 32573 | __ret = (poly16x4_t)(__p0); | | |
| 32574 | return __ret; | 32526 | return __ret; |
| 32575 | } | 32527 | } |
| 32576 | __ai poly16x4_t vreinterpret_p16_u32(uint32x2_t __p0) { | 32528 | #else |
| 32577 | poly16x4_t __ret; | 32529 | __ai __attribute__((target("bf16"))) float32x4_t vbfmlalbq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { |
| 32578 | __ret = (poly16x4_t)(__p0); | 32530 | float32x4_t __ret; |
| | 32531 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 32532 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 32533 | bfloat16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 32534 | __ret = (float32x4_t) __builtin_neon_vbfmlalbq_f32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); |
| | 32535 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 32579 | return __ret; | 32536 | return __ret; |
| 32580 | } | 32537 | } |
| 32581 | __ai poly16x4_t vreinterpret_p16_u64(uint64x1_t __p0) { | 32538 | __ai __attribute__((target("bf16"))) float32x4_t __noswap_vbfmlalbq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { |
| 32582 | poly16x4_t __ret; | 32539 | float32x4_t __ret; |
| 32583 | __ret = (poly16x4_t)(__p0); | 32540 | __ret = (float32x4_t) __builtin_neon_vbfmlalbq_f32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 32584 | return __ret; | 32541 | return __ret; |
| 32585 | } | 32542 | } |
| 32586 | __ai poly16x4_t vreinterpret_p16_u16(uint16x4_t __p0) { | 32543 | #endif |
| 32587 | poly16x4_t __ret; | 32544 | |
| 32588 | __ret = (poly16x4_t)(__p0); | 32545 | #ifdef __LITTLE_ENDIAN__ |
| | 32546 | __ai __attribute__((target("bf16"))) float32x4_t vbfmlaltq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { |
| | 32547 | float32x4_t __ret; |
| | 32548 | __ret = (float32x4_t) __builtin_neon_vbfmlaltq_f32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 32589 | return __ret; | 32549 | return __ret; |
| 32590 | } | 32550 | } |
| 32591 | __ai poly16x4_t vreinterpret_p16_s8(int8x8_t __p0) { | 32551 | #else |
| 32592 | poly16x4_t __ret; | 32552 | __ai __attribute__((target("bf16"))) float32x4_t vbfmlaltq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { |
| 32593 | __ret = (poly16x4_t)(__p0); | 32553 | float32x4_t __ret; |
| | 32554 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 32555 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 32556 | bfloat16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 32557 | __ret = (float32x4_t) __builtin_neon_vbfmlaltq_f32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); |
| | 32558 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 32594 | return __ret; | 32559 | return __ret; |
| 32595 | } | 32560 | } |
| 32596 | __ai poly16x4_t vreinterpret_p16_f32(float32x2_t __p0) { | 32561 | __ai __attribute__((target("bf16"))) float32x4_t __noswap_vbfmlaltq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { |
| 32597 | poly16x4_t __ret; | 32562 | float32x4_t __ret; |
| 32598 | __ret = (poly16x4_t)(__p0); | 32563 | __ret = (float32x4_t) __builtin_neon_vbfmlaltq_f32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 32599 | return __ret; | 32564 | return __ret; |
| 32600 | } | 32565 | } |
| 32601 | __ai poly16x4_t vreinterpret_p16_f16(float16x4_t __p0) { | 32566 | #endif |
| 32602 | poly16x4_t __ret; | 32567 | |
| 32603 | __ret = (poly16x4_t)(__p0); | 32568 | #ifdef __LITTLE_ENDIAN__ |
| | 32569 | __ai __attribute__((target("bf16"))) float32x4_t vbfmmlaq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { |
| | 32570 | float32x4_t __ret; |
| | 32571 | __ret = (float32x4_t) __builtin_neon_vbfmmlaq_f32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 32604 | return __ret; | 32572 | return __ret; |
| 32605 | } | 32573 | } |
| 32606 | __ai poly16x4_t vreinterpret_p16_s32(int32x2_t __p0) { | 32574 | #else |
| 32607 | poly16x4_t __ret; | 32575 | __ai __attribute__((target("bf16"))) float32x4_t vbfmmlaq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { |
| 32608 | __ret = (poly16x4_t)(__p0); | 32576 | float32x4_t __ret; |
| | 32577 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 32578 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 32579 | bfloat16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 32580 | __ret = (float32x4_t) __builtin_neon_vbfmmlaq_f32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); |
| | 32581 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 32609 | return __ret; | 32582 | return __ret; |
| 32610 | } | 32583 | } |
| 32611 | __ai poly16x4_t vreinterpret_p16_s64(int64x1_t __p0) { | 32584 | #endif |
| 32612 | poly16x4_t __ret; | 32585 | |
| 32613 | __ret = (poly16x4_t)(__p0); | 32586 | #ifdef __LITTLE_ENDIAN__ |
| | 32587 | __ai __attribute__((target("bf16"))) bfloat16x8_t vcombine_bf16(bfloat16x4_t __p0, bfloat16x4_t __p1) { |
| | 32588 | bfloat16x8_t __ret; |
| | 32589 | __ret = __builtin_shufflevector(__p0, __p1, 0, 1, 2, 3, 4, 5, 6, 7); |
| 32614 | return __ret; | 32590 | return __ret; |
| 32615 | } | 32591 | } |
| 32616 | __ai poly16x4_t vreinterpret_p16_s16(int16x4_t __p0) { | 32592 | #else |
| 32617 | poly16x4_t __ret; | 32593 | __ai __attribute__((target("bf16"))) bfloat16x8_t vcombine_bf16(bfloat16x4_t __p0, bfloat16x4_t __p1) { |
| 32618 | __ret = (poly16x4_t)(__p0); | 32594 | bfloat16x8_t __ret; |
| | 32595 | bfloat16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 32596 | bfloat16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 32597 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 1, 2, 3, 4, 5, 6, 7); |
| | 32598 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 32619 | return __ret; | 32599 | return __ret; |
| 32620 | } | 32600 | } |
| 32621 | __ai poly8x16_t vreinterpretq_p8_p16(poly16x8_t __p0) { | 32601 | __ai __attribute__((target("bf16"))) bfloat16x8_t __noswap_vcombine_bf16(bfloat16x4_t __p0, bfloat16x4_t __p1) { |
| 32622 | poly8x16_t __ret; | 32602 | bfloat16x8_t __ret; |
| 32623 | __ret = (poly8x16_t)(__p0); | 32603 | __ret = __builtin_shufflevector(__p0, __p1, 0, 1, 2, 3, 4, 5, 6, 7); |
| 32624 | return __ret; | 32604 | return __ret; |
| 32625 | } | 32605 | } |
| 32626 | __ai poly8x16_t vreinterpretq_p8_u8(uint8x16_t __p0) { | 32606 | #endif |
| 32627 | poly8x16_t __ret; | 32607 | |
| 32628 | __ret = (poly8x16_t)(__p0); | 32608 | #define vcreate_bf16(__p0) __extension__ ({ \ |
| 32629 | return __ret; | 32609 | bfloat16x4_t __ret; \ |
| | 32610 | uint64_t __promote = __p0; \ |
| | 32611 | __ret = (bfloat16x4_t)(__promote); \ |
| | 32612 | __ret; \ |
| | 32613 | }) |
| | 32614 | #ifdef __LITTLE_ENDIAN__ |
| | 32615 | __ai __attribute__((target("bf16"))) float32x4_t vcvt_f32_bf16(bfloat16x4_t __p0_134) { |
| | 32616 | float32x4_t __ret_134; |
| | 32617 | bfloat16x4_t __reint_134 = __p0_134; |
| | 32618 | int32x4_t __reint1_134 = vshll_n_s16(*(int16x4_t *) &__reint_134, 16); |
| | 32619 | __ret_134 = *(float32x4_t *) &__reint1_134; |
| | 32620 | return __ret_134; |
| 32630 | } | 32621 | } |
| 32631 | __ai poly8x16_t vreinterpretq_p8_u32(uint32x4_t __p0) { | 32622 | #else |
| 32632 | poly8x16_t __ret; | 32623 | __ai __attribute__((target("bf16"))) float32x4_t vcvt_f32_bf16(bfloat16x4_t __p0_135) { |
| 32633 | __ret = (poly8x16_t)(__p0); | 32624 | float32x4_t __ret_135; |
| 32634 | return __ret; | 32625 | bfloat16x4_t __rev0_135; __rev0_135 = __builtin_shufflevector(__p0_135, __p0_135, 3, 2, 1, 0); |
| | 32626 | bfloat16x4_t __reint_135 = __rev0_135; |
| | 32627 | int32x4_t __reint1_135 = __noswap_vshll_n_s16(*(int16x4_t *) &__reint_135, 16); |
| | 32628 | __ret_135 = *(float32x4_t *) &__reint1_135; |
| | 32629 | __ret_135 = __builtin_shufflevector(__ret_135, __ret_135, 3, 2, 1, 0); |
| | 32630 | return __ret_135; |
| 32635 | } | 32631 | } |
| 32636 | __ai poly8x16_t vreinterpretq_p8_u64(uint64x2_t __p0) { | 32632 | __ai __attribute__((target("bf16"))) float32x4_t __noswap_vcvt_f32_bf16(bfloat16x4_t __p0_136) { |
| 32637 | poly8x16_t __ret; | 32633 | float32x4_t __ret_136; |
| 32638 | __ret = (poly8x16_t)(__p0); | 32634 | bfloat16x4_t __reint_136 = __p0_136; |
| 32639 | return __ret; | 32635 | int32x4_t __reint1_136 = __noswap_vshll_n_s16(*(int16x4_t *) &__reint_136, 16); |
| | 32636 | __ret_136 = *(float32x4_t *) &__reint1_136; |
| | 32637 | return __ret_136; |
| 32640 | } | 32638 | } |
| 32641 | __ai poly8x16_t vreinterpretq_p8_u16(uint16x8_t __p0) { | 32639 | #endif |
| 32642 | poly8x16_t __ret; | 32640 | |
| 32643 | __ret = (poly8x16_t)(__p0); | 32641 | __ai __attribute__((target("bf16"))) float32_t vcvtah_f32_bf16(bfloat16_t __p0) { |
| | 32642 | float32_t __ret; |
| | 32643 | bfloat16_t __reint = __p0; |
| | 32644 | int32_t __reint1 = *(int32_t *) &__reint << 16; |
| | 32645 | __ret = *(float32_t *) &__reint1; |
| 32644 | return __ret; | 32646 | return __ret; |
| 32645 | } | 32647 | } |
| 32646 | __ai poly8x16_t vreinterpretq_p8_s8(int8x16_t __p0) { | 32648 | __ai __attribute__((target("bf16"))) bfloat16_t vcvth_bf16_f32(float32_t __p0) { |
| 32647 | poly8x16_t __ret; | 32649 | bfloat16_t __ret; |
| 32648 | __ret = (poly8x16_t)(__p0); | 32650 | __ret = (bfloat16_t) __builtin_neon_vcvth_bf16_f32(__p0); |
| 32649 | return __ret; | 32651 | return __ret; |
| 32650 | } | 32652 | } |
| 32651 | __ai poly8x16_t vreinterpretq_p8_f32(float32x4_t __p0) { | 32653 | #ifdef __LITTLE_ENDIAN__ |
| 32652 | poly8x16_t __ret; | 32654 | #define vduph_lane_bf16(__p0, __p1) __extension__ ({ \ |
| 32653 | __ret = (poly8x16_t)(__p0); | 32655 | bfloat16_t __ret; \ |
| | 32656 | bfloat16x4_t __s0 = __p0; \ |
| | 32657 | __ret = (bfloat16_t) __builtin_neon_vduph_lane_bf16((bfloat16x4_t)__s0, __p1); \ |
| | 32658 | __ret; \ |
| | 32659 | }) |
| | 32660 | #else |
| | 32661 | #define vduph_lane_bf16(__p0, __p1) __extension__ ({ \ |
| | 32662 | bfloat16_t __ret; \ |
| | 32663 | bfloat16x4_t __s0 = __p0; \ |
| | 32664 | bfloat16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| | 32665 | __ret = (bfloat16_t) __builtin_neon_vduph_lane_bf16((bfloat16x4_t)__rev0, __p1); \ |
| | 32666 | __ret; \ |
| | 32667 | }) |
| | 32668 | #endif |
| | 32669 | |
| | 32670 | #ifdef __LITTLE_ENDIAN__ |
| | 32671 | #define vdupq_lane_bf16(__p0_137, __p1_137) __extension__ ({ \ |
| | 32672 | bfloat16x8_t __ret_137; \ |
| | 32673 | bfloat16x4_t __s0_137 = __p0_137; \ |
| | 32674 | __ret_137 = splatq_lane_bf16(__s0_137, __p1_137); \ |
| | 32675 | __ret_137; \ |
| | 32676 | }) |
| | 32677 | #else |
| | 32678 | #define vdupq_lane_bf16(__p0_138, __p1_138) __extension__ ({ \ |
| | 32679 | bfloat16x8_t __ret_138; \ |
| | 32680 | bfloat16x4_t __s0_138 = __p0_138; \ |
| | 32681 | bfloat16x4_t __rev0_138; __rev0_138 = __builtin_shufflevector(__s0_138, __s0_138, 3, 2, 1, 0); \ |
| | 32682 | __ret_138 = __noswap_splatq_lane_bf16(__rev0_138, __p1_138); \ |
| | 32683 | __ret_138 = __builtin_shufflevector(__ret_138, __ret_138, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 32684 | __ret_138; \ |
| | 32685 | }) |
| | 32686 | #endif |
| | 32687 | |
| | 32688 | #ifdef __LITTLE_ENDIAN__ |
| | 32689 | #define vdup_lane_bf16(__p0_139, __p1_139) __extension__ ({ \ |
| | 32690 | bfloat16x4_t __ret_139; \ |
| | 32691 | bfloat16x4_t __s0_139 = __p0_139; \ |
| | 32692 | __ret_139 = splat_lane_bf16(__s0_139, __p1_139); \ |
| | 32693 | __ret_139; \ |
| | 32694 | }) |
| | 32695 | #else |
| | 32696 | #define vdup_lane_bf16(__p0_140, __p1_140) __extension__ ({ \ |
| | 32697 | bfloat16x4_t __ret_140; \ |
| | 32698 | bfloat16x4_t __s0_140 = __p0_140; \ |
| | 32699 | bfloat16x4_t __rev0_140; __rev0_140 = __builtin_shufflevector(__s0_140, __s0_140, 3, 2, 1, 0); \ |
| | 32700 | __ret_140 = __noswap_splat_lane_bf16(__rev0_140, __p1_140); \ |
| | 32701 | __ret_140 = __builtin_shufflevector(__ret_140, __ret_140, 3, 2, 1, 0); \ |
| | 32702 | __ret_140; \ |
| | 32703 | }) |
| | 32704 | #endif |
| | 32705 | |
| | 32706 | #ifdef __LITTLE_ENDIAN__ |
| | 32707 | #define vduph_laneq_bf16(__p0, __p1) __extension__ ({ \ |
| | 32708 | bfloat16_t __ret; \ |
| | 32709 | bfloat16x8_t __s0 = __p0; \ |
| | 32710 | __ret = (bfloat16_t) __builtin_neon_vduph_laneq_bf16((bfloat16x8_t)__s0, __p1); \ |
| | 32711 | __ret; \ |
| | 32712 | }) |
| | 32713 | #else |
| | 32714 | #define vduph_laneq_bf16(__p0, __p1) __extension__ ({ \ |
| | 32715 | bfloat16_t __ret; \ |
| | 32716 | bfloat16x8_t __s0 = __p0; \ |
| | 32717 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 32718 | __ret = (bfloat16_t) __builtin_neon_vduph_laneq_bf16((bfloat16x8_t)__rev0, __p1); \ |
| | 32719 | __ret; \ |
| | 32720 | }) |
| | 32721 | #endif |
| | 32722 | |
| | 32723 | #ifdef __LITTLE_ENDIAN__ |
| | 32724 | #define vdupq_laneq_bf16(__p0_141, __p1_141) __extension__ ({ \ |
| | 32725 | bfloat16x8_t __ret_141; \ |
| | 32726 | bfloat16x8_t __s0_141 = __p0_141; \ |
| | 32727 | __ret_141 = splatq_laneq_bf16(__s0_141, __p1_141); \ |
| | 32728 | __ret_141; \ |
| | 32729 | }) |
| | 32730 | #else |
| | 32731 | #define vdupq_laneq_bf16(__p0_142, __p1_142) __extension__ ({ \ |
| | 32732 | bfloat16x8_t __ret_142; \ |
| | 32733 | bfloat16x8_t __s0_142 = __p0_142; \ |
| | 32734 | bfloat16x8_t __rev0_142; __rev0_142 = __builtin_shufflevector(__s0_142, __s0_142, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 32735 | __ret_142 = __noswap_splatq_laneq_bf16(__rev0_142, __p1_142); \ |
| | 32736 | __ret_142 = __builtin_shufflevector(__ret_142, __ret_142, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 32737 | __ret_142; \ |
| | 32738 | }) |
| | 32739 | #endif |
| | 32740 | |
| | 32741 | #ifdef __LITTLE_ENDIAN__ |
| | 32742 | #define vdup_laneq_bf16(__p0_143, __p1_143) __extension__ ({ \ |
| | 32743 | bfloat16x4_t __ret_143; \ |
| | 32744 | bfloat16x8_t __s0_143 = __p0_143; \ |
| | 32745 | __ret_143 = splat_laneq_bf16(__s0_143, __p1_143); \ |
| | 32746 | __ret_143; \ |
| | 32747 | }) |
| | 32748 | #else |
| | 32749 | #define vdup_laneq_bf16(__p0_144, __p1_144) __extension__ ({ \ |
| | 32750 | bfloat16x4_t __ret_144; \ |
| | 32751 | bfloat16x8_t __s0_144 = __p0_144; \ |
| | 32752 | bfloat16x8_t __rev0_144; __rev0_144 = __builtin_shufflevector(__s0_144, __s0_144, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 32753 | __ret_144 = __noswap_splat_laneq_bf16(__rev0_144, __p1_144); \ |
| | 32754 | __ret_144 = __builtin_shufflevector(__ret_144, __ret_144, 3, 2, 1, 0); \ |
| | 32755 | __ret_144; \ |
| | 32756 | }) |
| | 32757 | #endif |
| | 32758 | |
| | 32759 | #ifdef __LITTLE_ENDIAN__ |
| | 32760 | __ai __attribute__((target("bf16"))) bfloat16x8_t vdupq_n_bf16(bfloat16_t __p0) { |
| | 32761 | bfloat16x8_t __ret; |
| | 32762 | __ret = (bfloat16x8_t) {__p0, __p0, __p0, __p0, __p0, __p0, __p0, __p0}; |
| 32654 | return __ret; | 32763 | return __ret; |
| 32655 | } | 32764 | } |
| 32656 | __ai poly8x16_t vreinterpretq_p8_f16(float16x8_t __p0) { | 32765 | #else |
| 32657 | poly8x16_t __ret; | 32766 | __ai __attribute__((target("bf16"))) bfloat16x8_t vdupq_n_bf16(bfloat16_t __p0) { |
| 32658 | __ret = (poly8x16_t)(__p0); | 32767 | bfloat16x8_t __ret; |
| | 32768 | __ret = (bfloat16x8_t) {__p0, __p0, __p0, __p0, __p0, __p0, __p0, __p0}; |
| | 32769 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 32659 | return __ret; | 32770 | return __ret; |
| 32660 | } | 32771 | } |
| 32661 | __ai poly8x16_t vreinterpretq_p8_s32(int32x4_t __p0) { | 32772 | #endif |
| 32662 | poly8x16_t __ret; | 32773 | |
| 32663 | __ret = (poly8x16_t)(__p0); | 32774 | #ifdef __LITTLE_ENDIAN__ |
| | 32775 | __ai __attribute__((target("bf16"))) bfloat16x4_t vdup_n_bf16(bfloat16_t __p0) { |
| | 32776 | bfloat16x4_t __ret; |
| | 32777 | __ret = (bfloat16x4_t) {__p0, __p0, __p0, __p0}; |
| 32664 | return __ret; | 32778 | return __ret; |
| 32665 | } | 32779 | } |
| 32666 | __ai poly8x16_t vreinterpretq_p8_s64(int64x2_t __p0) { | 32780 | #else |
| 32667 | poly8x16_t __ret; | 32781 | __ai __attribute__((target("bf16"))) bfloat16x4_t vdup_n_bf16(bfloat16_t __p0) { |
| 32668 | __ret = (poly8x16_t)(__p0); | 32782 | bfloat16x4_t __ret; |
| | 32783 | __ret = (bfloat16x4_t) {__p0, __p0, __p0, __p0}; |
| | 32784 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 32669 | return __ret; | 32785 | return __ret; |
| 32670 | } | 32786 | } |
| 32671 | __ai poly8x16_t vreinterpretq_p8_s16(int16x8_t __p0) { | 32787 | #endif |
| 32672 | poly8x16_t __ret; | 32788 | |
| 32673 | __ret = (poly8x16_t)(__p0); | 32789 | #ifdef __LITTLE_ENDIAN__ |
| | 32790 | __ai __attribute__((target("bf16"))) bfloat16x4_t vget_high_bf16(bfloat16x8_t __p0) { |
| | 32791 | bfloat16x4_t __ret; |
| | 32792 | __ret = __builtin_shufflevector(__p0, __p0, 4, 5, 6, 7); |
| 32674 | return __ret; | 32793 | return __ret; |
| 32675 | } | 32794 | } |
| 32676 | __ai poly16x8_t vreinterpretq_p16_p8(poly8x16_t __p0) { | 32795 | #else |
| 32677 | poly16x8_t __ret; | 32796 | __ai __attribute__((target("bf16"))) bfloat16x4_t vget_high_bf16(bfloat16x8_t __p0) { |
| 32678 | __ret = (poly16x8_t)(__p0); | 32797 | bfloat16x4_t __ret; |
| | 32798 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 32799 | __ret = __builtin_shufflevector(__rev0, __rev0, 4, 5, 6, 7); |
| | 32800 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 32679 | return __ret; | 32801 | return __ret; |
| 32680 | } | 32802 | } |
| 32681 | __ai poly16x8_t vreinterpretq_p16_u8(uint8x16_t __p0) { | 32803 | __ai __attribute__((target("bf16"))) bfloat16x4_t __noswap_vget_high_bf16(bfloat16x8_t __p0) { |
| 32682 | poly16x8_t __ret; | 32804 | bfloat16x4_t __ret; |
| 32683 | __ret = (poly16x8_t)(__p0); | 32805 | __ret = __builtin_shufflevector(__p0, __p0, 4, 5, 6, 7); |
| 32684 | return __ret; | 32806 | return __ret; |
| 32685 | } | 32807 | } |
| 32686 | __ai poly16x8_t vreinterpretq_p16_u32(uint32x4_t __p0) { | 32808 | #endif |
| 32687 | poly16x8_t __ret; | 32809 | |
| 32688 | __ret = (poly16x8_t)(__p0); | 32810 | #ifdef __LITTLE_ENDIAN__ |
| | 32811 | #define vgetq_lane_bf16(__p0, __p1) __extension__ ({ \ |
| | 32812 | bfloat16_t __ret; \ |
| | 32813 | bfloat16x8_t __s0 = __p0; \ |
| | 32814 | __ret = (bfloat16_t) __builtin_neon_vgetq_lane_bf16((bfloat16x8_t)__s0, __p1); \ |
| | 32815 | __ret; \ |
| | 32816 | }) |
| | 32817 | #else |
| | 32818 | #define vgetq_lane_bf16(__p0, __p1) __extension__ ({ \ |
| | 32819 | bfloat16_t __ret; \ |
| | 32820 | bfloat16x8_t __s0 = __p0; \ |
| | 32821 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 32822 | __ret = (bfloat16_t) __builtin_neon_vgetq_lane_bf16((bfloat16x8_t)__rev0, __p1); \ |
| | 32823 | __ret; \ |
| | 32824 | }) |
| | 32825 | #define __noswap_vgetq_lane_bf16(__p0, __p1) __extension__ ({ \ |
| | 32826 | bfloat16_t __ret; \ |
| | 32827 | bfloat16x8_t __s0 = __p0; \ |
| | 32828 | __ret = (bfloat16_t) __builtin_neon_vgetq_lane_bf16((bfloat16x8_t)__s0, __p1); \ |
| | 32829 | __ret; \ |
| | 32830 | }) |
| | 32831 | #endif |
| | 32832 | |
| | 32833 | #ifdef __LITTLE_ENDIAN__ |
| | 32834 | #define vget_lane_bf16(__p0, __p1) __extension__ ({ \ |
| | 32835 | bfloat16_t __ret; \ |
| | 32836 | bfloat16x4_t __s0 = __p0; \ |
| | 32837 | __ret = (bfloat16_t) __builtin_neon_vget_lane_bf16((bfloat16x4_t)__s0, __p1); \ |
| | 32838 | __ret; \ |
| | 32839 | }) |
| | 32840 | #else |
| | 32841 | #define vget_lane_bf16(__p0, __p1) __extension__ ({ \ |
| | 32842 | bfloat16_t __ret; \ |
| | 32843 | bfloat16x4_t __s0 = __p0; \ |
| | 32844 | bfloat16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| | 32845 | __ret = (bfloat16_t) __builtin_neon_vget_lane_bf16((bfloat16x4_t)__rev0, __p1); \ |
| | 32846 | __ret; \ |
| | 32847 | }) |
| | 32848 | #define __noswap_vget_lane_bf16(__p0, __p1) __extension__ ({ \ |
| | 32849 | bfloat16_t __ret; \ |
| | 32850 | bfloat16x4_t __s0 = __p0; \ |
| | 32851 | __ret = (bfloat16_t) __builtin_neon_vget_lane_bf16((bfloat16x4_t)__s0, __p1); \ |
| | 32852 | __ret; \ |
| | 32853 | }) |
| | 32854 | #endif |
| | 32855 | |
| | 32856 | #ifdef __LITTLE_ENDIAN__ |
| | 32857 | __ai __attribute__((target("bf16"))) bfloat16x4_t vget_low_bf16(bfloat16x8_t __p0) { |
| | 32858 | bfloat16x4_t __ret; |
| | 32859 | __ret = __builtin_shufflevector(__p0, __p0, 0, 1, 2, 3); |
| 32689 | return __ret; | 32860 | return __ret; |
| 32690 | } | 32861 | } |
| 32691 | __ai poly16x8_t vreinterpretq_p16_u64(uint64x2_t __p0) { | 32862 | #else |
| 32692 | poly16x8_t __ret; | 32863 | __ai __attribute__((target("bf16"))) bfloat16x4_t vget_low_bf16(bfloat16x8_t __p0) { |
| 32693 | __ret = (poly16x8_t)(__p0); | 32864 | bfloat16x4_t __ret; |
| | 32865 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 32866 | __ret = __builtin_shufflevector(__rev0, __rev0, 0, 1, 2, 3); |
| | 32867 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 32694 | return __ret; | 32868 | return __ret; |
| 32695 | } | 32869 | } |
| 32696 | __ai poly16x8_t vreinterpretq_p16_u16(uint16x8_t __p0) { | 32870 | __ai __attribute__((target("bf16"))) bfloat16x4_t __noswap_vget_low_bf16(bfloat16x8_t __p0) { |
| 32697 | poly16x8_t __ret; | 32871 | bfloat16x4_t __ret; |
| 32698 | __ret = (poly16x8_t)(__p0); | 32872 | __ret = __builtin_shufflevector(__p0, __p0, 0, 1, 2, 3); |
| 32699 | return __ret; | 32873 | return __ret; |
| 32700 | } | 32874 | } |
| 32701 | __ai poly16x8_t vreinterpretq_p16_s8(int8x16_t __p0) { | 32875 | #endif |
| 32702 | poly16x8_t __ret; | 32876 | |
| 32703 | __ret = (poly16x8_t)(__p0); | 32877 | #ifdef __LITTLE_ENDIAN__ |
| 32704 | return __ret; | 32878 | #define vld1q_bf16(__p0) __extension__ ({ \ |
| 32705 | } | 32879 | bfloat16x8_t __ret; \ |
| 32706 | __ai poly16x8_t vreinterpretq_p16_f32(float32x4_t __p0) { | 32880 | __ret = (bfloat16x8_t) __builtin_neon_vld1q_bf16(__p0, 43); \ |
| 32707 | poly16x8_t __ret; | 32881 | __ret; \ |
| 32708 | __ret = (poly16x8_t)(__p0); | 32882 | }) |
| 32709 | return __ret; | 32883 | #else |
| 32710 | } | 32884 | #define vld1q_bf16(__p0) __extension__ ({ \ |
| 32711 | __ai poly16x8_t vreinterpretq_p16_f16(float16x8_t __p0) { | 32885 | bfloat16x8_t __ret; \ |
| 32712 | poly16x8_t __ret; | 32886 | __ret = (bfloat16x8_t) __builtin_neon_vld1q_bf16(__p0, 43); \ |
| 32713 | __ret = (poly16x8_t)(__p0); | 32887 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32714 | return __ret; | 32888 | __ret; \ |
| 32715 | } | 32889 | }) |
| 32716 | __ai poly16x8_t vreinterpretq_p16_s32(int32x4_t __p0) { | 32890 | #endif |
| 32717 | poly16x8_t __ret; | 32891 | |
| 32718 | __ret = (poly16x8_t)(__p0); | 32892 | #ifdef __LITTLE_ENDIAN__ |
| 32719 | return __ret; | 32893 | #define vld1_bf16(__p0) __extension__ ({ \ |
| 32720 | } | 32894 | bfloat16x4_t __ret; \ |
| 32721 | __ai poly16x8_t vreinterpretq_p16_s64(int64x2_t __p0) { | 32895 | __ret = (bfloat16x4_t) __builtin_neon_vld1_bf16(__p0, 11); \ |
| 32722 | poly16x8_t __ret; | 32896 | __ret; \ |
| 32723 | __ret = (poly16x8_t)(__p0); | 32897 | }) |
| 32724 | return __ret; | 32898 | #else |
| 32725 | } | 32899 | #define vld1_bf16(__p0) __extension__ ({ \ |
| 32726 | __ai poly16x8_t vreinterpretq_p16_s16(int16x8_t __p0) { | 32900 | bfloat16x4_t __ret; \ |
| 32727 | poly16x8_t __ret; | 32901 | __ret = (bfloat16x4_t) __builtin_neon_vld1_bf16(__p0, 11); \ |
| 32728 | __ret = (poly16x8_t)(__p0); | 32902 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 32729 | return __ret; | 32903 | __ret; \ |
| 32730 | } | 32904 | }) |
| 32731 | __ai uint8x16_t vreinterpretq_u8_p8(poly8x16_t __p0) { | 32905 | #endif |
| 32732 | uint8x16_t __ret; | 32906 | |
| 32733 | __ret = (uint8x16_t)(__p0); | 32907 | #ifdef __LITTLE_ENDIAN__ |
| 32734 | return __ret; | 32908 | #define vld1q_dup_bf16(__p0) __extension__ ({ \ |
| 32735 | } | 32909 | bfloat16x8_t __ret; \ |
| 32736 | __ai uint8x16_t vreinterpretq_u8_p16(poly16x8_t __p0) { | 32910 | __ret = (bfloat16x8_t) __builtin_neon_vld1q_dup_bf16(__p0, 43); \ |
| 32737 | uint8x16_t __ret; | 32911 | __ret; \ |
| 32738 | __ret = (uint8x16_t)(__p0); | 32912 | }) |
| 32739 | return __ret; | 32913 | #else |
| 32740 | } | 32914 | #define vld1q_dup_bf16(__p0) __extension__ ({ \ |
| 32741 | __ai uint8x16_t vreinterpretq_u8_u32(uint32x4_t __p0) { | 32915 | bfloat16x8_t __ret; \ |
| 32742 | uint8x16_t __ret; | 32916 | __ret = (bfloat16x8_t) __builtin_neon_vld1q_dup_bf16(__p0, 43); \ |
| 32743 | __ret = (uint8x16_t)(__p0); | 32917 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32744 | return __ret; | 32918 | __ret; \ |
| 32745 | } | 32919 | }) |
| 32746 | __ai uint8x16_t vreinterpretq_u8_u64(uint64x2_t __p0) { | 32920 | #endif |
| 32747 | uint8x16_t __ret; | 32921 | |
| 32748 | __ret = (uint8x16_t)(__p0); | 32922 | #ifdef __LITTLE_ENDIAN__ |
| 32749 | return __ret; | 32923 | #define vld1_dup_bf16(__p0) __extension__ ({ \ |
| 32750 | } | 32924 | bfloat16x4_t __ret; \ |
| 32751 | __ai uint8x16_t vreinterpretq_u8_u16(uint16x8_t __p0) { | 32925 | __ret = (bfloat16x4_t) __builtin_neon_vld1_dup_bf16(__p0, 11); \ |
| 32752 | uint8x16_t __ret; | 32926 | __ret; \ |
| 32753 | __ret = (uint8x16_t)(__p0); | 32927 | }) |
| 32754 | return __ret; | 32928 | #else |
| 32755 | } | 32929 | #define vld1_dup_bf16(__p0) __extension__ ({ \ |
| 32756 | __ai uint8x16_t vreinterpretq_u8_s8(int8x16_t __p0) { | 32930 | bfloat16x4_t __ret; \ |
| 32757 | uint8x16_t __ret; | 32931 | __ret = (bfloat16x4_t) __builtin_neon_vld1_dup_bf16(__p0, 11); \ |
| 32758 | __ret = (uint8x16_t)(__p0); | 32932 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 32759 | return __ret; | 32933 | __ret; \ |
| 32760 | } | 32934 | }) |
| 32761 | __ai uint8x16_t vreinterpretq_u8_f32(float32x4_t __p0) { | 32935 | #endif |
| 32762 | uint8x16_t __ret; | 32936 | |
| 32763 | __ret = (uint8x16_t)(__p0); | 32937 | #ifdef __LITTLE_ENDIAN__ |
| 32764 | return __ret; | 32938 | #define vld1q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| 32765 | } | 32939 | bfloat16x8_t __ret; \ |
| 32766 | __ai uint8x16_t vreinterpretq_u8_f16(float16x8_t __p0) { | 32940 | bfloat16x8_t __s1 = __p1; \ |
| 32767 | uint8x16_t __ret; | 32941 | __ret = (bfloat16x8_t) __builtin_neon_vld1q_lane_bf16(__p0, (int8x16_t)__s1, __p2, 43); \ |
| 32768 | __ret = (uint8x16_t)(__p0); | 32942 | __ret; \ |
| 32769 | return __ret; | 32943 | }) |
| 32770 | } | 32944 | #else |
| 32771 | __ai uint8x16_t vreinterpretq_u8_s32(int32x4_t __p0) { | 32945 | #define vld1q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| 32772 | uint8x16_t __ret; | 32946 | bfloat16x8_t __ret; \ |
| 32773 | __ret = (uint8x16_t)(__p0); | 32947 | bfloat16x8_t __s1 = __p1; \ |
| 32774 | return __ret; | 32948 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32775 | } | 32949 | __ret = (bfloat16x8_t) __builtin_neon_vld1q_lane_bf16(__p0, (int8x16_t)__rev1, __p2, 43); \ |
| 32776 | __ai uint8x16_t vreinterpretq_u8_s64(int64x2_t __p0) { | 32950 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32777 | uint8x16_t __ret; | 32951 | __ret; \ |
| 32778 | __ret = (uint8x16_t)(__p0); | 32952 | }) |
| 32779 | return __ret; | 32953 | #endif |
| 32780 | } | 32954 | |
| 32781 | __ai uint8x16_t vreinterpretq_u8_s16(int16x8_t __p0) { | 32955 | #ifdef __LITTLE_ENDIAN__ |
| 32782 | uint8x16_t __ret; | 32956 | #define vld1_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| 32783 | __ret = (uint8x16_t)(__p0); | 32957 | bfloat16x4_t __ret; \ |
| 32784 | return __ret; | 32958 | bfloat16x4_t __s1 = __p1; \ |
| 32785 | } | 32959 | __ret = (bfloat16x4_t) __builtin_neon_vld1_lane_bf16(__p0, (int8x8_t)__s1, __p2, 11); \ |
| 32786 | __ai uint32x4_t vreinterpretq_u32_p8(poly8x16_t __p0) { | 32960 | __ret; \ |
| 32787 | uint32x4_t __ret; | 32961 | }) |
| 32788 | __ret = (uint32x4_t)(__p0); | 32962 | #else |
| 32789 | return __ret; | 32963 | #define vld1_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| 32790 | } | 32964 | bfloat16x4_t __ret; \ |
| 32791 | __ai uint32x4_t vreinterpretq_u32_p16(poly16x8_t __p0) { | 32965 | bfloat16x4_t __s1 = __p1; \ |
| 32792 | uint32x4_t __ret; | 32966 | bfloat16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 32793 | __ret = (uint32x4_t)(__p0); | 32967 | __ret = (bfloat16x4_t) __builtin_neon_vld1_lane_bf16(__p0, (int8x8_t)__rev1, __p2, 11); \ |
| 32794 | return __ret; | 32968 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 32795 | } | 32969 | __ret; \ |
| 32796 | __ai uint32x4_t vreinterpretq_u32_u8(uint8x16_t __p0) { | 32970 | }) |
| 32797 | uint32x4_t __ret; | 32971 | #endif |
| 32798 | __ret = (uint32x4_t)(__p0); | 32972 | |
| 32799 | return __ret; | 32973 | #ifdef __LITTLE_ENDIAN__ |
| 32800 | } | 32974 | #define vld1q_bf16_x2(__p0) __extension__ ({ \ |
| 32801 | __ai uint32x4_t vreinterpretq_u32_u64(uint64x2_t __p0) { | 32975 | bfloat16x8x2_t __ret; \ |
| 32802 | uint32x4_t __ret; | 32976 | __builtin_neon_vld1q_bf16_x2(&__ret, __p0, 43); \ |
| 32803 | __ret = (uint32x4_t)(__p0); | 32977 | __ret; \ |
| 32804 | return __ret; | 32978 | }) |
| 32805 | } | 32979 | #else |
| 32806 | __ai uint32x4_t vreinterpretq_u32_u16(uint16x8_t __p0) { | 32980 | #define vld1q_bf16_x2(__p0) __extension__ ({ \ |
| 32807 | uint32x4_t __ret; | 32981 | bfloat16x8x2_t __ret; \ |
| 32808 | __ret = (uint32x4_t)(__p0); | 32982 | __builtin_neon_vld1q_bf16_x2(&__ret, __p0, 43); \ |
| 32809 | return __ret; | 32983 | \ |
| 32810 | } | 32984 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32811 | __ai uint32x4_t vreinterpretq_u32_s8(int8x16_t __p0) { | 32985 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32812 | uint32x4_t __ret; | 32986 | __ret; \ |
| 32813 | __ret = (uint32x4_t)(__p0); | 32987 | }) |
| 32814 | return __ret; | 32988 | #endif |
| 32815 | } | 32989 | |
| 32816 | __ai uint32x4_t vreinterpretq_u32_f32(float32x4_t __p0) { | 32990 | #ifdef __LITTLE_ENDIAN__ |
| 32817 | uint32x4_t __ret; | 32991 | #define vld1_bf16_x2(__p0) __extension__ ({ \ |
| 32818 | __ret = (uint32x4_t)(__p0); | 32992 | bfloat16x4x2_t __ret; \ |
| 32819 | return __ret; | 32993 | __builtin_neon_vld1_bf16_x2(&__ret, __p0, 11); \ |
| 32820 | } | 32994 | __ret; \ |
| 32821 | __ai uint32x4_t vreinterpretq_u32_f16(float16x8_t __p0) { | 32995 | }) |
| 32822 | uint32x4_t __ret; | 32996 | #else |
| 32823 | __ret = (uint32x4_t)(__p0); | 32997 | #define vld1_bf16_x2(__p0) __extension__ ({ \ |
| 32824 | return __ret; | 32998 | bfloat16x4x2_t __ret; \ |
| 32825 | } | 32999 | __builtin_neon_vld1_bf16_x2(&__ret, __p0, 11); \ |
| 32826 | __ai uint32x4_t vreinterpretq_u32_s32(int32x4_t __p0) { | 33000 | \ |
| 32827 | uint32x4_t __ret; | 33001 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 32828 | __ret = (uint32x4_t)(__p0); | 33002 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| 32829 | return __ret; | 33003 | __ret; \ |
| 32830 | } | 33004 | }) |
| 32831 | __ai uint32x4_t vreinterpretq_u32_s64(int64x2_t __p0) { | 33005 | #endif |
| 32832 | uint32x4_t __ret; | 33006 | |
| 32833 | __ret = (uint32x4_t)(__p0); | 33007 | #ifdef __LITTLE_ENDIAN__ |
| 32834 | return __ret; | 33008 | #define vld1q_bf16_x3(__p0) __extension__ ({ \ |
| 32835 | } | 33009 | bfloat16x8x3_t __ret; \ |
| 32836 | __ai uint32x4_t vreinterpretq_u32_s16(int16x8_t __p0) { | 33010 | __builtin_neon_vld1q_bf16_x3(&__ret, __p0, 43); \ |
| 32837 | uint32x4_t __ret; | 33011 | __ret; \ |
| 32838 | __ret = (uint32x4_t)(__p0); | 33012 | }) |
| 32839 | return __ret; | 33013 | #else |
| 32840 | } | 33014 | #define vld1q_bf16_x3(__p0) __extension__ ({ \ |
| 32841 | __ai uint64x2_t vreinterpretq_u64_p8(poly8x16_t __p0) { | 33015 | bfloat16x8x3_t __ret; \ |
| 32842 | uint64x2_t __ret; | 33016 | __builtin_neon_vld1q_bf16_x3(&__ret, __p0, 43); \ |
| 32843 | __ret = (uint64x2_t)(__p0); | 33017 | \ |
| 32844 | return __ret; | 33018 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32845 | } | 33019 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32846 | __ai uint64x2_t vreinterpretq_u64_p16(poly16x8_t __p0) { | 33020 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32847 | uint64x2_t __ret; | 33021 | __ret; \ |
| 32848 | __ret = (uint64x2_t)(__p0); | 33022 | }) |
| 32849 | return __ret; | 33023 | #endif |
| 32850 | } | 33024 | |
| 32851 | __ai uint64x2_t vreinterpretq_u64_u8(uint8x16_t __p0) { | 33025 | #ifdef __LITTLE_ENDIAN__ |
| 32852 | uint64x2_t __ret; | 33026 | #define vld1_bf16_x3(__p0) __extension__ ({ \ |
| 32853 | __ret = (uint64x2_t)(__p0); | 33027 | bfloat16x4x3_t __ret; \ |
| 32854 | return __ret; | 33028 | __builtin_neon_vld1_bf16_x3(&__ret, __p0, 11); \ |
| 32855 | } | 33029 | __ret; \ |
| 32856 | __ai uint64x2_t vreinterpretq_u64_u32(uint32x4_t __p0) { | 33030 | }) |
| 32857 | uint64x2_t __ret; | 33031 | #else |
| 32858 | __ret = (uint64x2_t)(__p0); | 33032 | #define vld1_bf16_x3(__p0) __extension__ ({ \ |
| 32859 | return __ret; | 33033 | bfloat16x4x3_t __ret; \ |
| 32860 | } | 33034 | __builtin_neon_vld1_bf16_x3(&__ret, __p0, 11); \ |
| 32861 | __ai uint64x2_t vreinterpretq_u64_u16(uint16x8_t __p0) { | 33035 | \ |
| 32862 | uint64x2_t __ret; | 33036 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 32863 | __ret = (uint64x2_t)(__p0); | 33037 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| 32864 | return __ret; | 33038 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| 32865 | } | 33039 | __ret; \ |
| 32866 | __ai uint64x2_t vreinterpretq_u64_s8(int8x16_t __p0) { | 33040 | }) |
| 32867 | uint64x2_t __ret; | 33041 | #endif |
| 32868 | __ret = (uint64x2_t)(__p0); | 33042 | |
| 32869 | return __ret; | 33043 | #ifdef __LITTLE_ENDIAN__ |
| 32870 | } | 33044 | #define vld1q_bf16_x4(__p0) __extension__ ({ \ |
| 32871 | __ai uint64x2_t vreinterpretq_u64_f32(float32x4_t __p0) { | 33045 | bfloat16x8x4_t __ret; \ |
| 32872 | uint64x2_t __ret; | 33046 | __builtin_neon_vld1q_bf16_x4(&__ret, __p0, 43); \ |
| 32873 | __ret = (uint64x2_t)(__p0); | 33047 | __ret; \ |
| 32874 | return __ret; | 33048 | }) |
| 32875 | } | 33049 | #else |
| 32876 | __ai uint64x2_t vreinterpretq_u64_f16(float16x8_t __p0) { | 33050 | #define vld1q_bf16_x4(__p0) __extension__ ({ \ |
| 32877 | uint64x2_t __ret; | 33051 | bfloat16x8x4_t __ret; \ |
| 32878 | __ret = (uint64x2_t)(__p0); | 33052 | __builtin_neon_vld1q_bf16_x4(&__ret, __p0, 43); \ |
| 32879 | return __ret; | 33053 | \ |
| 32880 | } | 33054 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32881 | __ai uint64x2_t vreinterpretq_u64_s32(int32x4_t __p0) { | 33055 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32882 | uint64x2_t __ret; | 33056 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32883 | __ret = (uint64x2_t)(__p0); | 33057 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32884 | return __ret; | 33058 | __ret; \ |
| 32885 | } | 33059 | }) |
| 32886 | __ai uint64x2_t vreinterpretq_u64_s64(int64x2_t __p0) { | 33060 | #endif |
| 32887 | uint64x2_t __ret; | 33061 | |
| 32888 | __ret = (uint64x2_t)(__p0); | 33062 | #ifdef __LITTLE_ENDIAN__ |
| 32889 | return __ret; | 33063 | #define vld1_bf16_x4(__p0) __extension__ ({ \ |
| 32890 | } | 33064 | bfloat16x4x4_t __ret; \ |
| 32891 | __ai uint64x2_t vreinterpretq_u64_s16(int16x8_t __p0) { | 33065 | __builtin_neon_vld1_bf16_x4(&__ret, __p0, 11); \ |
| 32892 | uint64x2_t __ret; | 33066 | __ret; \ |
| 32893 | __ret = (uint64x2_t)(__p0); | 33067 | }) |
| 32894 | return __ret; | 33068 | #else |
| 32895 | } | 33069 | #define vld1_bf16_x4(__p0) __extension__ ({ \ |
| 32896 | __ai uint16x8_t vreinterpretq_u16_p8(poly8x16_t __p0) { | 33070 | bfloat16x4x4_t __ret; \ |
| 32897 | uint16x8_t __ret; | 33071 | __builtin_neon_vld1_bf16_x4(&__ret, __p0, 11); \ |
| 32898 | __ret = (uint16x8_t)(__p0); | 33072 | \ |
| 32899 | return __ret; | 33073 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 32900 | } | 33074 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| 32901 | __ai uint16x8_t vreinterpretq_u16_p16(poly16x8_t __p0) { | 33075 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| 32902 | uint16x8_t __ret; | 33076 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ |
| 32903 | __ret = (uint16x8_t)(__p0); | 33077 | __ret; \ |
| 32904 | return __ret; | 33078 | }) |
| 32905 | } | 33079 | #endif |
| 32906 | __ai uint16x8_t vreinterpretq_u16_u8(uint8x16_t __p0) { | 33080 | |
| 32907 | uint16x8_t __ret; | 33081 | #ifdef __LITTLE_ENDIAN__ |
| 32908 | __ret = (uint16x8_t)(__p0); | 33082 | #define vld2q_bf16(__p0) __extension__ ({ \ |
| 32909 | return __ret; | 33083 | bfloat16x8x2_t __ret; \ |
| 32910 | } | 33084 | __builtin_neon_vld2q_bf16(&__ret, __p0, 43); \ |
| 32911 | __ai uint16x8_t vreinterpretq_u16_u32(uint32x4_t __p0) { | 33085 | __ret; \ |
| 32912 | uint16x8_t __ret; | 33086 | }) |
| 32913 | __ret = (uint16x8_t)(__p0); | 33087 | #else |
| 32914 | return __ret; | 33088 | #define vld2q_bf16(__p0) __extension__ ({ \ |
| 32915 | } | 33089 | bfloat16x8x2_t __ret; \ |
| 32916 | __ai uint16x8_t vreinterpretq_u16_u64(uint64x2_t __p0) { | 33090 | __builtin_neon_vld2q_bf16(&__ret, __p0, 43); \ |
| 32917 | uint16x8_t __ret; | 33091 | \ |
| 32918 | __ret = (uint16x8_t)(__p0); | 33092 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32919 | return __ret; | 33093 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32920 | } | 33094 | __ret; \ |
| 32921 | __ai uint16x8_t vreinterpretq_u16_s8(int8x16_t __p0) { | 33095 | }) |
| 32922 | uint16x8_t __ret; | 33096 | #endif |
| 32923 | __ret = (uint16x8_t)(__p0); | 33097 | |
| 32924 | return __ret; | 33098 | #ifdef __LITTLE_ENDIAN__ |
| 32925 | } | 33099 | #define vld2_bf16(__p0) __extension__ ({ \ |
| 32926 | __ai uint16x8_t vreinterpretq_u16_f32(float32x4_t __p0) { | 33100 | bfloat16x4x2_t __ret; \ |
| 32927 | uint16x8_t __ret; | 33101 | __builtin_neon_vld2_bf16(&__ret, __p0, 11); \ |
| 32928 | __ret = (uint16x8_t)(__p0); | 33102 | __ret; \ |
| 32929 | return __ret; | 33103 | }) |
| 32930 | } | 33104 | #else |
| 32931 | __ai uint16x8_t vreinterpretq_u16_f16(float16x8_t __p0) { | 33105 | #define vld2_bf16(__p0) __extension__ ({ \ |
| 32932 | uint16x8_t __ret; | 33106 | bfloat16x4x2_t __ret; \ |
| 32933 | __ret = (uint16x8_t)(__p0); | 33107 | __builtin_neon_vld2_bf16(&__ret, __p0, 11); \ |
| 32934 | return __ret; | 33108 | \ |
| 32935 | } | 33109 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 32936 | __ai uint16x8_t vreinterpretq_u16_s32(int32x4_t __p0) { | 33110 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| 32937 | uint16x8_t __ret; | 33111 | __ret; \ |
| 32938 | __ret = (uint16x8_t)(__p0); | 33112 | }) |
| 32939 | return __ret; | 33113 | #endif |
| 32940 | } | 33114 | |
| 32941 | __ai uint16x8_t vreinterpretq_u16_s64(int64x2_t __p0) { | 33115 | #ifdef __LITTLE_ENDIAN__ |
| 32942 | uint16x8_t __ret; | 33116 | #define vld2q_dup_bf16(__p0) __extension__ ({ \ |
| 32943 | __ret = (uint16x8_t)(__p0); | 33117 | bfloat16x8x2_t __ret; \ |
| 32944 | return __ret; | 33118 | __builtin_neon_vld2q_dup_bf16(&__ret, __p0, 43); \ |
| 32945 | } | 33119 | __ret; \ |
| 32946 | __ai uint16x8_t vreinterpretq_u16_s16(int16x8_t __p0) { | 33120 | }) |
| 32947 | uint16x8_t __ret; | 33121 | #else |
| 32948 | __ret = (uint16x8_t)(__p0); | 33122 | #define vld2q_dup_bf16(__p0) __extension__ ({ \ |
| 32949 | return __ret; | 33123 | bfloat16x8x2_t __ret; \ |
| 32950 | } | 33124 | __builtin_neon_vld2q_dup_bf16(&__ret, __p0, 43); \ |
| 32951 | __ai int8x16_t vreinterpretq_s8_p8(poly8x16_t __p0) { | 33125 | \ |
| 32952 | int8x16_t __ret; | 33126 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32953 | __ret = (int8x16_t)(__p0); | 33127 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32954 | return __ret; | 33128 | __ret; \ |
| 32955 | } | 33129 | }) |
| 32956 | __ai int8x16_t vreinterpretq_s8_p16(poly16x8_t __p0) { | 33130 | #endif |
| 32957 | int8x16_t __ret; | 33131 | |
| 32958 | __ret = (int8x16_t)(__p0); | 33132 | #ifdef __LITTLE_ENDIAN__ |
| 32959 | return __ret; | 33133 | #define vld2_dup_bf16(__p0) __extension__ ({ \ |
| 32960 | } | 33134 | bfloat16x4x2_t __ret; \ |
| 32961 | __ai int8x16_t vreinterpretq_s8_u8(uint8x16_t __p0) { | 33135 | __builtin_neon_vld2_dup_bf16(&__ret, __p0, 11); \ |
| 32962 | int8x16_t __ret; | 33136 | __ret; \ |
| 32963 | __ret = (int8x16_t)(__p0); | 33137 | }) |
| 32964 | return __ret; | 33138 | #else |
| 32965 | } | 33139 | #define vld2_dup_bf16(__p0) __extension__ ({ \ |
| 32966 | __ai int8x16_t vreinterpretq_s8_u32(uint32x4_t __p0) { | 33140 | bfloat16x4x2_t __ret; \ |
| 32967 | int8x16_t __ret; | 33141 | __builtin_neon_vld2_dup_bf16(&__ret, __p0, 11); \ |
| 32968 | __ret = (int8x16_t)(__p0); | 33142 | \ |
| 32969 | return __ret; | 33143 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 32970 | } | 33144 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| 32971 | __ai int8x16_t vreinterpretq_s8_u64(uint64x2_t __p0) { | 33145 | __ret; \ |
| 32972 | int8x16_t __ret; | 33146 | }) |
| 32973 | __ret = (int8x16_t)(__p0); | 33147 | #endif |
| 32974 | return __ret; | 33148 | |
| 32975 | } | 33149 | #ifdef __LITTLE_ENDIAN__ |
| 32976 | __ai int8x16_t vreinterpretq_s8_u16(uint16x8_t __p0) { | 33150 | #define vld2q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| 32977 | int8x16_t __ret; | 33151 | bfloat16x8x2_t __ret; \ |
| 32978 | __ret = (int8x16_t)(__p0); | 33152 | bfloat16x8x2_t __s1 = __p1; \ |
| 32979 | return __ret; | 33153 | __builtin_neon_vld2q_lane_bf16(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 43); \ |
| 32980 | } | 33154 | __ret; \ |
| 32981 | __ai int8x16_t vreinterpretq_s8_f32(float32x4_t __p0) { | 33155 | }) |
| 32982 | int8x16_t __ret; | 33156 | #else |
| 32983 | __ret = (int8x16_t)(__p0); | 33157 | #define vld2q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| 32984 | return __ret; | 33158 | bfloat16x8x2_t __ret; \ |
| 32985 | } | 33159 | bfloat16x8x2_t __s1 = __p1; \ |
| 32986 | __ai int8x16_t vreinterpretq_s8_f16(float16x8_t __p0) { | 33160 | bfloat16x8x2_t __rev1; \ |
| 32987 | int8x16_t __ret; | 33161 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32988 | __ret = (int8x16_t)(__p0); | 33162 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32989 | return __ret; | 33163 | __builtin_neon_vld2q_lane_bf16(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 43); \ |
| 32990 | } | 33164 | \ |
| 32991 | __ai int8x16_t vreinterpretq_s8_s32(int32x4_t __p0) { | 33165 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32992 | int8x16_t __ret; | 33166 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 32993 | __ret = (int8x16_t)(__p0); | 33167 | __ret; \ |
| 32994 | return __ret; | 33168 | }) |
| 32995 | } | 33169 | #endif |
| 32996 | __ai int8x16_t vreinterpretq_s8_s64(int64x2_t __p0) { | 33170 | |
| 32997 | int8x16_t __ret; | 33171 | #ifdef __LITTLE_ENDIAN__ |
| 32998 | __ret = (int8x16_t)(__p0); | 33172 | #define vld2_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| 32999 | return __ret; | 33173 | bfloat16x4x2_t __ret; \ |
| 33000 | } | 33174 | bfloat16x4x2_t __s1 = __p1; \ |
| 33001 | __ai int8x16_t vreinterpretq_s8_s16(int16x8_t __p0) { | 33175 | __builtin_neon_vld2_lane_bf16(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 11); \ |
| 33002 | int8x16_t __ret; | 33176 | __ret; \ |
| 33003 | __ret = (int8x16_t)(__p0); | 33177 | }) |
| 33004 | return __ret; | 33178 | #else |
| 33005 | } | 33179 | #define vld2_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| 33006 | __ai float32x4_t vreinterpretq_f32_p8(poly8x16_t __p0) { | 33180 | bfloat16x4x2_t __ret; \ |
| 33007 | float32x4_t __ret; | 33181 | bfloat16x4x2_t __s1 = __p1; \ |
| 33008 | __ret = (float32x4_t)(__p0); | 33182 | bfloat16x4x2_t __rev1; \ |
| 33009 | return __ret; | 33183 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 33010 | } | 33184 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 33011 | __ai float32x4_t vreinterpretq_f32_p16(poly16x8_t __p0) { | 33185 | __builtin_neon_vld2_lane_bf16(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 11); \ |
| 33012 | float32x4_t __ret; | 33186 | \ |
| 33013 | __ret = (float32x4_t)(__p0); | 33187 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 33014 | return __ret; | 33188 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| 33015 | } | 33189 | __ret; \ |
| 33016 | __ai float32x4_t vreinterpretq_f32_u8(uint8x16_t __p0) { | 33190 | }) |
| 33017 | float32x4_t __ret; | 33191 | #endif |
| 33018 | __ret = (float32x4_t)(__p0); | 33192 | |
| 33019 | return __ret; | 33193 | #ifdef __LITTLE_ENDIAN__ |
| 33020 | } | 33194 | #define vld3q_bf16(__p0) __extension__ ({ \ |
| 33021 | __ai float32x4_t vreinterpretq_f32_u32(uint32x4_t __p0) { | 33195 | bfloat16x8x3_t __ret; \ |
| 33022 | float32x4_t __ret; | 33196 | __builtin_neon_vld3q_bf16(&__ret, __p0, 43); \ |
| 33023 | __ret = (float32x4_t)(__p0); | 33197 | __ret; \ |
| 33024 | return __ret; | 33198 | }) |
| 33025 | } | 33199 | #else |
| 33026 | __ai float32x4_t vreinterpretq_f32_u64(uint64x2_t __p0) { | 33200 | #define vld3q_bf16(__p0) __extension__ ({ \ |
| 33027 | float32x4_t __ret; | 33201 | bfloat16x8x3_t __ret; \ |
| 33028 | __ret = (float32x4_t)(__p0); | 33202 | __builtin_neon_vld3q_bf16(&__ret, __p0, 43); \ |
| 33029 | return __ret; | 33203 | \ |
| 33030 | } | 33204 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33031 | __ai float32x4_t vreinterpretq_f32_u16(uint16x8_t __p0) { | 33205 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33032 | float32x4_t __ret; | 33206 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33033 | __ret = (float32x4_t)(__p0); | 33207 | __ret; \ |
| 33034 | return __ret; | 33208 | }) |
| 33035 | } | 33209 | #endif |
| 33036 | __ai float32x4_t vreinterpretq_f32_s8(int8x16_t __p0) { | 33210 | |
| 33037 | float32x4_t __ret; | 33211 | #ifdef __LITTLE_ENDIAN__ |
| 33038 | __ret = (float32x4_t)(__p0); | 33212 | #define vld3_bf16(__p0) __extension__ ({ \ |
| 33039 | return __ret; | 33213 | bfloat16x4x3_t __ret; \ |
| 33040 | } | 33214 | __builtin_neon_vld3_bf16(&__ret, __p0, 11); \ |
| 33041 | __ai float32x4_t vreinterpretq_f32_f16(float16x8_t __p0) { | 33215 | __ret; \ |
| 33042 | float32x4_t __ret; | 33216 | }) |
| 33043 | __ret = (float32x4_t)(__p0); | 33217 | #else |
| 33044 | return __ret; | 33218 | #define vld3_bf16(__p0) __extension__ ({ \ |
| 33045 | } | 33219 | bfloat16x4x3_t __ret; \ |
| 33046 | __ai float32x4_t vreinterpretq_f32_s32(int32x4_t __p0) { | 33220 | __builtin_neon_vld3_bf16(&__ret, __p0, 11); \ |
| 33047 | float32x4_t __ret; | 33221 | \ |
| 33048 | __ret = (float32x4_t)(__p0); | 33222 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 33049 | return __ret; | 33223 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| 33050 | } | 33224 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| 33051 | __ai float32x4_t vreinterpretq_f32_s64(int64x2_t __p0) { | 33225 | __ret; \ |
| 33052 | float32x4_t __ret; | 33226 | }) |
| 33053 | __ret = (float32x4_t)(__p0); | 33227 | #endif |
| 33054 | return __ret; | 33228 | |
| 33055 | } | 33229 | #ifdef __LITTLE_ENDIAN__ |
| 33056 | __ai float32x4_t vreinterpretq_f32_s16(int16x8_t __p0) { | 33230 | #define vld3q_dup_bf16(__p0) __extension__ ({ \ |
| 33057 | float32x4_t __ret; | 33231 | bfloat16x8x3_t __ret; \ |
| 33058 | __ret = (float32x4_t)(__p0); | 33232 | __builtin_neon_vld3q_dup_bf16(&__ret, __p0, 43); \ |
| 33059 | return __ret; | 33233 | __ret; \ |
| 33060 | } | 33234 | }) |
| 33061 | __ai float16x8_t vreinterpretq_f16_p8(poly8x16_t __p0) { | 33235 | #else |
| 33062 | float16x8_t __ret; | 33236 | #define vld3q_dup_bf16(__p0) __extension__ ({ \ |
| 33063 | __ret = (float16x8_t)(__p0); | 33237 | bfloat16x8x3_t __ret; \ |
| 33064 | return __ret; | 33238 | __builtin_neon_vld3q_dup_bf16(&__ret, __p0, 43); \ |
| 33065 | } | 33239 | \ |
| 33066 | __ai float16x8_t vreinterpretq_f16_p16(poly16x8_t __p0) { | 33240 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33067 | float16x8_t __ret; | 33241 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33068 | __ret = (float16x8_t)(__p0); | 33242 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33069 | return __ret; | 33243 | __ret; \ |
| 33070 | } | 33244 | }) |
| 33071 | __ai float16x8_t vreinterpretq_f16_u8(uint8x16_t __p0) { | 33245 | #endif |
| 33072 | float16x8_t __ret; | 33246 | |
| 33073 | __ret = (float16x8_t)(__p0); | 33247 | #ifdef __LITTLE_ENDIAN__ |
| 33074 | return __ret; | 33248 | #define vld3_dup_bf16(__p0) __extension__ ({ \ |
| 33075 | } | 33249 | bfloat16x4x3_t __ret; \ |
| 33076 | __ai float16x8_t vreinterpretq_f16_u32(uint32x4_t __p0) { | 33250 | __builtin_neon_vld3_dup_bf16(&__ret, __p0, 11); \ |
| 33077 | float16x8_t __ret; | 33251 | __ret; \ |
| 33078 | __ret = (float16x8_t)(__p0); | 33252 | }) |
| 33079 | return __ret; | 33253 | #else |
| 33080 | } | 33254 | #define vld3_dup_bf16(__p0) __extension__ ({ \ |
| 33081 | __ai float16x8_t vreinterpretq_f16_u64(uint64x2_t __p0) { | 33255 | bfloat16x4x3_t __ret; \ |
| 33082 | float16x8_t __ret; | 33256 | __builtin_neon_vld3_dup_bf16(&__ret, __p0, 11); \ |
| 33083 | __ret = (float16x8_t)(__p0); | 33257 | \ |
| 33084 | return __ret; | 33258 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 33085 | } | 33259 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| 33086 | __ai float16x8_t vreinterpretq_f16_u16(uint16x8_t __p0) { | 33260 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| 33087 | float16x8_t __ret; | 33261 | __ret; \ |
| 33088 | __ret = (float16x8_t)(__p0); | 33262 | }) |
| 33089 | return __ret; | 33263 | #endif |
| 33090 | } | 33264 | |
| 33091 | __ai float16x8_t vreinterpretq_f16_s8(int8x16_t __p0) { | 33265 | #ifdef __LITTLE_ENDIAN__ |
| 33092 | float16x8_t __ret; | 33266 | #define vld3q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| 33093 | __ret = (float16x8_t)(__p0); | 33267 | bfloat16x8x3_t __ret; \ |
| 33094 | return __ret; | 33268 | bfloat16x8x3_t __s1 = __p1; \ |
| 33095 | } | 33269 | __builtin_neon_vld3q_lane_bf16(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 43); \ |
| 33096 | __ai float16x8_t vreinterpretq_f16_f32(float32x4_t __p0) { | 33270 | __ret; \ |
| 33097 | float16x8_t __ret; | 33271 | }) |
| 33098 | __ret = (float16x8_t)(__p0); | 33272 | #else |
| 33099 | return __ret; | 33273 | #define vld3q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| 33100 | } | 33274 | bfloat16x8x3_t __ret; \ |
| 33101 | __ai float16x8_t vreinterpretq_f16_s32(int32x4_t __p0) { | 33275 | bfloat16x8x3_t __s1 = __p1; \ |
| 33102 | float16x8_t __ret; | 33276 | bfloat16x8x3_t __rev1; \ |
| 33103 | __ret = (float16x8_t)(__p0); | 33277 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33104 | return __ret; | 33278 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33105 | } | 33279 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33106 | __ai float16x8_t vreinterpretq_f16_s64(int64x2_t __p0) { | 33280 | __builtin_neon_vld3q_lane_bf16(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 43); \ |
| 33107 | float16x8_t __ret; | 33281 | \ |
| 33108 | __ret = (float16x8_t)(__p0); | 33282 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33109 | return __ret; | 33283 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33110 | } | 33284 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33111 | __ai float16x8_t vreinterpretq_f16_s16(int16x8_t __p0) { | 33285 | __ret; \ |
| 33112 | float16x8_t __ret; | 33286 | }) |
| 33113 | __ret = (float16x8_t)(__p0); | 33287 | #endif |
| 33114 | return __ret; | 33288 | |
| 33115 | } | 33289 | #ifdef __LITTLE_ENDIAN__ |
| 33116 | __ai int32x4_t vreinterpretq_s32_p8(poly8x16_t __p0) { | 33290 | #define vld3_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| 33117 | int32x4_t __ret; | 33291 | bfloat16x4x3_t __ret; \ |
| 33118 | __ret = (int32x4_t)(__p0); | 33292 | bfloat16x4x3_t __s1 = __p1; \ |
| 33119 | return __ret; | 33293 | __builtin_neon_vld3_lane_bf16(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 11); \ |
| 33120 | } | 33294 | __ret; \ |
| 33121 | __ai int32x4_t vreinterpretq_s32_p16(poly16x8_t __p0) { | 33295 | }) |
| 33122 | int32x4_t __ret; | 33296 | #else |
| 33123 | __ret = (int32x4_t)(__p0); | 33297 | #define vld3_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| 33124 | return __ret; | 33298 | bfloat16x4x3_t __ret; \ |
| 33125 | } | 33299 | bfloat16x4x3_t __s1 = __p1; \ |
| 33126 | __ai int32x4_t vreinterpretq_s32_u8(uint8x16_t __p0) { | 33300 | bfloat16x4x3_t __rev1; \ |
| 33127 | int32x4_t __ret; | 33301 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 33128 | __ret = (int32x4_t)(__p0); | 33302 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 33129 | return __ret; | 33303 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 33130 | } | 33304 | __builtin_neon_vld3_lane_bf16(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 11); \ |
| 33131 | __ai int32x4_t vreinterpretq_s32_u32(uint32x4_t __p0) { | 33305 | \ |
| 33132 | int32x4_t __ret; | 33306 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 33133 | __ret = (int32x4_t)(__p0); | 33307 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| 33134 | return __ret; | 33308 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| 33135 | } | 33309 | __ret; \ |
| 33136 | __ai int32x4_t vreinterpretq_s32_u64(uint64x2_t __p0) { | 33310 | }) |
| 33137 | int32x4_t __ret; | 33311 | #endif |
| 33138 | __ret = (int32x4_t)(__p0); | 33312 | |
| 33139 | return __ret; | 33313 | #ifdef __LITTLE_ENDIAN__ |
| 33140 | } | 33314 | #define vld4q_bf16(__p0) __extension__ ({ \ |
| 33141 | __ai int32x4_t vreinterpretq_s32_u16(uint16x8_t __p0) { | 33315 | bfloat16x8x4_t __ret; \ |
| 33142 | int32x4_t __ret; | 33316 | __builtin_neon_vld4q_bf16(&__ret, __p0, 43); \ |
| 33143 | __ret = (int32x4_t)(__p0); | 33317 | __ret; \ |
| | 33318 | }) |
| | 33319 | #else |
| | 33320 | #define vld4q_bf16(__p0) __extension__ ({ \ |
| | 33321 | bfloat16x8x4_t __ret; \ |
| | 33322 | __builtin_neon_vld4q_bf16(&__ret, __p0, 43); \ |
| | 33323 | \ |
| | 33324 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33325 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33326 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33327 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33328 | __ret; \ |
| | 33329 | }) |
| | 33330 | #endif |
| | 33331 | |
| | 33332 | #ifdef __LITTLE_ENDIAN__ |
| | 33333 | #define vld4_bf16(__p0) __extension__ ({ \ |
| | 33334 | bfloat16x4x4_t __ret; \ |
| | 33335 | __builtin_neon_vld4_bf16(&__ret, __p0, 11); \ |
| | 33336 | __ret; \ |
| | 33337 | }) |
| | 33338 | #else |
| | 33339 | #define vld4_bf16(__p0) __extension__ ({ \ |
| | 33340 | bfloat16x4x4_t __ret; \ |
| | 33341 | __builtin_neon_vld4_bf16(&__ret, __p0, 11); \ |
| | 33342 | \ |
| | 33343 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| | 33344 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| | 33345 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| | 33346 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ |
| | 33347 | __ret; \ |
| | 33348 | }) |
| | 33349 | #endif |
| | 33350 | |
| | 33351 | #ifdef __LITTLE_ENDIAN__ |
| | 33352 | #define vld4q_dup_bf16(__p0) __extension__ ({ \ |
| | 33353 | bfloat16x8x4_t __ret; \ |
| | 33354 | __builtin_neon_vld4q_dup_bf16(&__ret, __p0, 43); \ |
| | 33355 | __ret; \ |
| | 33356 | }) |
| | 33357 | #else |
| | 33358 | #define vld4q_dup_bf16(__p0) __extension__ ({ \ |
| | 33359 | bfloat16x8x4_t __ret; \ |
| | 33360 | __builtin_neon_vld4q_dup_bf16(&__ret, __p0, 43); \ |
| | 33361 | \ |
| | 33362 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33363 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33364 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33365 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33366 | __ret; \ |
| | 33367 | }) |
| | 33368 | #endif |
| | 33369 | |
| | 33370 | #ifdef __LITTLE_ENDIAN__ |
| | 33371 | #define vld4_dup_bf16(__p0) __extension__ ({ \ |
| | 33372 | bfloat16x4x4_t __ret; \ |
| | 33373 | __builtin_neon_vld4_dup_bf16(&__ret, __p0, 11); \ |
| | 33374 | __ret; \ |
| | 33375 | }) |
| | 33376 | #else |
| | 33377 | #define vld4_dup_bf16(__p0) __extension__ ({ \ |
| | 33378 | bfloat16x4x4_t __ret; \ |
| | 33379 | __builtin_neon_vld4_dup_bf16(&__ret, __p0, 11); \ |
| | 33380 | \ |
| | 33381 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| | 33382 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| | 33383 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| | 33384 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ |
| | 33385 | __ret; \ |
| | 33386 | }) |
| | 33387 | #endif |
| | 33388 | |
| | 33389 | #ifdef __LITTLE_ENDIAN__ |
| | 33390 | #define vld4q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33391 | bfloat16x8x4_t __ret; \ |
| | 33392 | bfloat16x8x4_t __s1 = __p1; \ |
| | 33393 | __builtin_neon_vld4q_lane_bf16(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 43); \ |
| | 33394 | __ret; \ |
| | 33395 | }) |
| | 33396 | #else |
| | 33397 | #define vld4q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33398 | bfloat16x8x4_t __ret; \ |
| | 33399 | bfloat16x8x4_t __s1 = __p1; \ |
| | 33400 | bfloat16x8x4_t __rev1; \ |
| | 33401 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33402 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33403 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33404 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33405 | __builtin_neon_vld4q_lane_bf16(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 43); \ |
| | 33406 | \ |
| | 33407 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33408 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33409 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33410 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33411 | __ret; \ |
| | 33412 | }) |
| | 33413 | #endif |
| | 33414 | |
| | 33415 | #ifdef __LITTLE_ENDIAN__ |
| | 33416 | #define vld4_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33417 | bfloat16x4x4_t __ret; \ |
| | 33418 | bfloat16x4x4_t __s1 = __p1; \ |
| | 33419 | __builtin_neon_vld4_lane_bf16(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 11); \ |
| | 33420 | __ret; \ |
| | 33421 | }) |
| | 33422 | #else |
| | 33423 | #define vld4_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33424 | bfloat16x4x4_t __ret; \ |
| | 33425 | bfloat16x4x4_t __s1 = __p1; \ |
| | 33426 | bfloat16x4x4_t __rev1; \ |
| | 33427 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 33428 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 33429 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| | 33430 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| | 33431 | __builtin_neon_vld4_lane_bf16(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 11); \ |
| | 33432 | \ |
| | 33433 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| | 33434 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| | 33435 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| | 33436 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ |
| | 33437 | __ret; \ |
| | 33438 | }) |
| | 33439 | #endif |
| | 33440 | |
| | 33441 | #ifdef __LITTLE_ENDIAN__ |
| | 33442 | #define vsetq_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33443 | bfloat16x8_t __ret; \ |
| | 33444 | bfloat16_t __s0 = __p0; \ |
| | 33445 | bfloat16x8_t __s1 = __p1; \ |
| | 33446 | __ret = (bfloat16x8_t) __builtin_neon_vsetq_lane_bf16(__s0, (bfloat16x8_t)__s1, __p2); \ |
| | 33447 | __ret; \ |
| | 33448 | }) |
| | 33449 | #else |
| | 33450 | #define vsetq_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33451 | bfloat16x8_t __ret; \ |
| | 33452 | bfloat16_t __s0 = __p0; \ |
| | 33453 | bfloat16x8_t __s1 = __p1; \ |
| | 33454 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33455 | __ret = (bfloat16x8_t) __builtin_neon_vsetq_lane_bf16(__s0, (bfloat16x8_t)__rev1, __p2); \ |
| | 33456 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33457 | __ret; \ |
| | 33458 | }) |
| | 33459 | #define __noswap_vsetq_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33460 | bfloat16x8_t __ret; \ |
| | 33461 | bfloat16_t __s0 = __p0; \ |
| | 33462 | bfloat16x8_t __s1 = __p1; \ |
| | 33463 | __ret = (bfloat16x8_t) __builtin_neon_vsetq_lane_bf16(__s0, (bfloat16x8_t)__s1, __p2); \ |
| | 33464 | __ret; \ |
| | 33465 | }) |
| | 33466 | #endif |
| | 33467 | |
| | 33468 | #ifdef __LITTLE_ENDIAN__ |
| | 33469 | #define vset_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33470 | bfloat16x4_t __ret; \ |
| | 33471 | bfloat16_t __s0 = __p0; \ |
| | 33472 | bfloat16x4_t __s1 = __p1; \ |
| | 33473 | __ret = (bfloat16x4_t) __builtin_neon_vset_lane_bf16(__s0, (bfloat16x4_t)__s1, __p2); \ |
| | 33474 | __ret; \ |
| | 33475 | }) |
| | 33476 | #else |
| | 33477 | #define vset_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33478 | bfloat16x4_t __ret; \ |
| | 33479 | bfloat16_t __s0 = __p0; \ |
| | 33480 | bfloat16x4_t __s1 = __p1; \ |
| | 33481 | bfloat16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| | 33482 | __ret = (bfloat16x4_t) __builtin_neon_vset_lane_bf16(__s0, (bfloat16x4_t)__rev1, __p2); \ |
| | 33483 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 33484 | __ret; \ |
| | 33485 | }) |
| | 33486 | #define __noswap_vset_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33487 | bfloat16x4_t __ret; \ |
| | 33488 | bfloat16_t __s0 = __p0; \ |
| | 33489 | bfloat16x4_t __s1 = __p1; \ |
| | 33490 | __ret = (bfloat16x4_t) __builtin_neon_vset_lane_bf16(__s0, (bfloat16x4_t)__s1, __p2); \ |
| | 33491 | __ret; \ |
| | 33492 | }) |
| | 33493 | #endif |
| | 33494 | |
| | 33495 | #ifdef __LITTLE_ENDIAN__ |
| | 33496 | #define vst1q_bf16(__p0, __p1) __extension__ ({ \ |
| | 33497 | bfloat16x8_t __s1 = __p1; \ |
| | 33498 | __builtin_neon_vst1q_bf16(__p0, (int8x16_t)__s1, 43); \ |
| | 33499 | }) |
| | 33500 | #else |
| | 33501 | #define vst1q_bf16(__p0, __p1) __extension__ ({ \ |
| | 33502 | bfloat16x8_t __s1 = __p1; \ |
| | 33503 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33504 | __builtin_neon_vst1q_bf16(__p0, (int8x16_t)__rev1, 43); \ |
| | 33505 | }) |
| | 33506 | #endif |
| | 33507 | |
| | 33508 | #ifdef __LITTLE_ENDIAN__ |
| | 33509 | #define vst1_bf16(__p0, __p1) __extension__ ({ \ |
| | 33510 | bfloat16x4_t __s1 = __p1; \ |
| | 33511 | __builtin_neon_vst1_bf16(__p0, (int8x8_t)__s1, 11); \ |
| | 33512 | }) |
| | 33513 | #else |
| | 33514 | #define vst1_bf16(__p0, __p1) __extension__ ({ \ |
| | 33515 | bfloat16x4_t __s1 = __p1; \ |
| | 33516 | bfloat16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| | 33517 | __builtin_neon_vst1_bf16(__p0, (int8x8_t)__rev1, 11); \ |
| | 33518 | }) |
| | 33519 | #endif |
| | 33520 | |
| | 33521 | #ifdef __LITTLE_ENDIAN__ |
| | 33522 | #define vst1q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33523 | bfloat16x8_t __s1 = __p1; \ |
| | 33524 | __builtin_neon_vst1q_lane_bf16(__p0, (int8x16_t)__s1, __p2, 43); \ |
| | 33525 | }) |
| | 33526 | #else |
| | 33527 | #define vst1q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33528 | bfloat16x8_t __s1 = __p1; \ |
| | 33529 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33530 | __builtin_neon_vst1q_lane_bf16(__p0, (int8x16_t)__rev1, __p2, 43); \ |
| | 33531 | }) |
| | 33532 | #endif |
| | 33533 | |
| | 33534 | #ifdef __LITTLE_ENDIAN__ |
| | 33535 | #define vst1_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33536 | bfloat16x4_t __s1 = __p1; \ |
| | 33537 | __builtin_neon_vst1_lane_bf16(__p0, (int8x8_t)__s1, __p2, 11); \ |
| | 33538 | }) |
| | 33539 | #else |
| | 33540 | #define vst1_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33541 | bfloat16x4_t __s1 = __p1; \ |
| | 33542 | bfloat16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| | 33543 | __builtin_neon_vst1_lane_bf16(__p0, (int8x8_t)__rev1, __p2, 11); \ |
| | 33544 | }) |
| | 33545 | #endif |
| | 33546 | |
| | 33547 | #ifdef __LITTLE_ENDIAN__ |
| | 33548 | #define vst1q_bf16_x2(__p0, __p1) __extension__ ({ \ |
| | 33549 | bfloat16x8x2_t __s1 = __p1; \ |
| | 33550 | __builtin_neon_vst1q_bf16_x2(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 43); \ |
| | 33551 | }) |
| | 33552 | #else |
| | 33553 | #define vst1q_bf16_x2(__p0, __p1) __extension__ ({ \ |
| | 33554 | bfloat16x8x2_t __s1 = __p1; \ |
| | 33555 | bfloat16x8x2_t __rev1; \ |
| | 33556 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33557 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33558 | __builtin_neon_vst1q_bf16_x2(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 43); \ |
| | 33559 | }) |
| | 33560 | #endif |
| | 33561 | |
| | 33562 | #ifdef __LITTLE_ENDIAN__ |
| | 33563 | #define vst1_bf16_x2(__p0, __p1) __extension__ ({ \ |
| | 33564 | bfloat16x4x2_t __s1 = __p1; \ |
| | 33565 | __builtin_neon_vst1_bf16_x2(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 11); \ |
| | 33566 | }) |
| | 33567 | #else |
| | 33568 | #define vst1_bf16_x2(__p0, __p1) __extension__ ({ \ |
| | 33569 | bfloat16x4x2_t __s1 = __p1; \ |
| | 33570 | bfloat16x4x2_t __rev1; \ |
| | 33571 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 33572 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 33573 | __builtin_neon_vst1_bf16_x2(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 11); \ |
| | 33574 | }) |
| | 33575 | #endif |
| | 33576 | |
| | 33577 | #ifdef __LITTLE_ENDIAN__ |
| | 33578 | #define vst1q_bf16_x3(__p0, __p1) __extension__ ({ \ |
| | 33579 | bfloat16x8x3_t __s1 = __p1; \ |
| | 33580 | __builtin_neon_vst1q_bf16_x3(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 43); \ |
| | 33581 | }) |
| | 33582 | #else |
| | 33583 | #define vst1q_bf16_x3(__p0, __p1) __extension__ ({ \ |
| | 33584 | bfloat16x8x3_t __s1 = __p1; \ |
| | 33585 | bfloat16x8x3_t __rev1; \ |
| | 33586 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33587 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33588 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33589 | __builtin_neon_vst1q_bf16_x3(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 43); \ |
| | 33590 | }) |
| | 33591 | #endif |
| | 33592 | |
| | 33593 | #ifdef __LITTLE_ENDIAN__ |
| | 33594 | #define vst1_bf16_x3(__p0, __p1) __extension__ ({ \ |
| | 33595 | bfloat16x4x3_t __s1 = __p1; \ |
| | 33596 | __builtin_neon_vst1_bf16_x3(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 11); \ |
| | 33597 | }) |
| | 33598 | #else |
| | 33599 | #define vst1_bf16_x3(__p0, __p1) __extension__ ({ \ |
| | 33600 | bfloat16x4x3_t __s1 = __p1; \ |
| | 33601 | bfloat16x4x3_t __rev1; \ |
| | 33602 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 33603 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 33604 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| | 33605 | __builtin_neon_vst1_bf16_x3(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 11); \ |
| | 33606 | }) |
| | 33607 | #endif |
| | 33608 | |
| | 33609 | #ifdef __LITTLE_ENDIAN__ |
| | 33610 | #define vst1q_bf16_x4(__p0, __p1) __extension__ ({ \ |
| | 33611 | bfloat16x8x4_t __s1 = __p1; \ |
| | 33612 | __builtin_neon_vst1q_bf16_x4(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 43); \ |
| | 33613 | }) |
| | 33614 | #else |
| | 33615 | #define vst1q_bf16_x4(__p0, __p1) __extension__ ({ \ |
| | 33616 | bfloat16x8x4_t __s1 = __p1; \ |
| | 33617 | bfloat16x8x4_t __rev1; \ |
| | 33618 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33619 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33620 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33621 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33622 | __builtin_neon_vst1q_bf16_x4(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 43); \ |
| | 33623 | }) |
| | 33624 | #endif |
| | 33625 | |
| | 33626 | #ifdef __LITTLE_ENDIAN__ |
| | 33627 | #define vst1_bf16_x4(__p0, __p1) __extension__ ({ \ |
| | 33628 | bfloat16x4x4_t __s1 = __p1; \ |
| | 33629 | __builtin_neon_vst1_bf16_x4(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 11); \ |
| | 33630 | }) |
| | 33631 | #else |
| | 33632 | #define vst1_bf16_x4(__p0, __p1) __extension__ ({ \ |
| | 33633 | bfloat16x4x4_t __s1 = __p1; \ |
| | 33634 | bfloat16x4x4_t __rev1; \ |
| | 33635 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 33636 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 33637 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| | 33638 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| | 33639 | __builtin_neon_vst1_bf16_x4(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 11); \ |
| | 33640 | }) |
| | 33641 | #endif |
| | 33642 | |
| | 33643 | #ifdef __LITTLE_ENDIAN__ |
| | 33644 | #define vst2q_bf16(__p0, __p1) __extension__ ({ \ |
| | 33645 | bfloat16x8x2_t __s1 = __p1; \ |
| | 33646 | __builtin_neon_vst2q_bf16(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 43); \ |
| | 33647 | }) |
| | 33648 | #else |
| | 33649 | #define vst2q_bf16(__p0, __p1) __extension__ ({ \ |
| | 33650 | bfloat16x8x2_t __s1 = __p1; \ |
| | 33651 | bfloat16x8x2_t __rev1; \ |
| | 33652 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33653 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33654 | __builtin_neon_vst2q_bf16(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 43); \ |
| | 33655 | }) |
| | 33656 | #endif |
| | 33657 | |
| | 33658 | #ifdef __LITTLE_ENDIAN__ |
| | 33659 | #define vst2_bf16(__p0, __p1) __extension__ ({ \ |
| | 33660 | bfloat16x4x2_t __s1 = __p1; \ |
| | 33661 | __builtin_neon_vst2_bf16(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 11); \ |
| | 33662 | }) |
| | 33663 | #else |
| | 33664 | #define vst2_bf16(__p0, __p1) __extension__ ({ \ |
| | 33665 | bfloat16x4x2_t __s1 = __p1; \ |
| | 33666 | bfloat16x4x2_t __rev1; \ |
| | 33667 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 33668 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 33669 | __builtin_neon_vst2_bf16(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 11); \ |
| | 33670 | }) |
| | 33671 | #endif |
| | 33672 | |
| | 33673 | #ifdef __LITTLE_ENDIAN__ |
| | 33674 | #define vst2q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33675 | bfloat16x8x2_t __s1 = __p1; \ |
| | 33676 | __builtin_neon_vst2q_lane_bf16(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 43); \ |
| | 33677 | }) |
| | 33678 | #else |
| | 33679 | #define vst2q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33680 | bfloat16x8x2_t __s1 = __p1; \ |
| | 33681 | bfloat16x8x2_t __rev1; \ |
| | 33682 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33683 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33684 | __builtin_neon_vst2q_lane_bf16(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 43); \ |
| | 33685 | }) |
| | 33686 | #endif |
| | 33687 | |
| | 33688 | #ifdef __LITTLE_ENDIAN__ |
| | 33689 | #define vst2_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33690 | bfloat16x4x2_t __s1 = __p1; \ |
| | 33691 | __builtin_neon_vst2_lane_bf16(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 11); \ |
| | 33692 | }) |
| | 33693 | #else |
| | 33694 | #define vst2_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33695 | bfloat16x4x2_t __s1 = __p1; \ |
| | 33696 | bfloat16x4x2_t __rev1; \ |
| | 33697 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 33698 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 33699 | __builtin_neon_vst2_lane_bf16(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 11); \ |
| | 33700 | }) |
| | 33701 | #endif |
| | 33702 | |
| | 33703 | #ifdef __LITTLE_ENDIAN__ |
| | 33704 | #define vst3q_bf16(__p0, __p1) __extension__ ({ \ |
| | 33705 | bfloat16x8x3_t __s1 = __p1; \ |
| | 33706 | __builtin_neon_vst3q_bf16(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 43); \ |
| | 33707 | }) |
| | 33708 | #else |
| | 33709 | #define vst3q_bf16(__p0, __p1) __extension__ ({ \ |
| | 33710 | bfloat16x8x3_t __s1 = __p1; \ |
| | 33711 | bfloat16x8x3_t __rev1; \ |
| | 33712 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33713 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33714 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33715 | __builtin_neon_vst3q_bf16(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 43); \ |
| | 33716 | }) |
| | 33717 | #endif |
| | 33718 | |
| | 33719 | #ifdef __LITTLE_ENDIAN__ |
| | 33720 | #define vst3_bf16(__p0, __p1) __extension__ ({ \ |
| | 33721 | bfloat16x4x3_t __s1 = __p1; \ |
| | 33722 | __builtin_neon_vst3_bf16(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 11); \ |
| | 33723 | }) |
| | 33724 | #else |
| | 33725 | #define vst3_bf16(__p0, __p1) __extension__ ({ \ |
| | 33726 | bfloat16x4x3_t __s1 = __p1; \ |
| | 33727 | bfloat16x4x3_t __rev1; \ |
| | 33728 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 33729 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 33730 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| | 33731 | __builtin_neon_vst3_bf16(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 11); \ |
| | 33732 | }) |
| | 33733 | #endif |
| | 33734 | |
| | 33735 | #ifdef __LITTLE_ENDIAN__ |
| | 33736 | #define vst3q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33737 | bfloat16x8x3_t __s1 = __p1; \ |
| | 33738 | __builtin_neon_vst3q_lane_bf16(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 43); \ |
| | 33739 | }) |
| | 33740 | #else |
| | 33741 | #define vst3q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33742 | bfloat16x8x3_t __s1 = __p1; \ |
| | 33743 | bfloat16x8x3_t __rev1; \ |
| | 33744 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33745 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33746 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33747 | __builtin_neon_vst3q_lane_bf16(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 43); \ |
| | 33748 | }) |
| | 33749 | #endif |
| | 33750 | |
| | 33751 | #ifdef __LITTLE_ENDIAN__ |
| | 33752 | #define vst3_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33753 | bfloat16x4x3_t __s1 = __p1; \ |
| | 33754 | __builtin_neon_vst3_lane_bf16(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 11); \ |
| | 33755 | }) |
| | 33756 | #else |
| | 33757 | #define vst3_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33758 | bfloat16x4x3_t __s1 = __p1; \ |
| | 33759 | bfloat16x4x3_t __rev1; \ |
| | 33760 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 33761 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 33762 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| | 33763 | __builtin_neon_vst3_lane_bf16(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 11); \ |
| | 33764 | }) |
| | 33765 | #endif |
| | 33766 | |
| | 33767 | #ifdef __LITTLE_ENDIAN__ |
| | 33768 | #define vst4q_bf16(__p0, __p1) __extension__ ({ \ |
| | 33769 | bfloat16x8x4_t __s1 = __p1; \ |
| | 33770 | __builtin_neon_vst4q_bf16(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 43); \ |
| | 33771 | }) |
| | 33772 | #else |
| | 33773 | #define vst4q_bf16(__p0, __p1) __extension__ ({ \ |
| | 33774 | bfloat16x8x4_t __s1 = __p1; \ |
| | 33775 | bfloat16x8x4_t __rev1; \ |
| | 33776 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33777 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33778 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33779 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33780 | __builtin_neon_vst4q_bf16(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 43); \ |
| | 33781 | }) |
| | 33782 | #endif |
| | 33783 | |
| | 33784 | #ifdef __LITTLE_ENDIAN__ |
| | 33785 | #define vst4_bf16(__p0, __p1) __extension__ ({ \ |
| | 33786 | bfloat16x4x4_t __s1 = __p1; \ |
| | 33787 | __builtin_neon_vst4_bf16(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 11); \ |
| | 33788 | }) |
| | 33789 | #else |
| | 33790 | #define vst4_bf16(__p0, __p1) __extension__ ({ \ |
| | 33791 | bfloat16x4x4_t __s1 = __p1; \ |
| | 33792 | bfloat16x4x4_t __rev1; \ |
| | 33793 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 33794 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 33795 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| | 33796 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| | 33797 | __builtin_neon_vst4_bf16(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 11); \ |
| | 33798 | }) |
| | 33799 | #endif |
| | 33800 | |
| | 33801 | #ifdef __LITTLE_ENDIAN__ |
| | 33802 | #define vst4q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33803 | bfloat16x8x4_t __s1 = __p1; \ |
| | 33804 | __builtin_neon_vst4q_lane_bf16(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 43); \ |
| | 33805 | }) |
| | 33806 | #else |
| | 33807 | #define vst4q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33808 | bfloat16x8x4_t __s1 = __p1; \ |
| | 33809 | bfloat16x8x4_t __rev1; \ |
| | 33810 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33811 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33812 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33813 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33814 | __builtin_neon_vst4q_lane_bf16(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 43); \ |
| | 33815 | }) |
| | 33816 | #endif |
| | 33817 | |
| | 33818 | #ifdef __LITTLE_ENDIAN__ |
| | 33819 | #define vst4_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33820 | bfloat16x4x4_t __s1 = __p1; \ |
| | 33821 | __builtin_neon_vst4_lane_bf16(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 11); \ |
| | 33822 | }) |
| | 33823 | #else |
| | 33824 | #define vst4_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ |
| | 33825 | bfloat16x4x4_t __s1 = __p1; \ |
| | 33826 | bfloat16x4x4_t __rev1; \ |
| | 33827 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 33828 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 33829 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| | 33830 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| | 33831 | __builtin_neon_vst4_lane_bf16(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 11); \ |
| | 33832 | }) |
| | 33833 | #endif |
| | 33834 | |
| | 33835 | #ifdef __LITTLE_ENDIAN__ |
| | 33836 | __ai __attribute__((target("dotprod"))) uint32x4_t vdotq_u32(uint32x4_t __p0, uint8x16_t __p1, uint8x16_t __p2) { |
| | 33837 | uint32x4_t __ret; |
| | 33838 | __ret = (uint32x4_t) __builtin_neon_vdotq_u32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); |
| 33144 | return __ret; | 33839 | return __ret; |
| 33145 | } | 33840 | } |
| 33146 | __ai int32x4_t vreinterpretq_s32_s8(int8x16_t __p0) { | 33841 | #else |
| 33147 | int32x4_t __ret; | 33842 | __ai __attribute__((target("dotprod"))) uint32x4_t vdotq_u32(uint32x4_t __p0, uint8x16_t __p1, uint8x16_t __p2) { |
| 33148 | __ret = (int32x4_t)(__p0); | 33843 | uint32x4_t __ret; |
| | 33844 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 33845 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 33846 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 33847 | __ret = (uint32x4_t) __builtin_neon_vdotq_u32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); |
| | 33848 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33149 | return __ret; | 33849 | return __ret; |
| 33150 | } | 33850 | } |
| 33151 | __ai int32x4_t vreinterpretq_s32_f32(float32x4_t __p0) { | 33851 | __ai __attribute__((target("dotprod"))) uint32x4_t __noswap_vdotq_u32(uint32x4_t __p0, uint8x16_t __p1, uint8x16_t __p2) { |
| 33152 | int32x4_t __ret; | 33852 | uint32x4_t __ret; |
| 33153 | __ret = (int32x4_t)(__p0); | 33853 | __ret = (uint32x4_t) __builtin_neon_vdotq_u32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); |
| 33154 | return __ret; | 33854 | return __ret; |
| 33155 | } | 33855 | } |
| 33156 | __ai int32x4_t vreinterpretq_s32_f16(float16x8_t __p0) { | 33856 | #endif |
| | 33857 | |
| | 33858 | #ifdef __LITTLE_ENDIAN__ |
| | 33859 | __ai __attribute__((target("dotprod"))) int32x4_t vdotq_s32(int32x4_t __p0, int8x16_t __p1, int8x16_t __p2) { |
| 33157 | int32x4_t __ret; | 33860 | int32x4_t __ret; |
| 33158 | __ret = (int32x4_t)(__p0); | 33861 | __ret = (int32x4_t) __builtin_neon_vdotq_s32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); |
| 33159 | return __ret; | 33862 | return __ret; |
| 33160 | } | 33863 | } |
| 33161 | __ai int32x4_t vreinterpretq_s32_s64(int64x2_t __p0) { | 33864 | #else |
| | 33865 | __ai __attribute__((target("dotprod"))) int32x4_t vdotq_s32(int32x4_t __p0, int8x16_t __p1, int8x16_t __p2) { |
| 33162 | int32x4_t __ret; | 33866 | int32x4_t __ret; |
| 33163 | __ret = (int32x4_t)(__p0); | 33867 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 33868 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 33869 | int8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 33870 | __ret = (int32x4_t) __builtin_neon_vdotq_s32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); |
| | 33871 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33164 | return __ret; | 33872 | return __ret; |
| 33165 | } | 33873 | } |
| 33166 | __ai int32x4_t vreinterpretq_s32_s16(int16x8_t __p0) { | 33874 | __ai __attribute__((target("dotprod"))) int32x4_t __noswap_vdotq_s32(int32x4_t __p0, int8x16_t __p1, int8x16_t __p2) { |
| 33167 | int32x4_t __ret; | 33875 | int32x4_t __ret; |
| 33168 | __ret = (int32x4_t)(__p0); | 33876 | __ret = (int32x4_t) __builtin_neon_vdotq_s32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); |
| 33169 | return __ret; | | |
| 33170 | } | | |
| 33171 | __ai int64x2_t vreinterpretq_s64_p8(poly8x16_t __p0) { | | |
| 33172 | int64x2_t __ret; | | |
| 33173 | __ret = (int64x2_t)(__p0); | | |
| 33174 | return __ret; | | |
| 33175 | } | | |
| 33176 | __ai int64x2_t vreinterpretq_s64_p16(poly16x8_t __p0) { | | |
| 33177 | int64x2_t __ret; | | |
| 33178 | __ret = (int64x2_t)(__p0); | | |
| 33179 | return __ret; | | |
| 33180 | } | | |
| 33181 | __ai int64x2_t vreinterpretq_s64_u8(uint8x16_t __p0) { | | |
| 33182 | int64x2_t __ret; | | |
| 33183 | __ret = (int64x2_t)(__p0); | | |
| 33184 | return __ret; | | |
| 33185 | } | | |
| 33186 | __ai int64x2_t vreinterpretq_s64_u32(uint32x4_t __p0) { | | |
| 33187 | int64x2_t __ret; | | |
| 33188 | __ret = (int64x2_t)(__p0); | | |
| 33189 | return __ret; | | |
| 33190 | } | | |
| 33191 | __ai int64x2_t vreinterpretq_s64_u64(uint64x2_t __p0) { | | |
| 33192 | int64x2_t __ret; | | |
| 33193 | __ret = (int64x2_t)(__p0); | | |
| 33194 | return __ret; | | |
| 33195 | } | | |
| 33196 | __ai int64x2_t vreinterpretq_s64_u16(uint16x8_t __p0) { | | |
| 33197 | int64x2_t __ret; | | |
| 33198 | __ret = (int64x2_t)(__p0); | | |
| 33199 | return __ret; | | |
| 33200 | } | | |
| 33201 | __ai int64x2_t vreinterpretq_s64_s8(int8x16_t __p0) { | | |
| 33202 | int64x2_t __ret; | | |
| 33203 | __ret = (int64x2_t)(__p0); | | |
| 33204 | return __ret; | | |
| 33205 | } | | |
| 33206 | __ai int64x2_t vreinterpretq_s64_f32(float32x4_t __p0) { | | |
| 33207 | int64x2_t __ret; | | |
| 33208 | __ret = (int64x2_t)(__p0); | | |
| 33209 | return __ret; | | |
| 33210 | } | | |
| 33211 | __ai int64x2_t vreinterpretq_s64_f16(float16x8_t __p0) { | | |
| 33212 | int64x2_t __ret; | | |
| 33213 | __ret = (int64x2_t)(__p0); | | |
| 33214 | return __ret; | | |
| 33215 | } | | |
| 33216 | __ai int64x2_t vreinterpretq_s64_s32(int32x4_t __p0) { | | |
| 33217 | int64x2_t __ret; | | |
| 33218 | __ret = (int64x2_t)(__p0); | | |
| 33219 | return __ret; | | |
| 33220 | } | | |
| 33221 | __ai int64x2_t vreinterpretq_s64_s16(int16x8_t __p0) { | | |
| 33222 | int64x2_t __ret; | | |
| 33223 | __ret = (int64x2_t)(__p0); | | |
| 33224 | return __ret; | | |
| 33225 | } | | |
| 33226 | __ai int16x8_t vreinterpretq_s16_p8(poly8x16_t __p0) { | | |
| 33227 | int16x8_t __ret; | | |
| 33228 | __ret = (int16x8_t)(__p0); | | |
| 33229 | return __ret; | | |
| 33230 | } | | |
| 33231 | __ai int16x8_t vreinterpretq_s16_p16(poly16x8_t __p0) { | | |
| 33232 | int16x8_t __ret; | | |
| 33233 | __ret = (int16x8_t)(__p0); | | |
| 33234 | return __ret; | | |
| 33235 | } | | |
| 33236 | __ai int16x8_t vreinterpretq_s16_u8(uint8x16_t __p0) { | | |
| 33237 | int16x8_t __ret; | | |
| 33238 | __ret = (int16x8_t)(__p0); | | |
| 33239 | return __ret; | | |
| 33240 | } | | |
| 33241 | __ai int16x8_t vreinterpretq_s16_u32(uint32x4_t __p0) { | | |
| 33242 | int16x8_t __ret; | | |
| 33243 | __ret = (int16x8_t)(__p0); | | |
| 33244 | return __ret; | | |
| 33245 | } | | |
| 33246 | __ai int16x8_t vreinterpretq_s16_u64(uint64x2_t __p0) { | | |
| 33247 | int16x8_t __ret; | | |
| 33248 | __ret = (int16x8_t)(__p0); | | |
| 33249 | return __ret; | | |
| 33250 | } | | |
| 33251 | __ai int16x8_t vreinterpretq_s16_u16(uint16x8_t __p0) { | | |
| 33252 | int16x8_t __ret; | | |
| 33253 | __ret = (int16x8_t)(__p0); | | |
| 33254 | return __ret; | | |
| 33255 | } | | |
| 33256 | __ai int16x8_t vreinterpretq_s16_s8(int8x16_t __p0) { | | |
| 33257 | int16x8_t __ret; | | |
| 33258 | __ret = (int16x8_t)(__p0); | | |
| 33259 | return __ret; | | |
| 33260 | } | | |
| 33261 | __ai int16x8_t vreinterpretq_s16_f32(float32x4_t __p0) { | | |
| 33262 | int16x8_t __ret; | | |
| 33263 | __ret = (int16x8_t)(__p0); | | |
| 33264 | return __ret; | | |
| 33265 | } | | |
| 33266 | __ai int16x8_t vreinterpretq_s16_f16(float16x8_t __p0) { | | |
| 33267 | int16x8_t __ret; | | |
| 33268 | __ret = (int16x8_t)(__p0); | | |
| 33269 | return __ret; | | |
| 33270 | } | | |
| 33271 | __ai int16x8_t vreinterpretq_s16_s32(int32x4_t __p0) { | | |
| 33272 | int16x8_t __ret; | | |
| 33273 | __ret = (int16x8_t)(__p0); | | |
| 33274 | return __ret; | | |
| 33275 | } | | |
| 33276 | __ai int16x8_t vreinterpretq_s16_s64(int64x2_t __p0) { | | |
| 33277 | int16x8_t __ret; | | |
| 33278 | __ret = (int16x8_t)(__p0); | | |
| 33279 | return __ret; | | |
| 33280 | } | | |
| 33281 | __ai uint8x8_t vreinterpret_u8_p8(poly8x8_t __p0) { | | |
| 33282 | uint8x8_t __ret; | | |
| 33283 | __ret = (uint8x8_t)(__p0); | | |
| 33284 | return __ret; | | |
| 33285 | } | | |
| 33286 | __ai uint8x8_t vreinterpret_u8_p16(poly16x4_t __p0) { | | |
| 33287 | uint8x8_t __ret; | | |
| 33288 | __ret = (uint8x8_t)(__p0); | | |
| 33289 | return __ret; | | |
| 33290 | } | | |
| 33291 | __ai uint8x8_t vreinterpret_u8_u32(uint32x2_t __p0) { | | |
| 33292 | uint8x8_t __ret; | | |
| 33293 | __ret = (uint8x8_t)(__p0); | | |
| 33294 | return __ret; | | |
| 33295 | } | | |
| 33296 | __ai uint8x8_t vreinterpret_u8_u64(uint64x1_t __p0) { | | |
| 33297 | uint8x8_t __ret; | | |
| 33298 | __ret = (uint8x8_t)(__p0); | | |
| 33299 | return __ret; | | |
| 33300 | } | | |
| 33301 | __ai uint8x8_t vreinterpret_u8_u16(uint16x4_t __p0) { | | |
| 33302 | uint8x8_t __ret; | | |
| 33303 | __ret = (uint8x8_t)(__p0); | | |
| 33304 | return __ret; | | |
| 33305 | } | | |
| 33306 | __ai uint8x8_t vreinterpret_u8_s8(int8x8_t __p0) { | | |
| 33307 | uint8x8_t __ret; | | |
| 33308 | __ret = (uint8x8_t)(__p0); | | |
| 33309 | return __ret; | | |
| 33310 | } | | |
| 33311 | __ai uint8x8_t vreinterpret_u8_f32(float32x2_t __p0) { | | |
| 33312 | uint8x8_t __ret; | | |
| 33313 | __ret = (uint8x8_t)(__p0); | | |
| 33314 | return __ret; | | |
| 33315 | } | | |
| 33316 | __ai uint8x8_t vreinterpret_u8_f16(float16x4_t __p0) { | | |
| 33317 | uint8x8_t __ret; | | |
| 33318 | __ret = (uint8x8_t)(__p0); | | |
| 33319 | return __ret; | | |
| 33320 | } | | |
| 33321 | __ai uint8x8_t vreinterpret_u8_s32(int32x2_t __p0) { | | |
| 33322 | uint8x8_t __ret; | | |
| 33323 | __ret = (uint8x8_t)(__p0); | | |
| 33324 | return __ret; | | |
| 33325 | } | | |
| 33326 | __ai uint8x8_t vreinterpret_u8_s64(int64x1_t __p0) { | | |
| 33327 | uint8x8_t __ret; | | |
| 33328 | __ret = (uint8x8_t)(__p0); | | |
| 33329 | return __ret; | | |
| 33330 | } | | |
| 33331 | __ai uint8x8_t vreinterpret_u8_s16(int16x4_t __p0) { | | |
| 33332 | uint8x8_t __ret; | | |
| 33333 | __ret = (uint8x8_t)(__p0); | | |
| 33334 | return __ret; | | |
| 33335 | } | | |
| 33336 | __ai uint32x2_t vreinterpret_u32_p8(poly8x8_t __p0) { | | |
| 33337 | uint32x2_t __ret; | | |
| 33338 | __ret = (uint32x2_t)(__p0); | | |
| 33339 | return __ret; | | |
| 33340 | } | | |
| 33341 | __ai uint32x2_t vreinterpret_u32_p16(poly16x4_t __p0) { | | |
| 33342 | uint32x2_t __ret; | | |
| 33343 | __ret = (uint32x2_t)(__p0); | | |
| 33344 | return __ret; | | |
| 33345 | } | | |
| 33346 | __ai uint32x2_t vreinterpret_u32_u8(uint8x8_t __p0) { | | |
| 33347 | uint32x2_t __ret; | | |
| 33348 | __ret = (uint32x2_t)(__p0); | | |
| 33349 | return __ret; | | |
| 33350 | } | | |
| 33351 | __ai uint32x2_t vreinterpret_u32_u64(uint64x1_t __p0) { | | |
| 33352 | uint32x2_t __ret; | | |
| 33353 | __ret = (uint32x2_t)(__p0); | | |
| 33354 | return __ret; | | |
| 33355 | } | | |
| 33356 | __ai uint32x2_t vreinterpret_u32_u16(uint16x4_t __p0) { | | |
| 33357 | uint32x2_t __ret; | | |
| 33358 | __ret = (uint32x2_t)(__p0); | | |
| 33359 | return __ret; | | |
| 33360 | } | | |
| 33361 | __ai uint32x2_t vreinterpret_u32_s8(int8x8_t __p0) { | | |
| 33362 | uint32x2_t __ret; | | |
| 33363 | __ret = (uint32x2_t)(__p0); | | |
| 33364 | return __ret; | | |
| 33365 | } | | |
| 33366 | __ai uint32x2_t vreinterpret_u32_f32(float32x2_t __p0) { | | |
| 33367 | uint32x2_t __ret; | | |
| 33368 | __ret = (uint32x2_t)(__p0); | | |
| 33369 | return __ret; | | |
| 33370 | } | | |
| 33371 | __ai uint32x2_t vreinterpret_u32_f16(float16x4_t __p0) { | | |
| 33372 | uint32x2_t __ret; | | |
| 33373 | __ret = (uint32x2_t)(__p0); | | |
| 33374 | return __ret; | 33877 | return __ret; |
| 33375 | } | 33878 | } |
| 33376 | __ai uint32x2_t vreinterpret_u32_s32(int32x2_t __p0) { | 33879 | #endif |
| | 33880 | |
| | 33881 | #ifdef __LITTLE_ENDIAN__ |
| | 33882 | __ai __attribute__((target("dotprod"))) uint32x2_t vdot_u32(uint32x2_t __p0, uint8x8_t __p1, uint8x8_t __p2) { |
| 33377 | uint32x2_t __ret; | 33883 | uint32x2_t __ret; |
| 33378 | __ret = (uint32x2_t)(__p0); | 33884 | __ret = (uint32x2_t) __builtin_neon_vdot_u32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 18); |
| 33379 | return __ret; | 33885 | return __ret; |
| 33380 | } | 33886 | } |
| 33381 | __ai uint32x2_t vreinterpret_u32_s64(int64x1_t __p0) { | 33887 | #else |
| | 33888 | __ai __attribute__((target("dotprod"))) uint32x2_t vdot_u32(uint32x2_t __p0, uint8x8_t __p1, uint8x8_t __p2) { |
| 33382 | uint32x2_t __ret; | 33889 | uint32x2_t __ret; |
| 33383 | __ret = (uint32x2_t)(__p0); | 33890 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 33891 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 33892 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 33893 | __ret = (uint32x2_t) __builtin_neon_vdot_u32((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 18); |
| | 33894 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 33384 | return __ret; | 33895 | return __ret; |
| 33385 | } | 33896 | } |
| 33386 | __ai uint32x2_t vreinterpret_u32_s16(int16x4_t __p0) { | 33897 | __ai __attribute__((target("dotprod"))) uint32x2_t __noswap_vdot_u32(uint32x2_t __p0, uint8x8_t __p1, uint8x8_t __p2) { |
| 33387 | uint32x2_t __ret; | 33898 | uint32x2_t __ret; |
| 33388 | __ret = (uint32x2_t)(__p0); | 33899 | __ret = (uint32x2_t) __builtin_neon_vdot_u32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 18); |
| 33389 | return __ret; | | |
| 33390 | } | | |
| 33391 | __ai uint64x1_t vreinterpret_u64_p8(poly8x8_t __p0) { | | |
| 33392 | uint64x1_t __ret; | | |
| 33393 | __ret = (uint64x1_t)(__p0); | | |
| 33394 | return __ret; | | |
| 33395 | } | | |
| 33396 | __ai uint64x1_t vreinterpret_u64_p16(poly16x4_t __p0) { | | |
| 33397 | uint64x1_t __ret; | | |
| 33398 | __ret = (uint64x1_t)(__p0); | | |
| 33399 | return __ret; | | |
| 33400 | } | | |
| 33401 | __ai uint64x1_t vreinterpret_u64_u8(uint8x8_t __p0) { | | |
| 33402 | uint64x1_t __ret; | | |
| 33403 | __ret = (uint64x1_t)(__p0); | | |
| 33404 | return __ret; | | |
| 33405 | } | | |
| 33406 | __ai uint64x1_t vreinterpret_u64_u32(uint32x2_t __p0) { | | |
| 33407 | uint64x1_t __ret; | | |
| 33408 | __ret = (uint64x1_t)(__p0); | | |
| 33409 | return __ret; | | |
| 33410 | } | | |
| 33411 | __ai uint64x1_t vreinterpret_u64_u16(uint16x4_t __p0) { | | |
| 33412 | uint64x1_t __ret; | | |
| 33413 | __ret = (uint64x1_t)(__p0); | | |
| 33414 | return __ret; | | |
| 33415 | } | | |
| 33416 | __ai uint64x1_t vreinterpret_u64_s8(int8x8_t __p0) { | | |
| 33417 | uint64x1_t __ret; | | |
| 33418 | __ret = (uint64x1_t)(__p0); | | |
| 33419 | return __ret; | | |
| 33420 | } | | |
| 33421 | __ai uint64x1_t vreinterpret_u64_f32(float32x2_t __p0) { | | |
| 33422 | uint64x1_t __ret; | | |
| 33423 | __ret = (uint64x1_t)(__p0); | | |
| 33424 | return __ret; | | |
| 33425 | } | | |
| 33426 | __ai uint64x1_t vreinterpret_u64_f16(float16x4_t __p0) { | | |
| 33427 | uint64x1_t __ret; | | |
| 33428 | __ret = (uint64x1_t)(__p0); | | |
| 33429 | return __ret; | | |
| 33430 | } | | |
| 33431 | __ai uint64x1_t vreinterpret_u64_s32(int32x2_t __p0) { | | |
| 33432 | uint64x1_t __ret; | | |
| 33433 | __ret = (uint64x1_t)(__p0); | | |
| 33434 | return __ret; | | |
| 33435 | } | | |
| 33436 | __ai uint64x1_t vreinterpret_u64_s64(int64x1_t __p0) { | | |
| 33437 | uint64x1_t __ret; | | |
| 33438 | __ret = (uint64x1_t)(__p0); | | |
| 33439 | return __ret; | 33900 | return __ret; |
| 33440 | } | 33901 | } |
| 33441 | __ai uint64x1_t vreinterpret_u64_s16(int16x4_t __p0) { | 33902 | #endif |
| 33442 | uint64x1_t __ret; | 33903 | |
| 33443 | __ret = (uint64x1_t)(__p0); | 33904 | #ifdef __LITTLE_ENDIAN__ |
| | 33905 | __ai __attribute__((target("dotprod"))) int32x2_t vdot_s32(int32x2_t __p0, int8x8_t __p1, int8x8_t __p2) { |
| | 33906 | int32x2_t __ret; |
| | 33907 | __ret = (int32x2_t) __builtin_neon_vdot_s32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); |
| 33444 | return __ret; | 33908 | return __ret; |
| 33445 | } | 33909 | } |
| 33446 | __ai uint16x4_t vreinterpret_u16_p8(poly8x8_t __p0) { | 33910 | #else |
| 33447 | uint16x4_t __ret; | 33911 | __ai __attribute__((target("dotprod"))) int32x2_t vdot_s32(int32x2_t __p0, int8x8_t __p1, int8x8_t __p2) { |
| 33448 | __ret = (uint16x4_t)(__p0); | 33912 | int32x2_t __ret; |
| | 33913 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 33914 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 33915 | int8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 33916 | __ret = (int32x2_t) __builtin_neon_vdot_s32((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 2); |
| | 33917 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 33449 | return __ret; | 33918 | return __ret; |
| 33450 | } | 33919 | } |
| 33451 | __ai uint16x4_t vreinterpret_u16_p16(poly16x4_t __p0) { | 33920 | __ai __attribute__((target("dotprod"))) int32x2_t __noswap_vdot_s32(int32x2_t __p0, int8x8_t __p1, int8x8_t __p2) { |
| 33452 | uint16x4_t __ret; | 33921 | int32x2_t __ret; |
| 33453 | __ret = (uint16x4_t)(__p0); | 33922 | __ret = (int32x2_t) __builtin_neon_vdot_s32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); |
| 33454 | return __ret; | 33923 | return __ret; |
| 33455 | } | 33924 | } |
| 33456 | __ai uint16x4_t vreinterpret_u16_u8(uint8x8_t __p0) { | 33925 | #endif |
| 33457 | uint16x4_t __ret; | 33926 | |
| 33458 | __ret = (uint16x4_t)(__p0); | 33927 | #ifdef __LITTLE_ENDIAN__ |
| | 33928 | #define vdotq_lane_u32(__p0_145, __p1_145, __p2_145, __p3_145) __extension__ ({ \ |
| | 33929 | uint32x4_t __ret_145; \ |
| | 33930 | uint32x4_t __s0_145 = __p0_145; \ |
| | 33931 | uint8x16_t __s1_145 = __p1_145; \ |
| | 33932 | uint8x8_t __s2_145 = __p2_145; \ |
| | 33933 | uint8x8_t __reint_145 = __s2_145; \ |
| | 33934 | uint32x4_t __reint1_145 = splatq_lane_u32(*(uint32x2_t *) &__reint_145, __p3_145); \ |
| | 33935 | __ret_145 = vdotq_u32(__s0_145, __s1_145, *(uint8x16_t *) &__reint1_145); \ |
| | 33936 | __ret_145; \ |
| | 33937 | }) |
| | 33938 | #else |
| | 33939 | #define vdotq_lane_u32(__p0_146, __p1_146, __p2_146, __p3_146) __extension__ ({ \ |
| | 33940 | uint32x4_t __ret_146; \ |
| | 33941 | uint32x4_t __s0_146 = __p0_146; \ |
| | 33942 | uint8x16_t __s1_146 = __p1_146; \ |
| | 33943 | uint8x8_t __s2_146 = __p2_146; \ |
| | 33944 | uint32x4_t __rev0_146; __rev0_146 = __builtin_shufflevector(__s0_146, __s0_146, 3, 2, 1, 0); \ |
| | 33945 | uint8x16_t __rev1_146; __rev1_146 = __builtin_shufflevector(__s1_146, __s1_146, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33946 | uint8x8_t __rev2_146; __rev2_146 = __builtin_shufflevector(__s2_146, __s2_146, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33947 | uint8x8_t __reint_146 = __rev2_146; \ |
| | 33948 | uint32x4_t __reint1_146 = __noswap_splatq_lane_u32(*(uint32x2_t *) &__reint_146, __p3_146); \ |
| | 33949 | __ret_146 = __noswap_vdotq_u32(__rev0_146, __rev1_146, *(uint8x16_t *) &__reint1_146); \ |
| | 33950 | __ret_146 = __builtin_shufflevector(__ret_146, __ret_146, 3, 2, 1, 0); \ |
| | 33951 | __ret_146; \ |
| | 33952 | }) |
| | 33953 | #endif |
| | 33954 | |
| | 33955 | #ifdef __LITTLE_ENDIAN__ |
| | 33956 | #define vdotq_lane_s32(__p0_147, __p1_147, __p2_147, __p3_147) __extension__ ({ \ |
| | 33957 | int32x4_t __ret_147; \ |
| | 33958 | int32x4_t __s0_147 = __p0_147; \ |
| | 33959 | int8x16_t __s1_147 = __p1_147; \ |
| | 33960 | int8x8_t __s2_147 = __p2_147; \ |
| | 33961 | int8x8_t __reint_147 = __s2_147; \ |
| | 33962 | int32x4_t __reint1_147 = splatq_lane_s32(*(int32x2_t *) &__reint_147, __p3_147); \ |
| | 33963 | __ret_147 = vdotq_s32(__s0_147, __s1_147, *(int8x16_t *) &__reint1_147); \ |
| | 33964 | __ret_147; \ |
| | 33965 | }) |
| | 33966 | #else |
| | 33967 | #define vdotq_lane_s32(__p0_148, __p1_148, __p2_148, __p3_148) __extension__ ({ \ |
| | 33968 | int32x4_t __ret_148; \ |
| | 33969 | int32x4_t __s0_148 = __p0_148; \ |
| | 33970 | int8x16_t __s1_148 = __p1_148; \ |
| | 33971 | int8x8_t __s2_148 = __p2_148; \ |
| | 33972 | int32x4_t __rev0_148; __rev0_148 = __builtin_shufflevector(__s0_148, __s0_148, 3, 2, 1, 0); \ |
| | 33973 | int8x16_t __rev1_148; __rev1_148 = __builtin_shufflevector(__s1_148, __s1_148, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33974 | int8x8_t __rev2_148; __rev2_148 = __builtin_shufflevector(__s2_148, __s2_148, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 33975 | int8x8_t __reint_148 = __rev2_148; \ |
| | 33976 | int32x4_t __reint1_148 = __noswap_splatq_lane_s32(*(int32x2_t *) &__reint_148, __p3_148); \ |
| | 33977 | __ret_148 = __noswap_vdotq_s32(__rev0_148, __rev1_148, *(int8x16_t *) &__reint1_148); \ |
| | 33978 | __ret_148 = __builtin_shufflevector(__ret_148, __ret_148, 3, 2, 1, 0); \ |
| | 33979 | __ret_148; \ |
| | 33980 | }) |
| | 33981 | #endif |
| | 33982 | |
| | 33983 | #ifdef __LITTLE_ENDIAN__ |
| | 33984 | #define vdot_lane_u32(__p0_149, __p1_149, __p2_149, __p3_149) __extension__ ({ \ |
| | 33985 | uint32x2_t __ret_149; \ |
| | 33986 | uint32x2_t __s0_149 = __p0_149; \ |
| | 33987 | uint8x8_t __s1_149 = __p1_149; \ |
| | 33988 | uint8x8_t __s2_149 = __p2_149; \ |
| | 33989 | uint8x8_t __reint_149 = __s2_149; \ |
| | 33990 | uint32x2_t __reint1_149 = splat_lane_u32(*(uint32x2_t *) &__reint_149, __p3_149); \ |
| | 33991 | __ret_149 = vdot_u32(__s0_149, __s1_149, *(uint8x8_t *) &__reint1_149); \ |
| | 33992 | __ret_149; \ |
| | 33993 | }) |
| | 33994 | #else |
| | 33995 | #define vdot_lane_u32(__p0_150, __p1_150, __p2_150, __p3_150) __extension__ ({ \ |
| | 33996 | uint32x2_t __ret_150; \ |
| | 33997 | uint32x2_t __s0_150 = __p0_150; \ |
| | 33998 | uint8x8_t __s1_150 = __p1_150; \ |
| | 33999 | uint8x8_t __s2_150 = __p2_150; \ |
| | 34000 | uint32x2_t __rev0_150; __rev0_150 = __builtin_shufflevector(__s0_150, __s0_150, 1, 0); \ |
| | 34001 | uint8x8_t __rev1_150; __rev1_150 = __builtin_shufflevector(__s1_150, __s1_150, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 34002 | uint8x8_t __rev2_150; __rev2_150 = __builtin_shufflevector(__s2_150, __s2_150, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 34003 | uint8x8_t __reint_150 = __rev2_150; \ |
| | 34004 | uint32x2_t __reint1_150 = __noswap_splat_lane_u32(*(uint32x2_t *) &__reint_150, __p3_150); \ |
| | 34005 | __ret_150 = __noswap_vdot_u32(__rev0_150, __rev1_150, *(uint8x8_t *) &__reint1_150); \ |
| | 34006 | __ret_150 = __builtin_shufflevector(__ret_150, __ret_150, 1, 0); \ |
| | 34007 | __ret_150; \ |
| | 34008 | }) |
| | 34009 | #endif |
| | 34010 | |
| | 34011 | #ifdef __LITTLE_ENDIAN__ |
| | 34012 | #define vdot_lane_s32(__p0_151, __p1_151, __p2_151, __p3_151) __extension__ ({ \ |
| | 34013 | int32x2_t __ret_151; \ |
| | 34014 | int32x2_t __s0_151 = __p0_151; \ |
| | 34015 | int8x8_t __s1_151 = __p1_151; \ |
| | 34016 | int8x8_t __s2_151 = __p2_151; \ |
| | 34017 | int8x8_t __reint_151 = __s2_151; \ |
| | 34018 | int32x2_t __reint1_151 = splat_lane_s32(*(int32x2_t *) &__reint_151, __p3_151); \ |
| | 34019 | __ret_151 = vdot_s32(__s0_151, __s1_151, *(int8x8_t *) &__reint1_151); \ |
| | 34020 | __ret_151; \ |
| | 34021 | }) |
| | 34022 | #else |
| | 34023 | #define vdot_lane_s32(__p0_152, __p1_152, __p2_152, __p3_152) __extension__ ({ \ |
| | 34024 | int32x2_t __ret_152; \ |
| | 34025 | int32x2_t __s0_152 = __p0_152; \ |
| | 34026 | int8x8_t __s1_152 = __p1_152; \ |
| | 34027 | int8x8_t __s2_152 = __p2_152; \ |
| | 34028 | int32x2_t __rev0_152; __rev0_152 = __builtin_shufflevector(__s0_152, __s0_152, 1, 0); \ |
| | 34029 | int8x8_t __rev1_152; __rev1_152 = __builtin_shufflevector(__s1_152, __s1_152, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 34030 | int8x8_t __rev2_152; __rev2_152 = __builtin_shufflevector(__s2_152, __s2_152, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 34031 | int8x8_t __reint_152 = __rev2_152; \ |
| | 34032 | int32x2_t __reint1_152 = __noswap_splat_lane_s32(*(int32x2_t *) &__reint_152, __p3_152); \ |
| | 34033 | __ret_152 = __noswap_vdot_s32(__rev0_152, __rev1_152, *(int8x8_t *) &__reint1_152); \ |
| | 34034 | __ret_152 = __builtin_shufflevector(__ret_152, __ret_152, 1, 0); \ |
| | 34035 | __ret_152; \ |
| | 34036 | }) |
| | 34037 | #endif |
| | 34038 | |
| | 34039 | #ifdef __LITTLE_ENDIAN__ |
| | 34040 | __ai __attribute__((target("fullfp16"))) float16x8_t vabdq_f16(float16x8_t __p0, float16x8_t __p1) { |
| | 34041 | float16x8_t __ret; |
| | 34042 | __ret = (float16x8_t) __builtin_neon_vabdq_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 33459 | return __ret; | 34043 | return __ret; |
| 33460 | } | 34044 | } |
| 33461 | __ai uint16x4_t vreinterpret_u16_u32(uint32x2_t __p0) { | 34045 | #else |
| 33462 | uint16x4_t __ret; | 34046 | __ai __attribute__((target("fullfp16"))) float16x8_t vabdq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 33463 | __ret = (uint16x4_t)(__p0); | 34047 | float16x8_t __ret; |
| | 34048 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34049 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34050 | __ret = (float16x8_t) __builtin_neon_vabdq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| | 34051 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33464 | return __ret; | 34052 | return __ret; |
| 33465 | } | 34053 | } |
| 33466 | __ai uint16x4_t vreinterpret_u16_u64(uint64x1_t __p0) { | 34054 | #endif |
| 33467 | uint16x4_t __ret; | 34055 | |
| 33468 | __ret = (uint16x4_t)(__p0); | 34056 | #ifdef __LITTLE_ENDIAN__ |
| | 34057 | __ai __attribute__((target("fullfp16"))) float16x4_t vabd_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 34058 | float16x4_t __ret; |
| | 34059 | __ret = (float16x4_t) __builtin_neon_vabd_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 33469 | return __ret; | 34060 | return __ret; |
| 33470 | } | 34061 | } |
| 33471 | __ai uint16x4_t vreinterpret_u16_s8(int8x8_t __p0) { | 34062 | #else |
| 33472 | uint16x4_t __ret; | 34063 | __ai __attribute__((target("fullfp16"))) float16x4_t vabd_f16(float16x4_t __p0, float16x4_t __p1) { |
| 33473 | __ret = (uint16x4_t)(__p0); | 34064 | float16x4_t __ret; |
| | 34065 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34066 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 34067 | __ret = (float16x4_t) __builtin_neon_vabd_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| | 34068 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33474 | return __ret; | 34069 | return __ret; |
| 33475 | } | 34070 | } |
| 33476 | __ai uint16x4_t vreinterpret_u16_f32(float32x2_t __p0) { | 34071 | #endif |
| 33477 | uint16x4_t __ret; | 34072 | |
| 33478 | __ret = (uint16x4_t)(__p0); | 34073 | #ifdef __LITTLE_ENDIAN__ |
| | 34074 | __ai __attribute__((target("fullfp16"))) float16x8_t vabsq_f16(float16x8_t __p0) { |
| | 34075 | float16x8_t __ret; |
| | 34076 | __ret = (float16x8_t) __builtin_neon_vabsq_f16((int8x16_t)__p0, 40); |
| 33479 | return __ret; | 34077 | return __ret; |
| 33480 | } | 34078 | } |
| 33481 | __ai uint16x4_t vreinterpret_u16_f16(float16x4_t __p0) { | 34079 | #else |
| 33482 | uint16x4_t __ret; | 34080 | __ai __attribute__((target("fullfp16"))) float16x8_t vabsq_f16(float16x8_t __p0) { |
| 33483 | __ret = (uint16x4_t)(__p0); | 34081 | float16x8_t __ret; |
| | 34082 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34083 | __ret = (float16x8_t) __builtin_neon_vabsq_f16((int8x16_t)__rev0, 40); |
| | 34084 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33484 | return __ret; | 34085 | return __ret; |
| 33485 | } | 34086 | } |
| 33486 | __ai uint16x4_t vreinterpret_u16_s32(int32x2_t __p0) { | 34087 | #endif |
| 33487 | uint16x4_t __ret; | 34088 | |
| 33488 | __ret = (uint16x4_t)(__p0); | 34089 | #ifdef __LITTLE_ENDIAN__ |
| | 34090 | __ai __attribute__((target("fullfp16"))) float16x4_t vabs_f16(float16x4_t __p0) { |
| | 34091 | float16x4_t __ret; |
| | 34092 | __ret = (float16x4_t) __builtin_neon_vabs_f16((int8x8_t)__p0, 8); |
| 33489 | return __ret; | 34093 | return __ret; |
| 33490 | } | 34094 | } |
| 33491 | __ai uint16x4_t vreinterpret_u16_s64(int64x1_t __p0) { | 34095 | #else |
| 33492 | uint16x4_t __ret; | 34096 | __ai __attribute__((target("fullfp16"))) float16x4_t vabs_f16(float16x4_t __p0) { |
| 33493 | __ret = (uint16x4_t)(__p0); | 34097 | float16x4_t __ret; |
| | 34098 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34099 | __ret = (float16x4_t) __builtin_neon_vabs_f16((int8x8_t)__rev0, 8); |
| | 34100 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33494 | return __ret; | 34101 | return __ret; |
| 33495 | } | 34102 | } |
| 33496 | __ai uint16x4_t vreinterpret_u16_s16(int16x4_t __p0) { | 34103 | #endif |
| 33497 | uint16x4_t __ret; | 34104 | |
| 33498 | __ret = (uint16x4_t)(__p0); | 34105 | #ifdef __LITTLE_ENDIAN__ |
| | 34106 | __ai __attribute__((target("fullfp16"))) float16x8_t vaddq_f16(float16x8_t __p0, float16x8_t __p1) { |
| | 34107 | float16x8_t __ret; |
| | 34108 | __ret = __p0 + __p1; |
| 33499 | return __ret; | 34109 | return __ret; |
| 33500 | } | 34110 | } |
| 33501 | __ai int8x8_t vreinterpret_s8_p8(poly8x8_t __p0) { | 34111 | #else |
| 33502 | int8x8_t __ret; | 34112 | __ai __attribute__((target("fullfp16"))) float16x8_t vaddq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 33503 | __ret = (int8x8_t)(__p0); | 34113 | float16x8_t __ret; |
| | 34114 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34115 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34116 | __ret = __rev0 + __rev1; |
| | 34117 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33504 | return __ret; | 34118 | return __ret; |
| 33505 | } | 34119 | } |
| 33506 | __ai int8x8_t vreinterpret_s8_p16(poly16x4_t __p0) { | 34120 | #endif |
| 33507 | int8x8_t __ret; | 34121 | |
| 33508 | __ret = (int8x8_t)(__p0); | 34122 | #ifdef __LITTLE_ENDIAN__ |
| | 34123 | __ai __attribute__((target("fullfp16"))) float16x4_t vadd_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 34124 | float16x4_t __ret; |
| | 34125 | __ret = __p0 + __p1; |
| 33509 | return __ret; | 34126 | return __ret; |
| 33510 | } | 34127 | } |
| 33511 | __ai int8x8_t vreinterpret_s8_u8(uint8x8_t __p0) { | 34128 | #else |
| 33512 | int8x8_t __ret; | 34129 | __ai __attribute__((target("fullfp16"))) float16x4_t vadd_f16(float16x4_t __p0, float16x4_t __p1) { |
| 33513 | __ret = (int8x8_t)(__p0); | 34130 | float16x4_t __ret; |
| | 34131 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34132 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 34133 | __ret = __rev0 + __rev1; |
| | 34134 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33514 | return __ret; | 34135 | return __ret; |
| 33515 | } | 34136 | } |
| 33516 | __ai int8x8_t vreinterpret_s8_u32(uint32x2_t __p0) { | 34137 | #endif |
| 33517 | int8x8_t __ret; | 34138 | |
| 33518 | __ret = (int8x8_t)(__p0); | 34139 | #ifdef __LITTLE_ENDIAN__ |
| | 34140 | __ai __attribute__((target("fullfp16"))) float16x8_t vbslq_f16(uint16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| | 34141 | float16x8_t __ret; |
| | 34142 | __ret = (float16x8_t) __builtin_neon_vbslq_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); |
| 33519 | return __ret; | 34143 | return __ret; |
| 33520 | } | 34144 | } |
| 33521 | __ai int8x8_t vreinterpret_s8_u64(uint64x1_t __p0) { | 34145 | #else |
| 33522 | int8x8_t __ret; | 34146 | __ai __attribute__((target("fullfp16"))) float16x8_t vbslq_f16(uint16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 33523 | __ret = (int8x8_t)(__p0); | 34147 | float16x8_t __ret; |
| | 34148 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34149 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34150 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34151 | __ret = (float16x8_t) __builtin_neon_vbslq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 40); |
| | 34152 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33524 | return __ret; | 34153 | return __ret; |
| 33525 | } | 34154 | } |
| 33526 | __ai int8x8_t vreinterpret_s8_u16(uint16x4_t __p0) { | 34155 | #endif |
| 33527 | int8x8_t __ret; | 34156 | |
| 33528 | __ret = (int8x8_t)(__p0); | 34157 | #ifdef __LITTLE_ENDIAN__ |
| | 34158 | __ai __attribute__((target("fullfp16"))) float16x4_t vbsl_f16(uint16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| | 34159 | float16x4_t __ret; |
| | 34160 | __ret = (float16x4_t) __builtin_neon_vbsl_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); |
| 33529 | return __ret; | 34161 | return __ret; |
| 33530 | } | 34162 | } |
| 33531 | __ai int8x8_t vreinterpret_s8_f32(float32x2_t __p0) { | 34163 | #else |
| 33532 | int8x8_t __ret; | 34164 | __ai __attribute__((target("fullfp16"))) float16x4_t vbsl_f16(uint16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 33533 | __ret = (int8x8_t)(__p0); | 34165 | float16x4_t __ret; |
| | 34166 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34167 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 34168 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 34169 | __ret = (float16x4_t) __builtin_neon_vbsl_f16((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 8); |
| | 34170 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33534 | return __ret; | 34171 | return __ret; |
| 33535 | } | 34172 | } |
| 33536 | __ai int8x8_t vreinterpret_s8_f16(float16x4_t __p0) { | 34173 | #endif |
| 33537 | int8x8_t __ret; | 34174 | |
| 33538 | __ret = (int8x8_t)(__p0); | 34175 | #ifdef __LITTLE_ENDIAN__ |
| | 34176 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcageq_f16(float16x8_t __p0, float16x8_t __p1) { |
| | 34177 | uint16x8_t __ret; |
| | 34178 | __ret = (uint16x8_t) __builtin_neon_vcageq_f16((int8x16_t)__p0, (int8x16_t)__p1, 49); |
| 33539 | return __ret; | 34179 | return __ret; |
| 33540 | } | 34180 | } |
| 33541 | __ai int8x8_t vreinterpret_s8_s32(int32x2_t __p0) { | 34181 | #else |
| 33542 | int8x8_t __ret; | 34182 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcageq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 33543 | __ret = (int8x8_t)(__p0); | 34183 | uint16x8_t __ret; |
| | 34184 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34185 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34186 | __ret = (uint16x8_t) __builtin_neon_vcageq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 49); |
| | 34187 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33544 | return __ret; | 34188 | return __ret; |
| 33545 | } | 34189 | } |
| 33546 | __ai int8x8_t vreinterpret_s8_s64(int64x1_t __p0) { | 34190 | #endif |
| 33547 | int8x8_t __ret; | 34191 | |
| 33548 | __ret = (int8x8_t)(__p0); | 34192 | #ifdef __LITTLE_ENDIAN__ |
| | 34193 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcage_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 34194 | uint16x4_t __ret; |
| | 34195 | __ret = (uint16x4_t) __builtin_neon_vcage_f16((int8x8_t)__p0, (int8x8_t)__p1, 17); |
| 33549 | return __ret; | 34196 | return __ret; |
| 33550 | } | 34197 | } |
| 33551 | __ai int8x8_t vreinterpret_s8_s16(int16x4_t __p0) { | 34198 | #else |
| 33552 | int8x8_t __ret; | 34199 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcage_f16(float16x4_t __p0, float16x4_t __p1) { |
| 33553 | __ret = (int8x8_t)(__p0); | 34200 | uint16x4_t __ret; |
| | 34201 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34202 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 34203 | __ret = (uint16x4_t) __builtin_neon_vcage_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 17); |
| | 34204 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33554 | return __ret; | 34205 | return __ret; |
| 33555 | } | 34206 | } |
| 33556 | __ai float32x2_t vreinterpret_f32_p8(poly8x8_t __p0) { | 34207 | #endif |
| 33557 | float32x2_t __ret; | 34208 | |
| 33558 | __ret = (float32x2_t)(__p0); | 34209 | #ifdef __LITTLE_ENDIAN__ |
| | 34210 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcagtq_f16(float16x8_t __p0, float16x8_t __p1) { |
| | 34211 | uint16x8_t __ret; |
| | 34212 | __ret = (uint16x8_t) __builtin_neon_vcagtq_f16((int8x16_t)__p0, (int8x16_t)__p1, 49); |
| 33559 | return __ret; | 34213 | return __ret; |
| 33560 | } | 34214 | } |
| 33561 | __ai float32x2_t vreinterpret_f32_p16(poly16x4_t __p0) { | 34215 | #else |
| 33562 | float32x2_t __ret; | 34216 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcagtq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 33563 | __ret = (float32x2_t)(__p0); | 34217 | uint16x8_t __ret; |
| | 34218 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34219 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34220 | __ret = (uint16x8_t) __builtin_neon_vcagtq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 49); |
| | 34221 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33564 | return __ret; | 34222 | return __ret; |
| 33565 | } | 34223 | } |
| 33566 | __ai float32x2_t vreinterpret_f32_u8(uint8x8_t __p0) { | 34224 | #endif |
| 33567 | float32x2_t __ret; | 34225 | |
| 33568 | __ret = (float32x2_t)(__p0); | 34226 | #ifdef __LITTLE_ENDIAN__ |
| | 34227 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcagt_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 34228 | uint16x4_t __ret; |
| | 34229 | __ret = (uint16x4_t) __builtin_neon_vcagt_f16((int8x8_t)__p0, (int8x8_t)__p1, 17); |
| 33569 | return __ret; | 34230 | return __ret; |
| 33570 | } | 34231 | } |
| 33571 | __ai float32x2_t vreinterpret_f32_u32(uint32x2_t __p0) { | 34232 | #else |
| 33572 | float32x2_t __ret; | 34233 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcagt_f16(float16x4_t __p0, float16x4_t __p1) { |
| 33573 | __ret = (float32x2_t)(__p0); | 34234 | uint16x4_t __ret; |
| | 34235 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34236 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 34237 | __ret = (uint16x4_t) __builtin_neon_vcagt_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 17); |
| | 34238 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33574 | return __ret; | 34239 | return __ret; |
| 33575 | } | 34240 | } |
| 33576 | __ai float32x2_t vreinterpret_f32_u64(uint64x1_t __p0) { | 34241 | #endif |
| 33577 | float32x2_t __ret; | 34242 | |
| 33578 | __ret = (float32x2_t)(__p0); | 34243 | #ifdef __LITTLE_ENDIAN__ |
| | 34244 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcaleq_f16(float16x8_t __p0, float16x8_t __p1) { |
| | 34245 | uint16x8_t __ret; |
| | 34246 | __ret = (uint16x8_t) __builtin_neon_vcaleq_f16((int8x16_t)__p0, (int8x16_t)__p1, 49); |
| 33579 | return __ret; | 34247 | return __ret; |
| 33580 | } | 34248 | } |
| 33581 | __ai float32x2_t vreinterpret_f32_u16(uint16x4_t __p0) { | 34249 | #else |
| 33582 | float32x2_t __ret; | 34250 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcaleq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 33583 | __ret = (float32x2_t)(__p0); | 34251 | uint16x8_t __ret; |
| | 34252 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34253 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34254 | __ret = (uint16x8_t) __builtin_neon_vcaleq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 49); |
| | 34255 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33584 | return __ret; | 34256 | return __ret; |
| 33585 | } | 34257 | } |
| 33586 | __ai float32x2_t vreinterpret_f32_s8(int8x8_t __p0) { | 34258 | #endif |
| 33587 | float32x2_t __ret; | 34259 | |
| 33588 | __ret = (float32x2_t)(__p0); | 34260 | #ifdef __LITTLE_ENDIAN__ |
| | 34261 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcale_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 34262 | uint16x4_t __ret; |
| | 34263 | __ret = (uint16x4_t) __builtin_neon_vcale_f16((int8x8_t)__p0, (int8x8_t)__p1, 17); |
| 33589 | return __ret; | 34264 | return __ret; |
| 33590 | } | 34265 | } |
| 33591 | __ai float32x2_t vreinterpret_f32_f16(float16x4_t __p0) { | 34266 | #else |
| 33592 | float32x2_t __ret; | 34267 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcale_f16(float16x4_t __p0, float16x4_t __p1) { |
| 33593 | __ret = (float32x2_t)(__p0); | 34268 | uint16x4_t __ret; |
| | 34269 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34270 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 34271 | __ret = (uint16x4_t) __builtin_neon_vcale_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 17); |
| | 34272 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33594 | return __ret; | 34273 | return __ret; |
| 33595 | } | 34274 | } |
| 33596 | __ai float32x2_t vreinterpret_f32_s32(int32x2_t __p0) { | 34275 | #endif |
| 33597 | float32x2_t __ret; | 34276 | |
| 33598 | __ret = (float32x2_t)(__p0); | 34277 | #ifdef __LITTLE_ENDIAN__ |
| | 34278 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcaltq_f16(float16x8_t __p0, float16x8_t __p1) { |
| | 34279 | uint16x8_t __ret; |
| | 34280 | __ret = (uint16x8_t) __builtin_neon_vcaltq_f16((int8x16_t)__p0, (int8x16_t)__p1, 49); |
| 33599 | return __ret; | 34281 | return __ret; |
| 33600 | } | 34282 | } |
| 33601 | __ai float32x2_t vreinterpret_f32_s64(int64x1_t __p0) { | 34283 | #else |
| 33602 | float32x2_t __ret; | 34284 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcaltq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 33603 | __ret = (float32x2_t)(__p0); | 34285 | uint16x8_t __ret; |
| | 34286 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34287 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34288 | __ret = (uint16x8_t) __builtin_neon_vcaltq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 49); |
| | 34289 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33604 | return __ret; | 34290 | return __ret; |
| 33605 | } | 34291 | } |
| 33606 | __ai float32x2_t vreinterpret_f32_s16(int16x4_t __p0) { | 34292 | #endif |
| 33607 | float32x2_t __ret; | 34293 | |
| 33608 | __ret = (float32x2_t)(__p0); | 34294 | #ifdef __LITTLE_ENDIAN__ |
| | 34295 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcalt_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 34296 | uint16x4_t __ret; |
| | 34297 | __ret = (uint16x4_t) __builtin_neon_vcalt_f16((int8x8_t)__p0, (int8x8_t)__p1, 17); |
| 33609 | return __ret; | 34298 | return __ret; |
| 33610 | } | 34299 | } |
| 33611 | __ai float16x4_t vreinterpret_f16_p8(poly8x8_t __p0) { | 34300 | #else |
| 33612 | float16x4_t __ret; | 34301 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcalt_f16(float16x4_t __p0, float16x4_t __p1) { |
| 33613 | __ret = (float16x4_t)(__p0); | 34302 | uint16x4_t __ret; |
| | 34303 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34304 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 34305 | __ret = (uint16x4_t) __builtin_neon_vcalt_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 17); |
| | 34306 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33614 | return __ret; | 34307 | return __ret; |
| 33615 | } | 34308 | } |
| 33616 | __ai float16x4_t vreinterpret_f16_p16(poly16x4_t __p0) { | 34309 | #endif |
| 33617 | float16x4_t __ret; | 34310 | |
| 33618 | __ret = (float16x4_t)(__p0); | 34311 | #ifdef __LITTLE_ENDIAN__ |
| | 34312 | __ai __attribute__((target("fullfp16"))) uint16x8_t vceqq_f16(float16x8_t __p0, float16x8_t __p1) { |
| | 34313 | uint16x8_t __ret; |
| | 34314 | __ret = (uint16x8_t)(__p0 == __p1); |
| 33619 | return __ret; | 34315 | return __ret; |
| 33620 | } | 34316 | } |
| 33621 | __ai float16x4_t vreinterpret_f16_u8(uint8x8_t __p0) { | 34317 | #else |
| 33622 | float16x4_t __ret; | 34318 | __ai __attribute__((target("fullfp16"))) uint16x8_t vceqq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 33623 | __ret = (float16x4_t)(__p0); | 34319 | uint16x8_t __ret; |
| | 34320 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34321 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34322 | __ret = (uint16x8_t)(__rev0 == __rev1); |
| | 34323 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33624 | return __ret; | 34324 | return __ret; |
| 33625 | } | 34325 | } |
| 33626 | __ai float16x4_t vreinterpret_f16_u32(uint32x2_t __p0) { | 34326 | #endif |
| 33627 | float16x4_t __ret; | 34327 | |
| 33628 | __ret = (float16x4_t)(__p0); | 34328 | #ifdef __LITTLE_ENDIAN__ |
| | 34329 | __ai __attribute__((target("fullfp16"))) uint16x4_t vceq_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 34330 | uint16x4_t __ret; |
| | 34331 | __ret = (uint16x4_t)(__p0 == __p1); |
| 33629 | return __ret; | 34332 | return __ret; |
| 33630 | } | 34333 | } |
| 33631 | __ai float16x4_t vreinterpret_f16_u64(uint64x1_t __p0) { | 34334 | #else |
| 33632 | float16x4_t __ret; | 34335 | __ai __attribute__((target("fullfp16"))) uint16x4_t vceq_f16(float16x4_t __p0, float16x4_t __p1) { |
| 33633 | __ret = (float16x4_t)(__p0); | 34336 | uint16x4_t __ret; |
| | 34337 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34338 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 34339 | __ret = (uint16x4_t)(__rev0 == __rev1); |
| | 34340 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33634 | return __ret; | 34341 | return __ret; |
| 33635 | } | 34342 | } |
| 33636 | __ai float16x4_t vreinterpret_f16_u16(uint16x4_t __p0) { | 34343 | #endif |
| 33637 | float16x4_t __ret; | 34344 | |
| 33638 | __ret = (float16x4_t)(__p0); | 34345 | #ifdef __LITTLE_ENDIAN__ |
| | 34346 | __ai __attribute__((target("fullfp16"))) uint16x8_t vceqzq_f16(float16x8_t __p0) { |
| | 34347 | uint16x8_t __ret; |
| | 34348 | __ret = (uint16x8_t) __builtin_neon_vceqzq_f16((int8x16_t)__p0, 49); |
| 33639 | return __ret; | 34349 | return __ret; |
| 33640 | } | 34350 | } |
| 33641 | __ai float16x4_t vreinterpret_f16_s8(int8x8_t __p0) { | 34351 | #else |
| 33642 | float16x4_t __ret; | 34352 | __ai __attribute__((target("fullfp16"))) uint16x8_t vceqzq_f16(float16x8_t __p0) { |
| 33643 | __ret = (float16x4_t)(__p0); | 34353 | uint16x8_t __ret; |
| | 34354 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34355 | __ret = (uint16x8_t) __builtin_neon_vceqzq_f16((int8x16_t)__rev0, 49); |
| | 34356 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33644 | return __ret; | 34357 | return __ret; |
| 33645 | } | 34358 | } |
| 33646 | __ai float16x4_t vreinterpret_f16_f32(float32x2_t __p0) { | 34359 | #endif |
| 33647 | float16x4_t __ret; | 34360 | |
| 33648 | __ret = (float16x4_t)(__p0); | 34361 | #ifdef __LITTLE_ENDIAN__ |
| | 34362 | __ai __attribute__((target("fullfp16"))) uint16x4_t vceqz_f16(float16x4_t __p0) { |
| | 34363 | uint16x4_t __ret; |
| | 34364 | __ret = (uint16x4_t) __builtin_neon_vceqz_f16((int8x8_t)__p0, 17); |
| 33649 | return __ret; | 34365 | return __ret; |
| 33650 | } | 34366 | } |
| 33651 | __ai float16x4_t vreinterpret_f16_s32(int32x2_t __p0) { | 34367 | #else |
| 33652 | float16x4_t __ret; | 34368 | __ai __attribute__((target("fullfp16"))) uint16x4_t vceqz_f16(float16x4_t __p0) { |
| 33653 | __ret = (float16x4_t)(__p0); | 34369 | uint16x4_t __ret; |
| | 34370 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34371 | __ret = (uint16x4_t) __builtin_neon_vceqz_f16((int8x8_t)__rev0, 17); |
| | 34372 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33654 | return __ret; | 34373 | return __ret; |
| 33655 | } | 34374 | } |
| 33656 | __ai float16x4_t vreinterpret_f16_s64(int64x1_t __p0) { | 34375 | #endif |
| 33657 | float16x4_t __ret; | 34376 | |
| 33658 | __ret = (float16x4_t)(__p0); | 34377 | #ifdef __LITTLE_ENDIAN__ |
| | 34378 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcgeq_f16(float16x8_t __p0, float16x8_t __p1) { |
| | 34379 | uint16x8_t __ret; |
| | 34380 | __ret = (uint16x8_t)(__p0 >= __p1); |
| 33659 | return __ret; | 34381 | return __ret; |
| 33660 | } | 34382 | } |
| 33661 | __ai float16x4_t vreinterpret_f16_s16(int16x4_t __p0) { | 34383 | #else |
| 33662 | float16x4_t __ret; | 34384 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcgeq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 33663 | __ret = (float16x4_t)(__p0); | 34385 | uint16x8_t __ret; |
| | 34386 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34387 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34388 | __ret = (uint16x8_t)(__rev0 >= __rev1); |
| | 34389 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33664 | return __ret; | 34390 | return __ret; |
| 33665 | } | 34391 | } |
| 33666 | __ai int32x2_t vreinterpret_s32_p8(poly8x8_t __p0) { | 34392 | #endif |
| 33667 | int32x2_t __ret; | 34393 | |
| 33668 | __ret = (int32x2_t)(__p0); | 34394 | #ifdef __LITTLE_ENDIAN__ |
| | 34395 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcge_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 34396 | uint16x4_t __ret; |
| | 34397 | __ret = (uint16x4_t)(__p0 >= __p1); |
| 33669 | return __ret; | 34398 | return __ret; |
| 33670 | } | 34399 | } |
| 33671 | __ai int32x2_t vreinterpret_s32_p16(poly16x4_t __p0) { | 34400 | #else |
| 33672 | int32x2_t __ret; | 34401 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcge_f16(float16x4_t __p0, float16x4_t __p1) { |
| 33673 | __ret = (int32x2_t)(__p0); | 34402 | uint16x4_t __ret; |
| | 34403 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34404 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 34405 | __ret = (uint16x4_t)(__rev0 >= __rev1); |
| | 34406 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33674 | return __ret; | 34407 | return __ret; |
| 33675 | } | 34408 | } |
| 33676 | __ai int32x2_t vreinterpret_s32_u8(uint8x8_t __p0) { | 34409 | #endif |
| 33677 | int32x2_t __ret; | 34410 | |
| 33678 | __ret = (int32x2_t)(__p0); | 34411 | #ifdef __LITTLE_ENDIAN__ |
| | 34412 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcgezq_f16(float16x8_t __p0) { |
| | 34413 | uint16x8_t __ret; |
| | 34414 | __ret = (uint16x8_t) __builtin_neon_vcgezq_f16((int8x16_t)__p0, 49); |
| 33679 | return __ret; | 34415 | return __ret; |
| 33680 | } | 34416 | } |
| 33681 | __ai int32x2_t vreinterpret_s32_u32(uint32x2_t __p0) { | 34417 | #else |
| 33682 | int32x2_t __ret; | 34418 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcgezq_f16(float16x8_t __p0) { |
| 33683 | __ret = (int32x2_t)(__p0); | 34419 | uint16x8_t __ret; |
| | 34420 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34421 | __ret = (uint16x8_t) __builtin_neon_vcgezq_f16((int8x16_t)__rev0, 49); |
| | 34422 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33684 | return __ret; | 34423 | return __ret; |
| 33685 | } | 34424 | } |
| 33686 | __ai int32x2_t vreinterpret_s32_u64(uint64x1_t __p0) { | 34425 | #endif |
| 33687 | int32x2_t __ret; | 34426 | |
| 33688 | __ret = (int32x2_t)(__p0); | 34427 | #ifdef __LITTLE_ENDIAN__ |
| | 34428 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcgez_f16(float16x4_t __p0) { |
| | 34429 | uint16x4_t __ret; |
| | 34430 | __ret = (uint16x4_t) __builtin_neon_vcgez_f16((int8x8_t)__p0, 17); |
| 33689 | return __ret; | 34431 | return __ret; |
| 33690 | } | 34432 | } |
| 33691 | __ai int32x2_t vreinterpret_s32_u16(uint16x4_t __p0) { | 34433 | #else |
| 33692 | int32x2_t __ret; | 34434 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcgez_f16(float16x4_t __p0) { |
| 33693 | __ret = (int32x2_t)(__p0); | 34435 | uint16x4_t __ret; |
| | 34436 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34437 | __ret = (uint16x4_t) __builtin_neon_vcgez_f16((int8x8_t)__rev0, 17); |
| | 34438 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33694 | return __ret; | 34439 | return __ret; |
| 33695 | } | 34440 | } |
| 33696 | __ai int32x2_t vreinterpret_s32_s8(int8x8_t __p0) { | 34441 | #endif |
| 33697 | int32x2_t __ret; | 34442 | |
| 33698 | __ret = (int32x2_t)(__p0); | 34443 | #ifdef __LITTLE_ENDIAN__ |
| | 34444 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcgtq_f16(float16x8_t __p0, float16x8_t __p1) { |
| | 34445 | uint16x8_t __ret; |
| | 34446 | __ret = (uint16x8_t)(__p0 > __p1); |
| 33699 | return __ret; | 34447 | return __ret; |
| 33700 | } | 34448 | } |
| 33701 | __ai int32x2_t vreinterpret_s32_f32(float32x2_t __p0) { | 34449 | #else |
| 33702 | int32x2_t __ret; | 34450 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcgtq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 33703 | __ret = (int32x2_t)(__p0); | 34451 | uint16x8_t __ret; |
| | 34452 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34453 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34454 | __ret = (uint16x8_t)(__rev0 > __rev1); |
| | 34455 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33704 | return __ret; | 34456 | return __ret; |
| 33705 | } | 34457 | } |
| 33706 | __ai int32x2_t vreinterpret_s32_f16(float16x4_t __p0) { | 34458 | #endif |
| 33707 | int32x2_t __ret; | 34459 | |
| 33708 | __ret = (int32x2_t)(__p0); | 34460 | #ifdef __LITTLE_ENDIAN__ |
| | 34461 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcgt_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 34462 | uint16x4_t __ret; |
| | 34463 | __ret = (uint16x4_t)(__p0 > __p1); |
| 33709 | return __ret; | 34464 | return __ret; |
| 33710 | } | 34465 | } |
| 33711 | __ai int32x2_t vreinterpret_s32_s64(int64x1_t __p0) { | 34466 | #else |
| 33712 | int32x2_t __ret; | 34467 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcgt_f16(float16x4_t __p0, float16x4_t __p1) { |
| 33713 | __ret = (int32x2_t)(__p0); | 34468 | uint16x4_t __ret; |
| | 34469 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34470 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 34471 | __ret = (uint16x4_t)(__rev0 > __rev1); |
| | 34472 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33714 | return __ret; | 34473 | return __ret; |
| 33715 | } | 34474 | } |
| 33716 | __ai int32x2_t vreinterpret_s32_s16(int16x4_t __p0) { | 34475 | #endif |
| 33717 | int32x2_t __ret; | 34476 | |
| 33718 | __ret = (int32x2_t)(__p0); | 34477 | #ifdef __LITTLE_ENDIAN__ |
| | 34478 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcgtzq_f16(float16x8_t __p0) { |
| | 34479 | uint16x8_t __ret; |
| | 34480 | __ret = (uint16x8_t) __builtin_neon_vcgtzq_f16((int8x16_t)__p0, 49); |
| 33719 | return __ret; | 34481 | return __ret; |
| 33720 | } | 34482 | } |
| 33721 | __ai int64x1_t vreinterpret_s64_p8(poly8x8_t __p0) { | 34483 | #else |
| 33722 | int64x1_t __ret; | 34484 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcgtzq_f16(float16x8_t __p0) { |
| 33723 | __ret = (int64x1_t)(__p0); | 34485 | uint16x8_t __ret; |
| | 34486 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34487 | __ret = (uint16x8_t) __builtin_neon_vcgtzq_f16((int8x16_t)__rev0, 49); |
| | 34488 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33724 | return __ret; | 34489 | return __ret; |
| 33725 | } | 34490 | } |
| 33726 | __ai int64x1_t vreinterpret_s64_p16(poly16x4_t __p0) { | 34491 | #endif |
| 33727 | int64x1_t __ret; | 34492 | |
| 33728 | __ret = (int64x1_t)(__p0); | 34493 | #ifdef __LITTLE_ENDIAN__ |
| | 34494 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcgtz_f16(float16x4_t __p0) { |
| | 34495 | uint16x4_t __ret; |
| | 34496 | __ret = (uint16x4_t) __builtin_neon_vcgtz_f16((int8x8_t)__p0, 17); |
| 33729 | return __ret; | 34497 | return __ret; |
| 33730 | } | 34498 | } |
| 33731 | __ai int64x1_t vreinterpret_s64_u8(uint8x8_t __p0) { | 34499 | #else |
| 33732 | int64x1_t __ret; | 34500 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcgtz_f16(float16x4_t __p0) { |
| 33733 | __ret = (int64x1_t)(__p0); | 34501 | uint16x4_t __ret; |
| | 34502 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34503 | __ret = (uint16x4_t) __builtin_neon_vcgtz_f16((int8x8_t)__rev0, 17); |
| | 34504 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33734 | return __ret; | 34505 | return __ret; |
| 33735 | } | 34506 | } |
| 33736 | __ai int64x1_t vreinterpret_s64_u32(uint32x2_t __p0) { | 34507 | #endif |
| 33737 | int64x1_t __ret; | 34508 | |
| 33738 | __ret = (int64x1_t)(__p0); | 34509 | #ifdef __LITTLE_ENDIAN__ |
| | 34510 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcleq_f16(float16x8_t __p0, float16x8_t __p1) { |
| | 34511 | uint16x8_t __ret; |
| | 34512 | __ret = (uint16x8_t)(__p0 <= __p1); |
| 33739 | return __ret; | 34513 | return __ret; |
| 33740 | } | 34514 | } |
| 33741 | __ai int64x1_t vreinterpret_s64_u64(uint64x1_t __p0) { | 34515 | #else |
| 33742 | int64x1_t __ret; | 34516 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcleq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 33743 | __ret = (int64x1_t)(__p0); | 34517 | uint16x8_t __ret; |
| | 34518 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34519 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34520 | __ret = (uint16x8_t)(__rev0 <= __rev1); |
| | 34521 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33744 | return __ret; | 34522 | return __ret; |
| 33745 | } | 34523 | } |
| 33746 | __ai int64x1_t vreinterpret_s64_u16(uint16x4_t __p0) { | 34524 | #endif |
| 33747 | int64x1_t __ret; | 34525 | |
| 33748 | __ret = (int64x1_t)(__p0); | 34526 | #ifdef __LITTLE_ENDIAN__ |
| | 34527 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcle_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 34528 | uint16x4_t __ret; |
| | 34529 | __ret = (uint16x4_t)(__p0 <= __p1); |
| | 34530 | return __ret; |
| | 34531 | } |
| | 34532 | #else |
| | 34533 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcle_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 34534 | uint16x4_t __ret; |
| | 34535 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34536 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 34537 | __ret = (uint16x4_t)(__rev0 <= __rev1); |
| | 34538 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33749 | return __ret; | 34539 | return __ret; |
| 33750 | } | 34540 | } |
| 33751 | __ai int64x1_t vreinterpret_s64_s8(int8x8_t __p0) { | 34541 | #endif |
| 33752 | int64x1_t __ret; | 34542 | |
| 33753 | __ret = (int64x1_t)(__p0); | 34543 | #ifdef __LITTLE_ENDIAN__ |
| | 34544 | __ai __attribute__((target("fullfp16"))) uint16x8_t vclezq_f16(float16x8_t __p0) { |
| | 34545 | uint16x8_t __ret; |
| | 34546 | __ret = (uint16x8_t) __builtin_neon_vclezq_f16((int8x16_t)__p0, 49); |
| 33754 | return __ret; | 34547 | return __ret; |
| 33755 | } | 34548 | } |
| 33756 | __ai int64x1_t vreinterpret_s64_f32(float32x2_t __p0) { | 34549 | #else |
| 33757 | int64x1_t __ret; | 34550 | __ai __attribute__((target("fullfp16"))) uint16x8_t vclezq_f16(float16x8_t __p0) { |
| 33758 | __ret = (int64x1_t)(__p0); | 34551 | uint16x8_t __ret; |
| | 34552 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34553 | __ret = (uint16x8_t) __builtin_neon_vclezq_f16((int8x16_t)__rev0, 49); |
| | 34554 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33759 | return __ret; | 34555 | return __ret; |
| 33760 | } | 34556 | } |
| 33761 | __ai int64x1_t vreinterpret_s64_f16(float16x4_t __p0) { | 34557 | #endif |
| 33762 | int64x1_t __ret; | 34558 | |
| 33763 | __ret = (int64x1_t)(__p0); | 34559 | #ifdef __LITTLE_ENDIAN__ |
| | 34560 | __ai __attribute__((target("fullfp16"))) uint16x4_t vclez_f16(float16x4_t __p0) { |
| | 34561 | uint16x4_t __ret; |
| | 34562 | __ret = (uint16x4_t) __builtin_neon_vclez_f16((int8x8_t)__p0, 17); |
| 33764 | return __ret; | 34563 | return __ret; |
| 33765 | } | 34564 | } |
| 33766 | __ai int64x1_t vreinterpret_s64_s32(int32x2_t __p0) { | 34565 | #else |
| 33767 | int64x1_t __ret; | 34566 | __ai __attribute__((target("fullfp16"))) uint16x4_t vclez_f16(float16x4_t __p0) { |
| 33768 | __ret = (int64x1_t)(__p0); | 34567 | uint16x4_t __ret; |
| | 34568 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34569 | __ret = (uint16x4_t) __builtin_neon_vclez_f16((int8x8_t)__rev0, 17); |
| | 34570 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33769 | return __ret; | 34571 | return __ret; |
| 33770 | } | 34572 | } |
| 33771 | __ai int64x1_t vreinterpret_s64_s16(int16x4_t __p0) { | 34573 | #endif |
| 33772 | int64x1_t __ret; | 34574 | |
| 33773 | __ret = (int64x1_t)(__p0); | 34575 | #ifdef __LITTLE_ENDIAN__ |
| | 34576 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcltq_f16(float16x8_t __p0, float16x8_t __p1) { |
| | 34577 | uint16x8_t __ret; |
| | 34578 | __ret = (uint16x8_t)(__p0 < __p1); |
| 33774 | return __ret; | 34579 | return __ret; |
| 33775 | } | 34580 | } |
| 33776 | __ai int16x4_t vreinterpret_s16_p8(poly8x8_t __p0) { | 34581 | #else |
| 33777 | int16x4_t __ret; | 34582 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcltq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 33778 | __ret = (int16x4_t)(__p0); | 34583 | uint16x8_t __ret; |
| | 34584 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34585 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34586 | __ret = (uint16x8_t)(__rev0 < __rev1); |
| | 34587 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33779 | return __ret; | 34588 | return __ret; |
| 33780 | } | 34589 | } |
| 33781 | __ai int16x4_t vreinterpret_s16_p16(poly16x4_t __p0) { | 34590 | #endif |
| 33782 | int16x4_t __ret; | 34591 | |
| 33783 | __ret = (int16x4_t)(__p0); | 34592 | #ifdef __LITTLE_ENDIAN__ |
| | 34593 | __ai __attribute__((target("fullfp16"))) uint16x4_t vclt_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 34594 | uint16x4_t __ret; |
| | 34595 | __ret = (uint16x4_t)(__p0 < __p1); |
| 33784 | return __ret; | 34596 | return __ret; |
| 33785 | } | 34597 | } |
| 33786 | __ai int16x4_t vreinterpret_s16_u8(uint8x8_t __p0) { | 34598 | #else |
| 33787 | int16x4_t __ret; | 34599 | __ai __attribute__((target("fullfp16"))) uint16x4_t vclt_f16(float16x4_t __p0, float16x4_t __p1) { |
| 33788 | __ret = (int16x4_t)(__p0); | 34600 | uint16x4_t __ret; |
| | 34601 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34602 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 34603 | __ret = (uint16x4_t)(__rev0 < __rev1); |
| | 34604 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33789 | return __ret; | 34605 | return __ret; |
| 33790 | } | 34606 | } |
| 33791 | __ai int16x4_t vreinterpret_s16_u32(uint32x2_t __p0) { | 34607 | #endif |
| 33792 | int16x4_t __ret; | 34608 | |
| 33793 | __ret = (int16x4_t)(__p0); | 34609 | #ifdef __LITTLE_ENDIAN__ |
| | 34610 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcltzq_f16(float16x8_t __p0) { |
| | 34611 | uint16x8_t __ret; |
| | 34612 | __ret = (uint16x8_t) __builtin_neon_vcltzq_f16((int8x16_t)__p0, 49); |
| 33794 | return __ret; | 34613 | return __ret; |
| 33795 | } | 34614 | } |
| 33796 | __ai int16x4_t vreinterpret_s16_u64(uint64x1_t __p0) { | 34615 | #else |
| 33797 | int16x4_t __ret; | 34616 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcltzq_f16(float16x8_t __p0) { |
| 33798 | __ret = (int16x4_t)(__p0); | 34617 | uint16x8_t __ret; |
| | 34618 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34619 | __ret = (uint16x8_t) __builtin_neon_vcltzq_f16((int8x16_t)__rev0, 49); |
| | 34620 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33799 | return __ret; | 34621 | return __ret; |
| 33800 | } | 34622 | } |
| 33801 | __ai int16x4_t vreinterpret_s16_u16(uint16x4_t __p0) { | 34623 | #endif |
| 33802 | int16x4_t __ret; | 34624 | |
| 33803 | __ret = (int16x4_t)(__p0); | 34625 | #ifdef __LITTLE_ENDIAN__ |
| | 34626 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcltz_f16(float16x4_t __p0) { |
| | 34627 | uint16x4_t __ret; |
| | 34628 | __ret = (uint16x4_t) __builtin_neon_vcltz_f16((int8x8_t)__p0, 17); |
| 33804 | return __ret; | 34629 | return __ret; |
| 33805 | } | 34630 | } |
| 33806 | __ai int16x4_t vreinterpret_s16_s8(int8x8_t __p0) { | 34631 | #else |
| 33807 | int16x4_t __ret; | 34632 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcltz_f16(float16x4_t __p0) { |
| 33808 | __ret = (int16x4_t)(__p0); | 34633 | uint16x4_t __ret; |
| | 34634 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34635 | __ret = (uint16x4_t) __builtin_neon_vcltz_f16((int8x8_t)__rev0, 17); |
| | 34636 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33809 | return __ret; | 34637 | return __ret; |
| 33810 | } | 34638 | } |
| 33811 | __ai int16x4_t vreinterpret_s16_f32(float32x2_t __p0) { | 34639 | #endif |
| 33812 | int16x4_t __ret; | 34640 | |
| 33813 | __ret = (int16x4_t)(__p0); | 34641 | #ifdef __LITTLE_ENDIAN__ |
| | 34642 | __ai __attribute__((target("fullfp16"))) float16x8_t vcvtq_f16_u16(uint16x8_t __p0) { |
| | 34643 | float16x8_t __ret; |
| | 34644 | __ret = (float16x8_t) __builtin_neon_vcvtq_f16_u16((int8x16_t)__p0, 49); |
| 33814 | return __ret; | 34645 | return __ret; |
| 33815 | } | 34646 | } |
| 33816 | __ai int16x4_t vreinterpret_s16_f16(float16x4_t __p0) { | 34647 | #else |
| 33817 | int16x4_t __ret; | 34648 | __ai __attribute__((target("fullfp16"))) float16x8_t vcvtq_f16_u16(uint16x8_t __p0) { |
| 33818 | __ret = (int16x4_t)(__p0); | 34649 | float16x8_t __ret; |
| | 34650 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34651 | __ret = (float16x8_t) __builtin_neon_vcvtq_f16_u16((int8x16_t)__rev0, 49); |
| | 34652 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33819 | return __ret; | 34653 | return __ret; |
| 33820 | } | 34654 | } |
| 33821 | __ai int16x4_t vreinterpret_s16_s32(int32x2_t __p0) { | 34655 | #endif |
| 33822 | int16x4_t __ret; | 34656 | |
| 33823 | __ret = (int16x4_t)(__p0); | 34657 | #ifdef __LITTLE_ENDIAN__ |
| | 34658 | __ai __attribute__((target("fullfp16"))) float16x8_t vcvtq_f16_s16(int16x8_t __p0) { |
| | 34659 | float16x8_t __ret; |
| | 34660 | __ret = (float16x8_t) __builtin_neon_vcvtq_f16_s16((int8x16_t)__p0, 33); |
| 33824 | return __ret; | 34661 | return __ret; |
| 33825 | } | 34662 | } |
| 33826 | __ai int16x4_t vreinterpret_s16_s64(int64x1_t __p0) { | 34663 | #else |
| 33827 | int16x4_t __ret; | 34664 | __ai __attribute__((target("fullfp16"))) float16x8_t vcvtq_f16_s16(int16x8_t __p0) { |
| 33828 | __ret = (int16x4_t)(__p0); | 34665 | float16x8_t __ret; |
| | 34666 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34667 | __ret = (float16x8_t) __builtin_neon_vcvtq_f16_s16((int8x16_t)__rev0, 33); |
| | 34668 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 33829 | return __ret; | 34669 | return __ret; |
| 33830 | } | 34670 | } |
| 33831 | #endif | 34671 | #endif |
| 33832 | #if (__ARM_FP & 2) | 34672 | |
| 33833 | #ifdef __LITTLE_ENDIAN__ | 34673 | #ifdef __LITTLE_ENDIAN__ |
| 33834 | __ai float16x4_t vcvt_f16_f32(float32x4_t __p0) { | 34674 | __ai __attribute__((target("fullfp16"))) float16x4_t vcvt_f16_u16(uint16x4_t __p0) { |
| 33835 | float16x4_t __ret; | 34675 | float16x4_t __ret; |
| 33836 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_f32((int8x16_t)__p0, 41); | 34676 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_u16((int8x8_t)__p0, 17); |
| 33837 | return __ret; | 34677 | return __ret; |
| 33838 | } | 34678 | } |
| 33839 | #else | 34679 | #else |
| 33840 | __ai float16x4_t vcvt_f16_f32(float32x4_t __p0) { | 34680 | __ai __attribute__((target("fullfp16"))) float16x4_t vcvt_f16_u16(uint16x4_t __p0) { |
| 33841 | float16x4_t __ret; | 34681 | float16x4_t __ret; |
| 33842 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 34682 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 33843 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_f32((int8x16_t)__rev0, 41); | 34683 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_u16((int8x8_t)__rev0, 17); |
| 33844 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 34684 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33845 | return __ret; | 34685 | return __ret; |
| 33846 | } | 34686 | } |
| 33847 | __ai float16x4_t __noswap_vcvt_f16_f32(float32x4_t __p0) { | | |
| 33848 | float16x4_t __ret; | | |
| 33849 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_f32((int8x16_t)__p0, 41); | | |
| 33850 | return __ret; | | |
| 33851 | } | | |
| 33852 | #endif | 34687 | #endif |
| 33853 | | 34688 | |
| 33854 | #ifdef __LITTLE_ENDIAN__ | 34689 | #ifdef __LITTLE_ENDIAN__ |
| 33855 | __ai float32x4_t vcvt_f32_f16(float16x4_t __p0) { | 34690 | __ai __attribute__((target("fullfp16"))) float16x4_t vcvt_f16_s16(int16x4_t __p0) { |
| 33856 | float32x4_t __ret; | 34691 | float16x4_t __ret; |
| 33857 | __ret = (float32x4_t) __builtin_neon_vcvt_f32_f16((int8x8_t)__p0, 8); | 34692 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_s16((int8x8_t)__p0, 1); |
| 33858 | return __ret; | 34693 | return __ret; |
| 33859 | } | 34694 | } |
| 33860 | #else | 34695 | #else |
| 33861 | __ai float32x4_t vcvt_f32_f16(float16x4_t __p0) { | 34696 | __ai __attribute__((target("fullfp16"))) float16x4_t vcvt_f16_s16(int16x4_t __p0) { |
| 33862 | float32x4_t __ret; | 34697 | float16x4_t __ret; |
| 33863 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 34698 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 33864 | __ret = (float32x4_t) __builtin_neon_vcvt_f32_f16((int8x8_t)__rev0, 8); | 34699 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_s16((int8x8_t)__rev0, 1); |
| 33865 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 34700 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 33866 | return __ret; | 34701 | return __ret; |
| 33867 | } | 34702 | } |
| 33868 | __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | | |
| 33869 | float32x4_t __ret; | | |
| 33870 | __ret = (float32x4_t) __builtin_neon_vcvt_f32_f16((int8x8_t)__p0, 8); | | |
| 33871 | return __ret; | | |
| 33872 | } | | |
| 33873 | #endif | 34703 | #endif |
| 33874 | | 34704 | |
| 33875 | #ifdef __LITTLE_ENDIAN__ | 34705 | #ifdef __LITTLE_ENDIAN__ |
| 33876 | #define vld1q_f16(__p0) __extension__ ({ \ | 34706 | #define vcvtq_n_f16_u16(__p0, __p1) __extension__ ({ \ |
| 33877 | float16x8_t __ret; \ | 34707 | float16x8_t __ret; \ |
| 33878 | __ret = (float16x8_t) __builtin_neon_vld1q_v(__p0, 40); \ | 34708 | uint16x8_t __s0 = __p0; \ |
| | 34709 | __ret = (float16x8_t) __builtin_neon_vcvtq_n_f16_u16((int8x16_t)__s0, __p1, 49); \ |
| 33879 | __ret; \ | 34710 | __ret; \ |
| 33880 | }) | 34711 | }) |
| 33881 | #else | 34712 | #else |
| 33882 | #define vld1q_f16(__p0) __extension__ ({ \ | 34713 | #define vcvtq_n_f16_u16(__p0, __p1) __extension__ ({ \ |
| 33883 | float16x8_t __ret; \ | 34714 | float16x8_t __ret; \ |
| 33884 | __ret = (float16x8_t) __builtin_neon_vld1q_v(__p0, 40); \ | 34715 | uint16x8_t __s0 = __p0; \ |
| | 34716 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 34717 | __ret = (float16x8_t) __builtin_neon_vcvtq_n_f16_u16((int8x16_t)__rev0, __p1, 49); \ |
| 33885 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 34718 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33886 | __ret; \ | 34719 | __ret; \ |
| 33887 | }) | 34720 | }) |
| 33888 | #endif | 34721 | #endif |
| 33889 | | 34722 | |
| 33890 | #ifdef __LITTLE_ENDIAN__ | 34723 | #ifdef __LITTLE_ENDIAN__ |
| 33891 | #define vld1_f16(__p0) __extension__ ({ \ | 34724 | #define vcvtq_n_f16_s16(__p0, __p1) __extension__ ({ \ |
| 33892 | float16x4_t __ret; \ | 34725 | float16x8_t __ret; \ |
| 33893 | __ret = (float16x4_t) __builtin_neon_vld1_v(__p0, 8); \ | 34726 | int16x8_t __s0 = __p0; \ |
| | 34727 | __ret = (float16x8_t) __builtin_neon_vcvtq_n_f16_s16((int8x16_t)__s0, __p1, 33); \ |
| 33894 | __ret; \ | 34728 | __ret; \ |
| 33895 | }) | 34729 | }) |
| 33896 | #else | 34730 | #else |
| 33897 | #define vld1_f16(__p0) __extension__ ({ \ | 34731 | #define vcvtq_n_f16_s16(__p0, __p1) __extension__ ({ \ |
| 33898 | float16x4_t __ret; \ | 34732 | float16x8_t __ret; \ |
| 33899 | __ret = (float16x4_t) __builtin_neon_vld1_v(__p0, 8); \ | 34733 | int16x8_t __s0 = __p0; \ |
| 33900 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 34734 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 34735 | __ret = (float16x8_t) __builtin_neon_vcvtq_n_f16_s16((int8x16_t)__rev0, __p1, 33); \ |
| | 34736 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33901 | __ret; \ | 34737 | __ret; \ |
| 33902 | }) | 34738 | }) |
| 33903 | #endif | 34739 | #endif |
| 33904 | | 34740 | |
| 33905 | #ifdef __LITTLE_ENDIAN__ | 34741 | #ifdef __LITTLE_ENDIAN__ |
| 33906 | #define vld1q_dup_f16(__p0) __extension__ ({ \ | 34742 | #define vcvt_n_f16_u16(__p0, __p1) __extension__ ({ \ |
| 33907 | float16x8_t __ret; \ | 34743 | float16x4_t __ret; \ |
| 33908 | __ret = (float16x8_t) __builtin_neon_vld1q_dup_v(__p0, 40); \ | 34744 | uint16x4_t __s0 = __p0; \ |
| | 34745 | __ret = (float16x4_t) __builtin_neon_vcvt_n_f16_u16((int8x8_t)__s0, __p1, 17); \ |
| 33909 | __ret; \ | 34746 | __ret; \ |
| 33910 | }) | 34747 | }) |
| 33911 | #else | 34748 | #else |
| 33912 | #define vld1q_dup_f16(__p0) __extension__ ({ \ | 34749 | #define vcvt_n_f16_u16(__p0, __p1) __extension__ ({ \ |
| 33913 | float16x8_t __ret; \ | 34750 | float16x4_t __ret; \ |
| 33914 | __ret = (float16x8_t) __builtin_neon_vld1q_dup_v(__p0, 40); \ | 34751 | uint16x4_t __s0 = __p0; \ |
| 33915 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 34752 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| | 34753 | __ret = (float16x4_t) __builtin_neon_vcvt_n_f16_u16((int8x8_t)__rev0, __p1, 17); \ |
| | 34754 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 33916 | __ret; \ | 34755 | __ret; \ |
| 33917 | }) | 34756 | }) |
| 33918 | #endif | 34757 | #endif |
| 33919 | | 34758 | |
| 33920 | #ifdef __LITTLE_ENDIAN__ | 34759 | #ifdef __LITTLE_ENDIAN__ |
| 33921 | #define vld1_dup_f16(__p0) __extension__ ({ \ | 34760 | #define vcvt_n_f16_s16(__p0, __p1) __extension__ ({ \ |
| 33922 | float16x4_t __ret; \ | 34761 | float16x4_t __ret; \ |
| 33923 | __ret = (float16x4_t) __builtin_neon_vld1_dup_v(__p0, 8); \ | 34762 | int16x4_t __s0 = __p0; \ |
| | 34763 | __ret = (float16x4_t) __builtin_neon_vcvt_n_f16_s16((int8x8_t)__s0, __p1, 1); \ |
| 33924 | __ret; \ | 34764 | __ret; \ |
| 33925 | }) | 34765 | }) |
| 33926 | #else | 34766 | #else |
| 33927 | #define vld1_dup_f16(__p0) __extension__ ({ \ | 34767 | #define vcvt_n_f16_s16(__p0, __p1) __extension__ ({ \ |
| 33928 | float16x4_t __ret; \ | 34768 | float16x4_t __ret; \ |
| 33929 | __ret = (float16x4_t) __builtin_neon_vld1_dup_v(__p0, 8); \ | 34769 | int16x4_t __s0 = __p0; \ |
| | 34770 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| | 34771 | __ret = (float16x4_t) __builtin_neon_vcvt_n_f16_s16((int8x8_t)__rev0, __p1, 1); \ |
| 33930 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 34772 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 33931 | __ret; \ | 34773 | __ret; \ |
| 33932 | }) | 34774 | }) |
| 33933 | #endif | 34775 | #endif |
| 33934 | | 34776 | |
| 33935 | #ifdef __LITTLE_ENDIAN__ | 34777 | #ifdef __LITTLE_ENDIAN__ |
| 33936 | #define vld1q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 34778 | #define vcvtq_n_s16_f16(__p0, __p1) __extension__ ({ \ |
| 33937 | float16x8_t __ret; \ | 34779 | int16x8_t __ret; \ |
| 33938 | float16x8_t __s1 = __p1; \ | 34780 | float16x8_t __s0 = __p0; \ |
| 33939 | __ret = (float16x8_t) __builtin_neon_vld1q_lane_v(__p0, (int8x16_t)__s1, __p2, 40); \ | 34781 | __ret = (int16x8_t) __builtin_neon_vcvtq_n_s16_f16((int8x16_t)__s0, __p1, 33); \ |
| 33940 | __ret; \ | 34782 | __ret; \ |
| 33941 | }) | 34783 | }) |
| 33942 | #else | 34784 | #else |
| 33943 | #define vld1q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 34785 | #define vcvtq_n_s16_f16(__p0, __p1) __extension__ ({ \ |
| 33944 | float16x8_t __ret; \ | 34786 | int16x8_t __ret; \ |
| 33945 | float16x8_t __s1 = __p1; \ | 34787 | float16x8_t __s0 = __p0; \ |
| 33946 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 34788 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33947 | __ret = (float16x8_t) __builtin_neon_vld1q_lane_v(__p0, (int8x16_t)__rev1, __p2, 40); \ | 34789 | __ret = (int16x8_t) __builtin_neon_vcvtq_n_s16_f16((int8x16_t)__rev0, __p1, 33); \ |
| 33948 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 34790 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33949 | __ret; \ | 34791 | __ret; \ |
| 33950 | }) | 34792 | }) |
| 33951 | #endif | 34793 | #endif |
| 33952 | | 34794 | |
| 33953 | #ifdef __LITTLE_ENDIAN__ | 34795 | #ifdef __LITTLE_ENDIAN__ |
| 33954 | #define vld1_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 34796 | #define vcvt_n_s16_f16(__p0, __p1) __extension__ ({ \ |
| 33955 | float16x4_t __ret; \ | 34797 | int16x4_t __ret; \ |
| 33956 | float16x4_t __s1 = __p1; \ | 34798 | float16x4_t __s0 = __p0; \ |
| 33957 | __ret = (float16x4_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 8); \ | 34799 | __ret = (int16x4_t) __builtin_neon_vcvt_n_s16_f16((int8x8_t)__s0, __p1, 1); \ |
| 33958 | __ret; \ | 34800 | __ret; \ |
| 33959 | }) | 34801 | }) |
| 33960 | #else | 34802 | #else |
| 33961 | #define vld1_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 34803 | #define vcvt_n_s16_f16(__p0, __p1) __extension__ ({ \ |
| 33962 | float16x4_t __ret; \ | 34804 | int16x4_t __ret; \ |
| 33963 | float16x4_t __s1 = __p1; \ | 34805 | float16x4_t __s0 = __p0; \ |
| 33964 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 34806 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 33965 | __ret = (float16x4_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__rev1, __p2, 8); \ | 34807 | __ret = (int16x4_t) __builtin_neon_vcvt_n_s16_f16((int8x8_t)__rev0, __p1, 1); \ |
| 33966 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 34808 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 33967 | __ret; \ | 34809 | __ret; \ |
| 33968 | }) | 34810 | }) |
| 33969 | #endif | 34811 | #endif |
| 33970 | | 34812 | |
| 33971 | #ifdef __LITTLE_ENDIAN__ | 34813 | #ifdef __LITTLE_ENDIAN__ |
| 33972 | #define vld1q_f16_x2(__p0) __extension__ ({ \ | 34814 | #define vcvtq_n_u16_f16(__p0, __p1) __extension__ ({ \ |
| 33973 | float16x8x2_t __ret; \ | 34815 | uint16x8_t __ret; \ |
| 33974 | __builtin_neon_vld1q_x2_v(&__ret, __p0, 40); \ | 34816 | float16x8_t __s0 = __p0; \ |
| | 34817 | __ret = (uint16x8_t) __builtin_neon_vcvtq_n_u16_f16((int8x16_t)__s0, __p1, 49); \ |
| 33975 | __ret; \ | 34818 | __ret; \ |
| 33976 | }) | 34819 | }) |
| 33977 | #else | 34820 | #else |
| 33978 | #define vld1q_f16_x2(__p0) __extension__ ({ \ | 34821 | #define vcvtq_n_u16_f16(__p0, __p1) __extension__ ({ \ |
| 33979 | float16x8x2_t __ret; \ | 34822 | uint16x8_t __ret; \ |
| 33980 | __builtin_neon_vld1q_x2_v(&__ret, __p0, 40); \ | 34823 | float16x8_t __s0 = __p0; \ |
| 33981 | \ | 34824 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33982 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 34825 | __ret = (uint16x8_t) __builtin_neon_vcvtq_n_u16_f16((int8x16_t)__rev0, __p1, 49); \ |
| 33983 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 34826 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 33984 | __ret; \ | 34827 | __ret; \ |
| 33985 | }) | 34828 | }) |
| 33986 | #endif | 34829 | #endif |
| 33987 | | 34830 | |
| 33988 | #ifdef __LITTLE_ENDIAN__ | 34831 | #ifdef __LITTLE_ENDIAN__ |
| 33989 | #define vld1_f16_x2(__p0) __extension__ ({ \ | 34832 | #define vcvt_n_u16_f16(__p0, __p1) __extension__ ({ \ |
| 33990 | float16x4x2_t __ret; \ | 34833 | uint16x4_t __ret; \ |
| 33991 | __builtin_neon_vld1_x2_v(&__ret, __p0, 8); \ | 34834 | float16x4_t __s0 = __p0; \ |
| | 34835 | __ret = (uint16x4_t) __builtin_neon_vcvt_n_u16_f16((int8x8_t)__s0, __p1, 17); \ |
| 33992 | __ret; \ | 34836 | __ret; \ |
| 33993 | }) | 34837 | }) |
| 33994 | #else | 34838 | #else |
| 33995 | #define vld1_f16_x2(__p0) __extension__ ({ \ | 34839 | #define vcvt_n_u16_f16(__p0, __p1) __extension__ ({ \ |
| 33996 | float16x4x2_t __ret; \ | 34840 | uint16x4_t __ret; \ |
| 33997 | __builtin_neon_vld1_x2_v(&__ret, __p0, 8); \ | 34841 | float16x4_t __s0 = __p0; \ |
| 33998 | \ | 34842 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 33999 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 34843 | __ret = (uint16x4_t) __builtin_neon_vcvt_n_u16_f16((int8x8_t)__rev0, __p1, 17); \ |
| 34000 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 34844 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 34001 | __ret; \ | 34845 | __ret; \ |
| 34002 | }) | 34846 | }) |
| 34003 | #endif | 34847 | #endif |
| 34004 | | 34848 | |
| 34005 | #ifdef __LITTLE_ENDIAN__ | 34849 | #ifdef __LITTLE_ENDIAN__ |
| 34006 | #define vld1q_f16_x3(__p0) __extension__ ({ \ | 34850 | __ai __attribute__((target("fullfp16"))) int16x8_t vcvtq_s16_f16(float16x8_t __p0) { |
| 34007 | float16x8x3_t __ret; \ | 34851 | int16x8_t __ret; |
| 34008 | __builtin_neon_vld1q_x3_v(&__ret, __p0, 40); \ | 34852 | __ret = (int16x8_t) __builtin_neon_vcvtq_s16_f16((int8x16_t)__p0, 33); |
| 34009 | __ret; \ | 34853 | return __ret; |
| 34010 | }) | 34854 | } |
| 34011 | #else | 34855 | #else |
| 34012 | #define vld1q_f16_x3(__p0) __extension__ ({ \ | 34856 | __ai __attribute__((target("fullfp16"))) int16x8_t vcvtq_s16_f16(float16x8_t __p0) { |
| 34013 | float16x8x3_t __ret; \ | 34857 | int16x8_t __ret; |
| 34014 | __builtin_neon_vld1q_x3_v(&__ret, __p0, 40); \ | 34858 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34015 | \ | 34859 | __ret = (int16x8_t) __builtin_neon_vcvtq_s16_f16((int8x16_t)__rev0, 33); |
| 34016 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 34860 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34017 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 34861 | return __ret; |
| 34018 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 34862 | } |
| 34019 | __ret; \ | | |
| 34020 | }) | | |
| 34021 | #endif | 34863 | #endif |
| 34022 | | 34864 | |
| 34023 | #ifdef __LITTLE_ENDIAN__ | 34865 | #ifdef __LITTLE_ENDIAN__ |
| 34024 | #define vld1_f16_x3(__p0) __extension__ ({ \ | 34866 | __ai __attribute__((target("fullfp16"))) int16x4_t vcvt_s16_f16(float16x4_t __p0) { |
| 34025 | float16x4x3_t __ret; \ | 34867 | int16x4_t __ret; |
| 34026 | __builtin_neon_vld1_x3_v(&__ret, __p0, 8); \ | 34868 | __ret = (int16x4_t) __builtin_neon_vcvt_s16_f16((int8x8_t)__p0, 1); |
| 34027 | __ret; \ | 34869 | return __ret; |
| 34028 | }) | 34870 | } |
| 34029 | #else | 34871 | #else |
| 34030 | #define vld1_f16_x3(__p0) __extension__ ({ \ | 34872 | __ai __attribute__((target("fullfp16"))) int16x4_t vcvt_s16_f16(float16x4_t __p0) { |
| 34031 | float16x4x3_t __ret; \ | 34873 | int16x4_t __ret; |
| 34032 | __builtin_neon_vld1_x3_v(&__ret, __p0, 8); \ | 34874 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34033 | \ | 34875 | __ret = (int16x4_t) __builtin_neon_vcvt_s16_f16((int8x8_t)__rev0, 1); |
| 34034 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 34876 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34035 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 34877 | return __ret; |
| 34036 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | 34878 | } |
| 34037 | __ret; \ | | |
| 34038 | }) | | |
| 34039 | #endif | 34879 | #endif |
| 34040 | | 34880 | |
| 34041 | #ifdef __LITTLE_ENDIAN__ | 34881 | #ifdef __LITTLE_ENDIAN__ |
| 34042 | #define vld1q_f16_x4(__p0) __extension__ ({ \ | 34882 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcvtq_u16_f16(float16x8_t __p0) { |
| 34043 | float16x8x4_t __ret; \ | 34883 | uint16x8_t __ret; |
| 34044 | __builtin_neon_vld1q_x4_v(&__ret, __p0, 40); \ | 34884 | __ret = (uint16x8_t) __builtin_neon_vcvtq_u16_f16((int8x16_t)__p0, 49); |
| 34045 | __ret; \ | 34885 | return __ret; |
| 34046 | }) | 34886 | } |
| 34047 | #else | 34887 | #else |
| 34048 | #define vld1q_f16_x4(__p0) __extension__ ({ \ | 34888 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcvtq_u16_f16(float16x8_t __p0) { |
| 34049 | float16x8x4_t __ret; \ | 34889 | uint16x8_t __ret; |
| 34050 | __builtin_neon_vld1q_x4_v(&__ret, __p0, 40); \ | 34890 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34051 | \ | 34891 | __ret = (uint16x8_t) __builtin_neon_vcvtq_u16_f16((int8x16_t)__rev0, 49); |
| 34052 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 34892 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34053 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 34893 | return __ret; |
| 34054 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 34894 | } |
| 34055 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 34056 | __ret; \ | | |
| 34057 | }) | | |
| 34058 | #endif | 34895 | #endif |
| 34059 | | 34896 | |
| 34060 | #ifdef __LITTLE_ENDIAN__ | 34897 | #ifdef __LITTLE_ENDIAN__ |
| 34061 | #define vld1_f16_x4(__p0) __extension__ ({ \ | 34898 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcvt_u16_f16(float16x4_t __p0) { |
| 34062 | float16x4x4_t __ret; \ | 34899 | uint16x4_t __ret; |
| 34063 | __builtin_neon_vld1_x4_v(&__ret, __p0, 8); \ | 34900 | __ret = (uint16x4_t) __builtin_neon_vcvt_u16_f16((int8x8_t)__p0, 17); |
| 34064 | __ret; \ | 34901 | return __ret; |
| 34065 | }) | 34902 | } |
| 34066 | #else | 34903 | #else |
| 34067 | #define vld1_f16_x4(__p0) __extension__ ({ \ | 34904 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcvt_u16_f16(float16x4_t __p0) { |
| 34068 | float16x4x4_t __ret; \ | 34905 | uint16x4_t __ret; |
| 34069 | __builtin_neon_vld1_x4_v(&__ret, __p0, 8); \ | 34906 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34070 | \ | 34907 | __ret = (uint16x4_t) __builtin_neon_vcvt_u16_f16((int8x8_t)__rev0, 17); |
| 34071 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 34908 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34072 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 34909 | return __ret; |
| 34073 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | 34910 | } |
| 34074 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ | | |
| 34075 | __ret; \ | | |
| 34076 | }) | | |
| 34077 | #endif | 34911 | #endif |
| 34078 | | 34912 | |
| 34079 | #ifdef __LITTLE_ENDIAN__ | 34913 | #ifdef __LITTLE_ENDIAN__ |
| 34080 | #define vld2q_f16(__p0) __extension__ ({ \ | 34914 | __ai __attribute__((target("fullfp16"))) int16x8_t vcvtaq_s16_f16(float16x8_t __p0) { |
| 34081 | float16x8x2_t __ret; \ | 34915 | int16x8_t __ret; |
| 34082 | __builtin_neon_vld2q_v(&__ret, __p0, 40); \ | 34916 | __ret = (int16x8_t) __builtin_neon_vcvtaq_s16_f16((int8x16_t)__p0, 33); |
| 34083 | __ret; \ | 34917 | return __ret; |
| 34084 | }) | 34918 | } |
| 34085 | #else | 34919 | #else |
| 34086 | #define vld2q_f16(__p0) __extension__ ({ \ | 34920 | __ai __attribute__((target("fullfp16"))) int16x8_t vcvtaq_s16_f16(float16x8_t __p0) { |
| 34087 | float16x8x2_t __ret; \ | 34921 | int16x8_t __ret; |
| 34088 | __builtin_neon_vld2q_v(&__ret, __p0, 40); \ | 34922 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34089 | \ | 34923 | __ret = (int16x8_t) __builtin_neon_vcvtaq_s16_f16((int8x16_t)__rev0, 33); |
| 34090 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 34924 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34091 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 34925 | return __ret; |
| 34092 | __ret; \ | 34926 | } |
| 34093 | }) | | |
| 34094 | #endif | 34927 | #endif |
| 34095 | | 34928 | |
| 34096 | #ifdef __LITTLE_ENDIAN__ | 34929 | #ifdef __LITTLE_ENDIAN__ |
| 34097 | #define vld2_f16(__p0) __extension__ ({ \ | 34930 | __ai __attribute__((target("fullfp16"))) int16x4_t vcvta_s16_f16(float16x4_t __p0) { |
| 34098 | float16x4x2_t __ret; \ | 34931 | int16x4_t __ret; |
| 34099 | __builtin_neon_vld2_v(&__ret, __p0, 8); \ | 34932 | __ret = (int16x4_t) __builtin_neon_vcvta_s16_f16((int8x8_t)__p0, 1); |
| 34100 | __ret; \ | 34933 | return __ret; |
| 34101 | }) | 34934 | } |
| 34102 | #else | 34935 | #else |
| 34103 | #define vld2_f16(__p0) __extension__ ({ \ | 34936 | __ai __attribute__((target("fullfp16"))) int16x4_t vcvta_s16_f16(float16x4_t __p0) { |
| 34104 | float16x4x2_t __ret; \ | 34937 | int16x4_t __ret; |
| 34105 | __builtin_neon_vld2_v(&__ret, __p0, 8); \ | 34938 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34106 | \ | 34939 | __ret = (int16x4_t) __builtin_neon_vcvta_s16_f16((int8x8_t)__rev0, 1); |
| 34107 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 34940 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34108 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 34941 | return __ret; |
| 34109 | __ret; \ | 34942 | } |
| 34110 | }) | | |
| 34111 | #endif | 34943 | #endif |
| 34112 | | 34944 | |
| 34113 | #ifdef __LITTLE_ENDIAN__ | 34945 | #ifdef __LITTLE_ENDIAN__ |
| 34114 | #define vld2q_dup_f16(__p0) __extension__ ({ \ | 34946 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcvtaq_u16_f16(float16x8_t __p0) { |
| 34115 | float16x8x2_t __ret; \ | 34947 | uint16x8_t __ret; |
| 34116 | __builtin_neon_vld2q_dup_v(&__ret, __p0, 40); \ | 34948 | __ret = (uint16x8_t) __builtin_neon_vcvtaq_u16_f16((int8x16_t)__p0, 49); |
| 34117 | __ret; \ | 34949 | return __ret; |
| 34118 | }) | 34950 | } |
| 34119 | #else | 34951 | #else |
| 34120 | #define vld2q_dup_f16(__p0) __extension__ ({ \ | 34952 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcvtaq_u16_f16(float16x8_t __p0) { |
| 34121 | float16x8x2_t __ret; \ | 34953 | uint16x8_t __ret; |
| 34122 | __builtin_neon_vld2q_dup_v(&__ret, __p0, 40); \ | 34954 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34123 | \ | 34955 | __ret = (uint16x8_t) __builtin_neon_vcvtaq_u16_f16((int8x16_t)__rev0, 49); |
| 34124 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 34956 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34125 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 34957 | return __ret; |
| 34126 | __ret; \ | 34958 | } |
| 34127 | }) | | |
| 34128 | #endif | 34959 | #endif |
| 34129 | | 34960 | |
| 34130 | #ifdef __LITTLE_ENDIAN__ | 34961 | #ifdef __LITTLE_ENDIAN__ |
| 34131 | #define vld2_dup_f16(__p0) __extension__ ({ \ | 34962 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcvta_u16_f16(float16x4_t __p0) { |
| 34132 | float16x4x2_t __ret; \ | 34963 | uint16x4_t __ret; |
| 34133 | __builtin_neon_vld2_dup_v(&__ret, __p0, 8); \ | 34964 | __ret = (uint16x4_t) __builtin_neon_vcvta_u16_f16((int8x8_t)__p0, 17); |
| 34134 | __ret; \ | 34965 | return __ret; |
| 34135 | }) | 34966 | } |
| | 34967 | #else |
| | 34968 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcvta_u16_f16(float16x4_t __p0) { |
| | 34969 | uint16x4_t __ret; |
| | 34970 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 34971 | __ret = (uint16x4_t) __builtin_neon_vcvta_u16_f16((int8x8_t)__rev0, 17); |
| | 34972 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 34973 | return __ret; |
| | 34974 | } |
| | 34975 | #endif |
| | 34976 | |
| | 34977 | #ifdef __LITTLE_ENDIAN__ |
| | 34978 | __ai __attribute__((target("fullfp16"))) int16x8_t vcvtmq_s16_f16(float16x8_t __p0) { |
| | 34979 | int16x8_t __ret; |
| | 34980 | __ret = (int16x8_t) __builtin_neon_vcvtmq_s16_f16((int8x16_t)__p0, 33); |
| | 34981 | return __ret; |
| | 34982 | } |
| | 34983 | #else |
| | 34984 | __ai __attribute__((target("fullfp16"))) int16x8_t vcvtmq_s16_f16(float16x8_t __p0) { |
| | 34985 | int16x8_t __ret; |
| | 34986 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34987 | __ret = (int16x8_t) __builtin_neon_vcvtmq_s16_f16((int8x16_t)__rev0, 33); |
| | 34988 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 34989 | return __ret; |
| | 34990 | } |
| | 34991 | #endif |
| | 34992 | |
| | 34993 | #ifdef __LITTLE_ENDIAN__ |
| | 34994 | __ai __attribute__((target("fullfp16"))) int16x4_t vcvtm_s16_f16(float16x4_t __p0) { |
| | 34995 | int16x4_t __ret; |
| | 34996 | __ret = (int16x4_t) __builtin_neon_vcvtm_s16_f16((int8x8_t)__p0, 1); |
| | 34997 | return __ret; |
| | 34998 | } |
| | 34999 | #else |
| | 35000 | __ai __attribute__((target("fullfp16"))) int16x4_t vcvtm_s16_f16(float16x4_t __p0) { |
| | 35001 | int16x4_t __ret; |
| | 35002 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 35003 | __ret = (int16x4_t) __builtin_neon_vcvtm_s16_f16((int8x8_t)__rev0, 1); |
| | 35004 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 35005 | return __ret; |
| | 35006 | } |
| | 35007 | #endif |
| | 35008 | |
| | 35009 | #ifdef __LITTLE_ENDIAN__ |
| | 35010 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcvtmq_u16_f16(float16x8_t __p0) { |
| | 35011 | uint16x8_t __ret; |
| | 35012 | __ret = (uint16x8_t) __builtin_neon_vcvtmq_u16_f16((int8x16_t)__p0, 49); |
| | 35013 | return __ret; |
| | 35014 | } |
| | 35015 | #else |
| | 35016 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcvtmq_u16_f16(float16x8_t __p0) { |
| | 35017 | uint16x8_t __ret; |
| | 35018 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35019 | __ret = (uint16x8_t) __builtin_neon_vcvtmq_u16_f16((int8x16_t)__rev0, 49); |
| | 35020 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35021 | return __ret; |
| | 35022 | } |
| | 35023 | #endif |
| | 35024 | |
| | 35025 | #ifdef __LITTLE_ENDIAN__ |
| | 35026 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcvtm_u16_f16(float16x4_t __p0) { |
| | 35027 | uint16x4_t __ret; |
| | 35028 | __ret = (uint16x4_t) __builtin_neon_vcvtm_u16_f16((int8x8_t)__p0, 17); |
| | 35029 | return __ret; |
| | 35030 | } |
| | 35031 | #else |
| | 35032 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcvtm_u16_f16(float16x4_t __p0) { |
| | 35033 | uint16x4_t __ret; |
| | 35034 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 35035 | __ret = (uint16x4_t) __builtin_neon_vcvtm_u16_f16((int8x8_t)__rev0, 17); |
| | 35036 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 35037 | return __ret; |
| | 35038 | } |
| | 35039 | #endif |
| | 35040 | |
| | 35041 | #ifdef __LITTLE_ENDIAN__ |
| | 35042 | __ai __attribute__((target("fullfp16"))) int16x8_t vcvtnq_s16_f16(float16x8_t __p0) { |
| | 35043 | int16x8_t __ret; |
| | 35044 | __ret = (int16x8_t) __builtin_neon_vcvtnq_s16_f16((int8x16_t)__p0, 33); |
| | 35045 | return __ret; |
| | 35046 | } |
| | 35047 | #else |
| | 35048 | __ai __attribute__((target("fullfp16"))) int16x8_t vcvtnq_s16_f16(float16x8_t __p0) { |
| | 35049 | int16x8_t __ret; |
| | 35050 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35051 | __ret = (int16x8_t) __builtin_neon_vcvtnq_s16_f16((int8x16_t)__rev0, 33); |
| | 35052 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35053 | return __ret; |
| | 35054 | } |
| | 35055 | #endif |
| | 35056 | |
| | 35057 | #ifdef __LITTLE_ENDIAN__ |
| | 35058 | __ai __attribute__((target("fullfp16"))) int16x4_t vcvtn_s16_f16(float16x4_t __p0) { |
| | 35059 | int16x4_t __ret; |
| | 35060 | __ret = (int16x4_t) __builtin_neon_vcvtn_s16_f16((int8x8_t)__p0, 1); |
| | 35061 | return __ret; |
| | 35062 | } |
| | 35063 | #else |
| | 35064 | __ai __attribute__((target("fullfp16"))) int16x4_t vcvtn_s16_f16(float16x4_t __p0) { |
| | 35065 | int16x4_t __ret; |
| | 35066 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 35067 | __ret = (int16x4_t) __builtin_neon_vcvtn_s16_f16((int8x8_t)__rev0, 1); |
| | 35068 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 35069 | return __ret; |
| | 35070 | } |
| | 35071 | #endif |
| | 35072 | |
| | 35073 | #ifdef __LITTLE_ENDIAN__ |
| | 35074 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcvtnq_u16_f16(float16x8_t __p0) { |
| | 35075 | uint16x8_t __ret; |
| | 35076 | __ret = (uint16x8_t) __builtin_neon_vcvtnq_u16_f16((int8x16_t)__p0, 49); |
| | 35077 | return __ret; |
| | 35078 | } |
| | 35079 | #else |
| | 35080 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcvtnq_u16_f16(float16x8_t __p0) { |
| | 35081 | uint16x8_t __ret; |
| | 35082 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35083 | __ret = (uint16x8_t) __builtin_neon_vcvtnq_u16_f16((int8x16_t)__rev0, 49); |
| | 35084 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35085 | return __ret; |
| | 35086 | } |
| | 35087 | #endif |
| | 35088 | |
| | 35089 | #ifdef __LITTLE_ENDIAN__ |
| | 35090 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcvtn_u16_f16(float16x4_t __p0) { |
| | 35091 | uint16x4_t __ret; |
| | 35092 | __ret = (uint16x4_t) __builtin_neon_vcvtn_u16_f16((int8x8_t)__p0, 17); |
| | 35093 | return __ret; |
| | 35094 | } |
| 34136 | #else | 35095 | #else |
| 34137 | #define vld2_dup_f16(__p0) __extension__ ({ \ | 35096 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcvtn_u16_f16(float16x4_t __p0) { |
| 34138 | float16x4x2_t __ret; \ | 35097 | uint16x4_t __ret; |
| 34139 | __builtin_neon_vld2_dup_v(&__ret, __p0, 8); \ | 35098 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34140 | \ | 35099 | __ret = (uint16x4_t) __builtin_neon_vcvtn_u16_f16((int8x8_t)__rev0, 17); |
| 34141 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 35100 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34142 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 35101 | return __ret; |
| 34143 | __ret; \ | 35102 | } |
| 34144 | }) | | |
| 34145 | #endif | 35103 | #endif |
| 34146 | | 35104 | |
| 34147 | #ifdef __LITTLE_ENDIAN__ | 35105 | #ifdef __LITTLE_ENDIAN__ |
| 34148 | #define vld2q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35106 | __ai __attribute__((target("fullfp16"))) int16x8_t vcvtpq_s16_f16(float16x8_t __p0) { |
| 34149 | float16x8x2_t __ret; \ | 35107 | int16x8_t __ret; |
| 34150 | float16x8x2_t __s1 = __p1; \ | 35108 | __ret = (int16x8_t) __builtin_neon_vcvtpq_s16_f16((int8x16_t)__p0, 33); |
| 34151 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 40); \ | 35109 | return __ret; |
| 34152 | __ret; \ | 35110 | } |
| 34153 | }) | | |
| 34154 | #else | 35111 | #else |
| 34155 | #define vld2q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35112 | __ai __attribute__((target("fullfp16"))) int16x8_t vcvtpq_s16_f16(float16x8_t __p0) { |
| 34156 | float16x8x2_t __ret; \ | 35113 | int16x8_t __ret; |
| 34157 | float16x8x2_t __s1 = __p1; \ | 35114 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34158 | float16x8x2_t __rev1; \ | 35115 | __ret = (int16x8_t) __builtin_neon_vcvtpq_s16_f16((int8x16_t)__rev0, 33); |
| 34159 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35116 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34160 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35117 | return __ret; |
| 34161 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 40); \ | 35118 | } |
| 34162 | \ | | |
| 34163 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 34164 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 34165 | __ret; \ | | |
| 34166 | }) | | |
| 34167 | #endif | 35119 | #endif |
| 34168 | | 35120 | |
| 34169 | #ifdef __LITTLE_ENDIAN__ | 35121 | #ifdef __LITTLE_ENDIAN__ |
| 34170 | #define vld2_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35122 | __ai __attribute__((target("fullfp16"))) int16x4_t vcvtp_s16_f16(float16x4_t __p0) { |
| 34171 | float16x4x2_t __ret; \ | 35123 | int16x4_t __ret; |
| 34172 | float16x4x2_t __s1 = __p1; \ | 35124 | __ret = (int16x4_t) __builtin_neon_vcvtp_s16_f16((int8x8_t)__p0, 1); |
| 34173 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 8); \ | 35125 | return __ret; |
| 34174 | __ret; \ | 35126 | } |
| 34175 | }) | | |
| 34176 | #else | 35127 | #else |
| 34177 | #define vld2_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35128 | __ai __attribute__((target("fullfp16"))) int16x4_t vcvtp_s16_f16(float16x4_t __p0) { |
| 34178 | float16x4x2_t __ret; \ | 35129 | int16x4_t __ret; |
| 34179 | float16x4x2_t __s1 = __p1; \ | 35130 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34180 | float16x4x2_t __rev1; \ | 35131 | __ret = (int16x4_t) __builtin_neon_vcvtp_s16_f16((int8x8_t)__rev0, 1); |
| 34181 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 35132 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34182 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 35133 | return __ret; |
| 34183 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 8); \ | 35134 | } |
| 34184 | \ | | |
| 34185 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | | |
| 34186 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | | |
| 34187 | __ret; \ | | |
| 34188 | }) | | |
| 34189 | #endif | 35135 | #endif |
| 34190 | | 35136 | |
| 34191 | #ifdef __LITTLE_ENDIAN__ | 35137 | #ifdef __LITTLE_ENDIAN__ |
| 34192 | #define vld3q_f16(__p0) __extension__ ({ \ | 35138 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcvtpq_u16_f16(float16x8_t __p0) { |
| 34193 | float16x8x3_t __ret; \ | 35139 | uint16x8_t __ret; |
| 34194 | __builtin_neon_vld3q_v(&__ret, __p0, 40); \ | 35140 | __ret = (uint16x8_t) __builtin_neon_vcvtpq_u16_f16((int8x16_t)__p0, 49); |
| 34195 | __ret; \ | 35141 | return __ret; |
| 34196 | }) | 35142 | } |
| 34197 | #else | 35143 | #else |
| 34198 | #define vld3q_f16(__p0) __extension__ ({ \ | 35144 | __ai __attribute__((target("fullfp16"))) uint16x8_t vcvtpq_u16_f16(float16x8_t __p0) { |
| 34199 | float16x8x3_t __ret; \ | 35145 | uint16x8_t __ret; |
| 34200 | __builtin_neon_vld3q_v(&__ret, __p0, 40); \ | 35146 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34201 | \ | 35147 | __ret = (uint16x8_t) __builtin_neon_vcvtpq_u16_f16((int8x16_t)__rev0, 49); |
| 34202 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35148 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34203 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35149 | return __ret; |
| 34204 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35150 | } |
| 34205 | __ret; \ | | |
| 34206 | }) | | |
| 34207 | #endif | 35151 | #endif |
| 34208 | | 35152 | |
| 34209 | #ifdef __LITTLE_ENDIAN__ | 35153 | #ifdef __LITTLE_ENDIAN__ |
| 34210 | #define vld3_f16(__p0) __extension__ ({ \ | 35154 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcvtp_u16_f16(float16x4_t __p0) { |
| 34211 | float16x4x3_t __ret; \ | 35155 | uint16x4_t __ret; |
| 34212 | __builtin_neon_vld3_v(&__ret, __p0, 8); \ | 35156 | __ret = (uint16x4_t) __builtin_neon_vcvtp_u16_f16((int8x8_t)__p0, 17); |
| 34213 | __ret; \ | 35157 | return __ret; |
| 34214 | }) | 35158 | } |
| 34215 | #else | 35159 | #else |
| 34216 | #define vld3_f16(__p0) __extension__ ({ \ | 35160 | __ai __attribute__((target("fullfp16"))) uint16x4_t vcvtp_u16_f16(float16x4_t __p0) { |
| 34217 | float16x4x3_t __ret; \ | 35161 | uint16x4_t __ret; |
| 34218 | __builtin_neon_vld3_v(&__ret, __p0, 8); \ | 35162 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34219 | \ | 35163 | __ret = (uint16x4_t) __builtin_neon_vcvtp_u16_f16((int8x8_t)__rev0, 17); |
| 34220 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 35164 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34221 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 35165 | return __ret; |
| 34222 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | 35166 | } |
| 34223 | __ret; \ | | |
| 34224 | }) | | |
| 34225 | #endif | 35167 | #endif |
| 34226 | | 35168 | |
| 34227 | #ifdef __LITTLE_ENDIAN__ | 35169 | #ifdef __LITTLE_ENDIAN__ |
| 34228 | #define vld3q_dup_f16(__p0) __extension__ ({ \ | 35170 | #define vextq_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 34229 | float16x8x3_t __ret; \ | 35171 | float16x8_t __ret; \ |
| 34230 | __builtin_neon_vld3q_dup_v(&__ret, __p0, 40); \ | 35172 | float16x8_t __s0 = __p0; \ |
| | 35173 | float16x8_t __s1 = __p1; \ |
| | 35174 | __ret = (float16x8_t) __builtin_neon_vextq_f16((int8x16_t)__s0, (int8x16_t)__s1, __p2, 40); \ |
| 34231 | __ret; \ | 35175 | __ret; \ |
| 34232 | }) | 35176 | }) |
| 34233 | #else | 35177 | #else |
| 34234 | #define vld3q_dup_f16(__p0) __extension__ ({ \ | 35178 | #define vextq_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 34235 | float16x8x3_t __ret; \ | 35179 | float16x8_t __ret; \ |
| 34236 | __builtin_neon_vld3q_dup_v(&__ret, __p0, 40); \ | 35180 | float16x8_t __s0 = __p0; \ |
| 34237 | \ | 35181 | float16x8_t __s1 = __p1; \ |
| 34238 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35182 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 34239 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35183 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 34240 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35184 | __ret = (float16x8_t) __builtin_neon_vextq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 40); \ |
| | 35185 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 34241 | __ret; \ | 35186 | __ret; \ |
| 34242 | }) | 35187 | }) |
| 34243 | #endif | 35188 | #endif |
| 34244 | | 35189 | |
| 34245 | #ifdef __LITTLE_ENDIAN__ | 35190 | #ifdef __LITTLE_ENDIAN__ |
| 34246 | #define vld3_dup_f16(__p0) __extension__ ({ \ | 35191 | #define vext_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 34247 | float16x4x3_t __ret; \ | 35192 | float16x4_t __ret; \ |
| 34248 | __builtin_neon_vld3_dup_v(&__ret, __p0, 8); \ | 35193 | float16x4_t __s0 = __p0; \ |
| | 35194 | float16x4_t __s1 = __p1; \ |
| | 35195 | __ret = (float16x4_t) __builtin_neon_vext_f16((int8x8_t)__s0, (int8x8_t)__s1, __p2, 8); \ |
| 34249 | __ret; \ | 35196 | __ret; \ |
| 34250 | }) | 35197 | }) |
| 34251 | #else | 35198 | #else |
| 34252 | #define vld3_dup_f16(__p0) __extension__ ({ \ | 35199 | #define vext_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 34253 | float16x4x3_t __ret; \ | 35200 | float16x4_t __ret; \ |
| 34254 | __builtin_neon_vld3_dup_v(&__ret, __p0, 8); \ | 35201 | float16x4_t __s0 = __p0; \ |
| 34255 | \ | 35202 | float16x4_t __s1 = __p1; \ |
| 34256 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 35203 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 34257 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 35204 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 34258 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | 35205 | __ret = (float16x4_t) __builtin_neon_vext_f16((int8x8_t)__rev0, (int8x8_t)__rev1, __p2, 8); \ |
| | 35206 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 34259 | __ret; \ | 35207 | __ret; \ |
| 34260 | }) | 35208 | }) |
| 34261 | #endif | 35209 | #endif |
| 34262 | | 35210 | |
| 34263 | #ifdef __LITTLE_ENDIAN__ | 35211 | #ifdef __LITTLE_ENDIAN__ |
| 34264 | #define vld3q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35212 | __ai __attribute__((target("fullfp16"))) float16x8_t vfmaq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 34265 | float16x8x3_t __ret; \ | 35213 | float16x8_t __ret; |
| 34266 | float16x8x3_t __s1 = __p1; \ | 35214 | __ret = (float16x8_t) __builtin_neon_vfmaq_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); |
| 34267 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 40); \ | 35215 | return __ret; |
| 34268 | __ret; \ | 35216 | } |
| 34269 | }) | | |
| 34270 | #else | 35217 | #else |
| 34271 | #define vld3q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35218 | __ai __attribute__((target("fullfp16"))) float16x8_t vfmaq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 34272 | float16x8x3_t __ret; \ | 35219 | float16x8_t __ret; |
| 34273 | float16x8x3_t __s1 = __p1; \ | 35220 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34274 | float16x8x3_t __rev1; \ | 35221 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34275 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35222 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34276 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35223 | __ret = (float16x8_t) __builtin_neon_vfmaq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 40); |
| 34277 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35224 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34278 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 40); \ | 35225 | return __ret; |
| 34279 | \ | 35226 | } |
| 34280 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35227 | __ai __attribute__((target("fullfp16"))) float16x8_t __noswap_vfmaq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 34281 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35228 | float16x8_t __ret; |
| 34282 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35229 | __ret = (float16x8_t) __builtin_neon_vfmaq_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); |
| 34283 | __ret; \ | 35230 | return __ret; |
| 34284 | }) | 35231 | } |
| 34285 | #endif | 35232 | #endif |
| 34286 | | 35233 | |
| 34287 | #ifdef __LITTLE_ENDIAN__ | 35234 | #ifdef __LITTLE_ENDIAN__ |
| 34288 | #define vld3_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35235 | __ai __attribute__((target("fullfp16"))) float16x4_t vfma_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 34289 | float16x4x3_t __ret; \ | 35236 | float16x4_t __ret; |
| 34290 | float16x4x3_t __s1 = __p1; \ | 35237 | __ret = (float16x4_t) __builtin_neon_vfma_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); |
| 34291 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 8); \ | 35238 | return __ret; |
| 34292 | __ret; \ | 35239 | } |
| 34293 | }) | | |
| 34294 | #else | 35240 | #else |
| 34295 | #define vld3_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35241 | __ai __attribute__((target("fullfp16"))) float16x4_t vfma_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 34296 | float16x4x3_t __ret; \ | 35242 | float16x4_t __ret; |
| 34297 | float16x4x3_t __s1 = __p1; \ | 35243 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34298 | float16x4x3_t __rev1; \ | 35244 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 34299 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 35245 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 34300 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 35246 | __ret = (float16x4_t) __builtin_neon_vfma_f16((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 8); |
| 34301 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 35247 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34302 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 8); \ | 35248 | return __ret; |
| 34303 | \ | 35249 | } |
| 34304 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 35250 | __ai __attribute__((target("fullfp16"))) float16x4_t __noswap_vfma_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 34305 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 35251 | float16x4_t __ret; |
| 34306 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | 35252 | __ret = (float16x4_t) __builtin_neon_vfma_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); |
| 34307 | __ret; \ | 35253 | return __ret; |
| 34308 | }) | 35254 | } |
| 34309 | #endif | 35255 | #endif |
| 34310 | | 35256 | |
| 34311 | #ifdef __LITTLE_ENDIAN__ | 35257 | #ifdef __LITTLE_ENDIAN__ |
| 34312 | #define vld4q_f16(__p0) __extension__ ({ \ | 35258 | __ai __attribute__((target("fullfp16"))) float16x8_t vfmsq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 34313 | float16x8x4_t __ret; \ | 35259 | float16x8_t __ret; |
| 34314 | __builtin_neon_vld4q_v(&__ret, __p0, 40); \ | 35260 | __ret = vfmaq_f16(__p0, -__p1, __p2); |
| 34315 | __ret; \ | 35261 | return __ret; |
| 34316 | }) | 35262 | } |
| 34317 | #else | 35263 | #else |
| 34318 | #define vld4q_f16(__p0) __extension__ ({ \ | 35264 | __ai __attribute__((target("fullfp16"))) float16x8_t vfmsq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 34319 | float16x8x4_t __ret; \ | 35265 | float16x8_t __ret; |
| 34320 | __builtin_neon_vld4q_v(&__ret, __p0, 40); \ | 35266 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34321 | \ | 35267 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34322 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35268 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34323 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35269 | __ret = __noswap_vfmaq_f16(__rev0, -__rev1, __rev2); |
| 34324 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35270 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34325 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35271 | return __ret; |
| 34326 | __ret; \ | 35272 | } |
| 34327 | }) | | |
| 34328 | #endif | 35273 | #endif |
| 34329 | | 35274 | |
| 34330 | #ifdef __LITTLE_ENDIAN__ | 35275 | #ifdef __LITTLE_ENDIAN__ |
| 34331 | #define vld4_f16(__p0) __extension__ ({ \ | 35276 | __ai __attribute__((target("fullfp16"))) float16x4_t vfms_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 34332 | float16x4x4_t __ret; \ | 35277 | float16x4_t __ret; |
| 34333 | __builtin_neon_vld4_v(&__ret, __p0, 8); \ | 35278 | __ret = vfma_f16(__p0, -__p1, __p2); |
| 34334 | __ret; \ | 35279 | return __ret; |
| 34335 | }) | 35280 | } |
| 34336 | #else | 35281 | #else |
| 34337 | #define vld4_f16(__p0) __extension__ ({ \ | 35282 | __ai __attribute__((target("fullfp16"))) float16x4_t vfms_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 34338 | float16x4x4_t __ret; \ | 35283 | float16x4_t __ret; |
| 34339 | __builtin_neon_vld4_v(&__ret, __p0, 8); \ | 35284 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34340 | \ | 35285 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 34341 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 35286 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 34342 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 35287 | __ret = __noswap_vfma_f16(__rev0, -__rev1, __rev2); |
| 34343 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | 35288 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34344 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ | 35289 | return __ret; |
| 34345 | __ret; \ | 35290 | } |
| 34346 | }) | | |
| 34347 | #endif | 35291 | #endif |
| 34348 | | 35292 | |
| 34349 | #ifdef __LITTLE_ENDIAN__ | 35293 | #ifdef __LITTLE_ENDIAN__ |
| 34350 | #define vld4q_dup_f16(__p0) __extension__ ({ \ | 35294 | __ai __attribute__((target("fullfp16"))) float16x8_t vmaxq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34351 | float16x8x4_t __ret; \ | 35295 | float16x8_t __ret; |
| 34352 | __builtin_neon_vld4q_dup_v(&__ret, __p0, 40); \ | 35296 | __ret = (float16x8_t) __builtin_neon_vmaxq_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 34353 | __ret; \ | 35297 | return __ret; |
| 34354 | }) | 35298 | } |
| 34355 | #else | 35299 | #else |
| 34356 | #define vld4q_dup_f16(__p0) __extension__ ({ \ | 35300 | __ai __attribute__((target("fullfp16"))) float16x8_t vmaxq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34357 | float16x8x4_t __ret; \ | 35301 | float16x8_t __ret; |
| 34358 | __builtin_neon_vld4q_dup_v(&__ret, __p0, 40); \ | 35302 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34359 | \ | 35303 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34360 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35304 | __ret = (float16x8_t) __builtin_neon_vmaxq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| 34361 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35305 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34362 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35306 | return __ret; |
| 34363 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35307 | } |
| 34364 | __ret; \ | | |
| 34365 | }) | | |
| 34366 | #endif | 35308 | #endif |
| 34367 | | 35309 | |
| 34368 | #ifdef __LITTLE_ENDIAN__ | 35310 | #ifdef __LITTLE_ENDIAN__ |
| 34369 | #define vld4_dup_f16(__p0) __extension__ ({ \ | 35311 | __ai __attribute__((target("fullfp16"))) float16x4_t vmax_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34370 | float16x4x4_t __ret; \ | 35312 | float16x4_t __ret; |
| 34371 | __builtin_neon_vld4_dup_v(&__ret, __p0, 8); \ | 35313 | __ret = (float16x4_t) __builtin_neon_vmax_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 34372 | __ret; \ | 35314 | return __ret; |
| 34373 | }) | 35315 | } |
| 34374 | #else | 35316 | #else |
| 34375 | #define vld4_dup_f16(__p0) __extension__ ({ \ | 35317 | __ai __attribute__((target("fullfp16"))) float16x4_t vmax_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34376 | float16x4x4_t __ret; \ | 35318 | float16x4_t __ret; |
| 34377 | __builtin_neon_vld4_dup_v(&__ret, __p0, 8); \ | 35319 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34378 | \ | 35320 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 34379 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 35321 | __ret = (float16x4_t) __builtin_neon_vmax_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| 34380 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 35322 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34381 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | 35323 | return __ret; |
| 34382 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ | 35324 | } |
| 34383 | __ret; \ | | |
| 34384 | }) | | |
| 34385 | #endif | 35325 | #endif |
| 34386 | | 35326 | |
| 34387 | #ifdef __LITTLE_ENDIAN__ | 35327 | #ifdef __LITTLE_ENDIAN__ |
| 34388 | #define vld4q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35328 | __ai __attribute__((target("fullfp16"))) float16x8_t vminq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34389 | float16x8x4_t __ret; \ | 35329 | float16x8_t __ret; |
| 34390 | float16x8x4_t __s1 = __p1; \ | 35330 | __ret = (float16x8_t) __builtin_neon_vminq_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 34391 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 40); \ | 35331 | return __ret; |
| 34392 | __ret; \ | 35332 | } |
| 34393 | }) | | |
| 34394 | #else | 35333 | #else |
| 34395 | #define vld4q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35334 | __ai __attribute__((target("fullfp16"))) float16x8_t vminq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34396 | float16x8x4_t __ret; \ | 35335 | float16x8_t __ret; |
| 34397 | float16x8x4_t __s1 = __p1; \ | 35336 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34398 | float16x8x4_t __rev1; \ | 35337 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34399 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35338 | __ret = (float16x8_t) __builtin_neon_vminq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| 34400 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35339 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34401 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35340 | return __ret; |
| 34402 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35341 | } |
| 34403 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 40); \ | | |
| 34404 | \ | | |
| 34405 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 34406 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 34407 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 34408 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 34409 | __ret; \ | | |
| 34410 | }) | | |
| 34411 | #endif | 35342 | #endif |
| 34412 | | 35343 | |
| 34413 | #ifdef __LITTLE_ENDIAN__ | 35344 | #ifdef __LITTLE_ENDIAN__ |
| 34414 | #define vld4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35345 | __ai __attribute__((target("fullfp16"))) float16x4_t vmin_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34415 | float16x4x4_t __ret; \ | 35346 | float16x4_t __ret; |
| 34416 | float16x4x4_t __s1 = __p1; \ | 35347 | __ret = (float16x4_t) __builtin_neon_vmin_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 34417 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 8); \ | 35348 | return __ret; |
| 34418 | __ret; \ | 35349 | } |
| 34419 | }) | | |
| 34420 | #else | 35350 | #else |
| 34421 | #define vld4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35351 | __ai __attribute__((target("fullfp16"))) float16x4_t vmin_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34422 | float16x4x4_t __ret; \ | 35352 | float16x4_t __ret; |
| 34423 | float16x4x4_t __s1 = __p1; \ | 35353 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34424 | float16x4x4_t __rev1; \ | 35354 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 34425 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 35355 | __ret = (float16x4_t) __builtin_neon_vmin_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| 34426 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 35356 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34427 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 35357 | return __ret; |
| 34428 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 35358 | } |
| 34429 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 8); \ | | |
| 34430 | \ | | |
| 34431 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | | |
| 34432 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | | |
| 34433 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | | |
| 34434 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ | | |
| 34435 | __ret; \ | | |
| 34436 | }) | | |
| 34437 | #endif | 35359 | #endif |
| 34438 | | 35360 | |
| 34439 | #ifdef __LITTLE_ENDIAN__ | 35361 | #ifdef __LITTLE_ENDIAN__ |
| 34440 | #define vst1q_f16(__p0, __p1) __extension__ ({ \ | 35362 | __ai __attribute__((target("fullfp16"))) float16x8_t vmulq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34441 | float16x8_t __s1 = __p1; \ | 35363 | float16x8_t __ret; |
| 34442 | __builtin_neon_vst1q_v(__p0, (int8x16_t)__s1, 40); \ | 35364 | __ret = __p0 * __p1; |
| 34443 | }) | 35365 | return __ret; |
| | 35366 | } |
| 34444 | #else | 35367 | #else |
| 34445 | #define vst1q_f16(__p0, __p1) __extension__ ({ \ | 35368 | __ai __attribute__((target("fullfp16"))) float16x8_t vmulq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34446 | float16x8_t __s1 = __p1; \ | 35369 | float16x8_t __ret; |
| 34447 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 35370 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34448 | __builtin_neon_vst1q_v(__p0, (int8x16_t)__rev1, 40); \ | 35371 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34449 | }) | 35372 | __ret = __rev0 * __rev1; |
| | 35373 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35374 | return __ret; |
| | 35375 | } |
| 34450 | #endif | 35376 | #endif |
| 34451 | | 35377 | |
| 34452 | #ifdef __LITTLE_ENDIAN__ | 35378 | #ifdef __LITTLE_ENDIAN__ |
| 34453 | #define vst1_f16(__p0, __p1) __extension__ ({ \ | 35379 | __ai __attribute__((target("fullfp16"))) float16x4_t vmul_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34454 | float16x4_t __s1 = __p1; \ | 35380 | float16x4_t __ret; |
| 34455 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 8); \ | 35381 | __ret = __p0 * __p1; |
| 34456 | }) | 35382 | return __ret; |
| | 35383 | } |
| 34457 | #else | 35384 | #else |
| 34458 | #define vst1_f16(__p0, __p1) __extension__ ({ \ | 35385 | __ai __attribute__((target("fullfp16"))) float16x4_t vmul_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34459 | float16x4_t __s1 = __p1; \ | 35386 | float16x4_t __ret; |
| 34460 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 35387 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34461 | __builtin_neon_vst1_v(__p0, (int8x8_t)__rev1, 8); \ | 35388 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 34462 | }) | 35389 | __ret = __rev0 * __rev1; |
| | 35390 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 35391 | return __ret; |
| | 35392 | } |
| 34463 | #endif | 35393 | #endif |
| 34464 | | 35394 | |
| 34465 | #ifdef __LITTLE_ENDIAN__ | 35395 | #ifdef __LITTLE_ENDIAN__ |
| 34466 | #define vst1q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35396 | #define vmulq_lane_f16(__p0_153, __p1_153, __p2_153) __extension__ ({ \ |
| 34467 | float16x8_t __s1 = __p1; \ | 35397 | float16x8_t __ret_153; \ |
| 34468 | __builtin_neon_vst1q_lane_v(__p0, (int8x16_t)__s1, __p2, 40); \ | 35398 | float16x8_t __s0_153 = __p0_153; \ |
| | 35399 | float16x4_t __s1_153 = __p1_153; \ |
| | 35400 | __ret_153 = __s0_153 * splatq_lane_f16(__s1_153, __p2_153); \ |
| | 35401 | __ret_153; \ |
| 34469 | }) | 35402 | }) |
| 34470 | #else | 35403 | #else |
| 34471 | #define vst1q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35404 | #define vmulq_lane_f16(__p0_154, __p1_154, __p2_154) __extension__ ({ \ |
| 34472 | float16x8_t __s1 = __p1; \ | 35405 | float16x8_t __ret_154; \ |
| 34473 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 35406 | float16x8_t __s0_154 = __p0_154; \ |
| 34474 | __builtin_neon_vst1q_lane_v(__p0, (int8x16_t)__rev1, __p2, 40); \ | 35407 | float16x4_t __s1_154 = __p1_154; \ |
| | 35408 | float16x8_t __rev0_154; __rev0_154 = __builtin_shufflevector(__s0_154, __s0_154, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 35409 | float16x4_t __rev1_154; __rev1_154 = __builtin_shufflevector(__s1_154, __s1_154, 3, 2, 1, 0); \ |
| | 35410 | __ret_154 = __rev0_154 * __noswap_splatq_lane_f16(__rev1_154, __p2_154); \ |
| | 35411 | __ret_154 = __builtin_shufflevector(__ret_154, __ret_154, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 35412 | __ret_154; \ |
| 34475 | }) | 35413 | }) |
| 34476 | #endif | 35414 | #endif |
| 34477 | | 35415 | |
| 34478 | #ifdef __LITTLE_ENDIAN__ | 35416 | #ifdef __LITTLE_ENDIAN__ |
| 34479 | #define vst1_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35417 | #define vmul_lane_f16(__p0_155, __p1_155, __p2_155) __extension__ ({ \ |
| 34480 | float16x4_t __s1 = __p1; \ | 35418 | float16x4_t __ret_155; \ |
| 34481 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 8); \ | 35419 | float16x4_t __s0_155 = __p0_155; \ |
| | 35420 | float16x4_t __s1_155 = __p1_155; \ |
| | 35421 | __ret_155 = __s0_155 * splat_lane_f16(__s1_155, __p2_155); \ |
| | 35422 | __ret_155; \ |
| 34482 | }) | 35423 | }) |
| 34483 | #else | 35424 | #else |
| 34484 | #define vst1_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35425 | #define vmul_lane_f16(__p0_156, __p1_156, __p2_156) __extension__ ({ \ |
| 34485 | float16x4_t __s1 = __p1; \ | 35426 | float16x4_t __ret_156; \ |
| 34486 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 35427 | float16x4_t __s0_156 = __p0_156; \ |
| 34487 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__rev1, __p2, 8); \ | 35428 | float16x4_t __s1_156 = __p1_156; \ |
| | 35429 | float16x4_t __rev0_156; __rev0_156 = __builtin_shufflevector(__s0_156, __s0_156, 3, 2, 1, 0); \ |
| | 35430 | float16x4_t __rev1_156; __rev1_156 = __builtin_shufflevector(__s1_156, __s1_156, 3, 2, 1, 0); \ |
| | 35431 | __ret_156 = __rev0_156 * __noswap_splat_lane_f16(__rev1_156, __p2_156); \ |
| | 35432 | __ret_156 = __builtin_shufflevector(__ret_156, __ret_156, 3, 2, 1, 0); \ |
| | 35433 | __ret_156; \ |
| 34488 | }) | 35434 | }) |
| 34489 | #endif | 35435 | #endif |
| 34490 | | 35436 | |
| 34491 | #ifdef __LITTLE_ENDIAN__ | 35437 | #ifdef __LITTLE_ENDIAN__ |
| 34492 | #define vst1q_f16_x2(__p0, __p1) __extension__ ({ \ | 35438 | #define vmulq_n_f16(__p0, __p1) __extension__ ({ \ |
| 34493 | float16x8x2_t __s1 = __p1; \ | 35439 | float16x8_t __ret; \ |
| 34494 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 40); \ | 35440 | float16x8_t __s0 = __p0; \ |
| | 35441 | float16_t __s1 = __p1; \ |
| | 35442 | __ret = __s0 * (float16x8_t) {__s1, __s1, __s1, __s1, __s1, __s1, __s1, __s1}; \ |
| | 35443 | __ret; \ |
| 34495 | }) | 35444 | }) |
| 34496 | #else | 35445 | #else |
| 34497 | #define vst1q_f16_x2(__p0, __p1) __extension__ ({ \ | 35446 | #define vmulq_n_f16(__p0, __p1) __extension__ ({ \ |
| 34498 | float16x8x2_t __s1 = __p1; \ | 35447 | float16x8_t __ret; \ |
| 34499 | float16x8x2_t __rev1; \ | 35448 | float16x8_t __s0 = __p0; \ |
| 34500 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35449 | float16_t __s1 = __p1; \ |
| 34501 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35450 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 34502 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 40); \ | 35451 | __ret = __rev0 * (float16x8_t) {__s1, __s1, __s1, __s1, __s1, __s1, __s1, __s1}; \ |
| | 35452 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 35453 | __ret; \ |
| 34503 | }) | 35454 | }) |
| 34504 | #endif | 35455 | #endif |
| 34505 | | 35456 | |
| 34506 | #ifdef __LITTLE_ENDIAN__ | 35457 | #ifdef __LITTLE_ENDIAN__ |
| 34507 | #define vst1_f16_x2(__p0, __p1) __extension__ ({ \ | 35458 | #define vmul_n_f16(__p0, __p1) __extension__ ({ \ |
| 34508 | float16x4x2_t __s1 = __p1; \ | 35459 | float16x4_t __ret; \ |
| 34509 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 8); \ | 35460 | float16x4_t __s0 = __p0; \ |
| | 35461 | float16_t __s1 = __p1; \ |
| | 35462 | __ret = __s0 * (float16x4_t) {__s1, __s1, __s1, __s1}; \ |
| | 35463 | __ret; \ |
| 34510 | }) | 35464 | }) |
| 34511 | #else | 35465 | #else |
| 34512 | #define vst1_f16_x2(__p0, __p1) __extension__ ({ \ | 35466 | #define vmul_n_f16(__p0, __p1) __extension__ ({ \ |
| 34513 | float16x4x2_t __s1 = __p1; \ | 35467 | float16x4_t __ret; \ |
| 34514 | float16x4x2_t __rev1; \ | 35468 | float16x4_t __s0 = __p0; \ |
| 34515 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 35469 | float16_t __s1 = __p1; \ |
| 34516 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 35470 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 34517 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 8); \ | 35471 | __ret = __rev0 * (float16x4_t) {__s1, __s1, __s1, __s1}; \ |
| | 35472 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 35473 | __ret; \ |
| 34518 | }) | 35474 | }) |
| 34519 | #endif | 35475 | #endif |
| 34520 | | 35476 | |
| 34521 | #ifdef __LITTLE_ENDIAN__ | 35477 | #ifdef __LITTLE_ENDIAN__ |
| 34522 | #define vst1q_f16_x3(__p0, __p1) __extension__ ({ \ | 35478 | __ai __attribute__((target("fullfp16"))) float16x8_t vnegq_f16(float16x8_t __p0) { |
| 34523 | float16x8x3_t __s1 = __p1; \ | 35479 | float16x8_t __ret; |
| 34524 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 40); \ | 35480 | __ret = -__p0; |
| 34525 | }) | 35481 | return __ret; |
| | 35482 | } |
| 34526 | #else | 35483 | #else |
| 34527 | #define vst1q_f16_x3(__p0, __p1) __extension__ ({ \ | 35484 | __ai __attribute__((target("fullfp16"))) float16x8_t vnegq_f16(float16x8_t __p0) { |
| 34528 | float16x8x3_t __s1 = __p1; \ | 35485 | float16x8_t __ret; |
| 34529 | float16x8x3_t __rev1; \ | 35486 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34530 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35487 | __ret = -__rev0; |
| 34531 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35488 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34532 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35489 | return __ret; |
| 34533 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 40); \ | 35490 | } |
| 34534 | }) | | |
| 34535 | #endif | 35491 | #endif |
| 34536 | | 35492 | |
| 34537 | #ifdef __LITTLE_ENDIAN__ | 35493 | #ifdef __LITTLE_ENDIAN__ |
| 34538 | #define vst1_f16_x3(__p0, __p1) __extension__ ({ \ | 35494 | __ai __attribute__((target("fullfp16"))) float16x4_t vneg_f16(float16x4_t __p0) { |
| 34539 | float16x4x3_t __s1 = __p1; \ | 35495 | float16x4_t __ret; |
| 34540 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 8); \ | 35496 | __ret = -__p0; |
| 34541 | }) | 35497 | return __ret; |
| | 35498 | } |
| 34542 | #else | 35499 | #else |
| 34543 | #define vst1_f16_x3(__p0, __p1) __extension__ ({ \ | 35500 | __ai __attribute__((target("fullfp16"))) float16x4_t vneg_f16(float16x4_t __p0) { |
| 34544 | float16x4x3_t __s1 = __p1; \ | 35501 | float16x4_t __ret; |
| 34545 | float16x4x3_t __rev1; \ | 35502 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34546 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 35503 | __ret = -__rev0; |
| 34547 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 35504 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34548 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 35505 | return __ret; |
| 34549 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 8); \ | 35506 | } |
| 34550 | }) | | |
| 34551 | #endif | 35507 | #endif |
| 34552 | | 35508 | |
| 34553 | #ifdef __LITTLE_ENDIAN__ | 35509 | #ifdef __LITTLE_ENDIAN__ |
| 34554 | #define vst1q_f16_x4(__p0, __p1) __extension__ ({ \ | 35510 | __ai __attribute__((target("fullfp16"))) float16x4_t vpadd_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34555 | float16x8x4_t __s1 = __p1; \ | 35511 | float16x4_t __ret; |
| 34556 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 40); \ | 35512 | __ret = (float16x4_t) __builtin_neon_vpadd_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 34557 | }) | 35513 | return __ret; |
| | 35514 | } |
| 34558 | #else | 35515 | #else |
| 34559 | #define vst1q_f16_x4(__p0, __p1) __extension__ ({ \ | 35516 | __ai __attribute__((target("fullfp16"))) float16x4_t vpadd_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34560 | float16x8x4_t __s1 = __p1; \ | 35517 | float16x4_t __ret; |
| 34561 | float16x8x4_t __rev1; \ | 35518 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34562 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35519 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 34563 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35520 | __ret = (float16x4_t) __builtin_neon_vpadd_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| 34564 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35521 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34565 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35522 | return __ret; |
| 34566 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 40); \ | 35523 | } |
| 34567 | }) | | |
| 34568 | #endif | 35524 | #endif |
| 34569 | | 35525 | |
| 34570 | #ifdef __LITTLE_ENDIAN__ | 35526 | #ifdef __LITTLE_ENDIAN__ |
| 34571 | #define vst1_f16_x4(__p0, __p1) __extension__ ({ \ | 35527 | __ai __attribute__((target("fullfp16"))) float16x4_t vpmax_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34572 | float16x4x4_t __s1 = __p1; \ | 35528 | float16x4_t __ret; |
| 34573 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 8); \ | 35529 | __ret = (float16x4_t) __builtin_neon_vpmax_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 34574 | }) | 35530 | return __ret; |
| | 35531 | } |
| 34575 | #else | 35532 | #else |
| 34576 | #define vst1_f16_x4(__p0, __p1) __extension__ ({ \ | 35533 | __ai __attribute__((target("fullfp16"))) float16x4_t vpmax_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34577 | float16x4x4_t __s1 = __p1; \ | 35534 | float16x4_t __ret; |
| 34578 | float16x4x4_t __rev1; \ | 35535 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34579 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 35536 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 34580 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 35537 | __ret = (float16x4_t) __builtin_neon_vpmax_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| 34581 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 35538 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34582 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 35539 | return __ret; |
| 34583 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 8); \ | 35540 | } |
| 34584 | }) | | |
| 34585 | #endif | 35541 | #endif |
| 34586 | | 35542 | |
| 34587 | #ifdef __LITTLE_ENDIAN__ | 35543 | #ifdef __LITTLE_ENDIAN__ |
| 34588 | #define vst2q_f16(__p0, __p1) __extension__ ({ \ | 35544 | __ai __attribute__((target("fullfp16"))) float16x4_t vpmin_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34589 | float16x8x2_t __s1 = __p1; \ | 35545 | float16x4_t __ret; |
| 34590 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 40); \ | 35546 | __ret = (float16x4_t) __builtin_neon_vpmin_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 34591 | }) | 35547 | return __ret; |
| | 35548 | } |
| 34592 | #else | 35549 | #else |
| 34593 | #define vst2q_f16(__p0, __p1) __extension__ ({ \ | 35550 | __ai __attribute__((target("fullfp16"))) float16x4_t vpmin_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34594 | float16x8x2_t __s1 = __p1; \ | 35551 | float16x4_t __ret; |
| 34595 | float16x8x2_t __rev1; \ | 35552 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34596 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35553 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 34597 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35554 | __ret = (float16x4_t) __builtin_neon_vpmin_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| 34598 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 40); \ | 35555 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34599 | }) | 35556 | return __ret; |
| | 35557 | } |
| 34600 | #endif | 35558 | #endif |
| 34601 | | 35559 | |
| 34602 | #ifdef __LITTLE_ENDIAN__ | 35560 | #ifdef __LITTLE_ENDIAN__ |
| 34603 | #define vst2_f16(__p0, __p1) __extension__ ({ \ | 35561 | __ai __attribute__((target("fullfp16"))) float16x8_t vrecpeq_f16(float16x8_t __p0) { |
| 34604 | float16x4x2_t __s1 = __p1; \ | 35562 | float16x8_t __ret; |
| 34605 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 8); \ | 35563 | __ret = (float16x8_t) __builtin_neon_vrecpeq_f16((int8x16_t)__p0, 40); |
| 34606 | }) | 35564 | return __ret; |
| | 35565 | } |
| 34607 | #else | 35566 | #else |
| 34608 | #define vst2_f16(__p0, __p1) __extension__ ({ \ | 35567 | __ai __attribute__((target("fullfp16"))) float16x8_t vrecpeq_f16(float16x8_t __p0) { |
| 34609 | float16x4x2_t __s1 = __p1; \ | 35568 | float16x8_t __ret; |
| 34610 | float16x4x2_t __rev1; \ | 35569 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34611 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 35570 | __ret = (float16x8_t) __builtin_neon_vrecpeq_f16((int8x16_t)__rev0, 40); |
| 34612 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 35571 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34613 | __builtin_neon_vst2_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 8); \ | 35572 | return __ret; |
| 34614 | }) | 35573 | } |
| 34615 | #endif | 35574 | #endif |
| 34616 | | 35575 | |
| 34617 | #ifdef __LITTLE_ENDIAN__ | 35576 | #ifdef __LITTLE_ENDIAN__ |
| 34618 | #define vst2q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35577 | __ai __attribute__((target("fullfp16"))) float16x4_t vrecpe_f16(float16x4_t __p0) { |
| 34619 | float16x8x2_t __s1 = __p1; \ | 35578 | float16x4_t __ret; |
| 34620 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 40); \ | 35579 | __ret = (float16x4_t) __builtin_neon_vrecpe_f16((int8x8_t)__p0, 8); |
| 34621 | }) | 35580 | return __ret; |
| | 35581 | } |
| 34622 | #else | 35582 | #else |
| 34623 | #define vst2q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35583 | __ai __attribute__((target("fullfp16"))) float16x4_t vrecpe_f16(float16x4_t __p0) { |
| 34624 | float16x8x2_t __s1 = __p1; \ | 35584 | float16x4_t __ret; |
| 34625 | float16x8x2_t __rev1; \ | 35585 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34626 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35586 | __ret = (float16x4_t) __builtin_neon_vrecpe_f16((int8x8_t)__rev0, 8); |
| 34627 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35587 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34628 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 40); \ | 35588 | return __ret; |
| 34629 | }) | 35589 | } |
| 34630 | #endif | 35590 | #endif |
| 34631 | | 35591 | |
| 34632 | #ifdef __LITTLE_ENDIAN__ | 35592 | #ifdef __LITTLE_ENDIAN__ |
| 34633 | #define vst2_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35593 | __ai __attribute__((target("fullfp16"))) float16x8_t vrecpsq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34634 | float16x4x2_t __s1 = __p1; \ | 35594 | float16x8_t __ret; |
| 34635 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 8); \ | 35595 | __ret = (float16x8_t) __builtin_neon_vrecpsq_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 34636 | }) | 35596 | return __ret; |
| | 35597 | } |
| 34637 | #else | 35598 | #else |
| 34638 | #define vst2_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35599 | __ai __attribute__((target("fullfp16"))) float16x8_t vrecpsq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34639 | float16x4x2_t __s1 = __p1; \ | 35600 | float16x8_t __ret; |
| 34640 | float16x4x2_t __rev1; \ | 35601 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34641 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 35602 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34642 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 35603 | __ret = (float16x8_t) __builtin_neon_vrecpsq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| 34643 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 8); \ | 35604 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34644 | }) | 35605 | return __ret; |
| | 35606 | } |
| 34645 | #endif | 35607 | #endif |
| 34646 | | 35608 | |
| 34647 | #ifdef __LITTLE_ENDIAN__ | 35609 | #ifdef __LITTLE_ENDIAN__ |
| 34648 | #define vst3q_f16(__p0, __p1) __extension__ ({ \ | 35610 | __ai __attribute__((target("fullfp16"))) float16x4_t vrecps_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34649 | float16x8x3_t __s1 = __p1; \ | 35611 | float16x4_t __ret; |
| 34650 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 40); \ | 35612 | __ret = (float16x4_t) __builtin_neon_vrecps_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 34651 | }) | 35613 | return __ret; |
| | 35614 | } |
| 34652 | #else | 35615 | #else |
| 34653 | #define vst3q_f16(__p0, __p1) __extension__ ({ \ | 35616 | __ai __attribute__((target("fullfp16"))) float16x4_t vrecps_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34654 | float16x8x3_t __s1 = __p1; \ | 35617 | float16x4_t __ret; |
| 34655 | float16x8x3_t __rev1; \ | 35618 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34656 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35619 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 34657 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35620 | __ret = (float16x4_t) __builtin_neon_vrecps_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| 34658 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35621 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34659 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 40); \ | 35622 | return __ret; |
| 34660 | }) | 35623 | } |
| 34661 | #endif | 35624 | #endif |
| 34662 | | 35625 | |
| 34663 | #ifdef __LITTLE_ENDIAN__ | 35626 | #ifdef __LITTLE_ENDIAN__ |
| 34664 | #define vst3_f16(__p0, __p1) __extension__ ({ \ | 35627 | __ai __attribute__((target("fullfp16"))) float16x8_t vrev64q_f16(float16x8_t __p0) { |
| 34665 | float16x4x3_t __s1 = __p1; \ | 35628 | float16x8_t __ret; |
| 34666 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 8); \ | 35629 | __ret = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0, 7, 6, 5, 4); |
| 34667 | }) | 35630 | return __ret; |
| | 35631 | } |
| 34668 | #else | 35632 | #else |
| 34669 | #define vst3_f16(__p0, __p1) __extension__ ({ \ | 35633 | __ai __attribute__((target("fullfp16"))) float16x8_t vrev64q_f16(float16x8_t __p0) { |
| 34670 | float16x4x3_t __s1 = __p1; \ | 35634 | float16x8_t __ret; |
| 34671 | float16x4x3_t __rev1; \ | 35635 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34672 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 35636 | __ret = __builtin_shufflevector(__rev0, __rev0, 3, 2, 1, 0, 7, 6, 5, 4); |
| 34673 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 35637 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34674 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 35638 | return __ret; |
| 34675 | __builtin_neon_vst3_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 8); \ | 35639 | } |
| 34676 | }) | | |
| 34677 | #endif | 35640 | #endif |
| 34678 | | 35641 | |
| 34679 | #ifdef __LITTLE_ENDIAN__ | 35642 | #ifdef __LITTLE_ENDIAN__ |
| 34680 | #define vst3q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35643 | __ai __attribute__((target("fullfp16"))) float16x4_t vrev64_f16(float16x4_t __p0) { |
| 34681 | float16x8x3_t __s1 = __p1; \ | 35644 | float16x4_t __ret; |
| 34682 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 40); \ | 35645 | __ret = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34683 | }) | 35646 | return __ret; |
| | 35647 | } |
| 34684 | #else | 35648 | #else |
| 34685 | #define vst3q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35649 | __ai __attribute__((target("fullfp16"))) float16x4_t vrev64_f16(float16x4_t __p0) { |
| 34686 | float16x8x3_t __s1 = __p1; \ | 35650 | float16x4_t __ret; |
| 34687 | float16x8x3_t __rev1; \ | 35651 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34688 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35652 | __ret = __builtin_shufflevector(__rev0, __rev0, 3, 2, 1, 0); |
| 34689 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35653 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34690 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35654 | return __ret; |
| 34691 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 40); \ | 35655 | } |
| 34692 | }) | | |
| 34693 | #endif | 35656 | #endif |
| 34694 | | 35657 | |
| 34695 | #ifdef __LITTLE_ENDIAN__ | 35658 | #ifdef __LITTLE_ENDIAN__ |
| 34696 | #define vst3_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35659 | __ai __attribute__((target("fullfp16"))) float16x8_t vrsqrteq_f16(float16x8_t __p0) { |
| 34697 | float16x4x3_t __s1 = __p1; \ | 35660 | float16x8_t __ret; |
| 34698 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 8); \ | 35661 | __ret = (float16x8_t) __builtin_neon_vrsqrteq_f16((int8x16_t)__p0, 40); |
| 34699 | }) | 35662 | return __ret; |
| | 35663 | } |
| 34700 | #else | 35664 | #else |
| 34701 | #define vst3_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35665 | __ai __attribute__((target("fullfp16"))) float16x8_t vrsqrteq_f16(float16x8_t __p0) { |
| 34702 | float16x4x3_t __s1 = __p1; \ | 35666 | float16x8_t __ret; |
| 34703 | float16x4x3_t __rev1; \ | 35667 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34704 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 35668 | __ret = (float16x8_t) __builtin_neon_vrsqrteq_f16((int8x16_t)__rev0, 40); |
| 34705 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 35669 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34706 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 35670 | return __ret; |
| 34707 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 8); \ | 35671 | } |
| 34708 | }) | | |
| 34709 | #endif | 35672 | #endif |
| 34710 | | 35673 | |
| 34711 | #ifdef __LITTLE_ENDIAN__ | 35674 | #ifdef __LITTLE_ENDIAN__ |
| 34712 | #define vst4q_f16(__p0, __p1) __extension__ ({ \ | 35675 | __ai __attribute__((target("fullfp16"))) float16x4_t vrsqrte_f16(float16x4_t __p0) { |
| 34713 | float16x8x4_t __s1 = __p1; \ | 35676 | float16x4_t __ret; |
| 34714 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 40); \ | 35677 | __ret = (float16x4_t) __builtin_neon_vrsqrte_f16((int8x8_t)__p0, 8); |
| 34715 | }) | 35678 | return __ret; |
| | 35679 | } |
| 34716 | #else | 35680 | #else |
| 34717 | #define vst4q_f16(__p0, __p1) __extension__ ({ \ | 35681 | __ai __attribute__((target("fullfp16"))) float16x4_t vrsqrte_f16(float16x4_t __p0) { |
| 34718 | float16x8x4_t __s1 = __p1; \ | 35682 | float16x4_t __ret; |
| 34719 | float16x8x4_t __rev1; \ | 35683 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34720 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35684 | __ret = (float16x4_t) __builtin_neon_vrsqrte_f16((int8x8_t)__rev0, 8); |
| 34721 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35685 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34722 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35686 | return __ret; |
| 34723 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35687 | } |
| 34724 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 40); \ | | |
| 34725 | }) | | |
| 34726 | #endif | 35688 | #endif |
| 34727 | | 35689 | |
| 34728 | #ifdef __LITTLE_ENDIAN__ | 35690 | #ifdef __LITTLE_ENDIAN__ |
| 34729 | #define vst4_f16(__p0, __p1) __extension__ ({ \ | 35691 | __ai __attribute__((target("fullfp16"))) float16x8_t vrsqrtsq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34730 | float16x4x4_t __s1 = __p1; \ | 35692 | float16x8_t __ret; |
| 34731 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 8); \ | 35693 | __ret = (float16x8_t) __builtin_neon_vrsqrtsq_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 34732 | }) | 35694 | return __ret; |
| | 35695 | } |
| 34733 | #else | 35696 | #else |
| 34734 | #define vst4_f16(__p0, __p1) __extension__ ({ \ | 35697 | __ai __attribute__((target("fullfp16"))) float16x8_t vrsqrtsq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34735 | float16x4x4_t __s1 = __p1; \ | 35698 | float16x8_t __ret; |
| 34736 | float16x4x4_t __rev1; \ | 35699 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34737 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 35700 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34738 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 35701 | __ret = (float16x8_t) __builtin_neon_vrsqrtsq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| 34739 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 35702 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34740 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 35703 | return __ret; |
| 34741 | __builtin_neon_vst4_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 8); \ | 35704 | } |
| 34742 | }) | | |
| 34743 | #endif | 35705 | #endif |
| 34744 | | 35706 | |
| 34745 | #ifdef __LITTLE_ENDIAN__ | 35707 | #ifdef __LITTLE_ENDIAN__ |
| 34746 | #define vst4q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35708 | __ai __attribute__((target("fullfp16"))) float16x4_t vrsqrts_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34747 | float16x8x4_t __s1 = __p1; \ | 35709 | float16x4_t __ret; |
| 34748 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 40); \ | 35710 | __ret = (float16x4_t) __builtin_neon_vrsqrts_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 34749 | }) | 35711 | return __ret; |
| | 35712 | } |
| 34750 | #else | 35713 | #else |
| 34751 | #define vst4q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35714 | __ai __attribute__((target("fullfp16"))) float16x4_t vrsqrts_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34752 | float16x8x4_t __s1 = __p1; \ | 35715 | float16x4_t __ret; |
| 34753 | float16x8x4_t __rev1; \ | 35716 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34754 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35717 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 34755 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35718 | __ret = (float16x4_t) __builtin_neon_vrsqrts_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| 34756 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35719 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34757 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 35720 | return __ret; |
| 34758 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 40); \ | 35721 | } |
| 34759 | }) | | |
| 34760 | #endif | 35722 | #endif |
| 34761 | | 35723 | |
| 34762 | #ifdef __LITTLE_ENDIAN__ | 35724 | #ifdef __LITTLE_ENDIAN__ |
| 34763 | #define vst4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35725 | __ai __attribute__((target("fullfp16"))) float16x8_t vsubq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34764 | float16x4x4_t __s1 = __p1; \ | 35726 | float16x8_t __ret; |
| 34765 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 8); \ | 35727 | __ret = __p0 - __p1; |
| 34766 | }) | 35728 | return __ret; |
| | 35729 | } |
| 34767 | #else | 35730 | #else |
| 34768 | #define vst4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 35731 | __ai __attribute__((target("fullfp16"))) float16x8_t vsubq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34769 | float16x4x4_t __s1 = __p1; \ | 35732 | float16x8_t __ret; |
| 34770 | float16x4x4_t __rev1; \ | 35733 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34771 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 35734 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34772 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 35735 | __ret = __rev0 - __rev1; |
| 34773 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 35736 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34774 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 35737 | return __ret; |
| 34775 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 8); \ | 35738 | } |
| 34776 | }) | | |
| 34777 | #endif | 35739 | #endif |
| 34778 | | 35740 | |
| 34779 | #endif | | |
| 34780 | #if __ARM_ARCH >= 8 | | |
| 34781 | #ifdef __LITTLE_ENDIAN__ | 35741 | #ifdef __LITTLE_ENDIAN__ |
| 34782 | __ai int32x4_t vcvtaq_s32_f32(float32x4_t __p0) { | 35742 | __ai __attribute__((target("fullfp16"))) float16x4_t vsub_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34783 | int32x4_t __ret; | 35743 | float16x4_t __ret; |
| 34784 | __ret = (int32x4_t) __builtin_neon_vcvtaq_s32_v((int8x16_t)__p0, 34); | 35744 | __ret = __p0 - __p1; |
| 34785 | return __ret; | 35745 | return __ret; |
| 34786 | } | 35746 | } |
| 34787 | #else | 35747 | #else |
| 34788 | __ai int32x4_t vcvtaq_s32_f32(float32x4_t __p0) { | 35748 | __ai __attribute__((target("fullfp16"))) float16x4_t vsub_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34789 | int32x4_t __ret; | 35749 | float16x4_t __ret; |
| 34790 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 35750 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34791 | __ret = (int32x4_t) __builtin_neon_vcvtaq_s32_v((int8x16_t)__rev0, 34); | 35751 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 35752 | __ret = __rev0 - __rev1; |
| 34792 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 35753 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34793 | return __ret; | 35754 | return __ret; |
| 34794 | } | 35755 | } |
| 34795 | #endif | 35756 | #endif |
| 34796 | | 35757 | |
| 34797 | #ifdef __LITTLE_ENDIAN__ | 35758 | #ifdef __LITTLE_ENDIAN__ |
| 34798 | __ai int32x2_t vcvta_s32_f32(float32x2_t __p0) { | 35759 | __ai __attribute__((target("fullfp16"))) float16x8x2_t vtrnq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34799 | int32x2_t __ret; | 35760 | float16x8x2_t __ret; |
| 34800 | __ret = (int32x2_t) __builtin_neon_vcvta_s32_v((int8x8_t)__p0, 2); | 35761 | __builtin_neon_vtrnq_f16(&__ret, (int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 34801 | return __ret; | 35762 | return __ret; |
| 34802 | } | 35763 | } |
| 34803 | #else | 35764 | #else |
| 34804 | __ai int32x2_t vcvta_s32_f32(float32x2_t __p0) { | 35765 | __ai __attribute__((target("fullfp16"))) float16x8x2_t vtrnq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34805 | int32x2_t __ret; | 35766 | float16x8x2_t __ret; |
| 34806 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 35767 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34807 | __ret = (int32x2_t) __builtin_neon_vcvta_s32_v((int8x8_t)__rev0, 2); | 35768 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34808 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 35769 | __builtin_neon_vtrnq_f16(&__ret, (int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| | 35770 | |
| | 35771 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35772 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); |
| 34809 | return __ret; | 35773 | return __ret; |
| 34810 | } | 35774 | } |
| 34811 | #endif | 35775 | #endif |
| 34812 | | 35776 | |
| 34813 | #ifdef __LITTLE_ENDIAN__ | 35777 | #ifdef __LITTLE_ENDIAN__ |
| 34814 | __ai uint32x4_t vcvtaq_u32_f32(float32x4_t __p0) { | 35778 | __ai __attribute__((target("fullfp16"))) float16x4x2_t vtrn_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34815 | uint32x4_t __ret; | 35779 | float16x4x2_t __ret; |
| 34816 | __ret = (uint32x4_t) __builtin_neon_vcvtaq_u32_v((int8x16_t)__p0, 50); | 35780 | __builtin_neon_vtrn_f16(&__ret, (int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 34817 | return __ret; | 35781 | return __ret; |
| 34818 | } | 35782 | } |
| 34819 | #else | 35783 | #else |
| 34820 | __ai uint32x4_t vcvtaq_u32_f32(float32x4_t __p0) { | 35784 | __ai __attribute__((target("fullfp16"))) float16x4x2_t vtrn_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34821 | uint32x4_t __ret; | 35785 | float16x4x2_t __ret; |
| 34822 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 35786 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34823 | __ret = (uint32x4_t) __builtin_neon_vcvtaq_u32_v((int8x16_t)__rev0, 50); | 35787 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 34824 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 35788 | __builtin_neon_vtrn_f16(&__ret, (int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| | 35789 | |
| | 35790 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); |
| | 35791 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); |
| 34825 | return __ret; | 35792 | return __ret; |
| 34826 | } | 35793 | } |
| 34827 | #endif | 35794 | #endif |
| 34828 | | 35795 | |
| 34829 | #ifdef __LITTLE_ENDIAN__ | 35796 | #ifdef __LITTLE_ENDIAN__ |
| 34830 | __ai uint32x2_t vcvta_u32_f32(float32x2_t __p0) { | 35797 | __ai __attribute__((target("fullfp16"))) float16x8x2_t vuzpq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34831 | uint32x2_t __ret; | 35798 | float16x8x2_t __ret; |
| 34832 | __ret = (uint32x2_t) __builtin_neon_vcvta_u32_v((int8x8_t)__p0, 18); | 35799 | __builtin_neon_vuzpq_f16(&__ret, (int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 34833 | return __ret; | 35800 | return __ret; |
| 34834 | } | 35801 | } |
| 34835 | #else | 35802 | #else |
| 34836 | __ai uint32x2_t vcvta_u32_f32(float32x2_t __p0) { | 35803 | __ai __attribute__((target("fullfp16"))) float16x8x2_t vuzpq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34837 | uint32x2_t __ret; | 35804 | float16x8x2_t __ret; |
| 34838 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 35805 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34839 | __ret = (uint32x2_t) __builtin_neon_vcvta_u32_v((int8x8_t)__rev0, 18); | 35806 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34840 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 35807 | __builtin_neon_vuzpq_f16(&__ret, (int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| | 35808 | |
| | 35809 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35810 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); |
| 34841 | return __ret; | 35811 | return __ret; |
| 34842 | } | 35812 | } |
| 34843 | #endif | 35813 | #endif |
| 34844 | | 35814 | |
| 34845 | #ifdef __LITTLE_ENDIAN__ | 35815 | #ifdef __LITTLE_ENDIAN__ |
| 34846 | __ai int32x4_t vcvtmq_s32_f32(float32x4_t __p0) { | 35816 | __ai __attribute__((target("fullfp16"))) float16x4x2_t vuzp_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34847 | int32x4_t __ret; | 35817 | float16x4x2_t __ret; |
| 34848 | __ret = (int32x4_t) __builtin_neon_vcvtmq_s32_v((int8x16_t)__p0, 34); | 35818 | __builtin_neon_vuzp_f16(&__ret, (int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 34849 | return __ret; | 35819 | return __ret; |
| 34850 | } | 35820 | } |
| 34851 | #else | 35821 | #else |
| 34852 | __ai int32x4_t vcvtmq_s32_f32(float32x4_t __p0) { | 35822 | __ai __attribute__((target("fullfp16"))) float16x4x2_t vuzp_f16(float16x4_t __p0, float16x4_t __p1) { |
| 34853 | int32x4_t __ret; | 35823 | float16x4x2_t __ret; |
| 34854 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 35824 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34855 | __ret = (int32x4_t) __builtin_neon_vcvtmq_s32_v((int8x16_t)__rev0, 34); | 35825 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 34856 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 35826 | __builtin_neon_vuzp_f16(&__ret, (int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| | 35827 | |
| | 35828 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); |
| | 35829 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); |
| 34857 | return __ret; | 35830 | return __ret; |
| 34858 | } | 35831 | } |
| 34859 | #endif | 35832 | #endif |
| 34860 | | 35833 | |
| 34861 | #ifdef __LITTLE_ENDIAN__ | 35834 | #ifdef __LITTLE_ENDIAN__ |
| 34862 | __ai int32x2_t vcvtm_s32_f32(float32x2_t __p0) { | 35835 | __ai __attribute__((target("fullfp16"))) float16x8x2_t vzipq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34863 | int32x2_t __ret; | 35836 | float16x8x2_t __ret; |
| 34864 | __ret = (int32x2_t) __builtin_neon_vcvtm_s32_v((int8x8_t)__p0, 2); | 35837 | __builtin_neon_vzipq_f16(&__ret, (int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 34865 | return __ret; | 35838 | return __ret; |
| 34866 | } | 35839 | } |
| 34867 | #else | 35840 | #else |
| 34868 | __ai int32x2_t vcvtm_s32_f32(float32x2_t __p0) { | 35841 | __ai __attribute__((target("fullfp16"))) float16x8x2_t vzipq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 34869 | int32x2_t __ret; | 35842 | float16x8x2_t __ret; |
| 34870 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 35843 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34871 | __ret = (int32x2_t) __builtin_neon_vcvtm_s32_v((int8x8_t)__rev0, 2); | 35844 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34872 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 35845 | __builtin_neon_vzipq_f16(&__ret, (int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| | 35846 | |
| | 35847 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35848 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); |
| 34873 | return __ret; | 35849 | return __ret; |
| 34874 | } | 35850 | } |
| 34875 | #endif | 35851 | #endif |
| 34876 | | 35852 | |
| 34877 | #ifdef __LITTLE_ENDIAN__ | 35853 | #ifdef __LITTLE_ENDIAN__ |
| 34878 | __ai uint32x4_t vcvtmq_u32_f32(float32x4_t __p0) { | 35854 | __ai __attribute__((target("fullfp16"))) float16x4x2_t vzip_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 35855 | float16x4x2_t __ret; |
| | 35856 | __builtin_neon_vzip_f16(&__ret, (int8x8_t)__p0, (int8x8_t)__p1, 8); |
| | 35857 | return __ret; |
| | 35858 | } |
| | 35859 | #else |
| | 35860 | __ai __attribute__((target("fullfp16"))) float16x4x2_t vzip_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 35861 | float16x4x2_t __ret; |
| | 35862 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 35863 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 35864 | __builtin_neon_vzip_f16(&__ret, (int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| | 35865 | |
| | 35866 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); |
| | 35867 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); |
| | 35868 | return __ret; |
| | 35869 | } |
| | 35870 | #endif |
| | 35871 | |
| | 35872 | #ifdef __LITTLE_ENDIAN__ |
| | 35873 | __ai __attribute__((target("i8mm"))) uint32x4_t vmmlaq_u32(uint32x4_t __p0, uint8x16_t __p1, uint8x16_t __p2) { |
| 34879 | uint32x4_t __ret; | 35874 | uint32x4_t __ret; |
| 34880 | __ret = (uint32x4_t) __builtin_neon_vcvtmq_u32_v((int8x16_t)__p0, 50); | 35875 | __ret = (uint32x4_t) __builtin_neon_vmmlaq_u32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); |
| 34881 | return __ret; | 35876 | return __ret; |
| 34882 | } | 35877 | } |
| 34883 | #else | 35878 | #else |
| 34884 | __ai uint32x4_t vcvtmq_u32_f32(float32x4_t __p0) { | 35879 | __ai __attribute__((target("i8mm"))) uint32x4_t vmmlaq_u32(uint32x4_t __p0, uint8x16_t __p1, uint8x16_t __p2) { |
| 34885 | uint32x4_t __ret; | 35880 | uint32x4_t __ret; |
| 34886 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 35881 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34887 | __ret = (uint32x4_t) __builtin_neon_vcvtmq_u32_v((int8x16_t)__rev0, 50); | 35882 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35883 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35884 | __ret = (uint32x4_t) __builtin_neon_vmmlaq_u32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); |
| 34888 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 35885 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34889 | return __ret; | 35886 | return __ret; |
| 34890 | } | 35887 | } |
| 34891 | #endif | 35888 | #endif |
| 34892 | | 35889 | |
| 34893 | #ifdef __LITTLE_ENDIAN__ | 35890 | #ifdef __LITTLE_ENDIAN__ |
| 34894 | __ai uint32x2_t vcvtm_u32_f32(float32x2_t __p0) { | 35891 | __ai __attribute__((target("i8mm"))) int32x4_t vmmlaq_s32(int32x4_t __p0, int8x16_t __p1, int8x16_t __p2) { |
| 34895 | uint32x2_t __ret; | 35892 | int32x4_t __ret; |
| 34896 | __ret = (uint32x2_t) __builtin_neon_vcvtm_u32_v((int8x8_t)__p0, 18); | 35893 | __ret = (int32x4_t) __builtin_neon_vmmlaq_s32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); |
| 34897 | return __ret; | 35894 | return __ret; |
| 34898 | } | 35895 | } |
| 34899 | #else | 35896 | #else |
| 34900 | __ai uint32x2_t vcvtm_u32_f32(float32x2_t __p0) { | 35897 | __ai __attribute__((target("i8mm"))) int32x4_t vmmlaq_s32(int32x4_t __p0, int8x16_t __p1, int8x16_t __p2) { |
| 34901 | uint32x2_t __ret; | 35898 | int32x4_t __ret; |
| 34902 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 35899 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34903 | __ret = (uint32x2_t) __builtin_neon_vcvtm_u32_v((int8x8_t)__rev0, 18); | 35900 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34904 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 35901 | int8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35902 | __ret = (int32x4_t) __builtin_neon_vmmlaq_s32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); |
| | 35903 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34905 | return __ret; | 35904 | return __ret; |
| 34906 | } | 35905 | } |
| 34907 | #endif | 35906 | #endif |
| 34908 | | 35907 | |
| 34909 | #ifdef __LITTLE_ENDIAN__ | 35908 | #ifdef __LITTLE_ENDIAN__ |
| 34910 | __ai int32x4_t vcvtnq_s32_f32(float32x4_t __p0) { | 35909 | __ai __attribute__((target("i8mm"))) int32x4_t vusdotq_s32(int32x4_t __p0, uint8x16_t __p1, int8x16_t __p2) { |
| 34911 | int32x4_t __ret; | 35910 | int32x4_t __ret; |
| 34912 | __ret = (int32x4_t) __builtin_neon_vcvtnq_s32_v((int8x16_t)__p0, 34); | 35911 | __ret = (int32x4_t) __builtin_neon_vusdotq_s32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); |
| 34913 | return __ret; | 35912 | return __ret; |
| 34914 | } | 35913 | } |
| 34915 | #else | 35914 | #else |
| 34916 | __ai int32x4_t vcvtnq_s32_f32(float32x4_t __p0) { | 35915 | __ai __attribute__((target("i8mm"))) int32x4_t vusdotq_s32(int32x4_t __p0, uint8x16_t __p1, int8x16_t __p2) { |
| 34917 | int32x4_t __ret; | 35916 | int32x4_t __ret; |
| 34918 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 35917 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34919 | __ret = (int32x4_t) __builtin_neon_vcvtnq_s32_v((int8x16_t)__rev0, 34); | 35918 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35919 | int8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35920 | __ret = (int32x4_t) __builtin_neon_vusdotq_s32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); |
| 34920 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 35921 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34921 | return __ret; | 35922 | return __ret; |
| 34922 | } | 35923 | } |
| | 35924 | __ai __attribute__((target("i8mm"))) int32x4_t __noswap_vusdotq_s32(int32x4_t __p0, uint8x16_t __p1, int8x16_t __p2) { |
| | 35925 | int32x4_t __ret; |
| | 35926 | __ret = (int32x4_t) __builtin_neon_vusdotq_s32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); |
| | 35927 | return __ret; |
| | 35928 | } |
| 34923 | #endif | 35929 | #endif |
| 34924 | | 35930 | |
| 34925 | #ifdef __LITTLE_ENDIAN__ | 35931 | #ifdef __LITTLE_ENDIAN__ |
| 34926 | __ai int32x2_t vcvtn_s32_f32(float32x2_t __p0) { | 35932 | __ai __attribute__((target("i8mm"))) int32x2_t vusdot_s32(int32x2_t __p0, uint8x8_t __p1, int8x8_t __p2) { |
| 34927 | int32x2_t __ret; | 35933 | int32x2_t __ret; |
| 34928 | __ret = (int32x2_t) __builtin_neon_vcvtn_s32_v((int8x8_t)__p0, 2); | 35934 | __ret = (int32x2_t) __builtin_neon_vusdot_s32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); |
| 34929 | return __ret; | 35935 | return __ret; |
| 34930 | } | 35936 | } |
| 34931 | #else | 35937 | #else |
| 34932 | __ai int32x2_t vcvtn_s32_f32(float32x2_t __p0) { | 35938 | __ai __attribute__((target("i8mm"))) int32x2_t vusdot_s32(int32x2_t __p0, uint8x8_t __p1, int8x8_t __p2) { |
| 34933 | int32x2_t __ret; | 35939 | int32x2_t __ret; |
| 34934 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 35940 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 34935 | __ret = (int32x2_t) __builtin_neon_vcvtn_s32_v((int8x8_t)__rev0, 2); | 35941 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35942 | int8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 35943 | __ret = (int32x2_t) __builtin_neon_vusdot_s32((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 2); |
| 34936 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 35944 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 34937 | return __ret; | 35945 | return __ret; |
| 34938 | } | 35946 | } |
| | 35947 | __ai __attribute__((target("i8mm"))) int32x2_t __noswap_vusdot_s32(int32x2_t __p0, uint8x8_t __p1, int8x8_t __p2) { |
| | 35948 | int32x2_t __ret; |
| | 35949 | __ret = (int32x2_t) __builtin_neon_vusdot_s32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); |
| | 35950 | return __ret; |
| | 35951 | } |
| 34939 | #endif | 35952 | #endif |
| 34940 | | 35953 | |
| 34941 | #ifdef __LITTLE_ENDIAN__ | 35954 | #ifdef __LITTLE_ENDIAN__ |
| 34942 | __ai uint32x4_t vcvtnq_u32_f32(float32x4_t __p0) { | 35955 | #define vusdotq_lane_s32(__p0_157, __p1_157, __p2_157, __p3_157) __extension__ ({ \ |
| 34943 | uint32x4_t __ret; | 35956 | int32x4_t __ret_157; \ |
| 34944 | __ret = (uint32x4_t) __builtin_neon_vcvtnq_u32_v((int8x16_t)__p0, 50); | 35957 | int32x4_t __s0_157 = __p0_157; \ |
| | 35958 | uint8x16_t __s1_157 = __p1_157; \ |
| | 35959 | int8x8_t __s2_157 = __p2_157; \ |
| | 35960 | int8x8_t __reint_157 = __s2_157; \ |
| | 35961 | __ret_157 = vusdotq_s32(__s0_157, __s1_157, (int8x16_t)(splatq_lane_s32(*(int32x2_t *) &__reint_157, __p3_157))); \ |
| | 35962 | __ret_157; \ |
| | 35963 | }) |
| | 35964 | #else |
| | 35965 | #define vusdotq_lane_s32(__p0_158, __p1_158, __p2_158, __p3_158) __extension__ ({ \ |
| | 35966 | int32x4_t __ret_158; \ |
| | 35967 | int32x4_t __s0_158 = __p0_158; \ |
| | 35968 | uint8x16_t __s1_158 = __p1_158; \ |
| | 35969 | int8x8_t __s2_158 = __p2_158; \ |
| | 35970 | int32x4_t __rev0_158; __rev0_158 = __builtin_shufflevector(__s0_158, __s0_158, 3, 2, 1, 0); \ |
| | 35971 | uint8x16_t __rev1_158; __rev1_158 = __builtin_shufflevector(__s1_158, __s1_158, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 35972 | int8x8_t __rev2_158; __rev2_158 = __builtin_shufflevector(__s2_158, __s2_158, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 35973 | int8x8_t __reint_158 = __rev2_158; \ |
| | 35974 | __ret_158 = __noswap_vusdotq_s32(__rev0_158, __rev1_158, (int8x16_t)(__noswap_splatq_lane_s32(*(int32x2_t *) &__reint_158, __p3_158))); \ |
| | 35975 | __ret_158 = __builtin_shufflevector(__ret_158, __ret_158, 3, 2, 1, 0); \ |
| | 35976 | __ret_158; \ |
| | 35977 | }) |
| | 35978 | #endif |
| | 35979 | |
| | 35980 | #ifdef __LITTLE_ENDIAN__ |
| | 35981 | #define vusdot_lane_s32(__p0_159, __p1_159, __p2_159, __p3_159) __extension__ ({ \ |
| | 35982 | int32x2_t __ret_159; \ |
| | 35983 | int32x2_t __s0_159 = __p0_159; \ |
| | 35984 | uint8x8_t __s1_159 = __p1_159; \ |
| | 35985 | int8x8_t __s2_159 = __p2_159; \ |
| | 35986 | int8x8_t __reint_159 = __s2_159; \ |
| | 35987 | __ret_159 = vusdot_s32(__s0_159, __s1_159, (int8x8_t)(splat_lane_s32(*(int32x2_t *) &__reint_159, __p3_159))); \ |
| | 35988 | __ret_159; \ |
| | 35989 | }) |
| | 35990 | #else |
| | 35991 | #define vusdot_lane_s32(__p0_160, __p1_160, __p2_160, __p3_160) __extension__ ({ \ |
| | 35992 | int32x2_t __ret_160; \ |
| | 35993 | int32x2_t __s0_160 = __p0_160; \ |
| | 35994 | uint8x8_t __s1_160 = __p1_160; \ |
| | 35995 | int8x8_t __s2_160 = __p2_160; \ |
| | 35996 | int32x2_t __rev0_160; __rev0_160 = __builtin_shufflevector(__s0_160, __s0_160, 1, 0); \ |
| | 35997 | uint8x8_t __rev1_160; __rev1_160 = __builtin_shufflevector(__s1_160, __s1_160, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 35998 | int8x8_t __rev2_160; __rev2_160 = __builtin_shufflevector(__s2_160, __s2_160, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 35999 | int8x8_t __reint_160 = __rev2_160; \ |
| | 36000 | __ret_160 = __noswap_vusdot_s32(__rev0_160, __rev1_160, (int8x8_t)(__noswap_splat_lane_s32(*(int32x2_t *) &__reint_160, __p3_160))); \ |
| | 36001 | __ret_160 = __builtin_shufflevector(__ret_160, __ret_160, 1, 0); \ |
| | 36002 | __ret_160; \ |
| | 36003 | }) |
| | 36004 | #endif |
| | 36005 | |
| | 36006 | #ifdef __LITTLE_ENDIAN__ |
| | 36007 | __ai __attribute__((target("i8mm"))) int32x4_t vusmmlaq_s32(int32x4_t __p0, uint8x16_t __p1, int8x16_t __p2) { |
| | 36008 | int32x4_t __ret; |
| | 36009 | __ret = (int32x4_t) __builtin_neon_vusmmlaq_s32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); |
| 34945 | return __ret; | 36010 | return __ret; |
| 34946 | } | 36011 | } |
| 34947 | #else | 36012 | #else |
| 34948 | __ai uint32x4_t vcvtnq_u32_f32(float32x4_t __p0) { | 36013 | __ai __attribute__((target("i8mm"))) int32x4_t vusmmlaq_s32(int32x4_t __p0, uint8x16_t __p1, int8x16_t __p2) { |
| 34949 | uint32x4_t __ret; | 36014 | int32x4_t __ret; |
| 34950 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36015 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34951 | __ret = (uint32x4_t) __builtin_neon_vcvtnq_u32_v((int8x16_t)__rev0, 50); | 36016 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 36017 | int8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 36018 | __ret = (int32x4_t) __builtin_neon_vusmmlaq_s32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); |
| 34952 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36019 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 34953 | return __ret; | 36020 | return __ret; |
| 34954 | } | 36021 | } |
| 34955 | #endif | 36022 | #endif |
| 34956 | | 36023 | |
| 34957 | #ifdef __LITTLE_ENDIAN__ | 36024 | #ifdef __LITTLE_ENDIAN__ |
| 34958 | __ai uint32x2_t vcvtn_u32_f32(float32x2_t __p0) { | 36025 | __ai __attribute__((target("v8.1a"))) int32x4_t vqrdmlahq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 34959 | uint32x2_t __ret; | 36026 | int32x4_t __ret; |
| 34960 | __ret = (uint32x2_t) __builtin_neon_vcvtn_u32_v((int8x8_t)__p0, 18); | 36027 | __ret = (int32x4_t) __builtin_neon_vqrdmlahq_s32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); |
| 34961 | return __ret; | 36028 | return __ret; |
| 34962 | } | 36029 | } |
| 34963 | #else | 36030 | #else |
| 34964 | __ai uint32x2_t vcvtn_u32_f32(float32x2_t __p0) { | 36031 | __ai __attribute__((target("v8.1a"))) int32x4_t vqrdmlahq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 34965 | uint32x2_t __ret; | 36032 | int32x4_t __ret; |
| 34966 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 36033 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 34967 | __ret = (uint32x2_t) __builtin_neon_vcvtn_u32_v((int8x8_t)__rev0, 18); | 36034 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 34968 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 36035 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 36036 | __ret = (int32x4_t) __builtin_neon_vqrdmlahq_s32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); |
| | 36037 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 36038 | return __ret; |
| | 36039 | } |
| | 36040 | __ai __attribute__((target("v8.1a"))) int32x4_t __noswap_vqrdmlahq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| | 36041 | int32x4_t __ret; |
| | 36042 | __ret = (int32x4_t) __builtin_neon_vqrdmlahq_s32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); |
| 34969 | return __ret; | 36043 | return __ret; |
| 34970 | } | 36044 | } |
| 34971 | #endif | 36045 | #endif |
| 34972 | | 36046 | |
| 34973 | #ifdef __LITTLE_ENDIAN__ | 36047 | #ifdef __LITTLE_ENDIAN__ |
| 34974 | __ai int32x4_t vcvtpq_s32_f32(float32x4_t __p0) { | 36048 | __ai __attribute__((target("v8.1a"))) int16x8_t vqrdmlahq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 34975 | int32x4_t __ret; | 36049 | int16x8_t __ret; |
| 34976 | __ret = (int32x4_t) __builtin_neon_vcvtpq_s32_v((int8x16_t)__p0, 34); | 36050 | __ret = (int16x8_t) __builtin_neon_vqrdmlahq_s16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 33); |
| 34977 | return __ret; | 36051 | return __ret; |
| 34978 | } | 36052 | } |
| 34979 | #else | 36053 | #else |
| 34980 | __ai int32x4_t vcvtpq_s32_f32(float32x4_t __p0) { | 36054 | __ai __attribute__((target("v8.1a"))) int16x8_t vqrdmlahq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 34981 | int32x4_t __ret; | 36055 | int16x8_t __ret; |
| 34982 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36056 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34983 | __ret = (int32x4_t) __builtin_neon_vcvtpq_s32_v((int8x16_t)__rev0, 34); | 36057 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 34984 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36058 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 36059 | __ret = (int16x8_t) __builtin_neon_vqrdmlahq_s16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 33); |
| | 36060 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 36061 | return __ret; |
| | 36062 | } |
| | 36063 | __ai __attribute__((target("v8.1a"))) int16x8_t __noswap_vqrdmlahq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| | 36064 | int16x8_t __ret; |
| | 36065 | __ret = (int16x8_t) __builtin_neon_vqrdmlahq_s16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 33); |
| 34985 | return __ret; | 36066 | return __ret; |
| 34986 | } | 36067 | } |
| 34987 | #endif | 36068 | #endif |
| 34988 | | 36069 | |
| 34989 | #ifdef __LITTLE_ENDIAN__ | 36070 | #ifdef __LITTLE_ENDIAN__ |
| 34990 | __ai int32x2_t vcvtp_s32_f32(float32x2_t __p0) { | 36071 | __ai __attribute__((target("v8.1a"))) int32x2_t vqrdmlah_s32(int32x2_t __p0, int32x2_t __p1, int32x2_t __p2) { |
| 34991 | int32x2_t __ret; | 36072 | int32x2_t __ret; |
| 34992 | __ret = (int32x2_t) __builtin_neon_vcvtp_s32_v((int8x8_t)__p0, 2); | 36073 | __ret = (int32x2_t) __builtin_neon_vqrdmlah_s32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); |
| 34993 | return __ret; | 36074 | return __ret; |
| 34994 | } | 36075 | } |
| 34995 | #else | 36076 | #else |
| 34996 | __ai int32x2_t vcvtp_s32_f32(float32x2_t __p0) { | 36077 | __ai __attribute__((target("v8.1a"))) int32x2_t vqrdmlah_s32(int32x2_t __p0, int32x2_t __p1, int32x2_t __p2) { |
| 34997 | int32x2_t __ret; | 36078 | int32x2_t __ret; |
| 34998 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 36079 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 34999 | __ret = (int32x2_t) __builtin_neon_vcvtp_s32_v((int8x8_t)__rev0, 2); | 36080 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 36081 | int32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 36082 | __ret = (int32x2_t) __builtin_neon_vqrdmlah_s32((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 2); |
| 35000 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 36083 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 35001 | return __ret; | 36084 | return __ret; |
| 35002 | } | 36085 | } |
| | 36086 | __ai __attribute__((target("v8.1a"))) int32x2_t __noswap_vqrdmlah_s32(int32x2_t __p0, int32x2_t __p1, int32x2_t __p2) { |
| | 36087 | int32x2_t __ret; |
| | 36088 | __ret = (int32x2_t) __builtin_neon_vqrdmlah_s32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); |
| | 36089 | return __ret; |
| | 36090 | } |
| 35003 | #endif | 36091 | #endif |
| 35004 | | 36092 | |
| 35005 | #ifdef __LITTLE_ENDIAN__ | 36093 | #ifdef __LITTLE_ENDIAN__ |
| 35006 | __ai uint32x4_t vcvtpq_u32_f32(float32x4_t __p0) { | 36094 | __ai __attribute__((target("v8.1a"))) int16x4_t vqrdmlah_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { |
| 35007 | uint32x4_t __ret; | 36095 | int16x4_t __ret; |
| 35008 | __ret = (uint32x4_t) __builtin_neon_vcvtpq_u32_v((int8x16_t)__p0, 50); | 36096 | __ret = (int16x4_t) __builtin_neon_vqrdmlah_s16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 1); |
| 35009 | return __ret; | 36097 | return __ret; |
| 35010 | } | 36098 | } |
| 35011 | #else | 36099 | #else |
| 35012 | __ai uint32x4_t vcvtpq_u32_f32(float32x4_t __p0) { | 36100 | __ai __attribute__((target("v8.1a"))) int16x4_t vqrdmlah_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { |
| 35013 | uint32x4_t __ret; | 36101 | int16x4_t __ret; |
| 35014 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36102 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 35015 | __ret = (uint32x4_t) __builtin_neon_vcvtpq_u32_v((int8x16_t)__rev0, 50); | 36103 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 36104 | int16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 36105 | __ret = (int16x4_t) __builtin_neon_vqrdmlah_s16((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 1); |
| 35016 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36106 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 35017 | return __ret; | 36107 | return __ret; |
| 35018 | } | 36108 | } |
| | 36109 | __ai __attribute__((target("v8.1a"))) int16x4_t __noswap_vqrdmlah_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { |
| | 36110 | int16x4_t __ret; |
| | 36111 | __ret = (int16x4_t) __builtin_neon_vqrdmlah_s16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 1); |
| | 36112 | return __ret; |
| | 36113 | } |
| 35019 | #endif | 36114 | #endif |
| 35020 | | 36115 | |
| 35021 | #ifdef __LITTLE_ENDIAN__ | 36116 | #ifdef __LITTLE_ENDIAN__ |
| 35022 | __ai uint32x2_t vcvtp_u32_f32(float32x2_t __p0) { | 36117 | #define vqrdmlahq_lane_s32(__p0_161, __p1_161, __p2_161, __p3_161) __extension__ ({ \ |
| 35023 | uint32x2_t __ret; | 36118 | int32x4_t __ret_161; \ |
| 35024 | __ret = (uint32x2_t) __builtin_neon_vcvtp_u32_v((int8x8_t)__p0, 18); | 36119 | int32x4_t __s0_161 = __p0_161; \ |
| 35025 | return __ret; | 36120 | int32x4_t __s1_161 = __p1_161; \ |
| 35026 | } | 36121 | int32x2_t __s2_161 = __p2_161; \ |
| | 36122 | __ret_161 = vqrdmlahq_s32(__s0_161, __s1_161, splatq_lane_s32(__s2_161, __p3_161)); \ |
| | 36123 | __ret_161; \ |
| | 36124 | }) |
| 35027 | #else | 36125 | #else |
| 35028 | __ai uint32x2_t vcvtp_u32_f32(float32x2_t __p0) { | 36126 | #define vqrdmlahq_lane_s32(__p0_162, __p1_162, __p2_162, __p3_162) __extension__ ({ \ |
| 35029 | uint32x2_t __ret; | 36127 | int32x4_t __ret_162; \ |
| 35030 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 36128 | int32x4_t __s0_162 = __p0_162; \ |
| 35031 | __ret = (uint32x2_t) __builtin_neon_vcvtp_u32_v((int8x8_t)__rev0, 18); | 36129 | int32x4_t __s1_162 = __p1_162; \ |
| 35032 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 36130 | int32x2_t __s2_162 = __p2_162; \ |
| 35033 | return __ret; | 36131 | int32x4_t __rev0_162; __rev0_162 = __builtin_shufflevector(__s0_162, __s0_162, 3, 2, 1, 0); \ |
| 35034 | } | 36132 | int32x4_t __rev1_162; __rev1_162 = __builtin_shufflevector(__s1_162, __s1_162, 3, 2, 1, 0); \ |
| | 36133 | int32x2_t __rev2_162; __rev2_162 = __builtin_shufflevector(__s2_162, __s2_162, 1, 0); \ |
| | 36134 | __ret_162 = __noswap_vqrdmlahq_s32(__rev0_162, __rev1_162, __noswap_splatq_lane_s32(__rev2_162, __p3_162)); \ |
| | 36135 | __ret_162 = __builtin_shufflevector(__ret_162, __ret_162, 3, 2, 1, 0); \ |
| | 36136 | __ret_162; \ |
| | 36137 | }) |
| 35035 | #endif | 36138 | #endif |
| 35036 | | 36139 | |
| 35037 | #endif | | |
| 35038 | #if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_AES) | | |
| 35039 | #ifdef __LITTLE_ENDIAN__ | 36140 | #ifdef __LITTLE_ENDIAN__ |
| 35040 | __ai uint8x16_t vaesdq_u8(uint8x16_t __p0, uint8x16_t __p1) { | 36141 | #define vqrdmlahq_lane_s16(__p0_163, __p1_163, __p2_163, __p3_163) __extension__ ({ \ |
| 35041 | uint8x16_t __ret; | 36142 | int16x8_t __ret_163; \ |
| 35042 | __ret = (uint8x16_t) __builtin_neon_vaesdq_v((int8x16_t)__p0, (int8x16_t)__p1, 48); | 36143 | int16x8_t __s0_163 = __p0_163; \ |
| 35043 | return __ret; | 36144 | int16x8_t __s1_163 = __p1_163; \ |
| 35044 | } | 36145 | int16x4_t __s2_163 = __p2_163; \ |
| | 36146 | __ret_163 = vqrdmlahq_s16(__s0_163, __s1_163, splatq_lane_s16(__s2_163, __p3_163)); \ |
| | 36147 | __ret_163; \ |
| | 36148 | }) |
| 35045 | #else | 36149 | #else |
| 35046 | __ai uint8x16_t vaesdq_u8(uint8x16_t __p0, uint8x16_t __p1) { | 36150 | #define vqrdmlahq_lane_s16(__p0_164, __p1_164, __p2_164, __p3_164) __extension__ ({ \ |
| 35047 | uint8x16_t __ret; | 36151 | int16x8_t __ret_164; \ |
| 35048 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 36152 | int16x8_t __s0_164 = __p0_164; \ |
| 35049 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 36153 | int16x8_t __s1_164 = __p1_164; \ |
| 35050 | __ret = (uint8x16_t) __builtin_neon_vaesdq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 48); | 36154 | int16x4_t __s2_164 = __p2_164; \ |
| 35051 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 36155 | int16x8_t __rev0_164; __rev0_164 = __builtin_shufflevector(__s0_164, __s0_164, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 35052 | return __ret; | 36156 | int16x8_t __rev1_164; __rev1_164 = __builtin_shufflevector(__s1_164, __s1_164, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 35053 | } | 36157 | int16x4_t __rev2_164; __rev2_164 = __builtin_shufflevector(__s2_164, __s2_164, 3, 2, 1, 0); \ |
| | 36158 | __ret_164 = __noswap_vqrdmlahq_s16(__rev0_164, __rev1_164, __noswap_splatq_lane_s16(__rev2_164, __p3_164)); \ |
| | 36159 | __ret_164 = __builtin_shufflevector(__ret_164, __ret_164, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 36160 | __ret_164; \ |
| | 36161 | }) |
| 35054 | #endif | 36162 | #endif |
| 35055 | | 36163 | |
| 35056 | #ifdef __LITTLE_ENDIAN__ | 36164 | #ifdef __LITTLE_ENDIAN__ |
| 35057 | __ai uint8x16_t vaeseq_u8(uint8x16_t __p0, uint8x16_t __p1) { | 36165 | #define vqrdmlah_lane_s32(__p0_165, __p1_165, __p2_165, __p3_165) __extension__ ({ \ |
| 35058 | uint8x16_t __ret; | 36166 | int32x2_t __ret_165; \ |
| 35059 | __ret = (uint8x16_t) __builtin_neon_vaeseq_v((int8x16_t)__p0, (int8x16_t)__p1, 48); | 36167 | int32x2_t __s0_165 = __p0_165; \ |
| 35060 | return __ret; | 36168 | int32x2_t __s1_165 = __p1_165; \ |
| 35061 | } | 36169 | int32x2_t __s2_165 = __p2_165; \ |
| | 36170 | __ret_165 = vqrdmlah_s32(__s0_165, __s1_165, splat_lane_s32(__s2_165, __p3_165)); \ |
| | 36171 | __ret_165; \ |
| | 36172 | }) |
| 35062 | #else | 36173 | #else |
| 35063 | __ai uint8x16_t vaeseq_u8(uint8x16_t __p0, uint8x16_t __p1) { | 36174 | #define vqrdmlah_lane_s32(__p0_166, __p1_166, __p2_166, __p3_166) __extension__ ({ \ |
| 35064 | uint8x16_t __ret; | 36175 | int32x2_t __ret_166; \ |
| 35065 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 36176 | int32x2_t __s0_166 = __p0_166; \ |
| 35066 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 36177 | int32x2_t __s1_166 = __p1_166; \ |
| 35067 | __ret = (uint8x16_t) __builtin_neon_vaeseq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 48); | 36178 | int32x2_t __s2_166 = __p2_166; \ |
| 35068 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 36179 | int32x2_t __rev0_166; __rev0_166 = __builtin_shufflevector(__s0_166, __s0_166, 1, 0); \ |
| 35069 | return __ret; | 36180 | int32x2_t __rev1_166; __rev1_166 = __builtin_shufflevector(__s1_166, __s1_166, 1, 0); \ |
| 35070 | } | 36181 | int32x2_t __rev2_166; __rev2_166 = __builtin_shufflevector(__s2_166, __s2_166, 1, 0); \ |
| | 36182 | __ret_166 = __noswap_vqrdmlah_s32(__rev0_166, __rev1_166, __noswap_splat_lane_s32(__rev2_166, __p3_166)); \ |
| | 36183 | __ret_166 = __builtin_shufflevector(__ret_166, __ret_166, 1, 0); \ |
| | 36184 | __ret_166; \ |
| | 36185 | }) |
| 35071 | #endif | 36186 | #endif |
| 35072 | | 36187 | |
| 35073 | #ifdef __LITTLE_ENDIAN__ | 36188 | #ifdef __LITTLE_ENDIAN__ |
| 35074 | __ai uint8x16_t vaesimcq_u8(uint8x16_t __p0) { | 36189 | #define vqrdmlah_lane_s16(__p0_167, __p1_167, __p2_167, __p3_167) __extension__ ({ \ |
| 35075 | uint8x16_t __ret; | 36190 | int16x4_t __ret_167; \ |
| 35076 | __ret = (uint8x16_t) __builtin_neon_vaesimcq_v((int8x16_t)__p0, 48); | 36191 | int16x4_t __s0_167 = __p0_167; \ |
| 35077 | return __ret; | 36192 | int16x4_t __s1_167 = __p1_167; \ |
| 35078 | } | 36193 | int16x4_t __s2_167 = __p2_167; \ |
| | 36194 | __ret_167 = vqrdmlah_s16(__s0_167, __s1_167, splat_lane_s16(__s2_167, __p3_167)); \ |
| | 36195 | __ret_167; \ |
| | 36196 | }) |
| 35079 | #else | 36197 | #else |
| 35080 | __ai uint8x16_t vaesimcq_u8(uint8x16_t __p0) { | 36198 | #define vqrdmlah_lane_s16(__p0_168, __p1_168, __p2_168, __p3_168) __extension__ ({ \ |
| 35081 | uint8x16_t __ret; | 36199 | int16x4_t __ret_168; \ |
| 35082 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 36200 | int16x4_t __s0_168 = __p0_168; \ |
| 35083 | __ret = (uint8x16_t) __builtin_neon_vaesimcq_v((int8x16_t)__rev0, 48); | 36201 | int16x4_t __s1_168 = __p1_168; \ |
| 35084 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 36202 | int16x4_t __s2_168 = __p2_168; \ |
| 35085 | return __ret; | 36203 | int16x4_t __rev0_168; __rev0_168 = __builtin_shufflevector(__s0_168, __s0_168, 3, 2, 1, 0); \ |
| 35086 | } | 36204 | int16x4_t __rev1_168; __rev1_168 = __builtin_shufflevector(__s1_168, __s1_168, 3, 2, 1, 0); \ |
| | 36205 | int16x4_t __rev2_168; __rev2_168 = __builtin_shufflevector(__s2_168, __s2_168, 3, 2, 1, 0); \ |
| | 36206 | __ret_168 = __noswap_vqrdmlah_s16(__rev0_168, __rev1_168, __noswap_splat_lane_s16(__rev2_168, __p3_168)); \ |
| | 36207 | __ret_168 = __builtin_shufflevector(__ret_168, __ret_168, 3, 2, 1, 0); \ |
| | 36208 | __ret_168; \ |
| | 36209 | }) |
| 35087 | #endif | 36210 | #endif |
| 35088 | | 36211 | |
| 35089 | #ifdef __LITTLE_ENDIAN__ | 36212 | #ifdef __LITTLE_ENDIAN__ |
| 35090 | __ai uint8x16_t vaesmcq_u8(uint8x16_t __p0) { | 36213 | __ai __attribute__((target("v8.1a"))) int32x4_t vqrdmlshq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 35091 | uint8x16_t __ret; | 36214 | int32x4_t __ret; |
| 35092 | __ret = (uint8x16_t) __builtin_neon_vaesmcq_v((int8x16_t)__p0, 48); | 36215 | __ret = (int32x4_t) __builtin_neon_vqrdmlshq_s32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); |
| 35093 | return __ret; | 36216 | return __ret; |
| 35094 | } | 36217 | } |
| 35095 | #else | 36218 | #else |
| 35096 | __ai uint8x16_t vaesmcq_u8(uint8x16_t __p0) { | 36219 | __ai __attribute__((target("v8.1a"))) int32x4_t vqrdmlshq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 35097 | uint8x16_t __ret; | 36220 | int32x4_t __ret; |
| 35098 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 36221 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 35099 | __ret = (uint8x16_t) __builtin_neon_vaesmcq_v((int8x16_t)__rev0, 48); | 36222 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 35100 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 36223 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 36224 | __ret = (int32x4_t) __builtin_neon_vqrdmlshq_s32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); |
| | 36225 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 36226 | return __ret; |
| | 36227 | } |
| | 36228 | __ai __attribute__((target("v8.1a"))) int32x4_t __noswap_vqrdmlshq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| | 36229 | int32x4_t __ret; |
| | 36230 | __ret = (int32x4_t) __builtin_neon_vqrdmlshq_s32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); |
| 35101 | return __ret; | 36231 | return __ret; |
| 35102 | } | 36232 | } |
| 35103 | #endif | 36233 | #endif |
| 35104 | | 36234 | |
| 35105 | #endif | | |
| 35106 | #if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_DIRECTED_ROUNDING) | | |
| 35107 | #ifdef __LITTLE_ENDIAN__ | 36235 | #ifdef __LITTLE_ENDIAN__ |
| 35108 | __ai float32x4_t vrndq_f32(float32x4_t __p0) { | 36236 | __ai __attribute__((target("v8.1a"))) int16x8_t vqrdmlshq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 35109 | float32x4_t __ret; | 36237 | int16x8_t __ret; |
| 35110 | __ret = (float32x4_t) __builtin_neon_vrndq_v((int8x16_t)__p0, 41); | 36238 | __ret = (int16x8_t) __builtin_neon_vqrdmlshq_s16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 33); |
| 35111 | return __ret; | 36239 | return __ret; |
| 35112 | } | 36240 | } |
| 35113 | #else | 36241 | #else |
| 35114 | __ai float32x4_t vrndq_f32(float32x4_t __p0) { | 36242 | __ai __attribute__((target("v8.1a"))) int16x8_t vqrdmlshq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 35115 | float32x4_t __ret; | 36243 | int16x8_t __ret; |
| 35116 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36244 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 35117 | __ret = (float32x4_t) __builtin_neon_vrndq_v((int8x16_t)__rev0, 41); | 36245 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 35118 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36246 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 36247 | __ret = (int16x8_t) __builtin_neon_vqrdmlshq_s16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 33); |
| | 36248 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 36249 | return __ret; |
| | 36250 | } |
| | 36251 | __ai __attribute__((target("v8.1a"))) int16x8_t __noswap_vqrdmlshq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| | 36252 | int16x8_t __ret; |
| | 36253 | __ret = (int16x8_t) __builtin_neon_vqrdmlshq_s16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 33); |
| 35119 | return __ret; | 36254 | return __ret; |
| 35120 | } | 36255 | } |
| 35121 | #endif | 36256 | #endif |
| 35122 | | 36257 | |
| 35123 | #ifdef __LITTLE_ENDIAN__ | 36258 | #ifdef __LITTLE_ENDIAN__ |
| 35124 | __ai float32x2_t vrnd_f32(float32x2_t __p0) { | 36259 | __ai __attribute__((target("v8.1a"))) int32x2_t vqrdmlsh_s32(int32x2_t __p0, int32x2_t __p1, int32x2_t __p2) { |
| 35125 | float32x2_t __ret; | 36260 | int32x2_t __ret; |
| 35126 | __ret = (float32x2_t) __builtin_neon_vrnd_v((int8x8_t)__p0, 9); | 36261 | __ret = (int32x2_t) __builtin_neon_vqrdmlsh_s32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); |
| 35127 | return __ret; | 36262 | return __ret; |
| 35128 | } | 36263 | } |
| 35129 | #else | 36264 | #else |
| 35130 | __ai float32x2_t vrnd_f32(float32x2_t __p0) { | 36265 | __ai __attribute__((target("v8.1a"))) int32x2_t vqrdmlsh_s32(int32x2_t __p0, int32x2_t __p1, int32x2_t __p2) { |
| 35131 | float32x2_t __ret; | 36266 | int32x2_t __ret; |
| 35132 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 36267 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 35133 | __ret = (float32x2_t) __builtin_neon_vrnd_v((int8x8_t)__rev0, 9); | 36268 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 36269 | int32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 36270 | __ret = (int32x2_t) __builtin_neon_vqrdmlsh_s32((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 2); |
| 35134 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 36271 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 35135 | return __ret; | 36272 | return __ret; |
| 35136 | } | 36273 | } |
| | 36274 | __ai __attribute__((target("v8.1a"))) int32x2_t __noswap_vqrdmlsh_s32(int32x2_t __p0, int32x2_t __p1, int32x2_t __p2) { |
| | 36275 | int32x2_t __ret; |
| | 36276 | __ret = (int32x2_t) __builtin_neon_vqrdmlsh_s32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); |
| | 36277 | return __ret; |
| | 36278 | } |
| 35137 | #endif | 36279 | #endif |
| 35138 | | 36280 | |
| 35139 | #ifdef __LITTLE_ENDIAN__ | 36281 | #ifdef __LITTLE_ENDIAN__ |
| 35140 | __ai float32x4_t vrndaq_f32(float32x4_t __p0) { | 36282 | __ai __attribute__((target("v8.1a"))) int16x4_t vqrdmlsh_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { |
| 35141 | float32x4_t __ret; | 36283 | int16x4_t __ret; |
| 35142 | __ret = (float32x4_t) __builtin_neon_vrndaq_v((int8x16_t)__p0, 41); | 36284 | __ret = (int16x4_t) __builtin_neon_vqrdmlsh_s16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 1); |
| 35143 | return __ret; | 36285 | return __ret; |
| 35144 | } | 36286 | } |
| 35145 | #else | 36287 | #else |
| 35146 | __ai float32x4_t vrndaq_f32(float32x4_t __p0) { | 36288 | __ai __attribute__((target("v8.1a"))) int16x4_t vqrdmlsh_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { |
| 35147 | float32x4_t __ret; | 36289 | int16x4_t __ret; |
| 35148 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36290 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 35149 | __ret = (float32x4_t) __builtin_neon_vrndaq_v((int8x16_t)__rev0, 41); | 36291 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 36292 | int16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 36293 | __ret = (int16x4_t) __builtin_neon_vqrdmlsh_s16((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 1); |
| 35150 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36294 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 35151 | return __ret; | 36295 | return __ret; |
| 35152 | } | 36296 | } |
| | 36297 | __ai __attribute__((target("v8.1a"))) int16x4_t __noswap_vqrdmlsh_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { |
| | 36298 | int16x4_t __ret; |
| | 36299 | __ret = (int16x4_t) __builtin_neon_vqrdmlsh_s16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 1); |
| | 36300 | return __ret; |
| | 36301 | } |
| 35153 | #endif | 36302 | #endif |
| 35154 | | 36303 | |
| 35155 | #ifdef __LITTLE_ENDIAN__ | 36304 | #ifdef __LITTLE_ENDIAN__ |
| 35156 | __ai float32x2_t vrnda_f32(float32x2_t __p0) { | 36305 | #define vqrdmlshq_lane_s32(__p0_169, __p1_169, __p2_169, __p3_169) __extension__ ({ \ |
| 35157 | float32x2_t __ret; | 36306 | int32x4_t __ret_169; \ |
| 35158 | __ret = (float32x2_t) __builtin_neon_vrnda_v((int8x8_t)__p0, 9); | 36307 | int32x4_t __s0_169 = __p0_169; \ |
| 35159 | return __ret; | 36308 | int32x4_t __s1_169 = __p1_169; \ |
| 35160 | } | 36309 | int32x2_t __s2_169 = __p2_169; \ |
| | 36310 | __ret_169 = vqrdmlshq_s32(__s0_169, __s1_169, splatq_lane_s32(__s2_169, __p3_169)); \ |
| | 36311 | __ret_169; \ |
| | 36312 | }) |
| 35161 | #else | 36313 | #else |
| 35162 | __ai float32x2_t vrnda_f32(float32x2_t __p0) { | 36314 | #define vqrdmlshq_lane_s32(__p0_170, __p1_170, __p2_170, __p3_170) __extension__ ({ \ |
| 35163 | float32x2_t __ret; | 36315 | int32x4_t __ret_170; \ |
| 35164 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 36316 | int32x4_t __s0_170 = __p0_170; \ |
| 35165 | __ret = (float32x2_t) __builtin_neon_vrnda_v((int8x8_t)__rev0, 9); | 36317 | int32x4_t __s1_170 = __p1_170; \ |
| 35166 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 36318 | int32x2_t __s2_170 = __p2_170; \ |
| 35167 | return __ret; | 36319 | int32x4_t __rev0_170; __rev0_170 = __builtin_shufflevector(__s0_170, __s0_170, 3, 2, 1, 0); \ |
| 35168 | } | 36320 | int32x4_t __rev1_170; __rev1_170 = __builtin_shufflevector(__s1_170, __s1_170, 3, 2, 1, 0); \ |
| | 36321 | int32x2_t __rev2_170; __rev2_170 = __builtin_shufflevector(__s2_170, __s2_170, 1, 0); \ |
| | 36322 | __ret_170 = __noswap_vqrdmlshq_s32(__rev0_170, __rev1_170, __noswap_splatq_lane_s32(__rev2_170, __p3_170)); \ |
| | 36323 | __ret_170 = __builtin_shufflevector(__ret_170, __ret_170, 3, 2, 1, 0); \ |
| | 36324 | __ret_170; \ |
| | 36325 | }) |
| 35169 | #endif | 36326 | #endif |
| 35170 | | 36327 | |
| 35171 | #ifdef __LITTLE_ENDIAN__ | 36328 | #ifdef __LITTLE_ENDIAN__ |
| 35172 | __ai float32x4_t vrndiq_f32(float32x4_t __p0) { | 36329 | #define vqrdmlshq_lane_s16(__p0_171, __p1_171, __p2_171, __p3_171) __extension__ ({ \ |
| 35173 | float32x4_t __ret; | 36330 | int16x8_t __ret_171; \ |
| 35174 | __ret = (float32x4_t) __builtin_neon_vrndiq_v((int8x16_t)__p0, 41); | 36331 | int16x8_t __s0_171 = __p0_171; \ |
| 35175 | return __ret; | 36332 | int16x8_t __s1_171 = __p1_171; \ |
| 35176 | } | 36333 | int16x4_t __s2_171 = __p2_171; \ |
| | 36334 | __ret_171 = vqrdmlshq_s16(__s0_171, __s1_171, splatq_lane_s16(__s2_171, __p3_171)); \ |
| | 36335 | __ret_171; \ |
| | 36336 | }) |
| 35177 | #else | 36337 | #else |
| 35178 | __ai float32x4_t vrndiq_f32(float32x4_t __p0) { | 36338 | #define vqrdmlshq_lane_s16(__p0_172, __p1_172, __p2_172, __p3_172) __extension__ ({ \ |
| 35179 | float32x4_t __ret; | 36339 | int16x8_t __ret_172; \ |
| 35180 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36340 | int16x8_t __s0_172 = __p0_172; \ |
| 35181 | __ret = (float32x4_t) __builtin_neon_vrndiq_v((int8x16_t)__rev0, 41); | 36341 | int16x8_t __s1_172 = __p1_172; \ |
| 35182 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36342 | int16x4_t __s2_172 = __p2_172; \ |
| 35183 | return __ret; | 36343 | int16x8_t __rev0_172; __rev0_172 = __builtin_shufflevector(__s0_172, __s0_172, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 35184 | } | 36344 | int16x8_t __rev1_172; __rev1_172 = __builtin_shufflevector(__s1_172, __s1_172, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 36345 | int16x4_t __rev2_172; __rev2_172 = __builtin_shufflevector(__s2_172, __s2_172, 3, 2, 1, 0); \ |
| | 36346 | __ret_172 = __noswap_vqrdmlshq_s16(__rev0_172, __rev1_172, __noswap_splatq_lane_s16(__rev2_172, __p3_172)); \ |
| | 36347 | __ret_172 = __builtin_shufflevector(__ret_172, __ret_172, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 36348 | __ret_172; \ |
| | 36349 | }) |
| 35185 | #endif | 36350 | #endif |
| 35186 | | 36351 | |
| 35187 | #ifdef __LITTLE_ENDIAN__ | 36352 | #ifdef __LITTLE_ENDIAN__ |
| 35188 | __ai float32x2_t vrndi_f32(float32x2_t __p0) { | 36353 | #define vqrdmlsh_lane_s32(__p0_173, __p1_173, __p2_173, __p3_173) __extension__ ({ \ |
| 35189 | float32x2_t __ret; | 36354 | int32x2_t __ret_173; \ |
| 35190 | __ret = (float32x2_t) __builtin_neon_vrndi_v((int8x8_t)__p0, 9); | 36355 | int32x2_t __s0_173 = __p0_173; \ |
| 35191 | return __ret; | 36356 | int32x2_t __s1_173 = __p1_173; \ |
| 35192 | } | 36357 | int32x2_t __s2_173 = __p2_173; \ |
| | 36358 | __ret_173 = vqrdmlsh_s32(__s0_173, __s1_173, splat_lane_s32(__s2_173, __p3_173)); \ |
| | 36359 | __ret_173; \ |
| | 36360 | }) |
| 35193 | #else | 36361 | #else |
| 35194 | __ai float32x2_t vrndi_f32(float32x2_t __p0) { | 36362 | #define vqrdmlsh_lane_s32(__p0_174, __p1_174, __p2_174, __p3_174) __extension__ ({ \ |
| 35195 | float32x2_t __ret; | 36363 | int32x2_t __ret_174; \ |
| 35196 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 36364 | int32x2_t __s0_174 = __p0_174; \ |
| 35197 | __ret = (float32x2_t) __builtin_neon_vrndi_v((int8x8_t)__rev0, 9); | 36365 | int32x2_t __s1_174 = __p1_174; \ |
| 35198 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 36366 | int32x2_t __s2_174 = __p2_174; \ |
| 35199 | return __ret; | 36367 | int32x2_t __rev0_174; __rev0_174 = __builtin_shufflevector(__s0_174, __s0_174, 1, 0); \ |
| 35200 | } | 36368 | int32x2_t __rev1_174; __rev1_174 = __builtin_shufflevector(__s1_174, __s1_174, 1, 0); \ |
| | 36369 | int32x2_t __rev2_174; __rev2_174 = __builtin_shufflevector(__s2_174, __s2_174, 1, 0); \ |
| | 36370 | __ret_174 = __noswap_vqrdmlsh_s32(__rev0_174, __rev1_174, __noswap_splat_lane_s32(__rev2_174, __p3_174)); \ |
| | 36371 | __ret_174 = __builtin_shufflevector(__ret_174, __ret_174, 1, 0); \ |
| | 36372 | __ret_174; \ |
| | 36373 | }) |
| 35201 | #endif | 36374 | #endif |
| 35202 | | 36375 | |
| 35203 | #ifdef __LITTLE_ENDIAN__ | 36376 | #ifdef __LITTLE_ENDIAN__ |
| 35204 | __ai float32x4_t vrndmq_f32(float32x4_t __p0) { | 36377 | #define vqrdmlsh_lane_s16(__p0_175, __p1_175, __p2_175, __p3_175) __extension__ ({ \ |
| 35205 | float32x4_t __ret; | 36378 | int16x4_t __ret_175; \ |
| 35206 | __ret = (float32x4_t) __builtin_neon_vrndmq_v((int8x16_t)__p0, 41); | 36379 | int16x4_t __s0_175 = __p0_175; \ |
| 35207 | return __ret; | 36380 | int16x4_t __s1_175 = __p1_175; \ |
| 35208 | } | 36381 | int16x4_t __s2_175 = __p2_175; \ |
| | 36382 | __ret_175 = vqrdmlsh_s16(__s0_175, __s1_175, splat_lane_s16(__s2_175, __p3_175)); \ |
| | 36383 | __ret_175; \ |
| | 36384 | }) |
| 35209 | #else | 36385 | #else |
| 35210 | __ai float32x4_t vrndmq_f32(float32x4_t __p0) { | 36386 | #define vqrdmlsh_lane_s16(__p0_176, __p1_176, __p2_176, __p3_176) __extension__ ({ \ |
| 35211 | float32x4_t __ret; | 36387 | int16x4_t __ret_176; \ |
| 35212 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36388 | int16x4_t __s0_176 = __p0_176; \ |
| 35213 | __ret = (float32x4_t) __builtin_neon_vrndmq_v((int8x16_t)__rev0, 41); | 36389 | int16x4_t __s1_176 = __p1_176; \ |
| 35214 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36390 | int16x4_t __s2_176 = __p2_176; \ |
| 35215 | return __ret; | 36391 | int16x4_t __rev0_176; __rev0_176 = __builtin_shufflevector(__s0_176, __s0_176, 3, 2, 1, 0); \ |
| 35216 | } | 36392 | int16x4_t __rev1_176; __rev1_176 = __builtin_shufflevector(__s1_176, __s1_176, 3, 2, 1, 0); \ |
| | 36393 | int16x4_t __rev2_176; __rev2_176 = __builtin_shufflevector(__s2_176, __s2_176, 3, 2, 1, 0); \ |
| | 36394 | __ret_176 = __noswap_vqrdmlsh_s16(__rev0_176, __rev1_176, __noswap_splat_lane_s16(__rev2_176, __p3_176)); \ |
| | 36395 | __ret_176 = __builtin_shufflevector(__ret_176, __ret_176, 3, 2, 1, 0); \ |
| | 36396 | __ret_176; \ |
| | 36397 | }) |
| 35217 | #endif | 36398 | #endif |
| 35218 | | 36399 | |
| 35219 | #ifdef __LITTLE_ENDIAN__ | 36400 | #ifdef __LITTLE_ENDIAN__ |
| 35220 | __ai float32x2_t vrndm_f32(float32x2_t __p0) { | 36401 | __ai __attribute__((target("v8.3a"))) float32x2_t vcadd_rot270_f32(float32x2_t __p0, float32x2_t __p1) { |
| 35221 | float32x2_t __ret; | 36402 | float32x2_t __ret; |
| 35222 | __ret = (float32x2_t) __builtin_neon_vrndm_v((int8x8_t)__p0, 9); | 36403 | __ret = (float32x2_t) __builtin_neon_vcadd_rot270_f32((int8x8_t)__p0, (int8x8_t)__p1, 9); |
| 35223 | return __ret; | 36404 | return __ret; |
| 35224 | } | 36405 | } |
| 35225 | #else | 36406 | #else |
| 35226 | __ai float32x2_t vrndm_f32(float32x2_t __p0) { | 36407 | __ai __attribute__((target("v8.3a"))) float32x2_t vcadd_rot270_f32(float32x2_t __p0, float32x2_t __p1) { |
| 35227 | float32x2_t __ret; | 36408 | float32x2_t __ret; |
| 35228 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 36409 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 35229 | __ret = (float32x2_t) __builtin_neon_vrndm_v((int8x8_t)__rev0, 9); | 36410 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 36411 | __ret = (float32x2_t) __builtin_neon_vcadd_rot270_f32((int8x8_t)__rev0, (int8x8_t)__rev1, 9); |
| 35230 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 36412 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 35231 | return __ret; | 36413 | return __ret; |
| 35232 | } | 36414 | } |
| 35233 | #endif | 36415 | #endif |
| 35234 | | 36416 | |
| 35235 | #ifdef __LITTLE_ENDIAN__ | 36417 | #ifdef __LITTLE_ENDIAN__ |
| 35236 | __ai float32x4_t vrndnq_f32(float32x4_t __p0) { | 36418 | __ai __attribute__((target("v8.3a"))) float32x2_t vcadd_rot90_f32(float32x2_t __p0, float32x2_t __p1) { |
| 35237 | float32x4_t __ret; | | |
| 35238 | __ret = (float32x4_t) __builtin_neon_vrndnq_v((int8x16_t)__p0, 41); | | |
| 35239 | return __ret; | | |
| 35240 | } | | |
| 35241 | #else | | |
| 35242 | __ai float32x4_t vrndnq_f32(float32x4_t __p0) { | | |
| 35243 | float32x4_t __ret; | | |
| 35244 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 35245 | __ret = (float32x4_t) __builtin_neon_vrndnq_v((int8x16_t)__rev0, 41); | | |
| 35246 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 35247 | return __ret; | | |
| 35248 | } | | |
| 35249 | #endif | | |
| 35250 | | | |
| 35251 | #ifdef __LITTLE_ENDIAN__ | | |
| 35252 | __ai float32x2_t vrndn_f32(float32x2_t __p0) { | | |
| 35253 | float32x2_t __ret; | 36419 | float32x2_t __ret; |
| 35254 | __ret = (float32x2_t) __builtin_neon_vrndn_v((int8x8_t)__p0, 9); | 36420 | __ret = (float32x2_t) __builtin_neon_vcadd_rot90_f32((int8x8_t)__p0, (int8x8_t)__p1, 9); |
| 35255 | return __ret; | 36421 | return __ret; |
| 35256 | } | 36422 | } |
| 35257 | #else | 36423 | #else |
| 35258 | __ai float32x2_t vrndn_f32(float32x2_t __p0) { | 36424 | __ai __attribute__((target("v8.3a"))) float32x2_t vcadd_rot90_f32(float32x2_t __p0, float32x2_t __p1) { |
| 35259 | float32x2_t __ret; | 36425 | float32x2_t __ret; |
| 35260 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 36426 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 35261 | __ret = (float32x2_t) __builtin_neon_vrndn_v((int8x8_t)__rev0, 9); | 36427 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 36428 | __ret = (float32x2_t) __builtin_neon_vcadd_rot90_f32((int8x8_t)__rev0, (int8x8_t)__rev1, 9); |
| 35262 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 36429 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 35263 | return __ret; | 36430 | return __ret; |
| 35264 | } | 36431 | } |
| 35265 | #endif | 36432 | #endif |
| 35266 | | 36433 | |
| 35267 | __ai float32_t vrndns_f32(float32_t __p0) { | | |
| 35268 | float32_t __ret; | | |
| 35269 | __ret = (float32_t) __builtin_neon_vrndns_f32(__p0); | | |
| 35270 | return __ret; | | |
| 35271 | } | | |
| 35272 | #ifdef __LITTLE_ENDIAN__ | 36434 | #ifdef __LITTLE_ENDIAN__ |
| 35273 | __ai float32x4_t vrndpq_f32(float32x4_t __p0) { | 36435 | __ai __attribute__((target("v8.3a"))) float32x4_t vcaddq_rot270_f32(float32x4_t __p0, float32x4_t __p1) { |
| 35274 | float32x4_t __ret; | 36436 | float32x4_t __ret; |
| 35275 | __ret = (float32x4_t) __builtin_neon_vrndpq_v((int8x16_t)__p0, 41); | 36437 | __ret = (float32x4_t) __builtin_neon_vcaddq_rot270_f32((int8x16_t)__p0, (int8x16_t)__p1, 41); |
| 35276 | return __ret; | 36438 | return __ret; |
| 35277 | } | 36439 | } |
| 35278 | #else | 36440 | #else |
| 35279 | __ai float32x4_t vrndpq_f32(float32x4_t __p0) { | 36441 | __ai __attribute__((target("v8.3a"))) float32x4_t vcaddq_rot270_f32(float32x4_t __p0, float32x4_t __p1) { |
| 35280 | float32x4_t __ret; | 36442 | float32x4_t __ret; |
| 35281 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36443 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 35282 | __ret = (float32x4_t) __builtin_neon_vrndpq_v((int8x16_t)__rev0, 41); | 36444 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 36445 | __ret = (float32x4_t) __builtin_neon_vcaddq_rot270_f32((int8x16_t)__rev0, (int8x16_t)__rev1, 41); |
| 35283 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36446 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 35284 | return __ret; | 36447 | return __ret; |
| 35285 | } | 36448 | } |
| 35286 | #endif | 36449 | #endif |
| 35287 | | 36450 | |
| 35288 | #ifdef __LITTLE_ENDIAN__ | 36451 | #ifdef __LITTLE_ENDIAN__ |
| 35289 | __ai float32x2_t vrndp_f32(float32x2_t __p0) { | 36452 | __ai __attribute__((target("v8.3a"))) float32x4_t vcaddq_rot90_f32(float32x4_t __p0, float32x4_t __p1) { |
| 35290 | float32x2_t __ret; | 36453 | float32x4_t __ret; |
| 35291 | __ret = (float32x2_t) __builtin_neon_vrndp_v((int8x8_t)__p0, 9); | 36454 | __ret = (float32x4_t) __builtin_neon_vcaddq_rot90_f32((int8x16_t)__p0, (int8x16_t)__p1, 41); |
| 35292 | return __ret; | 36455 | return __ret; |
| 35293 | } | 36456 | } |
| 35294 | #else | 36457 | #else |
| 35295 | __ai float32x2_t vrndp_f32(float32x2_t __p0) { | 36458 | __ai __attribute__((target("v8.3a"))) float32x4_t vcaddq_rot90_f32(float32x4_t __p0, float32x4_t __p1) { |
| 35296 | float32x2_t __ret; | 36459 | float32x4_t __ret; |
| 35297 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 36460 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 35298 | __ret = (float32x2_t) __builtin_neon_vrndp_v((int8x8_t)__rev0, 9); | 36461 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 35299 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 36462 | __ret = (float32x4_t) __builtin_neon_vcaddq_rot90_f32((int8x16_t)__rev0, (int8x16_t)__rev1, 41); |
| | 36463 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 35300 | return __ret; | 36464 | return __ret; |
| 35301 | } | 36465 | } |
| 35302 | #endif | 36466 | #endif |
| 35303 | | 36467 | |
| 35304 | #ifdef __LITTLE_ENDIAN__ | 36468 | #ifdef __LITTLE_ENDIAN__ |
| 35305 | __ai float32x4_t vrndxq_f32(float32x4_t __p0) { | 36469 | __ai __attribute__((target("v8.3a"))) float32x4_t vcmlaq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 35306 | float32x4_t __ret; | 36470 | float32x4_t __ret; |
| 35307 | __ret = (float32x4_t) __builtin_neon_vrndxq_v((int8x16_t)__p0, 41); | 36471 | __ret = (float32x4_t) __builtin_neon_vcmlaq_f32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 35308 | return __ret; | 36472 | return __ret; |
| 35309 | } | 36473 | } |
| 35310 | #else | 36474 | #else |
| 35311 | __ai float32x4_t vrndxq_f32(float32x4_t __p0) { | 36475 | __ai __attribute__((target("v8.3a"))) float32x4_t vcmlaq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 35312 | float32x4_t __ret; | 36476 | float32x4_t __ret; |
| 35313 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36477 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 35314 | __ret = (float32x4_t) __builtin_neon_vrndxq_v((int8x16_t)__rev0, 41); | 36478 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 36479 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 36480 | __ret = (float32x4_t) __builtin_neon_vcmlaq_f32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); |
| 35315 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36481 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 35316 | return __ret; | 36482 | return __ret; |
| 35317 | } | 36483 | } |
| | 36484 | __ai __attribute__((target("v8.3a"))) float32x4_t __noswap_vcmlaq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| | 36485 | float32x4_t __ret; |
| | 36486 | __ret = (float32x4_t) __builtin_neon_vcmlaq_f32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| | 36487 | return __ret; |
| | 36488 | } |
| 35318 | #endif | 36489 | #endif |
| 35319 | | 36490 | |
| 35320 | #ifdef __LITTLE_ENDIAN__ | 36491 | #ifdef __LITTLE_ENDIAN__ |
| 35321 | __ai float32x2_t vrndx_f32(float32x2_t __p0) { | 36492 | __ai __attribute__((target("v8.3a"))) float32x2_t vcmla_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 35322 | float32x2_t __ret; | 36493 | float32x2_t __ret; |
| 35323 | __ret = (float32x2_t) __builtin_neon_vrndx_v((int8x8_t)__p0, 9); | 36494 | __ret = (float32x2_t) __builtin_neon_vcmla_f32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 35324 | return __ret; | 36495 | return __ret; |
| 35325 | } | 36496 | } |
| 35326 | #else | 36497 | #else |
| 35327 | __ai float32x2_t vrndx_f32(float32x2_t __p0) { | 36498 | __ai __attribute__((target("v8.3a"))) float32x2_t vcmla_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 35328 | float32x2_t __ret; | 36499 | float32x2_t __ret; |
| 35329 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 36500 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 35330 | __ret = (float32x2_t) __builtin_neon_vrndx_v((int8x8_t)__rev0, 9); | 36501 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 36502 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 36503 | __ret = (float32x2_t) __builtin_neon_vcmla_f32((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); |
| 35331 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 36504 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 35332 | return __ret; | 36505 | return __ret; |
| 35333 | } | 36506 | } |
| 35334 | #endif | 36507 | __ai __attribute__((target("v8.3a"))) float32x2_t __noswap_vcmla_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 35335 | | 36508 | float32x2_t __ret; |
| 35336 | #endif | 36509 | __ret = (float32x2_t) __builtin_neon_vcmla_f32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 35337 | #if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_DIRECTED_ROUNDING) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) | | |
| 35338 | #ifdef __LITTLE_ENDIAN__ | | |
| 35339 | __ai float16x8_t vrndq_f16(float16x8_t __p0) { | | |
| 35340 | float16x8_t __ret; | | |
| 35341 | __ret = (float16x8_t) __builtin_neon_vrndq_v((int8x16_t)__p0, 40); | | |
| 35342 | return __ret; | | |
| 35343 | } | | |
| 35344 | #else | | |
| 35345 | __ai float16x8_t vrndq_f16(float16x8_t __p0) { | | |
| 35346 | float16x8_t __ret; | | |
| 35347 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 35348 | __ret = (float16x8_t) __builtin_neon_vrndq_v((int8x16_t)__rev0, 40); | | |
| 35349 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 35350 | return __ret; | 36510 | return __ret; |
| 35351 | } | 36511 | } |
| 35352 | #endif | 36512 | #endif |
| 35353 | | 36513 | |
| 35354 | #ifdef __LITTLE_ENDIAN__ | 36514 | #ifdef __LITTLE_ENDIAN__ |
| 35355 | __ai float16x4_t vrnd_f16(float16x4_t __p0) { | 36515 | #define vcmla_lane_f32(__p0_177, __p1_177, __p2_177, __p3_177) __extension__ ({ \ |
| 35356 | float16x4_t __ret; | 36516 | float32x2_t __ret_177; \ |
| 35357 | __ret = (float16x4_t) __builtin_neon_vrnd_v((int8x8_t)__p0, 8); | 36517 | float32x2_t __s0_177 = __p0_177; \ |
| 35358 | return __ret; | 36518 | float32x2_t __s1_177 = __p1_177; \ |
| 35359 | } | 36519 | float32x2_t __s2_177 = __p2_177; \ |
| | 36520 | float32x2_t __reint_177 = __s2_177; \ |
| | 36521 | uint64x1_t __reint1_177 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_177, __p3_177)}; \ |
| | 36522 | __ret_177 = vcmla_f32(__s0_177, __s1_177, *(float32x2_t *) &__reint1_177); \ |
| | 36523 | __ret_177; \ |
| | 36524 | }) |
| 35360 | #else | 36525 | #else |
| 35361 | __ai float16x4_t vrnd_f16(float16x4_t __p0) { | 36526 | #define vcmla_lane_f32(__p0_178, __p1_178, __p2_178, __p3_178) __extension__ ({ \ |
| 35362 | float16x4_t __ret; | 36527 | float32x2_t __ret_178; \ |
| 35363 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36528 | float32x2_t __s0_178 = __p0_178; \ |
| 35364 | __ret = (float16x4_t) __builtin_neon_vrnd_v((int8x8_t)__rev0, 8); | 36529 | float32x2_t __s1_178 = __p1_178; \ |
| 35365 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36530 | float32x2_t __s2_178 = __p2_178; \ |
| 35366 | return __ret; | 36531 | float32x2_t __rev0_178; __rev0_178 = __builtin_shufflevector(__s0_178, __s0_178, 1, 0); \ |
| 35367 | } | 36532 | float32x2_t __rev1_178; __rev1_178 = __builtin_shufflevector(__s1_178, __s1_178, 1, 0); \ |
| | 36533 | float32x2_t __rev2_178; __rev2_178 = __builtin_shufflevector(__s2_178, __s2_178, 1, 0); \ |
| | 36534 | float32x2_t __reint_178 = __rev2_178; \ |
| | 36535 | uint64x1_t __reint1_178 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_178, __p3_178)}; \ |
| | 36536 | __ret_178 = __noswap_vcmla_f32(__rev0_178, __rev1_178, *(float32x2_t *) &__reint1_178); \ |
| | 36537 | __ret_178 = __builtin_shufflevector(__ret_178, __ret_178, 1, 0); \ |
| | 36538 | __ret_178; \ |
| | 36539 | }) |
| 35368 | #endif | 36540 | #endif |
| 35369 | | 36541 | |
| 35370 | #ifdef __LITTLE_ENDIAN__ | 36542 | #ifdef __LITTLE_ENDIAN__ |
| 35371 | __ai float16x8_t vrndaq_f16(float16x8_t __p0) { | 36543 | #define vcmlaq_lane_f32(__p0_179, __p1_179, __p2_179, __p3_179) __extension__ ({ \ |
| 35372 | float16x8_t __ret; | 36544 | float32x4_t __ret_179; \ |
| 35373 | __ret = (float16x8_t) __builtin_neon_vrndaq_v((int8x16_t)__p0, 40); | 36545 | float32x4_t __s0_179 = __p0_179; \ |
| 35374 | return __ret; | 36546 | float32x4_t __s1_179 = __p1_179; \ |
| 35375 | } | 36547 | float32x2_t __s2_179 = __p2_179; \ |
| | 36548 | float32x2_t __reint_179 = __s2_179; \ |
| | 36549 | uint64x2_t __reint1_179 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_179, __p3_179), vget_lane_u64(*(uint64x1_t *) &__reint_179, __p3_179)}; \ |
| | 36550 | __ret_179 = vcmlaq_f32(__s0_179, __s1_179, *(float32x4_t *) &__reint1_179); \ |
| | 36551 | __ret_179; \ |
| | 36552 | }) |
| 35376 | #else | 36553 | #else |
| 35377 | __ai float16x8_t vrndaq_f16(float16x8_t __p0) { | 36554 | #define vcmlaq_lane_f32(__p0_180, __p1_180, __p2_180, __p3_180) __extension__ ({ \ |
| 35378 | float16x8_t __ret; | 36555 | float32x4_t __ret_180; \ |
| 35379 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 36556 | float32x4_t __s0_180 = __p0_180; \ |
| 35380 | __ret = (float16x8_t) __builtin_neon_vrndaq_v((int8x16_t)__rev0, 40); | 36557 | float32x4_t __s1_180 = __p1_180; \ |
| 35381 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 36558 | float32x2_t __s2_180 = __p2_180; \ |
| 35382 | return __ret; | 36559 | float32x4_t __rev0_180; __rev0_180 = __builtin_shufflevector(__s0_180, __s0_180, 3, 2, 1, 0); \ |
| 35383 | } | 36560 | float32x4_t __rev1_180; __rev1_180 = __builtin_shufflevector(__s1_180, __s1_180, 3, 2, 1, 0); \ |
| | 36561 | float32x2_t __rev2_180; __rev2_180 = __builtin_shufflevector(__s2_180, __s2_180, 1, 0); \ |
| | 36562 | float32x2_t __reint_180 = __rev2_180; \ |
| | 36563 | uint64x2_t __reint1_180 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_180, __p3_180), vget_lane_u64(*(uint64x1_t *) &__reint_180, __p3_180)}; \ |
| | 36564 | __ret_180 = __noswap_vcmlaq_f32(__rev0_180, __rev1_180, *(float32x4_t *) &__reint1_180); \ |
| | 36565 | __ret_180 = __builtin_shufflevector(__ret_180, __ret_180, 3, 2, 1, 0); \ |
| | 36566 | __ret_180; \ |
| | 36567 | }) |
| 35384 | #endif | 36568 | #endif |
| 35385 | | 36569 | |
| 35386 | #ifdef __LITTLE_ENDIAN__ | 36570 | #ifdef __LITTLE_ENDIAN__ |
| 35387 | __ai float16x4_t vrnda_f16(float16x4_t __p0) { | 36571 | #define vcmla_laneq_f32(__p0_181, __p1_181, __p2_181, __p3_181) __extension__ ({ \ |
| 35388 | float16x4_t __ret; | 36572 | float32x2_t __ret_181; \ |
| 35389 | __ret = (float16x4_t) __builtin_neon_vrnda_v((int8x8_t)__p0, 8); | 36573 | float32x2_t __s0_181 = __p0_181; \ |
| 35390 | return __ret; | 36574 | float32x2_t __s1_181 = __p1_181; \ |
| 35391 | } | 36575 | float32x4_t __s2_181 = __p2_181; \ |
| | 36576 | float32x4_t __reint_181 = __s2_181; \ |
| | 36577 | uint64x1_t __reint1_181 = (uint64x1_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_181, __p3_181)}; \ |
| | 36578 | __ret_181 = vcmla_f32(__s0_181, __s1_181, *(float32x2_t *) &__reint1_181); \ |
| | 36579 | __ret_181; \ |
| | 36580 | }) |
| 35392 | #else | 36581 | #else |
| 35393 | __ai float16x4_t vrnda_f16(float16x4_t __p0) { | 36582 | #define vcmla_laneq_f32(__p0_182, __p1_182, __p2_182, __p3_182) __extension__ ({ \ |
| 35394 | float16x4_t __ret; | 36583 | float32x2_t __ret_182; \ |
| 35395 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36584 | float32x2_t __s0_182 = __p0_182; \ |
| 35396 | __ret = (float16x4_t) __builtin_neon_vrnda_v((int8x8_t)__rev0, 8); | 36585 | float32x2_t __s1_182 = __p1_182; \ |
| 35397 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36586 | float32x4_t __s2_182 = __p2_182; \ |
| 35398 | return __ret; | 36587 | float32x2_t __rev0_182; __rev0_182 = __builtin_shufflevector(__s0_182, __s0_182, 1, 0); \ |
| 35399 | } | 36588 | float32x2_t __rev1_182; __rev1_182 = __builtin_shufflevector(__s1_182, __s1_182, 1, 0); \ |
| | 36589 | float32x4_t __rev2_182; __rev2_182 = __builtin_shufflevector(__s2_182, __s2_182, 3, 2, 1, 0); \ |
| | 36590 | float32x4_t __reint_182 = __rev2_182; \ |
| | 36591 | uint64x1_t __reint1_182 = (uint64x1_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_182, __p3_182)}; \ |
| | 36592 | __ret_182 = __noswap_vcmla_f32(__rev0_182, __rev1_182, *(float32x2_t *) &__reint1_182); \ |
| | 36593 | __ret_182 = __builtin_shufflevector(__ret_182, __ret_182, 1, 0); \ |
| | 36594 | __ret_182; \ |
| | 36595 | }) |
| 35400 | #endif | 36596 | #endif |
| 35401 | | 36597 | |
| 35402 | #ifdef __LITTLE_ENDIAN__ | 36598 | #ifdef __LITTLE_ENDIAN__ |
| 35403 | __ai float16x8_t vrndmq_f16(float16x8_t __p0) { | 36599 | #define vcmlaq_laneq_f32(__p0_183, __p1_183, __p2_183, __p3_183) __extension__ ({ \ |
| 35404 | float16x8_t __ret; | 36600 | float32x4_t __ret_183; \ |
| 35405 | __ret = (float16x8_t) __builtin_neon_vrndmq_v((int8x16_t)__p0, 40); | 36601 | float32x4_t __s0_183 = __p0_183; \ |
| 35406 | return __ret; | 36602 | float32x4_t __s1_183 = __p1_183; \ |
| 35407 | } | 36603 | float32x4_t __s2_183 = __p2_183; \ |
| | 36604 | float32x4_t __reint_183 = __s2_183; \ |
| | 36605 | uint64x2_t __reint1_183 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_183, __p3_183), vgetq_lane_u64(*(uint64x2_t *) &__reint_183, __p3_183)}; \ |
| | 36606 | __ret_183 = vcmlaq_f32(__s0_183, __s1_183, *(float32x4_t *) &__reint1_183); \ |
| | 36607 | __ret_183; \ |
| | 36608 | }) |
| 35408 | #else | 36609 | #else |
| 35409 | __ai float16x8_t vrndmq_f16(float16x8_t __p0) { | 36610 | #define vcmlaq_laneq_f32(__p0_184, __p1_184, __p2_184, __p3_184) __extension__ ({ \ |
| 35410 | float16x8_t __ret; | 36611 | float32x4_t __ret_184; \ |
| 35411 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 36612 | float32x4_t __s0_184 = __p0_184; \ |
| 35412 | __ret = (float16x8_t) __builtin_neon_vrndmq_v((int8x16_t)__rev0, 40); | 36613 | float32x4_t __s1_184 = __p1_184; \ |
| 35413 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 36614 | float32x4_t __s2_184 = __p2_184; \ |
| 35414 | return __ret; | 36615 | float32x4_t __rev0_184; __rev0_184 = __builtin_shufflevector(__s0_184, __s0_184, 3, 2, 1, 0); \ |
| 35415 | } | 36616 | float32x4_t __rev1_184; __rev1_184 = __builtin_shufflevector(__s1_184, __s1_184, 3, 2, 1, 0); \ |
| | 36617 | float32x4_t __rev2_184; __rev2_184 = __builtin_shufflevector(__s2_184, __s2_184, 3, 2, 1, 0); \ |
| | 36618 | float32x4_t __reint_184 = __rev2_184; \ |
| | 36619 | uint64x2_t __reint1_184 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_184, __p3_184), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_184, __p3_184)}; \ |
| | 36620 | __ret_184 = __noswap_vcmlaq_f32(__rev0_184, __rev1_184, *(float32x4_t *) &__reint1_184); \ |
| | 36621 | __ret_184 = __builtin_shufflevector(__ret_184, __ret_184, 3, 2, 1, 0); \ |
| | 36622 | __ret_184; \ |
| | 36623 | }) |
| 35416 | #endif | 36624 | #endif |
| 35417 | | 36625 | |
| 35418 | #ifdef __LITTLE_ENDIAN__ | 36626 | #ifdef __LITTLE_ENDIAN__ |
| 35419 | __ai float16x4_t vrndm_f16(float16x4_t __p0) { | 36627 | __ai __attribute__((target("v8.3a"))) float32x4_t vcmlaq_rot180_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 35420 | float16x4_t __ret; | 36628 | float32x4_t __ret; |
| 35421 | __ret = (float16x4_t) __builtin_neon_vrndm_v((int8x8_t)__p0, 8); | 36629 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot180_f32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 35422 | return __ret; | 36630 | return __ret; |
| 35423 | } | 36631 | } |
| 35424 | #else | 36632 | #else |
| 35425 | __ai float16x4_t vrndm_f16(float16x4_t __p0) { | 36633 | __ai __attribute__((target("v8.3a"))) float32x4_t vcmlaq_rot180_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 35426 | float16x4_t __ret; | 36634 | float32x4_t __ret; |
| 35427 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36635 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 35428 | __ret = (float16x4_t) __builtin_neon_vrndm_v((int8x8_t)__rev0, 8); | 36636 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 36637 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 36638 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot180_f32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); |
| 35429 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36639 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 35430 | return __ret; | 36640 | return __ret; |
| 35431 | } | 36641 | } |
| 35432 | #endif | 36642 | __ai __attribute__((target("v8.3a"))) float32x4_t __noswap_vcmlaq_rot180_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 35433 | | 36643 | float32x4_t __ret; |
| 35434 | #ifdef __LITTLE_ENDIAN__ | 36644 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot180_f32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 35435 | __ai float16x8_t vrndnq_f16(float16x8_t __p0) { | | |
| 35436 | float16x8_t __ret; | | |
| 35437 | __ret = (float16x8_t) __builtin_neon_vrndnq_v((int8x16_t)__p0, 40); | | |
| 35438 | return __ret; | | |
| 35439 | } | | |
| 35440 | #else | | |
| 35441 | __ai float16x8_t vrndnq_f16(float16x8_t __p0) { | | |
| 35442 | float16x8_t __ret; | | |
| 35443 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 35444 | __ret = (float16x8_t) __builtin_neon_vrndnq_v((int8x16_t)__rev0, 40); | | |
| 35445 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 35446 | return __ret; | 36645 | return __ret; |
| 35447 | } | 36646 | } |
| 35448 | #endif | 36647 | #endif |
| 35449 | | 36648 | |
| 35450 | #ifdef __LITTLE_ENDIAN__ | 36649 | #ifdef __LITTLE_ENDIAN__ |
| 35451 | __ai float16x4_t vrndn_f16(float16x4_t __p0) { | 36650 | __ai __attribute__((target("v8.3a"))) float32x2_t vcmla_rot180_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 35452 | float16x4_t __ret; | 36651 | float32x2_t __ret; |
| 35453 | __ret = (float16x4_t) __builtin_neon_vrndn_v((int8x8_t)__p0, 8); | 36652 | __ret = (float32x2_t) __builtin_neon_vcmla_rot180_f32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 35454 | return __ret; | 36653 | return __ret; |
| 35455 | } | 36654 | } |
| 35456 | #else | 36655 | #else |
| 35457 | __ai float16x4_t vrndn_f16(float16x4_t __p0) { | 36656 | __ai __attribute__((target("v8.3a"))) float32x2_t vcmla_rot180_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 35458 | float16x4_t __ret; | 36657 | float32x2_t __ret; |
| 35459 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36658 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 35460 | __ret = (float16x4_t) __builtin_neon_vrndn_v((int8x8_t)__rev0, 8); | 36659 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 35461 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36660 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 36661 | __ret = (float32x2_t) __builtin_neon_vcmla_rot180_f32((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); |
| | 36662 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 36663 | return __ret; |
| | 36664 | } |
| | 36665 | __ai __attribute__((target("v8.3a"))) float32x2_t __noswap_vcmla_rot180_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| | 36666 | float32x2_t __ret; |
| | 36667 | __ret = (float32x2_t) __builtin_neon_vcmla_rot180_f32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 35462 | return __ret; | 36668 | return __ret; |
| 35463 | } | 36669 | } |
| 35464 | #endif | 36670 | #endif |
| 35465 | | 36671 | |
| 35466 | #ifdef __LITTLE_ENDIAN__ | 36672 | #ifdef __LITTLE_ENDIAN__ |
| 35467 | __ai float16x8_t vrndpq_f16(float16x8_t __p0) { | 36673 | #define vcmla_rot180_lane_f32(__p0_185, __p1_185, __p2_185, __p3_185) __extension__ ({ \ |
| 35468 | float16x8_t __ret; | 36674 | float32x2_t __ret_185; \ |
| 35469 | __ret = (float16x8_t) __builtin_neon_vrndpq_v((int8x16_t)__p0, 40); | 36675 | float32x2_t __s0_185 = __p0_185; \ |
| 35470 | return __ret; | 36676 | float32x2_t __s1_185 = __p1_185; \ |
| 35471 | } | 36677 | float32x2_t __s2_185 = __p2_185; \ |
| | 36678 | float32x2_t __reint_185 = __s2_185; \ |
| | 36679 | uint64x1_t __reint1_185 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_185, __p3_185)}; \ |
| | 36680 | __ret_185 = vcmla_rot180_f32(__s0_185, __s1_185, *(float32x2_t *) &__reint1_185); \ |
| | 36681 | __ret_185; \ |
| | 36682 | }) |
| 35472 | #else | 36683 | #else |
| 35473 | __ai float16x8_t vrndpq_f16(float16x8_t __p0) { | 36684 | #define vcmla_rot180_lane_f32(__p0_186, __p1_186, __p2_186, __p3_186) __extension__ ({ \ |
| 35474 | float16x8_t __ret; | 36685 | float32x2_t __ret_186; \ |
| 35475 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 36686 | float32x2_t __s0_186 = __p0_186; \ |
| 35476 | __ret = (float16x8_t) __builtin_neon_vrndpq_v((int8x16_t)__rev0, 40); | 36687 | float32x2_t __s1_186 = __p1_186; \ |
| 35477 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 36688 | float32x2_t __s2_186 = __p2_186; \ |
| 35478 | return __ret; | 36689 | float32x2_t __rev0_186; __rev0_186 = __builtin_shufflevector(__s0_186, __s0_186, 1, 0); \ |
| 35479 | } | 36690 | float32x2_t __rev1_186; __rev1_186 = __builtin_shufflevector(__s1_186, __s1_186, 1, 0); \ |
| | 36691 | float32x2_t __rev2_186; __rev2_186 = __builtin_shufflevector(__s2_186, __s2_186, 1, 0); \ |
| | 36692 | float32x2_t __reint_186 = __rev2_186; \ |
| | 36693 | uint64x1_t __reint1_186 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_186, __p3_186)}; \ |
| | 36694 | __ret_186 = __noswap_vcmla_rot180_f32(__rev0_186, __rev1_186, *(float32x2_t *) &__reint1_186); \ |
| | 36695 | __ret_186 = __builtin_shufflevector(__ret_186, __ret_186, 1, 0); \ |
| | 36696 | __ret_186; \ |
| | 36697 | }) |
| 35480 | #endif | 36698 | #endif |
| 35481 | | 36699 | |
| 35482 | #ifdef __LITTLE_ENDIAN__ | 36700 | #ifdef __LITTLE_ENDIAN__ |
| 35483 | __ai float16x4_t vrndp_f16(float16x4_t __p0) { | 36701 | #define vcmlaq_rot180_lane_f32(__p0_187, __p1_187, __p2_187, __p3_187) __extension__ ({ \ |
| 35484 | float16x4_t __ret; | 36702 | float32x4_t __ret_187; \ |
| 35485 | __ret = (float16x4_t) __builtin_neon_vrndp_v((int8x8_t)__p0, 8); | 36703 | float32x4_t __s0_187 = __p0_187; \ |
| 35486 | return __ret; | 36704 | float32x4_t __s1_187 = __p1_187; \ |
| 35487 | } | 36705 | float32x2_t __s2_187 = __p2_187; \ |
| | 36706 | float32x2_t __reint_187 = __s2_187; \ |
| | 36707 | uint64x2_t __reint1_187 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_187, __p3_187), vget_lane_u64(*(uint64x1_t *) &__reint_187, __p3_187)}; \ |
| | 36708 | __ret_187 = vcmlaq_rot180_f32(__s0_187, __s1_187, *(float32x4_t *) &__reint1_187); \ |
| | 36709 | __ret_187; \ |
| | 36710 | }) |
| 35488 | #else | 36711 | #else |
| 35489 | __ai float16x4_t vrndp_f16(float16x4_t __p0) { | 36712 | #define vcmlaq_rot180_lane_f32(__p0_188, __p1_188, __p2_188, __p3_188) __extension__ ({ \ |
| 35490 | float16x4_t __ret; | 36713 | float32x4_t __ret_188; \ |
| 35491 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36714 | float32x4_t __s0_188 = __p0_188; \ |
| 35492 | __ret = (float16x4_t) __builtin_neon_vrndp_v((int8x8_t)__rev0, 8); | 36715 | float32x4_t __s1_188 = __p1_188; \ |
| 35493 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36716 | float32x2_t __s2_188 = __p2_188; \ |
| 35494 | return __ret; | 36717 | float32x4_t __rev0_188; __rev0_188 = __builtin_shufflevector(__s0_188, __s0_188, 3, 2, 1, 0); \ |
| 35495 | } | 36718 | float32x4_t __rev1_188; __rev1_188 = __builtin_shufflevector(__s1_188, __s1_188, 3, 2, 1, 0); \ |
| | 36719 | float32x2_t __rev2_188; __rev2_188 = __builtin_shufflevector(__s2_188, __s2_188, 1, 0); \ |
| | 36720 | float32x2_t __reint_188 = __rev2_188; \ |
| | 36721 | uint64x2_t __reint1_188 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_188, __p3_188), vget_lane_u64(*(uint64x1_t *) &__reint_188, __p3_188)}; \ |
| | 36722 | __ret_188 = __noswap_vcmlaq_rot180_f32(__rev0_188, __rev1_188, *(float32x4_t *) &__reint1_188); \ |
| | 36723 | __ret_188 = __builtin_shufflevector(__ret_188, __ret_188, 3, 2, 1, 0); \ |
| | 36724 | __ret_188; \ |
| | 36725 | }) |
| 35496 | #endif | 36726 | #endif |
| 35497 | | 36727 | |
| 35498 | #ifdef __LITTLE_ENDIAN__ | 36728 | #ifdef __LITTLE_ENDIAN__ |
| 35499 | __ai float16x8_t vrndxq_f16(float16x8_t __p0) { | 36729 | #define vcmla_rot180_laneq_f32(__p0_189, __p1_189, __p2_189, __p3_189) __extension__ ({ \ |
| 35500 | float16x8_t __ret; | 36730 | float32x2_t __ret_189; \ |
| 35501 | __ret = (float16x8_t) __builtin_neon_vrndxq_v((int8x16_t)__p0, 40); | 36731 | float32x2_t __s0_189 = __p0_189; \ |
| 35502 | return __ret; | 36732 | float32x2_t __s1_189 = __p1_189; \ |
| 35503 | } | 36733 | float32x4_t __s2_189 = __p2_189; \ |
| | 36734 | float32x4_t __reint_189 = __s2_189; \ |
| | 36735 | uint64x1_t __reint1_189 = (uint64x1_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_189, __p3_189)}; \ |
| | 36736 | __ret_189 = vcmla_rot180_f32(__s0_189, __s1_189, *(float32x2_t *) &__reint1_189); \ |
| | 36737 | __ret_189; \ |
| | 36738 | }) |
| 35504 | #else | 36739 | #else |
| 35505 | __ai float16x8_t vrndxq_f16(float16x8_t __p0) { | 36740 | #define vcmla_rot180_laneq_f32(__p0_190, __p1_190, __p2_190, __p3_190) __extension__ ({ \ |
| 35506 | float16x8_t __ret; | 36741 | float32x2_t __ret_190; \ |
| 35507 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 36742 | float32x2_t __s0_190 = __p0_190; \ |
| 35508 | __ret = (float16x8_t) __builtin_neon_vrndxq_v((int8x16_t)__rev0, 40); | 36743 | float32x2_t __s1_190 = __p1_190; \ |
| 35509 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 36744 | float32x4_t __s2_190 = __p2_190; \ |
| 35510 | return __ret; | 36745 | float32x2_t __rev0_190; __rev0_190 = __builtin_shufflevector(__s0_190, __s0_190, 1, 0); \ |
| 35511 | } | 36746 | float32x2_t __rev1_190; __rev1_190 = __builtin_shufflevector(__s1_190, __s1_190, 1, 0); \ |
| | 36747 | float32x4_t __rev2_190; __rev2_190 = __builtin_shufflevector(__s2_190, __s2_190, 3, 2, 1, 0); \ |
| | 36748 | float32x4_t __reint_190 = __rev2_190; \ |
| | 36749 | uint64x1_t __reint1_190 = (uint64x1_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_190, __p3_190)}; \ |
| | 36750 | __ret_190 = __noswap_vcmla_rot180_f32(__rev0_190, __rev1_190, *(float32x2_t *) &__reint1_190); \ |
| | 36751 | __ret_190 = __builtin_shufflevector(__ret_190, __ret_190, 1, 0); \ |
| | 36752 | __ret_190; \ |
| | 36753 | }) |
| 35512 | #endif | 36754 | #endif |
| 35513 | | 36755 | |
| 35514 | #ifdef __LITTLE_ENDIAN__ | 36756 | #ifdef __LITTLE_ENDIAN__ |
| 35515 | __ai float16x4_t vrndx_f16(float16x4_t __p0) { | 36757 | #define vcmlaq_rot180_laneq_f32(__p0_191, __p1_191, __p2_191, __p3_191) __extension__ ({ \ |
| 35516 | float16x4_t __ret; | 36758 | float32x4_t __ret_191; \ |
| 35517 | __ret = (float16x4_t) __builtin_neon_vrndx_v((int8x8_t)__p0, 8); | 36759 | float32x4_t __s0_191 = __p0_191; \ |
| 35518 | return __ret; | 36760 | float32x4_t __s1_191 = __p1_191; \ |
| 35519 | } | 36761 | float32x4_t __s2_191 = __p2_191; \ |
| | 36762 | float32x4_t __reint_191 = __s2_191; \ |
| | 36763 | uint64x2_t __reint1_191 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_191, __p3_191), vgetq_lane_u64(*(uint64x2_t *) &__reint_191, __p3_191)}; \ |
| | 36764 | __ret_191 = vcmlaq_rot180_f32(__s0_191, __s1_191, *(float32x4_t *) &__reint1_191); \ |
| | 36765 | __ret_191; \ |
| | 36766 | }) |
| 35520 | #else | 36767 | #else |
| 35521 | __ai float16x4_t vrndx_f16(float16x4_t __p0) { | 36768 | #define vcmlaq_rot180_laneq_f32(__p0_192, __p1_192, __p2_192, __p3_192) __extension__ ({ \ |
| 35522 | float16x4_t __ret; | 36769 | float32x4_t __ret_192; \ |
| 35523 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36770 | float32x4_t __s0_192 = __p0_192; \ |
| 35524 | __ret = (float16x4_t) __builtin_neon_vrndx_v((int8x8_t)__rev0, 8); | 36771 | float32x4_t __s1_192 = __p1_192; \ |
| 35525 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36772 | float32x4_t __s2_192 = __p2_192; \ |
| 35526 | return __ret; | 36773 | float32x4_t __rev0_192; __rev0_192 = __builtin_shufflevector(__s0_192, __s0_192, 3, 2, 1, 0); \ |
| 35527 | } | 36774 | float32x4_t __rev1_192; __rev1_192 = __builtin_shufflevector(__s1_192, __s1_192, 3, 2, 1, 0); \ |
| | 36775 | float32x4_t __rev2_192; __rev2_192 = __builtin_shufflevector(__s2_192, __s2_192, 3, 2, 1, 0); \ |
| | 36776 | float32x4_t __reint_192 = __rev2_192; \ |
| | 36777 | uint64x2_t __reint1_192 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_192, __p3_192), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_192, __p3_192)}; \ |
| | 36778 | __ret_192 = __noswap_vcmlaq_rot180_f32(__rev0_192, __rev1_192, *(float32x4_t *) &__reint1_192); \ |
| | 36779 | __ret_192 = __builtin_shufflevector(__ret_192, __ret_192, 3, 2, 1, 0); \ |
| | 36780 | __ret_192; \ |
| | 36781 | }) |
| 35528 | #endif | 36782 | #endif |
| 35529 | | 36783 | |
| 35530 | #endif | | |
| 35531 | #if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_NUMERIC_MAXMIN) | | |
| 35532 | #ifdef __LITTLE_ENDIAN__ | 36784 | #ifdef __LITTLE_ENDIAN__ |
| 35533 | __ai float32x4_t vmaxnmq_f32(float32x4_t __p0, float32x4_t __p1) { | 36785 | __ai __attribute__((target("v8.3a"))) float32x4_t vcmlaq_rot270_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 35534 | float32x4_t __ret; | 36786 | float32x4_t __ret; |
| 35535 | __ret = (float32x4_t) __builtin_neon_vmaxnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); | 36787 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot270_f32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 35536 | return __ret; | 36788 | return __ret; |
| 35537 | } | 36789 | } |
| 35538 | #else | 36790 | #else |
| 35539 | __ai float32x4_t vmaxnmq_f32(float32x4_t __p0, float32x4_t __p1) { | 36791 | __ai __attribute__((target("v8.3a"))) float32x4_t vcmlaq_rot270_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 35540 | float32x4_t __ret; | 36792 | float32x4_t __ret; |
| 35541 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36793 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 35542 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 36794 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 35543 | __ret = (float32x4_t) __builtin_neon_vmaxnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); | 36795 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 36796 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot270_f32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); |
| 35544 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36797 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 35545 | return __ret; | 36798 | return __ret; |
| 35546 | } | 36799 | } |
| | 36800 | __ai __attribute__((target("v8.3a"))) float32x4_t __noswap_vcmlaq_rot270_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| | 36801 | float32x4_t __ret; |
| | 36802 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot270_f32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| | 36803 | return __ret; |
| | 36804 | } |
| 35547 | #endif | 36805 | #endif |
| 35548 | | 36806 | |
| 35549 | #ifdef __LITTLE_ENDIAN__ | 36807 | #ifdef __LITTLE_ENDIAN__ |
| 35550 | __ai float32x2_t vmaxnm_f32(float32x2_t __p0, float32x2_t __p1) { | 36808 | __ai __attribute__((target("v8.3a"))) float32x2_t vcmla_rot270_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 35551 | float32x2_t __ret; | 36809 | float32x2_t __ret; |
| 35552 | __ret = (float32x2_t) __builtin_neon_vmaxnm_v((int8x8_t)__p0, (int8x8_t)__p1, 9); | 36810 | __ret = (float32x2_t) __builtin_neon_vcmla_rot270_f32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 35553 | return __ret; | 36811 | return __ret; |
| 35554 | } | 36812 | } |
| 35555 | #else | 36813 | #else |
| 35556 | __ai float32x2_t vmaxnm_f32(float32x2_t __p0, float32x2_t __p1) { | 36814 | __ai __attribute__((target("v8.3a"))) float32x2_t vcmla_rot270_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 35557 | float32x2_t __ret; | 36815 | float32x2_t __ret; |
| 35558 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 36816 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 35559 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 36817 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 35560 | __ret = (float32x2_t) __builtin_neon_vmaxnm_v((int8x8_t)__rev0, (int8x8_t)__rev1, 9); | 36818 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 36819 | __ret = (float32x2_t) __builtin_neon_vcmla_rot270_f32((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); |
| 35561 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 36820 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 35562 | return __ret; | 36821 | return __ret; |
| 35563 | } | 36822 | } |
| 35564 | #endif | 36823 | __ai __attribute__((target("v8.3a"))) float32x2_t __noswap_vcmla_rot270_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 35565 | | 36824 | float32x2_t __ret; |
| 35566 | #ifdef __LITTLE_ENDIAN__ | 36825 | __ret = (float32x2_t) __builtin_neon_vcmla_rot270_f32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 35567 | __ai float32x4_t vminnmq_f32(float32x4_t __p0, float32x4_t __p1) { | | |
| 35568 | float32x4_t __ret; | | |
| 35569 | __ret = (float32x4_t) __builtin_neon_vminnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); | | |
| 35570 | return __ret; | | |
| 35571 | } | | |
| 35572 | #else | | |
| 35573 | __ai float32x4_t vminnmq_f32(float32x4_t __p0, float32x4_t __p1) { | | |
| 35574 | float32x4_t __ret; | | |
| 35575 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 35576 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 35577 | __ret = (float32x4_t) __builtin_neon_vminnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); | | |
| 35578 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 35579 | return __ret; | 36826 | return __ret; |
| 35580 | } | 36827 | } |
| 35581 | #endif | 36828 | #endif |
| 35582 | | 36829 | |
| 35583 | #ifdef __LITTLE_ENDIAN__ | 36830 | #ifdef __LITTLE_ENDIAN__ |
| 35584 | __ai float32x2_t vminnm_f32(float32x2_t __p0, float32x2_t __p1) { | 36831 | #define vcmla_rot270_lane_f32(__p0_193, __p1_193, __p2_193, __p3_193) __extension__ ({ \ |
| 35585 | float32x2_t __ret; | 36832 | float32x2_t __ret_193; \ |
| 35586 | __ret = (float32x2_t) __builtin_neon_vminnm_v((int8x8_t)__p0, (int8x8_t)__p1, 9); | 36833 | float32x2_t __s0_193 = __p0_193; \ |
| 35587 | return __ret; | 36834 | float32x2_t __s1_193 = __p1_193; \ |
| 35588 | } | 36835 | float32x2_t __s2_193 = __p2_193; \ |
| | 36836 | float32x2_t __reint_193 = __s2_193; \ |
| | 36837 | uint64x1_t __reint1_193 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_193, __p3_193)}; \ |
| | 36838 | __ret_193 = vcmla_rot270_f32(__s0_193, __s1_193, *(float32x2_t *) &__reint1_193); \ |
| | 36839 | __ret_193; \ |
| | 36840 | }) |
| 35589 | #else | 36841 | #else |
| 35590 | __ai float32x2_t vminnm_f32(float32x2_t __p0, float32x2_t __p1) { | 36842 | #define vcmla_rot270_lane_f32(__p0_194, __p1_194, __p2_194, __p3_194) __extension__ ({ \ |
| 35591 | float32x2_t __ret; | 36843 | float32x2_t __ret_194; \ |
| 35592 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 36844 | float32x2_t __s0_194 = __p0_194; \ |
| 35593 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 36845 | float32x2_t __s1_194 = __p1_194; \ |
| 35594 | __ret = (float32x2_t) __builtin_neon_vminnm_v((int8x8_t)__rev0, (int8x8_t)__rev1, 9); | 36846 | float32x2_t __s2_194 = __p2_194; \ |
| 35595 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 36847 | float32x2_t __rev0_194; __rev0_194 = __builtin_shufflevector(__s0_194, __s0_194, 1, 0); \ |
| 35596 | return __ret; | 36848 | float32x2_t __rev1_194; __rev1_194 = __builtin_shufflevector(__s1_194, __s1_194, 1, 0); \ |
| 35597 | } | 36849 | float32x2_t __rev2_194; __rev2_194 = __builtin_shufflevector(__s2_194, __s2_194, 1, 0); \ |
| | 36850 | float32x2_t __reint_194 = __rev2_194; \ |
| | 36851 | uint64x1_t __reint1_194 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_194, __p3_194)}; \ |
| | 36852 | __ret_194 = __noswap_vcmla_rot270_f32(__rev0_194, __rev1_194, *(float32x2_t *) &__reint1_194); \ |
| | 36853 | __ret_194 = __builtin_shufflevector(__ret_194, __ret_194, 1, 0); \ |
| | 36854 | __ret_194; \ |
| | 36855 | }) |
| 35598 | #endif | 36856 | #endif |
| 35599 | | 36857 | |
| 35600 | #endif | | |
| 35601 | #if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_NUMERIC_MAXMIN) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) | | |
| 35602 | #ifdef __LITTLE_ENDIAN__ | 36858 | #ifdef __LITTLE_ENDIAN__ |
| 35603 | __ai float16x8_t vmaxnmq_f16(float16x8_t __p0, float16x8_t __p1) { | 36859 | #define vcmlaq_rot270_lane_f32(__p0_195, __p1_195, __p2_195, __p3_195) __extension__ ({ \ |
| 35604 | float16x8_t __ret; | 36860 | float32x4_t __ret_195; \ |
| 35605 | __ret = (float16x8_t) __builtin_neon_vmaxnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | 36861 | float32x4_t __s0_195 = __p0_195; \ |
| 35606 | return __ret; | 36862 | float32x4_t __s1_195 = __p1_195; \ |
| 35607 | } | 36863 | float32x2_t __s2_195 = __p2_195; \ |
| | 36864 | float32x2_t __reint_195 = __s2_195; \ |
| | 36865 | uint64x2_t __reint1_195 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_195, __p3_195), vget_lane_u64(*(uint64x1_t *) &__reint_195, __p3_195)}; \ |
| | 36866 | __ret_195 = vcmlaq_rot270_f32(__s0_195, __s1_195, *(float32x4_t *) &__reint1_195); \ |
| | 36867 | __ret_195; \ |
| | 36868 | }) |
| 35608 | #else | 36869 | #else |
| 35609 | __ai float16x8_t vmaxnmq_f16(float16x8_t __p0, float16x8_t __p1) { | 36870 | #define vcmlaq_rot270_lane_f32(__p0_196, __p1_196, __p2_196, __p3_196) __extension__ ({ \ |
| 35610 | float16x8_t __ret; | 36871 | float32x4_t __ret_196; \ |
| 35611 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 36872 | float32x4_t __s0_196 = __p0_196; \ |
| 35612 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 36873 | float32x4_t __s1_196 = __p1_196; \ |
| 35613 | __ret = (float16x8_t) __builtin_neon_vmaxnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 36874 | float32x2_t __s2_196 = __p2_196; \ |
| 35614 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 36875 | float32x4_t __rev0_196; __rev0_196 = __builtin_shufflevector(__s0_196, __s0_196, 3, 2, 1, 0); \ |
| 35615 | return __ret; | 36876 | float32x4_t __rev1_196; __rev1_196 = __builtin_shufflevector(__s1_196, __s1_196, 3, 2, 1, 0); \ |
| 35616 | } | 36877 | float32x2_t __rev2_196; __rev2_196 = __builtin_shufflevector(__s2_196, __s2_196, 1, 0); \ |
| | 36878 | float32x2_t __reint_196 = __rev2_196; \ |
| | 36879 | uint64x2_t __reint1_196 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_196, __p3_196), vget_lane_u64(*(uint64x1_t *) &__reint_196, __p3_196)}; \ |
| | 36880 | __ret_196 = __noswap_vcmlaq_rot270_f32(__rev0_196, __rev1_196, *(float32x4_t *) &__reint1_196); \ |
| | 36881 | __ret_196 = __builtin_shufflevector(__ret_196, __ret_196, 3, 2, 1, 0); \ |
| | 36882 | __ret_196; \ |
| | 36883 | }) |
| 35617 | #endif | 36884 | #endif |
| 35618 | | 36885 | |
| 35619 | #ifdef __LITTLE_ENDIAN__ | 36886 | #ifdef __LITTLE_ENDIAN__ |
| 35620 | __ai float16x4_t vmaxnm_f16(float16x4_t __p0, float16x4_t __p1) { | 36887 | #define vcmla_rot270_laneq_f32(__p0_197, __p1_197, __p2_197, __p3_197) __extension__ ({ \ |
| 35621 | float16x4_t __ret; | 36888 | float32x2_t __ret_197; \ |
| 35622 | __ret = (float16x4_t) __builtin_neon_vmaxnm_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | 36889 | float32x2_t __s0_197 = __p0_197; \ |
| 35623 | return __ret; | 36890 | float32x2_t __s1_197 = __p1_197; \ |
| 35624 | } | 36891 | float32x4_t __s2_197 = __p2_197; \ |
| | 36892 | float32x4_t __reint_197 = __s2_197; \ |
| | 36893 | uint64x1_t __reint1_197 = (uint64x1_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_197, __p3_197)}; \ |
| | 36894 | __ret_197 = vcmla_rot270_f32(__s0_197, __s1_197, *(float32x2_t *) &__reint1_197); \ |
| | 36895 | __ret_197; \ |
| | 36896 | }) |
| 35625 | #else | 36897 | #else |
| 35626 | __ai float16x4_t vmaxnm_f16(float16x4_t __p0, float16x4_t __p1) { | 36898 | #define vcmla_rot270_laneq_f32(__p0_198, __p1_198, __p2_198, __p3_198) __extension__ ({ \ |
| 35627 | float16x4_t __ret; | 36899 | float32x2_t __ret_198; \ |
| 35628 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36900 | float32x2_t __s0_198 = __p0_198; \ |
| 35629 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 36901 | float32x2_t __s1_198 = __p1_198; \ |
| 35630 | __ret = (float16x4_t) __builtin_neon_vmaxnm_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); | 36902 | float32x4_t __s2_198 = __p2_198; \ |
| 35631 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36903 | float32x2_t __rev0_198; __rev0_198 = __builtin_shufflevector(__s0_198, __s0_198, 1, 0); \ |
| 35632 | return __ret; | 36904 | float32x2_t __rev1_198; __rev1_198 = __builtin_shufflevector(__s1_198, __s1_198, 1, 0); \ |
| 35633 | } | 36905 | float32x4_t __rev2_198; __rev2_198 = __builtin_shufflevector(__s2_198, __s2_198, 3, 2, 1, 0); \ |
| | 36906 | float32x4_t __reint_198 = __rev2_198; \ |
| | 36907 | uint64x1_t __reint1_198 = (uint64x1_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_198, __p3_198)}; \ |
| | 36908 | __ret_198 = __noswap_vcmla_rot270_f32(__rev0_198, __rev1_198, *(float32x2_t *) &__reint1_198); \ |
| | 36909 | __ret_198 = __builtin_shufflevector(__ret_198, __ret_198, 1, 0); \ |
| | 36910 | __ret_198; \ |
| | 36911 | }) |
| 35634 | #endif | 36912 | #endif |
| 35635 | | 36913 | |
| 35636 | #ifdef __LITTLE_ENDIAN__ | 36914 | #ifdef __LITTLE_ENDIAN__ |
| 35637 | __ai float16x8_t vminnmq_f16(float16x8_t __p0, float16x8_t __p1) { | 36915 | #define vcmlaq_rot270_laneq_f32(__p0_199, __p1_199, __p2_199, __p3_199) __extension__ ({ \ |
| 35638 | float16x8_t __ret; | 36916 | float32x4_t __ret_199; \ |
| 35639 | __ret = (float16x8_t) __builtin_neon_vminnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | 36917 | float32x4_t __s0_199 = __p0_199; \ |
| 35640 | return __ret; | 36918 | float32x4_t __s1_199 = __p1_199; \ |
| 35641 | } | 36919 | float32x4_t __s2_199 = __p2_199; \ |
| | 36920 | float32x4_t __reint_199 = __s2_199; \ |
| | 36921 | uint64x2_t __reint1_199 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_199, __p3_199), vgetq_lane_u64(*(uint64x2_t *) &__reint_199, __p3_199)}; \ |
| | 36922 | __ret_199 = vcmlaq_rot270_f32(__s0_199, __s1_199, *(float32x4_t *) &__reint1_199); \ |
| | 36923 | __ret_199; \ |
| | 36924 | }) |
| 35642 | #else | 36925 | #else |
| 35643 | __ai float16x8_t vminnmq_f16(float16x8_t __p0, float16x8_t __p1) { | 36926 | #define vcmlaq_rot270_laneq_f32(__p0_200, __p1_200, __p2_200, __p3_200) __extension__ ({ \ |
| 35644 | float16x8_t __ret; | 36927 | float32x4_t __ret_200; \ |
| 35645 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 36928 | float32x4_t __s0_200 = __p0_200; \ |
| 35646 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 36929 | float32x4_t __s1_200 = __p1_200; \ |
| 35647 | __ret = (float16x8_t) __builtin_neon_vminnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 36930 | float32x4_t __s2_200 = __p2_200; \ |
| 35648 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 36931 | float32x4_t __rev0_200; __rev0_200 = __builtin_shufflevector(__s0_200, __s0_200, 3, 2, 1, 0); \ |
| 35649 | return __ret; | 36932 | float32x4_t __rev1_200; __rev1_200 = __builtin_shufflevector(__s1_200, __s1_200, 3, 2, 1, 0); \ |
| 35650 | } | 36933 | float32x4_t __rev2_200; __rev2_200 = __builtin_shufflevector(__s2_200, __s2_200, 3, 2, 1, 0); \ |
| | 36934 | float32x4_t __reint_200 = __rev2_200; \ |
| | 36935 | uint64x2_t __reint1_200 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_200, __p3_200), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_200, __p3_200)}; \ |
| | 36936 | __ret_200 = __noswap_vcmlaq_rot270_f32(__rev0_200, __rev1_200, *(float32x4_t *) &__reint1_200); \ |
| | 36937 | __ret_200 = __builtin_shufflevector(__ret_200, __ret_200, 3, 2, 1, 0); \ |
| | 36938 | __ret_200; \ |
| | 36939 | }) |
| 35651 | #endif | 36940 | #endif |
| 35652 | | 36941 | |
| 35653 | #ifdef __LITTLE_ENDIAN__ | 36942 | #ifdef __LITTLE_ENDIAN__ |
| 35654 | __ai float16x4_t vminnm_f16(float16x4_t __p0, float16x4_t __p1) { | 36943 | __ai __attribute__((target("v8.3a"))) float32x4_t vcmlaq_rot90_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 35655 | float16x4_t __ret; | 36944 | float32x4_t __ret; |
| 35656 | __ret = (float16x4_t) __builtin_neon_vminnm_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | 36945 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot90_f32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 35657 | return __ret; | 36946 | return __ret; |
| 35658 | } | 36947 | } |
| 35659 | #else | 36948 | #else |
| 35660 | __ai float16x4_t vminnm_f16(float16x4_t __p0, float16x4_t __p1) { | 36949 | __ai __attribute__((target("v8.3a"))) float32x4_t vcmlaq_rot90_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 35661 | float16x4_t __ret; | 36950 | float32x4_t __ret; |
| 35662 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36951 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 35663 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 36952 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 35664 | __ret = (float16x4_t) __builtin_neon_vminnm_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); | 36953 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 36954 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot90_f32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); |
| 35665 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36955 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 35666 | return __ret; | 36956 | return __ret; |
| 35667 | } | 36957 | } |
| | 36958 | __ai __attribute__((target("v8.3a"))) float32x4_t __noswap_vcmlaq_rot90_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| | 36959 | float32x4_t __ret; |
| | 36960 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot90_f32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| | 36961 | return __ret; |
| | 36962 | } |
| 35668 | #endif | 36963 | #endif |
| 35669 | | 36964 | |
| 35670 | #endif | | |
| 35671 | #if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_SHA2) | | |
| 35672 | #ifdef __LITTLE_ENDIAN__ | 36965 | #ifdef __LITTLE_ENDIAN__ |
| 35673 | __ai uint32x4_t vsha1cq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { | 36966 | __ai __attribute__((target("v8.3a"))) float32x2_t vcmla_rot90_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 35674 | uint32x4_t __ret; | 36967 | float32x2_t __ret; |
| 35675 | __ret = (uint32x4_t) __builtin_neon_vsha1cq_u32(__p0, __p1, __p2); | 36968 | __ret = (float32x2_t) __builtin_neon_vcmla_rot90_f32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 35676 | return __ret; | 36969 | return __ret; |
| 35677 | } | 36970 | } |
| 35678 | #else | 36971 | #else |
| 35679 | __ai uint32x4_t vsha1cq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { | 36972 | __ai __attribute__((target("v8.3a"))) float32x2_t vcmla_rot90_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 35680 | uint32x4_t __ret; | 36973 | float32x2_t __ret; |
| 35681 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 36974 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 35682 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 36975 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 35683 | __ret = (uint32x4_t) __builtin_neon_vsha1cq_u32(__rev0, __p1, __rev2); | 36976 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 35684 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 36977 | __ret = (float32x2_t) __builtin_neon_vcmla_rot90_f32((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); |
| | 36978 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 35685 | return __ret; | 36979 | return __ret; |
| 35686 | } | 36980 | } |
| 35687 | #endif | 36981 | __ai __attribute__((target("v8.3a"))) float32x2_t __noswap_vcmla_rot90_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 35688 | | 36982 | float32x2_t __ret; |
| 35689 | __ai uint32_t vsha1h_u32(uint32_t __p0) { | 36983 | __ret = (float32x2_t) __builtin_neon_vcmla_rot90_f32((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 35690 | uint32_t __ret; | | |
| 35691 | __ret = (uint32_t) __builtin_neon_vsha1h_u32(__p0); | | |
| 35692 | return __ret; | 36984 | return __ret; |
| 35693 | } | 36985 | } |
| | 36986 | #endif |
| | 36987 | |
| 35694 | #ifdef __LITTLE_ENDIAN__ | 36988 | #ifdef __LITTLE_ENDIAN__ |
| 35695 | __ai uint32x4_t vsha1mq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { | 36989 | #define vcmla_rot90_lane_f32(__p0_201, __p1_201, __p2_201, __p3_201) __extension__ ({ \ |
| 35696 | uint32x4_t __ret; | 36990 | float32x2_t __ret_201; \ |
| 35697 | __ret = (uint32x4_t) __builtin_neon_vsha1mq_u32(__p0, __p1, __p2); | 36991 | float32x2_t __s0_201 = __p0_201; \ |
| 35698 | return __ret; | 36992 | float32x2_t __s1_201 = __p1_201; \ |
| 35699 | } | 36993 | float32x2_t __s2_201 = __p2_201; \ |
| | 36994 | float32x2_t __reint_201 = __s2_201; \ |
| | 36995 | uint64x1_t __reint1_201 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_201, __p3_201)}; \ |
| | 36996 | __ret_201 = vcmla_rot90_f32(__s0_201, __s1_201, *(float32x2_t *) &__reint1_201); \ |
| | 36997 | __ret_201; \ |
| | 36998 | }) |
| 35700 | #else | 36999 | #else |
| 35701 | __ai uint32x4_t vsha1mq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { | 37000 | #define vcmla_rot90_lane_f32(__p0_202, __p1_202, __p2_202, __p3_202) __extension__ ({ \ |
| 35702 | uint32x4_t __ret; | 37001 | float32x2_t __ret_202; \ |
| 35703 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 37002 | float32x2_t __s0_202 = __p0_202; \ |
| 35704 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 37003 | float32x2_t __s1_202 = __p1_202; \ |
| 35705 | __ret = (uint32x4_t) __builtin_neon_vsha1mq_u32(__rev0, __p1, __rev2); | 37004 | float32x2_t __s2_202 = __p2_202; \ |
| 35706 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 37005 | float32x2_t __rev0_202; __rev0_202 = __builtin_shufflevector(__s0_202, __s0_202, 1, 0); \ |
| 35707 | return __ret; | 37006 | float32x2_t __rev1_202; __rev1_202 = __builtin_shufflevector(__s1_202, __s1_202, 1, 0); \ |
| 35708 | } | 37007 | float32x2_t __rev2_202; __rev2_202 = __builtin_shufflevector(__s2_202, __s2_202, 1, 0); \ |
| | 37008 | float32x2_t __reint_202 = __rev2_202; \ |
| | 37009 | uint64x1_t __reint1_202 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_202, __p3_202)}; \ |
| | 37010 | __ret_202 = __noswap_vcmla_rot90_f32(__rev0_202, __rev1_202, *(float32x2_t *) &__reint1_202); \ |
| | 37011 | __ret_202 = __builtin_shufflevector(__ret_202, __ret_202, 1, 0); \ |
| | 37012 | __ret_202; \ |
| | 37013 | }) |
| 35709 | #endif | 37014 | #endif |
| 35710 | | 37015 | |
| 35711 | #ifdef __LITTLE_ENDIAN__ | 37016 | #ifdef __LITTLE_ENDIAN__ |
| 35712 | __ai uint32x4_t vsha1pq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { | 37017 | #define vcmlaq_rot90_lane_f32(__p0_203, __p1_203, __p2_203, __p3_203) __extension__ ({ \ |
| 35713 | uint32x4_t __ret; | 37018 | float32x4_t __ret_203; \ |
| 35714 | __ret = (uint32x4_t) __builtin_neon_vsha1pq_u32(__p0, __p1, __p2); | 37019 | float32x4_t __s0_203 = __p0_203; \ |
| 35715 | return __ret; | 37020 | float32x4_t __s1_203 = __p1_203; \ |
| 35716 | } | 37021 | float32x2_t __s2_203 = __p2_203; \ |
| | 37022 | float32x2_t __reint_203 = __s2_203; \ |
| | 37023 | uint64x2_t __reint1_203 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_203, __p3_203), vget_lane_u64(*(uint64x1_t *) &__reint_203, __p3_203)}; \ |
| | 37024 | __ret_203 = vcmlaq_rot90_f32(__s0_203, __s1_203, *(float32x4_t *) &__reint1_203); \ |
| | 37025 | __ret_203; \ |
| | 37026 | }) |
| 35717 | #else | 37027 | #else |
| 35718 | __ai uint32x4_t vsha1pq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { | 37028 | #define vcmlaq_rot90_lane_f32(__p0_204, __p1_204, __p2_204, __p3_204) __extension__ ({ \ |
| 35719 | uint32x4_t __ret; | 37029 | float32x4_t __ret_204; \ |
| 35720 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 37030 | float32x4_t __s0_204 = __p0_204; \ |
| 35721 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 37031 | float32x4_t __s1_204 = __p1_204; \ |
| 35722 | __ret = (uint32x4_t) __builtin_neon_vsha1pq_u32(__rev0, __p1, __rev2); | 37032 | float32x2_t __s2_204 = __p2_204; \ |
| 35723 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 37033 | float32x4_t __rev0_204; __rev0_204 = __builtin_shufflevector(__s0_204, __s0_204, 3, 2, 1, 0); \ |
| 35724 | return __ret; | 37034 | float32x4_t __rev1_204; __rev1_204 = __builtin_shufflevector(__s1_204, __s1_204, 3, 2, 1, 0); \ |
| 35725 | } | 37035 | float32x2_t __rev2_204; __rev2_204 = __builtin_shufflevector(__s2_204, __s2_204, 1, 0); \ |
| | 37036 | float32x2_t __reint_204 = __rev2_204; \ |
| | 37037 | uint64x2_t __reint1_204 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_204, __p3_204), vget_lane_u64(*(uint64x1_t *) &__reint_204, __p3_204)}; \ |
| | 37038 | __ret_204 = __noswap_vcmlaq_rot90_f32(__rev0_204, __rev1_204, *(float32x4_t *) &__reint1_204); \ |
| | 37039 | __ret_204 = __builtin_shufflevector(__ret_204, __ret_204, 3, 2, 1, 0); \ |
| | 37040 | __ret_204; \ |
| | 37041 | }) |
| 35726 | #endif | 37042 | #endif |
| 35727 | | 37043 | |
| 35728 | #ifdef __LITTLE_ENDIAN__ | 37044 | #ifdef __LITTLE_ENDIAN__ |
| 35729 | __ai uint32x4_t vsha1su0q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 37045 | #define vcmla_rot90_laneq_f32(__p0_205, __p1_205, __p2_205, __p3_205) __extension__ ({ \ |
| 35730 | uint32x4_t __ret; | 37046 | float32x2_t __ret_205; \ |
| 35731 | __ret = (uint32x4_t) __builtin_neon_vsha1su0q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); | 37047 | float32x2_t __s0_205 = __p0_205; \ |
| 35732 | return __ret; | 37048 | float32x2_t __s1_205 = __p1_205; \ |
| 35733 | } | 37049 | float32x4_t __s2_205 = __p2_205; \ |
| | 37050 | float32x4_t __reint_205 = __s2_205; \ |
| | 37051 | uint64x1_t __reint1_205 = (uint64x1_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_205, __p3_205)}; \ |
| | 37052 | __ret_205 = vcmla_rot90_f32(__s0_205, __s1_205, *(float32x2_t *) &__reint1_205); \ |
| | 37053 | __ret_205; \ |
| | 37054 | }) |
| 35734 | #else | 37055 | #else |
| 35735 | __ai uint32x4_t vsha1su0q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 37056 | #define vcmla_rot90_laneq_f32(__p0_206, __p1_206, __p2_206, __p3_206) __extension__ ({ \ |
| 35736 | uint32x4_t __ret; | 37057 | float32x2_t __ret_206; \ |
| 35737 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 37058 | float32x2_t __s0_206 = __p0_206; \ |
| 35738 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 37059 | float32x2_t __s1_206 = __p1_206; \ |
| 35739 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 37060 | float32x4_t __s2_206 = __p2_206; \ |
| 35740 | __ret = (uint32x4_t) __builtin_neon_vsha1su0q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); | 37061 | float32x2_t __rev0_206; __rev0_206 = __builtin_shufflevector(__s0_206, __s0_206, 1, 0); \ |
| 35741 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 37062 | float32x2_t __rev1_206; __rev1_206 = __builtin_shufflevector(__s1_206, __s1_206, 1, 0); \ |
| 35742 | return __ret; | 37063 | float32x4_t __rev2_206; __rev2_206 = __builtin_shufflevector(__s2_206, __s2_206, 3, 2, 1, 0); \ |
| 35743 | } | 37064 | float32x4_t __reint_206 = __rev2_206; \ |
| | 37065 | uint64x1_t __reint1_206 = (uint64x1_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_206, __p3_206)}; \ |
| | 37066 | __ret_206 = __noswap_vcmla_rot90_f32(__rev0_206, __rev1_206, *(float32x2_t *) &__reint1_206); \ |
| | 37067 | __ret_206 = __builtin_shufflevector(__ret_206, __ret_206, 1, 0); \ |
| | 37068 | __ret_206; \ |
| | 37069 | }) |
| 35744 | #endif | 37070 | #endif |
| 35745 | | 37071 | |
| 35746 | #ifdef __LITTLE_ENDIAN__ | 37072 | #ifdef __LITTLE_ENDIAN__ |
| 35747 | __ai uint32x4_t vsha1su1q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 37073 | #define vcmlaq_rot90_laneq_f32(__p0_207, __p1_207, __p2_207, __p3_207) __extension__ ({ \ |
| 35748 | uint32x4_t __ret; | 37074 | float32x4_t __ret_207; \ |
| 35749 | __ret = (uint32x4_t) __builtin_neon_vsha1su1q_v((int8x16_t)__p0, (int8x16_t)__p1, 50); | 37075 | float32x4_t __s0_207 = __p0_207; \ |
| 35750 | return __ret; | 37076 | float32x4_t __s1_207 = __p1_207; \ |
| 35751 | } | 37077 | float32x4_t __s2_207 = __p2_207; \ |
| | 37078 | float32x4_t __reint_207 = __s2_207; \ |
| | 37079 | uint64x2_t __reint1_207 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_207, __p3_207), vgetq_lane_u64(*(uint64x2_t *) &__reint_207, __p3_207)}; \ |
| | 37080 | __ret_207 = vcmlaq_rot90_f32(__s0_207, __s1_207, *(float32x4_t *) &__reint1_207); \ |
| | 37081 | __ret_207; \ |
| | 37082 | }) |
| 35752 | #else | 37083 | #else |
| 35753 | __ai uint32x4_t vsha1su1q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 37084 | #define vcmlaq_rot90_laneq_f32(__p0_208, __p1_208, __p2_208, __p3_208) __extension__ ({ \ |
| 35754 | uint32x4_t __ret; | 37085 | float32x4_t __ret_208; \ |
| 35755 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 37086 | float32x4_t __s0_208 = __p0_208; \ |
| 35756 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 37087 | float32x4_t __s1_208 = __p1_208; \ |
| 35757 | __ret = (uint32x4_t) __builtin_neon_vsha1su1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50); | 37088 | float32x4_t __s2_208 = __p2_208; \ |
| 35758 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 37089 | float32x4_t __rev0_208; __rev0_208 = __builtin_shufflevector(__s0_208, __s0_208, 3, 2, 1, 0); \ |
| 35759 | return __ret; | 37090 | float32x4_t __rev1_208; __rev1_208 = __builtin_shufflevector(__s1_208, __s1_208, 3, 2, 1, 0); \ |
| 35760 | } | 37091 | float32x4_t __rev2_208; __rev2_208 = __builtin_shufflevector(__s2_208, __s2_208, 3, 2, 1, 0); \ |
| | 37092 | float32x4_t __reint_208 = __rev2_208; \ |
| | 37093 | uint64x2_t __reint1_208 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_208, __p3_208), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_208, __p3_208)}; \ |
| | 37094 | __ret_208 = __noswap_vcmlaq_rot90_f32(__rev0_208, __rev1_208, *(float32x4_t *) &__reint1_208); \ |
| | 37095 | __ret_208 = __builtin_shufflevector(__ret_208, __ret_208, 3, 2, 1, 0); \ |
| | 37096 | __ret_208; \ |
| | 37097 | }) |
| 35761 | #endif | 37098 | #endif |
| 35762 | | 37099 | |
| 35763 | #ifdef __LITTLE_ENDIAN__ | 37100 | #ifdef __LITTLE_ENDIAN__ |
| 35764 | __ai uint32x4_t vsha256hq_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 37101 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t vcadd_rot270_f16(float16x4_t __p0, float16x4_t __p1) { |
| 35765 | uint32x4_t __ret; | 37102 | float16x4_t __ret; |
| 35766 | __ret = (uint32x4_t) __builtin_neon_vsha256hq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); | 37103 | __ret = (float16x4_t) __builtin_neon_vcadd_rot270_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 35767 | return __ret; | 37104 | return __ret; |
| 35768 | } | 37105 | } |
| 35769 | #else | 37106 | #else |
| 35770 | __ai uint32x4_t vsha256hq_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 37107 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t vcadd_rot270_f16(float16x4_t __p0, float16x4_t __p1) { |
| 35771 | uint32x4_t __ret; | 37108 | float16x4_t __ret; |
| 35772 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 37109 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 35773 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 37110 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 35774 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 37111 | __ret = (float16x4_t) __builtin_neon_vcadd_rot270_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| 35775 | __ret = (uint32x4_t) __builtin_neon_vsha256hq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); | | |
| 35776 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 37112 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 35777 | return __ret; | 37113 | return __ret; |
| 35778 | } | 37114 | } |
| 35779 | #endif | 37115 | #endif |
| 35780 | | 37116 | |
| 35781 | #ifdef __LITTLE_ENDIAN__ | 37117 | #ifdef __LITTLE_ENDIAN__ |
| 35782 | __ai uint32x4_t vsha256h2q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 37118 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t vcadd_rot90_f16(float16x4_t __p0, float16x4_t __p1) { |
| 35783 | uint32x4_t __ret; | 37119 | float16x4_t __ret; |
| 35784 | __ret = (uint32x4_t) __builtin_neon_vsha256h2q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); | 37120 | __ret = (float16x4_t) __builtin_neon_vcadd_rot90_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 35785 | return __ret; | 37121 | return __ret; |
| 35786 | } | 37122 | } |
| 35787 | #else | 37123 | #else |
| 35788 | __ai uint32x4_t vsha256h2q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 37124 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t vcadd_rot90_f16(float16x4_t __p0, float16x4_t __p1) { |
| 35789 | uint32x4_t __ret; | 37125 | float16x4_t __ret; |
| 35790 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 37126 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 35791 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 37127 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 35792 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 37128 | __ret = (float16x4_t) __builtin_neon_vcadd_rot90_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| 35793 | __ret = (uint32x4_t) __builtin_neon_vsha256h2q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); | | |
| 35794 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 37129 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 35795 | return __ret; | 37130 | return __ret; |
| 35796 | } | 37131 | } |
| 35797 | #endif | 37132 | #endif |
| 35798 | | 37133 | |
| 35799 | #ifdef __LITTLE_ENDIAN__ | 37134 | #ifdef __LITTLE_ENDIAN__ |
| 35800 | __ai uint32x4_t vsha256su0q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 37135 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t vcaddq_rot270_f16(float16x8_t __p0, float16x8_t __p1) { |
| 35801 | uint32x4_t __ret; | 37136 | float16x8_t __ret; |
| 35802 | __ret = (uint32x4_t) __builtin_neon_vsha256su0q_v((int8x16_t)__p0, (int8x16_t)__p1, 50); | 37137 | __ret = (float16x8_t) __builtin_neon_vcaddq_rot270_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 35803 | return __ret; | 37138 | return __ret; |
| 35804 | } | 37139 | } |
| 35805 | #else | 37140 | #else |
| 35806 | __ai uint32x4_t vsha256su0q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 37141 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t vcaddq_rot270_f16(float16x8_t __p0, float16x8_t __p1) { |
| 35807 | uint32x4_t __ret; | 37142 | float16x8_t __ret; |
| 35808 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 37143 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 35809 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 37144 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 35810 | __ret = (uint32x4_t) __builtin_neon_vsha256su0q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50); | 37145 | __ret = (float16x8_t) __builtin_neon_vcaddq_rot270_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| 35811 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 37146 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 35812 | return __ret; | 37147 | return __ret; |
| 35813 | } | 37148 | } |
| 35814 | #endif | 37149 | #endif |
| 35815 | | 37150 | |
| 35816 | #ifdef __LITTLE_ENDIAN__ | 37151 | #ifdef __LITTLE_ENDIAN__ |
| 35817 | __ai uint32x4_t vsha256su1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 37152 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t vcaddq_rot90_f16(float16x8_t __p0, float16x8_t __p1) { |
| 35818 | uint32x4_t __ret; | 37153 | float16x8_t __ret; |
| 35819 | __ret = (uint32x4_t) __builtin_neon_vsha256su1q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); | 37154 | __ret = (float16x8_t) __builtin_neon_vcaddq_rot90_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 35820 | return __ret; | 37155 | return __ret; |
| 35821 | } | 37156 | } |
| 35822 | #else | 37157 | #else |
| 35823 | __ai uint32x4_t vsha256su1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 37158 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t vcaddq_rot90_f16(float16x8_t __p0, float16x8_t __p1) { |
| 35824 | uint32x4_t __ret; | 37159 | float16x8_t __ret; |
| 35825 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 37160 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 35826 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 37161 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 35827 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 37162 | __ret = (float16x8_t) __builtin_neon_vcaddq_rot90_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| 35828 | __ret = (uint32x4_t) __builtin_neon_vsha256su1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); | 37163 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 35829 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 35830 | return __ret; | 37164 | return __ret; |
| 35831 | } | 37165 | } |
| 35832 | #endif | 37166 | #endif |
| 35833 | | 37167 | |
| 35834 | #endif | | |
| 35835 | #if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_SHA3) && defined(__aarch64__) | | |
| 35836 | #ifdef __LITTLE_ENDIAN__ | 37168 | #ifdef __LITTLE_ENDIAN__ |
| 35837 | __ai uint8x16_t vbcaxq_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) { | 37169 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t vcmlaq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 35838 | uint8x16_t __ret; | 37170 | float16x8_t __ret; |
| 35839 | __ret = (uint8x16_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 48); | 37171 | __ret = (float16x8_t) __builtin_neon_vcmlaq_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); |
| 35840 | return __ret; | 37172 | return __ret; |
| 35841 | } | 37173 | } |
| 35842 | #else | 37174 | #else |
| 35843 | __ai uint8x16_t vbcaxq_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) { | 37175 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t vcmlaq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 35844 | uint8x16_t __ret; | 37176 | float16x8_t __ret; |
| 35845 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 37177 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 35846 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 37178 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 35847 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 37179 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 35848 | __ret = (uint8x16_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 48); | 37180 | __ret = (float16x8_t) __builtin_neon_vcmlaq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 40); |
| 35849 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 37181 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 37182 | return __ret; |
| | 37183 | } |
| | 37184 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t __noswap_vcmlaq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| | 37185 | float16x8_t __ret; |
| | 37186 | __ret = (float16x8_t) __builtin_neon_vcmlaq_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); |
| 35850 | return __ret; | 37187 | return __ret; |
| 35851 | } | 37188 | } |
| 35852 | #endif | 37189 | #endif |
| 35853 | | 37190 | |
| 35854 | #ifdef __LITTLE_ENDIAN__ | 37191 | #ifdef __LITTLE_ENDIAN__ |
| 35855 | __ai uint32x4_t vbcaxq_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 37192 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t vcmla_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 35856 | uint32x4_t __ret; | 37193 | float16x4_t __ret; |
| 35857 | __ret = (uint32x4_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); | 37194 | __ret = (float16x4_t) __builtin_neon_vcmla_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); |
| 35858 | return __ret; | 37195 | return __ret; |
| 35859 | } | 37196 | } |
| 35860 | #else | 37197 | #else |
| 35861 | __ai uint32x4_t vbcaxq_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 37198 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t vcmla_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 35862 | uint32x4_t __ret; | 37199 | float16x4_t __ret; |
| 35863 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 37200 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 35864 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 37201 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 35865 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 37202 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 35866 | __ret = (uint32x4_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); | 37203 | __ret = (float16x4_t) __builtin_neon_vcmla_f16((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 8); |
| 35867 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 37204 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 35868 | return __ret; | 37205 | return __ret; |
| 35869 | } | 37206 | } |
| 35870 | #endif | 37207 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t __noswap_vcmla_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 35871 | | 37208 | float16x4_t __ret; |
| 35872 | #ifdef __LITTLE_ENDIAN__ | 37209 | __ret = (float16x4_t) __builtin_neon_vcmla_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); |
| 35873 | __ai uint64x2_t vbcaxq_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | | |
| 35874 | uint64x2_t __ret; | | |
| 35875 | __ret = (uint64x2_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 51); | | |
| 35876 | return __ret; | | |
| 35877 | } | | |
| 35878 | #else | | |
| 35879 | __ai uint64x2_t vbcaxq_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | | |
| 35880 | uint64x2_t __ret; | | |
| 35881 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 35882 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 35883 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 35884 | __ret = (uint64x2_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 51); | | |
| 35885 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 35886 | return __ret; | 37210 | return __ret; |
| 35887 | } | 37211 | } |
| 35888 | #endif | 37212 | #endif |
| 35889 | | 37213 | |
| 35890 | #ifdef __LITTLE_ENDIAN__ | 37214 | #ifdef __LITTLE_ENDIAN__ |
| 35891 | __ai uint16x8_t vbcaxq_u16(uint16x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { | 37215 | #define vcmla_lane_f16(__p0_209, __p1_209, __p2_209, __p3_209) __extension__ ({ \ |
| 35892 | uint16x8_t __ret; | 37216 | float16x4_t __ret_209; \ |
| 35893 | __ret = (uint16x8_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 49); | 37217 | float16x4_t __s0_209 = __p0_209; \ |
| 35894 | return __ret; | 37218 | float16x4_t __s1_209 = __p1_209; \ |
| 35895 | } | 37219 | float16x4_t __s2_209 = __p2_209; \ |
| | 37220 | float16x4_t __reint_209 = __s2_209; \ |
| | 37221 | uint32x2_t __reint1_209 = (uint32x2_t) {vget_lane_u32(*(uint32x2_t *) &__reint_209, __p3_209), vget_lane_u32(*(uint32x2_t *) &__reint_209, __p3_209)}; \ |
| | 37222 | __ret_209 = vcmla_f16(__s0_209, __s1_209, *(float16x4_t *) &__reint1_209); \ |
| | 37223 | __ret_209; \ |
| | 37224 | }) |
| 35896 | #else | 37225 | #else |
| 35897 | __ai uint16x8_t vbcaxq_u16(uint16x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { | 37226 | #define vcmla_lane_f16(__p0_210, __p1_210, __p2_210, __p3_210) __extension__ ({ \ |
| 35898 | uint16x8_t __ret; | 37227 | float16x4_t __ret_210; \ |
| 35899 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 37228 | float16x4_t __s0_210 = __p0_210; \ |
| 35900 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 37229 | float16x4_t __s1_210 = __p1_210; \ |
| 35901 | uint16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 37230 | float16x4_t __s2_210 = __p2_210; \ |
| 35902 | __ret = (uint16x8_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 49); | 37231 | float16x4_t __rev0_210; __rev0_210 = __builtin_shufflevector(__s0_210, __s0_210, 3, 2, 1, 0); \ |
| 35903 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 37232 | float16x4_t __rev1_210; __rev1_210 = __builtin_shufflevector(__s1_210, __s1_210, 3, 2, 1, 0); \ |
| 35904 | return __ret; | 37233 | float16x4_t __rev2_210; __rev2_210 = __builtin_shufflevector(__s2_210, __s2_210, 3, 2, 1, 0); \ |
| 35905 | } | 37234 | float16x4_t __reint_210 = __rev2_210; \ |
| | 37235 | uint32x2_t __reint1_210 = (uint32x2_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_210, __p3_210), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_210, __p3_210)}; \ |
| | 37236 | __ret_210 = __noswap_vcmla_f16(__rev0_210, __rev1_210, *(float16x4_t *) &__reint1_210); \ |
| | 37237 | __ret_210 = __builtin_shufflevector(__ret_210, __ret_210, 3, 2, 1, 0); \ |
| | 37238 | __ret_210; \ |
| | 37239 | }) |
| 35906 | #endif | 37240 | #endif |
| 35907 | | 37241 | |
| 35908 | #ifdef __LITTLE_ENDIAN__ | 37242 | #ifdef __LITTLE_ENDIAN__ |
| 35909 | __ai int8x16_t vbcaxq_s8(int8x16_t __p0, int8x16_t __p1, int8x16_t __p2) { | 37243 | #define vcmlaq_lane_f16(__p0_211, __p1_211, __p2_211, __p3_211) __extension__ ({ \ |
| 35910 | int8x16_t __ret; | 37244 | float16x8_t __ret_211; \ |
| 35911 | __ret = (int8x16_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 32); | 37245 | float16x8_t __s0_211 = __p0_211; \ |
| 35912 | return __ret; | 37246 | float16x8_t __s1_211 = __p1_211; \ |
| 35913 | } | 37247 | float16x4_t __s2_211 = __p2_211; \ |
| | 37248 | float16x4_t __reint_211 = __s2_211; \ |
| | 37249 | uint32x4_t __reint1_211 = (uint32x4_t) {vget_lane_u32(*(uint32x2_t *) &__reint_211, __p3_211), vget_lane_u32(*(uint32x2_t *) &__reint_211, __p3_211), vget_lane_u32(*(uint32x2_t *) &__reint_211, __p3_211), vget_lane_u32(*(uint32x2_t *) &__reint_211, __p3_211)}; \ |
| | 37250 | __ret_211 = vcmlaq_f16(__s0_211, __s1_211, *(float16x8_t *) &__reint1_211); \ |
| | 37251 | __ret_211; \ |
| | 37252 | }) |
| 35914 | #else | 37253 | #else |
| 35915 | __ai int8x16_t vbcaxq_s8(int8x16_t __p0, int8x16_t __p1, int8x16_t __p2) { | 37254 | #define vcmlaq_lane_f16(__p0_212, __p1_212, __p2_212, __p3_212) __extension__ ({ \ |
| 35916 | int8x16_t __ret; | 37255 | float16x8_t __ret_212; \ |
| 35917 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 37256 | float16x8_t __s0_212 = __p0_212; \ |
| 35918 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 37257 | float16x8_t __s1_212 = __p1_212; \ |
| 35919 | int8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 37258 | float16x4_t __s2_212 = __p2_212; \ |
| 35920 | __ret = (int8x16_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 32); | 37259 | float16x8_t __rev0_212; __rev0_212 = __builtin_shufflevector(__s0_212, __s0_212, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 35921 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 37260 | float16x8_t __rev1_212; __rev1_212 = __builtin_shufflevector(__s1_212, __s1_212, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 35922 | return __ret; | 37261 | float16x4_t __rev2_212; __rev2_212 = __builtin_shufflevector(__s2_212, __s2_212, 3, 2, 1, 0); \ |
| 35923 | } | 37262 | float16x4_t __reint_212 = __rev2_212; \ |
| | 37263 | uint32x4_t __reint1_212 = (uint32x4_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_212, __p3_212), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_212, __p3_212), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_212, __p3_212), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_212, __p3_212)}; \ |
| | 37264 | __ret_212 = __noswap_vcmlaq_f16(__rev0_212, __rev1_212, *(float16x8_t *) &__reint1_212); \ |
| | 37265 | __ret_212 = __builtin_shufflevector(__ret_212, __ret_212, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 37266 | __ret_212; \ |
| | 37267 | }) |
| 35924 | #endif | 37268 | #endif |
| 35925 | | 37269 | |
| 35926 | #ifdef __LITTLE_ENDIAN__ | 37270 | #ifdef __LITTLE_ENDIAN__ |
| 35927 | __ai int32x4_t vbcaxq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 37271 | #define vcmla_laneq_f16(__p0_213, __p1_213, __p2_213, __p3_213) __extension__ ({ \ |
| 35928 | int32x4_t __ret; | 37272 | float16x4_t __ret_213; \ |
| 35929 | __ret = (int32x4_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); | 37273 | float16x4_t __s0_213 = __p0_213; \ |
| 35930 | return __ret; | 37274 | float16x4_t __s1_213 = __p1_213; \ |
| 35931 | } | 37275 | float16x8_t __s2_213 = __p2_213; \ |
| | 37276 | float16x8_t __reint_213 = __s2_213; \ |
| | 37277 | uint32x2_t __reint1_213 = (uint32x2_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_213, __p3_213), vgetq_lane_u32(*(uint32x4_t *) &__reint_213, __p3_213)}; \ |
| | 37278 | __ret_213 = vcmla_f16(__s0_213, __s1_213, *(float16x4_t *) &__reint1_213); \ |
| | 37279 | __ret_213; \ |
| | 37280 | }) |
| 35932 | #else | 37281 | #else |
| 35933 | __ai int32x4_t vbcaxq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 37282 | #define vcmla_laneq_f16(__p0_214, __p1_214, __p2_214, __p3_214) __extension__ ({ \ |
| 35934 | int32x4_t __ret; | 37283 | float16x4_t __ret_214; \ |
| 35935 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 37284 | float16x4_t __s0_214 = __p0_214; \ |
| 35936 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 37285 | float16x4_t __s1_214 = __p1_214; \ |
| 35937 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 37286 | float16x8_t __s2_214 = __p2_214; \ |
| 35938 | __ret = (int32x4_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); | 37287 | float16x4_t __rev0_214; __rev0_214 = __builtin_shufflevector(__s0_214, __s0_214, 3, 2, 1, 0); \ |
| 35939 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 37288 | float16x4_t __rev1_214; __rev1_214 = __builtin_shufflevector(__s1_214, __s1_214, 3, 2, 1, 0); \ |
| 35940 | return __ret; | 37289 | float16x8_t __rev2_214; __rev2_214 = __builtin_shufflevector(__s2_214, __s2_214, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 35941 | } | 37290 | float16x8_t __reint_214 = __rev2_214; \ |
| | 37291 | uint32x2_t __reint1_214 = (uint32x2_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_214, __p3_214), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_214, __p3_214)}; \ |
| | 37292 | __ret_214 = __noswap_vcmla_f16(__rev0_214, __rev1_214, *(float16x4_t *) &__reint1_214); \ |
| | 37293 | __ret_214 = __builtin_shufflevector(__ret_214, __ret_214, 3, 2, 1, 0); \ |
| | 37294 | __ret_214; \ |
| | 37295 | }) |
| 35942 | #endif | 37296 | #endif |
| 35943 | | 37297 | |
| 35944 | #ifdef __LITTLE_ENDIAN__ | 37298 | #ifdef __LITTLE_ENDIAN__ |
| 35945 | __ai int64x2_t vbcaxq_s64(int64x2_t __p0, int64x2_t __p1, int64x2_t __p2) { | 37299 | #define vcmlaq_laneq_f16(__p0_215, __p1_215, __p2_215, __p3_215) __extension__ ({ \ |
| 35946 | int64x2_t __ret; | 37300 | float16x8_t __ret_215; \ |
| 35947 | __ret = (int64x2_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 35); | 37301 | float16x8_t __s0_215 = __p0_215; \ |
| 35948 | return __ret; | 37302 | float16x8_t __s1_215 = __p1_215; \ |
| 35949 | } | 37303 | float16x8_t __s2_215 = __p2_215; \ |
| | 37304 | float16x8_t __reint_215 = __s2_215; \ |
| | 37305 | uint32x4_t __reint1_215 = (uint32x4_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_215, __p3_215), vgetq_lane_u32(*(uint32x4_t *) &__reint_215, __p3_215), vgetq_lane_u32(*(uint32x4_t *) &__reint_215, __p3_215), vgetq_lane_u32(*(uint32x4_t *) &__reint_215, __p3_215)}; \ |
| | 37306 | __ret_215 = vcmlaq_f16(__s0_215, __s1_215, *(float16x8_t *) &__reint1_215); \ |
| | 37307 | __ret_215; \ |
| | 37308 | }) |
| 35950 | #else | 37309 | #else |
| 35951 | __ai int64x2_t vbcaxq_s64(int64x2_t __p0, int64x2_t __p1, int64x2_t __p2) { | 37310 | #define vcmlaq_laneq_f16(__p0_216, __p1_216, __p2_216, __p3_216) __extension__ ({ \ |
| 35952 | int64x2_t __ret; | 37311 | float16x8_t __ret_216; \ |
| 35953 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 37312 | float16x8_t __s0_216 = __p0_216; \ |
| 35954 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 37313 | float16x8_t __s1_216 = __p1_216; \ |
| 35955 | int64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 37314 | float16x8_t __s2_216 = __p2_216; \ |
| 35956 | __ret = (int64x2_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 35); | 37315 | float16x8_t __rev0_216; __rev0_216 = __builtin_shufflevector(__s0_216, __s0_216, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 35957 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 37316 | float16x8_t __rev1_216; __rev1_216 = __builtin_shufflevector(__s1_216, __s1_216, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 35958 | return __ret; | 37317 | float16x8_t __rev2_216; __rev2_216 = __builtin_shufflevector(__s2_216, __s2_216, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 35959 | } | 37318 | float16x8_t __reint_216 = __rev2_216; \ |
| | 37319 | uint32x4_t __reint1_216 = (uint32x4_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_216, __p3_216), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_216, __p3_216), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_216, __p3_216), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_216, __p3_216)}; \ |
| | 37320 | __ret_216 = __noswap_vcmlaq_f16(__rev0_216, __rev1_216, *(float16x8_t *) &__reint1_216); \ |
| | 37321 | __ret_216 = __builtin_shufflevector(__ret_216, __ret_216, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 37322 | __ret_216; \ |
| | 37323 | }) |
| 35960 | #endif | 37324 | #endif |
| 35961 | | 37325 | |
| 35962 | #ifdef __LITTLE_ENDIAN__ | 37326 | #ifdef __LITTLE_ENDIAN__ |
| 35963 | __ai int16x8_t vbcaxq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 37327 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t vcmlaq_rot180_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 35964 | int16x8_t __ret; | 37328 | float16x8_t __ret; |
| 35965 | __ret = (int16x8_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 33); | 37329 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot180_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); |
| 35966 | return __ret; | 37330 | return __ret; |
| 35967 | } | 37331 | } |
| 35968 | #else | 37332 | #else |
| 35969 | __ai int16x8_t vbcaxq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 37333 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t vcmlaq_rot180_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 35970 | int16x8_t __ret; | 37334 | float16x8_t __ret; |
| 35971 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 37335 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 35972 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 37336 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 35973 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 37337 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 35974 | __ret = (int16x8_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 33); | 37338 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot180_f16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 40); |
| 35975 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 37339 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 35976 | return __ret; | 37340 | return __ret; |
| 35977 | } | 37341 | } |
| 35978 | #endif | 37342 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t __noswap_vcmlaq_rot180_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 35979 | | 37343 | float16x8_t __ret; |
| 35980 | #ifdef __LITTLE_ENDIAN__ | 37344 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot180_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); |
| 35981 | __ai uint8x16_t veor3q_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) { | | |
| 35982 | uint8x16_t __ret; | | |
| 35983 | __ret = (uint8x16_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 48); | | |
| 35984 | return __ret; | | |
| 35985 | } | | |
| 35986 | #else | | |
| 35987 | __ai uint8x16_t veor3q_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) { | | |
| 35988 | uint8x16_t __ret; | | |
| 35989 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 35990 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 35991 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 35992 | __ret = (uint8x16_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 48); | | |
| 35993 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 35994 | return __ret; | 37345 | return __ret; |
| 35995 | } | 37346 | } |
| 35996 | #endif | 37347 | #endif |
| 35997 | | 37348 | |
| 35998 | #ifdef __LITTLE_ENDIAN__ | 37349 | #ifdef __LITTLE_ENDIAN__ |
| 35999 | __ai uint32x4_t veor3q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 37350 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t vcmla_rot180_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 36000 | uint32x4_t __ret; | 37351 | float16x4_t __ret; |
| 36001 | __ret = (uint32x4_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); | 37352 | __ret = (float16x4_t) __builtin_neon_vcmla_rot180_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); |
| 36002 | return __ret; | 37353 | return __ret; |
| 36003 | } | 37354 | } |
| 36004 | #else | 37355 | #else |
| 36005 | __ai uint32x4_t veor3q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 37356 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t vcmla_rot180_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 36006 | uint32x4_t __ret; | 37357 | float16x4_t __ret; |
| 36007 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 37358 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 36008 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 37359 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 36009 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 37360 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 36010 | __ret = (uint32x4_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); | 37361 | __ret = (float16x4_t) __builtin_neon_vcmla_rot180_f16((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 8); |
| 36011 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 37362 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 36012 | return __ret; | 37363 | return __ret; |
| 36013 | } | 37364 | } |
| 36014 | #endif | 37365 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t __noswap_vcmla_rot180_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 36015 | | 37366 | float16x4_t __ret; |
| 36016 | #ifdef __LITTLE_ENDIAN__ | 37367 | __ret = (float16x4_t) __builtin_neon_vcmla_rot180_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); |
| 36017 | __ai uint64x2_t veor3q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | | |
| 36018 | uint64x2_t __ret; | | |
| 36019 | __ret = (uint64x2_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 51); | | |
| 36020 | return __ret; | | |
| 36021 | } | | |
| 36022 | #else | | |
| 36023 | __ai uint64x2_t veor3q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | | |
| 36024 | uint64x2_t __ret; | | |
| 36025 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 36026 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 36027 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 36028 | __ret = (uint64x2_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 51); | | |
| 36029 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 36030 | return __ret; | 37368 | return __ret; |
| 36031 | } | 37369 | } |
| 36032 | #endif | 37370 | #endif |
| 36033 | | 37371 | |
| 36034 | #ifdef __LITTLE_ENDIAN__ | 37372 | #ifdef __LITTLE_ENDIAN__ |
| 36035 | __ai uint16x8_t veor3q_u16(uint16x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { | 37373 | #define vcmla_rot180_lane_f16(__p0_217, __p1_217, __p2_217, __p3_217) __extension__ ({ \ |
| 36036 | uint16x8_t __ret; | 37374 | float16x4_t __ret_217; \ |
| 36037 | __ret = (uint16x8_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 49); | 37375 | float16x4_t __s0_217 = __p0_217; \ |
| 36038 | return __ret; | 37376 | float16x4_t __s1_217 = __p1_217; \ |
| 36039 | } | 37377 | float16x4_t __s2_217 = __p2_217; \ |
| | 37378 | float16x4_t __reint_217 = __s2_217; \ |
| | 37379 | uint32x2_t __reint1_217 = (uint32x2_t) {vget_lane_u32(*(uint32x2_t *) &__reint_217, __p3_217), vget_lane_u32(*(uint32x2_t *) &__reint_217, __p3_217)}; \ |
| | 37380 | __ret_217 = vcmla_rot180_f16(__s0_217, __s1_217, *(float16x4_t *) &__reint1_217); \ |
| | 37381 | __ret_217; \ |
| | 37382 | }) |
| 36040 | #else | 37383 | #else |
| 36041 | __ai uint16x8_t veor3q_u16(uint16x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { | 37384 | #define vcmla_rot180_lane_f16(__p0_218, __p1_218, __p2_218, __p3_218) __extension__ ({ \ |
| 36042 | uint16x8_t __ret; | 37385 | float16x4_t __ret_218; \ |
| 36043 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 37386 | float16x4_t __s0_218 = __p0_218; \ |
| 36044 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 37387 | float16x4_t __s1_218 = __p1_218; \ |
| 36045 | uint16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 37388 | float16x4_t __s2_218 = __p2_218; \ |
| 36046 | __ret = (uint16x8_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 49); | 37389 | float16x4_t __rev0_218; __rev0_218 = __builtin_shufflevector(__s0_218, __s0_218, 3, 2, 1, 0); \ |
| 36047 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 37390 | float16x4_t __rev1_218; __rev1_218 = __builtin_shufflevector(__s1_218, __s1_218, 3, 2, 1, 0); \ |
| 36048 | return __ret; | 37391 | float16x4_t __rev2_218; __rev2_218 = __builtin_shufflevector(__s2_218, __s2_218, 3, 2, 1, 0); \ |
| 36049 | } | 37392 | float16x4_t __reint_218 = __rev2_218; \ |
| | 37393 | uint32x2_t __reint1_218 = (uint32x2_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_218, __p3_218), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_218, __p3_218)}; \ |
| | 37394 | __ret_218 = __noswap_vcmla_rot180_f16(__rev0_218, __rev1_218, *(float16x4_t *) &__reint1_218); \ |
| | 37395 | __ret_218 = __builtin_shufflevector(__ret_218, __ret_218, 3, 2, 1, 0); \ |
| | 37396 | __ret_218; \ |
| | 37397 | }) |
| 36050 | #endif | 37398 | #endif |
| 36051 | | 37399 | |
| 36052 | #ifdef __LITTLE_ENDIAN__ | 37400 | #ifdef __LITTLE_ENDIAN__ |
| 36053 | __ai int8x16_t veor3q_s8(int8x16_t __p0, int8x16_t __p1, int8x16_t __p2) { | 37401 | #define vcmlaq_rot180_lane_f16(__p0_219, __p1_219, __p2_219, __p3_219) __extension__ ({ \ |
| 36054 | int8x16_t __ret; | 37402 | float16x8_t __ret_219; \ |
| 36055 | __ret = (int8x16_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 32); | 37403 | float16x8_t __s0_219 = __p0_219; \ |
| 36056 | return __ret; | 37404 | float16x8_t __s1_219 = __p1_219; \ |
| 36057 | } | 37405 | float16x4_t __s2_219 = __p2_219; \ |
| | 37406 | float16x4_t __reint_219 = __s2_219; \ |
| | 37407 | uint32x4_t __reint1_219 = (uint32x4_t) {vget_lane_u32(*(uint32x2_t *) &__reint_219, __p3_219), vget_lane_u32(*(uint32x2_t *) &__reint_219, __p3_219), vget_lane_u32(*(uint32x2_t *) &__reint_219, __p3_219), vget_lane_u32(*(uint32x2_t *) &__reint_219, __p3_219)}; \ |
| | 37408 | __ret_219 = vcmlaq_rot180_f16(__s0_219, __s1_219, *(float16x8_t *) &__reint1_219); \ |
| | 37409 | __ret_219; \ |
| | 37410 | }) |
| 36058 | #else | 37411 | #else |
| 36059 | __ai int8x16_t veor3q_s8(int8x16_t __p0, int8x16_t __p1, int8x16_t __p2) { | 37412 | #define vcmlaq_rot180_lane_f16(__p0_220, __p1_220, __p2_220, __p3_220) __extension__ ({ \ |
| 36060 | int8x16_t __ret; | 37413 | float16x8_t __ret_220; \ |
| 36061 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 37414 | float16x8_t __s0_220 = __p0_220; \ |
| 36062 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 37415 | float16x8_t __s1_220 = __p1_220; \ |
| 36063 | int8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 37416 | float16x4_t __s2_220 = __p2_220; \ |
| 36064 | __ret = (int8x16_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 32); | 37417 | float16x8_t __rev0_220; __rev0_220 = __builtin_shufflevector(__s0_220, __s0_220, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36065 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 37418 | float16x8_t __rev1_220; __rev1_220 = __builtin_shufflevector(__s1_220, __s1_220, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36066 | return __ret; | 37419 | float16x4_t __rev2_220; __rev2_220 = __builtin_shufflevector(__s2_220, __s2_220, 3, 2, 1, 0); \ |
| 36067 | } | 37420 | float16x4_t __reint_220 = __rev2_220; \ |
| | 37421 | uint32x4_t __reint1_220 = (uint32x4_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_220, __p3_220), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_220, __p3_220), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_220, __p3_220), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_220, __p3_220)}; \ |
| | 37422 | __ret_220 = __noswap_vcmlaq_rot180_f16(__rev0_220, __rev1_220, *(float16x8_t *) &__reint1_220); \ |
| | 37423 | __ret_220 = __builtin_shufflevector(__ret_220, __ret_220, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 37424 | __ret_220; \ |
| | 37425 | }) |
| 36068 | #endif | 37426 | #endif |
| 36069 | | 37427 | |
| 36070 | #ifdef __LITTLE_ENDIAN__ | 37428 | #ifdef __LITTLE_ENDIAN__ |
| 36071 | __ai int32x4_t veor3q_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 37429 | #define vcmla_rot180_laneq_f16(__p0_221, __p1_221, __p2_221, __p3_221) __extension__ ({ \ |
| 36072 | int32x4_t __ret; | 37430 | float16x4_t __ret_221; \ |
| 36073 | __ret = (int32x4_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); | 37431 | float16x4_t __s0_221 = __p0_221; \ |
| 36074 | return __ret; | 37432 | float16x4_t __s1_221 = __p1_221; \ |
| 36075 | } | 37433 | float16x8_t __s2_221 = __p2_221; \ |
| | 37434 | float16x8_t __reint_221 = __s2_221; \ |
| | 37435 | uint32x2_t __reint1_221 = (uint32x2_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_221, __p3_221), vgetq_lane_u32(*(uint32x4_t *) &__reint_221, __p3_221)}; \ |
| | 37436 | __ret_221 = vcmla_rot180_f16(__s0_221, __s1_221, *(float16x4_t *) &__reint1_221); \ |
| | 37437 | __ret_221; \ |
| | 37438 | }) |
| 36076 | #else | 37439 | #else |
| 36077 | __ai int32x4_t veor3q_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 37440 | #define vcmla_rot180_laneq_f16(__p0_222, __p1_222, __p2_222, __p3_222) __extension__ ({ \ |
| 36078 | int32x4_t __ret; | 37441 | float16x4_t __ret_222; \ |
| 36079 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 37442 | float16x4_t __s0_222 = __p0_222; \ |
| 36080 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 37443 | float16x4_t __s1_222 = __p1_222; \ |
| 36081 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 37444 | float16x8_t __s2_222 = __p2_222; \ |
| 36082 | __ret = (int32x4_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); | 37445 | float16x4_t __rev0_222; __rev0_222 = __builtin_shufflevector(__s0_222, __s0_222, 3, 2, 1, 0); \ |
| 36083 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 37446 | float16x4_t __rev1_222; __rev1_222 = __builtin_shufflevector(__s1_222, __s1_222, 3, 2, 1, 0); \ |
| 36084 | return __ret; | 37447 | float16x8_t __rev2_222; __rev2_222 = __builtin_shufflevector(__s2_222, __s2_222, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36085 | } | 37448 | float16x8_t __reint_222 = __rev2_222; \ |
| | 37449 | uint32x2_t __reint1_222 = (uint32x2_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_222, __p3_222), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_222, __p3_222)}; \ |
| | 37450 | __ret_222 = __noswap_vcmla_rot180_f16(__rev0_222, __rev1_222, *(float16x4_t *) &__reint1_222); \ |
| | 37451 | __ret_222 = __builtin_shufflevector(__ret_222, __ret_222, 3, 2, 1, 0); \ |
| | 37452 | __ret_222; \ |
| | 37453 | }) |
| 36086 | #endif | 37454 | #endif |
| 36087 | | 37455 | |
| 36088 | #ifdef __LITTLE_ENDIAN__ | 37456 | #ifdef __LITTLE_ENDIAN__ |
| 36089 | __ai int64x2_t veor3q_s64(int64x2_t __p0, int64x2_t __p1, int64x2_t __p2) { | 37457 | #define vcmlaq_rot180_laneq_f16(__p0_223, __p1_223, __p2_223, __p3_223) __extension__ ({ \ |
| 36090 | int64x2_t __ret; | 37458 | float16x8_t __ret_223; \ |
| 36091 | __ret = (int64x2_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 35); | 37459 | float16x8_t __s0_223 = __p0_223; \ |
| 36092 | return __ret; | 37460 | float16x8_t __s1_223 = __p1_223; \ |
| 36093 | } | 37461 | float16x8_t __s2_223 = __p2_223; \ |
| | 37462 | float16x8_t __reint_223 = __s2_223; \ |
| | 37463 | uint32x4_t __reint1_223 = (uint32x4_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_223, __p3_223), vgetq_lane_u32(*(uint32x4_t *) &__reint_223, __p3_223), vgetq_lane_u32(*(uint32x4_t *) &__reint_223, __p3_223), vgetq_lane_u32(*(uint32x4_t *) &__reint_223, __p3_223)}; \ |
| | 37464 | __ret_223 = vcmlaq_rot180_f16(__s0_223, __s1_223, *(float16x8_t *) &__reint1_223); \ |
| | 37465 | __ret_223; \ |
| | 37466 | }) |
| 36094 | #else | 37467 | #else |
| 36095 | __ai int64x2_t veor3q_s64(int64x2_t __p0, int64x2_t __p1, int64x2_t __p2) { | 37468 | #define vcmlaq_rot180_laneq_f16(__p0_224, __p1_224, __p2_224, __p3_224) __extension__ ({ \ |
| 36096 | int64x2_t __ret; | 37469 | float16x8_t __ret_224; \ |
| 36097 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 37470 | float16x8_t __s0_224 = __p0_224; \ |
| 36098 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 37471 | float16x8_t __s1_224 = __p1_224; \ |
| 36099 | int64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 37472 | float16x8_t __s2_224 = __p2_224; \ |
| 36100 | __ret = (int64x2_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 35); | 37473 | float16x8_t __rev0_224; __rev0_224 = __builtin_shufflevector(__s0_224, __s0_224, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36101 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 37474 | float16x8_t __rev1_224; __rev1_224 = __builtin_shufflevector(__s1_224, __s1_224, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36102 | return __ret; | 37475 | float16x8_t __rev2_224; __rev2_224 = __builtin_shufflevector(__s2_224, __s2_224, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36103 | } | 37476 | float16x8_t __reint_224 = __rev2_224; \ |
| | 37477 | uint32x4_t __reint1_224 = (uint32x4_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_224, __p3_224), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_224, __p3_224), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_224, __p3_224), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_224, __p3_224)}; \ |
| | 37478 | __ret_224 = __noswap_vcmlaq_rot180_f16(__rev0_224, __rev1_224, *(float16x8_t *) &__reint1_224); \ |
| | 37479 | __ret_224 = __builtin_shufflevector(__ret_224, __ret_224, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 37480 | __ret_224; \ |
| | 37481 | }) |
| 36104 | #endif | 37482 | #endif |
| 36105 | | 37483 | |
| 36106 | #ifdef __LITTLE_ENDIAN__ | 37484 | #ifdef __LITTLE_ENDIAN__ |
| 36107 | __ai int16x8_t veor3q_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 37485 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t vcmlaq_rot270_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 36108 | int16x8_t __ret; | 37486 | float16x8_t __ret; |
| 36109 | __ret = (int16x8_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 33); | 37487 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot270_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); |
| 36110 | return __ret; | 37488 | return __ret; |
| 36111 | } | 37489 | } |
| 36112 | #else | 37490 | #else |
| 36113 | __ai int16x8_t veor3q_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 37491 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t vcmlaq_rot270_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 36114 | int16x8_t __ret; | 37492 | float16x8_t __ret; |
| 36115 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 37493 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 36116 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 37494 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 36117 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 37495 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 36118 | __ret = (int16x8_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 33); | 37496 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot270_f16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 40); |
| 36119 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 37497 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 36120 | return __ret; | 37498 | return __ret; |
| 36121 | } | 37499 | } |
| | 37500 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t __noswap_vcmlaq_rot270_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| | 37501 | float16x8_t __ret; |
| | 37502 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot270_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); |
| | 37503 | return __ret; |
| | 37504 | } |
| 36122 | #endif | 37505 | #endif |
| 36123 | | 37506 | |
| 36124 | #ifdef __LITTLE_ENDIAN__ | 37507 | #ifdef __LITTLE_ENDIAN__ |
| 36125 | __ai uint64x2_t vrax1q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 37508 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t vcmla_rot270_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 36126 | uint64x2_t __ret; | 37509 | float16x4_t __ret; |
| 36127 | __ret = (uint64x2_t) __builtin_neon_vrax1q_v((int8x16_t)__p0, (int8x16_t)__p1, 51); | 37510 | __ret = (float16x4_t) __builtin_neon_vcmla_rot270_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); |
| 36128 | return __ret; | 37511 | return __ret; |
| 36129 | } | 37512 | } |
| 36130 | #else | 37513 | #else |
| 36131 | __ai uint64x2_t vrax1q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 37514 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t vcmla_rot270_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 36132 | uint64x2_t __ret; | 37515 | float16x4_t __ret; |
| 36133 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 37516 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 36134 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 37517 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 36135 | __ret = (uint64x2_t) __builtin_neon_vrax1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); | 37518 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 36136 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 37519 | __ret = (float16x4_t) __builtin_neon_vcmla_rot270_f16((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 8); |
| | 37520 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 37521 | return __ret; |
| | 37522 | } |
| | 37523 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t __noswap_vcmla_rot270_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| | 37524 | float16x4_t __ret; |
| | 37525 | __ret = (float16x4_t) __builtin_neon_vcmla_rot270_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); |
| 36137 | return __ret; | 37526 | return __ret; |
| 36138 | } | 37527 | } |
| 36139 | #endif | 37528 | #endif |
| 36140 | | 37529 | |
| 36141 | #ifdef __LITTLE_ENDIAN__ | 37530 | #ifdef __LITTLE_ENDIAN__ |
| 36142 | #define vxarq_u64(__p0, __p1, __p2) __extension__ ({ \ | 37531 | #define vcmla_rot270_lane_f16(__p0_225, __p1_225, __p2_225, __p3_225) __extension__ ({ \ |
| 36143 | uint64x2_t __ret; \ | 37532 | float16x4_t __ret_225; \ |
| 36144 | uint64x2_t __s0 = __p0; \ | 37533 | float16x4_t __s0_225 = __p0_225; \ |
| 36145 | uint64x2_t __s1 = __p1; \ | 37534 | float16x4_t __s1_225 = __p1_225; \ |
| 36146 | __ret = (uint64x2_t) __builtin_neon_vxarq_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 51); \ | 37535 | float16x4_t __s2_225 = __p2_225; \ |
| 36147 | __ret; \ | 37536 | float16x4_t __reint_225 = __s2_225; \ |
| | 37537 | uint32x2_t __reint1_225 = (uint32x2_t) {vget_lane_u32(*(uint32x2_t *) &__reint_225, __p3_225), vget_lane_u32(*(uint32x2_t *) &__reint_225, __p3_225)}; \ |
| | 37538 | __ret_225 = vcmla_rot270_f16(__s0_225, __s1_225, *(float16x4_t *) &__reint1_225); \ |
| | 37539 | __ret_225; \ |
| 36148 | }) | 37540 | }) |
| 36149 | #else | 37541 | #else |
| 36150 | #define vxarq_u64(__p0, __p1, __p2) __extension__ ({ \ | 37542 | #define vcmla_rot270_lane_f16(__p0_226, __p1_226, __p2_226, __p3_226) __extension__ ({ \ |
| 36151 | uint64x2_t __ret; \ | 37543 | float16x4_t __ret_226; \ |
| 36152 | uint64x2_t __s0 = __p0; \ | 37544 | float16x4_t __s0_226 = __p0_226; \ |
| 36153 | uint64x2_t __s1 = __p1; \ | 37545 | float16x4_t __s1_226 = __p1_226; \ |
| 36154 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 37546 | float16x4_t __s2_226 = __p2_226; \ |
| 36155 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 37547 | float16x4_t __rev0_226; __rev0_226 = __builtin_shufflevector(__s0_226, __s0_226, 3, 2, 1, 0); \ |
| 36156 | __ret = (uint64x2_t) __builtin_neon_vxarq_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 51); \ | 37548 | float16x4_t __rev1_226; __rev1_226 = __builtin_shufflevector(__s1_226, __s1_226, 3, 2, 1, 0); \ |
| 36157 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 37549 | float16x4_t __rev2_226; __rev2_226 = __builtin_shufflevector(__s2_226, __s2_226, 3, 2, 1, 0); \ |
| 36158 | __ret; \ | 37550 | float16x4_t __reint_226 = __rev2_226; \ |
| | 37551 | uint32x2_t __reint1_226 = (uint32x2_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_226, __p3_226), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_226, __p3_226)}; \ |
| | 37552 | __ret_226 = __noswap_vcmla_rot270_f16(__rev0_226, __rev1_226, *(float16x4_t *) &__reint1_226); \ |
| | 37553 | __ret_226 = __builtin_shufflevector(__ret_226, __ret_226, 3, 2, 1, 0); \ |
| | 37554 | __ret_226; \ |
| 36159 | }) | 37555 | }) |
| 36160 | #endif | 37556 | #endif |
| 36161 | | 37557 | |
| 36162 | #endif | | |
| 36163 | #if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_SHA512) && defined(__aarch64__) | | |
| 36164 | #ifdef __LITTLE_ENDIAN__ | 37558 | #ifdef __LITTLE_ENDIAN__ |
| 36165 | __ai uint64x2_t vsha512hq_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | 37559 | #define vcmlaq_rot270_lane_f16(__p0_227, __p1_227, __p2_227, __p3_227) __extension__ ({ \ |
| 36166 | uint64x2_t __ret; | 37560 | float16x8_t __ret_227; \ |
| 36167 | __ret = (uint64x2_t) __builtin_neon_vsha512hq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 51); | 37561 | float16x8_t __s0_227 = __p0_227; \ |
| 36168 | return __ret; | 37562 | float16x8_t __s1_227 = __p1_227; \ |
| 36169 | } | 37563 | float16x4_t __s2_227 = __p2_227; \ |
| | 37564 | float16x4_t __reint_227 = __s2_227; \ |
| | 37565 | uint32x4_t __reint1_227 = (uint32x4_t) {vget_lane_u32(*(uint32x2_t *) &__reint_227, __p3_227), vget_lane_u32(*(uint32x2_t *) &__reint_227, __p3_227), vget_lane_u32(*(uint32x2_t *) &__reint_227, __p3_227), vget_lane_u32(*(uint32x2_t *) &__reint_227, __p3_227)}; \ |
| | 37566 | __ret_227 = vcmlaq_rot270_f16(__s0_227, __s1_227, *(float16x8_t *) &__reint1_227); \ |
| | 37567 | __ret_227; \ |
| | 37568 | }) |
| 36170 | #else | 37569 | #else |
| 36171 | __ai uint64x2_t vsha512hq_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | 37570 | #define vcmlaq_rot270_lane_f16(__p0_228, __p1_228, __p2_228, __p3_228) __extension__ ({ \ |
| 36172 | uint64x2_t __ret; | 37571 | float16x8_t __ret_228; \ |
| 36173 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 37572 | float16x8_t __s0_228 = __p0_228; \ |
| 36174 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 37573 | float16x8_t __s1_228 = __p1_228; \ |
| 36175 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 37574 | float16x4_t __s2_228 = __p2_228; \ |
| 36176 | __ret = (uint64x2_t) __builtin_neon_vsha512hq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 51); | 37575 | float16x8_t __rev0_228; __rev0_228 = __builtin_shufflevector(__s0_228, __s0_228, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36177 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 37576 | float16x8_t __rev1_228; __rev1_228 = __builtin_shufflevector(__s1_228, __s1_228, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36178 | return __ret; | 37577 | float16x4_t __rev2_228; __rev2_228 = __builtin_shufflevector(__s2_228, __s2_228, 3, 2, 1, 0); \ |
| 36179 | } | 37578 | float16x4_t __reint_228 = __rev2_228; \ |
| | 37579 | uint32x4_t __reint1_228 = (uint32x4_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_228, __p3_228), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_228, __p3_228), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_228, __p3_228), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_228, __p3_228)}; \ |
| | 37580 | __ret_228 = __noswap_vcmlaq_rot270_f16(__rev0_228, __rev1_228, *(float16x8_t *) &__reint1_228); \ |
| | 37581 | __ret_228 = __builtin_shufflevector(__ret_228, __ret_228, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 37582 | __ret_228; \ |
| | 37583 | }) |
| 36180 | #endif | 37584 | #endif |
| 36181 | | 37585 | |
| 36182 | #ifdef __LITTLE_ENDIAN__ | 37586 | #ifdef __LITTLE_ENDIAN__ |
| 36183 | __ai uint64x2_t vsha512h2q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | 37587 | #define vcmla_rot270_laneq_f16(__p0_229, __p1_229, __p2_229, __p3_229) __extension__ ({ \ |
| 36184 | uint64x2_t __ret; | 37588 | float16x4_t __ret_229; \ |
| 36185 | __ret = (uint64x2_t) __builtin_neon_vsha512h2q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 51); | 37589 | float16x4_t __s0_229 = __p0_229; \ |
| 36186 | return __ret; | 37590 | float16x4_t __s1_229 = __p1_229; \ |
| 36187 | } | 37591 | float16x8_t __s2_229 = __p2_229; \ |
| | 37592 | float16x8_t __reint_229 = __s2_229; \ |
| | 37593 | uint32x2_t __reint1_229 = (uint32x2_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_229, __p3_229), vgetq_lane_u32(*(uint32x4_t *) &__reint_229, __p3_229)}; \ |
| | 37594 | __ret_229 = vcmla_rot270_f16(__s0_229, __s1_229, *(float16x4_t *) &__reint1_229); \ |
| | 37595 | __ret_229; \ |
| | 37596 | }) |
| 36188 | #else | 37597 | #else |
| 36189 | __ai uint64x2_t vsha512h2q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | 37598 | #define vcmla_rot270_laneq_f16(__p0_230, __p1_230, __p2_230, __p3_230) __extension__ ({ \ |
| 36190 | uint64x2_t __ret; | 37599 | float16x4_t __ret_230; \ |
| 36191 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 37600 | float16x4_t __s0_230 = __p0_230; \ |
| 36192 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 37601 | float16x4_t __s1_230 = __p1_230; \ |
| 36193 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 37602 | float16x8_t __s2_230 = __p2_230; \ |
| 36194 | __ret = (uint64x2_t) __builtin_neon_vsha512h2q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 51); | 37603 | float16x4_t __rev0_230; __rev0_230 = __builtin_shufflevector(__s0_230, __s0_230, 3, 2, 1, 0); \ |
| 36195 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 37604 | float16x4_t __rev1_230; __rev1_230 = __builtin_shufflevector(__s1_230, __s1_230, 3, 2, 1, 0); \ |
| 36196 | return __ret; | 37605 | float16x8_t __rev2_230; __rev2_230 = __builtin_shufflevector(__s2_230, __s2_230, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36197 | } | 37606 | float16x8_t __reint_230 = __rev2_230; \ |
| | 37607 | uint32x2_t __reint1_230 = (uint32x2_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_230, __p3_230), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_230, __p3_230)}; \ |
| | 37608 | __ret_230 = __noswap_vcmla_rot270_f16(__rev0_230, __rev1_230, *(float16x4_t *) &__reint1_230); \ |
| | 37609 | __ret_230 = __builtin_shufflevector(__ret_230, __ret_230, 3, 2, 1, 0); \ |
| | 37610 | __ret_230; \ |
| | 37611 | }) |
| 36198 | #endif | 37612 | #endif |
| 36199 | | 37613 | |
| 36200 | #ifdef __LITTLE_ENDIAN__ | 37614 | #ifdef __LITTLE_ENDIAN__ |
| 36201 | __ai uint64x2_t vsha512su0q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 37615 | #define vcmlaq_rot270_laneq_f16(__p0_231, __p1_231, __p2_231, __p3_231) __extension__ ({ \ |
| 36202 | uint64x2_t __ret; | 37616 | float16x8_t __ret_231; \ |
| 36203 | __ret = (uint64x2_t) __builtin_neon_vsha512su0q_v((int8x16_t)__p0, (int8x16_t)__p1, 51); | 37617 | float16x8_t __s0_231 = __p0_231; \ |
| 36204 | return __ret; | 37618 | float16x8_t __s1_231 = __p1_231; \ |
| 36205 | } | 37619 | float16x8_t __s2_231 = __p2_231; \ |
| | 37620 | float16x8_t __reint_231 = __s2_231; \ |
| | 37621 | uint32x4_t __reint1_231 = (uint32x4_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_231, __p3_231), vgetq_lane_u32(*(uint32x4_t *) &__reint_231, __p3_231), vgetq_lane_u32(*(uint32x4_t *) &__reint_231, __p3_231), vgetq_lane_u32(*(uint32x4_t *) &__reint_231, __p3_231)}; \ |
| | 37622 | __ret_231 = vcmlaq_rot270_f16(__s0_231, __s1_231, *(float16x8_t *) &__reint1_231); \ |
| | 37623 | __ret_231; \ |
| | 37624 | }) |
| 36206 | #else | 37625 | #else |
| 36207 | __ai uint64x2_t vsha512su0q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 37626 | #define vcmlaq_rot270_laneq_f16(__p0_232, __p1_232, __p2_232, __p3_232) __extension__ ({ \ |
| 36208 | uint64x2_t __ret; | 37627 | float16x8_t __ret_232; \ |
| 36209 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 37628 | float16x8_t __s0_232 = __p0_232; \ |
| 36210 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 37629 | float16x8_t __s1_232 = __p1_232; \ |
| 36211 | __ret = (uint64x2_t) __builtin_neon_vsha512su0q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); | 37630 | float16x8_t __s2_232 = __p2_232; \ |
| 36212 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 37631 | float16x8_t __rev0_232; __rev0_232 = __builtin_shufflevector(__s0_232, __s0_232, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36213 | return __ret; | 37632 | float16x8_t __rev1_232; __rev1_232 = __builtin_shufflevector(__s1_232, __s1_232, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36214 | } | 37633 | float16x8_t __rev2_232; __rev2_232 = __builtin_shufflevector(__s2_232, __s2_232, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 37634 | float16x8_t __reint_232 = __rev2_232; \ |
| | 37635 | uint32x4_t __reint1_232 = (uint32x4_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_232, __p3_232), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_232, __p3_232), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_232, __p3_232), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_232, __p3_232)}; \ |
| | 37636 | __ret_232 = __noswap_vcmlaq_rot270_f16(__rev0_232, __rev1_232, *(float16x8_t *) &__reint1_232); \ |
| | 37637 | __ret_232 = __builtin_shufflevector(__ret_232, __ret_232, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 37638 | __ret_232; \ |
| | 37639 | }) |
| 36215 | #endif | 37640 | #endif |
| 36216 | | 37641 | |
| 36217 | #ifdef __LITTLE_ENDIAN__ | 37642 | #ifdef __LITTLE_ENDIAN__ |
| 36218 | __ai uint64x2_t vsha512su1q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | 37643 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t vcmlaq_rot90_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 36219 | uint64x2_t __ret; | 37644 | float16x8_t __ret; |
| 36220 | __ret = (uint64x2_t) __builtin_neon_vsha512su1q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 51); | 37645 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot90_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); |
| 36221 | return __ret; | 37646 | return __ret; |
| 36222 | } | 37647 | } |
| 36223 | #else | 37648 | #else |
| 36224 | __ai uint64x2_t vsha512su1q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | 37649 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t vcmlaq_rot90_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 36225 | uint64x2_t __ret; | 37650 | float16x8_t __ret; |
| 36226 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 37651 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 36227 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 37652 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 36228 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 37653 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 36229 | __ret = (uint64x2_t) __builtin_neon_vsha512su1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 51); | 37654 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot90_f16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 40); |
| 36230 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 37655 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 36231 | return __ret; | | |
| 36232 | } | | |
| 36233 | #endif | | |
| 36234 | | | |
| 36235 | #endif | | |
| 36236 | #if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_SM3) && defined(__aarch64__) | | |
| 36237 | #ifdef __LITTLE_ENDIAN__ | | |
| 36238 | __ai uint32x4_t vsm3partw1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | | |
| 36239 | uint32x4_t __ret; | | |
| 36240 | __ret = (uint32x4_t) __builtin_neon_vsm3partw1q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); | | |
| 36241 | return __ret; | 37656 | return __ret; |
| 36242 | } | 37657 | } |
| 36243 | #else | 37658 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x8_t __noswap_vcmlaq_rot90_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 36244 | __ai uint32x4_t vsm3partw1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 37659 | float16x8_t __ret; |
| 36245 | uint32x4_t __ret; | 37660 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot90_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); |
| 36246 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 36247 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 36248 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | | |
| 36249 | __ret = (uint32x4_t) __builtin_neon_vsm3partw1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); | | |
| 36250 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 36251 | return __ret; | 37661 | return __ret; |
| 36252 | } | 37662 | } |
| 36253 | #endif | 37663 | #endif |
| 36254 | | 37664 | |
| 36255 | #ifdef __LITTLE_ENDIAN__ | 37665 | #ifdef __LITTLE_ENDIAN__ |
| 36256 | __ai uint32x4_t vsm3partw2q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 37666 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t vcmla_rot90_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 36257 | uint32x4_t __ret; | 37667 | float16x4_t __ret; |
| 36258 | __ret = (uint32x4_t) __builtin_neon_vsm3partw2q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); | 37668 | __ret = (float16x4_t) __builtin_neon_vcmla_rot90_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); |
| 36259 | return __ret; | 37669 | return __ret; |
| 36260 | } | 37670 | } |
| 36261 | #else | 37671 | #else |
| 36262 | __ai uint32x4_t vsm3partw2q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 37672 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t vcmla_rot90_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 36263 | uint32x4_t __ret; | 37673 | float16x4_t __ret; |
| 36264 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 37674 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 36265 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 37675 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 36266 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 37676 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 36267 | __ret = (uint32x4_t) __builtin_neon_vsm3partw2q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); | 37677 | __ret = (float16x4_t) __builtin_neon_vcmla_rot90_f16((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 8); |
| 36268 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 37678 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 36269 | return __ret; | 37679 | return __ret; |
| 36270 | } | 37680 | } |
| 36271 | #endif | 37681 | __ai __attribute__((target("v8.3a,fullfp16"))) float16x4_t __noswap_vcmla_rot90_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 36272 | | 37682 | float16x4_t __ret; |
| 36273 | #ifdef __LITTLE_ENDIAN__ | 37683 | __ret = (float16x4_t) __builtin_neon_vcmla_rot90_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); |
| 36274 | __ai uint32x4_t vsm3ss1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | | |
| 36275 | uint32x4_t __ret; | | |
| 36276 | __ret = (uint32x4_t) __builtin_neon_vsm3ss1q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); | | |
| 36277 | return __ret; | | |
| 36278 | } | | |
| 36279 | #else | | |
| 36280 | __ai uint32x4_t vsm3ss1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | | |
| 36281 | uint32x4_t __ret; | | |
| 36282 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 36283 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 36284 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | | |
| 36285 | __ret = (uint32x4_t) __builtin_neon_vsm3ss1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); | | |
| 36286 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 36287 | return __ret; | 37684 | return __ret; |
| 36288 | } | 37685 | } |
| 36289 | #endif | 37686 | #endif |
| 36290 | | 37687 | |
| 36291 | #ifdef __LITTLE_ENDIAN__ | 37688 | #ifdef __LITTLE_ENDIAN__ |
| 36292 | #define vsm3tt1aq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 37689 | #define vcmla_rot90_lane_f16(__p0_233, __p1_233, __p2_233, __p3_233) __extension__ ({ \ |
| 36293 | uint32x4_t __ret; \ | 37690 | float16x4_t __ret_233; \ |
| 36294 | uint32x4_t __s0 = __p0; \ | 37691 | float16x4_t __s0_233 = __p0_233; \ |
| 36295 | uint32x4_t __s1 = __p1; \ | 37692 | float16x4_t __s1_233 = __p1_233; \ |
| 36296 | uint32x4_t __s2 = __p2; \ | 37693 | float16x4_t __s2_233 = __p2_233; \ |
| 36297 | __ret = (uint32x4_t) __builtin_neon_vsm3tt1aq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 50); \ | 37694 | float16x4_t __reint_233 = __s2_233; \ |
| 36298 | __ret; \ | 37695 | uint32x2_t __reint1_233 = (uint32x2_t) {vget_lane_u32(*(uint32x2_t *) &__reint_233, __p3_233), vget_lane_u32(*(uint32x2_t *) &__reint_233, __p3_233)}; \ |
| | 37696 | __ret_233 = vcmla_rot90_f16(__s0_233, __s1_233, *(float16x4_t *) &__reint1_233); \ |
| | 37697 | __ret_233; \ |
| 36299 | }) | 37698 | }) |
| 36300 | #else | 37699 | #else |
| 36301 | #define vsm3tt1aq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 37700 | #define vcmla_rot90_lane_f16(__p0_234, __p1_234, __p2_234, __p3_234) __extension__ ({ \ |
| 36302 | uint32x4_t __ret; \ | 37701 | float16x4_t __ret_234; \ |
| 36303 | uint32x4_t __s0 = __p0; \ | 37702 | float16x4_t __s0_234 = __p0_234; \ |
| 36304 | uint32x4_t __s1 = __p1; \ | 37703 | float16x4_t __s1_234 = __p1_234; \ |
| 36305 | uint32x4_t __s2 = __p2; \ | 37704 | float16x4_t __s2_234 = __p2_234; \ |
| 36306 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 37705 | float16x4_t __rev0_234; __rev0_234 = __builtin_shufflevector(__s0_234, __s0_234, 3, 2, 1, 0); \ |
| 36307 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 37706 | float16x4_t __rev1_234; __rev1_234 = __builtin_shufflevector(__s1_234, __s1_234, 3, 2, 1, 0); \ |
| 36308 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | 37707 | float16x4_t __rev2_234; __rev2_234 = __builtin_shufflevector(__s2_234, __s2_234, 3, 2, 1, 0); \ |
| 36309 | __ret = (uint32x4_t) __builtin_neon_vsm3tt1aq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 50); \ | 37708 | float16x4_t __reint_234 = __rev2_234; \ |
| 36310 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 37709 | uint32x2_t __reint1_234 = (uint32x2_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_234, __p3_234), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_234, __p3_234)}; \ |
| 36311 | __ret; \ | 37710 | __ret_234 = __noswap_vcmla_rot90_f16(__rev0_234, __rev1_234, *(float16x4_t *) &__reint1_234); \ |
| | 37711 | __ret_234 = __builtin_shufflevector(__ret_234, __ret_234, 3, 2, 1, 0); \ |
| | 37712 | __ret_234; \ |
| 36312 | }) | 37713 | }) |
| 36313 | #endif | 37714 | #endif |
| 36314 | | 37715 | |
| 36315 | #ifdef __LITTLE_ENDIAN__ | 37716 | #ifdef __LITTLE_ENDIAN__ |
| 36316 | #define vsm3tt1bq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 37717 | #define vcmlaq_rot90_lane_f16(__p0_235, __p1_235, __p2_235, __p3_235) __extension__ ({ \ |
| 36317 | uint32x4_t __ret; \ | 37718 | float16x8_t __ret_235; \ |
| 36318 | uint32x4_t __s0 = __p0; \ | 37719 | float16x8_t __s0_235 = __p0_235; \ |
| 36319 | uint32x4_t __s1 = __p1; \ | 37720 | float16x8_t __s1_235 = __p1_235; \ |
| 36320 | uint32x4_t __s2 = __p2; \ | 37721 | float16x4_t __s2_235 = __p2_235; \ |
| 36321 | __ret = (uint32x4_t) __builtin_neon_vsm3tt1bq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 50); \ | 37722 | float16x4_t __reint_235 = __s2_235; \ |
| 36322 | __ret; \ | 37723 | uint32x4_t __reint1_235 = (uint32x4_t) {vget_lane_u32(*(uint32x2_t *) &__reint_235, __p3_235), vget_lane_u32(*(uint32x2_t *) &__reint_235, __p3_235), vget_lane_u32(*(uint32x2_t *) &__reint_235, __p3_235), vget_lane_u32(*(uint32x2_t *) &__reint_235, __p3_235)}; \ |
| | 37724 | __ret_235 = vcmlaq_rot90_f16(__s0_235, __s1_235, *(float16x8_t *) &__reint1_235); \ |
| | 37725 | __ret_235; \ |
| 36323 | }) | 37726 | }) |
| 36324 | #else | 37727 | #else |
| 36325 | #define vsm3tt1bq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 37728 | #define vcmlaq_rot90_lane_f16(__p0_236, __p1_236, __p2_236, __p3_236) __extension__ ({ \ |
| 36326 | uint32x4_t __ret; \ | 37729 | float16x8_t __ret_236; \ |
| 36327 | uint32x4_t __s0 = __p0; \ | 37730 | float16x8_t __s0_236 = __p0_236; \ |
| 36328 | uint32x4_t __s1 = __p1; \ | 37731 | float16x8_t __s1_236 = __p1_236; \ |
| 36329 | uint32x4_t __s2 = __p2; \ | 37732 | float16x4_t __s2_236 = __p2_236; \ |
| 36330 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 37733 | float16x8_t __rev0_236; __rev0_236 = __builtin_shufflevector(__s0_236, __s0_236, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36331 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 37734 | float16x8_t __rev1_236; __rev1_236 = __builtin_shufflevector(__s1_236, __s1_236, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36332 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | 37735 | float16x4_t __rev2_236; __rev2_236 = __builtin_shufflevector(__s2_236, __s2_236, 3, 2, 1, 0); \ |
| 36333 | __ret = (uint32x4_t) __builtin_neon_vsm3tt1bq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 50); \ | 37736 | float16x4_t __reint_236 = __rev2_236; \ |
| 36334 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 37737 | uint32x4_t __reint1_236 = (uint32x4_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_236, __p3_236), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_236, __p3_236), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_236, __p3_236), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_236, __p3_236)}; \ |
| 36335 | __ret; \ | 37738 | __ret_236 = __noswap_vcmlaq_rot90_f16(__rev0_236, __rev1_236, *(float16x8_t *) &__reint1_236); \ |
| | 37739 | __ret_236 = __builtin_shufflevector(__ret_236, __ret_236, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 37740 | __ret_236; \ |
| 36336 | }) | 37741 | }) |
| 36337 | #endif | 37742 | #endif |
| 36338 | | 37743 | |
| 36339 | #ifdef __LITTLE_ENDIAN__ | 37744 | #ifdef __LITTLE_ENDIAN__ |
| 36340 | #define vsm3tt2aq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 37745 | #define vcmla_rot90_laneq_f16(__p0_237, __p1_237, __p2_237, __p3_237) __extension__ ({ \ |
| 36341 | uint32x4_t __ret; \ | 37746 | float16x4_t __ret_237; \ |
| 36342 | uint32x4_t __s0 = __p0; \ | 37747 | float16x4_t __s0_237 = __p0_237; \ |
| 36343 | uint32x4_t __s1 = __p1; \ | 37748 | float16x4_t __s1_237 = __p1_237; \ |
| 36344 | uint32x4_t __s2 = __p2; \ | 37749 | float16x8_t __s2_237 = __p2_237; \ |
| 36345 | __ret = (uint32x4_t) __builtin_neon_vsm3tt2aq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 50); \ | 37750 | float16x8_t __reint_237 = __s2_237; \ |
| 36346 | __ret; \ | 37751 | uint32x2_t __reint1_237 = (uint32x2_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_237, __p3_237), vgetq_lane_u32(*(uint32x4_t *) &__reint_237, __p3_237)}; \ |
| | 37752 | __ret_237 = vcmla_rot90_f16(__s0_237, __s1_237, *(float16x4_t *) &__reint1_237); \ |
| | 37753 | __ret_237; \ |
| 36347 | }) | 37754 | }) |
| 36348 | #else | 37755 | #else |
| 36349 | #define vsm3tt2aq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 37756 | #define vcmla_rot90_laneq_f16(__p0_238, __p1_238, __p2_238, __p3_238) __extension__ ({ \ |
| 36350 | uint32x4_t __ret; \ | 37757 | float16x4_t __ret_238; \ |
| 36351 | uint32x4_t __s0 = __p0; \ | 37758 | float16x4_t __s0_238 = __p0_238; \ |
| 36352 | uint32x4_t __s1 = __p1; \ | 37759 | float16x4_t __s1_238 = __p1_238; \ |
| 36353 | uint32x4_t __s2 = __p2; \ | 37760 | float16x8_t __s2_238 = __p2_238; \ |
| 36354 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 37761 | float16x4_t __rev0_238; __rev0_238 = __builtin_shufflevector(__s0_238, __s0_238, 3, 2, 1, 0); \ |
| 36355 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 37762 | float16x4_t __rev1_238; __rev1_238 = __builtin_shufflevector(__s1_238, __s1_238, 3, 2, 1, 0); \ |
| 36356 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | 37763 | float16x8_t __rev2_238; __rev2_238 = __builtin_shufflevector(__s2_238, __s2_238, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36357 | __ret = (uint32x4_t) __builtin_neon_vsm3tt2aq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 50); \ | 37764 | float16x8_t __reint_238 = __rev2_238; \ |
| 36358 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 37765 | uint32x2_t __reint1_238 = (uint32x2_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_238, __p3_238), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_238, __p3_238)}; \ |
| 36359 | __ret; \ | 37766 | __ret_238 = __noswap_vcmla_rot90_f16(__rev0_238, __rev1_238, *(float16x4_t *) &__reint1_238); \ |
| | 37767 | __ret_238 = __builtin_shufflevector(__ret_238, __ret_238, 3, 2, 1, 0); \ |
| | 37768 | __ret_238; \ |
| 36360 | }) | 37769 | }) |
| 36361 | #endif | 37770 | #endif |
| 36362 | | 37771 | |
| 36363 | #ifdef __LITTLE_ENDIAN__ | 37772 | #ifdef __LITTLE_ENDIAN__ |
| 36364 | #define vsm3tt2bq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 37773 | #define vcmlaq_rot90_laneq_f16(__p0_239, __p1_239, __p2_239, __p3_239) __extension__ ({ \ |
| 36365 | uint32x4_t __ret; \ | 37774 | float16x8_t __ret_239; \ |
| 36366 | uint32x4_t __s0 = __p0; \ | 37775 | float16x8_t __s0_239 = __p0_239; \ |
| 36367 | uint32x4_t __s1 = __p1; \ | 37776 | float16x8_t __s1_239 = __p1_239; \ |
| 36368 | uint32x4_t __s2 = __p2; \ | 37777 | float16x8_t __s2_239 = __p2_239; \ |
| 36369 | __ret = (uint32x4_t) __builtin_neon_vsm3tt2bq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 50); \ | 37778 | float16x8_t __reint_239 = __s2_239; \ |
| 36370 | __ret; \ | 37779 | uint32x4_t __reint1_239 = (uint32x4_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_239, __p3_239), vgetq_lane_u32(*(uint32x4_t *) &__reint_239, __p3_239), vgetq_lane_u32(*(uint32x4_t *) &__reint_239, __p3_239), vgetq_lane_u32(*(uint32x4_t *) &__reint_239, __p3_239)}; \ |
| | 37780 | __ret_239 = vcmlaq_rot90_f16(__s0_239, __s1_239, *(float16x8_t *) &__reint1_239); \ |
| | 37781 | __ret_239; \ |
| 36371 | }) | 37782 | }) |
| 36372 | #else | 37783 | #else |
| 36373 | #define vsm3tt2bq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 37784 | #define vcmlaq_rot90_laneq_f16(__p0_240, __p1_240, __p2_240, __p3_240) __extension__ ({ \ |
| 36374 | uint32x4_t __ret; \ | 37785 | float16x8_t __ret_240; \ |
| 36375 | uint32x4_t __s0 = __p0; \ | 37786 | float16x8_t __s0_240 = __p0_240; \ |
| 36376 | uint32x4_t __s1 = __p1; \ | 37787 | float16x8_t __s1_240 = __p1_240; \ |
| 36377 | uint32x4_t __s2 = __p2; \ | 37788 | float16x8_t __s2_240 = __p2_240; \ |
| 36378 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 37789 | float16x8_t __rev0_240; __rev0_240 = __builtin_shufflevector(__s0_240, __s0_240, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36379 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 37790 | float16x8_t __rev1_240; __rev1_240 = __builtin_shufflevector(__s1_240, __s1_240, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36380 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | 37791 | float16x8_t __rev2_240; __rev2_240 = __builtin_shufflevector(__s2_240, __s2_240, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36381 | __ret = (uint32x4_t) __builtin_neon_vsm3tt2bq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 50); \ | 37792 | float16x8_t __reint_240 = __rev2_240; \ |
| 36382 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 37793 | uint32x4_t __reint1_240 = (uint32x4_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_240, __p3_240), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_240, __p3_240), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_240, __p3_240), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_240, __p3_240)}; \ |
| 36383 | __ret; \ | 37794 | __ret_240 = __noswap_vcmlaq_rot90_f16(__rev0_240, __rev1_240, *(float16x8_t *) &__reint1_240); \ |
| | 37795 | __ret_240 = __builtin_shufflevector(__ret_240, __ret_240, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 37796 | __ret_240; \ |
| 36384 | }) | 37797 | }) |
| 36385 | #endif | 37798 | #endif |
| 36386 | | 37799 | |
| 36387 | #endif | 37800 | #if !defined(__aarch64__) |
| 36388 | #if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_SM4) && defined(__aarch64__) | | |
| 36389 | #ifdef __LITTLE_ENDIAN__ | | |
| 36390 | __ai uint32x4_t vsm4eq_u32(uint32x4_t __p0, uint32x4_t __p1) { | | |
| 36391 | uint32x4_t __ret; | | |
| 36392 | __ret = (uint32x4_t) __builtin_neon_vsm4eq_v((int8x16_t)__p0, (int8x16_t)__p1, 50); | | |
| 36393 | return __ret; | | |
| 36394 | } | | |
| 36395 | #else | | |
| 36396 | __ai uint32x4_t vsm4eq_u32(uint32x4_t __p0, uint32x4_t __p1) { | | |
| 36397 | uint32x4_t __ret; | | |
| 36398 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 36399 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 36400 | __ret = (uint32x4_t) __builtin_neon_vsm4eq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50); | | |
| 36401 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 36402 | return __ret; | | |
| 36403 | } | | |
| 36404 | #endif | | |
| 36405 | | | |
| 36406 | #ifdef __LITTLE_ENDIAN__ | | |
| 36407 | __ai uint32x4_t vsm4ekeyq_u32(uint32x4_t __p0, uint32x4_t __p1) { | | |
| 36408 | uint32x4_t __ret; | | |
| 36409 | __ret = (uint32x4_t) __builtin_neon_vsm4ekeyq_v((int8x16_t)__p0, (int8x16_t)__p1, 50); | | |
| 36410 | return __ret; | | |
| 36411 | } | | |
| 36412 | #else | | |
| 36413 | __ai uint32x4_t vsm4ekeyq_u32(uint32x4_t __p0, uint32x4_t __p1) { | | |
| 36414 | uint32x4_t __ret; | | |
| 36415 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 36416 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 36417 | __ret = (uint32x4_t) __builtin_neon_vsm4ekeyq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50); | | |
| 36418 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 36419 | return __ret; | | |
| 36420 | } | | |
| 36421 | #endif | | |
| 36422 | | | |
| 36423 | #endif | | |
| 36424 | #if __ARM_ARCH >= 8 && defined(__aarch64__) | | |
| 36425 | #ifdef __LITTLE_ENDIAN__ | 37801 | #ifdef __LITTLE_ENDIAN__ |
| 36426 | __ai int64x2_t vcvtaq_s64_f64(float64x2_t __p0) { | 37802 | #define vqdmulhq_lane_s32(__p0_241, __p1_241, __p2_241) __extension__ ({ \ |
| 36427 | int64x2_t __ret; | 37803 | int32x4_t __ret_241; \ |
| 36428 | __ret = (int64x2_t) __builtin_neon_vcvtaq_s64_v((int8x16_t)__p0, 35); | 37804 | int32x4_t __s0_241 = __p0_241; \ |
| 36429 | return __ret; | 37805 | int32x2_t __s1_241 = __p1_241; \ |
| 36430 | } | 37806 | __ret_241 = vqdmulhq_s32(__s0_241, splatq_lane_s32(__s1_241, __p2_241)); \ |
| | 37807 | __ret_241; \ |
| | 37808 | }) |
| 36431 | #else | 37809 | #else |
| 36432 | __ai int64x2_t vcvtaq_s64_f64(float64x2_t __p0) { | 37810 | #define vqdmulhq_lane_s32(__p0_242, __p1_242, __p2_242) __extension__ ({ \ |
| 36433 | int64x2_t __ret; | 37811 | int32x4_t __ret_242; \ |
| 36434 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 37812 | int32x4_t __s0_242 = __p0_242; \ |
| 36435 | __ret = (int64x2_t) __builtin_neon_vcvtaq_s64_v((int8x16_t)__rev0, 35); | 37813 | int32x2_t __s1_242 = __p1_242; \ |
| 36436 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 37814 | int32x4_t __rev0_242; __rev0_242 = __builtin_shufflevector(__s0_242, __s0_242, 3, 2, 1, 0); \ |
| 36437 | return __ret; | 37815 | int32x2_t __rev1_242; __rev1_242 = __builtin_shufflevector(__s1_242, __s1_242, 1, 0); \ |
| 36438 | } | 37816 | __ret_242 = __noswap_vqdmulhq_s32(__rev0_242, __noswap_splatq_lane_s32(__rev1_242, __p2_242)); \ |
| | 37817 | __ret_242 = __builtin_shufflevector(__ret_242, __ret_242, 3, 2, 1, 0); \ |
| | 37818 | __ret_242; \ |
| | 37819 | }) |
| 36439 | #endif | 37820 | #endif |
| 36440 | | 37821 | |
| 36441 | __ai int64x1_t vcvta_s64_f64(float64x1_t __p0) { | | |
| 36442 | int64x1_t __ret; | | |
| 36443 | __ret = (int64x1_t) __builtin_neon_vcvta_s64_v((int8x8_t)__p0, 3); | | |
| 36444 | return __ret; | | |
| 36445 | } | | |
| 36446 | #ifdef __LITTLE_ENDIAN__ | 37822 | #ifdef __LITTLE_ENDIAN__ |
| 36447 | __ai uint64x2_t vcvtaq_u64_f64(float64x2_t __p0) { | 37823 | #define vqdmulhq_lane_s16(__p0_243, __p1_243, __p2_243) __extension__ ({ \ |
| 36448 | uint64x2_t __ret; | 37824 | int16x8_t __ret_243; \ |
| 36449 | __ret = (uint64x2_t) __builtin_neon_vcvtaq_u64_v((int8x16_t)__p0, 51); | 37825 | int16x8_t __s0_243 = __p0_243; \ |
| 36450 | return __ret; | 37826 | int16x4_t __s1_243 = __p1_243; \ |
| 36451 | } | 37827 | __ret_243 = vqdmulhq_s16(__s0_243, splatq_lane_s16(__s1_243, __p2_243)); \ |
| | 37828 | __ret_243; \ |
| | 37829 | }) |
| 36452 | #else | 37830 | #else |
| 36453 | __ai uint64x2_t vcvtaq_u64_f64(float64x2_t __p0) { | 37831 | #define vqdmulhq_lane_s16(__p0_244, __p1_244, __p2_244) __extension__ ({ \ |
| 36454 | uint64x2_t __ret; | 37832 | int16x8_t __ret_244; \ |
| 36455 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 37833 | int16x8_t __s0_244 = __p0_244; \ |
| 36456 | __ret = (uint64x2_t) __builtin_neon_vcvtaq_u64_v((int8x16_t)__rev0, 51); | 37834 | int16x4_t __s1_244 = __p1_244; \ |
| 36457 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 37835 | int16x8_t __rev0_244; __rev0_244 = __builtin_shufflevector(__s0_244, __s0_244, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36458 | return __ret; | 37836 | int16x4_t __rev1_244; __rev1_244 = __builtin_shufflevector(__s1_244, __s1_244, 3, 2, 1, 0); \ |
| 36459 | } | 37837 | __ret_244 = __noswap_vqdmulhq_s16(__rev0_244, __noswap_splatq_lane_s16(__rev1_244, __p2_244)); \ |
| | 37838 | __ret_244 = __builtin_shufflevector(__ret_244, __ret_244, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 37839 | __ret_244; \ |
| | 37840 | }) |
| 36460 | #endif | 37841 | #endif |
| 36461 | | 37842 | |
| 36462 | __ai uint64x1_t vcvta_u64_f64(float64x1_t __p0) { | | |
| 36463 | uint64x1_t __ret; | | |
| 36464 | __ret = (uint64x1_t) __builtin_neon_vcvta_u64_v((int8x8_t)__p0, 19); | | |
| 36465 | return __ret; | | |
| 36466 | } | | |
| 36467 | #ifdef __LITTLE_ENDIAN__ | 37843 | #ifdef __LITTLE_ENDIAN__ |
| 36468 | __ai int64x2_t vcvtmq_s64_f64(float64x2_t __p0) { | 37844 | #define vqdmulh_lane_s32(__p0_245, __p1_245, __p2_245) __extension__ ({ \ |
| 36469 | int64x2_t __ret; | 37845 | int32x2_t __ret_245; \ |
| 36470 | __ret = (int64x2_t) __builtin_neon_vcvtmq_s64_v((int8x16_t)__p0, 35); | 37846 | int32x2_t __s0_245 = __p0_245; \ |
| 36471 | return __ret; | 37847 | int32x2_t __s1_245 = __p1_245; \ |
| 36472 | } | 37848 | __ret_245 = vqdmulh_s32(__s0_245, splat_lane_s32(__s1_245, __p2_245)); \ |
| | 37849 | __ret_245; \ |
| | 37850 | }) |
| 36473 | #else | 37851 | #else |
| 36474 | __ai int64x2_t vcvtmq_s64_f64(float64x2_t __p0) { | 37852 | #define vqdmulh_lane_s32(__p0_246, __p1_246, __p2_246) __extension__ ({ \ |
| 36475 | int64x2_t __ret; | 37853 | int32x2_t __ret_246; \ |
| 36476 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 37854 | int32x2_t __s0_246 = __p0_246; \ |
| 36477 | __ret = (int64x2_t) __builtin_neon_vcvtmq_s64_v((int8x16_t)__rev0, 35); | 37855 | int32x2_t __s1_246 = __p1_246; \ |
| 36478 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 37856 | int32x2_t __rev0_246; __rev0_246 = __builtin_shufflevector(__s0_246, __s0_246, 1, 0); \ |
| 36479 | return __ret; | 37857 | int32x2_t __rev1_246; __rev1_246 = __builtin_shufflevector(__s1_246, __s1_246, 1, 0); \ |
| 36480 | } | 37858 | __ret_246 = __noswap_vqdmulh_s32(__rev0_246, __noswap_splat_lane_s32(__rev1_246, __p2_246)); \ |
| | 37859 | __ret_246 = __builtin_shufflevector(__ret_246, __ret_246, 1, 0); \ |
| | 37860 | __ret_246; \ |
| | 37861 | }) |
| 36481 | #endif | 37862 | #endif |
| 36482 | | 37863 | |
| 36483 | __ai int64x1_t vcvtm_s64_f64(float64x1_t __p0) { | | |
| 36484 | int64x1_t __ret; | | |
| 36485 | __ret = (int64x1_t) __builtin_neon_vcvtm_s64_v((int8x8_t)__p0, 3); | | |
| 36486 | return __ret; | | |
| 36487 | } | | |
| 36488 | #ifdef __LITTLE_ENDIAN__ | 37864 | #ifdef __LITTLE_ENDIAN__ |
| 36489 | __ai uint64x2_t vcvtmq_u64_f64(float64x2_t __p0) { | 37865 | #define vqdmulh_lane_s16(__p0_247, __p1_247, __p2_247) __extension__ ({ \ |
| 36490 | uint64x2_t __ret; | 37866 | int16x4_t __ret_247; \ |
| 36491 | __ret = (uint64x2_t) __builtin_neon_vcvtmq_u64_v((int8x16_t)__p0, 51); | 37867 | int16x4_t __s0_247 = __p0_247; \ |
| 36492 | return __ret; | 37868 | int16x4_t __s1_247 = __p1_247; \ |
| 36493 | } | 37869 | __ret_247 = vqdmulh_s16(__s0_247, splat_lane_s16(__s1_247, __p2_247)); \ |
| | 37870 | __ret_247; \ |
| | 37871 | }) |
| 36494 | #else | 37872 | #else |
| 36495 | __ai uint64x2_t vcvtmq_u64_f64(float64x2_t __p0) { | 37873 | #define vqdmulh_lane_s16(__p0_248, __p1_248, __p2_248) __extension__ ({ \ |
| 36496 | uint64x2_t __ret; | 37874 | int16x4_t __ret_248; \ |
| 36497 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 37875 | int16x4_t __s0_248 = __p0_248; \ |
| 36498 | __ret = (uint64x2_t) __builtin_neon_vcvtmq_u64_v((int8x16_t)__rev0, 51); | 37876 | int16x4_t __s1_248 = __p1_248; \ |
| 36499 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 37877 | int16x4_t __rev0_248; __rev0_248 = __builtin_shufflevector(__s0_248, __s0_248, 3, 2, 1, 0); \ |
| 36500 | return __ret; | 37878 | int16x4_t __rev1_248; __rev1_248 = __builtin_shufflevector(__s1_248, __s1_248, 3, 2, 1, 0); \ |
| 36501 | } | 37879 | __ret_248 = __noswap_vqdmulh_s16(__rev0_248, __noswap_splat_lane_s16(__rev1_248, __p2_248)); \ |
| | 37880 | __ret_248 = __builtin_shufflevector(__ret_248, __ret_248, 3, 2, 1, 0); \ |
| | 37881 | __ret_248; \ |
| | 37882 | }) |
| 36502 | #endif | 37883 | #endif |
| 36503 | | 37884 | |
| 36504 | __ai uint64x1_t vcvtm_u64_f64(float64x1_t __p0) { | | |
| 36505 | uint64x1_t __ret; | | |
| 36506 | __ret = (uint64x1_t) __builtin_neon_vcvtm_u64_v((int8x8_t)__p0, 19); | | |
| 36507 | return __ret; | | |
| 36508 | } | | |
| 36509 | #ifdef __LITTLE_ENDIAN__ | 37885 | #ifdef __LITTLE_ENDIAN__ |
| 36510 | __ai int64x2_t vcvtnq_s64_f64(float64x2_t __p0) { | 37886 | #define vqrdmulhq_lane_s32(__p0_249, __p1_249, __p2_249) __extension__ ({ \ |
| 36511 | int64x2_t __ret; | 37887 | int32x4_t __ret_249; \ |
| 36512 | __ret = (int64x2_t) __builtin_neon_vcvtnq_s64_v((int8x16_t)__p0, 35); | 37888 | int32x4_t __s0_249 = __p0_249; \ |
| 36513 | return __ret; | 37889 | int32x2_t __s1_249 = __p1_249; \ |
| 36514 | } | 37890 | __ret_249 = vqrdmulhq_s32(__s0_249, splatq_lane_s32(__s1_249, __p2_249)); \ |
| | 37891 | __ret_249; \ |
| | 37892 | }) |
| 36515 | #else | 37893 | #else |
| 36516 | __ai int64x2_t vcvtnq_s64_f64(float64x2_t __p0) { | 37894 | #define vqrdmulhq_lane_s32(__p0_250, __p1_250, __p2_250) __extension__ ({ \ |
| 36517 | int64x2_t __ret; | 37895 | int32x4_t __ret_250; \ |
| 36518 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 37896 | int32x4_t __s0_250 = __p0_250; \ |
| 36519 | __ret = (int64x2_t) __builtin_neon_vcvtnq_s64_v((int8x16_t)__rev0, 35); | 37897 | int32x2_t __s1_250 = __p1_250; \ |
| 36520 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 37898 | int32x4_t __rev0_250; __rev0_250 = __builtin_shufflevector(__s0_250, __s0_250, 3, 2, 1, 0); \ |
| 36521 | return __ret; | 37899 | int32x2_t __rev1_250; __rev1_250 = __builtin_shufflevector(__s1_250, __s1_250, 1, 0); \ |
| 36522 | } | 37900 | __ret_250 = __noswap_vqrdmulhq_s32(__rev0_250, __noswap_splatq_lane_s32(__rev1_250, __p2_250)); \ |
| | 37901 | __ret_250 = __builtin_shufflevector(__ret_250, __ret_250, 3, 2, 1, 0); \ |
| | 37902 | __ret_250; \ |
| | 37903 | }) |
| 36523 | #endif | 37904 | #endif |
| 36524 | | 37905 | |
| 36525 | __ai int64x1_t vcvtn_s64_f64(float64x1_t __p0) { | | |
| 36526 | int64x1_t __ret; | | |
| 36527 | __ret = (int64x1_t) __builtin_neon_vcvtn_s64_v((int8x8_t)__p0, 3); | | |
| 36528 | return __ret; | | |
| 36529 | } | | |
| 36530 | #ifdef __LITTLE_ENDIAN__ | 37906 | #ifdef __LITTLE_ENDIAN__ |
| 36531 | __ai uint64x2_t vcvtnq_u64_f64(float64x2_t __p0) { | 37907 | #define vqrdmulhq_lane_s16(__p0_251, __p1_251, __p2_251) __extension__ ({ \ |
| 36532 | uint64x2_t __ret; | 37908 | int16x8_t __ret_251; \ |
| 36533 | __ret = (uint64x2_t) __builtin_neon_vcvtnq_u64_v((int8x16_t)__p0, 51); | 37909 | int16x8_t __s0_251 = __p0_251; \ |
| 36534 | return __ret; | 37910 | int16x4_t __s1_251 = __p1_251; \ |
| 36535 | } | 37911 | __ret_251 = vqrdmulhq_s16(__s0_251, splatq_lane_s16(__s1_251, __p2_251)); \ |
| | 37912 | __ret_251; \ |
| | 37913 | }) |
| 36536 | #else | 37914 | #else |
| 36537 | __ai uint64x2_t vcvtnq_u64_f64(float64x2_t __p0) { | 37915 | #define vqrdmulhq_lane_s16(__p0_252, __p1_252, __p2_252) __extension__ ({ \ |
| 36538 | uint64x2_t __ret; | 37916 | int16x8_t __ret_252; \ |
| 36539 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 37917 | int16x8_t __s0_252 = __p0_252; \ |
| 36540 | __ret = (uint64x2_t) __builtin_neon_vcvtnq_u64_v((int8x16_t)__rev0, 51); | 37918 | int16x4_t __s1_252 = __p1_252; \ |
| 36541 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 37919 | int16x8_t __rev0_252; __rev0_252 = __builtin_shufflevector(__s0_252, __s0_252, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36542 | return __ret; | 37920 | int16x4_t __rev1_252; __rev1_252 = __builtin_shufflevector(__s1_252, __s1_252, 3, 2, 1, 0); \ |
| 36543 | } | 37921 | __ret_252 = __noswap_vqrdmulhq_s16(__rev0_252, __noswap_splatq_lane_s16(__rev1_252, __p2_252)); \ |
| | 37922 | __ret_252 = __builtin_shufflevector(__ret_252, __ret_252, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 37923 | __ret_252; \ |
| | 37924 | }) |
| 36544 | #endif | 37925 | #endif |
| 36545 | | 37926 | |
| 36546 | __ai uint64x1_t vcvtn_u64_f64(float64x1_t __p0) { | | |
| 36547 | uint64x1_t __ret; | | |
| 36548 | __ret = (uint64x1_t) __builtin_neon_vcvtn_u64_v((int8x8_t)__p0, 19); | | |
| 36549 | return __ret; | | |
| 36550 | } | | |
| 36551 | #ifdef __LITTLE_ENDIAN__ | 37927 | #ifdef __LITTLE_ENDIAN__ |
| 36552 | __ai int64x2_t vcvtpq_s64_f64(float64x2_t __p0) { | 37928 | #define vqrdmulh_lane_s32(__p0_253, __p1_253, __p2_253) __extension__ ({ \ |
| 36553 | int64x2_t __ret; | 37929 | int32x2_t __ret_253; \ |
| 36554 | __ret = (int64x2_t) __builtin_neon_vcvtpq_s64_v((int8x16_t)__p0, 35); | 37930 | int32x2_t __s0_253 = __p0_253; \ |
| 36555 | return __ret; | 37931 | int32x2_t __s1_253 = __p1_253; \ |
| 36556 | } | 37932 | __ret_253 = vqrdmulh_s32(__s0_253, splat_lane_s32(__s1_253, __p2_253)); \ |
| | 37933 | __ret_253; \ |
| | 37934 | }) |
| 36557 | #else | 37935 | #else |
| 36558 | __ai int64x2_t vcvtpq_s64_f64(float64x2_t __p0) { | 37936 | #define vqrdmulh_lane_s32(__p0_254, __p1_254, __p2_254) __extension__ ({ \ |
| 36559 | int64x2_t __ret; | 37937 | int32x2_t __ret_254; \ |
| 36560 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 37938 | int32x2_t __s0_254 = __p0_254; \ |
| 36561 | __ret = (int64x2_t) __builtin_neon_vcvtpq_s64_v((int8x16_t)__rev0, 35); | 37939 | int32x2_t __s1_254 = __p1_254; \ |
| 36562 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 37940 | int32x2_t __rev0_254; __rev0_254 = __builtin_shufflevector(__s0_254, __s0_254, 1, 0); \ |
| 36563 | return __ret; | 37941 | int32x2_t __rev1_254; __rev1_254 = __builtin_shufflevector(__s1_254, __s1_254, 1, 0); \ |
| 36564 | } | 37942 | __ret_254 = __noswap_vqrdmulh_s32(__rev0_254, __noswap_splat_lane_s32(__rev1_254, __p2_254)); \ |
| | 37943 | __ret_254 = __builtin_shufflevector(__ret_254, __ret_254, 1, 0); \ |
| | 37944 | __ret_254; \ |
| | 37945 | }) |
| 36565 | #endif | 37946 | #endif |
| 36566 | | 37947 | |
| 36567 | __ai int64x1_t vcvtp_s64_f64(float64x1_t __p0) { | | |
| 36568 | int64x1_t __ret; | | |
| 36569 | __ret = (int64x1_t) __builtin_neon_vcvtp_s64_v((int8x8_t)__p0, 3); | | |
| 36570 | return __ret; | | |
| 36571 | } | | |
| 36572 | #ifdef __LITTLE_ENDIAN__ | 37948 | #ifdef __LITTLE_ENDIAN__ |
| 36573 | __ai uint64x2_t vcvtpq_u64_f64(float64x2_t __p0) { | 37949 | #define vqrdmulh_lane_s16(__p0_255, __p1_255, __p2_255) __extension__ ({ \ |
| 36574 | uint64x2_t __ret; | 37950 | int16x4_t __ret_255; \ |
| 36575 | __ret = (uint64x2_t) __builtin_neon_vcvtpq_u64_v((int8x16_t)__p0, 51); | 37951 | int16x4_t __s0_255 = __p0_255; \ |
| 36576 | return __ret; | 37952 | int16x4_t __s1_255 = __p1_255; \ |
| 36577 | } | 37953 | __ret_255 = vqrdmulh_s16(__s0_255, splat_lane_s16(__s1_255, __p2_255)); \ |
| | 37954 | __ret_255; \ |
| | 37955 | }) |
| 36578 | #else | 37956 | #else |
| 36579 | __ai uint64x2_t vcvtpq_u64_f64(float64x2_t __p0) { | 37957 | #define vqrdmulh_lane_s16(__p0_256, __p1_256, __p2_256) __extension__ ({ \ |
| 36580 | uint64x2_t __ret; | 37958 | int16x4_t __ret_256; \ |
| 36581 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 37959 | int16x4_t __s0_256 = __p0_256; \ |
| 36582 | __ret = (uint64x2_t) __builtin_neon_vcvtpq_u64_v((int8x16_t)__rev0, 51); | 37960 | int16x4_t __s1_256 = __p1_256; \ |
| 36583 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 37961 | int16x4_t __rev0_256; __rev0_256 = __builtin_shufflevector(__s0_256, __s0_256, 3, 2, 1, 0); \ |
| 36584 | return __ret; | 37962 | int16x4_t __rev1_256; __rev1_256 = __builtin_shufflevector(__s1_256, __s1_256, 3, 2, 1, 0); \ |
| 36585 | } | 37963 | __ret_256 = __noswap_vqrdmulh_s16(__rev0_256, __noswap_splat_lane_s16(__rev1_256, __p2_256)); \ |
| | 37964 | __ret_256 = __builtin_shufflevector(__ret_256, __ret_256, 3, 2, 1, 0); \ |
| | 37965 | __ret_256; \ |
| | 37966 | }) |
| 36586 | #endif | 37967 | #endif |
| 36587 | | 37968 | |
| 36588 | __ai uint64x1_t vcvtp_u64_f64(float64x1_t __p0) { | | |
| 36589 | uint64x1_t __ret; | | |
| 36590 | __ret = (uint64x1_t) __builtin_neon_vcvtp_u64_v((int8x8_t)__p0, 19); | | |
| 36591 | return __ret; | | |
| 36592 | } | | |
| 36593 | __ai poly8x8_t vreinterpret_p8_p64(poly64x1_t __p0) { | | |
| 36594 | poly8x8_t __ret; | | |
| 36595 | __ret = (poly8x8_t)(__p0); | | |
| 36596 | return __ret; | | |
| 36597 | } | | |
| 36598 | __ai poly8x8_t vreinterpret_p8_p16(poly16x4_t __p0) { | 37969 | __ai poly8x8_t vreinterpret_p8_p16(poly16x4_t __p0) { |
| 36599 | poly8x8_t __ret; | 37970 | poly8x8_t __ret; |
| 36600 | __ret = (poly8x8_t)(__p0); | 37971 | __ret = (poly8x8_t)(__p0); |
| ... | @@ -36625,11 +37996,6 @@ __ai poly8x8_t vreinterpret_p8_s8(int8x8_t __p0) { | ... | @@ -36625,11 +37996,6 @@ __ai poly8x8_t vreinterpret_p8_s8(int8x8_t __p0) { |
| 36625 | __ret = (poly8x8_t)(__p0); | 37996 | __ret = (poly8x8_t)(__p0); |
| 36626 | return __ret; | 37997 | return __ret; |
| 36627 | } | 37998 | } |
| 36628 | __ai poly8x8_t vreinterpret_p8_f64(float64x1_t __p0) { | | |
| 36629 | poly8x8_t __ret; | | |
| 36630 | __ret = (poly8x8_t)(__p0); | | |
| 36631 | return __ret; | | |
| 36632 | } | | |
| 36633 | __ai poly8x8_t vreinterpret_p8_f32(float32x2_t __p0) { | 37999 | __ai poly8x8_t vreinterpret_p8_f32(float32x2_t __p0) { |
| 36634 | poly8x8_t __ret; | 38000 | poly8x8_t __ret; |
| 36635 | __ret = (poly8x8_t)(__p0); | 38001 | __ret = (poly8x8_t)(__p0); |
| ... | @@ -36655,81 +38021,11 @@ __ai poly8x8_t vreinterpret_p8_s16(int16x4_t __p0) { | ... | @@ -36655,81 +38021,11 @@ __ai poly8x8_t vreinterpret_p8_s16(int16x4_t __p0) { |
| 36655 | __ret = (poly8x8_t)(__p0); | 38021 | __ret = (poly8x8_t)(__p0); |
| 36656 | return __ret; | 38022 | return __ret; |
| 36657 | } | 38023 | } |
| 36658 | __ai poly64x1_t vreinterpret_p64_p8(poly8x8_t __p0) { | | |
| 36659 | poly64x1_t __ret; | | |
| 36660 | __ret = (poly64x1_t)(__p0); | | |
| 36661 | return __ret; | | |
| 36662 | } | | |
| 36663 | __ai poly64x1_t vreinterpret_p64_p16(poly16x4_t __p0) { | | |
| 36664 | poly64x1_t __ret; | | |
| 36665 | __ret = (poly64x1_t)(__p0); | | |
| 36666 | return __ret; | | |
| 36667 | } | | |
| 36668 | __ai poly64x1_t vreinterpret_p64_u8(uint8x8_t __p0) { | | |
| 36669 | poly64x1_t __ret; | | |
| 36670 | __ret = (poly64x1_t)(__p0); | | |
| 36671 | return __ret; | | |
| 36672 | } | | |
| 36673 | __ai poly64x1_t vreinterpret_p64_u32(uint32x2_t __p0) { | | |
| 36674 | poly64x1_t __ret; | | |
| 36675 | __ret = (poly64x1_t)(__p0); | | |
| 36676 | return __ret; | | |
| 36677 | } | | |
| 36678 | __ai poly64x1_t vreinterpret_p64_u64(uint64x1_t __p0) { | | |
| 36679 | poly64x1_t __ret; | | |
| 36680 | __ret = (poly64x1_t)(__p0); | | |
| 36681 | return __ret; | | |
| 36682 | } | | |
| 36683 | __ai poly64x1_t vreinterpret_p64_u16(uint16x4_t __p0) { | | |
| 36684 | poly64x1_t __ret; | | |
| 36685 | __ret = (poly64x1_t)(__p0); | | |
| 36686 | return __ret; | | |
| 36687 | } | | |
| 36688 | __ai poly64x1_t vreinterpret_p64_s8(int8x8_t __p0) { | | |
| 36689 | poly64x1_t __ret; | | |
| 36690 | __ret = (poly64x1_t)(__p0); | | |
| 36691 | return __ret; | | |
| 36692 | } | | |
| 36693 | __ai poly64x1_t vreinterpret_p64_f64(float64x1_t __p0) { | | |
| 36694 | poly64x1_t __ret; | | |
| 36695 | __ret = (poly64x1_t)(__p0); | | |
| 36696 | return __ret; | | |
| 36697 | } | | |
| 36698 | __ai poly64x1_t vreinterpret_p64_f32(float32x2_t __p0) { | | |
| 36699 | poly64x1_t __ret; | | |
| 36700 | __ret = (poly64x1_t)(__p0); | | |
| 36701 | return __ret; | | |
| 36702 | } | | |
| 36703 | __ai poly64x1_t vreinterpret_p64_f16(float16x4_t __p0) { | | |
| 36704 | poly64x1_t __ret; | | |
| 36705 | __ret = (poly64x1_t)(__p0); | | |
| 36706 | return __ret; | | |
| 36707 | } | | |
| 36708 | __ai poly64x1_t vreinterpret_p64_s32(int32x2_t __p0) { | | |
| 36709 | poly64x1_t __ret; | | |
| 36710 | __ret = (poly64x1_t)(__p0); | | |
| 36711 | return __ret; | | |
| 36712 | } | | |
| 36713 | __ai poly64x1_t vreinterpret_p64_s64(int64x1_t __p0) { | | |
| 36714 | poly64x1_t __ret; | | |
| 36715 | __ret = (poly64x1_t)(__p0); | | |
| 36716 | return __ret; | | |
| 36717 | } | | |
| 36718 | __ai poly64x1_t vreinterpret_p64_s16(int16x4_t __p0) { | | |
| 36719 | poly64x1_t __ret; | | |
| 36720 | __ret = (poly64x1_t)(__p0); | | |
| 36721 | return __ret; | | |
| 36722 | } | | |
| 36723 | __ai poly16x4_t vreinterpret_p16_p8(poly8x8_t __p0) { | 38024 | __ai poly16x4_t vreinterpret_p16_p8(poly8x8_t __p0) { |
| 36724 | poly16x4_t __ret; | 38025 | poly16x4_t __ret; |
| 36725 | __ret = (poly16x4_t)(__p0); | 38026 | __ret = (poly16x4_t)(__p0); |
| 36726 | return __ret; | 38027 | return __ret; |
| 36727 | } | 38028 | } |
| 36728 | __ai poly16x4_t vreinterpret_p16_p64(poly64x1_t __p0) { | | |
| 36729 | poly16x4_t __ret; | | |
| 36730 | __ret = (poly16x4_t)(__p0); | | |
| 36731 | return __ret; | | |
| 36732 | } | | |
| 36733 | __ai poly16x4_t vreinterpret_p16_u8(uint8x8_t __p0) { | 38029 | __ai poly16x4_t vreinterpret_p16_u8(uint8x8_t __p0) { |
| 36734 | poly16x4_t __ret; | 38030 | poly16x4_t __ret; |
| 36735 | __ret = (poly16x4_t)(__p0); | 38031 | __ret = (poly16x4_t)(__p0); |
| ... | @@ -36755,11 +38051,6 @@ __ai poly16x4_t vreinterpret_p16_s8(int8x8_t __p0) { | ... | @@ -36755,11 +38051,6 @@ __ai poly16x4_t vreinterpret_p16_s8(int8x8_t __p0) { |
| 36755 | __ret = (poly16x4_t)(__p0); | 38051 | __ret = (poly16x4_t)(__p0); |
| 36756 | return __ret; | 38052 | return __ret; |
| 36757 | } | 38053 | } |
| 36758 | __ai poly16x4_t vreinterpret_p16_f64(float64x1_t __p0) { | | |
| 36759 | poly16x4_t __ret; | | |
| 36760 | __ret = (poly16x4_t)(__p0); | | |
| 36761 | return __ret; | | |
| 36762 | } | | |
| 36763 | __ai poly16x4_t vreinterpret_p16_f32(float32x2_t __p0) { | 38054 | __ai poly16x4_t vreinterpret_p16_f32(float32x2_t __p0) { |
| 36764 | poly16x4_t __ret; | 38055 | poly16x4_t __ret; |
| 36765 | __ret = (poly16x4_t)(__p0); | 38056 | __ret = (poly16x4_t)(__p0); |
| ... | @@ -36785,16 +38076,6 @@ __ai poly16x4_t vreinterpret_p16_s16(int16x4_t __p0) { | ... | @@ -36785,16 +38076,6 @@ __ai poly16x4_t vreinterpret_p16_s16(int16x4_t __p0) { |
| 36785 | __ret = (poly16x4_t)(__p0); | 38076 | __ret = (poly16x4_t)(__p0); |
| 36786 | return __ret; | 38077 | return __ret; |
| 36787 | } | 38078 | } |
| 36788 | __ai poly8x16_t vreinterpretq_p8_p128(poly128_t __p0) { | | |
| 36789 | poly8x16_t __ret; | | |
| 36790 | __ret = (poly8x16_t)(__p0); | | |
| 36791 | return __ret; | | |
| 36792 | } | | |
| 36793 | __ai poly8x16_t vreinterpretq_p8_p64(poly64x2_t __p0) { | | |
| 36794 | poly8x16_t __ret; | | |
| 36795 | __ret = (poly8x16_t)(__p0); | | |
| 36796 | return __ret; | | |
| 36797 | } | | |
| 36798 | __ai poly8x16_t vreinterpretq_p8_p16(poly16x8_t __p0) { | 38079 | __ai poly8x16_t vreinterpretq_p8_p16(poly16x8_t __p0) { |
| 36799 | poly8x16_t __ret; | 38080 | poly8x16_t __ret; |
| 36800 | __ret = (poly8x16_t)(__p0); | 38081 | __ret = (poly8x16_t)(__p0); |
| ... | @@ -36825,11 +38106,6 @@ __ai poly8x16_t vreinterpretq_p8_s8(int8x16_t __p0) { | ... | @@ -36825,11 +38106,6 @@ __ai poly8x16_t vreinterpretq_p8_s8(int8x16_t __p0) { |
| 36825 | __ret = (poly8x16_t)(__p0); | 38106 | __ret = (poly8x16_t)(__p0); |
| 36826 | return __ret; | 38107 | return __ret; |
| 36827 | } | 38108 | } |
| 36828 | __ai poly8x16_t vreinterpretq_p8_f64(float64x2_t __p0) { | | |
| 36829 | poly8x16_t __ret; | | |
| 36830 | __ret = (poly8x16_t)(__p0); | | |
| 36831 | return __ret; | | |
| 36832 | } | | |
| 36833 | __ai poly8x16_t vreinterpretq_p8_f32(float32x4_t __p0) { | 38109 | __ai poly8x16_t vreinterpretq_p8_f32(float32x4_t __p0) { |
| 36834 | poly8x16_t __ret; | 38110 | poly8x16_t __ret; |
| 36835 | __ret = (poly8x16_t)(__p0); | 38111 | __ret = (poly8x16_t)(__p0); |
| ... | @@ -36855,161 +38131,11 @@ __ai poly8x16_t vreinterpretq_p8_s16(int16x8_t __p0) { | ... | @@ -36855,161 +38131,11 @@ __ai poly8x16_t vreinterpretq_p8_s16(int16x8_t __p0) { |
| 36855 | __ret = (poly8x16_t)(__p0); | 38131 | __ret = (poly8x16_t)(__p0); |
| 36856 | return __ret; | 38132 | return __ret; |
| 36857 | } | 38133 | } |
| 36858 | __ai poly128_t vreinterpretq_p128_p8(poly8x16_t __p0) { | | |
| 36859 | poly128_t __ret; | | |
| 36860 | __ret = (poly128_t)(__p0); | | |
| 36861 | return __ret; | | |
| 36862 | } | | |
| 36863 | __ai poly128_t vreinterpretq_p128_p64(poly64x2_t __p0) { | | |
| 36864 | poly128_t __ret; | | |
| 36865 | __ret = (poly128_t)(__p0); | | |
| 36866 | return __ret; | | |
| 36867 | } | | |
| 36868 | __ai poly128_t vreinterpretq_p128_p16(poly16x8_t __p0) { | | |
| 36869 | poly128_t __ret; | | |
| 36870 | __ret = (poly128_t)(__p0); | | |
| 36871 | return __ret; | | |
| 36872 | } | | |
| 36873 | __ai poly128_t vreinterpretq_p128_u8(uint8x16_t __p0) { | | |
| 36874 | poly128_t __ret; | | |
| 36875 | __ret = (poly128_t)(__p0); | | |
| 36876 | return __ret; | | |
| 36877 | } | | |
| 36878 | __ai poly128_t vreinterpretq_p128_u32(uint32x4_t __p0) { | | |
| 36879 | poly128_t __ret; | | |
| 36880 | __ret = (poly128_t)(__p0); | | |
| 36881 | return __ret; | | |
| 36882 | } | | |
| 36883 | __ai poly128_t vreinterpretq_p128_u64(uint64x2_t __p0) { | | |
| 36884 | poly128_t __ret; | | |
| 36885 | __ret = (poly128_t)(__p0); | | |
| 36886 | return __ret; | | |
| 36887 | } | | |
| 36888 | __ai poly128_t vreinterpretq_p128_u16(uint16x8_t __p0) { | | |
| 36889 | poly128_t __ret; | | |
| 36890 | __ret = (poly128_t)(__p0); | | |
| 36891 | return __ret; | | |
| 36892 | } | | |
| 36893 | __ai poly128_t vreinterpretq_p128_s8(int8x16_t __p0) { | | |
| 36894 | poly128_t __ret; | | |
| 36895 | __ret = (poly128_t)(__p0); | | |
| 36896 | return __ret; | | |
| 36897 | } | | |
| 36898 | __ai poly128_t vreinterpretq_p128_f64(float64x2_t __p0) { | | |
| 36899 | poly128_t __ret; | | |
| 36900 | __ret = (poly128_t)(__p0); | | |
| 36901 | return __ret; | | |
| 36902 | } | | |
| 36903 | __ai poly128_t vreinterpretq_p128_f32(float32x4_t __p0) { | | |
| 36904 | poly128_t __ret; | | |
| 36905 | __ret = (poly128_t)(__p0); | | |
| 36906 | return __ret; | | |
| 36907 | } | | |
| 36908 | __ai poly128_t vreinterpretq_p128_f16(float16x8_t __p0) { | | |
| 36909 | poly128_t __ret; | | |
| 36910 | __ret = (poly128_t)(__p0); | | |
| 36911 | return __ret; | | |
| 36912 | } | | |
| 36913 | __ai poly128_t vreinterpretq_p128_s32(int32x4_t __p0) { | | |
| 36914 | poly128_t __ret; | | |
| 36915 | __ret = (poly128_t)(__p0); | | |
| 36916 | return __ret; | | |
| 36917 | } | | |
| 36918 | __ai poly128_t vreinterpretq_p128_s64(int64x2_t __p0) { | | |
| 36919 | poly128_t __ret; | | |
| 36920 | __ret = (poly128_t)(__p0); | | |
| 36921 | return __ret; | | |
| 36922 | } | | |
| 36923 | __ai poly128_t vreinterpretq_p128_s16(int16x8_t __p0) { | | |
| 36924 | poly128_t __ret; | | |
| 36925 | __ret = (poly128_t)(__p0); | | |
| 36926 | return __ret; | | |
| 36927 | } | | |
| 36928 | __ai poly64x2_t vreinterpretq_p64_p8(poly8x16_t __p0) { | | |
| 36929 | poly64x2_t __ret; | | |
| 36930 | __ret = (poly64x2_t)(__p0); | | |
| 36931 | return __ret; | | |
| 36932 | } | | |
| 36933 | __ai poly64x2_t vreinterpretq_p64_p128(poly128_t __p0) { | | |
| 36934 | poly64x2_t __ret; | | |
| 36935 | __ret = (poly64x2_t)(__p0); | | |
| 36936 | return __ret; | | |
| 36937 | } | | |
| 36938 | __ai poly64x2_t vreinterpretq_p64_p16(poly16x8_t __p0) { | | |
| 36939 | poly64x2_t __ret; | | |
| 36940 | __ret = (poly64x2_t)(__p0); | | |
| 36941 | return __ret; | | |
| 36942 | } | | |
| 36943 | __ai poly64x2_t vreinterpretq_p64_u8(uint8x16_t __p0) { | | |
| 36944 | poly64x2_t __ret; | | |
| 36945 | __ret = (poly64x2_t)(__p0); | | |
| 36946 | return __ret; | | |
| 36947 | } | | |
| 36948 | __ai poly64x2_t vreinterpretq_p64_u32(uint32x4_t __p0) { | | |
| 36949 | poly64x2_t __ret; | | |
| 36950 | __ret = (poly64x2_t)(__p0); | | |
| 36951 | return __ret; | | |
| 36952 | } | | |
| 36953 | __ai poly64x2_t vreinterpretq_p64_u64(uint64x2_t __p0) { | | |
| 36954 | poly64x2_t __ret; | | |
| 36955 | __ret = (poly64x2_t)(__p0); | | |
| 36956 | return __ret; | | |
| 36957 | } | | |
| 36958 | __ai poly64x2_t vreinterpretq_p64_u16(uint16x8_t __p0) { | | |
| 36959 | poly64x2_t __ret; | | |
| 36960 | __ret = (poly64x2_t)(__p0); | | |
| 36961 | return __ret; | | |
| 36962 | } | | |
| 36963 | __ai poly64x2_t vreinterpretq_p64_s8(int8x16_t __p0) { | | |
| 36964 | poly64x2_t __ret; | | |
| 36965 | __ret = (poly64x2_t)(__p0); | | |
| 36966 | return __ret; | | |
| 36967 | } | | |
| 36968 | __ai poly64x2_t vreinterpretq_p64_f64(float64x2_t __p0) { | | |
| 36969 | poly64x2_t __ret; | | |
| 36970 | __ret = (poly64x2_t)(__p0); | | |
| 36971 | return __ret; | | |
| 36972 | } | | |
| 36973 | __ai poly64x2_t vreinterpretq_p64_f32(float32x4_t __p0) { | | |
| 36974 | poly64x2_t __ret; | | |
| 36975 | __ret = (poly64x2_t)(__p0); | | |
| 36976 | return __ret; | | |
| 36977 | } | | |
| 36978 | __ai poly64x2_t vreinterpretq_p64_f16(float16x8_t __p0) { | | |
| 36979 | poly64x2_t __ret; | | |
| 36980 | __ret = (poly64x2_t)(__p0); | | |
| 36981 | return __ret; | | |
| 36982 | } | | |
| 36983 | __ai poly64x2_t vreinterpretq_p64_s32(int32x4_t __p0) { | | |
| 36984 | poly64x2_t __ret; | | |
| 36985 | __ret = (poly64x2_t)(__p0); | | |
| 36986 | return __ret; | | |
| 36987 | } | | |
| 36988 | __ai poly64x2_t vreinterpretq_p64_s64(int64x2_t __p0) { | | |
| 36989 | poly64x2_t __ret; | | |
| 36990 | __ret = (poly64x2_t)(__p0); | | |
| 36991 | return __ret; | | |
| 36992 | } | | |
| 36993 | __ai poly64x2_t vreinterpretq_p64_s16(int16x8_t __p0) { | | |
| 36994 | poly64x2_t __ret; | | |
| 36995 | __ret = (poly64x2_t)(__p0); | | |
| 36996 | return __ret; | | |
| 36997 | } | | |
| 36998 | __ai poly16x8_t vreinterpretq_p16_p8(poly8x16_t __p0) { | 38134 | __ai poly16x8_t vreinterpretq_p16_p8(poly8x16_t __p0) { |
| 36999 | poly16x8_t __ret; | 38135 | poly16x8_t __ret; |
| 37000 | __ret = (poly16x8_t)(__p0); | 38136 | __ret = (poly16x8_t)(__p0); |
| 37001 | return __ret; | 38137 | return __ret; |
| 37002 | } | 38138 | } |
| 37003 | __ai poly16x8_t vreinterpretq_p16_p128(poly128_t __p0) { | | |
| 37004 | poly16x8_t __ret; | | |
| 37005 | __ret = (poly16x8_t)(__p0); | | |
| 37006 | return __ret; | | |
| 37007 | } | | |
| 37008 | __ai poly16x8_t vreinterpretq_p16_p64(poly64x2_t __p0) { | | |
| 37009 | poly16x8_t __ret; | | |
| 37010 | __ret = (poly16x8_t)(__p0); | | |
| 37011 | return __ret; | | |
| 37012 | } | | |
| 37013 | __ai poly16x8_t vreinterpretq_p16_u8(uint8x16_t __p0) { | 38139 | __ai poly16x8_t vreinterpretq_p16_u8(uint8x16_t __p0) { |
| 37014 | poly16x8_t __ret; | 38140 | poly16x8_t __ret; |
| 37015 | __ret = (poly16x8_t)(__p0); | 38141 | __ret = (poly16x8_t)(__p0); |
| ... | @@ -37035,11 +38161,6 @@ __ai poly16x8_t vreinterpretq_p16_s8(int8x16_t __p0) { | ... | @@ -37035,11 +38161,6 @@ __ai poly16x8_t vreinterpretq_p16_s8(int8x16_t __p0) { |
| 37035 | __ret = (poly16x8_t)(__p0); | 38161 | __ret = (poly16x8_t)(__p0); |
| 37036 | return __ret; | 38162 | return __ret; |
| 37037 | } | 38163 | } |
| 37038 | __ai poly16x8_t vreinterpretq_p16_f64(float64x2_t __p0) { | | |
| 37039 | poly16x8_t __ret; | | |
| 37040 | __ret = (poly16x8_t)(__p0); | | |
| 37041 | return __ret; | | |
| 37042 | } | | |
| 37043 | __ai poly16x8_t vreinterpretq_p16_f32(float32x4_t __p0) { | 38164 | __ai poly16x8_t vreinterpretq_p16_f32(float32x4_t __p0) { |
| 37044 | poly16x8_t __ret; | 38165 | poly16x8_t __ret; |
| 37045 | __ret = (poly16x8_t)(__p0); | 38166 | __ret = (poly16x8_t)(__p0); |
| ... | @@ -37070,16 +38191,6 @@ __ai uint8x16_t vreinterpretq_u8_p8(poly8x16_t __p0) { | ... | @@ -37070,16 +38191,6 @@ __ai uint8x16_t vreinterpretq_u8_p8(poly8x16_t __p0) { |
| 37070 | __ret = (uint8x16_t)(__p0); | 38191 | __ret = (uint8x16_t)(__p0); |
| 37071 | return __ret; | 38192 | return __ret; |
| 37072 | } | 38193 | } |
| 37073 | __ai uint8x16_t vreinterpretq_u8_p128(poly128_t __p0) { | | |
| 37074 | uint8x16_t __ret; | | |
| 37075 | __ret = (uint8x16_t)(__p0); | | |
| 37076 | return __ret; | | |
| 37077 | } | | |
| 37078 | __ai uint8x16_t vreinterpretq_u8_p64(poly64x2_t __p0) { | | |
| 37079 | uint8x16_t __ret; | | |
| 37080 | __ret = (uint8x16_t)(__p0); | | |
| 37081 | return __ret; | | |
| 37082 | } | | |
| 37083 | __ai uint8x16_t vreinterpretq_u8_p16(poly16x8_t __p0) { | 38194 | __ai uint8x16_t vreinterpretq_u8_p16(poly16x8_t __p0) { |
| 37084 | uint8x16_t __ret; | 38195 | uint8x16_t __ret; |
| 37085 | __ret = (uint8x16_t)(__p0); | 38196 | __ret = (uint8x16_t)(__p0); |
| ... | @@ -37105,11 +38216,6 @@ __ai uint8x16_t vreinterpretq_u8_s8(int8x16_t __p0) { | ... | @@ -37105,11 +38216,6 @@ __ai uint8x16_t vreinterpretq_u8_s8(int8x16_t __p0) { |
| 37105 | __ret = (uint8x16_t)(__p0); | 38216 | __ret = (uint8x16_t)(__p0); |
| 37106 | return __ret; | 38217 | return __ret; |
| 37107 | } | 38218 | } |
| 37108 | __ai uint8x16_t vreinterpretq_u8_f64(float64x2_t __p0) { | | |
| 37109 | uint8x16_t __ret; | | |
| 37110 | __ret = (uint8x16_t)(__p0); | | |
| 37111 | return __ret; | | |
| 37112 | } | | |
| 37113 | __ai uint8x16_t vreinterpretq_u8_f32(float32x4_t __p0) { | 38219 | __ai uint8x16_t vreinterpretq_u8_f32(float32x4_t __p0) { |
| 37114 | uint8x16_t __ret; | 38220 | uint8x16_t __ret; |
| 37115 | __ret = (uint8x16_t)(__p0); | 38221 | __ret = (uint8x16_t)(__p0); |
| ... | @@ -37140,16 +38246,6 @@ __ai uint32x4_t vreinterpretq_u32_p8(poly8x16_t __p0) { | ... | @@ -37140,16 +38246,6 @@ __ai uint32x4_t vreinterpretq_u32_p8(poly8x16_t __p0) { |
| 37140 | __ret = (uint32x4_t)(__p0); | 38246 | __ret = (uint32x4_t)(__p0); |
| 37141 | return __ret; | 38247 | return __ret; |
| 37142 | } | 38248 | } |
| 37143 | __ai uint32x4_t vreinterpretq_u32_p128(poly128_t __p0) { | | |
| 37144 | uint32x4_t __ret; | | |
| 37145 | __ret = (uint32x4_t)(__p0); | | |
| 37146 | return __ret; | | |
| 37147 | } | | |
| 37148 | __ai uint32x4_t vreinterpretq_u32_p64(poly64x2_t __p0) { | | |
| 37149 | uint32x4_t __ret; | | |
| 37150 | __ret = (uint32x4_t)(__p0); | | |
| 37151 | return __ret; | | |
| 37152 | } | | |
| 37153 | __ai uint32x4_t vreinterpretq_u32_p16(poly16x8_t __p0) { | 38249 | __ai uint32x4_t vreinterpretq_u32_p16(poly16x8_t __p0) { |
| 37154 | uint32x4_t __ret; | 38250 | uint32x4_t __ret; |
| 37155 | __ret = (uint32x4_t)(__p0); | 38251 | __ret = (uint32x4_t)(__p0); |
| ... | @@ -37175,11 +38271,6 @@ __ai uint32x4_t vreinterpretq_u32_s8(int8x16_t __p0) { | ... | @@ -37175,11 +38271,6 @@ __ai uint32x4_t vreinterpretq_u32_s8(int8x16_t __p0) { |
| 37175 | __ret = (uint32x4_t)(__p0); | 38271 | __ret = (uint32x4_t)(__p0); |
| 37176 | return __ret; | 38272 | return __ret; |
| 37177 | } | 38273 | } |
| 37178 | __ai uint32x4_t vreinterpretq_u32_f64(float64x2_t __p0) { | | |
| 37179 | uint32x4_t __ret; | | |
| 37180 | __ret = (uint32x4_t)(__p0); | | |
| 37181 | return __ret; | | |
| 37182 | } | | |
| 37183 | __ai uint32x4_t vreinterpretq_u32_f32(float32x4_t __p0) { | 38274 | __ai uint32x4_t vreinterpretq_u32_f32(float32x4_t __p0) { |
| 37184 | uint32x4_t __ret; | 38275 | uint32x4_t __ret; |
| 37185 | __ret = (uint32x4_t)(__p0); | 38276 | __ret = (uint32x4_t)(__p0); |
| ... | @@ -37210,16 +38301,6 @@ __ai uint64x2_t vreinterpretq_u64_p8(poly8x16_t __p0) { | ... | @@ -37210,16 +38301,6 @@ __ai uint64x2_t vreinterpretq_u64_p8(poly8x16_t __p0) { |
| 37210 | __ret = (uint64x2_t)(__p0); | 38301 | __ret = (uint64x2_t)(__p0); |
| 37211 | return __ret; | 38302 | return __ret; |
| 37212 | } | 38303 | } |
| 37213 | __ai uint64x2_t vreinterpretq_u64_p128(poly128_t __p0) { | | |
| 37214 | uint64x2_t __ret; | | |
| 37215 | __ret = (uint64x2_t)(__p0); | | |
| 37216 | return __ret; | | |
| 37217 | } | | |
| 37218 | __ai uint64x2_t vreinterpretq_u64_p64(poly64x2_t __p0) { | | |
| 37219 | uint64x2_t __ret; | | |
| 37220 | __ret = (uint64x2_t)(__p0); | | |
| 37221 | return __ret; | | |
| 37222 | } | | |
| 37223 | __ai uint64x2_t vreinterpretq_u64_p16(poly16x8_t __p0) { | 38304 | __ai uint64x2_t vreinterpretq_u64_p16(poly16x8_t __p0) { |
| 37224 | uint64x2_t __ret; | 38305 | uint64x2_t __ret; |
| 37225 | __ret = (uint64x2_t)(__p0); | 38306 | __ret = (uint64x2_t)(__p0); |
| ... | @@ -37245,11 +38326,6 @@ __ai uint64x2_t vreinterpretq_u64_s8(int8x16_t __p0) { | ... | @@ -37245,11 +38326,6 @@ __ai uint64x2_t vreinterpretq_u64_s8(int8x16_t __p0) { |
| 37245 | __ret = (uint64x2_t)(__p0); | 38326 | __ret = (uint64x2_t)(__p0); |
| 37246 | return __ret; | 38327 | return __ret; |
| 37247 | } | 38328 | } |
| 37248 | __ai uint64x2_t vreinterpretq_u64_f64(float64x2_t __p0) { | | |
| 37249 | uint64x2_t __ret; | | |
| 37250 | __ret = (uint64x2_t)(__p0); | | |
| 37251 | return __ret; | | |
| 37252 | } | | |
| 37253 | __ai uint64x2_t vreinterpretq_u64_f32(float32x4_t __p0) { | 38329 | __ai uint64x2_t vreinterpretq_u64_f32(float32x4_t __p0) { |
| 37254 | uint64x2_t __ret; | 38330 | uint64x2_t __ret; |
| 37255 | __ret = (uint64x2_t)(__p0); | 38331 | __ret = (uint64x2_t)(__p0); |
| ... | @@ -37280,16 +38356,6 @@ __ai uint16x8_t vreinterpretq_u16_p8(poly8x16_t __p0) { | ... | @@ -37280,16 +38356,6 @@ __ai uint16x8_t vreinterpretq_u16_p8(poly8x16_t __p0) { |
| 37280 | __ret = (uint16x8_t)(__p0); | 38356 | __ret = (uint16x8_t)(__p0); |
| 37281 | return __ret; | 38357 | return __ret; |
| 37282 | } | 38358 | } |
| 37283 | __ai uint16x8_t vreinterpretq_u16_p128(poly128_t __p0) { | | |
| 37284 | uint16x8_t __ret; | | |
| 37285 | __ret = (uint16x8_t)(__p0); | | |
| 37286 | return __ret; | | |
| 37287 | } | | |
| 37288 | __ai uint16x8_t vreinterpretq_u16_p64(poly64x2_t __p0) { | | |
| 37289 | uint16x8_t __ret; | | |
| 37290 | __ret = (uint16x8_t)(__p0); | | |
| 37291 | return __ret; | | |
| 37292 | } | | |
| 37293 | __ai uint16x8_t vreinterpretq_u16_p16(poly16x8_t __p0) { | 38359 | __ai uint16x8_t vreinterpretq_u16_p16(poly16x8_t __p0) { |
| 37294 | uint16x8_t __ret; | 38360 | uint16x8_t __ret; |
| 37295 | __ret = (uint16x8_t)(__p0); | 38361 | __ret = (uint16x8_t)(__p0); |
| ... | @@ -37315,11 +38381,6 @@ __ai uint16x8_t vreinterpretq_u16_s8(int8x16_t __p0) { | ... | @@ -37315,11 +38381,6 @@ __ai uint16x8_t vreinterpretq_u16_s8(int8x16_t __p0) { |
| 37315 | __ret = (uint16x8_t)(__p0); | 38381 | __ret = (uint16x8_t)(__p0); |
| 37316 | return __ret; | 38382 | return __ret; |
| 37317 | } | 38383 | } |
| 37318 | __ai uint16x8_t vreinterpretq_u16_f64(float64x2_t __p0) { | | |
| 37319 | uint16x8_t __ret; | | |
| 37320 | __ret = (uint16x8_t)(__p0); | | |
| 37321 | return __ret; | | |
| 37322 | } | | |
| 37323 | __ai uint16x8_t vreinterpretq_u16_f32(float32x4_t __p0) { | 38384 | __ai uint16x8_t vreinterpretq_u16_f32(float32x4_t __p0) { |
| 37324 | uint16x8_t __ret; | 38385 | uint16x8_t __ret; |
| 37325 | __ret = (uint16x8_t)(__p0); | 38386 | __ret = (uint16x8_t)(__p0); |
| ... | @@ -37350,16 +38411,6 @@ __ai int8x16_t vreinterpretq_s8_p8(poly8x16_t __p0) { | ... | @@ -37350,16 +38411,6 @@ __ai int8x16_t vreinterpretq_s8_p8(poly8x16_t __p0) { |
| 37350 | __ret = (int8x16_t)(__p0); | 38411 | __ret = (int8x16_t)(__p0); |
| 37351 | return __ret; | 38412 | return __ret; |
| 37352 | } | 38413 | } |
| 37353 | __ai int8x16_t vreinterpretq_s8_p128(poly128_t __p0) { | | |
| 37354 | int8x16_t __ret; | | |
| 37355 | __ret = (int8x16_t)(__p0); | | |
| 37356 | return __ret; | | |
| 37357 | } | | |
| 37358 | __ai int8x16_t vreinterpretq_s8_p64(poly64x2_t __p0) { | | |
| 37359 | int8x16_t __ret; | | |
| 37360 | __ret = (int8x16_t)(__p0); | | |
| 37361 | return __ret; | | |
| 37362 | } | | |
| 37363 | __ai int8x16_t vreinterpretq_s8_p16(poly16x8_t __p0) { | 38414 | __ai int8x16_t vreinterpretq_s8_p16(poly16x8_t __p0) { |
| 37364 | int8x16_t __ret; | 38415 | int8x16_t __ret; |
| 37365 | __ret = (int8x16_t)(__p0); | 38416 | __ret = (int8x16_t)(__p0); |
| ... | @@ -37385,11 +38436,6 @@ __ai int8x16_t vreinterpretq_s8_u16(uint16x8_t __p0) { | ... | @@ -37385,11 +38436,6 @@ __ai int8x16_t vreinterpretq_s8_u16(uint16x8_t __p0) { |
| 37385 | __ret = (int8x16_t)(__p0); | 38436 | __ret = (int8x16_t)(__p0); |
| 37386 | return __ret; | 38437 | return __ret; |
| 37387 | } | 38438 | } |
| 37388 | __ai int8x16_t vreinterpretq_s8_f64(float64x2_t __p0) { | | |
| 37389 | int8x16_t __ret; | | |
| 37390 | __ret = (int8x16_t)(__p0); | | |
| 37391 | return __ret; | | |
| 37392 | } | | |
| 37393 | __ai int8x16_t vreinterpretq_s8_f32(float32x4_t __p0) { | 38439 | __ai int8x16_t vreinterpretq_s8_f32(float32x4_t __p0) { |
| 37394 | int8x16_t __ret; | 38440 | int8x16_t __ret; |
| 37395 | __ret = (int8x16_t)(__p0); | 38441 | __ret = (int8x16_t)(__p0); |
| ... | @@ -37399,103 +38445,23 @@ __ai int8x16_t vreinterpretq_s8_f16(float16x8_t __p0) { | ... | @@ -37399,103 +38445,23 @@ __ai int8x16_t vreinterpretq_s8_f16(float16x8_t __p0) { |
| 37399 | int8x16_t __ret; | 38445 | int8x16_t __ret; |
| 37400 | __ret = (int8x16_t)(__p0); | 38446 | __ret = (int8x16_t)(__p0); |
| 37401 | return __ret; | 38447 | return __ret; |
| 37402 | } | 38448 | } |
| 37403 | __ai int8x16_t vreinterpretq_s8_s32(int32x4_t __p0) { | 38449 | __ai int8x16_t vreinterpretq_s8_s32(int32x4_t __p0) { |
| 37404 | int8x16_t __ret; | 38450 | int8x16_t __ret; |
| 37405 | __ret = (int8x16_t)(__p0); | 38451 | __ret = (int8x16_t)(__p0); |
| 37406 | return __ret; | | |
| 37407 | } | | |
| 37408 | __ai int8x16_t vreinterpretq_s8_s64(int64x2_t __p0) { | | |
| 37409 | int8x16_t __ret; | | |
| 37410 | __ret = (int8x16_t)(__p0); | | |
| 37411 | return __ret; | | |
| 37412 | } | | |
| 37413 | __ai int8x16_t vreinterpretq_s8_s16(int16x8_t __p0) { | | |
| 37414 | int8x16_t __ret; | | |
| 37415 | __ret = (int8x16_t)(__p0); | | |
| 37416 | return __ret; | | |
| 37417 | } | | |
| 37418 | __ai float64x2_t vreinterpretq_f64_p8(poly8x16_t __p0) { | | |
| 37419 | float64x2_t __ret; | | |
| 37420 | __ret = (float64x2_t)(__p0); | | |
| 37421 | return __ret; | | |
| 37422 | } | | |
| 37423 | __ai float64x2_t vreinterpretq_f64_p128(poly128_t __p0) { | | |
| 37424 | float64x2_t __ret; | | |
| 37425 | __ret = (float64x2_t)(__p0); | | |
| 37426 | return __ret; | | |
| 37427 | } | | |
| 37428 | __ai float64x2_t vreinterpretq_f64_p64(poly64x2_t __p0) { | | |
| 37429 | float64x2_t __ret; | | |
| 37430 | __ret = (float64x2_t)(__p0); | | |
| 37431 | return __ret; | | |
| 37432 | } | | |
| 37433 | __ai float64x2_t vreinterpretq_f64_p16(poly16x8_t __p0) { | | |
| 37434 | float64x2_t __ret; | | |
| 37435 | __ret = (float64x2_t)(__p0); | | |
| 37436 | return __ret; | | |
| 37437 | } | | |
| 37438 | __ai float64x2_t vreinterpretq_f64_u8(uint8x16_t __p0) { | | |
| 37439 | float64x2_t __ret; | | |
| 37440 | __ret = (float64x2_t)(__p0); | | |
| 37441 | return __ret; | | |
| 37442 | } | | |
| 37443 | __ai float64x2_t vreinterpretq_f64_u32(uint32x4_t __p0) { | | |
| 37444 | float64x2_t __ret; | | |
| 37445 | __ret = (float64x2_t)(__p0); | | |
| 37446 | return __ret; | | |
| 37447 | } | | |
| 37448 | __ai float64x2_t vreinterpretq_f64_u64(uint64x2_t __p0) { | | |
| 37449 | float64x2_t __ret; | | |
| 37450 | __ret = (float64x2_t)(__p0); | | |
| 37451 | return __ret; | | |
| 37452 | } | | |
| 37453 | __ai float64x2_t vreinterpretq_f64_u16(uint16x8_t __p0) { | | |
| 37454 | float64x2_t __ret; | | |
| 37455 | __ret = (float64x2_t)(__p0); | | |
| 37456 | return __ret; | | |
| 37457 | } | | |
| 37458 | __ai float64x2_t vreinterpretq_f64_s8(int8x16_t __p0) { | | |
| 37459 | float64x2_t __ret; | | |
| 37460 | __ret = (float64x2_t)(__p0); | | |
| 37461 | return __ret; | | |
| 37462 | } | | |
| 37463 | __ai float64x2_t vreinterpretq_f64_f32(float32x4_t __p0) { | | |
| 37464 | float64x2_t __ret; | | |
| 37465 | __ret = (float64x2_t)(__p0); | | |
| 37466 | return __ret; | | |
| 37467 | } | | |
| 37468 | __ai float64x2_t vreinterpretq_f64_f16(float16x8_t __p0) { | | |
| 37469 | float64x2_t __ret; | | |
| 37470 | __ret = (float64x2_t)(__p0); | | |
| 37471 | return __ret; | | |
| 37472 | } | | |
| 37473 | __ai float64x2_t vreinterpretq_f64_s32(int32x4_t __p0) { | | |
| 37474 | float64x2_t __ret; | | |
| 37475 | __ret = (float64x2_t)(__p0); | | |
| 37476 | return __ret; | | |
| 37477 | } | | |
| 37478 | __ai float64x2_t vreinterpretq_f64_s64(int64x2_t __p0) { | | |
| 37479 | float64x2_t __ret; | | |
| 37480 | __ret = (float64x2_t)(__p0); | | |
| 37481 | return __ret; | | |
| 37482 | } | | |
| 37483 | __ai float64x2_t vreinterpretq_f64_s16(int16x8_t __p0) { | | |
| 37484 | float64x2_t __ret; | | |
| 37485 | __ret = (float64x2_t)(__p0); | | |
| 37486 | return __ret; | 38452 | return __ret; |
| 37487 | } | 38453 | } |
| 37488 | __ai float32x4_t vreinterpretq_f32_p8(poly8x16_t __p0) { | 38454 | __ai int8x16_t vreinterpretq_s8_s64(int64x2_t __p0) { |
| 37489 | float32x4_t __ret; | 38455 | int8x16_t __ret; |
| 37490 | __ret = (float32x4_t)(__p0); | 38456 | __ret = (int8x16_t)(__p0); |
| 37491 | return __ret; | 38457 | return __ret; |
| 37492 | } | 38458 | } |
| 37493 | __ai float32x4_t vreinterpretq_f32_p128(poly128_t __p0) { | 38459 | __ai int8x16_t vreinterpretq_s8_s16(int16x8_t __p0) { |
| 37494 | float32x4_t __ret; | 38460 | int8x16_t __ret; |
| 37495 | __ret = (float32x4_t)(__p0); | 38461 | __ret = (int8x16_t)(__p0); |
| 37496 | return __ret; | 38462 | return __ret; |
| 37497 | } | 38463 | } |
| 37498 | __ai float32x4_t vreinterpretq_f32_p64(poly64x2_t __p0) { | 38464 | __ai float32x4_t vreinterpretq_f32_p8(poly8x16_t __p0) { |
| 37499 | float32x4_t __ret; | 38465 | float32x4_t __ret; |
| 37500 | __ret = (float32x4_t)(__p0); | 38466 | __ret = (float32x4_t)(__p0); |
| 37501 | return __ret; | 38467 | return __ret; |
| ... | @@ -37530,11 +38496,6 @@ __ai float32x4_t vreinterpretq_f32_s8(int8x16_t __p0) { | ... | @@ -37530,11 +38496,6 @@ __ai float32x4_t vreinterpretq_f32_s8(int8x16_t __p0) { |
| 37530 | __ret = (float32x4_t)(__p0); | 38496 | __ret = (float32x4_t)(__p0); |
| 37531 | return __ret; | 38497 | return __ret; |
| 37532 | } | 38498 | } |
| 37533 | __ai float32x4_t vreinterpretq_f32_f64(float64x2_t __p0) { | | |
| 37534 | float32x4_t __ret; | | |
| 37535 | __ret = (float32x4_t)(__p0); | | |
| 37536 | return __ret; | | |
| 37537 | } | | |
| 37538 | __ai float32x4_t vreinterpretq_f32_f16(float16x8_t __p0) { | 38499 | __ai float32x4_t vreinterpretq_f32_f16(float16x8_t __p0) { |
| 37539 | float32x4_t __ret; | 38500 | float32x4_t __ret; |
| 37540 | __ret = (float32x4_t)(__p0); | 38501 | __ret = (float32x4_t)(__p0); |
| ... | @@ -37560,16 +38521,6 @@ __ai float16x8_t vreinterpretq_f16_p8(poly8x16_t __p0) { | ... | @@ -37560,16 +38521,6 @@ __ai float16x8_t vreinterpretq_f16_p8(poly8x16_t __p0) { |
| 37560 | __ret = (float16x8_t)(__p0); | 38521 | __ret = (float16x8_t)(__p0); |
| 37561 | return __ret; | 38522 | return __ret; |
| 37562 | } | 38523 | } |
| 37563 | __ai float16x8_t vreinterpretq_f16_p128(poly128_t __p0) { | | |
| 37564 | float16x8_t __ret; | | |
| 37565 | __ret = (float16x8_t)(__p0); | | |
| 37566 | return __ret; | | |
| 37567 | } | | |
| 37568 | __ai float16x8_t vreinterpretq_f16_p64(poly64x2_t __p0) { | | |
| 37569 | float16x8_t __ret; | | |
| 37570 | __ret = (float16x8_t)(__p0); | | |
| 37571 | return __ret; | | |
| 37572 | } | | |
| 37573 | __ai float16x8_t vreinterpretq_f16_p16(poly16x8_t __p0) { | 38524 | __ai float16x8_t vreinterpretq_f16_p16(poly16x8_t __p0) { |
| 37574 | float16x8_t __ret; | 38525 | float16x8_t __ret; |
| 37575 | __ret = (float16x8_t)(__p0); | 38526 | __ret = (float16x8_t)(__p0); |
| ... | @@ -37600,11 +38551,6 @@ __ai float16x8_t vreinterpretq_f16_s8(int8x16_t __p0) { | ... | @@ -37600,11 +38551,6 @@ __ai float16x8_t vreinterpretq_f16_s8(int8x16_t __p0) { |
| 37600 | __ret = (float16x8_t)(__p0); | 38551 | __ret = (float16x8_t)(__p0); |
| 37601 | return __ret; | 38552 | return __ret; |
| 37602 | } | 38553 | } |
| 37603 | __ai float16x8_t vreinterpretq_f16_f64(float64x2_t __p0) { | | |
| 37604 | float16x8_t __ret; | | |
| 37605 | __ret = (float16x8_t)(__p0); | | |
| 37606 | return __ret; | | |
| 37607 | } | | |
| 37608 | __ai float16x8_t vreinterpretq_f16_f32(float32x4_t __p0) { | 38554 | __ai float16x8_t vreinterpretq_f16_f32(float32x4_t __p0) { |
| 37609 | float16x8_t __ret; | 38555 | float16x8_t __ret; |
| 37610 | __ret = (float16x8_t)(__p0); | 38556 | __ret = (float16x8_t)(__p0); |
| ... | @@ -37630,16 +38576,6 @@ __ai int32x4_t vreinterpretq_s32_p8(poly8x16_t __p0) { | ... | @@ -37630,16 +38576,6 @@ __ai int32x4_t vreinterpretq_s32_p8(poly8x16_t __p0) { |
| 37630 | __ret = (int32x4_t)(__p0); | 38576 | __ret = (int32x4_t)(__p0); |
| 37631 | return __ret; | 38577 | return __ret; |
| 37632 | } | 38578 | } |
| 37633 | __ai int32x4_t vreinterpretq_s32_p128(poly128_t __p0) { | | |
| 37634 | int32x4_t __ret; | | |
| 37635 | __ret = (int32x4_t)(__p0); | | |
| 37636 | return __ret; | | |
| 37637 | } | | |
| 37638 | __ai int32x4_t vreinterpretq_s32_p64(poly64x2_t __p0) { | | |
| 37639 | int32x4_t __ret; | | |
| 37640 | __ret = (int32x4_t)(__p0); | | |
| 37641 | return __ret; | | |
| 37642 | } | | |
| 37643 | __ai int32x4_t vreinterpretq_s32_p16(poly16x8_t __p0) { | 38579 | __ai int32x4_t vreinterpretq_s32_p16(poly16x8_t __p0) { |
| 37644 | int32x4_t __ret; | 38580 | int32x4_t __ret; |
| 37645 | __ret = (int32x4_t)(__p0); | 38581 | __ret = (int32x4_t)(__p0); |
| ... | @@ -37670,11 +38606,6 @@ __ai int32x4_t vreinterpretq_s32_s8(int8x16_t __p0) { | ... | @@ -37670,11 +38606,6 @@ __ai int32x4_t vreinterpretq_s32_s8(int8x16_t __p0) { |
| 37670 | __ret = (int32x4_t)(__p0); | 38606 | __ret = (int32x4_t)(__p0); |
| 37671 | return __ret; | 38607 | return __ret; |
| 37672 | } | 38608 | } |
| 37673 | __ai int32x4_t vreinterpretq_s32_f64(float64x2_t __p0) { | | |
| 37674 | int32x4_t __ret; | | |
| 37675 | __ret = (int32x4_t)(__p0); | | |
| 37676 | return __ret; | | |
| 37677 | } | | |
| 37678 | __ai int32x4_t vreinterpretq_s32_f32(float32x4_t __p0) { | 38609 | __ai int32x4_t vreinterpretq_s32_f32(float32x4_t __p0) { |
| 37679 | int32x4_t __ret; | 38610 | int32x4_t __ret; |
| 37680 | __ret = (int32x4_t)(__p0); | 38611 | __ret = (int32x4_t)(__p0); |
| ... | @@ -37700,16 +38631,6 @@ __ai int64x2_t vreinterpretq_s64_p8(poly8x16_t __p0) { | ... | @@ -37700,16 +38631,6 @@ __ai int64x2_t vreinterpretq_s64_p8(poly8x16_t __p0) { |
| 37700 | __ret = (int64x2_t)(__p0); | 38631 | __ret = (int64x2_t)(__p0); |
| 37701 | return __ret; | 38632 | return __ret; |
| 37702 | } | 38633 | } |
| 37703 | __ai int64x2_t vreinterpretq_s64_p128(poly128_t __p0) { | | |
| 37704 | int64x2_t __ret; | | |
| 37705 | __ret = (int64x2_t)(__p0); | | |
| 37706 | return __ret; | | |
| 37707 | } | | |
| 37708 | __ai int64x2_t vreinterpretq_s64_p64(poly64x2_t __p0) { | | |
| 37709 | int64x2_t __ret; | | |
| 37710 | __ret = (int64x2_t)(__p0); | | |
| 37711 | return __ret; | | |
| 37712 | } | | |
| 37713 | __ai int64x2_t vreinterpretq_s64_p16(poly16x8_t __p0) { | 38634 | __ai int64x2_t vreinterpretq_s64_p16(poly16x8_t __p0) { |
| 37714 | int64x2_t __ret; | 38635 | int64x2_t __ret; |
| 37715 | __ret = (int64x2_t)(__p0); | 38636 | __ret = (int64x2_t)(__p0); |
| ... | @@ -37740,11 +38661,6 @@ __ai int64x2_t vreinterpretq_s64_s8(int8x16_t __p0) { | ... | @@ -37740,11 +38661,6 @@ __ai int64x2_t vreinterpretq_s64_s8(int8x16_t __p0) { |
| 37740 | __ret = (int64x2_t)(__p0); | 38661 | __ret = (int64x2_t)(__p0); |
| 37741 | return __ret; | 38662 | return __ret; |
| 37742 | } | 38663 | } |
| 37743 | __ai int64x2_t vreinterpretq_s64_f64(float64x2_t __p0) { | | |
| 37744 | int64x2_t __ret; | | |
| 37745 | __ret = (int64x2_t)(__p0); | | |
| 37746 | return __ret; | | |
| 37747 | } | | |
| 37748 | __ai int64x2_t vreinterpretq_s64_f32(float32x4_t __p0) { | 38664 | __ai int64x2_t vreinterpretq_s64_f32(float32x4_t __p0) { |
| 37749 | int64x2_t __ret; | 38665 | int64x2_t __ret; |
| 37750 | __ret = (int64x2_t)(__p0); | 38666 | __ret = (int64x2_t)(__p0); |
| ... | @@ -37770,16 +38686,6 @@ __ai int16x8_t vreinterpretq_s16_p8(poly8x16_t __p0) { | ... | @@ -37770,16 +38686,6 @@ __ai int16x8_t vreinterpretq_s16_p8(poly8x16_t __p0) { |
| 37770 | __ret = (int16x8_t)(__p0); | 38686 | __ret = (int16x8_t)(__p0); |
| 37771 | return __ret; | 38687 | return __ret; |
| 37772 | } | 38688 | } |
| 37773 | __ai int16x8_t vreinterpretq_s16_p128(poly128_t __p0) { | | |
| 37774 | int16x8_t __ret; | | |
| 37775 | __ret = (int16x8_t)(__p0); | | |
| 37776 | return __ret; | | |
| 37777 | } | | |
| 37778 | __ai int16x8_t vreinterpretq_s16_p64(poly64x2_t __p0) { | | |
| 37779 | int16x8_t __ret; | | |
| 37780 | __ret = (int16x8_t)(__p0); | | |
| 37781 | return __ret; | | |
| 37782 | } | | |
| 37783 | __ai int16x8_t vreinterpretq_s16_p16(poly16x8_t __p0) { | 38689 | __ai int16x8_t vreinterpretq_s16_p16(poly16x8_t __p0) { |
| 37784 | int16x8_t __ret; | 38690 | int16x8_t __ret; |
| 37785 | __ret = (int16x8_t)(__p0); | 38691 | __ret = (int16x8_t)(__p0); |
| ... | @@ -37810,11 +38716,6 @@ __ai int16x8_t vreinterpretq_s16_s8(int8x16_t __p0) { | ... | @@ -37810,11 +38716,6 @@ __ai int16x8_t vreinterpretq_s16_s8(int8x16_t __p0) { |
| 37810 | __ret = (int16x8_t)(__p0); | 38716 | __ret = (int16x8_t)(__p0); |
| 37811 | return __ret; | 38717 | return __ret; |
| 37812 | } | 38718 | } |
| 37813 | __ai int16x8_t vreinterpretq_s16_f64(float64x2_t __p0) { | | |
| 37814 | int16x8_t __ret; | | |
| 37815 | __ret = (int16x8_t)(__p0); | | |
| 37816 | return __ret; | | |
| 37817 | } | | |
| 37818 | __ai int16x8_t vreinterpretq_s16_f32(float32x4_t __p0) { | 38719 | __ai int16x8_t vreinterpretq_s16_f32(float32x4_t __p0) { |
| 37819 | int16x8_t __ret; | 38720 | int16x8_t __ret; |
| 37820 | __ret = (int16x8_t)(__p0); | 38721 | __ret = (int16x8_t)(__p0); |
| ... | @@ -37840,11 +38741,6 @@ __ai uint8x8_t vreinterpret_u8_p8(poly8x8_t __p0) { | ... | @@ -37840,11 +38741,6 @@ __ai uint8x8_t vreinterpret_u8_p8(poly8x8_t __p0) { |
| 37840 | __ret = (uint8x8_t)(__p0); | 38741 | __ret = (uint8x8_t)(__p0); |
| 37841 | return __ret; | 38742 | return __ret; |
| 37842 | } | 38743 | } |
| 37843 | __ai uint8x8_t vreinterpret_u8_p64(poly64x1_t __p0) { | | |
| 37844 | uint8x8_t __ret; | | |
| 37845 | __ret = (uint8x8_t)(__p0); | | |
| 37846 | return __ret; | | |
| 37847 | } | | |
| 37848 | __ai uint8x8_t vreinterpret_u8_p16(poly16x4_t __p0) { | 38744 | __ai uint8x8_t vreinterpret_u8_p16(poly16x4_t __p0) { |
| 37849 | uint8x8_t __ret; | 38745 | uint8x8_t __ret; |
| 37850 | __ret = (uint8x8_t)(__p0); | 38746 | __ret = (uint8x8_t)(__p0); |
| ... | @@ -37870,11 +38766,6 @@ __ai uint8x8_t vreinterpret_u8_s8(int8x8_t __p0) { | ... | @@ -37870,11 +38766,6 @@ __ai uint8x8_t vreinterpret_u8_s8(int8x8_t __p0) { |
| 37870 | __ret = (uint8x8_t)(__p0); | 38766 | __ret = (uint8x8_t)(__p0); |
| 37871 | return __ret; | 38767 | return __ret; |
| 37872 | } | 38768 | } |
| 37873 | __ai uint8x8_t vreinterpret_u8_f64(float64x1_t __p0) { | | |
| 37874 | uint8x8_t __ret; | | |
| 37875 | __ret = (uint8x8_t)(__p0); | | |
| 37876 | return __ret; | | |
| 37877 | } | | |
| 37878 | __ai uint8x8_t vreinterpret_u8_f32(float32x2_t __p0) { | 38769 | __ai uint8x8_t vreinterpret_u8_f32(float32x2_t __p0) { |
| 37879 | uint8x8_t __ret; | 38770 | uint8x8_t __ret; |
| 37880 | __ret = (uint8x8_t)(__p0); | 38771 | __ret = (uint8x8_t)(__p0); |
| ... | @@ -37905,11 +38796,6 @@ __ai uint32x2_t vreinterpret_u32_p8(poly8x8_t __p0) { | ... | @@ -37905,11 +38796,6 @@ __ai uint32x2_t vreinterpret_u32_p8(poly8x8_t __p0) { |
| 37905 | __ret = (uint32x2_t)(__p0); | 38796 | __ret = (uint32x2_t)(__p0); |
| 37906 | return __ret; | 38797 | return __ret; |
| 37907 | } | 38798 | } |
| 37908 | __ai uint32x2_t vreinterpret_u32_p64(poly64x1_t __p0) { | | |
| 37909 | uint32x2_t __ret; | | |
| 37910 | __ret = (uint32x2_t)(__p0); | | |
| 37911 | return __ret; | | |
| 37912 | } | | |
| 37913 | __ai uint32x2_t vreinterpret_u32_p16(poly16x4_t __p0) { | 38799 | __ai uint32x2_t vreinterpret_u32_p16(poly16x4_t __p0) { |
| 37914 | uint32x2_t __ret; | 38800 | uint32x2_t __ret; |
| 37915 | __ret = (uint32x2_t)(__p0); | 38801 | __ret = (uint32x2_t)(__p0); |
| ... | @@ -37935,11 +38821,6 @@ __ai uint32x2_t vreinterpret_u32_s8(int8x8_t __p0) { | ... | @@ -37935,11 +38821,6 @@ __ai uint32x2_t vreinterpret_u32_s8(int8x8_t __p0) { |
| 37935 | __ret = (uint32x2_t)(__p0); | 38821 | __ret = (uint32x2_t)(__p0); |
| 37936 | return __ret; | 38822 | return __ret; |
| 37937 | } | 38823 | } |
| 37938 | __ai uint32x2_t vreinterpret_u32_f64(float64x1_t __p0) { | | |
| 37939 | uint32x2_t __ret; | | |
| 37940 | __ret = (uint32x2_t)(__p0); | | |
| 37941 | return __ret; | | |
| 37942 | } | | |
| 37943 | __ai uint32x2_t vreinterpret_u32_f32(float32x2_t __p0) { | 38824 | __ai uint32x2_t vreinterpret_u32_f32(float32x2_t __p0) { |
| 37944 | uint32x2_t __ret; | 38825 | uint32x2_t __ret; |
| 37945 | __ret = (uint32x2_t)(__p0); | 38826 | __ret = (uint32x2_t)(__p0); |
| ... | @@ -37970,11 +38851,6 @@ __ai uint64x1_t vreinterpret_u64_p8(poly8x8_t __p0) { | ... | @@ -37970,11 +38851,6 @@ __ai uint64x1_t vreinterpret_u64_p8(poly8x8_t __p0) { |
| 37970 | __ret = (uint64x1_t)(__p0); | 38851 | __ret = (uint64x1_t)(__p0); |
| 37971 | return __ret; | 38852 | return __ret; |
| 37972 | } | 38853 | } |
| 37973 | __ai uint64x1_t vreinterpret_u64_p64(poly64x1_t __p0) { | | |
| 37974 | uint64x1_t __ret; | | |
| 37975 | __ret = (uint64x1_t)(__p0); | | |
| 37976 | return __ret; | | |
| 37977 | } | | |
| 37978 | __ai uint64x1_t vreinterpret_u64_p16(poly16x4_t __p0) { | 38854 | __ai uint64x1_t vreinterpret_u64_p16(poly16x4_t __p0) { |
| 37979 | uint64x1_t __ret; | 38855 | uint64x1_t __ret; |
| 37980 | __ret = (uint64x1_t)(__p0); | 38856 | __ret = (uint64x1_t)(__p0); |
| ... | @@ -38000,11 +38876,6 @@ __ai uint64x1_t vreinterpret_u64_s8(int8x8_t __p0) { | ... | @@ -38000,11 +38876,6 @@ __ai uint64x1_t vreinterpret_u64_s8(int8x8_t __p0) { |
| 38000 | __ret = (uint64x1_t)(__p0); | 38876 | __ret = (uint64x1_t)(__p0); |
| 38001 | return __ret; | 38877 | return __ret; |
| 38002 | } | 38878 | } |
| 38003 | __ai uint64x1_t vreinterpret_u64_f64(float64x1_t __p0) { | | |
| 38004 | uint64x1_t __ret; | | |
| 38005 | __ret = (uint64x1_t)(__p0); | | |
| 38006 | return __ret; | | |
| 38007 | } | | |
| 38008 | __ai uint64x1_t vreinterpret_u64_f32(float32x2_t __p0) { | 38879 | __ai uint64x1_t vreinterpret_u64_f32(float32x2_t __p0) { |
| 38009 | uint64x1_t __ret; | 38880 | uint64x1_t __ret; |
| 38010 | __ret = (uint64x1_t)(__p0); | 38881 | __ret = (uint64x1_t)(__p0); |
| ... | @@ -38035,11 +38906,6 @@ __ai uint16x4_t vreinterpret_u16_p8(poly8x8_t __p0) { | ... | @@ -38035,11 +38906,6 @@ __ai uint16x4_t vreinterpret_u16_p8(poly8x8_t __p0) { |
| 38035 | __ret = (uint16x4_t)(__p0); | 38906 | __ret = (uint16x4_t)(__p0); |
| 38036 | return __ret; | 38907 | return __ret; |
| 38037 | } | 38908 | } |
| 38038 | __ai uint16x4_t vreinterpret_u16_p64(poly64x1_t __p0) { | | |
| 38039 | uint16x4_t __ret; | | |
| 38040 | __ret = (uint16x4_t)(__p0); | | |
| 38041 | return __ret; | | |
| 38042 | } | | |
| 38043 | __ai uint16x4_t vreinterpret_u16_p16(poly16x4_t __p0) { | 38909 | __ai uint16x4_t vreinterpret_u16_p16(poly16x4_t __p0) { |
| 38044 | uint16x4_t __ret; | 38910 | uint16x4_t __ret; |
| 38045 | __ret = (uint16x4_t)(__p0); | 38911 | __ret = (uint16x4_t)(__p0); |
| ... | @@ -38065,11 +38931,6 @@ __ai uint16x4_t vreinterpret_u16_s8(int8x8_t __p0) { | ... | @@ -38065,11 +38931,6 @@ __ai uint16x4_t vreinterpret_u16_s8(int8x8_t __p0) { |
| 38065 | __ret = (uint16x4_t)(__p0); | 38931 | __ret = (uint16x4_t)(__p0); |
| 38066 | return __ret; | 38932 | return __ret; |
| 38067 | } | 38933 | } |
| 38068 | __ai uint16x4_t vreinterpret_u16_f64(float64x1_t __p0) { | | |
| 38069 | uint16x4_t __ret; | | |
| 38070 | __ret = (uint16x4_t)(__p0); | | |
| 38071 | return __ret; | | |
| 38072 | } | | |
| 38073 | __ai uint16x4_t vreinterpret_u16_f32(float32x2_t __p0) { | 38934 | __ai uint16x4_t vreinterpret_u16_f32(float32x2_t __p0) { |
| 38074 | uint16x4_t __ret; | 38935 | uint16x4_t __ret; |
| 38075 | __ret = (uint16x4_t)(__p0); | 38936 | __ret = (uint16x4_t)(__p0); |
| ... | @@ -38100,11 +38961,6 @@ __ai int8x8_t vreinterpret_s8_p8(poly8x8_t __p0) { | ... | @@ -38100,11 +38961,6 @@ __ai int8x8_t vreinterpret_s8_p8(poly8x8_t __p0) { |
| 38100 | __ret = (int8x8_t)(__p0); | 38961 | __ret = (int8x8_t)(__p0); |
| 38101 | return __ret; | 38962 | return __ret; |
| 38102 | } | 38963 | } |
| 38103 | __ai int8x8_t vreinterpret_s8_p64(poly64x1_t __p0) { | | |
| 38104 | int8x8_t __ret; | | |
| 38105 | __ret = (int8x8_t)(__p0); | | |
| 38106 | return __ret; | | |
| 38107 | } | | |
| 38108 | __ai int8x8_t vreinterpret_s8_p16(poly16x4_t __p0) { | 38964 | __ai int8x8_t vreinterpret_s8_p16(poly16x4_t __p0) { |
| 38109 | int8x8_t __ret; | 38965 | int8x8_t __ret; |
| 38110 | __ret = (int8x8_t)(__p0); | 38966 | __ret = (int8x8_t)(__p0); |
| ... | @@ -38130,11 +38986,6 @@ __ai int8x8_t vreinterpret_s8_u16(uint16x4_t __p0) { | ... | @@ -38130,11 +38986,6 @@ __ai int8x8_t vreinterpret_s8_u16(uint16x4_t __p0) { |
| 38130 | __ret = (int8x8_t)(__p0); | 38986 | __ret = (int8x8_t)(__p0); |
| 38131 | return __ret; | 38987 | return __ret; |
| 38132 | } | 38988 | } |
| 38133 | __ai int8x8_t vreinterpret_s8_f64(float64x1_t __p0) { | | |
| 38134 | int8x8_t __ret; | | |
| 38135 | __ret = (int8x8_t)(__p0); | | |
| 38136 | return __ret; | | |
| 38137 | } | | |
| 38138 | __ai int8x8_t vreinterpret_s8_f32(float32x2_t __p0) { | 38989 | __ai int8x8_t vreinterpret_s8_f32(float32x2_t __p0) { |
| 38139 | int8x8_t __ret; | 38990 | int8x8_t __ret; |
| 38140 | __ret = (int8x8_t)(__p0); | 38991 | __ret = (int8x8_t)(__p0); |
| ... | @@ -38160,81 +39011,11 @@ __ai int8x8_t vreinterpret_s8_s16(int16x4_t __p0) { | ... | @@ -38160,81 +39011,11 @@ __ai int8x8_t vreinterpret_s8_s16(int16x4_t __p0) { |
| 38160 | __ret = (int8x8_t)(__p0); | 39011 | __ret = (int8x8_t)(__p0); |
| 38161 | return __ret; | 39012 | return __ret; |
| 38162 | } | 39013 | } |
| 38163 | __ai float64x1_t vreinterpret_f64_p8(poly8x8_t __p0) { | | |
| 38164 | float64x1_t __ret; | | |
| 38165 | __ret = (float64x1_t)(__p0); | | |
| 38166 | return __ret; | | |
| 38167 | } | | |
| 38168 | __ai float64x1_t vreinterpret_f64_p64(poly64x1_t __p0) { | | |
| 38169 | float64x1_t __ret; | | |
| 38170 | __ret = (float64x1_t)(__p0); | | |
| 38171 | return __ret; | | |
| 38172 | } | | |
| 38173 | __ai float64x1_t vreinterpret_f64_p16(poly16x4_t __p0) { | | |
| 38174 | float64x1_t __ret; | | |
| 38175 | __ret = (float64x1_t)(__p0); | | |
| 38176 | return __ret; | | |
| 38177 | } | | |
| 38178 | __ai float64x1_t vreinterpret_f64_u8(uint8x8_t __p0) { | | |
| 38179 | float64x1_t __ret; | | |
| 38180 | __ret = (float64x1_t)(__p0); | | |
| 38181 | return __ret; | | |
| 38182 | } | | |
| 38183 | __ai float64x1_t vreinterpret_f64_u32(uint32x2_t __p0) { | | |
| 38184 | float64x1_t __ret; | | |
| 38185 | __ret = (float64x1_t)(__p0); | | |
| 38186 | return __ret; | | |
| 38187 | } | | |
| 38188 | __ai float64x1_t vreinterpret_f64_u64(uint64x1_t __p0) { | | |
| 38189 | float64x1_t __ret; | | |
| 38190 | __ret = (float64x1_t)(__p0); | | |
| 38191 | return __ret; | | |
| 38192 | } | | |
| 38193 | __ai float64x1_t vreinterpret_f64_u16(uint16x4_t __p0) { | | |
| 38194 | float64x1_t __ret; | | |
| 38195 | __ret = (float64x1_t)(__p0); | | |
| 38196 | return __ret; | | |
| 38197 | } | | |
| 38198 | __ai float64x1_t vreinterpret_f64_s8(int8x8_t __p0) { | | |
| 38199 | float64x1_t __ret; | | |
| 38200 | __ret = (float64x1_t)(__p0); | | |
| 38201 | return __ret; | | |
| 38202 | } | | |
| 38203 | __ai float64x1_t vreinterpret_f64_f32(float32x2_t __p0) { | | |
| 38204 | float64x1_t __ret; | | |
| 38205 | __ret = (float64x1_t)(__p0); | | |
| 38206 | return __ret; | | |
| 38207 | } | | |
| 38208 | __ai float64x1_t vreinterpret_f64_f16(float16x4_t __p0) { | | |
| 38209 | float64x1_t __ret; | | |
| 38210 | __ret = (float64x1_t)(__p0); | | |
| 38211 | return __ret; | | |
| 38212 | } | | |
| 38213 | __ai float64x1_t vreinterpret_f64_s32(int32x2_t __p0) { | | |
| 38214 | float64x1_t __ret; | | |
| 38215 | __ret = (float64x1_t)(__p0); | | |
| 38216 | return __ret; | | |
| 38217 | } | | |
| 38218 | __ai float64x1_t vreinterpret_f64_s64(int64x1_t __p0) { | | |
| 38219 | float64x1_t __ret; | | |
| 38220 | __ret = (float64x1_t)(__p0); | | |
| 38221 | return __ret; | | |
| 38222 | } | | |
| 38223 | __ai float64x1_t vreinterpret_f64_s16(int16x4_t __p0) { | | |
| 38224 | float64x1_t __ret; | | |
| 38225 | __ret = (float64x1_t)(__p0); | | |
| 38226 | return __ret; | | |
| 38227 | } | | |
| 38228 | __ai float32x2_t vreinterpret_f32_p8(poly8x8_t __p0) { | 39014 | __ai float32x2_t vreinterpret_f32_p8(poly8x8_t __p0) { |
| 38229 | float32x2_t __ret; | 39015 | float32x2_t __ret; |
| 38230 | __ret = (float32x2_t)(__p0); | 39016 | __ret = (float32x2_t)(__p0); |
| 38231 | return __ret; | 39017 | return __ret; |
| 38232 | } | 39018 | } |
| 38233 | __ai float32x2_t vreinterpret_f32_p64(poly64x1_t __p0) { | | |
| 38234 | float32x2_t __ret; | | |
| 38235 | __ret = (float32x2_t)(__p0); | | |
| 38236 | return __ret; | | |
| 38237 | } | | |
| 38238 | __ai float32x2_t vreinterpret_f32_p16(poly16x4_t __p0) { | 39019 | __ai float32x2_t vreinterpret_f32_p16(poly16x4_t __p0) { |
| 38239 | float32x2_t __ret; | 39020 | float32x2_t __ret; |
| 38240 | __ret = (float32x2_t)(__p0); | 39021 | __ret = (float32x2_t)(__p0); |
| ... | @@ -38265,11 +39046,6 @@ __ai float32x2_t vreinterpret_f32_s8(int8x8_t __p0) { | ... | @@ -38265,11 +39046,6 @@ __ai float32x2_t vreinterpret_f32_s8(int8x8_t __p0) { |
| 38265 | __ret = (float32x2_t)(__p0); | 39046 | __ret = (float32x2_t)(__p0); |
| 38266 | return __ret; | 39047 | return __ret; |
| 38267 | } | 39048 | } |
| 38268 | __ai float32x2_t vreinterpret_f32_f64(float64x1_t __p0) { | | |
| 38269 | float32x2_t __ret; | | |
| 38270 | __ret = (float32x2_t)(__p0); | | |
| 38271 | return __ret; | | |
| 38272 | } | | |
| 38273 | __ai float32x2_t vreinterpret_f32_f16(float16x4_t __p0) { | 39049 | __ai float32x2_t vreinterpret_f32_f16(float16x4_t __p0) { |
| 38274 | float32x2_t __ret; | 39050 | float32x2_t __ret; |
| 38275 | __ret = (float32x2_t)(__p0); | 39051 | __ret = (float32x2_t)(__p0); |
| ... | @@ -38295,11 +39071,6 @@ __ai float16x4_t vreinterpret_f16_p8(poly8x8_t __p0) { | ... | @@ -38295,11 +39071,6 @@ __ai float16x4_t vreinterpret_f16_p8(poly8x8_t __p0) { |
| 38295 | __ret = (float16x4_t)(__p0); | 39071 | __ret = (float16x4_t)(__p0); |
| 38296 | return __ret; | 39072 | return __ret; |
| 38297 | } | 39073 | } |
| 38298 | __ai float16x4_t vreinterpret_f16_p64(poly64x1_t __p0) { | | |
| 38299 | float16x4_t __ret; | | |
| 38300 | __ret = (float16x4_t)(__p0); | | |
| 38301 | return __ret; | | |
| 38302 | } | | |
| 38303 | __ai float16x4_t vreinterpret_f16_p16(poly16x4_t __p0) { | 39074 | __ai float16x4_t vreinterpret_f16_p16(poly16x4_t __p0) { |
| 38304 | float16x4_t __ret; | 39075 | float16x4_t __ret; |
| 38305 | __ret = (float16x4_t)(__p0); | 39076 | __ret = (float16x4_t)(__p0); |
| ... | @@ -38325,28571 +39096,27638 @@ __ai float16x4_t vreinterpret_f16_u16(uint16x4_t __p0) { | ... | @@ -38325,28571 +39096,27638 @@ __ai float16x4_t vreinterpret_f16_u16(uint16x4_t __p0) { |
| 38325 | __ret = (float16x4_t)(__p0); | 39096 | __ret = (float16x4_t)(__p0); |
| 38326 | return __ret; | 39097 | return __ret; |
| 38327 | } | 39098 | } |
| 38328 | __ai float16x4_t vreinterpret_f16_s8(int8x8_t __p0) { | 39099 | __ai float16x4_t vreinterpret_f16_s8(int8x8_t __p0) { |
| 38329 | float16x4_t __ret; | 39100 | float16x4_t __ret; |
| 38330 | __ret = (float16x4_t)(__p0); | 39101 | __ret = (float16x4_t)(__p0); |
| | 39102 | return __ret; |
| | 39103 | } |
| | 39104 | __ai float16x4_t vreinterpret_f16_f32(float32x2_t __p0) { |
| | 39105 | float16x4_t __ret; |
| | 39106 | __ret = (float16x4_t)(__p0); |
| | 39107 | return __ret; |
| | 39108 | } |
| | 39109 | __ai float16x4_t vreinterpret_f16_s32(int32x2_t __p0) { |
| | 39110 | float16x4_t __ret; |
| | 39111 | __ret = (float16x4_t)(__p0); |
| | 39112 | return __ret; |
| | 39113 | } |
| | 39114 | __ai float16x4_t vreinterpret_f16_s64(int64x1_t __p0) { |
| | 39115 | float16x4_t __ret; |
| | 39116 | __ret = (float16x4_t)(__p0); |
| | 39117 | return __ret; |
| | 39118 | } |
| | 39119 | __ai float16x4_t vreinterpret_f16_s16(int16x4_t __p0) { |
| | 39120 | float16x4_t __ret; |
| | 39121 | __ret = (float16x4_t)(__p0); |
| | 39122 | return __ret; |
| | 39123 | } |
| | 39124 | __ai int32x2_t vreinterpret_s32_p8(poly8x8_t __p0) { |
| | 39125 | int32x2_t __ret; |
| | 39126 | __ret = (int32x2_t)(__p0); |
| | 39127 | return __ret; |
| | 39128 | } |
| | 39129 | __ai int32x2_t vreinterpret_s32_p16(poly16x4_t __p0) { |
| | 39130 | int32x2_t __ret; |
| | 39131 | __ret = (int32x2_t)(__p0); |
| | 39132 | return __ret; |
| | 39133 | } |
| | 39134 | __ai int32x2_t vreinterpret_s32_u8(uint8x8_t __p0) { |
| | 39135 | int32x2_t __ret; |
| | 39136 | __ret = (int32x2_t)(__p0); |
| | 39137 | return __ret; |
| | 39138 | } |
| | 39139 | __ai int32x2_t vreinterpret_s32_u32(uint32x2_t __p0) { |
| | 39140 | int32x2_t __ret; |
| | 39141 | __ret = (int32x2_t)(__p0); |
| | 39142 | return __ret; |
| | 39143 | } |
| | 39144 | __ai int32x2_t vreinterpret_s32_u64(uint64x1_t __p0) { |
| | 39145 | int32x2_t __ret; |
| | 39146 | __ret = (int32x2_t)(__p0); |
| | 39147 | return __ret; |
| | 39148 | } |
| | 39149 | __ai int32x2_t vreinterpret_s32_u16(uint16x4_t __p0) { |
| | 39150 | int32x2_t __ret; |
| | 39151 | __ret = (int32x2_t)(__p0); |
| | 39152 | return __ret; |
| | 39153 | } |
| | 39154 | __ai int32x2_t vreinterpret_s32_s8(int8x8_t __p0) { |
| | 39155 | int32x2_t __ret; |
| | 39156 | __ret = (int32x2_t)(__p0); |
| | 39157 | return __ret; |
| | 39158 | } |
| | 39159 | __ai int32x2_t vreinterpret_s32_f32(float32x2_t __p0) { |
| | 39160 | int32x2_t __ret; |
| | 39161 | __ret = (int32x2_t)(__p0); |
| | 39162 | return __ret; |
| | 39163 | } |
| | 39164 | __ai int32x2_t vreinterpret_s32_f16(float16x4_t __p0) { |
| | 39165 | int32x2_t __ret; |
| | 39166 | __ret = (int32x2_t)(__p0); |
| | 39167 | return __ret; |
| | 39168 | } |
| | 39169 | __ai int32x2_t vreinterpret_s32_s64(int64x1_t __p0) { |
| | 39170 | int32x2_t __ret; |
| | 39171 | __ret = (int32x2_t)(__p0); |
| | 39172 | return __ret; |
| | 39173 | } |
| | 39174 | __ai int32x2_t vreinterpret_s32_s16(int16x4_t __p0) { |
| | 39175 | int32x2_t __ret; |
| | 39176 | __ret = (int32x2_t)(__p0); |
| | 39177 | return __ret; |
| | 39178 | } |
| | 39179 | __ai int64x1_t vreinterpret_s64_p8(poly8x8_t __p0) { |
| | 39180 | int64x1_t __ret; |
| | 39181 | __ret = (int64x1_t)(__p0); |
| | 39182 | return __ret; |
| | 39183 | } |
| | 39184 | __ai int64x1_t vreinterpret_s64_p16(poly16x4_t __p0) { |
| | 39185 | int64x1_t __ret; |
| | 39186 | __ret = (int64x1_t)(__p0); |
| | 39187 | return __ret; |
| | 39188 | } |
| | 39189 | __ai int64x1_t vreinterpret_s64_u8(uint8x8_t __p0) { |
| | 39190 | int64x1_t __ret; |
| | 39191 | __ret = (int64x1_t)(__p0); |
| | 39192 | return __ret; |
| | 39193 | } |
| | 39194 | __ai int64x1_t vreinterpret_s64_u32(uint32x2_t __p0) { |
| | 39195 | int64x1_t __ret; |
| | 39196 | __ret = (int64x1_t)(__p0); |
| | 39197 | return __ret; |
| | 39198 | } |
| | 39199 | __ai int64x1_t vreinterpret_s64_u64(uint64x1_t __p0) { |
| | 39200 | int64x1_t __ret; |
| | 39201 | __ret = (int64x1_t)(__p0); |
| | 39202 | return __ret; |
| | 39203 | } |
| | 39204 | __ai int64x1_t vreinterpret_s64_u16(uint16x4_t __p0) { |
| | 39205 | int64x1_t __ret; |
| | 39206 | __ret = (int64x1_t)(__p0); |
| | 39207 | return __ret; |
| | 39208 | } |
| | 39209 | __ai int64x1_t vreinterpret_s64_s8(int8x8_t __p0) { |
| | 39210 | int64x1_t __ret; |
| | 39211 | __ret = (int64x1_t)(__p0); |
| | 39212 | return __ret; |
| | 39213 | } |
| | 39214 | __ai int64x1_t vreinterpret_s64_f32(float32x2_t __p0) { |
| | 39215 | int64x1_t __ret; |
| | 39216 | __ret = (int64x1_t)(__p0); |
| | 39217 | return __ret; |
| | 39218 | } |
| | 39219 | __ai int64x1_t vreinterpret_s64_f16(float16x4_t __p0) { |
| | 39220 | int64x1_t __ret; |
| | 39221 | __ret = (int64x1_t)(__p0); |
| | 39222 | return __ret; |
| | 39223 | } |
| | 39224 | __ai int64x1_t vreinterpret_s64_s32(int32x2_t __p0) { |
| | 39225 | int64x1_t __ret; |
| | 39226 | __ret = (int64x1_t)(__p0); |
| | 39227 | return __ret; |
| | 39228 | } |
| | 39229 | __ai int64x1_t vreinterpret_s64_s16(int16x4_t __p0) { |
| | 39230 | int64x1_t __ret; |
| | 39231 | __ret = (int64x1_t)(__p0); |
| | 39232 | return __ret; |
| | 39233 | } |
| | 39234 | __ai int16x4_t vreinterpret_s16_p8(poly8x8_t __p0) { |
| | 39235 | int16x4_t __ret; |
| | 39236 | __ret = (int16x4_t)(__p0); |
| | 39237 | return __ret; |
| | 39238 | } |
| | 39239 | __ai int16x4_t vreinterpret_s16_p16(poly16x4_t __p0) { |
| | 39240 | int16x4_t __ret; |
| | 39241 | __ret = (int16x4_t)(__p0); |
| | 39242 | return __ret; |
| | 39243 | } |
| | 39244 | __ai int16x4_t vreinterpret_s16_u8(uint8x8_t __p0) { |
| | 39245 | int16x4_t __ret; |
| | 39246 | __ret = (int16x4_t)(__p0); |
| | 39247 | return __ret; |
| | 39248 | } |
| | 39249 | __ai int16x4_t vreinterpret_s16_u32(uint32x2_t __p0) { |
| | 39250 | int16x4_t __ret; |
| | 39251 | __ret = (int16x4_t)(__p0); |
| | 39252 | return __ret; |
| | 39253 | } |
| | 39254 | __ai int16x4_t vreinterpret_s16_u64(uint64x1_t __p0) { |
| | 39255 | int16x4_t __ret; |
| | 39256 | __ret = (int16x4_t)(__p0); |
| | 39257 | return __ret; |
| | 39258 | } |
| | 39259 | __ai int16x4_t vreinterpret_s16_u16(uint16x4_t __p0) { |
| | 39260 | int16x4_t __ret; |
| | 39261 | __ret = (int16x4_t)(__p0); |
| | 39262 | return __ret; |
| | 39263 | } |
| | 39264 | __ai int16x4_t vreinterpret_s16_s8(int8x8_t __p0) { |
| | 39265 | int16x4_t __ret; |
| | 39266 | __ret = (int16x4_t)(__p0); |
| | 39267 | return __ret; |
| | 39268 | } |
| | 39269 | __ai int16x4_t vreinterpret_s16_f32(float32x2_t __p0) { |
| | 39270 | int16x4_t __ret; |
| | 39271 | __ret = (int16x4_t)(__p0); |
| | 39272 | return __ret; |
| | 39273 | } |
| | 39274 | __ai int16x4_t vreinterpret_s16_f16(float16x4_t __p0) { |
| | 39275 | int16x4_t __ret; |
| | 39276 | __ret = (int16x4_t)(__p0); |
| | 39277 | return __ret; |
| | 39278 | } |
| | 39279 | __ai int16x4_t vreinterpret_s16_s32(int32x2_t __p0) { |
| | 39280 | int16x4_t __ret; |
| | 39281 | __ret = (int16x4_t)(__p0); |
| | 39282 | return __ret; |
| | 39283 | } |
| | 39284 | __ai int16x4_t vreinterpret_s16_s64(int64x1_t __p0) { |
| | 39285 | int16x4_t __ret; |
| | 39286 | __ret = (int16x4_t)(__p0); |
| | 39287 | return __ret; |
| | 39288 | } |
| | 39289 | #ifdef __LITTLE_ENDIAN__ |
| | 39290 | __ai __attribute__((target("bf16"))) bfloat16x4_t __a32_vcvt_bf16_f32(float32x4_t __p0) { |
| | 39291 | bfloat16x4_t __ret; |
| | 39292 | __ret = (bfloat16x4_t) __builtin_neon___a32_vcvt_bf16_f32((int8x16_t)__p0, 11); |
| | 39293 | return __ret; |
| | 39294 | } |
| | 39295 | #else |
| | 39296 | __ai __attribute__((target("bf16"))) bfloat16x4_t __a32_vcvt_bf16_f32(float32x4_t __p0) { |
| | 39297 | bfloat16x4_t __ret; |
| | 39298 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 39299 | __ret = (bfloat16x4_t) __builtin_neon___a32_vcvt_bf16_f32((int8x16_t)__rev0, 11); |
| | 39300 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 39301 | return __ret; |
| | 39302 | } |
| | 39303 | __ai __attribute__((target("bf16"))) bfloat16x4_t __noswap___a32_vcvt_bf16_f32(float32x4_t __p0) { |
| | 39304 | bfloat16x4_t __ret; |
| | 39305 | __ret = (bfloat16x4_t) __builtin_neon___a32_vcvt_bf16_f32((int8x16_t)__p0, 11); |
| | 39306 | return __ret; |
| | 39307 | } |
| | 39308 | #endif |
| | 39309 | |
| | 39310 | #ifdef __LITTLE_ENDIAN__ |
| | 39311 | __ai __attribute__((target("bf16"))) bfloat16x4_t vcvt_bf16_f32(float32x4_t __p0) { |
| | 39312 | bfloat16x4_t __ret; |
| | 39313 | __ret = __a32_vcvt_bf16_f32(__p0); |
| | 39314 | return __ret; |
| | 39315 | } |
| | 39316 | #else |
| | 39317 | __ai __attribute__((target("bf16"))) bfloat16x4_t vcvt_bf16_f32(float32x4_t __p0) { |
| | 39318 | bfloat16x4_t __ret; |
| | 39319 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 39320 | __ret = __noswap___a32_vcvt_bf16_f32(__rev0); |
| | 39321 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 39322 | return __ret; |
| | 39323 | } |
| | 39324 | #endif |
| | 39325 | |
| | 39326 | #ifdef __LITTLE_ENDIAN__ |
| | 39327 | __ai __attribute__((target("bf16"))) bfloat16x8_t vcvtq_high_bf16_f32(bfloat16x8_t __p0, float32x4_t __p1) { |
| | 39328 | bfloat16x8_t __ret; |
| | 39329 | __ret = vcombine_bf16(__a32_vcvt_bf16_f32(__p1), vget_low_bf16(__p0)); |
| | 39330 | return __ret; |
| | 39331 | } |
| | 39332 | #else |
| | 39333 | __ai __attribute__((target("bf16"))) bfloat16x8_t vcvtq_high_bf16_f32(bfloat16x8_t __p0, float32x4_t __p1) { |
| | 39334 | bfloat16x8_t __ret; |
| | 39335 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 39336 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 39337 | __ret = __noswap_vcombine_bf16(__noswap___a32_vcvt_bf16_f32(__rev1), __noswap_vget_low_bf16(__rev0)); |
| | 39338 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 39339 | return __ret; |
| | 39340 | } |
| | 39341 | #endif |
| | 39342 | |
| | 39343 | #ifdef __LITTLE_ENDIAN__ |
| | 39344 | __ai __attribute__((target("bf16"))) bfloat16x8_t vcvtq_low_bf16_f32(float32x4_t __p0) { |
| | 39345 | bfloat16x8_t __ret; |
| | 39346 | __ret = vcombine_bf16((bfloat16x4_t)(0ULL), __a32_vcvt_bf16_f32(__p0)); |
| | 39347 | return __ret; |
| | 39348 | } |
| | 39349 | #else |
| | 39350 | __ai __attribute__((target("bf16"))) bfloat16x8_t vcvtq_low_bf16_f32(float32x4_t __p0) { |
| | 39351 | bfloat16x8_t __ret; |
| | 39352 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 39353 | __ret = __noswap_vcombine_bf16((bfloat16x4_t)(0ULL), __noswap___a32_vcvt_bf16_f32(__rev0)); |
| | 39354 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 39355 | return __ret; |
| | 39356 | } |
| | 39357 | #endif |
| | 39358 | |
| | 39359 | __ai __attribute__((target("bf16"))) poly8x8_t vreinterpret_p8_bf16(bfloat16x4_t __p0) { |
| | 39360 | poly8x8_t __ret; |
| | 39361 | __ret = (poly8x8_t)(__p0); |
| | 39362 | return __ret; |
| | 39363 | } |
| | 39364 | __ai __attribute__((target("bf16"))) poly64x1_t vreinterpret_p64_bf16(bfloat16x4_t __p0) { |
| | 39365 | poly64x1_t __ret; |
| | 39366 | __ret = (poly64x1_t)(__p0); |
| | 39367 | return __ret; |
| | 39368 | } |
| | 39369 | __ai __attribute__((target("bf16"))) poly16x4_t vreinterpret_p16_bf16(bfloat16x4_t __p0) { |
| | 39370 | poly16x4_t __ret; |
| | 39371 | __ret = (poly16x4_t)(__p0); |
| | 39372 | return __ret; |
| | 39373 | } |
| | 39374 | __ai __attribute__((target("bf16"))) poly8x16_t vreinterpretq_p8_bf16(bfloat16x8_t __p0) { |
| | 39375 | poly8x16_t __ret; |
| | 39376 | __ret = (poly8x16_t)(__p0); |
| | 39377 | return __ret; |
| | 39378 | } |
| | 39379 | __ai __attribute__((target("bf16"))) poly64x2_t vreinterpretq_p64_bf16(bfloat16x8_t __p0) { |
| | 39380 | poly64x2_t __ret; |
| | 39381 | __ret = (poly64x2_t)(__p0); |
| | 39382 | return __ret; |
| | 39383 | } |
| | 39384 | __ai __attribute__((target("bf16"))) poly16x8_t vreinterpretq_p16_bf16(bfloat16x8_t __p0) { |
| | 39385 | poly16x8_t __ret; |
| | 39386 | __ret = (poly16x8_t)(__p0); |
| | 39387 | return __ret; |
| | 39388 | } |
| | 39389 | __ai __attribute__((target("bf16"))) uint8x16_t vreinterpretq_u8_bf16(bfloat16x8_t __p0) { |
| | 39390 | uint8x16_t __ret; |
| | 39391 | __ret = (uint8x16_t)(__p0); |
| | 39392 | return __ret; |
| | 39393 | } |
| | 39394 | __ai __attribute__((target("bf16"))) uint32x4_t vreinterpretq_u32_bf16(bfloat16x8_t __p0) { |
| | 39395 | uint32x4_t __ret; |
| | 39396 | __ret = (uint32x4_t)(__p0); |
| | 39397 | return __ret; |
| | 39398 | } |
| | 39399 | __ai __attribute__((target("bf16"))) uint64x2_t vreinterpretq_u64_bf16(bfloat16x8_t __p0) { |
| | 39400 | uint64x2_t __ret; |
| | 39401 | __ret = (uint64x2_t)(__p0); |
| | 39402 | return __ret; |
| | 39403 | } |
| | 39404 | __ai __attribute__((target("bf16"))) uint16x8_t vreinterpretq_u16_bf16(bfloat16x8_t __p0) { |
| | 39405 | uint16x8_t __ret; |
| | 39406 | __ret = (uint16x8_t)(__p0); |
| | 39407 | return __ret; |
| | 39408 | } |
| | 39409 | __ai __attribute__((target("bf16"))) int8x16_t vreinterpretq_s8_bf16(bfloat16x8_t __p0) { |
| | 39410 | int8x16_t __ret; |
| | 39411 | __ret = (int8x16_t)(__p0); |
| | 39412 | return __ret; |
| | 39413 | } |
| | 39414 | __ai __attribute__((target("bf16"))) float32x4_t vreinterpretq_f32_bf16(bfloat16x8_t __p0) { |
| | 39415 | float32x4_t __ret; |
| | 39416 | __ret = (float32x4_t)(__p0); |
| | 39417 | return __ret; |
| | 39418 | } |
| | 39419 | __ai __attribute__((target("bf16"))) float16x8_t vreinterpretq_f16_bf16(bfloat16x8_t __p0) { |
| | 39420 | float16x8_t __ret; |
| | 39421 | __ret = (float16x8_t)(__p0); |
| | 39422 | return __ret; |
| | 39423 | } |
| | 39424 | __ai __attribute__((target("bf16"))) int32x4_t vreinterpretq_s32_bf16(bfloat16x8_t __p0) { |
| | 39425 | int32x4_t __ret; |
| | 39426 | __ret = (int32x4_t)(__p0); |
| 38331 | return __ret; | 39427 | return __ret; |
| 38332 | } | 39428 | } |
| 38333 | __ai float16x4_t vreinterpret_f16_f64(float64x1_t __p0) { | 39429 | __ai __attribute__((target("bf16"))) int64x2_t vreinterpretq_s64_bf16(bfloat16x8_t __p0) { |
| 38334 | float16x4_t __ret; | 39430 | int64x2_t __ret; |
| 38335 | __ret = (float16x4_t)(__p0); | 39431 | __ret = (int64x2_t)(__p0); |
| 38336 | return __ret; | 39432 | return __ret; |
| 38337 | } | 39433 | } |
| 38338 | __ai float16x4_t vreinterpret_f16_f32(float32x2_t __p0) { | 39434 | __ai __attribute__((target("bf16"))) int16x8_t vreinterpretq_s16_bf16(bfloat16x8_t __p0) { |
| 38339 | float16x4_t __ret; | 39435 | int16x8_t __ret; |
| 38340 | __ret = (float16x4_t)(__p0); | 39436 | __ret = (int16x8_t)(__p0); |
| 38341 | return __ret; | 39437 | return __ret; |
| 38342 | } | 39438 | } |
| 38343 | __ai float16x4_t vreinterpret_f16_s32(int32x2_t __p0) { | 39439 | __ai __attribute__((target("bf16"))) uint8x8_t vreinterpret_u8_bf16(bfloat16x4_t __p0) { |
| 38344 | float16x4_t __ret; | 39440 | uint8x8_t __ret; |
| 38345 | __ret = (float16x4_t)(__p0); | 39441 | __ret = (uint8x8_t)(__p0); |
| 38346 | return __ret; | 39442 | return __ret; |
| 38347 | } | 39443 | } |
| 38348 | __ai float16x4_t vreinterpret_f16_s64(int64x1_t __p0) { | 39444 | __ai __attribute__((target("bf16"))) uint32x2_t vreinterpret_u32_bf16(bfloat16x4_t __p0) { |
| 38349 | float16x4_t __ret; | 39445 | uint32x2_t __ret; |
| 38350 | __ret = (float16x4_t)(__p0); | 39446 | __ret = (uint32x2_t)(__p0); |
| 38351 | return __ret; | 39447 | return __ret; |
| 38352 | } | 39448 | } |
| 38353 | __ai float16x4_t vreinterpret_f16_s16(int16x4_t __p0) { | 39449 | __ai __attribute__((target("bf16"))) uint64x1_t vreinterpret_u64_bf16(bfloat16x4_t __p0) { |
| 38354 | float16x4_t __ret; | 39450 | uint64x1_t __ret; |
| 38355 | __ret = (float16x4_t)(__p0); | 39451 | __ret = (uint64x1_t)(__p0); |
| 38356 | return __ret; | 39452 | return __ret; |
| 38357 | } | 39453 | } |
| 38358 | __ai int32x2_t vreinterpret_s32_p8(poly8x8_t __p0) { | 39454 | __ai __attribute__((target("bf16"))) uint16x4_t vreinterpret_u16_bf16(bfloat16x4_t __p0) { |
| 38359 | int32x2_t __ret; | 39455 | uint16x4_t __ret; |
| 38360 | __ret = (int32x2_t)(__p0); | 39456 | __ret = (uint16x4_t)(__p0); |
| 38361 | return __ret; | 39457 | return __ret; |
| 38362 | } | 39458 | } |
| 38363 | __ai int32x2_t vreinterpret_s32_p64(poly64x1_t __p0) { | 39459 | __ai __attribute__((target("bf16"))) int8x8_t vreinterpret_s8_bf16(bfloat16x4_t __p0) { |
| 38364 | int32x2_t __ret; | 39460 | int8x8_t __ret; |
| 38365 | __ret = (int32x2_t)(__p0); | 39461 | __ret = (int8x8_t)(__p0); |
| 38366 | return __ret; | 39462 | return __ret; |
| 38367 | } | 39463 | } |
| 38368 | __ai int32x2_t vreinterpret_s32_p16(poly16x4_t __p0) { | 39464 | __ai __attribute__((target("bf16"))) float32x2_t vreinterpret_f32_bf16(bfloat16x4_t __p0) { |
| 38369 | int32x2_t __ret; | 39465 | float32x2_t __ret; |
| 38370 | __ret = (int32x2_t)(__p0); | 39466 | __ret = (float32x2_t)(__p0); |
| 38371 | return __ret; | 39467 | return __ret; |
| 38372 | } | 39468 | } |
| 38373 | __ai int32x2_t vreinterpret_s32_u8(uint8x8_t __p0) { | 39469 | __ai __attribute__((target("bf16"))) float16x4_t vreinterpret_f16_bf16(bfloat16x4_t __p0) { |
| 38374 | int32x2_t __ret; | 39470 | float16x4_t __ret; |
| 38375 | __ret = (int32x2_t)(__p0); | 39471 | __ret = (float16x4_t)(__p0); |
| 38376 | return __ret; | 39472 | return __ret; |
| 38377 | } | 39473 | } |
| 38378 | __ai int32x2_t vreinterpret_s32_u32(uint32x2_t __p0) { | 39474 | __ai __attribute__((target("bf16"))) int32x2_t vreinterpret_s32_bf16(bfloat16x4_t __p0) { |
| 38379 | int32x2_t __ret; | 39475 | int32x2_t __ret; |
| 38380 | __ret = (int32x2_t)(__p0); | 39476 | __ret = (int32x2_t)(__p0); |
| 38381 | return __ret; | 39477 | return __ret; |
| 38382 | } | 39478 | } |
| 38383 | __ai int32x2_t vreinterpret_s32_u64(uint64x1_t __p0) { | 39479 | __ai __attribute__((target("bf16"))) int64x1_t vreinterpret_s64_bf16(bfloat16x4_t __p0) { |
| 38384 | int32x2_t __ret; | 39480 | int64x1_t __ret; |
| 38385 | __ret = (int32x2_t)(__p0); | 39481 | __ret = (int64x1_t)(__p0); |
| 38386 | return __ret; | 39482 | return __ret; |
| 38387 | } | 39483 | } |
| 38388 | __ai int32x2_t vreinterpret_s32_u16(uint16x4_t __p0) { | 39484 | __ai __attribute__((target("bf16"))) int16x4_t vreinterpret_s16_bf16(bfloat16x4_t __p0) { |
| 38389 | int32x2_t __ret; | 39485 | int16x4_t __ret; |
| 38390 | __ret = (int32x2_t)(__p0); | 39486 | __ret = (int16x4_t)(__p0); |
| 38391 | return __ret; | 39487 | return __ret; |
| 38392 | } | 39488 | } |
| 38393 | __ai int32x2_t vreinterpret_s32_s8(int8x8_t __p0) { | 39489 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_p8(poly8x16_t __p0) { |
| 38394 | int32x2_t __ret; | 39490 | bfloat16x8_t __ret; |
| 38395 | __ret = (int32x2_t)(__p0); | 39491 | __ret = (bfloat16x8_t)(__p0); |
| 38396 | return __ret; | 39492 | return __ret; |
| 38397 | } | 39493 | } |
| 38398 | __ai int32x2_t vreinterpret_s32_f64(float64x1_t __p0) { | 39494 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_p64(poly64x2_t __p0) { |
| 38399 | int32x2_t __ret; | 39495 | bfloat16x8_t __ret; |
| 38400 | __ret = (int32x2_t)(__p0); | 39496 | __ret = (bfloat16x8_t)(__p0); |
| 38401 | return __ret; | 39497 | return __ret; |
| 38402 | } | 39498 | } |
| 38403 | __ai int32x2_t vreinterpret_s32_f32(float32x2_t __p0) { | 39499 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_p16(poly16x8_t __p0) { |
| 38404 | int32x2_t __ret; | 39500 | bfloat16x8_t __ret; |
| 38405 | __ret = (int32x2_t)(__p0); | 39501 | __ret = (bfloat16x8_t)(__p0); |
| 38406 | return __ret; | 39502 | return __ret; |
| 38407 | } | 39503 | } |
| 38408 | __ai int32x2_t vreinterpret_s32_f16(float16x4_t __p0) { | 39504 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_u8(uint8x16_t __p0) { |
| 38409 | int32x2_t __ret; | 39505 | bfloat16x8_t __ret; |
| 38410 | __ret = (int32x2_t)(__p0); | 39506 | __ret = (bfloat16x8_t)(__p0); |
| 38411 | return __ret; | 39507 | return __ret; |
| 38412 | } | 39508 | } |
| 38413 | __ai int32x2_t vreinterpret_s32_s64(int64x1_t __p0) { | 39509 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_u32(uint32x4_t __p0) { |
| 38414 | int32x2_t __ret; | 39510 | bfloat16x8_t __ret; |
| 38415 | __ret = (int32x2_t)(__p0); | 39511 | __ret = (bfloat16x8_t)(__p0); |
| 38416 | return __ret; | 39512 | return __ret; |
| 38417 | } | 39513 | } |
| 38418 | __ai int32x2_t vreinterpret_s32_s16(int16x4_t __p0) { | 39514 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_u64(uint64x2_t __p0) { |
| 38419 | int32x2_t __ret; | 39515 | bfloat16x8_t __ret; |
| 38420 | __ret = (int32x2_t)(__p0); | 39516 | __ret = (bfloat16x8_t)(__p0); |
| 38421 | return __ret; | 39517 | return __ret; |
| 38422 | } | 39518 | } |
| 38423 | __ai int64x1_t vreinterpret_s64_p8(poly8x8_t __p0) { | 39519 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_u16(uint16x8_t __p0) { |
| 38424 | int64x1_t __ret; | 39520 | bfloat16x8_t __ret; |
| 38425 | __ret = (int64x1_t)(__p0); | 39521 | __ret = (bfloat16x8_t)(__p0); |
| 38426 | return __ret; | 39522 | return __ret; |
| 38427 | } | 39523 | } |
| 38428 | __ai int64x1_t vreinterpret_s64_p64(poly64x1_t __p0) { | 39524 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_s8(int8x16_t __p0) { |
| 38429 | int64x1_t __ret; | 39525 | bfloat16x8_t __ret; |
| 38430 | __ret = (int64x1_t)(__p0); | 39526 | __ret = (bfloat16x8_t)(__p0); |
| 38431 | return __ret; | 39527 | return __ret; |
| 38432 | } | 39528 | } |
| 38433 | __ai int64x1_t vreinterpret_s64_p16(poly16x4_t __p0) { | 39529 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_f32(float32x4_t __p0) { |
| 38434 | int64x1_t __ret; | 39530 | bfloat16x8_t __ret; |
| 38435 | __ret = (int64x1_t)(__p0); | 39531 | __ret = (bfloat16x8_t)(__p0); |
| 38436 | return __ret; | 39532 | return __ret; |
| 38437 | } | 39533 | } |
| 38438 | __ai int64x1_t vreinterpret_s64_u8(uint8x8_t __p0) { | 39534 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_f16(float16x8_t __p0) { |
| 38439 | int64x1_t __ret; | 39535 | bfloat16x8_t __ret; |
| 38440 | __ret = (int64x1_t)(__p0); | 39536 | __ret = (bfloat16x8_t)(__p0); |
| 38441 | return __ret; | 39537 | return __ret; |
| 38442 | } | 39538 | } |
| 38443 | __ai int64x1_t vreinterpret_s64_u32(uint32x2_t __p0) { | 39539 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_s32(int32x4_t __p0) { |
| 38444 | int64x1_t __ret; | 39540 | bfloat16x8_t __ret; |
| 38445 | __ret = (int64x1_t)(__p0); | 39541 | __ret = (bfloat16x8_t)(__p0); |
| 38446 | return __ret; | 39542 | return __ret; |
| 38447 | } | 39543 | } |
| 38448 | __ai int64x1_t vreinterpret_s64_u64(uint64x1_t __p0) { | 39544 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_s64(int64x2_t __p0) { |
| 38449 | int64x1_t __ret; | 39545 | bfloat16x8_t __ret; |
| 38450 | __ret = (int64x1_t)(__p0); | 39546 | __ret = (bfloat16x8_t)(__p0); |
| 38451 | return __ret; | 39547 | return __ret; |
| 38452 | } | 39548 | } |
| 38453 | __ai int64x1_t vreinterpret_s64_u16(uint16x4_t __p0) { | 39549 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_s16(int16x8_t __p0) { |
| 38454 | int64x1_t __ret; | 39550 | bfloat16x8_t __ret; |
| 38455 | __ret = (int64x1_t)(__p0); | 39551 | __ret = (bfloat16x8_t)(__p0); |
| 38456 | return __ret; | 39552 | return __ret; |
| 38457 | } | 39553 | } |
| 38458 | __ai int64x1_t vreinterpret_s64_s8(int8x8_t __p0) { | 39554 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_p8(poly8x8_t __p0) { |
| 38459 | int64x1_t __ret; | 39555 | bfloat16x4_t __ret; |
| 38460 | __ret = (int64x1_t)(__p0); | 39556 | __ret = (bfloat16x4_t)(__p0); |
| 38461 | return __ret; | 39557 | return __ret; |
| 38462 | } | 39558 | } |
| 38463 | __ai int64x1_t vreinterpret_s64_f64(float64x1_t __p0) { | 39559 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_p64(poly64x1_t __p0) { |
| 38464 | int64x1_t __ret; | 39560 | bfloat16x4_t __ret; |
| 38465 | __ret = (int64x1_t)(__p0); | 39561 | __ret = (bfloat16x4_t)(__p0); |
| 38466 | return __ret; | 39562 | return __ret; |
| 38467 | } | 39563 | } |
| 38468 | __ai int64x1_t vreinterpret_s64_f32(float32x2_t __p0) { | 39564 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_p16(poly16x4_t __p0) { |
| 38469 | int64x1_t __ret; | 39565 | bfloat16x4_t __ret; |
| 38470 | __ret = (int64x1_t)(__p0); | 39566 | __ret = (bfloat16x4_t)(__p0); |
| 38471 | return __ret; | 39567 | return __ret; |
| 38472 | } | 39568 | } |
| 38473 | __ai int64x1_t vreinterpret_s64_f16(float16x4_t __p0) { | 39569 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_u8(uint8x8_t __p0) { |
| 38474 | int64x1_t __ret; | 39570 | bfloat16x4_t __ret; |
| 38475 | __ret = (int64x1_t)(__p0); | 39571 | __ret = (bfloat16x4_t)(__p0); |
| 38476 | return __ret; | 39572 | return __ret; |
| 38477 | } | 39573 | } |
| 38478 | __ai int64x1_t vreinterpret_s64_s32(int32x2_t __p0) { | 39574 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_u32(uint32x2_t __p0) { |
| 38479 | int64x1_t __ret; | 39575 | bfloat16x4_t __ret; |
| 38480 | __ret = (int64x1_t)(__p0); | 39576 | __ret = (bfloat16x4_t)(__p0); |
| 38481 | return __ret; | 39577 | return __ret; |
| 38482 | } | 39578 | } |
| 38483 | __ai int64x1_t vreinterpret_s64_s16(int16x4_t __p0) { | 39579 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_u64(uint64x1_t __p0) { |
| 38484 | int64x1_t __ret; | 39580 | bfloat16x4_t __ret; |
| 38485 | __ret = (int64x1_t)(__p0); | 39581 | __ret = (bfloat16x4_t)(__p0); |
| 38486 | return __ret; | 39582 | return __ret; |
| 38487 | } | 39583 | } |
| 38488 | __ai int16x4_t vreinterpret_s16_p8(poly8x8_t __p0) { | 39584 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_u16(uint16x4_t __p0) { |
| 38489 | int16x4_t __ret; | 39585 | bfloat16x4_t __ret; |
| 38490 | __ret = (int16x4_t)(__p0); | 39586 | __ret = (bfloat16x4_t)(__p0); |
| 38491 | return __ret; | 39587 | return __ret; |
| 38492 | } | 39588 | } |
| 38493 | __ai int16x4_t vreinterpret_s16_p64(poly64x1_t __p0) { | 39589 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_s8(int8x8_t __p0) { |
| 38494 | int16x4_t __ret; | 39590 | bfloat16x4_t __ret; |
| 38495 | __ret = (int16x4_t)(__p0); | 39591 | __ret = (bfloat16x4_t)(__p0); |
| 38496 | return __ret; | 39592 | return __ret; |
| 38497 | } | 39593 | } |
| 38498 | __ai int16x4_t vreinterpret_s16_p16(poly16x4_t __p0) { | 39594 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_f32(float32x2_t __p0) { |
| 38499 | int16x4_t __ret; | 39595 | bfloat16x4_t __ret; |
| 38500 | __ret = (int16x4_t)(__p0); | 39596 | __ret = (bfloat16x4_t)(__p0); |
| 38501 | return __ret; | 39597 | return __ret; |
| 38502 | } | 39598 | } |
| 38503 | __ai int16x4_t vreinterpret_s16_u8(uint8x8_t __p0) { | 39599 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_f16(float16x4_t __p0) { |
| 38504 | int16x4_t __ret; | 39600 | bfloat16x4_t __ret; |
| 38505 | __ret = (int16x4_t)(__p0); | 39601 | __ret = (bfloat16x4_t)(__p0); |
| 38506 | return __ret; | 39602 | return __ret; |
| 38507 | } | 39603 | } |
| 38508 | __ai int16x4_t vreinterpret_s16_u32(uint32x2_t __p0) { | 39604 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_s32(int32x2_t __p0) { |
| 38509 | int16x4_t __ret; | 39605 | bfloat16x4_t __ret; |
| 38510 | __ret = (int16x4_t)(__p0); | 39606 | __ret = (bfloat16x4_t)(__p0); |
| 38511 | return __ret; | 39607 | return __ret; |
| 38512 | } | 39608 | } |
| 38513 | __ai int16x4_t vreinterpret_s16_u64(uint64x1_t __p0) { | 39609 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_s64(int64x1_t __p0) { |
| 38514 | int16x4_t __ret; | 39610 | bfloat16x4_t __ret; |
| 38515 | __ret = (int16x4_t)(__p0); | 39611 | __ret = (bfloat16x4_t)(__p0); |
| 38516 | return __ret; | 39612 | return __ret; |
| 38517 | } | 39613 | } |
| 38518 | __ai int16x4_t vreinterpret_s16_u16(uint16x4_t __p0) { | 39614 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_s16(int16x4_t __p0) { |
| 38519 | int16x4_t __ret; | 39615 | bfloat16x4_t __ret; |
| 38520 | __ret = (int16x4_t)(__p0); | 39616 | __ret = (bfloat16x4_t)(__p0); |
| 38521 | return __ret; | 39617 | return __ret; |
| 38522 | } | 39618 | } |
| 38523 | __ai int16x4_t vreinterpret_s16_s8(int8x8_t __p0) { | 39619 | #endif |
| 38524 | int16x4_t __ret; | 39620 | #if (__ARM_FP & 2) |
| 38525 | __ret = (int16x4_t)(__p0); | 39621 | #ifdef __LITTLE_ENDIAN__ |
| | 39622 | __ai float16x4_t vcvt_f16_f32(float32x4_t __p0) { |
| | 39623 | float16x4_t __ret; |
| | 39624 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_f32((int8x16_t)__p0, 41); |
| 38526 | return __ret; | 39625 | return __ret; |
| 38527 | } | 39626 | } |
| 38528 | __ai int16x4_t vreinterpret_s16_f64(float64x1_t __p0) { | 39627 | #else |
| 38529 | int16x4_t __ret; | 39628 | __ai float16x4_t vcvt_f16_f32(float32x4_t __p0) { |
| 38530 | __ret = (int16x4_t)(__p0); | 39629 | float16x4_t __ret; |
| | 39630 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 39631 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_f32((int8x16_t)__rev0, 41); |
| | 39632 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 38531 | return __ret; | 39633 | return __ret; |
| 38532 | } | 39634 | } |
| 38533 | __ai int16x4_t vreinterpret_s16_f32(float32x2_t __p0) { | 39635 | __ai float16x4_t __noswap_vcvt_f16_f32(float32x4_t __p0) { |
| 38534 | int16x4_t __ret; | 39636 | float16x4_t __ret; |
| 38535 | __ret = (int16x4_t)(__p0); | 39637 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_f32((int8x16_t)__p0, 41); |
| 38536 | return __ret; | 39638 | return __ret; |
| 38537 | } | 39639 | } |
| 38538 | __ai int16x4_t vreinterpret_s16_f16(float16x4_t __p0) { | 39640 | #endif |
| 38539 | int16x4_t __ret; | 39641 | |
| 38540 | __ret = (int16x4_t)(__p0); | 39642 | #ifdef __LITTLE_ENDIAN__ |
| | 39643 | __ai float32x4_t vcvt_f32_f16(float16x4_t __p0) { |
| | 39644 | float32x4_t __ret; |
| | 39645 | __ret = (float32x4_t) __builtin_neon_vcvt_f32_f16((int8x8_t)__p0, 8); |
| 38541 | return __ret; | 39646 | return __ret; |
| 38542 | } | 39647 | } |
| 38543 | __ai int16x4_t vreinterpret_s16_s32(int32x2_t __p0) { | 39648 | #else |
| 38544 | int16x4_t __ret; | 39649 | __ai float32x4_t vcvt_f32_f16(float16x4_t __p0) { |
| 38545 | __ret = (int16x4_t)(__p0); | 39650 | float32x4_t __ret; |
| | 39651 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 39652 | __ret = (float32x4_t) __builtin_neon_vcvt_f32_f16((int8x8_t)__rev0, 8); |
| | 39653 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 38546 | return __ret; | 39654 | return __ret; |
| 38547 | } | 39655 | } |
| 38548 | __ai int16x4_t vreinterpret_s16_s64(int64x1_t __p0) { | 39656 | __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 38549 | int16x4_t __ret; | 39657 | float32x4_t __ret; |
| 38550 | __ret = (int16x4_t)(__p0); | 39658 | __ret = (float32x4_t) __builtin_neon_vcvt_f32_f16((int8x8_t)__p0, 8); |
| 38551 | return __ret; | 39659 | return __ret; |
| 38552 | } | 39660 | } |
| 38553 | #endif | 39661 | #endif |
| 38554 | #if __ARM_ARCH >= 8 && defined(__aarch64__) && defined(__ARM_FEATURE_DIRECTED_ROUNDING) | 39662 | |
| | 39663 | #ifdef __LITTLE_ENDIAN__ |
| | 39664 | #define vld1q_f16(__p0) __extension__ ({ \ |
| | 39665 | float16x8_t __ret; \ |
| | 39666 | __ret = (float16x8_t) __builtin_neon_vld1q_v(__p0, 40); \ |
| | 39667 | __ret; \ |
| | 39668 | }) |
| | 39669 | #else |
| | 39670 | #define vld1q_f16(__p0) __extension__ ({ \ |
| | 39671 | float16x8_t __ret; \ |
| | 39672 | __ret = (float16x8_t) __builtin_neon_vld1q_v(__p0, 40); \ |
| | 39673 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39674 | __ret; \ |
| | 39675 | }) |
| | 39676 | #endif |
| | 39677 | |
| | 39678 | #ifdef __LITTLE_ENDIAN__ |
| | 39679 | #define vld1_f16(__p0) __extension__ ({ \ |
| | 39680 | float16x4_t __ret; \ |
| | 39681 | __ret = (float16x4_t) __builtin_neon_vld1_v(__p0, 8); \ |
| | 39682 | __ret; \ |
| | 39683 | }) |
| | 39684 | #else |
| | 39685 | #define vld1_f16(__p0) __extension__ ({ \ |
| | 39686 | float16x4_t __ret; \ |
| | 39687 | __ret = (float16x4_t) __builtin_neon_vld1_v(__p0, 8); \ |
| | 39688 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 39689 | __ret; \ |
| | 39690 | }) |
| | 39691 | #endif |
| | 39692 | |
| | 39693 | #ifdef __LITTLE_ENDIAN__ |
| | 39694 | #define vld1q_dup_f16(__p0) __extension__ ({ \ |
| | 39695 | float16x8_t __ret; \ |
| | 39696 | __ret = (float16x8_t) __builtin_neon_vld1q_dup_v(__p0, 40); \ |
| | 39697 | __ret; \ |
| | 39698 | }) |
| | 39699 | #else |
| | 39700 | #define vld1q_dup_f16(__p0) __extension__ ({ \ |
| | 39701 | float16x8_t __ret; \ |
| | 39702 | __ret = (float16x8_t) __builtin_neon_vld1q_dup_v(__p0, 40); \ |
| | 39703 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39704 | __ret; \ |
| | 39705 | }) |
| | 39706 | #endif |
| | 39707 | |
| | 39708 | #ifdef __LITTLE_ENDIAN__ |
| | 39709 | #define vld1_dup_f16(__p0) __extension__ ({ \ |
| | 39710 | float16x4_t __ret; \ |
| | 39711 | __ret = (float16x4_t) __builtin_neon_vld1_dup_v(__p0, 8); \ |
| | 39712 | __ret; \ |
| | 39713 | }) |
| | 39714 | #else |
| | 39715 | #define vld1_dup_f16(__p0) __extension__ ({ \ |
| | 39716 | float16x4_t __ret; \ |
| | 39717 | __ret = (float16x4_t) __builtin_neon_vld1_dup_v(__p0, 8); \ |
| | 39718 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 39719 | __ret; \ |
| | 39720 | }) |
| | 39721 | #endif |
| | 39722 | |
| | 39723 | #ifdef __LITTLE_ENDIAN__ |
| | 39724 | #define vld1q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 39725 | float16x8_t __ret; \ |
| | 39726 | float16x8_t __s1 = __p1; \ |
| | 39727 | __ret = (float16x8_t) __builtin_neon_vld1q_lane_v(__p0, (int8x16_t)__s1, __p2, 40); \ |
| | 39728 | __ret; \ |
| | 39729 | }) |
| | 39730 | #else |
| | 39731 | #define vld1q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 39732 | float16x8_t __ret; \ |
| | 39733 | float16x8_t __s1 = __p1; \ |
| | 39734 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39735 | __ret = (float16x8_t) __builtin_neon_vld1q_lane_v(__p0, (int8x16_t)__rev1, __p2, 40); \ |
| | 39736 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39737 | __ret; \ |
| | 39738 | }) |
| | 39739 | #endif |
| | 39740 | |
| | 39741 | #ifdef __LITTLE_ENDIAN__ |
| | 39742 | #define vld1_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 39743 | float16x4_t __ret; \ |
| | 39744 | float16x4_t __s1 = __p1; \ |
| | 39745 | __ret = (float16x4_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 8); \ |
| | 39746 | __ret; \ |
| | 39747 | }) |
| | 39748 | #else |
| | 39749 | #define vld1_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 39750 | float16x4_t __ret; \ |
| | 39751 | float16x4_t __s1 = __p1; \ |
| | 39752 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| | 39753 | __ret = (float16x4_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__rev1, __p2, 8); \ |
| | 39754 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 39755 | __ret; \ |
| | 39756 | }) |
| | 39757 | #endif |
| | 39758 | |
| | 39759 | #ifdef __LITTLE_ENDIAN__ |
| | 39760 | #define vld1q_f16_x2(__p0) __extension__ ({ \ |
| | 39761 | float16x8x2_t __ret; \ |
| | 39762 | __builtin_neon_vld1q_x2_v(&__ret, __p0, 40); \ |
| | 39763 | __ret; \ |
| | 39764 | }) |
| | 39765 | #else |
| | 39766 | #define vld1q_f16_x2(__p0) __extension__ ({ \ |
| | 39767 | float16x8x2_t __ret; \ |
| | 39768 | __builtin_neon_vld1q_x2_v(&__ret, __p0, 40); \ |
| | 39769 | \ |
| | 39770 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39771 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39772 | __ret; \ |
| | 39773 | }) |
| | 39774 | #endif |
| | 39775 | |
| | 39776 | #ifdef __LITTLE_ENDIAN__ |
| | 39777 | #define vld1_f16_x2(__p0) __extension__ ({ \ |
| | 39778 | float16x4x2_t __ret; \ |
| | 39779 | __builtin_neon_vld1_x2_v(&__ret, __p0, 8); \ |
| | 39780 | __ret; \ |
| | 39781 | }) |
| | 39782 | #else |
| | 39783 | #define vld1_f16_x2(__p0) __extension__ ({ \ |
| | 39784 | float16x4x2_t __ret; \ |
| | 39785 | __builtin_neon_vld1_x2_v(&__ret, __p0, 8); \ |
| | 39786 | \ |
| | 39787 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| | 39788 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| | 39789 | __ret; \ |
| | 39790 | }) |
| | 39791 | #endif |
| | 39792 | |
| | 39793 | #ifdef __LITTLE_ENDIAN__ |
| | 39794 | #define vld1q_f16_x3(__p0) __extension__ ({ \ |
| | 39795 | float16x8x3_t __ret; \ |
| | 39796 | __builtin_neon_vld1q_x3_v(&__ret, __p0, 40); \ |
| | 39797 | __ret; \ |
| | 39798 | }) |
| | 39799 | #else |
| | 39800 | #define vld1q_f16_x3(__p0) __extension__ ({ \ |
| | 39801 | float16x8x3_t __ret; \ |
| | 39802 | __builtin_neon_vld1q_x3_v(&__ret, __p0, 40); \ |
| | 39803 | \ |
| | 39804 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39805 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39806 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39807 | __ret; \ |
| | 39808 | }) |
| | 39809 | #endif |
| | 39810 | |
| | 39811 | #ifdef __LITTLE_ENDIAN__ |
| | 39812 | #define vld1_f16_x3(__p0) __extension__ ({ \ |
| | 39813 | float16x4x3_t __ret; \ |
| | 39814 | __builtin_neon_vld1_x3_v(&__ret, __p0, 8); \ |
| | 39815 | __ret; \ |
| | 39816 | }) |
| | 39817 | #else |
| | 39818 | #define vld1_f16_x3(__p0) __extension__ ({ \ |
| | 39819 | float16x4x3_t __ret; \ |
| | 39820 | __builtin_neon_vld1_x3_v(&__ret, __p0, 8); \ |
| | 39821 | \ |
| | 39822 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| | 39823 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| | 39824 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| | 39825 | __ret; \ |
| | 39826 | }) |
| | 39827 | #endif |
| | 39828 | |
| | 39829 | #ifdef __LITTLE_ENDIAN__ |
| | 39830 | #define vld1q_f16_x4(__p0) __extension__ ({ \ |
| | 39831 | float16x8x4_t __ret; \ |
| | 39832 | __builtin_neon_vld1q_x4_v(&__ret, __p0, 40); \ |
| | 39833 | __ret; \ |
| | 39834 | }) |
| | 39835 | #else |
| | 39836 | #define vld1q_f16_x4(__p0) __extension__ ({ \ |
| | 39837 | float16x8x4_t __ret; \ |
| | 39838 | __builtin_neon_vld1q_x4_v(&__ret, __p0, 40); \ |
| | 39839 | \ |
| | 39840 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39841 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39842 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39843 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39844 | __ret; \ |
| | 39845 | }) |
| | 39846 | #endif |
| | 39847 | |
| | 39848 | #ifdef __LITTLE_ENDIAN__ |
| | 39849 | #define vld1_f16_x4(__p0) __extension__ ({ \ |
| | 39850 | float16x4x4_t __ret; \ |
| | 39851 | __builtin_neon_vld1_x4_v(&__ret, __p0, 8); \ |
| | 39852 | __ret; \ |
| | 39853 | }) |
| | 39854 | #else |
| | 39855 | #define vld1_f16_x4(__p0) __extension__ ({ \ |
| | 39856 | float16x4x4_t __ret; \ |
| | 39857 | __builtin_neon_vld1_x4_v(&__ret, __p0, 8); \ |
| | 39858 | \ |
| | 39859 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| | 39860 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| | 39861 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| | 39862 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ |
| | 39863 | __ret; \ |
| | 39864 | }) |
| | 39865 | #endif |
| | 39866 | |
| | 39867 | #ifdef __LITTLE_ENDIAN__ |
| | 39868 | #define vld2q_f16(__p0) __extension__ ({ \ |
| | 39869 | float16x8x2_t __ret; \ |
| | 39870 | __builtin_neon_vld2q_v(&__ret, __p0, 40); \ |
| | 39871 | __ret; \ |
| | 39872 | }) |
| | 39873 | #else |
| | 39874 | #define vld2q_f16(__p0) __extension__ ({ \ |
| | 39875 | float16x8x2_t __ret; \ |
| | 39876 | __builtin_neon_vld2q_v(&__ret, __p0, 40); \ |
| | 39877 | \ |
| | 39878 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39879 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39880 | __ret; \ |
| | 39881 | }) |
| | 39882 | #endif |
| | 39883 | |
| | 39884 | #ifdef __LITTLE_ENDIAN__ |
| | 39885 | #define vld2_f16(__p0) __extension__ ({ \ |
| | 39886 | float16x4x2_t __ret; \ |
| | 39887 | __builtin_neon_vld2_v(&__ret, __p0, 8); \ |
| | 39888 | __ret; \ |
| | 39889 | }) |
| | 39890 | #else |
| | 39891 | #define vld2_f16(__p0) __extension__ ({ \ |
| | 39892 | float16x4x2_t __ret; \ |
| | 39893 | __builtin_neon_vld2_v(&__ret, __p0, 8); \ |
| | 39894 | \ |
| | 39895 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| | 39896 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| | 39897 | __ret; \ |
| | 39898 | }) |
| | 39899 | #endif |
| | 39900 | |
| | 39901 | #ifdef __LITTLE_ENDIAN__ |
| | 39902 | #define vld2q_dup_f16(__p0) __extension__ ({ \ |
| | 39903 | float16x8x2_t __ret; \ |
| | 39904 | __builtin_neon_vld2q_dup_v(&__ret, __p0, 40); \ |
| | 39905 | __ret; \ |
| | 39906 | }) |
| | 39907 | #else |
| | 39908 | #define vld2q_dup_f16(__p0) __extension__ ({ \ |
| | 39909 | float16x8x2_t __ret; \ |
| | 39910 | __builtin_neon_vld2q_dup_v(&__ret, __p0, 40); \ |
| | 39911 | \ |
| | 39912 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39913 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39914 | __ret; \ |
| | 39915 | }) |
| | 39916 | #endif |
| | 39917 | |
| | 39918 | #ifdef __LITTLE_ENDIAN__ |
| | 39919 | #define vld2_dup_f16(__p0) __extension__ ({ \ |
| | 39920 | float16x4x2_t __ret; \ |
| | 39921 | __builtin_neon_vld2_dup_v(&__ret, __p0, 8); \ |
| | 39922 | __ret; \ |
| | 39923 | }) |
| | 39924 | #else |
| | 39925 | #define vld2_dup_f16(__p0) __extension__ ({ \ |
| | 39926 | float16x4x2_t __ret; \ |
| | 39927 | __builtin_neon_vld2_dup_v(&__ret, __p0, 8); \ |
| | 39928 | \ |
| | 39929 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| | 39930 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| | 39931 | __ret; \ |
| | 39932 | }) |
| | 39933 | #endif |
| | 39934 | |
| 38555 | #ifdef __LITTLE_ENDIAN__ | 39935 | #ifdef __LITTLE_ENDIAN__ |
| 38556 | __ai float64x2_t vrndq_f64(float64x2_t __p0) { | 39936 | #define vld2q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 38557 | float64x2_t __ret; | 39937 | float16x8x2_t __ret; \ |
| 38558 | __ret = (float64x2_t) __builtin_neon_vrndq_v((int8x16_t)__p0, 42); | 39938 | float16x8x2_t __s1 = __p1; \ |
| 38559 | return __ret; | 39939 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 40); \ |
| 38560 | } | 39940 | __ret; \ |
| | 39941 | }) |
| 38561 | #else | 39942 | #else |
| 38562 | __ai float64x2_t vrndq_f64(float64x2_t __p0) { | 39943 | #define vld2q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 38563 | float64x2_t __ret; | 39944 | float16x8x2_t __ret; \ |
| 38564 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 39945 | float16x8x2_t __s1 = __p1; \ |
| 38565 | __ret = (float64x2_t) __builtin_neon_vrndq_v((int8x16_t)__rev0, 42); | 39946 | float16x8x2_t __rev1; \ |
| 38566 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 39947 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38567 | return __ret; | 39948 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38568 | } | 39949 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 40); \ |
| | 39950 | \ |
| | 39951 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39952 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39953 | __ret; \ |
| | 39954 | }) |
| 38569 | #endif | 39955 | #endif |
| 38570 | | 39956 | |
| 38571 | __ai float64x1_t vrnd_f64(float64x1_t __p0) { | | |
| 38572 | float64x1_t __ret; | | |
| 38573 | __ret = (float64x1_t) __builtin_neon_vrnd_v((int8x8_t)__p0, 10); | | |
| 38574 | return __ret; | | |
| 38575 | } | | |
| 38576 | #ifdef __LITTLE_ENDIAN__ | 39957 | #ifdef __LITTLE_ENDIAN__ |
| 38577 | __ai float64x2_t vrndaq_f64(float64x2_t __p0) { | 39958 | #define vld2_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 38578 | float64x2_t __ret; | 39959 | float16x4x2_t __ret; \ |
| 38579 | __ret = (float64x2_t) __builtin_neon_vrndaq_v((int8x16_t)__p0, 42); | 39960 | float16x4x2_t __s1 = __p1; \ |
| 38580 | return __ret; | 39961 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 8); \ |
| 38581 | } | 39962 | __ret; \ |
| | 39963 | }) |
| 38582 | #else | 39964 | #else |
| 38583 | __ai float64x2_t vrndaq_f64(float64x2_t __p0) { | 39965 | #define vld2_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 38584 | float64x2_t __ret; | 39966 | float16x4x2_t __ret; \ |
| 38585 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 39967 | float16x4x2_t __s1 = __p1; \ |
| 38586 | __ret = (float64x2_t) __builtin_neon_vrndaq_v((int8x16_t)__rev0, 42); | 39968 | float16x4x2_t __rev1; \ |
| 38587 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 39969 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 38588 | return __ret; | 39970 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 38589 | } | 39971 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 8); \ |
| | 39972 | \ |
| | 39973 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| | 39974 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| | 39975 | __ret; \ |
| | 39976 | }) |
| 38590 | #endif | 39977 | #endif |
| 38591 | | 39978 | |
| 38592 | __ai float64x1_t vrnda_f64(float64x1_t __p0) { | | |
| 38593 | float64x1_t __ret; | | |
| 38594 | __ret = (float64x1_t) __builtin_neon_vrnda_v((int8x8_t)__p0, 10); | | |
| 38595 | return __ret; | | |
| 38596 | } | | |
| 38597 | #ifdef __LITTLE_ENDIAN__ | 39979 | #ifdef __LITTLE_ENDIAN__ |
| 38598 | __ai float64x2_t vrndiq_f64(float64x2_t __p0) { | 39980 | #define vld3q_f16(__p0) __extension__ ({ \ |
| 38599 | float64x2_t __ret; | 39981 | float16x8x3_t __ret; \ |
| 38600 | __ret = (float64x2_t) __builtin_neon_vrndiq_v((int8x16_t)__p0, 42); | 39982 | __builtin_neon_vld3q_v(&__ret, __p0, 40); \ |
| 38601 | return __ret; | 39983 | __ret; \ |
| 38602 | } | 39984 | }) |
| 38603 | #else | 39985 | #else |
| 38604 | __ai float64x2_t vrndiq_f64(float64x2_t __p0) { | 39986 | #define vld3q_f16(__p0) __extension__ ({ \ |
| 38605 | float64x2_t __ret; | 39987 | float16x8x3_t __ret; \ |
| 38606 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 39988 | __builtin_neon_vld3q_v(&__ret, __p0, 40); \ |
| 38607 | __ret = (float64x2_t) __builtin_neon_vrndiq_v((int8x16_t)__rev0, 42); | 39989 | \ |
| 38608 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 39990 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38609 | return __ret; | 39991 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38610 | } | 39992 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 39993 | __ret; \ |
| | 39994 | }) |
| 38611 | #endif | 39995 | #endif |
| 38612 | | 39996 | |
| 38613 | __ai float64x1_t vrndi_f64(float64x1_t __p0) { | | |
| 38614 | float64x1_t __ret; | | |
| 38615 | __ret = (float64x1_t) __builtin_neon_vrndi_v((int8x8_t)__p0, 10); | | |
| 38616 | return __ret; | | |
| 38617 | } | | |
| 38618 | #ifdef __LITTLE_ENDIAN__ | 39997 | #ifdef __LITTLE_ENDIAN__ |
| 38619 | __ai float64x2_t vrndmq_f64(float64x2_t __p0) { | 39998 | #define vld3_f16(__p0) __extension__ ({ \ |
| 38620 | float64x2_t __ret; | 39999 | float16x4x3_t __ret; \ |
| 38621 | __ret = (float64x2_t) __builtin_neon_vrndmq_v((int8x16_t)__p0, 42); | 40000 | __builtin_neon_vld3_v(&__ret, __p0, 8); \ |
| 38622 | return __ret; | 40001 | __ret; \ |
| 38623 | } | 40002 | }) |
| 38624 | #else | 40003 | #else |
| 38625 | __ai float64x2_t vrndmq_f64(float64x2_t __p0) { | 40004 | #define vld3_f16(__p0) __extension__ ({ \ |
| 38626 | float64x2_t __ret; | 40005 | float16x4x3_t __ret; \ |
| 38627 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 40006 | __builtin_neon_vld3_v(&__ret, __p0, 8); \ |
| 38628 | __ret = (float64x2_t) __builtin_neon_vrndmq_v((int8x16_t)__rev0, 42); | 40007 | \ |
| 38629 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 40008 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 38630 | return __ret; | 40009 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| 38631 | } | 40010 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| | 40011 | __ret; \ |
| | 40012 | }) |
| 38632 | #endif | 40013 | #endif |
| 38633 | | 40014 | |
| 38634 | __ai float64x1_t vrndm_f64(float64x1_t __p0) { | | |
| 38635 | float64x1_t __ret; | | |
| 38636 | __ret = (float64x1_t) __builtin_neon_vrndm_v((int8x8_t)__p0, 10); | | |
| 38637 | return __ret; | | |
| 38638 | } | | |
| 38639 | #ifdef __LITTLE_ENDIAN__ | 40015 | #ifdef __LITTLE_ENDIAN__ |
| 38640 | __ai float64x2_t vrndnq_f64(float64x2_t __p0) { | 40016 | #define vld3q_dup_f16(__p0) __extension__ ({ \ |
| 38641 | float64x2_t __ret; | 40017 | float16x8x3_t __ret; \ |
| 38642 | __ret = (float64x2_t) __builtin_neon_vrndnq_v((int8x16_t)__p0, 42); | 40018 | __builtin_neon_vld3q_dup_v(&__ret, __p0, 40); \ |
| 38643 | return __ret; | 40019 | __ret; \ |
| 38644 | } | 40020 | }) |
| 38645 | #else | 40021 | #else |
| 38646 | __ai float64x2_t vrndnq_f64(float64x2_t __p0) { | 40022 | #define vld3q_dup_f16(__p0) __extension__ ({ \ |
| 38647 | float64x2_t __ret; | 40023 | float16x8x3_t __ret; \ |
| 38648 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 40024 | __builtin_neon_vld3q_dup_v(&__ret, __p0, 40); \ |
| 38649 | __ret = (float64x2_t) __builtin_neon_vrndnq_v((int8x16_t)__rev0, 42); | 40025 | \ |
| 38650 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 40026 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38651 | return __ret; | 40027 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38652 | } | 40028 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40029 | __ret; \ |
| | 40030 | }) |
| | 40031 | #endif |
| | 40032 | |
| | 40033 | #ifdef __LITTLE_ENDIAN__ |
| | 40034 | #define vld3_dup_f16(__p0) __extension__ ({ \ |
| | 40035 | float16x4x3_t __ret; \ |
| | 40036 | __builtin_neon_vld3_dup_v(&__ret, __p0, 8); \ |
| | 40037 | __ret; \ |
| | 40038 | }) |
| | 40039 | #else |
| | 40040 | #define vld3_dup_f16(__p0) __extension__ ({ \ |
| | 40041 | float16x4x3_t __ret; \ |
| | 40042 | __builtin_neon_vld3_dup_v(&__ret, __p0, 8); \ |
| | 40043 | \ |
| | 40044 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| | 40045 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| | 40046 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| | 40047 | __ret; \ |
| | 40048 | }) |
| | 40049 | #endif |
| | 40050 | |
| | 40051 | #ifdef __LITTLE_ENDIAN__ |
| | 40052 | #define vld3q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 40053 | float16x8x3_t __ret; \ |
| | 40054 | float16x8x3_t __s1 = __p1; \ |
| | 40055 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 40); \ |
| | 40056 | __ret; \ |
| | 40057 | }) |
| | 40058 | #else |
| | 40059 | #define vld3q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 40060 | float16x8x3_t __ret; \ |
| | 40061 | float16x8x3_t __s1 = __p1; \ |
| | 40062 | float16x8x3_t __rev1; \ |
| | 40063 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40064 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40065 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40066 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 40); \ |
| | 40067 | \ |
| | 40068 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40069 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40070 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40071 | __ret; \ |
| | 40072 | }) |
| | 40073 | #endif |
| | 40074 | |
| | 40075 | #ifdef __LITTLE_ENDIAN__ |
| | 40076 | #define vld3_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 40077 | float16x4x3_t __ret; \ |
| | 40078 | float16x4x3_t __s1 = __p1; \ |
| | 40079 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 8); \ |
| | 40080 | __ret; \ |
| | 40081 | }) |
| | 40082 | #else |
| | 40083 | #define vld3_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 40084 | float16x4x3_t __ret; \ |
| | 40085 | float16x4x3_t __s1 = __p1; \ |
| | 40086 | float16x4x3_t __rev1; \ |
| | 40087 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 40088 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 40089 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| | 40090 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 8); \ |
| | 40091 | \ |
| | 40092 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| | 40093 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| | 40094 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| | 40095 | __ret; \ |
| | 40096 | }) |
| | 40097 | #endif |
| | 40098 | |
| | 40099 | #ifdef __LITTLE_ENDIAN__ |
| | 40100 | #define vld4q_f16(__p0) __extension__ ({ \ |
| | 40101 | float16x8x4_t __ret; \ |
| | 40102 | __builtin_neon_vld4q_v(&__ret, __p0, 40); \ |
| | 40103 | __ret; \ |
| | 40104 | }) |
| | 40105 | #else |
| | 40106 | #define vld4q_f16(__p0) __extension__ ({ \ |
| | 40107 | float16x8x4_t __ret; \ |
| | 40108 | __builtin_neon_vld4q_v(&__ret, __p0, 40); \ |
| | 40109 | \ |
| | 40110 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40111 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40112 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40113 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40114 | __ret; \ |
| | 40115 | }) |
| | 40116 | #endif |
| | 40117 | |
| | 40118 | #ifdef __LITTLE_ENDIAN__ |
| | 40119 | #define vld4_f16(__p0) __extension__ ({ \ |
| | 40120 | float16x4x4_t __ret; \ |
| | 40121 | __builtin_neon_vld4_v(&__ret, __p0, 8); \ |
| | 40122 | __ret; \ |
| | 40123 | }) |
| | 40124 | #else |
| | 40125 | #define vld4_f16(__p0) __extension__ ({ \ |
| | 40126 | float16x4x4_t __ret; \ |
| | 40127 | __builtin_neon_vld4_v(&__ret, __p0, 8); \ |
| | 40128 | \ |
| | 40129 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| | 40130 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| | 40131 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| | 40132 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ |
| | 40133 | __ret; \ |
| | 40134 | }) |
| | 40135 | #endif |
| | 40136 | |
| | 40137 | #ifdef __LITTLE_ENDIAN__ |
| | 40138 | #define vld4q_dup_f16(__p0) __extension__ ({ \ |
| | 40139 | float16x8x4_t __ret; \ |
| | 40140 | __builtin_neon_vld4q_dup_v(&__ret, __p0, 40); \ |
| | 40141 | __ret; \ |
| | 40142 | }) |
| | 40143 | #else |
| | 40144 | #define vld4q_dup_f16(__p0) __extension__ ({ \ |
| | 40145 | float16x8x4_t __ret; \ |
| | 40146 | __builtin_neon_vld4q_dup_v(&__ret, __p0, 40); \ |
| | 40147 | \ |
| | 40148 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40149 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40150 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40151 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40152 | __ret; \ |
| | 40153 | }) |
| | 40154 | #endif |
| | 40155 | |
| | 40156 | #ifdef __LITTLE_ENDIAN__ |
| | 40157 | #define vld4_dup_f16(__p0) __extension__ ({ \ |
| | 40158 | float16x4x4_t __ret; \ |
| | 40159 | __builtin_neon_vld4_dup_v(&__ret, __p0, 8); \ |
| | 40160 | __ret; \ |
| | 40161 | }) |
| | 40162 | #else |
| | 40163 | #define vld4_dup_f16(__p0) __extension__ ({ \ |
| | 40164 | float16x4x4_t __ret; \ |
| | 40165 | __builtin_neon_vld4_dup_v(&__ret, __p0, 8); \ |
| | 40166 | \ |
| | 40167 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| | 40168 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| | 40169 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| | 40170 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ |
| | 40171 | __ret; \ |
| | 40172 | }) |
| | 40173 | #endif |
| | 40174 | |
| | 40175 | #ifdef __LITTLE_ENDIAN__ |
| | 40176 | #define vld4q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 40177 | float16x8x4_t __ret; \ |
| | 40178 | float16x8x4_t __s1 = __p1; \ |
| | 40179 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 40); \ |
| | 40180 | __ret; \ |
| | 40181 | }) |
| | 40182 | #else |
| | 40183 | #define vld4q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 40184 | float16x8x4_t __ret; \ |
| | 40185 | float16x8x4_t __s1 = __p1; \ |
| | 40186 | float16x8x4_t __rev1; \ |
| | 40187 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40188 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40189 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40190 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40191 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 40); \ |
| | 40192 | \ |
| | 40193 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40194 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40195 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40196 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40197 | __ret; \ |
| | 40198 | }) |
| | 40199 | #endif |
| | 40200 | |
| | 40201 | #ifdef __LITTLE_ENDIAN__ |
| | 40202 | #define vld4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 40203 | float16x4x4_t __ret; \ |
| | 40204 | float16x4x4_t __s1 = __p1; \ |
| | 40205 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 8); \ |
| | 40206 | __ret; \ |
| | 40207 | }) |
| | 40208 | #else |
| | 40209 | #define vld4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 40210 | float16x4x4_t __ret; \ |
| | 40211 | float16x4x4_t __s1 = __p1; \ |
| | 40212 | float16x4x4_t __rev1; \ |
| | 40213 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 40214 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 40215 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| | 40216 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| | 40217 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 8); \ |
| | 40218 | \ |
| | 40219 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| | 40220 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| | 40221 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ |
| | 40222 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ |
| | 40223 | __ret; \ |
| | 40224 | }) |
| | 40225 | #endif |
| | 40226 | |
| | 40227 | #ifdef __LITTLE_ENDIAN__ |
| | 40228 | #define vst1q_f16(__p0, __p1) __extension__ ({ \ |
| | 40229 | float16x8_t __s1 = __p1; \ |
| | 40230 | __builtin_neon_vst1q_v(__p0, (int8x16_t)__s1, 40); \ |
| | 40231 | }) |
| | 40232 | #else |
| | 40233 | #define vst1q_f16(__p0, __p1) __extension__ ({ \ |
| | 40234 | float16x8_t __s1 = __p1; \ |
| | 40235 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40236 | __builtin_neon_vst1q_v(__p0, (int8x16_t)__rev1, 40); \ |
| | 40237 | }) |
| | 40238 | #endif |
| | 40239 | |
| | 40240 | #ifdef __LITTLE_ENDIAN__ |
| | 40241 | #define vst1_f16(__p0, __p1) __extension__ ({ \ |
| | 40242 | float16x4_t __s1 = __p1; \ |
| | 40243 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 8); \ |
| | 40244 | }) |
| | 40245 | #else |
| | 40246 | #define vst1_f16(__p0, __p1) __extension__ ({ \ |
| | 40247 | float16x4_t __s1 = __p1; \ |
| | 40248 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| | 40249 | __builtin_neon_vst1_v(__p0, (int8x8_t)__rev1, 8); \ |
| | 40250 | }) |
| | 40251 | #endif |
| | 40252 | |
| | 40253 | #ifdef __LITTLE_ENDIAN__ |
| | 40254 | #define vst1q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 40255 | float16x8_t __s1 = __p1; \ |
| | 40256 | __builtin_neon_vst1q_lane_v(__p0, (int8x16_t)__s1, __p2, 40); \ |
| | 40257 | }) |
| | 40258 | #else |
| | 40259 | #define vst1q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 40260 | float16x8_t __s1 = __p1; \ |
| | 40261 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40262 | __builtin_neon_vst1q_lane_v(__p0, (int8x16_t)__rev1, __p2, 40); \ |
| | 40263 | }) |
| | 40264 | #endif |
| | 40265 | |
| | 40266 | #ifdef __LITTLE_ENDIAN__ |
| | 40267 | #define vst1_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 40268 | float16x4_t __s1 = __p1; \ |
| | 40269 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 8); \ |
| | 40270 | }) |
| | 40271 | #else |
| | 40272 | #define vst1_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 40273 | float16x4_t __s1 = __p1; \ |
| | 40274 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| | 40275 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__rev1, __p2, 8); \ |
| | 40276 | }) |
| | 40277 | #endif |
| | 40278 | |
| | 40279 | #ifdef __LITTLE_ENDIAN__ |
| | 40280 | #define vst1q_f16_x2(__p0, __p1) __extension__ ({ \ |
| | 40281 | float16x8x2_t __s1 = __p1; \ |
| | 40282 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 40); \ |
| | 40283 | }) |
| | 40284 | #else |
| | 40285 | #define vst1q_f16_x2(__p0, __p1) __extension__ ({ \ |
| | 40286 | float16x8x2_t __s1 = __p1; \ |
| | 40287 | float16x8x2_t __rev1; \ |
| | 40288 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40289 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40290 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 40); \ |
| | 40291 | }) |
| | 40292 | #endif |
| | 40293 | |
| | 40294 | #ifdef __LITTLE_ENDIAN__ |
| | 40295 | #define vst1_f16_x2(__p0, __p1) __extension__ ({ \ |
| | 40296 | float16x4x2_t __s1 = __p1; \ |
| | 40297 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 8); \ |
| | 40298 | }) |
| | 40299 | #else |
| | 40300 | #define vst1_f16_x2(__p0, __p1) __extension__ ({ \ |
| | 40301 | float16x4x2_t __s1 = __p1; \ |
| | 40302 | float16x4x2_t __rev1; \ |
| | 40303 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 40304 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 40305 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 8); \ |
| | 40306 | }) |
| | 40307 | #endif |
| | 40308 | |
| | 40309 | #ifdef __LITTLE_ENDIAN__ |
| | 40310 | #define vst1q_f16_x3(__p0, __p1) __extension__ ({ \ |
| | 40311 | float16x8x3_t __s1 = __p1; \ |
| | 40312 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 40); \ |
| | 40313 | }) |
| | 40314 | #else |
| | 40315 | #define vst1q_f16_x3(__p0, __p1) __extension__ ({ \ |
| | 40316 | float16x8x3_t __s1 = __p1; \ |
| | 40317 | float16x8x3_t __rev1; \ |
| | 40318 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40319 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40320 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40321 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 40); \ |
| | 40322 | }) |
| | 40323 | #endif |
| | 40324 | |
| | 40325 | #ifdef __LITTLE_ENDIAN__ |
| | 40326 | #define vst1_f16_x3(__p0, __p1) __extension__ ({ \ |
| | 40327 | float16x4x3_t __s1 = __p1; \ |
| | 40328 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 8); \ |
| | 40329 | }) |
| | 40330 | #else |
| | 40331 | #define vst1_f16_x3(__p0, __p1) __extension__ ({ \ |
| | 40332 | float16x4x3_t __s1 = __p1; \ |
| | 40333 | float16x4x3_t __rev1; \ |
| | 40334 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 40335 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 40336 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| | 40337 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 8); \ |
| | 40338 | }) |
| | 40339 | #endif |
| | 40340 | |
| | 40341 | #ifdef __LITTLE_ENDIAN__ |
| | 40342 | #define vst1q_f16_x4(__p0, __p1) __extension__ ({ \ |
| | 40343 | float16x8x4_t __s1 = __p1; \ |
| | 40344 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 40); \ |
| | 40345 | }) |
| | 40346 | #else |
| | 40347 | #define vst1q_f16_x4(__p0, __p1) __extension__ ({ \ |
| | 40348 | float16x8x4_t __s1 = __p1; \ |
| | 40349 | float16x8x4_t __rev1; \ |
| | 40350 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40351 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40352 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40353 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40354 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 40); \ |
| | 40355 | }) |
| | 40356 | #endif |
| | 40357 | |
| | 40358 | #ifdef __LITTLE_ENDIAN__ |
| | 40359 | #define vst1_f16_x4(__p0, __p1) __extension__ ({ \ |
| | 40360 | float16x4x4_t __s1 = __p1; \ |
| | 40361 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 8); \ |
| | 40362 | }) |
| | 40363 | #else |
| | 40364 | #define vst1_f16_x4(__p0, __p1) __extension__ ({ \ |
| | 40365 | float16x4x4_t __s1 = __p1; \ |
| | 40366 | float16x4x4_t __rev1; \ |
| | 40367 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 40368 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 40369 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| | 40370 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| | 40371 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 8); \ |
| | 40372 | }) |
| | 40373 | #endif |
| | 40374 | |
| | 40375 | #ifdef __LITTLE_ENDIAN__ |
| | 40376 | #define vst2q_f16(__p0, __p1) __extension__ ({ \ |
| | 40377 | float16x8x2_t __s1 = __p1; \ |
| | 40378 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 40); \ |
| | 40379 | }) |
| | 40380 | #else |
| | 40381 | #define vst2q_f16(__p0, __p1) __extension__ ({ \ |
| | 40382 | float16x8x2_t __s1 = __p1; \ |
| | 40383 | float16x8x2_t __rev1; \ |
| | 40384 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40385 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40386 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 40); \ |
| | 40387 | }) |
| 38653 | #endif | 40388 | #endif |
| 38654 | | 40389 | |
| 38655 | __ai float64x1_t vrndn_f64(float64x1_t __p0) { | | |
| 38656 | float64x1_t __ret; | | |
| 38657 | __ret = (float64x1_t) __builtin_neon_vrndn_v((int8x8_t)__p0, 10); | | |
| 38658 | return __ret; | | |
| 38659 | } | | |
| 38660 | #ifdef __LITTLE_ENDIAN__ | 40390 | #ifdef __LITTLE_ENDIAN__ |
| 38661 | __ai float64x2_t vrndpq_f64(float64x2_t __p0) { | 40391 | #define vst2_f16(__p0, __p1) __extension__ ({ \ |
| 38662 | float64x2_t __ret; | 40392 | float16x4x2_t __s1 = __p1; \ |
| 38663 | __ret = (float64x2_t) __builtin_neon_vrndpq_v((int8x16_t)__p0, 42); | 40393 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 8); \ |
| 38664 | return __ret; | 40394 | }) |
| 38665 | } | | |
| 38666 | #else | 40395 | #else |
| 38667 | __ai float64x2_t vrndpq_f64(float64x2_t __p0) { | 40396 | #define vst2_f16(__p0, __p1) __extension__ ({ \ |
| 38668 | float64x2_t __ret; | 40397 | float16x4x2_t __s1 = __p1; \ |
| 38669 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 40398 | float16x4x2_t __rev1; \ |
| 38670 | __ret = (float64x2_t) __builtin_neon_vrndpq_v((int8x16_t)__rev0, 42); | 40399 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 38671 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 40400 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 38672 | return __ret; | 40401 | __builtin_neon_vst2_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 8); \ |
| 38673 | } | 40402 | }) |
| 38674 | #endif | 40403 | #endif |
| 38675 | | 40404 | |
| 38676 | __ai float64x1_t vrndp_f64(float64x1_t __p0) { | | |
| 38677 | float64x1_t __ret; | | |
| 38678 | __ret = (float64x1_t) __builtin_neon_vrndp_v((int8x8_t)__p0, 10); | | |
| 38679 | return __ret; | | |
| 38680 | } | | |
| 38681 | #ifdef __LITTLE_ENDIAN__ | 40405 | #ifdef __LITTLE_ENDIAN__ |
| 38682 | __ai float64x2_t vrndxq_f64(float64x2_t __p0) { | 40406 | #define vst2q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 38683 | float64x2_t __ret; | 40407 | float16x8x2_t __s1 = __p1; \ |
| 38684 | __ret = (float64x2_t) __builtin_neon_vrndxq_v((int8x16_t)__p0, 42); | 40408 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 40); \ |
| 38685 | return __ret; | 40409 | }) |
| 38686 | } | | |
| 38687 | #else | 40410 | #else |
| 38688 | __ai float64x2_t vrndxq_f64(float64x2_t __p0) { | 40411 | #define vst2q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 38689 | float64x2_t __ret; | 40412 | float16x8x2_t __s1 = __p1; \ |
| 38690 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 40413 | float16x8x2_t __rev1; \ |
| 38691 | __ret = (float64x2_t) __builtin_neon_vrndxq_v((int8x16_t)__rev0, 42); | 40414 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38692 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 40415 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38693 | return __ret; | 40416 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 40); \ |
| 38694 | } | 40417 | }) |
| 38695 | #endif | 40418 | #endif |
| 38696 | | 40419 | |
| 38697 | __ai float64x1_t vrndx_f64(float64x1_t __p0) { | 40420 | #ifdef __LITTLE_ENDIAN__ |
| 38698 | float64x1_t __ret; | 40421 | #define vst2_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 38699 | __ret = (float64x1_t) __builtin_neon_vrndx_v((int8x8_t)__p0, 10); | 40422 | float16x4x2_t __s1 = __p1; \ |
| 38700 | return __ret; | 40423 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 8); \ |
| 38701 | } | 40424 | }) |
| | 40425 | #else |
| | 40426 | #define vst2_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 40427 | float16x4x2_t __s1 = __p1; \ |
| | 40428 | float16x4x2_t __rev1; \ |
| | 40429 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| | 40430 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| | 40431 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 8); \ |
| | 40432 | }) |
| 38702 | #endif | 40433 | #endif |
| 38703 | #if __ARM_ARCH >= 8 && defined(__aarch64__) && defined(__ARM_FEATURE_FRINT) | 40434 | |
| 38704 | #ifdef __LITTLE_ENDIAN__ | 40435 | #ifdef __LITTLE_ENDIAN__ |
| 38705 | __ai float32x4_t vrnd32xq_f32(float32x4_t __p0) { | 40436 | #define vst3q_f16(__p0, __p1) __extension__ ({ \ |
| 38706 | float32x4_t __ret; | 40437 | float16x8x3_t __s1 = __p1; \ |
| 38707 | __ret = (float32x4_t) __builtin_neon_vrnd32xq_v((int8x16_t)__p0, 41); | 40438 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 40); \ |
| 38708 | return __ret; | 40439 | }) |
| 38709 | } | | |
| 38710 | #else | 40440 | #else |
| 38711 | __ai float32x4_t vrnd32xq_f32(float32x4_t __p0) { | 40441 | #define vst3q_f16(__p0, __p1) __extension__ ({ \ |
| 38712 | float32x4_t __ret; | 40442 | float16x8x3_t __s1 = __p1; \ |
| 38713 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 40443 | float16x8x3_t __rev1; \ |
| 38714 | __ret = (float32x4_t) __builtin_neon_vrnd32xq_v((int8x16_t)__rev0, 41); | 40444 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38715 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 40445 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38716 | return __ret; | 40446 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38717 | } | 40447 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 40); \ |
| | 40448 | }) |
| 38718 | #endif | 40449 | #endif |
| 38719 | | 40450 | |
| 38720 | #ifdef __LITTLE_ENDIAN__ | 40451 | #ifdef __LITTLE_ENDIAN__ |
| 38721 | __ai float32x2_t vrnd32x_f32(float32x2_t __p0) { | 40452 | #define vst3_f16(__p0, __p1) __extension__ ({ \ |
| 38722 | float32x2_t __ret; | 40453 | float16x4x3_t __s1 = __p1; \ |
| 38723 | __ret = (float32x2_t) __builtin_neon_vrnd32x_v((int8x8_t)__p0, 9); | 40454 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 8); \ |
| 38724 | return __ret; | 40455 | }) |
| 38725 | } | | |
| 38726 | #else | 40456 | #else |
| 38727 | __ai float32x2_t vrnd32x_f32(float32x2_t __p0) { | 40457 | #define vst3_f16(__p0, __p1) __extension__ ({ \ |
| 38728 | float32x2_t __ret; | 40458 | float16x4x3_t __s1 = __p1; \ |
| 38729 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 40459 | float16x4x3_t __rev1; \ |
| 38730 | __ret = (float32x2_t) __builtin_neon_vrnd32x_v((int8x8_t)__rev0, 9); | 40460 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 38731 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 40461 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 38732 | return __ret; | 40462 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 38733 | } | 40463 | __builtin_neon_vst3_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 8); \ |
| | 40464 | }) |
| 38734 | #endif | 40465 | #endif |
| 38735 | | 40466 | |
| 38736 | #ifdef __LITTLE_ENDIAN__ | 40467 | #ifdef __LITTLE_ENDIAN__ |
| 38737 | __ai float32x4_t vrnd32zq_f32(float32x4_t __p0) { | 40468 | #define vst3q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 38738 | float32x4_t __ret; | 40469 | float16x8x3_t __s1 = __p1; \ |
| 38739 | __ret = (float32x4_t) __builtin_neon_vrnd32zq_v((int8x16_t)__p0, 41); | 40470 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 40); \ |
| 38740 | return __ret; | 40471 | }) |
| 38741 | } | | |
| 38742 | #else | 40472 | #else |
| 38743 | __ai float32x4_t vrnd32zq_f32(float32x4_t __p0) { | 40473 | #define vst3q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 38744 | float32x4_t __ret; | 40474 | float16x8x3_t __s1 = __p1; \ |
| 38745 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 40475 | float16x8x3_t __rev1; \ |
| 38746 | __ret = (float32x4_t) __builtin_neon_vrnd32zq_v((int8x16_t)__rev0, 41); | 40476 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38747 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 40477 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38748 | return __ret; | 40478 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38749 | } | 40479 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 40); \ |
| | 40480 | }) |
| 38750 | #endif | 40481 | #endif |
| 38751 | | 40482 | |
| 38752 | #ifdef __LITTLE_ENDIAN__ | 40483 | #ifdef __LITTLE_ENDIAN__ |
| 38753 | __ai float32x2_t vrnd32z_f32(float32x2_t __p0) { | 40484 | #define vst3_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 38754 | float32x2_t __ret; | 40485 | float16x4x3_t __s1 = __p1; \ |
| 38755 | __ret = (float32x2_t) __builtin_neon_vrnd32z_v((int8x8_t)__p0, 9); | 40486 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 8); \ |
| 38756 | return __ret; | 40487 | }) |
| 38757 | } | | |
| 38758 | #else | 40488 | #else |
| 38759 | __ai float32x2_t vrnd32z_f32(float32x2_t __p0) { | 40489 | #define vst3_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 38760 | float32x2_t __ret; | 40490 | float16x4x3_t __s1 = __p1; \ |
| 38761 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 40491 | float16x4x3_t __rev1; \ |
| 38762 | __ret = (float32x2_t) __builtin_neon_vrnd32z_v((int8x8_t)__rev0, 9); | 40492 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 38763 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 40493 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 38764 | return __ret; | 40494 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 38765 | } | 40495 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 8); \ |
| | 40496 | }) |
| 38766 | #endif | 40497 | #endif |
| 38767 | | 40498 | |
| 38768 | #ifdef __LITTLE_ENDIAN__ | 40499 | #ifdef __LITTLE_ENDIAN__ |
| 38769 | __ai float32x4_t vrnd64xq_f32(float32x4_t __p0) { | 40500 | #define vst4q_f16(__p0, __p1) __extension__ ({ \ |
| 38770 | float32x4_t __ret; | 40501 | float16x8x4_t __s1 = __p1; \ |
| 38771 | __ret = (float32x4_t) __builtin_neon_vrnd64xq_v((int8x16_t)__p0, 41); | 40502 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 40); \ |
| 38772 | return __ret; | 40503 | }) |
| 38773 | } | | |
| 38774 | #else | 40504 | #else |
| 38775 | __ai float32x4_t vrnd64xq_f32(float32x4_t __p0) { | 40505 | #define vst4q_f16(__p0, __p1) __extension__ ({ \ |
| 38776 | float32x4_t __ret; | 40506 | float16x8x4_t __s1 = __p1; \ |
| 38777 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 40507 | float16x8x4_t __rev1; \ |
| 38778 | __ret = (float32x4_t) __builtin_neon_vrnd64xq_v((int8x16_t)__rev0, 41); | 40508 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38779 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 40509 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38780 | return __ret; | 40510 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38781 | } | 40511 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40512 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 40); \ |
| | 40513 | }) |
| 38782 | #endif | 40514 | #endif |
| 38783 | | 40515 | |
| 38784 | #ifdef __LITTLE_ENDIAN__ | 40516 | #ifdef __LITTLE_ENDIAN__ |
| 38785 | __ai float32x2_t vrnd64x_f32(float32x2_t __p0) { | 40517 | #define vst4_f16(__p0, __p1) __extension__ ({ \ |
| 38786 | float32x2_t __ret; | 40518 | float16x4x4_t __s1 = __p1; \ |
| 38787 | __ret = (float32x2_t) __builtin_neon_vrnd64x_v((int8x8_t)__p0, 9); | 40519 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 8); \ |
| 38788 | return __ret; | 40520 | }) |
| 38789 | } | | |
| 38790 | #else | 40521 | #else |
| 38791 | __ai float32x2_t vrnd64x_f32(float32x2_t __p0) { | 40522 | #define vst4_f16(__p0, __p1) __extension__ ({ \ |
| 38792 | float32x2_t __ret; | 40523 | float16x4x4_t __s1 = __p1; \ |
| 38793 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 40524 | float16x4x4_t __rev1; \ |
| 38794 | __ret = (float32x2_t) __builtin_neon_vrnd64x_v((int8x8_t)__rev0, 9); | 40525 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 38795 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 40526 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 38796 | return __ret; | 40527 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 38797 | } | 40528 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| | 40529 | __builtin_neon_vst4_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 8); \ |
| | 40530 | }) |
| 38798 | #endif | 40531 | #endif |
| 38799 | | 40532 | |
| 38800 | #ifdef __LITTLE_ENDIAN__ | 40533 | #ifdef __LITTLE_ENDIAN__ |
| 38801 | __ai float32x4_t vrnd64zq_f32(float32x4_t __p0) { | 40534 | #define vst4q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 38802 | float32x4_t __ret; | 40535 | float16x8x4_t __s1 = __p1; \ |
| 38803 | __ret = (float32x4_t) __builtin_neon_vrnd64zq_v((int8x16_t)__p0, 41); | 40536 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 40); \ |
| 38804 | return __ret; | 40537 | }) |
| 38805 | } | | |
| 38806 | #else | 40538 | #else |
| 38807 | __ai float32x4_t vrnd64zq_f32(float32x4_t __p0) { | 40539 | #define vst4q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 38808 | float32x4_t __ret; | 40540 | float16x8x4_t __s1 = __p1; \ |
| 38809 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 40541 | float16x8x4_t __rev1; \ |
| 38810 | __ret = (float32x4_t) __builtin_neon_vrnd64zq_v((int8x16_t)__rev0, 41); | 40542 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38811 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 40543 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38812 | return __ret; | 40544 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 38813 | } | 40545 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 40546 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 40); \ |
| | 40547 | }) |
| 38814 | #endif | 40548 | #endif |
| 38815 | | 40549 | |
| 38816 | #ifdef __LITTLE_ENDIAN__ | 40550 | #ifdef __LITTLE_ENDIAN__ |
| 38817 | __ai float32x2_t vrnd64z_f32(float32x2_t __p0) { | 40551 | #define vst4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 38818 | float32x2_t __ret; | 40552 | float16x4x4_t __s1 = __p1; \ |
| 38819 | __ret = (float32x2_t) __builtin_neon_vrnd64z_v((int8x8_t)__p0, 9); | 40553 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 8); \ |
| 38820 | return __ret; | 40554 | }) |
| 38821 | } | | |
| 38822 | #else | 40555 | #else |
| 38823 | __ai float32x2_t vrnd64z_f32(float32x2_t __p0) { | 40556 | #define vst4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 38824 | float32x2_t __ret; | 40557 | float16x4x4_t __s1 = __p1; \ |
| 38825 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 40558 | float16x4x4_t __rev1; \ |
| 38826 | __ret = (float32x2_t) __builtin_neon_vrnd64z_v((int8x8_t)__rev0, 9); | 40559 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 38827 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 40560 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 38828 | return __ret; | 40561 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 38829 | } | 40562 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| | 40563 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 8); \ |
| | 40564 | }) |
| 38830 | #endif | 40565 | #endif |
| 38831 | | 40566 | |
| 38832 | #endif | 40567 | #endif |
| 38833 | #if __ARM_ARCH >= 8 && defined(__aarch64__) && defined(__ARM_FEATURE_NUMERIC_MAXMIN) | 40568 | #if __ARM_ARCH >= 8 |
| 38834 | #ifdef __LITTLE_ENDIAN__ | 40569 | #ifdef __LITTLE_ENDIAN__ |
| 38835 | __ai float64x2_t vmaxnmq_f64(float64x2_t __p0, float64x2_t __p1) { | 40570 | __ai int32x4_t vcvtaq_s32_f32(float32x4_t __p0) { |
| 38836 | float64x2_t __ret; | 40571 | int32x4_t __ret; |
| 38837 | __ret = (float64x2_t) __builtin_neon_vmaxnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | 40572 | __ret = (int32x4_t) __builtin_neon_vcvtaq_s32_v((int8x16_t)__p0, 34); |
| 38838 | return __ret; | 40573 | return __ret; |
| 38839 | } | 40574 | } |
| 38840 | #else | 40575 | #else |
| 38841 | __ai float64x2_t vmaxnmq_f64(float64x2_t __p0, float64x2_t __p1) { | 40576 | __ai int32x4_t vcvtaq_s32_f32(float32x4_t __p0) { |
| 38842 | float64x2_t __ret; | 40577 | int32x4_t __ret; |
| 38843 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 40578 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 38844 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 40579 | __ret = (int32x4_t) __builtin_neon_vcvtaq_s32_v((int8x16_t)__rev0, 34); |
| 38845 | __ret = (float64x2_t) __builtin_neon_vmaxnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); | 40580 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 38846 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 38847 | return __ret; | 40581 | return __ret; |
| 38848 | } | 40582 | } |
| 38849 | #endif | 40583 | #endif |
| 38850 | | 40584 | |
| 38851 | __ai float64x1_t vmaxnm_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 38852 | float64x1_t __ret; | | |
| 38853 | __ret = (float64x1_t) __builtin_neon_vmaxnm_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | | |
| 38854 | return __ret; | | |
| 38855 | } | | |
| 38856 | #ifdef __LITTLE_ENDIAN__ | 40585 | #ifdef __LITTLE_ENDIAN__ |
| 38857 | __ai float64x2_t vminnmq_f64(float64x2_t __p0, float64x2_t __p1) { | 40586 | __ai int32x2_t vcvta_s32_f32(float32x2_t __p0) { |
| 38858 | float64x2_t __ret; | 40587 | int32x2_t __ret; |
| 38859 | __ret = (float64x2_t) __builtin_neon_vminnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | 40588 | __ret = (int32x2_t) __builtin_neon_vcvta_s32_v((int8x8_t)__p0, 2); |
| 38860 | return __ret; | 40589 | return __ret; |
| 38861 | } | 40590 | } |
| 38862 | #else | 40591 | #else |
| 38863 | __ai float64x2_t vminnmq_f64(float64x2_t __p0, float64x2_t __p1) { | 40592 | __ai int32x2_t vcvta_s32_f32(float32x2_t __p0) { |
| 38864 | float64x2_t __ret; | 40593 | int32x2_t __ret; |
| 38865 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 40594 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 38866 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 40595 | __ret = (int32x2_t) __builtin_neon_vcvta_s32_v((int8x8_t)__rev0, 2); |
| 38867 | __ret = (float64x2_t) __builtin_neon_vminnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); | | |
| 38868 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 40596 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 38869 | return __ret; | 40597 | return __ret; |
| 38870 | } | 40598 | } |
| 38871 | #endif | 40599 | #endif |
| 38872 | | 40600 | |
| 38873 | __ai float64x1_t vminnm_f64(float64x1_t __p0, float64x1_t __p1) { | 40601 | #ifdef __LITTLE_ENDIAN__ |
| 38874 | float64x1_t __ret; | 40602 | __ai uint32x4_t vcvtaq_u32_f32(float32x4_t __p0) { |
| 38875 | __ret = (float64x1_t) __builtin_neon_vminnm_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | | |
| 38876 | return __ret; | | |
| 38877 | } | | |
| 38878 | #endif | | |
| 38879 | #if defined(__ARM_FEATURE_BF16) && !defined(__aarch64__) | | |
| 38880 | __ai poly8x8_t vreinterpret_p8_bf16(bfloat16x4_t __p0) { | | |
| 38881 | poly8x8_t __ret; | | |
| 38882 | __ret = (poly8x8_t)(__p0); | | |
| 38883 | return __ret; | | |
| 38884 | } | | |
| 38885 | __ai poly64x1_t vreinterpret_p64_bf16(bfloat16x4_t __p0) { | | |
| 38886 | poly64x1_t __ret; | | |
| 38887 | __ret = (poly64x1_t)(__p0); | | |
| 38888 | return __ret; | | |
| 38889 | } | | |
| 38890 | __ai poly16x4_t vreinterpret_p16_bf16(bfloat16x4_t __p0) { | | |
| 38891 | poly16x4_t __ret; | | |
| 38892 | __ret = (poly16x4_t)(__p0); | | |
| 38893 | return __ret; | | |
| 38894 | } | | |
| 38895 | __ai poly8x16_t vreinterpretq_p8_bf16(bfloat16x8_t __p0) { | | |
| 38896 | poly8x16_t __ret; | | |
| 38897 | __ret = (poly8x16_t)(__p0); | | |
| 38898 | return __ret; | | |
| 38899 | } | | |
| 38900 | __ai poly64x2_t vreinterpretq_p64_bf16(bfloat16x8_t __p0) { | | |
| 38901 | poly64x2_t __ret; | | |
| 38902 | __ret = (poly64x2_t)(__p0); | | |
| 38903 | return __ret; | | |
| 38904 | } | | |
| 38905 | __ai poly16x8_t vreinterpretq_p16_bf16(bfloat16x8_t __p0) { | | |
| 38906 | poly16x8_t __ret; | | |
| 38907 | __ret = (poly16x8_t)(__p0); | | |
| 38908 | return __ret; | | |
| 38909 | } | | |
| 38910 | __ai uint8x16_t vreinterpretq_u8_bf16(bfloat16x8_t __p0) { | | |
| 38911 | uint8x16_t __ret; | | |
| 38912 | __ret = (uint8x16_t)(__p0); | | |
| 38913 | return __ret; | | |
| 38914 | } | | |
| 38915 | __ai uint32x4_t vreinterpretq_u32_bf16(bfloat16x8_t __p0) { | | |
| 38916 | uint32x4_t __ret; | 40603 | uint32x4_t __ret; |
| 38917 | __ret = (uint32x4_t)(__p0); | 40604 | __ret = (uint32x4_t) __builtin_neon_vcvtaq_u32_v((int8x16_t)__p0, 50); |
| 38918 | return __ret; | | |
| 38919 | } | | |
| 38920 | __ai uint64x2_t vreinterpretq_u64_bf16(bfloat16x8_t __p0) { | | |
| 38921 | uint64x2_t __ret; | | |
| 38922 | __ret = (uint64x2_t)(__p0); | | |
| 38923 | return __ret; | | |
| 38924 | } | | |
| 38925 | __ai uint16x8_t vreinterpretq_u16_bf16(bfloat16x8_t __p0) { | | |
| 38926 | uint16x8_t __ret; | | |
| 38927 | __ret = (uint16x8_t)(__p0); | | |
| 38928 | return __ret; | | |
| 38929 | } | | |
| 38930 | __ai int8x16_t vreinterpretq_s8_bf16(bfloat16x8_t __p0) { | | |
| 38931 | int8x16_t __ret; | | |
| 38932 | __ret = (int8x16_t)(__p0); | | |
| 38933 | return __ret; | | |
| 38934 | } | | |
| 38935 | __ai float32x4_t vreinterpretq_f32_bf16(bfloat16x8_t __p0) { | | |
| 38936 | float32x4_t __ret; | | |
| 38937 | __ret = (float32x4_t)(__p0); | | |
| 38938 | return __ret; | | |
| 38939 | } | | |
| 38940 | __ai float16x8_t vreinterpretq_f16_bf16(bfloat16x8_t __p0) { | | |
| 38941 | float16x8_t __ret; | | |
| 38942 | __ret = (float16x8_t)(__p0); | | |
| 38943 | return __ret; | | |
| 38944 | } | | |
| 38945 | __ai int32x4_t vreinterpretq_s32_bf16(bfloat16x8_t __p0) { | | |
| 38946 | int32x4_t __ret; | | |
| 38947 | __ret = (int32x4_t)(__p0); | | |
| 38948 | return __ret; | | |
| 38949 | } | | |
| 38950 | __ai int64x2_t vreinterpretq_s64_bf16(bfloat16x8_t __p0) { | | |
| 38951 | int64x2_t __ret; | | |
| 38952 | __ret = (int64x2_t)(__p0); | | |
| 38953 | return __ret; | | |
| 38954 | } | | |
| 38955 | __ai int16x8_t vreinterpretq_s16_bf16(bfloat16x8_t __p0) { | | |
| 38956 | int16x8_t __ret; | | |
| 38957 | __ret = (int16x8_t)(__p0); | | |
| 38958 | return __ret; | | |
| 38959 | } | | |
| 38960 | __ai uint8x8_t vreinterpret_u8_bf16(bfloat16x4_t __p0) { | | |
| 38961 | uint8x8_t __ret; | | |
| 38962 | __ret = (uint8x8_t)(__p0); | | |
| 38963 | return __ret; | | |
| 38964 | } | | |
| 38965 | __ai uint32x2_t vreinterpret_u32_bf16(bfloat16x4_t __p0) { | | |
| 38966 | uint32x2_t __ret; | | |
| 38967 | __ret = (uint32x2_t)(__p0); | | |
| 38968 | return __ret; | | |
| 38969 | } | | |
| 38970 | __ai uint64x1_t vreinterpret_u64_bf16(bfloat16x4_t __p0) { | | |
| 38971 | uint64x1_t __ret; | | |
| 38972 | __ret = (uint64x1_t)(__p0); | | |
| 38973 | return __ret; | | |
| 38974 | } | | |
| 38975 | __ai uint16x4_t vreinterpret_u16_bf16(bfloat16x4_t __p0) { | | |
| 38976 | uint16x4_t __ret; | | |
| 38977 | __ret = (uint16x4_t)(__p0); | | |
| 38978 | return __ret; | | |
| 38979 | } | | |
| 38980 | __ai int8x8_t vreinterpret_s8_bf16(bfloat16x4_t __p0) { | | |
| 38981 | int8x8_t __ret; | | |
| 38982 | __ret = (int8x8_t)(__p0); | | |
| 38983 | return __ret; | | |
| 38984 | } | | |
| 38985 | __ai float32x2_t vreinterpret_f32_bf16(bfloat16x4_t __p0) { | | |
| 38986 | float32x2_t __ret; | | |
| 38987 | __ret = (float32x2_t)(__p0); | | |
| 38988 | return __ret; | | |
| 38989 | } | | |
| 38990 | __ai float16x4_t vreinterpret_f16_bf16(bfloat16x4_t __p0) { | | |
| 38991 | float16x4_t __ret; | | |
| 38992 | __ret = (float16x4_t)(__p0); | | |
| 38993 | return __ret; | | |
| 38994 | } | | |
| 38995 | __ai int32x2_t vreinterpret_s32_bf16(bfloat16x4_t __p0) { | | |
| 38996 | int32x2_t __ret; | | |
| 38997 | __ret = (int32x2_t)(__p0); | | |
| 38998 | return __ret; | | |
| 38999 | } | | |
| 39000 | __ai int64x1_t vreinterpret_s64_bf16(bfloat16x4_t __p0) { | | |
| 39001 | int64x1_t __ret; | | |
| 39002 | __ret = (int64x1_t)(__p0); | | |
| 39003 | return __ret; | | |
| 39004 | } | | |
| 39005 | __ai int16x4_t vreinterpret_s16_bf16(bfloat16x4_t __p0) { | | |
| 39006 | int16x4_t __ret; | | |
| 39007 | __ret = (int16x4_t)(__p0); | | |
| 39008 | return __ret; | | |
| 39009 | } | | |
| 39010 | __ai bfloat16x8_t vreinterpretq_bf16_p8(poly8x16_t __p0) { | | |
| 39011 | bfloat16x8_t __ret; | | |
| 39012 | __ret = (bfloat16x8_t)(__p0); | | |
| 39013 | return __ret; | | |
| 39014 | } | | |
| 39015 | __ai bfloat16x8_t vreinterpretq_bf16_p64(poly64x2_t __p0) { | | |
| 39016 | bfloat16x8_t __ret; | | |
| 39017 | __ret = (bfloat16x8_t)(__p0); | | |
| 39018 | return __ret; | | |
| 39019 | } | | |
| 39020 | __ai bfloat16x8_t vreinterpretq_bf16_p16(poly16x8_t __p0) { | | |
| 39021 | bfloat16x8_t __ret; | | |
| 39022 | __ret = (bfloat16x8_t)(__p0); | | |
| 39023 | return __ret; | | |
| 39024 | } | | |
| 39025 | __ai bfloat16x8_t vreinterpretq_bf16_u8(uint8x16_t __p0) { | | |
| 39026 | bfloat16x8_t __ret; | | |
| 39027 | __ret = (bfloat16x8_t)(__p0); | | |
| 39028 | return __ret; | | |
| 39029 | } | | |
| 39030 | __ai bfloat16x8_t vreinterpretq_bf16_u32(uint32x4_t __p0) { | | |
| 39031 | bfloat16x8_t __ret; | | |
| 39032 | __ret = (bfloat16x8_t)(__p0); | | |
| 39033 | return __ret; | | |
| 39034 | } | | |
| 39035 | __ai bfloat16x8_t vreinterpretq_bf16_u64(uint64x2_t __p0) { | | |
| 39036 | bfloat16x8_t __ret; | | |
| 39037 | __ret = (bfloat16x8_t)(__p0); | | |
| 39038 | return __ret; | | |
| 39039 | } | | |
| 39040 | __ai bfloat16x8_t vreinterpretq_bf16_u16(uint16x8_t __p0) { | | |
| 39041 | bfloat16x8_t __ret; | | |
| 39042 | __ret = (bfloat16x8_t)(__p0); | | |
| 39043 | return __ret; | | |
| 39044 | } | | |
| 39045 | __ai bfloat16x8_t vreinterpretq_bf16_s8(int8x16_t __p0) { | | |
| 39046 | bfloat16x8_t __ret; | | |
| 39047 | __ret = (bfloat16x8_t)(__p0); | | |
| 39048 | return __ret; | | |
| 39049 | } | | |
| 39050 | __ai bfloat16x8_t vreinterpretq_bf16_f32(float32x4_t __p0) { | | |
| 39051 | bfloat16x8_t __ret; | | |
| 39052 | __ret = (bfloat16x8_t)(__p0); | | |
| 39053 | return __ret; | | |
| 39054 | } | | |
| 39055 | __ai bfloat16x8_t vreinterpretq_bf16_f16(float16x8_t __p0) { | | |
| 39056 | bfloat16x8_t __ret; | | |
| 39057 | __ret = (bfloat16x8_t)(__p0); | | |
| 39058 | return __ret; | | |
| 39059 | } | | |
| 39060 | __ai bfloat16x8_t vreinterpretq_bf16_s32(int32x4_t __p0) { | | |
| 39061 | bfloat16x8_t __ret; | | |
| 39062 | __ret = (bfloat16x8_t)(__p0); | | |
| 39063 | return __ret; | | |
| 39064 | } | | |
| 39065 | __ai bfloat16x8_t vreinterpretq_bf16_s64(int64x2_t __p0) { | | |
| 39066 | bfloat16x8_t __ret; | | |
| 39067 | __ret = (bfloat16x8_t)(__p0); | | |
| 39068 | return __ret; | | |
| 39069 | } | | |
| 39070 | __ai bfloat16x8_t vreinterpretq_bf16_s16(int16x8_t __p0) { | | |
| 39071 | bfloat16x8_t __ret; | | |
| 39072 | __ret = (bfloat16x8_t)(__p0); | | |
| 39073 | return __ret; | | |
| 39074 | } | | |
| 39075 | __ai bfloat16x4_t vreinterpret_bf16_p8(poly8x8_t __p0) { | | |
| 39076 | bfloat16x4_t __ret; | | |
| 39077 | __ret = (bfloat16x4_t)(__p0); | | |
| 39078 | return __ret; | | |
| 39079 | } | | |
| 39080 | __ai bfloat16x4_t vreinterpret_bf16_p64(poly64x1_t __p0) { | | |
| 39081 | bfloat16x4_t __ret; | | |
| 39082 | __ret = (bfloat16x4_t)(__p0); | | |
| 39083 | return __ret; | | |
| 39084 | } | | |
| 39085 | __ai bfloat16x4_t vreinterpret_bf16_p16(poly16x4_t __p0) { | | |
| 39086 | bfloat16x4_t __ret; | | |
| 39087 | __ret = (bfloat16x4_t)(__p0); | | |
| 39088 | return __ret; | | |
| 39089 | } | | |
| 39090 | __ai bfloat16x4_t vreinterpret_bf16_u8(uint8x8_t __p0) { | | |
| 39091 | bfloat16x4_t __ret; | | |
| 39092 | __ret = (bfloat16x4_t)(__p0); | | |
| 39093 | return __ret; | | |
| 39094 | } | | |
| 39095 | __ai bfloat16x4_t vreinterpret_bf16_u32(uint32x2_t __p0) { | | |
| 39096 | bfloat16x4_t __ret; | | |
| 39097 | __ret = (bfloat16x4_t)(__p0); | | |
| 39098 | return __ret; | | |
| 39099 | } | | |
| 39100 | __ai bfloat16x4_t vreinterpret_bf16_u64(uint64x1_t __p0) { | | |
| 39101 | bfloat16x4_t __ret; | | |
| 39102 | __ret = (bfloat16x4_t)(__p0); | | |
| 39103 | return __ret; | | |
| 39104 | } | | |
| 39105 | __ai bfloat16x4_t vreinterpret_bf16_u16(uint16x4_t __p0) { | | |
| 39106 | bfloat16x4_t __ret; | | |
| 39107 | __ret = (bfloat16x4_t)(__p0); | | |
| 39108 | return __ret; | | |
| 39109 | } | | |
| 39110 | __ai bfloat16x4_t vreinterpret_bf16_s8(int8x8_t __p0) { | | |
| 39111 | bfloat16x4_t __ret; | | |
| 39112 | __ret = (bfloat16x4_t)(__p0); | | |
| 39113 | return __ret; | | |
| 39114 | } | | |
| 39115 | __ai bfloat16x4_t vreinterpret_bf16_f32(float32x2_t __p0) { | | |
| 39116 | bfloat16x4_t __ret; | | |
| 39117 | __ret = (bfloat16x4_t)(__p0); | | |
| 39118 | return __ret; | | |
| 39119 | } | | |
| 39120 | __ai bfloat16x4_t vreinterpret_bf16_f16(float16x4_t __p0) { | | |
| 39121 | bfloat16x4_t __ret; | | |
| 39122 | __ret = (bfloat16x4_t)(__p0); | | |
| 39123 | return __ret; | | |
| 39124 | } | | |
| 39125 | __ai bfloat16x4_t vreinterpret_bf16_s32(int32x2_t __p0) { | | |
| 39126 | bfloat16x4_t __ret; | | |
| 39127 | __ret = (bfloat16x4_t)(__p0); | | |
| 39128 | return __ret; | | |
| 39129 | } | | |
| 39130 | __ai bfloat16x4_t vreinterpret_bf16_s64(int64x1_t __p0) { | | |
| 39131 | bfloat16x4_t __ret; | | |
| 39132 | __ret = (bfloat16x4_t)(__p0); | | |
| 39133 | return __ret; | | |
| 39134 | } | | |
| 39135 | __ai bfloat16x4_t vreinterpret_bf16_s16(int16x4_t __p0) { | | |
| 39136 | bfloat16x4_t __ret; | | |
| 39137 | __ret = (bfloat16x4_t)(__p0); | | |
| 39138 | return __ret; | | |
| 39139 | } | | |
| 39140 | #endif | | |
| 39141 | #if defined(__ARM_FEATURE_BF16) && defined(__aarch64__) | | |
| 39142 | __ai poly8x8_t vreinterpret_p8_bf16(bfloat16x4_t __p0) { | | |
| 39143 | poly8x8_t __ret; | | |
| 39144 | __ret = (poly8x8_t)(__p0); | | |
| 39145 | return __ret; | | |
| 39146 | } | | |
| 39147 | __ai poly64x1_t vreinterpret_p64_bf16(bfloat16x4_t __p0) { | | |
| 39148 | poly64x1_t __ret; | | |
| 39149 | __ret = (poly64x1_t)(__p0); | | |
| 39150 | return __ret; | | |
| 39151 | } | | |
| 39152 | __ai poly16x4_t vreinterpret_p16_bf16(bfloat16x4_t __p0) { | | |
| 39153 | poly16x4_t __ret; | | |
| 39154 | __ret = (poly16x4_t)(__p0); | | |
| 39155 | return __ret; | | |
| 39156 | } | | |
| 39157 | __ai poly8x16_t vreinterpretq_p8_bf16(bfloat16x8_t __p0) { | | |
| 39158 | poly8x16_t __ret; | | |
| 39159 | __ret = (poly8x16_t)(__p0); | | |
| 39160 | return __ret; | 40605 | return __ret; |
| 39161 | } | 40606 | } |
| 39162 | __ai poly128_t vreinterpretq_p128_bf16(bfloat16x8_t __p0) { | 40607 | #else |
| 39163 | poly128_t __ret; | 40608 | __ai uint32x4_t vcvtaq_u32_f32(float32x4_t __p0) { |
| 39164 | __ret = (poly128_t)(__p0); | 40609 | uint32x4_t __ret; |
| | 40610 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 40611 | __ret = (uint32x4_t) __builtin_neon_vcvtaq_u32_v((int8x16_t)__rev0, 50); |
| | 40612 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39165 | return __ret; | 40613 | return __ret; |
| 39166 | } | 40614 | } |
| 39167 | __ai poly64x2_t vreinterpretq_p64_bf16(bfloat16x8_t __p0) { | 40615 | #endif |
| 39168 | poly64x2_t __ret; | 40616 | |
| 39169 | __ret = (poly64x2_t)(__p0); | 40617 | #ifdef __LITTLE_ENDIAN__ |
| | 40618 | __ai uint32x2_t vcvta_u32_f32(float32x2_t __p0) { |
| | 40619 | uint32x2_t __ret; |
| | 40620 | __ret = (uint32x2_t) __builtin_neon_vcvta_u32_v((int8x8_t)__p0, 18); |
| 39170 | return __ret; | 40621 | return __ret; |
| 39171 | } | 40622 | } |
| 39172 | __ai poly16x8_t vreinterpretq_p16_bf16(bfloat16x8_t __p0) { | 40623 | #else |
| 39173 | poly16x8_t __ret; | 40624 | __ai uint32x2_t vcvta_u32_f32(float32x2_t __p0) { |
| 39174 | __ret = (poly16x8_t)(__p0); | 40625 | uint32x2_t __ret; |
| | 40626 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 40627 | __ret = (uint32x2_t) __builtin_neon_vcvta_u32_v((int8x8_t)__rev0, 18); |
| | 40628 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 39175 | return __ret; | 40629 | return __ret; |
| 39176 | } | 40630 | } |
| 39177 | __ai uint8x16_t vreinterpretq_u8_bf16(bfloat16x8_t __p0) { | 40631 | #endif |
| 39178 | uint8x16_t __ret; | 40632 | |
| 39179 | __ret = (uint8x16_t)(__p0); | 40633 | #ifdef __LITTLE_ENDIAN__ |
| | 40634 | __ai int32x4_t vcvtmq_s32_f32(float32x4_t __p0) { |
| | 40635 | int32x4_t __ret; |
| | 40636 | __ret = (int32x4_t) __builtin_neon_vcvtmq_s32_v((int8x16_t)__p0, 34); |
| 39180 | return __ret; | 40637 | return __ret; |
| 39181 | } | 40638 | } |
| 39182 | __ai uint32x4_t vreinterpretq_u32_bf16(bfloat16x8_t __p0) { | 40639 | #else |
| 39183 | uint32x4_t __ret; | 40640 | __ai int32x4_t vcvtmq_s32_f32(float32x4_t __p0) { |
| 39184 | __ret = (uint32x4_t)(__p0); | 40641 | int32x4_t __ret; |
| | 40642 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 40643 | __ret = (int32x4_t) __builtin_neon_vcvtmq_s32_v((int8x16_t)__rev0, 34); |
| | 40644 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39185 | return __ret; | 40645 | return __ret; |
| 39186 | } | 40646 | } |
| 39187 | __ai uint64x2_t vreinterpretq_u64_bf16(bfloat16x8_t __p0) { | 40647 | #endif |
| 39188 | uint64x2_t __ret; | 40648 | |
| 39189 | __ret = (uint64x2_t)(__p0); | 40649 | #ifdef __LITTLE_ENDIAN__ |
| | 40650 | __ai int32x2_t vcvtm_s32_f32(float32x2_t __p0) { |
| | 40651 | int32x2_t __ret; |
| | 40652 | __ret = (int32x2_t) __builtin_neon_vcvtm_s32_v((int8x8_t)__p0, 2); |
| 39190 | return __ret; | 40653 | return __ret; |
| 39191 | } | 40654 | } |
| 39192 | __ai uint16x8_t vreinterpretq_u16_bf16(bfloat16x8_t __p0) { | 40655 | #else |
| 39193 | uint16x8_t __ret; | 40656 | __ai int32x2_t vcvtm_s32_f32(float32x2_t __p0) { |
| 39194 | __ret = (uint16x8_t)(__p0); | 40657 | int32x2_t __ret; |
| | 40658 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 40659 | __ret = (int32x2_t) __builtin_neon_vcvtm_s32_v((int8x8_t)__rev0, 2); |
| | 40660 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 39195 | return __ret; | 40661 | return __ret; |
| 39196 | } | 40662 | } |
| 39197 | __ai int8x16_t vreinterpretq_s8_bf16(bfloat16x8_t __p0) { | 40663 | #endif |
| 39198 | int8x16_t __ret; | 40664 | |
| 39199 | __ret = (int8x16_t)(__p0); | 40665 | #ifdef __LITTLE_ENDIAN__ |
| | 40666 | __ai uint32x4_t vcvtmq_u32_f32(float32x4_t __p0) { |
| | 40667 | uint32x4_t __ret; |
| | 40668 | __ret = (uint32x4_t) __builtin_neon_vcvtmq_u32_v((int8x16_t)__p0, 50); |
| 39200 | return __ret; | 40669 | return __ret; |
| 39201 | } | 40670 | } |
| 39202 | __ai float64x2_t vreinterpretq_f64_bf16(bfloat16x8_t __p0) { | 40671 | #else |
| 39203 | float64x2_t __ret; | 40672 | __ai uint32x4_t vcvtmq_u32_f32(float32x4_t __p0) { |
| 39204 | __ret = (float64x2_t)(__p0); | 40673 | uint32x4_t __ret; |
| | 40674 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 40675 | __ret = (uint32x4_t) __builtin_neon_vcvtmq_u32_v((int8x16_t)__rev0, 50); |
| | 40676 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39205 | return __ret; | 40677 | return __ret; |
| 39206 | } | 40678 | } |
| 39207 | __ai float32x4_t vreinterpretq_f32_bf16(bfloat16x8_t __p0) { | 40679 | #endif |
| 39208 | float32x4_t __ret; | 40680 | |
| 39209 | __ret = (float32x4_t)(__p0); | 40681 | #ifdef __LITTLE_ENDIAN__ |
| | 40682 | __ai uint32x2_t vcvtm_u32_f32(float32x2_t __p0) { |
| | 40683 | uint32x2_t __ret; |
| | 40684 | __ret = (uint32x2_t) __builtin_neon_vcvtm_u32_v((int8x8_t)__p0, 18); |
| 39210 | return __ret; | 40685 | return __ret; |
| 39211 | } | 40686 | } |
| 39212 | __ai float16x8_t vreinterpretq_f16_bf16(bfloat16x8_t __p0) { | 40687 | #else |
| 39213 | float16x8_t __ret; | 40688 | __ai uint32x2_t vcvtm_u32_f32(float32x2_t __p0) { |
| 39214 | __ret = (float16x8_t)(__p0); | 40689 | uint32x2_t __ret; |
| | 40690 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 40691 | __ret = (uint32x2_t) __builtin_neon_vcvtm_u32_v((int8x8_t)__rev0, 18); |
| | 40692 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 39215 | return __ret; | 40693 | return __ret; |
| 39216 | } | 40694 | } |
| 39217 | __ai int32x4_t vreinterpretq_s32_bf16(bfloat16x8_t __p0) { | 40695 | #endif |
| | 40696 | |
| | 40697 | #ifdef __LITTLE_ENDIAN__ |
| | 40698 | __ai int32x4_t vcvtnq_s32_f32(float32x4_t __p0) { |
| 39218 | int32x4_t __ret; | 40699 | int32x4_t __ret; |
| 39219 | __ret = (int32x4_t)(__p0); | 40700 | __ret = (int32x4_t) __builtin_neon_vcvtnq_s32_v((int8x16_t)__p0, 34); |
| 39220 | return __ret; | 40701 | return __ret; |
| 39221 | } | 40702 | } |
| 39222 | __ai int64x2_t vreinterpretq_s64_bf16(bfloat16x8_t __p0) { | 40703 | #else |
| 39223 | int64x2_t __ret; | 40704 | __ai int32x4_t vcvtnq_s32_f32(float32x4_t __p0) { |
| 39224 | __ret = (int64x2_t)(__p0); | 40705 | int32x4_t __ret; |
| | 40706 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 40707 | __ret = (int32x4_t) __builtin_neon_vcvtnq_s32_v((int8x16_t)__rev0, 34); |
| | 40708 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39225 | return __ret; | 40709 | return __ret; |
| 39226 | } | 40710 | } |
| 39227 | __ai int16x8_t vreinterpretq_s16_bf16(bfloat16x8_t __p0) { | 40711 | #endif |
| 39228 | int16x8_t __ret; | 40712 | |
| 39229 | __ret = (int16x8_t)(__p0); | 40713 | #ifdef __LITTLE_ENDIAN__ |
| | 40714 | __ai int32x2_t vcvtn_s32_f32(float32x2_t __p0) { |
| | 40715 | int32x2_t __ret; |
| | 40716 | __ret = (int32x2_t) __builtin_neon_vcvtn_s32_v((int8x8_t)__p0, 2); |
| 39230 | return __ret; | 40717 | return __ret; |
| 39231 | } | 40718 | } |
| 39232 | __ai uint8x8_t vreinterpret_u8_bf16(bfloat16x4_t __p0) { | 40719 | #else |
| 39233 | uint8x8_t __ret; | 40720 | __ai int32x2_t vcvtn_s32_f32(float32x2_t __p0) { |
| 39234 | __ret = (uint8x8_t)(__p0); | 40721 | int32x2_t __ret; |
| | 40722 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 40723 | __ret = (int32x2_t) __builtin_neon_vcvtn_s32_v((int8x8_t)__rev0, 2); |
| | 40724 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 39235 | return __ret; | 40725 | return __ret; |
| 39236 | } | 40726 | } |
| 39237 | __ai uint32x2_t vreinterpret_u32_bf16(bfloat16x4_t __p0) { | 40727 | #endif |
| 39238 | uint32x2_t __ret; | 40728 | |
| 39239 | __ret = (uint32x2_t)(__p0); | 40729 | #ifdef __LITTLE_ENDIAN__ |
| | 40730 | __ai uint32x4_t vcvtnq_u32_f32(float32x4_t __p0) { |
| | 40731 | uint32x4_t __ret; |
| | 40732 | __ret = (uint32x4_t) __builtin_neon_vcvtnq_u32_v((int8x16_t)__p0, 50); |
| 39240 | return __ret; | 40733 | return __ret; |
| 39241 | } | 40734 | } |
| 39242 | __ai uint64x1_t vreinterpret_u64_bf16(bfloat16x4_t __p0) { | 40735 | #else |
| 39243 | uint64x1_t __ret; | 40736 | __ai uint32x4_t vcvtnq_u32_f32(float32x4_t __p0) { |
| 39244 | __ret = (uint64x1_t)(__p0); | 40737 | uint32x4_t __ret; |
| | 40738 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 40739 | __ret = (uint32x4_t) __builtin_neon_vcvtnq_u32_v((int8x16_t)__rev0, 50); |
| | 40740 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39245 | return __ret; | 40741 | return __ret; |
| 39246 | } | 40742 | } |
| 39247 | __ai uint16x4_t vreinterpret_u16_bf16(bfloat16x4_t __p0) { | 40743 | #endif |
| 39248 | uint16x4_t __ret; | 40744 | |
| 39249 | __ret = (uint16x4_t)(__p0); | 40745 | #ifdef __LITTLE_ENDIAN__ |
| | 40746 | __ai uint32x2_t vcvtn_u32_f32(float32x2_t __p0) { |
| | 40747 | uint32x2_t __ret; |
| | 40748 | __ret = (uint32x2_t) __builtin_neon_vcvtn_u32_v((int8x8_t)__p0, 18); |
| 39250 | return __ret; | 40749 | return __ret; |
| 39251 | } | 40750 | } |
| 39252 | __ai int8x8_t vreinterpret_s8_bf16(bfloat16x4_t __p0) { | 40751 | #else |
| 39253 | int8x8_t __ret; | 40752 | __ai uint32x2_t vcvtn_u32_f32(float32x2_t __p0) { |
| 39254 | __ret = (int8x8_t)(__p0); | 40753 | uint32x2_t __ret; |
| | 40754 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 40755 | __ret = (uint32x2_t) __builtin_neon_vcvtn_u32_v((int8x8_t)__rev0, 18); |
| | 40756 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 39255 | return __ret; | 40757 | return __ret; |
| 39256 | } | 40758 | } |
| 39257 | __ai float64x1_t vreinterpret_f64_bf16(bfloat16x4_t __p0) { | 40759 | #endif |
| 39258 | float64x1_t __ret; | 40760 | |
| 39259 | __ret = (float64x1_t)(__p0); | 40761 | #ifdef __LITTLE_ENDIAN__ |
| | 40762 | __ai int32x4_t vcvtpq_s32_f32(float32x4_t __p0) { |
| | 40763 | int32x4_t __ret; |
| | 40764 | __ret = (int32x4_t) __builtin_neon_vcvtpq_s32_v((int8x16_t)__p0, 34); |
| 39260 | return __ret; | 40765 | return __ret; |
| 39261 | } | 40766 | } |
| 39262 | __ai float32x2_t vreinterpret_f32_bf16(bfloat16x4_t __p0) { | 40767 | #else |
| 39263 | float32x2_t __ret; | 40768 | __ai int32x4_t vcvtpq_s32_f32(float32x4_t __p0) { |
| 39264 | __ret = (float32x2_t)(__p0); | 40769 | int32x4_t __ret; |
| | 40770 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 40771 | __ret = (int32x4_t) __builtin_neon_vcvtpq_s32_v((int8x16_t)__rev0, 34); |
| | 40772 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39265 | return __ret; | 40773 | return __ret; |
| 39266 | } | 40774 | } |
| 39267 | __ai float16x4_t vreinterpret_f16_bf16(bfloat16x4_t __p0) { | 40775 | #endif |
| 39268 | float16x4_t __ret; | 40776 | |
| 39269 | __ret = (float16x4_t)(__p0); | 40777 | #ifdef __LITTLE_ENDIAN__ |
| | 40778 | __ai int32x2_t vcvtp_s32_f32(float32x2_t __p0) { |
| | 40779 | int32x2_t __ret; |
| | 40780 | __ret = (int32x2_t) __builtin_neon_vcvtp_s32_v((int8x8_t)__p0, 2); |
| 39270 | return __ret; | 40781 | return __ret; |
| 39271 | } | 40782 | } |
| 39272 | __ai int32x2_t vreinterpret_s32_bf16(bfloat16x4_t __p0) { | 40783 | #else |
| | 40784 | __ai int32x2_t vcvtp_s32_f32(float32x2_t __p0) { |
| 39273 | int32x2_t __ret; | 40785 | int32x2_t __ret; |
| 39274 | __ret = (int32x2_t)(__p0); | 40786 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 40787 | __ret = (int32x2_t) __builtin_neon_vcvtp_s32_v((int8x8_t)__rev0, 2); |
| | 40788 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 39275 | return __ret; | 40789 | return __ret; |
| 39276 | } | 40790 | } |
| 39277 | __ai int64x1_t vreinterpret_s64_bf16(bfloat16x4_t __p0) { | 40791 | #endif |
| 39278 | int64x1_t __ret; | 40792 | |
| 39279 | __ret = (int64x1_t)(__p0); | 40793 | #ifdef __LITTLE_ENDIAN__ |
| | 40794 | __ai uint32x4_t vcvtpq_u32_f32(float32x4_t __p0) { |
| | 40795 | uint32x4_t __ret; |
| | 40796 | __ret = (uint32x4_t) __builtin_neon_vcvtpq_u32_v((int8x16_t)__p0, 50); |
| 39280 | return __ret; | 40797 | return __ret; |
| 39281 | } | 40798 | } |
| 39282 | __ai int16x4_t vreinterpret_s16_bf16(bfloat16x4_t __p0) { | 40799 | #else |
| 39283 | int16x4_t __ret; | 40800 | __ai uint32x4_t vcvtpq_u32_f32(float32x4_t __p0) { |
| 39284 | __ret = (int16x4_t)(__p0); | 40801 | uint32x4_t __ret; |
| | 40802 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 40803 | __ret = (uint32x4_t) __builtin_neon_vcvtpq_u32_v((int8x16_t)__rev0, 50); |
| | 40804 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39285 | return __ret; | 40805 | return __ret; |
| 39286 | } | 40806 | } |
| 39287 | __ai bfloat16x8_t vreinterpretq_bf16_p8(poly8x16_t __p0) { | 40807 | #endif |
| 39288 | bfloat16x8_t __ret; | 40808 | |
| 39289 | __ret = (bfloat16x8_t)(__p0); | 40809 | #ifdef __LITTLE_ENDIAN__ |
| | 40810 | __ai uint32x2_t vcvtp_u32_f32(float32x2_t __p0) { |
| | 40811 | uint32x2_t __ret; |
| | 40812 | __ret = (uint32x2_t) __builtin_neon_vcvtp_u32_v((int8x8_t)__p0, 18); |
| 39290 | return __ret; | 40813 | return __ret; |
| 39291 | } | 40814 | } |
| 39292 | __ai bfloat16x8_t vreinterpretq_bf16_p128(poly128_t __p0) { | 40815 | #else |
| 39293 | bfloat16x8_t __ret; | 40816 | __ai uint32x2_t vcvtp_u32_f32(float32x2_t __p0) { |
| 39294 | __ret = (bfloat16x8_t)(__p0); | 40817 | uint32x2_t __ret; |
| | 40818 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 40819 | __ret = (uint32x2_t) __builtin_neon_vcvtp_u32_v((int8x8_t)__rev0, 18); |
| | 40820 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 39295 | return __ret; | 40821 | return __ret; |
| 39296 | } | 40822 | } |
| 39297 | __ai bfloat16x8_t vreinterpretq_bf16_p64(poly64x2_t __p0) { | 40823 | #endif |
| 39298 | bfloat16x8_t __ret; | 40824 | |
| 39299 | __ret = (bfloat16x8_t)(__p0); | 40825 | #ifdef __LITTLE_ENDIAN__ |
| | 40826 | __ai __attribute__((target("aes"))) uint8x16_t vaesdq_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| | 40827 | uint8x16_t __ret; |
| | 40828 | __ret = (uint8x16_t) __builtin_neon_vaesdq_u8((int8x16_t)__p0, (int8x16_t)__p1, 48); |
| 39300 | return __ret; | 40829 | return __ret; |
| 39301 | } | 40830 | } |
| 39302 | __ai bfloat16x8_t vreinterpretq_bf16_p16(poly16x8_t __p0) { | 40831 | #else |
| 39303 | bfloat16x8_t __ret; | 40832 | __ai __attribute__((target("aes"))) uint8x16_t vaesdq_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 39304 | __ret = (bfloat16x8_t)(__p0); | 40833 | uint8x16_t __ret; |
| | 40834 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 40835 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 40836 | __ret = (uint8x16_t) __builtin_neon_vaesdq_u8((int8x16_t)__rev0, (int8x16_t)__rev1, 48); |
| | 40837 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 39305 | return __ret; | 40838 | return __ret; |
| 39306 | } | 40839 | } |
| 39307 | __ai bfloat16x8_t vreinterpretq_bf16_u8(uint8x16_t __p0) { | 40840 | #endif |
| 39308 | bfloat16x8_t __ret; | 40841 | |
| 39309 | __ret = (bfloat16x8_t)(__p0); | 40842 | #ifdef __LITTLE_ENDIAN__ |
| | 40843 | __ai __attribute__((target("aes"))) uint8x16_t vaeseq_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| | 40844 | uint8x16_t __ret; |
| | 40845 | __ret = (uint8x16_t) __builtin_neon_vaeseq_u8((int8x16_t)__p0, (int8x16_t)__p1, 48); |
| 39310 | return __ret; | 40846 | return __ret; |
| 39311 | } | 40847 | } |
| 39312 | __ai bfloat16x8_t vreinterpretq_bf16_u32(uint32x4_t __p0) { | 40848 | #else |
| 39313 | bfloat16x8_t __ret; | 40849 | __ai __attribute__((target("aes"))) uint8x16_t vaeseq_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 39314 | __ret = (bfloat16x8_t)(__p0); | 40850 | uint8x16_t __ret; |
| | 40851 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 40852 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 40853 | __ret = (uint8x16_t) __builtin_neon_vaeseq_u8((int8x16_t)__rev0, (int8x16_t)__rev1, 48); |
| | 40854 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 39315 | return __ret; | 40855 | return __ret; |
| 39316 | } | 40856 | } |
| 39317 | __ai bfloat16x8_t vreinterpretq_bf16_u64(uint64x2_t __p0) { | 40857 | #endif |
| 39318 | bfloat16x8_t __ret; | 40858 | |
| 39319 | __ret = (bfloat16x8_t)(__p0); | 40859 | #ifdef __LITTLE_ENDIAN__ |
| | 40860 | __ai __attribute__((target("aes"))) uint8x16_t vaesimcq_u8(uint8x16_t __p0) { |
| | 40861 | uint8x16_t __ret; |
| | 40862 | __ret = (uint8x16_t) __builtin_neon_vaesimcq_u8((int8x16_t)__p0, 48); |
| 39320 | return __ret; | 40863 | return __ret; |
| 39321 | } | 40864 | } |
| 39322 | __ai bfloat16x8_t vreinterpretq_bf16_u16(uint16x8_t __p0) { | 40865 | #else |
| 39323 | bfloat16x8_t __ret; | 40866 | __ai __attribute__((target("aes"))) uint8x16_t vaesimcq_u8(uint8x16_t __p0) { |
| 39324 | __ret = (bfloat16x8_t)(__p0); | 40867 | uint8x16_t __ret; |
| | 40868 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 40869 | __ret = (uint8x16_t) __builtin_neon_vaesimcq_u8((int8x16_t)__rev0, 48); |
| | 40870 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 39325 | return __ret; | 40871 | return __ret; |
| 39326 | } | 40872 | } |
| 39327 | __ai bfloat16x8_t vreinterpretq_bf16_s8(int8x16_t __p0) { | 40873 | #endif |
| 39328 | bfloat16x8_t __ret; | 40874 | |
| 39329 | __ret = (bfloat16x8_t)(__p0); | 40875 | #ifdef __LITTLE_ENDIAN__ |
| | 40876 | __ai __attribute__((target("aes"))) uint8x16_t vaesmcq_u8(uint8x16_t __p0) { |
| | 40877 | uint8x16_t __ret; |
| | 40878 | __ret = (uint8x16_t) __builtin_neon_vaesmcq_u8((int8x16_t)__p0, 48); |
| 39330 | return __ret; | 40879 | return __ret; |
| 39331 | } | 40880 | } |
| 39332 | __ai bfloat16x8_t vreinterpretq_bf16_f64(float64x2_t __p0) { | 40881 | #else |
| 39333 | bfloat16x8_t __ret; | 40882 | __ai __attribute__((target("aes"))) uint8x16_t vaesmcq_u8(uint8x16_t __p0) { |
| 39334 | __ret = (bfloat16x8_t)(__p0); | 40883 | uint8x16_t __ret; |
| | 40884 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 40885 | __ret = (uint8x16_t) __builtin_neon_vaesmcq_u8((int8x16_t)__rev0, 48); |
| | 40886 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 39335 | return __ret; | 40887 | return __ret; |
| 39336 | } | 40888 | } |
| 39337 | __ai bfloat16x8_t vreinterpretq_bf16_f32(float32x4_t __p0) { | 40889 | #endif |
| 39338 | bfloat16x8_t __ret; | 40890 | |
| 39339 | __ret = (bfloat16x8_t)(__p0); | 40891 | #ifdef __LITTLE_ENDIAN__ |
| | 40892 | __ai __attribute__((target("sha2"))) uint32x4_t vsha1cq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { |
| | 40893 | uint32x4_t __ret; |
| | 40894 | __ret = (uint32x4_t) __builtin_neon_vsha1cq_u32(__p0, __p1, __p2); |
| 39340 | return __ret; | 40895 | return __ret; |
| 39341 | } | 40896 | } |
| 39342 | __ai bfloat16x8_t vreinterpretq_bf16_f16(float16x8_t __p0) { | 40897 | #else |
| 39343 | bfloat16x8_t __ret; | 40898 | __ai __attribute__((target("sha2"))) uint32x4_t vsha1cq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { |
| 39344 | __ret = (bfloat16x8_t)(__p0); | 40899 | uint32x4_t __ret; |
| | 40900 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 40901 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 40902 | __ret = (uint32x4_t) __builtin_neon_vsha1cq_u32(__rev0, __p1, __rev2); |
| | 40903 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39345 | return __ret; | 40904 | return __ret; |
| 39346 | } | 40905 | } |
| 39347 | __ai bfloat16x8_t vreinterpretq_bf16_s32(int32x4_t __p0) { | 40906 | #endif |
| 39348 | bfloat16x8_t __ret; | 40907 | |
| 39349 | __ret = (bfloat16x8_t)(__p0); | 40908 | __ai __attribute__((target("sha2"))) uint32_t vsha1h_u32(uint32_t __p0) { |
| | 40909 | uint32_t __ret; |
| | 40910 | __ret = (uint32_t) __builtin_neon_vsha1h_u32(__p0); |
| 39350 | return __ret; | 40911 | return __ret; |
| 39351 | } | 40912 | } |
| 39352 | __ai bfloat16x8_t vreinterpretq_bf16_s64(int64x2_t __p0) { | 40913 | #ifdef __LITTLE_ENDIAN__ |
| 39353 | bfloat16x8_t __ret; | 40914 | __ai __attribute__((target("sha2"))) uint32x4_t vsha1mq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { |
| 39354 | __ret = (bfloat16x8_t)(__p0); | 40915 | uint32x4_t __ret; |
| | 40916 | __ret = (uint32x4_t) __builtin_neon_vsha1mq_u32(__p0, __p1, __p2); |
| 39355 | return __ret; | 40917 | return __ret; |
| 39356 | } | 40918 | } |
| 39357 | __ai bfloat16x8_t vreinterpretq_bf16_s16(int16x8_t __p0) { | 40919 | #else |
| 39358 | bfloat16x8_t __ret; | 40920 | __ai __attribute__((target("sha2"))) uint32x4_t vsha1mq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { |
| 39359 | __ret = (bfloat16x8_t)(__p0); | 40921 | uint32x4_t __ret; |
| | 40922 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 40923 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 40924 | __ret = (uint32x4_t) __builtin_neon_vsha1mq_u32(__rev0, __p1, __rev2); |
| | 40925 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39360 | return __ret; | 40926 | return __ret; |
| 39361 | } | 40927 | } |
| 39362 | __ai bfloat16x4_t vreinterpret_bf16_p8(poly8x8_t __p0) { | 40928 | #endif |
| 39363 | bfloat16x4_t __ret; | 40929 | |
| 39364 | __ret = (bfloat16x4_t)(__p0); | 40930 | #ifdef __LITTLE_ENDIAN__ |
| | 40931 | __ai __attribute__((target("sha2"))) uint32x4_t vsha1pq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { |
| | 40932 | uint32x4_t __ret; |
| | 40933 | __ret = (uint32x4_t) __builtin_neon_vsha1pq_u32(__p0, __p1, __p2); |
| 39365 | return __ret; | 40934 | return __ret; |
| 39366 | } | 40935 | } |
| 39367 | __ai bfloat16x4_t vreinterpret_bf16_p64(poly64x1_t __p0) { | 40936 | #else |
| 39368 | bfloat16x4_t __ret; | 40937 | __ai __attribute__((target("sha2"))) uint32x4_t vsha1pq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { |
| 39369 | __ret = (bfloat16x4_t)(__p0); | 40938 | uint32x4_t __ret; |
| | 40939 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 40940 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 40941 | __ret = (uint32x4_t) __builtin_neon_vsha1pq_u32(__rev0, __p1, __rev2); |
| | 40942 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39370 | return __ret; | 40943 | return __ret; |
| 39371 | } | 40944 | } |
| 39372 | __ai bfloat16x4_t vreinterpret_bf16_p16(poly16x4_t __p0) { | 40945 | #endif |
| 39373 | bfloat16x4_t __ret; | 40946 | |
| 39374 | __ret = (bfloat16x4_t)(__p0); | 40947 | #ifdef __LITTLE_ENDIAN__ |
| | 40948 | __ai __attribute__((target("sha2"))) uint32x4_t vsha1su0q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| | 40949 | uint32x4_t __ret; |
| | 40950 | __ret = (uint32x4_t) __builtin_neon_vsha1su0q_u32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); |
| 39375 | return __ret; | 40951 | return __ret; |
| 39376 | } | 40952 | } |
| 39377 | __ai bfloat16x4_t vreinterpret_bf16_u8(uint8x8_t __p0) { | 40953 | #else |
| 39378 | bfloat16x4_t __ret; | 40954 | __ai __attribute__((target("sha2"))) uint32x4_t vsha1su0q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 39379 | __ret = (bfloat16x4_t)(__p0); | 40955 | uint32x4_t __ret; |
| | 40956 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 40957 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 40958 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 40959 | __ret = (uint32x4_t) __builtin_neon_vsha1su0q_u32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); |
| | 40960 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39380 | return __ret; | 40961 | return __ret; |
| 39381 | } | 40962 | } |
| 39382 | __ai bfloat16x4_t vreinterpret_bf16_u32(uint32x2_t __p0) { | 40963 | #endif |
| 39383 | bfloat16x4_t __ret; | 40964 | |
| 39384 | __ret = (bfloat16x4_t)(__p0); | 40965 | #ifdef __LITTLE_ENDIAN__ |
| | 40966 | __ai __attribute__((target("sha2"))) uint32x4_t vsha1su1q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| | 40967 | uint32x4_t __ret; |
| | 40968 | __ret = (uint32x4_t) __builtin_neon_vsha1su1q_u32((int8x16_t)__p0, (int8x16_t)__p1, 50); |
| 39385 | return __ret; | 40969 | return __ret; |
| 39386 | } | 40970 | } |
| 39387 | __ai bfloat16x4_t vreinterpret_bf16_u64(uint64x1_t __p0) { | 40971 | #else |
| 39388 | bfloat16x4_t __ret; | 40972 | __ai __attribute__((target("sha2"))) uint32x4_t vsha1su1q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 39389 | __ret = (bfloat16x4_t)(__p0); | 40973 | uint32x4_t __ret; |
| | 40974 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 40975 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 40976 | __ret = (uint32x4_t) __builtin_neon_vsha1su1q_u32((int8x16_t)__rev0, (int8x16_t)__rev1, 50); |
| | 40977 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39390 | return __ret; | 40978 | return __ret; |
| 39391 | } | 40979 | } |
| 39392 | __ai bfloat16x4_t vreinterpret_bf16_u16(uint16x4_t __p0) { | 40980 | #endif |
| 39393 | bfloat16x4_t __ret; | 40981 | |
| 39394 | __ret = (bfloat16x4_t)(__p0); | 40982 | #ifdef __LITTLE_ENDIAN__ |
| | 40983 | __ai __attribute__((target("sha2"))) uint32x4_t vsha256hq_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| | 40984 | uint32x4_t __ret; |
| | 40985 | __ret = (uint32x4_t) __builtin_neon_vsha256hq_u32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); |
| 39395 | return __ret; | 40986 | return __ret; |
| 39396 | } | 40987 | } |
| 39397 | __ai bfloat16x4_t vreinterpret_bf16_s8(int8x8_t __p0) { | 40988 | #else |
| 39398 | bfloat16x4_t __ret; | 40989 | __ai __attribute__((target("sha2"))) uint32x4_t vsha256hq_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 39399 | __ret = (bfloat16x4_t)(__p0); | 40990 | uint32x4_t __ret; |
| | 40991 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 40992 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 40993 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 40994 | __ret = (uint32x4_t) __builtin_neon_vsha256hq_u32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); |
| | 40995 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39400 | return __ret; | 40996 | return __ret; |
| 39401 | } | 40997 | } |
| 39402 | __ai bfloat16x4_t vreinterpret_bf16_f64(float64x1_t __p0) { | 40998 | #endif |
| 39403 | bfloat16x4_t __ret; | 40999 | |
| 39404 | __ret = (bfloat16x4_t)(__p0); | 41000 | #ifdef __LITTLE_ENDIAN__ |
| | 41001 | __ai __attribute__((target("sha2"))) uint32x4_t vsha256h2q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| | 41002 | uint32x4_t __ret; |
| | 41003 | __ret = (uint32x4_t) __builtin_neon_vsha256h2q_u32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); |
| 39405 | return __ret; | 41004 | return __ret; |
| 39406 | } | 41005 | } |
| 39407 | __ai bfloat16x4_t vreinterpret_bf16_f32(float32x2_t __p0) { | 41006 | #else |
| 39408 | bfloat16x4_t __ret; | 41007 | __ai __attribute__((target("sha2"))) uint32x4_t vsha256h2q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 39409 | __ret = (bfloat16x4_t)(__p0); | 41008 | uint32x4_t __ret; |
| | 41009 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 41010 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 41011 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 41012 | __ret = (uint32x4_t) __builtin_neon_vsha256h2q_u32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); |
| | 41013 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39410 | return __ret; | 41014 | return __ret; |
| 39411 | } | 41015 | } |
| 39412 | __ai bfloat16x4_t vreinterpret_bf16_f16(float16x4_t __p0) { | 41016 | #endif |
| 39413 | bfloat16x4_t __ret; | 41017 | |
| 39414 | __ret = (bfloat16x4_t)(__p0); | 41018 | #ifdef __LITTLE_ENDIAN__ |
| | 41019 | __ai __attribute__((target("sha2"))) uint32x4_t vsha256su0q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| | 41020 | uint32x4_t __ret; |
| | 41021 | __ret = (uint32x4_t) __builtin_neon_vsha256su0q_u32((int8x16_t)__p0, (int8x16_t)__p1, 50); |
| 39415 | return __ret; | 41022 | return __ret; |
| 39416 | } | 41023 | } |
| 39417 | __ai bfloat16x4_t vreinterpret_bf16_s32(int32x2_t __p0) { | 41024 | #else |
| 39418 | bfloat16x4_t __ret; | 41025 | __ai __attribute__((target("sha2"))) uint32x4_t vsha256su0q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 39419 | __ret = (bfloat16x4_t)(__p0); | 41026 | uint32x4_t __ret; |
| | 41027 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 41028 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 41029 | __ret = (uint32x4_t) __builtin_neon_vsha256su0q_u32((int8x16_t)__rev0, (int8x16_t)__rev1, 50); |
| | 41030 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39420 | return __ret; | 41031 | return __ret; |
| 39421 | } | 41032 | } |
| 39422 | __ai bfloat16x4_t vreinterpret_bf16_s64(int64x1_t __p0) { | 41033 | #endif |
| 39423 | bfloat16x4_t __ret; | 41034 | |
| 39424 | __ret = (bfloat16x4_t)(__p0); | 41035 | #ifdef __LITTLE_ENDIAN__ |
| | 41036 | __ai __attribute__((target("sha2"))) uint32x4_t vsha256su1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| | 41037 | uint32x4_t __ret; |
| | 41038 | __ret = (uint32x4_t) __builtin_neon_vsha256su1q_u32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); |
| 39425 | return __ret; | 41039 | return __ret; |
| 39426 | } | 41040 | } |
| 39427 | __ai bfloat16x4_t vreinterpret_bf16_s16(int16x4_t __p0) { | 41041 | #else |
| 39428 | bfloat16x4_t __ret; | 41042 | __ai __attribute__((target("sha2"))) uint32x4_t vsha256su1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 39429 | __ret = (bfloat16x4_t)(__p0); | 41043 | uint32x4_t __ret; |
| | 41044 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 41045 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 41046 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 41047 | __ret = (uint32x4_t) __builtin_neon_vsha256su1q_u32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); |
| | 41048 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39430 | return __ret; | 41049 | return __ret; |
| 39431 | } | 41050 | } |
| 39432 | #endif | 41051 | #endif |
| 39433 | #if defined(__ARM_FEATURE_BF16_VECTOR_ARITHMETIC) | 41052 | |
| | 41053 | #endif |
| | 41054 | #if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_DIRECTED_ROUNDING) |
| 39434 | #ifdef __LITTLE_ENDIAN__ | 41055 | #ifdef __LITTLE_ENDIAN__ |
| 39435 | #define splatq_lane_bf16(__p0, __p1) __extension__ ({ \ | 41056 | __ai float32x4_t vrndq_f32(float32x4_t __p0) { |
| 39436 | bfloat16x8_t __ret; \ | 41057 | float32x4_t __ret; |
| 39437 | bfloat16x4_t __s0 = __p0; \ | 41058 | __ret = (float32x4_t) __builtin_neon_vrndq_v((int8x16_t)__p0, 41); |
| 39438 | __ret = (bfloat16x8_t) __builtin_neon_splatq_lane_v((int8x8_t)__s0, __p1, 11); \ | 41059 | return __ret; |
| 39439 | __ret; \ | 41060 | } |
| 39440 | }) | | |
| 39441 | #else | 41061 | #else |
| 39442 | #define splatq_lane_bf16(__p0, __p1) __extension__ ({ \ | 41062 | __ai float32x4_t vrndq_f32(float32x4_t __p0) { |
| 39443 | bfloat16x8_t __ret; \ | 41063 | float32x4_t __ret; |
| 39444 | bfloat16x4_t __s0 = __p0; \ | 41064 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 39445 | bfloat16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 41065 | __ret = (float32x4_t) __builtin_neon_vrndq_v((int8x16_t)__rev0, 41); |
| 39446 | __ret = (bfloat16x8_t) __builtin_neon_splatq_lane_v((int8x8_t)__rev0, __p1, 11); \ | 41066 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39447 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 41067 | return __ret; |
| 39448 | __ret; \ | 41068 | } |
| 39449 | }) | | |
| 39450 | #define __noswap_splatq_lane_bf16(__p0, __p1) __extension__ ({ \ | | |
| 39451 | bfloat16x8_t __ret; \ | | |
| 39452 | bfloat16x4_t __s0 = __p0; \ | | |
| 39453 | __ret = (bfloat16x8_t) __builtin_neon_splatq_lane_v((int8x8_t)__s0, __p1, 11); \ | | |
| 39454 | __ret; \ | | |
| 39455 | }) | | |
| 39456 | #endif | 41069 | #endif |
| 39457 | | 41070 | |
| 39458 | #ifdef __LITTLE_ENDIAN__ | 41071 | #ifdef __LITTLE_ENDIAN__ |
| 39459 | #define splat_lane_bf16(__p0, __p1) __extension__ ({ \ | 41072 | __ai float32x2_t vrnd_f32(float32x2_t __p0) { |
| 39460 | bfloat16x4_t __ret; \ | 41073 | float32x2_t __ret; |
| 39461 | bfloat16x4_t __s0 = __p0; \ | 41074 | __ret = (float32x2_t) __builtin_neon_vrnd_v((int8x8_t)__p0, 9); |
| 39462 | __ret = (bfloat16x4_t) __builtin_neon_splat_lane_v((int8x8_t)__s0, __p1, 11); \ | 41075 | return __ret; |
| 39463 | __ret; \ | 41076 | } |
| 39464 | }) | | |
| 39465 | #else | 41077 | #else |
| 39466 | #define splat_lane_bf16(__p0, __p1) __extension__ ({ \ | 41078 | __ai float32x2_t vrnd_f32(float32x2_t __p0) { |
| 39467 | bfloat16x4_t __ret; \ | 41079 | float32x2_t __ret; |
| 39468 | bfloat16x4_t __s0 = __p0; \ | 41080 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 39469 | bfloat16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 41081 | __ret = (float32x2_t) __builtin_neon_vrnd_v((int8x8_t)__rev0, 9); |
| 39470 | __ret = (bfloat16x4_t) __builtin_neon_splat_lane_v((int8x8_t)__rev0, __p1, 11); \ | 41082 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 39471 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 41083 | return __ret; |
| 39472 | __ret; \ | 41084 | } |
| 39473 | }) | | |
| 39474 | #define __noswap_splat_lane_bf16(__p0, __p1) __extension__ ({ \ | | |
| 39475 | bfloat16x4_t __ret; \ | | |
| 39476 | bfloat16x4_t __s0 = __p0; \ | | |
| 39477 | __ret = (bfloat16x4_t) __builtin_neon_splat_lane_v((int8x8_t)__s0, __p1, 11); \ | | |
| 39478 | __ret; \ | | |
| 39479 | }) | | |
| 39480 | #endif | 41085 | #endif |
| 39481 | | 41086 | |
| 39482 | #ifdef __LITTLE_ENDIAN__ | 41087 | #ifdef __LITTLE_ENDIAN__ |
| 39483 | #define splatq_laneq_bf16(__p0, __p1) __extension__ ({ \ | 41088 | __ai float32x4_t vrndaq_f32(float32x4_t __p0) { |
| 39484 | bfloat16x8_t __ret; \ | 41089 | float32x4_t __ret; |
| 39485 | bfloat16x8_t __s0 = __p0; \ | 41090 | __ret = (float32x4_t) __builtin_neon_vrndaq_v((int8x16_t)__p0, 41); |
| 39486 | __ret = (bfloat16x8_t) __builtin_neon_splatq_laneq_v((int8x16_t)__s0, __p1, 43); \ | 41091 | return __ret; |
| 39487 | __ret; \ | 41092 | } |
| 39488 | }) | | |
| 39489 | #else | 41093 | #else |
| 39490 | #define splatq_laneq_bf16(__p0, __p1) __extension__ ({ \ | 41094 | __ai float32x4_t vrndaq_f32(float32x4_t __p0) { |
| 39491 | bfloat16x8_t __ret; \ | 41095 | float32x4_t __ret; |
| 39492 | bfloat16x8_t __s0 = __p0; \ | 41096 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 39493 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 41097 | __ret = (float32x4_t) __builtin_neon_vrndaq_v((int8x16_t)__rev0, 41); |
| 39494 | __ret = (bfloat16x8_t) __builtin_neon_splatq_laneq_v((int8x16_t)__rev0, __p1, 43); \ | 41098 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39495 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 41099 | return __ret; |
| 39496 | __ret; \ | 41100 | } |
| 39497 | }) | | |
| 39498 | #define __noswap_splatq_laneq_bf16(__p0, __p1) __extension__ ({ \ | | |
| 39499 | bfloat16x8_t __ret; \ | | |
| 39500 | bfloat16x8_t __s0 = __p0; \ | | |
| 39501 | __ret = (bfloat16x8_t) __builtin_neon_splatq_laneq_v((int8x16_t)__s0, __p1, 43); \ | | |
| 39502 | __ret; \ | | |
| 39503 | }) | | |
| 39504 | #endif | 41101 | #endif |
| 39505 | | 41102 | |
| 39506 | #ifdef __LITTLE_ENDIAN__ | 41103 | #ifdef __LITTLE_ENDIAN__ |
| 39507 | #define splat_laneq_bf16(__p0, __p1) __extension__ ({ \ | 41104 | __ai float32x2_t vrnda_f32(float32x2_t __p0) { |
| 39508 | bfloat16x4_t __ret; \ | 41105 | float32x2_t __ret; |
| 39509 | bfloat16x8_t __s0 = __p0; \ | 41106 | __ret = (float32x2_t) __builtin_neon_vrnda_v((int8x8_t)__p0, 9); |
| 39510 | __ret = (bfloat16x4_t) __builtin_neon_splat_laneq_v((int8x16_t)__s0, __p1, 43); \ | 41107 | return __ret; |
| 39511 | __ret; \ | 41108 | } |
| 39512 | }) | | |
| 39513 | #else | 41109 | #else |
| 39514 | #define splat_laneq_bf16(__p0, __p1) __extension__ ({ \ | 41110 | __ai float32x2_t vrnda_f32(float32x2_t __p0) { |
| 39515 | bfloat16x4_t __ret; \ | 41111 | float32x2_t __ret; |
| 39516 | bfloat16x8_t __s0 = __p0; \ | 41112 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 39517 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 41113 | __ret = (float32x2_t) __builtin_neon_vrnda_v((int8x8_t)__rev0, 9); |
| 39518 | __ret = (bfloat16x4_t) __builtin_neon_splat_laneq_v((int8x16_t)__rev0, __p1, 43); \ | 41114 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 39519 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 41115 | return __ret; |
| 39520 | __ret; \ | 41116 | } |
| 39521 | }) | | |
| 39522 | #define __noswap_splat_laneq_bf16(__p0, __p1) __extension__ ({ \ | | |
| 39523 | bfloat16x4_t __ret; \ | | |
| 39524 | bfloat16x8_t __s0 = __p0; \ | | |
| 39525 | __ret = (bfloat16x4_t) __builtin_neon_splat_laneq_v((int8x16_t)__s0, __p1, 43); \ | | |
| 39526 | __ret; \ | | |
| 39527 | }) | | |
| 39528 | #endif | 41117 | #endif |
| 39529 | | 41118 | |
| 39530 | #ifdef __LITTLE_ENDIAN__ | 41119 | #ifdef __LITTLE_ENDIAN__ |
| 39531 | __ai float32x4_t vbfdotq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { | 41120 | __ai float32x4_t vrndiq_f32(float32x4_t __p0) { |
| 39532 | float32x4_t __ret; | 41121 | float32x4_t __ret; |
| 39533 | __ret = (float32x4_t) __builtin_neon_vbfdotq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | 41122 | __ret = (float32x4_t) __builtin_neon_vrndiq_v((int8x16_t)__p0, 41); |
| 39534 | return __ret; | 41123 | return __ret; |
| 39535 | } | 41124 | } |
| 39536 | #else | 41125 | #else |
| 39537 | __ai float32x4_t vbfdotq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { | 41126 | __ai float32x4_t vrndiq_f32(float32x4_t __p0) { |
| 39538 | float32x4_t __ret; | 41127 | float32x4_t __ret; |
| 39539 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 41128 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 39540 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 41129 | __ret = (float32x4_t) __builtin_neon_vrndiq_v((int8x16_t)__rev0, 41); |
| 39541 | bfloat16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 39542 | __ret = (float32x4_t) __builtin_neon_vbfdotq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); | | |
| 39543 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 41130 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39544 | return __ret; | 41131 | return __ret; |
| 39545 | } | 41132 | } |
| 39546 | __ai float32x4_t __noswap_vbfdotq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { | | |
| 39547 | float32x4_t __ret; | | |
| 39548 | __ret = (float32x4_t) __builtin_neon_vbfdotq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | | |
| 39549 | return __ret; | | |
| 39550 | } | | |
| 39551 | #endif | 41133 | #endif |
| 39552 | | 41134 | |
| 39553 | #ifdef __LITTLE_ENDIAN__ | 41135 | #ifdef __LITTLE_ENDIAN__ |
| 39554 | __ai float32x2_t vbfdot_f32(float32x2_t __p0, bfloat16x4_t __p1, bfloat16x4_t __p2) { | 41136 | __ai float32x2_t vrndi_f32(float32x2_t __p0) { |
| 39555 | float32x2_t __ret; | 41137 | float32x2_t __ret; |
| 39556 | __ret = (float32x2_t) __builtin_neon_vbfdot_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | 41138 | __ret = (float32x2_t) __builtin_neon_vrndi_v((int8x8_t)__p0, 9); |
| 39557 | return __ret; | 41139 | return __ret; |
| 39558 | } | 41140 | } |
| 39559 | #else | 41141 | #else |
| 39560 | __ai float32x2_t vbfdot_f32(float32x2_t __p0, bfloat16x4_t __p1, bfloat16x4_t __p2) { | 41142 | __ai float32x2_t vrndi_f32(float32x2_t __p0) { |
| 39561 | float32x2_t __ret; | 41143 | float32x2_t __ret; |
| 39562 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 41144 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 39563 | bfloat16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 41145 | __ret = (float32x2_t) __builtin_neon_vrndi_v((int8x8_t)__rev0, 9); |
| 39564 | bfloat16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | | |
| 39565 | __ret = (float32x2_t) __builtin_neon_vbfdot_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); | | |
| 39566 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 41146 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 39567 | return __ret; | 41147 | return __ret; |
| 39568 | } | 41148 | } |
| 39569 | __ai float32x2_t __noswap_vbfdot_f32(float32x2_t __p0, bfloat16x4_t __p1, bfloat16x4_t __p2) { | | |
| 39570 | float32x2_t __ret; | | |
| 39571 | __ret = (float32x2_t) __builtin_neon_vbfdot_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | | |
| 39572 | return __ret; | | |
| 39573 | } | | |
| 39574 | #endif | | |
| 39575 | | | |
| 39576 | #ifdef __LITTLE_ENDIAN__ | | |
| 39577 | #define vbfdotq_lane_f32(__p0_142, __p1_142, __p2_142, __p3_142) __extension__ ({ \ | | |
| 39578 | float32x4_t __ret_142; \ | | |
| 39579 | float32x4_t __s0_142 = __p0_142; \ | | |
| 39580 | bfloat16x8_t __s1_142 = __p1_142; \ | | |
| 39581 | bfloat16x4_t __s2_142 = __p2_142; \ | | |
| 39582 | bfloat16x4_t __reint_142 = __s2_142; \ | | |
| 39583 | float32x4_t __reint1_142 = splatq_lane_f32(*(float32x2_t *) &__reint_142, __p3_142); \ | | |
| 39584 | __ret_142 = vbfdotq_f32(__s0_142, __s1_142, *(bfloat16x8_t *) &__reint1_142); \ | | |
| 39585 | __ret_142; \ | | |
| 39586 | }) | | |
| 39587 | #else | | |
| 39588 | #define vbfdotq_lane_f32(__p0_143, __p1_143, __p2_143, __p3_143) __extension__ ({ \ | | |
| 39589 | float32x4_t __ret_143; \ | | |
| 39590 | float32x4_t __s0_143 = __p0_143; \ | | |
| 39591 | bfloat16x8_t __s1_143 = __p1_143; \ | | |
| 39592 | bfloat16x4_t __s2_143 = __p2_143; \ | | |
| 39593 | float32x4_t __rev0_143; __rev0_143 = __builtin_shufflevector(__s0_143, __s0_143, 3, 2, 1, 0); \ | | |
| 39594 | bfloat16x8_t __rev1_143; __rev1_143 = __builtin_shufflevector(__s1_143, __s1_143, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 39595 | bfloat16x4_t __rev2_143; __rev2_143 = __builtin_shufflevector(__s2_143, __s2_143, 3, 2, 1, 0); \ | | |
| 39596 | bfloat16x4_t __reint_143 = __rev2_143; \ | | |
| 39597 | float32x4_t __reint1_143 = __noswap_splatq_lane_f32(*(float32x2_t *) &__reint_143, __p3_143); \ | | |
| 39598 | __ret_143 = __noswap_vbfdotq_f32(__rev0_143, __rev1_143, *(bfloat16x8_t *) &__reint1_143); \ | | |
| 39599 | __ret_143 = __builtin_shufflevector(__ret_143, __ret_143, 3, 2, 1, 0); \ | | |
| 39600 | __ret_143; \ | | |
| 39601 | }) | | |
| 39602 | #endif | | |
| 39603 | | | |
| 39604 | #ifdef __LITTLE_ENDIAN__ | | |
| 39605 | #define vbfdot_lane_f32(__p0_144, __p1_144, __p2_144, __p3_144) __extension__ ({ \ | | |
| 39606 | float32x2_t __ret_144; \ | | |
| 39607 | float32x2_t __s0_144 = __p0_144; \ | | |
| 39608 | bfloat16x4_t __s1_144 = __p1_144; \ | | |
| 39609 | bfloat16x4_t __s2_144 = __p2_144; \ | | |
| 39610 | bfloat16x4_t __reint_144 = __s2_144; \ | | |
| 39611 | float32x2_t __reint1_144 = splat_lane_f32(*(float32x2_t *) &__reint_144, __p3_144); \ | | |
| 39612 | __ret_144 = vbfdot_f32(__s0_144, __s1_144, *(bfloat16x4_t *) &__reint1_144); \ | | |
| 39613 | __ret_144; \ | | |
| 39614 | }) | | |
| 39615 | #else | | |
| 39616 | #define vbfdot_lane_f32(__p0_145, __p1_145, __p2_145, __p3_145) __extension__ ({ \ | | |
| 39617 | float32x2_t __ret_145; \ | | |
| 39618 | float32x2_t __s0_145 = __p0_145; \ | | |
| 39619 | bfloat16x4_t __s1_145 = __p1_145; \ | | |
| 39620 | bfloat16x4_t __s2_145 = __p2_145; \ | | |
| 39621 | float32x2_t __rev0_145; __rev0_145 = __builtin_shufflevector(__s0_145, __s0_145, 1, 0); \ | | |
| 39622 | bfloat16x4_t __rev1_145; __rev1_145 = __builtin_shufflevector(__s1_145, __s1_145, 3, 2, 1, 0); \ | | |
| 39623 | bfloat16x4_t __rev2_145; __rev2_145 = __builtin_shufflevector(__s2_145, __s2_145, 3, 2, 1, 0); \ | | |
| 39624 | bfloat16x4_t __reint_145 = __rev2_145; \ | | |
| 39625 | float32x2_t __reint1_145 = __noswap_splat_lane_f32(*(float32x2_t *) &__reint_145, __p3_145); \ | | |
| 39626 | __ret_145 = __noswap_vbfdot_f32(__rev0_145, __rev1_145, *(bfloat16x4_t *) &__reint1_145); \ | | |
| 39627 | __ret_145 = __builtin_shufflevector(__ret_145, __ret_145, 1, 0); \ | | |
| 39628 | __ret_145; \ | | |
| 39629 | }) | | |
| 39630 | #endif | | |
| 39631 | | | |
| 39632 | #ifdef __LITTLE_ENDIAN__ | | |
| 39633 | #define vbfdotq_laneq_f32(__p0_146, __p1_146, __p2_146, __p3_146) __extension__ ({ \ | | |
| 39634 | float32x4_t __ret_146; \ | | |
| 39635 | float32x4_t __s0_146 = __p0_146; \ | | |
| 39636 | bfloat16x8_t __s1_146 = __p1_146; \ | | |
| 39637 | bfloat16x8_t __s2_146 = __p2_146; \ | | |
| 39638 | bfloat16x8_t __reint_146 = __s2_146; \ | | |
| 39639 | float32x4_t __reint1_146 = splatq_laneq_f32(*(float32x4_t *) &__reint_146, __p3_146); \ | | |
| 39640 | __ret_146 = vbfdotq_f32(__s0_146, __s1_146, *(bfloat16x8_t *) &__reint1_146); \ | | |
| 39641 | __ret_146; \ | | |
| 39642 | }) | | |
| 39643 | #else | | |
| 39644 | #define vbfdotq_laneq_f32(__p0_147, __p1_147, __p2_147, __p3_147) __extension__ ({ \ | | |
| 39645 | float32x4_t __ret_147; \ | | |
| 39646 | float32x4_t __s0_147 = __p0_147; \ | | |
| 39647 | bfloat16x8_t __s1_147 = __p1_147; \ | | |
| 39648 | bfloat16x8_t __s2_147 = __p2_147; \ | | |
| 39649 | float32x4_t __rev0_147; __rev0_147 = __builtin_shufflevector(__s0_147, __s0_147, 3, 2, 1, 0); \ | | |
| 39650 | bfloat16x8_t __rev1_147; __rev1_147 = __builtin_shufflevector(__s1_147, __s1_147, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 39651 | bfloat16x8_t __rev2_147; __rev2_147 = __builtin_shufflevector(__s2_147, __s2_147, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 39652 | bfloat16x8_t __reint_147 = __rev2_147; \ | | |
| 39653 | float32x4_t __reint1_147 = __noswap_splatq_laneq_f32(*(float32x4_t *) &__reint_147, __p3_147); \ | | |
| 39654 | __ret_147 = __noswap_vbfdotq_f32(__rev0_147, __rev1_147, *(bfloat16x8_t *) &__reint1_147); \ | | |
| 39655 | __ret_147 = __builtin_shufflevector(__ret_147, __ret_147, 3, 2, 1, 0); \ | | |
| 39656 | __ret_147; \ | | |
| 39657 | }) | | |
| 39658 | #endif | | |
| 39659 | | | |
| 39660 | #ifdef __LITTLE_ENDIAN__ | | |
| 39661 | #define vbfdot_laneq_f32(__p0_148, __p1_148, __p2_148, __p3_148) __extension__ ({ \ | | |
| 39662 | float32x2_t __ret_148; \ | | |
| 39663 | float32x2_t __s0_148 = __p0_148; \ | | |
| 39664 | bfloat16x4_t __s1_148 = __p1_148; \ | | |
| 39665 | bfloat16x8_t __s2_148 = __p2_148; \ | | |
| 39666 | bfloat16x8_t __reint_148 = __s2_148; \ | | |
| 39667 | float32x2_t __reint1_148 = splat_laneq_f32(*(float32x4_t *) &__reint_148, __p3_148); \ | | |
| 39668 | __ret_148 = vbfdot_f32(__s0_148, __s1_148, *(bfloat16x4_t *) &__reint1_148); \ | | |
| 39669 | __ret_148; \ | | |
| 39670 | }) | | |
| 39671 | #else | | |
| 39672 | #define vbfdot_laneq_f32(__p0_149, __p1_149, __p2_149, __p3_149) __extension__ ({ \ | | |
| 39673 | float32x2_t __ret_149; \ | | |
| 39674 | float32x2_t __s0_149 = __p0_149; \ | | |
| 39675 | bfloat16x4_t __s1_149 = __p1_149; \ | | |
| 39676 | bfloat16x8_t __s2_149 = __p2_149; \ | | |
| 39677 | float32x2_t __rev0_149; __rev0_149 = __builtin_shufflevector(__s0_149, __s0_149, 1, 0); \ | | |
| 39678 | bfloat16x4_t __rev1_149; __rev1_149 = __builtin_shufflevector(__s1_149, __s1_149, 3, 2, 1, 0); \ | | |
| 39679 | bfloat16x8_t __rev2_149; __rev2_149 = __builtin_shufflevector(__s2_149, __s2_149, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 39680 | bfloat16x8_t __reint_149 = __rev2_149; \ | | |
| 39681 | float32x2_t __reint1_149 = __noswap_splat_laneq_f32(*(float32x4_t *) &__reint_149, __p3_149); \ | | |
| 39682 | __ret_149 = __noswap_vbfdot_f32(__rev0_149, __rev1_149, *(bfloat16x4_t *) &__reint1_149); \ | | |
| 39683 | __ret_149 = __builtin_shufflevector(__ret_149, __ret_149, 1, 0); \ | | |
| 39684 | __ret_149; \ | | |
| 39685 | }) | | |
| 39686 | #endif | 41149 | #endif |
| 39687 | | 41150 | |
| 39688 | #ifdef __LITTLE_ENDIAN__ | 41151 | #ifdef __LITTLE_ENDIAN__ |
| 39689 | __ai float32x4_t vbfmlalbq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { | 41152 | __ai float32x4_t vrndmq_f32(float32x4_t __p0) { |
| 39690 | float32x4_t __ret; | 41153 | float32x4_t __ret; |
| 39691 | __ret = (float32x4_t) __builtin_neon_vbfmlalbq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | 41154 | __ret = (float32x4_t) __builtin_neon_vrndmq_v((int8x16_t)__p0, 41); |
| 39692 | return __ret; | 41155 | return __ret; |
| 39693 | } | 41156 | } |
| 39694 | #else | 41157 | #else |
| 39695 | __ai float32x4_t vbfmlalbq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { | 41158 | __ai float32x4_t vrndmq_f32(float32x4_t __p0) { |
| 39696 | float32x4_t __ret; | 41159 | float32x4_t __ret; |
| 39697 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 41160 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 39698 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 41161 | __ret = (float32x4_t) __builtin_neon_vrndmq_v((int8x16_t)__rev0, 41); |
| 39699 | bfloat16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 39700 | __ret = (float32x4_t) __builtin_neon_vbfmlalbq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); | | |
| 39701 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 41162 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39702 | return __ret; | 41163 | return __ret; |
| 39703 | } | 41164 | } |
| 39704 | __ai float32x4_t __noswap_vbfmlalbq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { | | |
| 39705 | float32x4_t __ret; | | |
| 39706 | __ret = (float32x4_t) __builtin_neon_vbfmlalbq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | | |
| 39707 | return __ret; | | |
| 39708 | } | | |
| 39709 | #endif | 41165 | #endif |
| 39710 | | 41166 | |
| 39711 | #ifdef __LITTLE_ENDIAN__ | 41167 | #ifdef __LITTLE_ENDIAN__ |
| 39712 | __ai float32x4_t vbfmlaltq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { | 41168 | __ai float32x2_t vrndm_f32(float32x2_t __p0) { |
| 39713 | float32x4_t __ret; | 41169 | float32x2_t __ret; |
| 39714 | __ret = (float32x4_t) __builtin_neon_vbfmlaltq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | 41170 | __ret = (float32x2_t) __builtin_neon_vrndm_v((int8x8_t)__p0, 9); |
| 39715 | return __ret; | 41171 | return __ret; |
| 39716 | } | 41172 | } |
| 39717 | #else | 41173 | #else |
| 39718 | __ai float32x4_t vbfmlaltq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { | 41174 | __ai float32x2_t vrndm_f32(float32x2_t __p0) { |
| 39719 | float32x4_t __ret; | 41175 | float32x2_t __ret; |
| 39720 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 41176 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 39721 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 41177 | __ret = (float32x2_t) __builtin_neon_vrndm_v((int8x8_t)__rev0, 9); |
| 39722 | bfloat16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 41178 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 39723 | __ret = (float32x4_t) __builtin_neon_vbfmlaltq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); | | |
| 39724 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 39725 | return __ret; | | |
| 39726 | } | | |
| 39727 | __ai float32x4_t __noswap_vbfmlaltq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { | | |
| 39728 | float32x4_t __ret; | | |
| 39729 | __ret = (float32x4_t) __builtin_neon_vbfmlaltq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | | |
| 39730 | return __ret; | 41179 | return __ret; |
| 39731 | } | 41180 | } |
| 39732 | #endif | 41181 | #endif |
| 39733 | | 41182 | |
| 39734 | #ifdef __LITTLE_ENDIAN__ | 41183 | #ifdef __LITTLE_ENDIAN__ |
| 39735 | __ai float32x4_t vbfmmlaq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { | 41184 | __ai float32x4_t vrndnq_f32(float32x4_t __p0) { |
| 39736 | float32x4_t __ret; | 41185 | float32x4_t __ret; |
| 39737 | __ret = (float32x4_t) __builtin_neon_vbfmmlaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | 41186 | __ret = (float32x4_t) __builtin_neon_vrndnq_v((int8x16_t)__p0, 41); |
| 39738 | return __ret; | 41187 | return __ret; |
| 39739 | } | 41188 | } |
| 39740 | #else | 41189 | #else |
| 39741 | __ai float32x4_t vbfmmlaq_f32(float32x4_t __p0, bfloat16x8_t __p1, bfloat16x8_t __p2) { | 41190 | __ai float32x4_t vrndnq_f32(float32x4_t __p0) { |
| 39742 | float32x4_t __ret; | 41191 | float32x4_t __ret; |
| 39743 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 41192 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 39744 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 41193 | __ret = (float32x4_t) __builtin_neon_vrndnq_v((int8x16_t)__rev0, 41); |
| 39745 | bfloat16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 39746 | __ret = (float32x4_t) __builtin_neon_vbfmmlaq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); | | |
| 39747 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 41194 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39748 | return __ret; | 41195 | return __ret; |
| 39749 | } | 41196 | } |
| 39750 | #endif | 41197 | #endif |
| 39751 | | 41198 | |
| 39752 | #ifdef __LITTLE_ENDIAN__ | 41199 | #ifdef __LITTLE_ENDIAN__ |
| 39753 | __ai bfloat16x8_t vcombine_bf16(bfloat16x4_t __p0, bfloat16x4_t __p1) { | 41200 | __ai float32x2_t vrndn_f32(float32x2_t __p0) { |
| 39754 | bfloat16x8_t __ret; | 41201 | float32x2_t __ret; |
| 39755 | __ret = __builtin_shufflevector(__p0, __p1, 0, 1, 2, 3, 4, 5, 6, 7); | 41202 | __ret = (float32x2_t) __builtin_neon_vrndn_v((int8x8_t)__p0, 9); |
| 39756 | return __ret; | 41203 | return __ret; |
| 39757 | } | 41204 | } |
| 39758 | #else | 41205 | #else |
| 39759 | __ai bfloat16x8_t vcombine_bf16(bfloat16x4_t __p0, bfloat16x4_t __p1) { | 41206 | __ai float32x2_t vrndn_f32(float32x2_t __p0) { |
| 39760 | bfloat16x8_t __ret; | 41207 | float32x2_t __ret; |
| 39761 | bfloat16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 41208 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 39762 | bfloat16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 41209 | __ret = (float32x2_t) __builtin_neon_vrndn_v((int8x8_t)__rev0, 9); |
| 39763 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 1, 2, 3, 4, 5, 6, 7); | 41210 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 39764 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 39765 | return __ret; | | |
| 39766 | } | | |
| 39767 | __ai bfloat16x8_t __noswap_vcombine_bf16(bfloat16x4_t __p0, bfloat16x4_t __p1) { | | |
| 39768 | bfloat16x8_t __ret; | | |
| 39769 | __ret = __builtin_shufflevector(__p0, __p1, 0, 1, 2, 3, 4, 5, 6, 7); | | |
| 39770 | return __ret; | 41211 | return __ret; |
| 39771 | } | 41212 | } |
| 39772 | #endif | 41213 | #endif |
| 39773 | | 41214 | |
| 39774 | #define vcreate_bf16(__p0) __extension__ ({ \ | 41215 | __ai float32_t vrndns_f32(float32_t __p0) { |
| 39775 | bfloat16x4_t __ret; \ | | |
| 39776 | uint64_t __promote = __p0; \ | | |
| 39777 | __ret = (bfloat16x4_t)(__promote); \ | | |
| 39778 | __ret; \ | | |
| 39779 | }) | | |
| 39780 | #ifdef __LITTLE_ENDIAN__ | | |
| 39781 | __ai float32x4_t vcvt_f32_bf16(bfloat16x4_t __p0_150) { | | |
| 39782 | float32x4_t __ret_150; | | |
| 39783 | bfloat16x4_t __reint_150 = __p0_150; | | |
| 39784 | int32x4_t __reint1_150 = vshll_n_s16(*(int16x4_t *) &__reint_150, 16); | | |
| 39785 | __ret_150 = *(float32x4_t *) &__reint1_150; | | |
| 39786 | return __ret_150; | | |
| 39787 | } | | |
| 39788 | #else | | |
| 39789 | __ai float32x4_t vcvt_f32_bf16(bfloat16x4_t __p0_151) { | | |
| 39790 | float32x4_t __ret_151; | | |
| 39791 | bfloat16x4_t __rev0_151; __rev0_151 = __builtin_shufflevector(__p0_151, __p0_151, 3, 2, 1, 0); | | |
| 39792 | bfloat16x4_t __reint_151 = __rev0_151; | | |
| 39793 | int32x4_t __reint1_151 = __noswap_vshll_n_s16(*(int16x4_t *) &__reint_151, 16); | | |
| 39794 | __ret_151 = *(float32x4_t *) &__reint1_151; | | |
| 39795 | __ret_151 = __builtin_shufflevector(__ret_151, __ret_151, 3, 2, 1, 0); | | |
| 39796 | return __ret_151; | | |
| 39797 | } | | |
| 39798 | __ai float32x4_t __noswap_vcvt_f32_bf16(bfloat16x4_t __p0_152) { | | |
| 39799 | float32x4_t __ret_152; | | |
| 39800 | bfloat16x4_t __reint_152 = __p0_152; | | |
| 39801 | int32x4_t __reint1_152 = __noswap_vshll_n_s16(*(int16x4_t *) &__reint_152, 16); | | |
| 39802 | __ret_152 = *(float32x4_t *) &__reint1_152; | | |
| 39803 | return __ret_152; | | |
| 39804 | } | | |
| 39805 | #endif | | |
| 39806 | | | |
| 39807 | __ai float32_t vcvtah_f32_bf16(bfloat16_t __p0) { | | |
| 39808 | float32_t __ret; | 41216 | float32_t __ret; |
| 39809 | bfloat16_t __reint = __p0; | 41217 | __ret = (float32_t) __builtin_neon_vrndns_f32(__p0); |
| 39810 | int32_t __reint1 = *(int32_t *) &__reint << 16; | | |
| 39811 | __ret = *(float32_t *) &__reint1; | | |
| 39812 | return __ret; | 41218 | return __ret; |
| 39813 | } | 41219 | } |
| 39814 | __ai bfloat16_t vcvth_bf16_f32(float32_t __p0) { | 41220 | #ifdef __LITTLE_ENDIAN__ |
| 39815 | bfloat16_t __ret; | 41221 | __ai float32x4_t vrndpq_f32(float32x4_t __p0) { |
| 39816 | __ret = (bfloat16_t) __builtin_neon_vcvth_bf16_f32(__p0); | 41222 | float32x4_t __ret; |
| | 41223 | __ret = (float32x4_t) __builtin_neon_vrndpq_v((int8x16_t)__p0, 41); |
| 39817 | return __ret; | 41224 | return __ret; |
| 39818 | } | 41225 | } |
| 39819 | #ifdef __LITTLE_ENDIAN__ | | |
| 39820 | #define vduph_lane_bf16(__p0, __p1) __extension__ ({ \ | | |
| 39821 | bfloat16_t __ret; \ | | |
| 39822 | bfloat16x4_t __s0 = __p0; \ | | |
| 39823 | __ret = (bfloat16_t) __builtin_neon_vduph_lane_bf16((bfloat16x4_t)__s0, __p1); \ | | |
| 39824 | __ret; \ | | |
| 39825 | }) | | |
| 39826 | #else | | |
| 39827 | #define vduph_lane_bf16(__p0, __p1) __extension__ ({ \ | | |
| 39828 | bfloat16_t __ret; \ | | |
| 39829 | bfloat16x4_t __s0 = __p0; \ | | |
| 39830 | bfloat16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | | |
| 39831 | __ret = (bfloat16_t) __builtin_neon_vduph_lane_bf16((bfloat16x4_t)__rev0, __p1); \ | | |
| 39832 | __ret; \ | | |
| 39833 | }) | | |
| 39834 | #endif | | |
| 39835 | | | |
| 39836 | #ifdef __LITTLE_ENDIAN__ | | |
| 39837 | #define vdupq_lane_bf16(__p0_153, __p1_153) __extension__ ({ \ | | |
| 39838 | bfloat16x8_t __ret_153; \ | | |
| 39839 | bfloat16x4_t __s0_153 = __p0_153; \ | | |
| 39840 | __ret_153 = splatq_lane_bf16(__s0_153, __p1_153); \ | | |
| 39841 | __ret_153; \ | | |
| 39842 | }) | | |
| 39843 | #else | | |
| 39844 | #define vdupq_lane_bf16(__p0_154, __p1_154) __extension__ ({ \ | | |
| 39845 | bfloat16x8_t __ret_154; \ | | |
| 39846 | bfloat16x4_t __s0_154 = __p0_154; \ | | |
| 39847 | bfloat16x4_t __rev0_154; __rev0_154 = __builtin_shufflevector(__s0_154, __s0_154, 3, 2, 1, 0); \ | | |
| 39848 | __ret_154 = __noswap_splatq_lane_bf16(__rev0_154, __p1_154); \ | | |
| 39849 | __ret_154 = __builtin_shufflevector(__ret_154, __ret_154, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 39850 | __ret_154; \ | | |
| 39851 | }) | | |
| 39852 | #endif | | |
| 39853 | | | |
| 39854 | #ifdef __LITTLE_ENDIAN__ | | |
| 39855 | #define vdup_lane_bf16(__p0_155, __p1_155) __extension__ ({ \ | | |
| 39856 | bfloat16x4_t __ret_155; \ | | |
| 39857 | bfloat16x4_t __s0_155 = __p0_155; \ | | |
| 39858 | __ret_155 = splat_lane_bf16(__s0_155, __p1_155); \ | | |
| 39859 | __ret_155; \ | | |
| 39860 | }) | | |
| 39861 | #else | 41226 | #else |
| 39862 | #define vdup_lane_bf16(__p0_156, __p1_156) __extension__ ({ \ | 41227 | __ai float32x4_t vrndpq_f32(float32x4_t __p0) { |
| 39863 | bfloat16x4_t __ret_156; \ | 41228 | float32x4_t __ret; |
| 39864 | bfloat16x4_t __s0_156 = __p0_156; \ | 41229 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 39865 | bfloat16x4_t __rev0_156; __rev0_156 = __builtin_shufflevector(__s0_156, __s0_156, 3, 2, 1, 0); \ | 41230 | __ret = (float32x4_t) __builtin_neon_vrndpq_v((int8x16_t)__rev0, 41); |
| 39866 | __ret_156 = __noswap_splat_lane_bf16(__rev0_156, __p1_156); \ | 41231 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39867 | __ret_156 = __builtin_shufflevector(__ret_156, __ret_156, 3, 2, 1, 0); \ | 41232 | return __ret; |
| 39868 | __ret_156; \ | 41233 | } |
| 39869 | }) | | |
| 39870 | #endif | 41234 | #endif |
| 39871 | | 41235 | |
| 39872 | #ifdef __LITTLE_ENDIAN__ | 41236 | #ifdef __LITTLE_ENDIAN__ |
| 39873 | #define vduph_laneq_bf16(__p0, __p1) __extension__ ({ \ | 41237 | __ai float32x2_t vrndp_f32(float32x2_t __p0) { |
| 39874 | bfloat16_t __ret; \ | 41238 | float32x2_t __ret; |
| 39875 | bfloat16x8_t __s0 = __p0; \ | 41239 | __ret = (float32x2_t) __builtin_neon_vrndp_v((int8x8_t)__p0, 9); |
| 39876 | __ret = (bfloat16_t) __builtin_neon_vduph_laneq_bf16((bfloat16x8_t)__s0, __p1); \ | 41240 | return __ret; |
| 39877 | __ret; \ | 41241 | } |
| 39878 | }) | | |
| 39879 | #else | 41242 | #else |
| 39880 | #define vduph_laneq_bf16(__p0, __p1) __extension__ ({ \ | 41243 | __ai float32x2_t vrndp_f32(float32x2_t __p0) { |
| 39881 | bfloat16_t __ret; \ | 41244 | float32x2_t __ret; |
| 39882 | bfloat16x8_t __s0 = __p0; \ | 41245 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 39883 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 41246 | __ret = (float32x2_t) __builtin_neon_vrndp_v((int8x8_t)__rev0, 9); |
| 39884 | __ret = (bfloat16_t) __builtin_neon_vduph_laneq_bf16((bfloat16x8_t)__rev0, __p1); \ | 41247 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 39885 | __ret; \ | 41248 | return __ret; |
| 39886 | }) | 41249 | } |
| 39887 | #endif | 41250 | #endif |
| 39888 | | 41251 | |
| 39889 | #ifdef __LITTLE_ENDIAN__ | 41252 | #ifdef __LITTLE_ENDIAN__ |
| 39890 | #define vdupq_laneq_bf16(__p0_157, __p1_157) __extension__ ({ \ | 41253 | __ai float32x4_t vrndxq_f32(float32x4_t __p0) { |
| 39891 | bfloat16x8_t __ret_157; \ | 41254 | float32x4_t __ret; |
| 39892 | bfloat16x8_t __s0_157 = __p0_157; \ | 41255 | __ret = (float32x4_t) __builtin_neon_vrndxq_v((int8x16_t)__p0, 41); |
| 39893 | __ret_157 = splatq_laneq_bf16(__s0_157, __p1_157); \ | 41256 | return __ret; |
| 39894 | __ret_157; \ | 41257 | } |
| 39895 | }) | | |
| 39896 | #else | 41258 | #else |
| 39897 | #define vdupq_laneq_bf16(__p0_158, __p1_158) __extension__ ({ \ | 41259 | __ai float32x4_t vrndxq_f32(float32x4_t __p0) { |
| 39898 | bfloat16x8_t __ret_158; \ | 41260 | float32x4_t __ret; |
| 39899 | bfloat16x8_t __s0_158 = __p0_158; \ | 41261 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 39900 | bfloat16x8_t __rev0_158; __rev0_158 = __builtin_shufflevector(__s0_158, __s0_158, 7, 6, 5, 4, 3, 2, 1, 0); \ | 41262 | __ret = (float32x4_t) __builtin_neon_vrndxq_v((int8x16_t)__rev0, 41); |
| 39901 | __ret_158 = __noswap_splatq_laneq_bf16(__rev0_158, __p1_158); \ | 41263 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39902 | __ret_158 = __builtin_shufflevector(__ret_158, __ret_158, 7, 6, 5, 4, 3, 2, 1, 0); \ | 41264 | return __ret; |
| 39903 | __ret_158; \ | 41265 | } |
| 39904 | }) | | |
| 39905 | #endif | 41266 | #endif |
| 39906 | | 41267 | |
| 39907 | #ifdef __LITTLE_ENDIAN__ | 41268 | #ifdef __LITTLE_ENDIAN__ |
| 39908 | #define vdup_laneq_bf16(__p0_159, __p1_159) __extension__ ({ \ | 41269 | __ai float32x2_t vrndx_f32(float32x2_t __p0) { |
| 39909 | bfloat16x4_t __ret_159; \ | 41270 | float32x2_t __ret; |
| 39910 | bfloat16x8_t __s0_159 = __p0_159; \ | 41271 | __ret = (float32x2_t) __builtin_neon_vrndx_v((int8x8_t)__p0, 9); |
| 39911 | __ret_159 = splat_laneq_bf16(__s0_159, __p1_159); \ | 41272 | return __ret; |
| 39912 | __ret_159; \ | 41273 | } |
| 39913 | }) | | |
| 39914 | #else | 41274 | #else |
| 39915 | #define vdup_laneq_bf16(__p0_160, __p1_160) __extension__ ({ \ | 41275 | __ai float32x2_t vrndx_f32(float32x2_t __p0) { |
| 39916 | bfloat16x4_t __ret_160; \ | 41276 | float32x2_t __ret; |
| 39917 | bfloat16x8_t __s0_160 = __p0_160; \ | 41277 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 39918 | bfloat16x8_t __rev0_160; __rev0_160 = __builtin_shufflevector(__s0_160, __s0_160, 7, 6, 5, 4, 3, 2, 1, 0); \ | 41278 | __ret = (float32x2_t) __builtin_neon_vrndx_v((int8x8_t)__rev0, 9); |
| 39919 | __ret_160 = __noswap_splat_laneq_bf16(__rev0_160, __p1_160); \ | 41279 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 39920 | __ret_160 = __builtin_shufflevector(__ret_160, __ret_160, 3, 2, 1, 0); \ | 41280 | return __ret; |
| 39921 | __ret_160; \ | 41281 | } |
| 39922 | }) | | |
| 39923 | #endif | 41282 | #endif |
| 39924 | | 41283 | |
| 39925 | #ifdef __LITTLE_ENDIAN__ | 41284 | #ifdef __LITTLE_ENDIAN__ |
| 39926 | __ai bfloat16x8_t vdupq_n_bf16(bfloat16_t __p0) { | 41285 | __ai __attribute__((target("fullfp16"))) float16x8_t vrndq_f16(float16x8_t __p0) { |
| 39927 | bfloat16x8_t __ret; | 41286 | float16x8_t __ret; |
| 39928 | __ret = (bfloat16x8_t) {__p0, __p0, __p0, __p0, __p0, __p0, __p0, __p0}; | 41287 | __ret = (float16x8_t) __builtin_neon_vrndq_f16((int8x16_t)__p0, 40); |
| 39929 | return __ret; | 41288 | return __ret; |
| 39930 | } | 41289 | } |
| 39931 | #else | 41290 | #else |
| 39932 | __ai bfloat16x8_t vdupq_n_bf16(bfloat16_t __p0) { | 41291 | __ai __attribute__((target("fullfp16"))) float16x8_t vrndq_f16(float16x8_t __p0) { |
| 39933 | bfloat16x8_t __ret; | 41292 | float16x8_t __ret; |
| 39934 | __ret = (bfloat16x8_t) {__p0, __p0, __p0, __p0, __p0, __p0, __p0, __p0}; | 41293 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 41294 | __ret = (float16x8_t) __builtin_neon_vrndq_f16((int8x16_t)__rev0, 40); |
| 39935 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 41295 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 39936 | return __ret; | 41296 | return __ret; |
| 39937 | } | 41297 | } |
| 39938 | #endif | 41298 | #endif |
| 39939 | | 41299 | |
| 39940 | #ifdef __LITTLE_ENDIAN__ | 41300 | #ifdef __LITTLE_ENDIAN__ |
| 39941 | __ai bfloat16x4_t vdup_n_bf16(bfloat16_t __p0) { | 41301 | __ai __attribute__((target("fullfp16"))) float16x4_t vrnd_f16(float16x4_t __p0) { |
| 39942 | bfloat16x4_t __ret; | 41302 | float16x4_t __ret; |
| 39943 | __ret = (bfloat16x4_t) {__p0, __p0, __p0, __p0}; | 41303 | __ret = (float16x4_t) __builtin_neon_vrnd_f16((int8x8_t)__p0, 8); |
| 39944 | return __ret; | 41304 | return __ret; |
| 39945 | } | 41305 | } |
| 39946 | #else | 41306 | #else |
| 39947 | __ai bfloat16x4_t vdup_n_bf16(bfloat16_t __p0) { | 41307 | __ai __attribute__((target("fullfp16"))) float16x4_t vrnd_f16(float16x4_t __p0) { |
| 39948 | bfloat16x4_t __ret; | 41308 | float16x4_t __ret; |
| 39949 | __ret = (bfloat16x4_t) {__p0, __p0, __p0, __p0}; | 41309 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 41310 | __ret = (float16x4_t) __builtin_neon_vrnd_f16((int8x8_t)__rev0, 8); |
| 39950 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 41311 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 39951 | return __ret; | 41312 | return __ret; |
| 39952 | } | 41313 | } |
| 39953 | #endif | 41314 | #endif |
| 39954 | | 41315 | |
| 39955 | #ifdef __LITTLE_ENDIAN__ | 41316 | #ifdef __LITTLE_ENDIAN__ |
| 39956 | __ai bfloat16x4_t vget_high_bf16(bfloat16x8_t __p0) { | 41317 | __ai __attribute__((target("fullfp16"))) float16x8_t vrndaq_f16(float16x8_t __p0) { |
| 39957 | bfloat16x4_t __ret; | 41318 | float16x8_t __ret; |
| 39958 | __ret = __builtin_shufflevector(__p0, __p0, 4, 5, 6, 7); | 41319 | __ret = (float16x8_t) __builtin_neon_vrndaq_f16((int8x16_t)__p0, 40); |
| 39959 | return __ret; | 41320 | return __ret; |
| 39960 | } | 41321 | } |
| 39961 | #else | 41322 | #else |
| 39962 | __ai bfloat16x4_t vget_high_bf16(bfloat16x8_t __p0) { | 41323 | __ai __attribute__((target("fullfp16"))) float16x8_t vrndaq_f16(float16x8_t __p0) { |
| 39963 | bfloat16x4_t __ret; | 41324 | float16x8_t __ret; |
| 39964 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 41325 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 39965 | __ret = __builtin_shufflevector(__rev0, __rev0, 4, 5, 6, 7); | 41326 | __ret = (float16x8_t) __builtin_neon_vrndaq_f16((int8x16_t)__rev0, 40); |
| 39966 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 41327 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 39967 | return __ret; | | |
| 39968 | } | | |
| 39969 | __ai bfloat16x4_t __noswap_vget_high_bf16(bfloat16x8_t __p0) { | | |
| 39970 | bfloat16x4_t __ret; | | |
| 39971 | __ret = __builtin_shufflevector(__p0, __p0, 4, 5, 6, 7); | | |
| 39972 | return __ret; | 41328 | return __ret; |
| 39973 | } | 41329 | } |
| 39974 | #endif | 41330 | #endif |
| 39975 | | 41331 | |
| 39976 | #ifdef __LITTLE_ENDIAN__ | 41332 | #ifdef __LITTLE_ENDIAN__ |
| 39977 | #define vgetq_lane_bf16(__p0, __p1) __extension__ ({ \ | 41333 | __ai __attribute__((target("fullfp16"))) float16x4_t vrnda_f16(float16x4_t __p0) { |
| 39978 | bfloat16_t __ret; \ | 41334 | float16x4_t __ret; |
| 39979 | bfloat16x8_t __s0 = __p0; \ | 41335 | __ret = (float16x4_t) __builtin_neon_vrnda_f16((int8x8_t)__p0, 8); |
| 39980 | __ret = (bfloat16_t) __builtin_neon_vgetq_lane_bf16((bfloat16x8_t)__s0, __p1); \ | | |
| 39981 | __ret; \ | | |
| 39982 | }) | | |
| 39983 | #else | | |
| 39984 | #define vgetq_lane_bf16(__p0, __p1) __extension__ ({ \ | | |
| 39985 | bfloat16_t __ret; \ | | |
| 39986 | bfloat16x8_t __s0 = __p0; \ | | |
| 39987 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 39988 | __ret = (bfloat16_t) __builtin_neon_vgetq_lane_bf16((bfloat16x8_t)__rev0, __p1); \ | | |
| 39989 | __ret; \ | | |
| 39990 | }) | | |
| 39991 | #define __noswap_vgetq_lane_bf16(__p0, __p1) __extension__ ({ \ | | |
| 39992 | bfloat16_t __ret; \ | | |
| 39993 | bfloat16x8_t __s0 = __p0; \ | | |
| 39994 | __ret = (bfloat16_t) __builtin_neon_vgetq_lane_bf16((bfloat16x8_t)__s0, __p1); \ | | |
| 39995 | __ret; \ | | |
| 39996 | }) | | |
| 39997 | #endif | | |
| 39998 | | | |
| 39999 | #ifdef __LITTLE_ENDIAN__ | | |
| 40000 | #define vget_lane_bf16(__p0, __p1) __extension__ ({ \ | | |
| 40001 | bfloat16_t __ret; \ | | |
| 40002 | bfloat16x4_t __s0 = __p0; \ | | |
| 40003 | __ret = (bfloat16_t) __builtin_neon_vget_lane_bf16((bfloat16x4_t)__s0, __p1); \ | | |
| 40004 | __ret; \ | | |
| 40005 | }) | | |
| 40006 | #else | | |
| 40007 | #define vget_lane_bf16(__p0, __p1) __extension__ ({ \ | | |
| 40008 | bfloat16_t __ret; \ | | |
| 40009 | bfloat16x4_t __s0 = __p0; \ | | |
| 40010 | bfloat16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | | |
| 40011 | __ret = (bfloat16_t) __builtin_neon_vget_lane_bf16((bfloat16x4_t)__rev0, __p1); \ | | |
| 40012 | __ret; \ | | |
| 40013 | }) | | |
| 40014 | #define __noswap_vget_lane_bf16(__p0, __p1) __extension__ ({ \ | | |
| 40015 | bfloat16_t __ret; \ | | |
| 40016 | bfloat16x4_t __s0 = __p0; \ | | |
| 40017 | __ret = (bfloat16_t) __builtin_neon_vget_lane_bf16((bfloat16x4_t)__s0, __p1); \ | | |
| 40018 | __ret; \ | | |
| 40019 | }) | | |
| 40020 | #endif | | |
| 40021 | | | |
| 40022 | #ifdef __LITTLE_ENDIAN__ | | |
| 40023 | __ai bfloat16x4_t vget_low_bf16(bfloat16x8_t __p0) { | | |
| 40024 | bfloat16x4_t __ret; | | |
| 40025 | __ret = __builtin_shufflevector(__p0, __p0, 0, 1, 2, 3); | | |
| 40026 | return __ret; | 41336 | return __ret; |
| 40027 | } | 41337 | } |
| 40028 | #else | 41338 | #else |
| 40029 | __ai bfloat16x4_t vget_low_bf16(bfloat16x8_t __p0) { | 41339 | __ai __attribute__((target("fullfp16"))) float16x4_t vrnda_f16(float16x4_t __p0) { |
| 40030 | bfloat16x4_t __ret; | 41340 | float16x4_t __ret; |
| 40031 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 41341 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40032 | __ret = __builtin_shufflevector(__rev0, __rev0, 0, 1, 2, 3); | 41342 | __ret = (float16x4_t) __builtin_neon_vrnda_f16((int8x8_t)__rev0, 8); |
| 40033 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 41343 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40034 | return __ret; | 41344 | return __ret; |
| 40035 | } | 41345 | } |
| 40036 | __ai bfloat16x4_t __noswap_vget_low_bf16(bfloat16x8_t __p0) { | | |
| 40037 | bfloat16x4_t __ret; | | |
| 40038 | __ret = __builtin_shufflevector(__p0, __p0, 0, 1, 2, 3); | | |
| 40039 | return __ret; | | |
| 40040 | } | | |
| 40041 | #endif | | |
| 40042 | | | |
| 40043 | #ifdef __LITTLE_ENDIAN__ | | |
| 40044 | #define vld1q_bf16(__p0) __extension__ ({ \ | | |
| 40045 | bfloat16x8_t __ret; \ | | |
| 40046 | __ret = (bfloat16x8_t) __builtin_neon_vld1q_v(__p0, 43); \ | | |
| 40047 | __ret; \ | | |
| 40048 | }) | | |
| 40049 | #else | | |
| 40050 | #define vld1q_bf16(__p0) __extension__ ({ \ | | |
| 40051 | bfloat16x8_t __ret; \ | | |
| 40052 | __ret = (bfloat16x8_t) __builtin_neon_vld1q_v(__p0, 43); \ | | |
| 40053 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 40054 | __ret; \ | | |
| 40055 | }) | | |
| 40056 | #endif | 41346 | #endif |
| 40057 | | 41347 | |
| 40058 | #ifdef __LITTLE_ENDIAN__ | 41348 | #ifdef __LITTLE_ENDIAN__ |
| 40059 | #define vld1_bf16(__p0) __extension__ ({ \ | 41349 | __ai __attribute__((target("fullfp16"))) float16x8_t vrndmq_f16(float16x8_t __p0) { |
| 40060 | bfloat16x4_t __ret; \ | 41350 | float16x8_t __ret; |
| 40061 | __ret = (bfloat16x4_t) __builtin_neon_vld1_v(__p0, 11); \ | 41351 | __ret = (float16x8_t) __builtin_neon_vrndmq_f16((int8x16_t)__p0, 40); |
| 40062 | __ret; \ | 41352 | return __ret; |
| 40063 | }) | 41353 | } |
| 40064 | #else | | |
| 40065 | #define vld1_bf16(__p0) __extension__ ({ \ | | |
| 40066 | bfloat16x4_t __ret; \ | | |
| 40067 | __ret = (bfloat16x4_t) __builtin_neon_vld1_v(__p0, 11); \ | | |
| 40068 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | | |
| 40069 | __ret; \ | | |
| 40070 | }) | | |
| 40071 | #endif | | |
| 40072 | | | |
| 40073 | #ifdef __LITTLE_ENDIAN__ | | |
| 40074 | #define vld1q_dup_bf16(__p0) __extension__ ({ \ | | |
| 40075 | bfloat16x8_t __ret; \ | | |
| 40076 | __ret = (bfloat16x8_t) __builtin_neon_vld1q_dup_v(__p0, 43); \ | | |
| 40077 | __ret; \ | | |
| 40078 | }) | | |
| 40079 | #else | | |
| 40080 | #define vld1q_dup_bf16(__p0) __extension__ ({ \ | | |
| 40081 | bfloat16x8_t __ret; \ | | |
| 40082 | __ret = (bfloat16x8_t) __builtin_neon_vld1q_dup_v(__p0, 43); \ | | |
| 40083 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 40084 | __ret; \ | | |
| 40085 | }) | | |
| 40086 | #endif | | |
| 40087 | | | |
| 40088 | #ifdef __LITTLE_ENDIAN__ | | |
| 40089 | #define vld1_dup_bf16(__p0) __extension__ ({ \ | | |
| 40090 | bfloat16x4_t __ret; \ | | |
| 40091 | __ret = (bfloat16x4_t) __builtin_neon_vld1_dup_v(__p0, 11); \ | | |
| 40092 | __ret; \ | | |
| 40093 | }) | | |
| 40094 | #else | | |
| 40095 | #define vld1_dup_bf16(__p0) __extension__ ({ \ | | |
| 40096 | bfloat16x4_t __ret; \ | | |
| 40097 | __ret = (bfloat16x4_t) __builtin_neon_vld1_dup_v(__p0, 11); \ | | |
| 40098 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | | |
| 40099 | __ret; \ | | |
| 40100 | }) | | |
| 40101 | #endif | | |
| 40102 | | | |
| 40103 | #ifdef __LITTLE_ENDIAN__ | | |
| 40104 | #define vld1q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | | |
| 40105 | bfloat16x8_t __ret; \ | | |
| 40106 | bfloat16x8_t __s1 = __p1; \ | | |
| 40107 | __ret = (bfloat16x8_t) __builtin_neon_vld1q_lane_v(__p0, (int8x16_t)__s1, __p2, 43); \ | | |
| 40108 | __ret; \ | | |
| 40109 | }) | | |
| 40110 | #else | | |
| 40111 | #define vld1q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | | |
| 40112 | bfloat16x8_t __ret; \ | | |
| 40113 | bfloat16x8_t __s1 = __p1; \ | | |
| 40114 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 40115 | __ret = (bfloat16x8_t) __builtin_neon_vld1q_lane_v(__p0, (int8x16_t)__rev1, __p2, 43); \ | | |
| 40116 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 40117 | __ret; \ | | |
| 40118 | }) | | |
| 40119 | #endif | | |
| 40120 | | | |
| 40121 | #ifdef __LITTLE_ENDIAN__ | | |
| 40122 | #define vld1_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | | |
| 40123 | bfloat16x4_t __ret; \ | | |
| 40124 | bfloat16x4_t __s1 = __p1; \ | | |
| 40125 | __ret = (bfloat16x4_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 11); \ | | |
| 40126 | __ret; \ | | |
| 40127 | }) | | |
| 40128 | #else | 41354 | #else |
| 40129 | #define vld1_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41355 | __ai __attribute__((target("fullfp16"))) float16x8_t vrndmq_f16(float16x8_t __p0) { |
| 40130 | bfloat16x4_t __ret; \ | 41356 | float16x8_t __ret; |
| 40131 | bfloat16x4_t __s1 = __p1; \ | 41357 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40132 | bfloat16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 41358 | __ret = (float16x8_t) __builtin_neon_vrndmq_f16((int8x16_t)__rev0, 40); |
| 40133 | __ret = (bfloat16x4_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__rev1, __p2, 11); \ | 41359 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40134 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 41360 | return __ret; |
| 40135 | __ret; \ | 41361 | } |
| 40136 | }) | | |
| 40137 | #endif | 41362 | #endif |
| 40138 | | 41363 | |
| 40139 | #ifdef __LITTLE_ENDIAN__ | 41364 | #ifdef __LITTLE_ENDIAN__ |
| 40140 | #define vld1q_bf16_x2(__p0) __extension__ ({ \ | 41365 | __ai __attribute__((target("fullfp16"))) float16x4_t vrndm_f16(float16x4_t __p0) { |
| 40141 | bfloat16x8x2_t __ret; \ | 41366 | float16x4_t __ret; |
| 40142 | __builtin_neon_vld1q_x2_v(&__ret, __p0, 43); \ | 41367 | __ret = (float16x4_t) __builtin_neon_vrndm_f16((int8x8_t)__p0, 8); |
| 40143 | __ret; \ | 41368 | return __ret; |
| 40144 | }) | 41369 | } |
| 40145 | #else | 41370 | #else |
| 40146 | #define vld1q_bf16_x2(__p0) __extension__ ({ \ | 41371 | __ai __attribute__((target("fullfp16"))) float16x4_t vrndm_f16(float16x4_t __p0) { |
| 40147 | bfloat16x8x2_t __ret; \ | 41372 | float16x4_t __ret; |
| 40148 | __builtin_neon_vld1q_x2_v(&__ret, __p0, 43); \ | 41373 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40149 | \ | 41374 | __ret = (float16x4_t) __builtin_neon_vrndm_f16((int8x8_t)__rev0, 8); |
| 40150 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41375 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40151 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41376 | return __ret; |
| 40152 | __ret; \ | 41377 | } |
| 40153 | }) | | |
| 40154 | #endif | 41378 | #endif |
| 40155 | | 41379 | |
| 40156 | #ifdef __LITTLE_ENDIAN__ | 41380 | #ifdef __LITTLE_ENDIAN__ |
| 40157 | #define vld1_bf16_x2(__p0) __extension__ ({ \ | 41381 | __ai __attribute__((target("fullfp16"))) float16x8_t vrndnq_f16(float16x8_t __p0) { |
| 40158 | bfloat16x4x2_t __ret; \ | 41382 | float16x8_t __ret; |
| 40159 | __builtin_neon_vld1_x2_v(&__ret, __p0, 11); \ | 41383 | __ret = (float16x8_t) __builtin_neon_vrndnq_f16((int8x16_t)__p0, 40); |
| 40160 | __ret; \ | 41384 | return __ret; |
| 40161 | }) | 41385 | } |
| 40162 | #else | 41386 | #else |
| 40163 | #define vld1_bf16_x2(__p0) __extension__ ({ \ | 41387 | __ai __attribute__((target("fullfp16"))) float16x8_t vrndnq_f16(float16x8_t __p0) { |
| 40164 | bfloat16x4x2_t __ret; \ | 41388 | float16x8_t __ret; |
| 40165 | __builtin_neon_vld1_x2_v(&__ret, __p0, 11); \ | 41389 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40166 | \ | 41390 | __ret = (float16x8_t) __builtin_neon_vrndnq_f16((int8x16_t)__rev0, 40); |
| 40167 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 41391 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40168 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 41392 | return __ret; |
| 40169 | __ret; \ | 41393 | } |
| 40170 | }) | | |
| 40171 | #endif | 41394 | #endif |
| 40172 | | 41395 | |
| 40173 | #ifdef __LITTLE_ENDIAN__ | 41396 | #ifdef __LITTLE_ENDIAN__ |
| 40174 | #define vld1q_bf16_x3(__p0) __extension__ ({ \ | 41397 | __ai __attribute__((target("fullfp16"))) float16x4_t vrndn_f16(float16x4_t __p0) { |
| 40175 | bfloat16x8x3_t __ret; \ | 41398 | float16x4_t __ret; |
| 40176 | __builtin_neon_vld1q_x3_v(&__ret, __p0, 43); \ | 41399 | __ret = (float16x4_t) __builtin_neon_vrndn_f16((int8x8_t)__p0, 8); |
| 40177 | __ret; \ | 41400 | return __ret; |
| 40178 | }) | 41401 | } |
| 40179 | #else | 41402 | #else |
| 40180 | #define vld1q_bf16_x3(__p0) __extension__ ({ \ | 41403 | __ai __attribute__((target("fullfp16"))) float16x4_t vrndn_f16(float16x4_t __p0) { |
| 40181 | bfloat16x8x3_t __ret; \ | 41404 | float16x4_t __ret; |
| 40182 | __builtin_neon_vld1q_x3_v(&__ret, __p0, 43); \ | 41405 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40183 | \ | 41406 | __ret = (float16x4_t) __builtin_neon_vrndn_f16((int8x8_t)__rev0, 8); |
| 40184 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41407 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40185 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41408 | return __ret; |
| 40186 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41409 | } |
| 40187 | __ret; \ | | |
| 40188 | }) | | |
| 40189 | #endif | 41410 | #endif |
| 40190 | | 41411 | |
| 40191 | #ifdef __LITTLE_ENDIAN__ | 41412 | #ifdef __LITTLE_ENDIAN__ |
| 40192 | #define vld1_bf16_x3(__p0) __extension__ ({ \ | 41413 | __ai __attribute__((target("fullfp16"))) float16x8_t vrndpq_f16(float16x8_t __p0) { |
| 40193 | bfloat16x4x3_t __ret; \ | 41414 | float16x8_t __ret; |
| 40194 | __builtin_neon_vld1_x3_v(&__ret, __p0, 11); \ | 41415 | __ret = (float16x8_t) __builtin_neon_vrndpq_f16((int8x16_t)__p0, 40); |
| 40195 | __ret; \ | 41416 | return __ret; |
| 40196 | }) | 41417 | } |
| 40197 | #else | 41418 | #else |
| 40198 | #define vld1_bf16_x3(__p0) __extension__ ({ \ | 41419 | __ai __attribute__((target("fullfp16"))) float16x8_t vrndpq_f16(float16x8_t __p0) { |
| 40199 | bfloat16x4x3_t __ret; \ | 41420 | float16x8_t __ret; |
| 40200 | __builtin_neon_vld1_x3_v(&__ret, __p0, 11); \ | 41421 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40201 | \ | 41422 | __ret = (float16x8_t) __builtin_neon_vrndpq_f16((int8x16_t)__rev0, 40); |
| 40202 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 41423 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40203 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 41424 | return __ret; |
| 40204 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | 41425 | } |
| 40205 | __ret; \ | | |
| 40206 | }) | | |
| 40207 | #endif | 41426 | #endif |
| 40208 | | 41427 | |
| 40209 | #ifdef __LITTLE_ENDIAN__ | 41428 | #ifdef __LITTLE_ENDIAN__ |
| 40210 | #define vld1q_bf16_x4(__p0) __extension__ ({ \ | 41429 | __ai __attribute__((target("fullfp16"))) float16x4_t vrndp_f16(float16x4_t __p0) { |
| 40211 | bfloat16x8x4_t __ret; \ | 41430 | float16x4_t __ret; |
| 40212 | __builtin_neon_vld1q_x4_v(&__ret, __p0, 43); \ | 41431 | __ret = (float16x4_t) __builtin_neon_vrndp_f16((int8x8_t)__p0, 8); |
| 40213 | __ret; \ | 41432 | return __ret; |
| 40214 | }) | 41433 | } |
| 40215 | #else | 41434 | #else |
| 40216 | #define vld1q_bf16_x4(__p0) __extension__ ({ \ | 41435 | __ai __attribute__((target("fullfp16"))) float16x4_t vrndp_f16(float16x4_t __p0) { |
| 40217 | bfloat16x8x4_t __ret; \ | 41436 | float16x4_t __ret; |
| 40218 | __builtin_neon_vld1q_x4_v(&__ret, __p0, 43); \ | 41437 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40219 | \ | 41438 | __ret = (float16x4_t) __builtin_neon_vrndp_f16((int8x8_t)__rev0, 8); |
| 40220 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41439 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40221 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41440 | return __ret; |
| 40222 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41441 | } |
| 40223 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 40224 | __ret; \ | | |
| 40225 | }) | | |
| 40226 | #endif | 41442 | #endif |
| 40227 | | 41443 | |
| 40228 | #ifdef __LITTLE_ENDIAN__ | 41444 | #ifdef __LITTLE_ENDIAN__ |
| 40229 | #define vld1_bf16_x4(__p0) __extension__ ({ \ | 41445 | __ai __attribute__((target("fullfp16"))) float16x8_t vrndxq_f16(float16x8_t __p0) { |
| 40230 | bfloat16x4x4_t __ret; \ | 41446 | float16x8_t __ret; |
| 40231 | __builtin_neon_vld1_x4_v(&__ret, __p0, 11); \ | 41447 | __ret = (float16x8_t) __builtin_neon_vrndxq_f16((int8x16_t)__p0, 40); |
| 40232 | __ret; \ | 41448 | return __ret; |
| 40233 | }) | 41449 | } |
| 40234 | #else | 41450 | #else |
| 40235 | #define vld1_bf16_x4(__p0) __extension__ ({ \ | 41451 | __ai __attribute__((target("fullfp16"))) float16x8_t vrndxq_f16(float16x8_t __p0) { |
| 40236 | bfloat16x4x4_t __ret; \ | 41452 | float16x8_t __ret; |
| 40237 | __builtin_neon_vld1_x4_v(&__ret, __p0, 11); \ | 41453 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40238 | \ | 41454 | __ret = (float16x8_t) __builtin_neon_vrndxq_f16((int8x16_t)__rev0, 40); |
| 40239 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 41455 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40240 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 41456 | return __ret; |
| 40241 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | 41457 | } |
| 40242 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ | | |
| 40243 | __ret; \ | | |
| 40244 | }) | | |
| 40245 | #endif | 41458 | #endif |
| 40246 | | 41459 | |
| 40247 | #ifdef __LITTLE_ENDIAN__ | 41460 | #ifdef __LITTLE_ENDIAN__ |
| 40248 | #define vld2q_bf16(__p0) __extension__ ({ \ | 41461 | __ai __attribute__((target("fullfp16"))) float16x4_t vrndx_f16(float16x4_t __p0) { |
| 40249 | bfloat16x8x2_t __ret; \ | 41462 | float16x4_t __ret; |
| 40250 | __builtin_neon_vld2q_v(&__ret, __p0, 43); \ | 41463 | __ret = (float16x4_t) __builtin_neon_vrndx_f16((int8x8_t)__p0, 8); |
| 40251 | __ret; \ | 41464 | return __ret; |
| 40252 | }) | 41465 | } |
| 40253 | #else | 41466 | #else |
| 40254 | #define vld2q_bf16(__p0) __extension__ ({ \ | 41467 | __ai __attribute__((target("fullfp16"))) float16x4_t vrndx_f16(float16x4_t __p0) { |
| 40255 | bfloat16x8x2_t __ret; \ | 41468 | float16x4_t __ret; |
| 40256 | __builtin_neon_vld2q_v(&__ret, __p0, 43); \ | 41469 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40257 | \ | 41470 | __ret = (float16x4_t) __builtin_neon_vrndx_f16((int8x8_t)__rev0, 8); |
| 40258 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41471 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40259 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41472 | return __ret; |
| 40260 | __ret; \ | 41473 | } |
| 40261 | }) | | |
| 40262 | #endif | 41474 | #endif |
| 40263 | | 41475 | |
| | 41476 | #endif |
| | 41477 | #if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_NUMERIC_MAXMIN) |
| 40264 | #ifdef __LITTLE_ENDIAN__ | 41478 | #ifdef __LITTLE_ENDIAN__ |
| 40265 | #define vld2_bf16(__p0) __extension__ ({ \ | 41479 | __ai float32x4_t vmaxnmq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 40266 | bfloat16x4x2_t __ret; \ | 41480 | float32x4_t __ret; |
| 40267 | __builtin_neon_vld2_v(&__ret, __p0, 11); \ | 41481 | __ret = (float32x4_t) __builtin_neon_vmaxnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); |
| 40268 | __ret; \ | 41482 | return __ret; |
| 40269 | }) | 41483 | } |
| 40270 | #else | 41484 | #else |
| 40271 | #define vld2_bf16(__p0) __extension__ ({ \ | 41485 | __ai float32x4_t vmaxnmq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 40272 | bfloat16x4x2_t __ret; \ | 41486 | float32x4_t __ret; |
| 40273 | __builtin_neon_vld2_v(&__ret, __p0, 11); \ | 41487 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40274 | \ | 41488 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 40275 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 41489 | __ret = (float32x4_t) __builtin_neon_vmaxnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); |
| 40276 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 41490 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40277 | __ret; \ | 41491 | return __ret; |
| 40278 | }) | 41492 | } |
| 40279 | #endif | 41493 | #endif |
| 40280 | | 41494 | |
| 40281 | #ifdef __LITTLE_ENDIAN__ | 41495 | #ifdef __LITTLE_ENDIAN__ |
| 40282 | #define vld2q_dup_bf16(__p0) __extension__ ({ \ | 41496 | __ai float32x2_t vmaxnm_f32(float32x2_t __p0, float32x2_t __p1) { |
| 40283 | bfloat16x8x2_t __ret; \ | 41497 | float32x2_t __ret; |
| 40284 | __builtin_neon_vld2q_dup_v(&__ret, __p0, 43); \ | 41498 | __ret = (float32x2_t) __builtin_neon_vmaxnm_v((int8x8_t)__p0, (int8x8_t)__p1, 9); |
| 40285 | __ret; \ | 41499 | return __ret; |
| 40286 | }) | 41500 | } |
| 40287 | #else | 41501 | #else |
| 40288 | #define vld2q_dup_bf16(__p0) __extension__ ({ \ | 41502 | __ai float32x2_t vmaxnm_f32(float32x2_t __p0, float32x2_t __p1) { |
| 40289 | bfloat16x8x2_t __ret; \ | 41503 | float32x2_t __ret; |
| 40290 | __builtin_neon_vld2q_dup_v(&__ret, __p0, 43); \ | 41504 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 40291 | \ | 41505 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 40292 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41506 | __ret = (float32x2_t) __builtin_neon_vmaxnm_v((int8x8_t)__rev0, (int8x8_t)__rev1, 9); |
| 40293 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41507 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40294 | __ret; \ | 41508 | return __ret; |
| 40295 | }) | 41509 | } |
| 40296 | #endif | 41510 | #endif |
| 40297 | | 41511 | |
| 40298 | #ifdef __LITTLE_ENDIAN__ | 41512 | #ifdef __LITTLE_ENDIAN__ |
| 40299 | #define vld2_dup_bf16(__p0) __extension__ ({ \ | 41513 | __ai float32x4_t vminnmq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 40300 | bfloat16x4x2_t __ret; \ | 41514 | float32x4_t __ret; |
| 40301 | __builtin_neon_vld2_dup_v(&__ret, __p0, 11); \ | 41515 | __ret = (float32x4_t) __builtin_neon_vminnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); |
| 40302 | __ret; \ | 41516 | return __ret; |
| 40303 | }) | 41517 | } |
| 40304 | #else | 41518 | #else |
| 40305 | #define vld2_dup_bf16(__p0) __extension__ ({ \ | 41519 | __ai float32x4_t vminnmq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 40306 | bfloat16x4x2_t __ret; \ | 41520 | float32x4_t __ret; |
| 40307 | __builtin_neon_vld2_dup_v(&__ret, __p0, 11); \ | 41521 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40308 | \ | 41522 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 40309 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 41523 | __ret = (float32x4_t) __builtin_neon_vminnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); |
| 40310 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 41524 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40311 | __ret; \ | 41525 | return __ret; |
| 40312 | }) | 41526 | } |
| 40313 | #endif | 41527 | #endif |
| 40314 | | 41528 | |
| 40315 | #ifdef __LITTLE_ENDIAN__ | 41529 | #ifdef __LITTLE_ENDIAN__ |
| 40316 | #define vld2q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41530 | __ai float32x2_t vminnm_f32(float32x2_t __p0, float32x2_t __p1) { |
| 40317 | bfloat16x8x2_t __ret; \ | 41531 | float32x2_t __ret; |
| 40318 | bfloat16x8x2_t __s1 = __p1; \ | 41532 | __ret = (float32x2_t) __builtin_neon_vminnm_v((int8x8_t)__p0, (int8x8_t)__p1, 9); |
| 40319 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 43); \ | 41533 | return __ret; |
| 40320 | __ret; \ | 41534 | } |
| 40321 | }) | | |
| 40322 | #else | 41535 | #else |
| 40323 | #define vld2q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41536 | __ai float32x2_t vminnm_f32(float32x2_t __p0, float32x2_t __p1) { |
| 40324 | bfloat16x8x2_t __ret; \ | 41537 | float32x2_t __ret; |
| 40325 | bfloat16x8x2_t __s1 = __p1; \ | 41538 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 40326 | bfloat16x8x2_t __rev1; \ | 41539 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 40327 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41540 | __ret = (float32x2_t) __builtin_neon_vminnm_v((int8x8_t)__rev0, (int8x8_t)__rev1, 9); |
| 40328 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41541 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40329 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 43); \ | 41542 | return __ret; |
| 40330 | \ | 41543 | } |
| 40331 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 40332 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 40333 | __ret; \ | | |
| 40334 | }) | | |
| 40335 | #endif | 41544 | #endif |
| 40336 | | 41545 | |
| 40337 | #ifdef __LITTLE_ENDIAN__ | 41546 | #ifdef __LITTLE_ENDIAN__ |
| 40338 | #define vld2_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41547 | __ai __attribute__((target("fullfp16"))) float16x8_t vmaxnmq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 40339 | bfloat16x4x2_t __ret; \ | 41548 | float16x8_t __ret; |
| 40340 | bfloat16x4x2_t __s1 = __p1; \ | 41549 | __ret = (float16x8_t) __builtin_neon_vmaxnmq_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 40341 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 11); \ | 41550 | return __ret; |
| 40342 | __ret; \ | 41551 | } |
| 40343 | }) | | |
| 40344 | #else | 41552 | #else |
| 40345 | #define vld2_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41553 | __ai __attribute__((target("fullfp16"))) float16x8_t vmaxnmq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 40346 | bfloat16x4x2_t __ret; \ | 41554 | float16x8_t __ret; |
| 40347 | bfloat16x4x2_t __s1 = __p1; \ | 41555 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40348 | bfloat16x4x2_t __rev1; \ | 41556 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40349 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 41557 | __ret = (float16x8_t) __builtin_neon_vmaxnmq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| 40350 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 41558 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40351 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 11); \ | 41559 | return __ret; |
| 40352 | \ | 41560 | } |
| 40353 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | | |
| 40354 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | | |
| 40355 | __ret; \ | | |
| 40356 | }) | | |
| 40357 | #endif | 41561 | #endif |
| 40358 | | 41562 | |
| 40359 | #ifdef __LITTLE_ENDIAN__ | 41563 | #ifdef __LITTLE_ENDIAN__ |
| 40360 | #define vld3q_bf16(__p0) __extension__ ({ \ | 41564 | __ai __attribute__((target("fullfp16"))) float16x4_t vmaxnm_f16(float16x4_t __p0, float16x4_t __p1) { |
| 40361 | bfloat16x8x3_t __ret; \ | 41565 | float16x4_t __ret; |
| 40362 | __builtin_neon_vld3q_v(&__ret, __p0, 43); \ | 41566 | __ret = (float16x4_t) __builtin_neon_vmaxnm_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 40363 | __ret; \ | 41567 | return __ret; |
| 40364 | }) | 41568 | } |
| 40365 | #else | 41569 | #else |
| 40366 | #define vld3q_bf16(__p0) __extension__ ({ \ | 41570 | __ai __attribute__((target("fullfp16"))) float16x4_t vmaxnm_f16(float16x4_t __p0, float16x4_t __p1) { |
| 40367 | bfloat16x8x3_t __ret; \ | 41571 | float16x4_t __ret; |
| 40368 | __builtin_neon_vld3q_v(&__ret, __p0, 43); \ | 41572 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40369 | \ | 41573 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 40370 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41574 | __ret = (float16x4_t) __builtin_neon_vmaxnm_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| 40371 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41575 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40372 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41576 | return __ret; |
| 40373 | __ret; \ | 41577 | } |
| 40374 | }) | | |
| 40375 | #endif | 41578 | #endif |
| 40376 | | 41579 | |
| 40377 | #ifdef __LITTLE_ENDIAN__ | 41580 | #ifdef __LITTLE_ENDIAN__ |
| 40378 | #define vld3_bf16(__p0) __extension__ ({ \ | 41581 | __ai __attribute__((target("fullfp16"))) float16x8_t vminnmq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 40379 | bfloat16x4x3_t __ret; \ | 41582 | float16x8_t __ret; |
| 40380 | __builtin_neon_vld3_v(&__ret, __p0, 11); \ | 41583 | __ret = (float16x8_t) __builtin_neon_vminnmq_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 40381 | __ret; \ | 41584 | return __ret; |
| 40382 | }) | 41585 | } |
| 40383 | #else | 41586 | #else |
| 40384 | #define vld3_bf16(__p0) __extension__ ({ \ | 41587 | __ai __attribute__((target("fullfp16"))) float16x8_t vminnmq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 40385 | bfloat16x4x3_t __ret; \ | 41588 | float16x8_t __ret; |
| 40386 | __builtin_neon_vld3_v(&__ret, __p0, 11); \ | 41589 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40387 | \ | 41590 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40388 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 41591 | __ret = (float16x8_t) __builtin_neon_vminnmq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| 40389 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 41592 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40390 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | 41593 | return __ret; |
| 40391 | __ret; \ | 41594 | } |
| 40392 | }) | | |
| 40393 | #endif | 41595 | #endif |
| 40394 | | 41596 | |
| 40395 | #ifdef __LITTLE_ENDIAN__ | 41597 | #ifdef __LITTLE_ENDIAN__ |
| 40396 | #define vld3q_dup_bf16(__p0) __extension__ ({ \ | 41598 | __ai __attribute__((target("fullfp16"))) float16x4_t vminnm_f16(float16x4_t __p0, float16x4_t __p1) { |
| 40397 | bfloat16x8x3_t __ret; \ | 41599 | float16x4_t __ret; |
| 40398 | __builtin_neon_vld3q_dup_v(&__ret, __p0, 43); \ | 41600 | __ret = (float16x4_t) __builtin_neon_vminnm_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 40399 | __ret; \ | 41601 | return __ret; |
| 40400 | }) | 41602 | } |
| 40401 | #else | 41603 | #else |
| 40402 | #define vld3q_dup_bf16(__p0) __extension__ ({ \ | 41604 | __ai __attribute__((target("fullfp16"))) float16x4_t vminnm_f16(float16x4_t __p0, float16x4_t __p1) { |
| 40403 | bfloat16x8x3_t __ret; \ | 41605 | float16x4_t __ret; |
| 40404 | __builtin_neon_vld3q_dup_v(&__ret, __p0, 43); \ | 41606 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40405 | \ | 41607 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 40406 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41608 | __ret = (float16x4_t) __builtin_neon_vminnm_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| 40407 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41609 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40408 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41610 | return __ret; |
| 40409 | __ret; \ | 41611 | } |
| 40410 | }) | | |
| 40411 | #endif | 41612 | #endif |
| 40412 | | 41613 | |
| | 41614 | #endif |
| | 41615 | #if defined(__ARM_FEATURE_FMA) |
| 40413 | #ifdef __LITTLE_ENDIAN__ | 41616 | #ifdef __LITTLE_ENDIAN__ |
| 40414 | #define vld3_dup_bf16(__p0) __extension__ ({ \ | 41617 | __ai float32x4_t vfmaq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 40415 | bfloat16x4x3_t __ret; \ | 41618 | float32x4_t __ret; |
| 40416 | __builtin_neon_vld3_dup_v(&__ret, __p0, 11); \ | 41619 | __ret = (float32x4_t) __builtin_neon_vfmaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 40417 | __ret; \ | 41620 | return __ret; |
| 40418 | }) | 41621 | } |
| 40419 | #else | 41622 | #else |
| 40420 | #define vld3_dup_bf16(__p0) __extension__ ({ \ | 41623 | __ai float32x4_t vfmaq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 40421 | bfloat16x4x3_t __ret; \ | 41624 | float32x4_t __ret; |
| 40422 | __builtin_neon_vld3_dup_v(&__ret, __p0, 11); \ | 41625 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40423 | \ | 41626 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 40424 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 41627 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 40425 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 41628 | __ret = (float32x4_t) __builtin_neon_vfmaq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); |
| 40426 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | 41629 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40427 | __ret; \ | 41630 | return __ret; |
| 40428 | }) | 41631 | } |
| | 41632 | __ai float32x4_t __noswap_vfmaq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| | 41633 | float32x4_t __ret; |
| | 41634 | __ret = (float32x4_t) __builtin_neon_vfmaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| | 41635 | return __ret; |
| | 41636 | } |
| 40429 | #endif | 41637 | #endif |
| 40430 | | 41638 | |
| 40431 | #ifdef __LITTLE_ENDIAN__ | 41639 | #ifdef __LITTLE_ENDIAN__ |
| 40432 | #define vld3q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41640 | __ai float32x2_t vfma_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 40433 | bfloat16x8x3_t __ret; \ | 41641 | float32x2_t __ret; |
| 40434 | bfloat16x8x3_t __s1 = __p1; \ | 41642 | __ret = (float32x2_t) __builtin_neon_vfma_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 40435 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 43); \ | 41643 | return __ret; |
| 40436 | __ret; \ | 41644 | } |
| 40437 | }) | | |
| 40438 | #else | 41645 | #else |
| 40439 | #define vld3q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41646 | __ai float32x2_t vfma_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 40440 | bfloat16x8x3_t __ret; \ | 41647 | float32x2_t __ret; |
| 40441 | bfloat16x8x3_t __s1 = __p1; \ | 41648 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 40442 | bfloat16x8x3_t __rev1; \ | 41649 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 40443 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41650 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 40444 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41651 | __ret = (float32x2_t) __builtin_neon_vfma_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); |
| 40445 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41652 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40446 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 43); \ | 41653 | return __ret; |
| 40447 | \ | 41654 | } |
| 40448 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41655 | __ai float32x2_t __noswap_vfma_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 40449 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41656 | float32x2_t __ret; |
| 40450 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41657 | __ret = (float32x2_t) __builtin_neon_vfma_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 40451 | __ret; \ | 41658 | return __ret; |
| 40452 | }) | 41659 | } |
| 40453 | #endif | 41660 | #endif |
| 40454 | | 41661 | |
| 40455 | #ifdef __LITTLE_ENDIAN__ | 41662 | #ifdef __LITTLE_ENDIAN__ |
| 40456 | #define vld3_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41663 | __ai float32x4_t vfmaq_n_f32(float32x4_t __p0, float32x4_t __p1, float32_t __p2) { |
| 40457 | bfloat16x4x3_t __ret; \ | 41664 | float32x4_t __ret; |
| 40458 | bfloat16x4x3_t __s1 = __p1; \ | 41665 | __ret = vfmaq_f32(__p0, __p1, (float32x4_t) {__p2, __p2, __p2, __p2}); |
| 40459 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 11); \ | 41666 | return __ret; |
| 40460 | __ret; \ | 41667 | } |
| 40461 | }) | | |
| 40462 | #else | 41668 | #else |
| 40463 | #define vld3_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41669 | __ai float32x4_t vfmaq_n_f32(float32x4_t __p0, float32x4_t __p1, float32_t __p2) { |
| 40464 | bfloat16x4x3_t __ret; \ | 41670 | float32x4_t __ret; |
| 40465 | bfloat16x4x3_t __s1 = __p1; \ | 41671 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40466 | bfloat16x4x3_t __rev1; \ | 41672 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 40467 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 41673 | __ret = __noswap_vfmaq_f32(__rev0, __rev1, (float32x4_t) {__p2, __p2, __p2, __p2}); |
| 40468 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 41674 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40469 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 41675 | return __ret; |
| 40470 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 11); \ | 41676 | } |
| 40471 | \ | | |
| 40472 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | | |
| 40473 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | | |
| 40474 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | | |
| 40475 | __ret; \ | | |
| 40476 | }) | | |
| 40477 | #endif | 41677 | #endif |
| 40478 | | 41678 | |
| 40479 | #ifdef __LITTLE_ENDIAN__ | 41679 | #ifdef __LITTLE_ENDIAN__ |
| 40480 | #define vld4q_bf16(__p0) __extension__ ({ \ | 41680 | __ai float32x2_t vfma_n_f32(float32x2_t __p0, float32x2_t __p1, float32_t __p2) { |
| 40481 | bfloat16x8x4_t __ret; \ | 41681 | float32x2_t __ret; |
| 40482 | __builtin_neon_vld4q_v(&__ret, __p0, 43); \ | 41682 | __ret = vfma_f32(__p0, __p1, (float32x2_t) {__p2, __p2}); |
| 40483 | __ret; \ | 41683 | return __ret; |
| 40484 | }) | 41684 | } |
| 40485 | #else | 41685 | #else |
| 40486 | #define vld4q_bf16(__p0) __extension__ ({ \ | 41686 | __ai float32x2_t vfma_n_f32(float32x2_t __p0, float32x2_t __p1, float32_t __p2) { |
| 40487 | bfloat16x8x4_t __ret; \ | 41687 | float32x2_t __ret; |
| 40488 | __builtin_neon_vld4q_v(&__ret, __p0, 43); \ | 41688 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 40489 | \ | 41689 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 40490 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41690 | __ret = __noswap_vfma_f32(__rev0, __rev1, (float32x2_t) {__p2, __p2}); |
| 40491 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41691 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40492 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41692 | return __ret; |
| 40493 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41693 | } |
| 40494 | __ret; \ | | |
| 40495 | }) | | |
| 40496 | #endif | 41694 | #endif |
| 40497 | | 41695 | |
| 40498 | #ifdef __LITTLE_ENDIAN__ | 41696 | #ifdef __LITTLE_ENDIAN__ |
| 40499 | #define vld4_bf16(__p0) __extension__ ({ \ | 41697 | __ai float32x4_t vfmsq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 40500 | bfloat16x4x4_t __ret; \ | 41698 | float32x4_t __ret; |
| 40501 | __builtin_neon_vld4_v(&__ret, __p0, 11); \ | 41699 | __ret = vfmaq_f32(__p0, -__p1, __p2); |
| 40502 | __ret; \ | 41700 | return __ret; |
| 40503 | }) | 41701 | } |
| 40504 | #else | 41702 | #else |
| 40505 | #define vld4_bf16(__p0) __extension__ ({ \ | 41703 | __ai float32x4_t vfmsq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 40506 | bfloat16x4x4_t __ret; \ | 41704 | float32x4_t __ret; |
| 40507 | __builtin_neon_vld4_v(&__ret, __p0, 11); \ | 41705 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40508 | \ | 41706 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 40509 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 41707 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 40510 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 41708 | __ret = __noswap_vfmaq_f32(__rev0, -__rev1, __rev2); |
| 40511 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | 41709 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40512 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ | 41710 | return __ret; |
| 40513 | __ret; \ | 41711 | } |
| 40514 | }) | | |
| 40515 | #endif | 41712 | #endif |
| 40516 | | 41713 | |
| 40517 | #ifdef __LITTLE_ENDIAN__ | 41714 | #ifdef __LITTLE_ENDIAN__ |
| 40518 | #define vld4q_dup_bf16(__p0) __extension__ ({ \ | 41715 | __ai float32x2_t vfms_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 40519 | bfloat16x8x4_t __ret; \ | 41716 | float32x2_t __ret; |
| 40520 | __builtin_neon_vld4q_dup_v(&__ret, __p0, 43); \ | 41717 | __ret = vfma_f32(__p0, -__p1, __p2); |
| 40521 | __ret; \ | 41718 | return __ret; |
| 40522 | }) | 41719 | } |
| 40523 | #else | 41720 | #else |
| 40524 | #define vld4q_dup_bf16(__p0) __extension__ ({ \ | 41721 | __ai float32x2_t vfms_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 40525 | bfloat16x8x4_t __ret; \ | 41722 | float32x2_t __ret; |
| 40526 | __builtin_neon_vld4q_dup_v(&__ret, __p0, 43); \ | 41723 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 40527 | \ | 41724 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 40528 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41725 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 40529 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41726 | __ret = __noswap_vfma_f32(__rev0, -__rev1, __rev2); |
| 40530 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41727 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40531 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41728 | return __ret; |
| 40532 | __ret; \ | 41729 | } |
| 40533 | }) | | |
| 40534 | #endif | 41730 | #endif |
| 40535 | | 41731 | |
| | 41732 | #endif |
| | 41733 | #if defined(__aarch64__) |
| 40536 | #ifdef __LITTLE_ENDIAN__ | 41734 | #ifdef __LITTLE_ENDIAN__ |
| 40537 | #define vld4_dup_bf16(__p0) __extension__ ({ \ | 41735 | __ai float64x2_t vabdq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 40538 | bfloat16x4x4_t __ret; \ | 41736 | float64x2_t __ret; |
| 40539 | __builtin_neon_vld4_dup_v(&__ret, __p0, 11); \ | 41737 | __ret = (float64x2_t) __builtin_neon_vabdq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| 40540 | __ret; \ | 41738 | return __ret; |
| 40541 | }) | 41739 | } |
| 40542 | #else | 41740 | #else |
| 40543 | #define vld4_dup_bf16(__p0) __extension__ ({ \ | 41741 | __ai float64x2_t vabdq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 40544 | bfloat16x4x4_t __ret; \ | 41742 | float64x2_t __ret; |
| 40545 | __builtin_neon_vld4_dup_v(&__ret, __p0, 11); \ | 41743 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 40546 | \ | 41744 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 40547 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 41745 | __ret = (float64x2_t) __builtin_neon_vabdq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| 40548 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 41746 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40549 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | 41747 | return __ret; |
| 40550 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ | 41748 | } |
| 40551 | __ret; \ | | |
| 40552 | }) | | |
| 40553 | #endif | 41749 | #endif |
| 40554 | | 41750 | |
| | 41751 | __ai float64x1_t vabd_f64(float64x1_t __p0, float64x1_t __p1) { |
| | 41752 | float64x1_t __ret; |
| | 41753 | __ret = (float64x1_t) __builtin_neon_vabd_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| | 41754 | return __ret; |
| | 41755 | } |
| | 41756 | __ai float64_t vabdd_f64(float64_t __p0, float64_t __p1) { |
| | 41757 | float64_t __ret; |
| | 41758 | __ret = (float64_t) __builtin_neon_vabdd_f64(__p0, __p1); |
| | 41759 | return __ret; |
| | 41760 | } |
| | 41761 | __ai float32_t vabds_f32(float32_t __p0, float32_t __p1) { |
| | 41762 | float32_t __ret; |
| | 41763 | __ret = (float32_t) __builtin_neon_vabds_f32(__p0, __p1); |
| | 41764 | return __ret; |
| | 41765 | } |
| 40555 | #ifdef __LITTLE_ENDIAN__ | 41766 | #ifdef __LITTLE_ENDIAN__ |
| 40556 | #define vld4q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41767 | __ai float64x2_t vabsq_f64(float64x2_t __p0) { |
| 40557 | bfloat16x8x4_t __ret; \ | 41768 | float64x2_t __ret; |
| 40558 | bfloat16x8x4_t __s1 = __p1; \ | 41769 | __ret = (float64x2_t) __builtin_neon_vabsq_v((int8x16_t)__p0, 42); |
| 40559 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 43); \ | 41770 | return __ret; |
| 40560 | __ret; \ | 41771 | } |
| 40561 | }) | | |
| 40562 | #else | 41772 | #else |
| 40563 | #define vld4q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41773 | __ai float64x2_t vabsq_f64(float64x2_t __p0) { |
| 40564 | bfloat16x8x4_t __ret; \ | 41774 | float64x2_t __ret; |
| 40565 | bfloat16x8x4_t __s1 = __p1; \ | 41775 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 40566 | bfloat16x8x4_t __rev1; \ | 41776 | __ret = (float64x2_t) __builtin_neon_vabsq_v((int8x16_t)__rev0, 42); |
| 40567 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41777 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40568 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41778 | return __ret; |
| 40569 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41779 | } |
| 40570 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 40571 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 43); \ | | |
| 40572 | \ | | |
| 40573 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 40574 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 40575 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 40576 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 40577 | __ret; \ | | |
| 40578 | }) | | |
| 40579 | #endif | 41780 | #endif |
| 40580 | | 41781 | |
| 40581 | #ifdef __LITTLE_ENDIAN__ | 41782 | #ifdef __LITTLE_ENDIAN__ |
| 40582 | #define vld4_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41783 | __ai int64x2_t vabsq_s64(int64x2_t __p0) { |
| 40583 | bfloat16x4x4_t __ret; \ | 41784 | int64x2_t __ret; |
| 40584 | bfloat16x4x4_t __s1 = __p1; \ | 41785 | __ret = (int64x2_t) __builtin_neon_vabsq_v((int8x16_t)__p0, 35); |
| 40585 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 11); \ | 41786 | return __ret; |
| 40586 | __ret; \ | 41787 | } |
| 40587 | }) | | |
| 40588 | #else | 41788 | #else |
| 40589 | #define vld4_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41789 | __ai int64x2_t vabsq_s64(int64x2_t __p0) { |
| 40590 | bfloat16x4x4_t __ret; \ | 41790 | int64x2_t __ret; |
| 40591 | bfloat16x4x4_t __s1 = __p1; \ | 41791 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 40592 | bfloat16x4x4_t __rev1; \ | 41792 | __ret = (int64x2_t) __builtin_neon_vabsq_v((int8x16_t)__rev0, 35); |
| 40593 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 41793 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40594 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 41794 | return __ret; |
| 40595 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 41795 | } |
| 40596 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | | |
| 40597 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 11); \ | | |
| 40598 | \ | | |
| 40599 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | | |
| 40600 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | | |
| 40601 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 3, 2, 1, 0); \ | | |
| 40602 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 3, 2, 1, 0); \ | | |
| 40603 | __ret; \ | | |
| 40604 | }) | | |
| 40605 | #endif | 41796 | #endif |
| 40606 | | 41797 | |
| | 41798 | __ai float64x1_t vabs_f64(float64x1_t __p0) { |
| | 41799 | float64x1_t __ret; |
| | 41800 | __ret = (float64x1_t) __builtin_neon_vabs_v((int8x8_t)__p0, 10); |
| | 41801 | return __ret; |
| | 41802 | } |
| | 41803 | __ai int64x1_t vabs_s64(int64x1_t __p0) { |
| | 41804 | int64x1_t __ret; |
| | 41805 | __ret = (int64x1_t) __builtin_neon_vabs_v((int8x8_t)__p0, 3); |
| | 41806 | return __ret; |
| | 41807 | } |
| | 41808 | __ai int64_t vabsd_s64(int64_t __p0) { |
| | 41809 | int64_t __ret; |
| | 41810 | __ret = (int64_t) __builtin_neon_vabsd_s64(__p0); |
| | 41811 | return __ret; |
| | 41812 | } |
| 40607 | #ifdef __LITTLE_ENDIAN__ | 41813 | #ifdef __LITTLE_ENDIAN__ |
| 40608 | #define vsetq_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41814 | __ai float64x2_t vaddq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 40609 | bfloat16x8_t __ret; \ | 41815 | float64x2_t __ret; |
| 40610 | bfloat16_t __s0 = __p0; \ | 41816 | __ret = __p0 + __p1; |
| 40611 | bfloat16x8_t __s1 = __p1; \ | 41817 | return __ret; |
| 40612 | __ret = (bfloat16x8_t) __builtin_neon_vsetq_lane_bf16(__s0, (bfloat16x8_t)__s1, __p2); \ | 41818 | } |
| 40613 | __ret; \ | | |
| 40614 | }) | | |
| 40615 | #else | 41819 | #else |
| 40616 | #define vsetq_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41820 | __ai float64x2_t vaddq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 40617 | bfloat16x8_t __ret; \ | 41821 | float64x2_t __ret; |
| 40618 | bfloat16_t __s0 = __p0; \ | 41822 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 40619 | bfloat16x8_t __s1 = __p1; \ | 41823 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 40620 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 41824 | __ret = __rev0 + __rev1; |
| 40621 | __ret = (bfloat16x8_t) __builtin_neon_vsetq_lane_bf16(__s0, (bfloat16x8_t)__rev1, __p2); \ | 41825 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40622 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 41826 | return __ret; |
| 40623 | __ret; \ | 41827 | } |
| 40624 | }) | | |
| 40625 | #define __noswap_vsetq_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | | |
| 40626 | bfloat16x8_t __ret; \ | | |
| 40627 | bfloat16_t __s0 = __p0; \ | | |
| 40628 | bfloat16x8_t __s1 = __p1; \ | | |
| 40629 | __ret = (bfloat16x8_t) __builtin_neon_vsetq_lane_bf16(__s0, (bfloat16x8_t)__s1, __p2); \ | | |
| 40630 | __ret; \ | | |
| 40631 | }) | | |
| 40632 | #endif | 41828 | #endif |
| 40633 | | 41829 | |
| | 41830 | __ai float64x1_t vadd_f64(float64x1_t __p0, float64x1_t __p1) { |
| | 41831 | float64x1_t __ret; |
| | 41832 | __ret = __p0 + __p1; |
| | 41833 | return __ret; |
| | 41834 | } |
| | 41835 | __ai uint64_t vaddd_u64(uint64_t __p0, uint64_t __p1) { |
| | 41836 | uint64_t __ret; |
| | 41837 | __ret = (uint64_t) __builtin_neon_vaddd_u64(__p0, __p1); |
| | 41838 | return __ret; |
| | 41839 | } |
| | 41840 | __ai int64_t vaddd_s64(int64_t __p0, int64_t __p1) { |
| | 41841 | int64_t __ret; |
| | 41842 | __ret = (int64_t) __builtin_neon_vaddd_s64(__p0, __p1); |
| | 41843 | return __ret; |
| | 41844 | } |
| | 41845 | __ai poly128_t vaddq_p128(poly128_t __p0, poly128_t __p1) { |
| | 41846 | poly128_t __ret; |
| | 41847 | __ret = (poly128_t) __builtin_neon_vaddq_p128(__p0, __p1); |
| | 41848 | return __ret; |
| | 41849 | } |
| 40634 | #ifdef __LITTLE_ENDIAN__ | 41850 | #ifdef __LITTLE_ENDIAN__ |
| 40635 | #define vset_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41851 | __ai uint16x8_t vaddhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 40636 | bfloat16x4_t __ret; \ | 41852 | uint16x8_t __ret; |
| 40637 | bfloat16_t __s0 = __p0; \ | 41853 | __ret = vcombine_u16(__p0, vaddhn_u32(__p1, __p2)); |
| 40638 | bfloat16x4_t __s1 = __p1; \ | 41854 | return __ret; |
| 40639 | __ret = (bfloat16x4_t) __builtin_neon_vset_lane_bf16(__s0, (bfloat16x4_t)__s1, __p2); \ | 41855 | } |
| 40640 | __ret; \ | | |
| 40641 | }) | | |
| 40642 | #else | 41856 | #else |
| 40643 | #define vset_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41857 | __ai uint16x8_t vaddhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 40644 | bfloat16x4_t __ret; \ | 41858 | uint16x8_t __ret; |
| 40645 | bfloat16_t __s0 = __p0; \ | 41859 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40646 | bfloat16x4_t __s1 = __p1; \ | 41860 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 40647 | bfloat16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 41861 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 40648 | __ret = (bfloat16x4_t) __builtin_neon_vset_lane_bf16(__s0, (bfloat16x4_t)__rev1, __p2); \ | 41862 | __ret = __noswap_vcombine_u16(__rev0, __noswap_vaddhn_u32(__rev1, __rev2)); |
| 40649 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 41863 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40650 | __ret; \ | 41864 | return __ret; |
| 40651 | }) | 41865 | } |
| 40652 | #define __noswap_vset_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | | |
| 40653 | bfloat16x4_t __ret; \ | | |
| 40654 | bfloat16_t __s0 = __p0; \ | | |
| 40655 | bfloat16x4_t __s1 = __p1; \ | | |
| 40656 | __ret = (bfloat16x4_t) __builtin_neon_vset_lane_bf16(__s0, (bfloat16x4_t)__s1, __p2); \ | | |
| 40657 | __ret; \ | | |
| 40658 | }) | | |
| 40659 | #endif | 41866 | #endif |
| 40660 | | 41867 | |
| 40661 | #ifdef __LITTLE_ENDIAN__ | 41868 | #ifdef __LITTLE_ENDIAN__ |
| 40662 | #define vst1q_bf16(__p0, __p1) __extension__ ({ \ | 41869 | __ai uint32x4_t vaddhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 40663 | bfloat16x8_t __s1 = __p1; \ | 41870 | uint32x4_t __ret; |
| 40664 | __builtin_neon_vst1q_v(__p0, (int8x16_t)__s1, 43); \ | 41871 | __ret = vcombine_u32(__p0, vaddhn_u64(__p1, __p2)); |
| 40665 | }) | 41872 | return __ret; |
| | 41873 | } |
| 40666 | #else | 41874 | #else |
| 40667 | #define vst1q_bf16(__p0, __p1) __extension__ ({ \ | 41875 | __ai uint32x4_t vaddhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 40668 | bfloat16x8_t __s1 = __p1; \ | 41876 | uint32x4_t __ret; |
| 40669 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 41877 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 40670 | __builtin_neon_vst1q_v(__p0, (int8x16_t)__rev1, 43); \ | 41878 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 40671 | }) | 41879 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 41880 | __ret = __noswap_vcombine_u32(__rev0, __noswap_vaddhn_u64(__rev1, __rev2)); |
| | 41881 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 41882 | return __ret; |
| | 41883 | } |
| 40672 | #endif | 41884 | #endif |
| 40673 | | 41885 | |
| 40674 | #ifdef __LITTLE_ENDIAN__ | 41886 | #ifdef __LITTLE_ENDIAN__ |
| 40675 | #define vst1_bf16(__p0, __p1) __extension__ ({ \ | 41887 | __ai uint8x16_t vaddhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { |
| 40676 | bfloat16x4_t __s1 = __p1; \ | 41888 | uint8x16_t __ret; |
| 40677 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 11); \ | 41889 | __ret = vcombine_u8(__p0, vaddhn_u16(__p1, __p2)); |
| 40678 | }) | 41890 | return __ret; |
| | 41891 | } |
| 40679 | #else | 41892 | #else |
| 40680 | #define vst1_bf16(__p0, __p1) __extension__ ({ \ | 41893 | __ai uint8x16_t vaddhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { |
| 40681 | bfloat16x4_t __s1 = __p1; \ | 41894 | uint8x16_t __ret; |
| 40682 | bfloat16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 41895 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40683 | __builtin_neon_vst1_v(__p0, (int8x8_t)__rev1, 11); \ | 41896 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40684 | }) | 41897 | uint16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 41898 | __ret = __noswap_vcombine_u8(__rev0, __noswap_vaddhn_u16(__rev1, __rev2)); |
| | 41899 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 41900 | return __ret; |
| | 41901 | } |
| 40685 | #endif | 41902 | #endif |
| 40686 | | 41903 | |
| 40687 | #ifdef __LITTLE_ENDIAN__ | 41904 | #ifdef __LITTLE_ENDIAN__ |
| 40688 | #define vst1q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41905 | __ai int16x8_t vaddhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 40689 | bfloat16x8_t __s1 = __p1; \ | 41906 | int16x8_t __ret; |
| 40690 | __builtin_neon_vst1q_lane_v(__p0, (int8x16_t)__s1, __p2, 43); \ | 41907 | __ret = vcombine_s16(__p0, vaddhn_s32(__p1, __p2)); |
| 40691 | }) | 41908 | return __ret; |
| | 41909 | } |
| 40692 | #else | 41910 | #else |
| 40693 | #define vst1q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41911 | __ai int16x8_t vaddhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 40694 | bfloat16x8_t __s1 = __p1; \ | 41912 | int16x8_t __ret; |
| 40695 | bfloat16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 41913 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40696 | __builtin_neon_vst1q_lane_v(__p0, (int8x16_t)__rev1, __p2, 43); \ | 41914 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 40697 | }) | 41915 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 41916 | __ret = __noswap_vcombine_s16(__rev0, __noswap_vaddhn_s32(__rev1, __rev2)); |
| | 41917 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 41918 | return __ret; |
| | 41919 | } |
| 40698 | #endif | 41920 | #endif |
| 40699 | | 41921 | |
| 40700 | #ifdef __LITTLE_ENDIAN__ | 41922 | #ifdef __LITTLE_ENDIAN__ |
| 40701 | #define vst1_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41923 | __ai int32x4_t vaddhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { |
| 40702 | bfloat16x4_t __s1 = __p1; \ | 41924 | int32x4_t __ret; |
| 40703 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 11); \ | 41925 | __ret = vcombine_s32(__p0, vaddhn_s64(__p1, __p2)); |
| 40704 | }) | 41926 | return __ret; |
| | 41927 | } |
| 40705 | #else | 41928 | #else |
| 40706 | #define vst1_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 41929 | __ai int32x4_t vaddhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { |
| 40707 | bfloat16x4_t __s1 = __p1; \ | 41930 | int32x4_t __ret; |
| 40708 | bfloat16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 41931 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 40709 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__rev1, __p2, 11); \ | 41932 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 40710 | }) | 41933 | int64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 41934 | __ret = __noswap_vcombine_s32(__rev0, __noswap_vaddhn_s64(__rev1, __rev2)); |
| | 41935 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 41936 | return __ret; |
| | 41937 | } |
| 40711 | #endif | 41938 | #endif |
| 40712 | | 41939 | |
| 40713 | #ifdef __LITTLE_ENDIAN__ | 41940 | #ifdef __LITTLE_ENDIAN__ |
| 40714 | #define vst1q_bf16_x2(__p0, __p1) __extension__ ({ \ | 41941 | __ai int8x16_t vaddhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 40715 | bfloat16x8x2_t __s1 = __p1; \ | 41942 | int8x16_t __ret; |
| 40716 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 43); \ | 41943 | __ret = vcombine_s8(__p0, vaddhn_s16(__p1, __p2)); |
| 40717 | }) | 41944 | return __ret; |
| | 41945 | } |
| 40718 | #else | 41946 | #else |
| 40719 | #define vst1q_bf16_x2(__p0, __p1) __extension__ ({ \ | 41947 | __ai int8x16_t vaddhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 40720 | bfloat16x8x2_t __s1 = __p1; \ | 41948 | int8x16_t __ret; |
| 40721 | bfloat16x8x2_t __rev1; \ | 41949 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40722 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41950 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40723 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41951 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40724 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 43); \ | 41952 | __ret = __noswap_vcombine_s8(__rev0, __noswap_vaddhn_s16(__rev1, __rev2)); |
| 40725 | }) | 41953 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 41954 | return __ret; |
| | 41955 | } |
| 40726 | #endif | 41956 | #endif |
| 40727 | | 41957 | |
| 40728 | #ifdef __LITTLE_ENDIAN__ | 41958 | #ifdef __LITTLE_ENDIAN__ |
| 40729 | #define vst1_bf16_x2(__p0, __p1) __extension__ ({ \ | 41959 | __ai uint16_t vaddlvq_u8(uint8x16_t __p0) { |
| 40730 | bfloat16x4x2_t __s1 = __p1; \ | 41960 | uint16_t __ret; |
| 40731 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 11); \ | 41961 | __ret = (uint16_t) __builtin_neon_vaddlvq_u8(__p0); |
| 40732 | }) | 41962 | return __ret; |
| | 41963 | } |
| 40733 | #else | 41964 | #else |
| 40734 | #define vst1_bf16_x2(__p0, __p1) __extension__ ({ \ | 41965 | __ai uint16_t vaddlvq_u8(uint8x16_t __p0) { |
| 40735 | bfloat16x4x2_t __s1 = __p1; \ | 41966 | uint16_t __ret; |
| 40736 | bfloat16x4x2_t __rev1; \ | 41967 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40737 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 41968 | __ret = (uint16_t) __builtin_neon_vaddlvq_u8(__rev0); |
| 40738 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 41969 | return __ret; |
| 40739 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 11); \ | 41970 | } |
| 40740 | }) | | |
| 40741 | #endif | 41971 | #endif |
| 40742 | | 41972 | |
| 40743 | #ifdef __LITTLE_ENDIAN__ | 41973 | #ifdef __LITTLE_ENDIAN__ |
| 40744 | #define vst1q_bf16_x3(__p0, __p1) __extension__ ({ \ | 41974 | __ai uint64_t vaddlvq_u32(uint32x4_t __p0) { |
| 40745 | bfloat16x8x3_t __s1 = __p1; \ | 41975 | uint64_t __ret; |
| 40746 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 43); \ | 41976 | __ret = (uint64_t) __builtin_neon_vaddlvq_u32(__p0); |
| 40747 | }) | 41977 | return __ret; |
| | 41978 | } |
| 40748 | #else | 41979 | #else |
| 40749 | #define vst1q_bf16_x3(__p0, __p1) __extension__ ({ \ | 41980 | __ai uint64_t vaddlvq_u32(uint32x4_t __p0) { |
| 40750 | bfloat16x8x3_t __s1 = __p1; \ | 41981 | uint64_t __ret; |
| 40751 | bfloat16x8x3_t __rev1; \ | 41982 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40752 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41983 | __ret = (uint64_t) __builtin_neon_vaddlvq_u32(__rev0); |
| 40753 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41984 | return __ret; |
| 40754 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 41985 | } |
| 40755 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 43); \ | | |
| 40756 | }) | | |
| 40757 | #endif | 41986 | #endif |
| 40758 | | 41987 | |
| 40759 | #ifdef __LITTLE_ENDIAN__ | 41988 | #ifdef __LITTLE_ENDIAN__ |
| 40760 | #define vst1_bf16_x3(__p0, __p1) __extension__ ({ \ | 41989 | __ai uint32_t vaddlvq_u16(uint16x8_t __p0) { |
| 40761 | bfloat16x4x3_t __s1 = __p1; \ | 41990 | uint32_t __ret; |
| 40762 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 11); \ | 41991 | __ret = (uint32_t) __builtin_neon_vaddlvq_u16(__p0); |
| 40763 | }) | 41992 | return __ret; |
| | 41993 | } |
| 40764 | #else | 41994 | #else |
| 40765 | #define vst1_bf16_x3(__p0, __p1) __extension__ ({ \ | 41995 | __ai uint32_t vaddlvq_u16(uint16x8_t __p0) { |
| 40766 | bfloat16x4x3_t __s1 = __p1; \ | 41996 | uint32_t __ret; |
| 40767 | bfloat16x4x3_t __rev1; \ | 41997 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40768 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 41998 | __ret = (uint32_t) __builtin_neon_vaddlvq_u16(__rev0); |
| 40769 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 41999 | return __ret; |
| 40770 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 42000 | } |
| 40771 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 11); \ | | |
| 40772 | }) | | |
| 40773 | #endif | 42001 | #endif |
| 40774 | | 42002 | |
| 40775 | #ifdef __LITTLE_ENDIAN__ | 42003 | #ifdef __LITTLE_ENDIAN__ |
| 40776 | #define vst1q_bf16_x4(__p0, __p1) __extension__ ({ \ | 42004 | __ai int16_t vaddlvq_s8(int8x16_t __p0) { |
| 40777 | bfloat16x8x4_t __s1 = __p1; \ | 42005 | int16_t __ret; |
| 40778 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 43); \ | 42006 | __ret = (int16_t) __builtin_neon_vaddlvq_s8(__p0); |
| 40779 | }) | 42007 | return __ret; |
| | 42008 | } |
| 40780 | #else | 42009 | #else |
| 40781 | #define vst1q_bf16_x4(__p0, __p1) __extension__ ({ \ | 42010 | __ai int16_t vaddlvq_s8(int8x16_t __p0) { |
| 40782 | bfloat16x8x4_t __s1 = __p1; \ | 42011 | int16_t __ret; |
| 40783 | bfloat16x8x4_t __rev1; \ | 42012 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40784 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42013 | __ret = (int16_t) __builtin_neon_vaddlvq_s8(__rev0); |
| 40785 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42014 | return __ret; |
| 40786 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42015 | } |
| 40787 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 40788 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 43); \ | | |
| 40789 | }) | | |
| 40790 | #endif | 42016 | #endif |
| 40791 | | 42017 | |
| 40792 | #ifdef __LITTLE_ENDIAN__ | 42018 | #ifdef __LITTLE_ENDIAN__ |
| 40793 | #define vst1_bf16_x4(__p0, __p1) __extension__ ({ \ | 42019 | __ai int64_t vaddlvq_s32(int32x4_t __p0) { |
| 40794 | bfloat16x4x4_t __s1 = __p1; \ | 42020 | int64_t __ret; |
| 40795 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 11); \ | 42021 | __ret = (int64_t) __builtin_neon_vaddlvq_s32(__p0); |
| 40796 | }) | 42022 | return __ret; |
| | 42023 | } |
| 40797 | #else | 42024 | #else |
| 40798 | #define vst1_bf16_x4(__p0, __p1) __extension__ ({ \ | 42025 | __ai int64_t vaddlvq_s32(int32x4_t __p0) { |
| 40799 | bfloat16x4x4_t __s1 = __p1; \ | 42026 | int64_t __ret; |
| 40800 | bfloat16x4x4_t __rev1; \ | 42027 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40801 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 42028 | __ret = (int64_t) __builtin_neon_vaddlvq_s32(__rev0); |
| 40802 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 42029 | return __ret; |
| 40803 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 42030 | } |
| 40804 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | | |
| 40805 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 11); \ | | |
| 40806 | }) | | |
| 40807 | #endif | 42031 | #endif |
| 40808 | | 42032 | |
| 40809 | #ifdef __LITTLE_ENDIAN__ | 42033 | #ifdef __LITTLE_ENDIAN__ |
| 40810 | #define vst2q_bf16(__p0, __p1) __extension__ ({ \ | 42034 | __ai int32_t vaddlvq_s16(int16x8_t __p0) { |
| 40811 | bfloat16x8x2_t __s1 = __p1; \ | 42035 | int32_t __ret; |
| 40812 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 43); \ | 42036 | __ret = (int32_t) __builtin_neon_vaddlvq_s16(__p0); |
| 40813 | }) | 42037 | return __ret; |
| | 42038 | } |
| 40814 | #else | 42039 | #else |
| 40815 | #define vst2q_bf16(__p0, __p1) __extension__ ({ \ | 42040 | __ai int32_t vaddlvq_s16(int16x8_t __p0) { |
| 40816 | bfloat16x8x2_t __s1 = __p1; \ | 42041 | int32_t __ret; |
| 40817 | bfloat16x8x2_t __rev1; \ | 42042 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40818 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42043 | __ret = (int32_t) __builtin_neon_vaddlvq_s16(__rev0); |
| 40819 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42044 | return __ret; |
| 40820 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 43); \ | 42045 | } |
| 40821 | }) | | |
| 40822 | #endif | 42046 | #endif |
| 40823 | | 42047 | |
| 40824 | #ifdef __LITTLE_ENDIAN__ | 42048 | #ifdef __LITTLE_ENDIAN__ |
| 40825 | #define vst2_bf16(__p0, __p1) __extension__ ({ \ | 42049 | __ai uint16_t vaddlv_u8(uint8x8_t __p0) { |
| 40826 | bfloat16x4x2_t __s1 = __p1; \ | 42050 | uint16_t __ret; |
| 40827 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 11); \ | 42051 | __ret = (uint16_t) __builtin_neon_vaddlv_u8(__p0); |
| 40828 | }) | 42052 | return __ret; |
| | 42053 | } |
| 40829 | #else | 42054 | #else |
| 40830 | #define vst2_bf16(__p0, __p1) __extension__ ({ \ | 42055 | __ai uint16_t vaddlv_u8(uint8x8_t __p0) { |
| 40831 | bfloat16x4x2_t __s1 = __p1; \ | 42056 | uint16_t __ret; |
| 40832 | bfloat16x4x2_t __rev1; \ | 42057 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40833 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 42058 | __ret = (uint16_t) __builtin_neon_vaddlv_u8(__rev0); |
| 40834 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 42059 | return __ret; |
| 40835 | __builtin_neon_vst2_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 11); \ | 42060 | } |
| 40836 | }) | | |
| 40837 | #endif | 42061 | #endif |
| 40838 | | 42062 | |
| 40839 | #ifdef __LITTLE_ENDIAN__ | 42063 | #ifdef __LITTLE_ENDIAN__ |
| 40840 | #define vst2q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 42064 | __ai uint64_t vaddlv_u32(uint32x2_t __p0) { |
| 40841 | bfloat16x8x2_t __s1 = __p1; \ | 42065 | uint64_t __ret; |
| 40842 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 43); \ | 42066 | __ret = (uint64_t) __builtin_neon_vaddlv_u32(__p0); |
| 40843 | }) | 42067 | return __ret; |
| | 42068 | } |
| 40844 | #else | 42069 | #else |
| 40845 | #define vst2q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 42070 | __ai uint64_t vaddlv_u32(uint32x2_t __p0) { |
| 40846 | bfloat16x8x2_t __s1 = __p1; \ | 42071 | uint64_t __ret; |
| 40847 | bfloat16x8x2_t __rev1; \ | 42072 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 40848 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42073 | __ret = (uint64_t) __builtin_neon_vaddlv_u32(__rev0); |
| 40849 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42074 | return __ret; |
| 40850 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 43); \ | 42075 | } |
| 40851 | }) | | |
| 40852 | #endif | 42076 | #endif |
| 40853 | | 42077 | |
| 40854 | #ifdef __LITTLE_ENDIAN__ | 42078 | #ifdef __LITTLE_ENDIAN__ |
| 40855 | #define vst2_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 42079 | __ai uint32_t vaddlv_u16(uint16x4_t __p0) { |
| 40856 | bfloat16x4x2_t __s1 = __p1; \ | 42080 | uint32_t __ret; |
| 40857 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 11); \ | 42081 | __ret = (uint32_t) __builtin_neon_vaddlv_u16(__p0); |
| 40858 | }) | 42082 | return __ret; |
| | 42083 | } |
| 40859 | #else | 42084 | #else |
| 40860 | #define vst2_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 42085 | __ai uint32_t vaddlv_u16(uint16x4_t __p0) { |
| 40861 | bfloat16x4x2_t __s1 = __p1; \ | 42086 | uint32_t __ret; |
| 40862 | bfloat16x4x2_t __rev1; \ | 42087 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40863 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 42088 | __ret = (uint32_t) __builtin_neon_vaddlv_u16(__rev0); |
| 40864 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 42089 | return __ret; |
| 40865 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 11); \ | 42090 | } |
| 40866 | }) | | |
| 40867 | #endif | 42091 | #endif |
| 40868 | | 42092 | |
| 40869 | #ifdef __LITTLE_ENDIAN__ | 42093 | #ifdef __LITTLE_ENDIAN__ |
| 40870 | #define vst3q_bf16(__p0, __p1) __extension__ ({ \ | 42094 | __ai int16_t vaddlv_s8(int8x8_t __p0) { |
| 40871 | bfloat16x8x3_t __s1 = __p1; \ | 42095 | int16_t __ret; |
| 40872 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 43); \ | 42096 | __ret = (int16_t) __builtin_neon_vaddlv_s8(__p0); |
| 40873 | }) | 42097 | return __ret; |
| | 42098 | } |
| 40874 | #else | 42099 | #else |
| 40875 | #define vst3q_bf16(__p0, __p1) __extension__ ({ \ | 42100 | __ai int16_t vaddlv_s8(int8x8_t __p0) { |
| 40876 | bfloat16x8x3_t __s1 = __p1; \ | 42101 | int16_t __ret; |
| 40877 | bfloat16x8x3_t __rev1; \ | 42102 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40878 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42103 | __ret = (int16_t) __builtin_neon_vaddlv_s8(__rev0); |
| 40879 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42104 | return __ret; |
| 40880 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42105 | } |
| 40881 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 43); \ | | |
| 40882 | }) | | |
| 40883 | #endif | 42106 | #endif |
| 40884 | | 42107 | |
| 40885 | #ifdef __LITTLE_ENDIAN__ | 42108 | #ifdef __LITTLE_ENDIAN__ |
| 40886 | #define vst3_bf16(__p0, __p1) __extension__ ({ \ | 42109 | __ai int64_t vaddlv_s32(int32x2_t __p0) { |
| 40887 | bfloat16x4x3_t __s1 = __p1; \ | 42110 | int64_t __ret; |
| 40888 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 11); \ | 42111 | __ret = (int64_t) __builtin_neon_vaddlv_s32(__p0); |
| 40889 | }) | 42112 | return __ret; |
| | 42113 | } |
| 40890 | #else | 42114 | #else |
| 40891 | #define vst3_bf16(__p0, __p1) __extension__ ({ \ | 42115 | __ai int64_t vaddlv_s32(int32x2_t __p0) { |
| 40892 | bfloat16x4x3_t __s1 = __p1; \ | 42116 | int64_t __ret; |
| 40893 | bfloat16x4x3_t __rev1; \ | 42117 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 40894 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 42118 | __ret = (int64_t) __builtin_neon_vaddlv_s32(__rev0); |
| 40895 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 42119 | return __ret; |
| 40896 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 42120 | } |
| 40897 | __builtin_neon_vst3_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 11); \ | | |
| 40898 | }) | | |
| 40899 | #endif | 42121 | #endif |
| 40900 | | 42122 | |
| 40901 | #ifdef __LITTLE_ENDIAN__ | 42123 | #ifdef __LITTLE_ENDIAN__ |
| 40902 | #define vst3q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 42124 | __ai int32_t vaddlv_s16(int16x4_t __p0) { |
| 40903 | bfloat16x8x3_t __s1 = __p1; \ | 42125 | int32_t __ret; |
| 40904 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 43); \ | 42126 | __ret = (int32_t) __builtin_neon_vaddlv_s16(__p0); |
| 40905 | }) | 42127 | return __ret; |
| | 42128 | } |
| 40906 | #else | 42129 | #else |
| 40907 | #define vst3q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 42130 | __ai int32_t vaddlv_s16(int16x4_t __p0) { |
| 40908 | bfloat16x8x3_t __s1 = __p1; \ | 42131 | int32_t __ret; |
| 40909 | bfloat16x8x3_t __rev1; \ | 42132 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40910 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42133 | __ret = (int32_t) __builtin_neon_vaddlv_s16(__rev0); |
| 40911 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42134 | return __ret; |
| 40912 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42135 | } |
| 40913 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 43); \ | | |
| 40914 | }) | | |
| 40915 | #endif | 42136 | #endif |
| 40916 | | 42137 | |
| 40917 | #ifdef __LITTLE_ENDIAN__ | 42138 | #ifdef __LITTLE_ENDIAN__ |
| 40918 | #define vst3_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 42139 | __ai uint8_t vaddvq_u8(uint8x16_t __p0) { |
| 40919 | bfloat16x4x3_t __s1 = __p1; \ | 42140 | uint8_t __ret; |
| 40920 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 11); \ | 42141 | __ret = (uint8_t) __builtin_neon_vaddvq_u8(__p0); |
| 40921 | }) | 42142 | return __ret; |
| | 42143 | } |
| 40922 | #else | 42144 | #else |
| 40923 | #define vst3_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 42145 | __ai uint8_t vaddvq_u8(uint8x16_t __p0) { |
| 40924 | bfloat16x4x3_t __s1 = __p1; \ | 42146 | uint8_t __ret; |
| 40925 | bfloat16x4x3_t __rev1; \ | 42147 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40926 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 42148 | __ret = (uint8_t) __builtin_neon_vaddvq_u8(__rev0); |
| 40927 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 42149 | return __ret; |
| 40928 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 42150 | } |
| 40929 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 11); \ | | |
| 40930 | }) | | |
| 40931 | #endif | 42151 | #endif |
| 40932 | | 42152 | |
| 40933 | #ifdef __LITTLE_ENDIAN__ | 42153 | #ifdef __LITTLE_ENDIAN__ |
| 40934 | #define vst4q_bf16(__p0, __p1) __extension__ ({ \ | 42154 | __ai uint32_t vaddvq_u32(uint32x4_t __p0) { |
| 40935 | bfloat16x8x4_t __s1 = __p1; \ | 42155 | uint32_t __ret; |
| 40936 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 43); \ | 42156 | __ret = (uint32_t) __builtin_neon_vaddvq_u32(__p0); |
| 40937 | }) | 42157 | return __ret; |
| | 42158 | } |
| 40938 | #else | 42159 | #else |
| 40939 | #define vst4q_bf16(__p0, __p1) __extension__ ({ \ | 42160 | __ai uint32_t vaddvq_u32(uint32x4_t __p0) { |
| 40940 | bfloat16x8x4_t __s1 = __p1; \ | 42161 | uint32_t __ret; |
| 40941 | bfloat16x8x4_t __rev1; \ | 42162 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40942 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42163 | __ret = (uint32_t) __builtin_neon_vaddvq_u32(__rev0); |
| 40943 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42164 | return __ret; |
| 40944 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42165 | } |
| 40945 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 40946 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 43); \ | | |
| 40947 | }) | | |
| 40948 | #endif | 42166 | #endif |
| 40949 | | 42167 | |
| 40950 | #ifdef __LITTLE_ENDIAN__ | 42168 | #ifdef __LITTLE_ENDIAN__ |
| 40951 | #define vst4_bf16(__p0, __p1) __extension__ ({ \ | 42169 | __ai uint64_t vaddvq_u64(uint64x2_t __p0) { |
| 40952 | bfloat16x4x4_t __s1 = __p1; \ | 42170 | uint64_t __ret; |
| 40953 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 11); \ | 42171 | __ret = (uint64_t) __builtin_neon_vaddvq_u64(__p0); |
| 40954 | }) | 42172 | return __ret; |
| 40955 | #else | 42173 | } |
| 40956 | #define vst4_bf16(__p0, __p1) __extension__ ({ \ | 42174 | #else |
| 40957 | bfloat16x4x4_t __s1 = __p1; \ | 42175 | __ai uint64_t vaddvq_u64(uint64x2_t __p0) { |
| 40958 | bfloat16x4x4_t __rev1; \ | 42176 | uint64_t __ret; |
| 40959 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 42177 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 40960 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 42178 | __ret = (uint64_t) __builtin_neon_vaddvq_u64(__rev0); |
| 40961 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 42179 | return __ret; |
| 40962 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 42180 | } |
| 40963 | __builtin_neon_vst4_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 11); \ | | |
| 40964 | }) | | |
| 40965 | #endif | 42181 | #endif |
| 40966 | | 42182 | |
| 40967 | #ifdef __LITTLE_ENDIAN__ | 42183 | #ifdef __LITTLE_ENDIAN__ |
| 40968 | #define vst4q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 42184 | __ai uint16_t vaddvq_u16(uint16x8_t __p0) { |
| 40969 | bfloat16x8x4_t __s1 = __p1; \ | 42185 | uint16_t __ret; |
| 40970 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 43); \ | 42186 | __ret = (uint16_t) __builtin_neon_vaddvq_u16(__p0); |
| 40971 | }) | 42187 | return __ret; |
| | 42188 | } |
| 40972 | #else | 42189 | #else |
| 40973 | #define vst4q_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 42190 | __ai uint16_t vaddvq_u16(uint16x8_t __p0) { |
| 40974 | bfloat16x8x4_t __s1 = __p1; \ | 42191 | uint16_t __ret; |
| 40975 | bfloat16x8x4_t __rev1; \ | 42192 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40976 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42193 | __ret = (uint16_t) __builtin_neon_vaddvq_u16(__rev0); |
| 40977 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42194 | return __ret; |
| 40978 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 42195 | } |
| 40979 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 40980 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 43); \ | | |
| 40981 | }) | | |
| 40982 | #endif | 42196 | #endif |
| 40983 | | 42197 | |
| 40984 | #ifdef __LITTLE_ENDIAN__ | 42198 | #ifdef __LITTLE_ENDIAN__ |
| 40985 | #define vst4_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 42199 | __ai int8_t vaddvq_s8(int8x16_t __p0) { |
| 40986 | bfloat16x4x4_t __s1 = __p1; \ | 42200 | int8_t __ret; |
| 40987 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 11); \ | 42201 | __ret = (int8_t) __builtin_neon_vaddvq_s8(__p0); |
| 40988 | }) | 42202 | return __ret; |
| | 42203 | } |
| 40989 | #else | 42204 | #else |
| 40990 | #define vst4_lane_bf16(__p0, __p1, __p2) __extension__ ({ \ | 42205 | __ai int8_t vaddvq_s8(int8x16_t __p0) { |
| 40991 | bfloat16x4x4_t __s1 = __p1; \ | 42206 | int8_t __ret; |
| 40992 | bfloat16x4x4_t __rev1; \ | 42207 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40993 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 42208 | __ret = (int8_t) __builtin_neon_vaddvq_s8(__rev0); |
| 40994 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 42209 | return __ret; |
| 40995 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 42210 | } |
| 40996 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | | |
| 40997 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 11); \ | | |
| 40998 | }) | | |
| 40999 | #endif | 42211 | #endif |
| 41000 | | 42212 | |
| 41001 | #endif | | |
| 41002 | #if defined(__ARM_FEATURE_BF16_VECTOR_ARITHMETIC) && !defined(__aarch64__) | | |
| 41003 | #ifdef __LITTLE_ENDIAN__ | 42213 | #ifdef __LITTLE_ENDIAN__ |
| 41004 | __ai bfloat16x4_t __a32_vcvt_bf16_f32(float32x4_t __p0) { | 42214 | __ai float64_t vaddvq_f64(float64x2_t __p0) { |
| 41005 | bfloat16x4_t __ret; | 42215 | float64_t __ret; |
| 41006 | __ret = (bfloat16x4_t) __builtin_neon___a32_vcvt_bf16_v((int8x16_t)__p0, 11); | 42216 | __ret = (float64_t) __builtin_neon_vaddvq_f64(__p0); |
| 41007 | return __ret; | 42217 | return __ret; |
| 41008 | } | 42218 | } |
| 41009 | #else | 42219 | #else |
| 41010 | __ai bfloat16x4_t __a32_vcvt_bf16_f32(float32x4_t __p0) { | 42220 | __ai float64_t vaddvq_f64(float64x2_t __p0) { |
| 41011 | bfloat16x4_t __ret; | 42221 | float64_t __ret; |
| 41012 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 42222 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41013 | __ret = (bfloat16x4_t) __builtin_neon___a32_vcvt_bf16_v((int8x16_t)__rev0, 11); | 42223 | __ret = (float64_t) __builtin_neon_vaddvq_f64(__rev0); |
| 41014 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 41015 | return __ret; | | |
| 41016 | } | | |
| 41017 | __ai bfloat16x4_t __noswap___a32_vcvt_bf16_f32(float32x4_t __p0) { | | |
| 41018 | bfloat16x4_t __ret; | | |
| 41019 | __ret = (bfloat16x4_t) __builtin_neon___a32_vcvt_bf16_v((int8x16_t)__p0, 11); | | |
| 41020 | return __ret; | 42224 | return __ret; |
| 41021 | } | 42225 | } |
| 41022 | #endif | 42226 | #endif |
| 41023 | | 42227 | |
| 41024 | #ifdef __LITTLE_ENDIAN__ | 42228 | #ifdef __LITTLE_ENDIAN__ |
| 41025 | __ai bfloat16x4_t vcvt_bf16_f32(float32x4_t __p0) { | 42229 | __ai float32_t vaddvq_f32(float32x4_t __p0) { |
| 41026 | bfloat16x4_t __ret; | 42230 | float32_t __ret; |
| 41027 | __ret = __a32_vcvt_bf16_f32(__p0); | 42231 | __ret = (float32_t) __builtin_neon_vaddvq_f32(__p0); |
| 41028 | return __ret; | 42232 | return __ret; |
| 41029 | } | 42233 | } |
| 41030 | #else | 42234 | #else |
| 41031 | __ai bfloat16x4_t vcvt_bf16_f32(float32x4_t __p0) { | 42235 | __ai float32_t vaddvq_f32(float32x4_t __p0) { |
| 41032 | bfloat16x4_t __ret; | 42236 | float32_t __ret; |
| 41033 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 42237 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 41034 | __ret = __noswap___a32_vcvt_bf16_f32(__rev0); | 42238 | __ret = (float32_t) __builtin_neon_vaddvq_f32(__rev0); |
| 41035 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 41036 | return __ret; | 42239 | return __ret; |
| 41037 | } | 42240 | } |
| 41038 | #endif | 42241 | #endif |
| 41039 | | 42242 | |
| 41040 | #ifdef __LITTLE_ENDIAN__ | 42243 | #ifdef __LITTLE_ENDIAN__ |
| 41041 | __ai bfloat16x8_t vcvtq_high_bf16_f32(bfloat16x8_t __p0, float32x4_t __p1) { | 42244 | __ai int32_t vaddvq_s32(int32x4_t __p0) { |
| 41042 | bfloat16x8_t __ret; | 42245 | int32_t __ret; |
| 41043 | __ret = vcombine_bf16(__a32_vcvt_bf16_f32(__p1), vget_low_bf16(__p0)); | 42246 | __ret = (int32_t) __builtin_neon_vaddvq_s32(__p0); |
| 41044 | return __ret; | 42247 | return __ret; |
| 41045 | } | 42248 | } |
| 41046 | #else | 42249 | #else |
| 41047 | __ai bfloat16x8_t vcvtq_high_bf16_f32(bfloat16x8_t __p0, float32x4_t __p1) { | 42250 | __ai int32_t vaddvq_s32(int32x4_t __p0) { |
| 41048 | bfloat16x8_t __ret; | 42251 | int32_t __ret; |
| 41049 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 42252 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 41050 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 42253 | __ret = (int32_t) __builtin_neon_vaddvq_s32(__rev0); |
| 41051 | __ret = __noswap_vcombine_bf16(__noswap___a32_vcvt_bf16_f32(__rev1), __noswap_vget_low_bf16(__rev0)); | | |
| 41052 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 41053 | return __ret; | 42254 | return __ret; |
| 41054 | } | 42255 | } |
| 41055 | #endif | 42256 | #endif |
| 41056 | | 42257 | |
| 41057 | #ifdef __LITTLE_ENDIAN__ | 42258 | #ifdef __LITTLE_ENDIAN__ |
| 41058 | __ai bfloat16x8_t vcvtq_low_bf16_f32(float32x4_t __p0) { | 42259 | __ai int64_t vaddvq_s64(int64x2_t __p0) { |
| 41059 | bfloat16x8_t __ret; | 42260 | int64_t __ret; |
| 41060 | __ret = vcombine_bf16((bfloat16x4_t)(0ULL), __a32_vcvt_bf16_f32(__p0)); | 42261 | __ret = (int64_t) __builtin_neon_vaddvq_s64(__p0); |
| 41061 | return __ret; | 42262 | return __ret; |
| 41062 | } | 42263 | } |
| 41063 | #else | 42264 | #else |
| 41064 | __ai bfloat16x8_t vcvtq_low_bf16_f32(float32x4_t __p0) { | 42265 | __ai int64_t vaddvq_s64(int64x2_t __p0) { |
| 41065 | bfloat16x8_t __ret; | 42266 | int64_t __ret; |
| 41066 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 42267 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41067 | __ret = __noswap_vcombine_bf16((bfloat16x4_t)(0ULL), __noswap___a32_vcvt_bf16_f32(__rev0)); | 42268 | __ret = (int64_t) __builtin_neon_vaddvq_s64(__rev0); |
| 41068 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 41069 | return __ret; | 42269 | return __ret; |
| 41070 | } | 42270 | } |
| 41071 | #endif | 42271 | #endif |
| 41072 | | 42272 | |
| 41073 | #endif | | |
| 41074 | #if defined(__ARM_FEATURE_BF16_VECTOR_ARITHMETIC) && defined(__aarch64__) | | |
| 41075 | #ifdef __LITTLE_ENDIAN__ | 42273 | #ifdef __LITTLE_ENDIAN__ |
| 41076 | __ai bfloat16x8_t __a64_vcvtq_low_bf16_f32(float32x4_t __p0) { | 42274 | __ai int16_t vaddvq_s16(int16x8_t __p0) { |
| 41077 | bfloat16x8_t __ret; | 42275 | int16_t __ret; |
| 41078 | __ret = (bfloat16x8_t) __builtin_neon___a64_vcvtq_low_bf16_v((int8x16_t)__p0, 43); | 42276 | __ret = (int16_t) __builtin_neon_vaddvq_s16(__p0); |
| 41079 | return __ret; | 42277 | return __ret; |
| 41080 | } | 42278 | } |
| 41081 | #else | 42279 | #else |
| 41082 | __ai bfloat16x8_t __a64_vcvtq_low_bf16_f32(float32x4_t __p0) { | 42280 | __ai int16_t vaddvq_s16(int16x8_t __p0) { |
| 41083 | bfloat16x8_t __ret; | 42281 | int16_t __ret; |
| 41084 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 42282 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41085 | __ret = (bfloat16x8_t) __builtin_neon___a64_vcvtq_low_bf16_v((int8x16_t)__rev0, 43); | 42283 | __ret = (int16_t) __builtin_neon_vaddvq_s16(__rev0); |
| 41086 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 41087 | return __ret; | | |
| 41088 | } | | |
| 41089 | __ai bfloat16x8_t __noswap___a64_vcvtq_low_bf16_f32(float32x4_t __p0) { | | |
| 41090 | bfloat16x8_t __ret; | | |
| 41091 | __ret = (bfloat16x8_t) __builtin_neon___a64_vcvtq_low_bf16_v((int8x16_t)__p0, 43); | | |
| 41092 | return __ret; | 42284 | return __ret; |
| 41093 | } | 42285 | } |
| 41094 | #endif | 42286 | #endif |
| 41095 | | 42287 | |
| 41096 | #ifdef __LITTLE_ENDIAN__ | 42288 | #ifdef __LITTLE_ENDIAN__ |
| 41097 | #define vcopyq_lane_bf16(__p0_161, __p1_161, __p2_161, __p3_161) __extension__ ({ \ | 42289 | __ai uint8_t vaddv_u8(uint8x8_t __p0) { |
| 41098 | bfloat16x8_t __ret_161; \ | 42290 | uint8_t __ret; |
| 41099 | bfloat16x8_t __s0_161 = __p0_161; \ | 42291 | __ret = (uint8_t) __builtin_neon_vaddv_u8(__p0); |
| 41100 | bfloat16x4_t __s2_161 = __p2_161; \ | 42292 | return __ret; |
| 41101 | __ret_161 = vsetq_lane_bf16(vget_lane_bf16(__s2_161, __p3_161), __s0_161, __p1_161); \ | 42293 | } |
| 41102 | __ret_161; \ | | |
| 41103 | }) | | |
| 41104 | #else | 42294 | #else |
| 41105 | #define vcopyq_lane_bf16(__p0_162, __p1_162, __p2_162, __p3_162) __extension__ ({ \ | 42295 | __ai uint8_t vaddv_u8(uint8x8_t __p0) { |
| 41106 | bfloat16x8_t __ret_162; \ | 42296 | uint8_t __ret; |
| 41107 | bfloat16x8_t __s0_162 = __p0_162; \ | 42297 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41108 | bfloat16x4_t __s2_162 = __p2_162; \ | 42298 | __ret = (uint8_t) __builtin_neon_vaddv_u8(__rev0); |
| 41109 | bfloat16x8_t __rev0_162; __rev0_162 = __builtin_shufflevector(__s0_162, __s0_162, 7, 6, 5, 4, 3, 2, 1, 0); \ | 42299 | return __ret; |
| 41110 | bfloat16x4_t __rev2_162; __rev2_162 = __builtin_shufflevector(__s2_162, __s2_162, 3, 2, 1, 0); \ | 42300 | } |
| 41111 | __ret_162 = __noswap_vsetq_lane_bf16(__noswap_vget_lane_bf16(__rev2_162, __p3_162), __rev0_162, __p1_162); \ | | |
| 41112 | __ret_162 = __builtin_shufflevector(__ret_162, __ret_162, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 41113 | __ret_162; \ | | |
| 41114 | }) | | |
| 41115 | #endif | 42301 | #endif |
| 41116 | | 42302 | |
| 41117 | #ifdef __LITTLE_ENDIAN__ | 42303 | #ifdef __LITTLE_ENDIAN__ |
| 41118 | #define vcopy_lane_bf16(__p0_163, __p1_163, __p2_163, __p3_163) __extension__ ({ \ | 42304 | __ai uint32_t vaddv_u32(uint32x2_t __p0) { |
| 41119 | bfloat16x4_t __ret_163; \ | 42305 | uint32_t __ret; |
| 41120 | bfloat16x4_t __s0_163 = __p0_163; \ | 42306 | __ret = (uint32_t) __builtin_neon_vaddv_u32(__p0); |
| 41121 | bfloat16x4_t __s2_163 = __p2_163; \ | 42307 | return __ret; |
| 41122 | __ret_163 = vset_lane_bf16(vget_lane_bf16(__s2_163, __p3_163), __s0_163, __p1_163); \ | 42308 | } |
| 41123 | __ret_163; \ | | |
| 41124 | }) | | |
| 41125 | #else | 42309 | #else |
| 41126 | #define vcopy_lane_bf16(__p0_164, __p1_164, __p2_164, __p3_164) __extension__ ({ \ | 42310 | __ai uint32_t vaddv_u32(uint32x2_t __p0) { |
| 41127 | bfloat16x4_t __ret_164; \ | 42311 | uint32_t __ret; |
| 41128 | bfloat16x4_t __s0_164 = __p0_164; \ | 42312 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41129 | bfloat16x4_t __s2_164 = __p2_164; \ | 42313 | __ret = (uint32_t) __builtin_neon_vaddv_u32(__rev0); |
| 41130 | bfloat16x4_t __rev0_164; __rev0_164 = __builtin_shufflevector(__s0_164, __s0_164, 3, 2, 1, 0); \ | 42314 | return __ret; |
| 41131 | bfloat16x4_t __rev2_164; __rev2_164 = __builtin_shufflevector(__s2_164, __s2_164, 3, 2, 1, 0); \ | 42315 | } |
| 41132 | __ret_164 = __noswap_vset_lane_bf16(__noswap_vget_lane_bf16(__rev2_164, __p3_164), __rev0_164, __p1_164); \ | | |
| 41133 | __ret_164 = __builtin_shufflevector(__ret_164, __ret_164, 3, 2, 1, 0); \ | | |
| 41134 | __ret_164; \ | | |
| 41135 | }) | | |
| 41136 | #endif | 42316 | #endif |
| 41137 | | 42317 | |
| 41138 | #ifdef __LITTLE_ENDIAN__ | 42318 | #ifdef __LITTLE_ENDIAN__ |
| 41139 | #define vcopyq_laneq_bf16(__p0_165, __p1_165, __p2_165, __p3_165) __extension__ ({ \ | 42319 | __ai uint16_t vaddv_u16(uint16x4_t __p0) { |
| 41140 | bfloat16x8_t __ret_165; \ | 42320 | uint16_t __ret; |
| 41141 | bfloat16x8_t __s0_165 = __p0_165; \ | 42321 | __ret = (uint16_t) __builtin_neon_vaddv_u16(__p0); |
| 41142 | bfloat16x8_t __s2_165 = __p2_165; \ | 42322 | return __ret; |
| 41143 | __ret_165 = vsetq_lane_bf16(vgetq_lane_bf16(__s2_165, __p3_165), __s0_165, __p1_165); \ | 42323 | } |
| 41144 | __ret_165; \ | | |
| 41145 | }) | | |
| 41146 | #else | 42324 | #else |
| 41147 | #define vcopyq_laneq_bf16(__p0_166, __p1_166, __p2_166, __p3_166) __extension__ ({ \ | 42325 | __ai uint16_t vaddv_u16(uint16x4_t __p0) { |
| 41148 | bfloat16x8_t __ret_166; \ | 42326 | uint16_t __ret; |
| 41149 | bfloat16x8_t __s0_166 = __p0_166; \ | 42327 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 41150 | bfloat16x8_t __s2_166 = __p2_166; \ | 42328 | __ret = (uint16_t) __builtin_neon_vaddv_u16(__rev0); |
| 41151 | bfloat16x8_t __rev0_166; __rev0_166 = __builtin_shufflevector(__s0_166, __s0_166, 7, 6, 5, 4, 3, 2, 1, 0); \ | 42329 | return __ret; |
| 41152 | bfloat16x8_t __rev2_166; __rev2_166 = __builtin_shufflevector(__s2_166, __s2_166, 7, 6, 5, 4, 3, 2, 1, 0); \ | 42330 | } |
| 41153 | __ret_166 = __noswap_vsetq_lane_bf16(__noswap_vgetq_lane_bf16(__rev2_166, __p3_166), __rev0_166, __p1_166); \ | | |
| 41154 | __ret_166 = __builtin_shufflevector(__ret_166, __ret_166, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 41155 | __ret_166; \ | | |
| 41156 | }) | | |
| 41157 | #endif | 42331 | #endif |
| 41158 | | 42332 | |
| 41159 | #ifdef __LITTLE_ENDIAN__ | 42333 | #ifdef __LITTLE_ENDIAN__ |
| 41160 | #define vcopy_laneq_bf16(__p0_167, __p1_167, __p2_167, __p3_167) __extension__ ({ \ | 42334 | __ai int8_t vaddv_s8(int8x8_t __p0) { |
| 41161 | bfloat16x4_t __ret_167; \ | 42335 | int8_t __ret; |
| 41162 | bfloat16x4_t __s0_167 = __p0_167; \ | 42336 | __ret = (int8_t) __builtin_neon_vaddv_s8(__p0); |
| 41163 | bfloat16x8_t __s2_167 = __p2_167; \ | 42337 | return __ret; |
| 41164 | __ret_167 = vset_lane_bf16(vgetq_lane_bf16(__s2_167, __p3_167), __s0_167, __p1_167); \ | 42338 | } |
| 41165 | __ret_167; \ | | |
| 41166 | }) | | |
| 41167 | #else | 42339 | #else |
| 41168 | #define vcopy_laneq_bf16(__p0_168, __p1_168, __p2_168, __p3_168) __extension__ ({ \ | 42340 | __ai int8_t vaddv_s8(int8x8_t __p0) { |
| 41169 | bfloat16x4_t __ret_168; \ | 42341 | int8_t __ret; |
| 41170 | bfloat16x4_t __s0_168 = __p0_168; \ | 42342 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41171 | bfloat16x8_t __s2_168 = __p2_168; \ | 42343 | __ret = (int8_t) __builtin_neon_vaddv_s8(__rev0); |
| 41172 | bfloat16x4_t __rev0_168; __rev0_168 = __builtin_shufflevector(__s0_168, __s0_168, 3, 2, 1, 0); \ | 42344 | return __ret; |
| 41173 | bfloat16x8_t __rev2_168; __rev2_168 = __builtin_shufflevector(__s2_168, __s2_168, 7, 6, 5, 4, 3, 2, 1, 0); \ | 42345 | } |
| 41174 | __ret_168 = __noswap_vset_lane_bf16(__noswap_vgetq_lane_bf16(__rev2_168, __p3_168), __rev0_168, __p1_168); \ | | |
| 41175 | __ret_168 = __builtin_shufflevector(__ret_168, __ret_168, 3, 2, 1, 0); \ | | |
| 41176 | __ret_168; \ | | |
| 41177 | }) | | |
| 41178 | #endif | 42346 | #endif |
| 41179 | | 42347 | |
| 41180 | #ifdef __LITTLE_ENDIAN__ | 42348 | #ifdef __LITTLE_ENDIAN__ |
| 41181 | __ai bfloat16x4_t vcvt_bf16_f32(float32x4_t __p0) { | 42349 | __ai float32_t vaddv_f32(float32x2_t __p0) { |
| 41182 | bfloat16x4_t __ret; | 42350 | float32_t __ret; |
| 41183 | __ret = vget_low_bf16(__a64_vcvtq_low_bf16_f32(__p0)); | 42351 | __ret = (float32_t) __builtin_neon_vaddv_f32(__p0); |
| 41184 | return __ret; | 42352 | return __ret; |
| 41185 | } | 42353 | } |
| 41186 | #else | 42354 | #else |
| 41187 | __ai bfloat16x4_t vcvt_bf16_f32(float32x4_t __p0) { | 42355 | __ai float32_t vaddv_f32(float32x2_t __p0) { |
| 41188 | bfloat16x4_t __ret; | 42356 | float32_t __ret; |
| 41189 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 42357 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41190 | __ret = __noswap_vget_low_bf16(__noswap___a64_vcvtq_low_bf16_f32(__rev0)); | 42358 | __ret = (float32_t) __builtin_neon_vaddv_f32(__rev0); |
| 41191 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 41192 | return __ret; | 42359 | return __ret; |
| 41193 | } | 42360 | } |
| 41194 | #endif | 42361 | #endif |
| 41195 | | 42362 | |
| 41196 | #ifdef __LITTLE_ENDIAN__ | 42363 | #ifdef __LITTLE_ENDIAN__ |
| 41197 | __ai bfloat16x8_t vcvtq_high_bf16_f32(bfloat16x8_t __p0, float32x4_t __p1) { | 42364 | __ai int32_t vaddv_s32(int32x2_t __p0) { |
| 41198 | bfloat16x8_t __ret; | 42365 | int32_t __ret; |
| 41199 | __ret = (bfloat16x8_t) __builtin_neon_vcvtq_high_bf16_v((int8x16_t)__p0, (int8x16_t)__p1, 43); | 42366 | __ret = (int32_t) __builtin_neon_vaddv_s32(__p0); |
| 41200 | return __ret; | 42367 | return __ret; |
| 41201 | } | 42368 | } |
| 41202 | #else | 42369 | #else |
| 41203 | __ai bfloat16x8_t vcvtq_high_bf16_f32(bfloat16x8_t __p0, float32x4_t __p1) { | 42370 | __ai int32_t vaddv_s32(int32x2_t __p0) { |
| 41204 | bfloat16x8_t __ret; | 42371 | int32_t __ret; |
| 41205 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 42372 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41206 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 42373 | __ret = (int32_t) __builtin_neon_vaddv_s32(__rev0); |
| 41207 | __ret = (bfloat16x8_t) __builtin_neon_vcvtq_high_bf16_v((int8x16_t)__rev0, (int8x16_t)__rev1, 43); | | |
| 41208 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 41209 | return __ret; | 42374 | return __ret; |
| 41210 | } | 42375 | } |
| 41211 | #endif | 42376 | #endif |
| 41212 | | 42377 | |
| 41213 | #ifdef __LITTLE_ENDIAN__ | 42378 | #ifdef __LITTLE_ENDIAN__ |
| 41214 | __ai bfloat16x8_t vcvtq_low_bf16_f32(float32x4_t __p0) { | 42379 | __ai int16_t vaddv_s16(int16x4_t __p0) { |
| 41215 | bfloat16x8_t __ret; | 42380 | int16_t __ret; |
| 41216 | __ret = __a64_vcvtq_low_bf16_f32(__p0); | 42381 | __ret = (int16_t) __builtin_neon_vaddv_s16(__p0); |
| 41217 | return __ret; | 42382 | return __ret; |
| 41218 | } | 42383 | } |
| 41219 | #else | 42384 | #else |
| 41220 | __ai bfloat16x8_t vcvtq_low_bf16_f32(float32x4_t __p0) { | 42385 | __ai int16_t vaddv_s16(int16x4_t __p0) { |
| 41221 | bfloat16x8_t __ret; | 42386 | int16_t __ret; |
| 41222 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 42387 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 41223 | __ret = __noswap___a64_vcvtq_low_bf16_f32(__rev0); | 42388 | __ret = (int16_t) __builtin_neon_vaddv_s16(__rev0); |
| 41224 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 41225 | return __ret; | 42389 | return __ret; |
| 41226 | } | 42390 | } |
| 41227 | #endif | 42391 | #endif |
| 41228 | | 42392 | |
| 41229 | #endif | 42393 | __ai poly64x1_t vbsl_p64(uint64x1_t __p0, poly64x1_t __p1, poly64x1_t __p2) { |
| 41230 | #if defined(__ARM_FEATURE_COMPLEX) | 42394 | poly64x1_t __ret; |
| | 42395 | __ret = (poly64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 6); |
| | 42396 | return __ret; |
| | 42397 | } |
| 41231 | #ifdef __LITTLE_ENDIAN__ | 42398 | #ifdef __LITTLE_ENDIAN__ |
| 41232 | __ai float32x2_t vcadd_rot270_f32(float32x2_t __p0, float32x2_t __p1) { | 42399 | __ai poly64x2_t vbslq_p64(uint64x2_t __p0, poly64x2_t __p1, poly64x2_t __p2) { |
| 41233 | float32x2_t __ret; | 42400 | poly64x2_t __ret; |
| 41234 | __ret = (float32x2_t) __builtin_neon_vcadd_rot270_v((int8x8_t)__p0, (int8x8_t)__p1, 9); | 42401 | __ret = (poly64x2_t) __builtin_neon_vbslq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 38); |
| 41235 | return __ret; | 42402 | return __ret; |
| 41236 | } | 42403 | } |
| 41237 | #else | 42404 | #else |
| 41238 | __ai float32x2_t vcadd_rot270_f32(float32x2_t __p0, float32x2_t __p1) { | 42405 | __ai poly64x2_t vbslq_p64(uint64x2_t __p0, poly64x2_t __p1, poly64x2_t __p2) { |
| 41239 | float32x2_t __ret; | 42406 | poly64x2_t __ret; |
| 41240 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 42407 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41241 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 42408 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 41242 | __ret = (float32x2_t) __builtin_neon_vcadd_rot270_v((int8x8_t)__rev0, (int8x8_t)__rev1, 9); | 42409 | poly64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 42410 | __ret = (poly64x2_t) __builtin_neon_vbslq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 38); |
| 41243 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 42411 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41244 | return __ret; | 42412 | return __ret; |
| 41245 | } | 42413 | } |
| 41246 | #endif | 42414 | #endif |
| 41247 | | 42415 | |
| 41248 | #ifdef __LITTLE_ENDIAN__ | 42416 | #ifdef __LITTLE_ENDIAN__ |
| 41249 | __ai float32x2_t vcadd_rot90_f32(float32x2_t __p0, float32x2_t __p1) { | 42417 | __ai float64x2_t vbslq_f64(uint64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 41250 | float32x2_t __ret; | 42418 | float64x2_t __ret; |
| 41251 | __ret = (float32x2_t) __builtin_neon_vcadd_rot90_v((int8x8_t)__p0, (int8x8_t)__p1, 9); | 42419 | __ret = (float64x2_t) __builtin_neon_vbslq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); |
| 41252 | return __ret; | 42420 | return __ret; |
| 41253 | } | 42421 | } |
| 41254 | #else | 42422 | #else |
| 41255 | __ai float32x2_t vcadd_rot90_f32(float32x2_t __p0, float32x2_t __p1) { | 42423 | __ai float64x2_t vbslq_f64(uint64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 41256 | float32x2_t __ret; | 42424 | float64x2_t __ret; |
| 41257 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 42425 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41258 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 42426 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 41259 | __ret = (float32x2_t) __builtin_neon_vcadd_rot90_v((int8x8_t)__rev0, (int8x8_t)__rev1, 9); | 42427 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 42428 | __ret = (float64x2_t) __builtin_neon_vbslq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 42); |
| 41260 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 42429 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41261 | return __ret; | 42430 | return __ret; |
| 41262 | } | 42431 | } |
| 41263 | #endif | 42432 | #endif |
| 41264 | | 42433 | |
| | 42434 | __ai float64x1_t vbsl_f64(uint64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| | 42435 | float64x1_t __ret; |
| | 42436 | __ret = (float64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); |
| | 42437 | return __ret; |
| | 42438 | } |
| 41265 | #ifdef __LITTLE_ENDIAN__ | 42439 | #ifdef __LITTLE_ENDIAN__ |
| 41266 | __ai float32x4_t vcaddq_rot270_f32(float32x4_t __p0, float32x4_t __p1) { | 42440 | __ai uint64x2_t vcageq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 41267 | float32x4_t __ret; | 42441 | uint64x2_t __ret; |
| 41268 | __ret = (float32x4_t) __builtin_neon_vcaddq_rot270_v((int8x16_t)__p0, (int8x16_t)__p1, 41); | 42442 | __ret = (uint64x2_t) __builtin_neon_vcageq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); |
| 41269 | return __ret; | 42443 | return __ret; |
| 41270 | } | 42444 | } |
| 41271 | #else | 42445 | #else |
| 41272 | __ai float32x4_t vcaddq_rot270_f32(float32x4_t __p0, float32x4_t __p1) { | 42446 | __ai uint64x2_t vcageq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 41273 | float32x4_t __ret; | 42447 | uint64x2_t __ret; |
| 41274 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 42448 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41275 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 42449 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 41276 | __ret = (float32x4_t) __builtin_neon_vcaddq_rot270_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); | 42450 | __ret = (uint64x2_t) __builtin_neon_vcageq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); |
| 41277 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 42451 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41278 | return __ret; | 42452 | return __ret; |
| 41279 | } | 42453 | } |
| 41280 | #endif | 42454 | #endif |
| 41281 | | 42455 | |
| | 42456 | __ai uint64x1_t vcage_f64(float64x1_t __p0, float64x1_t __p1) { |
| | 42457 | uint64x1_t __ret; |
| | 42458 | __ret = (uint64x1_t) __builtin_neon_vcage_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| | 42459 | return __ret; |
| | 42460 | } |
| | 42461 | __ai uint64_t vcaged_f64(float64_t __p0, float64_t __p1) { |
| | 42462 | uint64_t __ret; |
| | 42463 | __ret = (uint64_t) __builtin_neon_vcaged_f64(__p0, __p1); |
| | 42464 | return __ret; |
| | 42465 | } |
| | 42466 | __ai uint32_t vcages_f32(float32_t __p0, float32_t __p1) { |
| | 42467 | uint32_t __ret; |
| | 42468 | __ret = (uint32_t) __builtin_neon_vcages_f32(__p0, __p1); |
| | 42469 | return __ret; |
| | 42470 | } |
| 41282 | #ifdef __LITTLE_ENDIAN__ | 42471 | #ifdef __LITTLE_ENDIAN__ |
| 41283 | __ai float32x4_t vcaddq_rot90_f32(float32x4_t __p0, float32x4_t __p1) { | 42472 | __ai uint64x2_t vcagtq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 41284 | float32x4_t __ret; | 42473 | uint64x2_t __ret; |
| 41285 | __ret = (float32x4_t) __builtin_neon_vcaddq_rot90_v((int8x16_t)__p0, (int8x16_t)__p1, 41); | 42474 | __ret = (uint64x2_t) __builtin_neon_vcagtq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); |
| 41286 | return __ret; | 42475 | return __ret; |
| 41287 | } | 42476 | } |
| 41288 | #else | 42477 | #else |
| 41289 | __ai float32x4_t vcaddq_rot90_f32(float32x4_t __p0, float32x4_t __p1) { | 42478 | __ai uint64x2_t vcagtq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 41290 | float32x4_t __ret; | 42479 | uint64x2_t __ret; |
| 41291 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 42480 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41292 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 42481 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 41293 | __ret = (float32x4_t) __builtin_neon_vcaddq_rot90_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); | 42482 | __ret = (uint64x2_t) __builtin_neon_vcagtq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); |
| 41294 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 42483 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41295 | return __ret; | 42484 | return __ret; |
| 41296 | } | 42485 | } |
| 41297 | #endif | 42486 | #endif |
| 41298 | | 42487 | |
| 41299 | #ifdef __LITTLE_ENDIAN__ | 42488 | __ai uint64x1_t vcagt_f64(float64x1_t __p0, float64x1_t __p1) { |
| 41300 | __ai float32x4_t vcmlaq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | 42489 | uint64x1_t __ret; |
| 41301 | float32x4_t __ret; | 42490 | __ret = (uint64x1_t) __builtin_neon_vcagt_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 41302 | __ret = (float32x4_t) __builtin_neon_vcmlaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | | |
| 41303 | return __ret; | 42491 | return __ret; |
| 41304 | } | 42492 | } |
| 41305 | #else | 42493 | __ai uint64_t vcagtd_f64(float64_t __p0, float64_t __p1) { |
| 41306 | __ai float32x4_t vcmlaq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | 42494 | uint64_t __ret; |
| 41307 | float32x4_t __ret; | 42495 | __ret = (uint64_t) __builtin_neon_vcagtd_f64(__p0, __p1); |
| 41308 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 41309 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 41310 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | | |
| 41311 | __ret = (float32x4_t) __builtin_neon_vcmlaq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); | | |
| 41312 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 41313 | return __ret; | 42496 | return __ret; |
| 41314 | } | 42497 | } |
| 41315 | __ai float32x4_t __noswap_vcmlaq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | 42498 | __ai uint32_t vcagts_f32(float32_t __p0, float32_t __p1) { |
| 41316 | float32x4_t __ret; | 42499 | uint32_t __ret; |
| 41317 | __ret = (float32x4_t) __builtin_neon_vcmlaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | 42500 | __ret = (uint32_t) __builtin_neon_vcagts_f32(__p0, __p1); |
| 41318 | return __ret; | 42501 | return __ret; |
| 41319 | } | 42502 | } |
| 41320 | #endif | | |
| 41321 | | | |
| 41322 | #ifdef __LITTLE_ENDIAN__ | 42503 | #ifdef __LITTLE_ENDIAN__ |
| 41323 | __ai float32x2_t vcmla_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | 42504 | __ai uint64x2_t vcaleq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 41324 | float32x2_t __ret; | 42505 | uint64x2_t __ret; |
| 41325 | __ret = (float32x2_t) __builtin_neon_vcmla_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | 42506 | __ret = (uint64x2_t) __builtin_neon_vcaleq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); |
| 41326 | return __ret; | 42507 | return __ret; |
| 41327 | } | 42508 | } |
| 41328 | #else | 42509 | #else |
| 41329 | __ai float32x2_t vcmla_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | 42510 | __ai uint64x2_t vcaleq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 41330 | float32x2_t __ret; | 42511 | uint64x2_t __ret; |
| 41331 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 42512 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41332 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 42513 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 41333 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 42514 | __ret = (uint64x2_t) __builtin_neon_vcaleq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); |
| 41334 | __ret = (float32x2_t) __builtin_neon_vcmla_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); | | |
| 41335 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 42515 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41336 | return __ret; | 42516 | return __ret; |
| 41337 | } | 42517 | } |
| 41338 | __ai float32x2_t __noswap_vcmla_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | 42518 | #endif |
| 41339 | float32x2_t __ret; | 42519 | |
| 41340 | __ret = (float32x2_t) __builtin_neon_vcmla_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | 42520 | __ai uint64x1_t vcale_f64(float64x1_t __p0, float64x1_t __p1) { |
| | 42521 | uint64x1_t __ret; |
| | 42522 | __ret = (uint64x1_t) __builtin_neon_vcale_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| | 42523 | return __ret; |
| | 42524 | } |
| | 42525 | __ai uint64_t vcaled_f64(float64_t __p0, float64_t __p1) { |
| | 42526 | uint64_t __ret; |
| | 42527 | __ret = (uint64_t) __builtin_neon_vcaled_f64(__p0, __p1); |
| | 42528 | return __ret; |
| | 42529 | } |
| | 42530 | __ai uint32_t vcales_f32(float32_t __p0, float32_t __p1) { |
| | 42531 | uint32_t __ret; |
| | 42532 | __ret = (uint32_t) __builtin_neon_vcales_f32(__p0, __p1); |
| | 42533 | return __ret; |
| | 42534 | } |
| | 42535 | #ifdef __LITTLE_ENDIAN__ |
| | 42536 | __ai uint64x2_t vcaltq_f64(float64x2_t __p0, float64x2_t __p1) { |
| | 42537 | uint64x2_t __ret; |
| | 42538 | __ret = (uint64x2_t) __builtin_neon_vcaltq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); |
| | 42539 | return __ret; |
| | 42540 | } |
| | 42541 | #else |
| | 42542 | __ai uint64x2_t vcaltq_f64(float64x2_t __p0, float64x2_t __p1) { |
| | 42543 | uint64x2_t __ret; |
| | 42544 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 42545 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 42546 | __ret = (uint64x2_t) __builtin_neon_vcaltq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); |
| | 42547 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41341 | return __ret; | 42548 | return __ret; |
| 41342 | } | 42549 | } |
| 41343 | #endif | 42550 | #endif |
| 41344 | | 42551 | |
| | 42552 | __ai uint64x1_t vcalt_f64(float64x1_t __p0, float64x1_t __p1) { |
| | 42553 | uint64x1_t __ret; |
| | 42554 | __ret = (uint64x1_t) __builtin_neon_vcalt_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| | 42555 | return __ret; |
| | 42556 | } |
| | 42557 | __ai uint64_t vcaltd_f64(float64_t __p0, float64_t __p1) { |
| | 42558 | uint64_t __ret; |
| | 42559 | __ret = (uint64_t) __builtin_neon_vcaltd_f64(__p0, __p1); |
| | 42560 | return __ret; |
| | 42561 | } |
| | 42562 | __ai uint32_t vcalts_f32(float32_t __p0, float32_t __p1) { |
| | 42563 | uint32_t __ret; |
| | 42564 | __ret = (uint32_t) __builtin_neon_vcalts_f32(__p0, __p1); |
| | 42565 | return __ret; |
| | 42566 | } |
| | 42567 | __ai uint64x1_t vceq_p64(poly64x1_t __p0, poly64x1_t __p1) { |
| | 42568 | uint64x1_t __ret; |
| | 42569 | __ret = (uint64x1_t)(__p0 == __p1); |
| | 42570 | return __ret; |
| | 42571 | } |
| 41345 | #ifdef __LITTLE_ENDIAN__ | 42572 | #ifdef __LITTLE_ENDIAN__ |
| 41346 | #define vcmla_lane_f32(__p0_169, __p1_169, __p2_169, __p3_169) __extension__ ({ \ | 42573 | __ai uint64x2_t vceqq_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 41347 | float32x2_t __ret_169; \ | 42574 | uint64x2_t __ret; |
| 41348 | float32x2_t __s0_169 = __p0_169; \ | 42575 | __ret = (uint64x2_t)(__p0 == __p1); |
| 41349 | float32x2_t __s1_169 = __p1_169; \ | 42576 | return __ret; |
| 41350 | float32x2_t __s2_169 = __p2_169; \ | 42577 | } |
| 41351 | float32x2_t __reint_169 = __s2_169; \ | | |
| 41352 | uint64x1_t __reint1_169 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_169, __p3_169)}; \ | | |
| 41353 | __ret_169 = vcmla_f32(__s0_169, __s1_169, *(float32x2_t *) &__reint1_169); \ | | |
| 41354 | __ret_169; \ | | |
| 41355 | }) | | |
| 41356 | #else | 42578 | #else |
| 41357 | #define vcmla_lane_f32(__p0_170, __p1_170, __p2_170, __p3_170) __extension__ ({ \ | 42579 | __ai uint64x2_t vceqq_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 41358 | float32x2_t __ret_170; \ | 42580 | uint64x2_t __ret; |
| 41359 | float32x2_t __s0_170 = __p0_170; \ | 42581 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41360 | float32x2_t __s1_170 = __p1_170; \ | 42582 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 41361 | float32x2_t __s2_170 = __p2_170; \ | 42583 | __ret = (uint64x2_t)(__rev0 == __rev1); |
| 41362 | float32x2_t __rev0_170; __rev0_170 = __builtin_shufflevector(__s0_170, __s0_170, 1, 0); \ | 42584 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41363 | float32x2_t __rev1_170; __rev1_170 = __builtin_shufflevector(__s1_170, __s1_170, 1, 0); \ | 42585 | return __ret; |
| 41364 | float32x2_t __rev2_170; __rev2_170 = __builtin_shufflevector(__s2_170, __s2_170, 1, 0); \ | 42586 | } |
| 41365 | float32x2_t __reint_170 = __rev2_170; \ | | |
| 41366 | uint64x1_t __reint1_170 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_170, __p3_170)}; \ | | |
| 41367 | __ret_170 = __noswap_vcmla_f32(__rev0_170, __rev1_170, *(float32x2_t *) &__reint1_170); \ | | |
| 41368 | __ret_170 = __builtin_shufflevector(__ret_170, __ret_170, 1, 0); \ | | |
| 41369 | __ret_170; \ | | |
| 41370 | }) | | |
| 41371 | #endif | 42587 | #endif |
| 41372 | | 42588 | |
| 41373 | #ifdef __LITTLE_ENDIAN__ | 42589 | #ifdef __LITTLE_ENDIAN__ |
| 41374 | #define vcmlaq_lane_f32(__p0_171, __p1_171, __p2_171, __p3_171) __extension__ ({ \ | 42590 | __ai uint64x2_t vceqq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 41375 | float32x4_t __ret_171; \ | 42591 | uint64x2_t __ret; |
| 41376 | float32x4_t __s0_171 = __p0_171; \ | 42592 | __ret = (uint64x2_t)(__p0 == __p1); |
| 41377 | float32x4_t __s1_171 = __p1_171; \ | 42593 | return __ret; |
| 41378 | float32x2_t __s2_171 = __p2_171; \ | 42594 | } |
| 41379 | float32x2_t __reint_171 = __s2_171; \ | | |
| 41380 | uint64x2_t __reint1_171 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_171, __p3_171), vget_lane_u64(*(uint64x1_t *) &__reint_171, __p3_171)}; \ | | |
| 41381 | __ret_171 = vcmlaq_f32(__s0_171, __s1_171, *(float32x4_t *) &__reint1_171); \ | | |
| 41382 | __ret_171; \ | | |
| 41383 | }) | | |
| 41384 | #else | 42595 | #else |
| 41385 | #define vcmlaq_lane_f32(__p0_172, __p1_172, __p2_172, __p3_172) __extension__ ({ \ | 42596 | __ai uint64x2_t vceqq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 41386 | float32x4_t __ret_172; \ | 42597 | uint64x2_t __ret; |
| 41387 | float32x4_t __s0_172 = __p0_172; \ | 42598 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41388 | float32x4_t __s1_172 = __p1_172; \ | 42599 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 41389 | float32x2_t __s2_172 = __p2_172; \ | 42600 | __ret = (uint64x2_t)(__rev0 == __rev1); |
| 41390 | float32x4_t __rev0_172; __rev0_172 = __builtin_shufflevector(__s0_172, __s0_172, 3, 2, 1, 0); \ | 42601 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41391 | float32x4_t __rev1_172; __rev1_172 = __builtin_shufflevector(__s1_172, __s1_172, 3, 2, 1, 0); \ | 42602 | return __ret; |
| 41392 | float32x2_t __rev2_172; __rev2_172 = __builtin_shufflevector(__s2_172, __s2_172, 1, 0); \ | 42603 | } |
| 41393 | float32x2_t __reint_172 = __rev2_172; \ | | |
| 41394 | uint64x2_t __reint1_172 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_172, __p3_172), vget_lane_u64(*(uint64x1_t *) &__reint_172, __p3_172)}; \ | | |
| 41395 | __ret_172 = __noswap_vcmlaq_f32(__rev0_172, __rev1_172, *(float32x4_t *) &__reint1_172); \ | | |
| 41396 | __ret_172 = __builtin_shufflevector(__ret_172, __ret_172, 3, 2, 1, 0); \ | | |
| 41397 | __ret_172; \ | | |
| 41398 | }) | | |
| 41399 | #endif | 42604 | #endif |
| 41400 | | 42605 | |
| 41401 | #ifdef __LITTLE_ENDIAN__ | 42606 | #ifdef __LITTLE_ENDIAN__ |
| 41402 | #define vcmla_laneq_f32(__p0_173, __p1_173, __p2_173, __p3_173) __extension__ ({ \ | 42607 | __ai uint64x2_t vceqq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 41403 | float32x2_t __ret_173; \ | 42608 | uint64x2_t __ret; |
| 41404 | float32x2_t __s0_173 = __p0_173; \ | 42609 | __ret = (uint64x2_t)(__p0 == __p1); |
| 41405 | float32x2_t __s1_173 = __p1_173; \ | 42610 | return __ret; |
| 41406 | float32x4_t __s2_173 = __p2_173; \ | 42611 | } |
| 41407 | float32x4_t __reint_173 = __s2_173; \ | | |
| 41408 | uint64x1_t __reint1_173 = (uint64x1_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_173, __p3_173)}; \ | | |
| 41409 | __ret_173 = vcmla_f32(__s0_173, __s1_173, *(float32x2_t *) &__reint1_173); \ | | |
| 41410 | __ret_173; \ | | |
| 41411 | }) | | |
| 41412 | #else | 42612 | #else |
| 41413 | #define vcmla_laneq_f32(__p0_174, __p1_174, __p2_174, __p3_174) __extension__ ({ \ | 42613 | __ai uint64x2_t vceqq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 41414 | float32x2_t __ret_174; \ | 42614 | uint64x2_t __ret; |
| 41415 | float32x2_t __s0_174 = __p0_174; \ | 42615 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41416 | float32x2_t __s1_174 = __p1_174; \ | 42616 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 41417 | float32x4_t __s2_174 = __p2_174; \ | 42617 | __ret = (uint64x2_t)(__rev0 == __rev1); |
| 41418 | float32x2_t __rev0_174; __rev0_174 = __builtin_shufflevector(__s0_174, __s0_174, 1, 0); \ | 42618 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41419 | float32x2_t __rev1_174; __rev1_174 = __builtin_shufflevector(__s1_174, __s1_174, 1, 0); \ | 42619 | return __ret; |
| 41420 | float32x4_t __rev2_174; __rev2_174 = __builtin_shufflevector(__s2_174, __s2_174, 3, 2, 1, 0); \ | 42620 | } |
| 41421 | float32x4_t __reint_174 = __rev2_174; \ | | |
| 41422 | uint64x1_t __reint1_174 = (uint64x1_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_174, __p3_174)}; \ | | |
| 41423 | __ret_174 = __noswap_vcmla_f32(__rev0_174, __rev1_174, *(float32x2_t *) &__reint1_174); \ | | |
| 41424 | __ret_174 = __builtin_shufflevector(__ret_174, __ret_174, 1, 0); \ | | |
| 41425 | __ret_174; \ | | |
| 41426 | }) | | |
| 41427 | #endif | 42621 | #endif |
| 41428 | | 42622 | |
| 41429 | #ifdef __LITTLE_ENDIAN__ | 42623 | #ifdef __LITTLE_ENDIAN__ |
| 41430 | #define vcmlaq_laneq_f32(__p0_175, __p1_175, __p2_175, __p3_175) __extension__ ({ \ | 42624 | __ai uint64x2_t vceqq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 41431 | float32x4_t __ret_175; \ | 42625 | uint64x2_t __ret; |
| 41432 | float32x4_t __s0_175 = __p0_175; \ | 42626 | __ret = (uint64x2_t)(__p0 == __p1); |
| 41433 | float32x4_t __s1_175 = __p1_175; \ | 42627 | return __ret; |
| 41434 | float32x4_t __s2_175 = __p2_175; \ | 42628 | } |
| 41435 | float32x4_t __reint_175 = __s2_175; \ | | |
| 41436 | uint64x2_t __reint1_175 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_175, __p3_175), vgetq_lane_u64(*(uint64x2_t *) &__reint_175, __p3_175)}; \ | | |
| 41437 | __ret_175 = vcmlaq_f32(__s0_175, __s1_175, *(float32x4_t *) &__reint1_175); \ | | |
| 41438 | __ret_175; \ | | |
| 41439 | }) | | |
| 41440 | #else | 42629 | #else |
| 41441 | #define vcmlaq_laneq_f32(__p0_176, __p1_176, __p2_176, __p3_176) __extension__ ({ \ | 42630 | __ai uint64x2_t vceqq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 41442 | float32x4_t __ret_176; \ | 42631 | uint64x2_t __ret; |
| 41443 | float32x4_t __s0_176 = __p0_176; \ | 42632 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41444 | float32x4_t __s1_176 = __p1_176; \ | 42633 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 41445 | float32x4_t __s2_176 = __p2_176; \ | 42634 | __ret = (uint64x2_t)(__rev0 == __rev1); |
| 41446 | float32x4_t __rev0_176; __rev0_176 = __builtin_shufflevector(__s0_176, __s0_176, 3, 2, 1, 0); \ | 42635 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41447 | float32x4_t __rev1_176; __rev1_176 = __builtin_shufflevector(__s1_176, __s1_176, 3, 2, 1, 0); \ | 42636 | return __ret; |
| 41448 | float32x4_t __rev2_176; __rev2_176 = __builtin_shufflevector(__s2_176, __s2_176, 3, 2, 1, 0); \ | 42637 | } |
| 41449 | float32x4_t __reint_176 = __rev2_176; \ | | |
| 41450 | uint64x2_t __reint1_176 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_176, __p3_176), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_176, __p3_176)}; \ | | |
| 41451 | __ret_176 = __noswap_vcmlaq_f32(__rev0_176, __rev1_176, *(float32x4_t *) &__reint1_176); \ | | |
| 41452 | __ret_176 = __builtin_shufflevector(__ret_176, __ret_176, 3, 2, 1, 0); \ | | |
| 41453 | __ret_176; \ | | |
| 41454 | }) | | |
| 41455 | #endif | 42638 | #endif |
| 41456 | | 42639 | |
| | 42640 | __ai uint64x1_t vceq_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| | 42641 | uint64x1_t __ret; |
| | 42642 | __ret = (uint64x1_t)(__p0 == __p1); |
| | 42643 | return __ret; |
| | 42644 | } |
| | 42645 | __ai uint64x1_t vceq_f64(float64x1_t __p0, float64x1_t __p1) { |
| | 42646 | uint64x1_t __ret; |
| | 42647 | __ret = (uint64x1_t)(__p0 == __p1); |
| | 42648 | return __ret; |
| | 42649 | } |
| | 42650 | __ai uint64x1_t vceq_s64(int64x1_t __p0, int64x1_t __p1) { |
| | 42651 | uint64x1_t __ret; |
| | 42652 | __ret = (uint64x1_t)(__p0 == __p1); |
| | 42653 | return __ret; |
| | 42654 | } |
| | 42655 | __ai uint64_t vceqd_u64(uint64_t __p0, uint64_t __p1) { |
| | 42656 | uint64_t __ret; |
| | 42657 | __ret = (uint64_t) __builtin_neon_vceqd_u64(__p0, __p1); |
| | 42658 | return __ret; |
| | 42659 | } |
| | 42660 | __ai uint64_t vceqd_s64(int64_t __p0, int64_t __p1) { |
| | 42661 | uint64_t __ret; |
| | 42662 | __ret = (uint64_t) __builtin_neon_vceqd_s64(__p0, __p1); |
| | 42663 | return __ret; |
| | 42664 | } |
| | 42665 | __ai uint64_t vceqd_f64(float64_t __p0, float64_t __p1) { |
| | 42666 | uint64_t __ret; |
| | 42667 | __ret = (uint64_t) __builtin_neon_vceqd_f64(__p0, __p1); |
| | 42668 | return __ret; |
| | 42669 | } |
| | 42670 | __ai uint32_t vceqs_f32(float32_t __p0, float32_t __p1) { |
| | 42671 | uint32_t __ret; |
| | 42672 | __ret = (uint32_t) __builtin_neon_vceqs_f32(__p0, __p1); |
| | 42673 | return __ret; |
| | 42674 | } |
| 41457 | #ifdef __LITTLE_ENDIAN__ | 42675 | #ifdef __LITTLE_ENDIAN__ |
| 41458 | __ai float32x4_t vcmlaq_rot180_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | 42676 | __ai uint8x8_t vceqz_p8(poly8x8_t __p0) { |
| 41459 | float32x4_t __ret; | 42677 | uint8x8_t __ret; |
| 41460 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot180_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | 42678 | __ret = (uint8x8_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 16); |
| 41461 | return __ret; | 42679 | return __ret; |
| 41462 | } | 42680 | } |
| 41463 | #else | 42681 | #else |
| 41464 | __ai float32x4_t vcmlaq_rot180_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | 42682 | __ai uint8x8_t vceqz_p8(poly8x8_t __p0) { |
| 41465 | float32x4_t __ret; | 42683 | uint8x8_t __ret; |
| 41466 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 42684 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41467 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 42685 | __ret = (uint8x8_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 16); |
| 41468 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 42686 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41469 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot180_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); | 42687 | return __ret; |
| 41470 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 42688 | } |
| | 42689 | #endif |
| | 42690 | |
| | 42691 | __ai uint64x1_t vceqz_p64(poly64x1_t __p0) { |
| | 42692 | uint64x1_t __ret; |
| | 42693 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); |
| | 42694 | return __ret; |
| | 42695 | } |
| | 42696 | #ifdef __LITTLE_ENDIAN__ |
| | 42697 | __ai uint8x16_t vceqzq_p8(poly8x16_t __p0) { |
| | 42698 | uint8x16_t __ret; |
| | 42699 | __ret = (uint8x16_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 48); |
| 41471 | return __ret; | 42700 | return __ret; |
| 41472 | } | 42701 | } |
| 41473 | __ai float32x4_t __noswap_vcmlaq_rot180_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | 42702 | #else |
| 41474 | float32x4_t __ret; | 42703 | __ai uint8x16_t vceqzq_p8(poly8x16_t __p0) { |
| 41475 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot180_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | 42704 | uint8x16_t __ret; |
| | 42705 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 42706 | __ret = (uint8x16_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 48); |
| | 42707 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41476 | return __ret; | 42708 | return __ret; |
| 41477 | } | 42709 | } |
| 41478 | #endif | 42710 | #endif |
| 41479 | | 42711 | |
| 41480 | #ifdef __LITTLE_ENDIAN__ | 42712 | #ifdef __LITTLE_ENDIAN__ |
| 41481 | __ai float32x2_t vcmla_rot180_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | 42713 | __ai uint64x2_t vceqzq_p64(poly64x2_t __p0) { |
| 41482 | float32x2_t __ret; | 42714 | uint64x2_t __ret; |
| 41483 | __ret = (float32x2_t) __builtin_neon_vcmla_rot180_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | 42715 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 51); |
| 41484 | return __ret; | 42716 | return __ret; |
| 41485 | } | 42717 | } |
| 41486 | #else | 42718 | #else |
| 41487 | __ai float32x2_t vcmla_rot180_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | 42719 | __ai uint64x2_t vceqzq_p64(poly64x2_t __p0) { |
| 41488 | float32x2_t __ret; | 42720 | uint64x2_t __ret; |
| 41489 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 42721 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41490 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 42722 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 51); |
| 41491 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 41492 | __ret = (float32x2_t) __builtin_neon_vcmla_rot180_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); | | |
| 41493 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 42723 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41494 | return __ret; | 42724 | return __ret; |
| 41495 | } | 42725 | } |
| 41496 | __ai float32x2_t __noswap_vcmla_rot180_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | | |
| 41497 | float32x2_t __ret; | | |
| 41498 | __ret = (float32x2_t) __builtin_neon_vcmla_rot180_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | | |
| 41499 | return __ret; | | |
| 41500 | } | | |
| 41501 | #endif | 42726 | #endif |
| 41502 | | 42727 | |
| 41503 | #ifdef __LITTLE_ENDIAN__ | 42728 | #ifdef __LITTLE_ENDIAN__ |
| 41504 | #define vcmla_rot180_lane_f32(__p0_177, __p1_177, __p2_177, __p3_177) __extension__ ({ \ | 42729 | __ai uint8x16_t vceqzq_u8(uint8x16_t __p0) { |
| 41505 | float32x2_t __ret_177; \ | 42730 | uint8x16_t __ret; |
| 41506 | float32x2_t __s0_177 = __p0_177; \ | 42731 | __ret = (uint8x16_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 48); |
| 41507 | float32x2_t __s1_177 = __p1_177; \ | 42732 | return __ret; |
| 41508 | float32x2_t __s2_177 = __p2_177; \ | 42733 | } |
| 41509 | float32x2_t __reint_177 = __s2_177; \ | | |
| 41510 | uint64x1_t __reint1_177 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_177, __p3_177)}; \ | | |
| 41511 | __ret_177 = vcmla_rot180_f32(__s0_177, __s1_177, *(float32x2_t *) &__reint1_177); \ | | |
| 41512 | __ret_177; \ | | |
| 41513 | }) | | |
| 41514 | #else | 42734 | #else |
| 41515 | #define vcmla_rot180_lane_f32(__p0_178, __p1_178, __p2_178, __p3_178) __extension__ ({ \ | 42735 | __ai uint8x16_t vceqzq_u8(uint8x16_t __p0) { |
| 41516 | float32x2_t __ret_178; \ | 42736 | uint8x16_t __ret; |
| 41517 | float32x2_t __s0_178 = __p0_178; \ | 42737 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41518 | float32x2_t __s1_178 = __p1_178; \ | 42738 | __ret = (uint8x16_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 48); |
| 41519 | float32x2_t __s2_178 = __p2_178; \ | 42739 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41520 | float32x2_t __rev0_178; __rev0_178 = __builtin_shufflevector(__s0_178, __s0_178, 1, 0); \ | 42740 | return __ret; |
| 41521 | float32x2_t __rev1_178; __rev1_178 = __builtin_shufflevector(__s1_178, __s1_178, 1, 0); \ | 42741 | } |
| 41522 | float32x2_t __rev2_178; __rev2_178 = __builtin_shufflevector(__s2_178, __s2_178, 1, 0); \ | | |
| 41523 | float32x2_t __reint_178 = __rev2_178; \ | | |
| 41524 | uint64x1_t __reint1_178 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_178, __p3_178)}; \ | | |
| 41525 | __ret_178 = __noswap_vcmla_rot180_f32(__rev0_178, __rev1_178, *(float32x2_t *) &__reint1_178); \ | | |
| 41526 | __ret_178 = __builtin_shufflevector(__ret_178, __ret_178, 1, 0); \ | | |
| 41527 | __ret_178; \ | | |
| 41528 | }) | | |
| 41529 | #endif | 42742 | #endif |
| 41530 | | 42743 | |
| 41531 | #ifdef __LITTLE_ENDIAN__ | 42744 | #ifdef __LITTLE_ENDIAN__ |
| 41532 | #define vcmlaq_rot180_lane_f32(__p0_179, __p1_179, __p2_179, __p3_179) __extension__ ({ \ | 42745 | __ai uint32x4_t vceqzq_u32(uint32x4_t __p0) { |
| 41533 | float32x4_t __ret_179; \ | 42746 | uint32x4_t __ret; |
| 41534 | float32x4_t __s0_179 = __p0_179; \ | 42747 | __ret = (uint32x4_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 50); |
| 41535 | float32x4_t __s1_179 = __p1_179; \ | 42748 | return __ret; |
| 41536 | float32x2_t __s2_179 = __p2_179; \ | 42749 | } |
| 41537 | float32x2_t __reint_179 = __s2_179; \ | | |
| 41538 | uint64x2_t __reint1_179 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_179, __p3_179), vget_lane_u64(*(uint64x1_t *) &__reint_179, __p3_179)}; \ | | |
| 41539 | __ret_179 = vcmlaq_rot180_f32(__s0_179, __s1_179, *(float32x4_t *) &__reint1_179); \ | | |
| 41540 | __ret_179; \ | | |
| 41541 | }) | | |
| 41542 | #else | 42750 | #else |
| 41543 | #define vcmlaq_rot180_lane_f32(__p0_180, __p1_180, __p2_180, __p3_180) __extension__ ({ \ | 42751 | __ai uint32x4_t vceqzq_u32(uint32x4_t __p0) { |
| 41544 | float32x4_t __ret_180; \ | 42752 | uint32x4_t __ret; |
| 41545 | float32x4_t __s0_180 = __p0_180; \ | 42753 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 41546 | float32x4_t __s1_180 = __p1_180; \ | 42754 | __ret = (uint32x4_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 50); |
| 41547 | float32x2_t __s2_180 = __p2_180; \ | 42755 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 41548 | float32x4_t __rev0_180; __rev0_180 = __builtin_shufflevector(__s0_180, __s0_180, 3, 2, 1, 0); \ | 42756 | return __ret; |
| 41549 | float32x4_t __rev1_180; __rev1_180 = __builtin_shufflevector(__s1_180, __s1_180, 3, 2, 1, 0); \ | 42757 | } |
| 41550 | float32x2_t __rev2_180; __rev2_180 = __builtin_shufflevector(__s2_180, __s2_180, 1, 0); \ | | |
| 41551 | float32x2_t __reint_180 = __rev2_180; \ | | |
| 41552 | uint64x2_t __reint1_180 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_180, __p3_180), vget_lane_u64(*(uint64x1_t *) &__reint_180, __p3_180)}; \ | | |
| 41553 | __ret_180 = __noswap_vcmlaq_rot180_f32(__rev0_180, __rev1_180, *(float32x4_t *) &__reint1_180); \ | | |
| 41554 | __ret_180 = __builtin_shufflevector(__ret_180, __ret_180, 3, 2, 1, 0); \ | | |
| 41555 | __ret_180; \ | | |
| 41556 | }) | | |
| 41557 | #endif | 42758 | #endif |
| 41558 | | 42759 | |
| 41559 | #ifdef __LITTLE_ENDIAN__ | 42760 | #ifdef __LITTLE_ENDIAN__ |
| 41560 | #define vcmla_rot180_laneq_f32(__p0_181, __p1_181, __p2_181, __p3_181) __extension__ ({ \ | 42761 | __ai uint64x2_t vceqzq_u64(uint64x2_t __p0) { |
| 41561 | float32x2_t __ret_181; \ | 42762 | uint64x2_t __ret; |
| 41562 | float32x2_t __s0_181 = __p0_181; \ | 42763 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 51); |
| 41563 | float32x2_t __s1_181 = __p1_181; \ | 42764 | return __ret; |
| 41564 | float32x4_t __s2_181 = __p2_181; \ | 42765 | } |
| 41565 | float32x4_t __reint_181 = __s2_181; \ | | |
| 41566 | uint64x1_t __reint1_181 = (uint64x1_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_181, __p3_181)}; \ | | |
| 41567 | __ret_181 = vcmla_rot180_f32(__s0_181, __s1_181, *(float32x2_t *) &__reint1_181); \ | | |
| 41568 | __ret_181; \ | | |
| 41569 | }) | | |
| 41570 | #else | 42766 | #else |
| 41571 | #define vcmla_rot180_laneq_f32(__p0_182, __p1_182, __p2_182, __p3_182) __extension__ ({ \ | 42767 | __ai uint64x2_t vceqzq_u64(uint64x2_t __p0) { |
| 41572 | float32x2_t __ret_182; \ | 42768 | uint64x2_t __ret; |
| 41573 | float32x2_t __s0_182 = __p0_182; \ | 42769 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41574 | float32x2_t __s1_182 = __p1_182; \ | 42770 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 51); |
| 41575 | float32x4_t __s2_182 = __p2_182; \ | 42771 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41576 | float32x2_t __rev0_182; __rev0_182 = __builtin_shufflevector(__s0_182, __s0_182, 1, 0); \ | 42772 | return __ret; |
| 41577 | float32x2_t __rev1_182; __rev1_182 = __builtin_shufflevector(__s1_182, __s1_182, 1, 0); \ | 42773 | } |
| 41578 | float32x4_t __rev2_182; __rev2_182 = __builtin_shufflevector(__s2_182, __s2_182, 3, 2, 1, 0); \ | | |
| 41579 | float32x4_t __reint_182 = __rev2_182; \ | | |
| 41580 | uint64x1_t __reint1_182 = (uint64x1_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_182, __p3_182)}; \ | | |
| 41581 | __ret_182 = __noswap_vcmla_rot180_f32(__rev0_182, __rev1_182, *(float32x2_t *) &__reint1_182); \ | | |
| 41582 | __ret_182 = __builtin_shufflevector(__ret_182, __ret_182, 1, 0); \ | | |
| 41583 | __ret_182; \ | | |
| 41584 | }) | | |
| 41585 | #endif | 42774 | #endif |
| 41586 | | 42775 | |
| 41587 | #ifdef __LITTLE_ENDIAN__ | 42776 | #ifdef __LITTLE_ENDIAN__ |
| 41588 | #define vcmlaq_rot180_laneq_f32(__p0_183, __p1_183, __p2_183, __p3_183) __extension__ ({ \ | 42777 | __ai uint16x8_t vceqzq_u16(uint16x8_t __p0) { |
| 41589 | float32x4_t __ret_183; \ | 42778 | uint16x8_t __ret; |
| 41590 | float32x4_t __s0_183 = __p0_183; \ | 42779 | __ret = (uint16x8_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 49); |
| 41591 | float32x4_t __s1_183 = __p1_183; \ | 42780 | return __ret; |
| 41592 | float32x4_t __s2_183 = __p2_183; \ | 42781 | } |
| 41593 | float32x4_t __reint_183 = __s2_183; \ | | |
| 41594 | uint64x2_t __reint1_183 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_183, __p3_183), vgetq_lane_u64(*(uint64x2_t *) &__reint_183, __p3_183)}; \ | | |
| 41595 | __ret_183 = vcmlaq_rot180_f32(__s0_183, __s1_183, *(float32x4_t *) &__reint1_183); \ | | |
| 41596 | __ret_183; \ | | |
| 41597 | }) | | |
| 41598 | #else | 42782 | #else |
| 41599 | #define vcmlaq_rot180_laneq_f32(__p0_184, __p1_184, __p2_184, __p3_184) __extension__ ({ \ | 42783 | __ai uint16x8_t vceqzq_u16(uint16x8_t __p0) { |
| 41600 | float32x4_t __ret_184; \ | 42784 | uint16x8_t __ret; |
| 41601 | float32x4_t __s0_184 = __p0_184; \ | 42785 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41602 | float32x4_t __s1_184 = __p1_184; \ | 42786 | __ret = (uint16x8_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 49); |
| 41603 | float32x4_t __s2_184 = __p2_184; \ | 42787 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41604 | float32x4_t __rev0_184; __rev0_184 = __builtin_shufflevector(__s0_184, __s0_184, 3, 2, 1, 0); \ | 42788 | return __ret; |
| 41605 | float32x4_t __rev1_184; __rev1_184 = __builtin_shufflevector(__s1_184, __s1_184, 3, 2, 1, 0); \ | 42789 | } |
| 41606 | float32x4_t __rev2_184; __rev2_184 = __builtin_shufflevector(__s2_184, __s2_184, 3, 2, 1, 0); \ | | |
| 41607 | float32x4_t __reint_184 = __rev2_184; \ | | |
| 41608 | uint64x2_t __reint1_184 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_184, __p3_184), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_184, __p3_184)}; \ | | |
| 41609 | __ret_184 = __noswap_vcmlaq_rot180_f32(__rev0_184, __rev1_184, *(float32x4_t *) &__reint1_184); \ | | |
| 41610 | __ret_184 = __builtin_shufflevector(__ret_184, __ret_184, 3, 2, 1, 0); \ | | |
| 41611 | __ret_184; \ | | |
| 41612 | }) | | |
| 41613 | #endif | 42790 | #endif |
| 41614 | | 42791 | |
| 41615 | #ifdef __LITTLE_ENDIAN__ | 42792 | #ifdef __LITTLE_ENDIAN__ |
| 41616 | __ai float32x4_t vcmlaq_rot270_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | 42793 | __ai uint8x16_t vceqzq_s8(int8x16_t __p0) { |
| 41617 | float32x4_t __ret; | 42794 | uint8x16_t __ret; |
| 41618 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot270_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | 42795 | __ret = (uint8x16_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 48); |
| 41619 | return __ret; | 42796 | return __ret; |
| 41620 | } | 42797 | } |
| 41621 | #else | 42798 | #else |
| 41622 | __ai float32x4_t vcmlaq_rot270_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | 42799 | __ai uint8x16_t vceqzq_s8(int8x16_t __p0) { |
| 41623 | float32x4_t __ret; | 42800 | uint8x16_t __ret; |
| 41624 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 42801 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41625 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 42802 | __ret = (uint8x16_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 48); |
| 41626 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 42803 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41627 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot270_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); | | |
| 41628 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 41629 | return __ret; | | |
| 41630 | } | | |
| 41631 | __ai float32x4_t __noswap_vcmlaq_rot270_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | | |
| 41632 | float32x4_t __ret; | | |
| 41633 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot270_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | | |
| 41634 | return __ret; | 42804 | return __ret; |
| 41635 | } | 42805 | } |
| 41636 | #endif | 42806 | #endif |
| 41637 | | 42807 | |
| 41638 | #ifdef __LITTLE_ENDIAN__ | 42808 | #ifdef __LITTLE_ENDIAN__ |
| 41639 | __ai float32x2_t vcmla_rot270_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | 42809 | __ai uint64x2_t vceqzq_f64(float64x2_t __p0) { |
| 41640 | float32x2_t __ret; | 42810 | uint64x2_t __ret; |
| 41641 | __ret = (float32x2_t) __builtin_neon_vcmla_rot270_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | 42811 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 51); |
| 41642 | return __ret; | 42812 | return __ret; |
| 41643 | } | 42813 | } |
| 41644 | #else | 42814 | #else |
| 41645 | __ai float32x2_t vcmla_rot270_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | 42815 | __ai uint64x2_t vceqzq_f64(float64x2_t __p0) { |
| 41646 | float32x2_t __ret; | 42816 | uint64x2_t __ret; |
| 41647 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 42817 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41648 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 42818 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 51); |
| 41649 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 41650 | __ret = (float32x2_t) __builtin_neon_vcmla_rot270_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); | | |
| 41651 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 42819 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41652 | return __ret; | 42820 | return __ret; |
| 41653 | } | 42821 | } |
| 41654 | __ai float32x2_t __noswap_vcmla_rot270_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | | |
| 41655 | float32x2_t __ret; | | |
| 41656 | __ret = (float32x2_t) __builtin_neon_vcmla_rot270_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | | |
| 41657 | return __ret; | | |
| 41658 | } | | |
| 41659 | #endif | 42822 | #endif |
| 41660 | | 42823 | |
| 41661 | #ifdef __LITTLE_ENDIAN__ | 42824 | #ifdef __LITTLE_ENDIAN__ |
| 41662 | #define vcmla_rot270_lane_f32(__p0_185, __p1_185, __p2_185, __p3_185) __extension__ ({ \ | 42825 | __ai uint32x4_t vceqzq_f32(float32x4_t __p0) { |
| 41663 | float32x2_t __ret_185; \ | 42826 | uint32x4_t __ret; |
| 41664 | float32x2_t __s0_185 = __p0_185; \ | 42827 | __ret = (uint32x4_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 50); |
| 41665 | float32x2_t __s1_185 = __p1_185; \ | 42828 | return __ret; |
| 41666 | float32x2_t __s2_185 = __p2_185; \ | 42829 | } |
| 41667 | float32x2_t __reint_185 = __s2_185; \ | | |
| 41668 | uint64x1_t __reint1_185 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_185, __p3_185)}; \ | | |
| 41669 | __ret_185 = vcmla_rot270_f32(__s0_185, __s1_185, *(float32x2_t *) &__reint1_185); \ | | |
| 41670 | __ret_185; \ | | |
| 41671 | }) | | |
| 41672 | #else | 42830 | #else |
| 41673 | #define vcmla_rot270_lane_f32(__p0_186, __p1_186, __p2_186, __p3_186) __extension__ ({ \ | 42831 | __ai uint32x4_t vceqzq_f32(float32x4_t __p0) { |
| 41674 | float32x2_t __ret_186; \ | 42832 | uint32x4_t __ret; |
| 41675 | float32x2_t __s0_186 = __p0_186; \ | 42833 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 41676 | float32x2_t __s1_186 = __p1_186; \ | 42834 | __ret = (uint32x4_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 50); |
| 41677 | float32x2_t __s2_186 = __p2_186; \ | 42835 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 41678 | float32x2_t __rev0_186; __rev0_186 = __builtin_shufflevector(__s0_186, __s0_186, 1, 0); \ | 42836 | return __ret; |
| 41679 | float32x2_t __rev1_186; __rev1_186 = __builtin_shufflevector(__s1_186, __s1_186, 1, 0); \ | 42837 | } |
| 41680 | float32x2_t __rev2_186; __rev2_186 = __builtin_shufflevector(__s2_186, __s2_186, 1, 0); \ | | |
| 41681 | float32x2_t __reint_186 = __rev2_186; \ | | |
| 41682 | uint64x1_t __reint1_186 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_186, __p3_186)}; \ | | |
| 41683 | __ret_186 = __noswap_vcmla_rot270_f32(__rev0_186, __rev1_186, *(float32x2_t *) &__reint1_186); \ | | |
| 41684 | __ret_186 = __builtin_shufflevector(__ret_186, __ret_186, 1, 0); \ | | |
| 41685 | __ret_186; \ | | |
| 41686 | }) | | |
| 41687 | #endif | 42838 | #endif |
| 41688 | | 42839 | |
| 41689 | #ifdef __LITTLE_ENDIAN__ | 42840 | #ifdef __LITTLE_ENDIAN__ |
| 41690 | #define vcmlaq_rot270_lane_f32(__p0_187, __p1_187, __p2_187, __p3_187) __extension__ ({ \ | 42841 | __ai uint32x4_t vceqzq_s32(int32x4_t __p0) { |
| 41691 | float32x4_t __ret_187; \ | 42842 | uint32x4_t __ret; |
| 41692 | float32x4_t __s0_187 = __p0_187; \ | 42843 | __ret = (uint32x4_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 50); |
| 41693 | float32x4_t __s1_187 = __p1_187; \ | 42844 | return __ret; |
| 41694 | float32x2_t __s2_187 = __p2_187; \ | 42845 | } |
| 41695 | float32x2_t __reint_187 = __s2_187; \ | | |
| 41696 | uint64x2_t __reint1_187 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_187, __p3_187), vget_lane_u64(*(uint64x1_t *) &__reint_187, __p3_187)}; \ | | |
| 41697 | __ret_187 = vcmlaq_rot270_f32(__s0_187, __s1_187, *(float32x4_t *) &__reint1_187); \ | | |
| 41698 | __ret_187; \ | | |
| 41699 | }) | | |
| 41700 | #else | 42846 | #else |
| 41701 | #define vcmlaq_rot270_lane_f32(__p0_188, __p1_188, __p2_188, __p3_188) __extension__ ({ \ | 42847 | __ai uint32x4_t vceqzq_s32(int32x4_t __p0) { |
| 41702 | float32x4_t __ret_188; \ | 42848 | uint32x4_t __ret; |
| 41703 | float32x4_t __s0_188 = __p0_188; \ | 42849 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 41704 | float32x4_t __s1_188 = __p1_188; \ | 42850 | __ret = (uint32x4_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 50); |
| 41705 | float32x2_t __s2_188 = __p2_188; \ | 42851 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 41706 | float32x4_t __rev0_188; __rev0_188 = __builtin_shufflevector(__s0_188, __s0_188, 3, 2, 1, 0); \ | 42852 | return __ret; |
| 41707 | float32x4_t __rev1_188; __rev1_188 = __builtin_shufflevector(__s1_188, __s1_188, 3, 2, 1, 0); \ | 42853 | } |
| 41708 | float32x2_t __rev2_188; __rev2_188 = __builtin_shufflevector(__s2_188, __s2_188, 1, 0); \ | | |
| 41709 | float32x2_t __reint_188 = __rev2_188; \ | | |
| 41710 | uint64x2_t __reint1_188 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_188, __p3_188), vget_lane_u64(*(uint64x1_t *) &__reint_188, __p3_188)}; \ | | |
| 41711 | __ret_188 = __noswap_vcmlaq_rot270_f32(__rev0_188, __rev1_188, *(float32x4_t *) &__reint1_188); \ | | |
| 41712 | __ret_188 = __builtin_shufflevector(__ret_188, __ret_188, 3, 2, 1, 0); \ | | |
| 41713 | __ret_188; \ | | |
| 41714 | }) | | |
| 41715 | #endif | 42854 | #endif |
| 41716 | | 42855 | |
| 41717 | #ifdef __LITTLE_ENDIAN__ | 42856 | #ifdef __LITTLE_ENDIAN__ |
| 41718 | #define vcmla_rot270_laneq_f32(__p0_189, __p1_189, __p2_189, __p3_189) __extension__ ({ \ | 42857 | __ai uint64x2_t vceqzq_s64(int64x2_t __p0) { |
| 41719 | float32x2_t __ret_189; \ | 42858 | uint64x2_t __ret; |
| 41720 | float32x2_t __s0_189 = __p0_189; \ | 42859 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 51); |
| 41721 | float32x2_t __s1_189 = __p1_189; \ | 42860 | return __ret; |
| 41722 | float32x4_t __s2_189 = __p2_189; \ | 42861 | } |
| 41723 | float32x4_t __reint_189 = __s2_189; \ | | |
| 41724 | uint64x1_t __reint1_189 = (uint64x1_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_189, __p3_189)}; \ | | |
| 41725 | __ret_189 = vcmla_rot270_f32(__s0_189, __s1_189, *(float32x2_t *) &__reint1_189); \ | | |
| 41726 | __ret_189; \ | | |
| 41727 | }) | | |
| 41728 | #else | 42862 | #else |
| 41729 | #define vcmla_rot270_laneq_f32(__p0_190, __p1_190, __p2_190, __p3_190) __extension__ ({ \ | 42863 | __ai uint64x2_t vceqzq_s64(int64x2_t __p0) { |
| 41730 | float32x2_t __ret_190; \ | 42864 | uint64x2_t __ret; |
| 41731 | float32x2_t __s0_190 = __p0_190; \ | 42865 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41732 | float32x2_t __s1_190 = __p1_190; \ | 42866 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 51); |
| 41733 | float32x4_t __s2_190 = __p2_190; \ | 42867 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41734 | float32x2_t __rev0_190; __rev0_190 = __builtin_shufflevector(__s0_190, __s0_190, 1, 0); \ | 42868 | return __ret; |
| 41735 | float32x2_t __rev1_190; __rev1_190 = __builtin_shufflevector(__s1_190, __s1_190, 1, 0); \ | 42869 | } |
| 41736 | float32x4_t __rev2_190; __rev2_190 = __builtin_shufflevector(__s2_190, __s2_190, 3, 2, 1, 0); \ | | |
| 41737 | float32x4_t __reint_190 = __rev2_190; \ | | |
| 41738 | uint64x1_t __reint1_190 = (uint64x1_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_190, __p3_190)}; \ | | |
| 41739 | __ret_190 = __noswap_vcmla_rot270_f32(__rev0_190, __rev1_190, *(float32x2_t *) &__reint1_190); \ | | |
| 41740 | __ret_190 = __builtin_shufflevector(__ret_190, __ret_190, 1, 0); \ | | |
| 41741 | __ret_190; \ | | |
| 41742 | }) | | |
| 41743 | #endif | 42870 | #endif |
| 41744 | | 42871 | |
| 41745 | #ifdef __LITTLE_ENDIAN__ | 42872 | #ifdef __LITTLE_ENDIAN__ |
| 41746 | #define vcmlaq_rot270_laneq_f32(__p0_191, __p1_191, __p2_191, __p3_191) __extension__ ({ \ | 42873 | __ai uint16x8_t vceqzq_s16(int16x8_t __p0) { |
| 41747 | float32x4_t __ret_191; \ | 42874 | uint16x8_t __ret; |
| 41748 | float32x4_t __s0_191 = __p0_191; \ | 42875 | __ret = (uint16x8_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 49); |
| 41749 | float32x4_t __s1_191 = __p1_191; \ | 42876 | return __ret; |
| 41750 | float32x4_t __s2_191 = __p2_191; \ | 42877 | } |
| 41751 | float32x4_t __reint_191 = __s2_191; \ | | |
| 41752 | uint64x2_t __reint1_191 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_191, __p3_191), vgetq_lane_u64(*(uint64x2_t *) &__reint_191, __p3_191)}; \ | | |
| 41753 | __ret_191 = vcmlaq_rot270_f32(__s0_191, __s1_191, *(float32x4_t *) &__reint1_191); \ | | |
| 41754 | __ret_191; \ | | |
| 41755 | }) | | |
| 41756 | #else | 42878 | #else |
| 41757 | #define vcmlaq_rot270_laneq_f32(__p0_192, __p1_192, __p2_192, __p3_192) __extension__ ({ \ | 42879 | __ai uint16x8_t vceqzq_s16(int16x8_t __p0) { |
| 41758 | float32x4_t __ret_192; \ | 42880 | uint16x8_t __ret; |
| 41759 | float32x4_t __s0_192 = __p0_192; \ | 42881 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41760 | float32x4_t __s1_192 = __p1_192; \ | 42882 | __ret = (uint16x8_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 49); |
| 41761 | float32x4_t __s2_192 = __p2_192; \ | 42883 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41762 | float32x4_t __rev0_192; __rev0_192 = __builtin_shufflevector(__s0_192, __s0_192, 3, 2, 1, 0); \ | 42884 | return __ret; |
| 41763 | float32x4_t __rev1_192; __rev1_192 = __builtin_shufflevector(__s1_192, __s1_192, 3, 2, 1, 0); \ | 42885 | } |
| 41764 | float32x4_t __rev2_192; __rev2_192 = __builtin_shufflevector(__s2_192, __s2_192, 3, 2, 1, 0); \ | | |
| 41765 | float32x4_t __reint_192 = __rev2_192; \ | | |
| 41766 | uint64x2_t __reint1_192 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_192, __p3_192), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_192, __p3_192)}; \ | | |
| 41767 | __ret_192 = __noswap_vcmlaq_rot270_f32(__rev0_192, __rev1_192, *(float32x4_t *) &__reint1_192); \ | | |
| 41768 | __ret_192 = __builtin_shufflevector(__ret_192, __ret_192, 3, 2, 1, 0); \ | | |
| 41769 | __ret_192; \ | | |
| 41770 | }) | | |
| 41771 | #endif | 42886 | #endif |
| 41772 | | 42887 | |
| 41773 | #ifdef __LITTLE_ENDIAN__ | 42888 | #ifdef __LITTLE_ENDIAN__ |
| 41774 | __ai float32x4_t vcmlaq_rot90_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | 42889 | __ai uint8x8_t vceqz_u8(uint8x8_t __p0) { |
| 41775 | float32x4_t __ret; | 42890 | uint8x8_t __ret; |
| 41776 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot90_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | 42891 | __ret = (uint8x8_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 16); |
| 41777 | return __ret; | 42892 | return __ret; |
| 41778 | } | 42893 | } |
| 41779 | #else | 42894 | #else |
| 41780 | __ai float32x4_t vcmlaq_rot90_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | 42895 | __ai uint8x8_t vceqz_u8(uint8x8_t __p0) { |
| 41781 | float32x4_t __ret; | 42896 | uint8x8_t __ret; |
| 41782 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 42897 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41783 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 42898 | __ret = (uint8x8_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 16); |
| 41784 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 42899 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41785 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot90_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); | | |
| 41786 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 41787 | return __ret; | | |
| 41788 | } | | |
| 41789 | __ai float32x4_t __noswap_vcmlaq_rot90_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | | |
| 41790 | float32x4_t __ret; | | |
| 41791 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot90_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | | |
| 41792 | return __ret; | 42900 | return __ret; |
| 41793 | } | 42901 | } |
| 41794 | #endif | 42902 | #endif |
| 41795 | | 42903 | |
| 41796 | #ifdef __LITTLE_ENDIAN__ | 42904 | #ifdef __LITTLE_ENDIAN__ |
| 41797 | __ai float32x2_t vcmla_rot90_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | 42905 | __ai uint32x2_t vceqz_u32(uint32x2_t __p0) { |
| 41798 | float32x2_t __ret; | 42906 | uint32x2_t __ret; |
| 41799 | __ret = (float32x2_t) __builtin_neon_vcmla_rot90_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | 42907 | __ret = (uint32x2_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 18); |
| 41800 | return __ret; | 42908 | return __ret; |
| 41801 | } | 42909 | } |
| 41802 | #else | 42910 | #else |
| 41803 | __ai float32x2_t vcmla_rot90_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | 42911 | __ai uint32x2_t vceqz_u32(uint32x2_t __p0) { |
| 41804 | float32x2_t __ret; | 42912 | uint32x2_t __ret; |
| 41805 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 42913 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41806 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 42914 | __ret = (uint32x2_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 18); |
| 41807 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 41808 | __ret = (float32x2_t) __builtin_neon_vcmla_rot90_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); | | |
| 41809 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 42915 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41810 | return __ret; | 42916 | return __ret; |
| 41811 | } | 42917 | } |
| 41812 | __ai float32x2_t __noswap_vcmla_rot90_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | | |
| 41813 | float32x2_t __ret; | | |
| 41814 | __ret = (float32x2_t) __builtin_neon_vcmla_rot90_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | | |
| 41815 | return __ret; | | |
| 41816 | } | | |
| 41817 | #endif | 42918 | #endif |
| 41818 | | 42919 | |
| | 42920 | __ai uint64x1_t vceqz_u64(uint64x1_t __p0) { |
| | 42921 | uint64x1_t __ret; |
| | 42922 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); |
| | 42923 | return __ret; |
| | 42924 | } |
| 41819 | #ifdef __LITTLE_ENDIAN__ | 42925 | #ifdef __LITTLE_ENDIAN__ |
| 41820 | #define vcmla_rot90_lane_f32(__p0_193, __p1_193, __p2_193, __p3_193) __extension__ ({ \ | 42926 | __ai uint16x4_t vceqz_u16(uint16x4_t __p0) { |
| 41821 | float32x2_t __ret_193; \ | 42927 | uint16x4_t __ret; |
| 41822 | float32x2_t __s0_193 = __p0_193; \ | 42928 | __ret = (uint16x4_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 17); |
| 41823 | float32x2_t __s1_193 = __p1_193; \ | 42929 | return __ret; |
| 41824 | float32x2_t __s2_193 = __p2_193; \ | 42930 | } |
| 41825 | float32x2_t __reint_193 = __s2_193; \ | | |
| 41826 | uint64x1_t __reint1_193 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_193, __p3_193)}; \ | | |
| 41827 | __ret_193 = vcmla_rot90_f32(__s0_193, __s1_193, *(float32x2_t *) &__reint1_193); \ | | |
| 41828 | __ret_193; \ | | |
| 41829 | }) | | |
| 41830 | #else | 42931 | #else |
| 41831 | #define vcmla_rot90_lane_f32(__p0_194, __p1_194, __p2_194, __p3_194) __extension__ ({ \ | 42932 | __ai uint16x4_t vceqz_u16(uint16x4_t __p0) { |
| 41832 | float32x2_t __ret_194; \ | 42933 | uint16x4_t __ret; |
| 41833 | float32x2_t __s0_194 = __p0_194; \ | 42934 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 41834 | float32x2_t __s1_194 = __p1_194; \ | 42935 | __ret = (uint16x4_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 17); |
| 41835 | float32x2_t __s2_194 = __p2_194; \ | 42936 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 41836 | float32x2_t __rev0_194; __rev0_194 = __builtin_shufflevector(__s0_194, __s0_194, 1, 0); \ | 42937 | return __ret; |
| 41837 | float32x2_t __rev1_194; __rev1_194 = __builtin_shufflevector(__s1_194, __s1_194, 1, 0); \ | 42938 | } |
| 41838 | float32x2_t __rev2_194; __rev2_194 = __builtin_shufflevector(__s2_194, __s2_194, 1, 0); \ | | |
| 41839 | float32x2_t __reint_194 = __rev2_194; \ | | |
| 41840 | uint64x1_t __reint1_194 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_194, __p3_194)}; \ | | |
| 41841 | __ret_194 = __noswap_vcmla_rot90_f32(__rev0_194, __rev1_194, *(float32x2_t *) &__reint1_194); \ | | |
| 41842 | __ret_194 = __builtin_shufflevector(__ret_194, __ret_194, 1, 0); \ | | |
| 41843 | __ret_194; \ | | |
| 41844 | }) | | |
| 41845 | #endif | 42939 | #endif |
| 41846 | | 42940 | |
| 41847 | #ifdef __LITTLE_ENDIAN__ | 42941 | #ifdef __LITTLE_ENDIAN__ |
| 41848 | #define vcmlaq_rot90_lane_f32(__p0_195, __p1_195, __p2_195, __p3_195) __extension__ ({ \ | 42942 | __ai uint8x8_t vceqz_s8(int8x8_t __p0) { |
| 41849 | float32x4_t __ret_195; \ | 42943 | uint8x8_t __ret; |
| 41850 | float32x4_t __s0_195 = __p0_195; \ | 42944 | __ret = (uint8x8_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 16); |
| 41851 | float32x4_t __s1_195 = __p1_195; \ | 42945 | return __ret; |
| 41852 | float32x2_t __s2_195 = __p2_195; \ | 42946 | } |
| 41853 | float32x2_t __reint_195 = __s2_195; \ | | |
| 41854 | uint64x2_t __reint1_195 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_195, __p3_195), vget_lane_u64(*(uint64x1_t *) &__reint_195, __p3_195)}; \ | | |
| 41855 | __ret_195 = vcmlaq_rot90_f32(__s0_195, __s1_195, *(float32x4_t *) &__reint1_195); \ | | |
| 41856 | __ret_195; \ | | |
| 41857 | }) | | |
| 41858 | #else | 42947 | #else |
| 41859 | #define vcmlaq_rot90_lane_f32(__p0_196, __p1_196, __p2_196, __p3_196) __extension__ ({ \ | 42948 | __ai uint8x8_t vceqz_s8(int8x8_t __p0) { |
| 41860 | float32x4_t __ret_196; \ | 42949 | uint8x8_t __ret; |
| 41861 | float32x4_t __s0_196 = __p0_196; \ | 42950 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41862 | float32x4_t __s1_196 = __p1_196; \ | 42951 | __ret = (uint8x8_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 16); |
| 41863 | float32x2_t __s2_196 = __p2_196; \ | 42952 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 41864 | float32x4_t __rev0_196; __rev0_196 = __builtin_shufflevector(__s0_196, __s0_196, 3, 2, 1, 0); \ | 42953 | return __ret; |
| 41865 | float32x4_t __rev1_196; __rev1_196 = __builtin_shufflevector(__s1_196, __s1_196, 3, 2, 1, 0); \ | 42954 | } |
| 41866 | float32x2_t __rev2_196; __rev2_196 = __builtin_shufflevector(__s2_196, __s2_196, 1, 0); \ | | |
| 41867 | float32x2_t __reint_196 = __rev2_196; \ | | |
| 41868 | uint64x2_t __reint1_196 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_196, __p3_196), vget_lane_u64(*(uint64x1_t *) &__reint_196, __p3_196)}; \ | | |
| 41869 | __ret_196 = __noswap_vcmlaq_rot90_f32(__rev0_196, __rev1_196, *(float32x4_t *) &__reint1_196); \ | | |
| 41870 | __ret_196 = __builtin_shufflevector(__ret_196, __ret_196, 3, 2, 1, 0); \ | | |
| 41871 | __ret_196; \ | | |
| 41872 | }) | | |
| 41873 | #endif | 42955 | #endif |
| 41874 | | 42956 | |
| | 42957 | __ai uint64x1_t vceqz_f64(float64x1_t __p0) { |
| | 42958 | uint64x1_t __ret; |
| | 42959 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); |
| | 42960 | return __ret; |
| | 42961 | } |
| 41875 | #ifdef __LITTLE_ENDIAN__ | 42962 | #ifdef __LITTLE_ENDIAN__ |
| 41876 | #define vcmla_rot90_laneq_f32(__p0_197, __p1_197, __p2_197, __p3_197) __extension__ ({ \ | 42963 | __ai uint32x2_t vceqz_f32(float32x2_t __p0) { |
| 41877 | float32x2_t __ret_197; \ | 42964 | uint32x2_t __ret; |
| 41878 | float32x2_t __s0_197 = __p0_197; \ | 42965 | __ret = (uint32x2_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 18); |
| 41879 | float32x2_t __s1_197 = __p1_197; \ | 42966 | return __ret; |
| 41880 | float32x4_t __s2_197 = __p2_197; \ | 42967 | } |
| 41881 | float32x4_t __reint_197 = __s2_197; \ | | |
| 41882 | uint64x1_t __reint1_197 = (uint64x1_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_197, __p3_197)}; \ | | |
| 41883 | __ret_197 = vcmla_rot90_f32(__s0_197, __s1_197, *(float32x2_t *) &__reint1_197); \ | | |
| 41884 | __ret_197; \ | | |
| 41885 | }) | | |
| 41886 | #else | 42968 | #else |
| 41887 | #define vcmla_rot90_laneq_f32(__p0_198, __p1_198, __p2_198, __p3_198) __extension__ ({ \ | 42969 | __ai uint32x2_t vceqz_f32(float32x2_t __p0) { |
| 41888 | float32x2_t __ret_198; \ | 42970 | uint32x2_t __ret; |
| 41889 | float32x2_t __s0_198 = __p0_198; \ | 42971 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41890 | float32x2_t __s1_198 = __p1_198; \ | 42972 | __ret = (uint32x2_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 18); |
| 41891 | float32x4_t __s2_198 = __p2_198; \ | 42973 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41892 | float32x2_t __rev0_198; __rev0_198 = __builtin_shufflevector(__s0_198, __s0_198, 1, 0); \ | 42974 | return __ret; |
| 41893 | float32x2_t __rev1_198; __rev1_198 = __builtin_shufflevector(__s1_198, __s1_198, 1, 0); \ | 42975 | } |
| 41894 | float32x4_t __rev2_198; __rev2_198 = __builtin_shufflevector(__s2_198, __s2_198, 3, 2, 1, 0); \ | | |
| 41895 | float32x4_t __reint_198 = __rev2_198; \ | | |
| 41896 | uint64x1_t __reint1_198 = (uint64x1_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_198, __p3_198)}; \ | | |
| 41897 | __ret_198 = __noswap_vcmla_rot90_f32(__rev0_198, __rev1_198, *(float32x2_t *) &__reint1_198); \ | | |
| 41898 | __ret_198 = __builtin_shufflevector(__ret_198, __ret_198, 1, 0); \ | | |
| 41899 | __ret_198; \ | | |
| 41900 | }) | | |
| 41901 | #endif | 42976 | #endif |
| 41902 | | 42977 | |
| 41903 | #ifdef __LITTLE_ENDIAN__ | 42978 | #ifdef __LITTLE_ENDIAN__ |
| 41904 | #define vcmlaq_rot90_laneq_f32(__p0_199, __p1_199, __p2_199, __p3_199) __extension__ ({ \ | 42979 | __ai uint32x2_t vceqz_s32(int32x2_t __p0) { |
| 41905 | float32x4_t __ret_199; \ | 42980 | uint32x2_t __ret; |
| 41906 | float32x4_t __s0_199 = __p0_199; \ | 42981 | __ret = (uint32x2_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 18); |
| 41907 | float32x4_t __s1_199 = __p1_199; \ | 42982 | return __ret; |
| 41908 | float32x4_t __s2_199 = __p2_199; \ | 42983 | } |
| 41909 | float32x4_t __reint_199 = __s2_199; \ | | |
| 41910 | uint64x2_t __reint1_199 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_199, __p3_199), vgetq_lane_u64(*(uint64x2_t *) &__reint_199, __p3_199)}; \ | | |
| 41911 | __ret_199 = vcmlaq_rot90_f32(__s0_199, __s1_199, *(float32x4_t *) &__reint1_199); \ | | |
| 41912 | __ret_199; \ | | |
| 41913 | }) | | |
| 41914 | #else | 42984 | #else |
| 41915 | #define vcmlaq_rot90_laneq_f32(__p0_200, __p1_200, __p2_200, __p3_200) __extension__ ({ \ | 42985 | __ai uint32x2_t vceqz_s32(int32x2_t __p0) { |
| 41916 | float32x4_t __ret_200; \ | 42986 | uint32x2_t __ret; |
| 41917 | float32x4_t __s0_200 = __p0_200; \ | 42987 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41918 | float32x4_t __s1_200 = __p1_200; \ | 42988 | __ret = (uint32x2_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 18); |
| 41919 | float32x4_t __s2_200 = __p2_200; \ | 42989 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41920 | float32x4_t __rev0_200; __rev0_200 = __builtin_shufflevector(__s0_200, __s0_200, 3, 2, 1, 0); \ | 42990 | return __ret; |
| 41921 | float32x4_t __rev1_200; __rev1_200 = __builtin_shufflevector(__s1_200, __s1_200, 3, 2, 1, 0); \ | 42991 | } |
| 41922 | float32x4_t __rev2_200; __rev2_200 = __builtin_shufflevector(__s2_200, __s2_200, 3, 2, 1, 0); \ | | |
| 41923 | float32x4_t __reint_200 = __rev2_200; \ | | |
| 41924 | uint64x2_t __reint1_200 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_200, __p3_200), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_200, __p3_200)}; \ | | |
| 41925 | __ret_200 = __noswap_vcmlaq_rot90_f32(__rev0_200, __rev1_200, *(float32x4_t *) &__reint1_200); \ | | |
| 41926 | __ret_200 = __builtin_shufflevector(__ret_200, __ret_200, 3, 2, 1, 0); \ | | |
| 41927 | __ret_200; \ | | |
| 41928 | }) | | |
| 41929 | #endif | 42992 | #endif |
| 41930 | | 42993 | |
| 41931 | #endif | 42994 | __ai uint64x1_t vceqz_s64(int64x1_t __p0) { |
| 41932 | #if defined(__ARM_FEATURE_COMPLEX) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) | 42995 | uint64x1_t __ret; |
| | 42996 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); |
| | 42997 | return __ret; |
| | 42998 | } |
| 41933 | #ifdef __LITTLE_ENDIAN__ | 42999 | #ifdef __LITTLE_ENDIAN__ |
| 41934 | __ai float16x4_t vcadd_rot270_f16(float16x4_t __p0, float16x4_t __p1) { | 43000 | __ai uint16x4_t vceqz_s16(int16x4_t __p0) { |
| 41935 | float16x4_t __ret; | 43001 | uint16x4_t __ret; |
| 41936 | __ret = (float16x4_t) __builtin_neon_vcadd_rot270_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | 43002 | __ret = (uint16x4_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 17); |
| 41937 | return __ret; | 43003 | return __ret; |
| 41938 | } | 43004 | } |
| 41939 | #else | 43005 | #else |
| 41940 | __ai float16x4_t vcadd_rot270_f16(float16x4_t __p0, float16x4_t __p1) { | 43006 | __ai uint16x4_t vceqz_s16(int16x4_t __p0) { |
| 41941 | float16x4_t __ret; | 43007 | uint16x4_t __ret; |
| 41942 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 43008 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 41943 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 43009 | __ret = (uint16x4_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 17); |
| 41944 | __ret = (float16x4_t) __builtin_neon_vcadd_rot270_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); | | |
| 41945 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 43010 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 41946 | return __ret; | 43011 | return __ret; |
| 41947 | } | 43012 | } |
| 41948 | #endif | 43013 | #endif |
| 41949 | | 43014 | |
| 41950 | #ifdef __LITTLE_ENDIAN__ | 43015 | __ai uint64_t vceqzd_u64(uint64_t __p0) { |
| 41951 | __ai float16x4_t vcadd_rot90_f16(float16x4_t __p0, float16x4_t __p1) { | 43016 | uint64_t __ret; |
| 41952 | float16x4_t __ret; | 43017 | __ret = (uint64_t) __builtin_neon_vceqzd_u64(__p0); |
| 41953 | __ret = (float16x4_t) __builtin_neon_vcadd_rot90_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | 43018 | return __ret; |
| | 43019 | } |
| | 43020 | __ai uint64_t vceqzd_s64(int64_t __p0) { |
| | 43021 | uint64_t __ret; |
| | 43022 | __ret = (uint64_t) __builtin_neon_vceqzd_s64(__p0); |
| | 43023 | return __ret; |
| | 43024 | } |
| | 43025 | __ai uint64_t vceqzd_f64(float64_t __p0) { |
| | 43026 | uint64_t __ret; |
| | 43027 | __ret = (uint64_t) __builtin_neon_vceqzd_f64(__p0); |
| 41954 | return __ret; | 43028 | return __ret; |
| 41955 | } | 43029 | } |
| 41956 | #else | 43030 | __ai uint32_t vceqzs_f32(float32_t __p0) { |
| 41957 | __ai float16x4_t vcadd_rot90_f16(float16x4_t __p0, float16x4_t __p1) { | 43031 | uint32_t __ret; |
| 41958 | float16x4_t __ret; | 43032 | __ret = (uint32_t) __builtin_neon_vceqzs_f32(__p0); |
| 41959 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 41960 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 41961 | __ret = (float16x4_t) __builtin_neon_vcadd_rot90_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); | | |
| 41962 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 41963 | return __ret; | 43033 | return __ret; |
| 41964 | } | 43034 | } |
| 41965 | #endif | | |
| 41966 | | | |
| 41967 | #ifdef __LITTLE_ENDIAN__ | 43035 | #ifdef __LITTLE_ENDIAN__ |
| 41968 | __ai float16x8_t vcaddq_rot270_f16(float16x8_t __p0, float16x8_t __p1) { | 43036 | __ai uint64x2_t vcgeq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 41969 | float16x8_t __ret; | 43037 | uint64x2_t __ret; |
| 41970 | __ret = (float16x8_t) __builtin_neon_vcaddq_rot270_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | 43038 | __ret = (uint64x2_t)(__p0 >= __p1); |
| 41971 | return __ret; | 43039 | return __ret; |
| 41972 | } | 43040 | } |
| 41973 | #else | 43041 | #else |
| 41974 | __ai float16x8_t vcaddq_rot270_f16(float16x8_t __p0, float16x8_t __p1) { | 43042 | __ai uint64x2_t vcgeq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 41975 | float16x8_t __ret; | 43043 | uint64x2_t __ret; |
| 41976 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 43044 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41977 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 43045 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 41978 | __ret = (float16x8_t) __builtin_neon_vcaddq_rot270_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 43046 | __ret = (uint64x2_t)(__rev0 >= __rev1); |
| 41979 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 43047 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41980 | return __ret; | 43048 | return __ret; |
| 41981 | } | 43049 | } |
| 41982 | #endif | 43050 | #endif |
| 41983 | | 43051 | |
| 41984 | #ifdef __LITTLE_ENDIAN__ | 43052 | #ifdef __LITTLE_ENDIAN__ |
| 41985 | __ai float16x8_t vcaddq_rot90_f16(float16x8_t __p0, float16x8_t __p1) { | 43053 | __ai uint64x2_t vcgeq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 41986 | float16x8_t __ret; | 43054 | uint64x2_t __ret; |
| 41987 | __ret = (float16x8_t) __builtin_neon_vcaddq_rot90_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | 43055 | __ret = (uint64x2_t)(__p0 >= __p1); |
| 41988 | return __ret; | 43056 | return __ret; |
| 41989 | } | 43057 | } |
| 41990 | #else | 43058 | #else |
| 41991 | __ai float16x8_t vcaddq_rot90_f16(float16x8_t __p0, float16x8_t __p1) { | 43059 | __ai uint64x2_t vcgeq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 41992 | float16x8_t __ret; | 43060 | uint64x2_t __ret; |
| 41993 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 43061 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 41994 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 43062 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 41995 | __ret = (float16x8_t) __builtin_neon_vcaddq_rot90_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 43063 | __ret = (uint64x2_t)(__rev0 >= __rev1); |
| 41996 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 43064 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 41997 | return __ret; | 43065 | return __ret; |
| 41998 | } | 43066 | } |
| 41999 | #endif | 43067 | #endif |
| 42000 | | 43068 | |
| 42001 | #ifdef __LITTLE_ENDIAN__ | 43069 | #ifdef __LITTLE_ENDIAN__ |
| 42002 | __ai float16x8_t vcmlaq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43070 | __ai uint64x2_t vcgeq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 42003 | float16x8_t __ret; | 43071 | uint64x2_t __ret; |
| 42004 | __ret = (float16x8_t) __builtin_neon_vcmlaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); | 43072 | __ret = (uint64x2_t)(__p0 >= __p1); |
| 42005 | return __ret; | 43073 | return __ret; |
| 42006 | } | 43074 | } |
| 42007 | #else | 43075 | #else |
| 42008 | __ai float16x8_t vcmlaq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43076 | __ai uint64x2_t vcgeq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 42009 | float16x8_t __ret; | 43077 | uint64x2_t __ret; |
| 42010 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 43078 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 42011 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 43079 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 42012 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 43080 | __ret = (uint64x2_t)(__rev0 >= __rev1); |
| 42013 | __ret = (float16x8_t) __builtin_neon_vcmlaq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 40); | 43081 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 42014 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 42015 | return __ret; | | |
| 42016 | } | | |
| 42017 | __ai float16x8_t __noswap_vcmlaq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | | |
| 42018 | float16x8_t __ret; | | |
| 42019 | __ret = (float16x8_t) __builtin_neon_vcmlaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); | | |
| 42020 | return __ret; | 43082 | return __ret; |
| 42021 | } | 43083 | } |
| 42022 | #endif | 43084 | #endif |
| 42023 | | 43085 | |
| 42024 | #ifdef __LITTLE_ENDIAN__ | 43086 | __ai uint64x1_t vcge_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 42025 | __ai float16x4_t vcmla_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43087 | uint64x1_t __ret; |
| 42026 | float16x4_t __ret; | 43088 | __ret = (uint64x1_t)(__p0 >= __p1); |
| 42027 | __ret = (float16x4_t) __builtin_neon_vcmla_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); | | |
| 42028 | return __ret; | 43089 | return __ret; |
| 42029 | } | 43090 | } |
| 42030 | #else | 43091 | __ai uint64x1_t vcge_f64(float64x1_t __p0, float64x1_t __p1) { |
| 42031 | __ai float16x4_t vcmla_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43092 | uint64x1_t __ret; |
| 42032 | float16x4_t __ret; | 43093 | __ret = (uint64x1_t)(__p0 >= __p1); |
| 42033 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 42034 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 42035 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | | |
| 42036 | __ret = (float16x4_t) __builtin_neon_vcmla_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 8); | | |
| 42037 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 42038 | return __ret; | 43094 | return __ret; |
| 42039 | } | 43095 | } |
| 42040 | __ai float16x4_t __noswap_vcmla_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43096 | __ai uint64x1_t vcge_s64(int64x1_t __p0, int64x1_t __p1) { |
| 42041 | float16x4_t __ret; | 43097 | uint64x1_t __ret; |
| 42042 | __ret = (float16x4_t) __builtin_neon_vcmla_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); | 43098 | __ret = (uint64x1_t)(__p0 >= __p1); |
| 42043 | return __ret; | 43099 | return __ret; |
| 42044 | } | 43100 | } |
| 42045 | #endif | 43101 | __ai uint64_t vcged_s64(int64_t __p0, int64_t __p1) { |
| 42046 | | 43102 | uint64_t __ret; |
| 42047 | #ifdef __LITTLE_ENDIAN__ | 43103 | __ret = (uint64_t) __builtin_neon_vcged_s64(__p0, __p1); |
| 42048 | #define vcmla_lane_f16(__p0_201, __p1_201, __p2_201, __p3_201) __extension__ ({ \ | | |
| 42049 | float16x4_t __ret_201; \ | | |
| 42050 | float16x4_t __s0_201 = __p0_201; \ | | |
| 42051 | float16x4_t __s1_201 = __p1_201; \ | | |
| 42052 | float16x4_t __s2_201 = __p2_201; \ | | |
| 42053 | float16x4_t __reint_201 = __s2_201; \ | | |
| 42054 | uint32x2_t __reint1_201 = (uint32x2_t) {vget_lane_u32(*(uint32x2_t *) &__reint_201, __p3_201), vget_lane_u32(*(uint32x2_t *) &__reint_201, __p3_201)}; \ | | |
| 42055 | __ret_201 = vcmla_f16(__s0_201, __s1_201, *(float16x4_t *) &__reint1_201); \ | | |
| 42056 | __ret_201; \ | | |
| 42057 | }) | | |
| 42058 | #else | | |
| 42059 | #define vcmla_lane_f16(__p0_202, __p1_202, __p2_202, __p3_202) __extension__ ({ \ | | |
| 42060 | float16x4_t __ret_202; \ | | |
| 42061 | float16x4_t __s0_202 = __p0_202; \ | | |
| 42062 | float16x4_t __s1_202 = __p1_202; \ | | |
| 42063 | float16x4_t __s2_202 = __p2_202; \ | | |
| 42064 | float16x4_t __rev0_202; __rev0_202 = __builtin_shufflevector(__s0_202, __s0_202, 3, 2, 1, 0); \ | | |
| 42065 | float16x4_t __rev1_202; __rev1_202 = __builtin_shufflevector(__s1_202, __s1_202, 3, 2, 1, 0); \ | | |
| 42066 | float16x4_t __rev2_202; __rev2_202 = __builtin_shufflevector(__s2_202, __s2_202, 3, 2, 1, 0); \ | | |
| 42067 | float16x4_t __reint_202 = __rev2_202; \ | | |
| 42068 | uint32x2_t __reint1_202 = (uint32x2_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_202, __p3_202), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_202, __p3_202)}; \ | | |
| 42069 | __ret_202 = __noswap_vcmla_f16(__rev0_202, __rev1_202, *(float16x4_t *) &__reint1_202); \ | | |
| 42070 | __ret_202 = __builtin_shufflevector(__ret_202, __ret_202, 3, 2, 1, 0); \ | | |
| 42071 | __ret_202; \ | | |
| 42072 | }) | | |
| 42073 | #endif | | |
| 42074 | | | |
| 42075 | #ifdef __LITTLE_ENDIAN__ | | |
| 42076 | #define vcmlaq_lane_f16(__p0_203, __p1_203, __p2_203, __p3_203) __extension__ ({ \ | | |
| 42077 | float16x8_t __ret_203; \ | | |
| 42078 | float16x8_t __s0_203 = __p0_203; \ | | |
| 42079 | float16x8_t __s1_203 = __p1_203; \ | | |
| 42080 | float16x4_t __s2_203 = __p2_203; \ | | |
| 42081 | float16x4_t __reint_203 = __s2_203; \ | | |
| 42082 | uint32x4_t __reint1_203 = (uint32x4_t) {vget_lane_u32(*(uint32x2_t *) &__reint_203, __p3_203), vget_lane_u32(*(uint32x2_t *) &__reint_203, __p3_203), vget_lane_u32(*(uint32x2_t *) &__reint_203, __p3_203), vget_lane_u32(*(uint32x2_t *) &__reint_203, __p3_203)}; \ | | |
| 42083 | __ret_203 = vcmlaq_f16(__s0_203, __s1_203, *(float16x8_t *) &__reint1_203); \ | | |
| 42084 | __ret_203; \ | | |
| 42085 | }) | | |
| 42086 | #else | | |
| 42087 | #define vcmlaq_lane_f16(__p0_204, __p1_204, __p2_204, __p3_204) __extension__ ({ \ | | |
| 42088 | float16x8_t __ret_204; \ | | |
| 42089 | float16x8_t __s0_204 = __p0_204; \ | | |
| 42090 | float16x8_t __s1_204 = __p1_204; \ | | |
| 42091 | float16x4_t __s2_204 = __p2_204; \ | | |
| 42092 | float16x8_t __rev0_204; __rev0_204 = __builtin_shufflevector(__s0_204, __s0_204, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42093 | float16x8_t __rev1_204; __rev1_204 = __builtin_shufflevector(__s1_204, __s1_204, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42094 | float16x4_t __rev2_204; __rev2_204 = __builtin_shufflevector(__s2_204, __s2_204, 3, 2, 1, 0); \ | | |
| 42095 | float16x4_t __reint_204 = __rev2_204; \ | | |
| 42096 | uint32x4_t __reint1_204 = (uint32x4_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_204, __p3_204), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_204, __p3_204), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_204, __p3_204), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_204, __p3_204)}; \ | | |
| 42097 | __ret_204 = __noswap_vcmlaq_f16(__rev0_204, __rev1_204, *(float16x8_t *) &__reint1_204); \ | | |
| 42098 | __ret_204 = __builtin_shufflevector(__ret_204, __ret_204, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42099 | __ret_204; \ | | |
| 42100 | }) | | |
| 42101 | #endif | | |
| 42102 | | | |
| 42103 | #ifdef __LITTLE_ENDIAN__ | | |
| 42104 | #define vcmla_laneq_f16(__p0_205, __p1_205, __p2_205, __p3_205) __extension__ ({ \ | | |
| 42105 | float16x4_t __ret_205; \ | | |
| 42106 | float16x4_t __s0_205 = __p0_205; \ | | |
| 42107 | float16x4_t __s1_205 = __p1_205; \ | | |
| 42108 | float16x8_t __s2_205 = __p2_205; \ | | |
| 42109 | float16x8_t __reint_205 = __s2_205; \ | | |
| 42110 | uint32x2_t __reint1_205 = (uint32x2_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_205, __p3_205), vgetq_lane_u32(*(uint32x4_t *) &__reint_205, __p3_205)}; \ | | |
| 42111 | __ret_205 = vcmla_f16(__s0_205, __s1_205, *(float16x4_t *) &__reint1_205); \ | | |
| 42112 | __ret_205; \ | | |
| 42113 | }) | | |
| 42114 | #else | | |
| 42115 | #define vcmla_laneq_f16(__p0_206, __p1_206, __p2_206, __p3_206) __extension__ ({ \ | | |
| 42116 | float16x4_t __ret_206; \ | | |
| 42117 | float16x4_t __s0_206 = __p0_206; \ | | |
| 42118 | float16x4_t __s1_206 = __p1_206; \ | | |
| 42119 | float16x8_t __s2_206 = __p2_206; \ | | |
| 42120 | float16x4_t __rev0_206; __rev0_206 = __builtin_shufflevector(__s0_206, __s0_206, 3, 2, 1, 0); \ | | |
| 42121 | float16x4_t __rev1_206; __rev1_206 = __builtin_shufflevector(__s1_206, __s1_206, 3, 2, 1, 0); \ | | |
| 42122 | float16x8_t __rev2_206; __rev2_206 = __builtin_shufflevector(__s2_206, __s2_206, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42123 | float16x8_t __reint_206 = __rev2_206; \ | | |
| 42124 | uint32x2_t __reint1_206 = (uint32x2_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_206, __p3_206), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_206, __p3_206)}; \ | | |
| 42125 | __ret_206 = __noswap_vcmla_f16(__rev0_206, __rev1_206, *(float16x4_t *) &__reint1_206); \ | | |
| 42126 | __ret_206 = __builtin_shufflevector(__ret_206, __ret_206, 3, 2, 1, 0); \ | | |
| 42127 | __ret_206; \ | | |
| 42128 | }) | | |
| 42129 | #endif | | |
| 42130 | | | |
| 42131 | #ifdef __LITTLE_ENDIAN__ | | |
| 42132 | #define vcmlaq_laneq_f16(__p0_207, __p1_207, __p2_207, __p3_207) __extension__ ({ \ | | |
| 42133 | float16x8_t __ret_207; \ | | |
| 42134 | float16x8_t __s0_207 = __p0_207; \ | | |
| 42135 | float16x8_t __s1_207 = __p1_207; \ | | |
| 42136 | float16x8_t __s2_207 = __p2_207; \ | | |
| 42137 | float16x8_t __reint_207 = __s2_207; \ | | |
| 42138 | uint32x4_t __reint1_207 = (uint32x4_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_207, __p3_207), vgetq_lane_u32(*(uint32x4_t *) &__reint_207, __p3_207), vgetq_lane_u32(*(uint32x4_t *) &__reint_207, __p3_207), vgetq_lane_u32(*(uint32x4_t *) &__reint_207, __p3_207)}; \ | | |
| 42139 | __ret_207 = vcmlaq_f16(__s0_207, __s1_207, *(float16x8_t *) &__reint1_207); \ | | |
| 42140 | __ret_207; \ | | |
| 42141 | }) | | |
| 42142 | #else | | |
| 42143 | #define vcmlaq_laneq_f16(__p0_208, __p1_208, __p2_208, __p3_208) __extension__ ({ \ | | |
| 42144 | float16x8_t __ret_208; \ | | |
| 42145 | float16x8_t __s0_208 = __p0_208; \ | | |
| 42146 | float16x8_t __s1_208 = __p1_208; \ | | |
| 42147 | float16x8_t __s2_208 = __p2_208; \ | | |
| 42148 | float16x8_t __rev0_208; __rev0_208 = __builtin_shufflevector(__s0_208, __s0_208, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42149 | float16x8_t __rev1_208; __rev1_208 = __builtin_shufflevector(__s1_208, __s1_208, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42150 | float16x8_t __rev2_208; __rev2_208 = __builtin_shufflevector(__s2_208, __s2_208, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42151 | float16x8_t __reint_208 = __rev2_208; \ | | |
| 42152 | uint32x4_t __reint1_208 = (uint32x4_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_208, __p3_208), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_208, __p3_208), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_208, __p3_208), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_208, __p3_208)}; \ | | |
| 42153 | __ret_208 = __noswap_vcmlaq_f16(__rev0_208, __rev1_208, *(float16x8_t *) &__reint1_208); \ | | |
| 42154 | __ret_208 = __builtin_shufflevector(__ret_208, __ret_208, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42155 | __ret_208; \ | | |
| 42156 | }) | | |
| 42157 | #endif | | |
| 42158 | | | |
| 42159 | #ifdef __LITTLE_ENDIAN__ | | |
| 42160 | __ai float16x8_t vcmlaq_rot180_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | | |
| 42161 | float16x8_t __ret; | | |
| 42162 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot180_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); | | |
| 42163 | return __ret; | 43104 | return __ret; |
| 42164 | } | 43105 | } |
| 42165 | #else | 43106 | __ai uint64_t vcged_u64(uint64_t __p0, uint64_t __p1) { |
| 42166 | __ai float16x8_t vcmlaq_rot180_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43107 | uint64_t __ret; |
| 42167 | float16x8_t __ret; | 43108 | __ret = (uint64_t) __builtin_neon_vcged_u64(__p0, __p1); |
| 42168 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 42169 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 42170 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 42171 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot180_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 40); | | |
| 42172 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 42173 | return __ret; | 43109 | return __ret; |
| 42174 | } | 43110 | } |
| 42175 | __ai float16x8_t __noswap_vcmlaq_rot180_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43111 | __ai uint64_t vcged_f64(float64_t __p0, float64_t __p1) { |
| 42176 | float16x8_t __ret; | 43112 | uint64_t __ret; |
| 42177 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot180_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); | 43113 | __ret = (uint64_t) __builtin_neon_vcged_f64(__p0, __p1); |
| 42178 | return __ret; | 43114 | return __ret; |
| 42179 | } | 43115 | } |
| 42180 | #endif | 43116 | __ai uint32_t vcges_f32(float32_t __p0, float32_t __p1) { |
| 42181 | | 43117 | uint32_t __ret; |
| 42182 | #ifdef __LITTLE_ENDIAN__ | 43118 | __ret = (uint32_t) __builtin_neon_vcges_f32(__p0, __p1); |
| 42183 | __ai float16x4_t vcmla_rot180_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | | |
| 42184 | float16x4_t __ret; | | |
| 42185 | __ret = (float16x4_t) __builtin_neon_vcmla_rot180_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); | | |
| 42186 | return __ret; | 43119 | return __ret; |
| 42187 | } | 43120 | } |
| 42188 | #else | 43121 | #ifdef __LITTLE_ENDIAN__ |
| 42189 | __ai float16x4_t vcmla_rot180_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43122 | __ai uint8x16_t vcgezq_s8(int8x16_t __p0) { |
| 42190 | float16x4_t __ret; | 43123 | uint8x16_t __ret; |
| 42191 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 43124 | __ret = (uint8x16_t) __builtin_neon_vcgezq_v((int8x16_t)__p0, 48); |
| 42192 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 42193 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | | |
| 42194 | __ret = (float16x4_t) __builtin_neon_vcmla_rot180_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 8); | | |
| 42195 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 42196 | return __ret; | 43125 | return __ret; |
| 42197 | } | 43126 | } |
| 42198 | __ai float16x4_t __noswap_vcmla_rot180_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43127 | #else |
| 42199 | float16x4_t __ret; | 43128 | __ai uint8x16_t vcgezq_s8(int8x16_t __p0) { |
| 42200 | __ret = (float16x4_t) __builtin_neon_vcmla_rot180_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); | 43129 | uint8x16_t __ret; |
| | 43130 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 43131 | __ret = (uint8x16_t) __builtin_neon_vcgezq_v((int8x16_t)__rev0, 48); |
| | 43132 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 42201 | return __ret; | 43133 | return __ret; |
| 42202 | } | 43134 | } |
| 42203 | #endif | 43135 | #endif |
| 42204 | | 43136 | |
| 42205 | #ifdef __LITTLE_ENDIAN__ | 43137 | #ifdef __LITTLE_ENDIAN__ |
| 42206 | #define vcmla_rot180_lane_f16(__p0_209, __p1_209, __p2_209, __p3_209) __extension__ ({ \ | 43138 | __ai uint64x2_t vcgezq_f64(float64x2_t __p0) { |
| 42207 | float16x4_t __ret_209; \ | 43139 | uint64x2_t __ret; |
| 42208 | float16x4_t __s0_209 = __p0_209; \ | 43140 | __ret = (uint64x2_t) __builtin_neon_vcgezq_v((int8x16_t)__p0, 51); |
| 42209 | float16x4_t __s1_209 = __p1_209; \ | | |
| 42210 | float16x4_t __s2_209 = __p2_209; \ | | |
| 42211 | float16x4_t __reint_209 = __s2_209; \ | | |
| 42212 | uint32x2_t __reint1_209 = (uint32x2_t) {vget_lane_u32(*(uint32x2_t *) &__reint_209, __p3_209), vget_lane_u32(*(uint32x2_t *) &__reint_209, __p3_209)}; \ | | |
| 42213 | __ret_209 = vcmla_rot180_f16(__s0_209, __s1_209, *(float16x4_t *) &__reint1_209); \ | | |
| 42214 | __ret_209; \ | | |
| 42215 | }) | | |
| 42216 | #else | | |
| 42217 | #define vcmla_rot180_lane_f16(__p0_210, __p1_210, __p2_210, __p3_210) __extension__ ({ \ | | |
| 42218 | float16x4_t __ret_210; \ | | |
| 42219 | float16x4_t __s0_210 = __p0_210; \ | | |
| 42220 | float16x4_t __s1_210 = __p1_210; \ | | |
| 42221 | float16x4_t __s2_210 = __p2_210; \ | | |
| 42222 | float16x4_t __rev0_210; __rev0_210 = __builtin_shufflevector(__s0_210, __s0_210, 3, 2, 1, 0); \ | | |
| 42223 | float16x4_t __rev1_210; __rev1_210 = __builtin_shufflevector(__s1_210, __s1_210, 3, 2, 1, 0); \ | | |
| 42224 | float16x4_t __rev2_210; __rev2_210 = __builtin_shufflevector(__s2_210, __s2_210, 3, 2, 1, 0); \ | | |
| 42225 | float16x4_t __reint_210 = __rev2_210; \ | | |
| 42226 | uint32x2_t __reint1_210 = (uint32x2_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_210, __p3_210), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_210, __p3_210)}; \ | | |
| 42227 | __ret_210 = __noswap_vcmla_rot180_f16(__rev0_210, __rev1_210, *(float16x4_t *) &__reint1_210); \ | | |
| 42228 | __ret_210 = __builtin_shufflevector(__ret_210, __ret_210, 3, 2, 1, 0); \ | | |
| 42229 | __ret_210; \ | | |
| 42230 | }) | | |
| 42231 | #endif | | |
| 42232 | | | |
| 42233 | #ifdef __LITTLE_ENDIAN__ | | |
| 42234 | #define vcmlaq_rot180_lane_f16(__p0_211, __p1_211, __p2_211, __p3_211) __extension__ ({ \ | | |
| 42235 | float16x8_t __ret_211; \ | | |
| 42236 | float16x8_t __s0_211 = __p0_211; \ | | |
| 42237 | float16x8_t __s1_211 = __p1_211; \ | | |
| 42238 | float16x4_t __s2_211 = __p2_211; \ | | |
| 42239 | float16x4_t __reint_211 = __s2_211; \ | | |
| 42240 | uint32x4_t __reint1_211 = (uint32x4_t) {vget_lane_u32(*(uint32x2_t *) &__reint_211, __p3_211), vget_lane_u32(*(uint32x2_t *) &__reint_211, __p3_211), vget_lane_u32(*(uint32x2_t *) &__reint_211, __p3_211), vget_lane_u32(*(uint32x2_t *) &__reint_211, __p3_211)}; \ | | |
| 42241 | __ret_211 = vcmlaq_rot180_f16(__s0_211, __s1_211, *(float16x8_t *) &__reint1_211); \ | | |
| 42242 | __ret_211; \ | | |
| 42243 | }) | | |
| 42244 | #else | | |
| 42245 | #define vcmlaq_rot180_lane_f16(__p0_212, __p1_212, __p2_212, __p3_212) __extension__ ({ \ | | |
| 42246 | float16x8_t __ret_212; \ | | |
| 42247 | float16x8_t __s0_212 = __p0_212; \ | | |
| 42248 | float16x8_t __s1_212 = __p1_212; \ | | |
| 42249 | float16x4_t __s2_212 = __p2_212; \ | | |
| 42250 | float16x8_t __rev0_212; __rev0_212 = __builtin_shufflevector(__s0_212, __s0_212, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42251 | float16x8_t __rev1_212; __rev1_212 = __builtin_shufflevector(__s1_212, __s1_212, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42252 | float16x4_t __rev2_212; __rev2_212 = __builtin_shufflevector(__s2_212, __s2_212, 3, 2, 1, 0); \ | | |
| 42253 | float16x4_t __reint_212 = __rev2_212; \ | | |
| 42254 | uint32x4_t __reint1_212 = (uint32x4_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_212, __p3_212), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_212, __p3_212), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_212, __p3_212), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_212, __p3_212)}; \ | | |
| 42255 | __ret_212 = __noswap_vcmlaq_rot180_f16(__rev0_212, __rev1_212, *(float16x8_t *) &__reint1_212); \ | | |
| 42256 | __ret_212 = __builtin_shufflevector(__ret_212, __ret_212, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42257 | __ret_212; \ | | |
| 42258 | }) | | |
| 42259 | #endif | | |
| 42260 | | | |
| 42261 | #ifdef __LITTLE_ENDIAN__ | | |
| 42262 | #define vcmla_rot180_laneq_f16(__p0_213, __p1_213, __p2_213, __p3_213) __extension__ ({ \ | | |
| 42263 | float16x4_t __ret_213; \ | | |
| 42264 | float16x4_t __s0_213 = __p0_213; \ | | |
| 42265 | float16x4_t __s1_213 = __p1_213; \ | | |
| 42266 | float16x8_t __s2_213 = __p2_213; \ | | |
| 42267 | float16x8_t __reint_213 = __s2_213; \ | | |
| 42268 | uint32x2_t __reint1_213 = (uint32x2_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_213, __p3_213), vgetq_lane_u32(*(uint32x4_t *) &__reint_213, __p3_213)}; \ | | |
| 42269 | __ret_213 = vcmla_rot180_f16(__s0_213, __s1_213, *(float16x4_t *) &__reint1_213); \ | | |
| 42270 | __ret_213; \ | | |
| 42271 | }) | | |
| 42272 | #else | | |
| 42273 | #define vcmla_rot180_laneq_f16(__p0_214, __p1_214, __p2_214, __p3_214) __extension__ ({ \ | | |
| 42274 | float16x4_t __ret_214; \ | | |
| 42275 | float16x4_t __s0_214 = __p0_214; \ | | |
| 42276 | float16x4_t __s1_214 = __p1_214; \ | | |
| 42277 | float16x8_t __s2_214 = __p2_214; \ | | |
| 42278 | float16x4_t __rev0_214; __rev0_214 = __builtin_shufflevector(__s0_214, __s0_214, 3, 2, 1, 0); \ | | |
| 42279 | float16x4_t __rev1_214; __rev1_214 = __builtin_shufflevector(__s1_214, __s1_214, 3, 2, 1, 0); \ | | |
| 42280 | float16x8_t __rev2_214; __rev2_214 = __builtin_shufflevector(__s2_214, __s2_214, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42281 | float16x8_t __reint_214 = __rev2_214; \ | | |
| 42282 | uint32x2_t __reint1_214 = (uint32x2_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_214, __p3_214), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_214, __p3_214)}; \ | | |
| 42283 | __ret_214 = __noswap_vcmla_rot180_f16(__rev0_214, __rev1_214, *(float16x4_t *) &__reint1_214); \ | | |
| 42284 | __ret_214 = __builtin_shufflevector(__ret_214, __ret_214, 3, 2, 1, 0); \ | | |
| 42285 | __ret_214; \ | | |
| 42286 | }) | | |
| 42287 | #endif | | |
| 42288 | | | |
| 42289 | #ifdef __LITTLE_ENDIAN__ | | |
| 42290 | #define vcmlaq_rot180_laneq_f16(__p0_215, __p1_215, __p2_215, __p3_215) __extension__ ({ \ | | |
| 42291 | float16x8_t __ret_215; \ | | |
| 42292 | float16x8_t __s0_215 = __p0_215; \ | | |
| 42293 | float16x8_t __s1_215 = __p1_215; \ | | |
| 42294 | float16x8_t __s2_215 = __p2_215; \ | | |
| 42295 | float16x8_t __reint_215 = __s2_215; \ | | |
| 42296 | uint32x4_t __reint1_215 = (uint32x4_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_215, __p3_215), vgetq_lane_u32(*(uint32x4_t *) &__reint_215, __p3_215), vgetq_lane_u32(*(uint32x4_t *) &__reint_215, __p3_215), vgetq_lane_u32(*(uint32x4_t *) &__reint_215, __p3_215)}; \ | | |
| 42297 | __ret_215 = vcmlaq_rot180_f16(__s0_215, __s1_215, *(float16x8_t *) &__reint1_215); \ | | |
| 42298 | __ret_215; \ | | |
| 42299 | }) | | |
| 42300 | #else | | |
| 42301 | #define vcmlaq_rot180_laneq_f16(__p0_216, __p1_216, __p2_216, __p3_216) __extension__ ({ \ | | |
| 42302 | float16x8_t __ret_216; \ | | |
| 42303 | float16x8_t __s0_216 = __p0_216; \ | | |
| 42304 | float16x8_t __s1_216 = __p1_216; \ | | |
| 42305 | float16x8_t __s2_216 = __p2_216; \ | | |
| 42306 | float16x8_t __rev0_216; __rev0_216 = __builtin_shufflevector(__s0_216, __s0_216, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42307 | float16x8_t __rev1_216; __rev1_216 = __builtin_shufflevector(__s1_216, __s1_216, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42308 | float16x8_t __rev2_216; __rev2_216 = __builtin_shufflevector(__s2_216, __s2_216, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42309 | float16x8_t __reint_216 = __rev2_216; \ | | |
| 42310 | uint32x4_t __reint1_216 = (uint32x4_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_216, __p3_216), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_216, __p3_216), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_216, __p3_216), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_216, __p3_216)}; \ | | |
| 42311 | __ret_216 = __noswap_vcmlaq_rot180_f16(__rev0_216, __rev1_216, *(float16x8_t *) &__reint1_216); \ | | |
| 42312 | __ret_216 = __builtin_shufflevector(__ret_216, __ret_216, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42313 | __ret_216; \ | | |
| 42314 | }) | | |
| 42315 | #endif | | |
| 42316 | | | |
| 42317 | #ifdef __LITTLE_ENDIAN__ | | |
| 42318 | __ai float16x8_t vcmlaq_rot270_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | | |
| 42319 | float16x8_t __ret; | | |
| 42320 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot270_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); | | |
| 42321 | return __ret; | 43141 | return __ret; |
| 42322 | } | 43142 | } |
| 42323 | #else | 43143 | #else |
| 42324 | __ai float16x8_t vcmlaq_rot270_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43144 | __ai uint64x2_t vcgezq_f64(float64x2_t __p0) { |
| 42325 | float16x8_t __ret; | 43145 | uint64x2_t __ret; |
| 42326 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 43146 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 42327 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 43147 | __ret = (uint64x2_t) __builtin_neon_vcgezq_v((int8x16_t)__rev0, 51); |
| 42328 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 43148 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 42329 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot270_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 40); | | |
| 42330 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 42331 | return __ret; | | |
| 42332 | } | | |
| 42333 | __ai float16x8_t __noswap_vcmlaq_rot270_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | | |
| 42334 | float16x8_t __ret; | | |
| 42335 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot270_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); | | |
| 42336 | return __ret; | 43149 | return __ret; |
| 42337 | } | 43150 | } |
| 42338 | #endif | 43151 | #endif |
| 42339 | | 43152 | |
| 42340 | #ifdef __LITTLE_ENDIAN__ | 43153 | #ifdef __LITTLE_ENDIAN__ |
| 42341 | __ai float16x4_t vcmla_rot270_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43154 | __ai uint32x4_t vcgezq_f32(float32x4_t __p0) { |
| 42342 | float16x4_t __ret; | 43155 | uint32x4_t __ret; |
| 42343 | __ret = (float16x4_t) __builtin_neon_vcmla_rot270_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); | 43156 | __ret = (uint32x4_t) __builtin_neon_vcgezq_v((int8x16_t)__p0, 50); |
| 42344 | return __ret; | 43157 | return __ret; |
| 42345 | } | 43158 | } |
| 42346 | #else | 43159 | #else |
| 42347 | __ai float16x4_t vcmla_rot270_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43160 | __ai uint32x4_t vcgezq_f32(float32x4_t __p0) { |
| 42348 | float16x4_t __ret; | 43161 | uint32x4_t __ret; |
| 42349 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 43162 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 42350 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 43163 | __ret = (uint32x4_t) __builtin_neon_vcgezq_v((int8x16_t)__rev0, 50); |
| 42351 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | | |
| 42352 | __ret = (float16x4_t) __builtin_neon_vcmla_rot270_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 8); | | |
| 42353 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 43164 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 42354 | return __ret; | 43165 | return __ret; |
| 42355 | } | 43166 | } |
| 42356 | __ai float16x4_t __noswap_vcmla_rot270_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | | |
| 42357 | float16x4_t __ret; | | |
| 42358 | __ret = (float16x4_t) __builtin_neon_vcmla_rot270_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); | | |
| 42359 | return __ret; | | |
| 42360 | } | | |
| 42361 | #endif | | |
| 42362 | | | |
| 42363 | #ifdef __LITTLE_ENDIAN__ | | |
| 42364 | #define vcmla_rot270_lane_f16(__p0_217, __p1_217, __p2_217, __p3_217) __extension__ ({ \ | | |
| 42365 | float16x4_t __ret_217; \ | | |
| 42366 | float16x4_t __s0_217 = __p0_217; \ | | |
| 42367 | float16x4_t __s1_217 = __p1_217; \ | | |
| 42368 | float16x4_t __s2_217 = __p2_217; \ | | |
| 42369 | float16x4_t __reint_217 = __s2_217; \ | | |
| 42370 | uint32x2_t __reint1_217 = (uint32x2_t) {vget_lane_u32(*(uint32x2_t *) &__reint_217, __p3_217), vget_lane_u32(*(uint32x2_t *) &__reint_217, __p3_217)}; \ | | |
| 42371 | __ret_217 = vcmla_rot270_f16(__s0_217, __s1_217, *(float16x4_t *) &__reint1_217); \ | | |
| 42372 | __ret_217; \ | | |
| 42373 | }) | | |
| 42374 | #else | | |
| 42375 | #define vcmla_rot270_lane_f16(__p0_218, __p1_218, __p2_218, __p3_218) __extension__ ({ \ | | |
| 42376 | float16x4_t __ret_218; \ | | |
| 42377 | float16x4_t __s0_218 = __p0_218; \ | | |
| 42378 | float16x4_t __s1_218 = __p1_218; \ | | |
| 42379 | float16x4_t __s2_218 = __p2_218; \ | | |
| 42380 | float16x4_t __rev0_218; __rev0_218 = __builtin_shufflevector(__s0_218, __s0_218, 3, 2, 1, 0); \ | | |
| 42381 | float16x4_t __rev1_218; __rev1_218 = __builtin_shufflevector(__s1_218, __s1_218, 3, 2, 1, 0); \ | | |
| 42382 | float16x4_t __rev2_218; __rev2_218 = __builtin_shufflevector(__s2_218, __s2_218, 3, 2, 1, 0); \ | | |
| 42383 | float16x4_t __reint_218 = __rev2_218; \ | | |
| 42384 | uint32x2_t __reint1_218 = (uint32x2_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_218, __p3_218), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_218, __p3_218)}; \ | | |
| 42385 | __ret_218 = __noswap_vcmla_rot270_f16(__rev0_218, __rev1_218, *(float16x4_t *) &__reint1_218); \ | | |
| 42386 | __ret_218 = __builtin_shufflevector(__ret_218, __ret_218, 3, 2, 1, 0); \ | | |
| 42387 | __ret_218; \ | | |
| 42388 | }) | | |
| 42389 | #endif | | |
| 42390 | | | |
| 42391 | #ifdef __LITTLE_ENDIAN__ | | |
| 42392 | #define vcmlaq_rot270_lane_f16(__p0_219, __p1_219, __p2_219, __p3_219) __extension__ ({ \ | | |
| 42393 | float16x8_t __ret_219; \ | | |
| 42394 | float16x8_t __s0_219 = __p0_219; \ | | |
| 42395 | float16x8_t __s1_219 = __p1_219; \ | | |
| 42396 | float16x4_t __s2_219 = __p2_219; \ | | |
| 42397 | float16x4_t __reint_219 = __s2_219; \ | | |
| 42398 | uint32x4_t __reint1_219 = (uint32x4_t) {vget_lane_u32(*(uint32x2_t *) &__reint_219, __p3_219), vget_lane_u32(*(uint32x2_t *) &__reint_219, __p3_219), vget_lane_u32(*(uint32x2_t *) &__reint_219, __p3_219), vget_lane_u32(*(uint32x2_t *) &__reint_219, __p3_219)}; \ | | |
| 42399 | __ret_219 = vcmlaq_rot270_f16(__s0_219, __s1_219, *(float16x8_t *) &__reint1_219); \ | | |
| 42400 | __ret_219; \ | | |
| 42401 | }) | | |
| 42402 | #else | | |
| 42403 | #define vcmlaq_rot270_lane_f16(__p0_220, __p1_220, __p2_220, __p3_220) __extension__ ({ \ | | |
| 42404 | float16x8_t __ret_220; \ | | |
| 42405 | float16x8_t __s0_220 = __p0_220; \ | | |
| 42406 | float16x8_t __s1_220 = __p1_220; \ | | |
| 42407 | float16x4_t __s2_220 = __p2_220; \ | | |
| 42408 | float16x8_t __rev0_220; __rev0_220 = __builtin_shufflevector(__s0_220, __s0_220, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42409 | float16x8_t __rev1_220; __rev1_220 = __builtin_shufflevector(__s1_220, __s1_220, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42410 | float16x4_t __rev2_220; __rev2_220 = __builtin_shufflevector(__s2_220, __s2_220, 3, 2, 1, 0); \ | | |
| 42411 | float16x4_t __reint_220 = __rev2_220; \ | | |
| 42412 | uint32x4_t __reint1_220 = (uint32x4_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_220, __p3_220), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_220, __p3_220), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_220, __p3_220), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_220, __p3_220)}; \ | | |
| 42413 | __ret_220 = __noswap_vcmlaq_rot270_f16(__rev0_220, __rev1_220, *(float16x8_t *) &__reint1_220); \ | | |
| 42414 | __ret_220 = __builtin_shufflevector(__ret_220, __ret_220, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42415 | __ret_220; \ | | |
| 42416 | }) | | |
| 42417 | #endif | | |
| 42418 | | | |
| 42419 | #ifdef __LITTLE_ENDIAN__ | | |
| 42420 | #define vcmla_rot270_laneq_f16(__p0_221, __p1_221, __p2_221, __p3_221) __extension__ ({ \ | | |
| 42421 | float16x4_t __ret_221; \ | | |
| 42422 | float16x4_t __s0_221 = __p0_221; \ | | |
| 42423 | float16x4_t __s1_221 = __p1_221; \ | | |
| 42424 | float16x8_t __s2_221 = __p2_221; \ | | |
| 42425 | float16x8_t __reint_221 = __s2_221; \ | | |
| 42426 | uint32x2_t __reint1_221 = (uint32x2_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_221, __p3_221), vgetq_lane_u32(*(uint32x4_t *) &__reint_221, __p3_221)}; \ | | |
| 42427 | __ret_221 = vcmla_rot270_f16(__s0_221, __s1_221, *(float16x4_t *) &__reint1_221); \ | | |
| 42428 | __ret_221; \ | | |
| 42429 | }) | | |
| 42430 | #else | | |
| 42431 | #define vcmla_rot270_laneq_f16(__p0_222, __p1_222, __p2_222, __p3_222) __extension__ ({ \ | | |
| 42432 | float16x4_t __ret_222; \ | | |
| 42433 | float16x4_t __s0_222 = __p0_222; \ | | |
| 42434 | float16x4_t __s1_222 = __p1_222; \ | | |
| 42435 | float16x8_t __s2_222 = __p2_222; \ | | |
| 42436 | float16x4_t __rev0_222; __rev0_222 = __builtin_shufflevector(__s0_222, __s0_222, 3, 2, 1, 0); \ | | |
| 42437 | float16x4_t __rev1_222; __rev1_222 = __builtin_shufflevector(__s1_222, __s1_222, 3, 2, 1, 0); \ | | |
| 42438 | float16x8_t __rev2_222; __rev2_222 = __builtin_shufflevector(__s2_222, __s2_222, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42439 | float16x8_t __reint_222 = __rev2_222; \ | | |
| 42440 | uint32x2_t __reint1_222 = (uint32x2_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_222, __p3_222), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_222, __p3_222)}; \ | | |
| 42441 | __ret_222 = __noswap_vcmla_rot270_f16(__rev0_222, __rev1_222, *(float16x4_t *) &__reint1_222); \ | | |
| 42442 | __ret_222 = __builtin_shufflevector(__ret_222, __ret_222, 3, 2, 1, 0); \ | | |
| 42443 | __ret_222; \ | | |
| 42444 | }) | | |
| 42445 | #endif | | |
| 42446 | | | |
| 42447 | #ifdef __LITTLE_ENDIAN__ | | |
| 42448 | #define vcmlaq_rot270_laneq_f16(__p0_223, __p1_223, __p2_223, __p3_223) __extension__ ({ \ | | |
| 42449 | float16x8_t __ret_223; \ | | |
| 42450 | float16x8_t __s0_223 = __p0_223; \ | | |
| 42451 | float16x8_t __s1_223 = __p1_223; \ | | |
| 42452 | float16x8_t __s2_223 = __p2_223; \ | | |
| 42453 | float16x8_t __reint_223 = __s2_223; \ | | |
| 42454 | uint32x4_t __reint1_223 = (uint32x4_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_223, __p3_223), vgetq_lane_u32(*(uint32x4_t *) &__reint_223, __p3_223), vgetq_lane_u32(*(uint32x4_t *) &__reint_223, __p3_223), vgetq_lane_u32(*(uint32x4_t *) &__reint_223, __p3_223)}; \ | | |
| 42455 | __ret_223 = vcmlaq_rot270_f16(__s0_223, __s1_223, *(float16x8_t *) &__reint1_223); \ | | |
| 42456 | __ret_223; \ | | |
| 42457 | }) | | |
| 42458 | #else | | |
| 42459 | #define vcmlaq_rot270_laneq_f16(__p0_224, __p1_224, __p2_224, __p3_224) __extension__ ({ \ | | |
| 42460 | float16x8_t __ret_224; \ | | |
| 42461 | float16x8_t __s0_224 = __p0_224; \ | | |
| 42462 | float16x8_t __s1_224 = __p1_224; \ | | |
| 42463 | float16x8_t __s2_224 = __p2_224; \ | | |
| 42464 | float16x8_t __rev0_224; __rev0_224 = __builtin_shufflevector(__s0_224, __s0_224, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42465 | float16x8_t __rev1_224; __rev1_224 = __builtin_shufflevector(__s1_224, __s1_224, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42466 | float16x8_t __rev2_224; __rev2_224 = __builtin_shufflevector(__s2_224, __s2_224, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42467 | float16x8_t __reint_224 = __rev2_224; \ | | |
| 42468 | uint32x4_t __reint1_224 = (uint32x4_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_224, __p3_224), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_224, __p3_224), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_224, __p3_224), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_224, __p3_224)}; \ | | |
| 42469 | __ret_224 = __noswap_vcmlaq_rot270_f16(__rev0_224, __rev1_224, *(float16x8_t *) &__reint1_224); \ | | |
| 42470 | __ret_224 = __builtin_shufflevector(__ret_224, __ret_224, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42471 | __ret_224; \ | | |
| 42472 | }) | | |
| 42473 | #endif | 43167 | #endif |
| 42474 | | 43168 | |
| 42475 | #ifdef __LITTLE_ENDIAN__ | 43169 | #ifdef __LITTLE_ENDIAN__ |
| 42476 | __ai float16x8_t vcmlaq_rot90_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43170 | __ai uint32x4_t vcgezq_s32(int32x4_t __p0) { |
| 42477 | float16x8_t __ret; | 43171 | uint32x4_t __ret; |
| 42478 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot90_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); | 43172 | __ret = (uint32x4_t) __builtin_neon_vcgezq_v((int8x16_t)__p0, 50); |
| 42479 | return __ret; | 43173 | return __ret; |
| 42480 | } | 43174 | } |
| 42481 | #else | 43175 | #else |
| 42482 | __ai float16x8_t vcmlaq_rot90_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43176 | __ai uint32x4_t vcgezq_s32(int32x4_t __p0) { |
| 42483 | float16x8_t __ret; | 43177 | uint32x4_t __ret; |
| 42484 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 43178 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 42485 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 43179 | __ret = (uint32x4_t) __builtin_neon_vcgezq_v((int8x16_t)__rev0, 50); |
| 42486 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 43180 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 42487 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot90_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 40); | | |
| 42488 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 42489 | return __ret; | | |
| 42490 | } | | |
| 42491 | __ai float16x8_t __noswap_vcmlaq_rot90_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | | |
| 42492 | float16x8_t __ret; | | |
| 42493 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot90_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); | | |
| 42494 | return __ret; | 43181 | return __ret; |
| 42495 | } | 43182 | } |
| 42496 | #endif | 43183 | #endif |
| 42497 | | 43184 | |
| 42498 | #ifdef __LITTLE_ENDIAN__ | 43185 | #ifdef __LITTLE_ENDIAN__ |
| 42499 | __ai float16x4_t vcmla_rot90_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43186 | __ai uint64x2_t vcgezq_s64(int64x2_t __p0) { |
| 42500 | float16x4_t __ret; | 43187 | uint64x2_t __ret; |
| 42501 | __ret = (float16x4_t) __builtin_neon_vcmla_rot90_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); | 43188 | __ret = (uint64x2_t) __builtin_neon_vcgezq_v((int8x16_t)__p0, 51); |
| 42502 | return __ret; | 43189 | return __ret; |
| 42503 | } | 43190 | } |
| 42504 | #else | 43191 | #else |
| 42505 | __ai float16x4_t vcmla_rot90_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43192 | __ai uint64x2_t vcgezq_s64(int64x2_t __p0) { |
| 42506 | float16x4_t __ret; | 43193 | uint64x2_t __ret; |
| 42507 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 43194 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 42508 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 43195 | __ret = (uint64x2_t) __builtin_neon_vcgezq_v((int8x16_t)__rev0, 51); |
| 42509 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 43196 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 42510 | __ret = (float16x4_t) __builtin_neon_vcmla_rot90_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 8); | | |
| 42511 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 42512 | return __ret; | | |
| 42513 | } | | |
| 42514 | __ai float16x4_t __noswap_vcmla_rot90_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | | |
| 42515 | float16x4_t __ret; | | |
| 42516 | __ret = (float16x4_t) __builtin_neon_vcmla_rot90_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); | | |
| 42517 | return __ret; | 43197 | return __ret; |
| 42518 | } | 43198 | } |
| 42519 | #endif | 43199 | #endif |
| 42520 | | 43200 | |
| 42521 | #ifdef __LITTLE_ENDIAN__ | 43201 | #ifdef __LITTLE_ENDIAN__ |
| 42522 | #define vcmla_rot90_lane_f16(__p0_225, __p1_225, __p2_225, __p3_225) __extension__ ({ \ | 43202 | __ai uint16x8_t vcgezq_s16(int16x8_t __p0) { |
| 42523 | float16x4_t __ret_225; \ | 43203 | uint16x8_t __ret; |
| 42524 | float16x4_t __s0_225 = __p0_225; \ | 43204 | __ret = (uint16x8_t) __builtin_neon_vcgezq_v((int8x16_t)__p0, 49); |
| 42525 | float16x4_t __s1_225 = __p1_225; \ | 43205 | return __ret; |
| 42526 | float16x4_t __s2_225 = __p2_225; \ | 43206 | } |
| 42527 | float16x4_t __reint_225 = __s2_225; \ | | |
| 42528 | uint32x2_t __reint1_225 = (uint32x2_t) {vget_lane_u32(*(uint32x2_t *) &__reint_225, __p3_225), vget_lane_u32(*(uint32x2_t *) &__reint_225, __p3_225)}; \ | | |
| 42529 | __ret_225 = vcmla_rot90_f16(__s0_225, __s1_225, *(float16x4_t *) &__reint1_225); \ | | |
| 42530 | __ret_225; \ | | |
| 42531 | }) | | |
| 42532 | #else | | |
| 42533 | #define vcmla_rot90_lane_f16(__p0_226, __p1_226, __p2_226, __p3_226) __extension__ ({ \ | | |
| 42534 | float16x4_t __ret_226; \ | | |
| 42535 | float16x4_t __s0_226 = __p0_226; \ | | |
| 42536 | float16x4_t __s1_226 = __p1_226; \ | | |
| 42537 | float16x4_t __s2_226 = __p2_226; \ | | |
| 42538 | float16x4_t __rev0_226; __rev0_226 = __builtin_shufflevector(__s0_226, __s0_226, 3, 2, 1, 0); \ | | |
| 42539 | float16x4_t __rev1_226; __rev1_226 = __builtin_shufflevector(__s1_226, __s1_226, 3, 2, 1, 0); \ | | |
| 42540 | float16x4_t __rev2_226; __rev2_226 = __builtin_shufflevector(__s2_226, __s2_226, 3, 2, 1, 0); \ | | |
| 42541 | float16x4_t __reint_226 = __rev2_226; \ | | |
| 42542 | uint32x2_t __reint1_226 = (uint32x2_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_226, __p3_226), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_226, __p3_226)}; \ | | |
| 42543 | __ret_226 = __noswap_vcmla_rot90_f16(__rev0_226, __rev1_226, *(float16x4_t *) &__reint1_226); \ | | |
| 42544 | __ret_226 = __builtin_shufflevector(__ret_226, __ret_226, 3, 2, 1, 0); \ | | |
| 42545 | __ret_226; \ | | |
| 42546 | }) | | |
| 42547 | #endif | | |
| 42548 | | | |
| 42549 | #ifdef __LITTLE_ENDIAN__ | | |
| 42550 | #define vcmlaq_rot90_lane_f16(__p0_227, __p1_227, __p2_227, __p3_227) __extension__ ({ \ | | |
| 42551 | float16x8_t __ret_227; \ | | |
| 42552 | float16x8_t __s0_227 = __p0_227; \ | | |
| 42553 | float16x8_t __s1_227 = __p1_227; \ | | |
| 42554 | float16x4_t __s2_227 = __p2_227; \ | | |
| 42555 | float16x4_t __reint_227 = __s2_227; \ | | |
| 42556 | uint32x4_t __reint1_227 = (uint32x4_t) {vget_lane_u32(*(uint32x2_t *) &__reint_227, __p3_227), vget_lane_u32(*(uint32x2_t *) &__reint_227, __p3_227), vget_lane_u32(*(uint32x2_t *) &__reint_227, __p3_227), vget_lane_u32(*(uint32x2_t *) &__reint_227, __p3_227)}; \ | | |
| 42557 | __ret_227 = vcmlaq_rot90_f16(__s0_227, __s1_227, *(float16x8_t *) &__reint1_227); \ | | |
| 42558 | __ret_227; \ | | |
| 42559 | }) | | |
| 42560 | #else | | |
| 42561 | #define vcmlaq_rot90_lane_f16(__p0_228, __p1_228, __p2_228, __p3_228) __extension__ ({ \ | | |
| 42562 | float16x8_t __ret_228; \ | | |
| 42563 | float16x8_t __s0_228 = __p0_228; \ | | |
| 42564 | float16x8_t __s1_228 = __p1_228; \ | | |
| 42565 | float16x4_t __s2_228 = __p2_228; \ | | |
| 42566 | float16x8_t __rev0_228; __rev0_228 = __builtin_shufflevector(__s0_228, __s0_228, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42567 | float16x8_t __rev1_228; __rev1_228 = __builtin_shufflevector(__s1_228, __s1_228, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42568 | float16x4_t __rev2_228; __rev2_228 = __builtin_shufflevector(__s2_228, __s2_228, 3, 2, 1, 0); \ | | |
| 42569 | float16x4_t __reint_228 = __rev2_228; \ | | |
| 42570 | uint32x4_t __reint1_228 = (uint32x4_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_228, __p3_228), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_228, __p3_228), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_228, __p3_228), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_228, __p3_228)}; \ | | |
| 42571 | __ret_228 = __noswap_vcmlaq_rot90_f16(__rev0_228, __rev1_228, *(float16x8_t *) &__reint1_228); \ | | |
| 42572 | __ret_228 = __builtin_shufflevector(__ret_228, __ret_228, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42573 | __ret_228; \ | | |
| 42574 | }) | | |
| 42575 | #endif | | |
| 42576 | | | |
| 42577 | #ifdef __LITTLE_ENDIAN__ | | |
| 42578 | #define vcmla_rot90_laneq_f16(__p0_229, __p1_229, __p2_229, __p3_229) __extension__ ({ \ | | |
| 42579 | float16x4_t __ret_229; \ | | |
| 42580 | float16x4_t __s0_229 = __p0_229; \ | | |
| 42581 | float16x4_t __s1_229 = __p1_229; \ | | |
| 42582 | float16x8_t __s2_229 = __p2_229; \ | | |
| 42583 | float16x8_t __reint_229 = __s2_229; \ | | |
| 42584 | uint32x2_t __reint1_229 = (uint32x2_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_229, __p3_229), vgetq_lane_u32(*(uint32x4_t *) &__reint_229, __p3_229)}; \ | | |
| 42585 | __ret_229 = vcmla_rot90_f16(__s0_229, __s1_229, *(float16x4_t *) &__reint1_229); \ | | |
| 42586 | __ret_229; \ | | |
| 42587 | }) | | |
| 42588 | #else | | |
| 42589 | #define vcmla_rot90_laneq_f16(__p0_230, __p1_230, __p2_230, __p3_230) __extension__ ({ \ | | |
| 42590 | float16x4_t __ret_230; \ | | |
| 42591 | float16x4_t __s0_230 = __p0_230; \ | | |
| 42592 | float16x4_t __s1_230 = __p1_230; \ | | |
| 42593 | float16x8_t __s2_230 = __p2_230; \ | | |
| 42594 | float16x4_t __rev0_230; __rev0_230 = __builtin_shufflevector(__s0_230, __s0_230, 3, 2, 1, 0); \ | | |
| 42595 | float16x4_t __rev1_230; __rev1_230 = __builtin_shufflevector(__s1_230, __s1_230, 3, 2, 1, 0); \ | | |
| 42596 | float16x8_t __rev2_230; __rev2_230 = __builtin_shufflevector(__s2_230, __s2_230, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42597 | float16x8_t __reint_230 = __rev2_230; \ | | |
| 42598 | uint32x2_t __reint1_230 = (uint32x2_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_230, __p3_230), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_230, __p3_230)}; \ | | |
| 42599 | __ret_230 = __noswap_vcmla_rot90_f16(__rev0_230, __rev1_230, *(float16x4_t *) &__reint1_230); \ | | |
| 42600 | __ret_230 = __builtin_shufflevector(__ret_230, __ret_230, 3, 2, 1, 0); \ | | |
| 42601 | __ret_230; \ | | |
| 42602 | }) | | |
| 42603 | #endif | | |
| 42604 | | | |
| 42605 | #ifdef __LITTLE_ENDIAN__ | | |
| 42606 | #define vcmlaq_rot90_laneq_f16(__p0_231, __p1_231, __p2_231, __p3_231) __extension__ ({ \ | | |
| 42607 | float16x8_t __ret_231; \ | | |
| 42608 | float16x8_t __s0_231 = __p0_231; \ | | |
| 42609 | float16x8_t __s1_231 = __p1_231; \ | | |
| 42610 | float16x8_t __s2_231 = __p2_231; \ | | |
| 42611 | float16x8_t __reint_231 = __s2_231; \ | | |
| 42612 | uint32x4_t __reint1_231 = (uint32x4_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_231, __p3_231), vgetq_lane_u32(*(uint32x4_t *) &__reint_231, __p3_231), vgetq_lane_u32(*(uint32x4_t *) &__reint_231, __p3_231), vgetq_lane_u32(*(uint32x4_t *) &__reint_231, __p3_231)}; \ | | |
| 42613 | __ret_231 = vcmlaq_rot90_f16(__s0_231, __s1_231, *(float16x8_t *) &__reint1_231); \ | | |
| 42614 | __ret_231; \ | | |
| 42615 | }) | | |
| 42616 | #else | 43207 | #else |
| 42617 | #define vcmlaq_rot90_laneq_f16(__p0_232, __p1_232, __p2_232, __p3_232) __extension__ ({ \ | 43208 | __ai uint16x8_t vcgezq_s16(int16x8_t __p0) { |
| 42618 | float16x8_t __ret_232; \ | 43209 | uint16x8_t __ret; |
| 42619 | float16x8_t __s0_232 = __p0_232; \ | 43210 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 42620 | float16x8_t __s1_232 = __p1_232; \ | 43211 | __ret = (uint16x8_t) __builtin_neon_vcgezq_v((int8x16_t)__rev0, 49); |
| 42621 | float16x8_t __s2_232 = __p2_232; \ | 43212 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 42622 | float16x8_t __rev0_232; __rev0_232 = __builtin_shufflevector(__s0_232, __s0_232, 7, 6, 5, 4, 3, 2, 1, 0); \ | 43213 | return __ret; |
| 42623 | float16x8_t __rev1_232; __rev1_232 = __builtin_shufflevector(__s1_232, __s1_232, 7, 6, 5, 4, 3, 2, 1, 0); \ | 43214 | } |
| 42624 | float16x8_t __rev2_232; __rev2_232 = __builtin_shufflevector(__s2_232, __s2_232, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42625 | float16x8_t __reint_232 = __rev2_232; \ | | |
| 42626 | uint32x4_t __reint1_232 = (uint32x4_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_232, __p3_232), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_232, __p3_232), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_232, __p3_232), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_232, __p3_232)}; \ | | |
| 42627 | __ret_232 = __noswap_vcmlaq_rot90_f16(__rev0_232, __rev1_232, *(float16x8_t *) &__reint1_232); \ | | |
| 42628 | __ret_232 = __builtin_shufflevector(__ret_232, __ret_232, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 42629 | __ret_232; \ | | |
| 42630 | }) | | |
| 42631 | #endif | 43215 | #endif |
| 42632 | | 43216 | |
| 42633 | #endif | | |
| 42634 | #if defined(__ARM_FEATURE_COMPLEX) && defined(__aarch64__) | | |
| 42635 | #ifdef __LITTLE_ENDIAN__ | 43217 | #ifdef __LITTLE_ENDIAN__ |
| 42636 | __ai float64x2_t vcaddq_rot270_f64(float64x2_t __p0, float64x2_t __p1) { | 43218 | __ai uint8x8_t vcgez_s8(int8x8_t __p0) { |
| 42637 | float64x2_t __ret; | 43219 | uint8x8_t __ret; |
| 42638 | __ret = (float64x2_t) __builtin_neon_vcaddq_rot270_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | 43220 | __ret = (uint8x8_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 16); |
| 42639 | return __ret; | 43221 | return __ret; |
| 42640 | } | 43222 | } |
| 42641 | #else | 43223 | #else |
| 42642 | __ai float64x2_t vcaddq_rot270_f64(float64x2_t __p0, float64x2_t __p1) { | 43224 | __ai uint8x8_t vcgez_s8(int8x8_t __p0) { |
| 42643 | float64x2_t __ret; | 43225 | uint8x8_t __ret; |
| 42644 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 43226 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 42645 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 43227 | __ret = (uint8x8_t) __builtin_neon_vcgez_v((int8x8_t)__rev0, 16); |
| 42646 | __ret = (float64x2_t) __builtin_neon_vcaddq_rot270_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); | 43228 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 42647 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 42648 | return __ret; | 43229 | return __ret; |
| 42649 | } | 43230 | } |
| 42650 | #endif | 43231 | #endif |
| 42651 | | 43232 | |
| | 43233 | __ai uint64x1_t vcgez_f64(float64x1_t __p0) { |
| | 43234 | uint64x1_t __ret; |
| | 43235 | __ret = (uint64x1_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 19); |
| | 43236 | return __ret; |
| | 43237 | } |
| 42652 | #ifdef __LITTLE_ENDIAN__ | 43238 | #ifdef __LITTLE_ENDIAN__ |
| 42653 | __ai float64x2_t vcaddq_rot90_f64(float64x2_t __p0, float64x2_t __p1) { | 43239 | __ai uint32x2_t vcgez_f32(float32x2_t __p0) { |
| 42654 | float64x2_t __ret; | 43240 | uint32x2_t __ret; |
| 42655 | __ret = (float64x2_t) __builtin_neon_vcaddq_rot90_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | 43241 | __ret = (uint32x2_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 18); |
| 42656 | return __ret; | 43242 | return __ret; |
| 42657 | } | 43243 | } |
| 42658 | #else | 43244 | #else |
| 42659 | __ai float64x2_t vcaddq_rot90_f64(float64x2_t __p0, float64x2_t __p1) { | 43245 | __ai uint32x2_t vcgez_f32(float32x2_t __p0) { |
| 42660 | float64x2_t __ret; | 43246 | uint32x2_t __ret; |
| 42661 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 43247 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 42662 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 43248 | __ret = (uint32x2_t) __builtin_neon_vcgez_v((int8x8_t)__rev0, 18); |
| 42663 | __ret = (float64x2_t) __builtin_neon_vcaddq_rot90_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); | | |
| 42664 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 43249 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 42665 | return __ret; | 43250 | return __ret; |
| 42666 | } | 43251 | } |
| 42667 | #endif | 43252 | #endif |
| 42668 | | 43253 | |
| 42669 | #ifdef __LITTLE_ENDIAN__ | 43254 | #ifdef __LITTLE_ENDIAN__ |
| 42670 | __ai float64x2_t vcmlaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 43255 | __ai uint32x2_t vcgez_s32(int32x2_t __p0) { |
| 42671 | float64x2_t __ret; | 43256 | uint32x2_t __ret; |
| 42672 | __ret = (float64x2_t) __builtin_neon_vcmlaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); | 43257 | __ret = (uint32x2_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 18); |
| 42673 | return __ret; | 43258 | return __ret; |
| 42674 | } | 43259 | } |
| 42675 | #else | 43260 | #else |
| 42676 | __ai float64x2_t vcmlaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 43261 | __ai uint32x2_t vcgez_s32(int32x2_t __p0) { |
| 42677 | float64x2_t __ret; | 43262 | uint32x2_t __ret; |
| 42678 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 43263 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 42679 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 43264 | __ret = (uint32x2_t) __builtin_neon_vcgez_v((int8x8_t)__rev0, 18); |
| 42680 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 42681 | __ret = (float64x2_t) __builtin_neon_vcmlaq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 42); | | |
| 42682 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 43265 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 42683 | return __ret; | 43266 | return __ret; |
| 42684 | } | 43267 | } |
| 42685 | __ai float64x2_t __noswap_vcmlaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | | |
| 42686 | float64x2_t __ret; | | |
| 42687 | __ret = (float64x2_t) __builtin_neon_vcmlaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); | | |
| 42688 | return __ret; | | |
| 42689 | } | | |
| 42690 | #endif | 43268 | #endif |
| 42691 | | 43269 | |
| 42692 | __ai float64x1_t vcmla_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | 43270 | __ai uint64x1_t vcgez_s64(int64x1_t __p0) { |
| 42693 | float64x1_t __ret; | 43271 | uint64x1_t __ret; |
| 42694 | __ret = (float64x1_t) __builtin_neon_vcmla_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); | 43272 | __ret = (uint64x1_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 19); |
| 42695 | return __ret; | 43273 | return __ret; |
| 42696 | } | 43274 | } |
| 42697 | #define vcmla_lane_f64(__p0_233, __p1_233, __p2_233, __p3_233) __extension__ ({ \ | | |
| 42698 | float64x1_t __ret_233; \ | | |
| 42699 | float64x1_t __s0_233 = __p0_233; \ | | |
| 42700 | float64x1_t __s1_233 = __p1_233; \ | | |
| 42701 | float64x1_t __s2_233 = __p2_233; \ | | |
| 42702 | float64x1_t __reint_233 = __s2_233; \ | | |
| 42703 | uint64x2_t __reint1_233 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_233, __p3_233), vgetq_lane_u64(*(uint64x2_t *) &__reint_233, __p3_233)}; \ | | |
| 42704 | __ret_233 = vcmla_f64(__s0_233, __s1_233, *(float64x1_t *) &__reint1_233); \ | | |
| 42705 | __ret_233; \ | | |
| 42706 | }) | | |
| 42707 | #ifdef __LITTLE_ENDIAN__ | | |
| 42708 | #define vcmlaq_lane_f64(__p0_234, __p1_234, __p2_234, __p3_234) __extension__ ({ \ | | |
| 42709 | float64x2_t __ret_234; \ | | |
| 42710 | float64x2_t __s0_234 = __p0_234; \ | | |
| 42711 | float64x2_t __s1_234 = __p1_234; \ | | |
| 42712 | float64x1_t __s2_234 = __p2_234; \ | | |
| 42713 | float64x1_t __reint_234 = __s2_234; \ | | |
| 42714 | uint64x2_t __reint1_234 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_234, __p3_234), vgetq_lane_u64(*(uint64x2_t *) &__reint_234, __p3_234)}; \ | | |
| 42715 | __ret_234 = vcmlaq_f64(__s0_234, __s1_234, *(float64x2_t *) &__reint1_234); \ | | |
| 42716 | __ret_234; \ | | |
| 42717 | }) | | |
| 42718 | #else | | |
| 42719 | #define vcmlaq_lane_f64(__p0_235, __p1_235, __p2_235, __p3_235) __extension__ ({ \ | | |
| 42720 | float64x2_t __ret_235; \ | | |
| 42721 | float64x2_t __s0_235 = __p0_235; \ | | |
| 42722 | float64x2_t __s1_235 = __p1_235; \ | | |
| 42723 | float64x1_t __s2_235 = __p2_235; \ | | |
| 42724 | float64x2_t __rev0_235; __rev0_235 = __builtin_shufflevector(__s0_235, __s0_235, 1, 0); \ | | |
| 42725 | float64x2_t __rev1_235; __rev1_235 = __builtin_shufflevector(__s1_235, __s1_235, 1, 0); \ | | |
| 42726 | float64x1_t __reint_235 = __s2_235; \ | | |
| 42727 | uint64x2_t __reint1_235 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_235, __p3_235), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_235, __p3_235)}; \ | | |
| 42728 | __ret_235 = __noswap_vcmlaq_f64(__rev0_235, __rev1_235, *(float64x2_t *) &__reint1_235); \ | | |
| 42729 | __ret_235 = __builtin_shufflevector(__ret_235, __ret_235, 1, 0); \ | | |
| 42730 | __ret_235; \ | | |
| 42731 | }) | | |
| 42732 | #endif | | |
| 42733 | | | |
| 42734 | #ifdef __LITTLE_ENDIAN__ | 43275 | #ifdef __LITTLE_ENDIAN__ |
| 42735 | #define vcmla_laneq_f64(__p0_236, __p1_236, __p2_236, __p3_236) __extension__ ({ \ | 43276 | __ai uint16x4_t vcgez_s16(int16x4_t __p0) { |
| 42736 | float64x1_t __ret_236; \ | 43277 | uint16x4_t __ret; |
| 42737 | float64x1_t __s0_236 = __p0_236; \ | 43278 | __ret = (uint16x4_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 17); |
| 42738 | float64x1_t __s1_236 = __p1_236; \ | 43279 | return __ret; |
| 42739 | float64x2_t __s2_236 = __p2_236; \ | 43280 | } |
| 42740 | float64x2_t __reint_236 = __s2_236; \ | | |
| 42741 | uint64x2_t __reint1_236 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_236, __p3_236), vgetq_lane_u64(*(uint64x2_t *) &__reint_236, __p3_236)}; \ | | |
| 42742 | __ret_236 = vcmla_f64(__s0_236, __s1_236, *(float64x1_t *) &__reint1_236); \ | | |
| 42743 | __ret_236; \ | | |
| 42744 | }) | | |
| 42745 | #else | 43281 | #else |
| 42746 | #define vcmla_laneq_f64(__p0_237, __p1_237, __p2_237, __p3_237) __extension__ ({ \ | 43282 | __ai uint16x4_t vcgez_s16(int16x4_t __p0) { |
| 42747 | float64x1_t __ret_237; \ | 43283 | uint16x4_t __ret; |
| 42748 | float64x1_t __s0_237 = __p0_237; \ | 43284 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 42749 | float64x1_t __s1_237 = __p1_237; \ | 43285 | __ret = (uint16x4_t) __builtin_neon_vcgez_v((int8x8_t)__rev0, 17); |
| 42750 | float64x2_t __s2_237 = __p2_237; \ | 43286 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 42751 | float64x2_t __rev2_237; __rev2_237 = __builtin_shufflevector(__s2_237, __s2_237, 1, 0); \ | 43287 | return __ret; |
| 42752 | float64x2_t __reint_237 = __rev2_237; \ | 43288 | } |
| 42753 | uint64x2_t __reint1_237 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_237, __p3_237), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_237, __p3_237)}; \ | | |
| 42754 | __ret_237 = vcmla_f64(__s0_237, __s1_237, *(float64x1_t *) &__reint1_237); \ | | |
| 42755 | __ret_237; \ | | |
| 42756 | }) | | |
| 42757 | #endif | 43289 | #endif |
| 42758 | | 43290 | |
| | 43291 | __ai uint64_t vcgezd_s64(int64_t __p0) { |
| | 43292 | uint64_t __ret; |
| | 43293 | __ret = (uint64_t) __builtin_neon_vcgezd_s64(__p0); |
| | 43294 | return __ret; |
| | 43295 | } |
| | 43296 | __ai uint64_t vcgezd_f64(float64_t __p0) { |
| | 43297 | uint64_t __ret; |
| | 43298 | __ret = (uint64_t) __builtin_neon_vcgezd_f64(__p0); |
| | 43299 | return __ret; |
| | 43300 | } |
| | 43301 | __ai uint32_t vcgezs_f32(float32_t __p0) { |
| | 43302 | uint32_t __ret; |
| | 43303 | __ret = (uint32_t) __builtin_neon_vcgezs_f32(__p0); |
| | 43304 | return __ret; |
| | 43305 | } |
| 42759 | #ifdef __LITTLE_ENDIAN__ | 43306 | #ifdef __LITTLE_ENDIAN__ |
| 42760 | #define vcmlaq_laneq_f64(__p0_238, __p1_238, __p2_238, __p3_238) __extension__ ({ \ | 43307 | __ai uint64x2_t vcgtq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 42761 | float64x2_t __ret_238; \ | 43308 | uint64x2_t __ret; |
| 42762 | float64x2_t __s0_238 = __p0_238; \ | 43309 | __ret = (uint64x2_t)(__p0 > __p1); |
| 42763 | float64x2_t __s1_238 = __p1_238; \ | 43310 | return __ret; |
| 42764 | float64x2_t __s2_238 = __p2_238; \ | 43311 | } |
| 42765 | float64x2_t __reint_238 = __s2_238; \ | | |
| 42766 | uint64x2_t __reint1_238 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_238, __p3_238), vgetq_lane_u64(*(uint64x2_t *) &__reint_238, __p3_238)}; \ | | |
| 42767 | __ret_238 = vcmlaq_f64(__s0_238, __s1_238, *(float64x2_t *) &__reint1_238); \ | | |
| 42768 | __ret_238; \ | | |
| 42769 | }) | | |
| 42770 | #else | 43312 | #else |
| 42771 | #define vcmlaq_laneq_f64(__p0_239, __p1_239, __p2_239, __p3_239) __extension__ ({ \ | 43313 | __ai uint64x2_t vcgtq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 42772 | float64x2_t __ret_239; \ | 43314 | uint64x2_t __ret; |
| 42773 | float64x2_t __s0_239 = __p0_239; \ | 43315 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 42774 | float64x2_t __s1_239 = __p1_239; \ | 43316 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 42775 | float64x2_t __s2_239 = __p2_239; \ | 43317 | __ret = (uint64x2_t)(__rev0 > __rev1); |
| 42776 | float64x2_t __rev0_239; __rev0_239 = __builtin_shufflevector(__s0_239, __s0_239, 1, 0); \ | 43318 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 42777 | float64x2_t __rev1_239; __rev1_239 = __builtin_shufflevector(__s1_239, __s1_239, 1, 0); \ | 43319 | return __ret; |
| 42778 | float64x2_t __rev2_239; __rev2_239 = __builtin_shufflevector(__s2_239, __s2_239, 1, 0); \ | 43320 | } |
| 42779 | float64x2_t __reint_239 = __rev2_239; \ | | |
| 42780 | uint64x2_t __reint1_239 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_239, __p3_239), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_239, __p3_239)}; \ | | |
| 42781 | __ret_239 = __noswap_vcmlaq_f64(__rev0_239, __rev1_239, *(float64x2_t *) &__reint1_239); \ | | |
| 42782 | __ret_239 = __builtin_shufflevector(__ret_239, __ret_239, 1, 0); \ | | |
| 42783 | __ret_239; \ | | |
| 42784 | }) | | |
| 42785 | #endif | 43321 | #endif |
| 42786 | | 43322 | |
| 42787 | #ifdef __LITTLE_ENDIAN__ | 43323 | #ifdef __LITTLE_ENDIAN__ |
| 42788 | __ai float64x2_t vcmlaq_rot180_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 43324 | __ai uint64x2_t vcgtq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 42789 | float64x2_t __ret; | 43325 | uint64x2_t __ret; |
| 42790 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot180_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); | 43326 | __ret = (uint64x2_t)(__p0 > __p1); |
| 42791 | return __ret; | 43327 | return __ret; |
| 42792 | } | 43328 | } |
| 42793 | #else | 43329 | #else |
| 42794 | __ai float64x2_t vcmlaq_rot180_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 43330 | __ai uint64x2_t vcgtq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 42795 | float64x2_t __ret; | 43331 | uint64x2_t __ret; |
| 42796 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 43332 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 42797 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 43333 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 42798 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 43334 | __ret = (uint64x2_t)(__rev0 > __rev1); |
| 42799 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot180_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 42); | | |
| 42800 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 43335 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 42801 | return __ret; | 43336 | return __ret; |
| 42802 | } | 43337 | } |
| 42803 | __ai float64x2_t __noswap_vcmlaq_rot180_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | | |
| 42804 | float64x2_t __ret; | | |
| 42805 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot180_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); | | |
| 42806 | return __ret; | | |
| 42807 | } | | |
| 42808 | #endif | 43338 | #endif |
| 42809 | | 43339 | |
| 42810 | __ai float64x1_t vcmla_rot180_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | 43340 | #ifdef __LITTLE_ENDIAN__ |
| 42811 | float64x1_t __ret; | 43341 | __ai uint64x2_t vcgtq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 42812 | __ret = (float64x1_t) __builtin_neon_vcmla_rot180_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); | 43342 | uint64x2_t __ret; |
| | 43343 | __ret = (uint64x2_t)(__p0 > __p1); |
| 42813 | return __ret; | 43344 | return __ret; |
| 42814 | } | 43345 | } |
| 42815 | #define vcmla_rot180_lane_f64(__p0_240, __p1_240, __p2_240, __p3_240) __extension__ ({ \ | | |
| 42816 | float64x1_t __ret_240; \ | | |
| 42817 | float64x1_t __s0_240 = __p0_240; \ | | |
| 42818 | float64x1_t __s1_240 = __p1_240; \ | | |
| 42819 | float64x1_t __s2_240 = __p2_240; \ | | |
| 42820 | float64x1_t __reint_240 = __s2_240; \ | | |
| 42821 | uint64x2_t __reint1_240 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_240, __p3_240), vgetq_lane_u64(*(uint64x2_t *) &__reint_240, __p3_240)}; \ | | |
| 42822 | __ret_240 = vcmla_rot180_f64(__s0_240, __s1_240, *(float64x1_t *) &__reint1_240); \ | | |
| 42823 | __ret_240; \ | | |
| 42824 | }) | | |
| 42825 | #ifdef __LITTLE_ENDIAN__ | | |
| 42826 | #define vcmlaq_rot180_lane_f64(__p0_241, __p1_241, __p2_241, __p3_241) __extension__ ({ \ | | |
| 42827 | float64x2_t __ret_241; \ | | |
| 42828 | float64x2_t __s0_241 = __p0_241; \ | | |
| 42829 | float64x2_t __s1_241 = __p1_241; \ | | |
| 42830 | float64x1_t __s2_241 = __p2_241; \ | | |
| 42831 | float64x1_t __reint_241 = __s2_241; \ | | |
| 42832 | uint64x2_t __reint1_241 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_241, __p3_241), vgetq_lane_u64(*(uint64x2_t *) &__reint_241, __p3_241)}; \ | | |
| 42833 | __ret_241 = vcmlaq_rot180_f64(__s0_241, __s1_241, *(float64x2_t *) &__reint1_241); \ | | |
| 42834 | __ret_241; \ | | |
| 42835 | }) | | |
| 42836 | #else | | |
| 42837 | #define vcmlaq_rot180_lane_f64(__p0_242, __p1_242, __p2_242, __p3_242) __extension__ ({ \ | | |
| 42838 | float64x2_t __ret_242; \ | | |
| 42839 | float64x2_t __s0_242 = __p0_242; \ | | |
| 42840 | float64x2_t __s1_242 = __p1_242; \ | | |
| 42841 | float64x1_t __s2_242 = __p2_242; \ | | |
| 42842 | float64x2_t __rev0_242; __rev0_242 = __builtin_shufflevector(__s0_242, __s0_242, 1, 0); \ | | |
| 42843 | float64x2_t __rev1_242; __rev1_242 = __builtin_shufflevector(__s1_242, __s1_242, 1, 0); \ | | |
| 42844 | float64x1_t __reint_242 = __s2_242; \ | | |
| 42845 | uint64x2_t __reint1_242 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_242, __p3_242), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_242, __p3_242)}; \ | | |
| 42846 | __ret_242 = __noswap_vcmlaq_rot180_f64(__rev0_242, __rev1_242, *(float64x2_t *) &__reint1_242); \ | | |
| 42847 | __ret_242 = __builtin_shufflevector(__ret_242, __ret_242, 1, 0); \ | | |
| 42848 | __ret_242; \ | | |
| 42849 | }) | | |
| 42850 | #endif | | |
| 42851 | | | |
| 42852 | #ifdef __LITTLE_ENDIAN__ | | |
| 42853 | #define vcmla_rot180_laneq_f64(__p0_243, __p1_243, __p2_243, __p3_243) __extension__ ({ \ | | |
| 42854 | float64x1_t __ret_243; \ | | |
| 42855 | float64x1_t __s0_243 = __p0_243; \ | | |
| 42856 | float64x1_t __s1_243 = __p1_243; \ | | |
| 42857 | float64x2_t __s2_243 = __p2_243; \ | | |
| 42858 | float64x2_t __reint_243 = __s2_243; \ | | |
| 42859 | uint64x2_t __reint1_243 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_243, __p3_243), vgetq_lane_u64(*(uint64x2_t *) &__reint_243, __p3_243)}; \ | | |
| 42860 | __ret_243 = vcmla_rot180_f64(__s0_243, __s1_243, *(float64x1_t *) &__reint1_243); \ | | |
| 42861 | __ret_243; \ | | |
| 42862 | }) | | |
| 42863 | #else | 43346 | #else |
| 42864 | #define vcmla_rot180_laneq_f64(__p0_244, __p1_244, __p2_244, __p3_244) __extension__ ({ \ | 43347 | __ai uint64x2_t vcgtq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 42865 | float64x1_t __ret_244; \ | 43348 | uint64x2_t __ret; |
| 42866 | float64x1_t __s0_244 = __p0_244; \ | 43349 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 42867 | float64x1_t __s1_244 = __p1_244; \ | 43350 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 42868 | float64x2_t __s2_244 = __p2_244; \ | 43351 | __ret = (uint64x2_t)(__rev0 > __rev1); |
| 42869 | float64x2_t __rev2_244; __rev2_244 = __builtin_shufflevector(__s2_244, __s2_244, 1, 0); \ | 43352 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 42870 | float64x2_t __reint_244 = __rev2_244; \ | 43353 | return __ret; |
| 42871 | uint64x2_t __reint1_244 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_244, __p3_244), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_244, __p3_244)}; \ | 43354 | } |
| 42872 | __ret_244 = vcmla_rot180_f64(__s0_244, __s1_244, *(float64x1_t *) &__reint1_244); \ | | |
| 42873 | __ret_244; \ | | |
| 42874 | }) | | |
| 42875 | #endif | | |
| 42876 | | | |
| 42877 | #ifdef __LITTLE_ENDIAN__ | | |
| 42878 | #define vcmlaq_rot180_laneq_f64(__p0_245, __p1_245, __p2_245, __p3_245) __extension__ ({ \ | | |
| 42879 | float64x2_t __ret_245; \ | | |
| 42880 | float64x2_t __s0_245 = __p0_245; \ | | |
| 42881 | float64x2_t __s1_245 = __p1_245; \ | | |
| 42882 | float64x2_t __s2_245 = __p2_245; \ | | |
| 42883 | float64x2_t __reint_245 = __s2_245; \ | | |
| 42884 | uint64x2_t __reint1_245 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_245, __p3_245), vgetq_lane_u64(*(uint64x2_t *) &__reint_245, __p3_245)}; \ | | |
| 42885 | __ret_245 = vcmlaq_rot180_f64(__s0_245, __s1_245, *(float64x2_t *) &__reint1_245); \ | | |
| 42886 | __ret_245; \ | | |
| 42887 | }) | | |
| 42888 | #else | | |
| 42889 | #define vcmlaq_rot180_laneq_f64(__p0_246, __p1_246, __p2_246, __p3_246) __extension__ ({ \ | | |
| 42890 | float64x2_t __ret_246; \ | | |
| 42891 | float64x2_t __s0_246 = __p0_246; \ | | |
| 42892 | float64x2_t __s1_246 = __p1_246; \ | | |
| 42893 | float64x2_t __s2_246 = __p2_246; \ | | |
| 42894 | float64x2_t __rev0_246; __rev0_246 = __builtin_shufflevector(__s0_246, __s0_246, 1, 0); \ | | |
| 42895 | float64x2_t __rev1_246; __rev1_246 = __builtin_shufflevector(__s1_246, __s1_246, 1, 0); \ | | |
| 42896 | float64x2_t __rev2_246; __rev2_246 = __builtin_shufflevector(__s2_246, __s2_246, 1, 0); \ | | |
| 42897 | float64x2_t __reint_246 = __rev2_246; \ | | |
| 42898 | uint64x2_t __reint1_246 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_246, __p3_246), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_246, __p3_246)}; \ | | |
| 42899 | __ret_246 = __noswap_vcmlaq_rot180_f64(__rev0_246, __rev1_246, *(float64x2_t *) &__reint1_246); \ | | |
| 42900 | __ret_246 = __builtin_shufflevector(__ret_246, __ret_246, 1, 0); \ | | |
| 42901 | __ret_246; \ | | |
| 42902 | }) | | |
| 42903 | #endif | 43355 | #endif |
| 42904 | | 43356 | |
| 42905 | #ifdef __LITTLE_ENDIAN__ | 43357 | __ai uint64x1_t vcgt_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 42906 | __ai float64x2_t vcmlaq_rot270_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 43358 | uint64x1_t __ret; |
| 42907 | float64x2_t __ret; | 43359 | __ret = (uint64x1_t)(__p0 > __p1); |
| 42908 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot270_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); | | |
| 42909 | return __ret; | 43360 | return __ret; |
| 42910 | } | 43361 | } |
| 42911 | #else | 43362 | __ai uint64x1_t vcgt_f64(float64x1_t __p0, float64x1_t __p1) { |
| 42912 | __ai float64x2_t vcmlaq_rot270_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 43363 | uint64x1_t __ret; |
| 42913 | float64x2_t __ret; | 43364 | __ret = (uint64x1_t)(__p0 > __p1); |
| 42914 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 42915 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 42916 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 42917 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot270_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 42); | | |
| 42918 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 42919 | return __ret; | 43365 | return __ret; |
| 42920 | } | 43366 | } |
| 42921 | __ai float64x2_t __noswap_vcmlaq_rot270_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 43367 | __ai uint64x1_t vcgt_s64(int64x1_t __p0, int64x1_t __p1) { |
| 42922 | float64x2_t __ret; | 43368 | uint64x1_t __ret; |
| 42923 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot270_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); | 43369 | __ret = (uint64x1_t)(__p0 > __p1); |
| 42924 | return __ret; | 43370 | return __ret; |
| 42925 | } | 43371 | } |
| 42926 | #endif | 43372 | __ai uint64_t vcgtd_s64(int64_t __p0, int64_t __p1) { |
| 42927 | | 43373 | uint64_t __ret; |
| 42928 | __ai float64x1_t vcmla_rot270_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | 43374 | __ret = (uint64_t) __builtin_neon_vcgtd_s64(__p0, __p1); |
| 42929 | float64x1_t __ret; | 43375 | return __ret; |
| 42930 | __ret = (float64x1_t) __builtin_neon_vcmla_rot270_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); | 43376 | } |
| | 43377 | __ai uint64_t vcgtd_u64(uint64_t __p0, uint64_t __p1) { |
| | 43378 | uint64_t __ret; |
| | 43379 | __ret = (uint64_t) __builtin_neon_vcgtd_u64(__p0, __p1); |
| | 43380 | return __ret; |
| | 43381 | } |
| | 43382 | __ai uint64_t vcgtd_f64(float64_t __p0, float64_t __p1) { |
| | 43383 | uint64_t __ret; |
| | 43384 | __ret = (uint64_t) __builtin_neon_vcgtd_f64(__p0, __p1); |
| | 43385 | return __ret; |
| | 43386 | } |
| | 43387 | __ai uint32_t vcgts_f32(float32_t __p0, float32_t __p1) { |
| | 43388 | uint32_t __ret; |
| | 43389 | __ret = (uint32_t) __builtin_neon_vcgts_f32(__p0, __p1); |
| 42931 | return __ret; | 43390 | return __ret; |
| 42932 | } | 43391 | } |
| 42933 | #define vcmla_rot270_lane_f64(__p0_247, __p1_247, __p2_247, __p3_247) __extension__ ({ \ | | |
| 42934 | float64x1_t __ret_247; \ | | |
| 42935 | float64x1_t __s0_247 = __p0_247; \ | | |
| 42936 | float64x1_t __s1_247 = __p1_247; \ | | |
| 42937 | float64x1_t __s2_247 = __p2_247; \ | | |
| 42938 | float64x1_t __reint_247 = __s2_247; \ | | |
| 42939 | uint64x2_t __reint1_247 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_247, __p3_247), vgetq_lane_u64(*(uint64x2_t *) &__reint_247, __p3_247)}; \ | | |
| 42940 | __ret_247 = vcmla_rot270_f64(__s0_247, __s1_247, *(float64x1_t *) &__reint1_247); \ | | |
| 42941 | __ret_247; \ | | |
| 42942 | }) | | |
| 42943 | #ifdef __LITTLE_ENDIAN__ | | |
| 42944 | #define vcmlaq_rot270_lane_f64(__p0_248, __p1_248, __p2_248, __p3_248) __extension__ ({ \ | | |
| 42945 | float64x2_t __ret_248; \ | | |
| 42946 | float64x2_t __s0_248 = __p0_248; \ | | |
| 42947 | float64x2_t __s1_248 = __p1_248; \ | | |
| 42948 | float64x1_t __s2_248 = __p2_248; \ | | |
| 42949 | float64x1_t __reint_248 = __s2_248; \ | | |
| 42950 | uint64x2_t __reint1_248 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_248, __p3_248), vgetq_lane_u64(*(uint64x2_t *) &__reint_248, __p3_248)}; \ | | |
| 42951 | __ret_248 = vcmlaq_rot270_f64(__s0_248, __s1_248, *(float64x2_t *) &__reint1_248); \ | | |
| 42952 | __ret_248; \ | | |
| 42953 | }) | | |
| 42954 | #else | | |
| 42955 | #define vcmlaq_rot270_lane_f64(__p0_249, __p1_249, __p2_249, __p3_249) __extension__ ({ \ | | |
| 42956 | float64x2_t __ret_249; \ | | |
| 42957 | float64x2_t __s0_249 = __p0_249; \ | | |
| 42958 | float64x2_t __s1_249 = __p1_249; \ | | |
| 42959 | float64x1_t __s2_249 = __p2_249; \ | | |
| 42960 | float64x2_t __rev0_249; __rev0_249 = __builtin_shufflevector(__s0_249, __s0_249, 1, 0); \ | | |
| 42961 | float64x2_t __rev1_249; __rev1_249 = __builtin_shufflevector(__s1_249, __s1_249, 1, 0); \ | | |
| 42962 | float64x1_t __reint_249 = __s2_249; \ | | |
| 42963 | uint64x2_t __reint1_249 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_249, __p3_249), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_249, __p3_249)}; \ | | |
| 42964 | __ret_249 = __noswap_vcmlaq_rot270_f64(__rev0_249, __rev1_249, *(float64x2_t *) &__reint1_249); \ | | |
| 42965 | __ret_249 = __builtin_shufflevector(__ret_249, __ret_249, 1, 0); \ | | |
| 42966 | __ret_249; \ | | |
| 42967 | }) | | |
| 42968 | #endif | | |
| 42969 | | | |
| 42970 | #ifdef __LITTLE_ENDIAN__ | | |
| 42971 | #define vcmla_rot270_laneq_f64(__p0_250, __p1_250, __p2_250, __p3_250) __extension__ ({ \ | | |
| 42972 | float64x1_t __ret_250; \ | | |
| 42973 | float64x1_t __s0_250 = __p0_250; \ | | |
| 42974 | float64x1_t __s1_250 = __p1_250; \ | | |
| 42975 | float64x2_t __s2_250 = __p2_250; \ | | |
| 42976 | float64x2_t __reint_250 = __s2_250; \ | | |
| 42977 | uint64x2_t __reint1_250 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_250, __p3_250), vgetq_lane_u64(*(uint64x2_t *) &__reint_250, __p3_250)}; \ | | |
| 42978 | __ret_250 = vcmla_rot270_f64(__s0_250, __s1_250, *(float64x1_t *) &__reint1_250); \ | | |
| 42979 | __ret_250; \ | | |
| 42980 | }) | | |
| 42981 | #else | | |
| 42982 | #define vcmla_rot270_laneq_f64(__p0_251, __p1_251, __p2_251, __p3_251) __extension__ ({ \ | | |
| 42983 | float64x1_t __ret_251; \ | | |
| 42984 | float64x1_t __s0_251 = __p0_251; \ | | |
| 42985 | float64x1_t __s1_251 = __p1_251; \ | | |
| 42986 | float64x2_t __s2_251 = __p2_251; \ | | |
| 42987 | float64x2_t __rev2_251; __rev2_251 = __builtin_shufflevector(__s2_251, __s2_251, 1, 0); \ | | |
| 42988 | float64x2_t __reint_251 = __rev2_251; \ | | |
| 42989 | uint64x2_t __reint1_251 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_251, __p3_251), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_251, __p3_251)}; \ | | |
| 42990 | __ret_251 = vcmla_rot270_f64(__s0_251, __s1_251, *(float64x1_t *) &__reint1_251); \ | | |
| 42991 | __ret_251; \ | | |
| 42992 | }) | | |
| 42993 | #endif | | |
| 42994 | | | |
| 42995 | #ifdef __LITTLE_ENDIAN__ | 43392 | #ifdef __LITTLE_ENDIAN__ |
| 42996 | #define vcmlaq_rot270_laneq_f64(__p0_252, __p1_252, __p2_252, __p3_252) __extension__ ({ \ | 43393 | __ai uint8x16_t vcgtzq_s8(int8x16_t __p0) { |
| 42997 | float64x2_t __ret_252; \ | 43394 | uint8x16_t __ret; |
| 42998 | float64x2_t __s0_252 = __p0_252; \ | 43395 | __ret = (uint8x16_t) __builtin_neon_vcgtzq_v((int8x16_t)__p0, 48); |
| 42999 | float64x2_t __s1_252 = __p1_252; \ | 43396 | return __ret; |
| 43000 | float64x2_t __s2_252 = __p2_252; \ | 43397 | } |
| 43001 | float64x2_t __reint_252 = __s2_252; \ | | |
| 43002 | uint64x2_t __reint1_252 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_252, __p3_252), vgetq_lane_u64(*(uint64x2_t *) &__reint_252, __p3_252)}; \ | | |
| 43003 | __ret_252 = vcmlaq_rot270_f64(__s0_252, __s1_252, *(float64x2_t *) &__reint1_252); \ | | |
| 43004 | __ret_252; \ | | |
| 43005 | }) | | |
| 43006 | #else | 43398 | #else |
| 43007 | #define vcmlaq_rot270_laneq_f64(__p0_253, __p1_253, __p2_253, __p3_253) __extension__ ({ \ | 43399 | __ai uint8x16_t vcgtzq_s8(int8x16_t __p0) { |
| 43008 | float64x2_t __ret_253; \ | 43400 | uint8x16_t __ret; |
| 43009 | float64x2_t __s0_253 = __p0_253; \ | 43401 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43010 | float64x2_t __s1_253 = __p1_253; \ | 43402 | __ret = (uint8x16_t) __builtin_neon_vcgtzq_v((int8x16_t)__rev0, 48); |
| 43011 | float64x2_t __s2_253 = __p2_253; \ | 43403 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43012 | float64x2_t __rev0_253; __rev0_253 = __builtin_shufflevector(__s0_253, __s0_253, 1, 0); \ | 43404 | return __ret; |
| 43013 | float64x2_t __rev1_253; __rev1_253 = __builtin_shufflevector(__s1_253, __s1_253, 1, 0); \ | 43405 | } |
| 43014 | float64x2_t __rev2_253; __rev2_253 = __builtin_shufflevector(__s2_253, __s2_253, 1, 0); \ | | |
| 43015 | float64x2_t __reint_253 = __rev2_253; \ | | |
| 43016 | uint64x2_t __reint1_253 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_253, __p3_253), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_253, __p3_253)}; \ | | |
| 43017 | __ret_253 = __noswap_vcmlaq_rot270_f64(__rev0_253, __rev1_253, *(float64x2_t *) &__reint1_253); \ | | |
| 43018 | __ret_253 = __builtin_shufflevector(__ret_253, __ret_253, 1, 0); \ | | |
| 43019 | __ret_253; \ | | |
| 43020 | }) | | |
| 43021 | #endif | 43406 | #endif |
| 43022 | | 43407 | |
| 43023 | #ifdef __LITTLE_ENDIAN__ | 43408 | #ifdef __LITTLE_ENDIAN__ |
| 43024 | __ai float64x2_t vcmlaq_rot90_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 43409 | __ai uint64x2_t vcgtzq_f64(float64x2_t __p0) { |
| 43025 | float64x2_t __ret; | 43410 | uint64x2_t __ret; |
| 43026 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot90_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); | 43411 | __ret = (uint64x2_t) __builtin_neon_vcgtzq_v((int8x16_t)__p0, 51); |
| 43027 | return __ret; | 43412 | return __ret; |
| 43028 | } | 43413 | } |
| 43029 | #else | 43414 | #else |
| 43030 | __ai float64x2_t vcmlaq_rot90_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 43415 | __ai uint64x2_t vcgtzq_f64(float64x2_t __p0) { |
| 43031 | float64x2_t __ret; | 43416 | uint64x2_t __ret; |
| 43032 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 43417 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43033 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 43418 | __ret = (uint64x2_t) __builtin_neon_vcgtzq_v((int8x16_t)__rev0, 51); |
| 43034 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 43035 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot90_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 42); | | |
| 43036 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 43419 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43037 | return __ret; | 43420 | return __ret; |
| 43038 | } | 43421 | } |
| 43039 | __ai float64x2_t __noswap_vcmlaq_rot90_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | | |
| 43040 | float64x2_t __ret; | | |
| 43041 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot90_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); | | |
| 43042 | return __ret; | | |
| 43043 | } | | |
| 43044 | #endif | 43422 | #endif |
| 43045 | | 43423 | |
| 43046 | __ai float64x1_t vcmla_rot90_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | 43424 | #ifdef __LITTLE_ENDIAN__ |
| 43047 | float64x1_t __ret; | 43425 | __ai uint32x4_t vcgtzq_f32(float32x4_t __p0) { |
| 43048 | __ret = (float64x1_t) __builtin_neon_vcmla_rot90_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); | 43426 | uint32x4_t __ret; |
| | 43427 | __ret = (uint32x4_t) __builtin_neon_vcgtzq_v((int8x16_t)__p0, 50); |
| 43049 | return __ret; | 43428 | return __ret; |
| 43050 | } | 43429 | } |
| 43051 | #define vcmla_rot90_lane_f64(__p0_254, __p1_254, __p2_254, __p3_254) __extension__ ({ \ | | |
| 43052 | float64x1_t __ret_254; \ | | |
| 43053 | float64x1_t __s0_254 = __p0_254; \ | | |
| 43054 | float64x1_t __s1_254 = __p1_254; \ | | |
| 43055 | float64x1_t __s2_254 = __p2_254; \ | | |
| 43056 | float64x1_t __reint_254 = __s2_254; \ | | |
| 43057 | uint64x2_t __reint1_254 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_254, __p3_254), vgetq_lane_u64(*(uint64x2_t *) &__reint_254, __p3_254)}; \ | | |
| 43058 | __ret_254 = vcmla_rot90_f64(__s0_254, __s1_254, *(float64x1_t *) &__reint1_254); \ | | |
| 43059 | __ret_254; \ | | |
| 43060 | }) | | |
| 43061 | #ifdef __LITTLE_ENDIAN__ | | |
| 43062 | #define vcmlaq_rot90_lane_f64(__p0_255, __p1_255, __p2_255, __p3_255) __extension__ ({ \ | | |
| 43063 | float64x2_t __ret_255; \ | | |
| 43064 | float64x2_t __s0_255 = __p0_255; \ | | |
| 43065 | float64x2_t __s1_255 = __p1_255; \ | | |
| 43066 | float64x1_t __s2_255 = __p2_255; \ | | |
| 43067 | float64x1_t __reint_255 = __s2_255; \ | | |
| 43068 | uint64x2_t __reint1_255 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_255, __p3_255), vgetq_lane_u64(*(uint64x2_t *) &__reint_255, __p3_255)}; \ | | |
| 43069 | __ret_255 = vcmlaq_rot90_f64(__s0_255, __s1_255, *(float64x2_t *) &__reint1_255); \ | | |
| 43070 | __ret_255; \ | | |
| 43071 | }) | | |
| 43072 | #else | 43430 | #else |
| 43073 | #define vcmlaq_rot90_lane_f64(__p0_256, __p1_256, __p2_256, __p3_256) __extension__ ({ \ | 43431 | __ai uint32x4_t vcgtzq_f32(float32x4_t __p0) { |
| 43074 | float64x2_t __ret_256; \ | 43432 | uint32x4_t __ret; |
| 43075 | float64x2_t __s0_256 = __p0_256; \ | 43433 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 43076 | float64x2_t __s1_256 = __p1_256; \ | 43434 | __ret = (uint32x4_t) __builtin_neon_vcgtzq_v((int8x16_t)__rev0, 50); |
| 43077 | float64x1_t __s2_256 = __p2_256; \ | 43435 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 43078 | float64x2_t __rev0_256; __rev0_256 = __builtin_shufflevector(__s0_256, __s0_256, 1, 0); \ | 43436 | return __ret; |
| 43079 | float64x2_t __rev1_256; __rev1_256 = __builtin_shufflevector(__s1_256, __s1_256, 1, 0); \ | 43437 | } |
| 43080 | float64x1_t __reint_256 = __s2_256; \ | | |
| 43081 | uint64x2_t __reint1_256 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_256, __p3_256), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_256, __p3_256)}; \ | | |
| 43082 | __ret_256 = __noswap_vcmlaq_rot90_f64(__rev0_256, __rev1_256, *(float64x2_t *) &__reint1_256); \ | | |
| 43083 | __ret_256 = __builtin_shufflevector(__ret_256, __ret_256, 1, 0); \ | | |
| 43084 | __ret_256; \ | | |
| 43085 | }) | | |
| 43086 | #endif | 43438 | #endif |
| 43087 | | 43439 | |
| 43088 | #ifdef __LITTLE_ENDIAN__ | 43440 | #ifdef __LITTLE_ENDIAN__ |
| 43089 | #define vcmla_rot90_laneq_f64(__p0_257, __p1_257, __p2_257, __p3_257) __extension__ ({ \ | 43441 | __ai uint32x4_t vcgtzq_s32(int32x4_t __p0) { |
| 43090 | float64x1_t __ret_257; \ | 43442 | uint32x4_t __ret; |
| 43091 | float64x1_t __s0_257 = __p0_257; \ | 43443 | __ret = (uint32x4_t) __builtin_neon_vcgtzq_v((int8x16_t)__p0, 50); |
| 43092 | float64x1_t __s1_257 = __p1_257; \ | 43444 | return __ret; |
| 43093 | float64x2_t __s2_257 = __p2_257; \ | 43445 | } |
| 43094 | float64x2_t __reint_257 = __s2_257; \ | | |
| 43095 | uint64x2_t __reint1_257 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_257, __p3_257), vgetq_lane_u64(*(uint64x2_t *) &__reint_257, __p3_257)}; \ | | |
| 43096 | __ret_257 = vcmla_rot90_f64(__s0_257, __s1_257, *(float64x1_t *) &__reint1_257); \ | | |
| 43097 | __ret_257; \ | | |
| 43098 | }) | | |
| 43099 | #else | 43446 | #else |
| 43100 | #define vcmla_rot90_laneq_f64(__p0_258, __p1_258, __p2_258, __p3_258) __extension__ ({ \ | 43447 | __ai uint32x4_t vcgtzq_s32(int32x4_t __p0) { |
| 43101 | float64x1_t __ret_258; \ | 43448 | uint32x4_t __ret; |
| 43102 | float64x1_t __s0_258 = __p0_258; \ | 43449 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 43103 | float64x1_t __s1_258 = __p1_258; \ | 43450 | __ret = (uint32x4_t) __builtin_neon_vcgtzq_v((int8x16_t)__rev0, 50); |
| 43104 | float64x2_t __s2_258 = __p2_258; \ | 43451 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 43105 | float64x2_t __rev2_258; __rev2_258 = __builtin_shufflevector(__s2_258, __s2_258, 1, 0); \ | 43452 | return __ret; |
| 43106 | float64x2_t __reint_258 = __rev2_258; \ | 43453 | } |
| 43107 | uint64x2_t __reint1_258 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_258, __p3_258), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_258, __p3_258)}; \ | | |
| 43108 | __ret_258 = vcmla_rot90_f64(__s0_258, __s1_258, *(float64x1_t *) &__reint1_258); \ | | |
| 43109 | __ret_258; \ | | |
| 43110 | }) | | |
| 43111 | #endif | 43454 | #endif |
| 43112 | | 43455 | |
| 43113 | #ifdef __LITTLE_ENDIAN__ | 43456 | #ifdef __LITTLE_ENDIAN__ |
| 43114 | #define vcmlaq_rot90_laneq_f64(__p0_259, __p1_259, __p2_259, __p3_259) __extension__ ({ \ | 43457 | __ai uint64x2_t vcgtzq_s64(int64x2_t __p0) { |
| 43115 | float64x2_t __ret_259; \ | 43458 | uint64x2_t __ret; |
| 43116 | float64x2_t __s0_259 = __p0_259; \ | 43459 | __ret = (uint64x2_t) __builtin_neon_vcgtzq_v((int8x16_t)__p0, 51); |
| 43117 | float64x2_t __s1_259 = __p1_259; \ | 43460 | return __ret; |
| 43118 | float64x2_t __s2_259 = __p2_259; \ | 43461 | } |
| 43119 | float64x2_t __reint_259 = __s2_259; \ | | |
| 43120 | uint64x2_t __reint1_259 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_259, __p3_259), vgetq_lane_u64(*(uint64x2_t *) &__reint_259, __p3_259)}; \ | | |
| 43121 | __ret_259 = vcmlaq_rot90_f64(__s0_259, __s1_259, *(float64x2_t *) &__reint1_259); \ | | |
| 43122 | __ret_259; \ | | |
| 43123 | }) | | |
| 43124 | #else | 43462 | #else |
| 43125 | #define vcmlaq_rot90_laneq_f64(__p0_260, __p1_260, __p2_260, __p3_260) __extension__ ({ \ | 43463 | __ai uint64x2_t vcgtzq_s64(int64x2_t __p0) { |
| 43126 | float64x2_t __ret_260; \ | 43464 | uint64x2_t __ret; |
| 43127 | float64x2_t __s0_260 = __p0_260; \ | 43465 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43128 | float64x2_t __s1_260 = __p1_260; \ | 43466 | __ret = (uint64x2_t) __builtin_neon_vcgtzq_v((int8x16_t)__rev0, 51); |
| 43129 | float64x2_t __s2_260 = __p2_260; \ | 43467 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43130 | float64x2_t __rev0_260; __rev0_260 = __builtin_shufflevector(__s0_260, __s0_260, 1, 0); \ | 43468 | return __ret; |
| 43131 | float64x2_t __rev1_260; __rev1_260 = __builtin_shufflevector(__s1_260, __s1_260, 1, 0); \ | 43469 | } |
| 43132 | float64x2_t __rev2_260; __rev2_260 = __builtin_shufflevector(__s2_260, __s2_260, 1, 0); \ | | |
| 43133 | float64x2_t __reint_260 = __rev2_260; \ | | |
| 43134 | uint64x2_t __reint1_260 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_260, __p3_260), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_260, __p3_260)}; \ | | |
| 43135 | __ret_260 = __noswap_vcmlaq_rot90_f64(__rev0_260, __rev1_260, *(float64x2_t *) &__reint1_260); \ | | |
| 43136 | __ret_260 = __builtin_shufflevector(__ret_260, __ret_260, 1, 0); \ | | |
| 43137 | __ret_260; \ | | |
| 43138 | }) | | |
| 43139 | #endif | 43470 | #endif |
| 43140 | | 43471 | |
| 43141 | #endif | | |
| 43142 | #if defined(__ARM_FEATURE_DOTPROD) | | |
| 43143 | #ifdef __LITTLE_ENDIAN__ | 43472 | #ifdef __LITTLE_ENDIAN__ |
| 43144 | __ai uint32x4_t vdotq_u32(uint32x4_t __p0, uint8x16_t __p1, uint8x16_t __p2) { | 43473 | __ai uint16x8_t vcgtzq_s16(int16x8_t __p0) { |
| 43145 | uint32x4_t __ret; | 43474 | uint16x8_t __ret; |
| 43146 | __ret = (uint32x4_t) __builtin_neon_vdotq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); | 43475 | __ret = (uint16x8_t) __builtin_neon_vcgtzq_v((int8x16_t)__p0, 49); |
| 43147 | return __ret; | 43476 | return __ret; |
| 43148 | } | 43477 | } |
| 43149 | #else | 43478 | #else |
| 43150 | __ai uint32x4_t vdotq_u32(uint32x4_t __p0, uint8x16_t __p1, uint8x16_t __p2) { | 43479 | __ai uint16x8_t vcgtzq_s16(int16x8_t __p0) { |
| 43151 | uint32x4_t __ret; | 43480 | uint16x8_t __ret; |
| 43152 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 43481 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43153 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 43482 | __ret = (uint16x8_t) __builtin_neon_vcgtzq_v((int8x16_t)__rev0, 49); |
| 43154 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 43483 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43155 | __ret = (uint32x4_t) __builtin_neon_vdotq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); | | |
| 43156 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 43157 | return __ret; | | |
| 43158 | } | | |
| 43159 | __ai uint32x4_t __noswap_vdotq_u32(uint32x4_t __p0, uint8x16_t __p1, uint8x16_t __p2) { | | |
| 43160 | uint32x4_t __ret; | | |
| 43161 | __ret = (uint32x4_t) __builtin_neon_vdotq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); | | |
| 43162 | return __ret; | 43484 | return __ret; |
| 43163 | } | 43485 | } |
| 43164 | #endif | 43486 | #endif |
| 43165 | | 43487 | |
| 43166 | #ifdef __LITTLE_ENDIAN__ | 43488 | #ifdef __LITTLE_ENDIAN__ |
| 43167 | __ai int32x4_t vdotq_s32(int32x4_t __p0, int8x16_t __p1, int8x16_t __p2) { | 43489 | __ai uint8x8_t vcgtz_s8(int8x8_t __p0) { |
| 43168 | int32x4_t __ret; | 43490 | uint8x8_t __ret; |
| 43169 | __ret = (int32x4_t) __builtin_neon_vdotq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); | 43491 | __ret = (uint8x8_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 16); |
| 43170 | return __ret; | 43492 | return __ret; |
| 43171 | } | 43493 | } |
| 43172 | #else | 43494 | #else |
| 43173 | __ai int32x4_t vdotq_s32(int32x4_t __p0, int8x16_t __p1, int8x16_t __p2) { | 43495 | __ai uint8x8_t vcgtz_s8(int8x8_t __p0) { |
| 43174 | int32x4_t __ret; | 43496 | uint8x8_t __ret; |
| 43175 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 43497 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43176 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 43498 | __ret = (uint8x8_t) __builtin_neon_vcgtz_v((int8x8_t)__rev0, 16); |
| 43177 | int8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 43499 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43178 | __ret = (int32x4_t) __builtin_neon_vdotq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); | | |
| 43179 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 43180 | return __ret; | | |
| 43181 | } | | |
| 43182 | __ai int32x4_t __noswap_vdotq_s32(int32x4_t __p0, int8x16_t __p1, int8x16_t __p2) { | | |
| 43183 | int32x4_t __ret; | | |
| 43184 | __ret = (int32x4_t) __builtin_neon_vdotq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); | | |
| 43185 | return __ret; | 43500 | return __ret; |
| 43186 | } | 43501 | } |
| 43187 | #endif | 43502 | #endif |
| 43188 | | 43503 | |
| | 43504 | __ai uint64x1_t vcgtz_f64(float64x1_t __p0) { |
| | 43505 | uint64x1_t __ret; |
| | 43506 | __ret = (uint64x1_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 19); |
| | 43507 | return __ret; |
| | 43508 | } |
| 43189 | #ifdef __LITTLE_ENDIAN__ | 43509 | #ifdef __LITTLE_ENDIAN__ |
| 43190 | __ai uint32x2_t vdot_u32(uint32x2_t __p0, uint8x8_t __p1, uint8x8_t __p2) { | 43510 | __ai uint32x2_t vcgtz_f32(float32x2_t __p0) { |
| 43191 | uint32x2_t __ret; | 43511 | uint32x2_t __ret; |
| 43192 | __ret = (uint32x2_t) __builtin_neon_vdot_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 18); | 43512 | __ret = (uint32x2_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 18); |
| 43193 | return __ret; | 43513 | return __ret; |
| 43194 | } | 43514 | } |
| 43195 | #else | 43515 | #else |
| 43196 | __ai uint32x2_t vdot_u32(uint32x2_t __p0, uint8x8_t __p1, uint8x8_t __p2) { | 43516 | __ai uint32x2_t vcgtz_f32(float32x2_t __p0) { |
| 43197 | uint32x2_t __ret; | 43517 | uint32x2_t __ret; |
| 43198 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 43518 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43199 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 43519 | __ret = (uint32x2_t) __builtin_neon_vcgtz_v((int8x8_t)__rev0, 18); |
| 43200 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 43201 | __ret = (uint32x2_t) __builtin_neon_vdot_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 18); | | |
| 43202 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 43520 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43203 | return __ret; | 43521 | return __ret; |
| 43204 | } | 43522 | } |
| 43205 | __ai uint32x2_t __noswap_vdot_u32(uint32x2_t __p0, uint8x8_t __p1, uint8x8_t __p2) { | | |
| 43206 | uint32x2_t __ret; | | |
| 43207 | __ret = (uint32x2_t) __builtin_neon_vdot_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 18); | | |
| 43208 | return __ret; | | |
| 43209 | } | | |
| 43210 | #endif | 43523 | #endif |
| 43211 | | 43524 | |
| 43212 | #ifdef __LITTLE_ENDIAN__ | 43525 | #ifdef __LITTLE_ENDIAN__ |
| 43213 | __ai int32x2_t vdot_s32(int32x2_t __p0, int8x8_t __p1, int8x8_t __p2) { | 43526 | __ai uint32x2_t vcgtz_s32(int32x2_t __p0) { |
| 43214 | int32x2_t __ret; | 43527 | uint32x2_t __ret; |
| 43215 | __ret = (int32x2_t) __builtin_neon_vdot_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); | 43528 | __ret = (uint32x2_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 18); |
| 43216 | return __ret; | 43529 | return __ret; |
| 43217 | } | 43530 | } |
| 43218 | #else | 43531 | #else |
| 43219 | __ai int32x2_t vdot_s32(int32x2_t __p0, int8x8_t __p1, int8x8_t __p2) { | 43532 | __ai uint32x2_t vcgtz_s32(int32x2_t __p0) { |
| 43220 | int32x2_t __ret; | 43533 | uint32x2_t __ret; |
| 43221 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 43534 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43222 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 43535 | __ret = (uint32x2_t) __builtin_neon_vcgtz_v((int8x8_t)__rev0, 18); |
| 43223 | int8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 43224 | __ret = (int32x2_t) __builtin_neon_vdot_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 2); | | |
| 43225 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 43536 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43226 | return __ret; | 43537 | return __ret; |
| 43227 | } | 43538 | } |
| 43228 | __ai int32x2_t __noswap_vdot_s32(int32x2_t __p0, int8x8_t __p1, int8x8_t __p2) { | | |
| 43229 | int32x2_t __ret; | | |
| 43230 | __ret = (int32x2_t) __builtin_neon_vdot_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); | | |
| 43231 | return __ret; | | |
| 43232 | } | | |
| 43233 | #endif | | |
| 43234 | | | |
| 43235 | #ifdef __LITTLE_ENDIAN__ | | |
| 43236 | #define vdotq_lane_u32(__p0_261, __p1_261, __p2_261, __p3_261) __extension__ ({ \ | | |
| 43237 | uint32x4_t __ret_261; \ | | |
| 43238 | uint32x4_t __s0_261 = __p0_261; \ | | |
| 43239 | uint8x16_t __s1_261 = __p1_261; \ | | |
| 43240 | uint8x8_t __s2_261 = __p2_261; \ | | |
| 43241 | uint8x8_t __reint_261 = __s2_261; \ | | |
| 43242 | uint32x4_t __reint1_261 = splatq_lane_u32(*(uint32x2_t *) &__reint_261, __p3_261); \ | | |
| 43243 | __ret_261 = vdotq_u32(__s0_261, __s1_261, *(uint8x16_t *) &__reint1_261); \ | | |
| 43244 | __ret_261; \ | | |
| 43245 | }) | | |
| 43246 | #else | | |
| 43247 | #define vdotq_lane_u32(__p0_262, __p1_262, __p2_262, __p3_262) __extension__ ({ \ | | |
| 43248 | uint32x4_t __ret_262; \ | | |
| 43249 | uint32x4_t __s0_262 = __p0_262; \ | | |
| 43250 | uint8x16_t __s1_262 = __p1_262; \ | | |
| 43251 | uint8x8_t __s2_262 = __p2_262; \ | | |
| 43252 | uint32x4_t __rev0_262; __rev0_262 = __builtin_shufflevector(__s0_262, __s0_262, 3, 2, 1, 0); \ | | |
| 43253 | uint8x16_t __rev1_262; __rev1_262 = __builtin_shufflevector(__s1_262, __s1_262, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 43254 | uint8x8_t __rev2_262; __rev2_262 = __builtin_shufflevector(__s2_262, __s2_262, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 43255 | uint8x8_t __reint_262 = __rev2_262; \ | | |
| 43256 | uint32x4_t __reint1_262 = __noswap_splatq_lane_u32(*(uint32x2_t *) &__reint_262, __p3_262); \ | | |
| 43257 | __ret_262 = __noswap_vdotq_u32(__rev0_262, __rev1_262, *(uint8x16_t *) &__reint1_262); \ | | |
| 43258 | __ret_262 = __builtin_shufflevector(__ret_262, __ret_262, 3, 2, 1, 0); \ | | |
| 43259 | __ret_262; \ | | |
| 43260 | }) | | |
| 43261 | #endif | | |
| 43262 | | | |
| 43263 | #ifdef __LITTLE_ENDIAN__ | | |
| 43264 | #define vdotq_lane_s32(__p0_263, __p1_263, __p2_263, __p3_263) __extension__ ({ \ | | |
| 43265 | int32x4_t __ret_263; \ | | |
| 43266 | int32x4_t __s0_263 = __p0_263; \ | | |
| 43267 | int8x16_t __s1_263 = __p1_263; \ | | |
| 43268 | int8x8_t __s2_263 = __p2_263; \ | | |
| 43269 | int8x8_t __reint_263 = __s2_263; \ | | |
| 43270 | int32x4_t __reint1_263 = splatq_lane_s32(*(int32x2_t *) &__reint_263, __p3_263); \ | | |
| 43271 | __ret_263 = vdotq_s32(__s0_263, __s1_263, *(int8x16_t *) &__reint1_263); \ | | |
| 43272 | __ret_263; \ | | |
| 43273 | }) | | |
| 43274 | #else | | |
| 43275 | #define vdotq_lane_s32(__p0_264, __p1_264, __p2_264, __p3_264) __extension__ ({ \ | | |
| 43276 | int32x4_t __ret_264; \ | | |
| 43277 | int32x4_t __s0_264 = __p0_264; \ | | |
| 43278 | int8x16_t __s1_264 = __p1_264; \ | | |
| 43279 | int8x8_t __s2_264 = __p2_264; \ | | |
| 43280 | int32x4_t __rev0_264; __rev0_264 = __builtin_shufflevector(__s0_264, __s0_264, 3, 2, 1, 0); \ | | |
| 43281 | int8x16_t __rev1_264; __rev1_264 = __builtin_shufflevector(__s1_264, __s1_264, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 43282 | int8x8_t __rev2_264; __rev2_264 = __builtin_shufflevector(__s2_264, __s2_264, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 43283 | int8x8_t __reint_264 = __rev2_264; \ | | |
| 43284 | int32x4_t __reint1_264 = __noswap_splatq_lane_s32(*(int32x2_t *) &__reint_264, __p3_264); \ | | |
| 43285 | __ret_264 = __noswap_vdotq_s32(__rev0_264, __rev1_264, *(int8x16_t *) &__reint1_264); \ | | |
| 43286 | __ret_264 = __builtin_shufflevector(__ret_264, __ret_264, 3, 2, 1, 0); \ | | |
| 43287 | __ret_264; \ | | |
| 43288 | }) | | |
| 43289 | #endif | 43539 | #endif |
| 43290 | | 43540 | |
| | 43541 | __ai uint64x1_t vcgtz_s64(int64x1_t __p0) { |
| | 43542 | uint64x1_t __ret; |
| | 43543 | __ret = (uint64x1_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 19); |
| | 43544 | return __ret; |
| | 43545 | } |
| 43291 | #ifdef __LITTLE_ENDIAN__ | 43546 | #ifdef __LITTLE_ENDIAN__ |
| 43292 | #define vdot_lane_u32(__p0_265, __p1_265, __p2_265, __p3_265) __extension__ ({ \ | 43547 | __ai uint16x4_t vcgtz_s16(int16x4_t __p0) { |
| 43293 | uint32x2_t __ret_265; \ | 43548 | uint16x4_t __ret; |
| 43294 | uint32x2_t __s0_265 = __p0_265; \ | 43549 | __ret = (uint16x4_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 17); |
| 43295 | uint8x8_t __s1_265 = __p1_265; \ | 43550 | return __ret; |
| 43296 | uint8x8_t __s2_265 = __p2_265; \ | 43551 | } |
| 43297 | uint8x8_t __reint_265 = __s2_265; \ | | |
| 43298 | uint32x2_t __reint1_265 = splat_lane_u32(*(uint32x2_t *) &__reint_265, __p3_265); \ | | |
| 43299 | __ret_265 = vdot_u32(__s0_265, __s1_265, *(uint8x8_t *) &__reint1_265); \ | | |
| 43300 | __ret_265; \ | | |
| 43301 | }) | | |
| 43302 | #else | 43552 | #else |
| 43303 | #define vdot_lane_u32(__p0_266, __p1_266, __p2_266, __p3_266) __extension__ ({ \ | 43553 | __ai uint16x4_t vcgtz_s16(int16x4_t __p0) { |
| 43304 | uint32x2_t __ret_266; \ | 43554 | uint16x4_t __ret; |
| 43305 | uint32x2_t __s0_266 = __p0_266; \ | 43555 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 43306 | uint8x8_t __s1_266 = __p1_266; \ | 43556 | __ret = (uint16x4_t) __builtin_neon_vcgtz_v((int8x8_t)__rev0, 17); |
| 43307 | uint8x8_t __s2_266 = __p2_266; \ | 43557 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 43308 | uint32x2_t __rev0_266; __rev0_266 = __builtin_shufflevector(__s0_266, __s0_266, 1, 0); \ | 43558 | return __ret; |
| 43309 | uint8x8_t __rev1_266; __rev1_266 = __builtin_shufflevector(__s1_266, __s1_266, 7, 6, 5, 4, 3, 2, 1, 0); \ | 43559 | } |
| 43310 | uint8x8_t __rev2_266; __rev2_266 = __builtin_shufflevector(__s2_266, __s2_266, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 43311 | uint8x8_t __reint_266 = __rev2_266; \ | | |
| 43312 | uint32x2_t __reint1_266 = __noswap_splat_lane_u32(*(uint32x2_t *) &__reint_266, __p3_266); \ | | |
| 43313 | __ret_266 = __noswap_vdot_u32(__rev0_266, __rev1_266, *(uint8x8_t *) &__reint1_266); \ | | |
| 43314 | __ret_266 = __builtin_shufflevector(__ret_266, __ret_266, 1, 0); \ | | |
| 43315 | __ret_266; \ | | |
| 43316 | }) | | |
| 43317 | #endif | 43560 | #endif |
| 43318 | | 43561 | |
| | 43562 | __ai uint64_t vcgtzd_s64(int64_t __p0) { |
| | 43563 | uint64_t __ret; |
| | 43564 | __ret = (uint64_t) __builtin_neon_vcgtzd_s64(__p0); |
| | 43565 | return __ret; |
| | 43566 | } |
| | 43567 | __ai uint64_t vcgtzd_f64(float64_t __p0) { |
| | 43568 | uint64_t __ret; |
| | 43569 | __ret = (uint64_t) __builtin_neon_vcgtzd_f64(__p0); |
| | 43570 | return __ret; |
| | 43571 | } |
| | 43572 | __ai uint32_t vcgtzs_f32(float32_t __p0) { |
| | 43573 | uint32_t __ret; |
| | 43574 | __ret = (uint32_t) __builtin_neon_vcgtzs_f32(__p0); |
| | 43575 | return __ret; |
| | 43576 | } |
| 43319 | #ifdef __LITTLE_ENDIAN__ | 43577 | #ifdef __LITTLE_ENDIAN__ |
| 43320 | #define vdot_lane_s32(__p0_267, __p1_267, __p2_267, __p3_267) __extension__ ({ \ | 43578 | __ai uint64x2_t vcleq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 43321 | int32x2_t __ret_267; \ | 43579 | uint64x2_t __ret; |
| 43322 | int32x2_t __s0_267 = __p0_267; \ | 43580 | __ret = (uint64x2_t)(__p0 <= __p1); |
| 43323 | int8x8_t __s1_267 = __p1_267; \ | 43581 | return __ret; |
| 43324 | int8x8_t __s2_267 = __p2_267; \ | 43582 | } |
| 43325 | int8x8_t __reint_267 = __s2_267; \ | | |
| 43326 | int32x2_t __reint1_267 = splat_lane_s32(*(int32x2_t *) &__reint_267, __p3_267); \ | | |
| 43327 | __ret_267 = vdot_s32(__s0_267, __s1_267, *(int8x8_t *) &__reint1_267); \ | | |
| 43328 | __ret_267; \ | | |
| 43329 | }) | | |
| 43330 | #else | 43583 | #else |
| 43331 | #define vdot_lane_s32(__p0_268, __p1_268, __p2_268, __p3_268) __extension__ ({ \ | 43584 | __ai uint64x2_t vcleq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 43332 | int32x2_t __ret_268; \ | 43585 | uint64x2_t __ret; |
| 43333 | int32x2_t __s0_268 = __p0_268; \ | 43586 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43334 | int8x8_t __s1_268 = __p1_268; \ | 43587 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 43335 | int8x8_t __s2_268 = __p2_268; \ | 43588 | __ret = (uint64x2_t)(__rev0 <= __rev1); |
| 43336 | int32x2_t __rev0_268; __rev0_268 = __builtin_shufflevector(__s0_268, __s0_268, 1, 0); \ | 43589 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43337 | int8x8_t __rev1_268; __rev1_268 = __builtin_shufflevector(__s1_268, __s1_268, 7, 6, 5, 4, 3, 2, 1, 0); \ | 43590 | return __ret; |
| 43338 | int8x8_t __rev2_268; __rev2_268 = __builtin_shufflevector(__s2_268, __s2_268, 7, 6, 5, 4, 3, 2, 1, 0); \ | 43591 | } |
| 43339 | int8x8_t __reint_268 = __rev2_268; \ | | |
| 43340 | int32x2_t __reint1_268 = __noswap_splat_lane_s32(*(int32x2_t *) &__reint_268, __p3_268); \ | | |
| 43341 | __ret_268 = __noswap_vdot_s32(__rev0_268, __rev1_268, *(int8x8_t *) &__reint1_268); \ | | |
| 43342 | __ret_268 = __builtin_shufflevector(__ret_268, __ret_268, 1, 0); \ | | |
| 43343 | __ret_268; \ | | |
| 43344 | }) | | |
| 43345 | #endif | 43592 | #endif |
| 43346 | | 43593 | |
| 43347 | #endif | | |
| 43348 | #if defined(__ARM_FEATURE_DOTPROD) && defined(__aarch64__) | | |
| 43349 | #ifdef __LITTLE_ENDIAN__ | 43594 | #ifdef __LITTLE_ENDIAN__ |
| 43350 | #define vdotq_laneq_u32(__p0_269, __p1_269, __p2_269, __p3_269) __extension__ ({ \ | 43595 | __ai uint64x2_t vcleq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 43351 | uint32x4_t __ret_269; \ | 43596 | uint64x2_t __ret; |
| 43352 | uint32x4_t __s0_269 = __p0_269; \ | 43597 | __ret = (uint64x2_t)(__p0 <= __p1); |
| 43353 | uint8x16_t __s1_269 = __p1_269; \ | 43598 | return __ret; |
| 43354 | uint8x16_t __s2_269 = __p2_269; \ | 43599 | } |
| 43355 | uint8x16_t __reint_269 = __s2_269; \ | | |
| 43356 | uint32x4_t __reint1_269 = splatq_laneq_u32(*(uint32x4_t *) &__reint_269, __p3_269); \ | | |
| 43357 | __ret_269 = vdotq_u32(__s0_269, __s1_269, *(uint8x16_t *) &__reint1_269); \ | | |
| 43358 | __ret_269; \ | | |
| 43359 | }) | | |
| 43360 | #else | 43600 | #else |
| 43361 | #define vdotq_laneq_u32(__p0_270, __p1_270, __p2_270, __p3_270) __extension__ ({ \ | 43601 | __ai uint64x2_t vcleq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 43362 | uint32x4_t __ret_270; \ | 43602 | uint64x2_t __ret; |
| 43363 | uint32x4_t __s0_270 = __p0_270; \ | 43603 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43364 | uint8x16_t __s1_270 = __p1_270; \ | 43604 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 43365 | uint8x16_t __s2_270 = __p2_270; \ | 43605 | __ret = (uint64x2_t)(__rev0 <= __rev1); |
| 43366 | uint32x4_t __rev0_270; __rev0_270 = __builtin_shufflevector(__s0_270, __s0_270, 3, 2, 1, 0); \ | 43606 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43367 | uint8x16_t __rev1_270; __rev1_270 = __builtin_shufflevector(__s1_270, __s1_270, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 43607 | return __ret; |
| 43368 | uint8x16_t __rev2_270; __rev2_270 = __builtin_shufflevector(__s2_270, __s2_270, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 43608 | } |
| 43369 | uint8x16_t __reint_270 = __rev2_270; \ | | |
| 43370 | uint32x4_t __reint1_270 = __noswap_splatq_laneq_u32(*(uint32x4_t *) &__reint_270, __p3_270); \ | | |
| 43371 | __ret_270 = __noswap_vdotq_u32(__rev0_270, __rev1_270, *(uint8x16_t *) &__reint1_270); \ | | |
| 43372 | __ret_270 = __builtin_shufflevector(__ret_270, __ret_270, 3, 2, 1, 0); \ | | |
| 43373 | __ret_270; \ | | |
| 43374 | }) | | |
| 43375 | #endif | 43609 | #endif |
| 43376 | | 43610 | |
| 43377 | #ifdef __LITTLE_ENDIAN__ | 43611 | #ifdef __LITTLE_ENDIAN__ |
| 43378 | #define vdotq_laneq_s32(__p0_271, __p1_271, __p2_271, __p3_271) __extension__ ({ \ | 43612 | __ai uint64x2_t vcleq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 43379 | int32x4_t __ret_271; \ | 43613 | uint64x2_t __ret; |
| 43380 | int32x4_t __s0_271 = __p0_271; \ | 43614 | __ret = (uint64x2_t)(__p0 <= __p1); |
| 43381 | int8x16_t __s1_271 = __p1_271; \ | 43615 | return __ret; |
| 43382 | int8x16_t __s2_271 = __p2_271; \ | 43616 | } |
| 43383 | int8x16_t __reint_271 = __s2_271; \ | | |
| 43384 | int32x4_t __reint1_271 = splatq_laneq_s32(*(int32x4_t *) &__reint_271, __p3_271); \ | | |
| 43385 | __ret_271 = vdotq_s32(__s0_271, __s1_271, *(int8x16_t *) &__reint1_271); \ | | |
| 43386 | __ret_271; \ | | |
| 43387 | }) | | |
| 43388 | #else | 43617 | #else |
| 43389 | #define vdotq_laneq_s32(__p0_272, __p1_272, __p2_272, __p3_272) __extension__ ({ \ | 43618 | __ai uint64x2_t vcleq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 43390 | int32x4_t __ret_272; \ | 43619 | uint64x2_t __ret; |
| 43391 | int32x4_t __s0_272 = __p0_272; \ | 43620 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43392 | int8x16_t __s1_272 = __p1_272; \ | 43621 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 43393 | int8x16_t __s2_272 = __p2_272; \ | 43622 | __ret = (uint64x2_t)(__rev0 <= __rev1); |
| 43394 | int32x4_t __rev0_272; __rev0_272 = __builtin_shufflevector(__s0_272, __s0_272, 3, 2, 1, 0); \ | 43623 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43395 | int8x16_t __rev1_272; __rev1_272 = __builtin_shufflevector(__s1_272, __s1_272, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 43624 | return __ret; |
| 43396 | int8x16_t __rev2_272; __rev2_272 = __builtin_shufflevector(__s2_272, __s2_272, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 43625 | } |
| 43397 | int8x16_t __reint_272 = __rev2_272; \ | | |
| 43398 | int32x4_t __reint1_272 = __noswap_splatq_laneq_s32(*(int32x4_t *) &__reint_272, __p3_272); \ | | |
| 43399 | __ret_272 = __noswap_vdotq_s32(__rev0_272, __rev1_272, *(int8x16_t *) &__reint1_272); \ | | |
| 43400 | __ret_272 = __builtin_shufflevector(__ret_272, __ret_272, 3, 2, 1, 0); \ | | |
| 43401 | __ret_272; \ | | |
| 43402 | }) | | |
| 43403 | #endif | 43626 | #endif |
| 43404 | | 43627 | |
| | 43628 | __ai uint64x1_t vcle_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| | 43629 | uint64x1_t __ret; |
| | 43630 | __ret = (uint64x1_t)(__p0 <= __p1); |
| | 43631 | return __ret; |
| | 43632 | } |
| | 43633 | __ai uint64x1_t vcle_f64(float64x1_t __p0, float64x1_t __p1) { |
| | 43634 | uint64x1_t __ret; |
| | 43635 | __ret = (uint64x1_t)(__p0 <= __p1); |
| | 43636 | return __ret; |
| | 43637 | } |
| | 43638 | __ai uint64x1_t vcle_s64(int64x1_t __p0, int64x1_t __p1) { |
| | 43639 | uint64x1_t __ret; |
| | 43640 | __ret = (uint64x1_t)(__p0 <= __p1); |
| | 43641 | return __ret; |
| | 43642 | } |
| | 43643 | __ai uint64_t vcled_u64(uint64_t __p0, uint64_t __p1) { |
| | 43644 | uint64_t __ret; |
| | 43645 | __ret = (uint64_t) __builtin_neon_vcled_u64(__p0, __p1); |
| | 43646 | return __ret; |
| | 43647 | } |
| | 43648 | __ai uint64_t vcled_s64(int64_t __p0, int64_t __p1) { |
| | 43649 | uint64_t __ret; |
| | 43650 | __ret = (uint64_t) __builtin_neon_vcled_s64(__p0, __p1); |
| | 43651 | return __ret; |
| | 43652 | } |
| | 43653 | __ai uint64_t vcled_f64(float64_t __p0, float64_t __p1) { |
| | 43654 | uint64_t __ret; |
| | 43655 | __ret = (uint64_t) __builtin_neon_vcled_f64(__p0, __p1); |
| | 43656 | return __ret; |
| | 43657 | } |
| | 43658 | __ai uint32_t vcles_f32(float32_t __p0, float32_t __p1) { |
| | 43659 | uint32_t __ret; |
| | 43660 | __ret = (uint32_t) __builtin_neon_vcles_f32(__p0, __p1); |
| | 43661 | return __ret; |
| | 43662 | } |
| 43405 | #ifdef __LITTLE_ENDIAN__ | 43663 | #ifdef __LITTLE_ENDIAN__ |
| 43406 | #define vdot_laneq_u32(__p0_273, __p1_273, __p2_273, __p3_273) __extension__ ({ \ | 43664 | __ai uint8x16_t vclezq_s8(int8x16_t __p0) { |
| 43407 | uint32x2_t __ret_273; \ | 43665 | uint8x16_t __ret; |
| 43408 | uint32x2_t __s0_273 = __p0_273; \ | 43666 | __ret = (uint8x16_t) __builtin_neon_vclezq_v((int8x16_t)__p0, 48); |
| 43409 | uint8x8_t __s1_273 = __p1_273; \ | 43667 | return __ret; |
| 43410 | uint8x16_t __s2_273 = __p2_273; \ | 43668 | } |
| 43411 | uint8x16_t __reint_273 = __s2_273; \ | | |
| 43412 | uint32x2_t __reint1_273 = splat_laneq_u32(*(uint32x4_t *) &__reint_273, __p3_273); \ | | |
| 43413 | __ret_273 = vdot_u32(__s0_273, __s1_273, *(uint8x8_t *) &__reint1_273); \ | | |
| 43414 | __ret_273; \ | | |
| 43415 | }) | | |
| 43416 | #else | 43669 | #else |
| 43417 | #define vdot_laneq_u32(__p0_274, __p1_274, __p2_274, __p3_274) __extension__ ({ \ | 43670 | __ai uint8x16_t vclezq_s8(int8x16_t __p0) { |
| 43418 | uint32x2_t __ret_274; \ | 43671 | uint8x16_t __ret; |
| 43419 | uint32x2_t __s0_274 = __p0_274; \ | 43672 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43420 | uint8x8_t __s1_274 = __p1_274; \ | 43673 | __ret = (uint8x16_t) __builtin_neon_vclezq_v((int8x16_t)__rev0, 48); |
| 43421 | uint8x16_t __s2_274 = __p2_274; \ | 43674 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43422 | uint32x2_t __rev0_274; __rev0_274 = __builtin_shufflevector(__s0_274, __s0_274, 1, 0); \ | 43675 | return __ret; |
| 43423 | uint8x8_t __rev1_274; __rev1_274 = __builtin_shufflevector(__s1_274, __s1_274, 7, 6, 5, 4, 3, 2, 1, 0); \ | 43676 | } |
| 43424 | uint8x16_t __rev2_274; __rev2_274 = __builtin_shufflevector(__s2_274, __s2_274, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 43425 | uint8x16_t __reint_274 = __rev2_274; \ | | |
| 43426 | uint32x2_t __reint1_274 = __noswap_splat_laneq_u32(*(uint32x4_t *) &__reint_274, __p3_274); \ | | |
| 43427 | __ret_274 = __noswap_vdot_u32(__rev0_274, __rev1_274, *(uint8x8_t *) &__reint1_274); \ | | |
| 43428 | __ret_274 = __builtin_shufflevector(__ret_274, __ret_274, 1, 0); \ | | |
| 43429 | __ret_274; \ | | |
| 43430 | }) | | |
| 43431 | #endif | 43677 | #endif |
| 43432 | | 43678 | |
| 43433 | #ifdef __LITTLE_ENDIAN__ | 43679 | #ifdef __LITTLE_ENDIAN__ |
| 43434 | #define vdot_laneq_s32(__p0_275, __p1_275, __p2_275, __p3_275) __extension__ ({ \ | 43680 | __ai uint64x2_t vclezq_f64(float64x2_t __p0) { |
| 43435 | int32x2_t __ret_275; \ | 43681 | uint64x2_t __ret; |
| 43436 | int32x2_t __s0_275 = __p0_275; \ | 43682 | __ret = (uint64x2_t) __builtin_neon_vclezq_v((int8x16_t)__p0, 51); |
| 43437 | int8x8_t __s1_275 = __p1_275; \ | 43683 | return __ret; |
| 43438 | int8x16_t __s2_275 = __p2_275; \ | 43684 | } |
| 43439 | int8x16_t __reint_275 = __s2_275; \ | | |
| 43440 | int32x2_t __reint1_275 = splat_laneq_s32(*(int32x4_t *) &__reint_275, __p3_275); \ | | |
| 43441 | __ret_275 = vdot_s32(__s0_275, __s1_275, *(int8x8_t *) &__reint1_275); \ | | |
| 43442 | __ret_275; \ | | |
| 43443 | }) | | |
| 43444 | #else | 43685 | #else |
| 43445 | #define vdot_laneq_s32(__p0_276, __p1_276, __p2_276, __p3_276) __extension__ ({ \ | 43686 | __ai uint64x2_t vclezq_f64(float64x2_t __p0) { |
| 43446 | int32x2_t __ret_276; \ | 43687 | uint64x2_t __ret; |
| 43447 | int32x2_t __s0_276 = __p0_276; \ | 43688 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43448 | int8x8_t __s1_276 = __p1_276; \ | 43689 | __ret = (uint64x2_t) __builtin_neon_vclezq_v((int8x16_t)__rev0, 51); |
| 43449 | int8x16_t __s2_276 = __p2_276; \ | 43690 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43450 | int32x2_t __rev0_276; __rev0_276 = __builtin_shufflevector(__s0_276, __s0_276, 1, 0); \ | 43691 | return __ret; |
| 43451 | int8x8_t __rev1_276; __rev1_276 = __builtin_shufflevector(__s1_276, __s1_276, 7, 6, 5, 4, 3, 2, 1, 0); \ | 43692 | } |
| 43452 | int8x16_t __rev2_276; __rev2_276 = __builtin_shufflevector(__s2_276, __s2_276, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 43453 | int8x16_t __reint_276 = __rev2_276; \ | | |
| 43454 | int32x2_t __reint1_276 = __noswap_splat_laneq_s32(*(int32x4_t *) &__reint_276, __p3_276); \ | | |
| 43455 | __ret_276 = __noswap_vdot_s32(__rev0_276, __rev1_276, *(int8x8_t *) &__reint1_276); \ | | |
| 43456 | __ret_276 = __builtin_shufflevector(__ret_276, __ret_276, 1, 0); \ | | |
| 43457 | __ret_276; \ | | |
| 43458 | }) | | |
| 43459 | #endif | 43693 | #endif |
| 43460 | | 43694 | |
| 43461 | #endif | | |
| 43462 | #if defined(__ARM_FEATURE_FMA) | | |
| 43463 | #ifdef __LITTLE_ENDIAN__ | 43695 | #ifdef __LITTLE_ENDIAN__ |
| 43464 | __ai float32x4_t vfmaq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | 43696 | __ai uint32x4_t vclezq_f32(float32x4_t __p0) { |
| 43465 | float32x4_t __ret; | 43697 | uint32x4_t __ret; |
| 43466 | __ret = (float32x4_t) __builtin_neon_vfmaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | 43698 | __ret = (uint32x4_t) __builtin_neon_vclezq_v((int8x16_t)__p0, 50); |
| 43467 | return __ret; | 43699 | return __ret; |
| 43468 | } | 43700 | } |
| 43469 | #else | 43701 | #else |
| 43470 | __ai float32x4_t vfmaq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | 43702 | __ai uint32x4_t vclezq_f32(float32x4_t __p0) { |
| 43471 | float32x4_t __ret; | 43703 | uint32x4_t __ret; |
| 43472 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 43704 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 43473 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 43705 | __ret = (uint32x4_t) __builtin_neon_vclezq_v((int8x16_t)__rev0, 50); |
| 43474 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | | |
| 43475 | __ret = (float32x4_t) __builtin_neon_vfmaq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); | | |
| 43476 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 43706 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 43477 | return __ret; | 43707 | return __ret; |
| 43478 | } | 43708 | } |
| 43479 | __ai float32x4_t __noswap_vfmaq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | 43709 | #endif |
| 43480 | float32x4_t __ret; | 43710 | |
| 43481 | __ret = (float32x4_t) __builtin_neon_vfmaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | 43711 | #ifdef __LITTLE_ENDIAN__ |
| | 43712 | __ai uint32x4_t vclezq_s32(int32x4_t __p0) { |
| | 43713 | uint32x4_t __ret; |
| | 43714 | __ret = (uint32x4_t) __builtin_neon_vclezq_v((int8x16_t)__p0, 50); |
| | 43715 | return __ret; |
| | 43716 | } |
| | 43717 | #else |
| | 43718 | __ai uint32x4_t vclezq_s32(int32x4_t __p0) { |
| | 43719 | uint32x4_t __ret; |
| | 43720 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 43721 | __ret = (uint32x4_t) __builtin_neon_vclezq_v((int8x16_t)__rev0, 50); |
| | 43722 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 43482 | return __ret; | 43723 | return __ret; |
| 43483 | } | 43724 | } |
| 43484 | #endif | 43725 | #endif |
| 43485 | | 43726 | |
| 43486 | #ifdef __LITTLE_ENDIAN__ | 43727 | #ifdef __LITTLE_ENDIAN__ |
| 43487 | __ai float32x2_t vfma_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | 43728 | __ai uint64x2_t vclezq_s64(int64x2_t __p0) { |
| 43488 | float32x2_t __ret; | 43729 | uint64x2_t __ret; |
| 43489 | __ret = (float32x2_t) __builtin_neon_vfma_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | 43730 | __ret = (uint64x2_t) __builtin_neon_vclezq_v((int8x16_t)__p0, 51); |
| 43490 | return __ret; | 43731 | return __ret; |
| 43491 | } | 43732 | } |
| 43492 | #else | 43733 | #else |
| 43493 | __ai float32x2_t vfma_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | 43734 | __ai uint64x2_t vclezq_s64(int64x2_t __p0) { |
| 43494 | float32x2_t __ret; | 43735 | uint64x2_t __ret; |
| 43495 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 43736 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43496 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 43737 | __ret = (uint64x2_t) __builtin_neon_vclezq_v((int8x16_t)__rev0, 51); |
| 43497 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 43498 | __ret = (float32x2_t) __builtin_neon_vfma_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); | | |
| 43499 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 43738 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43500 | return __ret; | 43739 | return __ret; |
| 43501 | } | 43740 | } |
| 43502 | __ai float32x2_t __noswap_vfma_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | | |
| 43503 | float32x2_t __ret; | | |
| 43504 | __ret = (float32x2_t) __builtin_neon_vfma_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | | |
| 43505 | return __ret; | | |
| 43506 | } | | |
| 43507 | #endif | 43741 | #endif |
| 43508 | | 43742 | |
| 43509 | #ifdef __LITTLE_ENDIAN__ | 43743 | #ifdef __LITTLE_ENDIAN__ |
| 43510 | __ai float32x4_t vfmaq_n_f32(float32x4_t __p0, float32x4_t __p1, float32_t __p2) { | 43744 | __ai uint16x8_t vclezq_s16(int16x8_t __p0) { |
| 43511 | float32x4_t __ret; | 43745 | uint16x8_t __ret; |
| 43512 | __ret = vfmaq_f32(__p0, __p1, (float32x4_t) {__p2, __p2, __p2, __p2}); | 43746 | __ret = (uint16x8_t) __builtin_neon_vclezq_v((int8x16_t)__p0, 49); |
| 43513 | return __ret; | 43747 | return __ret; |
| 43514 | } | 43748 | } |
| 43515 | #else | 43749 | #else |
| 43516 | __ai float32x4_t vfmaq_n_f32(float32x4_t __p0, float32x4_t __p1, float32_t __p2) { | 43750 | __ai uint16x8_t vclezq_s16(int16x8_t __p0) { |
| 43517 | float32x4_t __ret; | 43751 | uint16x8_t __ret; |
| 43518 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 43752 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43519 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 43753 | __ret = (uint16x8_t) __builtin_neon_vclezq_v((int8x16_t)__rev0, 49); |
| 43520 | __ret = __noswap_vfmaq_f32(__rev0, __rev1, (float32x4_t) {__p2, __p2, __p2, __p2}); | 43754 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43521 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 43522 | return __ret; | 43755 | return __ret; |
| 43523 | } | 43756 | } |
| 43524 | #endif | 43757 | #endif |
| 43525 | | 43758 | |
| 43526 | #ifdef __LITTLE_ENDIAN__ | 43759 | #ifdef __LITTLE_ENDIAN__ |
| 43527 | __ai float32x2_t vfma_n_f32(float32x2_t __p0, float32x2_t __p1, float32_t __p2) { | 43760 | __ai uint8x8_t vclez_s8(int8x8_t __p0) { |
| 43528 | float32x2_t __ret; | 43761 | uint8x8_t __ret; |
| 43529 | __ret = vfma_f32(__p0, __p1, (float32x2_t) {__p2, __p2}); | 43762 | __ret = (uint8x8_t) __builtin_neon_vclez_v((int8x8_t)__p0, 16); |
| 43530 | return __ret; | 43763 | return __ret; |
| 43531 | } | 43764 | } |
| 43532 | #else | 43765 | #else |
| 43533 | __ai float32x2_t vfma_n_f32(float32x2_t __p0, float32x2_t __p1, float32_t __p2) { | 43766 | __ai uint8x8_t vclez_s8(int8x8_t __p0) { |
| 43534 | float32x2_t __ret; | 43767 | uint8x8_t __ret; |
| 43535 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 43768 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43536 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 43769 | __ret = (uint8x8_t) __builtin_neon_vclez_v((int8x8_t)__rev0, 16); |
| 43537 | __ret = __noswap_vfma_f32(__rev0, __rev1, (float32x2_t) {__p2, __p2}); | 43770 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43538 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 43539 | return __ret; | 43771 | return __ret; |
| 43540 | } | 43772 | } |
| 43541 | #endif | 43773 | #endif |
| 43542 | | 43774 | |
| | 43775 | __ai uint64x1_t vclez_f64(float64x1_t __p0) { |
| | 43776 | uint64x1_t __ret; |
| | 43777 | __ret = (uint64x1_t) __builtin_neon_vclez_v((int8x8_t)__p0, 19); |
| | 43778 | return __ret; |
| | 43779 | } |
| 43543 | #ifdef __LITTLE_ENDIAN__ | 43780 | #ifdef __LITTLE_ENDIAN__ |
| 43544 | __ai float32x4_t vfmsq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | 43781 | __ai uint32x2_t vclez_f32(float32x2_t __p0) { |
| 43545 | float32x4_t __ret; | 43782 | uint32x2_t __ret; |
| 43546 | __ret = vfmaq_f32(__p0, -__p1, __p2); | 43783 | __ret = (uint32x2_t) __builtin_neon_vclez_v((int8x8_t)__p0, 18); |
| 43547 | return __ret; | 43784 | return __ret; |
| 43548 | } | 43785 | } |
| 43549 | #else | 43786 | #else |
| 43550 | __ai float32x4_t vfmsq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { | 43787 | __ai uint32x2_t vclez_f32(float32x2_t __p0) { |
| 43551 | float32x4_t __ret; | 43788 | uint32x2_t __ret; |
| 43552 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 43789 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43553 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 43790 | __ret = (uint32x2_t) __builtin_neon_vclez_v((int8x8_t)__rev0, 18); |
| 43554 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 43791 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43555 | __ret = __noswap_vfmaq_f32(__rev0, -__rev1, __rev2); | | |
| 43556 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 43557 | return __ret; | 43792 | return __ret; |
| 43558 | } | 43793 | } |
| 43559 | #endif | 43794 | #endif |
| 43560 | | 43795 | |
| 43561 | #ifdef __LITTLE_ENDIAN__ | 43796 | #ifdef __LITTLE_ENDIAN__ |
| 43562 | __ai float32x2_t vfms_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | 43797 | __ai uint32x2_t vclez_s32(int32x2_t __p0) { |
| 43563 | float32x2_t __ret; | 43798 | uint32x2_t __ret; |
| 43564 | __ret = vfma_f32(__p0, -__p1, __p2); | 43799 | __ret = (uint32x2_t) __builtin_neon_vclez_v((int8x8_t)__p0, 18); |
| 43565 | return __ret; | 43800 | return __ret; |
| 43566 | } | 43801 | } |
| 43567 | #else | 43802 | #else |
| 43568 | __ai float32x2_t vfms_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { | 43803 | __ai uint32x2_t vclez_s32(int32x2_t __p0) { |
| 43569 | float32x2_t __ret; | 43804 | uint32x2_t __ret; |
| 43570 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 43805 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43571 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 43806 | __ret = (uint32x2_t) __builtin_neon_vclez_v((int8x8_t)__rev0, 18); |
| 43572 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 43573 | __ret = __noswap_vfma_f32(__rev0, -__rev1, __rev2); | | |
| 43574 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 43807 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43575 | return __ret; | 43808 | return __ret; |
| 43576 | } | 43809 | } |
| 43577 | #endif | 43810 | #endif |
| 43578 | | 43811 | |
| 43579 | #endif | 43812 | __ai uint64x1_t vclez_s64(int64x1_t __p0) { |
| 43580 | #if defined(__ARM_FEATURE_FP16_FML) && defined(__aarch64__) | 43813 | uint64x1_t __ret; |
| | 43814 | __ret = (uint64x1_t) __builtin_neon_vclez_v((int8x8_t)__p0, 19); |
| | 43815 | return __ret; |
| | 43816 | } |
| 43581 | #ifdef __LITTLE_ENDIAN__ | 43817 | #ifdef __LITTLE_ENDIAN__ |
| 43582 | __ai float32x4_t vfmlalq_high_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43818 | __ai uint16x4_t vclez_s16(int16x4_t __p0) { |
| 43583 | float32x4_t __ret; | 43819 | uint16x4_t __ret; |
| 43584 | __ret = (float32x4_t) __builtin_neon_vfmlalq_high_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | 43820 | __ret = (uint16x4_t) __builtin_neon_vclez_v((int8x8_t)__p0, 17); |
| 43585 | return __ret; | 43821 | return __ret; |
| 43586 | } | 43822 | } |
| 43587 | #else | 43823 | #else |
| 43588 | __ai float32x4_t vfmlalq_high_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43824 | __ai uint16x4_t vclez_s16(int16x4_t __p0) { |
| 43589 | float32x4_t __ret; | 43825 | uint16x4_t __ret; |
| 43590 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 43826 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 43591 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 43827 | __ret = (uint16x4_t) __builtin_neon_vclez_v((int8x8_t)__rev0, 17); |
| 43592 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 43593 | __ret = (float32x4_t) __builtin_neon_vfmlalq_high_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); | | |
| 43594 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 43828 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 43595 | return __ret; | 43829 | return __ret; |
| 43596 | } | 43830 | } |
| 43597 | __ai float32x4_t __noswap_vfmlalq_high_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { | | |
| 43598 | float32x4_t __ret; | | |
| 43599 | __ret = (float32x4_t) __builtin_neon_vfmlalq_high_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | | |
| 43600 | return __ret; | | |
| 43601 | } | | |
| 43602 | #endif | 43831 | #endif |
| 43603 | | 43832 | |
| | 43833 | __ai uint64_t vclezd_s64(int64_t __p0) { |
| | 43834 | uint64_t __ret; |
| | 43835 | __ret = (uint64_t) __builtin_neon_vclezd_s64(__p0); |
| | 43836 | return __ret; |
| | 43837 | } |
| | 43838 | __ai uint64_t vclezd_f64(float64_t __p0) { |
| | 43839 | uint64_t __ret; |
| | 43840 | __ret = (uint64_t) __builtin_neon_vclezd_f64(__p0); |
| | 43841 | return __ret; |
| | 43842 | } |
| | 43843 | __ai uint32_t vclezs_f32(float32_t __p0) { |
| | 43844 | uint32_t __ret; |
| | 43845 | __ret = (uint32_t) __builtin_neon_vclezs_f32(__p0); |
| | 43846 | return __ret; |
| | 43847 | } |
| 43604 | #ifdef __LITTLE_ENDIAN__ | 43848 | #ifdef __LITTLE_ENDIAN__ |
| 43605 | __ai float32x2_t vfmlal_high_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43849 | __ai uint64x2_t vcltq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 43606 | float32x2_t __ret; | 43850 | uint64x2_t __ret; |
| 43607 | __ret = (float32x2_t) __builtin_neon_vfmlal_high_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | 43851 | __ret = (uint64x2_t)(__p0 < __p1); |
| 43608 | return __ret; | 43852 | return __ret; |
| 43609 | } | 43853 | } |
| 43610 | #else | 43854 | #else |
| 43611 | __ai float32x2_t vfmlal_high_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43855 | __ai uint64x2_t vcltq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 43612 | float32x2_t __ret; | 43856 | uint64x2_t __ret; |
| 43613 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 43857 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43614 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 43858 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 43615 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 43859 | __ret = (uint64x2_t)(__rev0 < __rev1); |
| 43616 | __ret = (float32x2_t) __builtin_neon_vfmlal_high_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); | | |
| 43617 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 43860 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43618 | return __ret; | 43861 | return __ret; |
| 43619 | } | 43862 | } |
| 43620 | __ai float32x2_t __noswap_vfmlal_high_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { | | |
| 43621 | float32x2_t __ret; | | |
| 43622 | __ret = (float32x2_t) __builtin_neon_vfmlal_high_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | | |
| 43623 | return __ret; | | |
| 43624 | } | | |
| 43625 | #endif | 43863 | #endif |
| 43626 | | 43864 | |
| 43627 | #ifdef __LITTLE_ENDIAN__ | 43865 | #ifdef __LITTLE_ENDIAN__ |
| 43628 | __ai float32x4_t vfmlalq_low_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43866 | __ai uint64x2_t vcltq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 43629 | float32x4_t __ret; | 43867 | uint64x2_t __ret; |
| 43630 | __ret = (float32x4_t) __builtin_neon_vfmlalq_low_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | 43868 | __ret = (uint64x2_t)(__p0 < __p1); |
| 43631 | return __ret; | 43869 | return __ret; |
| 43632 | } | 43870 | } |
| 43633 | #else | 43871 | #else |
| 43634 | __ai float32x4_t vfmlalq_low_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43872 | __ai uint64x2_t vcltq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 43635 | float32x4_t __ret; | 43873 | uint64x2_t __ret; |
| 43636 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 43874 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43637 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 43875 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 43638 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 43876 | __ret = (uint64x2_t)(__rev0 < __rev1); |
| 43639 | __ret = (float32x4_t) __builtin_neon_vfmlalq_low_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); | 43877 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43640 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 43641 | return __ret; | | |
| 43642 | } | | |
| 43643 | __ai float32x4_t __noswap_vfmlalq_low_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { | | |
| 43644 | float32x4_t __ret; | | |
| 43645 | __ret = (float32x4_t) __builtin_neon_vfmlalq_low_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | | |
| 43646 | return __ret; | 43878 | return __ret; |
| 43647 | } | 43879 | } |
| 43648 | #endif | 43880 | #endif |
| 43649 | | 43881 | |
| 43650 | #ifdef __LITTLE_ENDIAN__ | 43882 | #ifdef __LITTLE_ENDIAN__ |
| 43651 | __ai float32x2_t vfmlal_low_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43883 | __ai uint64x2_t vcltq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 43652 | float32x2_t __ret; | 43884 | uint64x2_t __ret; |
| 43653 | __ret = (float32x2_t) __builtin_neon_vfmlal_low_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | 43885 | __ret = (uint64x2_t)(__p0 < __p1); |
| 43654 | return __ret; | 43886 | return __ret; |
| 43655 | } | 43887 | } |
| 43656 | #else | 43888 | #else |
| 43657 | __ai float32x2_t vfmlal_low_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43889 | __ai uint64x2_t vcltq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 43658 | float32x2_t __ret; | 43890 | uint64x2_t __ret; |
| 43659 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 43891 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43660 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 43892 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 43661 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 43893 | __ret = (uint64x2_t)(__rev0 < __rev1); |
| 43662 | __ret = (float32x2_t) __builtin_neon_vfmlal_low_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); | | |
| 43663 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 43894 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43664 | return __ret; | 43895 | return __ret; |
| 43665 | } | 43896 | } |
| 43666 | __ai float32x2_t __noswap_vfmlal_low_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { | | |
| 43667 | float32x2_t __ret; | | |
| 43668 | __ret = (float32x2_t) __builtin_neon_vfmlal_low_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | | |
| 43669 | return __ret; | | |
| 43670 | } | | |
| 43671 | #endif | 43897 | #endif |
| 43672 | | 43898 | |
| 43673 | #ifdef __LITTLE_ENDIAN__ | 43899 | __ai uint64x1_t vclt_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 43674 | __ai float32x4_t vfmlslq_high_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43900 | uint64x1_t __ret; |
| 43675 | float32x4_t __ret; | 43901 | __ret = (uint64x1_t)(__p0 < __p1); |
| 43676 | __ret = (float32x4_t) __builtin_neon_vfmlslq_high_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | | |
| 43677 | return __ret; | 43902 | return __ret; |
| 43678 | } | 43903 | } |
| 43679 | #else | 43904 | __ai uint64x1_t vclt_f64(float64x1_t __p0, float64x1_t __p1) { |
| 43680 | __ai float32x4_t vfmlslq_high_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43905 | uint64x1_t __ret; |
| 43681 | float32x4_t __ret; | 43906 | __ret = (uint64x1_t)(__p0 < __p1); |
| 43682 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 43683 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 43684 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 43685 | __ret = (float32x4_t) __builtin_neon_vfmlslq_high_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); | | |
| 43686 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 43687 | return __ret; | 43907 | return __ret; |
| 43688 | } | 43908 | } |
| 43689 | __ai float32x4_t __noswap_vfmlslq_high_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43909 | __ai uint64x1_t vclt_s64(int64x1_t __p0, int64x1_t __p1) { |
| 43690 | float32x4_t __ret; | 43910 | uint64x1_t __ret; |
| 43691 | __ret = (float32x4_t) __builtin_neon_vfmlslq_high_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | 43911 | __ret = (uint64x1_t)(__p0 < __p1); |
| 43692 | return __ret; | 43912 | return __ret; |
| 43693 | } | 43913 | } |
| 43694 | #endif | 43914 | __ai uint64_t vcltd_u64(uint64_t __p0, uint64_t __p1) { |
| 43695 | | 43915 | uint64_t __ret; |
| 43696 | #ifdef __LITTLE_ENDIAN__ | 43916 | __ret = (uint64_t) __builtin_neon_vcltd_u64(__p0, __p1); |
| 43697 | __ai float32x2_t vfmlsl_high_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { | | |
| 43698 | float32x2_t __ret; | | |
| 43699 | __ret = (float32x2_t) __builtin_neon_vfmlsl_high_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | | |
| 43700 | return __ret; | 43917 | return __ret; |
| 43701 | } | 43918 | } |
| 43702 | #else | 43919 | __ai uint64_t vcltd_s64(int64_t __p0, int64_t __p1) { |
| 43703 | __ai float32x2_t vfmlsl_high_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43920 | uint64_t __ret; |
| 43704 | float32x2_t __ret; | 43921 | __ret = (uint64_t) __builtin_neon_vcltd_s64(__p0, __p1); |
| 43705 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 43706 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 43707 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | | |
| 43708 | __ret = (float32x2_t) __builtin_neon_vfmlsl_high_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); | | |
| 43709 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 43710 | return __ret; | 43922 | return __ret; |
| 43711 | } | 43923 | } |
| 43712 | __ai float32x2_t __noswap_vfmlsl_high_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43924 | __ai uint64_t vcltd_f64(float64_t __p0, float64_t __p1) { |
| 43713 | float32x2_t __ret; | 43925 | uint64_t __ret; |
| 43714 | __ret = (float32x2_t) __builtin_neon_vfmlsl_high_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | 43926 | __ret = (uint64_t) __builtin_neon_vcltd_f64(__p0, __p1); |
| 43715 | return __ret; | 43927 | return __ret; |
| 43716 | } | 43928 | } |
| 43717 | #endif | 43929 | __ai uint32_t vclts_f32(float32_t __p0, float32_t __p1) { |
| 43718 | | 43930 | uint32_t __ret; |
| 43719 | #ifdef __LITTLE_ENDIAN__ | 43931 | __ret = (uint32_t) __builtin_neon_vclts_f32(__p0, __p1); |
| 43720 | __ai float32x4_t vfmlslq_low_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { | | |
| 43721 | float32x4_t __ret; | | |
| 43722 | __ret = (float32x4_t) __builtin_neon_vfmlslq_low_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | | |
| 43723 | return __ret; | 43932 | return __ret; |
| 43724 | } | 43933 | } |
| 43725 | #else | 43934 | #ifdef __LITTLE_ENDIAN__ |
| 43726 | __ai float32x4_t vfmlslq_low_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43935 | __ai uint8x16_t vcltzq_s8(int8x16_t __p0) { |
| 43727 | float32x4_t __ret; | 43936 | uint8x16_t __ret; |
| 43728 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 43937 | __ret = (uint8x16_t) __builtin_neon_vcltzq_v((int8x16_t)__p0, 48); |
| 43729 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 43730 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 43731 | __ret = (float32x4_t) __builtin_neon_vfmlslq_low_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); | | |
| 43732 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 43733 | return __ret; | 43938 | return __ret; |
| 43734 | } | 43939 | } |
| 43735 | __ai float32x4_t __noswap_vfmlslq_low_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { | 43940 | #else |
| 43736 | float32x4_t __ret; | 43941 | __ai uint8x16_t vcltzq_s8(int8x16_t __p0) { |
| 43737 | __ret = (float32x4_t) __builtin_neon_vfmlslq_low_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); | 43942 | uint8x16_t __ret; |
| | 43943 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 43944 | __ret = (uint8x16_t) __builtin_neon_vcltzq_v((int8x16_t)__rev0, 48); |
| | 43945 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43738 | return __ret; | 43946 | return __ret; |
| 43739 | } | 43947 | } |
| 43740 | #endif | 43948 | #endif |
| 43741 | | 43949 | |
| 43742 | #ifdef __LITTLE_ENDIAN__ | 43950 | #ifdef __LITTLE_ENDIAN__ |
| 43743 | __ai float32x2_t vfmlsl_low_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43951 | __ai uint64x2_t vcltzq_f64(float64x2_t __p0) { |
| 43744 | float32x2_t __ret; | 43952 | uint64x2_t __ret; |
| 43745 | __ret = (float32x2_t) __builtin_neon_vfmlsl_low_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | 43953 | __ret = (uint64x2_t) __builtin_neon_vcltzq_v((int8x16_t)__p0, 51); |
| 43746 | return __ret; | 43954 | return __ret; |
| 43747 | } | 43955 | } |
| 43748 | #else | 43956 | #else |
| 43749 | __ai float32x2_t vfmlsl_low_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { | 43957 | __ai uint64x2_t vcltzq_f64(float64x2_t __p0) { |
| 43750 | float32x2_t __ret; | 43958 | uint64x2_t __ret; |
| 43751 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 43959 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43752 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 43960 | __ret = (uint64x2_t) __builtin_neon_vcltzq_v((int8x16_t)__rev0, 51); |
| 43753 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | | |
| 43754 | __ret = (float32x2_t) __builtin_neon_vfmlsl_low_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); | | |
| 43755 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 43961 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43756 | return __ret; | 43962 | return __ret; |
| 43757 | } | 43963 | } |
| 43758 | __ai float32x2_t __noswap_vfmlsl_low_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { | | |
| 43759 | float32x2_t __ret; | | |
| 43760 | __ret = (float32x2_t) __builtin_neon_vfmlsl_low_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); | | |
| 43761 | return __ret; | | |
| 43762 | } | | |
| 43763 | #endif | 43964 | #endif |
| 43764 | | 43965 | |
| 43765 | #endif | | |
| 43766 | #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) | | |
| 43767 | #ifdef __LITTLE_ENDIAN__ | 43966 | #ifdef __LITTLE_ENDIAN__ |
| 43768 | __ai float16x8_t vabdq_f16(float16x8_t __p0, float16x8_t __p1) { | 43967 | __ai uint32x4_t vcltzq_f32(float32x4_t __p0) { |
| 43769 | float16x8_t __ret; | 43968 | uint32x4_t __ret; |
| 43770 | __ret = (float16x8_t) __builtin_neon_vabdq_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | 43969 | __ret = (uint32x4_t) __builtin_neon_vcltzq_v((int8x16_t)__p0, 50); |
| 43771 | return __ret; | 43970 | return __ret; |
| 43772 | } | 43971 | } |
| 43773 | #else | 43972 | #else |
| 43774 | __ai float16x8_t vabdq_f16(float16x8_t __p0, float16x8_t __p1) { | 43973 | __ai uint32x4_t vcltzq_f32(float32x4_t __p0) { |
| 43775 | float16x8_t __ret; | 43974 | uint32x4_t __ret; |
| 43776 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 43975 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 43777 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 43976 | __ret = (uint32x4_t) __builtin_neon_vcltzq_v((int8x16_t)__rev0, 50); |
| 43778 | __ret = (float16x8_t) __builtin_neon_vabdq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 43977 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 43779 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 43780 | return __ret; | 43978 | return __ret; |
| 43781 | } | 43979 | } |
| 43782 | #endif | 43980 | #endif |
| 43783 | | 43981 | |
| 43784 | #ifdef __LITTLE_ENDIAN__ | 43982 | #ifdef __LITTLE_ENDIAN__ |
| 43785 | __ai float16x4_t vabd_f16(float16x4_t __p0, float16x4_t __p1) { | 43983 | __ai uint32x4_t vcltzq_s32(int32x4_t __p0) { |
| 43786 | float16x4_t __ret; | 43984 | uint32x4_t __ret; |
| 43787 | __ret = (float16x4_t) __builtin_neon_vabd_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | 43985 | __ret = (uint32x4_t) __builtin_neon_vcltzq_v((int8x16_t)__p0, 50); |
| 43788 | return __ret; | 43986 | return __ret; |
| 43789 | } | 43987 | } |
| 43790 | #else | 43988 | #else |
| 43791 | __ai float16x4_t vabd_f16(float16x4_t __p0, float16x4_t __p1) { | 43989 | __ai uint32x4_t vcltzq_s32(int32x4_t __p0) { |
| 43792 | float16x4_t __ret; | 43990 | uint32x4_t __ret; |
| 43793 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 43991 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 43794 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 43992 | __ret = (uint32x4_t) __builtin_neon_vcltzq_v((int8x16_t)__rev0, 50); |
| 43795 | __ret = (float16x4_t) __builtin_neon_vabd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); | | |
| 43796 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 43993 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 43797 | return __ret; | 43994 | return __ret; |
| 43798 | } | 43995 | } |
| 43799 | #endif | 43996 | #endif |
| 43800 | | 43997 | |
| 43801 | #ifdef __LITTLE_ENDIAN__ | 43998 | #ifdef __LITTLE_ENDIAN__ |
| 43802 | __ai float16x8_t vabsq_f16(float16x8_t __p0) { | 43999 | __ai uint64x2_t vcltzq_s64(int64x2_t __p0) { |
| 43803 | float16x8_t __ret; | 44000 | uint64x2_t __ret; |
| 43804 | __ret = (float16x8_t) __builtin_neon_vabsq_v((int8x16_t)__p0, 40); | 44001 | __ret = (uint64x2_t) __builtin_neon_vcltzq_v((int8x16_t)__p0, 51); |
| 43805 | return __ret; | 44002 | return __ret; |
| 43806 | } | 44003 | } |
| 43807 | #else | 44004 | #else |
| 43808 | __ai float16x8_t vabsq_f16(float16x8_t __p0) { | 44005 | __ai uint64x2_t vcltzq_s64(int64x2_t __p0) { |
| 43809 | float16x8_t __ret; | 44006 | uint64x2_t __ret; |
| 43810 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44007 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43811 | __ret = (float16x8_t) __builtin_neon_vabsq_v((int8x16_t)__rev0, 40); | 44008 | __ret = (uint64x2_t) __builtin_neon_vcltzq_v((int8x16_t)__rev0, 51); |
| 43812 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44009 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43813 | return __ret; | 44010 | return __ret; |
| 43814 | } | 44011 | } |
| 43815 | #endif | 44012 | #endif |
| 43816 | | 44013 | |
| 43817 | #ifdef __LITTLE_ENDIAN__ | 44014 | #ifdef __LITTLE_ENDIAN__ |
| 43818 | __ai float16x4_t vabs_f16(float16x4_t __p0) { | 44015 | __ai uint16x8_t vcltzq_s16(int16x8_t __p0) { |
| 43819 | float16x4_t __ret; | 44016 | uint16x8_t __ret; |
| 43820 | __ret = (float16x4_t) __builtin_neon_vabs_v((int8x8_t)__p0, 8); | 44017 | __ret = (uint16x8_t) __builtin_neon_vcltzq_v((int8x16_t)__p0, 49); |
| 43821 | return __ret; | 44018 | return __ret; |
| 43822 | } | 44019 | } |
| 43823 | #else | 44020 | #else |
| 43824 | __ai float16x4_t vabs_f16(float16x4_t __p0) { | 44021 | __ai uint16x8_t vcltzq_s16(int16x8_t __p0) { |
| 43825 | float16x4_t __ret; | 44022 | uint16x8_t __ret; |
| 43826 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44023 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43827 | __ret = (float16x4_t) __builtin_neon_vabs_v((int8x8_t)__rev0, 8); | 44024 | __ret = (uint16x8_t) __builtin_neon_vcltzq_v((int8x16_t)__rev0, 49); |
| 43828 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44025 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43829 | return __ret; | 44026 | return __ret; |
| 43830 | } | 44027 | } |
| 43831 | #endif | 44028 | #endif |
| 43832 | | 44029 | |
| 43833 | #ifdef __LITTLE_ENDIAN__ | 44030 | #ifdef __LITTLE_ENDIAN__ |
| 43834 | __ai float16x8_t vaddq_f16(float16x8_t __p0, float16x8_t __p1) { | 44031 | __ai uint8x8_t vcltz_s8(int8x8_t __p0) { |
| 43835 | float16x8_t __ret; | 44032 | uint8x8_t __ret; |
| 43836 | __ret = __p0 + __p1; | 44033 | __ret = (uint8x8_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 16); |
| 43837 | return __ret; | 44034 | return __ret; |
| 43838 | } | 44035 | } |
| 43839 | #else | 44036 | #else |
| 43840 | __ai float16x8_t vaddq_f16(float16x8_t __p0, float16x8_t __p1) { | 44037 | __ai uint8x8_t vcltz_s8(int8x8_t __p0) { |
| 43841 | float16x8_t __ret; | 44038 | uint8x8_t __ret; |
| 43842 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44039 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43843 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 44040 | __ret = (uint8x8_t) __builtin_neon_vcltz_v((int8x8_t)__rev0, 16); |
| 43844 | __ret = __rev0 + __rev1; | | |
| 43845 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44041 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 43846 | return __ret; | 44042 | return __ret; |
| 43847 | } | 44043 | } |
| 43848 | #endif | 44044 | #endif |
| 43849 | | 44045 | |
| | 44046 | __ai uint64x1_t vcltz_f64(float64x1_t __p0) { |
| | 44047 | uint64x1_t __ret; |
| | 44048 | __ret = (uint64x1_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 19); |
| | 44049 | return __ret; |
| | 44050 | } |
| 43850 | #ifdef __LITTLE_ENDIAN__ | 44051 | #ifdef __LITTLE_ENDIAN__ |
| 43851 | __ai float16x4_t vadd_f16(float16x4_t __p0, float16x4_t __p1) { | 44052 | __ai uint32x2_t vcltz_f32(float32x2_t __p0) { |
| 43852 | float16x4_t __ret; | 44053 | uint32x2_t __ret; |
| 43853 | __ret = __p0 + __p1; | 44054 | __ret = (uint32x2_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 18); |
| 43854 | return __ret; | 44055 | return __ret; |
| 43855 | } | 44056 | } |
| 43856 | #else | 44057 | #else |
| 43857 | __ai float16x4_t vadd_f16(float16x4_t __p0, float16x4_t __p1) { | 44058 | __ai uint32x2_t vcltz_f32(float32x2_t __p0) { |
| 43858 | float16x4_t __ret; | 44059 | uint32x2_t __ret; |
| 43859 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44060 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43860 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 44061 | __ret = (uint32x2_t) __builtin_neon_vcltz_v((int8x8_t)__rev0, 18); |
| 43861 | __ret = __rev0 + __rev1; | 44062 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43862 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 43863 | return __ret; | 44063 | return __ret; |
| 43864 | } | 44064 | } |
| 43865 | #endif | 44065 | #endif |
| 43866 | | 44066 | |
| 43867 | #ifdef __LITTLE_ENDIAN__ | 44067 | #ifdef __LITTLE_ENDIAN__ |
| 43868 | __ai float16x8_t vbslq_f16(uint16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | 44068 | __ai uint32x2_t vcltz_s32(int32x2_t __p0) { |
| 43869 | float16x8_t __ret; | 44069 | uint32x2_t __ret; |
| 43870 | __ret = (float16x8_t) __builtin_neon_vbslq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); | 44070 | __ret = (uint32x2_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 18); |
| 43871 | return __ret; | 44071 | return __ret; |
| 43872 | } | 44072 | } |
| 43873 | #else | 44073 | #else |
| 43874 | __ai float16x8_t vbslq_f16(uint16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | 44074 | __ai uint32x2_t vcltz_s32(int32x2_t __p0) { |
| 43875 | float16x8_t __ret; | 44075 | uint32x2_t __ret; |
| 43876 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44076 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43877 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 44077 | __ret = (uint32x2_t) __builtin_neon_vcltz_v((int8x8_t)__rev0, 18); |
| 43878 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 44078 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43879 | __ret = (float16x8_t) __builtin_neon_vbslq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 40); | | |
| 43880 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 43881 | return __ret; | 44079 | return __ret; |
| 43882 | } | 44080 | } |
| 43883 | #endif | 44081 | #endif |
| 43884 | | 44082 | |
| | 44083 | __ai uint64x1_t vcltz_s64(int64x1_t __p0) { |
| | 44084 | uint64x1_t __ret; |
| | 44085 | __ret = (uint64x1_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 19); |
| | 44086 | return __ret; |
| | 44087 | } |
| 43885 | #ifdef __LITTLE_ENDIAN__ | 44088 | #ifdef __LITTLE_ENDIAN__ |
| 43886 | __ai float16x4_t vbsl_f16(uint16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 44089 | __ai uint16x4_t vcltz_s16(int16x4_t __p0) { |
| 43887 | float16x4_t __ret; | 44090 | uint16x4_t __ret; |
| 43888 | __ret = (float16x4_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); | 44091 | __ret = (uint16x4_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 17); |
| 43889 | return __ret; | 44092 | return __ret; |
| 43890 | } | 44093 | } |
| 43891 | #else | 44094 | #else |
| 43892 | __ai float16x4_t vbsl_f16(uint16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 44095 | __ai uint16x4_t vcltz_s16(int16x4_t __p0) { |
| 43893 | float16x4_t __ret; | 44096 | uint16x4_t __ret; |
| 43894 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44097 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 43895 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 44098 | __ret = (uint16x4_t) __builtin_neon_vcltz_v((int8x8_t)__rev0, 17); |
| 43896 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | | |
| 43897 | __ret = (float16x4_t) __builtin_neon_vbsl_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 8); | | |
| 43898 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44099 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 43899 | return __ret; | 44100 | return __ret; |
| 43900 | } | 44101 | } |
| 43901 | #endif | 44102 | #endif |
| 43902 | | 44103 | |
| | 44104 | __ai uint64_t vcltzd_s64(int64_t __p0) { |
| | 44105 | uint64_t __ret; |
| | 44106 | __ret = (uint64_t) __builtin_neon_vcltzd_s64(__p0); |
| | 44107 | return __ret; |
| | 44108 | } |
| | 44109 | __ai uint64_t vcltzd_f64(float64_t __p0) { |
| | 44110 | uint64_t __ret; |
| | 44111 | __ret = (uint64_t) __builtin_neon_vcltzd_f64(__p0); |
| | 44112 | return __ret; |
| | 44113 | } |
| | 44114 | __ai uint32_t vcltzs_f32(float32_t __p0) { |
| | 44115 | uint32_t __ret; |
| | 44116 | __ret = (uint32_t) __builtin_neon_vcltzs_f32(__p0); |
| | 44117 | return __ret; |
| | 44118 | } |
| 43903 | #ifdef __LITTLE_ENDIAN__ | 44119 | #ifdef __LITTLE_ENDIAN__ |
| 43904 | __ai uint16x8_t vcageq_f16(float16x8_t __p0, float16x8_t __p1) { | 44120 | __ai poly64x2_t vcombine_p64(poly64x1_t __p0, poly64x1_t __p1) { |
| 43905 | uint16x8_t __ret; | 44121 | poly64x2_t __ret; |
| 43906 | __ret = (uint16x8_t) __builtin_neon_vcageq_v((int8x16_t)__p0, (int8x16_t)__p1, 49); | 44122 | __ret = __builtin_shufflevector(__p0, __p1, 0, 1); |
| 43907 | return __ret; | 44123 | return __ret; |
| 43908 | } | 44124 | } |
| 43909 | #else | 44125 | #else |
| 43910 | __ai uint16x8_t vcageq_f16(float16x8_t __p0, float16x8_t __p1) { | 44126 | __ai poly64x2_t vcombine_p64(poly64x1_t __p0, poly64x1_t __p1) { |
| 43911 | uint16x8_t __ret; | 44127 | poly64x2_t __ret; |
| 43912 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44128 | __ret = __builtin_shufflevector(__p0, __p1, 0, 1); |
| 43913 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 44129 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43914 | __ret = (uint16x8_t) __builtin_neon_vcageq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 49); | | |
| 43915 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 43916 | return __ret; | 44130 | return __ret; |
| 43917 | } | 44131 | } |
| 43918 | #endif | 44132 | #endif |
| 43919 | | 44133 | |
| 43920 | #ifdef __LITTLE_ENDIAN__ | 44134 | #ifdef __LITTLE_ENDIAN__ |
| 43921 | __ai uint16x4_t vcage_f16(float16x4_t __p0, float16x4_t __p1) { | 44135 | __ai float64x2_t vcombine_f64(float64x1_t __p0, float64x1_t __p1) { |
| 43922 | uint16x4_t __ret; | 44136 | float64x2_t __ret; |
| 43923 | __ret = (uint16x4_t) __builtin_neon_vcage_v((int8x8_t)__p0, (int8x8_t)__p1, 17); | 44137 | __ret = __builtin_shufflevector(__p0, __p1, 0, 1); |
| 43924 | return __ret; | 44138 | return __ret; |
| 43925 | } | 44139 | } |
| 43926 | #else | 44140 | #else |
| 43927 | __ai uint16x4_t vcage_f16(float16x4_t __p0, float16x4_t __p1) { | 44141 | __ai float64x2_t vcombine_f64(float64x1_t __p0, float64x1_t __p1) { |
| 43928 | uint16x4_t __ret; | 44142 | float64x2_t __ret; |
| 43929 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44143 | __ret = __builtin_shufflevector(__p0, __p1, 0, 1); |
| 43930 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 44144 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43931 | __ret = (uint16x4_t) __builtin_neon_vcage_v((int8x8_t)__rev0, (int8x8_t)__rev1, 17); | 44145 | return __ret; |
| 43932 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44146 | } |
| 43933 | return __ret; | 44147 | #endif |
| 43934 | } | 44148 | |
| | 44149 | #ifdef __LITTLE_ENDIAN__ |
| | 44150 | #define vcopyq_lane_p8(__p0_257, __p1_257, __p2_257, __p3_257) __extension__ ({ \ |
| | 44151 | poly8x16_t __ret_257; \ |
| | 44152 | poly8x16_t __s0_257 = __p0_257; \ |
| | 44153 | poly8x8_t __s2_257 = __p2_257; \ |
| | 44154 | __ret_257 = vsetq_lane_p8(vget_lane_p8(__s2_257, __p3_257), __s0_257, __p1_257); \ |
| | 44155 | __ret_257; \ |
| | 44156 | }) |
| | 44157 | #else |
| | 44158 | #define vcopyq_lane_p8(__p0_258, __p1_258, __p2_258, __p3_258) __extension__ ({ \ |
| | 44159 | poly8x16_t __ret_258; \ |
| | 44160 | poly8x16_t __s0_258 = __p0_258; \ |
| | 44161 | poly8x8_t __s2_258 = __p2_258; \ |
| | 44162 | poly8x16_t __rev0_258; __rev0_258 = __builtin_shufflevector(__s0_258, __s0_258, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44163 | poly8x8_t __rev2_258; __rev2_258 = __builtin_shufflevector(__s2_258, __s2_258, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44164 | __ret_258 = __noswap_vsetq_lane_p8(__noswap_vget_lane_p8(__rev2_258, __p3_258), __rev0_258, __p1_258); \ |
| | 44165 | __ret_258 = __builtin_shufflevector(__ret_258, __ret_258, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44166 | __ret_258; \ |
| | 44167 | }) |
| | 44168 | #endif |
| | 44169 | |
| | 44170 | #ifdef __LITTLE_ENDIAN__ |
| | 44171 | #define vcopyq_lane_p16(__p0_259, __p1_259, __p2_259, __p3_259) __extension__ ({ \ |
| | 44172 | poly16x8_t __ret_259; \ |
| | 44173 | poly16x8_t __s0_259 = __p0_259; \ |
| | 44174 | poly16x4_t __s2_259 = __p2_259; \ |
| | 44175 | __ret_259 = vsetq_lane_p16(vget_lane_p16(__s2_259, __p3_259), __s0_259, __p1_259); \ |
| | 44176 | __ret_259; \ |
| | 44177 | }) |
| | 44178 | #else |
| | 44179 | #define vcopyq_lane_p16(__p0_260, __p1_260, __p2_260, __p3_260) __extension__ ({ \ |
| | 44180 | poly16x8_t __ret_260; \ |
| | 44181 | poly16x8_t __s0_260 = __p0_260; \ |
| | 44182 | poly16x4_t __s2_260 = __p2_260; \ |
| | 44183 | poly16x8_t __rev0_260; __rev0_260 = __builtin_shufflevector(__s0_260, __s0_260, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44184 | poly16x4_t __rev2_260; __rev2_260 = __builtin_shufflevector(__s2_260, __s2_260, 3, 2, 1, 0); \ |
| | 44185 | __ret_260 = __noswap_vsetq_lane_p16(__noswap_vget_lane_p16(__rev2_260, __p3_260), __rev0_260, __p1_260); \ |
| | 44186 | __ret_260 = __builtin_shufflevector(__ret_260, __ret_260, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44187 | __ret_260; \ |
| | 44188 | }) |
| | 44189 | #endif |
| | 44190 | |
| | 44191 | #ifdef __LITTLE_ENDIAN__ |
| | 44192 | #define vcopyq_lane_u8(__p0_261, __p1_261, __p2_261, __p3_261) __extension__ ({ \ |
| | 44193 | uint8x16_t __ret_261; \ |
| | 44194 | uint8x16_t __s0_261 = __p0_261; \ |
| | 44195 | uint8x8_t __s2_261 = __p2_261; \ |
| | 44196 | __ret_261 = vsetq_lane_u8(vget_lane_u8(__s2_261, __p3_261), __s0_261, __p1_261); \ |
| | 44197 | __ret_261; \ |
| | 44198 | }) |
| | 44199 | #else |
| | 44200 | #define vcopyq_lane_u8(__p0_262, __p1_262, __p2_262, __p3_262) __extension__ ({ \ |
| | 44201 | uint8x16_t __ret_262; \ |
| | 44202 | uint8x16_t __s0_262 = __p0_262; \ |
| | 44203 | uint8x8_t __s2_262 = __p2_262; \ |
| | 44204 | uint8x16_t __rev0_262; __rev0_262 = __builtin_shufflevector(__s0_262, __s0_262, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44205 | uint8x8_t __rev2_262; __rev2_262 = __builtin_shufflevector(__s2_262, __s2_262, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44206 | __ret_262 = __noswap_vsetq_lane_u8(__noswap_vget_lane_u8(__rev2_262, __p3_262), __rev0_262, __p1_262); \ |
| | 44207 | __ret_262 = __builtin_shufflevector(__ret_262, __ret_262, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44208 | __ret_262; \ |
| | 44209 | }) |
| | 44210 | #endif |
| | 44211 | |
| | 44212 | #ifdef __LITTLE_ENDIAN__ |
| | 44213 | #define vcopyq_lane_u32(__p0_263, __p1_263, __p2_263, __p3_263) __extension__ ({ \ |
| | 44214 | uint32x4_t __ret_263; \ |
| | 44215 | uint32x4_t __s0_263 = __p0_263; \ |
| | 44216 | uint32x2_t __s2_263 = __p2_263; \ |
| | 44217 | __ret_263 = vsetq_lane_u32(vget_lane_u32(__s2_263, __p3_263), __s0_263, __p1_263); \ |
| | 44218 | __ret_263; \ |
| | 44219 | }) |
| | 44220 | #else |
| | 44221 | #define vcopyq_lane_u32(__p0_264, __p1_264, __p2_264, __p3_264) __extension__ ({ \ |
| | 44222 | uint32x4_t __ret_264; \ |
| | 44223 | uint32x4_t __s0_264 = __p0_264; \ |
| | 44224 | uint32x2_t __s2_264 = __p2_264; \ |
| | 44225 | uint32x4_t __rev0_264; __rev0_264 = __builtin_shufflevector(__s0_264, __s0_264, 3, 2, 1, 0); \ |
| | 44226 | uint32x2_t __rev2_264; __rev2_264 = __builtin_shufflevector(__s2_264, __s2_264, 1, 0); \ |
| | 44227 | __ret_264 = __noswap_vsetq_lane_u32(__noswap_vget_lane_u32(__rev2_264, __p3_264), __rev0_264, __p1_264); \ |
| | 44228 | __ret_264 = __builtin_shufflevector(__ret_264, __ret_264, 3, 2, 1, 0); \ |
| | 44229 | __ret_264; \ |
| | 44230 | }) |
| | 44231 | #endif |
| | 44232 | |
| | 44233 | #ifdef __LITTLE_ENDIAN__ |
| | 44234 | #define vcopyq_lane_u64(__p0_265, __p1_265, __p2_265, __p3_265) __extension__ ({ \ |
| | 44235 | uint64x2_t __ret_265; \ |
| | 44236 | uint64x2_t __s0_265 = __p0_265; \ |
| | 44237 | uint64x1_t __s2_265 = __p2_265; \ |
| | 44238 | __ret_265 = vsetq_lane_u64(vget_lane_u64(__s2_265, __p3_265), __s0_265, __p1_265); \ |
| | 44239 | __ret_265; \ |
| | 44240 | }) |
| | 44241 | #else |
| | 44242 | #define vcopyq_lane_u64(__p0_266, __p1_266, __p2_266, __p3_266) __extension__ ({ \ |
| | 44243 | uint64x2_t __ret_266; \ |
| | 44244 | uint64x2_t __s0_266 = __p0_266; \ |
| | 44245 | uint64x1_t __s2_266 = __p2_266; \ |
| | 44246 | uint64x2_t __rev0_266; __rev0_266 = __builtin_shufflevector(__s0_266, __s0_266, 1, 0); \ |
| | 44247 | __ret_266 = __noswap_vsetq_lane_u64(vget_lane_u64(__s2_266, __p3_266), __rev0_266, __p1_266); \ |
| | 44248 | __ret_266 = __builtin_shufflevector(__ret_266, __ret_266, 1, 0); \ |
| | 44249 | __ret_266; \ |
| | 44250 | }) |
| 43935 | #endif | 44251 | #endif |
| 43936 | | 44252 | |
| 43937 | #ifdef __LITTLE_ENDIAN__ | 44253 | #ifdef __LITTLE_ENDIAN__ |
| 43938 | __ai uint16x8_t vcagtq_f16(float16x8_t __p0, float16x8_t __p1) { | 44254 | #define vcopyq_lane_u16(__p0_267, __p1_267, __p2_267, __p3_267) __extension__ ({ \ |
| 43939 | uint16x8_t __ret; | 44255 | uint16x8_t __ret_267; \ |
| 43940 | __ret = (uint16x8_t) __builtin_neon_vcagtq_v((int8x16_t)__p0, (int8x16_t)__p1, 49); | 44256 | uint16x8_t __s0_267 = __p0_267; \ |
| 43941 | return __ret; | 44257 | uint16x4_t __s2_267 = __p2_267; \ |
| 43942 | } | 44258 | __ret_267 = vsetq_lane_u16(vget_lane_u16(__s2_267, __p3_267), __s0_267, __p1_267); \ |
| | 44259 | __ret_267; \ |
| | 44260 | }) |
| 43943 | #else | 44261 | #else |
| 43944 | __ai uint16x8_t vcagtq_f16(float16x8_t __p0, float16x8_t __p1) { | 44262 | #define vcopyq_lane_u16(__p0_268, __p1_268, __p2_268, __p3_268) __extension__ ({ \ |
| 43945 | uint16x8_t __ret; | 44263 | uint16x8_t __ret_268; \ |
| 43946 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44264 | uint16x8_t __s0_268 = __p0_268; \ |
| 43947 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 44265 | uint16x4_t __s2_268 = __p2_268; \ |
| 43948 | __ret = (uint16x8_t) __builtin_neon_vcagtq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 49); | 44266 | uint16x8_t __rev0_268; __rev0_268 = __builtin_shufflevector(__s0_268, __s0_268, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 43949 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44267 | uint16x4_t __rev2_268; __rev2_268 = __builtin_shufflevector(__s2_268, __s2_268, 3, 2, 1, 0); \ |
| 43950 | return __ret; | 44268 | __ret_268 = __noswap_vsetq_lane_u16(__noswap_vget_lane_u16(__rev2_268, __p3_268), __rev0_268, __p1_268); \ |
| 43951 | } | 44269 | __ret_268 = __builtin_shufflevector(__ret_268, __ret_268, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44270 | __ret_268; \ |
| | 44271 | }) |
| 43952 | #endif | 44272 | #endif |
| 43953 | | 44273 | |
| 43954 | #ifdef __LITTLE_ENDIAN__ | 44274 | #ifdef __LITTLE_ENDIAN__ |
| 43955 | __ai uint16x4_t vcagt_f16(float16x4_t __p0, float16x4_t __p1) { | 44275 | #define vcopyq_lane_s8(__p0_269, __p1_269, __p2_269, __p3_269) __extension__ ({ \ |
| 43956 | uint16x4_t __ret; | 44276 | int8x16_t __ret_269; \ |
| 43957 | __ret = (uint16x4_t) __builtin_neon_vcagt_v((int8x8_t)__p0, (int8x8_t)__p1, 17); | 44277 | int8x16_t __s0_269 = __p0_269; \ |
| 43958 | return __ret; | 44278 | int8x8_t __s2_269 = __p2_269; \ |
| 43959 | } | 44279 | __ret_269 = vsetq_lane_s8(vget_lane_s8(__s2_269, __p3_269), __s0_269, __p1_269); \ |
| | 44280 | __ret_269; \ |
| | 44281 | }) |
| 43960 | #else | 44282 | #else |
| 43961 | __ai uint16x4_t vcagt_f16(float16x4_t __p0, float16x4_t __p1) { | 44283 | #define vcopyq_lane_s8(__p0_270, __p1_270, __p2_270, __p3_270) __extension__ ({ \ |
| 43962 | uint16x4_t __ret; | 44284 | int8x16_t __ret_270; \ |
| 43963 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44285 | int8x16_t __s0_270 = __p0_270; \ |
| 43964 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 44286 | int8x8_t __s2_270 = __p2_270; \ |
| 43965 | __ret = (uint16x4_t) __builtin_neon_vcagt_v((int8x8_t)__rev0, (int8x8_t)__rev1, 17); | 44287 | int8x16_t __rev0_270; __rev0_270 = __builtin_shufflevector(__s0_270, __s0_270, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 43966 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44288 | int8x8_t __rev2_270; __rev2_270 = __builtin_shufflevector(__s2_270, __s2_270, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 43967 | return __ret; | 44289 | __ret_270 = __noswap_vsetq_lane_s8(__noswap_vget_lane_s8(__rev2_270, __p3_270), __rev0_270, __p1_270); \ |
| 43968 | } | 44290 | __ret_270 = __builtin_shufflevector(__ret_270, __ret_270, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44291 | __ret_270; \ |
| | 44292 | }) |
| 43969 | #endif | 44293 | #endif |
| 43970 | | 44294 | |
| 43971 | #ifdef __LITTLE_ENDIAN__ | 44295 | #ifdef __LITTLE_ENDIAN__ |
| 43972 | __ai uint16x8_t vcaleq_f16(float16x8_t __p0, float16x8_t __p1) { | 44296 | #define vcopyq_lane_f32(__p0_271, __p1_271, __p2_271, __p3_271) __extension__ ({ \ |
| 43973 | uint16x8_t __ret; | 44297 | float32x4_t __ret_271; \ |
| 43974 | __ret = (uint16x8_t) __builtin_neon_vcaleq_v((int8x16_t)__p0, (int8x16_t)__p1, 49); | 44298 | float32x4_t __s0_271 = __p0_271; \ |
| 43975 | return __ret; | 44299 | float32x2_t __s2_271 = __p2_271; \ |
| 43976 | } | 44300 | __ret_271 = vsetq_lane_f32(vget_lane_f32(__s2_271, __p3_271), __s0_271, __p1_271); \ |
| | 44301 | __ret_271; \ |
| | 44302 | }) |
| 43977 | #else | 44303 | #else |
| 43978 | __ai uint16x8_t vcaleq_f16(float16x8_t __p0, float16x8_t __p1) { | 44304 | #define vcopyq_lane_f32(__p0_272, __p1_272, __p2_272, __p3_272) __extension__ ({ \ |
| 43979 | uint16x8_t __ret; | 44305 | float32x4_t __ret_272; \ |
| 43980 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44306 | float32x4_t __s0_272 = __p0_272; \ |
| 43981 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 44307 | float32x2_t __s2_272 = __p2_272; \ |
| 43982 | __ret = (uint16x8_t) __builtin_neon_vcaleq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 49); | 44308 | float32x4_t __rev0_272; __rev0_272 = __builtin_shufflevector(__s0_272, __s0_272, 3, 2, 1, 0); \ |
| 43983 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44309 | float32x2_t __rev2_272; __rev2_272 = __builtin_shufflevector(__s2_272, __s2_272, 1, 0); \ |
| 43984 | return __ret; | 44310 | __ret_272 = __noswap_vsetq_lane_f32(__noswap_vget_lane_f32(__rev2_272, __p3_272), __rev0_272, __p1_272); \ |
| 43985 | } | 44311 | __ret_272 = __builtin_shufflevector(__ret_272, __ret_272, 3, 2, 1, 0); \ |
| | 44312 | __ret_272; \ |
| | 44313 | }) |
| 43986 | #endif | 44314 | #endif |
| 43987 | | 44315 | |
| 43988 | #ifdef __LITTLE_ENDIAN__ | 44316 | #ifdef __LITTLE_ENDIAN__ |
| 43989 | __ai uint16x4_t vcale_f16(float16x4_t __p0, float16x4_t __p1) { | 44317 | #define vcopyq_lane_s32(__p0_273, __p1_273, __p2_273, __p3_273) __extension__ ({ \ |
| 43990 | uint16x4_t __ret; | 44318 | int32x4_t __ret_273; \ |
| 43991 | __ret = (uint16x4_t) __builtin_neon_vcale_v((int8x8_t)__p0, (int8x8_t)__p1, 17); | 44319 | int32x4_t __s0_273 = __p0_273; \ |
| 43992 | return __ret; | 44320 | int32x2_t __s2_273 = __p2_273; \ |
| 43993 | } | 44321 | __ret_273 = vsetq_lane_s32(vget_lane_s32(__s2_273, __p3_273), __s0_273, __p1_273); \ |
| | 44322 | __ret_273; \ |
| | 44323 | }) |
| 43994 | #else | 44324 | #else |
| 43995 | __ai uint16x4_t vcale_f16(float16x4_t __p0, float16x4_t __p1) { | 44325 | #define vcopyq_lane_s32(__p0_274, __p1_274, __p2_274, __p3_274) __extension__ ({ \ |
| 43996 | uint16x4_t __ret; | 44326 | int32x4_t __ret_274; \ |
| 43997 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44327 | int32x4_t __s0_274 = __p0_274; \ |
| 43998 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 44328 | int32x2_t __s2_274 = __p2_274; \ |
| 43999 | __ret = (uint16x4_t) __builtin_neon_vcale_v((int8x8_t)__rev0, (int8x8_t)__rev1, 17); | 44329 | int32x4_t __rev0_274; __rev0_274 = __builtin_shufflevector(__s0_274, __s0_274, 3, 2, 1, 0); \ |
| 44000 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44330 | int32x2_t __rev2_274; __rev2_274 = __builtin_shufflevector(__s2_274, __s2_274, 1, 0); \ |
| 44001 | return __ret; | 44331 | __ret_274 = __noswap_vsetq_lane_s32(__noswap_vget_lane_s32(__rev2_274, __p3_274), __rev0_274, __p1_274); \ |
| 44002 | } | 44332 | __ret_274 = __builtin_shufflevector(__ret_274, __ret_274, 3, 2, 1, 0); \ |
| | 44333 | __ret_274; \ |
| | 44334 | }) |
| 44003 | #endif | 44335 | #endif |
| 44004 | | 44336 | |
| 44005 | #ifdef __LITTLE_ENDIAN__ | 44337 | #ifdef __LITTLE_ENDIAN__ |
| 44006 | __ai uint16x8_t vcaltq_f16(float16x8_t __p0, float16x8_t __p1) { | 44338 | #define vcopyq_lane_s64(__p0_275, __p1_275, __p2_275, __p3_275) __extension__ ({ \ |
| 44007 | uint16x8_t __ret; | 44339 | int64x2_t __ret_275; \ |
| 44008 | __ret = (uint16x8_t) __builtin_neon_vcaltq_v((int8x16_t)__p0, (int8x16_t)__p1, 49); | 44340 | int64x2_t __s0_275 = __p0_275; \ |
| 44009 | return __ret; | 44341 | int64x1_t __s2_275 = __p2_275; \ |
| 44010 | } | 44342 | __ret_275 = vsetq_lane_s64(vget_lane_s64(__s2_275, __p3_275), __s0_275, __p1_275); \ |
| | 44343 | __ret_275; \ |
| | 44344 | }) |
| 44011 | #else | 44345 | #else |
| 44012 | __ai uint16x8_t vcaltq_f16(float16x8_t __p0, float16x8_t __p1) { | 44346 | #define vcopyq_lane_s64(__p0_276, __p1_276, __p2_276, __p3_276) __extension__ ({ \ |
| 44013 | uint16x8_t __ret; | 44347 | int64x2_t __ret_276; \ |
| 44014 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44348 | int64x2_t __s0_276 = __p0_276; \ |
| 44015 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 44349 | int64x1_t __s2_276 = __p2_276; \ |
| 44016 | __ret = (uint16x8_t) __builtin_neon_vcaltq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 49); | 44350 | int64x2_t __rev0_276; __rev0_276 = __builtin_shufflevector(__s0_276, __s0_276, 1, 0); \ |
| 44017 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44351 | __ret_276 = __noswap_vsetq_lane_s64(vget_lane_s64(__s2_276, __p3_276), __rev0_276, __p1_276); \ |
| 44018 | return __ret; | 44352 | __ret_276 = __builtin_shufflevector(__ret_276, __ret_276, 1, 0); \ |
| 44019 | } | 44353 | __ret_276; \ |
| | 44354 | }) |
| 44020 | #endif | 44355 | #endif |
| 44021 | | 44356 | |
| 44022 | #ifdef __LITTLE_ENDIAN__ | 44357 | #ifdef __LITTLE_ENDIAN__ |
| 44023 | __ai uint16x4_t vcalt_f16(float16x4_t __p0, float16x4_t __p1) { | 44358 | #define vcopyq_lane_s16(__p0_277, __p1_277, __p2_277, __p3_277) __extension__ ({ \ |
| 44024 | uint16x4_t __ret; | 44359 | int16x8_t __ret_277; \ |
| 44025 | __ret = (uint16x4_t) __builtin_neon_vcalt_v((int8x8_t)__p0, (int8x8_t)__p1, 17); | 44360 | int16x8_t __s0_277 = __p0_277; \ |
| 44026 | return __ret; | 44361 | int16x4_t __s2_277 = __p2_277; \ |
| 44027 | } | 44362 | __ret_277 = vsetq_lane_s16(vget_lane_s16(__s2_277, __p3_277), __s0_277, __p1_277); \ |
| | 44363 | __ret_277; \ |
| | 44364 | }) |
| 44028 | #else | 44365 | #else |
| 44029 | __ai uint16x4_t vcalt_f16(float16x4_t __p0, float16x4_t __p1) { | 44366 | #define vcopyq_lane_s16(__p0_278, __p1_278, __p2_278, __p3_278) __extension__ ({ \ |
| 44030 | uint16x4_t __ret; | 44367 | int16x8_t __ret_278; \ |
| 44031 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44368 | int16x8_t __s0_278 = __p0_278; \ |
| 44032 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 44369 | int16x4_t __s2_278 = __p2_278; \ |
| 44033 | __ret = (uint16x4_t) __builtin_neon_vcalt_v((int8x8_t)__rev0, (int8x8_t)__rev1, 17); | 44370 | int16x8_t __rev0_278; __rev0_278 = __builtin_shufflevector(__s0_278, __s0_278, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44034 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44371 | int16x4_t __rev2_278; __rev2_278 = __builtin_shufflevector(__s2_278, __s2_278, 3, 2, 1, 0); \ |
| 44035 | return __ret; | 44372 | __ret_278 = __noswap_vsetq_lane_s16(__noswap_vget_lane_s16(__rev2_278, __p3_278), __rev0_278, __p1_278); \ |
| 44036 | } | 44373 | __ret_278 = __builtin_shufflevector(__ret_278, __ret_278, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44374 | __ret_278; \ |
| | 44375 | }) |
| 44037 | #endif | 44376 | #endif |
| 44038 | | 44377 | |
| 44039 | #ifdef __LITTLE_ENDIAN__ | 44378 | #ifdef __LITTLE_ENDIAN__ |
| 44040 | __ai uint16x8_t vceqq_f16(float16x8_t __p0, float16x8_t __p1) { | 44379 | #define vcopy_lane_p8(__p0_279, __p1_279, __p2_279, __p3_279) __extension__ ({ \ |
| 44041 | uint16x8_t __ret; | 44380 | poly8x8_t __ret_279; \ |
| 44042 | __ret = (uint16x8_t)(__p0 == __p1); | 44381 | poly8x8_t __s0_279 = __p0_279; \ |
| 44043 | return __ret; | 44382 | poly8x8_t __s2_279 = __p2_279; \ |
| 44044 | } | 44383 | __ret_279 = vset_lane_p8(vget_lane_p8(__s2_279, __p3_279), __s0_279, __p1_279); \ |
| | 44384 | __ret_279; \ |
| | 44385 | }) |
| 44045 | #else | 44386 | #else |
| 44046 | __ai uint16x8_t vceqq_f16(float16x8_t __p0, float16x8_t __p1) { | 44387 | #define vcopy_lane_p8(__p0_280, __p1_280, __p2_280, __p3_280) __extension__ ({ \ |
| 44047 | uint16x8_t __ret; | 44388 | poly8x8_t __ret_280; \ |
| 44048 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44389 | poly8x8_t __s0_280 = __p0_280; \ |
| 44049 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 44390 | poly8x8_t __s2_280 = __p2_280; \ |
| 44050 | __ret = (uint16x8_t)(__rev0 == __rev1); | 44391 | poly8x8_t __rev0_280; __rev0_280 = __builtin_shufflevector(__s0_280, __s0_280, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44051 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44392 | poly8x8_t __rev2_280; __rev2_280 = __builtin_shufflevector(__s2_280, __s2_280, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44052 | return __ret; | 44393 | __ret_280 = __noswap_vset_lane_p8(__noswap_vget_lane_p8(__rev2_280, __p3_280), __rev0_280, __p1_280); \ |
| 44053 | } | 44394 | __ret_280 = __builtin_shufflevector(__ret_280, __ret_280, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44395 | __ret_280; \ |
| | 44396 | }) |
| 44054 | #endif | 44397 | #endif |
| 44055 | | 44398 | |
| 44056 | #ifdef __LITTLE_ENDIAN__ | 44399 | #ifdef __LITTLE_ENDIAN__ |
| 44057 | __ai uint16x4_t vceq_f16(float16x4_t __p0, float16x4_t __p1) { | 44400 | #define vcopy_lane_p16(__p0_281, __p1_281, __p2_281, __p3_281) __extension__ ({ \ |
| 44058 | uint16x4_t __ret; | 44401 | poly16x4_t __ret_281; \ |
| 44059 | __ret = (uint16x4_t)(__p0 == __p1); | 44402 | poly16x4_t __s0_281 = __p0_281; \ |
| 44060 | return __ret; | 44403 | poly16x4_t __s2_281 = __p2_281; \ |
| 44061 | } | 44404 | __ret_281 = vset_lane_p16(vget_lane_p16(__s2_281, __p3_281), __s0_281, __p1_281); \ |
| | 44405 | __ret_281; \ |
| | 44406 | }) |
| 44062 | #else | 44407 | #else |
| 44063 | __ai uint16x4_t vceq_f16(float16x4_t __p0, float16x4_t __p1) { | 44408 | #define vcopy_lane_p16(__p0_282, __p1_282, __p2_282, __p3_282) __extension__ ({ \ |
| 44064 | uint16x4_t __ret; | 44409 | poly16x4_t __ret_282; \ |
| 44065 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44410 | poly16x4_t __s0_282 = __p0_282; \ |
| 44066 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 44411 | poly16x4_t __s2_282 = __p2_282; \ |
| 44067 | __ret = (uint16x4_t)(__rev0 == __rev1); | 44412 | poly16x4_t __rev0_282; __rev0_282 = __builtin_shufflevector(__s0_282, __s0_282, 3, 2, 1, 0); \ |
| 44068 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44413 | poly16x4_t __rev2_282; __rev2_282 = __builtin_shufflevector(__s2_282, __s2_282, 3, 2, 1, 0); \ |
| 44069 | return __ret; | 44414 | __ret_282 = __noswap_vset_lane_p16(__noswap_vget_lane_p16(__rev2_282, __p3_282), __rev0_282, __p1_282); \ |
| 44070 | } | 44415 | __ret_282 = __builtin_shufflevector(__ret_282, __ret_282, 3, 2, 1, 0); \ |
| | 44416 | __ret_282; \ |
| | 44417 | }) |
| 44071 | #endif | 44418 | #endif |
| 44072 | | 44419 | |
| 44073 | #ifdef __LITTLE_ENDIAN__ | 44420 | #ifdef __LITTLE_ENDIAN__ |
| 44074 | __ai uint16x8_t vceqzq_f16(float16x8_t __p0) { | 44421 | #define vcopy_lane_u8(__p0_283, __p1_283, __p2_283, __p3_283) __extension__ ({ \ |
| 44075 | uint16x8_t __ret; | 44422 | uint8x8_t __ret_283; \ |
| 44076 | __ret = (uint16x8_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 49); | 44423 | uint8x8_t __s0_283 = __p0_283; \ |
| 44077 | return __ret; | 44424 | uint8x8_t __s2_283 = __p2_283; \ |
| 44078 | } | 44425 | __ret_283 = vset_lane_u8(vget_lane_u8(__s2_283, __p3_283), __s0_283, __p1_283); \ |
| | 44426 | __ret_283; \ |
| | 44427 | }) |
| 44079 | #else | 44428 | #else |
| 44080 | __ai uint16x8_t vceqzq_f16(float16x8_t __p0) { | 44429 | #define vcopy_lane_u8(__p0_284, __p1_284, __p2_284, __p3_284) __extension__ ({ \ |
| 44081 | uint16x8_t __ret; | 44430 | uint8x8_t __ret_284; \ |
| 44082 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44431 | uint8x8_t __s0_284 = __p0_284; \ |
| 44083 | __ret = (uint16x8_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 49); | 44432 | uint8x8_t __s2_284 = __p2_284; \ |
| 44084 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44433 | uint8x8_t __rev0_284; __rev0_284 = __builtin_shufflevector(__s0_284, __s0_284, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44085 | return __ret; | 44434 | uint8x8_t __rev2_284; __rev2_284 = __builtin_shufflevector(__s2_284, __s2_284, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44086 | } | 44435 | __ret_284 = __noswap_vset_lane_u8(__noswap_vget_lane_u8(__rev2_284, __p3_284), __rev0_284, __p1_284); \ |
| | 44436 | __ret_284 = __builtin_shufflevector(__ret_284, __ret_284, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44437 | __ret_284; \ |
| | 44438 | }) |
| 44087 | #endif | 44439 | #endif |
| 44088 | | 44440 | |
| 44089 | #ifdef __LITTLE_ENDIAN__ | 44441 | #ifdef __LITTLE_ENDIAN__ |
| 44090 | __ai uint16x4_t vceqz_f16(float16x4_t __p0) { | 44442 | #define vcopy_lane_u32(__p0_285, __p1_285, __p2_285, __p3_285) __extension__ ({ \ |
| 44091 | uint16x4_t __ret; | 44443 | uint32x2_t __ret_285; \ |
| 44092 | __ret = (uint16x4_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 17); | 44444 | uint32x2_t __s0_285 = __p0_285; \ |
| 44093 | return __ret; | 44445 | uint32x2_t __s2_285 = __p2_285; \ |
| 44094 | } | 44446 | __ret_285 = vset_lane_u32(vget_lane_u32(__s2_285, __p3_285), __s0_285, __p1_285); \ |
| | 44447 | __ret_285; \ |
| | 44448 | }) |
| 44095 | #else | 44449 | #else |
| 44096 | __ai uint16x4_t vceqz_f16(float16x4_t __p0) { | 44450 | #define vcopy_lane_u32(__p0_286, __p1_286, __p2_286, __p3_286) __extension__ ({ \ |
| 44097 | uint16x4_t __ret; | 44451 | uint32x2_t __ret_286; \ |
| 44098 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44452 | uint32x2_t __s0_286 = __p0_286; \ |
| 44099 | __ret = (uint16x4_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 17); | 44453 | uint32x2_t __s2_286 = __p2_286; \ |
| 44100 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44454 | uint32x2_t __rev0_286; __rev0_286 = __builtin_shufflevector(__s0_286, __s0_286, 1, 0); \ |
| 44101 | return __ret; | 44455 | uint32x2_t __rev2_286; __rev2_286 = __builtin_shufflevector(__s2_286, __s2_286, 1, 0); \ |
| 44102 | } | 44456 | __ret_286 = __noswap_vset_lane_u32(__noswap_vget_lane_u32(__rev2_286, __p3_286), __rev0_286, __p1_286); \ |
| | 44457 | __ret_286 = __builtin_shufflevector(__ret_286, __ret_286, 1, 0); \ |
| | 44458 | __ret_286; \ |
| | 44459 | }) |
| 44103 | #endif | 44460 | #endif |
| 44104 | | 44461 | |
| | 44462 | #define vcopy_lane_u64(__p0_287, __p1_287, __p2_287, __p3_287) __extension__ ({ \ |
| | 44463 | uint64x1_t __ret_287; \ |
| | 44464 | uint64x1_t __s0_287 = __p0_287; \ |
| | 44465 | uint64x1_t __s2_287 = __p2_287; \ |
| | 44466 | __ret_287 = vset_lane_u64(vget_lane_u64(__s2_287, __p3_287), __s0_287, __p1_287); \ |
| | 44467 | __ret_287; \ |
| | 44468 | }) |
| 44105 | #ifdef __LITTLE_ENDIAN__ | 44469 | #ifdef __LITTLE_ENDIAN__ |
| 44106 | __ai uint16x8_t vcgeq_f16(float16x8_t __p0, float16x8_t __p1) { | 44470 | #define vcopy_lane_u16(__p0_288, __p1_288, __p2_288, __p3_288) __extension__ ({ \ |
| 44107 | uint16x8_t __ret; | 44471 | uint16x4_t __ret_288; \ |
| 44108 | __ret = (uint16x8_t)(__p0 >= __p1); | 44472 | uint16x4_t __s0_288 = __p0_288; \ |
| 44109 | return __ret; | 44473 | uint16x4_t __s2_288 = __p2_288; \ |
| 44110 | } | 44474 | __ret_288 = vset_lane_u16(vget_lane_u16(__s2_288, __p3_288), __s0_288, __p1_288); \ |
| | 44475 | __ret_288; \ |
| | 44476 | }) |
| 44111 | #else | 44477 | #else |
| 44112 | __ai uint16x8_t vcgeq_f16(float16x8_t __p0, float16x8_t __p1) { | 44478 | #define vcopy_lane_u16(__p0_289, __p1_289, __p2_289, __p3_289) __extension__ ({ \ |
| 44113 | uint16x8_t __ret; | 44479 | uint16x4_t __ret_289; \ |
| 44114 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44480 | uint16x4_t __s0_289 = __p0_289; \ |
| 44115 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 44481 | uint16x4_t __s2_289 = __p2_289; \ |
| 44116 | __ret = (uint16x8_t)(__rev0 >= __rev1); | 44482 | uint16x4_t __rev0_289; __rev0_289 = __builtin_shufflevector(__s0_289, __s0_289, 3, 2, 1, 0); \ |
| 44117 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44483 | uint16x4_t __rev2_289; __rev2_289 = __builtin_shufflevector(__s2_289, __s2_289, 3, 2, 1, 0); \ |
| 44118 | return __ret; | 44484 | __ret_289 = __noswap_vset_lane_u16(__noswap_vget_lane_u16(__rev2_289, __p3_289), __rev0_289, __p1_289); \ |
| 44119 | } | 44485 | __ret_289 = __builtin_shufflevector(__ret_289, __ret_289, 3, 2, 1, 0); \ |
| | 44486 | __ret_289; \ |
| | 44487 | }) |
| 44120 | #endif | 44488 | #endif |
| 44121 | | 44489 | |
| 44122 | #ifdef __LITTLE_ENDIAN__ | 44490 | #ifdef __LITTLE_ENDIAN__ |
| 44123 | __ai uint16x4_t vcge_f16(float16x4_t __p0, float16x4_t __p1) { | 44491 | #define vcopy_lane_s8(__p0_290, __p1_290, __p2_290, __p3_290) __extension__ ({ \ |
| 44124 | uint16x4_t __ret; | 44492 | int8x8_t __ret_290; \ |
| 44125 | __ret = (uint16x4_t)(__p0 >= __p1); | 44493 | int8x8_t __s0_290 = __p0_290; \ |
| 44126 | return __ret; | 44494 | int8x8_t __s2_290 = __p2_290; \ |
| 44127 | } | 44495 | __ret_290 = vset_lane_s8(vget_lane_s8(__s2_290, __p3_290), __s0_290, __p1_290); \ |
| | 44496 | __ret_290; \ |
| | 44497 | }) |
| 44128 | #else | 44498 | #else |
| 44129 | __ai uint16x4_t vcge_f16(float16x4_t __p0, float16x4_t __p1) { | 44499 | #define vcopy_lane_s8(__p0_291, __p1_291, __p2_291, __p3_291) __extension__ ({ \ |
| 44130 | uint16x4_t __ret; | 44500 | int8x8_t __ret_291; \ |
| 44131 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44501 | int8x8_t __s0_291 = __p0_291; \ |
| 44132 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 44502 | int8x8_t __s2_291 = __p2_291; \ |
| 44133 | __ret = (uint16x4_t)(__rev0 >= __rev1); | 44503 | int8x8_t __rev0_291; __rev0_291 = __builtin_shufflevector(__s0_291, __s0_291, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44134 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44504 | int8x8_t __rev2_291; __rev2_291 = __builtin_shufflevector(__s2_291, __s2_291, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44135 | return __ret; | 44505 | __ret_291 = __noswap_vset_lane_s8(__noswap_vget_lane_s8(__rev2_291, __p3_291), __rev0_291, __p1_291); \ |
| 44136 | } | 44506 | __ret_291 = __builtin_shufflevector(__ret_291, __ret_291, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44507 | __ret_291; \ |
| | 44508 | }) |
| 44137 | #endif | 44509 | #endif |
| 44138 | | 44510 | |
| 44139 | #ifdef __LITTLE_ENDIAN__ | 44511 | #ifdef __LITTLE_ENDIAN__ |
| 44140 | __ai uint16x8_t vcgezq_f16(float16x8_t __p0) { | 44512 | #define vcopy_lane_f32(__p0_292, __p1_292, __p2_292, __p3_292) __extension__ ({ \ |
| 44141 | uint16x8_t __ret; | 44513 | float32x2_t __ret_292; \ |
| 44142 | __ret = (uint16x8_t) __builtin_neon_vcgezq_v((int8x16_t)__p0, 49); | 44514 | float32x2_t __s0_292 = __p0_292; \ |
| 44143 | return __ret; | 44515 | float32x2_t __s2_292 = __p2_292; \ |
| 44144 | } | 44516 | __ret_292 = vset_lane_f32(vget_lane_f32(__s2_292, __p3_292), __s0_292, __p1_292); \ |
| | 44517 | __ret_292; \ |
| | 44518 | }) |
| 44145 | #else | 44519 | #else |
| 44146 | __ai uint16x8_t vcgezq_f16(float16x8_t __p0) { | 44520 | #define vcopy_lane_f32(__p0_293, __p1_293, __p2_293, __p3_293) __extension__ ({ \ |
| 44147 | uint16x8_t __ret; | 44521 | float32x2_t __ret_293; \ |
| 44148 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44522 | float32x2_t __s0_293 = __p0_293; \ |
| 44149 | __ret = (uint16x8_t) __builtin_neon_vcgezq_v((int8x16_t)__rev0, 49); | 44523 | float32x2_t __s2_293 = __p2_293; \ |
| 44150 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44524 | float32x2_t __rev0_293; __rev0_293 = __builtin_shufflevector(__s0_293, __s0_293, 1, 0); \ |
| 44151 | return __ret; | 44525 | float32x2_t __rev2_293; __rev2_293 = __builtin_shufflevector(__s2_293, __s2_293, 1, 0); \ |
| 44152 | } | 44526 | __ret_293 = __noswap_vset_lane_f32(__noswap_vget_lane_f32(__rev2_293, __p3_293), __rev0_293, __p1_293); \ |
| | 44527 | __ret_293 = __builtin_shufflevector(__ret_293, __ret_293, 1, 0); \ |
| | 44528 | __ret_293; \ |
| | 44529 | }) |
| 44153 | #endif | 44530 | #endif |
| 44154 | | 44531 | |
| 44155 | #ifdef __LITTLE_ENDIAN__ | 44532 | #ifdef __LITTLE_ENDIAN__ |
| 44156 | __ai uint16x4_t vcgez_f16(float16x4_t __p0) { | 44533 | #define vcopy_lane_s32(__p0_294, __p1_294, __p2_294, __p3_294) __extension__ ({ \ |
| 44157 | uint16x4_t __ret; | 44534 | int32x2_t __ret_294; \ |
| 44158 | __ret = (uint16x4_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 17); | 44535 | int32x2_t __s0_294 = __p0_294; \ |
| 44159 | return __ret; | 44536 | int32x2_t __s2_294 = __p2_294; \ |
| 44160 | } | 44537 | __ret_294 = vset_lane_s32(vget_lane_s32(__s2_294, __p3_294), __s0_294, __p1_294); \ |
| | 44538 | __ret_294; \ |
| | 44539 | }) |
| 44161 | #else | 44540 | #else |
| 44162 | __ai uint16x4_t vcgez_f16(float16x4_t __p0) { | 44541 | #define vcopy_lane_s32(__p0_295, __p1_295, __p2_295, __p3_295) __extension__ ({ \ |
| 44163 | uint16x4_t __ret; | 44542 | int32x2_t __ret_295; \ |
| 44164 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44543 | int32x2_t __s0_295 = __p0_295; \ |
| 44165 | __ret = (uint16x4_t) __builtin_neon_vcgez_v((int8x8_t)__rev0, 17); | 44544 | int32x2_t __s2_295 = __p2_295; \ |
| 44166 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44545 | int32x2_t __rev0_295; __rev0_295 = __builtin_shufflevector(__s0_295, __s0_295, 1, 0); \ |
| 44167 | return __ret; | 44546 | int32x2_t __rev2_295; __rev2_295 = __builtin_shufflevector(__s2_295, __s2_295, 1, 0); \ |
| 44168 | } | 44547 | __ret_295 = __noswap_vset_lane_s32(__noswap_vget_lane_s32(__rev2_295, __p3_295), __rev0_295, __p1_295); \ |
| | 44548 | __ret_295 = __builtin_shufflevector(__ret_295, __ret_295, 1, 0); \ |
| | 44549 | __ret_295; \ |
| | 44550 | }) |
| 44169 | #endif | 44551 | #endif |
| 44170 | | 44552 | |
| | 44553 | #define vcopy_lane_s64(__p0_296, __p1_296, __p2_296, __p3_296) __extension__ ({ \ |
| | 44554 | int64x1_t __ret_296; \ |
| | 44555 | int64x1_t __s0_296 = __p0_296; \ |
| | 44556 | int64x1_t __s2_296 = __p2_296; \ |
| | 44557 | __ret_296 = vset_lane_s64(vget_lane_s64(__s2_296, __p3_296), __s0_296, __p1_296); \ |
| | 44558 | __ret_296; \ |
| | 44559 | }) |
| 44171 | #ifdef __LITTLE_ENDIAN__ | 44560 | #ifdef __LITTLE_ENDIAN__ |
| 44172 | __ai uint16x8_t vcgtq_f16(float16x8_t __p0, float16x8_t __p1) { | 44561 | #define vcopy_lane_s16(__p0_297, __p1_297, __p2_297, __p3_297) __extension__ ({ \ |
| 44173 | uint16x8_t __ret; | 44562 | int16x4_t __ret_297; \ |
| 44174 | __ret = (uint16x8_t)(__p0 > __p1); | 44563 | int16x4_t __s0_297 = __p0_297; \ |
| 44175 | return __ret; | 44564 | int16x4_t __s2_297 = __p2_297; \ |
| 44176 | } | 44565 | __ret_297 = vset_lane_s16(vget_lane_s16(__s2_297, __p3_297), __s0_297, __p1_297); \ |
| | 44566 | __ret_297; \ |
| | 44567 | }) |
| 44177 | #else | 44568 | #else |
| 44178 | __ai uint16x8_t vcgtq_f16(float16x8_t __p0, float16x8_t __p1) { | 44569 | #define vcopy_lane_s16(__p0_298, __p1_298, __p2_298, __p3_298) __extension__ ({ \ |
| 44179 | uint16x8_t __ret; | 44570 | int16x4_t __ret_298; \ |
| 44180 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44571 | int16x4_t __s0_298 = __p0_298; \ |
| 44181 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 44572 | int16x4_t __s2_298 = __p2_298; \ |
| 44182 | __ret = (uint16x8_t)(__rev0 > __rev1); | 44573 | int16x4_t __rev0_298; __rev0_298 = __builtin_shufflevector(__s0_298, __s0_298, 3, 2, 1, 0); \ |
| 44183 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44574 | int16x4_t __rev2_298; __rev2_298 = __builtin_shufflevector(__s2_298, __s2_298, 3, 2, 1, 0); \ |
| 44184 | return __ret; | 44575 | __ret_298 = __noswap_vset_lane_s16(__noswap_vget_lane_s16(__rev2_298, __p3_298), __rev0_298, __p1_298); \ |
| 44185 | } | 44576 | __ret_298 = __builtin_shufflevector(__ret_298, __ret_298, 3, 2, 1, 0); \ |
| | 44577 | __ret_298; \ |
| | 44578 | }) |
| 44186 | #endif | 44579 | #endif |
| 44187 | | 44580 | |
| 44188 | #ifdef __LITTLE_ENDIAN__ | 44581 | #ifdef __LITTLE_ENDIAN__ |
| 44189 | __ai uint16x4_t vcgt_f16(float16x4_t __p0, float16x4_t __p1) { | 44582 | #define vcopyq_laneq_p8(__p0_299, __p1_299, __p2_299, __p3_299) __extension__ ({ \ |
| 44190 | uint16x4_t __ret; | 44583 | poly8x16_t __ret_299; \ |
| 44191 | __ret = (uint16x4_t)(__p0 > __p1); | 44584 | poly8x16_t __s0_299 = __p0_299; \ |
| 44192 | return __ret; | 44585 | poly8x16_t __s2_299 = __p2_299; \ |
| 44193 | } | 44586 | __ret_299 = vsetq_lane_p8(vgetq_lane_p8(__s2_299, __p3_299), __s0_299, __p1_299); \ |
| | 44587 | __ret_299; \ |
| | 44588 | }) |
| 44194 | #else | 44589 | #else |
| 44195 | __ai uint16x4_t vcgt_f16(float16x4_t __p0, float16x4_t __p1) { | 44590 | #define vcopyq_laneq_p8(__p0_300, __p1_300, __p2_300, __p3_300) __extension__ ({ \ |
| 44196 | uint16x4_t __ret; | 44591 | poly8x16_t __ret_300; \ |
| 44197 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44592 | poly8x16_t __s0_300 = __p0_300; \ |
| 44198 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 44593 | poly8x16_t __s2_300 = __p2_300; \ |
| 44199 | __ret = (uint16x4_t)(__rev0 > __rev1); | 44594 | poly8x16_t __rev0_300; __rev0_300 = __builtin_shufflevector(__s0_300, __s0_300, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44200 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44595 | poly8x16_t __rev2_300; __rev2_300 = __builtin_shufflevector(__s2_300, __s2_300, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44201 | return __ret; | 44596 | __ret_300 = __noswap_vsetq_lane_p8(__noswap_vgetq_lane_p8(__rev2_300, __p3_300), __rev0_300, __p1_300); \ |
| 44202 | } | 44597 | __ret_300 = __builtin_shufflevector(__ret_300, __ret_300, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44598 | __ret_300; \ |
| | 44599 | }) |
| 44203 | #endif | 44600 | #endif |
| 44204 | | 44601 | |
| 44205 | #ifdef __LITTLE_ENDIAN__ | 44602 | #ifdef __LITTLE_ENDIAN__ |
| 44206 | __ai uint16x8_t vcgtzq_f16(float16x8_t __p0) { | 44603 | #define vcopyq_laneq_p16(__p0_301, __p1_301, __p2_301, __p3_301) __extension__ ({ \ |
| 44207 | uint16x8_t __ret; | 44604 | poly16x8_t __ret_301; \ |
| 44208 | __ret = (uint16x8_t) __builtin_neon_vcgtzq_v((int8x16_t)__p0, 49); | 44605 | poly16x8_t __s0_301 = __p0_301; \ |
| 44209 | return __ret; | 44606 | poly16x8_t __s2_301 = __p2_301; \ |
| 44210 | } | 44607 | __ret_301 = vsetq_lane_p16(vgetq_lane_p16(__s2_301, __p3_301), __s0_301, __p1_301); \ |
| | 44608 | __ret_301; \ |
| | 44609 | }) |
| 44211 | #else | 44610 | #else |
| 44212 | __ai uint16x8_t vcgtzq_f16(float16x8_t __p0) { | 44611 | #define vcopyq_laneq_p16(__p0_302, __p1_302, __p2_302, __p3_302) __extension__ ({ \ |
| 44213 | uint16x8_t __ret; | 44612 | poly16x8_t __ret_302; \ |
| 44214 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44613 | poly16x8_t __s0_302 = __p0_302; \ |
| 44215 | __ret = (uint16x8_t) __builtin_neon_vcgtzq_v((int8x16_t)__rev0, 49); | 44614 | poly16x8_t __s2_302 = __p2_302; \ |
| 44216 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44615 | poly16x8_t __rev0_302; __rev0_302 = __builtin_shufflevector(__s0_302, __s0_302, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44217 | return __ret; | 44616 | poly16x8_t __rev2_302; __rev2_302 = __builtin_shufflevector(__s2_302, __s2_302, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44218 | } | 44617 | __ret_302 = __noswap_vsetq_lane_p16(__noswap_vgetq_lane_p16(__rev2_302, __p3_302), __rev0_302, __p1_302); \ |
| | 44618 | __ret_302 = __builtin_shufflevector(__ret_302, __ret_302, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44619 | __ret_302; \ |
| | 44620 | }) |
| 44219 | #endif | 44621 | #endif |
| 44220 | | 44622 | |
| 44221 | #ifdef __LITTLE_ENDIAN__ | 44623 | #ifdef __LITTLE_ENDIAN__ |
| 44222 | __ai uint16x4_t vcgtz_f16(float16x4_t __p0) { | 44624 | #define vcopyq_laneq_u8(__p0_303, __p1_303, __p2_303, __p3_303) __extension__ ({ \ |
| 44223 | uint16x4_t __ret; | 44625 | uint8x16_t __ret_303; \ |
| 44224 | __ret = (uint16x4_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 17); | 44626 | uint8x16_t __s0_303 = __p0_303; \ |
| 44225 | return __ret; | 44627 | uint8x16_t __s2_303 = __p2_303; \ |
| 44226 | } | 44628 | __ret_303 = vsetq_lane_u8(vgetq_lane_u8(__s2_303, __p3_303), __s0_303, __p1_303); \ |
| | 44629 | __ret_303; \ |
| | 44630 | }) |
| 44227 | #else | 44631 | #else |
| 44228 | __ai uint16x4_t vcgtz_f16(float16x4_t __p0) { | 44632 | #define vcopyq_laneq_u8(__p0_304, __p1_304, __p2_304, __p3_304) __extension__ ({ \ |
| 44229 | uint16x4_t __ret; | 44633 | uint8x16_t __ret_304; \ |
| 44230 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44634 | uint8x16_t __s0_304 = __p0_304; \ |
| 44231 | __ret = (uint16x4_t) __builtin_neon_vcgtz_v((int8x8_t)__rev0, 17); | 44635 | uint8x16_t __s2_304 = __p2_304; \ |
| 44232 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44636 | uint8x16_t __rev0_304; __rev0_304 = __builtin_shufflevector(__s0_304, __s0_304, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44233 | return __ret; | 44637 | uint8x16_t __rev2_304; __rev2_304 = __builtin_shufflevector(__s2_304, __s2_304, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44234 | } | 44638 | __ret_304 = __noswap_vsetq_lane_u8(__noswap_vgetq_lane_u8(__rev2_304, __p3_304), __rev0_304, __p1_304); \ |
| | 44639 | __ret_304 = __builtin_shufflevector(__ret_304, __ret_304, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44640 | __ret_304; \ |
| | 44641 | }) |
| 44235 | #endif | 44642 | #endif |
| 44236 | | 44643 | |
| 44237 | #ifdef __LITTLE_ENDIAN__ | 44644 | #ifdef __LITTLE_ENDIAN__ |
| 44238 | __ai uint16x8_t vcleq_f16(float16x8_t __p0, float16x8_t __p1) { | 44645 | #define vcopyq_laneq_u32(__p0_305, __p1_305, __p2_305, __p3_305) __extension__ ({ \ |
| 44239 | uint16x8_t __ret; | 44646 | uint32x4_t __ret_305; \ |
| 44240 | __ret = (uint16x8_t)(__p0 <= __p1); | 44647 | uint32x4_t __s0_305 = __p0_305; \ |
| 44241 | return __ret; | 44648 | uint32x4_t __s2_305 = __p2_305; \ |
| 44242 | } | 44649 | __ret_305 = vsetq_lane_u32(vgetq_lane_u32(__s2_305, __p3_305), __s0_305, __p1_305); \ |
| | 44650 | __ret_305; \ |
| | 44651 | }) |
| 44243 | #else | 44652 | #else |
| 44244 | __ai uint16x8_t vcleq_f16(float16x8_t __p0, float16x8_t __p1) { | 44653 | #define vcopyq_laneq_u32(__p0_306, __p1_306, __p2_306, __p3_306) __extension__ ({ \ |
| 44245 | uint16x8_t __ret; | 44654 | uint32x4_t __ret_306; \ |
| 44246 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44655 | uint32x4_t __s0_306 = __p0_306; \ |
| 44247 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 44656 | uint32x4_t __s2_306 = __p2_306; \ |
| 44248 | __ret = (uint16x8_t)(__rev0 <= __rev1); | 44657 | uint32x4_t __rev0_306; __rev0_306 = __builtin_shufflevector(__s0_306, __s0_306, 3, 2, 1, 0); \ |
| 44249 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44658 | uint32x4_t __rev2_306; __rev2_306 = __builtin_shufflevector(__s2_306, __s2_306, 3, 2, 1, 0); \ |
| 44250 | return __ret; | 44659 | __ret_306 = __noswap_vsetq_lane_u32(__noswap_vgetq_lane_u32(__rev2_306, __p3_306), __rev0_306, __p1_306); \ |
| 44251 | } | 44660 | __ret_306 = __builtin_shufflevector(__ret_306, __ret_306, 3, 2, 1, 0); \ |
| | 44661 | __ret_306; \ |
| | 44662 | }) |
| 44252 | #endif | 44663 | #endif |
| 44253 | | 44664 | |
| 44254 | #ifdef __LITTLE_ENDIAN__ | 44665 | #ifdef __LITTLE_ENDIAN__ |
| 44255 | __ai uint16x4_t vcle_f16(float16x4_t __p0, float16x4_t __p1) { | 44666 | #define vcopyq_laneq_u64(__p0_307, __p1_307, __p2_307, __p3_307) __extension__ ({ \ |
| 44256 | uint16x4_t __ret; | 44667 | uint64x2_t __ret_307; \ |
| 44257 | __ret = (uint16x4_t)(__p0 <= __p1); | 44668 | uint64x2_t __s0_307 = __p0_307; \ |
| 44258 | return __ret; | 44669 | uint64x2_t __s2_307 = __p2_307; \ |
| 44259 | } | 44670 | __ret_307 = vsetq_lane_u64(vgetq_lane_u64(__s2_307, __p3_307), __s0_307, __p1_307); \ |
| | 44671 | __ret_307; \ |
| | 44672 | }) |
| 44260 | #else | 44673 | #else |
| 44261 | __ai uint16x4_t vcle_f16(float16x4_t __p0, float16x4_t __p1) { | 44674 | #define vcopyq_laneq_u64(__p0_308, __p1_308, __p2_308, __p3_308) __extension__ ({ \ |
| 44262 | uint16x4_t __ret; | 44675 | uint64x2_t __ret_308; \ |
| 44263 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44676 | uint64x2_t __s0_308 = __p0_308; \ |
| 44264 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 44677 | uint64x2_t __s2_308 = __p2_308; \ |
| 44265 | __ret = (uint16x4_t)(__rev0 <= __rev1); | 44678 | uint64x2_t __rev0_308; __rev0_308 = __builtin_shufflevector(__s0_308, __s0_308, 1, 0); \ |
| 44266 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44679 | uint64x2_t __rev2_308; __rev2_308 = __builtin_shufflevector(__s2_308, __s2_308, 1, 0); \ |
| 44267 | return __ret; | 44680 | __ret_308 = __noswap_vsetq_lane_u64(__noswap_vgetq_lane_u64(__rev2_308, __p3_308), __rev0_308, __p1_308); \ |
| 44268 | } | 44681 | __ret_308 = __builtin_shufflevector(__ret_308, __ret_308, 1, 0); \ |
| | 44682 | __ret_308; \ |
| | 44683 | }) |
| 44269 | #endif | 44684 | #endif |
| 44270 | | 44685 | |
| 44271 | #ifdef __LITTLE_ENDIAN__ | 44686 | #ifdef __LITTLE_ENDIAN__ |
| 44272 | __ai uint16x8_t vclezq_f16(float16x8_t __p0) { | 44687 | #define vcopyq_laneq_u16(__p0_309, __p1_309, __p2_309, __p3_309) __extension__ ({ \ |
| 44273 | uint16x8_t __ret; | 44688 | uint16x8_t __ret_309; \ |
| 44274 | __ret = (uint16x8_t) __builtin_neon_vclezq_v((int8x16_t)__p0, 49); | 44689 | uint16x8_t __s0_309 = __p0_309; \ |
| 44275 | return __ret; | 44690 | uint16x8_t __s2_309 = __p2_309; \ |
| 44276 | } | 44691 | __ret_309 = vsetq_lane_u16(vgetq_lane_u16(__s2_309, __p3_309), __s0_309, __p1_309); \ |
| | 44692 | __ret_309; \ |
| | 44693 | }) |
| 44277 | #else | 44694 | #else |
| 44278 | __ai uint16x8_t vclezq_f16(float16x8_t __p0) { | 44695 | #define vcopyq_laneq_u16(__p0_310, __p1_310, __p2_310, __p3_310) __extension__ ({ \ |
| 44279 | uint16x8_t __ret; | 44696 | uint16x8_t __ret_310; \ |
| 44280 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44697 | uint16x8_t __s0_310 = __p0_310; \ |
| 44281 | __ret = (uint16x8_t) __builtin_neon_vclezq_v((int8x16_t)__rev0, 49); | 44698 | uint16x8_t __s2_310 = __p2_310; \ |
| 44282 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44699 | uint16x8_t __rev0_310; __rev0_310 = __builtin_shufflevector(__s0_310, __s0_310, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44283 | return __ret; | 44700 | uint16x8_t __rev2_310; __rev2_310 = __builtin_shufflevector(__s2_310, __s2_310, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44284 | } | 44701 | __ret_310 = __noswap_vsetq_lane_u16(__noswap_vgetq_lane_u16(__rev2_310, __p3_310), __rev0_310, __p1_310); \ |
| | 44702 | __ret_310 = __builtin_shufflevector(__ret_310, __ret_310, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44703 | __ret_310; \ |
| | 44704 | }) |
| 44285 | #endif | 44705 | #endif |
| 44286 | | 44706 | |
| 44287 | #ifdef __LITTLE_ENDIAN__ | 44707 | #ifdef __LITTLE_ENDIAN__ |
| 44288 | __ai uint16x4_t vclez_f16(float16x4_t __p0) { | 44708 | #define vcopyq_laneq_s8(__p0_311, __p1_311, __p2_311, __p3_311) __extension__ ({ \ |
| 44289 | uint16x4_t __ret; | 44709 | int8x16_t __ret_311; \ |
| 44290 | __ret = (uint16x4_t) __builtin_neon_vclez_v((int8x8_t)__p0, 17); | 44710 | int8x16_t __s0_311 = __p0_311; \ |
| 44291 | return __ret; | 44711 | int8x16_t __s2_311 = __p2_311; \ |
| 44292 | } | 44712 | __ret_311 = vsetq_lane_s8(vgetq_lane_s8(__s2_311, __p3_311), __s0_311, __p1_311); \ |
| | 44713 | __ret_311; \ |
| | 44714 | }) |
| 44293 | #else | 44715 | #else |
| 44294 | __ai uint16x4_t vclez_f16(float16x4_t __p0) { | 44716 | #define vcopyq_laneq_s8(__p0_312, __p1_312, __p2_312, __p3_312) __extension__ ({ \ |
| 44295 | uint16x4_t __ret; | 44717 | int8x16_t __ret_312; \ |
| 44296 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44718 | int8x16_t __s0_312 = __p0_312; \ |
| 44297 | __ret = (uint16x4_t) __builtin_neon_vclez_v((int8x8_t)__rev0, 17); | 44719 | int8x16_t __s2_312 = __p2_312; \ |
| 44298 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44720 | int8x16_t __rev0_312; __rev0_312 = __builtin_shufflevector(__s0_312, __s0_312, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44299 | return __ret; | 44721 | int8x16_t __rev2_312; __rev2_312 = __builtin_shufflevector(__s2_312, __s2_312, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44300 | } | 44722 | __ret_312 = __noswap_vsetq_lane_s8(__noswap_vgetq_lane_s8(__rev2_312, __p3_312), __rev0_312, __p1_312); \ |
| | 44723 | __ret_312 = __builtin_shufflevector(__ret_312, __ret_312, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44724 | __ret_312; \ |
| | 44725 | }) |
| 44301 | #endif | 44726 | #endif |
| 44302 | | 44727 | |
| 44303 | #ifdef __LITTLE_ENDIAN__ | 44728 | #ifdef __LITTLE_ENDIAN__ |
| 44304 | __ai uint16x8_t vcltq_f16(float16x8_t __p0, float16x8_t __p1) { | 44729 | #define vcopyq_laneq_f32(__p0_313, __p1_313, __p2_313, __p3_313) __extension__ ({ \ |
| 44305 | uint16x8_t __ret; | 44730 | float32x4_t __ret_313; \ |
| 44306 | __ret = (uint16x8_t)(__p0 < __p1); | 44731 | float32x4_t __s0_313 = __p0_313; \ |
| 44307 | return __ret; | 44732 | float32x4_t __s2_313 = __p2_313; \ |
| 44308 | } | 44733 | __ret_313 = vsetq_lane_f32(vgetq_lane_f32(__s2_313, __p3_313), __s0_313, __p1_313); \ |
| | 44734 | __ret_313; \ |
| | 44735 | }) |
| 44309 | #else | 44736 | #else |
| 44310 | __ai uint16x8_t vcltq_f16(float16x8_t __p0, float16x8_t __p1) { | 44737 | #define vcopyq_laneq_f32(__p0_314, __p1_314, __p2_314, __p3_314) __extension__ ({ \ |
| 44311 | uint16x8_t __ret; | 44738 | float32x4_t __ret_314; \ |
| 44312 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44739 | float32x4_t __s0_314 = __p0_314; \ |
| 44313 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 44740 | float32x4_t __s2_314 = __p2_314; \ |
| 44314 | __ret = (uint16x8_t)(__rev0 < __rev1); | 44741 | float32x4_t __rev0_314; __rev0_314 = __builtin_shufflevector(__s0_314, __s0_314, 3, 2, 1, 0); \ |
| 44315 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44742 | float32x4_t __rev2_314; __rev2_314 = __builtin_shufflevector(__s2_314, __s2_314, 3, 2, 1, 0); \ |
| 44316 | return __ret; | 44743 | __ret_314 = __noswap_vsetq_lane_f32(__noswap_vgetq_lane_f32(__rev2_314, __p3_314), __rev0_314, __p1_314); \ |
| 44317 | } | 44744 | __ret_314 = __builtin_shufflevector(__ret_314, __ret_314, 3, 2, 1, 0); \ |
| | 44745 | __ret_314; \ |
| | 44746 | }) |
| 44318 | #endif | 44747 | #endif |
| 44319 | | 44748 | |
| 44320 | #ifdef __LITTLE_ENDIAN__ | 44749 | #ifdef __LITTLE_ENDIAN__ |
| 44321 | __ai uint16x4_t vclt_f16(float16x4_t __p0, float16x4_t __p1) { | 44750 | #define vcopyq_laneq_s32(__p0_315, __p1_315, __p2_315, __p3_315) __extension__ ({ \ |
| 44322 | uint16x4_t __ret; | 44751 | int32x4_t __ret_315; \ |
| 44323 | __ret = (uint16x4_t)(__p0 < __p1); | 44752 | int32x4_t __s0_315 = __p0_315; \ |
| 44324 | return __ret; | 44753 | int32x4_t __s2_315 = __p2_315; \ |
| 44325 | } | 44754 | __ret_315 = vsetq_lane_s32(vgetq_lane_s32(__s2_315, __p3_315), __s0_315, __p1_315); \ |
| | 44755 | __ret_315; \ |
| | 44756 | }) |
| 44326 | #else | 44757 | #else |
| 44327 | __ai uint16x4_t vclt_f16(float16x4_t __p0, float16x4_t __p1) { | 44758 | #define vcopyq_laneq_s32(__p0_316, __p1_316, __p2_316, __p3_316) __extension__ ({ \ |
| 44328 | uint16x4_t __ret; | 44759 | int32x4_t __ret_316; \ |
| 44329 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44760 | int32x4_t __s0_316 = __p0_316; \ |
| 44330 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 44761 | int32x4_t __s2_316 = __p2_316; \ |
| 44331 | __ret = (uint16x4_t)(__rev0 < __rev1); | 44762 | int32x4_t __rev0_316; __rev0_316 = __builtin_shufflevector(__s0_316, __s0_316, 3, 2, 1, 0); \ |
| 44332 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44763 | int32x4_t __rev2_316; __rev2_316 = __builtin_shufflevector(__s2_316, __s2_316, 3, 2, 1, 0); \ |
| 44333 | return __ret; | 44764 | __ret_316 = __noswap_vsetq_lane_s32(__noswap_vgetq_lane_s32(__rev2_316, __p3_316), __rev0_316, __p1_316); \ |
| 44334 | } | 44765 | __ret_316 = __builtin_shufflevector(__ret_316, __ret_316, 3, 2, 1, 0); \ |
| | 44766 | __ret_316; \ |
| | 44767 | }) |
| 44335 | #endif | 44768 | #endif |
| 44336 | | 44769 | |
| 44337 | #ifdef __LITTLE_ENDIAN__ | 44770 | #ifdef __LITTLE_ENDIAN__ |
| 44338 | __ai uint16x8_t vcltzq_f16(float16x8_t __p0) { | 44771 | #define vcopyq_laneq_s64(__p0_317, __p1_317, __p2_317, __p3_317) __extension__ ({ \ |
| 44339 | uint16x8_t __ret; | 44772 | int64x2_t __ret_317; \ |
| 44340 | __ret = (uint16x8_t) __builtin_neon_vcltzq_v((int8x16_t)__p0, 49); | 44773 | int64x2_t __s0_317 = __p0_317; \ |
| 44341 | return __ret; | 44774 | int64x2_t __s2_317 = __p2_317; \ |
| 44342 | } | 44775 | __ret_317 = vsetq_lane_s64(vgetq_lane_s64(__s2_317, __p3_317), __s0_317, __p1_317); \ |
| | 44776 | __ret_317; \ |
| | 44777 | }) |
| 44343 | #else | 44778 | #else |
| 44344 | __ai uint16x8_t vcltzq_f16(float16x8_t __p0) { | 44779 | #define vcopyq_laneq_s64(__p0_318, __p1_318, __p2_318, __p3_318) __extension__ ({ \ |
| 44345 | uint16x8_t __ret; | 44780 | int64x2_t __ret_318; \ |
| 44346 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44781 | int64x2_t __s0_318 = __p0_318; \ |
| 44347 | __ret = (uint16x8_t) __builtin_neon_vcltzq_v((int8x16_t)__rev0, 49); | 44782 | int64x2_t __s2_318 = __p2_318; \ |
| 44348 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44783 | int64x2_t __rev0_318; __rev0_318 = __builtin_shufflevector(__s0_318, __s0_318, 1, 0); \ |
| 44349 | return __ret; | 44784 | int64x2_t __rev2_318; __rev2_318 = __builtin_shufflevector(__s2_318, __s2_318, 1, 0); \ |
| 44350 | } | 44785 | __ret_318 = __noswap_vsetq_lane_s64(__noswap_vgetq_lane_s64(__rev2_318, __p3_318), __rev0_318, __p1_318); \ |
| | 44786 | __ret_318 = __builtin_shufflevector(__ret_318, __ret_318, 1, 0); \ |
| | 44787 | __ret_318; \ |
| | 44788 | }) |
| 44351 | #endif | 44789 | #endif |
| 44352 | | 44790 | |
| 44353 | #ifdef __LITTLE_ENDIAN__ | 44791 | #ifdef __LITTLE_ENDIAN__ |
| 44354 | __ai uint16x4_t vcltz_f16(float16x4_t __p0) { | 44792 | #define vcopyq_laneq_s16(__p0_319, __p1_319, __p2_319, __p3_319) __extension__ ({ \ |
| 44355 | uint16x4_t __ret; | 44793 | int16x8_t __ret_319; \ |
| 44356 | __ret = (uint16x4_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 17); | 44794 | int16x8_t __s0_319 = __p0_319; \ |
| 44357 | return __ret; | 44795 | int16x8_t __s2_319 = __p2_319; \ |
| 44358 | } | 44796 | __ret_319 = vsetq_lane_s16(vgetq_lane_s16(__s2_319, __p3_319), __s0_319, __p1_319); \ |
| | 44797 | __ret_319; \ |
| | 44798 | }) |
| 44359 | #else | 44799 | #else |
| 44360 | __ai uint16x4_t vcltz_f16(float16x4_t __p0) { | 44800 | #define vcopyq_laneq_s16(__p0_320, __p1_320, __p2_320, __p3_320) __extension__ ({ \ |
| 44361 | uint16x4_t __ret; | 44801 | int16x8_t __ret_320; \ |
| 44362 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44802 | int16x8_t __s0_320 = __p0_320; \ |
| 44363 | __ret = (uint16x4_t) __builtin_neon_vcltz_v((int8x8_t)__rev0, 17); | 44803 | int16x8_t __s2_320 = __p2_320; \ |
| 44364 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44804 | int16x8_t __rev0_320; __rev0_320 = __builtin_shufflevector(__s0_320, __s0_320, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44365 | return __ret; | 44805 | int16x8_t __rev2_320; __rev2_320 = __builtin_shufflevector(__s2_320, __s2_320, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44366 | } | 44806 | __ret_320 = __noswap_vsetq_lane_s16(__noswap_vgetq_lane_s16(__rev2_320, __p3_320), __rev0_320, __p1_320); \ |
| | 44807 | __ret_320 = __builtin_shufflevector(__ret_320, __ret_320, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44808 | __ret_320; \ |
| | 44809 | }) |
| 44367 | #endif | 44810 | #endif |
| 44368 | | 44811 | |
| 44369 | #ifdef __LITTLE_ENDIAN__ | 44812 | #ifdef __LITTLE_ENDIAN__ |
| 44370 | __ai float16x8_t vcvtq_f16_u16(uint16x8_t __p0) { | 44813 | #define vcopy_laneq_p8(__p0_321, __p1_321, __p2_321, __p3_321) __extension__ ({ \ |
| 44371 | float16x8_t __ret; | 44814 | poly8x8_t __ret_321; \ |
| 44372 | __ret = (float16x8_t) __builtin_neon_vcvtq_f16_v((int8x16_t)__p0, 49); | 44815 | poly8x8_t __s0_321 = __p0_321; \ |
| 44373 | return __ret; | 44816 | poly8x16_t __s2_321 = __p2_321; \ |
| 44374 | } | 44817 | __ret_321 = vset_lane_p8(vgetq_lane_p8(__s2_321, __p3_321), __s0_321, __p1_321); \ |
| | 44818 | __ret_321; \ |
| | 44819 | }) |
| 44375 | #else | 44820 | #else |
| 44376 | __ai float16x8_t vcvtq_f16_u16(uint16x8_t __p0) { | 44821 | #define vcopy_laneq_p8(__p0_322, __p1_322, __p2_322, __p3_322) __extension__ ({ \ |
| 44377 | float16x8_t __ret; | 44822 | poly8x8_t __ret_322; \ |
| 44378 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44823 | poly8x8_t __s0_322 = __p0_322; \ |
| 44379 | __ret = (float16x8_t) __builtin_neon_vcvtq_f16_v((int8x16_t)__rev0, 49); | 44824 | poly8x16_t __s2_322 = __p2_322; \ |
| 44380 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44825 | poly8x8_t __rev0_322; __rev0_322 = __builtin_shufflevector(__s0_322, __s0_322, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44381 | return __ret; | 44826 | poly8x16_t __rev2_322; __rev2_322 = __builtin_shufflevector(__s2_322, __s2_322, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44382 | } | 44827 | __ret_322 = __noswap_vset_lane_p8(__noswap_vgetq_lane_p8(__rev2_322, __p3_322), __rev0_322, __p1_322); \ |
| | 44828 | __ret_322 = __builtin_shufflevector(__ret_322, __ret_322, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44829 | __ret_322; \ |
| | 44830 | }) |
| 44383 | #endif | 44831 | #endif |
| 44384 | | 44832 | |
| 44385 | #ifdef __LITTLE_ENDIAN__ | 44833 | #ifdef __LITTLE_ENDIAN__ |
| 44386 | __ai float16x8_t vcvtq_f16_s16(int16x8_t __p0) { | 44834 | #define vcopy_laneq_p16(__p0_323, __p1_323, __p2_323, __p3_323) __extension__ ({ \ |
| 44387 | float16x8_t __ret; | 44835 | poly16x4_t __ret_323; \ |
| 44388 | __ret = (float16x8_t) __builtin_neon_vcvtq_f16_v((int8x16_t)__p0, 33); | 44836 | poly16x4_t __s0_323 = __p0_323; \ |
| 44389 | return __ret; | 44837 | poly16x8_t __s2_323 = __p2_323; \ |
| 44390 | } | 44838 | __ret_323 = vset_lane_p16(vgetq_lane_p16(__s2_323, __p3_323), __s0_323, __p1_323); \ |
| | 44839 | __ret_323; \ |
| | 44840 | }) |
| 44391 | #else | 44841 | #else |
| 44392 | __ai float16x8_t vcvtq_f16_s16(int16x8_t __p0) { | 44842 | #define vcopy_laneq_p16(__p0_324, __p1_324, __p2_324, __p3_324) __extension__ ({ \ |
| 44393 | float16x8_t __ret; | 44843 | poly16x4_t __ret_324; \ |
| 44394 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 44844 | poly16x4_t __s0_324 = __p0_324; \ |
| 44395 | __ret = (float16x8_t) __builtin_neon_vcvtq_f16_v((int8x16_t)__rev0, 33); | 44845 | poly16x8_t __s2_324 = __p2_324; \ |
| 44396 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 44846 | poly16x4_t __rev0_324; __rev0_324 = __builtin_shufflevector(__s0_324, __s0_324, 3, 2, 1, 0); \ |
| 44397 | return __ret; | 44847 | poly16x8_t __rev2_324; __rev2_324 = __builtin_shufflevector(__s2_324, __s2_324, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44398 | } | 44848 | __ret_324 = __noswap_vset_lane_p16(__noswap_vgetq_lane_p16(__rev2_324, __p3_324), __rev0_324, __p1_324); \ |
| | 44849 | __ret_324 = __builtin_shufflevector(__ret_324, __ret_324, 3, 2, 1, 0); \ |
| | 44850 | __ret_324; \ |
| | 44851 | }) |
| 44399 | #endif | 44852 | #endif |
| 44400 | | 44853 | |
| 44401 | #ifdef __LITTLE_ENDIAN__ | 44854 | #ifdef __LITTLE_ENDIAN__ |
| 44402 | __ai float16x4_t vcvt_f16_u16(uint16x4_t __p0) { | 44855 | #define vcopy_laneq_u8(__p0_325, __p1_325, __p2_325, __p3_325) __extension__ ({ \ |
| 44403 | float16x4_t __ret; | 44856 | uint8x8_t __ret_325; \ |
| 44404 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_v((int8x8_t)__p0, 17); | 44857 | uint8x8_t __s0_325 = __p0_325; \ |
| 44405 | return __ret; | 44858 | uint8x16_t __s2_325 = __p2_325; \ |
| 44406 | } | 44859 | __ret_325 = vset_lane_u8(vgetq_lane_u8(__s2_325, __p3_325), __s0_325, __p1_325); \ |
| | 44860 | __ret_325; \ |
| | 44861 | }) |
| 44407 | #else | 44862 | #else |
| 44408 | __ai float16x4_t vcvt_f16_u16(uint16x4_t __p0) { | 44863 | #define vcopy_laneq_u8(__p0_326, __p1_326, __p2_326, __p3_326) __extension__ ({ \ |
| 44409 | float16x4_t __ret; | 44864 | uint8x8_t __ret_326; \ |
| 44410 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44865 | uint8x8_t __s0_326 = __p0_326; \ |
| 44411 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_v((int8x8_t)__rev0, 17); | 44866 | uint8x16_t __s2_326 = __p2_326; \ |
| 44412 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44867 | uint8x8_t __rev0_326; __rev0_326 = __builtin_shufflevector(__s0_326, __s0_326, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44413 | return __ret; | 44868 | uint8x16_t __rev2_326; __rev2_326 = __builtin_shufflevector(__s2_326, __s2_326, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44414 | } | 44869 | __ret_326 = __noswap_vset_lane_u8(__noswap_vgetq_lane_u8(__rev2_326, __p3_326), __rev0_326, __p1_326); \ |
| | 44870 | __ret_326 = __builtin_shufflevector(__ret_326, __ret_326, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44871 | __ret_326; \ |
| | 44872 | }) |
| 44415 | #endif | 44873 | #endif |
| 44416 | | 44874 | |
| 44417 | #ifdef __LITTLE_ENDIAN__ | 44875 | #ifdef __LITTLE_ENDIAN__ |
| 44418 | __ai float16x4_t vcvt_f16_s16(int16x4_t __p0) { | 44876 | #define vcopy_laneq_u32(__p0_327, __p1_327, __p2_327, __p3_327) __extension__ ({ \ |
| 44419 | float16x4_t __ret; | 44877 | uint32x2_t __ret_327; \ |
| 44420 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_v((int8x8_t)__p0, 1); | 44878 | uint32x2_t __s0_327 = __p0_327; \ |
| 44421 | return __ret; | 44879 | uint32x4_t __s2_327 = __p2_327; \ |
| 44422 | } | 44880 | __ret_327 = vset_lane_u32(vgetq_lane_u32(__s2_327, __p3_327), __s0_327, __p1_327); \ |
| | 44881 | __ret_327; \ |
| | 44882 | }) |
| 44423 | #else | 44883 | #else |
| 44424 | __ai float16x4_t vcvt_f16_s16(int16x4_t __p0) { | 44884 | #define vcopy_laneq_u32(__p0_328, __p1_328, __p2_328, __p3_328) __extension__ ({ \ |
| 44425 | float16x4_t __ret; | 44885 | uint32x2_t __ret_328; \ |
| 44426 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 44886 | uint32x2_t __s0_328 = __p0_328; \ |
| 44427 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_v((int8x8_t)__rev0, 1); | 44887 | uint32x4_t __s2_328 = __p2_328; \ |
| 44428 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 44888 | uint32x2_t __rev0_328; __rev0_328 = __builtin_shufflevector(__s0_328, __s0_328, 1, 0); \ |
| 44429 | return __ret; | 44889 | uint32x4_t __rev2_328; __rev2_328 = __builtin_shufflevector(__s2_328, __s2_328, 3, 2, 1, 0); \ |
| 44430 | } | 44890 | __ret_328 = __noswap_vset_lane_u32(__noswap_vgetq_lane_u32(__rev2_328, __p3_328), __rev0_328, __p1_328); \ |
| | 44891 | __ret_328 = __builtin_shufflevector(__ret_328, __ret_328, 1, 0); \ |
| | 44892 | __ret_328; \ |
| | 44893 | }) |
| 44431 | #endif | 44894 | #endif |
| 44432 | | 44895 | |
| 44433 | #ifdef __LITTLE_ENDIAN__ | 44896 | #ifdef __LITTLE_ENDIAN__ |
| 44434 | #define vcvtq_n_f16_u16(__p0, __p1) __extension__ ({ \ | 44897 | #define vcopy_laneq_u64(__p0_329, __p1_329, __p2_329, __p3_329) __extension__ ({ \ |
| 44435 | float16x8_t __ret; \ | 44898 | uint64x1_t __ret_329; \ |
| 44436 | uint16x8_t __s0 = __p0; \ | 44899 | uint64x1_t __s0_329 = __p0_329; \ |
| 44437 | __ret = (float16x8_t) __builtin_neon_vcvtq_n_f16_v((int8x16_t)__s0, __p1, 49); \ | 44900 | uint64x2_t __s2_329 = __p2_329; \ |
| 44438 | __ret; \ | 44901 | __ret_329 = vset_lane_u64(vgetq_lane_u64(__s2_329, __p3_329), __s0_329, __p1_329); \ |
| | 44902 | __ret_329; \ |
| 44439 | }) | 44903 | }) |
| 44440 | #else | 44904 | #else |
| 44441 | #define vcvtq_n_f16_u16(__p0, __p1) __extension__ ({ \ | 44905 | #define vcopy_laneq_u64(__p0_330, __p1_330, __p2_330, __p3_330) __extension__ ({ \ |
| 44442 | float16x8_t __ret; \ | 44906 | uint64x1_t __ret_330; \ |
| 44443 | uint16x8_t __s0 = __p0; \ | 44907 | uint64x1_t __s0_330 = __p0_330; \ |
| 44444 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44908 | uint64x2_t __s2_330 = __p2_330; \ |
| 44445 | __ret = (float16x8_t) __builtin_neon_vcvtq_n_f16_v((int8x16_t)__rev0, __p1, 49); \ | 44909 | uint64x2_t __rev2_330; __rev2_330 = __builtin_shufflevector(__s2_330, __s2_330, 1, 0); \ |
| 44446 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44910 | __ret_330 = vset_lane_u64(__noswap_vgetq_lane_u64(__rev2_330, __p3_330), __s0_330, __p1_330); \ |
| 44447 | __ret; \ | 44911 | __ret_330; \ |
| 44448 | }) | 44912 | }) |
| 44449 | #endif | 44913 | #endif |
| 44450 | | 44914 | |
| 44451 | #ifdef __LITTLE_ENDIAN__ | 44915 | #ifdef __LITTLE_ENDIAN__ |
| 44452 | #define vcvtq_n_f16_s16(__p0, __p1) __extension__ ({ \ | 44916 | #define vcopy_laneq_u16(__p0_331, __p1_331, __p2_331, __p3_331) __extension__ ({ \ |
| 44453 | float16x8_t __ret; \ | 44917 | uint16x4_t __ret_331; \ |
| 44454 | int16x8_t __s0 = __p0; \ | 44918 | uint16x4_t __s0_331 = __p0_331; \ |
| 44455 | __ret = (float16x8_t) __builtin_neon_vcvtq_n_f16_v((int8x16_t)__s0, __p1, 33); \ | 44919 | uint16x8_t __s2_331 = __p2_331; \ |
| 44456 | __ret; \ | 44920 | __ret_331 = vset_lane_u16(vgetq_lane_u16(__s2_331, __p3_331), __s0_331, __p1_331); \ |
| | 44921 | __ret_331; \ |
| 44457 | }) | 44922 | }) |
| 44458 | #else | 44923 | #else |
| 44459 | #define vcvtq_n_f16_s16(__p0, __p1) __extension__ ({ \ | 44924 | #define vcopy_laneq_u16(__p0_332, __p1_332, __p2_332, __p3_332) __extension__ ({ \ |
| 44460 | float16x8_t __ret; \ | 44925 | uint16x4_t __ret_332; \ |
| 44461 | int16x8_t __s0 = __p0; \ | 44926 | uint16x4_t __s0_332 = __p0_332; \ |
| 44462 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44927 | uint16x8_t __s2_332 = __p2_332; \ |
| 44463 | __ret = (float16x8_t) __builtin_neon_vcvtq_n_f16_v((int8x16_t)__rev0, __p1, 33); \ | 44928 | uint16x4_t __rev0_332; __rev0_332 = __builtin_shufflevector(__s0_332, __s0_332, 3, 2, 1, 0); \ |
| 44464 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44929 | uint16x8_t __rev2_332; __rev2_332 = __builtin_shufflevector(__s2_332, __s2_332, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44465 | __ret; \ | 44930 | __ret_332 = __noswap_vset_lane_u16(__noswap_vgetq_lane_u16(__rev2_332, __p3_332), __rev0_332, __p1_332); \ |
| | 44931 | __ret_332 = __builtin_shufflevector(__ret_332, __ret_332, 3, 2, 1, 0); \ |
| | 44932 | __ret_332; \ |
| 44466 | }) | 44933 | }) |
| 44467 | #endif | 44934 | #endif |
| 44468 | | 44935 | |
| 44469 | #ifdef __LITTLE_ENDIAN__ | 44936 | #ifdef __LITTLE_ENDIAN__ |
| 44470 | #define vcvt_n_f16_u16(__p0, __p1) __extension__ ({ \ | 44937 | #define vcopy_laneq_s8(__p0_333, __p1_333, __p2_333, __p3_333) __extension__ ({ \ |
| 44471 | float16x4_t __ret; \ | 44938 | int8x8_t __ret_333; \ |
| 44472 | uint16x4_t __s0 = __p0; \ | 44939 | int8x8_t __s0_333 = __p0_333; \ |
| 44473 | __ret = (float16x4_t) __builtin_neon_vcvt_n_f16_v((int8x8_t)__s0, __p1, 17); \ | 44940 | int8x16_t __s2_333 = __p2_333; \ |
| 44474 | __ret; \ | 44941 | __ret_333 = vset_lane_s8(vgetq_lane_s8(__s2_333, __p3_333), __s0_333, __p1_333); \ |
| | 44942 | __ret_333; \ |
| 44475 | }) | 44943 | }) |
| 44476 | #else | 44944 | #else |
| 44477 | #define vcvt_n_f16_u16(__p0, __p1) __extension__ ({ \ | 44945 | #define vcopy_laneq_s8(__p0_334, __p1_334, __p2_334, __p3_334) __extension__ ({ \ |
| 44478 | float16x4_t __ret; \ | 44946 | int8x8_t __ret_334; \ |
| 44479 | uint16x4_t __s0 = __p0; \ | 44947 | int8x8_t __s0_334 = __p0_334; \ |
| 44480 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 44948 | int8x16_t __s2_334 = __p2_334; \ |
| 44481 | __ret = (float16x4_t) __builtin_neon_vcvt_n_f16_v((int8x8_t)__rev0, __p1, 17); \ | 44949 | int8x8_t __rev0_334; __rev0_334 = __builtin_shufflevector(__s0_334, __s0_334, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44482 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 44950 | int8x16_t __rev2_334; __rev2_334 = __builtin_shufflevector(__s2_334, __s2_334, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44483 | __ret; \ | 44951 | __ret_334 = __noswap_vset_lane_s8(__noswap_vgetq_lane_s8(__rev2_334, __p3_334), __rev0_334, __p1_334); \ |
| | 44952 | __ret_334 = __builtin_shufflevector(__ret_334, __ret_334, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 44953 | __ret_334; \ |
| 44484 | }) | 44954 | }) |
| 44485 | #endif | 44955 | #endif |
| 44486 | | 44956 | |
| 44487 | #ifdef __LITTLE_ENDIAN__ | 44957 | #ifdef __LITTLE_ENDIAN__ |
| 44488 | #define vcvt_n_f16_s16(__p0, __p1) __extension__ ({ \ | 44958 | #define vcopy_laneq_f32(__p0_335, __p1_335, __p2_335, __p3_335) __extension__ ({ \ |
| 44489 | float16x4_t __ret; \ | 44959 | float32x2_t __ret_335; \ |
| 44490 | int16x4_t __s0 = __p0; \ | 44960 | float32x2_t __s0_335 = __p0_335; \ |
| 44491 | __ret = (float16x4_t) __builtin_neon_vcvt_n_f16_v((int8x8_t)__s0, __p1, 1); \ | 44961 | float32x4_t __s2_335 = __p2_335; \ |
| 44492 | __ret; \ | 44962 | __ret_335 = vset_lane_f32(vgetq_lane_f32(__s2_335, __p3_335), __s0_335, __p1_335); \ |
| | 44963 | __ret_335; \ |
| 44493 | }) | 44964 | }) |
| 44494 | #else | 44965 | #else |
| 44495 | #define vcvt_n_f16_s16(__p0, __p1) __extension__ ({ \ | 44966 | #define vcopy_laneq_f32(__p0_336, __p1_336, __p2_336, __p3_336) __extension__ ({ \ |
| 44496 | float16x4_t __ret; \ | 44967 | float32x2_t __ret_336; \ |
| 44497 | int16x4_t __s0 = __p0; \ | 44968 | float32x2_t __s0_336 = __p0_336; \ |
| 44498 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 44969 | float32x4_t __s2_336 = __p2_336; \ |
| 44499 | __ret = (float16x4_t) __builtin_neon_vcvt_n_f16_v((int8x8_t)__rev0, __p1, 1); \ | 44970 | float32x2_t __rev0_336; __rev0_336 = __builtin_shufflevector(__s0_336, __s0_336, 1, 0); \ |
| 44500 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 44971 | float32x4_t __rev2_336; __rev2_336 = __builtin_shufflevector(__s2_336, __s2_336, 3, 2, 1, 0); \ |
| 44501 | __ret; \ | 44972 | __ret_336 = __noswap_vset_lane_f32(__noswap_vgetq_lane_f32(__rev2_336, __p3_336), __rev0_336, __p1_336); \ |
| | 44973 | __ret_336 = __builtin_shufflevector(__ret_336, __ret_336, 1, 0); \ |
| | 44974 | __ret_336; \ |
| 44502 | }) | 44975 | }) |
| 44503 | #endif | 44976 | #endif |
| 44504 | | 44977 | |
| 44505 | #ifdef __LITTLE_ENDIAN__ | 44978 | #ifdef __LITTLE_ENDIAN__ |
| 44506 | #define vcvtq_n_s16_f16(__p0, __p1) __extension__ ({ \ | 44979 | #define vcopy_laneq_s32(__p0_337, __p1_337, __p2_337, __p3_337) __extension__ ({ \ |
| 44507 | int16x8_t __ret; \ | 44980 | int32x2_t __ret_337; \ |
| 44508 | float16x8_t __s0 = __p0; \ | 44981 | int32x2_t __s0_337 = __p0_337; \ |
| 44509 | __ret = (int16x8_t) __builtin_neon_vcvtq_n_s16_v((int8x16_t)__s0, __p1, 33); \ | 44982 | int32x4_t __s2_337 = __p2_337; \ |
| 44510 | __ret; \ | 44983 | __ret_337 = vset_lane_s32(vgetq_lane_s32(__s2_337, __p3_337), __s0_337, __p1_337); \ |
| | 44984 | __ret_337; \ |
| 44511 | }) | 44985 | }) |
| 44512 | #else | 44986 | #else |
| 44513 | #define vcvtq_n_s16_f16(__p0, __p1) __extension__ ({ \ | 44987 | #define vcopy_laneq_s32(__p0_338, __p1_338, __p2_338, __p3_338) __extension__ ({ \ |
| 44514 | int16x8_t __ret; \ | 44988 | int32x2_t __ret_338; \ |
| 44515 | float16x8_t __s0 = __p0; \ | 44989 | int32x2_t __s0_338 = __p0_338; \ |
| 44516 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44990 | int32x4_t __s2_338 = __p2_338; \ |
| 44517 | __ret = (int16x8_t) __builtin_neon_vcvtq_n_s16_v((int8x16_t)__rev0, __p1, 33); \ | 44991 | int32x2_t __rev0_338; __rev0_338 = __builtin_shufflevector(__s0_338, __s0_338, 1, 0); \ |
| 44518 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44992 | int32x4_t __rev2_338; __rev2_338 = __builtin_shufflevector(__s2_338, __s2_338, 3, 2, 1, 0); \ |
| 44519 | __ret; \ | 44993 | __ret_338 = __noswap_vset_lane_s32(__noswap_vgetq_lane_s32(__rev2_338, __p3_338), __rev0_338, __p1_338); \ |
| | 44994 | __ret_338 = __builtin_shufflevector(__ret_338, __ret_338, 1, 0); \ |
| | 44995 | __ret_338; \ |
| 44520 | }) | 44996 | }) |
| 44521 | #endif | 44997 | #endif |
| 44522 | | 44998 | |
| 44523 | #ifdef __LITTLE_ENDIAN__ | 44999 | #ifdef __LITTLE_ENDIAN__ |
| 44524 | #define vcvt_n_s16_f16(__p0, __p1) __extension__ ({ \ | 45000 | #define vcopy_laneq_s64(__p0_339, __p1_339, __p2_339, __p3_339) __extension__ ({ \ |
| 44525 | int16x4_t __ret; \ | 45001 | int64x1_t __ret_339; \ |
| 44526 | float16x4_t __s0 = __p0; \ | 45002 | int64x1_t __s0_339 = __p0_339; \ |
| 44527 | __ret = (int16x4_t) __builtin_neon_vcvt_n_s16_v((int8x8_t)__s0, __p1, 1); \ | 45003 | int64x2_t __s2_339 = __p2_339; \ |
| 44528 | __ret; \ | 45004 | __ret_339 = vset_lane_s64(vgetq_lane_s64(__s2_339, __p3_339), __s0_339, __p1_339); \ |
| | 45005 | __ret_339; \ |
| 44529 | }) | 45006 | }) |
| 44530 | #else | 45007 | #else |
| 44531 | #define vcvt_n_s16_f16(__p0, __p1) __extension__ ({ \ | 45008 | #define vcopy_laneq_s64(__p0_340, __p1_340, __p2_340, __p3_340) __extension__ ({ \ |
| 44532 | int16x4_t __ret; \ | 45009 | int64x1_t __ret_340; \ |
| 44533 | float16x4_t __s0 = __p0; \ | 45010 | int64x1_t __s0_340 = __p0_340; \ |
| 44534 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 45011 | int64x2_t __s2_340 = __p2_340; \ |
| 44535 | __ret = (int16x4_t) __builtin_neon_vcvt_n_s16_v((int8x8_t)__rev0, __p1, 1); \ | 45012 | int64x2_t __rev2_340; __rev2_340 = __builtin_shufflevector(__s2_340, __s2_340, 1, 0); \ |
| 44536 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 45013 | __ret_340 = vset_lane_s64(__noswap_vgetq_lane_s64(__rev2_340, __p3_340), __s0_340, __p1_340); \ |
| 44537 | __ret; \ | 45014 | __ret_340; \ |
| 44538 | }) | 45015 | }) |
| 44539 | #endif | 45016 | #endif |
| 44540 | | 45017 | |
| 44541 | #ifdef __LITTLE_ENDIAN__ | 45018 | #ifdef __LITTLE_ENDIAN__ |
| 44542 | #define vcvtq_n_u16_f16(__p0, __p1) __extension__ ({ \ | 45019 | #define vcopy_laneq_s16(__p0_341, __p1_341, __p2_341, __p3_341) __extension__ ({ \ |
| 44543 | uint16x8_t __ret; \ | 45020 | int16x4_t __ret_341; \ |
| 44544 | float16x8_t __s0 = __p0; \ | 45021 | int16x4_t __s0_341 = __p0_341; \ |
| 44545 | __ret = (uint16x8_t) __builtin_neon_vcvtq_n_u16_v((int8x16_t)__s0, __p1, 49); \ | 45022 | int16x8_t __s2_341 = __p2_341; \ |
| 44546 | __ret; \ | 45023 | __ret_341 = vset_lane_s16(vgetq_lane_s16(__s2_341, __p3_341), __s0_341, __p1_341); \ |
| | 45024 | __ret_341; \ |
| 44547 | }) | 45025 | }) |
| 44548 | #else | 45026 | #else |
| 44549 | #define vcvtq_n_u16_f16(__p0, __p1) __extension__ ({ \ | 45027 | #define vcopy_laneq_s16(__p0_342, __p1_342, __p2_342, __p3_342) __extension__ ({ \ |
| 44550 | uint16x8_t __ret; \ | 45028 | int16x4_t __ret_342; \ |
| 44551 | float16x8_t __s0 = __p0; \ | 45029 | int16x4_t __s0_342 = __p0_342; \ |
| 44552 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 45030 | int16x8_t __s2_342 = __p2_342; \ |
| 44553 | __ret = (uint16x8_t) __builtin_neon_vcvtq_n_u16_v((int8x16_t)__rev0, __p1, 49); \ | 45031 | int16x4_t __rev0_342; __rev0_342 = __builtin_shufflevector(__s0_342, __s0_342, 3, 2, 1, 0); \ |
| 44554 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 45032 | int16x8_t __rev2_342; __rev2_342 = __builtin_shufflevector(__s2_342, __s2_342, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44555 | __ret; \ | 45033 | __ret_342 = __noswap_vset_lane_s16(__noswap_vgetq_lane_s16(__rev2_342, __p3_342), __rev0_342, __p1_342); \ |
| | 45034 | __ret_342 = __builtin_shufflevector(__ret_342, __ret_342, 3, 2, 1, 0); \ |
| | 45035 | __ret_342; \ |
| 44556 | }) | 45036 | }) |
| 44557 | #endif | 45037 | #endif |
| 44558 | | 45038 | |
| 44559 | #ifdef __LITTLE_ENDIAN__ | 45039 | #define vcreate_p64(__p0) __extension__ ({ \ |
| 44560 | #define vcvt_n_u16_f16(__p0, __p1) __extension__ ({ \ | 45040 | poly64x1_t __ret; \ |
| 44561 | uint16x4_t __ret; \ | 45041 | uint64_t __promote = __p0; \ |
| 44562 | float16x4_t __s0 = __p0; \ | 45042 | __ret = (poly64x1_t)(__promote); \ |
| 44563 | __ret = (uint16x4_t) __builtin_neon_vcvt_n_u16_v((int8x8_t)__s0, __p1, 17); \ | | |
| 44564 | __ret; \ | 45043 | __ret; \ |
| 44565 | }) | 45044 | }) |
| 44566 | #else | 45045 | #define vcreate_f64(__p0) __extension__ ({ \ |
| 44567 | #define vcvt_n_u16_f16(__p0, __p1) __extension__ ({ \ | 45046 | float64x1_t __ret; \ |
| 44568 | uint16x4_t __ret; \ | 45047 | uint64_t __promote = __p0; \ |
| 44569 | float16x4_t __s0 = __p0; \ | 45048 | __ret = (float64x1_t)(__promote); \ |
| 44570 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | | |
| 44571 | __ret = (uint16x4_t) __builtin_neon_vcvt_n_u16_v((int8x8_t)__rev0, __p1, 17); \ | | |
| 44572 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | | |
| 44573 | __ret; \ | 45049 | __ret; \ |
| 44574 | }) | 45050 | }) |
| 44575 | #endif | 45051 | __ai float32_t vcvts_f32_s32(int32_t __p0) { |
| 44576 | | 45052 | float32_t __ret; |
| 44577 | #ifdef __LITTLE_ENDIAN__ | 45053 | __ret = (float32_t) __builtin_neon_vcvts_f32_s32(__p0); |
| 44578 | __ai int16x8_t vcvtq_s16_f16(float16x8_t __p0) { | | |
| 44579 | int16x8_t __ret; | | |
| 44580 | __ret = (int16x8_t) __builtin_neon_vcvtq_s16_v((int8x16_t)__p0, 33); | | |
| 44581 | return __ret; | 45054 | return __ret; |
| 44582 | } | 45055 | } |
| 44583 | #else | 45056 | __ai float32_t vcvts_f32_u32(uint32_t __p0) { |
| 44584 | __ai int16x8_t vcvtq_s16_f16(float16x8_t __p0) { | 45057 | float32_t __ret; |
| 44585 | int16x8_t __ret; | 45058 | __ret = (float32_t) __builtin_neon_vcvts_f32_u32(__p0); |
| 44586 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 44587 | __ret = (int16x8_t) __builtin_neon_vcvtq_s16_v((int8x16_t)__rev0, 33); | | |
| 44588 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 44589 | return __ret; | 45059 | return __ret; |
| 44590 | } | 45060 | } |
| 44591 | #endif | | |
| 44592 | | | |
| 44593 | #ifdef __LITTLE_ENDIAN__ | 45061 | #ifdef __LITTLE_ENDIAN__ |
| 44594 | __ai int16x4_t vcvt_s16_f16(float16x4_t __p0) { | 45062 | __ai float32x2_t vcvt_f32_f64(float64x2_t __p0) { |
| 44595 | int16x4_t __ret; | 45063 | float32x2_t __ret; |
| 44596 | __ret = (int16x4_t) __builtin_neon_vcvt_s16_v((int8x8_t)__p0, 1); | 45064 | __ret = (float32x2_t) __builtin_neon_vcvt_f32_f64((int8x16_t)__p0, 9); |
| 44597 | return __ret; | 45065 | return __ret; |
| 44598 | } | 45066 | } |
| 44599 | #else | 45067 | #else |
| 44600 | __ai int16x4_t vcvt_s16_f16(float16x4_t __p0) { | 45068 | __ai float32x2_t vcvt_f32_f64(float64x2_t __p0) { |
| 44601 | int16x4_t __ret; | 45069 | float32x2_t __ret; |
| 44602 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45070 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 44603 | __ret = (int16x4_t) __builtin_neon_vcvt_s16_v((int8x8_t)__rev0, 1); | 45071 | __ret = (float32x2_t) __builtin_neon_vcvt_f32_f64((int8x16_t)__rev0, 9); |
| 44604 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45072 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 45073 | return __ret; |
| | 45074 | } |
| | 45075 | __ai float32x2_t __noswap_vcvt_f32_f64(float64x2_t __p0) { |
| | 45076 | float32x2_t __ret; |
| | 45077 | __ret = (float32x2_t) __builtin_neon_vcvt_f32_f64((int8x16_t)__p0, 9); |
| 44605 | return __ret; | 45078 | return __ret; |
| 44606 | } | 45079 | } |
| 44607 | #endif | 45080 | #endif |
| 44608 | | 45081 | |
| 44609 | #ifdef __LITTLE_ENDIAN__ | 45082 | __ai float64_t vcvtd_f64_s64(int64_t __p0) { |
| 44610 | __ai uint16x8_t vcvtq_u16_f16(float16x8_t __p0) { | 45083 | float64_t __ret; |
| 44611 | uint16x8_t __ret; | 45084 | __ret = (float64_t) __builtin_neon_vcvtd_f64_s64(__p0); |
| 44612 | __ret = (uint16x8_t) __builtin_neon_vcvtq_u16_v((int8x16_t)__p0, 49); | | |
| 44613 | return __ret; | 45085 | return __ret; |
| 44614 | } | 45086 | } |
| 44615 | #else | 45087 | __ai float64_t vcvtd_f64_u64(uint64_t __p0) { |
| 44616 | __ai uint16x8_t vcvtq_u16_f16(float16x8_t __p0) { | 45088 | float64_t __ret; |
| 44617 | uint16x8_t __ret; | 45089 | __ret = (float64_t) __builtin_neon_vcvtd_f64_u64(__p0); |
| 44618 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 44619 | __ret = (uint16x8_t) __builtin_neon_vcvtq_u16_v((int8x16_t)__rev0, 49); | | |
| 44620 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 44621 | return __ret; | 45090 | return __ret; |
| 44622 | } | 45091 | } |
| 44623 | #endif | | |
| 44624 | | | |
| 44625 | #ifdef __LITTLE_ENDIAN__ | 45092 | #ifdef __LITTLE_ENDIAN__ |
| 44626 | __ai uint16x4_t vcvt_u16_f16(float16x4_t __p0) { | 45093 | __ai float64x2_t vcvtq_f64_u64(uint64x2_t __p0) { |
| 44627 | uint16x4_t __ret; | 45094 | float64x2_t __ret; |
| 44628 | __ret = (uint16x4_t) __builtin_neon_vcvt_u16_v((int8x8_t)__p0, 17); | 45095 | __ret = (float64x2_t) __builtin_neon_vcvtq_f64_v((int8x16_t)__p0, 51); |
| 44629 | return __ret; | 45096 | return __ret; |
| 44630 | } | 45097 | } |
| 44631 | #else | 45098 | #else |
| 44632 | __ai uint16x4_t vcvt_u16_f16(float16x4_t __p0) { | 45099 | __ai float64x2_t vcvtq_f64_u64(uint64x2_t __p0) { |
| 44633 | uint16x4_t __ret; | 45100 | float64x2_t __ret; |
| 44634 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45101 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 44635 | __ret = (uint16x4_t) __builtin_neon_vcvt_u16_v((int8x8_t)__rev0, 17); | 45102 | __ret = (float64x2_t) __builtin_neon_vcvtq_f64_v((int8x16_t)__rev0, 51); |
| 44636 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45103 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 44637 | return __ret; | 45104 | return __ret; |
| 44638 | } | 45105 | } |
| 44639 | #endif | 45106 | #endif |
| 44640 | | 45107 | |
| 44641 | #ifdef __LITTLE_ENDIAN__ | 45108 | #ifdef __LITTLE_ENDIAN__ |
| 44642 | __ai int16x8_t vcvtaq_s16_f16(float16x8_t __p0) { | 45109 | __ai float64x2_t vcvtq_f64_s64(int64x2_t __p0) { |
| 44643 | int16x8_t __ret; | 45110 | float64x2_t __ret; |
| 44644 | __ret = (int16x8_t) __builtin_neon_vcvtaq_s16_v((int8x16_t)__p0, 33); | 45111 | __ret = (float64x2_t) __builtin_neon_vcvtq_f64_v((int8x16_t)__p0, 35); |
| 44645 | return __ret; | 45112 | return __ret; |
| 44646 | } | 45113 | } |
| 44647 | #else | 45114 | #else |
| 44648 | __ai int16x8_t vcvtaq_s16_f16(float16x8_t __p0) { | 45115 | __ai float64x2_t vcvtq_f64_s64(int64x2_t __p0) { |
| 44649 | int16x8_t __ret; | 45116 | float64x2_t __ret; |
| 44650 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45117 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 44651 | __ret = (int16x8_t) __builtin_neon_vcvtaq_s16_v((int8x16_t)__rev0, 33); | 45118 | __ret = (float64x2_t) __builtin_neon_vcvtq_f64_v((int8x16_t)__rev0, 35); |
| 44652 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45119 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 44653 | return __ret; | 45120 | return __ret; |
| 44654 | } | 45121 | } |
| 44655 | #endif | 45122 | #endif |
| 44656 | | 45123 | |
| 44657 | #ifdef __LITTLE_ENDIAN__ | 45124 | __ai float64x1_t vcvt_f64_u64(uint64x1_t __p0) { |
| 44658 | __ai int16x4_t vcvta_s16_f16(float16x4_t __p0) { | 45125 | float64x1_t __ret; |
| 44659 | int16x4_t __ret; | 45126 | __ret = (float64x1_t) __builtin_neon_vcvt_f64_v((int8x8_t)__p0, 19); |
| 44660 | __ret = (int16x4_t) __builtin_neon_vcvta_s16_v((int8x8_t)__p0, 1); | | |
| 44661 | return __ret; | 45127 | return __ret; |
| 44662 | } | 45128 | } |
| 44663 | #else | 45129 | __ai float64x1_t vcvt_f64_s64(int64x1_t __p0) { |
| 44664 | __ai int16x4_t vcvta_s16_f16(float16x4_t __p0) { | 45130 | float64x1_t __ret; |
| 44665 | int16x4_t __ret; | 45131 | __ret = (float64x1_t) __builtin_neon_vcvt_f64_v((int8x8_t)__p0, 3); |
| 44666 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 44667 | __ret = (int16x4_t) __builtin_neon_vcvta_s16_v((int8x8_t)__rev0, 1); | | |
| 44668 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 44669 | return __ret; | 45132 | return __ret; |
| 44670 | } | 45133 | } |
| 44671 | #endif | | |
| 44672 | | | |
| 44673 | #ifdef __LITTLE_ENDIAN__ | 45134 | #ifdef __LITTLE_ENDIAN__ |
| 44674 | __ai uint16x8_t vcvtaq_u16_f16(float16x8_t __p0) { | 45135 | __ai float64x2_t vcvt_f64_f32(float32x2_t __p0) { |
| 44675 | uint16x8_t __ret; | 45136 | float64x2_t __ret; |
| 44676 | __ret = (uint16x8_t) __builtin_neon_vcvtaq_u16_v((int8x16_t)__p0, 49); | 45137 | __ret = (float64x2_t) __builtin_neon_vcvt_f64_f32((int8x8_t)__p0, 42); |
| 44677 | return __ret; | 45138 | return __ret; |
| 44678 | } | 45139 | } |
| 44679 | #else | 45140 | #else |
| 44680 | __ai uint16x8_t vcvtaq_u16_f16(float16x8_t __p0) { | 45141 | __ai float64x2_t vcvt_f64_f32(float32x2_t __p0) { |
| 44681 | uint16x8_t __ret; | 45142 | float64x2_t __ret; |
| 44682 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45143 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 44683 | __ret = (uint16x8_t) __builtin_neon_vcvtaq_u16_v((int8x16_t)__rev0, 49); | 45144 | __ret = (float64x2_t) __builtin_neon_vcvt_f64_f32((int8x8_t)__rev0, 42); |
| 44684 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45145 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 45146 | return __ret; |
| | 45147 | } |
| | 45148 | __ai float64x2_t __noswap_vcvt_f64_f32(float32x2_t __p0) { |
| | 45149 | float64x2_t __ret; |
| | 45150 | __ret = (float64x2_t) __builtin_neon_vcvt_f64_f32((int8x8_t)__p0, 42); |
| 44685 | return __ret; | 45151 | return __ret; |
| 44686 | } | 45152 | } |
| 44687 | #endif | 45153 | #endif |
| 44688 | | 45154 | |
| 44689 | #ifdef __LITTLE_ENDIAN__ | 45155 | #ifdef __LITTLE_ENDIAN__ |
| 44690 | __ai uint16x4_t vcvta_u16_f16(float16x4_t __p0) { | 45156 | __ai float16x8_t vcvt_high_f16_f32(float16x4_t __p0, float32x4_t __p1) { |
| 44691 | uint16x4_t __ret; | 45157 | float16x8_t __ret; |
| 44692 | __ret = (uint16x4_t) __builtin_neon_vcvta_u16_v((int8x8_t)__p0, 17); | 45158 | __ret = vcombine_f16(__p0, vcvt_f16_f32(__p1)); |
| 44693 | return __ret; | 45159 | return __ret; |
| 44694 | } | 45160 | } |
| 44695 | #else | 45161 | #else |
| 44696 | __ai uint16x4_t vcvta_u16_f16(float16x4_t __p0) { | 45162 | __ai float16x8_t vcvt_high_f16_f32(float16x4_t __p0, float32x4_t __p1) { |
| 44697 | uint16x4_t __ret; | 45163 | float16x8_t __ret; |
| 44698 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45164 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 44699 | __ret = (uint16x4_t) __builtin_neon_vcvta_u16_v((int8x8_t)__rev0, 17); | 45165 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 44700 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45166 | __ret = __noswap_vcombine_f16(__rev0, __noswap_vcvt_f16_f32(__rev1)); |
| | 45167 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 44701 | return __ret; | 45168 | return __ret; |
| 44702 | } | 45169 | } |
| 44703 | #endif | 45170 | #endif |
| 44704 | | 45171 | |
| 44705 | #ifdef __LITTLE_ENDIAN__ | 45172 | #ifdef __LITTLE_ENDIAN__ |
| 44706 | __ai int16x8_t vcvtmq_s16_f16(float16x8_t __p0) { | 45173 | __ai float32x4_t vcvt_high_f32_f16(float16x8_t __p0) { |
| 44707 | int16x8_t __ret; | 45174 | float32x4_t __ret; |
| 44708 | __ret = (int16x8_t) __builtin_neon_vcvtmq_s16_v((int8x16_t)__p0, 33); | 45175 | __ret = vcvt_f32_f16(vget_high_f16(__p0)); |
| 44709 | return __ret; | 45176 | return __ret; |
| 44710 | } | 45177 | } |
| 44711 | #else | 45178 | #else |
| 44712 | __ai int16x8_t vcvtmq_s16_f16(float16x8_t __p0) { | 45179 | __ai float32x4_t vcvt_high_f32_f16(float16x8_t __p0) { |
| 44713 | int16x8_t __ret; | 45180 | float32x4_t __ret; |
| 44714 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45181 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 44715 | __ret = (int16x8_t) __builtin_neon_vcvtmq_s16_v((int8x16_t)__rev0, 33); | 45182 | __ret = __noswap_vcvt_f32_f16(__noswap_vget_high_f16(__rev0)); |
| 44716 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45183 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 44717 | return __ret; | 45184 | return __ret; |
| 44718 | } | 45185 | } |
| 44719 | #endif | 45186 | #endif |
| 44720 | | 45187 | |
| 44721 | #ifdef __LITTLE_ENDIAN__ | 45188 | #ifdef __LITTLE_ENDIAN__ |
| 44722 | __ai int16x4_t vcvtm_s16_f16(float16x4_t __p0) { | 45189 | __ai float32x4_t vcvt_high_f32_f64(float32x2_t __p0, float64x2_t __p1) { |
| 44723 | int16x4_t __ret; | 45190 | float32x4_t __ret; |
| 44724 | __ret = (int16x4_t) __builtin_neon_vcvtm_s16_v((int8x8_t)__p0, 1); | 45191 | __ret = vcombine_f32(__p0, vcvt_f32_f64(__p1)); |
| 44725 | return __ret; | 45192 | return __ret; |
| 44726 | } | 45193 | } |
| 44727 | #else | 45194 | #else |
| 44728 | __ai int16x4_t vcvtm_s16_f16(float16x4_t __p0) { | 45195 | __ai float32x4_t vcvt_high_f32_f64(float32x2_t __p0, float64x2_t __p1) { |
| 44729 | int16x4_t __ret; | 45196 | float32x4_t __ret; |
| 44730 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45197 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 44731 | __ret = (int16x4_t) __builtin_neon_vcvtm_s16_v((int8x8_t)__rev0, 1); | 45198 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 45199 | __ret = __noswap_vcombine_f32(__rev0, __noswap_vcvt_f32_f64(__rev1)); |
| 44732 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45200 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 44733 | return __ret; | 45201 | return __ret; |
| 44734 | } | 45202 | } |
| 44735 | #endif | 45203 | #endif |
| 44736 | | 45204 | |
| 44737 | #ifdef __LITTLE_ENDIAN__ | 45205 | #ifdef __LITTLE_ENDIAN__ |
| 44738 | __ai uint16x8_t vcvtmq_u16_f16(float16x8_t __p0) { | 45206 | __ai float64x2_t vcvt_high_f64_f32(float32x4_t __p0) { |
| 44739 | uint16x8_t __ret; | 45207 | float64x2_t __ret; |
| 44740 | __ret = (uint16x8_t) __builtin_neon_vcvtmq_u16_v((int8x16_t)__p0, 49); | 45208 | __ret = vcvt_f64_f32(vget_high_f32(__p0)); |
| 44741 | return __ret; | 45209 | return __ret; |
| 44742 | } | 45210 | } |
| 44743 | #else | 45211 | #else |
| 44744 | __ai uint16x8_t vcvtmq_u16_f16(float16x8_t __p0) { | 45212 | __ai float64x2_t vcvt_high_f64_f32(float32x4_t __p0) { |
| 44745 | uint16x8_t __ret; | 45213 | float64x2_t __ret; |
| 44746 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45214 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 44747 | __ret = (uint16x8_t) __builtin_neon_vcvtmq_u16_v((int8x16_t)__rev0, 49); | 45215 | __ret = __noswap_vcvt_f64_f32(__noswap_vget_high_f32(__rev0)); |
| 44748 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45216 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 44749 | return __ret; | 45217 | return __ret; |
| 44750 | } | 45218 | } |
| 44751 | #endif | 45219 | #endif |
| 44752 | | 45220 | |
| | 45221 | #define vcvts_n_f32_u32(__p0, __p1) __extension__ ({ \ |
| | 45222 | float32_t __ret; \ |
| | 45223 | uint32_t __s0 = __p0; \ |
| | 45224 | __ret = (float32_t) __builtin_neon_vcvts_n_f32_u32(__s0, __p1); \ |
| | 45225 | __ret; \ |
| | 45226 | }) |
| | 45227 | #define vcvts_n_f32_s32(__p0, __p1) __extension__ ({ \ |
| | 45228 | float32_t __ret; \ |
| | 45229 | int32_t __s0 = __p0; \ |
| | 45230 | __ret = (float32_t) __builtin_neon_vcvts_n_f32_s32(__s0, __p1); \ |
| | 45231 | __ret; \ |
| | 45232 | }) |
| 44753 | #ifdef __LITTLE_ENDIAN__ | 45233 | #ifdef __LITTLE_ENDIAN__ |
| 44754 | __ai uint16x4_t vcvtm_u16_f16(float16x4_t __p0) { | 45234 | #define vcvtq_n_f64_u64(__p0, __p1) __extension__ ({ \ |
| 44755 | uint16x4_t __ret; | 45235 | float64x2_t __ret; \ |
| 44756 | __ret = (uint16x4_t) __builtin_neon_vcvtm_u16_v((int8x8_t)__p0, 17); | 45236 | uint64x2_t __s0 = __p0; \ |
| 44757 | return __ret; | 45237 | __ret = (float64x2_t) __builtin_neon_vcvtq_n_f64_v((int8x16_t)__s0, __p1, 51); \ |
| 44758 | } | 45238 | __ret; \ |
| | 45239 | }) |
| 44759 | #else | 45240 | #else |
| 44760 | __ai uint16x4_t vcvtm_u16_f16(float16x4_t __p0) { | 45241 | #define vcvtq_n_f64_u64(__p0, __p1) __extension__ ({ \ |
| 44761 | uint16x4_t __ret; | 45242 | float64x2_t __ret; \ |
| 44762 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45243 | uint64x2_t __s0 = __p0; \ |
| 44763 | __ret = (uint16x4_t) __builtin_neon_vcvtm_u16_v((int8x8_t)__rev0, 17); | 45244 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 44764 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45245 | __ret = (float64x2_t) __builtin_neon_vcvtq_n_f64_v((int8x16_t)__rev0, __p1, 51); \ |
| 44765 | return __ret; | 45246 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 44766 | } | 45247 | __ret; \ |
| | 45248 | }) |
| 44767 | #endif | 45249 | #endif |
| 44768 | | 45250 | |
| 44769 | #ifdef __LITTLE_ENDIAN__ | 45251 | #ifdef __LITTLE_ENDIAN__ |
| 44770 | __ai int16x8_t vcvtnq_s16_f16(float16x8_t __p0) { | 45252 | #define vcvtq_n_f64_s64(__p0, __p1) __extension__ ({ \ |
| 44771 | int16x8_t __ret; | 45253 | float64x2_t __ret; \ |
| 44772 | __ret = (int16x8_t) __builtin_neon_vcvtnq_s16_v((int8x16_t)__p0, 33); | 45254 | int64x2_t __s0 = __p0; \ |
| 44773 | return __ret; | 45255 | __ret = (float64x2_t) __builtin_neon_vcvtq_n_f64_v((int8x16_t)__s0, __p1, 35); \ |
| 44774 | } | 45256 | __ret; \ |
| | 45257 | }) |
| 44775 | #else | 45258 | #else |
| 44776 | __ai int16x8_t vcvtnq_s16_f16(float16x8_t __p0) { | 45259 | #define vcvtq_n_f64_s64(__p0, __p1) __extension__ ({ \ |
| 44777 | int16x8_t __ret; | 45260 | float64x2_t __ret; \ |
| 44778 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45261 | int64x2_t __s0 = __p0; \ |
| 44779 | __ret = (int16x8_t) __builtin_neon_vcvtnq_s16_v((int8x16_t)__rev0, 33); | 45262 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 44780 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45263 | __ret = (float64x2_t) __builtin_neon_vcvtq_n_f64_v((int8x16_t)__rev0, __p1, 35); \ |
| 44781 | return __ret; | 45264 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 44782 | } | 45265 | __ret; \ |
| | 45266 | }) |
| | 45267 | #endif |
| | 45268 | |
| | 45269 | #define vcvt_n_f64_u64(__p0, __p1) __extension__ ({ \ |
| | 45270 | float64x1_t __ret; \ |
| | 45271 | uint64x1_t __s0 = __p0; \ |
| | 45272 | __ret = (float64x1_t) __builtin_neon_vcvt_n_f64_v((int8x8_t)__s0, __p1, 19); \ |
| | 45273 | __ret; \ |
| | 45274 | }) |
| | 45275 | #define vcvt_n_f64_s64(__p0, __p1) __extension__ ({ \ |
| | 45276 | float64x1_t __ret; \ |
| | 45277 | int64x1_t __s0 = __p0; \ |
| | 45278 | __ret = (float64x1_t) __builtin_neon_vcvt_n_f64_v((int8x8_t)__s0, __p1, 3); \ |
| | 45279 | __ret; \ |
| | 45280 | }) |
| | 45281 | #define vcvtd_n_f64_u64(__p0, __p1) __extension__ ({ \ |
| | 45282 | float64_t __ret; \ |
| | 45283 | uint64_t __s0 = __p0; \ |
| | 45284 | __ret = (float64_t) __builtin_neon_vcvtd_n_f64_u64(__s0, __p1); \ |
| | 45285 | __ret; \ |
| | 45286 | }) |
| | 45287 | #define vcvtd_n_f64_s64(__p0, __p1) __extension__ ({ \ |
| | 45288 | float64_t __ret; \ |
| | 45289 | int64_t __s0 = __p0; \ |
| | 45290 | __ret = (float64_t) __builtin_neon_vcvtd_n_f64_s64(__s0, __p1); \ |
| | 45291 | __ret; \ |
| | 45292 | }) |
| | 45293 | #define vcvts_n_s32_f32(__p0, __p1) __extension__ ({ \ |
| | 45294 | int32_t __ret; \ |
| | 45295 | float32_t __s0 = __p0; \ |
| | 45296 | __ret = (int32_t) __builtin_neon_vcvts_n_s32_f32(__s0, __p1); \ |
| | 45297 | __ret; \ |
| | 45298 | }) |
| | 45299 | #ifdef __LITTLE_ENDIAN__ |
| | 45300 | #define vcvtq_n_s64_f64(__p0, __p1) __extension__ ({ \ |
| | 45301 | int64x2_t __ret; \ |
| | 45302 | float64x2_t __s0 = __p0; \ |
| | 45303 | __ret = (int64x2_t) __builtin_neon_vcvtq_n_s64_v((int8x16_t)__s0, __p1, 35); \ |
| | 45304 | __ret; \ |
| | 45305 | }) |
| | 45306 | #else |
| | 45307 | #define vcvtq_n_s64_f64(__p0, __p1) __extension__ ({ \ |
| | 45308 | int64x2_t __ret; \ |
| | 45309 | float64x2_t __s0 = __p0; \ |
| | 45310 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| | 45311 | __ret = (int64x2_t) __builtin_neon_vcvtq_n_s64_v((int8x16_t)__rev0, __p1, 35); \ |
| | 45312 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| | 45313 | __ret; \ |
| | 45314 | }) |
| 44783 | #endif | 45315 | #endif |
| 44784 | | 45316 | |
| | 45317 | #define vcvt_n_s64_f64(__p0, __p1) __extension__ ({ \ |
| | 45318 | int64x1_t __ret; \ |
| | 45319 | float64x1_t __s0 = __p0; \ |
| | 45320 | __ret = (int64x1_t) __builtin_neon_vcvt_n_s64_v((int8x8_t)__s0, __p1, 3); \ |
| | 45321 | __ret; \ |
| | 45322 | }) |
| | 45323 | #define vcvtd_n_s64_f64(__p0, __p1) __extension__ ({ \ |
| | 45324 | int64_t __ret; \ |
| | 45325 | float64_t __s0 = __p0; \ |
| | 45326 | __ret = (int64_t) __builtin_neon_vcvtd_n_s64_f64(__s0, __p1); \ |
| | 45327 | __ret; \ |
| | 45328 | }) |
| | 45329 | #define vcvts_n_u32_f32(__p0, __p1) __extension__ ({ \ |
| | 45330 | uint32_t __ret; \ |
| | 45331 | float32_t __s0 = __p0; \ |
| | 45332 | __ret = (uint32_t) __builtin_neon_vcvts_n_u32_f32(__s0, __p1); \ |
| | 45333 | __ret; \ |
| | 45334 | }) |
| 44785 | #ifdef __LITTLE_ENDIAN__ | 45335 | #ifdef __LITTLE_ENDIAN__ |
| 44786 | __ai int16x4_t vcvtn_s16_f16(float16x4_t __p0) { | 45336 | #define vcvtq_n_u64_f64(__p0, __p1) __extension__ ({ \ |
| 44787 | int16x4_t __ret; | 45337 | uint64x2_t __ret; \ |
| 44788 | __ret = (int16x4_t) __builtin_neon_vcvtn_s16_v((int8x8_t)__p0, 1); | 45338 | float64x2_t __s0 = __p0; \ |
| | 45339 | __ret = (uint64x2_t) __builtin_neon_vcvtq_n_u64_v((int8x16_t)__s0, __p1, 51); \ |
| | 45340 | __ret; \ |
| | 45341 | }) |
| | 45342 | #else |
| | 45343 | #define vcvtq_n_u64_f64(__p0, __p1) __extension__ ({ \ |
| | 45344 | uint64x2_t __ret; \ |
| | 45345 | float64x2_t __s0 = __p0; \ |
| | 45346 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| | 45347 | __ret = (uint64x2_t) __builtin_neon_vcvtq_n_u64_v((int8x16_t)__rev0, __p1, 51); \ |
| | 45348 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| | 45349 | __ret; \ |
| | 45350 | }) |
| | 45351 | #endif |
| | 45352 | |
| | 45353 | #define vcvt_n_u64_f64(__p0, __p1) __extension__ ({ \ |
| | 45354 | uint64x1_t __ret; \ |
| | 45355 | float64x1_t __s0 = __p0; \ |
| | 45356 | __ret = (uint64x1_t) __builtin_neon_vcvt_n_u64_v((int8x8_t)__s0, __p1, 19); \ |
| | 45357 | __ret; \ |
| | 45358 | }) |
| | 45359 | #define vcvtd_n_u64_f64(__p0, __p1) __extension__ ({ \ |
| | 45360 | uint64_t __ret; \ |
| | 45361 | float64_t __s0 = __p0; \ |
| | 45362 | __ret = (uint64_t) __builtin_neon_vcvtd_n_u64_f64(__s0, __p1); \ |
| | 45363 | __ret; \ |
| | 45364 | }) |
| | 45365 | __ai int32_t vcvts_s32_f32(float32_t __p0) { |
| | 45366 | int32_t __ret; |
| | 45367 | __ret = (int32_t) __builtin_neon_vcvts_s32_f32(__p0); |
| 44789 | return __ret; | 45368 | return __ret; |
| 44790 | } | 45369 | } |
| 44791 | #else | 45370 | __ai int64_t vcvtd_s64_f64(float64_t __p0) { |
| 44792 | __ai int16x4_t vcvtn_s16_f16(float16x4_t __p0) { | 45371 | int64_t __ret; |
| 44793 | int16x4_t __ret; | 45372 | __ret = (int64_t) __builtin_neon_vcvtd_s64_f64(__p0); |
| 44794 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 44795 | __ret = (int16x4_t) __builtin_neon_vcvtn_s16_v((int8x8_t)__rev0, 1); | | |
| 44796 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 44797 | return __ret; | 45373 | return __ret; |
| 44798 | } | 45374 | } |
| 44799 | #endif | | |
| 44800 | | | |
| 44801 | #ifdef __LITTLE_ENDIAN__ | 45375 | #ifdef __LITTLE_ENDIAN__ |
| 44802 | __ai uint16x8_t vcvtnq_u16_f16(float16x8_t __p0) { | 45376 | __ai int64x2_t vcvtq_s64_f64(float64x2_t __p0) { |
| 44803 | uint16x8_t __ret; | 45377 | int64x2_t __ret; |
| 44804 | __ret = (uint16x8_t) __builtin_neon_vcvtnq_u16_v((int8x16_t)__p0, 49); | 45378 | __ret = (int64x2_t) __builtin_neon_vcvtq_s64_v((int8x16_t)__p0, 35); |
| 44805 | return __ret; | 45379 | return __ret; |
| 44806 | } | 45380 | } |
| 44807 | #else | 45381 | #else |
| 44808 | __ai uint16x8_t vcvtnq_u16_f16(float16x8_t __p0) { | 45382 | __ai int64x2_t vcvtq_s64_f64(float64x2_t __p0) { |
| 44809 | uint16x8_t __ret; | 45383 | int64x2_t __ret; |
| 44810 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45384 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 44811 | __ret = (uint16x8_t) __builtin_neon_vcvtnq_u16_v((int8x16_t)__rev0, 49); | 45385 | __ret = (int64x2_t) __builtin_neon_vcvtq_s64_v((int8x16_t)__rev0, 35); |
| 44812 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45386 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 44813 | return __ret; | 45387 | return __ret; |
| 44814 | } | 45388 | } |
| 44815 | #endif | 45389 | #endif |
| 44816 | | 45390 | |
| 44817 | #ifdef __LITTLE_ENDIAN__ | 45391 | __ai int64x1_t vcvt_s64_f64(float64x1_t __p0) { |
| 44818 | __ai uint16x4_t vcvtn_u16_f16(float16x4_t __p0) { | 45392 | int64x1_t __ret; |
| 44819 | uint16x4_t __ret; | 45393 | __ret = (int64x1_t) __builtin_neon_vcvt_s64_v((int8x8_t)__p0, 3); |
| 44820 | __ret = (uint16x4_t) __builtin_neon_vcvtn_u16_v((int8x8_t)__p0, 17); | | |
| 44821 | return __ret; | 45394 | return __ret; |
| 44822 | } | 45395 | } |
| 44823 | #else | 45396 | __ai uint32_t vcvts_u32_f32(float32_t __p0) { |
| 44824 | __ai uint16x4_t vcvtn_u16_f16(float16x4_t __p0) { | 45397 | uint32_t __ret; |
| 44825 | uint16x4_t __ret; | 45398 | __ret = (uint32_t) __builtin_neon_vcvts_u32_f32(__p0); |
| 44826 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45399 | return __ret; |
| 44827 | __ret = (uint16x4_t) __builtin_neon_vcvtn_u16_v((int8x8_t)__rev0, 17); | 45400 | } |
| 44828 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45401 | __ai uint64_t vcvtd_u64_f64(float64_t __p0) { |
| | 45402 | uint64_t __ret; |
| | 45403 | __ret = (uint64_t) __builtin_neon_vcvtd_u64_f64(__p0); |
| 44829 | return __ret; | 45404 | return __ret; |
| 44830 | } | 45405 | } |
| 44831 | #endif | | |
| 44832 | | | |
| 44833 | #ifdef __LITTLE_ENDIAN__ | 45406 | #ifdef __LITTLE_ENDIAN__ |
| 44834 | __ai int16x8_t vcvtpq_s16_f16(float16x8_t __p0) { | 45407 | __ai uint64x2_t vcvtq_u64_f64(float64x2_t __p0) { |
| 44835 | int16x8_t __ret; | 45408 | uint64x2_t __ret; |
| 44836 | __ret = (int16x8_t) __builtin_neon_vcvtpq_s16_v((int8x16_t)__p0, 33); | 45409 | __ret = (uint64x2_t) __builtin_neon_vcvtq_u64_v((int8x16_t)__p0, 51); |
| 44837 | return __ret; | 45410 | return __ret; |
| 44838 | } | 45411 | } |
| 44839 | #else | 45412 | #else |
| 44840 | __ai int16x8_t vcvtpq_s16_f16(float16x8_t __p0) { | 45413 | __ai uint64x2_t vcvtq_u64_f64(float64x2_t __p0) { |
| 44841 | int16x8_t __ret; | 45414 | uint64x2_t __ret; |
| 44842 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45415 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 44843 | __ret = (int16x8_t) __builtin_neon_vcvtpq_s16_v((int8x16_t)__rev0, 33); | 45416 | __ret = (uint64x2_t) __builtin_neon_vcvtq_u64_v((int8x16_t)__rev0, 51); |
| 44844 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45417 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 44845 | return __ret; | 45418 | return __ret; |
| 44846 | } | 45419 | } |
| 44847 | #endif | 45420 | #endif |
| 44848 | | 45421 | |
| 44849 | #ifdef __LITTLE_ENDIAN__ | 45422 | __ai uint64x1_t vcvt_u64_f64(float64x1_t __p0) { |
| 44850 | __ai int16x4_t vcvtp_s16_f16(float16x4_t __p0) { | 45423 | uint64x1_t __ret; |
| 44851 | int16x4_t __ret; | 45424 | __ret = (uint64x1_t) __builtin_neon_vcvt_u64_v((int8x8_t)__p0, 19); |
| 44852 | __ret = (int16x4_t) __builtin_neon_vcvtp_s16_v((int8x8_t)__p0, 1); | | |
| 44853 | return __ret; | 45425 | return __ret; |
| 44854 | } | 45426 | } |
| 44855 | #else | 45427 | __ai int32_t vcvtas_s32_f32(float32_t __p0) { |
| 44856 | __ai int16x4_t vcvtp_s16_f16(float16x4_t __p0) { | 45428 | int32_t __ret; |
| 44857 | int16x4_t __ret; | 45429 | __ret = (int32_t) __builtin_neon_vcvtas_s32_f32(__p0); |
| 44858 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 44859 | __ret = (int16x4_t) __builtin_neon_vcvtp_s16_v((int8x8_t)__rev0, 1); | | |
| 44860 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 44861 | return __ret; | 45430 | return __ret; |
| 44862 | } | 45431 | } |
| 44863 | #endif | | |
| 44864 | | | |
| 44865 | #ifdef __LITTLE_ENDIAN__ | 45432 | #ifdef __LITTLE_ENDIAN__ |
| 44866 | __ai uint16x8_t vcvtpq_u16_f16(float16x8_t __p0) { | 45433 | __ai int64x2_t vcvtaq_s64_f64(float64x2_t __p0) { |
| 44867 | uint16x8_t __ret; | 45434 | int64x2_t __ret; |
| 44868 | __ret = (uint16x8_t) __builtin_neon_vcvtpq_u16_v((int8x16_t)__p0, 49); | 45435 | __ret = (int64x2_t) __builtin_neon_vcvtaq_s64_v((int8x16_t)__p0, 35); |
| 44869 | return __ret; | 45436 | return __ret; |
| 44870 | } | 45437 | } |
| 44871 | #else | 45438 | #else |
| 44872 | __ai uint16x8_t vcvtpq_u16_f16(float16x8_t __p0) { | 45439 | __ai int64x2_t vcvtaq_s64_f64(float64x2_t __p0) { |
| 44873 | uint16x8_t __ret; | 45440 | int64x2_t __ret; |
| 44874 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45441 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 44875 | __ret = (uint16x8_t) __builtin_neon_vcvtpq_u16_v((int8x16_t)__rev0, 49); | 45442 | __ret = (int64x2_t) __builtin_neon_vcvtaq_s64_v((int8x16_t)__rev0, 35); |
| 44876 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45443 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 44877 | return __ret; | 45444 | return __ret; |
| 44878 | } | 45445 | } |
| 44879 | #endif | 45446 | #endif |
| 44880 | | 45447 | |
| 44881 | #ifdef __LITTLE_ENDIAN__ | 45448 | __ai int64x1_t vcvta_s64_f64(float64x1_t __p0) { |
| 44882 | __ai uint16x4_t vcvtp_u16_f16(float16x4_t __p0) { | 45449 | int64x1_t __ret; |
| 44883 | uint16x4_t __ret; | 45450 | __ret = (int64x1_t) __builtin_neon_vcvta_s64_v((int8x8_t)__p0, 3); |
| 44884 | __ret = (uint16x4_t) __builtin_neon_vcvtp_u16_v((int8x8_t)__p0, 17); | | |
| 44885 | return __ret; | 45451 | return __ret; |
| 44886 | } | 45452 | } |
| 44887 | #else | 45453 | __ai int64_t vcvtad_s64_f64(float64_t __p0) { |
| 44888 | __ai uint16x4_t vcvtp_u16_f16(float16x4_t __p0) { | 45454 | int64_t __ret; |
| 44889 | uint16x4_t __ret; | 45455 | __ret = (int64_t) __builtin_neon_vcvtad_s64_f64(__p0); |
| 44890 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45456 | return __ret; |
| 44891 | __ret = (uint16x4_t) __builtin_neon_vcvtp_u16_v((int8x8_t)__rev0, 17); | 45457 | } |
| 44892 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45458 | __ai uint32_t vcvtas_u32_f32(float32_t __p0) { |
| | 45459 | uint32_t __ret; |
| | 45460 | __ret = (uint32_t) __builtin_neon_vcvtas_u32_f32(__p0); |
| 44893 | return __ret; | 45461 | return __ret; |
| 44894 | } | 45462 | } |
| 44895 | #endif | | |
| 44896 | | | |
| 44897 | #ifdef __LITTLE_ENDIAN__ | | |
| 44898 | #define vextq_f16(__p0, __p1, __p2) __extension__ ({ \ | | |
| 44899 | float16x8_t __ret; \ | | |
| 44900 | float16x8_t __s0 = __p0; \ | | |
| 44901 | float16x8_t __s1 = __p1; \ | | |
| 44902 | __ret = (float16x8_t) __builtin_neon_vextq_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 40); \ | | |
| 44903 | __ret; \ | | |
| 44904 | }) | | |
| 44905 | #else | | |
| 44906 | #define vextq_f16(__p0, __p1, __p2) __extension__ ({ \ | | |
| 44907 | float16x8_t __ret; \ | | |
| 44908 | float16x8_t __s0 = __p0; \ | | |
| 44909 | float16x8_t __s1 = __p1; \ | | |
| 44910 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 44911 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 44912 | __ret = (float16x8_t) __builtin_neon_vextq_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 40); \ | | |
| 44913 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 44914 | __ret; \ | | |
| 44915 | }) | | |
| 44916 | #endif | | |
| 44917 | | | |
| 44918 | #ifdef __LITTLE_ENDIAN__ | 45463 | #ifdef __LITTLE_ENDIAN__ |
| 44919 | #define vext_f16(__p0, __p1, __p2) __extension__ ({ \ | 45464 | __ai uint64x2_t vcvtaq_u64_f64(float64x2_t __p0) { |
| 44920 | float16x4_t __ret; \ | 45465 | uint64x2_t __ret; |
| 44921 | float16x4_t __s0 = __p0; \ | 45466 | __ret = (uint64x2_t) __builtin_neon_vcvtaq_u64_v((int8x16_t)__p0, 51); |
| 44922 | float16x4_t __s1 = __p1; \ | 45467 | return __ret; |
| 44923 | __ret = (float16x4_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 8); \ | 45468 | } |
| 44924 | __ret; \ | | |
| 44925 | }) | | |
| 44926 | #else | 45469 | #else |
| 44927 | #define vext_f16(__p0, __p1, __p2) __extension__ ({ \ | 45470 | __ai uint64x2_t vcvtaq_u64_f64(float64x2_t __p0) { |
| 44928 | float16x4_t __ret; \ | 45471 | uint64x2_t __ret; |
| 44929 | float16x4_t __s0 = __p0; \ | 45472 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 44930 | float16x4_t __s1 = __p1; \ | 45473 | __ret = (uint64x2_t) __builtin_neon_vcvtaq_u64_v((int8x16_t)__rev0, 51); |
| 44931 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 45474 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 44932 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 45475 | return __ret; |
| 44933 | __ret = (float16x4_t) __builtin_neon_vext_v((int8x8_t)__rev0, (int8x8_t)__rev1, __p2, 8); \ | 45476 | } |
| 44934 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | | |
| 44935 | __ret; \ | | |
| 44936 | }) | | |
| 44937 | #endif | 45477 | #endif |
| 44938 | | 45478 | |
| 44939 | #ifdef __LITTLE_ENDIAN__ | 45479 | __ai uint64x1_t vcvta_u64_f64(float64x1_t __p0) { |
| 44940 | __ai float16x8_t vfmaq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | 45480 | uint64x1_t __ret; |
| 44941 | float16x8_t __ret; | 45481 | __ret = (uint64x1_t) __builtin_neon_vcvta_u64_v((int8x8_t)__p0, 19); |
| 44942 | __ret = (float16x8_t) __builtin_neon_vfmaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); | | |
| 44943 | return __ret; | 45482 | return __ret; |
| 44944 | } | 45483 | } |
| 44945 | #else | 45484 | __ai uint64_t vcvtad_u64_f64(float64_t __p0) { |
| 44946 | __ai float16x8_t vfmaq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | 45485 | uint64_t __ret; |
| 44947 | float16x8_t __ret; | 45486 | __ret = (uint64_t) __builtin_neon_vcvtad_u64_f64(__p0); |
| 44948 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45487 | return __ret; |
| 44949 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 45488 | } |
| 44950 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 45489 | __ai int32_t vcvtms_s32_f32(float32_t __p0) { |
| 44951 | __ret = (float16x8_t) __builtin_neon_vfmaq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 40); | 45490 | int32_t __ret; |
| 44952 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45491 | __ret = (int32_t) __builtin_neon_vcvtms_s32_f32(__p0); |
| | 45492 | return __ret; |
| | 45493 | } |
| | 45494 | #ifdef __LITTLE_ENDIAN__ |
| | 45495 | __ai int64x2_t vcvtmq_s64_f64(float64x2_t __p0) { |
| | 45496 | int64x2_t __ret; |
| | 45497 | __ret = (int64x2_t) __builtin_neon_vcvtmq_s64_v((int8x16_t)__p0, 35); |
| 44953 | return __ret; | 45498 | return __ret; |
| 44954 | } | 45499 | } |
| 44955 | __ai float16x8_t __noswap_vfmaq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | 45500 | #else |
| 44956 | float16x8_t __ret; | 45501 | __ai int64x2_t vcvtmq_s64_f64(float64x2_t __p0) { |
| 44957 | __ret = (float16x8_t) __builtin_neon_vfmaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); | 45502 | int64x2_t __ret; |
| | 45503 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 45504 | __ret = (int64x2_t) __builtin_neon_vcvtmq_s64_v((int8x16_t)__rev0, 35); |
| | 45505 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 44958 | return __ret; | 45506 | return __ret; |
| 44959 | } | 45507 | } |
| 44960 | #endif | 45508 | #endif |
| 44961 | | 45509 | |
| 44962 | #ifdef __LITTLE_ENDIAN__ | 45510 | __ai int64x1_t vcvtm_s64_f64(float64x1_t __p0) { |
| 44963 | __ai float16x4_t vfma_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 45511 | int64x1_t __ret; |
| 44964 | float16x4_t __ret; | 45512 | __ret = (int64x1_t) __builtin_neon_vcvtm_s64_v((int8x8_t)__p0, 3); |
| 44965 | __ret = (float16x4_t) __builtin_neon_vfma_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); | | |
| 44966 | return __ret; | 45513 | return __ret; |
| 44967 | } | 45514 | } |
| 44968 | #else | 45515 | __ai int64_t vcvtmd_s64_f64(float64_t __p0) { |
| 44969 | __ai float16x4_t vfma_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 45516 | int64_t __ret; |
| 44970 | float16x4_t __ret; | 45517 | __ret = (int64_t) __builtin_neon_vcvtmd_s64_f64(__p0); |
| 44971 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 44972 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 44973 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | | |
| 44974 | __ret = (float16x4_t) __builtin_neon_vfma_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 8); | | |
| 44975 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 44976 | return __ret; | 45518 | return __ret; |
| 44977 | } | 45519 | } |
| 44978 | __ai float16x4_t __noswap_vfma_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 45520 | __ai uint32_t vcvtms_u32_f32(float32_t __p0) { |
| 44979 | float16x4_t __ret; | 45521 | uint32_t __ret; |
| 44980 | __ret = (float16x4_t) __builtin_neon_vfma_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); | 45522 | __ret = (uint32_t) __builtin_neon_vcvtms_u32_f32(__p0); |
| 44981 | return __ret; | 45523 | return __ret; |
| 44982 | } | 45524 | } |
| 44983 | #endif | | |
| 44984 | | | |
| 44985 | #ifdef __LITTLE_ENDIAN__ | 45525 | #ifdef __LITTLE_ENDIAN__ |
| 44986 | __ai float16x8_t vfmsq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | 45526 | __ai uint64x2_t vcvtmq_u64_f64(float64x2_t __p0) { |
| 44987 | float16x8_t __ret; | 45527 | uint64x2_t __ret; |
| 44988 | __ret = vfmaq_f16(__p0, -__p1, __p2); | 45528 | __ret = (uint64x2_t) __builtin_neon_vcvtmq_u64_v((int8x16_t)__p0, 51); |
| 44989 | return __ret; | 45529 | return __ret; |
| 44990 | } | 45530 | } |
| 44991 | #else | 45531 | #else |
| 44992 | __ai float16x8_t vfmsq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { | 45532 | __ai uint64x2_t vcvtmq_u64_f64(float64x2_t __p0) { |
| 44993 | float16x8_t __ret; | 45533 | uint64x2_t __ret; |
| 44994 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45534 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 44995 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 45535 | __ret = (uint64x2_t) __builtin_neon_vcvtmq_u64_v((int8x16_t)__rev0, 51); |
| 44996 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 45536 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 44997 | __ret = __noswap_vfmaq_f16(__rev0, -__rev1, __rev2); | | |
| 44998 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 44999 | return __ret; | 45537 | return __ret; |
| 45000 | } | 45538 | } |
| 45001 | #endif | 45539 | #endif |
| 45002 | | 45540 | |
| 45003 | #ifdef __LITTLE_ENDIAN__ | 45541 | __ai uint64x1_t vcvtm_u64_f64(float64x1_t __p0) { |
| 45004 | __ai float16x4_t vfms_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 45542 | uint64x1_t __ret; |
| 45005 | float16x4_t __ret; | 45543 | __ret = (uint64x1_t) __builtin_neon_vcvtm_u64_v((int8x8_t)__p0, 19); |
| 45006 | __ret = vfma_f16(__p0, -__p1, __p2); | | |
| 45007 | return __ret; | 45544 | return __ret; |
| 45008 | } | 45545 | } |
| 45009 | #else | 45546 | __ai uint64_t vcvtmd_u64_f64(float64_t __p0) { |
| 45010 | __ai float16x4_t vfms_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { | 45547 | uint64_t __ret; |
| 45011 | float16x4_t __ret; | 45548 | __ret = (uint64_t) __builtin_neon_vcvtmd_u64_f64(__p0); |
| 45012 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45549 | return __ret; |
| 45013 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 45550 | } |
| 45014 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 45551 | __ai int32_t vcvtns_s32_f32(float32_t __p0) { |
| 45015 | __ret = __noswap_vfma_f16(__rev0, -__rev1, __rev2); | 45552 | int32_t __ret; |
| 45016 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45553 | __ret = (int32_t) __builtin_neon_vcvtns_s32_f32(__p0); |
| 45017 | return __ret; | 45554 | return __ret; |
| 45018 | } | 45555 | } |
| 45019 | #endif | | |
| 45020 | | | |
| 45021 | #ifdef __LITTLE_ENDIAN__ | 45556 | #ifdef __LITTLE_ENDIAN__ |
| 45022 | __ai float16x8_t vmaxq_f16(float16x8_t __p0, float16x8_t __p1) { | 45557 | __ai int64x2_t vcvtnq_s64_f64(float64x2_t __p0) { |
| 45023 | float16x8_t __ret; | 45558 | int64x2_t __ret; |
| 45024 | __ret = (float16x8_t) __builtin_neon_vmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | 45559 | __ret = (int64x2_t) __builtin_neon_vcvtnq_s64_v((int8x16_t)__p0, 35); |
| 45025 | return __ret; | 45560 | return __ret; |
| 45026 | } | 45561 | } |
| 45027 | #else | 45562 | #else |
| 45028 | __ai float16x8_t vmaxq_f16(float16x8_t __p0, float16x8_t __p1) { | 45563 | __ai int64x2_t vcvtnq_s64_f64(float64x2_t __p0) { |
| 45029 | float16x8_t __ret; | 45564 | int64x2_t __ret; |
| 45030 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45565 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 45031 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 45566 | __ret = (int64x2_t) __builtin_neon_vcvtnq_s64_v((int8x16_t)__rev0, 35); |
| 45032 | __ret = (float16x8_t) __builtin_neon_vmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 45567 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 45033 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 45034 | return __ret; | 45568 | return __ret; |
| 45035 | } | 45569 | } |
| 45036 | #endif | 45570 | #endif |
| 45037 | | 45571 | |
| 45038 | #ifdef __LITTLE_ENDIAN__ | 45572 | __ai int64x1_t vcvtn_s64_f64(float64x1_t __p0) { |
| 45039 | __ai float16x4_t vmax_f16(float16x4_t __p0, float16x4_t __p1) { | 45573 | int64x1_t __ret; |
| 45040 | float16x4_t __ret; | 45574 | __ret = (int64x1_t) __builtin_neon_vcvtn_s64_v((int8x8_t)__p0, 3); |
| 45041 | __ret = (float16x4_t) __builtin_neon_vmax_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | | |
| 45042 | return __ret; | 45575 | return __ret; |
| 45043 | } | 45576 | } |
| 45044 | #else | 45577 | __ai int64_t vcvtnd_s64_f64(float64_t __p0) { |
| 45045 | __ai float16x4_t vmax_f16(float16x4_t __p0, float16x4_t __p1) { | 45578 | int64_t __ret; |
| 45046 | float16x4_t __ret; | 45579 | __ret = (int64_t) __builtin_neon_vcvtnd_s64_f64(__p0); |
| 45047 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45580 | return __ret; |
| 45048 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 45581 | } |
| 45049 | __ret = (float16x4_t) __builtin_neon_vmax_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); | 45582 | __ai uint32_t vcvtns_u32_f32(float32_t __p0) { |
| 45050 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45583 | uint32_t __ret; |
| | 45584 | __ret = (uint32_t) __builtin_neon_vcvtns_u32_f32(__p0); |
| 45051 | return __ret; | 45585 | return __ret; |
| 45052 | } | 45586 | } |
| 45053 | #endif | | |
| 45054 | | | |
| 45055 | #ifdef __LITTLE_ENDIAN__ | 45587 | #ifdef __LITTLE_ENDIAN__ |
| 45056 | __ai float16x8_t vminq_f16(float16x8_t __p0, float16x8_t __p1) { | 45588 | __ai uint64x2_t vcvtnq_u64_f64(float64x2_t __p0) { |
| 45057 | float16x8_t __ret; | 45589 | uint64x2_t __ret; |
| 45058 | __ret = (float16x8_t) __builtin_neon_vminq_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | 45590 | __ret = (uint64x2_t) __builtin_neon_vcvtnq_u64_v((int8x16_t)__p0, 51); |
| 45059 | return __ret; | 45591 | return __ret; |
| 45060 | } | 45592 | } |
| 45061 | #else | 45593 | #else |
| 45062 | __ai float16x8_t vminq_f16(float16x8_t __p0, float16x8_t __p1) { | 45594 | __ai uint64x2_t vcvtnq_u64_f64(float64x2_t __p0) { |
| 45063 | float16x8_t __ret; | 45595 | uint64x2_t __ret; |
| 45064 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45596 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 45065 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 45597 | __ret = (uint64x2_t) __builtin_neon_vcvtnq_u64_v((int8x16_t)__rev0, 51); |
| 45066 | __ret = (float16x8_t) __builtin_neon_vminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 45598 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 45067 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 45068 | return __ret; | 45599 | return __ret; |
| 45069 | } | 45600 | } |
| 45070 | #endif | 45601 | #endif |
| 45071 | | 45602 | |
| 45072 | #ifdef __LITTLE_ENDIAN__ | 45603 | __ai uint64x1_t vcvtn_u64_f64(float64x1_t __p0) { |
| 45073 | __ai float16x4_t vmin_f16(float16x4_t __p0, float16x4_t __p1) { | 45604 | uint64x1_t __ret; |
| 45074 | float16x4_t __ret; | 45605 | __ret = (uint64x1_t) __builtin_neon_vcvtn_u64_v((int8x8_t)__p0, 19); |
| 45075 | __ret = (float16x4_t) __builtin_neon_vmin_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | | |
| 45076 | return __ret; | 45606 | return __ret; |
| 45077 | } | 45607 | } |
| 45078 | #else | 45608 | __ai uint64_t vcvtnd_u64_f64(float64_t __p0) { |
| 45079 | __ai float16x4_t vmin_f16(float16x4_t __p0, float16x4_t __p1) { | 45609 | uint64_t __ret; |
| 45080 | float16x4_t __ret; | 45610 | __ret = (uint64_t) __builtin_neon_vcvtnd_u64_f64(__p0); |
| 45081 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45611 | return __ret; |
| 45082 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 45612 | } |
| 45083 | __ret = (float16x4_t) __builtin_neon_vmin_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); | 45613 | __ai int32_t vcvtps_s32_f32(float32_t __p0) { |
| 45084 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45614 | int32_t __ret; |
| | 45615 | __ret = (int32_t) __builtin_neon_vcvtps_s32_f32(__p0); |
| 45085 | return __ret; | 45616 | return __ret; |
| 45086 | } | 45617 | } |
| 45087 | #endif | | |
| 45088 | | | |
| 45089 | #ifdef __LITTLE_ENDIAN__ | 45618 | #ifdef __LITTLE_ENDIAN__ |
| 45090 | __ai float16x8_t vmulq_f16(float16x8_t __p0, float16x8_t __p1) { | 45619 | __ai int64x2_t vcvtpq_s64_f64(float64x2_t __p0) { |
| 45091 | float16x8_t __ret; | 45620 | int64x2_t __ret; |
| 45092 | __ret = __p0 * __p1; | 45621 | __ret = (int64x2_t) __builtin_neon_vcvtpq_s64_v((int8x16_t)__p0, 35); |
| 45093 | return __ret; | 45622 | return __ret; |
| 45094 | } | 45623 | } |
| 45095 | #else | 45624 | #else |
| 45096 | __ai float16x8_t vmulq_f16(float16x8_t __p0, float16x8_t __p1) { | 45625 | __ai int64x2_t vcvtpq_s64_f64(float64x2_t __p0) { |
| 45097 | float16x8_t __ret; | 45626 | int64x2_t __ret; |
| 45098 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45627 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 45099 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 45628 | __ret = (int64x2_t) __builtin_neon_vcvtpq_s64_v((int8x16_t)__rev0, 35); |
| 45100 | __ret = __rev0 * __rev1; | 45629 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 45101 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 45102 | return __ret; | 45630 | return __ret; |
| 45103 | } | 45631 | } |
| 45104 | #endif | 45632 | #endif |
| 45105 | | 45633 | |
| 45106 | #ifdef __LITTLE_ENDIAN__ | 45634 | __ai int64x1_t vcvtp_s64_f64(float64x1_t __p0) { |
| 45107 | __ai float16x4_t vmul_f16(float16x4_t __p0, float16x4_t __p1) { | 45635 | int64x1_t __ret; |
| 45108 | float16x4_t __ret; | 45636 | __ret = (int64x1_t) __builtin_neon_vcvtp_s64_v((int8x8_t)__p0, 3); |
| 45109 | __ret = __p0 * __p1; | | |
| 45110 | return __ret; | 45637 | return __ret; |
| 45111 | } | 45638 | } |
| 45112 | #else | 45639 | __ai int64_t vcvtpd_s64_f64(float64_t __p0) { |
| 45113 | __ai float16x4_t vmul_f16(float16x4_t __p0, float16x4_t __p1) { | 45640 | int64_t __ret; |
| 45114 | float16x4_t __ret; | 45641 | __ret = (int64_t) __builtin_neon_vcvtpd_s64_f64(__p0); |
| 45115 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45642 | return __ret; |
| 45116 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 45643 | } |
| 45117 | __ret = __rev0 * __rev1; | 45644 | __ai uint32_t vcvtps_u32_f32(float32_t __p0) { |
| 45118 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45645 | uint32_t __ret; |
| | 45646 | __ret = (uint32_t) __builtin_neon_vcvtps_u32_f32(__p0); |
| 45119 | return __ret; | 45647 | return __ret; |
| 45120 | } | 45648 | } |
| 45121 | #endif | | |
| 45122 | | | |
| 45123 | #ifdef __LITTLE_ENDIAN__ | | |
| 45124 | #define vmulq_lane_f16(__p0_277, __p1_277, __p2_277) __extension__ ({ \ | | |
| 45125 | float16x8_t __ret_277; \ | | |
| 45126 | float16x8_t __s0_277 = __p0_277; \ | | |
| 45127 | float16x4_t __s1_277 = __p1_277; \ | | |
| 45128 | __ret_277 = __s0_277 * splatq_lane_f16(__s1_277, __p2_277); \ | | |
| 45129 | __ret_277; \ | | |
| 45130 | }) | | |
| 45131 | #else | | |
| 45132 | #define vmulq_lane_f16(__p0_278, __p1_278, __p2_278) __extension__ ({ \ | | |
| 45133 | float16x8_t __ret_278; \ | | |
| 45134 | float16x8_t __s0_278 = __p0_278; \ | | |
| 45135 | float16x4_t __s1_278 = __p1_278; \ | | |
| 45136 | float16x8_t __rev0_278; __rev0_278 = __builtin_shufflevector(__s0_278, __s0_278, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 45137 | float16x4_t __rev1_278; __rev1_278 = __builtin_shufflevector(__s1_278, __s1_278, 3, 2, 1, 0); \ | | |
| 45138 | __ret_278 = __rev0_278 * __noswap_splatq_lane_f16(__rev1_278, __p2_278); \ | | |
| 45139 | __ret_278 = __builtin_shufflevector(__ret_278, __ret_278, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 45140 | __ret_278; \ | | |
| 45141 | }) | | |
| 45142 | #endif | | |
| 45143 | | | |
| 45144 | #ifdef __LITTLE_ENDIAN__ | | |
| 45145 | #define vmul_lane_f16(__p0_279, __p1_279, __p2_279) __extension__ ({ \ | | |
| 45146 | float16x4_t __ret_279; \ | | |
| 45147 | float16x4_t __s0_279 = __p0_279; \ | | |
| 45148 | float16x4_t __s1_279 = __p1_279; \ | | |
| 45149 | __ret_279 = __s0_279 * splat_lane_f16(__s1_279, __p2_279); \ | | |
| 45150 | __ret_279; \ | | |
| 45151 | }) | | |
| 45152 | #else | | |
| 45153 | #define vmul_lane_f16(__p0_280, __p1_280, __p2_280) __extension__ ({ \ | | |
| 45154 | float16x4_t __ret_280; \ | | |
| 45155 | float16x4_t __s0_280 = __p0_280; \ | | |
| 45156 | float16x4_t __s1_280 = __p1_280; \ | | |
| 45157 | float16x4_t __rev0_280; __rev0_280 = __builtin_shufflevector(__s0_280, __s0_280, 3, 2, 1, 0); \ | | |
| 45158 | float16x4_t __rev1_280; __rev1_280 = __builtin_shufflevector(__s1_280, __s1_280, 3, 2, 1, 0); \ | | |
| 45159 | __ret_280 = __rev0_280 * __noswap_splat_lane_f16(__rev1_280, __p2_280); \ | | |
| 45160 | __ret_280 = __builtin_shufflevector(__ret_280, __ret_280, 3, 2, 1, 0); \ | | |
| 45161 | __ret_280; \ | | |
| 45162 | }) | | |
| 45163 | #endif | | |
| 45164 | | | |
| 45165 | #ifdef __LITTLE_ENDIAN__ | | |
| 45166 | #define vmulq_n_f16(__p0, __p1) __extension__ ({ \ | | |
| 45167 | float16x8_t __ret; \ | | |
| 45168 | float16x8_t __s0 = __p0; \ | | |
| 45169 | float16_t __s1 = __p1; \ | | |
| 45170 | __ret = __s0 * (float16x8_t) {__s1, __s1, __s1, __s1, __s1, __s1, __s1, __s1}; \ | | |
| 45171 | __ret; \ | | |
| 45172 | }) | | |
| 45173 | #else | | |
| 45174 | #define vmulq_n_f16(__p0, __p1) __extension__ ({ \ | | |
| 45175 | float16x8_t __ret; \ | | |
| 45176 | float16x8_t __s0 = __p0; \ | | |
| 45177 | float16_t __s1 = __p1; \ | | |
| 45178 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 45179 | __ret = __rev0 * (float16x8_t) {__s1, __s1, __s1, __s1, __s1, __s1, __s1, __s1}; \ | | |
| 45180 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 45181 | __ret; \ | | |
| 45182 | }) | | |
| 45183 | #endif | | |
| 45184 | | | |
| 45185 | #ifdef __LITTLE_ENDIAN__ | | |
| 45186 | #define vmul_n_f16(__p0, __p1) __extension__ ({ \ | | |
| 45187 | float16x4_t __ret; \ | | |
| 45188 | float16x4_t __s0 = __p0; \ | | |
| 45189 | float16_t __s1 = __p1; \ | | |
| 45190 | __ret = __s0 * (float16x4_t) {__s1, __s1, __s1, __s1}; \ | | |
| 45191 | __ret; \ | | |
| 45192 | }) | | |
| 45193 | #else | | |
| 45194 | #define vmul_n_f16(__p0, __p1) __extension__ ({ \ | | |
| 45195 | float16x4_t __ret; \ | | |
| 45196 | float16x4_t __s0 = __p0; \ | | |
| 45197 | float16_t __s1 = __p1; \ | | |
| 45198 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | | |
| 45199 | __ret = __rev0 * (float16x4_t) {__s1, __s1, __s1, __s1}; \ | | |
| 45200 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | | |
| 45201 | __ret; \ | | |
| 45202 | }) | | |
| 45203 | #endif | | |
| 45204 | | | |
| 45205 | #ifdef __LITTLE_ENDIAN__ | 45649 | #ifdef __LITTLE_ENDIAN__ |
| 45206 | __ai float16x8_t vnegq_f16(float16x8_t __p0) { | 45650 | __ai uint64x2_t vcvtpq_u64_f64(float64x2_t __p0) { |
| 45207 | float16x8_t __ret; | 45651 | uint64x2_t __ret; |
| 45208 | __ret = -__p0; | 45652 | __ret = (uint64x2_t) __builtin_neon_vcvtpq_u64_v((int8x16_t)__p0, 51); |
| 45209 | return __ret; | 45653 | return __ret; |
| 45210 | } | 45654 | } |
| 45211 | #else | 45655 | #else |
| 45212 | __ai float16x8_t vnegq_f16(float16x8_t __p0) { | 45656 | __ai uint64x2_t vcvtpq_u64_f64(float64x2_t __p0) { |
| 45213 | float16x8_t __ret; | 45657 | uint64x2_t __ret; |
| 45214 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45658 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 45215 | __ret = -__rev0; | 45659 | __ret = (uint64x2_t) __builtin_neon_vcvtpq_u64_v((int8x16_t)__rev0, 51); |
| 45216 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45660 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 45217 | return __ret; | 45661 | return __ret; |
| 45218 | } | 45662 | } |
| 45219 | #endif | 45663 | #endif |
| 45220 | | 45664 | |
| | 45665 | __ai uint64x1_t vcvtp_u64_f64(float64x1_t __p0) { |
| | 45666 | uint64x1_t __ret; |
| | 45667 | __ret = (uint64x1_t) __builtin_neon_vcvtp_u64_v((int8x8_t)__p0, 19); |
| | 45668 | return __ret; |
| | 45669 | } |
| | 45670 | __ai uint64_t vcvtpd_u64_f64(float64_t __p0) { |
| | 45671 | uint64_t __ret; |
| | 45672 | __ret = (uint64_t) __builtin_neon_vcvtpd_u64_f64(__p0); |
| | 45673 | return __ret; |
| | 45674 | } |
| | 45675 | __ai float32_t vcvtxd_f32_f64(float64_t __p0) { |
| | 45676 | float32_t __ret; |
| | 45677 | __ret = (float32_t) __builtin_neon_vcvtxd_f32_f64(__p0); |
| | 45678 | return __ret; |
| | 45679 | } |
| 45221 | #ifdef __LITTLE_ENDIAN__ | 45680 | #ifdef __LITTLE_ENDIAN__ |
| 45222 | __ai float16x4_t vneg_f16(float16x4_t __p0) { | 45681 | __ai float32x2_t vcvtx_f32_f64(float64x2_t __p0) { |
| 45223 | float16x4_t __ret; | 45682 | float32x2_t __ret; |
| 45224 | __ret = -__p0; | 45683 | __ret = (float32x2_t) __builtin_neon_vcvtx_f32_v((int8x16_t)__p0, 42); |
| 45225 | return __ret; | 45684 | return __ret; |
| 45226 | } | 45685 | } |
| 45227 | #else | 45686 | #else |
| 45228 | __ai float16x4_t vneg_f16(float16x4_t __p0) { | 45687 | __ai float32x2_t vcvtx_f32_f64(float64x2_t __p0) { |
| 45229 | float16x4_t __ret; | 45688 | float32x2_t __ret; |
| 45230 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45689 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 45231 | __ret = -__rev0; | 45690 | __ret = (float32x2_t) __builtin_neon_vcvtx_f32_v((int8x16_t)__rev0, 42); |
| 45232 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45691 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 45692 | return __ret; |
| | 45693 | } |
| | 45694 | __ai float32x2_t __noswap_vcvtx_f32_f64(float64x2_t __p0) { |
| | 45695 | float32x2_t __ret; |
| | 45696 | __ret = (float32x2_t) __builtin_neon_vcvtx_f32_v((int8x16_t)__p0, 42); |
| 45233 | return __ret; | 45697 | return __ret; |
| 45234 | } | 45698 | } |
| 45235 | #endif | 45699 | #endif |
| 45236 | | 45700 | |
| 45237 | #ifdef __LITTLE_ENDIAN__ | 45701 | #ifdef __LITTLE_ENDIAN__ |
| 45238 | __ai float16x4_t vpadd_f16(float16x4_t __p0, float16x4_t __p1) { | 45702 | __ai float32x4_t vcvtx_high_f32_f64(float32x2_t __p0, float64x2_t __p1) { |
| 45239 | float16x4_t __ret; | 45703 | float32x4_t __ret; |
| 45240 | __ret = (float16x4_t) __builtin_neon_vpadd_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | 45704 | __ret = vcombine_f32(__p0, vcvtx_f32_f64(__p1)); |
| 45241 | return __ret; | 45705 | return __ret; |
| 45242 | } | 45706 | } |
| 45243 | #else | 45707 | #else |
| 45244 | __ai float16x4_t vpadd_f16(float16x4_t __p0, float16x4_t __p1) { | 45708 | __ai float32x4_t vcvtx_high_f32_f64(float32x2_t __p0, float64x2_t __p1) { |
| 45245 | float16x4_t __ret; | 45709 | float32x4_t __ret; |
| 45246 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45710 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 45247 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 45711 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 45248 | __ret = (float16x4_t) __builtin_neon_vpadd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); | 45712 | __ret = __noswap_vcombine_f32(__rev0, __noswap_vcvtx_f32_f64(__rev1)); |
| 45249 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45713 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 45250 | return __ret; | 45714 | return __ret; |
| 45251 | } | 45715 | } |
| 45252 | #endif | 45716 | #endif |
| 45253 | | 45717 | |
| 45254 | #ifdef __LITTLE_ENDIAN__ | 45718 | #ifdef __LITTLE_ENDIAN__ |
| 45255 | __ai float16x4_t vpmax_f16(float16x4_t __p0, float16x4_t __p1) { | 45719 | __ai float64x2_t vdivq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 45256 | float16x4_t __ret; | 45720 | float64x2_t __ret; |
| 45257 | __ret = (float16x4_t) __builtin_neon_vpmax_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | 45721 | __ret = __p0 / __p1; |
| 45258 | return __ret; | 45722 | return __ret; |
| 45259 | } | 45723 | } |
| 45260 | #else | 45724 | #else |
| 45261 | __ai float16x4_t vpmax_f16(float16x4_t __p0, float16x4_t __p1) { | 45725 | __ai float64x2_t vdivq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 45262 | float16x4_t __ret; | 45726 | float64x2_t __ret; |
| 45263 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45727 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 45264 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 45728 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 45265 | __ret = (float16x4_t) __builtin_neon_vpmax_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); | 45729 | __ret = __rev0 / __rev1; |
| 45266 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45730 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 45267 | return __ret; | 45731 | return __ret; |
| 45268 | } | 45732 | } |
| 45269 | #endif | 45733 | #endif |
| 45270 | | 45734 | |
| 45271 | #ifdef __LITTLE_ENDIAN__ | 45735 | #ifdef __LITTLE_ENDIAN__ |
| 45272 | __ai float16x4_t vpmin_f16(float16x4_t __p0, float16x4_t __p1) { | 45736 | __ai float32x4_t vdivq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 45273 | float16x4_t __ret; | 45737 | float32x4_t __ret; |
| 45274 | __ret = (float16x4_t) __builtin_neon_vpmin_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | 45738 | __ret = __p0 / __p1; |
| 45275 | return __ret; | 45739 | return __ret; |
| 45276 | } | 45740 | } |
| 45277 | #else | 45741 | #else |
| 45278 | __ai float16x4_t vpmin_f16(float16x4_t __p0, float16x4_t __p1) { | 45742 | __ai float32x4_t vdivq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 45279 | float16x4_t __ret; | 45743 | float32x4_t __ret; |
| 45280 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45744 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 45281 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 45745 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 45282 | __ret = (float16x4_t) __builtin_neon_vpmin_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); | 45746 | __ret = __rev0 / __rev1; |
| 45283 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45747 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 45284 | return __ret; | 45748 | return __ret; |
| 45285 | } | 45749 | } |
| 45286 | #endif | 45750 | #endif |
| 45287 | | 45751 | |
| | 45752 | __ai float64x1_t vdiv_f64(float64x1_t __p0, float64x1_t __p1) { |
| | 45753 | float64x1_t __ret; |
| | 45754 | __ret = __p0 / __p1; |
| | 45755 | return __ret; |
| | 45756 | } |
| 45288 | #ifdef __LITTLE_ENDIAN__ | 45757 | #ifdef __LITTLE_ENDIAN__ |
| 45289 | __ai float16x8_t vrecpeq_f16(float16x8_t __p0) { | 45758 | __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 45290 | float16x8_t __ret; | 45759 | float32x2_t __ret; |
| 45291 | __ret = (float16x8_t) __builtin_neon_vrecpeq_v((int8x16_t)__p0, 40); | 45760 | __ret = __p0 / __p1; |
| 45292 | return __ret; | 45761 | return __ret; |
| 45293 | } | 45762 | } |
| 45294 | #else | 45763 | #else |
| 45295 | __ai float16x8_t vrecpeq_f16(float16x8_t __p0) { | 45764 | __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 45296 | float16x8_t __ret; | 45765 | float32x2_t __ret; |
| 45297 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45766 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 45298 | __ret = (float16x8_t) __builtin_neon_vrecpeq_v((int8x16_t)__rev0, 40); | 45767 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 45299 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45768 | __ret = __rev0 / __rev1; |
| | 45769 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 45300 | return __ret; | 45770 | return __ret; |
| 45301 | } | 45771 | } |
| 45302 | #endif | 45772 | #endif |
| 45303 | | 45773 | |
| 45304 | #ifdef __LITTLE_ENDIAN__ | 45774 | #ifdef __LITTLE_ENDIAN__ |
| 45305 | __ai float16x4_t vrecpe_f16(float16x4_t __p0) { | 45775 | #define vdupb_lane_p8(__p0, __p1) __extension__ ({ \ |
| 45306 | float16x4_t __ret; | 45776 | poly8_t __ret; \ |
| 45307 | __ret = (float16x4_t) __builtin_neon_vrecpe_v((int8x8_t)__p0, 8); | 45777 | poly8x8_t __s0 = __p0; \ |
| 45308 | return __ret; | 45778 | __ret = (poly8_t) __builtin_neon_vdupb_lane_i8((poly8x8_t)__s0, __p1); \ |
| 45309 | } | 45779 | __ret; \ |
| | 45780 | }) |
| 45310 | #else | 45781 | #else |
| 45311 | __ai float16x4_t vrecpe_f16(float16x4_t __p0) { | 45782 | #define vdupb_lane_p8(__p0, __p1) __extension__ ({ \ |
| 45312 | float16x4_t __ret; | 45783 | poly8_t __ret; \ |
| 45313 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45784 | poly8x8_t __s0 = __p0; \ |
| 45314 | __ret = (float16x4_t) __builtin_neon_vrecpe_v((int8x8_t)__rev0, 8); | 45785 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45315 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45786 | __ret = (poly8_t) __builtin_neon_vdupb_lane_i8((poly8x8_t)__rev0, __p1); \ |
| 45316 | return __ret; | 45787 | __ret; \ |
| 45317 | } | 45788 | }) |
| 45318 | #endif | 45789 | #endif |
| 45319 | | 45790 | |
| 45320 | #ifdef __LITTLE_ENDIAN__ | 45791 | #ifdef __LITTLE_ENDIAN__ |
| 45321 | __ai float16x8_t vrecpsq_f16(float16x8_t __p0, float16x8_t __p1) { | 45792 | #define vduph_lane_p16(__p0, __p1) __extension__ ({ \ |
| 45322 | float16x8_t __ret; | 45793 | poly16_t __ret; \ |
| 45323 | __ret = (float16x8_t) __builtin_neon_vrecpsq_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | 45794 | poly16x4_t __s0 = __p0; \ |
| 45324 | return __ret; | 45795 | __ret = (poly16_t) __builtin_neon_vduph_lane_i16((poly16x4_t)__s0, __p1); \ |
| 45325 | } | 45796 | __ret; \ |
| | 45797 | }) |
| 45326 | #else | 45798 | #else |
| 45327 | __ai float16x8_t vrecpsq_f16(float16x8_t __p0, float16x8_t __p1) { | 45799 | #define vduph_lane_p16(__p0, __p1) __extension__ ({ \ |
| 45328 | float16x8_t __ret; | 45800 | poly16_t __ret; \ |
| 45329 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45801 | poly16x4_t __s0 = __p0; \ |
| 45330 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 45802 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 45331 | __ret = (float16x8_t) __builtin_neon_vrecpsq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 45803 | __ret = (poly16_t) __builtin_neon_vduph_lane_i16((poly16x4_t)__rev0, __p1); \ |
| 45332 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45804 | __ret; \ |
| 45333 | return __ret; | 45805 | }) |
| 45334 | } | | |
| 45335 | #endif | 45806 | #endif |
| 45336 | | 45807 | |
| 45337 | #ifdef __LITTLE_ENDIAN__ | 45808 | #ifdef __LITTLE_ENDIAN__ |
| 45338 | __ai float16x4_t vrecps_f16(float16x4_t __p0, float16x4_t __p1) { | 45809 | #define vdupb_lane_u8(__p0, __p1) __extension__ ({ \ |
| 45339 | float16x4_t __ret; | 45810 | uint8_t __ret; \ |
| 45340 | __ret = (float16x4_t) __builtin_neon_vrecps_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | 45811 | uint8x8_t __s0 = __p0; \ |
| 45341 | return __ret; | 45812 | __ret = (uint8_t) __builtin_neon_vdupb_lane_i8((int8x8_t)__s0, __p1); \ |
| 45342 | } | 45813 | __ret; \ |
| | 45814 | }) |
| 45343 | #else | 45815 | #else |
| 45344 | __ai float16x4_t vrecps_f16(float16x4_t __p0, float16x4_t __p1) { | 45816 | #define vdupb_lane_u8(__p0, __p1) __extension__ ({ \ |
| 45345 | float16x4_t __ret; | 45817 | uint8_t __ret; \ |
| 45346 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45818 | uint8x8_t __s0 = __p0; \ |
| 45347 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 45819 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45348 | __ret = (float16x4_t) __builtin_neon_vrecps_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); | 45820 | __ret = (uint8_t) __builtin_neon_vdupb_lane_i8((int8x8_t)__rev0, __p1); \ |
| 45349 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45821 | __ret; \ |
| 45350 | return __ret; | 45822 | }) |
| 45351 | } | | |
| 45352 | #endif | 45823 | #endif |
| 45353 | | 45824 | |
| 45354 | #ifdef __LITTLE_ENDIAN__ | 45825 | #ifdef __LITTLE_ENDIAN__ |
| 45355 | __ai float16x8_t vrev64q_f16(float16x8_t __p0) { | 45826 | #define vdups_lane_u32(__p0, __p1) __extension__ ({ \ |
| 45356 | float16x8_t __ret; | 45827 | uint32_t __ret; \ |
| 45357 | __ret = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0, 7, 6, 5, 4); | 45828 | uint32x2_t __s0 = __p0; \ |
| 45358 | return __ret; | 45829 | __ret = (uint32_t) __builtin_neon_vdups_lane_i32((int32x2_t)__s0, __p1); \ |
| 45359 | } | 45830 | __ret; \ |
| | 45831 | }) |
| 45360 | #else | 45832 | #else |
| 45361 | __ai float16x8_t vrev64q_f16(float16x8_t __p0) { | 45833 | #define vdups_lane_u32(__p0, __p1) __extension__ ({ \ |
| 45362 | float16x8_t __ret; | 45834 | uint32_t __ret; \ |
| 45363 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45835 | uint32x2_t __s0 = __p0; \ |
| 45364 | __ret = __builtin_shufflevector(__rev0, __rev0, 3, 2, 1, 0, 7, 6, 5, 4); | 45836 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 45365 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45837 | __ret = (uint32_t) __builtin_neon_vdups_lane_i32((int32x2_t)__rev0, __p1); \ |
| 45366 | return __ret; | 45838 | __ret; \ |
| 45367 | } | 45839 | }) |
| 45368 | #endif | 45840 | #endif |
| 45369 | | 45841 | |
| | 45842 | #define vdupd_lane_u64(__p0, __p1) __extension__ ({ \ |
| | 45843 | uint64_t __ret; \ |
| | 45844 | uint64x1_t __s0 = __p0; \ |
| | 45845 | __ret = (uint64_t) __builtin_neon_vdupd_lane_i64((int64x1_t)__s0, __p1); \ |
| | 45846 | __ret; \ |
| | 45847 | }) |
| 45370 | #ifdef __LITTLE_ENDIAN__ | 45848 | #ifdef __LITTLE_ENDIAN__ |
| 45371 | __ai float16x4_t vrev64_f16(float16x4_t __p0) { | 45849 | #define vduph_lane_u16(__p0, __p1) __extension__ ({ \ |
| 45372 | float16x4_t __ret; | 45850 | uint16_t __ret; \ |
| 45373 | __ret = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45851 | uint16x4_t __s0 = __p0; \ |
| 45374 | return __ret; | 45852 | __ret = (uint16_t) __builtin_neon_vduph_lane_i16((int16x4_t)__s0, __p1); \ |
| 45375 | } | 45853 | __ret; \ |
| | 45854 | }) |
| 45376 | #else | 45855 | #else |
| 45377 | __ai float16x4_t vrev64_f16(float16x4_t __p0) { | 45856 | #define vduph_lane_u16(__p0, __p1) __extension__ ({ \ |
| 45378 | float16x4_t __ret; | 45857 | uint16_t __ret; \ |
| 45379 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45858 | uint16x4_t __s0 = __p0; \ |
| 45380 | __ret = __builtin_shufflevector(__rev0, __rev0, 3, 2, 1, 0); | 45859 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 45381 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45860 | __ret = (uint16_t) __builtin_neon_vduph_lane_i16((int16x4_t)__rev0, __p1); \ |
| 45382 | return __ret; | 45861 | __ret; \ |
| 45383 | } | 45862 | }) |
| 45384 | #endif | 45863 | #endif |
| 45385 | | 45864 | |
| 45386 | #ifdef __LITTLE_ENDIAN__ | 45865 | #ifdef __LITTLE_ENDIAN__ |
| 45387 | __ai float16x8_t vrsqrteq_f16(float16x8_t __p0) { | 45866 | #define vdupb_lane_s8(__p0, __p1) __extension__ ({ \ |
| 45388 | float16x8_t __ret; | 45867 | int8_t __ret; \ |
| 45389 | __ret = (float16x8_t) __builtin_neon_vrsqrteq_v((int8x16_t)__p0, 40); | 45868 | int8x8_t __s0 = __p0; \ |
| 45390 | return __ret; | 45869 | __ret = (int8_t) __builtin_neon_vdupb_lane_i8((int8x8_t)__s0, __p1); \ |
| 45391 | } | 45870 | __ret; \ |
| | 45871 | }) |
| 45392 | #else | 45872 | #else |
| 45393 | __ai float16x8_t vrsqrteq_f16(float16x8_t __p0) { | 45873 | #define vdupb_lane_s8(__p0, __p1) __extension__ ({ \ |
| 45394 | float16x8_t __ret; | 45874 | int8_t __ret; \ |
| 45395 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45875 | int8x8_t __s0 = __p0; \ |
| 45396 | __ret = (float16x8_t) __builtin_neon_vrsqrteq_v((int8x16_t)__rev0, 40); | 45876 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45397 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45877 | __ret = (int8_t) __builtin_neon_vdupb_lane_i8((int8x8_t)__rev0, __p1); \ |
| 45398 | return __ret; | 45878 | __ret; \ |
| 45399 | } | 45879 | }) |
| 45400 | #endif | 45880 | #endif |
| 45401 | | 45881 | |
| | 45882 | #define vdupd_lane_f64(__p0, __p1) __extension__ ({ \ |
| | 45883 | float64_t __ret; \ |
| | 45884 | float64x1_t __s0 = __p0; \ |
| | 45885 | __ret = (float64_t) __builtin_neon_vdupd_lane_f64((float64x1_t)__s0, __p1); \ |
| | 45886 | __ret; \ |
| | 45887 | }) |
| 45402 | #ifdef __LITTLE_ENDIAN__ | 45888 | #ifdef __LITTLE_ENDIAN__ |
| 45403 | __ai float16x4_t vrsqrte_f16(float16x4_t __p0) { | 45889 | #define vdups_lane_f32(__p0, __p1) __extension__ ({ \ |
| 45404 | float16x4_t __ret; | 45890 | float32_t __ret; \ |
| 45405 | __ret = (float16x4_t) __builtin_neon_vrsqrte_v((int8x8_t)__p0, 8); | 45891 | float32x2_t __s0 = __p0; \ |
| 45406 | return __ret; | 45892 | __ret = (float32_t) __builtin_neon_vdups_lane_f32((float32x2_t)__s0, __p1); \ |
| 45407 | } | 45893 | __ret; \ |
| | 45894 | }) |
| 45408 | #else | 45895 | #else |
| 45409 | __ai float16x4_t vrsqrte_f16(float16x4_t __p0) { | 45896 | #define vdups_lane_f32(__p0, __p1) __extension__ ({ \ |
| 45410 | float16x4_t __ret; | 45897 | float32_t __ret; \ |
| 45411 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45898 | float32x2_t __s0 = __p0; \ |
| 45412 | __ret = (float16x4_t) __builtin_neon_vrsqrte_v((int8x8_t)__rev0, 8); | 45899 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 45413 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45900 | __ret = (float32_t) __builtin_neon_vdups_lane_f32((float32x2_t)__rev0, __p1); \ |
| 45414 | return __ret; | 45901 | __ret; \ |
| 45415 | } | 45902 | }) |
| | 45903 | #endif |
| | 45904 | |
| | 45905 | #ifdef __LITTLE_ENDIAN__ |
| | 45906 | #define vdups_lane_s32(__p0, __p1) __extension__ ({ \ |
| | 45907 | int32_t __ret; \ |
| | 45908 | int32x2_t __s0 = __p0; \ |
| | 45909 | __ret = (int32_t) __builtin_neon_vdups_lane_i32((int32x2_t)__s0, __p1); \ |
| | 45910 | __ret; \ |
| | 45911 | }) |
| | 45912 | #else |
| | 45913 | #define vdups_lane_s32(__p0, __p1) __extension__ ({ \ |
| | 45914 | int32_t __ret; \ |
| | 45915 | int32x2_t __s0 = __p0; \ |
| | 45916 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| | 45917 | __ret = (int32_t) __builtin_neon_vdups_lane_i32((int32x2_t)__rev0, __p1); \ |
| | 45918 | __ret; \ |
| | 45919 | }) |
| 45416 | #endif | 45920 | #endif |
| 45417 | | 45921 | |
| | 45922 | #define vdupd_lane_s64(__p0, __p1) __extension__ ({ \ |
| | 45923 | int64_t __ret; \ |
| | 45924 | int64x1_t __s0 = __p0; \ |
| | 45925 | __ret = (int64_t) __builtin_neon_vdupd_lane_i64((int64x1_t)__s0, __p1); \ |
| | 45926 | __ret; \ |
| | 45927 | }) |
| 45418 | #ifdef __LITTLE_ENDIAN__ | 45928 | #ifdef __LITTLE_ENDIAN__ |
| 45419 | __ai float16x8_t vrsqrtsq_f16(float16x8_t __p0, float16x8_t __p1) { | 45929 | #define vduph_lane_s16(__p0, __p1) __extension__ ({ \ |
| 45420 | float16x8_t __ret; | 45930 | int16_t __ret; \ |
| 45421 | __ret = (float16x8_t) __builtin_neon_vrsqrtsq_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | 45931 | int16x4_t __s0 = __p0; \ |
| 45422 | return __ret; | 45932 | __ret = (int16_t) __builtin_neon_vduph_lane_i16((int16x4_t)__s0, __p1); \ |
| 45423 | } | 45933 | __ret; \ |
| | 45934 | }) |
| 45424 | #else | 45935 | #else |
| 45425 | __ai float16x8_t vrsqrtsq_f16(float16x8_t __p0, float16x8_t __p1) { | 45936 | #define vduph_lane_s16(__p0, __p1) __extension__ ({ \ |
| 45426 | float16x8_t __ret; | 45937 | int16_t __ret; \ |
| 45427 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45938 | int16x4_t __s0 = __p0; \ |
| 45428 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 45939 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 45429 | __ret = (float16x8_t) __builtin_neon_vrsqrtsq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 45940 | __ret = (int16_t) __builtin_neon_vduph_lane_i16((int16x4_t)__rev0, __p1); \ |
| 45430 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45941 | __ret; \ |
| 45431 | return __ret; | 45942 | }) |
| 45432 | } | | |
| 45433 | #endif | 45943 | #endif |
| 45434 | | 45944 | |
| | 45945 | #define vdup_lane_p64(__p0_343, __p1_343) __extension__ ({ \ |
| | 45946 | poly64x1_t __ret_343; \ |
| | 45947 | poly64x1_t __s0_343 = __p0_343; \ |
| | 45948 | __ret_343 = splat_lane_p64(__s0_343, __p1_343); \ |
| | 45949 | __ret_343; \ |
| | 45950 | }) |
| 45435 | #ifdef __LITTLE_ENDIAN__ | 45951 | #ifdef __LITTLE_ENDIAN__ |
| 45436 | __ai float16x4_t vrsqrts_f16(float16x4_t __p0, float16x4_t __p1) { | 45952 | #define vdupq_lane_p64(__p0_344, __p1_344) __extension__ ({ \ |
| 45437 | float16x4_t __ret; | 45953 | poly64x2_t __ret_344; \ |
| 45438 | __ret = (float16x4_t) __builtin_neon_vrsqrts_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | 45954 | poly64x1_t __s0_344 = __p0_344; \ |
| 45439 | return __ret; | 45955 | __ret_344 = splatq_lane_p64(__s0_344, __p1_344); \ |
| 45440 | } | 45956 | __ret_344; \ |
| | 45957 | }) |
| 45441 | #else | 45958 | #else |
| 45442 | __ai float16x4_t vrsqrts_f16(float16x4_t __p0, float16x4_t __p1) { | 45959 | #define vdupq_lane_p64(__p0_345, __p1_345) __extension__ ({ \ |
| 45443 | float16x4_t __ret; | 45960 | poly64x2_t __ret_345; \ |
| 45444 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 45961 | poly64x1_t __s0_345 = __p0_345; \ |
| 45445 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 45962 | __ret_345 = __noswap_splatq_lane_p64(__s0_345, __p1_345); \ |
| 45446 | __ret = (float16x4_t) __builtin_neon_vrsqrts_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); | 45963 | __ret_345 = __builtin_shufflevector(__ret_345, __ret_345, 1, 0); \ |
| 45447 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 45964 | __ret_345; \ |
| 45448 | return __ret; | 45965 | }) |
| 45449 | } | | |
| 45450 | #endif | 45966 | #endif |
| 45451 | | 45967 | |
| 45452 | #ifdef __LITTLE_ENDIAN__ | 45968 | #ifdef __LITTLE_ENDIAN__ |
| 45453 | __ai float16x8_t vsubq_f16(float16x8_t __p0, float16x8_t __p1) { | 45969 | #define vdupq_lane_f64(__p0_346, __p1_346) __extension__ ({ \ |
| 45454 | float16x8_t __ret; | 45970 | float64x2_t __ret_346; \ |
| 45455 | __ret = __p0 - __p1; | 45971 | float64x1_t __s0_346 = __p0_346; \ |
| 45456 | return __ret; | 45972 | __ret_346 = splatq_lane_f64(__s0_346, __p1_346); \ |
| 45457 | } | 45973 | __ret_346; \ |
| | 45974 | }) |
| 45458 | #else | 45975 | #else |
| 45459 | __ai float16x8_t vsubq_f16(float16x8_t __p0, float16x8_t __p1) { | 45976 | #define vdupq_lane_f64(__p0_347, __p1_347) __extension__ ({ \ |
| 45460 | float16x8_t __ret; | 45977 | float64x2_t __ret_347; \ |
| 45461 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 45978 | float64x1_t __s0_347 = __p0_347; \ |
| 45462 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 45979 | __ret_347 = __noswap_splatq_lane_f64(__s0_347, __p1_347); \ |
| 45463 | __ret = __rev0 - __rev1; | 45980 | __ret_347 = __builtin_shufflevector(__ret_347, __ret_347, 1, 0); \ |
| 45464 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 45981 | __ret_347; \ |
| 45465 | return __ret; | 45982 | }) |
| 45466 | } | | |
| 45467 | #endif | 45983 | #endif |
| 45468 | | 45984 | |
| | 45985 | #define vdup_lane_f64(__p0_348, __p1_348) __extension__ ({ \ |
| | 45986 | float64x1_t __ret_348; \ |
| | 45987 | float64x1_t __s0_348 = __p0_348; \ |
| | 45988 | __ret_348 = splat_lane_f64(__s0_348, __p1_348); \ |
| | 45989 | __ret_348; \ |
| | 45990 | }) |
| 45469 | #ifdef __LITTLE_ENDIAN__ | 45991 | #ifdef __LITTLE_ENDIAN__ |
| 45470 | __ai float16x4_t vsub_f16(float16x4_t __p0, float16x4_t __p1) { | 45992 | #define vdupb_laneq_p8(__p0, __p1) __extension__ ({ \ |
| 45471 | float16x4_t __ret; | 45993 | poly8_t __ret; \ |
| 45472 | __ret = __p0 - __p1; | 45994 | poly8x16_t __s0 = __p0; \ |
| 45473 | return __ret; | 45995 | __ret = (poly8_t) __builtin_neon_vdupb_laneq_i8((poly8x16_t)__s0, __p1); \ |
| 45474 | } | 45996 | __ret; \ |
| | 45997 | }) |
| 45475 | #else | 45998 | #else |
| 45476 | __ai float16x4_t vsub_f16(float16x4_t __p0, float16x4_t __p1) { | 45999 | #define vdupb_laneq_p8(__p0, __p1) __extension__ ({ \ |
| 45477 | float16x4_t __ret; | 46000 | poly8_t __ret; \ |
| 45478 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 46001 | poly8x16_t __s0 = __p0; \ |
| 45479 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 46002 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45480 | __ret = __rev0 - __rev1; | 46003 | __ret = (poly8_t) __builtin_neon_vdupb_laneq_i8((poly8x16_t)__rev0, __p1); \ |
| 45481 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 46004 | __ret; \ |
| 45482 | return __ret; | 46005 | }) |
| 45483 | } | | |
| 45484 | #endif | 46006 | #endif |
| 45485 | | 46007 | |
| 45486 | #ifdef __LITTLE_ENDIAN__ | 46008 | #ifdef __LITTLE_ENDIAN__ |
| 45487 | __ai float16x8x2_t vtrnq_f16(float16x8_t __p0, float16x8_t __p1) { | 46009 | #define vduph_laneq_p16(__p0, __p1) __extension__ ({ \ |
| 45488 | float16x8x2_t __ret; | 46010 | poly16_t __ret; \ |
| 45489 | __builtin_neon_vtrnq_v(&__ret, (int8x16_t)__p0, (int8x16_t)__p1, 40); | 46011 | poly16x8_t __s0 = __p0; \ |
| 45490 | return __ret; | 46012 | __ret = (poly16_t) __builtin_neon_vduph_laneq_i16((poly16x8_t)__s0, __p1); \ |
| 45491 | } | 46013 | __ret; \ |
| | 46014 | }) |
| 45492 | #else | 46015 | #else |
| 45493 | __ai float16x8x2_t vtrnq_f16(float16x8_t __p0, float16x8_t __p1) { | 46016 | #define vduph_laneq_p16(__p0, __p1) __extension__ ({ \ |
| 45494 | float16x8x2_t __ret; | 46017 | poly16_t __ret; \ |
| 45495 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 46018 | poly16x8_t __s0 = __p0; \ |
| 45496 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 46019 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45497 | __builtin_neon_vtrnq_v(&__ret, (int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 46020 | __ret = (poly16_t) __builtin_neon_vduph_laneq_i16((poly16x8_t)__rev0, __p1); \ |
| 45498 | | 46021 | __ret; \ |
| 45499 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); | 46022 | }) |
| 45500 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 45501 | return __ret; | | |
| 45502 | } | | |
| 45503 | #endif | 46023 | #endif |
| 45504 | | 46024 | |
| 45505 | #ifdef __LITTLE_ENDIAN__ | 46025 | #ifdef __LITTLE_ENDIAN__ |
| 45506 | __ai float16x4x2_t vtrn_f16(float16x4_t __p0, float16x4_t __p1) { | 46026 | #define vdupb_laneq_u8(__p0, __p1) __extension__ ({ \ |
| 45507 | float16x4x2_t __ret; | 46027 | uint8_t __ret; \ |
| 45508 | __builtin_neon_vtrn_v(&__ret, (int8x8_t)__p0, (int8x8_t)__p1, 8); | 46028 | uint8x16_t __s0 = __p0; \ |
| 45509 | return __ret; | 46029 | __ret = (uint8_t) __builtin_neon_vdupb_laneq_i8((int8x16_t)__s0, __p1); \ |
| 45510 | } | 46030 | __ret; \ |
| | 46031 | }) |
| 45511 | #else | 46032 | #else |
| 45512 | __ai float16x4x2_t vtrn_f16(float16x4_t __p0, float16x4_t __p1) { | 46033 | #define vdupb_laneq_u8(__p0, __p1) __extension__ ({ \ |
| 45513 | float16x4x2_t __ret; | 46034 | uint8_t __ret; \ |
| 45514 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 46035 | uint8x16_t __s0 = __p0; \ |
| 45515 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 46036 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45516 | __builtin_neon_vtrn_v(&__ret, (int8x8_t)__rev0, (int8x8_t)__rev1, 8); | 46037 | __ret = (uint8_t) __builtin_neon_vdupb_laneq_i8((int8x16_t)__rev0, __p1); \ |
| 45517 | | 46038 | __ret; \ |
| 45518 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); | 46039 | }) |
| 45519 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); | | |
| 45520 | return __ret; | | |
| 45521 | } | | |
| 45522 | #endif | 46040 | #endif |
| 45523 | | 46041 | |
| 45524 | #ifdef __LITTLE_ENDIAN__ | 46042 | #ifdef __LITTLE_ENDIAN__ |
| 45525 | __ai float16x8x2_t vuzpq_f16(float16x8_t __p0, float16x8_t __p1) { | 46043 | #define vdups_laneq_u32(__p0, __p1) __extension__ ({ \ |
| 45526 | float16x8x2_t __ret; | 46044 | uint32_t __ret; \ |
| 45527 | __builtin_neon_vuzpq_v(&__ret, (int8x16_t)__p0, (int8x16_t)__p1, 40); | 46045 | uint32x4_t __s0 = __p0; \ |
| 45528 | return __ret; | 46046 | __ret = (uint32_t) __builtin_neon_vdups_laneq_i32((int32x4_t)__s0, __p1); \ |
| 45529 | } | 46047 | __ret; \ |
| | 46048 | }) |
| 45530 | #else | 46049 | #else |
| 45531 | __ai float16x8x2_t vuzpq_f16(float16x8_t __p0, float16x8_t __p1) { | 46050 | #define vdups_laneq_u32(__p0, __p1) __extension__ ({ \ |
| 45532 | float16x8x2_t __ret; | 46051 | uint32_t __ret; \ |
| 45533 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 46052 | uint32x4_t __s0 = __p0; \ |
| 45534 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 46053 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 45535 | __builtin_neon_vuzpq_v(&__ret, (int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 46054 | __ret = (uint32_t) __builtin_neon_vdups_laneq_i32((int32x4_t)__rev0, __p1); \ |
| 45536 | | 46055 | __ret; \ |
| 45537 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); | 46056 | }) |
| 45538 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 45539 | return __ret; | | |
| 45540 | } | | |
| 45541 | #endif | 46057 | #endif |
| 45542 | | 46058 | |
| 45543 | #ifdef __LITTLE_ENDIAN__ | 46059 | #ifdef __LITTLE_ENDIAN__ |
| 45544 | __ai float16x4x2_t vuzp_f16(float16x4_t __p0, float16x4_t __p1) { | 46060 | #define vdupd_laneq_u64(__p0, __p1) __extension__ ({ \ |
| 45545 | float16x4x2_t __ret; | 46061 | uint64_t __ret; \ |
| 45546 | __builtin_neon_vuzp_v(&__ret, (int8x8_t)__p0, (int8x8_t)__p1, 8); | 46062 | uint64x2_t __s0 = __p0; \ |
| 45547 | return __ret; | 46063 | __ret = (uint64_t) __builtin_neon_vdupd_laneq_i64((int64x2_t)__s0, __p1); \ |
| 45548 | } | 46064 | __ret; \ |
| | 46065 | }) |
| 45549 | #else | 46066 | #else |
| 45550 | __ai float16x4x2_t vuzp_f16(float16x4_t __p0, float16x4_t __p1) { | 46067 | #define vdupd_laneq_u64(__p0, __p1) __extension__ ({ \ |
| 45551 | float16x4x2_t __ret; | 46068 | uint64_t __ret; \ |
| 45552 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 46069 | uint64x2_t __s0 = __p0; \ |
| 45553 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 46070 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 45554 | __builtin_neon_vuzp_v(&__ret, (int8x8_t)__rev0, (int8x8_t)__rev1, 8); | 46071 | __ret = (uint64_t) __builtin_neon_vdupd_laneq_i64((int64x2_t)__rev0, __p1); \ |
| 45555 | | 46072 | __ret; \ |
| 45556 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); | 46073 | }) |
| 45557 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); | | |
| 45558 | return __ret; | | |
| 45559 | } | | |
| 45560 | #endif | 46074 | #endif |
| 45561 | | 46075 | |
| 45562 | #ifdef __LITTLE_ENDIAN__ | 46076 | #ifdef __LITTLE_ENDIAN__ |
| 45563 | __ai float16x8x2_t vzipq_f16(float16x8_t __p0, float16x8_t __p1) { | 46077 | #define vduph_laneq_u16(__p0, __p1) __extension__ ({ \ |
| 45564 | float16x8x2_t __ret; | 46078 | uint16_t __ret; \ |
| 45565 | __builtin_neon_vzipq_v(&__ret, (int8x16_t)__p0, (int8x16_t)__p1, 40); | 46079 | uint16x8_t __s0 = __p0; \ |
| 45566 | return __ret; | 46080 | __ret = (uint16_t) __builtin_neon_vduph_laneq_i16((int16x8_t)__s0, __p1); \ |
| 45567 | } | 46081 | __ret; \ |
| | 46082 | }) |
| 45568 | #else | 46083 | #else |
| 45569 | __ai float16x8x2_t vzipq_f16(float16x8_t __p0, float16x8_t __p1) { | 46084 | #define vduph_laneq_u16(__p0, __p1) __extension__ ({ \ |
| 45570 | float16x8x2_t __ret; | 46085 | uint16_t __ret; \ |
| 45571 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 46086 | uint16x8_t __s0 = __p0; \ |
| 45572 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 46087 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45573 | __builtin_neon_vzipq_v(&__ret, (int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 46088 | __ret = (uint16_t) __builtin_neon_vduph_laneq_i16((int16x8_t)__rev0, __p1); \ |
| 45574 | | 46089 | __ret; \ |
| 45575 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); | 46090 | }) |
| 45576 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 45577 | return __ret; | | |
| 45578 | } | | |
| 45579 | #endif | 46091 | #endif |
| 45580 | | 46092 | |
| 45581 | #ifdef __LITTLE_ENDIAN__ | 46093 | #ifdef __LITTLE_ENDIAN__ |
| 45582 | __ai float16x4x2_t vzip_f16(float16x4_t __p0, float16x4_t __p1) { | 46094 | #define vdupb_laneq_s8(__p0, __p1) __extension__ ({ \ |
| 45583 | float16x4x2_t __ret; | 46095 | int8_t __ret; \ |
| 45584 | __builtin_neon_vzip_v(&__ret, (int8x8_t)__p0, (int8x8_t)__p1, 8); | 46096 | int8x16_t __s0 = __p0; \ |
| 45585 | return __ret; | 46097 | __ret = (int8_t) __builtin_neon_vdupb_laneq_i8((int8x16_t)__s0, __p1); \ |
| 45586 | } | 46098 | __ret; \ |
| | 46099 | }) |
| 45587 | #else | 46100 | #else |
| 45588 | __ai float16x4x2_t vzip_f16(float16x4_t __p0, float16x4_t __p1) { | 46101 | #define vdupb_laneq_s8(__p0, __p1) __extension__ ({ \ |
| 45589 | float16x4x2_t __ret; | 46102 | int8_t __ret; \ |
| 45590 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 46103 | int8x16_t __s0 = __p0; \ |
| 45591 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 46104 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45592 | __builtin_neon_vzip_v(&__ret, (int8x8_t)__rev0, (int8x8_t)__rev1, 8); | 46105 | __ret = (int8_t) __builtin_neon_vdupb_laneq_i8((int8x16_t)__rev0, __p1); \ |
| 45593 | | 46106 | __ret; \ |
| 45594 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); | 46107 | }) |
| 45595 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); | | |
| 45596 | return __ret; | | |
| 45597 | } | | |
| 45598 | #endif | 46108 | #endif |
| 45599 | | 46109 | |
| 45600 | #endif | | |
| 45601 | #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(__aarch64__) | | |
| 45602 | #ifdef __LITTLE_ENDIAN__ | 46110 | #ifdef __LITTLE_ENDIAN__ |
| 45603 | __ai float16x8_t vdivq_f16(float16x8_t __p0, float16x8_t __p1) { | 46111 | #define vdupd_laneq_f64(__p0, __p1) __extension__ ({ \ |
| 45604 | float16x8_t __ret; | 46112 | float64_t __ret; \ |
| 45605 | __ret = __p0 / __p1; | 46113 | float64x2_t __s0 = __p0; \ |
| 45606 | return __ret; | 46114 | __ret = (float64_t) __builtin_neon_vdupd_laneq_f64((float64x2_t)__s0, __p1); \ |
| 45607 | } | 46115 | __ret; \ |
| | 46116 | }) |
| 45608 | #else | 46117 | #else |
| 45609 | __ai float16x8_t vdivq_f16(float16x8_t __p0, float16x8_t __p1) { | 46118 | #define vdupd_laneq_f64(__p0, __p1) __extension__ ({ \ |
| 45610 | float16x8_t __ret; | 46119 | float64_t __ret; \ |
| 45611 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 46120 | float64x2_t __s0 = __p0; \ |
| 45612 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 46121 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 45613 | __ret = __rev0 / __rev1; | 46122 | __ret = (float64_t) __builtin_neon_vdupd_laneq_f64((float64x2_t)__rev0, __p1); \ |
| 45614 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 46123 | __ret; \ |
| 45615 | return __ret; | 46124 | }) |
| 45616 | } | | |
| 45617 | #endif | 46125 | #endif |
| 45618 | | 46126 | |
| 45619 | #ifdef __LITTLE_ENDIAN__ | 46127 | #ifdef __LITTLE_ENDIAN__ |
| 45620 | __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { | 46128 | #define vdups_laneq_f32(__p0, __p1) __extension__ ({ \ |
| 45621 | float16x4_t __ret; | 46129 | float32_t __ret; \ |
| 45622 | __ret = __p0 / __p1; | 46130 | float32x4_t __s0 = __p0; \ |
| 45623 | return __ret; | 46131 | __ret = (float32_t) __builtin_neon_vdups_laneq_f32((float32x4_t)__s0, __p1); \ |
| 45624 | } | 46132 | __ret; \ |
| | 46133 | }) |
| 45625 | #else | 46134 | #else |
| 45626 | __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { | 46135 | #define vdups_laneq_f32(__p0, __p1) __extension__ ({ \ |
| 45627 | float16x4_t __ret; | 46136 | float32_t __ret; \ |
| 45628 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 46137 | float32x4_t __s0 = __p0; \ |
| 45629 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 46138 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 45630 | __ret = __rev0 / __rev1; | 46139 | __ret = (float32_t) __builtin_neon_vdups_laneq_f32((float32x4_t)__rev0, __p1); \ |
| 45631 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 46140 | __ret; \ |
| 45632 | return __ret; | 46141 | }) |
| 45633 | } | | |
| 45634 | #endif | 46142 | #endif |
| 45635 | | 46143 | |
| 45636 | #ifdef __LITTLE_ENDIAN__ | 46144 | #ifdef __LITTLE_ENDIAN__ |
| 45637 | #define vduph_lane_f16(__p0, __p1) __extension__ ({ \ | 46145 | #define vdups_laneq_s32(__p0, __p1) __extension__ ({ \ |
| 45638 | float16_t __ret; \ | 46146 | int32_t __ret; \ |
| 45639 | float16x4_t __s0 = __p0; \ | 46147 | int32x4_t __s0 = __p0; \ |
| 45640 | __ret = (float16_t) __builtin_neon_vduph_lane_f16((float16x4_t)__s0, __p1); \ | 46148 | __ret = (int32_t) __builtin_neon_vdups_laneq_i32((int32x4_t)__s0, __p1); \ |
| 45641 | __ret; \ | 46149 | __ret; \ |
| 45642 | }) | 46150 | }) |
| 45643 | #else | 46151 | #else |
| 45644 | #define vduph_lane_f16(__p0, __p1) __extension__ ({ \ | 46152 | #define vdups_laneq_s32(__p0, __p1) __extension__ ({ \ |
| 45645 | float16_t __ret; \ | 46153 | int32_t __ret; \ |
| 45646 | float16x4_t __s0 = __p0; \ | 46154 | int32x4_t __s0 = __p0; \ |
| 45647 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 46155 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 45648 | __ret = (float16_t) __builtin_neon_vduph_lane_f16((float16x4_t)__rev0, __p1); \ | 46156 | __ret = (int32_t) __builtin_neon_vdups_laneq_i32((int32x4_t)__rev0, __p1); \ |
| 45649 | __ret; \ | 46157 | __ret; \ |
| 45650 | }) | 46158 | }) |
| 45651 | #endif | 46159 | #endif |
| 45652 | | 46160 | |
| 45653 | #ifdef __LITTLE_ENDIAN__ | 46161 | #ifdef __LITTLE_ENDIAN__ |
| 45654 | #define vduph_laneq_f16(__p0, __p1) __extension__ ({ \ | 46162 | #define vdupd_laneq_s64(__p0, __p1) __extension__ ({ \ |
| 45655 | float16_t __ret; \ | 46163 | int64_t __ret; \ |
| 45656 | float16x8_t __s0 = __p0; \ | 46164 | int64x2_t __s0 = __p0; \ |
| 45657 | __ret = (float16_t) __builtin_neon_vduph_laneq_f16((float16x8_t)__s0, __p1); \ | 46165 | __ret = (int64_t) __builtin_neon_vdupd_laneq_i64((int64x2_t)__s0, __p1); \ |
| 45658 | __ret; \ | 46166 | __ret; \ |
| 45659 | }) | 46167 | }) |
| 45660 | #else | 46168 | #else |
| 45661 | #define vduph_laneq_f16(__p0, __p1) __extension__ ({ \ | 46169 | #define vdupd_laneq_s64(__p0, __p1) __extension__ ({ \ |
| 45662 | float16_t __ret; \ | 46170 | int64_t __ret; \ |
| 45663 | float16x8_t __s0 = __p0; \ | 46171 | int64x2_t __s0 = __p0; \ |
| 45664 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46172 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 45665 | __ret = (float16_t) __builtin_neon_vduph_laneq_f16((float16x8_t)__rev0, __p1); \ | 46173 | __ret = (int64_t) __builtin_neon_vdupd_laneq_i64((int64x2_t)__rev0, __p1); \ |
| 45666 | __ret; \ | 46174 | __ret; \ |
| 45667 | }) | 46175 | }) |
| 45668 | #endif | 46176 | #endif |
| 45669 | | 46177 | |
| 45670 | #ifdef __LITTLE_ENDIAN__ | 46178 | #ifdef __LITTLE_ENDIAN__ |
| 45671 | #define vfmah_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46179 | #define vduph_laneq_s16(__p0, __p1) __extension__ ({ \ |
| 45672 | float16_t __ret; \ | 46180 | int16_t __ret; \ |
| 45673 | float16_t __s0 = __p0; \ | 46181 | int16x8_t __s0 = __p0; \ |
| 45674 | float16_t __s1 = __p1; \ | 46182 | __ret = (int16_t) __builtin_neon_vduph_laneq_i16((int16x8_t)__s0, __p1); \ |
| 45675 | float16x4_t __s2 = __p2; \ | | |
| 45676 | __ret = (float16_t) __builtin_neon_vfmah_lane_f16(__s0, __s1, (float16x4_t)__s2, __p3); \ | | |
| 45677 | __ret; \ | 46183 | __ret; \ |
| 45678 | }) | 46184 | }) |
| 45679 | #else | 46185 | #else |
| 45680 | #define vfmah_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46186 | #define vduph_laneq_s16(__p0, __p1) __extension__ ({ \ |
| 45681 | float16_t __ret; \ | 46187 | int16_t __ret; \ |
| 45682 | float16_t __s0 = __p0; \ | 46188 | int16x8_t __s0 = __p0; \ |
| 45683 | float16_t __s1 = __p1; \ | 46189 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45684 | float16x4_t __s2 = __p2; \ | 46190 | __ret = (int16_t) __builtin_neon_vduph_laneq_i16((int16x8_t)__rev0, __p1); \ |
| 45685 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | | |
| 45686 | __ret = (float16_t) __builtin_neon_vfmah_lane_f16(__s0, __s1, (float16x4_t)__rev2, __p3); \ | | |
| 45687 | __ret; \ | | |
| 45688 | }) | | |
| 45689 | #define __noswap_vfmah_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 45690 | float16_t __ret; \ | | |
| 45691 | float16_t __s0 = __p0; \ | | |
| 45692 | float16_t __s1 = __p1; \ | | |
| 45693 | float16x4_t __s2 = __p2; \ | | |
| 45694 | __ret = (float16_t) __builtin_neon_vfmah_lane_f16(__s0, __s1, (float16x4_t)__s2, __p3); \ | | |
| 45695 | __ret; \ | 46191 | __ret; \ |
| 45696 | }) | 46192 | }) |
| 45697 | #endif | 46193 | #endif |
| 45698 | | 46194 | |
| 45699 | #ifdef __LITTLE_ENDIAN__ | 46195 | #ifdef __LITTLE_ENDIAN__ |
| 45700 | #define vfmaq_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46196 | #define vdup_laneq_p8(__p0_349, __p1_349) __extension__ ({ \ |
| 45701 | float16x8_t __ret; \ | 46197 | poly8x8_t __ret_349; \ |
| 45702 | float16x8_t __s0 = __p0; \ | 46198 | poly8x16_t __s0_349 = __p0_349; \ |
| 45703 | float16x8_t __s1 = __p1; \ | 46199 | __ret_349 = splat_laneq_p8(__s0_349, __p1_349); \ |
| 45704 | float16x4_t __s2 = __p2; \ | 46200 | __ret_349; \ |
| 45705 | __ret = (float16x8_t) __builtin_neon_vfmaq_lane_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x8_t)__s2, __p3, 40); \ | | |
| 45706 | __ret; \ | | |
| 45707 | }) | 46201 | }) |
| 45708 | #else | 46202 | #else |
| 45709 | #define vfmaq_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46203 | #define vdup_laneq_p8(__p0_350, __p1_350) __extension__ ({ \ |
| 45710 | float16x8_t __ret; \ | 46204 | poly8x8_t __ret_350; \ |
| 45711 | float16x8_t __s0 = __p0; \ | 46205 | poly8x16_t __s0_350 = __p0_350; \ |
| 45712 | float16x8_t __s1 = __p1; \ | 46206 | poly8x16_t __rev0_350; __rev0_350 = __builtin_shufflevector(__s0_350, __s0_350, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45713 | float16x4_t __s2 = __p2; \ | 46207 | __ret_350 = __noswap_splat_laneq_p8(__rev0_350, __p1_350); \ |
| 45714 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46208 | __ret_350 = __builtin_shufflevector(__ret_350, __ret_350, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45715 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46209 | __ret_350; \ |
| 45716 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | | |
| 45717 | __ret = (float16x8_t) __builtin_neon_vfmaq_lane_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x8_t)__rev2, __p3, 40); \ | | |
| 45718 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 45719 | __ret; \ | | |
| 45720 | }) | | |
| 45721 | #define __noswap_vfmaq_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 45722 | float16x8_t __ret; \ | | |
| 45723 | float16x8_t __s0 = __p0; \ | | |
| 45724 | float16x8_t __s1 = __p1; \ | | |
| 45725 | float16x4_t __s2 = __p2; \ | | |
| 45726 | __ret = (float16x8_t) __builtin_neon_vfmaq_lane_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x8_t)__s2, __p3, 40); \ | | |
| 45727 | __ret; \ | | |
| 45728 | }) | 46210 | }) |
| 45729 | #endif | 46211 | #endif |
| 45730 | | 46212 | |
| 45731 | #ifdef __LITTLE_ENDIAN__ | 46213 | #ifdef __LITTLE_ENDIAN__ |
| 45732 | #define vfma_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46214 | #define vdup_laneq_p64(__p0_351, __p1_351) __extension__ ({ \ |
| 45733 | float16x4_t __ret; \ | 46215 | poly64x1_t __ret_351; \ |
| 45734 | float16x4_t __s0 = __p0; \ | 46216 | poly64x2_t __s0_351 = __p0_351; \ |
| 45735 | float16x4_t __s1 = __p1; \ | 46217 | __ret_351 = splat_laneq_p64(__s0_351, __p1_351); \ |
| 45736 | float16x4_t __s2 = __p2; \ | 46218 | __ret_351; \ |
| 45737 | __ret = (float16x4_t) __builtin_neon_vfma_lane_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x8_t)__s2, __p3, 8); \ | | |
| 45738 | __ret; \ | | |
| 45739 | }) | 46219 | }) |
| 45740 | #else | 46220 | #else |
| 45741 | #define vfma_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46221 | #define vdup_laneq_p64(__p0_352, __p1_352) __extension__ ({ \ |
| 45742 | float16x4_t __ret; \ | 46222 | poly64x1_t __ret_352; \ |
| 45743 | float16x4_t __s0 = __p0; \ | 46223 | poly64x2_t __s0_352 = __p0_352; \ |
| 45744 | float16x4_t __s1 = __p1; \ | 46224 | poly64x2_t __rev0_352; __rev0_352 = __builtin_shufflevector(__s0_352, __s0_352, 1, 0); \ |
| 45745 | float16x4_t __s2 = __p2; \ | 46225 | __ret_352 = __noswap_splat_laneq_p64(__rev0_352, __p1_352); \ |
| 45746 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 46226 | __ret_352; \ |
| 45747 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | | |
| 45748 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | | |
| 45749 | __ret = (float16x4_t) __builtin_neon_vfma_lane_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, __p3, 8); \ | | |
| 45750 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | | |
| 45751 | __ret; \ | | |
| 45752 | }) | 46227 | }) |
| 45753 | #define __noswap_vfma_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46228 | #endif |
| 45754 | float16x4_t __ret; \ | 46229 | |
| 45755 | float16x4_t __s0 = __p0; \ | 46230 | #ifdef __LITTLE_ENDIAN__ |
| 45756 | float16x4_t __s1 = __p1; \ | 46231 | #define vdup_laneq_p16(__p0_353, __p1_353) __extension__ ({ \ |
| 45757 | float16x4_t __s2 = __p2; \ | 46232 | poly16x4_t __ret_353; \ |
| 45758 | __ret = (float16x4_t) __builtin_neon_vfma_lane_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x8_t)__s2, __p3, 8); \ | 46233 | poly16x8_t __s0_353 = __p0_353; \ |
| 45759 | __ret; \ | 46234 | __ret_353 = splat_laneq_p16(__s0_353, __p1_353); \ |
| | 46235 | __ret_353; \ |
| | 46236 | }) |
| | 46237 | #else |
| | 46238 | #define vdup_laneq_p16(__p0_354, __p1_354) __extension__ ({ \ |
| | 46239 | poly16x4_t __ret_354; \ |
| | 46240 | poly16x8_t __s0_354 = __p0_354; \ |
| | 46241 | poly16x8_t __rev0_354; __rev0_354 = __builtin_shufflevector(__s0_354, __s0_354, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 46242 | __ret_354 = __noswap_splat_laneq_p16(__rev0_354, __p1_354); \ |
| | 46243 | __ret_354 = __builtin_shufflevector(__ret_354, __ret_354, 3, 2, 1, 0); \ |
| | 46244 | __ret_354; \ |
| 45760 | }) | 46245 | }) |
| 45761 | #endif | 46246 | #endif |
| 45762 | | 46247 | |
| 45763 | #ifdef __LITTLE_ENDIAN__ | 46248 | #ifdef __LITTLE_ENDIAN__ |
| 45764 | #define vfmah_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46249 | #define vdupq_laneq_p8(__p0_355, __p1_355) __extension__ ({ \ |
| 45765 | float16_t __ret; \ | 46250 | poly8x16_t __ret_355; \ |
| 45766 | float16_t __s0 = __p0; \ | 46251 | poly8x16_t __s0_355 = __p0_355; \ |
| 45767 | float16_t __s1 = __p1; \ | 46252 | __ret_355 = splatq_laneq_p8(__s0_355, __p1_355); \ |
| 45768 | float16x8_t __s2 = __p2; \ | 46253 | __ret_355; \ |
| 45769 | __ret = (float16_t) __builtin_neon_vfmah_laneq_f16(__s0, __s1, (float16x8_t)__s2, __p3); \ | | |
| 45770 | __ret; \ | | |
| 45771 | }) | 46254 | }) |
| 45772 | #else | 46255 | #else |
| 45773 | #define vfmah_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46256 | #define vdupq_laneq_p8(__p0_356, __p1_356) __extension__ ({ \ |
| 45774 | float16_t __ret; \ | 46257 | poly8x16_t __ret_356; \ |
| 45775 | float16_t __s0 = __p0; \ | 46258 | poly8x16_t __s0_356 = __p0_356; \ |
| 45776 | float16_t __s1 = __p1; \ | 46259 | poly8x16_t __rev0_356; __rev0_356 = __builtin_shufflevector(__s0_356, __s0_356, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45777 | float16x8_t __s2 = __p2; \ | 46260 | __ret_356 = __noswap_splatq_laneq_p8(__rev0_356, __p1_356); \ |
| 45778 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46261 | __ret_356 = __builtin_shufflevector(__ret_356, __ret_356, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45779 | __ret = (float16_t) __builtin_neon_vfmah_laneq_f16(__s0, __s1, (float16x8_t)__rev2, __p3); \ | 46262 | __ret_356; \ |
| 45780 | __ret; \ | | |
| 45781 | }) | 46263 | }) |
| 45782 | #define __noswap_vfmah_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46264 | #endif |
| 45783 | float16_t __ret; \ | 46265 | |
| 45784 | float16_t __s0 = __p0; \ | 46266 | #ifdef __LITTLE_ENDIAN__ |
| 45785 | float16_t __s1 = __p1; \ | 46267 | #define vdupq_laneq_p64(__p0_357, __p1_357) __extension__ ({ \ |
| 45786 | float16x8_t __s2 = __p2; \ | 46268 | poly64x2_t __ret_357; \ |
| 45787 | __ret = (float16_t) __builtin_neon_vfmah_laneq_f16(__s0, __s1, (float16x8_t)__s2, __p3); \ | 46269 | poly64x2_t __s0_357 = __p0_357; \ |
| 45788 | __ret; \ | 46270 | __ret_357 = splatq_laneq_p64(__s0_357, __p1_357); \ |
| | 46271 | __ret_357; \ |
| | 46272 | }) |
| | 46273 | #else |
| | 46274 | #define vdupq_laneq_p64(__p0_358, __p1_358) __extension__ ({ \ |
| | 46275 | poly64x2_t __ret_358; \ |
| | 46276 | poly64x2_t __s0_358 = __p0_358; \ |
| | 46277 | poly64x2_t __rev0_358; __rev0_358 = __builtin_shufflevector(__s0_358, __s0_358, 1, 0); \ |
| | 46278 | __ret_358 = __noswap_splatq_laneq_p64(__rev0_358, __p1_358); \ |
| | 46279 | __ret_358 = __builtin_shufflevector(__ret_358, __ret_358, 1, 0); \ |
| | 46280 | __ret_358; \ |
| 45789 | }) | 46281 | }) |
| 45790 | #endif | 46282 | #endif |
| 45791 | | 46283 | |
| 45792 | #ifdef __LITTLE_ENDIAN__ | 46284 | #ifdef __LITTLE_ENDIAN__ |
| 45793 | #define vfmaq_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46285 | #define vdupq_laneq_p16(__p0_359, __p1_359) __extension__ ({ \ |
| 45794 | float16x8_t __ret; \ | 46286 | poly16x8_t __ret_359; \ |
| 45795 | float16x8_t __s0 = __p0; \ | 46287 | poly16x8_t __s0_359 = __p0_359; \ |
| 45796 | float16x8_t __s1 = __p1; \ | 46288 | __ret_359 = splatq_laneq_p16(__s0_359, __p1_359); \ |
| 45797 | float16x8_t __s2 = __p2; \ | 46289 | __ret_359; \ |
| 45798 | __ret = (float16x8_t) __builtin_neon_vfmaq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 40); \ | | |
| 45799 | __ret; \ | | |
| 45800 | }) | 46290 | }) |
| 45801 | #else | 46291 | #else |
| 45802 | #define vfmaq_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46292 | #define vdupq_laneq_p16(__p0_360, __p1_360) __extension__ ({ \ |
| 45803 | float16x8_t __ret; \ | 46293 | poly16x8_t __ret_360; \ |
| 45804 | float16x8_t __s0 = __p0; \ | 46294 | poly16x8_t __s0_360 = __p0_360; \ |
| 45805 | float16x8_t __s1 = __p1; \ | 46295 | poly16x8_t __rev0_360; __rev0_360 = __builtin_shufflevector(__s0_360, __s0_360, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45806 | float16x8_t __s2 = __p2; \ | 46296 | __ret_360 = __noswap_splatq_laneq_p16(__rev0_360, __p1_360); \ |
| 45807 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46297 | __ret_360 = __builtin_shufflevector(__ret_360, __ret_360, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45808 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46298 | __ret_360; \ |
| 45809 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 45810 | __ret = (float16x8_t) __builtin_neon_vfmaq_laneq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 40); \ | | |
| 45811 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 45812 | __ret; \ | | |
| 45813 | }) | 46299 | }) |
| 45814 | #define __noswap_vfmaq_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46300 | #endif |
| 45815 | float16x8_t __ret; \ | 46301 | |
| 45816 | float16x8_t __s0 = __p0; \ | 46302 | #ifdef __LITTLE_ENDIAN__ |
| 45817 | float16x8_t __s1 = __p1; \ | 46303 | #define vdupq_laneq_u8(__p0_361, __p1_361) __extension__ ({ \ |
| 45818 | float16x8_t __s2 = __p2; \ | 46304 | uint8x16_t __ret_361; \ |
| 45819 | __ret = (float16x8_t) __builtin_neon_vfmaq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 40); \ | 46305 | uint8x16_t __s0_361 = __p0_361; \ |
| 45820 | __ret; \ | 46306 | __ret_361 = splatq_laneq_u8(__s0_361, __p1_361); \ |
| | 46307 | __ret_361; \ |
| | 46308 | }) |
| | 46309 | #else |
| | 46310 | #define vdupq_laneq_u8(__p0_362, __p1_362) __extension__ ({ \ |
| | 46311 | uint8x16_t __ret_362; \ |
| | 46312 | uint8x16_t __s0_362 = __p0_362; \ |
| | 46313 | uint8x16_t __rev0_362; __rev0_362 = __builtin_shufflevector(__s0_362, __s0_362, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 46314 | __ret_362 = __noswap_splatq_laneq_u8(__rev0_362, __p1_362); \ |
| | 46315 | __ret_362 = __builtin_shufflevector(__ret_362, __ret_362, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 46316 | __ret_362; \ |
| 45821 | }) | 46317 | }) |
| 45822 | #endif | 46318 | #endif |
| 45823 | | 46319 | |
| 45824 | #ifdef __LITTLE_ENDIAN__ | 46320 | #ifdef __LITTLE_ENDIAN__ |
| 45825 | #define vfma_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46321 | #define vdupq_laneq_u32(__p0_363, __p1_363) __extension__ ({ \ |
| 45826 | float16x4_t __ret; \ | 46322 | uint32x4_t __ret_363; \ |
| 45827 | float16x4_t __s0 = __p0; \ | 46323 | uint32x4_t __s0_363 = __p0_363; \ |
| 45828 | float16x4_t __s1 = __p1; \ | 46324 | __ret_363 = splatq_laneq_u32(__s0_363, __p1_363); \ |
| 45829 | float16x8_t __s2 = __p2; \ | 46325 | __ret_363; \ |
| 45830 | __ret = (float16x4_t) __builtin_neon_vfma_laneq_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x16_t)__s2, __p3, 8); \ | | |
| 45831 | __ret; \ | | |
| 45832 | }) | 46326 | }) |
| 45833 | #else | 46327 | #else |
| 45834 | #define vfma_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46328 | #define vdupq_laneq_u32(__p0_364, __p1_364) __extension__ ({ \ |
| 45835 | float16x4_t __ret; \ | 46329 | uint32x4_t __ret_364; \ |
| 45836 | float16x4_t __s0 = __p0; \ | 46330 | uint32x4_t __s0_364 = __p0_364; \ |
| 45837 | float16x4_t __s1 = __p1; \ | 46331 | uint32x4_t __rev0_364; __rev0_364 = __builtin_shufflevector(__s0_364, __s0_364, 3, 2, 1, 0); \ |
| 45838 | float16x8_t __s2 = __p2; \ | 46332 | __ret_364 = __noswap_splatq_laneq_u32(__rev0_364, __p1_364); \ |
| 45839 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 46333 | __ret_364 = __builtin_shufflevector(__ret_364, __ret_364, 3, 2, 1, 0); \ |
| 45840 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 46334 | __ret_364; \ |
| 45841 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 45842 | __ret = (float16x4_t) __builtin_neon_vfma_laneq_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x16_t)__rev2, __p3, 8); \ | | |
| 45843 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | | |
| 45844 | __ret; \ | | |
| 45845 | }) | 46335 | }) |
| 45846 | #define __noswap_vfma_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46336 | #endif |
| 45847 | float16x4_t __ret; \ | 46337 | |
| 45848 | float16x4_t __s0 = __p0; \ | 46338 | #ifdef __LITTLE_ENDIAN__ |
| 45849 | float16x4_t __s1 = __p1; \ | 46339 | #define vdupq_laneq_u64(__p0_365, __p1_365) __extension__ ({ \ |
| 45850 | float16x8_t __s2 = __p2; \ | 46340 | uint64x2_t __ret_365; \ |
| 45851 | __ret = (float16x4_t) __builtin_neon_vfma_laneq_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x16_t)__s2, __p3, 8); \ | 46341 | uint64x2_t __s0_365 = __p0_365; \ |
| 45852 | __ret; \ | 46342 | __ret_365 = splatq_laneq_u64(__s0_365, __p1_365); \ |
| | 46343 | __ret_365; \ |
| | 46344 | }) |
| | 46345 | #else |
| | 46346 | #define vdupq_laneq_u64(__p0_366, __p1_366) __extension__ ({ \ |
| | 46347 | uint64x2_t __ret_366; \ |
| | 46348 | uint64x2_t __s0_366 = __p0_366; \ |
| | 46349 | uint64x2_t __rev0_366; __rev0_366 = __builtin_shufflevector(__s0_366, __s0_366, 1, 0); \ |
| | 46350 | __ret_366 = __noswap_splatq_laneq_u64(__rev0_366, __p1_366); \ |
| | 46351 | __ret_366 = __builtin_shufflevector(__ret_366, __ret_366, 1, 0); \ |
| | 46352 | __ret_366; \ |
| 45853 | }) | 46353 | }) |
| 45854 | #endif | 46354 | #endif |
| 45855 | | 46355 | |
| 45856 | #ifdef __LITTLE_ENDIAN__ | 46356 | #ifdef __LITTLE_ENDIAN__ |
| 45857 | #define vfmaq_n_f16(__p0, __p1, __p2) __extension__ ({ \ | 46357 | #define vdupq_laneq_u16(__p0_367, __p1_367) __extension__ ({ \ |
| 45858 | float16x8_t __ret; \ | 46358 | uint16x8_t __ret_367; \ |
| 45859 | float16x8_t __s0 = __p0; \ | 46359 | uint16x8_t __s0_367 = __p0_367; \ |
| 45860 | float16x8_t __s1 = __p1; \ | 46360 | __ret_367 = splatq_laneq_u16(__s0_367, __p1_367); \ |
| 45861 | float16_t __s2 = __p2; \ | 46361 | __ret_367; \ |
| 45862 | __ret = vfmaq_f16(__s0, __s1, (float16x8_t) {__s2, __s2, __s2, __s2, __s2, __s2, __s2, __s2}); \ | | |
| 45863 | __ret; \ | | |
| 45864 | }) | 46362 | }) |
| 45865 | #else | 46363 | #else |
| 45866 | #define vfmaq_n_f16(__p0, __p1, __p2) __extension__ ({ \ | 46364 | #define vdupq_laneq_u16(__p0_368, __p1_368) __extension__ ({ \ |
| 45867 | float16x8_t __ret; \ | 46365 | uint16x8_t __ret_368; \ |
| 45868 | float16x8_t __s0 = __p0; \ | 46366 | uint16x8_t __s0_368 = __p0_368; \ |
| 45869 | float16x8_t __s1 = __p1; \ | 46367 | uint16x8_t __rev0_368; __rev0_368 = __builtin_shufflevector(__s0_368, __s0_368, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45870 | float16_t __s2 = __p2; \ | 46368 | __ret_368 = __noswap_splatq_laneq_u16(__rev0_368, __p1_368); \ |
| 45871 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46369 | __ret_368 = __builtin_shufflevector(__ret_368, __ret_368, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45872 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46370 | __ret_368; \ |
| 45873 | __ret = __noswap_vfmaq_f16(__rev0, __rev1, (float16x8_t) {__s2, __s2, __s2, __s2, __s2, __s2, __s2, __s2}); \ | | |
| 45874 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 45875 | __ret; \ | | |
| 45876 | }) | 46371 | }) |
| 45877 | #endif | 46372 | #endif |
| 45878 | | 46373 | |
| 45879 | #ifdef __LITTLE_ENDIAN__ | 46374 | #ifdef __LITTLE_ENDIAN__ |
| 45880 | #define vfma_n_f16(__p0, __p1, __p2) __extension__ ({ \ | 46375 | #define vdupq_laneq_s8(__p0_369, __p1_369) __extension__ ({ \ |
| 45881 | float16x4_t __ret; \ | 46376 | int8x16_t __ret_369; \ |
| 45882 | float16x4_t __s0 = __p0; \ | 46377 | int8x16_t __s0_369 = __p0_369; \ |
| 45883 | float16x4_t __s1 = __p1; \ | 46378 | __ret_369 = splatq_laneq_s8(__s0_369, __p1_369); \ |
| 45884 | float16_t __s2 = __p2; \ | 46379 | __ret_369; \ |
| 45885 | __ret = vfma_f16(__s0, __s1, (float16x4_t) {__s2, __s2, __s2, __s2}); \ | | |
| 45886 | __ret; \ | | |
| 45887 | }) | 46380 | }) |
| 45888 | #else | 46381 | #else |
| 45889 | #define vfma_n_f16(__p0, __p1, __p2) __extension__ ({ \ | 46382 | #define vdupq_laneq_s8(__p0_370, __p1_370) __extension__ ({ \ |
| 45890 | float16x4_t __ret; \ | 46383 | int8x16_t __ret_370; \ |
| 45891 | float16x4_t __s0 = __p0; \ | 46384 | int8x16_t __s0_370 = __p0_370; \ |
| 45892 | float16x4_t __s1 = __p1; \ | 46385 | int8x16_t __rev0_370; __rev0_370 = __builtin_shufflevector(__s0_370, __s0_370, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45893 | float16_t __s2 = __p2; \ | 46386 | __ret_370 = __noswap_splatq_laneq_s8(__rev0_370, __p1_370); \ |
| 45894 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 46387 | __ret_370 = __builtin_shufflevector(__ret_370, __ret_370, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45895 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 46388 | __ret_370; \ |
| 45896 | __ret = __noswap_vfma_f16(__rev0, __rev1, (float16x4_t) {__s2, __s2, __s2, __s2}); \ | | |
| 45897 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | | |
| 45898 | __ret; \ | | |
| 45899 | }) | 46389 | }) |
| 45900 | #endif | 46390 | #endif |
| 45901 | | 46391 | |
| 45902 | #ifdef __LITTLE_ENDIAN__ | 46392 | #ifdef __LITTLE_ENDIAN__ |
| 45903 | #define vfmsh_lane_f16(__p0_281, __p1_281, __p2_281, __p3_281) __extension__ ({ \ | 46393 | #define vdupq_laneq_f64(__p0_371, __p1_371) __extension__ ({ \ |
| 45904 | float16_t __ret_281; \ | 46394 | float64x2_t __ret_371; \ |
| 45905 | float16_t __s0_281 = __p0_281; \ | 46395 | float64x2_t __s0_371 = __p0_371; \ |
| 45906 | float16_t __s1_281 = __p1_281; \ | 46396 | __ret_371 = splatq_laneq_f64(__s0_371, __p1_371); \ |
| 45907 | float16x4_t __s2_281 = __p2_281; \ | 46397 | __ret_371; \ |
| 45908 | __ret_281 = vfmah_lane_f16(__s0_281, -__s1_281, __s2_281, __p3_281); \ | | |
| 45909 | __ret_281; \ | | |
| 45910 | }) | 46398 | }) |
| 45911 | #else | 46399 | #else |
| 45912 | #define vfmsh_lane_f16(__p0_282, __p1_282, __p2_282, __p3_282) __extension__ ({ \ | 46400 | #define vdupq_laneq_f64(__p0_372, __p1_372) __extension__ ({ \ |
| 45913 | float16_t __ret_282; \ | 46401 | float64x2_t __ret_372; \ |
| 45914 | float16_t __s0_282 = __p0_282; \ | 46402 | float64x2_t __s0_372 = __p0_372; \ |
| 45915 | float16_t __s1_282 = __p1_282; \ | 46403 | float64x2_t __rev0_372; __rev0_372 = __builtin_shufflevector(__s0_372, __s0_372, 1, 0); \ |
| 45916 | float16x4_t __s2_282 = __p2_282; \ | 46404 | __ret_372 = __noswap_splatq_laneq_f64(__rev0_372, __p1_372); \ |
| 45917 | float16x4_t __rev2_282; __rev2_282 = __builtin_shufflevector(__s2_282, __s2_282, 3, 2, 1, 0); \ | 46405 | __ret_372 = __builtin_shufflevector(__ret_372, __ret_372, 1, 0); \ |
| 45918 | __ret_282 = __noswap_vfmah_lane_f16(__s0_282, -__s1_282, __rev2_282, __p3_282); \ | 46406 | __ret_372; \ |
| 45919 | __ret_282; \ | | |
| 45920 | }) | 46407 | }) |
| 45921 | #endif | 46408 | #endif |
| 45922 | | 46409 | |
| 45923 | #ifdef __LITTLE_ENDIAN__ | 46410 | #ifdef __LITTLE_ENDIAN__ |
| 45924 | #define vfmsq_lane_f16(__p0_283, __p1_283, __p2_283, __p3_283) __extension__ ({ \ | 46411 | #define vdupq_laneq_f32(__p0_373, __p1_373) __extension__ ({ \ |
| 45925 | float16x8_t __ret_283; \ | 46412 | float32x4_t __ret_373; \ |
| 45926 | float16x8_t __s0_283 = __p0_283; \ | 46413 | float32x4_t __s0_373 = __p0_373; \ |
| 45927 | float16x8_t __s1_283 = __p1_283; \ | 46414 | __ret_373 = splatq_laneq_f32(__s0_373, __p1_373); \ |
| 45928 | float16x4_t __s2_283 = __p2_283; \ | 46415 | __ret_373; \ |
| 45929 | __ret_283 = vfmaq_lane_f16(__s0_283, -__s1_283, __s2_283, __p3_283); \ | | |
| 45930 | __ret_283; \ | | |
| 45931 | }) | 46416 | }) |
| 45932 | #else | 46417 | #else |
| 45933 | #define vfmsq_lane_f16(__p0_284, __p1_284, __p2_284, __p3_284) __extension__ ({ \ | 46418 | #define vdupq_laneq_f32(__p0_374, __p1_374) __extension__ ({ \ |
| 45934 | float16x8_t __ret_284; \ | 46419 | float32x4_t __ret_374; \ |
| 45935 | float16x8_t __s0_284 = __p0_284; \ | 46420 | float32x4_t __s0_374 = __p0_374; \ |
| 45936 | float16x8_t __s1_284 = __p1_284; \ | 46421 | float32x4_t __rev0_374; __rev0_374 = __builtin_shufflevector(__s0_374, __s0_374, 3, 2, 1, 0); \ |
| 45937 | float16x4_t __s2_284 = __p2_284; \ | 46422 | __ret_374 = __noswap_splatq_laneq_f32(__rev0_374, __p1_374); \ |
| 45938 | float16x8_t __rev0_284; __rev0_284 = __builtin_shufflevector(__s0_284, __s0_284, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46423 | __ret_374 = __builtin_shufflevector(__ret_374, __ret_374, 3, 2, 1, 0); \ |
| 45939 | float16x8_t __rev1_284; __rev1_284 = __builtin_shufflevector(__s1_284, __s1_284, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46424 | __ret_374; \ |
| 45940 | float16x4_t __rev2_284; __rev2_284 = __builtin_shufflevector(__s2_284, __s2_284, 3, 2, 1, 0); \ | | |
| 45941 | __ret_284 = __noswap_vfmaq_lane_f16(__rev0_284, -__rev1_284, __rev2_284, __p3_284); \ | | |
| 45942 | __ret_284 = __builtin_shufflevector(__ret_284, __ret_284, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 45943 | __ret_284; \ | | |
| 45944 | }) | 46425 | }) |
| 45945 | #endif | 46426 | #endif |
| 45946 | | 46427 | |
| 45947 | #ifdef __LITTLE_ENDIAN__ | 46428 | #ifdef __LITTLE_ENDIAN__ |
| 45948 | #define vfms_lane_f16(__p0_285, __p1_285, __p2_285, __p3_285) __extension__ ({ \ | 46429 | #define vdupq_laneq_f16(__p0_375, __p1_375) __extension__ ({ \ |
| 45949 | float16x4_t __ret_285; \ | 46430 | float16x8_t __ret_375; \ |
| 45950 | float16x4_t __s0_285 = __p0_285; \ | 46431 | float16x8_t __s0_375 = __p0_375; \ |
| 45951 | float16x4_t __s1_285 = __p1_285; \ | 46432 | __ret_375 = splatq_laneq_f16(__s0_375, __p1_375); \ |
| 45952 | float16x4_t __s2_285 = __p2_285; \ | 46433 | __ret_375; \ |
| 45953 | __ret_285 = vfma_lane_f16(__s0_285, -__s1_285, __s2_285, __p3_285); \ | | |
| 45954 | __ret_285; \ | | |
| 45955 | }) | 46434 | }) |
| 45956 | #else | 46435 | #else |
| 45957 | #define vfms_lane_f16(__p0_286, __p1_286, __p2_286, __p3_286) __extension__ ({ \ | 46436 | #define vdupq_laneq_f16(__p0_376, __p1_376) __extension__ ({ \ |
| 45958 | float16x4_t __ret_286; \ | 46437 | float16x8_t __ret_376; \ |
| 45959 | float16x4_t __s0_286 = __p0_286; \ | 46438 | float16x8_t __s0_376 = __p0_376; \ |
| 45960 | float16x4_t __s1_286 = __p1_286; \ | 46439 | float16x8_t __rev0_376; __rev0_376 = __builtin_shufflevector(__s0_376, __s0_376, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45961 | float16x4_t __s2_286 = __p2_286; \ | 46440 | __ret_376 = __noswap_splatq_laneq_f16(__rev0_376, __p1_376); \ |
| 45962 | float16x4_t __rev0_286; __rev0_286 = __builtin_shufflevector(__s0_286, __s0_286, 3, 2, 1, 0); \ | 46441 | __ret_376 = __builtin_shufflevector(__ret_376, __ret_376, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45963 | float16x4_t __rev1_286; __rev1_286 = __builtin_shufflevector(__s1_286, __s1_286, 3, 2, 1, 0); \ | 46442 | __ret_376; \ |
| 45964 | float16x4_t __rev2_286; __rev2_286 = __builtin_shufflevector(__s2_286, __s2_286, 3, 2, 1, 0); \ | | |
| 45965 | __ret_286 = __noswap_vfma_lane_f16(__rev0_286, -__rev1_286, __rev2_286, __p3_286); \ | | |
| 45966 | __ret_286 = __builtin_shufflevector(__ret_286, __ret_286, 3, 2, 1, 0); \ | | |
| 45967 | __ret_286; \ | | |
| 45968 | }) | 46443 | }) |
| 45969 | #endif | 46444 | #endif |
| 45970 | | 46445 | |
| 45971 | #ifdef __LITTLE_ENDIAN__ | 46446 | #ifdef __LITTLE_ENDIAN__ |
| 45972 | #define vfmsh_laneq_f16(__p0_287, __p1_287, __p2_287, __p3_287) __extension__ ({ \ | 46447 | #define vdupq_laneq_s32(__p0_377, __p1_377) __extension__ ({ \ |
| 45973 | float16_t __ret_287; \ | 46448 | int32x4_t __ret_377; \ |
| 45974 | float16_t __s0_287 = __p0_287; \ | 46449 | int32x4_t __s0_377 = __p0_377; \ |
| 45975 | float16_t __s1_287 = __p1_287; \ | 46450 | __ret_377 = splatq_laneq_s32(__s0_377, __p1_377); \ |
| 45976 | float16x8_t __s2_287 = __p2_287; \ | 46451 | __ret_377; \ |
| 45977 | __ret_287 = vfmah_laneq_f16(__s0_287, -__s1_287, __s2_287, __p3_287); \ | | |
| 45978 | __ret_287; \ | | |
| 45979 | }) | 46452 | }) |
| 45980 | #else | 46453 | #else |
| 45981 | #define vfmsh_laneq_f16(__p0_288, __p1_288, __p2_288, __p3_288) __extension__ ({ \ | 46454 | #define vdupq_laneq_s32(__p0_378, __p1_378) __extension__ ({ \ |
| 45982 | float16_t __ret_288; \ | 46455 | int32x4_t __ret_378; \ |
| 45983 | float16_t __s0_288 = __p0_288; \ | 46456 | int32x4_t __s0_378 = __p0_378; \ |
| 45984 | float16_t __s1_288 = __p1_288; \ | 46457 | int32x4_t __rev0_378; __rev0_378 = __builtin_shufflevector(__s0_378, __s0_378, 3, 2, 1, 0); \ |
| 45985 | float16x8_t __s2_288 = __p2_288; \ | 46458 | __ret_378 = __noswap_splatq_laneq_s32(__rev0_378, __p1_378); \ |
| 45986 | float16x8_t __rev2_288; __rev2_288 = __builtin_shufflevector(__s2_288, __s2_288, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46459 | __ret_378 = __builtin_shufflevector(__ret_378, __ret_378, 3, 2, 1, 0); \ |
| 45987 | __ret_288 = __noswap_vfmah_laneq_f16(__s0_288, -__s1_288, __rev2_288, __p3_288); \ | 46460 | __ret_378; \ |
| 45988 | __ret_288; \ | | |
| 45989 | }) | 46461 | }) |
| 45990 | #endif | 46462 | #endif |
| 45991 | | 46463 | |
| 45992 | #ifdef __LITTLE_ENDIAN__ | 46464 | #ifdef __LITTLE_ENDIAN__ |
| 45993 | #define vfmsq_laneq_f16(__p0_289, __p1_289, __p2_289, __p3_289) __extension__ ({ \ | 46465 | #define vdupq_laneq_s64(__p0_379, __p1_379) __extension__ ({ \ |
| 45994 | float16x8_t __ret_289; \ | 46466 | int64x2_t __ret_379; \ |
| 45995 | float16x8_t __s0_289 = __p0_289; \ | 46467 | int64x2_t __s0_379 = __p0_379; \ |
| 45996 | float16x8_t __s1_289 = __p1_289; \ | 46468 | __ret_379 = splatq_laneq_s64(__s0_379, __p1_379); \ |
| 45997 | float16x8_t __s2_289 = __p2_289; \ | 46469 | __ret_379; \ |
| 45998 | __ret_289 = vfmaq_laneq_f16(__s0_289, -__s1_289, __s2_289, __p3_289); \ | | |
| 45999 | __ret_289; \ | | |
| 46000 | }) | 46470 | }) |
| 46001 | #else | 46471 | #else |
| 46002 | #define vfmsq_laneq_f16(__p0_290, __p1_290, __p2_290, __p3_290) __extension__ ({ \ | 46472 | #define vdupq_laneq_s64(__p0_380, __p1_380) __extension__ ({ \ |
| 46003 | float16x8_t __ret_290; \ | 46473 | int64x2_t __ret_380; \ |
| 46004 | float16x8_t __s0_290 = __p0_290; \ | 46474 | int64x2_t __s0_380 = __p0_380; \ |
| 46005 | float16x8_t __s1_290 = __p1_290; \ | 46475 | int64x2_t __rev0_380; __rev0_380 = __builtin_shufflevector(__s0_380, __s0_380, 1, 0); \ |
| 46006 | float16x8_t __s2_290 = __p2_290; \ | 46476 | __ret_380 = __noswap_splatq_laneq_s64(__rev0_380, __p1_380); \ |
| 46007 | float16x8_t __rev0_290; __rev0_290 = __builtin_shufflevector(__s0_290, __s0_290, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46477 | __ret_380 = __builtin_shufflevector(__ret_380, __ret_380, 1, 0); \ |
| 46008 | float16x8_t __rev1_290; __rev1_290 = __builtin_shufflevector(__s1_290, __s1_290, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46478 | __ret_380; \ |
| 46009 | float16x8_t __rev2_290; __rev2_290 = __builtin_shufflevector(__s2_290, __s2_290, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 46010 | __ret_290 = __noswap_vfmaq_laneq_f16(__rev0_290, -__rev1_290, __rev2_290, __p3_290); \ | | |
| 46011 | __ret_290 = __builtin_shufflevector(__ret_290, __ret_290, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 46012 | __ret_290; \ | | |
| 46013 | }) | 46479 | }) |
| 46014 | #endif | 46480 | #endif |
| 46015 | | 46481 | |
| 46016 | #ifdef __LITTLE_ENDIAN__ | 46482 | #ifdef __LITTLE_ENDIAN__ |
| 46017 | #define vfms_laneq_f16(__p0_291, __p1_291, __p2_291, __p3_291) __extension__ ({ \ | 46483 | #define vdupq_laneq_s16(__p0_381, __p1_381) __extension__ ({ \ |
| 46018 | float16x4_t __ret_291; \ | 46484 | int16x8_t __ret_381; \ |
| 46019 | float16x4_t __s0_291 = __p0_291; \ | 46485 | int16x8_t __s0_381 = __p0_381; \ |
| 46020 | float16x4_t __s1_291 = __p1_291; \ | 46486 | __ret_381 = splatq_laneq_s16(__s0_381, __p1_381); \ |
| 46021 | float16x8_t __s2_291 = __p2_291; \ | 46487 | __ret_381; \ |
| 46022 | __ret_291 = vfma_laneq_f16(__s0_291, -__s1_291, __s2_291, __p3_291); \ | | |
| 46023 | __ret_291; \ | | |
| 46024 | }) | 46488 | }) |
| 46025 | #else | 46489 | #else |
| 46026 | #define vfms_laneq_f16(__p0_292, __p1_292, __p2_292, __p3_292) __extension__ ({ \ | 46490 | #define vdupq_laneq_s16(__p0_382, __p1_382) __extension__ ({ \ |
| 46027 | float16x4_t __ret_292; \ | 46491 | int16x8_t __ret_382; \ |
| 46028 | float16x4_t __s0_292 = __p0_292; \ | 46492 | int16x8_t __s0_382 = __p0_382; \ |
| 46029 | float16x4_t __s1_292 = __p1_292; \ | 46493 | int16x8_t __rev0_382; __rev0_382 = __builtin_shufflevector(__s0_382, __s0_382, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46030 | float16x8_t __s2_292 = __p2_292; \ | 46494 | __ret_382 = __noswap_splatq_laneq_s16(__rev0_382, __p1_382); \ |
| 46031 | float16x4_t __rev0_292; __rev0_292 = __builtin_shufflevector(__s0_292, __s0_292, 3, 2, 1, 0); \ | 46495 | __ret_382 = __builtin_shufflevector(__ret_382, __ret_382, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46032 | float16x4_t __rev1_292; __rev1_292 = __builtin_shufflevector(__s1_292, __s1_292, 3, 2, 1, 0); \ | 46496 | __ret_382; \ |
| 46033 | float16x8_t __rev2_292; __rev2_292 = __builtin_shufflevector(__s2_292, __s2_292, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 46034 | __ret_292 = __noswap_vfma_laneq_f16(__rev0_292, -__rev1_292, __rev2_292, __p3_292); \ | | |
| 46035 | __ret_292 = __builtin_shufflevector(__ret_292, __ret_292, 3, 2, 1, 0); \ | | |
| 46036 | __ret_292; \ | | |
| 46037 | }) | 46497 | }) |
| 46038 | #endif | 46498 | #endif |
| 46039 | | 46499 | |
| 46040 | #ifdef __LITTLE_ENDIAN__ | 46500 | #ifdef __LITTLE_ENDIAN__ |
| 46041 | #define vfmsq_n_f16(__p0, __p1, __p2) __extension__ ({ \ | 46501 | #define vdup_laneq_u8(__p0_383, __p1_383) __extension__ ({ \ |
| 46042 | float16x8_t __ret; \ | 46502 | uint8x8_t __ret_383; \ |
| 46043 | float16x8_t __s0 = __p0; \ | 46503 | uint8x16_t __s0_383 = __p0_383; \ |
| 46044 | float16x8_t __s1 = __p1; \ | 46504 | __ret_383 = splat_laneq_u8(__s0_383, __p1_383); \ |
| 46045 | float16_t __s2 = __p2; \ | 46505 | __ret_383; \ |
| 46046 | __ret = vfmaq_f16(__s0, -__s1, (float16x8_t) {__s2, __s2, __s2, __s2, __s2, __s2, __s2, __s2}); \ | | |
| 46047 | __ret; \ | | |
| 46048 | }) | 46506 | }) |
| 46049 | #else | 46507 | #else |
| 46050 | #define vfmsq_n_f16(__p0, __p1, __p2) __extension__ ({ \ | 46508 | #define vdup_laneq_u8(__p0_384, __p1_384) __extension__ ({ \ |
| 46051 | float16x8_t __ret; \ | 46509 | uint8x8_t __ret_384; \ |
| 46052 | float16x8_t __s0 = __p0; \ | 46510 | uint8x16_t __s0_384 = __p0_384; \ |
| 46053 | float16x8_t __s1 = __p1; \ | 46511 | uint8x16_t __rev0_384; __rev0_384 = __builtin_shufflevector(__s0_384, __s0_384, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46054 | float16_t __s2 = __p2; \ | 46512 | __ret_384 = __noswap_splat_laneq_u8(__rev0_384, __p1_384); \ |
| 46055 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46513 | __ret_384 = __builtin_shufflevector(__ret_384, __ret_384, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46056 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46514 | __ret_384; \ |
| 46057 | __ret = __noswap_vfmaq_f16(__rev0, -__rev1, (float16x8_t) {__s2, __s2, __s2, __s2, __s2, __s2, __s2, __s2}); \ | | |
| 46058 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 46059 | __ret; \ | | |
| 46060 | }) | 46515 | }) |
| 46061 | #endif | 46516 | #endif |
| 46062 | | 46517 | |
| 46063 | #ifdef __LITTLE_ENDIAN__ | 46518 | #ifdef __LITTLE_ENDIAN__ |
| 46064 | #define vfms_n_f16(__p0, __p1, __p2) __extension__ ({ \ | 46519 | #define vdup_laneq_u32(__p0_385, __p1_385) __extension__ ({ \ |
| 46065 | float16x4_t __ret; \ | 46520 | uint32x2_t __ret_385; \ |
| 46066 | float16x4_t __s0 = __p0; \ | 46521 | uint32x4_t __s0_385 = __p0_385; \ |
| 46067 | float16x4_t __s1 = __p1; \ | 46522 | __ret_385 = splat_laneq_u32(__s0_385, __p1_385); \ |
| 46068 | float16_t __s2 = __p2; \ | 46523 | __ret_385; \ |
| 46069 | __ret = vfma_f16(__s0, -__s1, (float16x4_t) {__s2, __s2, __s2, __s2}); \ | | |
| 46070 | __ret; \ | | |
| 46071 | }) | 46524 | }) |
| 46072 | #else | 46525 | #else |
| 46073 | #define vfms_n_f16(__p0, __p1, __p2) __extension__ ({ \ | 46526 | #define vdup_laneq_u32(__p0_386, __p1_386) __extension__ ({ \ |
| 46074 | float16x4_t __ret; \ | 46527 | uint32x2_t __ret_386; \ |
| 46075 | float16x4_t __s0 = __p0; \ | 46528 | uint32x4_t __s0_386 = __p0_386; \ |
| 46076 | float16x4_t __s1 = __p1; \ | 46529 | uint32x4_t __rev0_386; __rev0_386 = __builtin_shufflevector(__s0_386, __s0_386, 3, 2, 1, 0); \ |
| 46077 | float16_t __s2 = __p2; \ | 46530 | __ret_386 = __noswap_splat_laneq_u32(__rev0_386, __p1_386); \ |
| 46078 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 46531 | __ret_386 = __builtin_shufflevector(__ret_386, __ret_386, 1, 0); \ |
| 46079 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 46532 | __ret_386; \ |
| 46080 | __ret = __noswap_vfma_f16(__rev0, -__rev1, (float16x4_t) {__s2, __s2, __s2, __s2}); \ | | |
| 46081 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | | |
| 46082 | __ret; \ | | |
| 46083 | }) | 46533 | }) |
| 46084 | #endif | 46534 | #endif |
| 46085 | | 46535 | |
| 46086 | #ifdef __LITTLE_ENDIAN__ | 46536 | #ifdef __LITTLE_ENDIAN__ |
| 46087 | #define vmaxnmvq_f16(__p0) __extension__ ({ \ | 46537 | #define vdup_laneq_u64(__p0_387, __p1_387) __extension__ ({ \ |
| 46088 | float16_t __ret; \ | 46538 | uint64x1_t __ret_387; \ |
| 46089 | float16x8_t __s0 = __p0; \ | 46539 | uint64x2_t __s0_387 = __p0_387; \ |
| 46090 | __ret = (float16_t) __builtin_neon_vmaxnmvq_f16((int8x16_t)__s0); \ | 46540 | __ret_387 = splat_laneq_u64(__s0_387, __p1_387); \ |
| 46091 | __ret; \ | 46541 | __ret_387; \ |
| 46092 | }) | 46542 | }) |
| 46093 | #else | 46543 | #else |
| 46094 | #define vmaxnmvq_f16(__p0) __extension__ ({ \ | 46544 | #define vdup_laneq_u64(__p0_388, __p1_388) __extension__ ({ \ |
| 46095 | float16_t __ret; \ | 46545 | uint64x1_t __ret_388; \ |
| 46096 | float16x8_t __s0 = __p0; \ | 46546 | uint64x2_t __s0_388 = __p0_388; \ |
| 46097 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46547 | uint64x2_t __rev0_388; __rev0_388 = __builtin_shufflevector(__s0_388, __s0_388, 1, 0); \ |
| 46098 | __ret = (float16_t) __builtin_neon_vmaxnmvq_f16((int8x16_t)__rev0); \ | 46548 | __ret_388 = __noswap_splat_laneq_u64(__rev0_388, __p1_388); \ |
| 46099 | __ret; \ | 46549 | __ret_388; \ |
| 46100 | }) | 46550 | }) |
| 46101 | #endif | 46551 | #endif |
| 46102 | | 46552 | |
| 46103 | #ifdef __LITTLE_ENDIAN__ | 46553 | #ifdef __LITTLE_ENDIAN__ |
| 46104 | #define vmaxnmv_f16(__p0) __extension__ ({ \ | 46554 | #define vdup_laneq_u16(__p0_389, __p1_389) __extension__ ({ \ |
| 46105 | float16_t __ret; \ | 46555 | uint16x4_t __ret_389; \ |
| 46106 | float16x4_t __s0 = __p0; \ | 46556 | uint16x8_t __s0_389 = __p0_389; \ |
| 46107 | __ret = (float16_t) __builtin_neon_vmaxnmv_f16((int8x8_t)__s0); \ | 46557 | __ret_389 = splat_laneq_u16(__s0_389, __p1_389); \ |
| 46108 | __ret; \ | 46558 | __ret_389; \ |
| 46109 | }) | 46559 | }) |
| 46110 | #else | 46560 | #else |
| 46111 | #define vmaxnmv_f16(__p0) __extension__ ({ \ | 46561 | #define vdup_laneq_u16(__p0_390, __p1_390) __extension__ ({ \ |
| 46112 | float16_t __ret; \ | 46562 | uint16x4_t __ret_390; \ |
| 46113 | float16x4_t __s0 = __p0; \ | 46563 | uint16x8_t __s0_390 = __p0_390; \ |
| 46114 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 46564 | uint16x8_t __rev0_390; __rev0_390 = __builtin_shufflevector(__s0_390, __s0_390, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46115 | __ret = (float16_t) __builtin_neon_vmaxnmv_f16((int8x8_t)__rev0); \ | 46565 | __ret_390 = __noswap_splat_laneq_u16(__rev0_390, __p1_390); \ |
| 46116 | __ret; \ | 46566 | __ret_390 = __builtin_shufflevector(__ret_390, __ret_390, 3, 2, 1, 0); \ |
| | 46567 | __ret_390; \ |
| 46117 | }) | 46568 | }) |
| 46118 | #endif | 46569 | #endif |
| 46119 | | 46570 | |
| 46120 | #ifdef __LITTLE_ENDIAN__ | 46571 | #ifdef __LITTLE_ENDIAN__ |
| 46121 | #define vmaxvq_f16(__p0) __extension__ ({ \ | 46572 | #define vdup_laneq_s8(__p0_391, __p1_391) __extension__ ({ \ |
| 46122 | float16_t __ret; \ | 46573 | int8x8_t __ret_391; \ |
| 46123 | float16x8_t __s0 = __p0; \ | 46574 | int8x16_t __s0_391 = __p0_391; \ |
| 46124 | __ret = (float16_t) __builtin_neon_vmaxvq_f16((int8x16_t)__s0); \ | 46575 | __ret_391 = splat_laneq_s8(__s0_391, __p1_391); \ |
| 46125 | __ret; \ | 46576 | __ret_391; \ |
| 46126 | }) | 46577 | }) |
| 46127 | #else | 46578 | #else |
| 46128 | #define vmaxvq_f16(__p0) __extension__ ({ \ | 46579 | #define vdup_laneq_s8(__p0_392, __p1_392) __extension__ ({ \ |
| 46129 | float16_t __ret; \ | 46580 | int8x8_t __ret_392; \ |
| 46130 | float16x8_t __s0 = __p0; \ | 46581 | int8x16_t __s0_392 = __p0_392; \ |
| 46131 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46582 | int8x16_t __rev0_392; __rev0_392 = __builtin_shufflevector(__s0_392, __s0_392, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46132 | __ret = (float16_t) __builtin_neon_vmaxvq_f16((int8x16_t)__rev0); \ | 46583 | __ret_392 = __noswap_splat_laneq_s8(__rev0_392, __p1_392); \ |
| 46133 | __ret; \ | 46584 | __ret_392 = __builtin_shufflevector(__ret_392, __ret_392, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 46585 | __ret_392; \ |
| 46134 | }) | 46586 | }) |
| 46135 | #endif | 46587 | #endif |
| 46136 | | 46588 | |
| 46137 | #ifdef __LITTLE_ENDIAN__ | 46589 | #ifdef __LITTLE_ENDIAN__ |
| 46138 | #define vmaxv_f16(__p0) __extension__ ({ \ | 46590 | #define vdup_laneq_f64(__p0_393, __p1_393) __extension__ ({ \ |
| 46139 | float16_t __ret; \ | 46591 | float64x1_t __ret_393; \ |
| 46140 | float16x4_t __s0 = __p0; \ | 46592 | float64x2_t __s0_393 = __p0_393; \ |
| 46141 | __ret = (float16_t) __builtin_neon_vmaxv_f16((int8x8_t)__s0); \ | 46593 | __ret_393 = splat_laneq_f64(__s0_393, __p1_393); \ |
| 46142 | __ret; \ | 46594 | __ret_393; \ |
| 46143 | }) | 46595 | }) |
| 46144 | #else | 46596 | #else |
| 46145 | #define vmaxv_f16(__p0) __extension__ ({ \ | 46597 | #define vdup_laneq_f64(__p0_394, __p1_394) __extension__ ({ \ |
| 46146 | float16_t __ret; \ | 46598 | float64x1_t __ret_394; \ |
| 46147 | float16x4_t __s0 = __p0; \ | 46599 | float64x2_t __s0_394 = __p0_394; \ |
| 46148 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 46600 | float64x2_t __rev0_394; __rev0_394 = __builtin_shufflevector(__s0_394, __s0_394, 1, 0); \ |
| 46149 | __ret = (float16_t) __builtin_neon_vmaxv_f16((int8x8_t)__rev0); \ | 46601 | __ret_394 = __noswap_splat_laneq_f64(__rev0_394, __p1_394); \ |
| 46150 | __ret; \ | 46602 | __ret_394; \ |
| 46151 | }) | 46603 | }) |
| 46152 | #endif | 46604 | #endif |
| 46153 | | 46605 | |
| 46154 | #ifdef __LITTLE_ENDIAN__ | 46606 | #ifdef __LITTLE_ENDIAN__ |
| 46155 | #define vminnmvq_f16(__p0) __extension__ ({ \ | 46607 | #define vdup_laneq_f32(__p0_395, __p1_395) __extension__ ({ \ |
| 46156 | float16_t __ret; \ | 46608 | float32x2_t __ret_395; \ |
| 46157 | float16x8_t __s0 = __p0; \ | 46609 | float32x4_t __s0_395 = __p0_395; \ |
| 46158 | __ret = (float16_t) __builtin_neon_vminnmvq_f16((int8x16_t)__s0); \ | 46610 | __ret_395 = splat_laneq_f32(__s0_395, __p1_395); \ |
| 46159 | __ret; \ | 46611 | __ret_395; \ |
| 46160 | }) | 46612 | }) |
| 46161 | #else | 46613 | #else |
| 46162 | #define vminnmvq_f16(__p0) __extension__ ({ \ | 46614 | #define vdup_laneq_f32(__p0_396, __p1_396) __extension__ ({ \ |
| 46163 | float16_t __ret; \ | 46615 | float32x2_t __ret_396; \ |
| 46164 | float16x8_t __s0 = __p0; \ | 46616 | float32x4_t __s0_396 = __p0_396; \ |
| 46165 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46617 | float32x4_t __rev0_396; __rev0_396 = __builtin_shufflevector(__s0_396, __s0_396, 3, 2, 1, 0); \ |
| 46166 | __ret = (float16_t) __builtin_neon_vminnmvq_f16((int8x16_t)__rev0); \ | 46618 | __ret_396 = __noswap_splat_laneq_f32(__rev0_396, __p1_396); \ |
| 46167 | __ret; \ | 46619 | __ret_396 = __builtin_shufflevector(__ret_396, __ret_396, 1, 0); \ |
| | 46620 | __ret_396; \ |
| 46168 | }) | 46621 | }) |
| 46169 | #endif | 46622 | #endif |
| 46170 | | 46623 | |
| 46171 | #ifdef __LITTLE_ENDIAN__ | 46624 | #ifdef __LITTLE_ENDIAN__ |
| 46172 | #define vminnmv_f16(__p0) __extension__ ({ \ | 46625 | #define vdup_laneq_f16(__p0_397, __p1_397) __extension__ ({ \ |
| 46173 | float16_t __ret; \ | 46626 | float16x4_t __ret_397; \ |
| 46174 | float16x4_t __s0 = __p0; \ | 46627 | float16x8_t __s0_397 = __p0_397; \ |
| 46175 | __ret = (float16_t) __builtin_neon_vminnmv_f16((int8x8_t)__s0); \ | 46628 | __ret_397 = splat_laneq_f16(__s0_397, __p1_397); \ |
| 46176 | __ret; \ | 46629 | __ret_397; \ |
| 46177 | }) | 46630 | }) |
| 46178 | #else | 46631 | #else |
| 46179 | #define vminnmv_f16(__p0) __extension__ ({ \ | 46632 | #define vdup_laneq_f16(__p0_398, __p1_398) __extension__ ({ \ |
| 46180 | float16_t __ret; \ | 46633 | float16x4_t __ret_398; \ |
| 46181 | float16x4_t __s0 = __p0; \ | 46634 | float16x8_t __s0_398 = __p0_398; \ |
| 46182 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 46635 | float16x8_t __rev0_398; __rev0_398 = __builtin_shufflevector(__s0_398, __s0_398, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46183 | __ret = (float16_t) __builtin_neon_vminnmv_f16((int8x8_t)__rev0); \ | 46636 | __ret_398 = __noswap_splat_laneq_f16(__rev0_398, __p1_398); \ |
| 46184 | __ret; \ | 46637 | __ret_398 = __builtin_shufflevector(__ret_398, __ret_398, 3, 2, 1, 0); \ |
| | 46638 | __ret_398; \ |
| 46185 | }) | 46639 | }) |
| 46186 | #endif | 46640 | #endif |
| 46187 | | 46641 | |
| 46188 | #ifdef __LITTLE_ENDIAN__ | 46642 | #ifdef __LITTLE_ENDIAN__ |
| 46189 | #define vminvq_f16(__p0) __extension__ ({ \ | 46643 | #define vdup_laneq_s32(__p0_399, __p1_399) __extension__ ({ \ |
| 46190 | float16_t __ret; \ | 46644 | int32x2_t __ret_399; \ |
| 46191 | float16x8_t __s0 = __p0; \ | 46645 | int32x4_t __s0_399 = __p0_399; \ |
| 46192 | __ret = (float16_t) __builtin_neon_vminvq_f16((int8x16_t)__s0); \ | 46646 | __ret_399 = splat_laneq_s32(__s0_399, __p1_399); \ |
| 46193 | __ret; \ | 46647 | __ret_399; \ |
| 46194 | }) | 46648 | }) |
| 46195 | #else | 46649 | #else |
| 46196 | #define vminvq_f16(__p0) __extension__ ({ \ | 46650 | #define vdup_laneq_s32(__p0_400, __p1_400) __extension__ ({ \ |
| 46197 | float16_t __ret; \ | 46651 | int32x2_t __ret_400; \ |
| 46198 | float16x8_t __s0 = __p0; \ | 46652 | int32x4_t __s0_400 = __p0_400; \ |
| 46199 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46653 | int32x4_t __rev0_400; __rev0_400 = __builtin_shufflevector(__s0_400, __s0_400, 3, 2, 1, 0); \ |
| 46200 | __ret = (float16_t) __builtin_neon_vminvq_f16((int8x16_t)__rev0); \ | 46654 | __ret_400 = __noswap_splat_laneq_s32(__rev0_400, __p1_400); \ |
| 46201 | __ret; \ | 46655 | __ret_400 = __builtin_shufflevector(__ret_400, __ret_400, 1, 0); \ |
| | 46656 | __ret_400; \ |
| 46202 | }) | 46657 | }) |
| 46203 | #endif | 46658 | #endif |
| 46204 | | 46659 | |
| 46205 | #ifdef __LITTLE_ENDIAN__ | 46660 | #ifdef __LITTLE_ENDIAN__ |
| 46206 | #define vminv_f16(__p0) __extension__ ({ \ | 46661 | #define vdup_laneq_s64(__p0_401, __p1_401) __extension__ ({ \ |
| 46207 | float16_t __ret; \ | 46662 | int64x1_t __ret_401; \ |
| 46208 | float16x4_t __s0 = __p0; \ | 46663 | int64x2_t __s0_401 = __p0_401; \ |
| 46209 | __ret = (float16_t) __builtin_neon_vminv_f16((int8x8_t)__s0); \ | 46664 | __ret_401 = splat_laneq_s64(__s0_401, __p1_401); \ |
| 46210 | __ret; \ | 46665 | __ret_401; \ |
| 46211 | }) | 46666 | }) |
| 46212 | #else | 46667 | #else |
| 46213 | #define vminv_f16(__p0) __extension__ ({ \ | 46668 | #define vdup_laneq_s64(__p0_402, __p1_402) __extension__ ({ \ |
| 46214 | float16_t __ret; \ | 46669 | int64x1_t __ret_402; \ |
| 46215 | float16x4_t __s0 = __p0; \ | 46670 | int64x2_t __s0_402 = __p0_402; \ |
| 46216 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 46671 | int64x2_t __rev0_402; __rev0_402 = __builtin_shufflevector(__s0_402, __s0_402, 1, 0); \ |
| 46217 | __ret = (float16_t) __builtin_neon_vminv_f16((int8x8_t)__rev0); \ | 46672 | __ret_402 = __noswap_splat_laneq_s64(__rev0_402, __p1_402); \ |
| 46218 | __ret; \ | 46673 | __ret_402; \ |
| 46219 | }) | 46674 | }) |
| 46220 | #endif | 46675 | #endif |
| 46221 | | 46676 | |
| 46222 | #ifdef __LITTLE_ENDIAN__ | 46677 | #ifdef __LITTLE_ENDIAN__ |
| 46223 | #define vmulq_laneq_f16(__p0_293, __p1_293, __p2_293) __extension__ ({ \ | 46678 | #define vdup_laneq_s16(__p0_403, __p1_403) __extension__ ({ \ |
| 46224 | float16x8_t __ret_293; \ | 46679 | int16x4_t __ret_403; \ |
| 46225 | float16x8_t __s0_293 = __p0_293; \ | 46680 | int16x8_t __s0_403 = __p0_403; \ |
| 46226 | float16x8_t __s1_293 = __p1_293; \ | 46681 | __ret_403 = splat_laneq_s16(__s0_403, __p1_403); \ |
| 46227 | __ret_293 = __s0_293 * splatq_laneq_f16(__s1_293, __p2_293); \ | 46682 | __ret_403; \ |
| 46228 | __ret_293; \ | | |
| 46229 | }) | 46683 | }) |
| 46230 | #else | 46684 | #else |
| 46231 | #define vmulq_laneq_f16(__p0_294, __p1_294, __p2_294) __extension__ ({ \ | 46685 | #define vdup_laneq_s16(__p0_404, __p1_404) __extension__ ({ \ |
| 46232 | float16x8_t __ret_294; \ | 46686 | int16x4_t __ret_404; \ |
| 46233 | float16x8_t __s0_294 = __p0_294; \ | 46687 | int16x8_t __s0_404 = __p0_404; \ |
| 46234 | float16x8_t __s1_294 = __p1_294; \ | 46688 | int16x8_t __rev0_404; __rev0_404 = __builtin_shufflevector(__s0_404, __s0_404, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46235 | float16x8_t __rev0_294; __rev0_294 = __builtin_shufflevector(__s0_294, __s0_294, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46689 | __ret_404 = __noswap_splat_laneq_s16(__rev0_404, __p1_404); \ |
| 46236 | float16x8_t __rev1_294; __rev1_294 = __builtin_shufflevector(__s1_294, __s1_294, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46690 | __ret_404 = __builtin_shufflevector(__ret_404, __ret_404, 3, 2, 1, 0); \ |
| 46237 | __ret_294 = __rev0_294 * __noswap_splatq_laneq_f16(__rev1_294, __p2_294); \ | 46691 | __ret_404; \ |
| 46238 | __ret_294 = __builtin_shufflevector(__ret_294, __ret_294, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 46239 | __ret_294; \ | | |
| 46240 | }) | 46692 | }) |
| 46241 | #endif | 46693 | #endif |
| 46242 | | 46694 | |
| | 46695 | __ai poly64x1_t vdup_n_p64(poly64_t __p0) { |
| | 46696 | poly64x1_t __ret; |
| | 46697 | __ret = (poly64x1_t) {__p0}; |
| | 46698 | return __ret; |
| | 46699 | } |
| 46243 | #ifdef __LITTLE_ENDIAN__ | 46700 | #ifdef __LITTLE_ENDIAN__ |
| 46244 | #define vmul_laneq_f16(__p0_295, __p1_295, __p2_295) __extension__ ({ \ | 46701 | __ai poly64x2_t vdupq_n_p64(poly64_t __p0) { |
| 46245 | float16x4_t __ret_295; \ | 46702 | poly64x2_t __ret; |
| 46246 | float16x4_t __s0_295 = __p0_295; \ | 46703 | __ret = (poly64x2_t) {__p0, __p0}; |
| 46247 | float16x8_t __s1_295 = __p1_295; \ | 46704 | return __ret; |
| 46248 | __ret_295 = __s0_295 * splat_laneq_f16(__s1_295, __p2_295); \ | 46705 | } |
| 46249 | __ret_295; \ | | |
| 46250 | }) | | |
| 46251 | #else | 46706 | #else |
| 46252 | #define vmul_laneq_f16(__p0_296, __p1_296, __p2_296) __extension__ ({ \ | 46707 | __ai poly64x2_t vdupq_n_p64(poly64_t __p0) { |
| 46253 | float16x4_t __ret_296; \ | 46708 | poly64x2_t __ret; |
| 46254 | float16x4_t __s0_296 = __p0_296; \ | 46709 | __ret = (poly64x2_t) {__p0, __p0}; |
| 46255 | float16x8_t __s1_296 = __p1_296; \ | 46710 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 46256 | float16x4_t __rev0_296; __rev0_296 = __builtin_shufflevector(__s0_296, __s0_296, 3, 2, 1, 0); \ | 46711 | return __ret; |
| 46257 | float16x8_t __rev1_296; __rev1_296 = __builtin_shufflevector(__s1_296, __s1_296, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46712 | } |
| 46258 | __ret_296 = __rev0_296 * __noswap_splat_laneq_f16(__rev1_296, __p2_296); \ | | |
| 46259 | __ret_296 = __builtin_shufflevector(__ret_296, __ret_296, 3, 2, 1, 0); \ | | |
| 46260 | __ret_296; \ | | |
| 46261 | }) | | |
| 46262 | #endif | 46713 | #endif |
| 46263 | | 46714 | |
| 46264 | #ifdef __LITTLE_ENDIAN__ | 46715 | #ifdef __LITTLE_ENDIAN__ |
| 46265 | __ai float16x8_t vmulxq_f16(float16x8_t __p0, float16x8_t __p1) { | 46716 | __ai float64x2_t vdupq_n_f64(float64_t __p0) { |
| 46266 | float16x8_t __ret; | 46717 | float64x2_t __ret; |
| 46267 | __ret = (float16x8_t) __builtin_neon_vmulxq_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | 46718 | __ret = (float64x2_t) {__p0, __p0}; |
| 46268 | return __ret; | 46719 | return __ret; |
| 46269 | } | 46720 | } |
| 46270 | #else | 46721 | #else |
| 46271 | __ai float16x8_t vmulxq_f16(float16x8_t __p0, float16x8_t __p1) { | 46722 | __ai float64x2_t vdupq_n_f64(float64_t __p0) { |
| 46272 | float16x8_t __ret; | 46723 | float64x2_t __ret; |
| 46273 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 46724 | __ret = (float64x2_t) {__p0, __p0}; |
| 46274 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 46725 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 46275 | __ret = (float16x8_t) __builtin_neon_vmulxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); | | |
| 46276 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 46277 | return __ret; | 46726 | return __ret; |
| 46278 | } | 46727 | } |
| 46279 | __ai float16x8_t __noswap_vmulxq_f16(float16x8_t __p0, float16x8_t __p1) { | 46728 | #endif |
| 46280 | float16x8_t __ret; | 46729 | |
| 46281 | __ret = (float16x8_t) __builtin_neon_vmulxq_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | 46730 | __ai float64x1_t vdup_n_f64(float64_t __p0) { |
| | 46731 | float64x1_t __ret; |
| | 46732 | __ret = (float64x1_t) {__p0}; |
| 46282 | return __ret; | 46733 | return __ret; |
| 46283 | } | 46734 | } |
| | 46735 | #define vext_p64(__p0, __p1, __p2) __extension__ ({ \ |
| | 46736 | poly64x1_t __ret; \ |
| | 46737 | poly64x1_t __s0 = __p0; \ |
| | 46738 | poly64x1_t __s1 = __p1; \ |
| | 46739 | __ret = (poly64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 6); \ |
| | 46740 | __ret; \ |
| | 46741 | }) |
| | 46742 | #ifdef __LITTLE_ENDIAN__ |
| | 46743 | #define vextq_p64(__p0, __p1, __p2) __extension__ ({ \ |
| | 46744 | poly64x2_t __ret; \ |
| | 46745 | poly64x2_t __s0 = __p0; \ |
| | 46746 | poly64x2_t __s1 = __p1; \ |
| | 46747 | __ret = (poly64x2_t) __builtin_neon_vextq_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 38); \ |
| | 46748 | __ret; \ |
| | 46749 | }) |
| | 46750 | #else |
| | 46751 | #define vextq_p64(__p0, __p1, __p2) __extension__ ({ \ |
| | 46752 | poly64x2_t __ret; \ |
| | 46753 | poly64x2_t __s0 = __p0; \ |
| | 46754 | poly64x2_t __s1 = __p1; \ |
| | 46755 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| | 46756 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| | 46757 | __ret = (poly64x2_t) __builtin_neon_vextq_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 38); \ |
| | 46758 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| | 46759 | __ret; \ |
| | 46760 | }) |
| 46284 | #endif | 46761 | #endif |
| 46285 | | 46762 | |
| 46286 | #ifdef __LITTLE_ENDIAN__ | 46763 | #ifdef __LITTLE_ENDIAN__ |
| 46287 | __ai float16x4_t vmulx_f16(float16x4_t __p0, float16x4_t __p1) { | 46764 | #define vextq_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 46288 | float16x4_t __ret; | 46765 | float64x2_t __ret; \ |
| 46289 | __ret = (float16x4_t) __builtin_neon_vmulx_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | 46766 | float64x2_t __s0 = __p0; \ |
| | 46767 | float64x2_t __s1 = __p1; \ |
| | 46768 | __ret = (float64x2_t) __builtin_neon_vextq_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 42); \ |
| | 46769 | __ret; \ |
| | 46770 | }) |
| | 46771 | #else |
| | 46772 | #define vextq_f64(__p0, __p1, __p2) __extension__ ({ \ |
| | 46773 | float64x2_t __ret; \ |
| | 46774 | float64x2_t __s0 = __p0; \ |
| | 46775 | float64x2_t __s1 = __p1; \ |
| | 46776 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| | 46777 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| | 46778 | __ret = (float64x2_t) __builtin_neon_vextq_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 42); \ |
| | 46779 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| | 46780 | __ret; \ |
| | 46781 | }) |
| | 46782 | #endif |
| | 46783 | |
| | 46784 | #define vext_f64(__p0, __p1, __p2) __extension__ ({ \ |
| | 46785 | float64x1_t __ret; \ |
| | 46786 | float64x1_t __s0 = __p0; \ |
| | 46787 | float64x1_t __s1 = __p1; \ |
| | 46788 | __ret = (float64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 10); \ |
| | 46789 | __ret; \ |
| | 46790 | }) |
| | 46791 | #ifdef __LITTLE_ENDIAN__ |
| | 46792 | __ai float64x2_t vfmaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| | 46793 | float64x2_t __ret; |
| | 46794 | __ret = (float64x2_t) __builtin_neon_vfmaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); |
| 46290 | return __ret; | 46795 | return __ret; |
| 46291 | } | 46796 | } |
| 46292 | #else | 46797 | #else |
| 46293 | __ai float16x4_t vmulx_f16(float16x4_t __p0, float16x4_t __p1) { | 46798 | __ai float64x2_t vfmaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 46294 | float16x4_t __ret; | 46799 | float64x2_t __ret; |
| 46295 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 46800 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 46296 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 46801 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 46297 | __ret = (float16x4_t) __builtin_neon_vmulx_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); | 46802 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 46298 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 46803 | __ret = (float64x2_t) __builtin_neon_vfmaq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 42); |
| | 46804 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 46299 | return __ret; | 46805 | return __ret; |
| 46300 | } | 46806 | } |
| 46301 | __ai float16x4_t __noswap_vmulx_f16(float16x4_t __p0, float16x4_t __p1) { | 46807 | __ai float64x2_t __noswap_vfmaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 46302 | float16x4_t __ret; | 46808 | float64x2_t __ret; |
| 46303 | __ret = (float16x4_t) __builtin_neon_vmulx_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | 46809 | __ret = (float64x2_t) __builtin_neon_vfmaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); |
| 46304 | return __ret; | 46810 | return __ret; |
| 46305 | } | 46811 | } |
| 46306 | #endif | 46812 | #endif |
| 46307 | | 46813 | |
| | 46814 | __ai float64x1_t vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| | 46815 | float64x1_t __ret; |
| | 46816 | __ret = (float64x1_t) __builtin_neon_vfma_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); |
| | 46817 | return __ret; |
| | 46818 | } |
| | 46819 | #define vfmad_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 46820 | float64_t __ret; \ |
| | 46821 | float64_t __s0 = __p0; \ |
| | 46822 | float64_t __s1 = __p1; \ |
| | 46823 | float64x1_t __s2 = __p2; \ |
| | 46824 | __ret = (float64_t) __builtin_neon_vfmad_lane_f64(__s0, __s1, (float64x1_t)__s2, __p3); \ |
| | 46825 | __ret; \ |
| | 46826 | }) |
| 46308 | #ifdef __LITTLE_ENDIAN__ | 46827 | #ifdef __LITTLE_ENDIAN__ |
| 46309 | #define vmulxh_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 46828 | #define vfmas_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46310 | float16_t __ret; \ | 46829 | float32_t __ret; \ |
| 46311 | float16_t __s0 = __p0; \ | 46830 | float32_t __s0 = __p0; \ |
| 46312 | float16x4_t __s1 = __p1; \ | 46831 | float32_t __s1 = __p1; \ |
| 46313 | __ret = (float16_t) __builtin_neon_vmulxh_lane_f16(__s0, (float16x4_t)__s1, __p2); \ | 46832 | float32x2_t __s2 = __p2; \ |
| | 46833 | __ret = (float32_t) __builtin_neon_vfmas_lane_f32(__s0, __s1, (float32x2_t)__s2, __p3); \ |
| 46314 | __ret; \ | 46834 | __ret; \ |
| 46315 | }) | 46835 | }) |
| 46316 | #else | 46836 | #else |
| 46317 | #define vmulxh_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 46837 | #define vfmas_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46318 | float16_t __ret; \ | 46838 | float32_t __ret; \ |
| 46319 | float16_t __s0 = __p0; \ | 46839 | float32_t __s0 = __p0; \ |
| 46320 | float16x4_t __s1 = __p1; \ | 46840 | float32_t __s1 = __p1; \ |
| 46321 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 46841 | float32x2_t __s2 = __p2; \ |
| 46322 | __ret = (float16_t) __builtin_neon_vmulxh_lane_f16(__s0, (float16x4_t)__rev1, __p2); \ | 46842 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ |
| | 46843 | __ret = (float32_t) __builtin_neon_vfmas_lane_f32(__s0, __s1, (float32x2_t)__rev2, __p3); \ |
| | 46844 | __ret; \ |
| | 46845 | }) |
| | 46846 | #define __noswap_vfmas_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 46847 | float32_t __ret; \ |
| | 46848 | float32_t __s0 = __p0; \ |
| | 46849 | float32_t __s1 = __p1; \ |
| | 46850 | float32x2_t __s2 = __p2; \ |
| | 46851 | __ret = (float32_t) __builtin_neon_vfmas_lane_f32(__s0, __s1, (float32x2_t)__s2, __p3); \ |
| 46323 | __ret; \ | 46852 | __ret; \ |
| 46324 | }) | 46853 | }) |
| 46325 | #endif | 46854 | #endif |
| 46326 | | 46855 | |
| 46327 | #ifdef __LITTLE_ENDIAN__ | 46856 | #ifdef __LITTLE_ENDIAN__ |
| 46328 | #define vmulxq_lane_f16(__p0_297, __p1_297, __p2_297) __extension__ ({ \ | 46857 | #define vfmaq_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46329 | float16x8_t __ret_297; \ | 46858 | float64x2_t __ret; \ |
| 46330 | float16x8_t __s0_297 = __p0_297; \ | 46859 | float64x2_t __s0 = __p0; \ |
| 46331 | float16x4_t __s1_297 = __p1_297; \ | 46860 | float64x2_t __s1 = __p1; \ |
| 46332 | __ret_297 = vmulxq_f16(__s0_297, splatq_lane_f16(__s1_297, __p2_297)); \ | 46861 | float64x1_t __s2 = __p2; \ |
| 46333 | __ret_297; \ | 46862 | __ret = (float64x2_t) __builtin_neon_vfmaq_lane_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x8_t)__s2, __p3, 42); \ |
| | 46863 | __ret; \ |
| 46334 | }) | 46864 | }) |
| 46335 | #else | 46865 | #else |
| 46336 | #define vmulxq_lane_f16(__p0_298, __p1_298, __p2_298) __extension__ ({ \ | 46866 | #define vfmaq_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46337 | float16x8_t __ret_298; \ | 46867 | float64x2_t __ret; \ |
| 46338 | float16x8_t __s0_298 = __p0_298; \ | 46868 | float64x2_t __s0 = __p0; \ |
| 46339 | float16x4_t __s1_298 = __p1_298; \ | 46869 | float64x2_t __s1 = __p1; \ |
| 46340 | float16x8_t __rev0_298; __rev0_298 = __builtin_shufflevector(__s0_298, __s0_298, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46870 | float64x1_t __s2 = __p2; \ |
| 46341 | float16x4_t __rev1_298; __rev1_298 = __builtin_shufflevector(__s1_298, __s1_298, 3, 2, 1, 0); \ | 46871 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 46342 | __ret_298 = __noswap_vmulxq_f16(__rev0_298, __noswap_splatq_lane_f16(__rev1_298, __p2_298)); \ | 46872 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 46343 | __ret_298 = __builtin_shufflevector(__ret_298, __ret_298, 7, 6, 5, 4, 3, 2, 1, 0); \ | 46873 | __ret = (float64x2_t) __builtin_neon_vfmaq_lane_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x8_t)__s2, __p3, 42); \ |
| 46344 | __ret_298; \ | 46874 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| | 46875 | __ret; \ |
| | 46876 | }) |
| | 46877 | #define __noswap_vfmaq_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 46878 | float64x2_t __ret; \ |
| | 46879 | float64x2_t __s0 = __p0; \ |
| | 46880 | float64x2_t __s1 = __p1; \ |
| | 46881 | float64x1_t __s2 = __p2; \ |
| | 46882 | __ret = (float64x2_t) __builtin_neon_vfmaq_lane_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x8_t)__s2, __p3, 42); \ |
| | 46883 | __ret; \ |
| 46345 | }) | 46884 | }) |
| 46346 | #endif | 46885 | #endif |
| 46347 | | 46886 | |
| 46348 | #ifdef __LITTLE_ENDIAN__ | 46887 | #ifdef __LITTLE_ENDIAN__ |
| 46349 | #define vmulx_lane_f16(__p0_299, __p1_299, __p2_299) __extension__ ({ \ | 46888 | #define vfmaq_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46350 | float16x4_t __ret_299; \ | 46889 | float32x4_t __ret; \ |
| 46351 | float16x4_t __s0_299 = __p0_299; \ | 46890 | float32x4_t __s0 = __p0; \ |
| 46352 | float16x4_t __s1_299 = __p1_299; \ | 46891 | float32x4_t __s1 = __p1; \ |
| 46353 | __ret_299 = vmulx_f16(__s0_299, splat_lane_f16(__s1_299, __p2_299)); \ | 46892 | float32x2_t __s2 = __p2; \ |
| 46354 | __ret_299; \ | 46893 | __ret = (float32x4_t) __builtin_neon_vfmaq_lane_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x8_t)__s2, __p3, 41); \ |
| | 46894 | __ret; \ |
| 46355 | }) | 46895 | }) |
| 46356 | #else | 46896 | #else |
| 46357 | #define vmulx_lane_f16(__p0_300, __p1_300, __p2_300) __extension__ ({ \ | 46897 | #define vfmaq_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46358 | float16x4_t __ret_300; \ | 46898 | float32x4_t __ret; \ |
| 46359 | float16x4_t __s0_300 = __p0_300; \ | 46899 | float32x4_t __s0 = __p0; \ |
| 46360 | float16x4_t __s1_300 = __p1_300; \ | 46900 | float32x4_t __s1 = __p1; \ |
| 46361 | float16x4_t __rev0_300; __rev0_300 = __builtin_shufflevector(__s0_300, __s0_300, 3, 2, 1, 0); \ | 46901 | float32x2_t __s2 = __p2; \ |
| 46362 | float16x4_t __rev1_300; __rev1_300 = __builtin_shufflevector(__s1_300, __s1_300, 3, 2, 1, 0); \ | 46902 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 46363 | __ret_300 = __noswap_vmulx_f16(__rev0_300, __noswap_splat_lane_f16(__rev1_300, __p2_300)); \ | 46903 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 46364 | __ret_300 = __builtin_shufflevector(__ret_300, __ret_300, 3, 2, 1, 0); \ | 46904 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ |
| 46365 | __ret_300; \ | 46905 | __ret = (float32x4_t) __builtin_neon_vfmaq_lane_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x8_t)__rev2, __p3, 41); \ |
| | 46906 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 46907 | __ret; \ |
| | 46908 | }) |
| | 46909 | #define __noswap_vfmaq_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 46910 | float32x4_t __ret; \ |
| | 46911 | float32x4_t __s0 = __p0; \ |
| | 46912 | float32x4_t __s1 = __p1; \ |
| | 46913 | float32x2_t __s2 = __p2; \ |
| | 46914 | __ret = (float32x4_t) __builtin_neon_vfmaq_lane_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x8_t)__s2, __p3, 41); \ |
| | 46915 | __ret; \ |
| | 46916 | }) |
| | 46917 | #endif |
| | 46918 | |
| | 46919 | #define vfma_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 46920 | float64x1_t __ret; \ |
| | 46921 | float64x1_t __s0 = __p0; \ |
| | 46922 | float64x1_t __s1 = __p1; \ |
| | 46923 | float64x1_t __s2 = __p2; \ |
| | 46924 | __ret = (float64x1_t) __builtin_neon_vfma_lane_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x8_t)__s2, __p3, 10); \ |
| | 46925 | __ret; \ |
| | 46926 | }) |
| | 46927 | #ifdef __LITTLE_ENDIAN__ |
| | 46928 | #define vfma_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 46929 | float32x2_t __ret; \ |
| | 46930 | float32x2_t __s0 = __p0; \ |
| | 46931 | float32x2_t __s1 = __p1; \ |
| | 46932 | float32x2_t __s2 = __p2; \ |
| | 46933 | __ret = (float32x2_t) __builtin_neon_vfma_lane_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x8_t)__s2, __p3, 9); \ |
| | 46934 | __ret; \ |
| | 46935 | }) |
| | 46936 | #else |
| | 46937 | #define vfma_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 46938 | float32x2_t __ret; \ |
| | 46939 | float32x2_t __s0 = __p0; \ |
| | 46940 | float32x2_t __s1 = __p1; \ |
| | 46941 | float32x2_t __s2 = __p2; \ |
| | 46942 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| | 46943 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| | 46944 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ |
| | 46945 | __ret = (float32x2_t) __builtin_neon_vfma_lane_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, __p3, 9); \ |
| | 46946 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| | 46947 | __ret; \ |
| | 46948 | }) |
| | 46949 | #define __noswap_vfma_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 46950 | float32x2_t __ret; \ |
| | 46951 | float32x2_t __s0 = __p0; \ |
| | 46952 | float32x2_t __s1 = __p1; \ |
| | 46953 | float32x2_t __s2 = __p2; \ |
| | 46954 | __ret = (float32x2_t) __builtin_neon_vfma_lane_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x8_t)__s2, __p3, 9); \ |
| | 46955 | __ret; \ |
| | 46956 | }) |
| | 46957 | #endif |
| | 46958 | |
| | 46959 | #ifdef __LITTLE_ENDIAN__ |
| | 46960 | #define vfmad_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 46961 | float64_t __ret; \ |
| | 46962 | float64_t __s0 = __p0; \ |
| | 46963 | float64_t __s1 = __p1; \ |
| | 46964 | float64x2_t __s2 = __p2; \ |
| | 46965 | __ret = (float64_t) __builtin_neon_vfmad_laneq_f64(__s0, __s1, (float64x2_t)__s2, __p3); \ |
| | 46966 | __ret; \ |
| | 46967 | }) |
| | 46968 | #else |
| | 46969 | #define vfmad_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 46970 | float64_t __ret; \ |
| | 46971 | float64_t __s0 = __p0; \ |
| | 46972 | float64_t __s1 = __p1; \ |
| | 46973 | float64x2_t __s2 = __p2; \ |
| | 46974 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ |
| | 46975 | __ret = (float64_t) __builtin_neon_vfmad_laneq_f64(__s0, __s1, (float64x2_t)__rev2, __p3); \ |
| | 46976 | __ret; \ |
| | 46977 | }) |
| | 46978 | #define __noswap_vfmad_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 46979 | float64_t __ret; \ |
| | 46980 | float64_t __s0 = __p0; \ |
| | 46981 | float64_t __s1 = __p1; \ |
| | 46982 | float64x2_t __s2 = __p2; \ |
| | 46983 | __ret = (float64_t) __builtin_neon_vfmad_laneq_f64(__s0, __s1, (float64x2_t)__s2, __p3); \ |
| | 46984 | __ret; \ |
| 46366 | }) | 46985 | }) |
| 46367 | #endif | 46986 | #endif |
| 46368 | | 46987 | |
| 46369 | #ifdef __LITTLE_ENDIAN__ | 46988 | #ifdef __LITTLE_ENDIAN__ |
| 46370 | #define vmulxh_laneq_f16(__p0, __p1, __p2) __extension__ ({ \ | 46989 | #define vfmas_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46371 | float16_t __ret; \ | 46990 | float32_t __ret; \ |
| 46372 | float16_t __s0 = __p0; \ | 46991 | float32_t __s0 = __p0; \ |
| 46373 | float16x8_t __s1 = __p1; \ | 46992 | float32_t __s1 = __p1; \ |
| 46374 | __ret = (float16_t) __builtin_neon_vmulxh_laneq_f16(__s0, (float16x8_t)__s1, __p2); \ | 46993 | float32x4_t __s2 = __p2; \ |
| | 46994 | __ret = (float32_t) __builtin_neon_vfmas_laneq_f32(__s0, __s1, (float32x4_t)__s2, __p3); \ |
| 46375 | __ret; \ | 46995 | __ret; \ |
| 46376 | }) | 46996 | }) |
| 46377 | #else | 46997 | #else |
| 46378 | #define vmulxh_laneq_f16(__p0, __p1, __p2) __extension__ ({ \ | 46998 | #define vfmas_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46379 | float16_t __ret; \ | 46999 | float32_t __ret; \ |
| 46380 | float16_t __s0 = __p0; \ | 47000 | float32_t __s0 = __p0; \ |
| 46381 | float16x8_t __s1 = __p1; \ | 47001 | float32_t __s1 = __p1; \ |
| 46382 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 47002 | float32x4_t __s2 = __p2; \ |
| 46383 | __ret = (float16_t) __builtin_neon_vmulxh_laneq_f16(__s0, (float16x8_t)__rev1, __p2); \ | 47003 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| | 47004 | __ret = (float32_t) __builtin_neon_vfmas_laneq_f32(__s0, __s1, (float32x4_t)__rev2, __p3); \ |
| | 47005 | __ret; \ |
| | 47006 | }) |
| | 47007 | #define __noswap_vfmas_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 47008 | float32_t __ret; \ |
| | 47009 | float32_t __s0 = __p0; \ |
| | 47010 | float32_t __s1 = __p1; \ |
| | 47011 | float32x4_t __s2 = __p2; \ |
| | 47012 | __ret = (float32_t) __builtin_neon_vfmas_laneq_f32(__s0, __s1, (float32x4_t)__s2, __p3); \ |
| 46384 | __ret; \ | 47013 | __ret; \ |
| 46385 | }) | 47014 | }) |
| 46386 | #endif | 47015 | #endif |
| 46387 | | 47016 | |
| 46388 | #ifdef __LITTLE_ENDIAN__ | 47017 | #ifdef __LITTLE_ENDIAN__ |
| 46389 | #define vmulxq_laneq_f16(__p0_301, __p1_301, __p2_301) __extension__ ({ \ | 47018 | #define vfmaq_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46390 | float16x8_t __ret_301; \ | 47019 | float64x2_t __ret; \ |
| 46391 | float16x8_t __s0_301 = __p0_301; \ | 47020 | float64x2_t __s0 = __p0; \ |
| 46392 | float16x8_t __s1_301 = __p1_301; \ | 47021 | float64x2_t __s1 = __p1; \ |
| 46393 | __ret_301 = vmulxq_f16(__s0_301, splatq_laneq_f16(__s1_301, __p2_301)); \ | 47022 | float64x2_t __s2 = __p2; \ |
| 46394 | __ret_301; \ | 47023 | __ret = (float64x2_t) __builtin_neon_vfmaq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 42); \ |
| | 47024 | __ret; \ |
| 46395 | }) | 47025 | }) |
| 46396 | #else | 47026 | #else |
| 46397 | #define vmulxq_laneq_f16(__p0_302, __p1_302, __p2_302) __extension__ ({ \ | 47027 | #define vfmaq_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46398 | float16x8_t __ret_302; \ | 47028 | float64x2_t __ret; \ |
| 46399 | float16x8_t __s0_302 = __p0_302; \ | 47029 | float64x2_t __s0 = __p0; \ |
| 46400 | float16x8_t __s1_302 = __p1_302; \ | 47030 | float64x2_t __s1 = __p1; \ |
| 46401 | float16x8_t __rev0_302; __rev0_302 = __builtin_shufflevector(__s0_302, __s0_302, 7, 6, 5, 4, 3, 2, 1, 0); \ | 47031 | float64x2_t __s2 = __p2; \ |
| 46402 | float16x8_t __rev1_302; __rev1_302 = __builtin_shufflevector(__s1_302, __s1_302, 7, 6, 5, 4, 3, 2, 1, 0); \ | 47032 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 46403 | __ret_302 = __noswap_vmulxq_f16(__rev0_302, __noswap_splatq_laneq_f16(__rev1_302, __p2_302)); \ | 47033 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 46404 | __ret_302 = __builtin_shufflevector(__ret_302, __ret_302, 7, 6, 5, 4, 3, 2, 1, 0); \ | 47034 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ |
| 46405 | __ret_302; \ | 47035 | __ret = (float64x2_t) __builtin_neon_vfmaq_laneq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 42); \ |
| | 47036 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| | 47037 | __ret; \ |
| | 47038 | }) |
| | 47039 | #define __noswap_vfmaq_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 47040 | float64x2_t __ret; \ |
| | 47041 | float64x2_t __s0 = __p0; \ |
| | 47042 | float64x2_t __s1 = __p1; \ |
| | 47043 | float64x2_t __s2 = __p2; \ |
| | 47044 | __ret = (float64x2_t) __builtin_neon_vfmaq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 42); \ |
| | 47045 | __ret; \ |
| 46406 | }) | 47046 | }) |
| 46407 | #endif | 47047 | #endif |
| 46408 | | 47048 | |
| 46409 | #ifdef __LITTLE_ENDIAN__ | 47049 | #ifdef __LITTLE_ENDIAN__ |
| 46410 | #define vmulx_laneq_f16(__p0_303, __p1_303, __p2_303) __extension__ ({ \ | 47050 | #define vfmaq_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46411 | float16x4_t __ret_303; \ | 47051 | float32x4_t __ret; \ |
| 46412 | float16x4_t __s0_303 = __p0_303; \ | 47052 | float32x4_t __s0 = __p0; \ |
| 46413 | float16x8_t __s1_303 = __p1_303; \ | 47053 | float32x4_t __s1 = __p1; \ |
| 46414 | __ret_303 = vmulx_f16(__s0_303, splat_laneq_f16(__s1_303, __p2_303)); \ | 47054 | float32x4_t __s2 = __p2; \ |
| 46415 | __ret_303; \ | 47055 | __ret = (float32x4_t) __builtin_neon_vfmaq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 41); \ |
| | 47056 | __ret; \ |
| 46416 | }) | 47057 | }) |
| 46417 | #else | 47058 | #else |
| 46418 | #define vmulx_laneq_f16(__p0_304, __p1_304, __p2_304) __extension__ ({ \ | 47059 | #define vfmaq_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46419 | float16x4_t __ret_304; \ | 47060 | float32x4_t __ret; \ |
| 46420 | float16x4_t __s0_304 = __p0_304; \ | 47061 | float32x4_t __s0 = __p0; \ |
| 46421 | float16x8_t __s1_304 = __p1_304; \ | 47062 | float32x4_t __s1 = __p1; \ |
| 46422 | float16x4_t __rev0_304; __rev0_304 = __builtin_shufflevector(__s0_304, __s0_304, 3, 2, 1, 0); \ | 47063 | float32x4_t __s2 = __p2; \ |
| 46423 | float16x8_t __rev1_304; __rev1_304 = __builtin_shufflevector(__s1_304, __s1_304, 7, 6, 5, 4, 3, 2, 1, 0); \ | 47064 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 46424 | __ret_304 = __noswap_vmulx_f16(__rev0_304, __noswap_splat_laneq_f16(__rev1_304, __p2_304)); \ | 47065 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 46425 | __ret_304 = __builtin_shufflevector(__ret_304, __ret_304, 3, 2, 1, 0); \ | 47066 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| 46426 | __ret_304; \ | 47067 | __ret = (float32x4_t) __builtin_neon_vfmaq_laneq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 41); \ |
| | 47068 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 47069 | __ret; \ |
| | 47070 | }) |
| | 47071 | #define __noswap_vfmaq_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 47072 | float32x4_t __ret; \ |
| | 47073 | float32x4_t __s0 = __p0; \ |
| | 47074 | float32x4_t __s1 = __p1; \ |
| | 47075 | float32x4_t __s2 = __p2; \ |
| | 47076 | __ret = (float32x4_t) __builtin_neon_vfmaq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 41); \ |
| | 47077 | __ret; \ |
| 46427 | }) | 47078 | }) |
| 46428 | #endif | 47079 | #endif |
| 46429 | | 47080 | |
| 46430 | #ifdef __LITTLE_ENDIAN__ | 47081 | #ifdef __LITTLE_ENDIAN__ |
| 46431 | #define vmulxq_n_f16(__p0, __p1) __extension__ ({ \ | 47082 | #define vfma_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46432 | float16x8_t __ret; \ | 47083 | float64x1_t __ret; \ |
| 46433 | float16x8_t __s0 = __p0; \ | 47084 | float64x1_t __s0 = __p0; \ |
| 46434 | float16_t __s1 = __p1; \ | 47085 | float64x1_t __s1 = __p1; \ |
| 46435 | __ret = vmulxq_f16(__s0, (float16x8_t) {__s1, __s1, __s1, __s1, __s1, __s1, __s1, __s1}); \ | 47086 | float64x2_t __s2 = __p2; \ |
| | 47087 | __ret = (float64x1_t) __builtin_neon_vfma_laneq_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x16_t)__s2, __p3, 10); \ |
| 46436 | __ret; \ | 47088 | __ret; \ |
| 46437 | }) | 47089 | }) |
| 46438 | #else | 47090 | #else |
| 46439 | #define vmulxq_n_f16(__p0, __p1) __extension__ ({ \ | 47091 | #define vfma_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46440 | float16x8_t __ret; \ | 47092 | float64x1_t __ret; \ |
| 46441 | float16x8_t __s0 = __p0; \ | 47093 | float64x1_t __s0 = __p0; \ |
| 46442 | float16_t __s1 = __p1; \ | 47094 | float64x1_t __s1 = __p1; \ |
| 46443 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 47095 | float64x2_t __s2 = __p2; \ |
| 46444 | __ret = __noswap_vmulxq_f16(__rev0, (float16x8_t) {__s1, __s1, __s1, __s1, __s1, __s1, __s1, __s1}); \ | 47096 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ |
| 46445 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 47097 | __ret = (float64x1_t) __builtin_neon_vfma_laneq_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x16_t)__rev2, __p3, 10); \ |
| | 47098 | __ret; \ |
| | 47099 | }) |
| | 47100 | #define __noswap_vfma_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 47101 | float64x1_t __ret; \ |
| | 47102 | float64x1_t __s0 = __p0; \ |
| | 47103 | float64x1_t __s1 = __p1; \ |
| | 47104 | float64x2_t __s2 = __p2; \ |
| | 47105 | __ret = (float64x1_t) __builtin_neon_vfma_laneq_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x16_t)__s2, __p3, 10); \ |
| 46446 | __ret; \ | 47106 | __ret; \ |
| 46447 | }) | 47107 | }) |
| 46448 | #endif | 47108 | #endif |
| 46449 | | 47109 | |
| 46450 | #ifdef __LITTLE_ENDIAN__ | 47110 | #ifdef __LITTLE_ENDIAN__ |
| 46451 | #define vmulx_n_f16(__p0, __p1) __extension__ ({ \ | 47111 | #define vfma_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46452 | float16x4_t __ret; \ | 47112 | float32x2_t __ret; \ |
| 46453 | float16x4_t __s0 = __p0; \ | 47113 | float32x2_t __s0 = __p0; \ |
| 46454 | float16_t __s1 = __p1; \ | 47114 | float32x2_t __s1 = __p1; \ |
| 46455 | __ret = vmulx_f16(__s0, (float16x4_t) {__s1, __s1, __s1, __s1}); \ | 47115 | float32x4_t __s2 = __p2; \ |
| | 47116 | __ret = (float32x2_t) __builtin_neon_vfma_laneq_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x16_t)__s2, __p3, 9); \ |
| 46456 | __ret; \ | 47117 | __ret; \ |
| 46457 | }) | 47118 | }) |
| 46458 | #else | 47119 | #else |
| 46459 | #define vmulx_n_f16(__p0, __p1) __extension__ ({ \ | 47120 | #define vfma_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 46460 | float16x4_t __ret; \ | 47121 | float32x2_t __ret; \ |
| 46461 | float16x4_t __s0 = __p0; \ | 47122 | float32x2_t __s0 = __p0; \ |
| 46462 | float16_t __s1 = __p1; \ | 47123 | float32x2_t __s1 = __p1; \ |
| 46463 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 47124 | float32x4_t __s2 = __p2; \ |
| 46464 | __ret = __noswap_vmulx_f16(__rev0, (float16x4_t) {__s1, __s1, __s1, __s1}); \ | 47125 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 46465 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 47126 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| | 47127 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| | 47128 | __ret = (float32x2_t) __builtin_neon_vfma_laneq_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x16_t)__rev2, __p3, 9); \ |
| | 47129 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| | 47130 | __ret; \ |
| | 47131 | }) |
| | 47132 | #define __noswap_vfma_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 47133 | float32x2_t __ret; \ |
| | 47134 | float32x2_t __s0 = __p0; \ |
| | 47135 | float32x2_t __s1 = __p1; \ |
| | 47136 | float32x4_t __s2 = __p2; \ |
| | 47137 | __ret = (float32x2_t) __builtin_neon_vfma_laneq_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x16_t)__s2, __p3, 9); \ |
| 46466 | __ret; \ | 47138 | __ret; \ |
| 46467 | }) | 47139 | }) |
| 46468 | #endif | 47140 | #endif |
| 46469 | | 47141 | |
| 46470 | #ifdef __LITTLE_ENDIAN__ | 47142 | #ifdef __LITTLE_ENDIAN__ |
| 46471 | __ai float16x8_t vpaddq_f16(float16x8_t __p0, float16x8_t __p1) { | 47143 | __ai float64x2_t vfmaq_n_f64(float64x2_t __p0, float64x2_t __p1, float64_t __p2) { |
| 46472 | float16x8_t __ret; | 47144 | float64x2_t __ret; |
| 46473 | __ret = (float16x8_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | 47145 | __ret = vfmaq_f64(__p0, __p1, (float64x2_t) {__p2, __p2}); |
| 46474 | return __ret; | 47146 | return __ret; |
| 46475 | } | 47147 | } |
| 46476 | #else | 47148 | #else |
| 46477 | __ai float16x8_t vpaddq_f16(float16x8_t __p0, float16x8_t __p1) { | 47149 | __ai float64x2_t vfmaq_n_f64(float64x2_t __p0, float64x2_t __p1, float64_t __p2) { |
| 46478 | float16x8_t __ret; | 47150 | float64x2_t __ret; |
| 46479 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 47151 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 46480 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 47152 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 46481 | __ret = (float16x8_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 47153 | __ret = __noswap_vfmaq_f64(__rev0, __rev1, (float64x2_t) {__p2, __p2}); |
| 46482 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 47154 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 46483 | return __ret; | 47155 | return __ret; |
| 46484 | } | 47156 | } |
| 46485 | #endif | 47157 | #endif |
| 46486 | | 47158 | |
| 46487 | #ifdef __LITTLE_ENDIAN__ | 47159 | __ai float64x1_t vfma_n_f64(float64x1_t __p0, float64x1_t __p1, float64_t __p2) { |
| 46488 | __ai float16x8_t vpmaxq_f16(float16x8_t __p0, float16x8_t __p1) { | 47160 | float64x1_t __ret; |
| 46489 | float16x8_t __ret; | 47161 | __ret = vfma_f64(__p0, __p1, (float64x1_t) {__p2}); |
| 46490 | __ret = (float16x8_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | | |
| 46491 | return __ret; | | |
| 46492 | } | | |
| 46493 | #else | | |
| 46494 | __ai float16x8_t vpmaxq_f16(float16x8_t __p0, float16x8_t __p1) { | | |
| 46495 | float16x8_t __ret; | | |
| 46496 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 46497 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 46498 | __ret = (float16x8_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); | | |
| 46499 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 46500 | return __ret; | 47162 | return __ret; |
| 46501 | } | 47163 | } |
| 46502 | #endif | | |
| 46503 | | | |
| 46504 | #ifdef __LITTLE_ENDIAN__ | 47164 | #ifdef __LITTLE_ENDIAN__ |
| 46505 | __ai float16x8_t vpmaxnmq_f16(float16x8_t __p0, float16x8_t __p1) { | 47165 | __ai float64x2_t vfmsq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 46506 | float16x8_t __ret; | 47166 | float64x2_t __ret; |
| 46507 | __ret = (float16x8_t) __builtin_neon_vpmaxnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | 47167 | __ret = vfmaq_f64(__p0, -__p1, __p2); |
| 46508 | return __ret; | 47168 | return __ret; |
| 46509 | } | 47169 | } |
| 46510 | #else | 47170 | #else |
| 46511 | __ai float16x8_t vpmaxnmq_f16(float16x8_t __p0, float16x8_t __p1) { | 47171 | __ai float64x2_t vfmsq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 46512 | float16x8_t __ret; | 47172 | float64x2_t __ret; |
| 46513 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 47173 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 46514 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 47174 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 46515 | __ret = (float16x8_t) __builtin_neon_vpmaxnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 47175 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 46516 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 47176 | __ret = __noswap_vfmaq_f64(__rev0, -__rev1, __rev2); |
| | 47177 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 46517 | return __ret; | 47178 | return __ret; |
| 46518 | } | 47179 | } |
| 46519 | #endif | 47180 | #endif |
| 46520 | | 47181 | |
| 46521 | #ifdef __LITTLE_ENDIAN__ | 47182 | __ai float64x1_t vfms_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| 46522 | __ai float16x4_t vpmaxnm_f16(float16x4_t __p0, float16x4_t __p1) { | 47183 | float64x1_t __ret; |
| 46523 | float16x4_t __ret; | 47184 | __ret = vfma_f64(__p0, -__p1, __p2); |
| 46524 | __ret = (float16x4_t) __builtin_neon_vpmaxnm_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | | |
| 46525 | return __ret; | 47185 | return __ret; |
| 46526 | } | 47186 | } |
| | 47187 | #define vfmsd_lane_f64(__p0_405, __p1_405, __p2_405, __p3_405) __extension__ ({ \ |
| | 47188 | float64_t __ret_405; \ |
| | 47189 | float64_t __s0_405 = __p0_405; \ |
| | 47190 | float64_t __s1_405 = __p1_405; \ |
| | 47191 | float64x1_t __s2_405 = __p2_405; \ |
| | 47192 | __ret_405 = vfmad_lane_f64(__s0_405, -__s1_405, __s2_405, __p3_405); \ |
| | 47193 | __ret_405; \ |
| | 47194 | }) |
| | 47195 | #ifdef __LITTLE_ENDIAN__ |
| | 47196 | #define vfmss_lane_f32(__p0_406, __p1_406, __p2_406, __p3_406) __extension__ ({ \ |
| | 47197 | float32_t __ret_406; \ |
| | 47198 | float32_t __s0_406 = __p0_406; \ |
| | 47199 | float32_t __s1_406 = __p1_406; \ |
| | 47200 | float32x2_t __s2_406 = __p2_406; \ |
| | 47201 | __ret_406 = vfmas_lane_f32(__s0_406, -__s1_406, __s2_406, __p3_406); \ |
| | 47202 | __ret_406; \ |
| | 47203 | }) |
| 46527 | #else | 47204 | #else |
| 46528 | __ai float16x4_t vpmaxnm_f16(float16x4_t __p0, float16x4_t __p1) { | 47205 | #define vfmss_lane_f32(__p0_407, __p1_407, __p2_407, __p3_407) __extension__ ({ \ |
| 46529 | float16x4_t __ret; | 47206 | float32_t __ret_407; \ |
| 46530 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47207 | float32_t __s0_407 = __p0_407; \ |
| 46531 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 47208 | float32_t __s1_407 = __p1_407; \ |
| 46532 | __ret = (float16x4_t) __builtin_neon_vpmaxnm_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); | 47209 | float32x2_t __s2_407 = __p2_407; \ |
| 46533 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 47210 | float32x2_t __rev2_407; __rev2_407 = __builtin_shufflevector(__s2_407, __s2_407, 1, 0); \ |
| 46534 | return __ret; | 47211 | __ret_407 = __noswap_vfmas_lane_f32(__s0_407, -__s1_407, __rev2_407, __p3_407); \ |
| 46535 | } | 47212 | __ret_407; \ |
| | 47213 | }) |
| 46536 | #endif | 47214 | #endif |
| 46537 | | 47215 | |
| 46538 | #ifdef __LITTLE_ENDIAN__ | 47216 | #ifdef __LITTLE_ENDIAN__ |
| 46539 | __ai float16x8_t vpminq_f16(float16x8_t __p0, float16x8_t __p1) { | 47217 | #define vfmsq_lane_f64(__p0_408, __p1_408, __p2_408, __p3_408) __extension__ ({ \ |
| 46540 | float16x8_t __ret; | 47218 | float64x2_t __ret_408; \ |
| 46541 | __ret = (float16x8_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | 47219 | float64x2_t __s0_408 = __p0_408; \ |
| 46542 | return __ret; | 47220 | float64x2_t __s1_408 = __p1_408; \ |
| 46543 | } | 47221 | float64x1_t __s2_408 = __p2_408; \ |
| | 47222 | __ret_408 = vfmaq_lane_f64(__s0_408, -__s1_408, __s2_408, __p3_408); \ |
| | 47223 | __ret_408; \ |
| | 47224 | }) |
| 46544 | #else | 47225 | #else |
| 46545 | __ai float16x8_t vpminq_f16(float16x8_t __p0, float16x8_t __p1) { | 47226 | #define vfmsq_lane_f64(__p0_409, __p1_409, __p2_409, __p3_409) __extension__ ({ \ |
| 46546 | float16x8_t __ret; | 47227 | float64x2_t __ret_409; \ |
| 46547 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 47228 | float64x2_t __s0_409 = __p0_409; \ |
| 46548 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 47229 | float64x2_t __s1_409 = __p1_409; \ |
| 46549 | __ret = (float16x8_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 47230 | float64x1_t __s2_409 = __p2_409; \ |
| 46550 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 47231 | float64x2_t __rev0_409; __rev0_409 = __builtin_shufflevector(__s0_409, __s0_409, 1, 0); \ |
| 46551 | return __ret; | 47232 | float64x2_t __rev1_409; __rev1_409 = __builtin_shufflevector(__s1_409, __s1_409, 1, 0); \ |
| 46552 | } | 47233 | __ret_409 = __noswap_vfmaq_lane_f64(__rev0_409, -__rev1_409, __s2_409, __p3_409); \ |
| | 47234 | __ret_409 = __builtin_shufflevector(__ret_409, __ret_409, 1, 0); \ |
| | 47235 | __ret_409; \ |
| | 47236 | }) |
| 46553 | #endif | 47237 | #endif |
| 46554 | | 47238 | |
| 46555 | #ifdef __LITTLE_ENDIAN__ | 47239 | #ifdef __LITTLE_ENDIAN__ |
| 46556 | __ai float16x8_t vpminnmq_f16(float16x8_t __p0, float16x8_t __p1) { | 47240 | #define vfmsq_lane_f32(__p0_410, __p1_410, __p2_410, __p3_410) __extension__ ({ \ |
| 46557 | float16x8_t __ret; | 47241 | float32x4_t __ret_410; \ |
| 46558 | __ret = (float16x8_t) __builtin_neon_vpminnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 40); | 47242 | float32x4_t __s0_410 = __p0_410; \ |
| 46559 | return __ret; | 47243 | float32x4_t __s1_410 = __p1_410; \ |
| 46560 | } | 47244 | float32x2_t __s2_410 = __p2_410; \ |
| | 47245 | __ret_410 = vfmaq_lane_f32(__s0_410, -__s1_410, __s2_410, __p3_410); \ |
| | 47246 | __ret_410; \ |
| | 47247 | }) |
| 46561 | #else | 47248 | #else |
| 46562 | __ai float16x8_t vpminnmq_f16(float16x8_t __p0, float16x8_t __p1) { | 47249 | #define vfmsq_lane_f32(__p0_411, __p1_411, __p2_411, __p3_411) __extension__ ({ \ |
| 46563 | float16x8_t __ret; | 47250 | float32x4_t __ret_411; \ |
| 46564 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 47251 | float32x4_t __s0_411 = __p0_411; \ |
| 46565 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 47252 | float32x4_t __s1_411 = __p1_411; \ |
| 46566 | __ret = (float16x8_t) __builtin_neon_vpminnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); | 47253 | float32x2_t __s2_411 = __p2_411; \ |
| 46567 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 47254 | float32x4_t __rev0_411; __rev0_411 = __builtin_shufflevector(__s0_411, __s0_411, 3, 2, 1, 0); \ |
| 46568 | return __ret; | 47255 | float32x4_t __rev1_411; __rev1_411 = __builtin_shufflevector(__s1_411, __s1_411, 3, 2, 1, 0); \ |
| 46569 | } | 47256 | float32x2_t __rev2_411; __rev2_411 = __builtin_shufflevector(__s2_411, __s2_411, 1, 0); \ |
| | 47257 | __ret_411 = __noswap_vfmaq_lane_f32(__rev0_411, -__rev1_411, __rev2_411, __p3_411); \ |
| | 47258 | __ret_411 = __builtin_shufflevector(__ret_411, __ret_411, 3, 2, 1, 0); \ |
| | 47259 | __ret_411; \ |
| | 47260 | }) |
| 46570 | #endif | 47261 | #endif |
| 46571 | | 47262 | |
| | 47263 | #define vfms_lane_f64(__p0_412, __p1_412, __p2_412, __p3_412) __extension__ ({ \ |
| | 47264 | float64x1_t __ret_412; \ |
| | 47265 | float64x1_t __s0_412 = __p0_412; \ |
| | 47266 | float64x1_t __s1_412 = __p1_412; \ |
| | 47267 | float64x1_t __s2_412 = __p2_412; \ |
| | 47268 | __ret_412 = vfma_lane_f64(__s0_412, -__s1_412, __s2_412, __p3_412); \ |
| | 47269 | __ret_412; \ |
| | 47270 | }) |
| 46572 | #ifdef __LITTLE_ENDIAN__ | 47271 | #ifdef __LITTLE_ENDIAN__ |
| 46573 | __ai float16x4_t vpminnm_f16(float16x4_t __p0, float16x4_t __p1) { | 47272 | #define vfms_lane_f32(__p0_413, __p1_413, __p2_413, __p3_413) __extension__ ({ \ |
| 46574 | float16x4_t __ret; | 47273 | float32x2_t __ret_413; \ |
| 46575 | __ret = (float16x4_t) __builtin_neon_vpminnm_v((int8x8_t)__p0, (int8x8_t)__p1, 8); | 47274 | float32x2_t __s0_413 = __p0_413; \ |
| 46576 | return __ret; | 47275 | float32x2_t __s1_413 = __p1_413; \ |
| 46577 | } | 47276 | float32x2_t __s2_413 = __p2_413; \ |
| | 47277 | __ret_413 = vfma_lane_f32(__s0_413, -__s1_413, __s2_413, __p3_413); \ |
| | 47278 | __ret_413; \ |
| | 47279 | }) |
| 46578 | #else | 47280 | #else |
| 46579 | __ai float16x4_t vpminnm_f16(float16x4_t __p0, float16x4_t __p1) { | 47281 | #define vfms_lane_f32(__p0_414, __p1_414, __p2_414, __p3_414) __extension__ ({ \ |
| 46580 | float16x4_t __ret; | 47282 | float32x2_t __ret_414; \ |
| 46581 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47283 | float32x2_t __s0_414 = __p0_414; \ |
| 46582 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 47284 | float32x2_t __s1_414 = __p1_414; \ |
| 46583 | __ret = (float16x4_t) __builtin_neon_vpminnm_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); | 47285 | float32x2_t __s2_414 = __p2_414; \ |
| 46584 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 47286 | float32x2_t __rev0_414; __rev0_414 = __builtin_shufflevector(__s0_414, __s0_414, 1, 0); \ |
| 46585 | return __ret; | 47287 | float32x2_t __rev1_414; __rev1_414 = __builtin_shufflevector(__s1_414, __s1_414, 1, 0); \ |
| 46586 | } | 47288 | float32x2_t __rev2_414; __rev2_414 = __builtin_shufflevector(__s2_414, __s2_414, 1, 0); \ |
| | 47289 | __ret_414 = __noswap_vfma_lane_f32(__rev0_414, -__rev1_414, __rev2_414, __p3_414); \ |
| | 47290 | __ret_414 = __builtin_shufflevector(__ret_414, __ret_414, 1, 0); \ |
| | 47291 | __ret_414; \ |
| | 47292 | }) |
| 46587 | #endif | 47293 | #endif |
| 46588 | | 47294 | |
| 46589 | #ifdef __LITTLE_ENDIAN__ | 47295 | #ifdef __LITTLE_ENDIAN__ |
| 46590 | __ai float16x8_t vrndiq_f16(float16x8_t __p0) { | 47296 | #define vfmsd_laneq_f64(__p0_415, __p1_415, __p2_415, __p3_415) __extension__ ({ \ |
| 46591 | float16x8_t __ret; | 47297 | float64_t __ret_415; \ |
| 46592 | __ret = (float16x8_t) __builtin_neon_vrndiq_v((int8x16_t)__p0, 40); | 47298 | float64_t __s0_415 = __p0_415; \ |
| 46593 | return __ret; | 47299 | float64_t __s1_415 = __p1_415; \ |
| 46594 | } | 47300 | float64x2_t __s2_415 = __p2_415; \ |
| | 47301 | __ret_415 = vfmad_laneq_f64(__s0_415, -__s1_415, __s2_415, __p3_415); \ |
| | 47302 | __ret_415; \ |
| | 47303 | }) |
| 46595 | #else | 47304 | #else |
| 46596 | __ai float16x8_t vrndiq_f16(float16x8_t __p0) { | 47305 | #define vfmsd_laneq_f64(__p0_416, __p1_416, __p2_416, __p3_416) __extension__ ({ \ |
| 46597 | float16x8_t __ret; | 47306 | float64_t __ret_416; \ |
| 46598 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 47307 | float64_t __s0_416 = __p0_416; \ |
| 46599 | __ret = (float16x8_t) __builtin_neon_vrndiq_v((int8x16_t)__rev0, 40); | 47308 | float64_t __s1_416 = __p1_416; \ |
| 46600 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 47309 | float64x2_t __s2_416 = __p2_416; \ |
| 46601 | return __ret; | 47310 | float64x2_t __rev2_416; __rev2_416 = __builtin_shufflevector(__s2_416, __s2_416, 1, 0); \ |
| 46602 | } | 47311 | __ret_416 = __noswap_vfmad_laneq_f64(__s0_416, -__s1_416, __rev2_416, __p3_416); \ |
| | 47312 | __ret_416; \ |
| | 47313 | }) |
| 46603 | #endif | 47314 | #endif |
| 46604 | | 47315 | |
| 46605 | #ifdef __LITTLE_ENDIAN__ | 47316 | #ifdef __LITTLE_ENDIAN__ |
| 46606 | __ai float16x4_t vrndi_f16(float16x4_t __p0) { | 47317 | #define vfmss_laneq_f32(__p0_417, __p1_417, __p2_417, __p3_417) __extension__ ({ \ |
| 46607 | float16x4_t __ret; | 47318 | float32_t __ret_417; \ |
| 46608 | __ret = (float16x4_t) __builtin_neon_vrndi_v((int8x8_t)__p0, 8); | 47319 | float32_t __s0_417 = __p0_417; \ |
| 46609 | return __ret; | 47320 | float32_t __s1_417 = __p1_417; \ |
| 46610 | } | 47321 | float32x4_t __s2_417 = __p2_417; \ |
| | 47322 | __ret_417 = vfmas_laneq_f32(__s0_417, -__s1_417, __s2_417, __p3_417); \ |
| | 47323 | __ret_417; \ |
| | 47324 | }) |
| 46611 | #else | 47325 | #else |
| 46612 | __ai float16x4_t vrndi_f16(float16x4_t __p0) { | 47326 | #define vfmss_laneq_f32(__p0_418, __p1_418, __p2_418, __p3_418) __extension__ ({ \ |
| 46613 | float16x4_t __ret; | 47327 | float32_t __ret_418; \ |
| 46614 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47328 | float32_t __s0_418 = __p0_418; \ |
| 46615 | __ret = (float16x4_t) __builtin_neon_vrndi_v((int8x8_t)__rev0, 8); | 47329 | float32_t __s1_418 = __p1_418; \ |
| 46616 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 47330 | float32x4_t __s2_418 = __p2_418; \ |
| 46617 | return __ret; | 47331 | float32x4_t __rev2_418; __rev2_418 = __builtin_shufflevector(__s2_418, __s2_418, 3, 2, 1, 0); \ |
| 46618 | } | 47332 | __ret_418 = __noswap_vfmas_laneq_f32(__s0_418, -__s1_418, __rev2_418, __p3_418); \ |
| | 47333 | __ret_418; \ |
| | 47334 | }) |
| 46619 | #endif | 47335 | #endif |
| 46620 | | 47336 | |
| 46621 | #ifdef __LITTLE_ENDIAN__ | 47337 | #ifdef __LITTLE_ENDIAN__ |
| 46622 | __ai float16x8_t vsqrtq_f16(float16x8_t __p0) { | 47338 | #define vfmsq_laneq_f64(__p0_419, __p1_419, __p2_419, __p3_419) __extension__ ({ \ |
| 46623 | float16x8_t __ret; | 47339 | float64x2_t __ret_419; \ |
| 46624 | __ret = (float16x8_t) __builtin_neon_vsqrtq_v((int8x16_t)__p0, 40); | 47340 | float64x2_t __s0_419 = __p0_419; \ |
| 46625 | return __ret; | 47341 | float64x2_t __s1_419 = __p1_419; \ |
| 46626 | } | 47342 | float64x2_t __s2_419 = __p2_419; \ |
| | 47343 | __ret_419 = vfmaq_laneq_f64(__s0_419, -__s1_419, __s2_419, __p3_419); \ |
| | 47344 | __ret_419; \ |
| | 47345 | }) |
| 46627 | #else | 47346 | #else |
| 46628 | __ai float16x8_t vsqrtq_f16(float16x8_t __p0) { | 47347 | #define vfmsq_laneq_f64(__p0_420, __p1_420, __p2_420, __p3_420) __extension__ ({ \ |
| 46629 | float16x8_t __ret; | 47348 | float64x2_t __ret_420; \ |
| 46630 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 47349 | float64x2_t __s0_420 = __p0_420; \ |
| 46631 | __ret = (float16x8_t) __builtin_neon_vsqrtq_v((int8x16_t)__rev0, 40); | 47350 | float64x2_t __s1_420 = __p1_420; \ |
| 46632 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 47351 | float64x2_t __s2_420 = __p2_420; \ |
| 46633 | return __ret; | 47352 | float64x2_t __rev0_420; __rev0_420 = __builtin_shufflevector(__s0_420, __s0_420, 1, 0); \ |
| 46634 | } | 47353 | float64x2_t __rev1_420; __rev1_420 = __builtin_shufflevector(__s1_420, __s1_420, 1, 0); \ |
| | 47354 | float64x2_t __rev2_420; __rev2_420 = __builtin_shufflevector(__s2_420, __s2_420, 1, 0); \ |
| | 47355 | __ret_420 = __noswap_vfmaq_laneq_f64(__rev0_420, -__rev1_420, __rev2_420, __p3_420); \ |
| | 47356 | __ret_420 = __builtin_shufflevector(__ret_420, __ret_420, 1, 0); \ |
| | 47357 | __ret_420; \ |
| | 47358 | }) |
| 46635 | #endif | 47359 | #endif |
| 46636 | | 47360 | |
| 46637 | #ifdef __LITTLE_ENDIAN__ | 47361 | #ifdef __LITTLE_ENDIAN__ |
| 46638 | __ai float16x4_t vsqrt_f16(float16x4_t __p0) { | 47362 | #define vfmsq_laneq_f32(__p0_421, __p1_421, __p2_421, __p3_421) __extension__ ({ \ |
| 46639 | float16x4_t __ret; | 47363 | float32x4_t __ret_421; \ |
| 46640 | __ret = (float16x4_t) __builtin_neon_vsqrt_v((int8x8_t)__p0, 8); | 47364 | float32x4_t __s0_421 = __p0_421; \ |
| 46641 | return __ret; | 47365 | float32x4_t __s1_421 = __p1_421; \ |
| 46642 | } | 47366 | float32x4_t __s2_421 = __p2_421; \ |
| | 47367 | __ret_421 = vfmaq_laneq_f32(__s0_421, -__s1_421, __s2_421, __p3_421); \ |
| | 47368 | __ret_421; \ |
| | 47369 | }) |
| 46643 | #else | 47370 | #else |
| 46644 | __ai float16x4_t vsqrt_f16(float16x4_t __p0) { | 47371 | #define vfmsq_laneq_f32(__p0_422, __p1_422, __p2_422, __p3_422) __extension__ ({ \ |
| 46645 | float16x4_t __ret; | 47372 | float32x4_t __ret_422; \ |
| 46646 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47373 | float32x4_t __s0_422 = __p0_422; \ |
| 46647 | __ret = (float16x4_t) __builtin_neon_vsqrt_v((int8x8_t)__rev0, 8); | 47374 | float32x4_t __s1_422 = __p1_422; \ |
| 46648 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 47375 | float32x4_t __s2_422 = __p2_422; \ |
| 46649 | return __ret; | 47376 | float32x4_t __rev0_422; __rev0_422 = __builtin_shufflevector(__s0_422, __s0_422, 3, 2, 1, 0); \ |
| 46650 | } | 47377 | float32x4_t __rev1_422; __rev1_422 = __builtin_shufflevector(__s1_422, __s1_422, 3, 2, 1, 0); \ |
| | 47378 | float32x4_t __rev2_422; __rev2_422 = __builtin_shufflevector(__s2_422, __s2_422, 3, 2, 1, 0); \ |
| | 47379 | __ret_422 = __noswap_vfmaq_laneq_f32(__rev0_422, -__rev1_422, __rev2_422, __p3_422); \ |
| | 47380 | __ret_422 = __builtin_shufflevector(__ret_422, __ret_422, 3, 2, 1, 0); \ |
| | 47381 | __ret_422; \ |
| | 47382 | }) |
| 46651 | #endif | 47383 | #endif |
| 46652 | | 47384 | |
| 46653 | #ifdef __LITTLE_ENDIAN__ | 47385 | #ifdef __LITTLE_ENDIAN__ |
| 46654 | __ai float16x8_t vtrn1q_f16(float16x8_t __p0, float16x8_t __p1) { | 47386 | #define vfms_laneq_f64(__p0_423, __p1_423, __p2_423, __p3_423) __extension__ ({ \ |
| 46655 | float16x8_t __ret; | 47387 | float64x1_t __ret_423; \ |
| 46656 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 2, 10, 4, 12, 6, 14); | 47388 | float64x1_t __s0_423 = __p0_423; \ |
| 46657 | return __ret; | 47389 | float64x1_t __s1_423 = __p1_423; \ |
| 46658 | } | 47390 | float64x2_t __s2_423 = __p2_423; \ |
| | 47391 | __ret_423 = vfma_laneq_f64(__s0_423, -__s1_423, __s2_423, __p3_423); \ |
| | 47392 | __ret_423; \ |
| | 47393 | }) |
| 46659 | #else | 47394 | #else |
| 46660 | __ai float16x8_t vtrn1q_f16(float16x8_t __p0, float16x8_t __p1) { | 47395 | #define vfms_laneq_f64(__p0_424, __p1_424, __p2_424, __p3_424) __extension__ ({ \ |
| 46661 | float16x8_t __ret; | 47396 | float64x1_t __ret_424; \ |
| 46662 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 47397 | float64x1_t __s0_424 = __p0_424; \ |
| 46663 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 47398 | float64x1_t __s1_424 = __p1_424; \ |
| 46664 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 2, 10, 4, 12, 6, 14); | 47399 | float64x2_t __s2_424 = __p2_424; \ |
| 46665 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 47400 | float64x2_t __rev2_424; __rev2_424 = __builtin_shufflevector(__s2_424, __s2_424, 1, 0); \ |
| 46666 | return __ret; | 47401 | __ret_424 = __noswap_vfma_laneq_f64(__s0_424, -__s1_424, __rev2_424, __p3_424); \ |
| 46667 | } | 47402 | __ret_424; \ |
| | 47403 | }) |
| 46668 | #endif | 47404 | #endif |
| 46669 | | 47405 | |
| 46670 | #ifdef __LITTLE_ENDIAN__ | 47406 | #ifdef __LITTLE_ENDIAN__ |
| 46671 | __ai float16x4_t vtrn1_f16(float16x4_t __p0, float16x4_t __p1) { | 47407 | #define vfms_laneq_f32(__p0_425, __p1_425, __p2_425, __p3_425) __extension__ ({ \ |
| 46672 | float16x4_t __ret; | 47408 | float32x2_t __ret_425; \ |
| 46673 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 2, 6); | 47409 | float32x2_t __s0_425 = __p0_425; \ |
| 46674 | return __ret; | 47410 | float32x2_t __s1_425 = __p1_425; \ |
| 46675 | } | 47411 | float32x4_t __s2_425 = __p2_425; \ |
| | 47412 | __ret_425 = vfma_laneq_f32(__s0_425, -__s1_425, __s2_425, __p3_425); \ |
| | 47413 | __ret_425; \ |
| | 47414 | }) |
| 46676 | #else | 47415 | #else |
| 46677 | __ai float16x4_t vtrn1_f16(float16x4_t __p0, float16x4_t __p1) { | 47416 | #define vfms_laneq_f32(__p0_426, __p1_426, __p2_426, __p3_426) __extension__ ({ \ |
| 46678 | float16x4_t __ret; | 47417 | float32x2_t __ret_426; \ |
| 46679 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47418 | float32x2_t __s0_426 = __p0_426; \ |
| 46680 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 47419 | float32x2_t __s1_426 = __p1_426; \ |
| 46681 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 2, 6); | 47420 | float32x4_t __s2_426 = __p2_426; \ |
| 46682 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 47421 | float32x2_t __rev0_426; __rev0_426 = __builtin_shufflevector(__s0_426, __s0_426, 1, 0); \ |
| 46683 | return __ret; | 47422 | float32x2_t __rev1_426; __rev1_426 = __builtin_shufflevector(__s1_426, __s1_426, 1, 0); \ |
| 46684 | } | 47423 | float32x4_t __rev2_426; __rev2_426 = __builtin_shufflevector(__s2_426, __s2_426, 3, 2, 1, 0); \ |
| | 47424 | __ret_426 = __noswap_vfma_laneq_f32(__rev0_426, -__rev1_426, __rev2_426, __p3_426); \ |
| | 47425 | __ret_426 = __builtin_shufflevector(__ret_426, __ret_426, 1, 0); \ |
| | 47426 | __ret_426; \ |
| | 47427 | }) |
| 46685 | #endif | 47428 | #endif |
| 46686 | | 47429 | |
| 46687 | #ifdef __LITTLE_ENDIAN__ | 47430 | #ifdef __LITTLE_ENDIAN__ |
| 46688 | __ai float16x8_t vtrn2q_f16(float16x8_t __p0, float16x8_t __p1) { | 47431 | __ai float64x2_t vfmsq_n_f64(float64x2_t __p0, float64x2_t __p1, float64_t __p2) { |
| 46689 | float16x8_t __ret; | 47432 | float64x2_t __ret; |
| 46690 | __ret = __builtin_shufflevector(__p0, __p1, 1, 9, 3, 11, 5, 13, 7, 15); | 47433 | __ret = vfmaq_f64(__p0, -__p1, (float64x2_t) {__p2, __p2}); |
| 46691 | return __ret; | 47434 | return __ret; |
| 46692 | } | 47435 | } |
| 46693 | #else | 47436 | #else |
| 46694 | __ai float16x8_t vtrn2q_f16(float16x8_t __p0, float16x8_t __p1) { | 47437 | __ai float64x2_t vfmsq_n_f64(float64x2_t __p0, float64x2_t __p1, float64_t __p2) { |
| 46695 | float16x8_t __ret; | 47438 | float64x2_t __ret; |
| 46696 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 47439 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 46697 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 47440 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 46698 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 9, 3, 11, 5, 13, 7, 15); | 47441 | __ret = __noswap_vfmaq_f64(__rev0, -__rev1, (float64x2_t) {__p2, __p2}); |
| 46699 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 47442 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 46700 | return __ret; | 47443 | return __ret; |
| 46701 | } | 47444 | } |
| 46702 | #endif | 47445 | #endif |
| 46703 | | 47446 | |
| 46704 | #ifdef __LITTLE_ENDIAN__ | 47447 | #ifdef __LITTLE_ENDIAN__ |
| 46705 | __ai float16x4_t vtrn2_f16(float16x4_t __p0, float16x4_t __p1) { | 47448 | __ai float32x4_t vfmsq_n_f32(float32x4_t __p0, float32x4_t __p1, float32_t __p2) { |
| 46706 | float16x4_t __ret; | 47449 | float32x4_t __ret; |
| 46707 | __ret = __builtin_shufflevector(__p0, __p1, 1, 5, 3, 7); | 47450 | __ret = vfmaq_f32(__p0, -__p1, (float32x4_t) {__p2, __p2, __p2, __p2}); |
| 46708 | return __ret; | 47451 | return __ret; |
| 46709 | } | 47452 | } |
| 46710 | #else | 47453 | #else |
| 46711 | __ai float16x4_t vtrn2_f16(float16x4_t __p0, float16x4_t __p1) { | 47454 | __ai float32x4_t vfmsq_n_f32(float32x4_t __p0, float32x4_t __p1, float32_t __p2) { |
| 46712 | float16x4_t __ret; | 47455 | float32x4_t __ret; |
| 46713 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47456 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 46714 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 47457 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 46715 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 5, 3, 7); | 47458 | __ret = __noswap_vfmaq_f32(__rev0, -__rev1, (float32x4_t) {__p2, __p2, __p2, __p2}); |
| 46716 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 47459 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 46717 | return __ret; | 47460 | return __ret; |
| 46718 | } | 47461 | } |
| 46719 | #endif | 47462 | #endif |
| 46720 | | 47463 | |
| 46721 | #ifdef __LITTLE_ENDIAN__ | 47464 | __ai float64x1_t vfms_n_f64(float64x1_t __p0, float64x1_t __p1, float64_t __p2) { |
| 46722 | __ai float16x8_t vuzp1q_f16(float16x8_t __p0, float16x8_t __p1) { | 47465 | float64x1_t __ret; |
| 46723 | float16x8_t __ret; | 47466 | __ret = vfma_f64(__p0, -__p1, (float64x1_t) {__p2}); |
| 46724 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14); | | |
| 46725 | return __ret; | | |
| 46726 | } | | |
| 46727 | #else | | |
| 46728 | __ai float16x8_t vuzp1q_f16(float16x8_t __p0, float16x8_t __p1) { | | |
| 46729 | float16x8_t __ret; | | |
| 46730 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 46731 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 46732 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14); | | |
| 46733 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 46734 | return __ret; | 47467 | return __ret; |
| 46735 | } | 47468 | } |
| 46736 | #endif | | |
| 46737 | | | |
| 46738 | #ifdef __LITTLE_ENDIAN__ | 47469 | #ifdef __LITTLE_ENDIAN__ |
| 46739 | __ai float16x4_t vuzp1_f16(float16x4_t __p0, float16x4_t __p1) { | 47470 | __ai float32x2_t vfms_n_f32(float32x2_t __p0, float32x2_t __p1, float32_t __p2) { |
| 46740 | float16x4_t __ret; | 47471 | float32x2_t __ret; |
| 46741 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6); | 47472 | __ret = vfma_f32(__p0, -__p1, (float32x2_t) {__p2, __p2}); |
| 46742 | return __ret; | 47473 | return __ret; |
| 46743 | } | 47474 | } |
| 46744 | #else | 47475 | #else |
| 46745 | __ai float16x4_t vuzp1_f16(float16x4_t __p0, float16x4_t __p1) { | 47476 | __ai float32x2_t vfms_n_f32(float32x2_t __p0, float32x2_t __p1, float32_t __p2) { |
| 46746 | float16x4_t __ret; | 47477 | float32x2_t __ret; |
| 46747 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47478 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 46748 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 47479 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 46749 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6); | 47480 | __ret = __noswap_vfma_f32(__rev0, -__rev1, (float32x2_t) {__p2, __p2}); |
| 46750 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 47481 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 46751 | return __ret; | 47482 | return __ret; |
| 46752 | } | 47483 | } |
| 46753 | #endif | 47484 | #endif |
| 46754 | | 47485 | |
| 46755 | #ifdef __LITTLE_ENDIAN__ | 47486 | #ifdef __LITTLE_ENDIAN__ |
| 46756 | __ai float16x8_t vuzp2q_f16(float16x8_t __p0, float16x8_t __p1) { | 47487 | __ai poly64x1_t vget_high_p64(poly64x2_t __p0) { |
| 46757 | float16x8_t __ret; | 47488 | poly64x1_t __ret; |
| 46758 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15); | 47489 | __ret = __builtin_shufflevector(__p0, __p0, 1); |
| 46759 | return __ret; | 47490 | return __ret; |
| 46760 | } | 47491 | } |
| 46761 | #else | 47492 | #else |
| 46762 | __ai float16x8_t vuzp2q_f16(float16x8_t __p0, float16x8_t __p1) { | 47493 | __ai poly64x1_t vget_high_p64(poly64x2_t __p0) { |
| 46763 | float16x8_t __ret; | 47494 | poly64x1_t __ret; |
| 46764 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 47495 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 46765 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 47496 | __ret = __builtin_shufflevector(__rev0, __rev0, 1); |
| 46766 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15); | | |
| 46767 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 46768 | return __ret; | | |
| 46769 | } | | |
| 46770 | #endif | | |
| 46771 | | | |
| 46772 | #ifdef __LITTLE_ENDIAN__ | | |
| 46773 | __ai float16x4_t vuzp2_f16(float16x4_t __p0, float16x4_t __p1) { | | |
| 46774 | float16x4_t __ret; | | |
| 46775 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7); | | |
| 46776 | return __ret; | 47497 | return __ret; |
| 46777 | } | 47498 | } |
| 46778 | #else | 47499 | __ai poly64x1_t __noswap_vget_high_p64(poly64x2_t __p0) { |
| 46779 | __ai float16x4_t vuzp2_f16(float16x4_t __p0, float16x4_t __p1) { | 47500 | poly64x1_t __ret; |
| 46780 | float16x4_t __ret; | 47501 | __ret = __builtin_shufflevector(__p0, __p0, 1); |
| 46781 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 46782 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 46783 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7); | | |
| 46784 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 46785 | return __ret; | 47502 | return __ret; |
| 46786 | } | 47503 | } |
| 46787 | #endif | 47504 | #endif |
| 46788 | | 47505 | |
| 46789 | #ifdef __LITTLE_ENDIAN__ | 47506 | #ifdef __LITTLE_ENDIAN__ |
| 46790 | __ai float16x8_t vzip1q_f16(float16x8_t __p0, float16x8_t __p1) { | 47507 | __ai float64x1_t vget_high_f64(float64x2_t __p0) { |
| 46791 | float16x8_t __ret; | 47508 | float64x1_t __ret; |
| 46792 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 1, 9, 2, 10, 3, 11); | 47509 | __ret = __builtin_shufflevector(__p0, __p0, 1); |
| 46793 | return __ret; | 47510 | return __ret; |
| 46794 | } | 47511 | } |
| 46795 | #else | 47512 | #else |
| 46796 | __ai float16x8_t vzip1q_f16(float16x8_t __p0, float16x8_t __p1) { | 47513 | __ai float64x1_t vget_high_f64(float64x2_t __p0) { |
| 46797 | float16x8_t __ret; | 47514 | float64x1_t __ret; |
| 46798 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 47515 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 46799 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 47516 | __ret = __builtin_shufflevector(__rev0, __rev0, 1); |
| 46800 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 1, 9, 2, 10, 3, 11); | | |
| 46801 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 46802 | return __ret; | 47517 | return __ret; |
| 46803 | } | 47518 | } |
| 46804 | #endif | 47519 | #endif |
| 46805 | | 47520 | |
| | 47521 | #define vget_lane_p64(__p0, __p1) __extension__ ({ \ |
| | 47522 | poly64_t __ret; \ |
| | 47523 | poly64x1_t __s0 = __p0; \ |
| | 47524 | __ret = (poly64_t) __builtin_neon_vget_lane_i64((poly64x1_t)__s0, __p1); \ |
| | 47525 | __ret; \ |
| | 47526 | }) |
| 46806 | #ifdef __LITTLE_ENDIAN__ | 47527 | #ifdef __LITTLE_ENDIAN__ |
| 46807 | __ai float16x4_t vzip1_f16(float16x4_t __p0, float16x4_t __p1) { | 47528 | #define vgetq_lane_p64(__p0, __p1) __extension__ ({ \ |
| 46808 | float16x4_t __ret; | 47529 | poly64_t __ret; \ |
| 46809 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 1, 5); | 47530 | poly64x2_t __s0 = __p0; \ |
| 46810 | return __ret; | 47531 | __ret = (poly64_t) __builtin_neon_vgetq_lane_i64((poly64x2_t)__s0, __p1); \ |
| 46811 | } | 47532 | __ret; \ |
| | 47533 | }) |
| 46812 | #else | 47534 | #else |
| 46813 | __ai float16x4_t vzip1_f16(float16x4_t __p0, float16x4_t __p1) { | 47535 | #define vgetq_lane_p64(__p0, __p1) __extension__ ({ \ |
| 46814 | float16x4_t __ret; | 47536 | poly64_t __ret; \ |
| 46815 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47537 | poly64x2_t __s0 = __p0; \ |
| 46816 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 47538 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 46817 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 1, 5); | 47539 | __ret = (poly64_t) __builtin_neon_vgetq_lane_i64((poly64x2_t)__rev0, __p1); \ |
| 46818 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 47540 | __ret; \ |
| 46819 | return __ret; | 47541 | }) |
| 46820 | } | 47542 | #define __noswap_vgetq_lane_p64(__p0, __p1) __extension__ ({ \ |
| | 47543 | poly64_t __ret; \ |
| | 47544 | poly64x2_t __s0 = __p0; \ |
| | 47545 | __ret = (poly64_t) __builtin_neon_vgetq_lane_i64((poly64x2_t)__s0, __p1); \ |
| | 47546 | __ret; \ |
| | 47547 | }) |
| 46821 | #endif | 47548 | #endif |
| 46822 | | 47549 | |
| 46823 | #ifdef __LITTLE_ENDIAN__ | 47550 | #ifdef __LITTLE_ENDIAN__ |
| 46824 | __ai float16x8_t vzip2q_f16(float16x8_t __p0, float16x8_t __p1) { | 47551 | #define vgetq_lane_f64(__p0, __p1) __extension__ ({ \ |
| 46825 | float16x8_t __ret; | 47552 | float64_t __ret; \ |
| 46826 | __ret = __builtin_shufflevector(__p0, __p1, 4, 12, 5, 13, 6, 14, 7, 15); | 47553 | float64x2_t __s0 = __p0; \ |
| 46827 | return __ret; | 47554 | __ret = (float64_t) __builtin_neon_vgetq_lane_f64((float64x2_t)__s0, __p1); \ |
| 46828 | } | 47555 | __ret; \ |
| | 47556 | }) |
| 46829 | #else | 47557 | #else |
| 46830 | __ai float16x8_t vzip2q_f16(float16x8_t __p0, float16x8_t __p1) { | 47558 | #define vgetq_lane_f64(__p0, __p1) __extension__ ({ \ |
| 46831 | float16x8_t __ret; | 47559 | float64_t __ret; \ |
| 46832 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 47560 | float64x2_t __s0 = __p0; \ |
| 46833 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 47561 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 46834 | __ret = __builtin_shufflevector(__rev0, __rev1, 4, 12, 5, 13, 6, 14, 7, 15); | 47562 | __ret = (float64_t) __builtin_neon_vgetq_lane_f64((float64x2_t)__rev0, __p1); \ |
| 46835 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 47563 | __ret; \ |
| 46836 | return __ret; | 47564 | }) |
| 46837 | } | 47565 | #define __noswap_vgetq_lane_f64(__p0, __p1) __extension__ ({ \ |
| | 47566 | float64_t __ret; \ |
| | 47567 | float64x2_t __s0 = __p0; \ |
| | 47568 | __ret = (float64_t) __builtin_neon_vgetq_lane_f64((float64x2_t)__s0, __p1); \ |
| | 47569 | __ret; \ |
| | 47570 | }) |
| 46838 | #endif | 47571 | #endif |
| 46839 | | 47572 | |
| | 47573 | #define vget_lane_f64(__p0, __p1) __extension__ ({ \ |
| | 47574 | float64_t __ret; \ |
| | 47575 | float64x1_t __s0 = __p0; \ |
| | 47576 | __ret = (float64_t) __builtin_neon_vget_lane_f64((float64x1_t)__s0, __p1); \ |
| | 47577 | __ret; \ |
| | 47578 | }) |
| 46840 | #ifdef __LITTLE_ENDIAN__ | 47579 | #ifdef __LITTLE_ENDIAN__ |
| 46841 | __ai float16x4_t vzip2_f16(float16x4_t __p0, float16x4_t __p1) { | 47580 | __ai poly64x1_t vget_low_p64(poly64x2_t __p0) { |
| 46842 | float16x4_t __ret; | 47581 | poly64x1_t __ret; |
| 46843 | __ret = __builtin_shufflevector(__p0, __p1, 2, 6, 3, 7); | 47582 | __ret = __builtin_shufflevector(__p0, __p0, 0); |
| 46844 | return __ret; | 47583 | return __ret; |
| 46845 | } | 47584 | } |
| 46846 | #else | 47585 | #else |
| 46847 | __ai float16x4_t vzip2_f16(float16x4_t __p0, float16x4_t __p1) { | 47586 | __ai poly64x1_t vget_low_p64(poly64x2_t __p0) { |
| 46848 | float16x4_t __ret; | 47587 | poly64x1_t __ret; |
| 46849 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47588 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 46850 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 47589 | __ret = __builtin_shufflevector(__rev0, __rev0, 0); |
| 46851 | __ret = __builtin_shufflevector(__rev0, __rev1, 2, 6, 3, 7); | | |
| 46852 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 46853 | return __ret; | 47590 | return __ret; |
| 46854 | } | 47591 | } |
| 46855 | #endif | 47592 | #endif |
| 46856 | | 47593 | |
| 46857 | #endif | | |
| 46858 | #if defined(__ARM_FEATURE_MATMUL_INT8) | | |
| 46859 | #ifdef __LITTLE_ENDIAN__ | 47594 | #ifdef __LITTLE_ENDIAN__ |
| 46860 | __ai uint32x4_t vmmlaq_u32(uint32x4_t __p0, uint8x16_t __p1, uint8x16_t __p2) { | 47595 | __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 46861 | uint32x4_t __ret; | 47596 | float64x1_t __ret; |
| 46862 | __ret = (uint32x4_t) __builtin_neon_vmmlaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); | 47597 | __ret = __builtin_shufflevector(__p0, __p0, 0); |
| 46863 | return __ret; | 47598 | return __ret; |
| 46864 | } | 47599 | } |
| 46865 | #else | 47600 | #else |
| 46866 | __ai uint32x4_t vmmlaq_u32(uint32x4_t __p0, uint8x16_t __p1, uint8x16_t __p2) { | 47601 | __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 46867 | uint32x4_t __ret; | 47602 | float64x1_t __ret; |
| 46868 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47603 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 46869 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 47604 | __ret = __builtin_shufflevector(__rev0, __rev0, 0); |
| 46870 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 46871 | __ret = (uint32x4_t) __builtin_neon_vmmlaq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); | | |
| 46872 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 46873 | return __ret; | 47605 | return __ret; |
| 46874 | } | 47606 | } |
| 46875 | #endif | 47607 | #endif |
| 46876 | | 47608 | |
| | 47609 | #define vld1_p64(__p0) __extension__ ({ \ |
| | 47610 | poly64x1_t __ret; \ |
| | 47611 | __ret = (poly64x1_t) __builtin_neon_vld1_v(__p0, 6); \ |
| | 47612 | __ret; \ |
| | 47613 | }) |
| 46877 | #ifdef __LITTLE_ENDIAN__ | 47614 | #ifdef __LITTLE_ENDIAN__ |
| 46878 | __ai int32x4_t vmmlaq_s32(int32x4_t __p0, int8x16_t __p1, int8x16_t __p2) { | 47615 | #define vld1q_p64(__p0) __extension__ ({ \ |
| 46879 | int32x4_t __ret; | 47616 | poly64x2_t __ret; \ |
| 46880 | __ret = (int32x4_t) __builtin_neon_vmmlaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); | 47617 | __ret = (poly64x2_t) __builtin_neon_vld1q_v(__p0, 38); \ |
| 46881 | return __ret; | 47618 | __ret; \ |
| 46882 | } | 47619 | }) |
| 46883 | #else | 47620 | #else |
| 46884 | __ai int32x4_t vmmlaq_s32(int32x4_t __p0, int8x16_t __p1, int8x16_t __p2) { | 47621 | #define vld1q_p64(__p0) __extension__ ({ \ |
| 46885 | int32x4_t __ret; | 47622 | poly64x2_t __ret; \ |
| 46886 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47623 | __ret = (poly64x2_t) __builtin_neon_vld1q_v(__p0, 38); \ |
| 46887 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 47624 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 46888 | int8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 47625 | __ret; \ |
| 46889 | __ret = (int32x4_t) __builtin_neon_vmmlaq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); | 47626 | }) |
| 46890 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 46891 | return __ret; | | |
| 46892 | } | | |
| 46893 | #endif | 47627 | #endif |
| 46894 | | 47628 | |
| 46895 | #ifdef __LITTLE_ENDIAN__ | 47629 | #ifdef __LITTLE_ENDIAN__ |
| 46896 | __ai int32x4_t vusdotq_s32(int32x4_t __p0, uint8x16_t __p1, int8x16_t __p2) { | 47630 | #define vld1q_f64(__p0) __extension__ ({ \ |
| 46897 | int32x4_t __ret; | 47631 | float64x2_t __ret; \ |
| 46898 | __ret = (int32x4_t) __builtin_neon_vusdotq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); | 47632 | __ret = (float64x2_t) __builtin_neon_vld1q_v(__p0, 42); \ |
| 46899 | return __ret; | 47633 | __ret; \ |
| 46900 | } | 47634 | }) |
| 46901 | #else | 47635 | #else |
| 46902 | __ai int32x4_t vusdotq_s32(int32x4_t __p0, uint8x16_t __p1, int8x16_t __p2) { | 47636 | #define vld1q_f64(__p0) __extension__ ({ \ |
| 46903 | int32x4_t __ret; | 47637 | float64x2_t __ret; \ |
| 46904 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47638 | __ret = (float64x2_t) __builtin_neon_vld1q_v(__p0, 42); \ |
| 46905 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 47639 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 46906 | int8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 47640 | __ret; \ |
| 46907 | __ret = (int32x4_t) __builtin_neon_vusdotq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); | 47641 | }) |
| 46908 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 46909 | return __ret; | | |
| 46910 | } | | |
| 46911 | __ai int32x4_t __noswap_vusdotq_s32(int32x4_t __p0, uint8x16_t __p1, int8x16_t __p2) { | | |
| 46912 | int32x4_t __ret; | | |
| 46913 | __ret = (int32x4_t) __builtin_neon_vusdotq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); | | |
| 46914 | return __ret; | | |
| 46915 | } | | |
| 46916 | #endif | 47642 | #endif |
| 46917 | | 47643 | |
| | 47644 | #define vld1_f64(__p0) __extension__ ({ \ |
| | 47645 | float64x1_t __ret; \ |
| | 47646 | __ret = (float64x1_t) __builtin_neon_vld1_v(__p0, 10); \ |
| | 47647 | __ret; \ |
| | 47648 | }) |
| | 47649 | #define vld1_dup_p64(__p0) __extension__ ({ \ |
| | 47650 | poly64x1_t __ret; \ |
| | 47651 | __ret = (poly64x1_t) __builtin_neon_vld1_dup_v(__p0, 6); \ |
| | 47652 | __ret; \ |
| | 47653 | }) |
| 46918 | #ifdef __LITTLE_ENDIAN__ | 47654 | #ifdef __LITTLE_ENDIAN__ |
| 46919 | __ai int32x2_t vusdot_s32(int32x2_t __p0, uint8x8_t __p1, int8x8_t __p2) { | 47655 | #define vld1q_dup_p64(__p0) __extension__ ({ \ |
| 46920 | int32x2_t __ret; | 47656 | poly64x2_t __ret; \ |
| 46921 | __ret = (int32x2_t) __builtin_neon_vusdot_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); | 47657 | __ret = (poly64x2_t) __builtin_neon_vld1q_dup_v(__p0, 38); \ |
| 46922 | return __ret; | 47658 | __ret; \ |
| 46923 | } | 47659 | }) |
| 46924 | #else | 47660 | #else |
| 46925 | __ai int32x2_t vusdot_s32(int32x2_t __p0, uint8x8_t __p1, int8x8_t __p2) { | 47661 | #define vld1q_dup_p64(__p0) __extension__ ({ \ |
| 46926 | int32x2_t __ret; | 47662 | poly64x2_t __ret; \ |
| 46927 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 47663 | __ret = (poly64x2_t) __builtin_neon_vld1q_dup_v(__p0, 38); \ |
| 46928 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 47664 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 46929 | int8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 47665 | __ret; \ |
| 46930 | __ret = (int32x2_t) __builtin_neon_vusdot_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 2); | 47666 | }) |
| 46931 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 46932 | return __ret; | | |
| 46933 | } | | |
| 46934 | __ai int32x2_t __noswap_vusdot_s32(int32x2_t __p0, uint8x8_t __p1, int8x8_t __p2) { | | |
| 46935 | int32x2_t __ret; | | |
| 46936 | __ret = (int32x2_t) __builtin_neon_vusdot_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); | | |
| 46937 | return __ret; | | |
| 46938 | } | | |
| 46939 | #endif | 47667 | #endif |
| 46940 | | 47668 | |
| 46941 | #ifdef __LITTLE_ENDIAN__ | 47669 | #ifdef __LITTLE_ENDIAN__ |
| 46942 | #define vusdotq_lane_s32(__p0_305, __p1_305, __p2_305, __p3_305) __extension__ ({ \ | 47670 | #define vld1q_dup_f64(__p0) __extension__ ({ \ |
| 46943 | int32x4_t __ret_305; \ | 47671 | float64x2_t __ret; \ |
| 46944 | int32x4_t __s0_305 = __p0_305; \ | 47672 | __ret = (float64x2_t) __builtin_neon_vld1q_dup_v(__p0, 42); \ |
| 46945 | uint8x16_t __s1_305 = __p1_305; \ | 47673 | __ret; \ |
| 46946 | int8x8_t __s2_305 = __p2_305; \ | | |
| 46947 | int8x8_t __reint_305 = __s2_305; \ | | |
| 46948 | __ret_305 = vusdotq_s32(__s0_305, __s1_305, (int8x16_t)(splatq_lane_s32(*(int32x2_t *) &__reint_305, __p3_305))); \ | | |
| 46949 | __ret_305; \ | | |
| 46950 | }) | 47674 | }) |
| 46951 | #else | 47675 | #else |
| 46952 | #define vusdotq_lane_s32(__p0_306, __p1_306, __p2_306, __p3_306) __extension__ ({ \ | 47676 | #define vld1q_dup_f64(__p0) __extension__ ({ \ |
| 46953 | int32x4_t __ret_306; \ | 47677 | float64x2_t __ret; \ |
| 46954 | int32x4_t __s0_306 = __p0_306; \ | 47678 | __ret = (float64x2_t) __builtin_neon_vld1q_dup_v(__p0, 42); \ |
| 46955 | uint8x16_t __s1_306 = __p1_306; \ | 47679 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 46956 | int8x8_t __s2_306 = __p2_306; \ | 47680 | __ret; \ |
| 46957 | int32x4_t __rev0_306; __rev0_306 = __builtin_shufflevector(__s0_306, __s0_306, 3, 2, 1, 0); \ | | |
| 46958 | uint8x16_t __rev1_306; __rev1_306 = __builtin_shufflevector(__s1_306, __s1_306, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 46959 | int8x8_t __rev2_306; __rev2_306 = __builtin_shufflevector(__s2_306, __s2_306, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 46960 | int8x8_t __reint_306 = __rev2_306; \ | | |
| 46961 | __ret_306 = __noswap_vusdotq_s32(__rev0_306, __rev1_306, (int8x16_t)(__noswap_splatq_lane_s32(*(int32x2_t *) &__reint_306, __p3_306))); \ | | |
| 46962 | __ret_306 = __builtin_shufflevector(__ret_306, __ret_306, 3, 2, 1, 0); \ | | |
| 46963 | __ret_306; \ | | |
| 46964 | }) | 47681 | }) |
| 46965 | #endif | 47682 | #endif |
| 46966 | | 47683 | |
| | 47684 | #define vld1_dup_f64(__p0) __extension__ ({ \ |
| | 47685 | float64x1_t __ret; \ |
| | 47686 | __ret = (float64x1_t) __builtin_neon_vld1_dup_v(__p0, 10); \ |
| | 47687 | __ret; \ |
| | 47688 | }) |
| | 47689 | #define vld1_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| | 47690 | poly64x1_t __ret; \ |
| | 47691 | poly64x1_t __s1 = __p1; \ |
| | 47692 | __ret = (poly64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 6); \ |
| | 47693 | __ret; \ |
| | 47694 | }) |
| 46967 | #ifdef __LITTLE_ENDIAN__ | 47695 | #ifdef __LITTLE_ENDIAN__ |
| 46968 | #define vusdot_lane_s32(__p0_307, __p1_307, __p2_307, __p3_307) __extension__ ({ \ | 47696 | #define vld1q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 46969 | int32x2_t __ret_307; \ | 47697 | poly64x2_t __ret; \ |
| 46970 | int32x2_t __s0_307 = __p0_307; \ | 47698 | poly64x2_t __s1 = __p1; \ |
| 46971 | uint8x8_t __s1_307 = __p1_307; \ | 47699 | __ret = (poly64x2_t) __builtin_neon_vld1q_lane_v(__p0, (int8x16_t)__s1, __p2, 38); \ |
| 46972 | int8x8_t __s2_307 = __p2_307; \ | 47700 | __ret; \ |
| 46973 | int8x8_t __reint_307 = __s2_307; \ | | |
| 46974 | __ret_307 = vusdot_s32(__s0_307, __s1_307, (int8x8_t)(splat_lane_s32(*(int32x2_t *) &__reint_307, __p3_307))); \ | | |
| 46975 | __ret_307; \ | | |
| 46976 | }) | 47701 | }) |
| 46977 | #else | 47702 | #else |
| 46978 | #define vusdot_lane_s32(__p0_308, __p1_308, __p2_308, __p3_308) __extension__ ({ \ | 47703 | #define vld1q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 46979 | int32x2_t __ret_308; \ | 47704 | poly64x2_t __ret; \ |
| 46980 | int32x2_t __s0_308 = __p0_308; \ | 47705 | poly64x2_t __s1 = __p1; \ |
| 46981 | uint8x8_t __s1_308 = __p1_308; \ | 47706 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 46982 | int8x8_t __s2_308 = __p2_308; \ | 47707 | __ret = (poly64x2_t) __builtin_neon_vld1q_lane_v(__p0, (int8x16_t)__rev1, __p2, 38); \ |
| 46983 | int32x2_t __rev0_308; __rev0_308 = __builtin_shufflevector(__s0_308, __s0_308, 1, 0); \ | 47708 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 46984 | uint8x8_t __rev1_308; __rev1_308 = __builtin_shufflevector(__s1_308, __s1_308, 7, 6, 5, 4, 3, 2, 1, 0); \ | 47709 | __ret; \ |
| 46985 | int8x8_t __rev2_308; __rev2_308 = __builtin_shufflevector(__s2_308, __s2_308, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 46986 | int8x8_t __reint_308 = __rev2_308; \ | | |
| 46987 | __ret_308 = __noswap_vusdot_s32(__rev0_308, __rev1_308, (int8x8_t)(__noswap_splat_lane_s32(*(int32x2_t *) &__reint_308, __p3_308))); \ | | |
| 46988 | __ret_308 = __builtin_shufflevector(__ret_308, __ret_308, 1, 0); \ | | |
| 46989 | __ret_308; \ | | |
| 46990 | }) | 47710 | }) |
| 46991 | #endif | 47711 | #endif |
| 46992 | | 47712 | |
| 46993 | #ifdef __LITTLE_ENDIAN__ | 47713 | #ifdef __LITTLE_ENDIAN__ |
| 46994 | __ai int32x4_t vusmmlaq_s32(int32x4_t __p0, uint8x16_t __p1, int8x16_t __p2) { | 47714 | #define vld1q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 46995 | int32x4_t __ret; | 47715 | float64x2_t __ret; \ |
| 46996 | __ret = (int32x4_t) __builtin_neon_vusmmlaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); | 47716 | float64x2_t __s1 = __p1; \ |
| 46997 | return __ret; | 47717 | __ret = (float64x2_t) __builtin_neon_vld1q_lane_v(__p0, (int8x16_t)__s1, __p2, 42); \ |
| 46998 | } | 47718 | __ret; \ |
| | 47719 | }) |
| 46999 | #else | 47720 | #else |
| 47000 | __ai int32x4_t vusmmlaq_s32(int32x4_t __p0, uint8x16_t __p1, int8x16_t __p2) { | 47721 | #define vld1q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 47001 | int32x4_t __ret; | 47722 | float64x2_t __ret; \ |
| 47002 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47723 | float64x2_t __s1 = __p1; \ |
| 47003 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 47724 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 47004 | int8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 47725 | __ret = (float64x2_t) __builtin_neon_vld1q_lane_v(__p0, (int8x16_t)__rev1, __p2, 42); \ |
| 47005 | __ret = (int32x4_t) __builtin_neon_vusmmlaq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); | 47726 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 47006 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 47727 | __ret; \ |
| 47007 | return __ret; | 47728 | }) |
| 47008 | } | | |
| 47009 | #endif | 47729 | #endif |
| 47010 | | 47730 | |
| 47011 | #endif | 47731 | #define vld1_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 47012 | #if defined(__ARM_FEATURE_QRDMX) | 47732 | float64x1_t __ret; \ |
| | 47733 | float64x1_t __s1 = __p1; \ |
| | 47734 | __ret = (float64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 10); \ |
| | 47735 | __ret; \ |
| | 47736 | }) |
| | 47737 | #define vld1_p64_x2(__p0) __extension__ ({ \ |
| | 47738 | poly64x1x2_t __ret; \ |
| | 47739 | __builtin_neon_vld1_x2_v(&__ret, __p0, 6); \ |
| | 47740 | __ret; \ |
| | 47741 | }) |
| 47013 | #ifdef __LITTLE_ENDIAN__ | 47742 | #ifdef __LITTLE_ENDIAN__ |
| 47014 | __ai int32x4_t vqrdmlahq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 47743 | #define vld1q_p64_x2(__p0) __extension__ ({ \ |
| 47015 | int32x4_t __ret; | 47744 | poly64x2x2_t __ret; \ |
| 47016 | __ret = (int32x4_t) __builtin_neon_vqrdmlahq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); | 47745 | __builtin_neon_vld1q_x2_v(&__ret, __p0, 38); \ |
| 47017 | return __ret; | 47746 | __ret; \ |
| 47018 | } | 47747 | }) |
| 47019 | #else | 47748 | #else |
| 47020 | __ai int32x4_t vqrdmlahq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 47749 | #define vld1q_p64_x2(__p0) __extension__ ({ \ |
| 47021 | int32x4_t __ret; | 47750 | poly64x2x2_t __ret; \ |
| 47022 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47751 | __builtin_neon_vld1q_x2_v(&__ret, __p0, 38); \ |
| 47023 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 47752 | \ |
| 47024 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 47753 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47025 | __ret = (int32x4_t) __builtin_neon_vqrdmlahq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); | 47754 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47026 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 47755 | __ret; \ |
| 47027 | return __ret; | 47756 | }) |
| 47028 | } | | |
| 47029 | __ai int32x4_t __noswap_vqrdmlahq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | | |
| 47030 | int32x4_t __ret; | | |
| 47031 | __ret = (int32x4_t) __builtin_neon_vqrdmlahq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); | | |
| 47032 | return __ret; | | |
| 47033 | } | | |
| 47034 | #endif | 47757 | #endif |
| 47035 | | 47758 | |
| 47036 | #ifdef __LITTLE_ENDIAN__ | 47759 | #ifdef __LITTLE_ENDIAN__ |
| 47037 | __ai int16x8_t vqrdmlahq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 47760 | #define vld1q_f64_x2(__p0) __extension__ ({ \ |
| 47038 | int16x8_t __ret; | 47761 | float64x2x2_t __ret; \ |
| 47039 | __ret = (int16x8_t) __builtin_neon_vqrdmlahq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 33); | 47762 | __builtin_neon_vld1q_x2_v(&__ret, __p0, 42); \ |
| 47040 | return __ret; | 47763 | __ret; \ |
| 47041 | } | 47764 | }) |
| 47042 | #else | 47765 | #else |
| 47043 | __ai int16x8_t vqrdmlahq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 47766 | #define vld1q_f64_x2(__p0) __extension__ ({ \ |
| 47044 | int16x8_t __ret; | 47767 | float64x2x2_t __ret; \ |
| 47045 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 47768 | __builtin_neon_vld1q_x2_v(&__ret, __p0, 42); \ |
| 47046 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 47769 | \ |
| 47047 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 47770 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47048 | __ret = (int16x8_t) __builtin_neon_vqrdmlahq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 33); | 47771 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47049 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 47772 | __ret; \ |
| 47050 | return __ret; | 47773 | }) |
| 47051 | } | | |
| 47052 | __ai int16x8_t __noswap_vqrdmlahq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | | |
| 47053 | int16x8_t __ret; | | |
| 47054 | __ret = (int16x8_t) __builtin_neon_vqrdmlahq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 33); | | |
| 47055 | return __ret; | | |
| 47056 | } | | |
| 47057 | #endif | 47774 | #endif |
| 47058 | | 47775 | |
| | 47776 | #define vld1_f64_x2(__p0) __extension__ ({ \ |
| | 47777 | float64x1x2_t __ret; \ |
| | 47778 | __builtin_neon_vld1_x2_v(&__ret, __p0, 10); \ |
| | 47779 | __ret; \ |
| | 47780 | }) |
| | 47781 | #define vld1_p64_x3(__p0) __extension__ ({ \ |
| | 47782 | poly64x1x3_t __ret; \ |
| | 47783 | __builtin_neon_vld1_x3_v(&__ret, __p0, 6); \ |
| | 47784 | __ret; \ |
| | 47785 | }) |
| 47059 | #ifdef __LITTLE_ENDIAN__ | 47786 | #ifdef __LITTLE_ENDIAN__ |
| 47060 | __ai int32x2_t vqrdmlah_s32(int32x2_t __p0, int32x2_t __p1, int32x2_t __p2) { | 47787 | #define vld1q_p64_x3(__p0) __extension__ ({ \ |
| 47061 | int32x2_t __ret; | 47788 | poly64x2x3_t __ret; \ |
| 47062 | __ret = (int32x2_t) __builtin_neon_vqrdmlah_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); | 47789 | __builtin_neon_vld1q_x3_v(&__ret, __p0, 38); \ |
| 47063 | return __ret; | 47790 | __ret; \ |
| 47064 | } | 47791 | }) |
| 47065 | #else | 47792 | #else |
| 47066 | __ai int32x2_t vqrdmlah_s32(int32x2_t __p0, int32x2_t __p1, int32x2_t __p2) { | 47793 | #define vld1q_p64_x3(__p0) __extension__ ({ \ |
| 47067 | int32x2_t __ret; | 47794 | poly64x2x3_t __ret; \ |
| 47068 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 47795 | __builtin_neon_vld1q_x3_v(&__ret, __p0, 38); \ |
| 47069 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 47796 | \ |
| 47070 | int32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 47797 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47071 | __ret = (int32x2_t) __builtin_neon_vqrdmlah_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 2); | 47798 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47072 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 47799 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47073 | return __ret; | 47800 | __ret; \ |
| 47074 | } | 47801 | }) |
| 47075 | __ai int32x2_t __noswap_vqrdmlah_s32(int32x2_t __p0, int32x2_t __p1, int32x2_t __p2) { | | |
| 47076 | int32x2_t __ret; | | |
| 47077 | __ret = (int32x2_t) __builtin_neon_vqrdmlah_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); | | |
| 47078 | return __ret; | | |
| 47079 | } | | |
| 47080 | #endif | 47802 | #endif |
| 47081 | | 47803 | |
| 47082 | #ifdef __LITTLE_ENDIAN__ | 47804 | #ifdef __LITTLE_ENDIAN__ |
| 47083 | __ai int16x4_t vqrdmlah_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { | 47805 | #define vld1q_f64_x3(__p0) __extension__ ({ \ |
| 47084 | int16x4_t __ret; | 47806 | float64x2x3_t __ret; \ |
| 47085 | __ret = (int16x4_t) __builtin_neon_vqrdmlah_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 1); | 47807 | __builtin_neon_vld1q_x3_v(&__ret, __p0, 42); \ |
| 47086 | return __ret; | 47808 | __ret; \ |
| 47087 | } | 47809 | }) |
| 47088 | #else | 47810 | #else |
| 47089 | __ai int16x4_t vqrdmlah_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { | 47811 | #define vld1q_f64_x3(__p0) __extension__ ({ \ |
| 47090 | int16x4_t __ret; | 47812 | float64x2x3_t __ret; \ |
| 47091 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47813 | __builtin_neon_vld1q_x3_v(&__ret, __p0, 42); \ |
| 47092 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 47814 | \ |
| 47093 | int16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 47815 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47094 | __ret = (int16x4_t) __builtin_neon_vqrdmlah_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 1); | 47816 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47095 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 47817 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47096 | return __ret; | 47818 | __ret; \ |
| 47097 | } | 47819 | }) |
| 47098 | __ai int16x4_t __noswap_vqrdmlah_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { | | |
| 47099 | int16x4_t __ret; | | |
| 47100 | __ret = (int16x4_t) __builtin_neon_vqrdmlah_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 1); | | |
| 47101 | return __ret; | | |
| 47102 | } | | |
| 47103 | #endif | 47820 | #endif |
| 47104 | | 47821 | |
| | 47822 | #define vld1_f64_x3(__p0) __extension__ ({ \ |
| | 47823 | float64x1x3_t __ret; \ |
| | 47824 | __builtin_neon_vld1_x3_v(&__ret, __p0, 10); \ |
| | 47825 | __ret; \ |
| | 47826 | }) |
| | 47827 | #define vld1_p64_x4(__p0) __extension__ ({ \ |
| | 47828 | poly64x1x4_t __ret; \ |
| | 47829 | __builtin_neon_vld1_x4_v(&__ret, __p0, 6); \ |
| | 47830 | __ret; \ |
| | 47831 | }) |
| 47105 | #ifdef __LITTLE_ENDIAN__ | 47832 | #ifdef __LITTLE_ENDIAN__ |
| 47106 | #define vqrdmlahq_lane_s32(__p0_309, __p1_309, __p2_309, __p3_309) __extension__ ({ \ | 47833 | #define vld1q_p64_x4(__p0) __extension__ ({ \ |
| 47107 | int32x4_t __ret_309; \ | 47834 | poly64x2x4_t __ret; \ |
| 47108 | int32x4_t __s0_309 = __p0_309; \ | 47835 | __builtin_neon_vld1q_x4_v(&__ret, __p0, 38); \ |
| 47109 | int32x4_t __s1_309 = __p1_309; \ | 47836 | __ret; \ |
| 47110 | int32x2_t __s2_309 = __p2_309; \ | | |
| 47111 | __ret_309 = vqrdmlahq_s32(__s0_309, __s1_309, splatq_lane_s32(__s2_309, __p3_309)); \ | | |
| 47112 | __ret_309; \ | | |
| 47113 | }) | 47837 | }) |
| 47114 | #else | 47838 | #else |
| 47115 | #define vqrdmlahq_lane_s32(__p0_310, __p1_310, __p2_310, __p3_310) __extension__ ({ \ | 47839 | #define vld1q_p64_x4(__p0) __extension__ ({ \ |
| 47116 | int32x4_t __ret_310; \ | 47840 | poly64x2x4_t __ret; \ |
| 47117 | int32x4_t __s0_310 = __p0_310; \ | 47841 | __builtin_neon_vld1q_x4_v(&__ret, __p0, 38); \ |
| 47118 | int32x4_t __s1_310 = __p1_310; \ | 47842 | \ |
| 47119 | int32x2_t __s2_310 = __p2_310; \ | 47843 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47120 | int32x4_t __rev0_310; __rev0_310 = __builtin_shufflevector(__s0_310, __s0_310, 3, 2, 1, 0); \ | 47844 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47121 | int32x4_t __rev1_310; __rev1_310 = __builtin_shufflevector(__s1_310, __s1_310, 3, 2, 1, 0); \ | 47845 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47122 | int32x2_t __rev2_310; __rev2_310 = __builtin_shufflevector(__s2_310, __s2_310, 1, 0); \ | 47846 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ |
| 47123 | __ret_310 = __noswap_vqrdmlahq_s32(__rev0_310, __rev1_310, __noswap_splatq_lane_s32(__rev2_310, __p3_310)); \ | 47847 | __ret; \ |
| 47124 | __ret_310 = __builtin_shufflevector(__ret_310, __ret_310, 3, 2, 1, 0); \ | | |
| 47125 | __ret_310; \ | | |
| 47126 | }) | 47848 | }) |
| 47127 | #endif | 47849 | #endif |
| 47128 | | 47850 | |
| 47129 | #ifdef __LITTLE_ENDIAN__ | 47851 | #ifdef __LITTLE_ENDIAN__ |
| 47130 | #define vqrdmlahq_lane_s16(__p0_311, __p1_311, __p2_311, __p3_311) __extension__ ({ \ | 47852 | #define vld1q_f64_x4(__p0) __extension__ ({ \ |
| 47131 | int16x8_t __ret_311; \ | 47853 | float64x2x4_t __ret; \ |
| 47132 | int16x8_t __s0_311 = __p0_311; \ | 47854 | __builtin_neon_vld1q_x4_v(&__ret, __p0, 42); \ |
| 47133 | int16x8_t __s1_311 = __p1_311; \ | 47855 | __ret; \ |
| 47134 | int16x4_t __s2_311 = __p2_311; \ | | |
| 47135 | __ret_311 = vqrdmlahq_s16(__s0_311, __s1_311, splatq_lane_s16(__s2_311, __p3_311)); \ | | |
| 47136 | __ret_311; \ | | |
| 47137 | }) | 47856 | }) |
| 47138 | #else | 47857 | #else |
| 47139 | #define vqrdmlahq_lane_s16(__p0_312, __p1_312, __p2_312, __p3_312) __extension__ ({ \ | 47858 | #define vld1q_f64_x4(__p0) __extension__ ({ \ |
| 47140 | int16x8_t __ret_312; \ | 47859 | float64x2x4_t __ret; \ |
| 47141 | int16x8_t __s0_312 = __p0_312; \ | 47860 | __builtin_neon_vld1q_x4_v(&__ret, __p0, 42); \ |
| 47142 | int16x8_t __s1_312 = __p1_312; \ | 47861 | \ |
| 47143 | int16x4_t __s2_312 = __p2_312; \ | 47862 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47144 | int16x8_t __rev0_312; __rev0_312 = __builtin_shufflevector(__s0_312, __s0_312, 7, 6, 5, 4, 3, 2, 1, 0); \ | 47863 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47145 | int16x8_t __rev1_312; __rev1_312 = __builtin_shufflevector(__s1_312, __s1_312, 7, 6, 5, 4, 3, 2, 1, 0); \ | 47864 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47146 | int16x4_t __rev2_312; __rev2_312 = __builtin_shufflevector(__s2_312, __s2_312, 3, 2, 1, 0); \ | 47865 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ |
| 47147 | __ret_312 = __noswap_vqrdmlahq_s16(__rev0_312, __rev1_312, __noswap_splatq_lane_s16(__rev2_312, __p3_312)); \ | 47866 | __ret; \ |
| 47148 | __ret_312 = __builtin_shufflevector(__ret_312, __ret_312, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 47149 | __ret_312; \ | | |
| 47150 | }) | 47867 | }) |
| 47151 | #endif | 47868 | #endif |
| 47152 | | 47869 | |
| | 47870 | #define vld1_f64_x4(__p0) __extension__ ({ \ |
| | 47871 | float64x1x4_t __ret; \ |
| | 47872 | __builtin_neon_vld1_x4_v(&__ret, __p0, 10); \ |
| | 47873 | __ret; \ |
| | 47874 | }) |
| | 47875 | #define vld2_p64(__p0) __extension__ ({ \ |
| | 47876 | poly64x1x2_t __ret; \ |
| | 47877 | __builtin_neon_vld2_v(&__ret, __p0, 6); \ |
| | 47878 | __ret; \ |
| | 47879 | }) |
| 47153 | #ifdef __LITTLE_ENDIAN__ | 47880 | #ifdef __LITTLE_ENDIAN__ |
| 47154 | #define vqrdmlah_lane_s32(__p0_313, __p1_313, __p2_313, __p3_313) __extension__ ({ \ | 47881 | #define vld2q_p64(__p0) __extension__ ({ \ |
| 47155 | int32x2_t __ret_313; \ | 47882 | poly64x2x2_t __ret; \ |
| 47156 | int32x2_t __s0_313 = __p0_313; \ | 47883 | __builtin_neon_vld2q_v(&__ret, __p0, 38); \ |
| 47157 | int32x2_t __s1_313 = __p1_313; \ | 47884 | __ret; \ |
| 47158 | int32x2_t __s2_313 = __p2_313; \ | | |
| 47159 | __ret_313 = vqrdmlah_s32(__s0_313, __s1_313, splat_lane_s32(__s2_313, __p3_313)); \ | | |
| 47160 | __ret_313; \ | | |
| 47161 | }) | 47885 | }) |
| 47162 | #else | 47886 | #else |
| 47163 | #define vqrdmlah_lane_s32(__p0_314, __p1_314, __p2_314, __p3_314) __extension__ ({ \ | 47887 | #define vld2q_p64(__p0) __extension__ ({ \ |
| 47164 | int32x2_t __ret_314; \ | 47888 | poly64x2x2_t __ret; \ |
| 47165 | int32x2_t __s0_314 = __p0_314; \ | 47889 | __builtin_neon_vld2q_v(&__ret, __p0, 38); \ |
| 47166 | int32x2_t __s1_314 = __p1_314; \ | 47890 | \ |
| 47167 | int32x2_t __s2_314 = __p2_314; \ | 47891 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47168 | int32x2_t __rev0_314; __rev0_314 = __builtin_shufflevector(__s0_314, __s0_314, 1, 0); \ | 47892 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47169 | int32x2_t __rev1_314; __rev1_314 = __builtin_shufflevector(__s1_314, __s1_314, 1, 0); \ | 47893 | __ret; \ |
| 47170 | int32x2_t __rev2_314; __rev2_314 = __builtin_shufflevector(__s2_314, __s2_314, 1, 0); \ | | |
| 47171 | __ret_314 = __noswap_vqrdmlah_s32(__rev0_314, __rev1_314, __noswap_splat_lane_s32(__rev2_314, __p3_314)); \ | | |
| 47172 | __ret_314 = __builtin_shufflevector(__ret_314, __ret_314, 1, 0); \ | | |
| 47173 | __ret_314; \ | | |
| 47174 | }) | 47894 | }) |
| 47175 | #endif | 47895 | #endif |
| 47176 | | 47896 | |
| 47177 | #ifdef __LITTLE_ENDIAN__ | 47897 | #ifdef __LITTLE_ENDIAN__ |
| 47178 | #define vqrdmlah_lane_s16(__p0_315, __p1_315, __p2_315, __p3_315) __extension__ ({ \ | 47898 | #define vld2q_u64(__p0) __extension__ ({ \ |
| 47179 | int16x4_t __ret_315; \ | 47899 | uint64x2x2_t __ret; \ |
| 47180 | int16x4_t __s0_315 = __p0_315; \ | 47900 | __builtin_neon_vld2q_v(&__ret, __p0, 51); \ |
| 47181 | int16x4_t __s1_315 = __p1_315; \ | 47901 | __ret; \ |
| 47182 | int16x4_t __s2_315 = __p2_315; \ | | |
| 47183 | __ret_315 = vqrdmlah_s16(__s0_315, __s1_315, splat_lane_s16(__s2_315, __p3_315)); \ | | |
| 47184 | __ret_315; \ | | |
| 47185 | }) | 47902 | }) |
| 47186 | #else | 47903 | #else |
| 47187 | #define vqrdmlah_lane_s16(__p0_316, __p1_316, __p2_316, __p3_316) __extension__ ({ \ | 47904 | #define vld2q_u64(__p0) __extension__ ({ \ |
| 47188 | int16x4_t __ret_316; \ | 47905 | uint64x2x2_t __ret; \ |
| 47189 | int16x4_t __s0_316 = __p0_316; \ | 47906 | __builtin_neon_vld2q_v(&__ret, __p0, 51); \ |
| 47190 | int16x4_t __s1_316 = __p1_316; \ | 47907 | \ |
| 47191 | int16x4_t __s2_316 = __p2_316; \ | 47908 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47192 | int16x4_t __rev0_316; __rev0_316 = __builtin_shufflevector(__s0_316, __s0_316, 3, 2, 1, 0); \ | 47909 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47193 | int16x4_t __rev1_316; __rev1_316 = __builtin_shufflevector(__s1_316, __s1_316, 3, 2, 1, 0); \ | 47910 | __ret; \ |
| 47194 | int16x4_t __rev2_316; __rev2_316 = __builtin_shufflevector(__s2_316, __s2_316, 3, 2, 1, 0); \ | | |
| 47195 | __ret_316 = __noswap_vqrdmlah_s16(__rev0_316, __rev1_316, __noswap_splat_lane_s16(__rev2_316, __p3_316)); \ | | |
| 47196 | __ret_316 = __builtin_shufflevector(__ret_316, __ret_316, 3, 2, 1, 0); \ | | |
| 47197 | __ret_316; \ | | |
| 47198 | }) | 47911 | }) |
| 47199 | #endif | 47912 | #endif |
| 47200 | | 47913 | |
| 47201 | #ifdef __LITTLE_ENDIAN__ | 47914 | #ifdef __LITTLE_ENDIAN__ |
| 47202 | __ai int32x4_t vqrdmlshq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 47915 | #define vld2q_f64(__p0) __extension__ ({ \ |
| 47203 | int32x4_t __ret; | 47916 | float64x2x2_t __ret; \ |
| 47204 | __ret = (int32x4_t) __builtin_neon_vqrdmlshq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); | 47917 | __builtin_neon_vld2q_v(&__ret, __p0, 42); \ |
| 47205 | return __ret; | 47918 | __ret; \ |
| 47206 | } | 47919 | }) |
| 47207 | #else | 47920 | #else |
| 47208 | __ai int32x4_t vqrdmlshq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 47921 | #define vld2q_f64(__p0) __extension__ ({ \ |
| 47209 | int32x4_t __ret; | 47922 | float64x2x2_t __ret; \ |
| 47210 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47923 | __builtin_neon_vld2q_v(&__ret, __p0, 42); \ |
| 47211 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 47924 | \ |
| 47212 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 47925 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47213 | __ret = (int32x4_t) __builtin_neon_vqrdmlshq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); | 47926 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47214 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 47927 | __ret; \ |
| 47215 | return __ret; | 47928 | }) |
| 47216 | } | | |
| 47217 | __ai int32x4_t __noswap_vqrdmlshq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | | |
| 47218 | int32x4_t __ret; | | |
| 47219 | __ret = (int32x4_t) __builtin_neon_vqrdmlshq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); | | |
| 47220 | return __ret; | | |
| 47221 | } | | |
| 47222 | #endif | 47929 | #endif |
| 47223 | | 47930 | |
| 47224 | #ifdef __LITTLE_ENDIAN__ | 47931 | #ifdef __LITTLE_ENDIAN__ |
| 47225 | __ai int16x8_t vqrdmlshq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 47932 | #define vld2q_s64(__p0) __extension__ ({ \ |
| 47226 | int16x8_t __ret; | 47933 | int64x2x2_t __ret; \ |
| 47227 | __ret = (int16x8_t) __builtin_neon_vqrdmlshq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 33); | 47934 | __builtin_neon_vld2q_v(&__ret, __p0, 35); \ |
| 47228 | return __ret; | 47935 | __ret; \ |
| 47229 | } | 47936 | }) |
| 47230 | #else | 47937 | #else |
| 47231 | __ai int16x8_t vqrdmlshq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 47938 | #define vld2q_s64(__p0) __extension__ ({ \ |
| 47232 | int16x8_t __ret; | 47939 | int64x2x2_t __ret; \ |
| 47233 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 47940 | __builtin_neon_vld2q_v(&__ret, __p0, 35); \ |
| 47234 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 47941 | \ |
| 47235 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 47942 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47236 | __ret = (int16x8_t) __builtin_neon_vqrdmlshq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 33); | 47943 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47237 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 47944 | __ret; \ |
| 47238 | return __ret; | 47945 | }) |
| 47239 | } | | |
| 47240 | __ai int16x8_t __noswap_vqrdmlshq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | | |
| 47241 | int16x8_t __ret; | | |
| 47242 | __ret = (int16x8_t) __builtin_neon_vqrdmlshq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 33); | | |
| 47243 | return __ret; | | |
| 47244 | } | | |
| 47245 | #endif | 47946 | #endif |
| 47246 | | 47947 | |
| | 47948 | #define vld2_f64(__p0) __extension__ ({ \ |
| | 47949 | float64x1x2_t __ret; \ |
| | 47950 | __builtin_neon_vld2_v(&__ret, __p0, 10); \ |
| | 47951 | __ret; \ |
| | 47952 | }) |
| | 47953 | #define vld2_dup_p64(__p0) __extension__ ({ \ |
| | 47954 | poly64x1x2_t __ret; \ |
| | 47955 | __builtin_neon_vld2_dup_v(&__ret, __p0, 6); \ |
| | 47956 | __ret; \ |
| | 47957 | }) |
| 47247 | #ifdef __LITTLE_ENDIAN__ | 47958 | #ifdef __LITTLE_ENDIAN__ |
| 47248 | __ai int32x2_t vqrdmlsh_s32(int32x2_t __p0, int32x2_t __p1, int32x2_t __p2) { | 47959 | #define vld2q_dup_p64(__p0) __extension__ ({ \ |
| 47249 | int32x2_t __ret; | 47960 | poly64x2x2_t __ret; \ |
| 47250 | __ret = (int32x2_t) __builtin_neon_vqrdmlsh_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); | 47961 | __builtin_neon_vld2q_dup_v(&__ret, __p0, 38); \ |
| 47251 | return __ret; | 47962 | __ret; \ |
| 47252 | } | 47963 | }) |
| 47253 | #else | 47964 | #else |
| 47254 | __ai int32x2_t vqrdmlsh_s32(int32x2_t __p0, int32x2_t __p1, int32x2_t __p2) { | 47965 | #define vld2q_dup_p64(__p0) __extension__ ({ \ |
| 47255 | int32x2_t __ret; | 47966 | poly64x2x2_t __ret; \ |
| 47256 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 47967 | __builtin_neon_vld2q_dup_v(&__ret, __p0, 38); \ |
| 47257 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 47968 | \ |
| 47258 | int32x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 47969 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47259 | __ret = (int32x2_t) __builtin_neon_vqrdmlsh_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 2); | 47970 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47260 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 47971 | __ret; \ |
| 47261 | return __ret; | 47972 | }) |
| 47262 | } | | |
| 47263 | __ai int32x2_t __noswap_vqrdmlsh_s32(int32x2_t __p0, int32x2_t __p1, int32x2_t __p2) { | | |
| 47264 | int32x2_t __ret; | | |
| 47265 | __ret = (int32x2_t) __builtin_neon_vqrdmlsh_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 2); | | |
| 47266 | return __ret; | | |
| 47267 | } | | |
| 47268 | #endif | 47973 | #endif |
| 47269 | | 47974 | |
| 47270 | #ifdef __LITTLE_ENDIAN__ | 47975 | #ifdef __LITTLE_ENDIAN__ |
| 47271 | __ai int16x4_t vqrdmlsh_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { | 47976 | #define vld2q_dup_f64(__p0) __extension__ ({ \ |
| 47272 | int16x4_t __ret; | 47977 | float64x2x2_t __ret; \ |
| 47273 | __ret = (int16x4_t) __builtin_neon_vqrdmlsh_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 1); | 47978 | __builtin_neon_vld2q_dup_v(&__ret, __p0, 42); \ |
| 47274 | return __ret; | 47979 | __ret; \ |
| 47275 | } | 47980 | }) |
| 47276 | #else | 47981 | #else |
| 47277 | __ai int16x4_t vqrdmlsh_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { | 47982 | #define vld2q_dup_f64(__p0) __extension__ ({ \ |
| 47278 | int16x4_t __ret; | 47983 | float64x2x2_t __ret; \ |
| 47279 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 47984 | __builtin_neon_vld2q_dup_v(&__ret, __p0, 42); \ |
| 47280 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 47985 | \ |
| 47281 | int16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 47986 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47282 | __ret = (int16x4_t) __builtin_neon_vqrdmlsh_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 1); | 47987 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47283 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 47988 | __ret; \ |
| 47284 | return __ret; | 47989 | }) |
| 47285 | } | | |
| 47286 | __ai int16x4_t __noswap_vqrdmlsh_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { | | |
| 47287 | int16x4_t __ret; | | |
| 47288 | __ret = (int16x4_t) __builtin_neon_vqrdmlsh_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 1); | | |
| 47289 | return __ret; | | |
| 47290 | } | | |
| 47291 | #endif | 47990 | #endif |
| 47292 | | 47991 | |
| | 47992 | #define vld2_dup_f64(__p0) __extension__ ({ \ |
| | 47993 | float64x1x2_t __ret; \ |
| | 47994 | __builtin_neon_vld2_dup_v(&__ret, __p0, 10); \ |
| | 47995 | __ret; \ |
| | 47996 | }) |
| | 47997 | #define vld2_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| | 47998 | poly64x1x2_t __ret; \ |
| | 47999 | poly64x1x2_t __s1 = __p1; \ |
| | 48000 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 6); \ |
| | 48001 | __ret; \ |
| | 48002 | }) |
| 47293 | #ifdef __LITTLE_ENDIAN__ | 48003 | #ifdef __LITTLE_ENDIAN__ |
| 47294 | #define vqrdmlshq_lane_s32(__p0_317, __p1_317, __p2_317, __p3_317) __extension__ ({ \ | 48004 | #define vld2q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 47295 | int32x4_t __ret_317; \ | 48005 | poly8x16x2_t __ret; \ |
| 47296 | int32x4_t __s0_317 = __p0_317; \ | 48006 | poly8x16x2_t __s1 = __p1; \ |
| 47297 | int32x4_t __s1_317 = __p1_317; \ | 48007 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 36); \ |
| 47298 | int32x2_t __s2_317 = __p2_317; \ | 48008 | __ret; \ |
| 47299 | __ret_317 = vqrdmlshq_s32(__s0_317, __s1_317, splatq_lane_s32(__s2_317, __p3_317)); \ | | |
| 47300 | __ret_317; \ | | |
| 47301 | }) | 48009 | }) |
| 47302 | #else | 48010 | #else |
| 47303 | #define vqrdmlshq_lane_s32(__p0_318, __p1_318, __p2_318, __p3_318) __extension__ ({ \ | 48011 | #define vld2q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 47304 | int32x4_t __ret_318; \ | 48012 | poly8x16x2_t __ret; \ |
| 47305 | int32x4_t __s0_318 = __p0_318; \ | 48013 | poly8x16x2_t __s1 = __p1; \ |
| 47306 | int32x4_t __s1_318 = __p1_318; \ | 48014 | poly8x16x2_t __rev1; \ |
| 47307 | int32x2_t __s2_318 = __p2_318; \ | 48015 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47308 | int32x4_t __rev0_318; __rev0_318 = __builtin_shufflevector(__s0_318, __s0_318, 3, 2, 1, 0); \ | 48016 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47309 | int32x4_t __rev1_318; __rev1_318 = __builtin_shufflevector(__s1_318, __s1_318, 3, 2, 1, 0); \ | 48017 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 36); \ |
| 47310 | int32x2_t __rev2_318; __rev2_318 = __builtin_shufflevector(__s2_318, __s2_318, 1, 0); \ | 48018 | \ |
| 47311 | __ret_318 = __noswap_vqrdmlshq_s32(__rev0_318, __rev1_318, __noswap_splatq_lane_s32(__rev2_318, __p3_318)); \ | 48019 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47312 | __ret_318 = __builtin_shufflevector(__ret_318, __ret_318, 3, 2, 1, 0); \ | 48020 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47313 | __ret_318; \ | 48021 | __ret; \ |
| 47314 | }) | 48022 | }) |
| 47315 | #endif | 48023 | #endif |
| 47316 | | 48024 | |
| 47317 | #ifdef __LITTLE_ENDIAN__ | 48025 | #ifdef __LITTLE_ENDIAN__ |
| 47318 | #define vqrdmlshq_lane_s16(__p0_319, __p1_319, __p2_319, __p3_319) __extension__ ({ \ | 48026 | #define vld2q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 47319 | int16x8_t __ret_319; \ | 48027 | poly64x2x2_t __ret; \ |
| 47320 | int16x8_t __s0_319 = __p0_319; \ | 48028 | poly64x2x2_t __s1 = __p1; \ |
| 47321 | int16x8_t __s1_319 = __p1_319; \ | 48029 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 38); \ |
| 47322 | int16x4_t __s2_319 = __p2_319; \ | 48030 | __ret; \ |
| 47323 | __ret_319 = vqrdmlshq_s16(__s0_319, __s1_319, splatq_lane_s16(__s2_319, __p3_319)); \ | | |
| 47324 | __ret_319; \ | | |
| 47325 | }) | 48031 | }) |
| 47326 | #else | 48032 | #else |
| 47327 | #define vqrdmlshq_lane_s16(__p0_320, __p1_320, __p2_320, __p3_320) __extension__ ({ \ | 48033 | #define vld2q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 47328 | int16x8_t __ret_320; \ | 48034 | poly64x2x2_t __ret; \ |
| 47329 | int16x8_t __s0_320 = __p0_320; \ | 48035 | poly64x2x2_t __s1 = __p1; \ |
| 47330 | int16x8_t __s1_320 = __p1_320; \ | 48036 | poly64x2x2_t __rev1; \ |
| 47331 | int16x4_t __s2_320 = __p2_320; \ | 48037 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 47332 | int16x8_t __rev0_320; __rev0_320 = __builtin_shufflevector(__s0_320, __s0_320, 7, 6, 5, 4, 3, 2, 1, 0); \ | 48038 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 47333 | int16x8_t __rev1_320; __rev1_320 = __builtin_shufflevector(__s1_320, __s1_320, 7, 6, 5, 4, 3, 2, 1, 0); \ | 48039 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 38); \ |
| 47334 | int16x4_t __rev2_320; __rev2_320 = __builtin_shufflevector(__s2_320, __s2_320, 3, 2, 1, 0); \ | 48040 | \ |
| 47335 | __ret_320 = __noswap_vqrdmlshq_s16(__rev0_320, __rev1_320, __noswap_splatq_lane_s16(__rev2_320, __p3_320)); \ | 48041 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47336 | __ret_320 = __builtin_shufflevector(__ret_320, __ret_320, 7, 6, 5, 4, 3, 2, 1, 0); \ | 48042 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47337 | __ret_320; \ | 48043 | __ret; \ |
| 47338 | }) | 48044 | }) |
| 47339 | #endif | 48045 | #endif |
| 47340 | | 48046 | |
| 47341 | #ifdef __LITTLE_ENDIAN__ | 48047 | #ifdef __LITTLE_ENDIAN__ |
| 47342 | #define vqrdmlsh_lane_s32(__p0_321, __p1_321, __p2_321, __p3_321) __extension__ ({ \ | 48048 | #define vld2q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ |
| 47343 | int32x2_t __ret_321; \ | 48049 | uint8x16x2_t __ret; \ |
| 47344 | int32x2_t __s0_321 = __p0_321; \ | 48050 | uint8x16x2_t __s1 = __p1; \ |
| 47345 | int32x2_t __s1_321 = __p1_321; \ | 48051 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 48); \ |
| 47346 | int32x2_t __s2_321 = __p2_321; \ | 48052 | __ret; \ |
| 47347 | __ret_321 = vqrdmlsh_s32(__s0_321, __s1_321, splat_lane_s32(__s2_321, __p3_321)); \ | | |
| 47348 | __ret_321; \ | | |
| 47349 | }) | 48053 | }) |
| 47350 | #else | 48054 | #else |
| 47351 | #define vqrdmlsh_lane_s32(__p0_322, __p1_322, __p2_322, __p3_322) __extension__ ({ \ | 48055 | #define vld2q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ |
| 47352 | int32x2_t __ret_322; \ | 48056 | uint8x16x2_t __ret; \ |
| 47353 | int32x2_t __s0_322 = __p0_322; \ | 48057 | uint8x16x2_t __s1 = __p1; \ |
| 47354 | int32x2_t __s1_322 = __p1_322; \ | 48058 | uint8x16x2_t __rev1; \ |
| 47355 | int32x2_t __s2_322 = __p2_322; \ | 48059 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47356 | int32x2_t __rev0_322; __rev0_322 = __builtin_shufflevector(__s0_322, __s0_322, 1, 0); \ | 48060 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47357 | int32x2_t __rev1_322; __rev1_322 = __builtin_shufflevector(__s1_322, __s1_322, 1, 0); \ | 48061 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 48); \ |
| 47358 | int32x2_t __rev2_322; __rev2_322 = __builtin_shufflevector(__s2_322, __s2_322, 1, 0); \ | 48062 | \ |
| 47359 | __ret_322 = __noswap_vqrdmlsh_s32(__rev0_322, __rev1_322, __noswap_splat_lane_s32(__rev2_322, __p3_322)); \ | 48063 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47360 | __ret_322 = __builtin_shufflevector(__ret_322, __ret_322, 1, 0); \ | 48064 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47361 | __ret_322; \ | 48065 | __ret; \ |
| 47362 | }) | 48066 | }) |
| 47363 | #endif | 48067 | #endif |
| 47364 | | 48068 | |
| 47365 | #ifdef __LITTLE_ENDIAN__ | 48069 | #ifdef __LITTLE_ENDIAN__ |
| 47366 | #define vqrdmlsh_lane_s16(__p0_323, __p1_323, __p2_323, __p3_323) __extension__ ({ \ | 48070 | #define vld2q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 47367 | int16x4_t __ret_323; \ | 48071 | uint64x2x2_t __ret; \ |
| 47368 | int16x4_t __s0_323 = __p0_323; \ | 48072 | uint64x2x2_t __s1 = __p1; \ |
| 47369 | int16x4_t __s1_323 = __p1_323; \ | 48073 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 51); \ |
| 47370 | int16x4_t __s2_323 = __p2_323; \ | 48074 | __ret; \ |
| 47371 | __ret_323 = vqrdmlsh_s16(__s0_323, __s1_323, splat_lane_s16(__s2_323, __p3_323)); \ | | |
| 47372 | __ret_323; \ | | |
| 47373 | }) | 48075 | }) |
| 47374 | #else | 48076 | #else |
| 47375 | #define vqrdmlsh_lane_s16(__p0_324, __p1_324, __p2_324, __p3_324) __extension__ ({ \ | 48077 | #define vld2q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 47376 | int16x4_t __ret_324; \ | 48078 | uint64x2x2_t __ret; \ |
| 47377 | int16x4_t __s0_324 = __p0_324; \ | 48079 | uint64x2x2_t __s1 = __p1; \ |
| 47378 | int16x4_t __s1_324 = __p1_324; \ | 48080 | uint64x2x2_t __rev1; \ |
| 47379 | int16x4_t __s2_324 = __p2_324; \ | 48081 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 47380 | int16x4_t __rev0_324; __rev0_324 = __builtin_shufflevector(__s0_324, __s0_324, 3, 2, 1, 0); \ | 48082 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 47381 | int16x4_t __rev1_324; __rev1_324 = __builtin_shufflevector(__s1_324, __s1_324, 3, 2, 1, 0); \ | 48083 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 51); \ |
| 47382 | int16x4_t __rev2_324; __rev2_324 = __builtin_shufflevector(__s2_324, __s2_324, 3, 2, 1, 0); \ | 48084 | \ |
| 47383 | __ret_324 = __noswap_vqrdmlsh_s16(__rev0_324, __rev1_324, __noswap_splat_lane_s16(__rev2_324, __p3_324)); \ | 48085 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47384 | __ret_324 = __builtin_shufflevector(__ret_324, __ret_324, 3, 2, 1, 0); \ | 48086 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47385 | __ret_324; \ | 48087 | __ret; \ |
| 47386 | }) | 48088 | }) |
| 47387 | #endif | 48089 | #endif |
| 47388 | | 48090 | |
| 47389 | #endif | | |
| 47390 | #if defined(__ARM_FEATURE_QRDMX) && defined(__aarch64__) | | |
| 47391 | __ai int32_t vqrdmlahs_s32(int32_t __p0, int32_t __p1, int32_t __p2) { | | |
| 47392 | int32_t __ret; | | |
| 47393 | __ret = (int32_t) __builtin_neon_vqrdmlahs_s32(__p0, __p1, __p2); | | |
| 47394 | return __ret; | | |
| 47395 | } | | |
| 47396 | __ai int16_t vqrdmlahh_s16(int16_t __p0, int16_t __p1, int16_t __p2) { | | |
| 47397 | int16_t __ret; | | |
| 47398 | __ret = (int16_t) __builtin_neon_vqrdmlahh_s16(__p0, __p1, __p2); | | |
| 47399 | return __ret; | | |
| 47400 | } | | |
| 47401 | #ifdef __LITTLE_ENDIAN__ | 48091 | #ifdef __LITTLE_ENDIAN__ |
| 47402 | #define vqrdmlahs_lane_s32(__p0_325, __p1_325, __p2_325, __p3_325) __extension__ ({ \ | 48092 | #define vld2q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ |
| 47403 | int32_t __ret_325; \ | 48093 | int8x16x2_t __ret; \ |
| 47404 | int32_t __s0_325 = __p0_325; \ | 48094 | int8x16x2_t __s1 = __p1; \ |
| 47405 | int32_t __s1_325 = __p1_325; \ | 48095 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 32); \ |
| 47406 | int32x2_t __s2_325 = __p2_325; \ | 48096 | __ret; \ |
| 47407 | __ret_325 = vqrdmlahs_s32(__s0_325, __s1_325, vget_lane_s32(__s2_325, __p3_325)); \ | | |
| 47408 | __ret_325; \ | | |
| 47409 | }) | 48097 | }) |
| 47410 | #else | 48098 | #else |
| 47411 | #define vqrdmlahs_lane_s32(__p0_326, __p1_326, __p2_326, __p3_326) __extension__ ({ \ | 48099 | #define vld2q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ |
| 47412 | int32_t __ret_326; \ | 48100 | int8x16x2_t __ret; \ |
| 47413 | int32_t __s0_326 = __p0_326; \ | 48101 | int8x16x2_t __s1 = __p1; \ |
| 47414 | int32_t __s1_326 = __p1_326; \ | 48102 | int8x16x2_t __rev1; \ |
| 47415 | int32x2_t __s2_326 = __p2_326; \ | 48103 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47416 | int32x2_t __rev2_326; __rev2_326 = __builtin_shufflevector(__s2_326, __s2_326, 1, 0); \ | 48104 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47417 | __ret_326 = vqrdmlahs_s32(__s0_326, __s1_326, __noswap_vget_lane_s32(__rev2_326, __p3_326)); \ | 48105 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 32); \ |
| 47418 | __ret_326; \ | 48106 | \ |
| | 48107 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48108 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48109 | __ret; \ |
| 47419 | }) | 48110 | }) |
| 47420 | #endif | 48111 | #endif |
| 47421 | | 48112 | |
| 47422 | #ifdef __LITTLE_ENDIAN__ | 48113 | #ifdef __LITTLE_ENDIAN__ |
| 47423 | #define vqrdmlahh_lane_s16(__p0_327, __p1_327, __p2_327, __p3_327) __extension__ ({ \ | 48114 | #define vld2q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 47424 | int16_t __ret_327; \ | 48115 | float64x2x2_t __ret; \ |
| 47425 | int16_t __s0_327 = __p0_327; \ | 48116 | float64x2x2_t __s1 = __p1; \ |
| 47426 | int16_t __s1_327 = __p1_327; \ | 48117 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 42); \ |
| 47427 | int16x4_t __s2_327 = __p2_327; \ | 48118 | __ret; \ |
| 47428 | __ret_327 = vqrdmlahh_s16(__s0_327, __s1_327, vget_lane_s16(__s2_327, __p3_327)); \ | | |
| 47429 | __ret_327; \ | | |
| 47430 | }) | 48119 | }) |
| 47431 | #else | 48120 | #else |
| 47432 | #define vqrdmlahh_lane_s16(__p0_328, __p1_328, __p2_328, __p3_328) __extension__ ({ \ | 48121 | #define vld2q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 47433 | int16_t __ret_328; \ | 48122 | float64x2x2_t __ret; \ |
| 47434 | int16_t __s0_328 = __p0_328; \ | 48123 | float64x2x2_t __s1 = __p1; \ |
| 47435 | int16_t __s1_328 = __p1_328; \ | 48124 | float64x2x2_t __rev1; \ |
| 47436 | int16x4_t __s2_328 = __p2_328; \ | 48125 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 47437 | int16x4_t __rev2_328; __rev2_328 = __builtin_shufflevector(__s2_328, __s2_328, 3, 2, 1, 0); \ | 48126 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 47438 | __ret_328 = vqrdmlahh_s16(__s0_328, __s1_328, __noswap_vget_lane_s16(__rev2_328, __p3_328)); \ | 48127 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 42); \ |
| 47439 | __ret_328; \ | 48128 | \ |
| | 48129 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| | 48130 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| | 48131 | __ret; \ |
| 47440 | }) | 48132 | }) |
| 47441 | #endif | 48133 | #endif |
| 47442 | | 48134 | |
| 47443 | #ifdef __LITTLE_ENDIAN__ | 48135 | #ifdef __LITTLE_ENDIAN__ |
| 47444 | #define vqrdmlahs_laneq_s32(__p0_329, __p1_329, __p2_329, __p3_329) __extension__ ({ \ | 48136 | #define vld2q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 47445 | int32_t __ret_329; \ | 48137 | int64x2x2_t __ret; \ |
| 47446 | int32_t __s0_329 = __p0_329; \ | 48138 | int64x2x2_t __s1 = __p1; \ |
| 47447 | int32_t __s1_329 = __p1_329; \ | 48139 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 35); \ |
| 47448 | int32x4_t __s2_329 = __p2_329; \ | 48140 | __ret; \ |
| 47449 | __ret_329 = vqrdmlahs_s32(__s0_329, __s1_329, vgetq_lane_s32(__s2_329, __p3_329)); \ | | |
| 47450 | __ret_329; \ | | |
| 47451 | }) | 48141 | }) |
| 47452 | #else | 48142 | #else |
| 47453 | #define vqrdmlahs_laneq_s32(__p0_330, __p1_330, __p2_330, __p3_330) __extension__ ({ \ | 48143 | #define vld2q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 47454 | int32_t __ret_330; \ | 48144 | int64x2x2_t __ret; \ |
| 47455 | int32_t __s0_330 = __p0_330; \ | 48145 | int64x2x2_t __s1 = __p1; \ |
| 47456 | int32_t __s1_330 = __p1_330; \ | 48146 | int64x2x2_t __rev1; \ |
| 47457 | int32x4_t __s2_330 = __p2_330; \ | 48147 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 47458 | int32x4_t __rev2_330; __rev2_330 = __builtin_shufflevector(__s2_330, __s2_330, 3, 2, 1, 0); \ | 48148 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 47459 | __ret_330 = vqrdmlahs_s32(__s0_330, __s1_330, __noswap_vgetq_lane_s32(__rev2_330, __p3_330)); \ | 48149 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 35); \ |
| 47460 | __ret_330; \ | 48150 | \ |
| | 48151 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| | 48152 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| | 48153 | __ret; \ |
| 47461 | }) | 48154 | }) |
| 47462 | #endif | 48155 | #endif |
| 47463 | | 48156 | |
| 47464 | #ifdef __LITTLE_ENDIAN__ | 48157 | #define vld2_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 47465 | #define vqrdmlahh_laneq_s16(__p0_331, __p1_331, __p2_331, __p3_331) __extension__ ({ \ | 48158 | uint64x1x2_t __ret; \ |
| 47466 | int16_t __ret_331; \ | 48159 | uint64x1x2_t __s1 = __p1; \ |
| 47467 | int16_t __s0_331 = __p0_331; \ | 48160 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 19); \ |
| 47468 | int16_t __s1_331 = __p1_331; \ | 48161 | __ret; \ |
| 47469 | int16x8_t __s2_331 = __p2_331; \ | | |
| 47470 | __ret_331 = vqrdmlahh_s16(__s0_331, __s1_331, vgetq_lane_s16(__s2_331, __p3_331)); \ | | |
| 47471 | __ret_331; \ | | |
| 47472 | }) | 48162 | }) |
| 47473 | #else | 48163 | #define vld2_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 47474 | #define vqrdmlahh_laneq_s16(__p0_332, __p1_332, __p2_332, __p3_332) __extension__ ({ \ | 48164 | float64x1x2_t __ret; \ |
| 47475 | int16_t __ret_332; \ | 48165 | float64x1x2_t __s1 = __p1; \ |
| 47476 | int16_t __s0_332 = __p0_332; \ | 48166 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 10); \ |
| 47477 | int16_t __s1_332 = __p1_332; \ | 48167 | __ret; \ |
| 47478 | int16x8_t __s2_332 = __p2_332; \ | | |
| 47479 | int16x8_t __rev2_332; __rev2_332 = __builtin_shufflevector(__s2_332, __s2_332, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 47480 | __ret_332 = vqrdmlahh_s16(__s0_332, __s1_332, __noswap_vgetq_lane_s16(__rev2_332, __p3_332)); \ | | |
| 47481 | __ret_332; \ | | |
| 47482 | }) | 48168 | }) |
| 47483 | #endif | 48169 | #define vld2_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 47484 | | 48170 | int64x1x2_t __ret; \ |
| 47485 | #ifdef __LITTLE_ENDIAN__ | 48171 | int64x1x2_t __s1 = __p1; \ |
| 47486 | #define vqrdmlahq_laneq_s32(__p0_333, __p1_333, __p2_333, __p3_333) __extension__ ({ \ | 48172 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 3); \ |
| 47487 | int32x4_t __ret_333; \ | 48173 | __ret; \ |
| 47488 | int32x4_t __s0_333 = __p0_333; \ | | |
| 47489 | int32x4_t __s1_333 = __p1_333; \ | | |
| 47490 | int32x4_t __s2_333 = __p2_333; \ | | |
| 47491 | __ret_333 = vqrdmlahq_s32(__s0_333, __s1_333, splatq_laneq_s32(__s2_333, __p3_333)); \ | | |
| 47492 | __ret_333; \ | | |
| 47493 | }) | 48174 | }) |
| 47494 | #else | 48175 | #define vld3_p64(__p0) __extension__ ({ \ |
| 47495 | #define vqrdmlahq_laneq_s32(__p0_334, __p1_334, __p2_334, __p3_334) __extension__ ({ \ | 48176 | poly64x1x3_t __ret; \ |
| 47496 | int32x4_t __ret_334; \ | 48177 | __builtin_neon_vld3_v(&__ret, __p0, 6); \ |
| 47497 | int32x4_t __s0_334 = __p0_334; \ | 48178 | __ret; \ |
| 47498 | int32x4_t __s1_334 = __p1_334; \ | | |
| 47499 | int32x4_t __s2_334 = __p2_334; \ | | |
| 47500 | int32x4_t __rev0_334; __rev0_334 = __builtin_shufflevector(__s0_334, __s0_334, 3, 2, 1, 0); \ | | |
| 47501 | int32x4_t __rev1_334; __rev1_334 = __builtin_shufflevector(__s1_334, __s1_334, 3, 2, 1, 0); \ | | |
| 47502 | int32x4_t __rev2_334; __rev2_334 = __builtin_shufflevector(__s2_334, __s2_334, 3, 2, 1, 0); \ | | |
| 47503 | __ret_334 = __noswap_vqrdmlahq_s32(__rev0_334, __rev1_334, __noswap_splatq_laneq_s32(__rev2_334, __p3_334)); \ | | |
| 47504 | __ret_334 = __builtin_shufflevector(__ret_334, __ret_334, 3, 2, 1, 0); \ | | |
| 47505 | __ret_334; \ | | |
| 47506 | }) | 48179 | }) |
| 47507 | #endif | | |
| 47508 | | | |
| 47509 | #ifdef __LITTLE_ENDIAN__ | 48180 | #ifdef __LITTLE_ENDIAN__ |
| 47510 | #define vqrdmlahq_laneq_s16(__p0_335, __p1_335, __p2_335, __p3_335) __extension__ ({ \ | 48181 | #define vld3q_p64(__p0) __extension__ ({ \ |
| 47511 | int16x8_t __ret_335; \ | 48182 | poly64x2x3_t __ret; \ |
| 47512 | int16x8_t __s0_335 = __p0_335; \ | 48183 | __builtin_neon_vld3q_v(&__ret, __p0, 38); \ |
| 47513 | int16x8_t __s1_335 = __p1_335; \ | 48184 | __ret; \ |
| 47514 | int16x8_t __s2_335 = __p2_335; \ | | |
| 47515 | __ret_335 = vqrdmlahq_s16(__s0_335, __s1_335, splatq_laneq_s16(__s2_335, __p3_335)); \ | | |
| 47516 | __ret_335; \ | | |
| 47517 | }) | 48185 | }) |
| 47518 | #else | 48186 | #else |
| 47519 | #define vqrdmlahq_laneq_s16(__p0_336, __p1_336, __p2_336, __p3_336) __extension__ ({ \ | 48187 | #define vld3q_p64(__p0) __extension__ ({ \ |
| 47520 | int16x8_t __ret_336; \ | 48188 | poly64x2x3_t __ret; \ |
| 47521 | int16x8_t __s0_336 = __p0_336; \ | 48189 | __builtin_neon_vld3q_v(&__ret, __p0, 38); \ |
| 47522 | int16x8_t __s1_336 = __p1_336; \ | 48190 | \ |
| 47523 | int16x8_t __s2_336 = __p2_336; \ | 48191 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47524 | int16x8_t __rev0_336; __rev0_336 = __builtin_shufflevector(__s0_336, __s0_336, 7, 6, 5, 4, 3, 2, 1, 0); \ | 48192 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47525 | int16x8_t __rev1_336; __rev1_336 = __builtin_shufflevector(__s1_336, __s1_336, 7, 6, 5, 4, 3, 2, 1, 0); \ | 48193 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47526 | int16x8_t __rev2_336; __rev2_336 = __builtin_shufflevector(__s2_336, __s2_336, 7, 6, 5, 4, 3, 2, 1, 0); \ | 48194 | __ret; \ |
| 47527 | __ret_336 = __noswap_vqrdmlahq_s16(__rev0_336, __rev1_336, __noswap_splatq_laneq_s16(__rev2_336, __p3_336)); \ | | |
| 47528 | __ret_336 = __builtin_shufflevector(__ret_336, __ret_336, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 47529 | __ret_336; \ | | |
| 47530 | }) | 48195 | }) |
| 47531 | #endif | 48196 | #endif |
| 47532 | | 48197 | |
| 47533 | #ifdef __LITTLE_ENDIAN__ | 48198 | #ifdef __LITTLE_ENDIAN__ |
| 47534 | #define vqrdmlah_laneq_s32(__p0_337, __p1_337, __p2_337, __p3_337) __extension__ ({ \ | 48199 | #define vld3q_u64(__p0) __extension__ ({ \ |
| 47535 | int32x2_t __ret_337; \ | 48200 | uint64x2x3_t __ret; \ |
| 47536 | int32x2_t __s0_337 = __p0_337; \ | 48201 | __builtin_neon_vld3q_v(&__ret, __p0, 51); \ |
| 47537 | int32x2_t __s1_337 = __p1_337; \ | 48202 | __ret; \ |
| 47538 | int32x4_t __s2_337 = __p2_337; \ | | |
| 47539 | __ret_337 = vqrdmlah_s32(__s0_337, __s1_337, splat_laneq_s32(__s2_337, __p3_337)); \ | | |
| 47540 | __ret_337; \ | | |
| 47541 | }) | 48203 | }) |
| 47542 | #else | 48204 | #else |
| 47543 | #define vqrdmlah_laneq_s32(__p0_338, __p1_338, __p2_338, __p3_338) __extension__ ({ \ | 48205 | #define vld3q_u64(__p0) __extension__ ({ \ |
| 47544 | int32x2_t __ret_338; \ | 48206 | uint64x2x3_t __ret; \ |
| 47545 | int32x2_t __s0_338 = __p0_338; \ | 48207 | __builtin_neon_vld3q_v(&__ret, __p0, 51); \ |
| 47546 | int32x2_t __s1_338 = __p1_338; \ | 48208 | \ |
| 47547 | int32x4_t __s2_338 = __p2_338; \ | 48209 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47548 | int32x2_t __rev0_338; __rev0_338 = __builtin_shufflevector(__s0_338, __s0_338, 1, 0); \ | 48210 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47549 | int32x2_t __rev1_338; __rev1_338 = __builtin_shufflevector(__s1_338, __s1_338, 1, 0); \ | 48211 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47550 | int32x4_t __rev2_338; __rev2_338 = __builtin_shufflevector(__s2_338, __s2_338, 3, 2, 1, 0); \ | 48212 | __ret; \ |
| 47551 | __ret_338 = __noswap_vqrdmlah_s32(__rev0_338, __rev1_338, __noswap_splat_laneq_s32(__rev2_338, __p3_338)); \ | | |
| 47552 | __ret_338 = __builtin_shufflevector(__ret_338, __ret_338, 1, 0); \ | | |
| 47553 | __ret_338; \ | | |
| 47554 | }) | 48213 | }) |
| 47555 | #endif | 48214 | #endif |
| 47556 | | 48215 | |
| 47557 | #ifdef __LITTLE_ENDIAN__ | 48216 | #ifdef __LITTLE_ENDIAN__ |
| 47558 | #define vqrdmlah_laneq_s16(__p0_339, __p1_339, __p2_339, __p3_339) __extension__ ({ \ | 48217 | #define vld3q_f64(__p0) __extension__ ({ \ |
| 47559 | int16x4_t __ret_339; \ | 48218 | float64x2x3_t __ret; \ |
| 47560 | int16x4_t __s0_339 = __p0_339; \ | 48219 | __builtin_neon_vld3q_v(&__ret, __p0, 42); \ |
| 47561 | int16x4_t __s1_339 = __p1_339; \ | 48220 | __ret; \ |
| 47562 | int16x8_t __s2_339 = __p2_339; \ | | |
| 47563 | __ret_339 = vqrdmlah_s16(__s0_339, __s1_339, splat_laneq_s16(__s2_339, __p3_339)); \ | | |
| 47564 | __ret_339; \ | | |
| 47565 | }) | 48221 | }) |
| 47566 | #else | 48222 | #else |
| 47567 | #define vqrdmlah_laneq_s16(__p0_340, __p1_340, __p2_340, __p3_340) __extension__ ({ \ | 48223 | #define vld3q_f64(__p0) __extension__ ({ \ |
| 47568 | int16x4_t __ret_340; \ | 48224 | float64x2x3_t __ret; \ |
| 47569 | int16x4_t __s0_340 = __p0_340; \ | 48225 | __builtin_neon_vld3q_v(&__ret, __p0, 42); \ |
| 47570 | int16x4_t __s1_340 = __p1_340; \ | 48226 | \ |
| 47571 | int16x8_t __s2_340 = __p2_340; \ | 48227 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47572 | int16x4_t __rev0_340; __rev0_340 = __builtin_shufflevector(__s0_340, __s0_340, 3, 2, 1, 0); \ | 48228 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47573 | int16x4_t __rev1_340; __rev1_340 = __builtin_shufflevector(__s1_340, __s1_340, 3, 2, 1, 0); \ | 48229 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47574 | int16x8_t __rev2_340; __rev2_340 = __builtin_shufflevector(__s2_340, __s2_340, 7, 6, 5, 4, 3, 2, 1, 0); \ | 48230 | __ret; \ |
| 47575 | __ret_340 = __noswap_vqrdmlah_s16(__rev0_340, __rev1_340, __noswap_splat_laneq_s16(__rev2_340, __p3_340)); \ | | |
| 47576 | __ret_340 = __builtin_shufflevector(__ret_340, __ret_340, 3, 2, 1, 0); \ | | |
| 47577 | __ret_340; \ | | |
| 47578 | }) | 48231 | }) |
| 47579 | #endif | 48232 | #endif |
| 47580 | | 48233 | |
| 47581 | __ai int32_t vqrdmlshs_s32(int32_t __p0, int32_t __p1, int32_t __p2) { | | |
| 47582 | int32_t __ret; | | |
| 47583 | __ret = (int32_t) __builtin_neon_vqrdmlshs_s32(__p0, __p1, __p2); | | |
| 47584 | return __ret; | | |
| 47585 | } | | |
| 47586 | __ai int16_t vqrdmlshh_s16(int16_t __p0, int16_t __p1, int16_t __p2) { | | |
| 47587 | int16_t __ret; | | |
| 47588 | __ret = (int16_t) __builtin_neon_vqrdmlshh_s16(__p0, __p1, __p2); | | |
| 47589 | return __ret; | | |
| 47590 | } | | |
| 47591 | #ifdef __LITTLE_ENDIAN__ | 48234 | #ifdef __LITTLE_ENDIAN__ |
| 47592 | #define vqrdmlshs_lane_s32(__p0_341, __p1_341, __p2_341, __p3_341) __extension__ ({ \ | 48235 | #define vld3q_s64(__p0) __extension__ ({ \ |
| 47593 | int32_t __ret_341; \ | 48236 | int64x2x3_t __ret; \ |
| 47594 | int32_t __s0_341 = __p0_341; \ | 48237 | __builtin_neon_vld3q_v(&__ret, __p0, 35); \ |
| 47595 | int32_t __s1_341 = __p1_341; \ | 48238 | __ret; \ |
| 47596 | int32x2_t __s2_341 = __p2_341; \ | | |
| 47597 | __ret_341 = vqrdmlshs_s32(__s0_341, __s1_341, vget_lane_s32(__s2_341, __p3_341)); \ | | |
| 47598 | __ret_341; \ | | |
| 47599 | }) | 48239 | }) |
| 47600 | #else | 48240 | #else |
| 47601 | #define vqrdmlshs_lane_s32(__p0_342, __p1_342, __p2_342, __p3_342) __extension__ ({ \ | 48241 | #define vld3q_s64(__p0) __extension__ ({ \ |
| 47602 | int32_t __ret_342; \ | 48242 | int64x2x3_t __ret; \ |
| 47603 | int32_t __s0_342 = __p0_342; \ | 48243 | __builtin_neon_vld3q_v(&__ret, __p0, 35); \ |
| 47604 | int32_t __s1_342 = __p1_342; \ | 48244 | \ |
| 47605 | int32x2_t __s2_342 = __p2_342; \ | 48245 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47606 | int32x2_t __rev2_342; __rev2_342 = __builtin_shufflevector(__s2_342, __s2_342, 1, 0); \ | 48246 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47607 | __ret_342 = vqrdmlshs_s32(__s0_342, __s1_342, __noswap_vget_lane_s32(__rev2_342, __p3_342)); \ | 48247 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47608 | __ret_342; \ | 48248 | __ret; \ |
| 47609 | }) | 48249 | }) |
| 47610 | #endif | 48250 | #endif |
| 47611 | | 48251 | |
| 47612 | #ifdef __LITTLE_ENDIAN__ | 48252 | #define vld3_f64(__p0) __extension__ ({ \ |
| 47613 | #define vqrdmlshh_lane_s16(__p0_343, __p1_343, __p2_343, __p3_343) __extension__ ({ \ | 48253 | float64x1x3_t __ret; \ |
| 47614 | int16_t __ret_343; \ | 48254 | __builtin_neon_vld3_v(&__ret, __p0, 10); \ |
| 47615 | int16_t __s0_343 = __p0_343; \ | 48255 | __ret; \ |
| 47616 | int16_t __s1_343 = __p1_343; \ | | |
| 47617 | int16x4_t __s2_343 = __p2_343; \ | | |
| 47618 | __ret_343 = vqrdmlshh_s16(__s0_343, __s1_343, vget_lane_s16(__s2_343, __p3_343)); \ | | |
| 47619 | __ret_343; \ | | |
| 47620 | }) | 48256 | }) |
| 47621 | #else | 48257 | #define vld3_dup_p64(__p0) __extension__ ({ \ |
| 47622 | #define vqrdmlshh_lane_s16(__p0_344, __p1_344, __p2_344, __p3_344) __extension__ ({ \ | 48258 | poly64x1x3_t __ret; \ |
| 47623 | int16_t __ret_344; \ | 48259 | __builtin_neon_vld3_dup_v(&__ret, __p0, 6); \ |
| 47624 | int16_t __s0_344 = __p0_344; \ | 48260 | __ret; \ |
| 47625 | int16_t __s1_344 = __p1_344; \ | | |
| 47626 | int16x4_t __s2_344 = __p2_344; \ | | |
| 47627 | int16x4_t __rev2_344; __rev2_344 = __builtin_shufflevector(__s2_344, __s2_344, 3, 2, 1, 0); \ | | |
| 47628 | __ret_344 = vqrdmlshh_s16(__s0_344, __s1_344, __noswap_vget_lane_s16(__rev2_344, __p3_344)); \ | | |
| 47629 | __ret_344; \ | | |
| 47630 | }) | 48261 | }) |
| 47631 | #endif | | |
| 47632 | | | |
| 47633 | #ifdef __LITTLE_ENDIAN__ | 48262 | #ifdef __LITTLE_ENDIAN__ |
| 47634 | #define vqrdmlshs_laneq_s32(__p0_345, __p1_345, __p2_345, __p3_345) __extension__ ({ \ | 48263 | #define vld3q_dup_p64(__p0) __extension__ ({ \ |
| 47635 | int32_t __ret_345; \ | 48264 | poly64x2x3_t __ret; \ |
| 47636 | int32_t __s0_345 = __p0_345; \ | 48265 | __builtin_neon_vld3q_dup_v(&__ret, __p0, 38); \ |
| 47637 | int32_t __s1_345 = __p1_345; \ | 48266 | __ret; \ |
| 47638 | int32x4_t __s2_345 = __p2_345; \ | | |
| 47639 | __ret_345 = vqrdmlshs_s32(__s0_345, __s1_345, vgetq_lane_s32(__s2_345, __p3_345)); \ | | |
| 47640 | __ret_345; \ | | |
| 47641 | }) | 48267 | }) |
| 47642 | #else | 48268 | #else |
| 47643 | #define vqrdmlshs_laneq_s32(__p0_346, __p1_346, __p2_346, __p3_346) __extension__ ({ \ | 48269 | #define vld3q_dup_p64(__p0) __extension__ ({ \ |
| 47644 | int32_t __ret_346; \ | 48270 | poly64x2x3_t __ret; \ |
| 47645 | int32_t __s0_346 = __p0_346; \ | 48271 | __builtin_neon_vld3q_dup_v(&__ret, __p0, 38); \ |
| 47646 | int32_t __s1_346 = __p1_346; \ | 48272 | \ |
| 47647 | int32x4_t __s2_346 = __p2_346; \ | 48273 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47648 | int32x4_t __rev2_346; __rev2_346 = __builtin_shufflevector(__s2_346, __s2_346, 3, 2, 1, 0); \ | 48274 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47649 | __ret_346 = vqrdmlshs_s32(__s0_346, __s1_346, __noswap_vgetq_lane_s32(__rev2_346, __p3_346)); \ | 48275 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47650 | __ret_346; \ | 48276 | __ret; \ |
| 47651 | }) | 48277 | }) |
| 47652 | #endif | 48278 | #endif |
| 47653 | | 48279 | |
| 47654 | #ifdef __LITTLE_ENDIAN__ | 48280 | #ifdef __LITTLE_ENDIAN__ |
| 47655 | #define vqrdmlshh_laneq_s16(__p0_347, __p1_347, __p2_347, __p3_347) __extension__ ({ \ | 48281 | #define vld3q_dup_f64(__p0) __extension__ ({ \ |
| 47656 | int16_t __ret_347; \ | 48282 | float64x2x3_t __ret; \ |
| 47657 | int16_t __s0_347 = __p0_347; \ | 48283 | __builtin_neon_vld3q_dup_v(&__ret, __p0, 42); \ |
| 47658 | int16_t __s1_347 = __p1_347; \ | 48284 | __ret; \ |
| 47659 | int16x8_t __s2_347 = __p2_347; \ | | |
| 47660 | __ret_347 = vqrdmlshh_s16(__s0_347, __s1_347, vgetq_lane_s16(__s2_347, __p3_347)); \ | | |
| 47661 | __ret_347; \ | | |
| 47662 | }) | 48285 | }) |
| 47663 | #else | 48286 | #else |
| 47664 | #define vqrdmlshh_laneq_s16(__p0_348, __p1_348, __p2_348, __p3_348) __extension__ ({ \ | 48287 | #define vld3q_dup_f64(__p0) __extension__ ({ \ |
| 47665 | int16_t __ret_348; \ | 48288 | float64x2x3_t __ret; \ |
| 47666 | int16_t __s0_348 = __p0_348; \ | 48289 | __builtin_neon_vld3q_dup_v(&__ret, __p0, 42); \ |
| 47667 | int16_t __s1_348 = __p1_348; \ | 48290 | \ |
| 47668 | int16x8_t __s2_348 = __p2_348; \ | 48291 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47669 | int16x8_t __rev2_348; __rev2_348 = __builtin_shufflevector(__s2_348, __s2_348, 7, 6, 5, 4, 3, 2, 1, 0); \ | 48292 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47670 | __ret_348 = vqrdmlshh_s16(__s0_348, __s1_348, __noswap_vgetq_lane_s16(__rev2_348, __p3_348)); \ | 48293 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47671 | __ret_348; \ | 48294 | __ret; \ |
| 47672 | }) | 48295 | }) |
| 47673 | #endif | 48296 | #endif |
| 47674 | | 48297 | |
| 47675 | #ifdef __LITTLE_ENDIAN__ | 48298 | #define vld3_dup_f64(__p0) __extension__ ({ \ |
| 47676 | #define vqrdmlshq_laneq_s32(__p0_349, __p1_349, __p2_349, __p3_349) __extension__ ({ \ | 48299 | float64x1x3_t __ret; \ |
| 47677 | int32x4_t __ret_349; \ | 48300 | __builtin_neon_vld3_dup_v(&__ret, __p0, 10); \ |
| 47678 | int32x4_t __s0_349 = __p0_349; \ | 48301 | __ret; \ |
| 47679 | int32x4_t __s1_349 = __p1_349; \ | | |
| 47680 | int32x4_t __s2_349 = __p2_349; \ | | |
| 47681 | __ret_349 = vqrdmlshq_s32(__s0_349, __s1_349, splatq_laneq_s32(__s2_349, __p3_349)); \ | | |
| 47682 | __ret_349; \ | | |
| 47683 | }) | 48302 | }) |
| 47684 | #else | 48303 | #define vld3_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 47685 | #define vqrdmlshq_laneq_s32(__p0_350, __p1_350, __p2_350, __p3_350) __extension__ ({ \ | 48304 | poly64x1x3_t __ret; \ |
| 47686 | int32x4_t __ret_350; \ | 48305 | poly64x1x3_t __s1 = __p1; \ |
| 47687 | int32x4_t __s0_350 = __p0_350; \ | 48306 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 6); \ |
| 47688 | int32x4_t __s1_350 = __p1_350; \ | 48307 | __ret; \ |
| 47689 | int32x4_t __s2_350 = __p2_350; \ | | |
| 47690 | int32x4_t __rev0_350; __rev0_350 = __builtin_shufflevector(__s0_350, __s0_350, 3, 2, 1, 0); \ | | |
| 47691 | int32x4_t __rev1_350; __rev1_350 = __builtin_shufflevector(__s1_350, __s1_350, 3, 2, 1, 0); \ | | |
| 47692 | int32x4_t __rev2_350; __rev2_350 = __builtin_shufflevector(__s2_350, __s2_350, 3, 2, 1, 0); \ | | |
| 47693 | __ret_350 = __noswap_vqrdmlshq_s32(__rev0_350, __rev1_350, __noswap_splatq_laneq_s32(__rev2_350, __p3_350)); \ | | |
| 47694 | __ret_350 = __builtin_shufflevector(__ret_350, __ret_350, 3, 2, 1, 0); \ | | |
| 47695 | __ret_350; \ | | |
| 47696 | }) | 48308 | }) |
| 47697 | #endif | | |
| 47698 | | | |
| 47699 | #ifdef __LITTLE_ENDIAN__ | 48309 | #ifdef __LITTLE_ENDIAN__ |
| 47700 | #define vqrdmlshq_laneq_s16(__p0_351, __p1_351, __p2_351, __p3_351) __extension__ ({ \ | 48310 | #define vld3q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 47701 | int16x8_t __ret_351; \ | 48311 | poly8x16x3_t __ret; \ |
| 47702 | int16x8_t __s0_351 = __p0_351; \ | 48312 | poly8x16x3_t __s1 = __p1; \ |
| 47703 | int16x8_t __s1_351 = __p1_351; \ | 48313 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 36); \ |
| 47704 | int16x8_t __s2_351 = __p2_351; \ | 48314 | __ret; \ |
| 47705 | __ret_351 = vqrdmlshq_s16(__s0_351, __s1_351, splatq_laneq_s16(__s2_351, __p3_351)); \ | | |
| 47706 | __ret_351; \ | | |
| 47707 | }) | 48315 | }) |
| 47708 | #else | 48316 | #else |
| 47709 | #define vqrdmlshq_laneq_s16(__p0_352, __p1_352, __p2_352, __p3_352) __extension__ ({ \ | 48317 | #define vld3q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 47710 | int16x8_t __ret_352; \ | 48318 | poly8x16x3_t __ret; \ |
| 47711 | int16x8_t __s0_352 = __p0_352; \ | 48319 | poly8x16x3_t __s1 = __p1; \ |
| 47712 | int16x8_t __s1_352 = __p1_352; \ | 48320 | poly8x16x3_t __rev1; \ |
| 47713 | int16x8_t __s2_352 = __p2_352; \ | 48321 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47714 | int16x8_t __rev0_352; __rev0_352 = __builtin_shufflevector(__s0_352, __s0_352, 7, 6, 5, 4, 3, 2, 1, 0); \ | 48322 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47715 | int16x8_t __rev1_352; __rev1_352 = __builtin_shufflevector(__s1_352, __s1_352, 7, 6, 5, 4, 3, 2, 1, 0); \ | 48323 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47716 | int16x8_t __rev2_352; __rev2_352 = __builtin_shufflevector(__s2_352, __s2_352, 7, 6, 5, 4, 3, 2, 1, 0); \ | 48324 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 36); \ |
| 47717 | __ret_352 = __noswap_vqrdmlshq_s16(__rev0_352, __rev1_352, __noswap_splatq_laneq_s16(__rev2_352, __p3_352)); \ | 48325 | \ |
| 47718 | __ret_352 = __builtin_shufflevector(__ret_352, __ret_352, 7, 6, 5, 4, 3, 2, 1, 0); \ | 48326 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47719 | __ret_352; \ | 48327 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48328 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48329 | __ret; \ |
| 47720 | }) | 48330 | }) |
| 47721 | #endif | 48331 | #endif |
| 47722 | | 48332 | |
| 47723 | #ifdef __LITTLE_ENDIAN__ | 48333 | #ifdef __LITTLE_ENDIAN__ |
| 47724 | #define vqrdmlsh_laneq_s32(__p0_353, __p1_353, __p2_353, __p3_353) __extension__ ({ \ | 48334 | #define vld3q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 47725 | int32x2_t __ret_353; \ | 48335 | poly64x2x3_t __ret; \ |
| 47726 | int32x2_t __s0_353 = __p0_353; \ | 48336 | poly64x2x3_t __s1 = __p1; \ |
| 47727 | int32x2_t __s1_353 = __p1_353; \ | 48337 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 38); \ |
| 47728 | int32x4_t __s2_353 = __p2_353; \ | 48338 | __ret; \ |
| 47729 | __ret_353 = vqrdmlsh_s32(__s0_353, __s1_353, splat_laneq_s32(__s2_353, __p3_353)); \ | | |
| 47730 | __ret_353; \ | | |
| 47731 | }) | 48339 | }) |
| 47732 | #else | 48340 | #else |
| 47733 | #define vqrdmlsh_laneq_s32(__p0_354, __p1_354, __p2_354, __p3_354) __extension__ ({ \ | 48341 | #define vld3q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 47734 | int32x2_t __ret_354; \ | 48342 | poly64x2x3_t __ret; \ |
| 47735 | int32x2_t __s0_354 = __p0_354; \ | 48343 | poly64x2x3_t __s1 = __p1; \ |
| 47736 | int32x2_t __s1_354 = __p1_354; \ | 48344 | poly64x2x3_t __rev1; \ |
| 47737 | int32x4_t __s2_354 = __p2_354; \ | 48345 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 47738 | int32x2_t __rev0_354; __rev0_354 = __builtin_shufflevector(__s0_354, __s0_354, 1, 0); \ | 48346 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 47739 | int32x2_t __rev1_354; __rev1_354 = __builtin_shufflevector(__s1_354, __s1_354, 1, 0); \ | 48347 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 47740 | int32x4_t __rev2_354; __rev2_354 = __builtin_shufflevector(__s2_354, __s2_354, 3, 2, 1, 0); \ | 48348 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 38); \ |
| 47741 | __ret_354 = __noswap_vqrdmlsh_s32(__rev0_354, __rev1_354, __noswap_splat_laneq_s32(__rev2_354, __p3_354)); \ | 48349 | \ |
| 47742 | __ret_354 = __builtin_shufflevector(__ret_354, __ret_354, 1, 0); \ | 48350 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47743 | __ret_354; \ | 48351 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| | 48352 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| | 48353 | __ret; \ |
| 47744 | }) | 48354 | }) |
| 47745 | #endif | 48355 | #endif |
| 47746 | | 48356 | |
| 47747 | #ifdef __LITTLE_ENDIAN__ | 48357 | #ifdef __LITTLE_ENDIAN__ |
| 47748 | #define vqrdmlsh_laneq_s16(__p0_355, __p1_355, __p2_355, __p3_355) __extension__ ({ \ | 48358 | #define vld3q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ |
| 47749 | int16x4_t __ret_355; \ | 48359 | uint8x16x3_t __ret; \ |
| 47750 | int16x4_t __s0_355 = __p0_355; \ | 48360 | uint8x16x3_t __s1 = __p1; \ |
| 47751 | int16x4_t __s1_355 = __p1_355; \ | 48361 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 48); \ |
| 47752 | int16x8_t __s2_355 = __p2_355; \ | 48362 | __ret; \ |
| 47753 | __ret_355 = vqrdmlsh_s16(__s0_355, __s1_355, splat_laneq_s16(__s2_355, __p3_355)); \ | | |
| 47754 | __ret_355; \ | | |
| 47755 | }) | 48363 | }) |
| 47756 | #else | 48364 | #else |
| 47757 | #define vqrdmlsh_laneq_s16(__p0_356, __p1_356, __p2_356, __p3_356) __extension__ ({ \ | 48365 | #define vld3q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ |
| 47758 | int16x4_t __ret_356; \ | 48366 | uint8x16x3_t __ret; \ |
| 47759 | int16x4_t __s0_356 = __p0_356; \ | 48367 | uint8x16x3_t __s1 = __p1; \ |
| 47760 | int16x4_t __s1_356 = __p1_356; \ | 48368 | uint8x16x3_t __rev1; \ |
| 47761 | int16x8_t __s2_356 = __p2_356; \ | 48369 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47762 | int16x4_t __rev0_356; __rev0_356 = __builtin_shufflevector(__s0_356, __s0_356, 3, 2, 1, 0); \ | 48370 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47763 | int16x4_t __rev1_356; __rev1_356 = __builtin_shufflevector(__s1_356, __s1_356, 3, 2, 1, 0); \ | 48371 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47764 | int16x8_t __rev2_356; __rev2_356 = __builtin_shufflevector(__s2_356, __s2_356, 7, 6, 5, 4, 3, 2, 1, 0); \ | 48372 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 48); \ |
| 47765 | __ret_356 = __noswap_vqrdmlsh_s16(__rev0_356, __rev1_356, __noswap_splat_laneq_s16(__rev2_356, __p3_356)); \ | 48373 | \ |
| 47766 | __ret_356 = __builtin_shufflevector(__ret_356, __ret_356, 3, 2, 1, 0); \ | 48374 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47767 | __ret_356; \ | 48375 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48376 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48377 | __ret; \ |
| 47768 | }) | 48378 | }) |
| 47769 | #endif | 48379 | #endif |
| 47770 | | 48380 | |
| 47771 | #endif | | |
| 47772 | #if defined(__aarch64__) | | |
| 47773 | #ifdef __LITTLE_ENDIAN__ | 48381 | #ifdef __LITTLE_ENDIAN__ |
| 47774 | __ai float64x2_t vabdq_f64(float64x2_t __p0, float64x2_t __p1) { | 48382 | #define vld3q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 47775 | float64x2_t __ret; | 48383 | uint64x2x3_t __ret; \ |
| 47776 | __ret = (float64x2_t) __builtin_neon_vabdq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | 48384 | uint64x2x3_t __s1 = __p1; \ |
| 47777 | return __ret; | 48385 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 51); \ |
| 47778 | } | 48386 | __ret; \ |
| | 48387 | }) |
| 47779 | #else | 48388 | #else |
| 47780 | __ai float64x2_t vabdq_f64(float64x2_t __p0, float64x2_t __p1) { | 48389 | #define vld3q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 47781 | float64x2_t __ret; | 48390 | uint64x2x3_t __ret; \ |
| 47782 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48391 | uint64x2x3_t __s1 = __p1; \ |
| 47783 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 48392 | uint64x2x3_t __rev1; \ |
| 47784 | __ret = (float64x2_t) __builtin_neon_vabdq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); | 48393 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 47785 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 48394 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 47786 | return __ret; | 48395 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 47787 | } | 48396 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 51); \ |
| | 48397 | \ |
| | 48398 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| | 48399 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| | 48400 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| | 48401 | __ret; \ |
| | 48402 | }) |
| 47788 | #endif | 48403 | #endif |
| 47789 | | 48404 | |
| 47790 | __ai float64x1_t vabd_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 47791 | float64x1_t __ret; | | |
| 47792 | __ret = (float64x1_t) __builtin_neon_vabd_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | | |
| 47793 | return __ret; | | |
| 47794 | } | | |
| 47795 | __ai float64_t vabdd_f64(float64_t __p0, float64_t __p1) { | | |
| 47796 | float64_t __ret; | | |
| 47797 | __ret = (float64_t) __builtin_neon_vabdd_f64(__p0, __p1); | | |
| 47798 | return __ret; | | |
| 47799 | } | | |
| 47800 | __ai float32_t vabds_f32(float32_t __p0, float32_t __p1) { | | |
| 47801 | float32_t __ret; | | |
| 47802 | __ret = (float32_t) __builtin_neon_vabds_f32(__p0, __p1); | | |
| 47803 | return __ret; | | |
| 47804 | } | | |
| 47805 | #ifdef __LITTLE_ENDIAN__ | 48405 | #ifdef __LITTLE_ENDIAN__ |
| 47806 | __ai float64x2_t vabsq_f64(float64x2_t __p0) { | 48406 | #define vld3q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ |
| 47807 | float64x2_t __ret; | 48407 | int8x16x3_t __ret; \ |
| 47808 | __ret = (float64x2_t) __builtin_neon_vabsq_v((int8x16_t)__p0, 42); | 48408 | int8x16x3_t __s1 = __p1; \ |
| 47809 | return __ret; | 48409 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 32); \ |
| 47810 | } | 48410 | __ret; \ |
| | 48411 | }) |
| 47811 | #else | 48412 | #else |
| 47812 | __ai float64x2_t vabsq_f64(float64x2_t __p0) { | 48413 | #define vld3q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ |
| 47813 | float64x2_t __ret; | 48414 | int8x16x3_t __ret; \ |
| 47814 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48415 | int8x16x3_t __s1 = __p1; \ |
| 47815 | __ret = (float64x2_t) __builtin_neon_vabsq_v((int8x16_t)__rev0, 42); | 48416 | int8x16x3_t __rev1; \ |
| 47816 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 48417 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47817 | return __ret; | 48418 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47818 | } | 48419 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48420 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 32); \ |
| | 48421 | \ |
| | 48422 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48423 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48424 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48425 | __ret; \ |
| | 48426 | }) |
| 47819 | #endif | 48427 | #endif |
| 47820 | | 48428 | |
| 47821 | #ifdef __LITTLE_ENDIAN__ | 48429 | #ifdef __LITTLE_ENDIAN__ |
| 47822 | __ai int64x2_t vabsq_s64(int64x2_t __p0) { | 48430 | #define vld3q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 47823 | int64x2_t __ret; | 48431 | float64x2x3_t __ret; \ |
| 47824 | __ret = (int64x2_t) __builtin_neon_vabsq_v((int8x16_t)__p0, 35); | 48432 | float64x2x3_t __s1 = __p1; \ |
| 47825 | return __ret; | 48433 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 42); \ |
| 47826 | } | 48434 | __ret; \ |
| | 48435 | }) |
| 47827 | #else | 48436 | #else |
| 47828 | __ai int64x2_t vabsq_s64(int64x2_t __p0) { | 48437 | #define vld3q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 47829 | int64x2_t __ret; | 48438 | float64x2x3_t __ret; \ |
| 47830 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48439 | float64x2x3_t __s1 = __p1; \ |
| 47831 | __ret = (int64x2_t) __builtin_neon_vabsq_v((int8x16_t)__rev0, 35); | 48440 | float64x2x3_t __rev1; \ |
| 47832 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 48441 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 47833 | return __ret; | 48442 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 47834 | } | 48443 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| | 48444 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 42); \ |
| | 48445 | \ |
| | 48446 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| | 48447 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| | 48448 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| | 48449 | __ret; \ |
| | 48450 | }) |
| 47835 | #endif | 48451 | #endif |
| 47836 | | 48452 | |
| 47837 | __ai float64x1_t vabs_f64(float64x1_t __p0) { | | |
| 47838 | float64x1_t __ret; | | |
| 47839 | __ret = (float64x1_t) __builtin_neon_vabs_v((int8x8_t)__p0, 10); | | |
| 47840 | return __ret; | | |
| 47841 | } | | |
| 47842 | __ai int64x1_t vabs_s64(int64x1_t __p0) { | | |
| 47843 | int64x1_t __ret; | | |
| 47844 | __ret = (int64x1_t) __builtin_neon_vabs_v((int8x8_t)__p0, 3); | | |
| 47845 | return __ret; | | |
| 47846 | } | | |
| 47847 | __ai int64_t vabsd_s64(int64_t __p0) { | | |
| 47848 | int64_t __ret; | | |
| 47849 | __ret = (int64_t) __builtin_neon_vabsd_s64(__p0); | | |
| 47850 | return __ret; | | |
| 47851 | } | | |
| 47852 | #ifdef __LITTLE_ENDIAN__ | 48453 | #ifdef __LITTLE_ENDIAN__ |
| 47853 | __ai float64x2_t vaddq_f64(float64x2_t __p0, float64x2_t __p1) { | 48454 | #define vld3q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 47854 | float64x2_t __ret; | 48455 | int64x2x3_t __ret; \ |
| 47855 | __ret = __p0 + __p1; | 48456 | int64x2x3_t __s1 = __p1; \ |
| 47856 | return __ret; | 48457 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 35); \ |
| 47857 | } | 48458 | __ret; \ |
| 47858 | #else | 48459 | }) |
| 47859 | __ai float64x2_t vaddq_f64(float64x2_t __p0, float64x2_t __p1) { | 48460 | #else |
| 47860 | float64x2_t __ret; | 48461 | #define vld3q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 47861 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48462 | int64x2x3_t __ret; \ |
| 47862 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 48463 | int64x2x3_t __s1 = __p1; \ |
| 47863 | __ret = __rev0 + __rev1; | 48464 | int64x2x3_t __rev1; \ |
| 47864 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 48465 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 47865 | return __ret; | 48466 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 47866 | } | 48467 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| | 48468 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 35); \ |
| | 48469 | \ |
| | 48470 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| | 48471 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| | 48472 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| | 48473 | __ret; \ |
| | 48474 | }) |
| 47867 | #endif | 48475 | #endif |
| 47868 | | 48476 | |
| 47869 | __ai float64x1_t vadd_f64(float64x1_t __p0, float64x1_t __p1) { | 48477 | #define vld3_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 47870 | float64x1_t __ret; | 48478 | uint64x1x3_t __ret; \ |
| 47871 | __ret = __p0 + __p1; | 48479 | uint64x1x3_t __s1 = __p1; \ |
| 47872 | return __ret; | 48480 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 19); \ |
| 47873 | } | 48481 | __ret; \ |
| 47874 | __ai uint64_t vaddd_u64(uint64_t __p0, uint64_t __p1) { | 48482 | }) |
| 47875 | uint64_t __ret; | 48483 | #define vld3_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 47876 | __ret = (uint64_t) __builtin_neon_vaddd_u64(__p0, __p1); | 48484 | float64x1x3_t __ret; \ |
| 47877 | return __ret; | 48485 | float64x1x3_t __s1 = __p1; \ |
| 47878 | } | 48486 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 10); \ |
| 47879 | __ai int64_t vaddd_s64(int64_t __p0, int64_t __p1) { | 48487 | __ret; \ |
| 47880 | int64_t __ret; | 48488 | }) |
| 47881 | __ret = (int64_t) __builtin_neon_vaddd_s64(__p0, __p1); | 48489 | #define vld3_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 47882 | return __ret; | 48490 | int64x1x3_t __ret; \ |
| 47883 | } | 48491 | int64x1x3_t __s1 = __p1; \ |
| 47884 | __ai poly128_t vaddq_p128(poly128_t __p0, poly128_t __p1) { | 48492 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 3); \ |
| 47885 | poly128_t __ret; | 48493 | __ret; \ |
| 47886 | __ret = (poly128_t) __builtin_neon_vaddq_p128(__p0, __p1); | 48494 | }) |
| 47887 | return __ret; | 48495 | #define vld4_p64(__p0) __extension__ ({ \ |
| 47888 | } | 48496 | poly64x1x4_t __ret; \ |
| | 48497 | __builtin_neon_vld4_v(&__ret, __p0, 6); \ |
| | 48498 | __ret; \ |
| | 48499 | }) |
| 47889 | #ifdef __LITTLE_ENDIAN__ | 48500 | #ifdef __LITTLE_ENDIAN__ |
| 47890 | __ai uint16x8_t vaddhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 48501 | #define vld4q_p64(__p0) __extension__ ({ \ |
| 47891 | uint16x8_t __ret; | 48502 | poly64x2x4_t __ret; \ |
| 47892 | __ret = vcombine_u16(__p0, vaddhn_u32(__p1, __p2)); | 48503 | __builtin_neon_vld4q_v(&__ret, __p0, 38); \ |
| 47893 | return __ret; | 48504 | __ret; \ |
| 47894 | } | 48505 | }) |
| 47895 | #else | 48506 | #else |
| 47896 | __ai uint16x8_t vaddhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 48507 | #define vld4q_p64(__p0) __extension__ ({ \ |
| 47897 | uint16x8_t __ret; | 48508 | poly64x2x4_t __ret; \ |
| 47898 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48509 | __builtin_neon_vld4q_v(&__ret, __p0, 38); \ |
| 47899 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 48510 | \ |
| 47900 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 48511 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47901 | __ret = __noswap_vcombine_u16(__rev0, __noswap_vaddhn_u32(__rev1, __rev2)); | 48512 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47902 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 48513 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47903 | return __ret; | 48514 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ |
| 47904 | } | 48515 | __ret; \ |
| | 48516 | }) |
| 47905 | #endif | 48517 | #endif |
| 47906 | | 48518 | |
| 47907 | #ifdef __LITTLE_ENDIAN__ | 48519 | #ifdef __LITTLE_ENDIAN__ |
| 47908 | __ai uint32x4_t vaddhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | 48520 | #define vld4q_u64(__p0) __extension__ ({ \ |
| 47909 | uint32x4_t __ret; | 48521 | uint64x2x4_t __ret; \ |
| 47910 | __ret = vcombine_u32(__p0, vaddhn_u64(__p1, __p2)); | 48522 | __builtin_neon_vld4q_v(&__ret, __p0, 51); \ |
| 47911 | return __ret; | 48523 | __ret; \ |
| 47912 | } | 48524 | }) |
| 47913 | #else | 48525 | #else |
| 47914 | __ai uint32x4_t vaddhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | 48526 | #define vld4q_u64(__p0) __extension__ ({ \ |
| 47915 | uint32x4_t __ret; | 48527 | uint64x2x4_t __ret; \ |
| 47916 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48528 | __builtin_neon_vld4q_v(&__ret, __p0, 51); \ |
| 47917 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 48529 | \ |
| 47918 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 48530 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47919 | __ret = __noswap_vcombine_u32(__rev0, __noswap_vaddhn_u64(__rev1, __rev2)); | 48531 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47920 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 48532 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47921 | return __ret; | 48533 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ |
| 47922 | } | 48534 | __ret; \ |
| | 48535 | }) |
| 47923 | #endif | 48536 | #endif |
| 47924 | | 48537 | |
| 47925 | #ifdef __LITTLE_ENDIAN__ | 48538 | #ifdef __LITTLE_ENDIAN__ |
| 47926 | __ai uint8x16_t vaddhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { | 48539 | #define vld4q_f64(__p0) __extension__ ({ \ |
| 47927 | uint8x16_t __ret; | 48540 | float64x2x4_t __ret; \ |
| 47928 | __ret = vcombine_u8(__p0, vaddhn_u16(__p1, __p2)); | 48541 | __builtin_neon_vld4q_v(&__ret, __p0, 42); \ |
| 47929 | return __ret; | 48542 | __ret; \ |
| 47930 | } | 48543 | }) |
| 47931 | #else | 48544 | #else |
| 47932 | __ai uint8x16_t vaddhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { | 48545 | #define vld4q_f64(__p0) __extension__ ({ \ |
| 47933 | uint8x16_t __ret; | 48546 | float64x2x4_t __ret; \ |
| 47934 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 48547 | __builtin_neon_vld4q_v(&__ret, __p0, 42); \ |
| 47935 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 48548 | \ |
| 47936 | uint16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 48549 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47937 | __ret = __noswap_vcombine_u8(__rev0, __noswap_vaddhn_u16(__rev1, __rev2)); | 48550 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47938 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 48551 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47939 | return __ret; | 48552 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ |
| 47940 | } | 48553 | __ret; \ |
| | 48554 | }) |
| 47941 | #endif | 48555 | #endif |
| 47942 | | 48556 | |
| 47943 | #ifdef __LITTLE_ENDIAN__ | 48557 | #ifdef __LITTLE_ENDIAN__ |
| 47944 | __ai int16x8_t vaddhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 48558 | #define vld4q_s64(__p0) __extension__ ({ \ |
| 47945 | int16x8_t __ret; | 48559 | int64x2x4_t __ret; \ |
| 47946 | __ret = vcombine_s16(__p0, vaddhn_s32(__p1, __p2)); | 48560 | __builtin_neon_vld4q_v(&__ret, __p0, 35); \ |
| 47947 | return __ret; | 48561 | __ret; \ |
| 47948 | } | 48562 | }) |
| 47949 | #else | 48563 | #else |
| 47950 | __ai int16x8_t vaddhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 48564 | #define vld4q_s64(__p0) __extension__ ({ \ |
| 47951 | int16x8_t __ret; | 48565 | int64x2x4_t __ret; \ |
| 47952 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48566 | __builtin_neon_vld4q_v(&__ret, __p0, 35); \ |
| 47953 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 48567 | \ |
| 47954 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 48568 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47955 | __ret = __noswap_vcombine_s16(__rev0, __noswap_vaddhn_s32(__rev1, __rev2)); | 48569 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47956 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 48570 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47957 | return __ret; | 48571 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ |
| 47958 | } | 48572 | __ret; \ |
| | 48573 | }) |
| 47959 | #endif | 48574 | #endif |
| 47960 | | 48575 | |
| | 48576 | #define vld4_f64(__p0) __extension__ ({ \ |
| | 48577 | float64x1x4_t __ret; \ |
| | 48578 | __builtin_neon_vld4_v(&__ret, __p0, 10); \ |
| | 48579 | __ret; \ |
| | 48580 | }) |
| | 48581 | #define vld4_dup_p64(__p0) __extension__ ({ \ |
| | 48582 | poly64x1x4_t __ret; \ |
| | 48583 | __builtin_neon_vld4_dup_v(&__ret, __p0, 6); \ |
| | 48584 | __ret; \ |
| | 48585 | }) |
| 47961 | #ifdef __LITTLE_ENDIAN__ | 48586 | #ifdef __LITTLE_ENDIAN__ |
| 47962 | __ai int32x4_t vaddhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { | 48587 | #define vld4q_dup_p64(__p0) __extension__ ({ \ |
| 47963 | int32x4_t __ret; | 48588 | poly64x2x4_t __ret; \ |
| 47964 | __ret = vcombine_s32(__p0, vaddhn_s64(__p1, __p2)); | 48589 | __builtin_neon_vld4q_dup_v(&__ret, __p0, 38); \ |
| 47965 | return __ret; | 48590 | __ret; \ |
| 47966 | } | 48591 | }) |
| 47967 | #else | 48592 | #else |
| 47968 | __ai int32x4_t vaddhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { | 48593 | #define vld4q_dup_p64(__p0) __extension__ ({ \ |
| 47969 | int32x4_t __ret; | 48594 | poly64x2x4_t __ret; \ |
| 47970 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48595 | __builtin_neon_vld4q_dup_v(&__ret, __p0, 38); \ |
| 47971 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 48596 | \ |
| 47972 | int64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 48597 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47973 | __ret = __noswap_vcombine_s32(__rev0, __noswap_vaddhn_s64(__rev1, __rev2)); | 48598 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47974 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 48599 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47975 | return __ret; | 48600 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ |
| 47976 | } | 48601 | __ret; \ |
| | 48602 | }) |
| 47977 | #endif | 48603 | #endif |
| 47978 | | 48604 | |
| 47979 | #ifdef __LITTLE_ENDIAN__ | 48605 | #ifdef __LITTLE_ENDIAN__ |
| 47980 | __ai int8x16_t vaddhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 48606 | #define vld4q_dup_f64(__p0) __extension__ ({ \ |
| 47981 | int8x16_t __ret; | 48607 | float64x2x4_t __ret; \ |
| 47982 | __ret = vcombine_s8(__p0, vaddhn_s16(__p1, __p2)); | 48608 | __builtin_neon_vld4q_dup_v(&__ret, __p0, 42); \ |
| 47983 | return __ret; | 48609 | __ret; \ |
| 47984 | } | 48610 | }) |
| 47985 | #else | 48611 | #else |
| 47986 | __ai int8x16_t vaddhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 48612 | #define vld4q_dup_f64(__p0) __extension__ ({ \ |
| 47987 | int8x16_t __ret; | 48613 | float64x2x4_t __ret; \ |
| 47988 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 48614 | __builtin_neon_vld4q_dup_v(&__ret, __p0, 42); \ |
| 47989 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 48615 | \ |
| 47990 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 48616 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 47991 | __ret = __noswap_vcombine_s8(__rev0, __noswap_vaddhn_s16(__rev1, __rev2)); | 48617 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| 47992 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 48618 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| 47993 | return __ret; | 48619 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ |
| 47994 | } | 48620 | __ret; \ |
| | 48621 | }) |
| 47995 | #endif | 48622 | #endif |
| 47996 | | 48623 | |
| | 48624 | #define vld4_dup_f64(__p0) __extension__ ({ \ |
| | 48625 | float64x1x4_t __ret; \ |
| | 48626 | __builtin_neon_vld4_dup_v(&__ret, __p0, 10); \ |
| | 48627 | __ret; \ |
| | 48628 | }) |
| | 48629 | #define vld4_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| | 48630 | poly64x1x4_t __ret; \ |
| | 48631 | poly64x1x4_t __s1 = __p1; \ |
| | 48632 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 6); \ |
| | 48633 | __ret; \ |
| | 48634 | }) |
| 47997 | #ifdef __LITTLE_ENDIAN__ | 48635 | #ifdef __LITTLE_ENDIAN__ |
| 47998 | __ai uint16_t vaddlvq_u8(uint8x16_t __p0) { | 48636 | #define vld4q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 47999 | uint16_t __ret; | 48637 | poly8x16x4_t __ret; \ |
| 48000 | __ret = (uint16_t) __builtin_neon_vaddlvq_u8(__p0); | 48638 | poly8x16x4_t __s1 = __p1; \ |
| 48001 | return __ret; | 48639 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 36); \ |
| 48002 | } | 48640 | __ret; \ |
| | 48641 | }) |
| 48003 | #else | 48642 | #else |
| 48004 | __ai uint16_t vaddlvq_u8(uint8x16_t __p0) { | 48643 | #define vld4q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 48005 | uint16_t __ret; | 48644 | poly8x16x4_t __ret; \ |
| 48006 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 48645 | poly8x16x4_t __s1 = __p1; \ |
| 48007 | __ret = (uint16_t) __builtin_neon_vaddlvq_u8(__rev0); | 48646 | poly8x16x4_t __rev1; \ |
| 48008 | return __ret; | 48647 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48009 | } | 48648 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48649 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48650 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48651 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 36); \ |
| | 48652 | \ |
| | 48653 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48654 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48655 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48656 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48657 | __ret; \ |
| | 48658 | }) |
| 48010 | #endif | 48659 | #endif |
| 48011 | | 48660 | |
| 48012 | #ifdef __LITTLE_ENDIAN__ | 48661 | #ifdef __LITTLE_ENDIAN__ |
| 48013 | __ai uint64_t vaddlvq_u32(uint32x4_t __p0) { | 48662 | #define vld4q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 48014 | uint64_t __ret; | 48663 | poly64x2x4_t __ret; \ |
| 48015 | __ret = (uint64_t) __builtin_neon_vaddlvq_u32(__p0); | 48664 | poly64x2x4_t __s1 = __p1; \ |
| 48016 | return __ret; | 48665 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 38); \ |
| 48017 | } | 48666 | __ret; \ |
| | 48667 | }) |
| 48018 | #else | 48668 | #else |
| 48019 | __ai uint64_t vaddlvq_u32(uint32x4_t __p0) { | 48669 | #define vld4q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 48020 | uint64_t __ret; | 48670 | poly64x2x4_t __ret; \ |
| 48021 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48671 | poly64x2x4_t __s1 = __p1; \ |
| 48022 | __ret = (uint64_t) __builtin_neon_vaddlvq_u32(__rev0); | 48672 | poly64x2x4_t __rev1; \ |
| 48023 | return __ret; | 48673 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 48024 | } | 48674 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| | 48675 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| | 48676 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| | 48677 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 38); \ |
| | 48678 | \ |
| | 48679 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| | 48680 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| | 48681 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| | 48682 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ |
| | 48683 | __ret; \ |
| | 48684 | }) |
| 48025 | #endif | 48685 | #endif |
| 48026 | | 48686 | |
| 48027 | #ifdef __LITTLE_ENDIAN__ | 48687 | #ifdef __LITTLE_ENDIAN__ |
| 48028 | __ai uint32_t vaddlvq_u16(uint16x8_t __p0) { | 48688 | #define vld4q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ |
| 48029 | uint32_t __ret; | 48689 | uint8x16x4_t __ret; \ |
| 48030 | __ret = (uint32_t) __builtin_neon_vaddlvq_u16(__p0); | 48690 | uint8x16x4_t __s1 = __p1; \ |
| 48031 | return __ret; | 48691 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 48); \ |
| 48032 | } | 48692 | __ret; \ |
| | 48693 | }) |
| 48033 | #else | 48694 | #else |
| 48034 | __ai uint32_t vaddlvq_u16(uint16x8_t __p0) { | 48695 | #define vld4q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ |
| 48035 | uint32_t __ret; | 48696 | uint8x16x4_t __ret; \ |
| 48036 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 48697 | uint8x16x4_t __s1 = __p1; \ |
| 48037 | __ret = (uint32_t) __builtin_neon_vaddlvq_u16(__rev0); | 48698 | uint8x16x4_t __rev1; \ |
| 48038 | return __ret; | 48699 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48039 | } | 48700 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48701 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48702 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48703 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 48); \ |
| | 48704 | \ |
| | 48705 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48706 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48707 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48708 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48709 | __ret; \ |
| | 48710 | }) |
| 48040 | #endif | 48711 | #endif |
| 48041 | | 48712 | |
| 48042 | #ifdef __LITTLE_ENDIAN__ | 48713 | #ifdef __LITTLE_ENDIAN__ |
| 48043 | __ai int16_t vaddlvq_s8(int8x16_t __p0) { | 48714 | #define vld4q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 48044 | int16_t __ret; | 48715 | uint64x2x4_t __ret; \ |
| 48045 | __ret = (int16_t) __builtin_neon_vaddlvq_s8(__p0); | 48716 | uint64x2x4_t __s1 = __p1; \ |
| 48046 | return __ret; | 48717 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 51); \ |
| 48047 | } | 48718 | __ret; \ |
| | 48719 | }) |
| 48048 | #else | 48720 | #else |
| 48049 | __ai int16_t vaddlvq_s8(int8x16_t __p0) { | 48721 | #define vld4q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 48050 | int16_t __ret; | 48722 | uint64x2x4_t __ret; \ |
| 48051 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 48723 | uint64x2x4_t __s1 = __p1; \ |
| 48052 | __ret = (int16_t) __builtin_neon_vaddlvq_s8(__rev0); | 48724 | uint64x2x4_t __rev1; \ |
| 48053 | return __ret; | 48725 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 48054 | } | 48726 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| | 48727 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| | 48728 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| | 48729 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 51); \ |
| | 48730 | \ |
| | 48731 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| | 48732 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| | 48733 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| | 48734 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ |
| | 48735 | __ret; \ |
| | 48736 | }) |
| 48055 | #endif | 48737 | #endif |
| 48056 | | 48738 | |
| 48057 | #ifdef __LITTLE_ENDIAN__ | 48739 | #ifdef __LITTLE_ENDIAN__ |
| 48058 | __ai int64_t vaddlvq_s32(int32x4_t __p0) { | 48740 | #define vld4q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ |
| 48059 | int64_t __ret; | 48741 | int8x16x4_t __ret; \ |
| 48060 | __ret = (int64_t) __builtin_neon_vaddlvq_s32(__p0); | 48742 | int8x16x4_t __s1 = __p1; \ |
| 48061 | return __ret; | 48743 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 32); \ |
| 48062 | } | 48744 | __ret; \ |
| | 48745 | }) |
| 48063 | #else | 48746 | #else |
| 48064 | __ai int64_t vaddlvq_s32(int32x4_t __p0) { | 48747 | #define vld4q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ |
| 48065 | int64_t __ret; | 48748 | int8x16x4_t __ret; \ |
| 48066 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48749 | int8x16x4_t __s1 = __p1; \ |
| 48067 | __ret = (int64_t) __builtin_neon_vaddlvq_s32(__rev0); | 48750 | int8x16x4_t __rev1; \ |
| 48068 | return __ret; | 48751 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48069 | } | 48752 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48753 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48754 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48755 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 32); \ |
| | 48756 | \ |
| | 48757 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48758 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48759 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48760 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 48761 | __ret; \ |
| | 48762 | }) |
| 48070 | #endif | 48763 | #endif |
| 48071 | | 48764 | |
| 48072 | #ifdef __LITTLE_ENDIAN__ | 48765 | #ifdef __LITTLE_ENDIAN__ |
| 48073 | __ai int32_t vaddlvq_s16(int16x8_t __p0) { | 48766 | #define vld4q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 48074 | int32_t __ret; | 48767 | float64x2x4_t __ret; \ |
| 48075 | __ret = (int32_t) __builtin_neon_vaddlvq_s16(__p0); | 48768 | float64x2x4_t __s1 = __p1; \ |
| 48076 | return __ret; | 48769 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 42); \ |
| 48077 | } | 48770 | __ret; \ |
| | 48771 | }) |
| 48078 | #else | 48772 | #else |
| 48079 | __ai int32_t vaddlvq_s16(int16x8_t __p0) { | 48773 | #define vld4q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 48080 | int32_t __ret; | 48774 | float64x2x4_t __ret; \ |
| 48081 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 48775 | float64x2x4_t __s1 = __p1; \ |
| 48082 | __ret = (int32_t) __builtin_neon_vaddlvq_s16(__rev0); | 48776 | float64x2x4_t __rev1; \ |
| 48083 | return __ret; | 48777 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 48084 | } | 48778 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| | 48779 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| | 48780 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| | 48781 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 42); \ |
| | 48782 | \ |
| | 48783 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| | 48784 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| | 48785 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| | 48786 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ |
| | 48787 | __ret; \ |
| | 48788 | }) |
| 48085 | #endif | 48789 | #endif |
| 48086 | | 48790 | |
| 48087 | #ifdef __LITTLE_ENDIAN__ | 48791 | #ifdef __LITTLE_ENDIAN__ |
| 48088 | __ai uint16_t vaddlv_u8(uint8x8_t __p0) { | 48792 | #define vld4q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 48089 | uint16_t __ret; | 48793 | int64x2x4_t __ret; \ |
| 48090 | __ret = (uint16_t) __builtin_neon_vaddlv_u8(__p0); | 48794 | int64x2x4_t __s1 = __p1; \ |
| 48091 | return __ret; | 48795 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 35); \ |
| 48092 | } | 48796 | __ret; \ |
| | 48797 | }) |
| 48093 | #else | 48798 | #else |
| 48094 | __ai uint16_t vaddlv_u8(uint8x8_t __p0) { | 48799 | #define vld4q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 48095 | uint16_t __ret; | 48800 | int64x2x4_t __ret; \ |
| 48096 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 48801 | int64x2x4_t __s1 = __p1; \ |
| 48097 | __ret = (uint16_t) __builtin_neon_vaddlv_u8(__rev0); | 48802 | int64x2x4_t __rev1; \ |
| 48098 | return __ret; | 48803 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 48099 | } | 48804 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| | 48805 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| | 48806 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| | 48807 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 35); \ |
| | 48808 | \ |
| | 48809 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| | 48810 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| | 48811 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ |
| | 48812 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ |
| | 48813 | __ret; \ |
| | 48814 | }) |
| 48100 | #endif | 48815 | #endif |
| 48101 | | 48816 | |
| | 48817 | #define vld4_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| | 48818 | uint64x1x4_t __ret; \ |
| | 48819 | uint64x1x4_t __s1 = __p1; \ |
| | 48820 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 19); \ |
| | 48821 | __ret; \ |
| | 48822 | }) |
| | 48823 | #define vld4_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| | 48824 | float64x1x4_t __ret; \ |
| | 48825 | float64x1x4_t __s1 = __p1; \ |
| | 48826 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 10); \ |
| | 48827 | __ret; \ |
| | 48828 | }) |
| | 48829 | #define vld4_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| | 48830 | int64x1x4_t __ret; \ |
| | 48831 | int64x1x4_t __s1 = __p1; \ |
| | 48832 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 3); \ |
| | 48833 | __ret; \ |
| | 48834 | }) |
| | 48835 | #define vldrq_p128(__p0) __extension__ ({ \ |
| | 48836 | poly128_t __ret; \ |
| | 48837 | __ret = (poly128_t) __builtin_neon_vldrq_p128(__p0); \ |
| | 48838 | __ret; \ |
| | 48839 | }) |
| 48102 | #ifdef __LITTLE_ENDIAN__ | 48840 | #ifdef __LITTLE_ENDIAN__ |
| 48103 | __ai uint64_t vaddlv_u32(uint32x2_t __p0) { | 48841 | __ai float64x2_t vmaxq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 48104 | uint64_t __ret; | 48842 | float64x2_t __ret; |
| 48105 | __ret = (uint64_t) __builtin_neon_vaddlv_u32(__p0); | 48843 | __ret = (float64x2_t) __builtin_neon_vmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| 48106 | return __ret; | 48844 | return __ret; |
| 48107 | } | 48845 | } |
| 48108 | #else | 48846 | #else |
| 48109 | __ai uint64_t vaddlv_u32(uint32x2_t __p0) { | 48847 | __ai float64x2_t vmaxq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 48110 | uint64_t __ret; | 48848 | float64x2_t __ret; |
| 48111 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48849 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48112 | __ret = (uint64_t) __builtin_neon_vaddlv_u32(__rev0); | 48850 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 48851 | __ret = (float64x2_t) __builtin_neon_vmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| | 48852 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 48113 | return __ret; | 48853 | return __ret; |
| 48114 | } | 48854 | } |
| 48115 | #endif | 48855 | #endif |
| 48116 | | 48856 | |
| 48117 | #ifdef __LITTLE_ENDIAN__ | 48857 | __ai float64x1_t vmax_f64(float64x1_t __p0, float64x1_t __p1) { |
| 48118 | __ai uint32_t vaddlv_u16(uint16x4_t __p0) { | 48858 | float64x1_t __ret; |
| 48119 | uint32_t __ret; | 48859 | __ret = (float64x1_t) __builtin_neon_vmax_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| 48120 | __ret = (uint32_t) __builtin_neon_vaddlv_u16(__p0); | | |
| 48121 | return __ret; | | |
| 48122 | } | | |
| 48123 | #else | | |
| 48124 | __ai uint32_t vaddlv_u16(uint16x4_t __p0) { | | |
| 48125 | uint32_t __ret; | | |
| 48126 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 48127 | __ret = (uint32_t) __builtin_neon_vaddlv_u16(__rev0); | | |
| 48128 | return __ret; | 48860 | return __ret; |
| 48129 | } | 48861 | } |
| 48130 | #endif | | |
| 48131 | | | |
| 48132 | #ifdef __LITTLE_ENDIAN__ | 48862 | #ifdef __LITTLE_ENDIAN__ |
| 48133 | __ai int16_t vaddlv_s8(int8x8_t __p0) { | 48863 | __ai float64_t vmaxnmvq_f64(float64x2_t __p0) { |
| 48134 | int16_t __ret; | 48864 | float64_t __ret; |
| 48135 | __ret = (int16_t) __builtin_neon_vaddlv_s8(__p0); | 48865 | __ret = (float64_t) __builtin_neon_vmaxnmvq_f64(__p0); |
| 48136 | return __ret; | 48866 | return __ret; |
| 48137 | } | 48867 | } |
| 48138 | #else | 48868 | #else |
| 48139 | __ai int16_t vaddlv_s8(int8x8_t __p0) { | 48869 | __ai float64_t vmaxnmvq_f64(float64x2_t __p0) { |
| 48140 | int16_t __ret; | 48870 | float64_t __ret; |
| 48141 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 48871 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48142 | __ret = (int16_t) __builtin_neon_vaddlv_s8(__rev0); | 48872 | __ret = (float64_t) __builtin_neon_vmaxnmvq_f64(__rev0); |
| 48143 | return __ret; | 48873 | return __ret; |
| 48144 | } | 48874 | } |
| 48145 | #endif | 48875 | #endif |
| 48146 | | 48876 | |
| 48147 | #ifdef __LITTLE_ENDIAN__ | 48877 | #ifdef __LITTLE_ENDIAN__ |
| 48148 | __ai int64_t vaddlv_s32(int32x2_t __p0) { | 48878 | __ai float32_t vmaxnmvq_f32(float32x4_t __p0) { |
| 48149 | int64_t __ret; | 48879 | float32_t __ret; |
| 48150 | __ret = (int64_t) __builtin_neon_vaddlv_s32(__p0); | 48880 | __ret = (float32_t) __builtin_neon_vmaxnmvq_f32(__p0); |
| 48151 | return __ret; | 48881 | return __ret; |
| 48152 | } | 48882 | } |
| 48153 | #else | 48883 | #else |
| 48154 | __ai int64_t vaddlv_s32(int32x2_t __p0) { | 48884 | __ai float32_t vmaxnmvq_f32(float32x4_t __p0) { |
| 48155 | int64_t __ret; | 48885 | float32_t __ret; |
| 48156 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48886 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48157 | __ret = (int64_t) __builtin_neon_vaddlv_s32(__rev0); | 48887 | __ret = (float32_t) __builtin_neon_vmaxnmvq_f32(__rev0); |
| 48158 | return __ret; | 48888 | return __ret; |
| 48159 | } | 48889 | } |
| 48160 | #endif | 48890 | #endif |
| 48161 | | 48891 | |
| 48162 | #ifdef __LITTLE_ENDIAN__ | 48892 | #ifdef __LITTLE_ENDIAN__ |
| 48163 | __ai int32_t vaddlv_s16(int16x4_t __p0) { | 48893 | __ai float32_t vmaxnmv_f32(float32x2_t __p0) { |
| 48164 | int32_t __ret; | 48894 | float32_t __ret; |
| 48165 | __ret = (int32_t) __builtin_neon_vaddlv_s16(__p0); | 48895 | __ret = (float32_t) __builtin_neon_vmaxnmv_f32(__p0); |
| 48166 | return __ret; | 48896 | return __ret; |
| 48167 | } | 48897 | } |
| 48168 | #else | 48898 | #else |
| 48169 | __ai int32_t vaddlv_s16(int16x4_t __p0) { | 48899 | __ai float32_t vmaxnmv_f32(float32x2_t __p0) { |
| 48170 | int32_t __ret; | 48900 | float32_t __ret; |
| 48171 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48901 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48172 | __ret = (int32_t) __builtin_neon_vaddlv_s16(__rev0); | 48902 | __ret = (float32_t) __builtin_neon_vmaxnmv_f32(__rev0); |
| 48173 | return __ret; | 48903 | return __ret; |
| 48174 | } | 48904 | } |
| 48175 | #endif | 48905 | #endif |
| 48176 | | 48906 | |
| 48177 | #ifdef __LITTLE_ENDIAN__ | 48907 | #ifdef __LITTLE_ENDIAN__ |
| 48178 | __ai uint8_t vaddvq_u8(uint8x16_t __p0) { | 48908 | __ai uint8_t vmaxvq_u8(uint8x16_t __p0) { |
| 48179 | uint8_t __ret; | 48909 | uint8_t __ret; |
| 48180 | __ret = (uint8_t) __builtin_neon_vaddvq_u8(__p0); | 48910 | __ret = (uint8_t) __builtin_neon_vmaxvq_u8(__p0); |
| 48181 | return __ret; | 48911 | return __ret; |
| 48182 | } | 48912 | } |
| 48183 | #else | 48913 | #else |
| 48184 | __ai uint8_t vaddvq_u8(uint8x16_t __p0) { | 48914 | __ai uint8_t vmaxvq_u8(uint8x16_t __p0) { |
| 48185 | uint8_t __ret; | 48915 | uint8_t __ret; |
| 48186 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 48916 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48187 | __ret = (uint8_t) __builtin_neon_vaddvq_u8(__rev0); | 48917 | __ret = (uint8_t) __builtin_neon_vmaxvq_u8(__rev0); |
| 48188 | return __ret; | 48918 | return __ret; |
| 48189 | } | 48919 | } |
| 48190 | #endif | 48920 | #endif |
| 48191 | | 48921 | |
| 48192 | #ifdef __LITTLE_ENDIAN__ | 48922 | #ifdef __LITTLE_ENDIAN__ |
| 48193 | __ai uint32_t vaddvq_u32(uint32x4_t __p0) { | 48923 | __ai uint32_t vmaxvq_u32(uint32x4_t __p0) { |
| 48194 | uint32_t __ret; | 48924 | uint32_t __ret; |
| 48195 | __ret = (uint32_t) __builtin_neon_vaddvq_u32(__p0); | 48925 | __ret = (uint32_t) __builtin_neon_vmaxvq_u32(__p0); |
| 48196 | return __ret; | 48926 | return __ret; |
| 48197 | } | 48927 | } |
| 48198 | #else | 48928 | #else |
| 48199 | __ai uint32_t vaddvq_u32(uint32x4_t __p0) { | 48929 | __ai uint32_t vmaxvq_u32(uint32x4_t __p0) { |
| 48200 | uint32_t __ret; | 48930 | uint32_t __ret; |
| 48201 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48931 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48202 | __ret = (uint32_t) __builtin_neon_vaddvq_u32(__rev0); | 48932 | __ret = (uint32_t) __builtin_neon_vmaxvq_u32(__rev0); |
| 48203 | return __ret; | | |
| 48204 | } | | |
| 48205 | #endif | | |
| 48206 | | | |
| 48207 | #ifdef __LITTLE_ENDIAN__ | | |
| 48208 | __ai uint64_t vaddvq_u64(uint64x2_t __p0) { | | |
| 48209 | uint64_t __ret; | | |
| 48210 | __ret = (uint64_t) __builtin_neon_vaddvq_u64(__p0); | | |
| 48211 | return __ret; | | |
| 48212 | } | | |
| 48213 | #else | | |
| 48214 | __ai uint64_t vaddvq_u64(uint64x2_t __p0) { | | |
| 48215 | uint64_t __ret; | | |
| 48216 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 48217 | __ret = (uint64_t) __builtin_neon_vaddvq_u64(__rev0); | | |
| 48218 | return __ret; | 48933 | return __ret; |
| 48219 | } | 48934 | } |
| 48220 | #endif | 48935 | #endif |
| 48221 | | 48936 | |
| 48222 | #ifdef __LITTLE_ENDIAN__ | 48937 | #ifdef __LITTLE_ENDIAN__ |
| 48223 | __ai uint16_t vaddvq_u16(uint16x8_t __p0) { | 48938 | __ai uint16_t vmaxvq_u16(uint16x8_t __p0) { |
| 48224 | uint16_t __ret; | 48939 | uint16_t __ret; |
| 48225 | __ret = (uint16_t) __builtin_neon_vaddvq_u16(__p0); | 48940 | __ret = (uint16_t) __builtin_neon_vmaxvq_u16(__p0); |
| 48226 | return __ret; | 48941 | return __ret; |
| 48227 | } | 48942 | } |
| 48228 | #else | 48943 | #else |
| 48229 | __ai uint16_t vaddvq_u16(uint16x8_t __p0) { | 48944 | __ai uint16_t vmaxvq_u16(uint16x8_t __p0) { |
| 48230 | uint16_t __ret; | 48945 | uint16_t __ret; |
| 48231 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 48946 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48232 | __ret = (uint16_t) __builtin_neon_vaddvq_u16(__rev0); | 48947 | __ret = (uint16_t) __builtin_neon_vmaxvq_u16(__rev0); |
| 48233 | return __ret; | 48948 | return __ret; |
| 48234 | } | 48949 | } |
| 48235 | #endif | 48950 | #endif |
| 48236 | | 48951 | |
| 48237 | #ifdef __LITTLE_ENDIAN__ | 48952 | #ifdef __LITTLE_ENDIAN__ |
| 48238 | __ai int8_t vaddvq_s8(int8x16_t __p0) { | 48953 | __ai int8_t vmaxvq_s8(int8x16_t __p0) { |
| 48239 | int8_t __ret; | 48954 | int8_t __ret; |
| 48240 | __ret = (int8_t) __builtin_neon_vaddvq_s8(__p0); | 48955 | __ret = (int8_t) __builtin_neon_vmaxvq_s8(__p0); |
| 48241 | return __ret; | 48956 | return __ret; |
| 48242 | } | 48957 | } |
| 48243 | #else | 48958 | #else |
| 48244 | __ai int8_t vaddvq_s8(int8x16_t __p0) { | 48959 | __ai int8_t vmaxvq_s8(int8x16_t __p0) { |
| 48245 | int8_t __ret; | 48960 | int8_t __ret; |
| 48246 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 48961 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48247 | __ret = (int8_t) __builtin_neon_vaddvq_s8(__rev0); | 48962 | __ret = (int8_t) __builtin_neon_vmaxvq_s8(__rev0); |
| 48248 | return __ret; | 48963 | return __ret; |
| 48249 | } | 48964 | } |
| 48250 | #endif | 48965 | #endif |
| 48251 | | 48966 | |
| 48252 | #ifdef __LITTLE_ENDIAN__ | 48967 | #ifdef __LITTLE_ENDIAN__ |
| 48253 | __ai float64_t vaddvq_f64(float64x2_t __p0) { | 48968 | __ai float64_t vmaxvq_f64(float64x2_t __p0) { |
| 48254 | float64_t __ret; | 48969 | float64_t __ret; |
| 48255 | __ret = (float64_t) __builtin_neon_vaddvq_f64(__p0); | 48970 | __ret = (float64_t) __builtin_neon_vmaxvq_f64(__p0); |
| 48256 | return __ret; | 48971 | return __ret; |
| 48257 | } | 48972 | } |
| 48258 | #else | 48973 | #else |
| 48259 | __ai float64_t vaddvq_f64(float64x2_t __p0) { | 48974 | __ai float64_t vmaxvq_f64(float64x2_t __p0) { |
| 48260 | float64_t __ret; | 48975 | float64_t __ret; |
| 48261 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48976 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48262 | __ret = (float64_t) __builtin_neon_vaddvq_f64(__rev0); | 48977 | __ret = (float64_t) __builtin_neon_vmaxvq_f64(__rev0); |
| 48263 | return __ret; | 48978 | return __ret; |
| 48264 | } | 48979 | } |
| 48265 | #endif | 48980 | #endif |
| 48266 | | 48981 | |
| 48267 | #ifdef __LITTLE_ENDIAN__ | 48982 | #ifdef __LITTLE_ENDIAN__ |
| 48268 | __ai float32_t vaddvq_f32(float32x4_t __p0) { | 48983 | __ai float32_t vmaxvq_f32(float32x4_t __p0) { |
| 48269 | float32_t __ret; | 48984 | float32_t __ret; |
| 48270 | __ret = (float32_t) __builtin_neon_vaddvq_f32(__p0); | 48985 | __ret = (float32_t) __builtin_neon_vmaxvq_f32(__p0); |
| 48271 | return __ret; | 48986 | return __ret; |
| 48272 | } | 48987 | } |
| 48273 | #else | 48988 | #else |
| 48274 | __ai float32_t vaddvq_f32(float32x4_t __p0) { | 48989 | __ai float32_t vmaxvq_f32(float32x4_t __p0) { |
| 48275 | float32_t __ret; | 48990 | float32_t __ret; |
| 48276 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48991 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48277 | __ret = (float32_t) __builtin_neon_vaddvq_f32(__rev0); | 48992 | __ret = (float32_t) __builtin_neon_vmaxvq_f32(__rev0); |
| 48278 | return __ret; | 48993 | return __ret; |
| 48279 | } | 48994 | } |
| 48280 | #endif | 48995 | #endif |
| 48281 | | 48996 | |
| 48282 | #ifdef __LITTLE_ENDIAN__ | 48997 | #ifdef __LITTLE_ENDIAN__ |
| 48283 | __ai int32_t vaddvq_s32(int32x4_t __p0) { | 48998 | __ai int32_t vmaxvq_s32(int32x4_t __p0) { |
| 48284 | int32_t __ret; | 48999 | int32_t __ret; |
| 48285 | __ret = (int32_t) __builtin_neon_vaddvq_s32(__p0); | 49000 | __ret = (int32_t) __builtin_neon_vmaxvq_s32(__p0); |
| 48286 | return __ret; | 49001 | return __ret; |
| 48287 | } | 49002 | } |
| 48288 | #else | 49003 | #else |
| 48289 | __ai int32_t vaddvq_s32(int32x4_t __p0) { | 49004 | __ai int32_t vmaxvq_s32(int32x4_t __p0) { |
| 48290 | int32_t __ret; | 49005 | int32_t __ret; |
| 48291 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 49006 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48292 | __ret = (int32_t) __builtin_neon_vaddvq_s32(__rev0); | 49007 | __ret = (int32_t) __builtin_neon_vmaxvq_s32(__rev0); |
| 48293 | return __ret; | | |
| 48294 | } | | |
| 48295 | #endif | | |
| 48296 | | | |
| 48297 | #ifdef __LITTLE_ENDIAN__ | | |
| 48298 | __ai int64_t vaddvq_s64(int64x2_t __p0) { | | |
| 48299 | int64_t __ret; | | |
| 48300 | __ret = (int64_t) __builtin_neon_vaddvq_s64(__p0); | | |
| 48301 | return __ret; | | |
| 48302 | } | | |
| 48303 | #else | | |
| 48304 | __ai int64_t vaddvq_s64(int64x2_t __p0) { | | |
| 48305 | int64_t __ret; | | |
| 48306 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 48307 | __ret = (int64_t) __builtin_neon_vaddvq_s64(__rev0); | | |
| 48308 | return __ret; | 49008 | return __ret; |
| 48309 | } | 49009 | } |
| 48310 | #endif | 49010 | #endif |
| 48311 | | 49011 | |
| 48312 | #ifdef __LITTLE_ENDIAN__ | 49012 | #ifdef __LITTLE_ENDIAN__ |
| 48313 | __ai int16_t vaddvq_s16(int16x8_t __p0) { | 49013 | __ai int16_t vmaxvq_s16(int16x8_t __p0) { |
| 48314 | int16_t __ret; | 49014 | int16_t __ret; |
| 48315 | __ret = (int16_t) __builtin_neon_vaddvq_s16(__p0); | 49015 | __ret = (int16_t) __builtin_neon_vmaxvq_s16(__p0); |
| 48316 | return __ret; | 49016 | return __ret; |
| 48317 | } | 49017 | } |
| 48318 | #else | 49018 | #else |
| 48319 | __ai int16_t vaddvq_s16(int16x8_t __p0) { | 49019 | __ai int16_t vmaxvq_s16(int16x8_t __p0) { |
| 48320 | int16_t __ret; | 49020 | int16_t __ret; |
| 48321 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 49021 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48322 | __ret = (int16_t) __builtin_neon_vaddvq_s16(__rev0); | 49022 | __ret = (int16_t) __builtin_neon_vmaxvq_s16(__rev0); |
| 48323 | return __ret; | 49023 | return __ret; |
| 48324 | } | 49024 | } |
| 48325 | #endif | 49025 | #endif |
| 48326 | | 49026 | |
| 48327 | #ifdef __LITTLE_ENDIAN__ | 49027 | #ifdef __LITTLE_ENDIAN__ |
| 48328 | __ai uint8_t vaddv_u8(uint8x8_t __p0) { | 49028 | __ai uint8_t vmaxv_u8(uint8x8_t __p0) { |
| 48329 | uint8_t __ret; | 49029 | uint8_t __ret; |
| 48330 | __ret = (uint8_t) __builtin_neon_vaddv_u8(__p0); | 49030 | __ret = (uint8_t) __builtin_neon_vmaxv_u8(__p0); |
| 48331 | return __ret; | 49031 | return __ret; |
| 48332 | } | 49032 | } |
| 48333 | #else | 49033 | #else |
| 48334 | __ai uint8_t vaddv_u8(uint8x8_t __p0) { | 49034 | __ai uint8_t vmaxv_u8(uint8x8_t __p0) { |
| 48335 | uint8_t __ret; | 49035 | uint8_t __ret; |
| 48336 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 49036 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48337 | __ret = (uint8_t) __builtin_neon_vaddv_u8(__rev0); | 49037 | __ret = (uint8_t) __builtin_neon_vmaxv_u8(__rev0); |
| 48338 | return __ret; | 49038 | return __ret; |
| 48339 | } | 49039 | } |
| 48340 | #endif | 49040 | #endif |
| 48341 | | 49041 | |
| 48342 | #ifdef __LITTLE_ENDIAN__ | 49042 | #ifdef __LITTLE_ENDIAN__ |
| 48343 | __ai uint32_t vaddv_u32(uint32x2_t __p0) { | 49043 | __ai uint32_t vmaxv_u32(uint32x2_t __p0) { |
| 48344 | uint32_t __ret; | 49044 | uint32_t __ret; |
| 48345 | __ret = (uint32_t) __builtin_neon_vaddv_u32(__p0); | 49045 | __ret = (uint32_t) __builtin_neon_vmaxv_u32(__p0); |
| 48346 | return __ret; | 49046 | return __ret; |
| 48347 | } | 49047 | } |
| 48348 | #else | 49048 | #else |
| 48349 | __ai uint32_t vaddv_u32(uint32x2_t __p0) { | 49049 | __ai uint32_t vmaxv_u32(uint32x2_t __p0) { |
| 48350 | uint32_t __ret; | 49050 | uint32_t __ret; |
| 48351 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 49051 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48352 | __ret = (uint32_t) __builtin_neon_vaddv_u32(__rev0); | 49052 | __ret = (uint32_t) __builtin_neon_vmaxv_u32(__rev0); |
| 48353 | return __ret; | 49053 | return __ret; |
| 48354 | } | 49054 | } |
| 48355 | #endif | 49055 | #endif |
| 48356 | | 49056 | |
| 48357 | #ifdef __LITTLE_ENDIAN__ | 49057 | #ifdef __LITTLE_ENDIAN__ |
| 48358 | __ai uint16_t vaddv_u16(uint16x4_t __p0) { | 49058 | __ai uint16_t vmaxv_u16(uint16x4_t __p0) { |
| 48359 | uint16_t __ret; | 49059 | uint16_t __ret; |
| 48360 | __ret = (uint16_t) __builtin_neon_vaddv_u16(__p0); | 49060 | __ret = (uint16_t) __builtin_neon_vmaxv_u16(__p0); |
| 48361 | return __ret; | 49061 | return __ret; |
| 48362 | } | 49062 | } |
| 48363 | #else | 49063 | #else |
| 48364 | __ai uint16_t vaddv_u16(uint16x4_t __p0) { | 49064 | __ai uint16_t vmaxv_u16(uint16x4_t __p0) { |
| 48365 | uint16_t __ret; | 49065 | uint16_t __ret; |
| 48366 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 49066 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48367 | __ret = (uint16_t) __builtin_neon_vaddv_u16(__rev0); | 49067 | __ret = (uint16_t) __builtin_neon_vmaxv_u16(__rev0); |
| 48368 | return __ret; | 49068 | return __ret; |
| 48369 | } | 49069 | } |
| 48370 | #endif | 49070 | #endif |
| 48371 | | 49071 | |
| 48372 | #ifdef __LITTLE_ENDIAN__ | 49072 | #ifdef __LITTLE_ENDIAN__ |
| 48373 | __ai int8_t vaddv_s8(int8x8_t __p0) { | 49073 | __ai int8_t vmaxv_s8(int8x8_t __p0) { |
| 48374 | int8_t __ret; | 49074 | int8_t __ret; |
| 48375 | __ret = (int8_t) __builtin_neon_vaddv_s8(__p0); | 49075 | __ret = (int8_t) __builtin_neon_vmaxv_s8(__p0); |
| 48376 | return __ret; | 49076 | return __ret; |
| 48377 | } | 49077 | } |
| 48378 | #else | 49078 | #else |
| 48379 | __ai int8_t vaddv_s8(int8x8_t __p0) { | 49079 | __ai int8_t vmaxv_s8(int8x8_t __p0) { |
| 48380 | int8_t __ret; | 49080 | int8_t __ret; |
| 48381 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 49081 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48382 | __ret = (int8_t) __builtin_neon_vaddv_s8(__rev0); | 49082 | __ret = (int8_t) __builtin_neon_vmaxv_s8(__rev0); |
| 48383 | return __ret; | 49083 | return __ret; |
| 48384 | } | 49084 | } |
| 48385 | #endif | 49085 | #endif |
| 48386 | | 49086 | |
| 48387 | #ifdef __LITTLE_ENDIAN__ | 49087 | #ifdef __LITTLE_ENDIAN__ |
| 48388 | __ai float32_t vaddv_f32(float32x2_t __p0) { | 49088 | __ai float32_t vmaxv_f32(float32x2_t __p0) { |
| 48389 | float32_t __ret; | 49089 | float32_t __ret; |
| 48390 | __ret = (float32_t) __builtin_neon_vaddv_f32(__p0); | 49090 | __ret = (float32_t) __builtin_neon_vmaxv_f32(__p0); |
| 48391 | return __ret; | 49091 | return __ret; |
| 48392 | } | 49092 | } |
| 48393 | #else | 49093 | #else |
| 48394 | __ai float32_t vaddv_f32(float32x2_t __p0) { | 49094 | __ai float32_t vmaxv_f32(float32x2_t __p0) { |
| 48395 | float32_t __ret; | 49095 | float32_t __ret; |
| 48396 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 49096 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48397 | __ret = (float32_t) __builtin_neon_vaddv_f32(__rev0); | 49097 | __ret = (float32_t) __builtin_neon_vmaxv_f32(__rev0); |
| 48398 | return __ret; | 49098 | return __ret; |
| 48399 | } | 49099 | } |
| 48400 | #endif | 49100 | #endif |
| 48401 | | 49101 | |
| 48402 | #ifdef __LITTLE_ENDIAN__ | 49102 | #ifdef __LITTLE_ENDIAN__ |
| 48403 | __ai int32_t vaddv_s32(int32x2_t __p0) { | 49103 | __ai int32_t vmaxv_s32(int32x2_t __p0) { |
| 48404 | int32_t __ret; | 49104 | int32_t __ret; |
| 48405 | __ret = (int32_t) __builtin_neon_vaddv_s32(__p0); | 49105 | __ret = (int32_t) __builtin_neon_vmaxv_s32(__p0); |
| 48406 | return __ret; | 49106 | return __ret; |
| 48407 | } | 49107 | } |
| 48408 | #else | 49108 | #else |
| 48409 | __ai int32_t vaddv_s32(int32x2_t __p0) { | 49109 | __ai int32_t vmaxv_s32(int32x2_t __p0) { |
| 48410 | int32_t __ret; | 49110 | int32_t __ret; |
| 48411 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 49111 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48412 | __ret = (int32_t) __builtin_neon_vaddv_s32(__rev0); | 49112 | __ret = (int32_t) __builtin_neon_vmaxv_s32(__rev0); |
| 48413 | return __ret; | 49113 | return __ret; |
| 48414 | } | 49114 | } |
| 48415 | #endif | 49115 | #endif |
| 48416 | | 49116 | |
| 48417 | #ifdef __LITTLE_ENDIAN__ | 49117 | #ifdef __LITTLE_ENDIAN__ |
| 48418 | __ai int16_t vaddv_s16(int16x4_t __p0) { | 49118 | __ai int16_t vmaxv_s16(int16x4_t __p0) { |
| 48419 | int16_t __ret; | 49119 | int16_t __ret; |
| 48420 | __ret = (int16_t) __builtin_neon_vaddv_s16(__p0); | 49120 | __ret = (int16_t) __builtin_neon_vmaxv_s16(__p0); |
| 48421 | return __ret; | 49121 | return __ret; |
| 48422 | } | 49122 | } |
| 48423 | #else | 49123 | #else |
| 48424 | __ai int16_t vaddv_s16(int16x4_t __p0) { | 49124 | __ai int16_t vmaxv_s16(int16x4_t __p0) { |
| 48425 | int16_t __ret; | 49125 | int16_t __ret; |
| 48426 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 49126 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48427 | __ret = (int16_t) __builtin_neon_vaddv_s16(__rev0); | 49127 | __ret = (int16_t) __builtin_neon_vmaxv_s16(__rev0); |
| 48428 | return __ret; | | |
| 48429 | } | | |
| 48430 | #endif | | |
| 48431 | | | |
| 48432 | __ai poly64x1_t vbsl_p64(uint64x1_t __p0, poly64x1_t __p1, poly64x1_t __p2) { | | |
| 48433 | poly64x1_t __ret; | | |
| 48434 | __ret = (poly64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 6); | | |
| 48435 | return __ret; | | |
| 48436 | } | | |
| 48437 | #ifdef __LITTLE_ENDIAN__ | | |
| 48438 | __ai poly64x2_t vbslq_p64(uint64x2_t __p0, poly64x2_t __p1, poly64x2_t __p2) { | | |
| 48439 | poly64x2_t __ret; | | |
| 48440 | __ret = (poly64x2_t) __builtin_neon_vbslq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 38); | | |
| 48441 | return __ret; | | |
| 48442 | } | | |
| 48443 | #else | | |
| 48444 | __ai poly64x2_t vbslq_p64(uint64x2_t __p0, poly64x2_t __p1, poly64x2_t __p2) { | | |
| 48445 | poly64x2_t __ret; | | |
| 48446 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 48447 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 48448 | poly64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 48449 | __ret = (poly64x2_t) __builtin_neon_vbslq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 38); | | |
| 48450 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 48451 | return __ret; | 49128 | return __ret; |
| 48452 | } | 49129 | } |
| 48453 | #endif | 49130 | #endif |
| 48454 | | 49131 | |
| 48455 | #ifdef __LITTLE_ENDIAN__ | 49132 | #ifdef __LITTLE_ENDIAN__ |
| 48456 | __ai float64x2_t vbslq_f64(uint64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 49133 | __ai float64x2_t vminq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 48457 | float64x2_t __ret; | | |
| 48458 | __ret = (float64x2_t) __builtin_neon_vbslq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); | | |
| 48459 | return __ret; | | |
| 48460 | } | | |
| 48461 | #else | | |
| 48462 | __ai float64x2_t vbslq_f64(uint64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | | |
| 48463 | float64x2_t __ret; | 49134 | float64x2_t __ret; |
| 48464 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 49135 | __ret = (float64x2_t) __builtin_neon_vminq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| 48465 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 48466 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 48467 | __ret = (float64x2_t) __builtin_neon_vbslq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 42); | | |
| 48468 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 48469 | return __ret; | | |
| 48470 | } | | |
| 48471 | #endif | | |
| 48472 | | | |
| 48473 | __ai float64x1_t vbsl_f64(uint64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | | |
| 48474 | float64x1_t __ret; | | |
| 48475 | __ret = (float64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); | | |
| 48476 | return __ret; | | |
| 48477 | } | | |
| 48478 | #ifdef __LITTLE_ENDIAN__ | | |
| 48479 | __ai uint64x2_t vcageq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 48480 | uint64x2_t __ret; | | |
| 48481 | __ret = (uint64x2_t) __builtin_neon_vcageq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); | | |
| 48482 | return __ret; | | |
| 48483 | } | | |
| 48484 | #else | | |
| 48485 | __ai uint64x2_t vcageq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 48486 | uint64x2_t __ret; | | |
| 48487 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 48488 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 48489 | __ret = (uint64x2_t) __builtin_neon_vcageq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); | | |
| 48490 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 48491 | return __ret; | | |
| 48492 | } | | |
| 48493 | #endif | | |
| 48494 | | | |
| 48495 | __ai uint64x1_t vcage_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 48496 | uint64x1_t __ret; | | |
| 48497 | __ret = (uint64x1_t) __builtin_neon_vcage_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 48498 | return __ret; | | |
| 48499 | } | | |
| 48500 | __ai uint64_t vcaged_f64(float64_t __p0, float64_t __p1) { | | |
| 48501 | uint64_t __ret; | | |
| 48502 | __ret = (uint64_t) __builtin_neon_vcaged_f64(__p0, __p1); | | |
| 48503 | return __ret; | | |
| 48504 | } | | |
| 48505 | __ai uint32_t vcages_f32(float32_t __p0, float32_t __p1) { | | |
| 48506 | uint32_t __ret; | | |
| 48507 | __ret = (uint32_t) __builtin_neon_vcages_f32(__p0, __p1); | | |
| 48508 | return __ret; | | |
| 48509 | } | | |
| 48510 | #ifdef __LITTLE_ENDIAN__ | | |
| 48511 | __ai uint64x2_t vcagtq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 48512 | uint64x2_t __ret; | | |
| 48513 | __ret = (uint64x2_t) __builtin_neon_vcagtq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); | | |
| 48514 | return __ret; | | |
| 48515 | } | | |
| 48516 | #else | | |
| 48517 | __ai uint64x2_t vcagtq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 48518 | uint64x2_t __ret; | | |
| 48519 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 48520 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 48521 | __ret = (uint64x2_t) __builtin_neon_vcagtq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); | | |
| 48522 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 48523 | return __ret; | | |
| 48524 | } | | |
| 48525 | #endif | | |
| 48526 | | | |
| 48527 | __ai uint64x1_t vcagt_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 48528 | uint64x1_t __ret; | | |
| 48529 | __ret = (uint64x1_t) __builtin_neon_vcagt_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 48530 | return __ret; | | |
| 48531 | } | | |
| 48532 | __ai uint64_t vcagtd_f64(float64_t __p0, float64_t __p1) { | | |
| 48533 | uint64_t __ret; | | |
| 48534 | __ret = (uint64_t) __builtin_neon_vcagtd_f64(__p0, __p1); | | |
| 48535 | return __ret; | | |
| 48536 | } | | |
| 48537 | __ai uint32_t vcagts_f32(float32_t __p0, float32_t __p1) { | | |
| 48538 | uint32_t __ret; | | |
| 48539 | __ret = (uint32_t) __builtin_neon_vcagts_f32(__p0, __p1); | | |
| 48540 | return __ret; | | |
| 48541 | } | | |
| 48542 | #ifdef __LITTLE_ENDIAN__ | | |
| 48543 | __ai uint64x2_t vcaleq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 48544 | uint64x2_t __ret; | | |
| 48545 | __ret = (uint64x2_t) __builtin_neon_vcaleq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); | | |
| 48546 | return __ret; | | |
| 48547 | } | | |
| 48548 | #else | | |
| 48549 | __ai uint64x2_t vcaleq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 48550 | uint64x2_t __ret; | | |
| 48551 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 48552 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 48553 | __ret = (uint64x2_t) __builtin_neon_vcaleq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); | | |
| 48554 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 48555 | return __ret; | | |
| 48556 | } | | |
| 48557 | #endif | | |
| 48558 | | | |
| 48559 | __ai uint64x1_t vcale_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 48560 | uint64x1_t __ret; | | |
| 48561 | __ret = (uint64x1_t) __builtin_neon_vcale_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 48562 | return __ret; | | |
| 48563 | } | | |
| 48564 | __ai uint64_t vcaled_f64(float64_t __p0, float64_t __p1) { | | |
| 48565 | uint64_t __ret; | | |
| 48566 | __ret = (uint64_t) __builtin_neon_vcaled_f64(__p0, __p1); | | |
| 48567 | return __ret; | | |
| 48568 | } | | |
| 48569 | __ai uint32_t vcales_f32(float32_t __p0, float32_t __p1) { | | |
| 48570 | uint32_t __ret; | | |
| 48571 | __ret = (uint32_t) __builtin_neon_vcales_f32(__p0, __p1); | | |
| 48572 | return __ret; | | |
| 48573 | } | | |
| 48574 | #ifdef __LITTLE_ENDIAN__ | | |
| 48575 | __ai uint64x2_t vcaltq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 48576 | uint64x2_t __ret; | | |
| 48577 | __ret = (uint64x2_t) __builtin_neon_vcaltq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); | | |
| 48578 | return __ret; | | |
| 48579 | } | | |
| 48580 | #else | | |
| 48581 | __ai uint64x2_t vcaltq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 48582 | uint64x2_t __ret; | | |
| 48583 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 48584 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 48585 | __ret = (uint64x2_t) __builtin_neon_vcaltq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); | | |
| 48586 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 48587 | return __ret; | | |
| 48588 | } | | |
| 48589 | #endif | | |
| 48590 | | | |
| 48591 | __ai uint64x1_t vcalt_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 48592 | uint64x1_t __ret; | | |
| 48593 | __ret = (uint64x1_t) __builtin_neon_vcalt_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 48594 | return __ret; | | |
| 48595 | } | | |
| 48596 | __ai uint64_t vcaltd_f64(float64_t __p0, float64_t __p1) { | | |
| 48597 | uint64_t __ret; | | |
| 48598 | __ret = (uint64_t) __builtin_neon_vcaltd_f64(__p0, __p1); | | |
| 48599 | return __ret; | | |
| 48600 | } | | |
| 48601 | __ai uint32_t vcalts_f32(float32_t __p0, float32_t __p1) { | | |
| 48602 | uint32_t __ret; | | |
| 48603 | __ret = (uint32_t) __builtin_neon_vcalts_f32(__p0, __p1); | | |
| 48604 | return __ret; | | |
| 48605 | } | | |
| 48606 | __ai uint64x1_t vceq_p64(poly64x1_t __p0, poly64x1_t __p1) { | | |
| 48607 | uint64x1_t __ret; | | |
| 48608 | __ret = (uint64x1_t)(__p0 == __p1); | | |
| 48609 | return __ret; | | |
| 48610 | } | | |
| 48611 | #ifdef __LITTLE_ENDIAN__ | | |
| 48612 | __ai uint64x2_t vceqq_p64(poly64x2_t __p0, poly64x2_t __p1) { | | |
| 48613 | uint64x2_t __ret; | | |
| 48614 | __ret = (uint64x2_t)(__p0 == __p1); | | |
| 48615 | return __ret; | | |
| 48616 | } | | |
| 48617 | #else | | |
| 48618 | __ai uint64x2_t vceqq_p64(poly64x2_t __p0, poly64x2_t __p1) { | | |
| 48619 | uint64x2_t __ret; | | |
| 48620 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 48621 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 48622 | __ret = (uint64x2_t)(__rev0 == __rev1); | | |
| 48623 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 48624 | return __ret; | | |
| 48625 | } | | |
| 48626 | #endif | | |
| 48627 | | | |
| 48628 | #ifdef __LITTLE_ENDIAN__ | | |
| 48629 | __ai uint64x2_t vceqq_u64(uint64x2_t __p0, uint64x2_t __p1) { | | |
| 48630 | uint64x2_t __ret; | | |
| 48631 | __ret = (uint64x2_t)(__p0 == __p1); | | |
| 48632 | return __ret; | | |
| 48633 | } | | |
| 48634 | #else | | |
| 48635 | __ai uint64x2_t vceqq_u64(uint64x2_t __p0, uint64x2_t __p1) { | | |
| 48636 | uint64x2_t __ret; | | |
| 48637 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 48638 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 48639 | __ret = (uint64x2_t)(__rev0 == __rev1); | | |
| 48640 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 48641 | return __ret; | | |
| 48642 | } | | |
| 48643 | #endif | | |
| 48644 | | | |
| 48645 | #ifdef __LITTLE_ENDIAN__ | | |
| 48646 | __ai uint64x2_t vceqq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 48647 | uint64x2_t __ret; | | |
| 48648 | __ret = (uint64x2_t)(__p0 == __p1); | | |
| 48649 | return __ret; | | |
| 48650 | } | | |
| 48651 | #else | | |
| 48652 | __ai uint64x2_t vceqq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 48653 | uint64x2_t __ret; | | |
| 48654 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 48655 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 48656 | __ret = (uint64x2_t)(__rev0 == __rev1); | | |
| 48657 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 48658 | return __ret; | | |
| 48659 | } | | |
| 48660 | #endif | | |
| 48661 | | | |
| 48662 | #ifdef __LITTLE_ENDIAN__ | | |
| 48663 | __ai uint64x2_t vceqq_s64(int64x2_t __p0, int64x2_t __p1) { | | |
| 48664 | uint64x2_t __ret; | | |
| 48665 | __ret = (uint64x2_t)(__p0 == __p1); | | |
| 48666 | return __ret; | | |
| 48667 | } | | |
| 48668 | #else | | |
| 48669 | __ai uint64x2_t vceqq_s64(int64x2_t __p0, int64x2_t __p1) { | | |
| 48670 | uint64x2_t __ret; | | |
| 48671 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 48672 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 48673 | __ret = (uint64x2_t)(__rev0 == __rev1); | | |
| 48674 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 48675 | return __ret; | | |
| 48676 | } | | |
| 48677 | #endif | | |
| 48678 | | | |
| 48679 | __ai uint64x1_t vceq_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 48680 | uint64x1_t __ret; | | |
| 48681 | __ret = (uint64x1_t)(__p0 == __p1); | | |
| 48682 | return __ret; | | |
| 48683 | } | | |
| 48684 | __ai uint64x1_t vceq_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 48685 | uint64x1_t __ret; | | |
| 48686 | __ret = (uint64x1_t)(__p0 == __p1); | | |
| 48687 | return __ret; | | |
| 48688 | } | | |
| 48689 | __ai uint64x1_t vceq_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 48690 | uint64x1_t __ret; | | |
| 48691 | __ret = (uint64x1_t)(__p0 == __p1); | | |
| 48692 | return __ret; | | |
| 48693 | } | | |
| 48694 | __ai uint64_t vceqd_u64(uint64_t __p0, uint64_t __p1) { | | |
| 48695 | uint64_t __ret; | | |
| 48696 | __ret = (uint64_t) __builtin_neon_vceqd_u64(__p0, __p1); | | |
| 48697 | return __ret; | | |
| 48698 | } | | |
| 48699 | __ai uint64_t vceqd_s64(int64_t __p0, int64_t __p1) { | | |
| 48700 | uint64_t __ret; | | |
| 48701 | __ret = (uint64_t) __builtin_neon_vceqd_s64(__p0, __p1); | | |
| 48702 | return __ret; | | |
| 48703 | } | | |
| 48704 | __ai uint64_t vceqd_f64(float64_t __p0, float64_t __p1) { | | |
| 48705 | uint64_t __ret; | | |
| 48706 | __ret = (uint64_t) __builtin_neon_vceqd_f64(__p0, __p1); | | |
| 48707 | return __ret; | | |
| 48708 | } | | |
| 48709 | __ai uint32_t vceqs_f32(float32_t __p0, float32_t __p1) { | | |
| 48710 | uint32_t __ret; | | |
| 48711 | __ret = (uint32_t) __builtin_neon_vceqs_f32(__p0, __p1); | | |
| 48712 | return __ret; | | |
| 48713 | } | | |
| 48714 | #ifdef __LITTLE_ENDIAN__ | | |
| 48715 | __ai uint8x8_t vceqz_p8(poly8x8_t __p0) { | | |
| 48716 | uint8x8_t __ret; | | |
| 48717 | __ret = (uint8x8_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 16); | | |
| 48718 | return __ret; | 49136 | return __ret; |
| 48719 | } | 49137 | } |
| 48720 | #else | 49138 | #else |
| 48721 | __ai uint8x8_t vceqz_p8(poly8x8_t __p0) { | 49139 | __ai float64x2_t vminq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 48722 | uint8x8_t __ret; | 49140 | float64x2_t __ret; |
| 48723 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 49141 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48724 | __ret = (uint8x8_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 16); | 49142 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 48725 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 49143 | __ret = (float64x2_t) __builtin_neon_vminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| | 49144 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 48726 | return __ret; | 49145 | return __ret; |
| 48727 | } | 49146 | } |
| 48728 | #endif | 49147 | #endif |
| 48729 | | 49148 | |
| 48730 | __ai uint64x1_t vceqz_p64(poly64x1_t __p0) { | 49149 | __ai float64x1_t vmin_f64(float64x1_t __p0, float64x1_t __p1) { |
| 48731 | uint64x1_t __ret; | 49150 | float64x1_t __ret; |
| 48732 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); | 49151 | __ret = (float64x1_t) __builtin_neon_vmin_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| 48733 | return __ret; | 49152 | return __ret; |
| 48734 | } | 49153 | } |
| 48735 | #ifdef __LITTLE_ENDIAN__ | 49154 | #ifdef __LITTLE_ENDIAN__ |
| 48736 | __ai uint8x16_t vceqzq_p8(poly8x16_t __p0) { | 49155 | __ai float64_t vminnmvq_f64(float64x2_t __p0) { |
| 48737 | uint8x16_t __ret; | 49156 | float64_t __ret; |
| 48738 | __ret = (uint8x16_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 48); | 49157 | __ret = (float64_t) __builtin_neon_vminnmvq_f64(__p0); |
| 48739 | return __ret; | 49158 | return __ret; |
| 48740 | } | 49159 | } |
| 48741 | #else | 49160 | #else |
| 48742 | __ai uint8x16_t vceqzq_p8(poly8x16_t __p0) { | 49161 | __ai float64_t vminnmvq_f64(float64x2_t __p0) { |
| 48743 | uint8x16_t __ret; | 49162 | float64_t __ret; |
| 48744 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 49163 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48745 | __ret = (uint8x16_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 48); | 49164 | __ret = (float64_t) __builtin_neon_vminnmvq_f64(__rev0); |
| 48746 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 48747 | return __ret; | 49165 | return __ret; |
| 48748 | } | 49166 | } |
| 48749 | #endif | 49167 | #endif |
| 48750 | | 49168 | |
| 48751 | #ifdef __LITTLE_ENDIAN__ | 49169 | #ifdef __LITTLE_ENDIAN__ |
| 48752 | __ai uint64x2_t vceqzq_p64(poly64x2_t __p0) { | 49170 | __ai float32_t vminnmvq_f32(float32x4_t __p0) { |
| 48753 | uint64x2_t __ret; | 49171 | float32_t __ret; |
| 48754 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 51); | 49172 | __ret = (float32_t) __builtin_neon_vminnmvq_f32(__p0); |
| 48755 | return __ret; | 49173 | return __ret; |
| 48756 | } | 49174 | } |
| 48757 | #else | 49175 | #else |
| 48758 | __ai uint64x2_t vceqzq_p64(poly64x2_t __p0) { | 49176 | __ai float32_t vminnmvq_f32(float32x4_t __p0) { |
| 48759 | uint64x2_t __ret; | 49177 | float32_t __ret; |
| 48760 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 49178 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48761 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 51); | 49179 | __ret = (float32_t) __builtin_neon_vminnmvq_f32(__rev0); |
| 48762 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 48763 | return __ret; | 49180 | return __ret; |
| 48764 | } | 49181 | } |
| 48765 | #endif | 49182 | #endif |
| 48766 | | 49183 | |
| 48767 | #ifdef __LITTLE_ENDIAN__ | 49184 | #ifdef __LITTLE_ENDIAN__ |
| 48768 | __ai uint8x16_t vceqzq_u8(uint8x16_t __p0) { | 49185 | __ai float32_t vminnmv_f32(float32x2_t __p0) { |
| 48769 | uint8x16_t __ret; | 49186 | float32_t __ret; |
| 48770 | __ret = (uint8x16_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 48); | 49187 | __ret = (float32_t) __builtin_neon_vminnmv_f32(__p0); |
| 48771 | return __ret; | 49188 | return __ret; |
| 48772 | } | 49189 | } |
| 48773 | #else | 49190 | #else |
| 48774 | __ai uint8x16_t vceqzq_u8(uint8x16_t __p0) { | 49191 | __ai float32_t vminnmv_f32(float32x2_t __p0) { |
| 48775 | uint8x16_t __ret; | 49192 | float32_t __ret; |
| 48776 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 49193 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48777 | __ret = (uint8x16_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 48); | 49194 | __ret = (float32_t) __builtin_neon_vminnmv_f32(__rev0); |
| 48778 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 48779 | return __ret; | 49195 | return __ret; |
| 48780 | } | 49196 | } |
| 48781 | #endif | 49197 | #endif |
| 48782 | | 49198 | |
| 48783 | #ifdef __LITTLE_ENDIAN__ | 49199 | #ifdef __LITTLE_ENDIAN__ |
| 48784 | __ai uint32x4_t vceqzq_u32(uint32x4_t __p0) { | 49200 | __ai uint8_t vminvq_u8(uint8x16_t __p0) { |
| 48785 | uint32x4_t __ret; | 49201 | uint8_t __ret; |
| 48786 | __ret = (uint32x4_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 50); | 49202 | __ret = (uint8_t) __builtin_neon_vminvq_u8(__p0); |
| 48787 | return __ret; | 49203 | return __ret; |
| 48788 | } | 49204 | } |
| 48789 | #else | 49205 | #else |
| 48790 | __ai uint32x4_t vceqzq_u32(uint32x4_t __p0) { | 49206 | __ai uint8_t vminvq_u8(uint8x16_t __p0) { |
| 48791 | uint32x4_t __ret; | 49207 | uint8_t __ret; |
| 48792 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 49208 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48793 | __ret = (uint32x4_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 50); | 49209 | __ret = (uint8_t) __builtin_neon_vminvq_u8(__rev0); |
| 48794 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 48795 | return __ret; | 49210 | return __ret; |
| 48796 | } | 49211 | } |
| 48797 | #endif | 49212 | #endif |
| 48798 | | 49213 | |
| 48799 | #ifdef __LITTLE_ENDIAN__ | 49214 | #ifdef __LITTLE_ENDIAN__ |
| 48800 | __ai uint64x2_t vceqzq_u64(uint64x2_t __p0) { | 49215 | __ai uint32_t vminvq_u32(uint32x4_t __p0) { |
| 48801 | uint64x2_t __ret; | 49216 | uint32_t __ret; |
| 48802 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 51); | 49217 | __ret = (uint32_t) __builtin_neon_vminvq_u32(__p0); |
| 48803 | return __ret; | 49218 | return __ret; |
| 48804 | } | 49219 | } |
| 48805 | #else | 49220 | #else |
| 48806 | __ai uint64x2_t vceqzq_u64(uint64x2_t __p0) { | 49221 | __ai uint32_t vminvq_u32(uint32x4_t __p0) { |
| 48807 | uint64x2_t __ret; | 49222 | uint32_t __ret; |
| 48808 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 49223 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48809 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 51); | 49224 | __ret = (uint32_t) __builtin_neon_vminvq_u32(__rev0); |
| 48810 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 48811 | return __ret; | 49225 | return __ret; |
| 48812 | } | 49226 | } |
| 48813 | #endif | 49227 | #endif |
| 48814 | | 49228 | |
| 48815 | #ifdef __LITTLE_ENDIAN__ | 49229 | #ifdef __LITTLE_ENDIAN__ |
| 48816 | __ai uint16x8_t vceqzq_u16(uint16x8_t __p0) { | 49230 | __ai uint16_t vminvq_u16(uint16x8_t __p0) { |
| 48817 | uint16x8_t __ret; | 49231 | uint16_t __ret; |
| 48818 | __ret = (uint16x8_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 49); | 49232 | __ret = (uint16_t) __builtin_neon_vminvq_u16(__p0); |
| 48819 | return __ret; | 49233 | return __ret; |
| 48820 | } | 49234 | } |
| 48821 | #else | 49235 | #else |
| 48822 | __ai uint16x8_t vceqzq_u16(uint16x8_t __p0) { | 49236 | __ai uint16_t vminvq_u16(uint16x8_t __p0) { |
| 48823 | uint16x8_t __ret; | 49237 | uint16_t __ret; |
| 48824 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 49238 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48825 | __ret = (uint16x8_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 49); | 49239 | __ret = (uint16_t) __builtin_neon_vminvq_u16(__rev0); |
| 48826 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 48827 | return __ret; | 49240 | return __ret; |
| 48828 | } | 49241 | } |
| 48829 | #endif | 49242 | #endif |
| 48830 | | 49243 | |
| 48831 | #ifdef __LITTLE_ENDIAN__ | 49244 | #ifdef __LITTLE_ENDIAN__ |
| 48832 | __ai uint8x16_t vceqzq_s8(int8x16_t __p0) { | 49245 | __ai int8_t vminvq_s8(int8x16_t __p0) { |
| 48833 | uint8x16_t __ret; | 49246 | int8_t __ret; |
| 48834 | __ret = (uint8x16_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 48); | 49247 | __ret = (int8_t) __builtin_neon_vminvq_s8(__p0); |
| 48835 | return __ret; | 49248 | return __ret; |
| 48836 | } | 49249 | } |
| 48837 | #else | 49250 | #else |
| 48838 | __ai uint8x16_t vceqzq_s8(int8x16_t __p0) { | 49251 | __ai int8_t vminvq_s8(int8x16_t __p0) { |
| 48839 | uint8x16_t __ret; | 49252 | int8_t __ret; |
| 48840 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 49253 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48841 | __ret = (uint8x16_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 48); | 49254 | __ret = (int8_t) __builtin_neon_vminvq_s8(__rev0); |
| 48842 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 48843 | return __ret; | 49255 | return __ret; |
| 48844 | } | 49256 | } |
| 48845 | #endif | 49257 | #endif |
| 48846 | | 49258 | |
| 48847 | #ifdef __LITTLE_ENDIAN__ | 49259 | #ifdef __LITTLE_ENDIAN__ |
| 48848 | __ai uint64x2_t vceqzq_f64(float64x2_t __p0) { | 49260 | __ai float64_t vminvq_f64(float64x2_t __p0) { |
| 48849 | uint64x2_t __ret; | 49261 | float64_t __ret; |
| 48850 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 51); | 49262 | __ret = (float64_t) __builtin_neon_vminvq_f64(__p0); |
| 48851 | return __ret; | 49263 | return __ret; |
| 48852 | } | 49264 | } |
| 48853 | #else | 49265 | #else |
| 48854 | __ai uint64x2_t vceqzq_f64(float64x2_t __p0) { | 49266 | __ai float64_t vminvq_f64(float64x2_t __p0) { |
| 48855 | uint64x2_t __ret; | 49267 | float64_t __ret; |
| 48856 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 49268 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48857 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 51); | 49269 | __ret = (float64_t) __builtin_neon_vminvq_f64(__rev0); |
| 48858 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 48859 | return __ret; | 49270 | return __ret; |
| 48860 | } | 49271 | } |
| 48861 | #endif | 49272 | #endif |
| 48862 | | 49273 | |
| 48863 | #ifdef __LITTLE_ENDIAN__ | 49274 | #ifdef __LITTLE_ENDIAN__ |
| 48864 | __ai uint32x4_t vceqzq_f32(float32x4_t __p0) { | 49275 | __ai float32_t vminvq_f32(float32x4_t __p0) { |
| 48865 | uint32x4_t __ret; | 49276 | float32_t __ret; |
| 48866 | __ret = (uint32x4_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 50); | 49277 | __ret = (float32_t) __builtin_neon_vminvq_f32(__p0); |
| 48867 | return __ret; | 49278 | return __ret; |
| 48868 | } | 49279 | } |
| 48869 | #else | 49280 | #else |
| 48870 | __ai uint32x4_t vceqzq_f32(float32x4_t __p0) { | 49281 | __ai float32_t vminvq_f32(float32x4_t __p0) { |
| 48871 | uint32x4_t __ret; | 49282 | float32_t __ret; |
| 48872 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 49283 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48873 | __ret = (uint32x4_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 50); | 49284 | __ret = (float32_t) __builtin_neon_vminvq_f32(__rev0); |
| 48874 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 48875 | return __ret; | 49285 | return __ret; |
| 48876 | } | 49286 | } |
| 48877 | #endif | 49287 | #endif |
| 48878 | | 49288 | |
| 48879 | #ifdef __LITTLE_ENDIAN__ | 49289 | #ifdef __LITTLE_ENDIAN__ |
| 48880 | __ai uint32x4_t vceqzq_s32(int32x4_t __p0) { | 49290 | __ai int32_t vminvq_s32(int32x4_t __p0) { |
| 48881 | uint32x4_t __ret; | 49291 | int32_t __ret; |
| 48882 | __ret = (uint32x4_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 50); | 49292 | __ret = (int32_t) __builtin_neon_vminvq_s32(__p0); |
| 48883 | return __ret; | 49293 | return __ret; |
| 48884 | } | 49294 | } |
| 48885 | #else | 49295 | #else |
| 48886 | __ai uint32x4_t vceqzq_s32(int32x4_t __p0) { | 49296 | __ai int32_t vminvq_s32(int32x4_t __p0) { |
| 48887 | uint32x4_t __ret; | 49297 | int32_t __ret; |
| 48888 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 49298 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48889 | __ret = (uint32x4_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 50); | 49299 | __ret = (int32_t) __builtin_neon_vminvq_s32(__rev0); |
| 48890 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 48891 | return __ret; | | |
| 48892 | } | | |
| 48893 | #endif | | |
| 48894 | | | |
| 48895 | #ifdef __LITTLE_ENDIAN__ | | |
| 48896 | __ai uint64x2_t vceqzq_s64(int64x2_t __p0) { | | |
| 48897 | uint64x2_t __ret; | | |
| 48898 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 51); | | |
| 48899 | return __ret; | | |
| 48900 | } | | |
| 48901 | #else | | |
| 48902 | __ai uint64x2_t vceqzq_s64(int64x2_t __p0) { | | |
| 48903 | uint64x2_t __ret; | | |
| 48904 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 48905 | __ret = (uint64x2_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 51); | | |
| 48906 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 48907 | return __ret; | 49300 | return __ret; |
| 48908 | } | 49301 | } |
| 48909 | #endif | 49302 | #endif |
| 48910 | | 49303 | |
| 48911 | #ifdef __LITTLE_ENDIAN__ | 49304 | #ifdef __LITTLE_ENDIAN__ |
| 48912 | __ai uint16x8_t vceqzq_s16(int16x8_t __p0) { | 49305 | __ai int16_t vminvq_s16(int16x8_t __p0) { |
| 48913 | uint16x8_t __ret; | 49306 | int16_t __ret; |
| 48914 | __ret = (uint16x8_t) __builtin_neon_vceqzq_v((int8x16_t)__p0, 49); | 49307 | __ret = (int16_t) __builtin_neon_vminvq_s16(__p0); |
| 48915 | return __ret; | 49308 | return __ret; |
| 48916 | } | 49309 | } |
| 48917 | #else | 49310 | #else |
| 48918 | __ai uint16x8_t vceqzq_s16(int16x8_t __p0) { | 49311 | __ai int16_t vminvq_s16(int16x8_t __p0) { |
| 48919 | uint16x8_t __ret; | 49312 | int16_t __ret; |
| 48920 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 49313 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48921 | __ret = (uint16x8_t) __builtin_neon_vceqzq_v((int8x16_t)__rev0, 49); | 49314 | __ret = (int16_t) __builtin_neon_vminvq_s16(__rev0); |
| 48922 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 48923 | return __ret; | 49315 | return __ret; |
| 48924 | } | 49316 | } |
| 48925 | #endif | 49317 | #endif |
| 48926 | | 49318 | |
| 48927 | #ifdef __LITTLE_ENDIAN__ | 49319 | #ifdef __LITTLE_ENDIAN__ |
| 48928 | __ai uint8x8_t vceqz_u8(uint8x8_t __p0) { | 49320 | __ai uint8_t vminv_u8(uint8x8_t __p0) { |
| 48929 | uint8x8_t __ret; | 49321 | uint8_t __ret; |
| 48930 | __ret = (uint8x8_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 16); | 49322 | __ret = (uint8_t) __builtin_neon_vminv_u8(__p0); |
| 48931 | return __ret; | 49323 | return __ret; |
| 48932 | } | 49324 | } |
| 48933 | #else | 49325 | #else |
| 48934 | __ai uint8x8_t vceqz_u8(uint8x8_t __p0) { | 49326 | __ai uint8_t vminv_u8(uint8x8_t __p0) { |
| 48935 | uint8x8_t __ret; | 49327 | uint8_t __ret; |
| 48936 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 49328 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48937 | __ret = (uint8x8_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 16); | 49329 | __ret = (uint8_t) __builtin_neon_vminv_u8(__rev0); |
| 48938 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 48939 | return __ret; | 49330 | return __ret; |
| 48940 | } | 49331 | } |
| 48941 | #endif | 49332 | #endif |
| 48942 | | 49333 | |
| 48943 | #ifdef __LITTLE_ENDIAN__ | 49334 | #ifdef __LITTLE_ENDIAN__ |
| 48944 | __ai uint32x2_t vceqz_u32(uint32x2_t __p0) { | 49335 | __ai uint32_t vminv_u32(uint32x2_t __p0) { |
| 48945 | uint32x2_t __ret; | 49336 | uint32_t __ret; |
| 48946 | __ret = (uint32x2_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 18); | 49337 | __ret = (uint32_t) __builtin_neon_vminv_u32(__p0); |
| 48947 | return __ret; | 49338 | return __ret; |
| 48948 | } | 49339 | } |
| 48949 | #else | 49340 | #else |
| 48950 | __ai uint32x2_t vceqz_u32(uint32x2_t __p0) { | 49341 | __ai uint32_t vminv_u32(uint32x2_t __p0) { |
| 48951 | uint32x2_t __ret; | 49342 | uint32_t __ret; |
| 48952 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 49343 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48953 | __ret = (uint32x2_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 18); | 49344 | __ret = (uint32_t) __builtin_neon_vminv_u32(__rev0); |
| 48954 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 48955 | return __ret; | 49345 | return __ret; |
| 48956 | } | 49346 | } |
| 48957 | #endif | 49347 | #endif |
| 48958 | | 49348 | |
| 48959 | __ai uint64x1_t vceqz_u64(uint64x1_t __p0) { | | |
| 48960 | uint64x1_t __ret; | | |
| 48961 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); | | |
| 48962 | return __ret; | | |
| 48963 | } | | |
| 48964 | #ifdef __LITTLE_ENDIAN__ | 49349 | #ifdef __LITTLE_ENDIAN__ |
| 48965 | __ai uint16x4_t vceqz_u16(uint16x4_t __p0) { | 49350 | __ai uint16_t vminv_u16(uint16x4_t __p0) { |
| 48966 | uint16x4_t __ret; | 49351 | uint16_t __ret; |
| 48967 | __ret = (uint16x4_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 17); | 49352 | __ret = (uint16_t) __builtin_neon_vminv_u16(__p0); |
| 48968 | return __ret; | 49353 | return __ret; |
| 48969 | } | 49354 | } |
| 48970 | #else | 49355 | #else |
| 48971 | __ai uint16x4_t vceqz_u16(uint16x4_t __p0) { | 49356 | __ai uint16_t vminv_u16(uint16x4_t __p0) { |
| 48972 | uint16x4_t __ret; | 49357 | uint16_t __ret; |
| 48973 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 49358 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48974 | __ret = (uint16x4_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 17); | 49359 | __ret = (uint16_t) __builtin_neon_vminv_u16(__rev0); |
| 48975 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 48976 | return __ret; | 49360 | return __ret; |
| 48977 | } | 49361 | } |
| 48978 | #endif | 49362 | #endif |
| 48979 | | 49363 | |
| 48980 | #ifdef __LITTLE_ENDIAN__ | 49364 | #ifdef __LITTLE_ENDIAN__ |
| 48981 | __ai uint8x8_t vceqz_s8(int8x8_t __p0) { | 49365 | __ai int8_t vminv_s8(int8x8_t __p0) { |
| 48982 | uint8x8_t __ret; | 49366 | int8_t __ret; |
| 48983 | __ret = (uint8x8_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 16); | 49367 | __ret = (int8_t) __builtin_neon_vminv_s8(__p0); |
| 48984 | return __ret; | 49368 | return __ret; |
| 48985 | } | 49369 | } |
| 48986 | #else | 49370 | #else |
| 48987 | __ai uint8x8_t vceqz_s8(int8x8_t __p0) { | 49371 | __ai int8_t vminv_s8(int8x8_t __p0) { |
| 48988 | uint8x8_t __ret; | 49372 | int8_t __ret; |
| 48989 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 49373 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48990 | __ret = (uint8x8_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 16); | 49374 | __ret = (int8_t) __builtin_neon_vminv_s8(__rev0); |
| 48991 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 48992 | return __ret; | 49375 | return __ret; |
| 48993 | } | 49376 | } |
| 48994 | #endif | 49377 | #endif |
| 48995 | | 49378 | |
| 48996 | __ai uint64x1_t vceqz_f64(float64x1_t __p0) { | | |
| 48997 | uint64x1_t __ret; | | |
| 48998 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); | | |
| 48999 | return __ret; | | |
| 49000 | } | | |
| 49001 | #ifdef __LITTLE_ENDIAN__ | 49379 | #ifdef __LITTLE_ENDIAN__ |
| 49002 | __ai uint32x2_t vceqz_f32(float32x2_t __p0) { | 49380 | __ai float32_t vminv_f32(float32x2_t __p0) { |
| 49003 | uint32x2_t __ret; | 49381 | float32_t __ret; |
| 49004 | __ret = (uint32x2_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 18); | 49382 | __ret = (float32_t) __builtin_neon_vminv_f32(__p0); |
| 49005 | return __ret; | 49383 | return __ret; |
| 49006 | } | 49384 | } |
| 49007 | #else | 49385 | #else |
| 49008 | __ai uint32x2_t vceqz_f32(float32x2_t __p0) { | 49386 | __ai float32_t vminv_f32(float32x2_t __p0) { |
| 49009 | uint32x2_t __ret; | 49387 | float32_t __ret; |
| 49010 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 49388 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 49011 | __ret = (uint32x2_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 18); | 49389 | __ret = (float32_t) __builtin_neon_vminv_f32(__rev0); |
| 49012 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 49013 | return __ret; | 49390 | return __ret; |
| 49014 | } | 49391 | } |
| 49015 | #endif | 49392 | #endif |
| 49016 | | 49393 | |
| 49017 | #ifdef __LITTLE_ENDIAN__ | 49394 | #ifdef __LITTLE_ENDIAN__ |
| 49018 | __ai uint32x2_t vceqz_s32(int32x2_t __p0) { | 49395 | __ai int32_t vminv_s32(int32x2_t __p0) { |
| 49019 | uint32x2_t __ret; | 49396 | int32_t __ret; |
| 49020 | __ret = (uint32x2_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 18); | 49397 | __ret = (int32_t) __builtin_neon_vminv_s32(__p0); |
| 49021 | return __ret; | 49398 | return __ret; |
| 49022 | } | 49399 | } |
| 49023 | #else | 49400 | #else |
| 49024 | __ai uint32x2_t vceqz_s32(int32x2_t __p0) { | 49401 | __ai int32_t vminv_s32(int32x2_t __p0) { |
| 49025 | uint32x2_t __ret; | 49402 | int32_t __ret; |
| 49026 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 49403 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 49027 | __ret = (uint32x2_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 18); | 49404 | __ret = (int32_t) __builtin_neon_vminv_s32(__rev0); |
| 49028 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 49029 | return __ret; | 49405 | return __ret; |
| 49030 | } | 49406 | } |
| 49031 | #endif | 49407 | #endif |
| 49032 | | 49408 | |
| 49033 | __ai uint64x1_t vceqz_s64(int64x1_t __p0) { | | |
| 49034 | uint64x1_t __ret; | | |
| 49035 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); | | |
| 49036 | return __ret; | | |
| 49037 | } | | |
| 49038 | #ifdef __LITTLE_ENDIAN__ | 49409 | #ifdef __LITTLE_ENDIAN__ |
| 49039 | __ai uint16x4_t vceqz_s16(int16x4_t __p0) { | 49410 | __ai int16_t vminv_s16(int16x4_t __p0) { |
| 49040 | uint16x4_t __ret; | 49411 | int16_t __ret; |
| 49041 | __ret = (uint16x4_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 17); | 49412 | __ret = (int16_t) __builtin_neon_vminv_s16(__p0); |
| 49042 | return __ret; | 49413 | return __ret; |
| 49043 | } | 49414 | } |
| 49044 | #else | 49415 | #else |
| 49045 | __ai uint16x4_t vceqz_s16(int16x4_t __p0) { | 49416 | __ai int16_t vminv_s16(int16x4_t __p0) { |
| 49046 | uint16x4_t __ret; | 49417 | int16_t __ret; |
| 49047 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 49418 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 49048 | __ret = (uint16x4_t) __builtin_neon_vceqz_v((int8x8_t)__rev0, 17); | 49419 | __ret = (int16_t) __builtin_neon_vminv_s16(__rev0); |
| 49049 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 49050 | return __ret; | 49420 | return __ret; |
| 49051 | } | 49421 | } |
| 49052 | #endif | 49422 | #endif |
| 49053 | | 49423 | |
| 49054 | __ai uint64_t vceqzd_u64(uint64_t __p0) { | | |
| 49055 | uint64_t __ret; | | |
| 49056 | __ret = (uint64_t) __builtin_neon_vceqzd_u64(__p0); | | |
| 49057 | return __ret; | | |
| 49058 | } | | |
| 49059 | __ai uint64_t vceqzd_s64(int64_t __p0) { | | |
| 49060 | uint64_t __ret; | | |
| 49061 | __ret = (uint64_t) __builtin_neon_vceqzd_s64(__p0); | | |
| 49062 | return __ret; | | |
| 49063 | } | | |
| 49064 | __ai uint64_t vceqzd_f64(float64_t __p0) { | | |
| 49065 | uint64_t __ret; | | |
| 49066 | __ret = (uint64_t) __builtin_neon_vceqzd_f64(__p0); | | |
| 49067 | return __ret; | | |
| 49068 | } | | |
| 49069 | __ai uint32_t vceqzs_f32(float32_t __p0) { | | |
| 49070 | uint32_t __ret; | | |
| 49071 | __ret = (uint32_t) __builtin_neon_vceqzs_f32(__p0); | | |
| 49072 | return __ret; | | |
| 49073 | } | | |
| 49074 | #ifdef __LITTLE_ENDIAN__ | 49424 | #ifdef __LITTLE_ENDIAN__ |
| 49075 | __ai uint64x2_t vcgeq_u64(uint64x2_t __p0, uint64x2_t __p1) { | 49425 | __ai float64x2_t vmlaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 49076 | uint64x2_t __ret; | 49426 | float64x2_t __ret; |
| 49077 | __ret = (uint64x2_t)(__p0 >= __p1); | 49427 | __ret = __p0 + __p1 * __p2; |
| 49078 | return __ret; | 49428 | return __ret; |
| 49079 | } | 49429 | } |
| 49080 | #else | 49430 | #else |
| 49081 | __ai uint64x2_t vcgeq_u64(uint64x2_t __p0, uint64x2_t __p1) { | 49431 | __ai float64x2_t vmlaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 49082 | uint64x2_t __ret; | 49432 | float64x2_t __ret; |
| 49083 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 49433 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 49084 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 49434 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 49085 | __ret = (uint64x2_t)(__rev0 >= __rev1); | 49435 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 49436 | __ret = __rev0 + __rev1 * __rev2; |
| 49086 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 49437 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 49087 | return __ret; | 49438 | return __ret; |
| 49088 | } | 49439 | } |
| 49089 | #endif | 49440 | #endif |
| 49090 | | 49441 | |
| 49091 | #ifdef __LITTLE_ENDIAN__ | 49442 | __ai float64x1_t vmla_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| 49092 | __ai uint64x2_t vcgeq_f64(float64x2_t __p0, float64x2_t __p1) { | 49443 | float64x1_t __ret; |
| 49093 | uint64x2_t __ret; | 49444 | __ret = __p0 + __p1 * __p2; |
| 49094 | __ret = (uint64x2_t)(__p0 >= __p1); | | |
| 49095 | return __ret; | 49445 | return __ret; |
| 49096 | } | 49446 | } |
| | 49447 | #ifdef __LITTLE_ENDIAN__ |
| | 49448 | #define vmlaq_laneq_u32(__p0_427, __p1_427, __p2_427, __p3_427) __extension__ ({ \ |
| | 49449 | uint32x4_t __ret_427; \ |
| | 49450 | uint32x4_t __s0_427 = __p0_427; \ |
| | 49451 | uint32x4_t __s1_427 = __p1_427; \ |
| | 49452 | uint32x4_t __s2_427 = __p2_427; \ |
| | 49453 | __ret_427 = __s0_427 + __s1_427 * splatq_laneq_u32(__s2_427, __p3_427); \ |
| | 49454 | __ret_427; \ |
| | 49455 | }) |
| 49097 | #else | 49456 | #else |
| 49098 | __ai uint64x2_t vcgeq_f64(float64x2_t __p0, float64x2_t __p1) { | 49457 | #define vmlaq_laneq_u32(__p0_428, __p1_428, __p2_428, __p3_428) __extension__ ({ \ |
| 49099 | uint64x2_t __ret; | 49458 | uint32x4_t __ret_428; \ |
| 49100 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 49459 | uint32x4_t __s0_428 = __p0_428; \ |
| 49101 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 49460 | uint32x4_t __s1_428 = __p1_428; \ |
| 49102 | __ret = (uint64x2_t)(__rev0 >= __rev1); | 49461 | uint32x4_t __s2_428 = __p2_428; \ |
| 49103 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 49462 | uint32x4_t __rev0_428; __rev0_428 = __builtin_shufflevector(__s0_428, __s0_428, 3, 2, 1, 0); \ |
| 49104 | return __ret; | 49463 | uint32x4_t __rev1_428; __rev1_428 = __builtin_shufflevector(__s1_428, __s1_428, 3, 2, 1, 0); \ |
| 49105 | } | 49464 | uint32x4_t __rev2_428; __rev2_428 = __builtin_shufflevector(__s2_428, __s2_428, 3, 2, 1, 0); \ |
| | 49465 | __ret_428 = __rev0_428 + __rev1_428 * __noswap_splatq_laneq_u32(__rev2_428, __p3_428); \ |
| | 49466 | __ret_428 = __builtin_shufflevector(__ret_428, __ret_428, 3, 2, 1, 0); \ |
| | 49467 | __ret_428; \ |
| | 49468 | }) |
| 49106 | #endif | 49469 | #endif |
| 49107 | | 49470 | |
| 49108 | #ifdef __LITTLE_ENDIAN__ | 49471 | #ifdef __LITTLE_ENDIAN__ |
| 49109 | __ai uint64x2_t vcgeq_s64(int64x2_t __p0, int64x2_t __p1) { | 49472 | #define vmlaq_laneq_u16(__p0_429, __p1_429, __p2_429, __p3_429) __extension__ ({ \ |
| 49110 | uint64x2_t __ret; | 49473 | uint16x8_t __ret_429; \ |
| 49111 | __ret = (uint64x2_t)(__p0 >= __p1); | 49474 | uint16x8_t __s0_429 = __p0_429; \ |
| 49112 | return __ret; | 49475 | uint16x8_t __s1_429 = __p1_429; \ |
| 49113 | } | 49476 | uint16x8_t __s2_429 = __p2_429; \ |
| | 49477 | __ret_429 = __s0_429 + __s1_429 * splatq_laneq_u16(__s2_429, __p3_429); \ |
| | 49478 | __ret_429; \ |
| | 49479 | }) |
| 49114 | #else | 49480 | #else |
| 49115 | __ai uint64x2_t vcgeq_s64(int64x2_t __p0, int64x2_t __p1) { | 49481 | #define vmlaq_laneq_u16(__p0_430, __p1_430, __p2_430, __p3_430) __extension__ ({ \ |
| 49116 | uint64x2_t __ret; | 49482 | uint16x8_t __ret_430; \ |
| 49117 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 49483 | uint16x8_t __s0_430 = __p0_430; \ |
| 49118 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 49484 | uint16x8_t __s1_430 = __p1_430; \ |
| 49119 | __ret = (uint64x2_t)(__rev0 >= __rev1); | 49485 | uint16x8_t __s2_430 = __p2_430; \ |
| 49120 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 49486 | uint16x8_t __rev0_430; __rev0_430 = __builtin_shufflevector(__s0_430, __s0_430, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49121 | return __ret; | 49487 | uint16x8_t __rev1_430; __rev1_430 = __builtin_shufflevector(__s1_430, __s1_430, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49122 | } | 49488 | uint16x8_t __rev2_430; __rev2_430 = __builtin_shufflevector(__s2_430, __s2_430, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49489 | __ret_430 = __rev0_430 + __rev1_430 * __noswap_splatq_laneq_u16(__rev2_430, __p3_430); \ |
| | 49490 | __ret_430 = __builtin_shufflevector(__ret_430, __ret_430, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49491 | __ret_430; \ |
| | 49492 | }) |
| | 49493 | #endif |
| | 49494 | |
| | 49495 | #ifdef __LITTLE_ENDIAN__ |
| | 49496 | #define vmlaq_laneq_f32(__p0_431, __p1_431, __p2_431, __p3_431) __extension__ ({ \ |
| | 49497 | float32x4_t __ret_431; \ |
| | 49498 | float32x4_t __s0_431 = __p0_431; \ |
| | 49499 | float32x4_t __s1_431 = __p1_431; \ |
| | 49500 | float32x4_t __s2_431 = __p2_431; \ |
| | 49501 | __ret_431 = __s0_431 + __s1_431 * splatq_laneq_f32(__s2_431, __p3_431); \ |
| | 49502 | __ret_431; \ |
| | 49503 | }) |
| | 49504 | #else |
| | 49505 | #define vmlaq_laneq_f32(__p0_432, __p1_432, __p2_432, __p3_432) __extension__ ({ \ |
| | 49506 | float32x4_t __ret_432; \ |
| | 49507 | float32x4_t __s0_432 = __p0_432; \ |
| | 49508 | float32x4_t __s1_432 = __p1_432; \ |
| | 49509 | float32x4_t __s2_432 = __p2_432; \ |
| | 49510 | float32x4_t __rev0_432; __rev0_432 = __builtin_shufflevector(__s0_432, __s0_432, 3, 2, 1, 0); \ |
| | 49511 | float32x4_t __rev1_432; __rev1_432 = __builtin_shufflevector(__s1_432, __s1_432, 3, 2, 1, 0); \ |
| | 49512 | float32x4_t __rev2_432; __rev2_432 = __builtin_shufflevector(__s2_432, __s2_432, 3, 2, 1, 0); \ |
| | 49513 | __ret_432 = __rev0_432 + __rev1_432 * __noswap_splatq_laneq_f32(__rev2_432, __p3_432); \ |
| | 49514 | __ret_432 = __builtin_shufflevector(__ret_432, __ret_432, 3, 2, 1, 0); \ |
| | 49515 | __ret_432; \ |
| | 49516 | }) |
| | 49517 | #endif |
| | 49518 | |
| | 49519 | #ifdef __LITTLE_ENDIAN__ |
| | 49520 | #define vmlaq_laneq_s32(__p0_433, __p1_433, __p2_433, __p3_433) __extension__ ({ \ |
| | 49521 | int32x4_t __ret_433; \ |
| | 49522 | int32x4_t __s0_433 = __p0_433; \ |
| | 49523 | int32x4_t __s1_433 = __p1_433; \ |
| | 49524 | int32x4_t __s2_433 = __p2_433; \ |
| | 49525 | __ret_433 = __s0_433 + __s1_433 * splatq_laneq_s32(__s2_433, __p3_433); \ |
| | 49526 | __ret_433; \ |
| | 49527 | }) |
| | 49528 | #else |
| | 49529 | #define vmlaq_laneq_s32(__p0_434, __p1_434, __p2_434, __p3_434) __extension__ ({ \ |
| | 49530 | int32x4_t __ret_434; \ |
| | 49531 | int32x4_t __s0_434 = __p0_434; \ |
| | 49532 | int32x4_t __s1_434 = __p1_434; \ |
| | 49533 | int32x4_t __s2_434 = __p2_434; \ |
| | 49534 | int32x4_t __rev0_434; __rev0_434 = __builtin_shufflevector(__s0_434, __s0_434, 3, 2, 1, 0); \ |
| | 49535 | int32x4_t __rev1_434; __rev1_434 = __builtin_shufflevector(__s1_434, __s1_434, 3, 2, 1, 0); \ |
| | 49536 | int32x4_t __rev2_434; __rev2_434 = __builtin_shufflevector(__s2_434, __s2_434, 3, 2, 1, 0); \ |
| | 49537 | __ret_434 = __rev0_434 + __rev1_434 * __noswap_splatq_laneq_s32(__rev2_434, __p3_434); \ |
| | 49538 | __ret_434 = __builtin_shufflevector(__ret_434, __ret_434, 3, 2, 1, 0); \ |
| | 49539 | __ret_434; \ |
| | 49540 | }) |
| | 49541 | #endif |
| | 49542 | |
| | 49543 | #ifdef __LITTLE_ENDIAN__ |
| | 49544 | #define vmlaq_laneq_s16(__p0_435, __p1_435, __p2_435, __p3_435) __extension__ ({ \ |
| | 49545 | int16x8_t __ret_435; \ |
| | 49546 | int16x8_t __s0_435 = __p0_435; \ |
| | 49547 | int16x8_t __s1_435 = __p1_435; \ |
| | 49548 | int16x8_t __s2_435 = __p2_435; \ |
| | 49549 | __ret_435 = __s0_435 + __s1_435 * splatq_laneq_s16(__s2_435, __p3_435); \ |
| | 49550 | __ret_435; \ |
| | 49551 | }) |
| | 49552 | #else |
| | 49553 | #define vmlaq_laneq_s16(__p0_436, __p1_436, __p2_436, __p3_436) __extension__ ({ \ |
| | 49554 | int16x8_t __ret_436; \ |
| | 49555 | int16x8_t __s0_436 = __p0_436; \ |
| | 49556 | int16x8_t __s1_436 = __p1_436; \ |
| | 49557 | int16x8_t __s2_436 = __p2_436; \ |
| | 49558 | int16x8_t __rev0_436; __rev0_436 = __builtin_shufflevector(__s0_436, __s0_436, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49559 | int16x8_t __rev1_436; __rev1_436 = __builtin_shufflevector(__s1_436, __s1_436, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49560 | int16x8_t __rev2_436; __rev2_436 = __builtin_shufflevector(__s2_436, __s2_436, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49561 | __ret_436 = __rev0_436 + __rev1_436 * __noswap_splatq_laneq_s16(__rev2_436, __p3_436); \ |
| | 49562 | __ret_436 = __builtin_shufflevector(__ret_436, __ret_436, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49563 | __ret_436; \ |
| | 49564 | }) |
| | 49565 | #endif |
| | 49566 | |
| | 49567 | #ifdef __LITTLE_ENDIAN__ |
| | 49568 | #define vmla_laneq_u32(__p0_437, __p1_437, __p2_437, __p3_437) __extension__ ({ \ |
| | 49569 | uint32x2_t __ret_437; \ |
| | 49570 | uint32x2_t __s0_437 = __p0_437; \ |
| | 49571 | uint32x2_t __s1_437 = __p1_437; \ |
| | 49572 | uint32x4_t __s2_437 = __p2_437; \ |
| | 49573 | __ret_437 = __s0_437 + __s1_437 * splat_laneq_u32(__s2_437, __p3_437); \ |
| | 49574 | __ret_437; \ |
| | 49575 | }) |
| | 49576 | #else |
| | 49577 | #define vmla_laneq_u32(__p0_438, __p1_438, __p2_438, __p3_438) __extension__ ({ \ |
| | 49578 | uint32x2_t __ret_438; \ |
| | 49579 | uint32x2_t __s0_438 = __p0_438; \ |
| | 49580 | uint32x2_t __s1_438 = __p1_438; \ |
| | 49581 | uint32x4_t __s2_438 = __p2_438; \ |
| | 49582 | uint32x2_t __rev0_438; __rev0_438 = __builtin_shufflevector(__s0_438, __s0_438, 1, 0); \ |
| | 49583 | uint32x2_t __rev1_438; __rev1_438 = __builtin_shufflevector(__s1_438, __s1_438, 1, 0); \ |
| | 49584 | uint32x4_t __rev2_438; __rev2_438 = __builtin_shufflevector(__s2_438, __s2_438, 3, 2, 1, 0); \ |
| | 49585 | __ret_438 = __rev0_438 + __rev1_438 * __noswap_splat_laneq_u32(__rev2_438, __p3_438); \ |
| | 49586 | __ret_438 = __builtin_shufflevector(__ret_438, __ret_438, 1, 0); \ |
| | 49587 | __ret_438; \ |
| | 49588 | }) |
| | 49589 | #endif |
| | 49590 | |
| | 49591 | #ifdef __LITTLE_ENDIAN__ |
| | 49592 | #define vmla_laneq_u16(__p0_439, __p1_439, __p2_439, __p3_439) __extension__ ({ \ |
| | 49593 | uint16x4_t __ret_439; \ |
| | 49594 | uint16x4_t __s0_439 = __p0_439; \ |
| | 49595 | uint16x4_t __s1_439 = __p1_439; \ |
| | 49596 | uint16x8_t __s2_439 = __p2_439; \ |
| | 49597 | __ret_439 = __s0_439 + __s1_439 * splat_laneq_u16(__s2_439, __p3_439); \ |
| | 49598 | __ret_439; \ |
| | 49599 | }) |
| | 49600 | #else |
| | 49601 | #define vmla_laneq_u16(__p0_440, __p1_440, __p2_440, __p3_440) __extension__ ({ \ |
| | 49602 | uint16x4_t __ret_440; \ |
| | 49603 | uint16x4_t __s0_440 = __p0_440; \ |
| | 49604 | uint16x4_t __s1_440 = __p1_440; \ |
| | 49605 | uint16x8_t __s2_440 = __p2_440; \ |
| | 49606 | uint16x4_t __rev0_440; __rev0_440 = __builtin_shufflevector(__s0_440, __s0_440, 3, 2, 1, 0); \ |
| | 49607 | uint16x4_t __rev1_440; __rev1_440 = __builtin_shufflevector(__s1_440, __s1_440, 3, 2, 1, 0); \ |
| | 49608 | uint16x8_t __rev2_440; __rev2_440 = __builtin_shufflevector(__s2_440, __s2_440, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49609 | __ret_440 = __rev0_440 + __rev1_440 * __noswap_splat_laneq_u16(__rev2_440, __p3_440); \ |
| | 49610 | __ret_440 = __builtin_shufflevector(__ret_440, __ret_440, 3, 2, 1, 0); \ |
| | 49611 | __ret_440; \ |
| | 49612 | }) |
| | 49613 | #endif |
| | 49614 | |
| | 49615 | #ifdef __LITTLE_ENDIAN__ |
| | 49616 | #define vmla_laneq_f32(__p0_441, __p1_441, __p2_441, __p3_441) __extension__ ({ \ |
| | 49617 | float32x2_t __ret_441; \ |
| | 49618 | float32x2_t __s0_441 = __p0_441; \ |
| | 49619 | float32x2_t __s1_441 = __p1_441; \ |
| | 49620 | float32x4_t __s2_441 = __p2_441; \ |
| | 49621 | __ret_441 = __s0_441 + __s1_441 * splat_laneq_f32(__s2_441, __p3_441); \ |
| | 49622 | __ret_441; \ |
| | 49623 | }) |
| | 49624 | #else |
| | 49625 | #define vmla_laneq_f32(__p0_442, __p1_442, __p2_442, __p3_442) __extension__ ({ \ |
| | 49626 | float32x2_t __ret_442; \ |
| | 49627 | float32x2_t __s0_442 = __p0_442; \ |
| | 49628 | float32x2_t __s1_442 = __p1_442; \ |
| | 49629 | float32x4_t __s2_442 = __p2_442; \ |
| | 49630 | float32x2_t __rev0_442; __rev0_442 = __builtin_shufflevector(__s0_442, __s0_442, 1, 0); \ |
| | 49631 | float32x2_t __rev1_442; __rev1_442 = __builtin_shufflevector(__s1_442, __s1_442, 1, 0); \ |
| | 49632 | float32x4_t __rev2_442; __rev2_442 = __builtin_shufflevector(__s2_442, __s2_442, 3, 2, 1, 0); \ |
| | 49633 | __ret_442 = __rev0_442 + __rev1_442 * __noswap_splat_laneq_f32(__rev2_442, __p3_442); \ |
| | 49634 | __ret_442 = __builtin_shufflevector(__ret_442, __ret_442, 1, 0); \ |
| | 49635 | __ret_442; \ |
| | 49636 | }) |
| | 49637 | #endif |
| | 49638 | |
| | 49639 | #ifdef __LITTLE_ENDIAN__ |
| | 49640 | #define vmla_laneq_s32(__p0_443, __p1_443, __p2_443, __p3_443) __extension__ ({ \ |
| | 49641 | int32x2_t __ret_443; \ |
| | 49642 | int32x2_t __s0_443 = __p0_443; \ |
| | 49643 | int32x2_t __s1_443 = __p1_443; \ |
| | 49644 | int32x4_t __s2_443 = __p2_443; \ |
| | 49645 | __ret_443 = __s0_443 + __s1_443 * splat_laneq_s32(__s2_443, __p3_443); \ |
| | 49646 | __ret_443; \ |
| | 49647 | }) |
| | 49648 | #else |
| | 49649 | #define vmla_laneq_s32(__p0_444, __p1_444, __p2_444, __p3_444) __extension__ ({ \ |
| | 49650 | int32x2_t __ret_444; \ |
| | 49651 | int32x2_t __s0_444 = __p0_444; \ |
| | 49652 | int32x2_t __s1_444 = __p1_444; \ |
| | 49653 | int32x4_t __s2_444 = __p2_444; \ |
| | 49654 | int32x2_t __rev0_444; __rev0_444 = __builtin_shufflevector(__s0_444, __s0_444, 1, 0); \ |
| | 49655 | int32x2_t __rev1_444; __rev1_444 = __builtin_shufflevector(__s1_444, __s1_444, 1, 0); \ |
| | 49656 | int32x4_t __rev2_444; __rev2_444 = __builtin_shufflevector(__s2_444, __s2_444, 3, 2, 1, 0); \ |
| | 49657 | __ret_444 = __rev0_444 + __rev1_444 * __noswap_splat_laneq_s32(__rev2_444, __p3_444); \ |
| | 49658 | __ret_444 = __builtin_shufflevector(__ret_444, __ret_444, 1, 0); \ |
| | 49659 | __ret_444; \ |
| | 49660 | }) |
| | 49661 | #endif |
| | 49662 | |
| | 49663 | #ifdef __LITTLE_ENDIAN__ |
| | 49664 | #define vmla_laneq_s16(__p0_445, __p1_445, __p2_445, __p3_445) __extension__ ({ \ |
| | 49665 | int16x4_t __ret_445; \ |
| | 49666 | int16x4_t __s0_445 = __p0_445; \ |
| | 49667 | int16x4_t __s1_445 = __p1_445; \ |
| | 49668 | int16x8_t __s2_445 = __p2_445; \ |
| | 49669 | __ret_445 = __s0_445 + __s1_445 * splat_laneq_s16(__s2_445, __p3_445); \ |
| | 49670 | __ret_445; \ |
| | 49671 | }) |
| | 49672 | #else |
| | 49673 | #define vmla_laneq_s16(__p0_446, __p1_446, __p2_446, __p3_446) __extension__ ({ \ |
| | 49674 | int16x4_t __ret_446; \ |
| | 49675 | int16x4_t __s0_446 = __p0_446; \ |
| | 49676 | int16x4_t __s1_446 = __p1_446; \ |
| | 49677 | int16x8_t __s2_446 = __p2_446; \ |
| | 49678 | int16x4_t __rev0_446; __rev0_446 = __builtin_shufflevector(__s0_446, __s0_446, 3, 2, 1, 0); \ |
| | 49679 | int16x4_t __rev1_446; __rev1_446 = __builtin_shufflevector(__s1_446, __s1_446, 3, 2, 1, 0); \ |
| | 49680 | int16x8_t __rev2_446; __rev2_446 = __builtin_shufflevector(__s2_446, __s2_446, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49681 | __ret_446 = __rev0_446 + __rev1_446 * __noswap_splat_laneq_s16(__rev2_446, __p3_446); \ |
| | 49682 | __ret_446 = __builtin_shufflevector(__ret_446, __ret_446, 3, 2, 1, 0); \ |
| | 49683 | __ret_446; \ |
| | 49684 | }) |
| | 49685 | #endif |
| | 49686 | |
| | 49687 | #ifdef __LITTLE_ENDIAN__ |
| | 49688 | #define vmlal_high_lane_u32(__p0_447, __p1_447, __p2_447, __p3_447) __extension__ ({ \ |
| | 49689 | uint64x2_t __ret_447; \ |
| | 49690 | uint64x2_t __s0_447 = __p0_447; \ |
| | 49691 | uint32x4_t __s1_447 = __p1_447; \ |
| | 49692 | uint32x2_t __s2_447 = __p2_447; \ |
| | 49693 | __ret_447 = __s0_447 + vmull_u32(vget_high_u32(__s1_447), splat_lane_u32(__s2_447, __p3_447)); \ |
| | 49694 | __ret_447; \ |
| | 49695 | }) |
| | 49696 | #else |
| | 49697 | #define vmlal_high_lane_u32(__p0_448, __p1_448, __p2_448, __p3_448) __extension__ ({ \ |
| | 49698 | uint64x2_t __ret_448; \ |
| | 49699 | uint64x2_t __s0_448 = __p0_448; \ |
| | 49700 | uint32x4_t __s1_448 = __p1_448; \ |
| | 49701 | uint32x2_t __s2_448 = __p2_448; \ |
| | 49702 | uint64x2_t __rev0_448; __rev0_448 = __builtin_shufflevector(__s0_448, __s0_448, 1, 0); \ |
| | 49703 | uint32x4_t __rev1_448; __rev1_448 = __builtin_shufflevector(__s1_448, __s1_448, 3, 2, 1, 0); \ |
| | 49704 | uint32x2_t __rev2_448; __rev2_448 = __builtin_shufflevector(__s2_448, __s2_448, 1, 0); \ |
| | 49705 | __ret_448 = __rev0_448 + __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_448), __noswap_splat_lane_u32(__rev2_448, __p3_448)); \ |
| | 49706 | __ret_448 = __builtin_shufflevector(__ret_448, __ret_448, 1, 0); \ |
| | 49707 | __ret_448; \ |
| | 49708 | }) |
| | 49709 | #endif |
| | 49710 | |
| | 49711 | #ifdef __LITTLE_ENDIAN__ |
| | 49712 | #define vmlal_high_lane_u16(__p0_449, __p1_449, __p2_449, __p3_449) __extension__ ({ \ |
| | 49713 | uint32x4_t __ret_449; \ |
| | 49714 | uint32x4_t __s0_449 = __p0_449; \ |
| | 49715 | uint16x8_t __s1_449 = __p1_449; \ |
| | 49716 | uint16x4_t __s2_449 = __p2_449; \ |
| | 49717 | __ret_449 = __s0_449 + vmull_u16(vget_high_u16(__s1_449), splat_lane_u16(__s2_449, __p3_449)); \ |
| | 49718 | __ret_449; \ |
| | 49719 | }) |
| | 49720 | #else |
| | 49721 | #define vmlal_high_lane_u16(__p0_450, __p1_450, __p2_450, __p3_450) __extension__ ({ \ |
| | 49722 | uint32x4_t __ret_450; \ |
| | 49723 | uint32x4_t __s0_450 = __p0_450; \ |
| | 49724 | uint16x8_t __s1_450 = __p1_450; \ |
| | 49725 | uint16x4_t __s2_450 = __p2_450; \ |
| | 49726 | uint32x4_t __rev0_450; __rev0_450 = __builtin_shufflevector(__s0_450, __s0_450, 3, 2, 1, 0); \ |
| | 49727 | uint16x8_t __rev1_450; __rev1_450 = __builtin_shufflevector(__s1_450, __s1_450, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49728 | uint16x4_t __rev2_450; __rev2_450 = __builtin_shufflevector(__s2_450, __s2_450, 3, 2, 1, 0); \ |
| | 49729 | __ret_450 = __rev0_450 + __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_450), __noswap_splat_lane_u16(__rev2_450, __p3_450)); \ |
| | 49730 | __ret_450 = __builtin_shufflevector(__ret_450, __ret_450, 3, 2, 1, 0); \ |
| | 49731 | __ret_450; \ |
| | 49732 | }) |
| | 49733 | #endif |
| | 49734 | |
| | 49735 | #ifdef __LITTLE_ENDIAN__ |
| | 49736 | #define vmlal_high_lane_s32(__p0_451, __p1_451, __p2_451, __p3_451) __extension__ ({ \ |
| | 49737 | int64x2_t __ret_451; \ |
| | 49738 | int64x2_t __s0_451 = __p0_451; \ |
| | 49739 | int32x4_t __s1_451 = __p1_451; \ |
| | 49740 | int32x2_t __s2_451 = __p2_451; \ |
| | 49741 | __ret_451 = __s0_451 + vmull_s32(vget_high_s32(__s1_451), splat_lane_s32(__s2_451, __p3_451)); \ |
| | 49742 | __ret_451; \ |
| | 49743 | }) |
| | 49744 | #else |
| | 49745 | #define vmlal_high_lane_s32(__p0_452, __p1_452, __p2_452, __p3_452) __extension__ ({ \ |
| | 49746 | int64x2_t __ret_452; \ |
| | 49747 | int64x2_t __s0_452 = __p0_452; \ |
| | 49748 | int32x4_t __s1_452 = __p1_452; \ |
| | 49749 | int32x2_t __s2_452 = __p2_452; \ |
| | 49750 | int64x2_t __rev0_452; __rev0_452 = __builtin_shufflevector(__s0_452, __s0_452, 1, 0); \ |
| | 49751 | int32x4_t __rev1_452; __rev1_452 = __builtin_shufflevector(__s1_452, __s1_452, 3, 2, 1, 0); \ |
| | 49752 | int32x2_t __rev2_452; __rev2_452 = __builtin_shufflevector(__s2_452, __s2_452, 1, 0); \ |
| | 49753 | __ret_452 = __rev0_452 + __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_452), __noswap_splat_lane_s32(__rev2_452, __p3_452)); \ |
| | 49754 | __ret_452 = __builtin_shufflevector(__ret_452, __ret_452, 1, 0); \ |
| | 49755 | __ret_452; \ |
| | 49756 | }) |
| | 49757 | #endif |
| | 49758 | |
| | 49759 | #ifdef __LITTLE_ENDIAN__ |
| | 49760 | #define vmlal_high_lane_s16(__p0_453, __p1_453, __p2_453, __p3_453) __extension__ ({ \ |
| | 49761 | int32x4_t __ret_453; \ |
| | 49762 | int32x4_t __s0_453 = __p0_453; \ |
| | 49763 | int16x8_t __s1_453 = __p1_453; \ |
| | 49764 | int16x4_t __s2_453 = __p2_453; \ |
| | 49765 | __ret_453 = __s0_453 + vmull_s16(vget_high_s16(__s1_453), splat_lane_s16(__s2_453, __p3_453)); \ |
| | 49766 | __ret_453; \ |
| | 49767 | }) |
| | 49768 | #else |
| | 49769 | #define vmlal_high_lane_s16(__p0_454, __p1_454, __p2_454, __p3_454) __extension__ ({ \ |
| | 49770 | int32x4_t __ret_454; \ |
| | 49771 | int32x4_t __s0_454 = __p0_454; \ |
| | 49772 | int16x8_t __s1_454 = __p1_454; \ |
| | 49773 | int16x4_t __s2_454 = __p2_454; \ |
| | 49774 | int32x4_t __rev0_454; __rev0_454 = __builtin_shufflevector(__s0_454, __s0_454, 3, 2, 1, 0); \ |
| | 49775 | int16x8_t __rev1_454; __rev1_454 = __builtin_shufflevector(__s1_454, __s1_454, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49776 | int16x4_t __rev2_454; __rev2_454 = __builtin_shufflevector(__s2_454, __s2_454, 3, 2, 1, 0); \ |
| | 49777 | __ret_454 = __rev0_454 + __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_454), __noswap_splat_lane_s16(__rev2_454, __p3_454)); \ |
| | 49778 | __ret_454 = __builtin_shufflevector(__ret_454, __ret_454, 3, 2, 1, 0); \ |
| | 49779 | __ret_454; \ |
| | 49780 | }) |
| | 49781 | #endif |
| | 49782 | |
| | 49783 | #ifdef __LITTLE_ENDIAN__ |
| | 49784 | #define vmlal_high_laneq_u32(__p0_455, __p1_455, __p2_455, __p3_455) __extension__ ({ \ |
| | 49785 | uint64x2_t __ret_455; \ |
| | 49786 | uint64x2_t __s0_455 = __p0_455; \ |
| | 49787 | uint32x4_t __s1_455 = __p1_455; \ |
| | 49788 | uint32x4_t __s2_455 = __p2_455; \ |
| | 49789 | __ret_455 = __s0_455 + vmull_u32(vget_high_u32(__s1_455), splat_laneq_u32(__s2_455, __p3_455)); \ |
| | 49790 | __ret_455; \ |
| | 49791 | }) |
| | 49792 | #else |
| | 49793 | #define vmlal_high_laneq_u32(__p0_456, __p1_456, __p2_456, __p3_456) __extension__ ({ \ |
| | 49794 | uint64x2_t __ret_456; \ |
| | 49795 | uint64x2_t __s0_456 = __p0_456; \ |
| | 49796 | uint32x4_t __s1_456 = __p1_456; \ |
| | 49797 | uint32x4_t __s2_456 = __p2_456; \ |
| | 49798 | uint64x2_t __rev0_456; __rev0_456 = __builtin_shufflevector(__s0_456, __s0_456, 1, 0); \ |
| | 49799 | uint32x4_t __rev1_456; __rev1_456 = __builtin_shufflevector(__s1_456, __s1_456, 3, 2, 1, 0); \ |
| | 49800 | uint32x4_t __rev2_456; __rev2_456 = __builtin_shufflevector(__s2_456, __s2_456, 3, 2, 1, 0); \ |
| | 49801 | __ret_456 = __rev0_456 + __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_456), __noswap_splat_laneq_u32(__rev2_456, __p3_456)); \ |
| | 49802 | __ret_456 = __builtin_shufflevector(__ret_456, __ret_456, 1, 0); \ |
| | 49803 | __ret_456; \ |
| | 49804 | }) |
| | 49805 | #endif |
| | 49806 | |
| | 49807 | #ifdef __LITTLE_ENDIAN__ |
| | 49808 | #define vmlal_high_laneq_u16(__p0_457, __p1_457, __p2_457, __p3_457) __extension__ ({ \ |
| | 49809 | uint32x4_t __ret_457; \ |
| | 49810 | uint32x4_t __s0_457 = __p0_457; \ |
| | 49811 | uint16x8_t __s1_457 = __p1_457; \ |
| | 49812 | uint16x8_t __s2_457 = __p2_457; \ |
| | 49813 | __ret_457 = __s0_457 + vmull_u16(vget_high_u16(__s1_457), splat_laneq_u16(__s2_457, __p3_457)); \ |
| | 49814 | __ret_457; \ |
| | 49815 | }) |
| | 49816 | #else |
| | 49817 | #define vmlal_high_laneq_u16(__p0_458, __p1_458, __p2_458, __p3_458) __extension__ ({ \ |
| | 49818 | uint32x4_t __ret_458; \ |
| | 49819 | uint32x4_t __s0_458 = __p0_458; \ |
| | 49820 | uint16x8_t __s1_458 = __p1_458; \ |
| | 49821 | uint16x8_t __s2_458 = __p2_458; \ |
| | 49822 | uint32x4_t __rev0_458; __rev0_458 = __builtin_shufflevector(__s0_458, __s0_458, 3, 2, 1, 0); \ |
| | 49823 | uint16x8_t __rev1_458; __rev1_458 = __builtin_shufflevector(__s1_458, __s1_458, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49824 | uint16x8_t __rev2_458; __rev2_458 = __builtin_shufflevector(__s2_458, __s2_458, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49825 | __ret_458 = __rev0_458 + __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_458), __noswap_splat_laneq_u16(__rev2_458, __p3_458)); \ |
| | 49826 | __ret_458 = __builtin_shufflevector(__ret_458, __ret_458, 3, 2, 1, 0); \ |
| | 49827 | __ret_458; \ |
| | 49828 | }) |
| | 49829 | #endif |
| | 49830 | |
| | 49831 | #ifdef __LITTLE_ENDIAN__ |
| | 49832 | #define vmlal_high_laneq_s32(__p0_459, __p1_459, __p2_459, __p3_459) __extension__ ({ \ |
| | 49833 | int64x2_t __ret_459; \ |
| | 49834 | int64x2_t __s0_459 = __p0_459; \ |
| | 49835 | int32x4_t __s1_459 = __p1_459; \ |
| | 49836 | int32x4_t __s2_459 = __p2_459; \ |
| | 49837 | __ret_459 = __s0_459 + vmull_s32(vget_high_s32(__s1_459), splat_laneq_s32(__s2_459, __p3_459)); \ |
| | 49838 | __ret_459; \ |
| | 49839 | }) |
| | 49840 | #else |
| | 49841 | #define vmlal_high_laneq_s32(__p0_460, __p1_460, __p2_460, __p3_460) __extension__ ({ \ |
| | 49842 | int64x2_t __ret_460; \ |
| | 49843 | int64x2_t __s0_460 = __p0_460; \ |
| | 49844 | int32x4_t __s1_460 = __p1_460; \ |
| | 49845 | int32x4_t __s2_460 = __p2_460; \ |
| | 49846 | int64x2_t __rev0_460; __rev0_460 = __builtin_shufflevector(__s0_460, __s0_460, 1, 0); \ |
| | 49847 | int32x4_t __rev1_460; __rev1_460 = __builtin_shufflevector(__s1_460, __s1_460, 3, 2, 1, 0); \ |
| | 49848 | int32x4_t __rev2_460; __rev2_460 = __builtin_shufflevector(__s2_460, __s2_460, 3, 2, 1, 0); \ |
| | 49849 | __ret_460 = __rev0_460 + __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_460), __noswap_splat_laneq_s32(__rev2_460, __p3_460)); \ |
| | 49850 | __ret_460 = __builtin_shufflevector(__ret_460, __ret_460, 1, 0); \ |
| | 49851 | __ret_460; \ |
| | 49852 | }) |
| | 49853 | #endif |
| | 49854 | |
| | 49855 | #ifdef __LITTLE_ENDIAN__ |
| | 49856 | #define vmlal_high_laneq_s16(__p0_461, __p1_461, __p2_461, __p3_461) __extension__ ({ \ |
| | 49857 | int32x4_t __ret_461; \ |
| | 49858 | int32x4_t __s0_461 = __p0_461; \ |
| | 49859 | int16x8_t __s1_461 = __p1_461; \ |
| | 49860 | int16x8_t __s2_461 = __p2_461; \ |
| | 49861 | __ret_461 = __s0_461 + vmull_s16(vget_high_s16(__s1_461), splat_laneq_s16(__s2_461, __p3_461)); \ |
| | 49862 | __ret_461; \ |
| | 49863 | }) |
| | 49864 | #else |
| | 49865 | #define vmlal_high_laneq_s16(__p0_462, __p1_462, __p2_462, __p3_462) __extension__ ({ \ |
| | 49866 | int32x4_t __ret_462; \ |
| | 49867 | int32x4_t __s0_462 = __p0_462; \ |
| | 49868 | int16x8_t __s1_462 = __p1_462; \ |
| | 49869 | int16x8_t __s2_462 = __p2_462; \ |
| | 49870 | int32x4_t __rev0_462; __rev0_462 = __builtin_shufflevector(__s0_462, __s0_462, 3, 2, 1, 0); \ |
| | 49871 | int16x8_t __rev1_462; __rev1_462 = __builtin_shufflevector(__s1_462, __s1_462, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49872 | int16x8_t __rev2_462; __rev2_462 = __builtin_shufflevector(__s2_462, __s2_462, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49873 | __ret_462 = __rev0_462 + __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_462), __noswap_splat_laneq_s16(__rev2_462, __p3_462)); \ |
| | 49874 | __ret_462 = __builtin_shufflevector(__ret_462, __ret_462, 3, 2, 1, 0); \ |
| | 49875 | __ret_462; \ |
| | 49876 | }) |
| | 49877 | #endif |
| | 49878 | |
| | 49879 | #ifdef __LITTLE_ENDIAN__ |
| | 49880 | #define vmlal_laneq_u32(__p0_463, __p1_463, __p2_463, __p3_463) __extension__ ({ \ |
| | 49881 | uint64x2_t __ret_463; \ |
| | 49882 | uint64x2_t __s0_463 = __p0_463; \ |
| | 49883 | uint32x2_t __s1_463 = __p1_463; \ |
| | 49884 | uint32x4_t __s2_463 = __p2_463; \ |
| | 49885 | __ret_463 = __s0_463 + vmull_u32(__s1_463, splat_laneq_u32(__s2_463, __p3_463)); \ |
| | 49886 | __ret_463; \ |
| | 49887 | }) |
| | 49888 | #else |
| | 49889 | #define vmlal_laneq_u32(__p0_464, __p1_464, __p2_464, __p3_464) __extension__ ({ \ |
| | 49890 | uint64x2_t __ret_464; \ |
| | 49891 | uint64x2_t __s0_464 = __p0_464; \ |
| | 49892 | uint32x2_t __s1_464 = __p1_464; \ |
| | 49893 | uint32x4_t __s2_464 = __p2_464; \ |
| | 49894 | uint64x2_t __rev0_464; __rev0_464 = __builtin_shufflevector(__s0_464, __s0_464, 1, 0); \ |
| | 49895 | uint32x2_t __rev1_464; __rev1_464 = __builtin_shufflevector(__s1_464, __s1_464, 1, 0); \ |
| | 49896 | uint32x4_t __rev2_464; __rev2_464 = __builtin_shufflevector(__s2_464, __s2_464, 3, 2, 1, 0); \ |
| | 49897 | __ret_464 = __rev0_464 + __noswap_vmull_u32(__rev1_464, __noswap_splat_laneq_u32(__rev2_464, __p3_464)); \ |
| | 49898 | __ret_464 = __builtin_shufflevector(__ret_464, __ret_464, 1, 0); \ |
| | 49899 | __ret_464; \ |
| | 49900 | }) |
| | 49901 | #endif |
| | 49902 | |
| | 49903 | #ifdef __LITTLE_ENDIAN__ |
| | 49904 | #define vmlal_laneq_u16(__p0_465, __p1_465, __p2_465, __p3_465) __extension__ ({ \ |
| | 49905 | uint32x4_t __ret_465; \ |
| | 49906 | uint32x4_t __s0_465 = __p0_465; \ |
| | 49907 | uint16x4_t __s1_465 = __p1_465; \ |
| | 49908 | uint16x8_t __s2_465 = __p2_465; \ |
| | 49909 | __ret_465 = __s0_465 + vmull_u16(__s1_465, splat_laneq_u16(__s2_465, __p3_465)); \ |
| | 49910 | __ret_465; \ |
| | 49911 | }) |
| | 49912 | #else |
| | 49913 | #define vmlal_laneq_u16(__p0_466, __p1_466, __p2_466, __p3_466) __extension__ ({ \ |
| | 49914 | uint32x4_t __ret_466; \ |
| | 49915 | uint32x4_t __s0_466 = __p0_466; \ |
| | 49916 | uint16x4_t __s1_466 = __p1_466; \ |
| | 49917 | uint16x8_t __s2_466 = __p2_466; \ |
| | 49918 | uint32x4_t __rev0_466; __rev0_466 = __builtin_shufflevector(__s0_466, __s0_466, 3, 2, 1, 0); \ |
| | 49919 | uint16x4_t __rev1_466; __rev1_466 = __builtin_shufflevector(__s1_466, __s1_466, 3, 2, 1, 0); \ |
| | 49920 | uint16x8_t __rev2_466; __rev2_466 = __builtin_shufflevector(__s2_466, __s2_466, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49921 | __ret_466 = __rev0_466 + __noswap_vmull_u16(__rev1_466, __noswap_splat_laneq_u16(__rev2_466, __p3_466)); \ |
| | 49922 | __ret_466 = __builtin_shufflevector(__ret_466, __ret_466, 3, 2, 1, 0); \ |
| | 49923 | __ret_466; \ |
| | 49924 | }) |
| 49123 | #endif | 49925 | #endif |
| 49124 | | 49926 | |
| 49125 | __ai uint64x1_t vcge_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 49126 | uint64x1_t __ret; | | |
| 49127 | __ret = (uint64x1_t)(__p0 >= __p1); | | |
| 49128 | return __ret; | | |
| 49129 | } | | |
| 49130 | __ai uint64x1_t vcge_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 49131 | uint64x1_t __ret; | | |
| 49132 | __ret = (uint64x1_t)(__p0 >= __p1); | | |
| 49133 | return __ret; | | |
| 49134 | } | | |
| 49135 | __ai uint64x1_t vcge_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 49136 | uint64x1_t __ret; | | |
| 49137 | __ret = (uint64x1_t)(__p0 >= __p1); | | |
| 49138 | return __ret; | | |
| 49139 | } | | |
| 49140 | __ai uint64_t vcged_s64(int64_t __p0, int64_t __p1) { | | |
| 49141 | uint64_t __ret; | | |
| 49142 | __ret = (uint64_t) __builtin_neon_vcged_s64(__p0, __p1); | | |
| 49143 | return __ret; | | |
| 49144 | } | | |
| 49145 | __ai uint64_t vcged_u64(uint64_t __p0, uint64_t __p1) { | | |
| 49146 | uint64_t __ret; | | |
| 49147 | __ret = (uint64_t) __builtin_neon_vcged_u64(__p0, __p1); | | |
| 49148 | return __ret; | | |
| 49149 | } | | |
| 49150 | __ai uint64_t vcged_f64(float64_t __p0, float64_t __p1) { | | |
| 49151 | uint64_t __ret; | | |
| 49152 | __ret = (uint64_t) __builtin_neon_vcged_f64(__p0, __p1); | | |
| 49153 | return __ret; | | |
| 49154 | } | | |
| 49155 | __ai uint32_t vcges_f32(float32_t __p0, float32_t __p1) { | | |
| 49156 | uint32_t __ret; | | |
| 49157 | __ret = (uint32_t) __builtin_neon_vcges_f32(__p0, __p1); | | |
| 49158 | return __ret; | | |
| 49159 | } | | |
| 49160 | #ifdef __LITTLE_ENDIAN__ | 49927 | #ifdef __LITTLE_ENDIAN__ |
| 49161 | __ai uint8x16_t vcgezq_s8(int8x16_t __p0) { | 49928 | #define vmlal_laneq_s32(__p0_467, __p1_467, __p2_467, __p3_467) __extension__ ({ \ |
| 49162 | uint8x16_t __ret; | 49929 | int64x2_t __ret_467; \ |
| 49163 | __ret = (uint8x16_t) __builtin_neon_vcgezq_v((int8x16_t)__p0, 48); | 49930 | int64x2_t __s0_467 = __p0_467; \ |
| 49164 | return __ret; | 49931 | int32x2_t __s1_467 = __p1_467; \ |
| 49165 | } | 49932 | int32x4_t __s2_467 = __p2_467; \ |
| | 49933 | __ret_467 = __s0_467 + vmull_s32(__s1_467, splat_laneq_s32(__s2_467, __p3_467)); \ |
| | 49934 | __ret_467; \ |
| | 49935 | }) |
| 49166 | #else | 49936 | #else |
| 49167 | __ai uint8x16_t vcgezq_s8(int8x16_t __p0) { | 49937 | #define vmlal_laneq_s32(__p0_468, __p1_468, __p2_468, __p3_468) __extension__ ({ \ |
| 49168 | uint8x16_t __ret; | 49938 | int64x2_t __ret_468; \ |
| 49169 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 49939 | int64x2_t __s0_468 = __p0_468; \ |
| 49170 | __ret = (uint8x16_t) __builtin_neon_vcgezq_v((int8x16_t)__rev0, 48); | 49940 | int32x2_t __s1_468 = __p1_468; \ |
| 49171 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 49941 | int32x4_t __s2_468 = __p2_468; \ |
| 49172 | return __ret; | 49942 | int64x2_t __rev0_468; __rev0_468 = __builtin_shufflevector(__s0_468, __s0_468, 1, 0); \ |
| 49173 | } | 49943 | int32x2_t __rev1_468; __rev1_468 = __builtin_shufflevector(__s1_468, __s1_468, 1, 0); \ |
| | 49944 | int32x4_t __rev2_468; __rev2_468 = __builtin_shufflevector(__s2_468, __s2_468, 3, 2, 1, 0); \ |
| | 49945 | __ret_468 = __rev0_468 + __noswap_vmull_s32(__rev1_468, __noswap_splat_laneq_s32(__rev2_468, __p3_468)); \ |
| | 49946 | __ret_468 = __builtin_shufflevector(__ret_468, __ret_468, 1, 0); \ |
| | 49947 | __ret_468; \ |
| | 49948 | }) |
| 49174 | #endif | 49949 | #endif |
| 49175 | | 49950 | |
| 49176 | #ifdef __LITTLE_ENDIAN__ | 49951 | #ifdef __LITTLE_ENDIAN__ |
| 49177 | __ai uint64x2_t vcgezq_f64(float64x2_t __p0) { | 49952 | #define vmlal_laneq_s16(__p0_469, __p1_469, __p2_469, __p3_469) __extension__ ({ \ |
| 49178 | uint64x2_t __ret; | 49953 | int32x4_t __ret_469; \ |
| 49179 | __ret = (uint64x2_t) __builtin_neon_vcgezq_v((int8x16_t)__p0, 51); | 49954 | int32x4_t __s0_469 = __p0_469; \ |
| 49180 | return __ret; | 49955 | int16x4_t __s1_469 = __p1_469; \ |
| 49181 | } | 49956 | int16x8_t __s2_469 = __p2_469; \ |
| | 49957 | __ret_469 = __s0_469 + vmull_s16(__s1_469, splat_laneq_s16(__s2_469, __p3_469)); \ |
| | 49958 | __ret_469; \ |
| | 49959 | }) |
| 49182 | #else | 49960 | #else |
| 49183 | __ai uint64x2_t vcgezq_f64(float64x2_t __p0) { | 49961 | #define vmlal_laneq_s16(__p0_470, __p1_470, __p2_470, __p3_470) __extension__ ({ \ |
| 49184 | uint64x2_t __ret; | 49962 | int32x4_t __ret_470; \ |
| 49185 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 49963 | int32x4_t __s0_470 = __p0_470; \ |
| 49186 | __ret = (uint64x2_t) __builtin_neon_vcgezq_v((int8x16_t)__rev0, 51); | 49964 | int16x4_t __s1_470 = __p1_470; \ |
| 49187 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 49965 | int16x8_t __s2_470 = __p2_470; \ |
| 49188 | return __ret; | 49966 | int32x4_t __rev0_470; __rev0_470 = __builtin_shufflevector(__s0_470, __s0_470, 3, 2, 1, 0); \ |
| 49189 | } | 49967 | int16x4_t __rev1_470; __rev1_470 = __builtin_shufflevector(__s1_470, __s1_470, 3, 2, 1, 0); \ |
| | 49968 | int16x8_t __rev2_470; __rev2_470 = __builtin_shufflevector(__s2_470, __s2_470, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 49969 | __ret_470 = __rev0_470 + __noswap_vmull_s16(__rev1_470, __noswap_splat_laneq_s16(__rev2_470, __p3_470)); \ |
| | 49970 | __ret_470 = __builtin_shufflevector(__ret_470, __ret_470, 3, 2, 1, 0); \ |
| | 49971 | __ret_470; \ |
| | 49972 | }) |
| 49190 | #endif | 49973 | #endif |
| 49191 | | 49974 | |
| 49192 | #ifdef __LITTLE_ENDIAN__ | 49975 | #ifdef __LITTLE_ENDIAN__ |
| 49193 | __ai uint32x4_t vcgezq_f32(float32x4_t __p0) { | 49976 | __ai float64x2_t vmlsq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 49194 | uint32x4_t __ret; | 49977 | float64x2_t __ret; |
| 49195 | __ret = (uint32x4_t) __builtin_neon_vcgezq_v((int8x16_t)__p0, 50); | 49978 | __ret = __p0 - __p1 * __p2; |
| 49196 | return __ret; | 49979 | return __ret; |
| 49197 | } | 49980 | } |
| 49198 | #else | 49981 | #else |
| 49199 | __ai uint32x4_t vcgezq_f32(float32x4_t __p0) { | 49982 | __ai float64x2_t vmlsq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 49200 | uint32x4_t __ret; | 49983 | float64x2_t __ret; |
| 49201 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 49984 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 49202 | __ret = (uint32x4_t) __builtin_neon_vcgezq_v((int8x16_t)__rev0, 50); | 49985 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 49203 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 49986 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 49987 | __ret = __rev0 - __rev1 * __rev2; |
| | 49988 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 49204 | return __ret; | 49989 | return __ret; |
| 49205 | } | 49990 | } |
| 49206 | #endif | 49991 | #endif |
| 49207 | | 49992 | |
| 49208 | #ifdef __LITTLE_ENDIAN__ | 49993 | __ai float64x1_t vmls_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| 49209 | __ai uint32x4_t vcgezq_s32(int32x4_t __p0) { | 49994 | float64x1_t __ret; |
| 49210 | uint32x4_t __ret; | 49995 | __ret = __p0 - __p1 * __p2; |
| 49211 | __ret = (uint32x4_t) __builtin_neon_vcgezq_v((int8x16_t)__p0, 50); | | |
| 49212 | return __ret; | 49996 | return __ret; |
| 49213 | } | 49997 | } |
| | 49998 | #ifdef __LITTLE_ENDIAN__ |
| | 49999 | #define vmlsq_laneq_u32(__p0_471, __p1_471, __p2_471, __p3_471) __extension__ ({ \ |
| | 50000 | uint32x4_t __ret_471; \ |
| | 50001 | uint32x4_t __s0_471 = __p0_471; \ |
| | 50002 | uint32x4_t __s1_471 = __p1_471; \ |
| | 50003 | uint32x4_t __s2_471 = __p2_471; \ |
| | 50004 | __ret_471 = __s0_471 - __s1_471 * splatq_laneq_u32(__s2_471, __p3_471); \ |
| | 50005 | __ret_471; \ |
| | 50006 | }) |
| 49214 | #else | 50007 | #else |
| 49215 | __ai uint32x4_t vcgezq_s32(int32x4_t __p0) { | 50008 | #define vmlsq_laneq_u32(__p0_472, __p1_472, __p2_472, __p3_472) __extension__ ({ \ |
| 49216 | uint32x4_t __ret; | 50009 | uint32x4_t __ret_472; \ |
| 49217 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 50010 | uint32x4_t __s0_472 = __p0_472; \ |
| 49218 | __ret = (uint32x4_t) __builtin_neon_vcgezq_v((int8x16_t)__rev0, 50); | 50011 | uint32x4_t __s1_472 = __p1_472; \ |
| 49219 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 50012 | uint32x4_t __s2_472 = __p2_472; \ |
| 49220 | return __ret; | 50013 | uint32x4_t __rev0_472; __rev0_472 = __builtin_shufflevector(__s0_472, __s0_472, 3, 2, 1, 0); \ |
| 49221 | } | 50014 | uint32x4_t __rev1_472; __rev1_472 = __builtin_shufflevector(__s1_472, __s1_472, 3, 2, 1, 0); \ |
| | 50015 | uint32x4_t __rev2_472; __rev2_472 = __builtin_shufflevector(__s2_472, __s2_472, 3, 2, 1, 0); \ |
| | 50016 | __ret_472 = __rev0_472 - __rev1_472 * __noswap_splatq_laneq_u32(__rev2_472, __p3_472); \ |
| | 50017 | __ret_472 = __builtin_shufflevector(__ret_472, __ret_472, 3, 2, 1, 0); \ |
| | 50018 | __ret_472; \ |
| | 50019 | }) |
| 49222 | #endif | 50020 | #endif |
| 49223 | | 50021 | |
| 49224 | #ifdef __LITTLE_ENDIAN__ | 50022 | #ifdef __LITTLE_ENDIAN__ |
| 49225 | __ai uint64x2_t vcgezq_s64(int64x2_t __p0) { | 50023 | #define vmlsq_laneq_u16(__p0_473, __p1_473, __p2_473, __p3_473) __extension__ ({ \ |
| 49226 | uint64x2_t __ret; | 50024 | uint16x8_t __ret_473; \ |
| 49227 | __ret = (uint64x2_t) __builtin_neon_vcgezq_v((int8x16_t)__p0, 51); | 50025 | uint16x8_t __s0_473 = __p0_473; \ |
| 49228 | return __ret; | 50026 | uint16x8_t __s1_473 = __p1_473; \ |
| 49229 | } | 50027 | uint16x8_t __s2_473 = __p2_473; \ |
| | 50028 | __ret_473 = __s0_473 - __s1_473 * splatq_laneq_u16(__s2_473, __p3_473); \ |
| | 50029 | __ret_473; \ |
| | 50030 | }) |
| 49230 | #else | 50031 | #else |
| 49231 | __ai uint64x2_t vcgezq_s64(int64x2_t __p0) { | 50032 | #define vmlsq_laneq_u16(__p0_474, __p1_474, __p2_474, __p3_474) __extension__ ({ \ |
| 49232 | uint64x2_t __ret; | 50033 | uint16x8_t __ret_474; \ |
| 49233 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50034 | uint16x8_t __s0_474 = __p0_474; \ |
| 49234 | __ret = (uint64x2_t) __builtin_neon_vcgezq_v((int8x16_t)__rev0, 51); | 50035 | uint16x8_t __s1_474 = __p1_474; \ |
| 49235 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50036 | uint16x8_t __s2_474 = __p2_474; \ |
| 49236 | return __ret; | 50037 | uint16x8_t __rev0_474; __rev0_474 = __builtin_shufflevector(__s0_474, __s0_474, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49237 | } | 50038 | uint16x8_t __rev1_474; __rev1_474 = __builtin_shufflevector(__s1_474, __s1_474, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50039 | uint16x8_t __rev2_474; __rev2_474 = __builtin_shufflevector(__s2_474, __s2_474, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50040 | __ret_474 = __rev0_474 - __rev1_474 * __noswap_splatq_laneq_u16(__rev2_474, __p3_474); \ |
| | 50041 | __ret_474 = __builtin_shufflevector(__ret_474, __ret_474, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50042 | __ret_474; \ |
| | 50043 | }) |
| 49238 | #endif | 50044 | #endif |
| 49239 | | 50045 | |
| 49240 | #ifdef __LITTLE_ENDIAN__ | 50046 | #ifdef __LITTLE_ENDIAN__ |
| 49241 | __ai uint16x8_t vcgezq_s16(int16x8_t __p0) { | 50047 | #define vmlsq_laneq_f32(__p0_475, __p1_475, __p2_475, __p3_475) __extension__ ({ \ |
| 49242 | uint16x8_t __ret; | 50048 | float32x4_t __ret_475; \ |
| 49243 | __ret = (uint16x8_t) __builtin_neon_vcgezq_v((int8x16_t)__p0, 49); | 50049 | float32x4_t __s0_475 = __p0_475; \ |
| 49244 | return __ret; | 50050 | float32x4_t __s1_475 = __p1_475; \ |
| 49245 | } | 50051 | float32x4_t __s2_475 = __p2_475; \ |
| | 50052 | __ret_475 = __s0_475 - __s1_475 * splatq_laneq_f32(__s2_475, __p3_475); \ |
| | 50053 | __ret_475; \ |
| | 50054 | }) |
| 49246 | #else | 50055 | #else |
| 49247 | __ai uint16x8_t vcgezq_s16(int16x8_t __p0) { | 50056 | #define vmlsq_laneq_f32(__p0_476, __p1_476, __p2_476, __p3_476) __extension__ ({ \ |
| 49248 | uint16x8_t __ret; | 50057 | float32x4_t __ret_476; \ |
| 49249 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 50058 | float32x4_t __s0_476 = __p0_476; \ |
| 49250 | __ret = (uint16x8_t) __builtin_neon_vcgezq_v((int8x16_t)__rev0, 49); | 50059 | float32x4_t __s1_476 = __p1_476; \ |
| 49251 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 50060 | float32x4_t __s2_476 = __p2_476; \ |
| 49252 | return __ret; | 50061 | float32x4_t __rev0_476; __rev0_476 = __builtin_shufflevector(__s0_476, __s0_476, 3, 2, 1, 0); \ |
| 49253 | } | 50062 | float32x4_t __rev1_476; __rev1_476 = __builtin_shufflevector(__s1_476, __s1_476, 3, 2, 1, 0); \ |
| | 50063 | float32x4_t __rev2_476; __rev2_476 = __builtin_shufflevector(__s2_476, __s2_476, 3, 2, 1, 0); \ |
| | 50064 | __ret_476 = __rev0_476 - __rev1_476 * __noswap_splatq_laneq_f32(__rev2_476, __p3_476); \ |
| | 50065 | __ret_476 = __builtin_shufflevector(__ret_476, __ret_476, 3, 2, 1, 0); \ |
| | 50066 | __ret_476; \ |
| | 50067 | }) |
| 49254 | #endif | 50068 | #endif |
| 49255 | | 50069 | |
| 49256 | #ifdef __LITTLE_ENDIAN__ | 50070 | #ifdef __LITTLE_ENDIAN__ |
| 49257 | __ai uint8x8_t vcgez_s8(int8x8_t __p0) { | 50071 | #define vmlsq_laneq_s32(__p0_477, __p1_477, __p2_477, __p3_477) __extension__ ({ \ |
| 49258 | uint8x8_t __ret; | 50072 | int32x4_t __ret_477; \ |
| 49259 | __ret = (uint8x8_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 16); | 50073 | int32x4_t __s0_477 = __p0_477; \ |
| 49260 | return __ret; | 50074 | int32x4_t __s1_477 = __p1_477; \ |
| 49261 | } | 50075 | int32x4_t __s2_477 = __p2_477; \ |
| | 50076 | __ret_477 = __s0_477 - __s1_477 * splatq_laneq_s32(__s2_477, __p3_477); \ |
| | 50077 | __ret_477; \ |
| | 50078 | }) |
| 49262 | #else | 50079 | #else |
| 49263 | __ai uint8x8_t vcgez_s8(int8x8_t __p0) { | 50080 | #define vmlsq_laneq_s32(__p0_478, __p1_478, __p2_478, __p3_478) __extension__ ({ \ |
| 49264 | uint8x8_t __ret; | 50081 | int32x4_t __ret_478; \ |
| 49265 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 50082 | int32x4_t __s0_478 = __p0_478; \ |
| 49266 | __ret = (uint8x8_t) __builtin_neon_vcgez_v((int8x8_t)__rev0, 16); | 50083 | int32x4_t __s1_478 = __p1_478; \ |
| 49267 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 50084 | int32x4_t __s2_478 = __p2_478; \ |
| 49268 | return __ret; | 50085 | int32x4_t __rev0_478; __rev0_478 = __builtin_shufflevector(__s0_478, __s0_478, 3, 2, 1, 0); \ |
| 49269 | } | 50086 | int32x4_t __rev1_478; __rev1_478 = __builtin_shufflevector(__s1_478, __s1_478, 3, 2, 1, 0); \ |
| | 50087 | int32x4_t __rev2_478; __rev2_478 = __builtin_shufflevector(__s2_478, __s2_478, 3, 2, 1, 0); \ |
| | 50088 | __ret_478 = __rev0_478 - __rev1_478 * __noswap_splatq_laneq_s32(__rev2_478, __p3_478); \ |
| | 50089 | __ret_478 = __builtin_shufflevector(__ret_478, __ret_478, 3, 2, 1, 0); \ |
| | 50090 | __ret_478; \ |
| | 50091 | }) |
| 49270 | #endif | 50092 | #endif |
| 49271 | | 50093 | |
| 49272 | __ai uint64x1_t vcgez_f64(float64x1_t __p0) { | | |
| 49273 | uint64x1_t __ret; | | |
| 49274 | __ret = (uint64x1_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 19); | | |
| 49275 | return __ret; | | |
| 49276 | } | | |
| 49277 | #ifdef __LITTLE_ENDIAN__ | 50094 | #ifdef __LITTLE_ENDIAN__ |
| 49278 | __ai uint32x2_t vcgez_f32(float32x2_t __p0) { | 50095 | #define vmlsq_laneq_s16(__p0_479, __p1_479, __p2_479, __p3_479) __extension__ ({ \ |
| 49279 | uint32x2_t __ret; | 50096 | int16x8_t __ret_479; \ |
| 49280 | __ret = (uint32x2_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 18); | 50097 | int16x8_t __s0_479 = __p0_479; \ |
| 49281 | return __ret; | 50098 | int16x8_t __s1_479 = __p1_479; \ |
| 49282 | } | 50099 | int16x8_t __s2_479 = __p2_479; \ |
| | 50100 | __ret_479 = __s0_479 - __s1_479 * splatq_laneq_s16(__s2_479, __p3_479); \ |
| | 50101 | __ret_479; \ |
| | 50102 | }) |
| 49283 | #else | 50103 | #else |
| 49284 | __ai uint32x2_t vcgez_f32(float32x2_t __p0) { | 50104 | #define vmlsq_laneq_s16(__p0_480, __p1_480, __p2_480, __p3_480) __extension__ ({ \ |
| 49285 | uint32x2_t __ret; | 50105 | int16x8_t __ret_480; \ |
| 49286 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50106 | int16x8_t __s0_480 = __p0_480; \ |
| 49287 | __ret = (uint32x2_t) __builtin_neon_vcgez_v((int8x8_t)__rev0, 18); | 50107 | int16x8_t __s1_480 = __p1_480; \ |
| 49288 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50108 | int16x8_t __s2_480 = __p2_480; \ |
| 49289 | return __ret; | 50109 | int16x8_t __rev0_480; __rev0_480 = __builtin_shufflevector(__s0_480, __s0_480, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49290 | } | 50110 | int16x8_t __rev1_480; __rev1_480 = __builtin_shufflevector(__s1_480, __s1_480, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50111 | int16x8_t __rev2_480; __rev2_480 = __builtin_shufflevector(__s2_480, __s2_480, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50112 | __ret_480 = __rev0_480 - __rev1_480 * __noswap_splatq_laneq_s16(__rev2_480, __p3_480); \ |
| | 50113 | __ret_480 = __builtin_shufflevector(__ret_480, __ret_480, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50114 | __ret_480; \ |
| | 50115 | }) |
| 49291 | #endif | 50116 | #endif |
| 49292 | | 50117 | |
| 49293 | #ifdef __LITTLE_ENDIAN__ | 50118 | #ifdef __LITTLE_ENDIAN__ |
| 49294 | __ai uint32x2_t vcgez_s32(int32x2_t __p0) { | 50119 | #define vmls_laneq_u32(__p0_481, __p1_481, __p2_481, __p3_481) __extension__ ({ \ |
| 49295 | uint32x2_t __ret; | 50120 | uint32x2_t __ret_481; \ |
| 49296 | __ret = (uint32x2_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 18); | 50121 | uint32x2_t __s0_481 = __p0_481; \ |
| 49297 | return __ret; | 50122 | uint32x2_t __s1_481 = __p1_481; \ |
| 49298 | } | 50123 | uint32x4_t __s2_481 = __p2_481; \ |
| | 50124 | __ret_481 = __s0_481 - __s1_481 * splat_laneq_u32(__s2_481, __p3_481); \ |
| | 50125 | __ret_481; \ |
| | 50126 | }) |
| 49299 | #else | 50127 | #else |
| 49300 | __ai uint32x2_t vcgez_s32(int32x2_t __p0) { | 50128 | #define vmls_laneq_u32(__p0_482, __p1_482, __p2_482, __p3_482) __extension__ ({ \ |
| 49301 | uint32x2_t __ret; | 50129 | uint32x2_t __ret_482; \ |
| 49302 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50130 | uint32x2_t __s0_482 = __p0_482; \ |
| 49303 | __ret = (uint32x2_t) __builtin_neon_vcgez_v((int8x8_t)__rev0, 18); | 50131 | uint32x2_t __s1_482 = __p1_482; \ |
| 49304 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50132 | uint32x4_t __s2_482 = __p2_482; \ |
| 49305 | return __ret; | 50133 | uint32x2_t __rev0_482; __rev0_482 = __builtin_shufflevector(__s0_482, __s0_482, 1, 0); \ |
| 49306 | } | 50134 | uint32x2_t __rev1_482; __rev1_482 = __builtin_shufflevector(__s1_482, __s1_482, 1, 0); \ |
| | 50135 | uint32x4_t __rev2_482; __rev2_482 = __builtin_shufflevector(__s2_482, __s2_482, 3, 2, 1, 0); \ |
| | 50136 | __ret_482 = __rev0_482 - __rev1_482 * __noswap_splat_laneq_u32(__rev2_482, __p3_482); \ |
| | 50137 | __ret_482 = __builtin_shufflevector(__ret_482, __ret_482, 1, 0); \ |
| | 50138 | __ret_482; \ |
| | 50139 | }) |
| 49307 | #endif | 50140 | #endif |
| 49308 | | 50141 | |
| 49309 | __ai uint64x1_t vcgez_s64(int64x1_t __p0) { | | |
| 49310 | uint64x1_t __ret; | | |
| 49311 | __ret = (uint64x1_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 19); | | |
| 49312 | return __ret; | | |
| 49313 | } | | |
| 49314 | #ifdef __LITTLE_ENDIAN__ | 50142 | #ifdef __LITTLE_ENDIAN__ |
| 49315 | __ai uint16x4_t vcgez_s16(int16x4_t __p0) { | 50143 | #define vmls_laneq_u16(__p0_483, __p1_483, __p2_483, __p3_483) __extension__ ({ \ |
| 49316 | uint16x4_t __ret; | 50144 | uint16x4_t __ret_483; \ |
| 49317 | __ret = (uint16x4_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 17); | 50145 | uint16x4_t __s0_483 = __p0_483; \ |
| 49318 | return __ret; | 50146 | uint16x4_t __s1_483 = __p1_483; \ |
| 49319 | } | 50147 | uint16x8_t __s2_483 = __p2_483; \ |
| | 50148 | __ret_483 = __s0_483 - __s1_483 * splat_laneq_u16(__s2_483, __p3_483); \ |
| | 50149 | __ret_483; \ |
| | 50150 | }) |
| 49320 | #else | 50151 | #else |
| 49321 | __ai uint16x4_t vcgez_s16(int16x4_t __p0) { | 50152 | #define vmls_laneq_u16(__p0_484, __p1_484, __p2_484, __p3_484) __extension__ ({ \ |
| 49322 | uint16x4_t __ret; | 50153 | uint16x4_t __ret_484; \ |
| 49323 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 50154 | uint16x4_t __s0_484 = __p0_484; \ |
| 49324 | __ret = (uint16x4_t) __builtin_neon_vcgez_v((int8x8_t)__rev0, 17); | 50155 | uint16x4_t __s1_484 = __p1_484; \ |
| 49325 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 50156 | uint16x8_t __s2_484 = __p2_484; \ |
| 49326 | return __ret; | 50157 | uint16x4_t __rev0_484; __rev0_484 = __builtin_shufflevector(__s0_484, __s0_484, 3, 2, 1, 0); \ |
| 49327 | } | 50158 | uint16x4_t __rev1_484; __rev1_484 = __builtin_shufflevector(__s1_484, __s1_484, 3, 2, 1, 0); \ |
| | 50159 | uint16x8_t __rev2_484; __rev2_484 = __builtin_shufflevector(__s2_484, __s2_484, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50160 | __ret_484 = __rev0_484 - __rev1_484 * __noswap_splat_laneq_u16(__rev2_484, __p3_484); \ |
| | 50161 | __ret_484 = __builtin_shufflevector(__ret_484, __ret_484, 3, 2, 1, 0); \ |
| | 50162 | __ret_484; \ |
| | 50163 | }) |
| 49328 | #endif | 50164 | #endif |
| 49329 | | 50165 | |
| 49330 | __ai uint64_t vcgezd_s64(int64_t __p0) { | | |
| 49331 | uint64_t __ret; | | |
| 49332 | __ret = (uint64_t) __builtin_neon_vcgezd_s64(__p0); | | |
| 49333 | return __ret; | | |
| 49334 | } | | |
| 49335 | __ai uint64_t vcgezd_f64(float64_t __p0) { | | |
| 49336 | uint64_t __ret; | | |
| 49337 | __ret = (uint64_t) __builtin_neon_vcgezd_f64(__p0); | | |
| 49338 | return __ret; | | |
| 49339 | } | | |
| 49340 | __ai uint32_t vcgezs_f32(float32_t __p0) { | | |
| 49341 | uint32_t __ret; | | |
| 49342 | __ret = (uint32_t) __builtin_neon_vcgezs_f32(__p0); | | |
| 49343 | return __ret; | | |
| 49344 | } | | |
| 49345 | #ifdef __LITTLE_ENDIAN__ | 50166 | #ifdef __LITTLE_ENDIAN__ |
| 49346 | __ai uint64x2_t vcgtq_u64(uint64x2_t __p0, uint64x2_t __p1) { | 50167 | #define vmls_laneq_f32(__p0_485, __p1_485, __p2_485, __p3_485) __extension__ ({ \ |
| 49347 | uint64x2_t __ret; | 50168 | float32x2_t __ret_485; \ |
| 49348 | __ret = (uint64x2_t)(__p0 > __p1); | 50169 | float32x2_t __s0_485 = __p0_485; \ |
| 49349 | return __ret; | 50170 | float32x2_t __s1_485 = __p1_485; \ |
| 49350 | } | 50171 | float32x4_t __s2_485 = __p2_485; \ |
| | 50172 | __ret_485 = __s0_485 - __s1_485 * splat_laneq_f32(__s2_485, __p3_485); \ |
| | 50173 | __ret_485; \ |
| | 50174 | }) |
| 49351 | #else | 50175 | #else |
| 49352 | __ai uint64x2_t vcgtq_u64(uint64x2_t __p0, uint64x2_t __p1) { | 50176 | #define vmls_laneq_f32(__p0_486, __p1_486, __p2_486, __p3_486) __extension__ ({ \ |
| 49353 | uint64x2_t __ret; | 50177 | float32x2_t __ret_486; \ |
| 49354 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50178 | float32x2_t __s0_486 = __p0_486; \ |
| 49355 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 50179 | float32x2_t __s1_486 = __p1_486; \ |
| 49356 | __ret = (uint64x2_t)(__rev0 > __rev1); | 50180 | float32x4_t __s2_486 = __p2_486; \ |
| 49357 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50181 | float32x2_t __rev0_486; __rev0_486 = __builtin_shufflevector(__s0_486, __s0_486, 1, 0); \ |
| 49358 | return __ret; | 50182 | float32x2_t __rev1_486; __rev1_486 = __builtin_shufflevector(__s1_486, __s1_486, 1, 0); \ |
| 49359 | } | 50183 | float32x4_t __rev2_486; __rev2_486 = __builtin_shufflevector(__s2_486, __s2_486, 3, 2, 1, 0); \ |
| | 50184 | __ret_486 = __rev0_486 - __rev1_486 * __noswap_splat_laneq_f32(__rev2_486, __p3_486); \ |
| | 50185 | __ret_486 = __builtin_shufflevector(__ret_486, __ret_486, 1, 0); \ |
| | 50186 | __ret_486; \ |
| | 50187 | }) |
| 49360 | #endif | 50188 | #endif |
| 49361 | | 50189 | |
| 49362 | #ifdef __LITTLE_ENDIAN__ | 50190 | #ifdef __LITTLE_ENDIAN__ |
| 49363 | __ai uint64x2_t vcgtq_f64(float64x2_t __p0, float64x2_t __p1) { | 50191 | #define vmls_laneq_s32(__p0_487, __p1_487, __p2_487, __p3_487) __extension__ ({ \ |
| 49364 | uint64x2_t __ret; | 50192 | int32x2_t __ret_487; \ |
| 49365 | __ret = (uint64x2_t)(__p0 > __p1); | 50193 | int32x2_t __s0_487 = __p0_487; \ |
| 49366 | return __ret; | 50194 | int32x2_t __s1_487 = __p1_487; \ |
| 49367 | } | 50195 | int32x4_t __s2_487 = __p2_487; \ |
| | 50196 | __ret_487 = __s0_487 - __s1_487 * splat_laneq_s32(__s2_487, __p3_487); \ |
| | 50197 | __ret_487; \ |
| | 50198 | }) |
| 49368 | #else | 50199 | #else |
| 49369 | __ai uint64x2_t vcgtq_f64(float64x2_t __p0, float64x2_t __p1) { | 50200 | #define vmls_laneq_s32(__p0_488, __p1_488, __p2_488, __p3_488) __extension__ ({ \ |
| 49370 | uint64x2_t __ret; | 50201 | int32x2_t __ret_488; \ |
| 49371 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50202 | int32x2_t __s0_488 = __p0_488; \ |
| 49372 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 50203 | int32x2_t __s1_488 = __p1_488; \ |
| 49373 | __ret = (uint64x2_t)(__rev0 > __rev1); | 50204 | int32x4_t __s2_488 = __p2_488; \ |
| 49374 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50205 | int32x2_t __rev0_488; __rev0_488 = __builtin_shufflevector(__s0_488, __s0_488, 1, 0); \ |
| 49375 | return __ret; | 50206 | int32x2_t __rev1_488; __rev1_488 = __builtin_shufflevector(__s1_488, __s1_488, 1, 0); \ |
| 49376 | } | 50207 | int32x4_t __rev2_488; __rev2_488 = __builtin_shufflevector(__s2_488, __s2_488, 3, 2, 1, 0); \ |
| | 50208 | __ret_488 = __rev0_488 - __rev1_488 * __noswap_splat_laneq_s32(__rev2_488, __p3_488); \ |
| | 50209 | __ret_488 = __builtin_shufflevector(__ret_488, __ret_488, 1, 0); \ |
| | 50210 | __ret_488; \ |
| | 50211 | }) |
| 49377 | #endif | 50212 | #endif |
| 49378 | | 50213 | |
| 49379 | #ifdef __LITTLE_ENDIAN__ | 50214 | #ifdef __LITTLE_ENDIAN__ |
| 49380 | __ai uint64x2_t vcgtq_s64(int64x2_t __p0, int64x2_t __p1) { | 50215 | #define vmls_laneq_s16(__p0_489, __p1_489, __p2_489, __p3_489) __extension__ ({ \ |
| 49381 | uint64x2_t __ret; | 50216 | int16x4_t __ret_489; \ |
| 49382 | __ret = (uint64x2_t)(__p0 > __p1); | 50217 | int16x4_t __s0_489 = __p0_489; \ |
| 49383 | return __ret; | 50218 | int16x4_t __s1_489 = __p1_489; \ |
| 49384 | } | 50219 | int16x8_t __s2_489 = __p2_489; \ |
| | 50220 | __ret_489 = __s0_489 - __s1_489 * splat_laneq_s16(__s2_489, __p3_489); \ |
| | 50221 | __ret_489; \ |
| | 50222 | }) |
| 49385 | #else | 50223 | #else |
| 49386 | __ai uint64x2_t vcgtq_s64(int64x2_t __p0, int64x2_t __p1) { | 50224 | #define vmls_laneq_s16(__p0_490, __p1_490, __p2_490, __p3_490) __extension__ ({ \ |
| 49387 | uint64x2_t __ret; | 50225 | int16x4_t __ret_490; \ |
| 49388 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50226 | int16x4_t __s0_490 = __p0_490; \ |
| 49389 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 50227 | int16x4_t __s1_490 = __p1_490; \ |
| 49390 | __ret = (uint64x2_t)(__rev0 > __rev1); | 50228 | int16x8_t __s2_490 = __p2_490; \ |
| 49391 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50229 | int16x4_t __rev0_490; __rev0_490 = __builtin_shufflevector(__s0_490, __s0_490, 3, 2, 1, 0); \ |
| 49392 | return __ret; | 50230 | int16x4_t __rev1_490; __rev1_490 = __builtin_shufflevector(__s1_490, __s1_490, 3, 2, 1, 0); \ |
| 49393 | } | 50231 | int16x8_t __rev2_490; __rev2_490 = __builtin_shufflevector(__s2_490, __s2_490, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50232 | __ret_490 = __rev0_490 - __rev1_490 * __noswap_splat_laneq_s16(__rev2_490, __p3_490); \ |
| | 50233 | __ret_490 = __builtin_shufflevector(__ret_490, __ret_490, 3, 2, 1, 0); \ |
| | 50234 | __ret_490; \ |
| | 50235 | }) |
| 49394 | #endif | 50236 | #endif |
| 49395 | | 50237 | |
| 49396 | __ai uint64x1_t vcgt_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 49397 | uint64x1_t __ret; | | |
| 49398 | __ret = (uint64x1_t)(__p0 > __p1); | | |
| 49399 | return __ret; | | |
| 49400 | } | | |
| 49401 | __ai uint64x1_t vcgt_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 49402 | uint64x1_t __ret; | | |
| 49403 | __ret = (uint64x1_t)(__p0 > __p1); | | |
| 49404 | return __ret; | | |
| 49405 | } | | |
| 49406 | __ai uint64x1_t vcgt_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 49407 | uint64x1_t __ret; | | |
| 49408 | __ret = (uint64x1_t)(__p0 > __p1); | | |
| 49409 | return __ret; | | |
| 49410 | } | | |
| 49411 | __ai uint64_t vcgtd_s64(int64_t __p0, int64_t __p1) { | | |
| 49412 | uint64_t __ret; | | |
| 49413 | __ret = (uint64_t) __builtin_neon_vcgtd_s64(__p0, __p1); | | |
| 49414 | return __ret; | | |
| 49415 | } | | |
| 49416 | __ai uint64_t vcgtd_u64(uint64_t __p0, uint64_t __p1) { | | |
| 49417 | uint64_t __ret; | | |
| 49418 | __ret = (uint64_t) __builtin_neon_vcgtd_u64(__p0, __p1); | | |
| 49419 | return __ret; | | |
| 49420 | } | | |
| 49421 | __ai uint64_t vcgtd_f64(float64_t __p0, float64_t __p1) { | | |
| 49422 | uint64_t __ret; | | |
| 49423 | __ret = (uint64_t) __builtin_neon_vcgtd_f64(__p0, __p1); | | |
| 49424 | return __ret; | | |
| 49425 | } | | |
| 49426 | __ai uint32_t vcgts_f32(float32_t __p0, float32_t __p1) { | | |
| 49427 | uint32_t __ret; | | |
| 49428 | __ret = (uint32_t) __builtin_neon_vcgts_f32(__p0, __p1); | | |
| 49429 | return __ret; | | |
| 49430 | } | | |
| 49431 | #ifdef __LITTLE_ENDIAN__ | 50238 | #ifdef __LITTLE_ENDIAN__ |
| 49432 | __ai uint8x16_t vcgtzq_s8(int8x16_t __p0) { | 50239 | #define vmlsl_high_lane_u32(__p0_491, __p1_491, __p2_491, __p3_491) __extension__ ({ \ |
| 49433 | uint8x16_t __ret; | 50240 | uint64x2_t __ret_491; \ |
| 49434 | __ret = (uint8x16_t) __builtin_neon_vcgtzq_v((int8x16_t)__p0, 48); | 50241 | uint64x2_t __s0_491 = __p0_491; \ |
| 49435 | return __ret; | 50242 | uint32x4_t __s1_491 = __p1_491; \ |
| 49436 | } | 50243 | uint32x2_t __s2_491 = __p2_491; \ |
| | 50244 | __ret_491 = __s0_491 - vmull_u32(vget_high_u32(__s1_491), splat_lane_u32(__s2_491, __p3_491)); \ |
| | 50245 | __ret_491; \ |
| | 50246 | }) |
| 49437 | #else | 50247 | #else |
| 49438 | __ai uint8x16_t vcgtzq_s8(int8x16_t __p0) { | 50248 | #define vmlsl_high_lane_u32(__p0_492, __p1_492, __p2_492, __p3_492) __extension__ ({ \ |
| 49439 | uint8x16_t __ret; | 50249 | uint64x2_t __ret_492; \ |
| 49440 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 50250 | uint64x2_t __s0_492 = __p0_492; \ |
| 49441 | __ret = (uint8x16_t) __builtin_neon_vcgtzq_v((int8x16_t)__rev0, 48); | 50251 | uint32x4_t __s1_492 = __p1_492; \ |
| 49442 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 50252 | uint32x2_t __s2_492 = __p2_492; \ |
| 49443 | return __ret; | 50253 | uint64x2_t __rev0_492; __rev0_492 = __builtin_shufflevector(__s0_492, __s0_492, 1, 0); \ |
| 49444 | } | 50254 | uint32x4_t __rev1_492; __rev1_492 = __builtin_shufflevector(__s1_492, __s1_492, 3, 2, 1, 0); \ |
| | 50255 | uint32x2_t __rev2_492; __rev2_492 = __builtin_shufflevector(__s2_492, __s2_492, 1, 0); \ |
| | 50256 | __ret_492 = __rev0_492 - __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_492), __noswap_splat_lane_u32(__rev2_492, __p3_492)); \ |
| | 50257 | __ret_492 = __builtin_shufflevector(__ret_492, __ret_492, 1, 0); \ |
| | 50258 | __ret_492; \ |
| | 50259 | }) |
| 49445 | #endif | 50260 | #endif |
| 49446 | | 50261 | |
| 49447 | #ifdef __LITTLE_ENDIAN__ | 50262 | #ifdef __LITTLE_ENDIAN__ |
| 49448 | __ai uint64x2_t vcgtzq_f64(float64x2_t __p0) { | 50263 | #define vmlsl_high_lane_u16(__p0_493, __p1_493, __p2_493, __p3_493) __extension__ ({ \ |
| 49449 | uint64x2_t __ret; | 50264 | uint32x4_t __ret_493; \ |
| 49450 | __ret = (uint64x2_t) __builtin_neon_vcgtzq_v((int8x16_t)__p0, 51); | 50265 | uint32x4_t __s0_493 = __p0_493; \ |
| 49451 | return __ret; | 50266 | uint16x8_t __s1_493 = __p1_493; \ |
| 49452 | } | 50267 | uint16x4_t __s2_493 = __p2_493; \ |
| | 50268 | __ret_493 = __s0_493 - vmull_u16(vget_high_u16(__s1_493), splat_lane_u16(__s2_493, __p3_493)); \ |
| | 50269 | __ret_493; \ |
| | 50270 | }) |
| 49453 | #else | 50271 | #else |
| 49454 | __ai uint64x2_t vcgtzq_f64(float64x2_t __p0) { | 50272 | #define vmlsl_high_lane_u16(__p0_494, __p1_494, __p2_494, __p3_494) __extension__ ({ \ |
| 49455 | uint64x2_t __ret; | 50273 | uint32x4_t __ret_494; \ |
| 49456 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50274 | uint32x4_t __s0_494 = __p0_494; \ |
| 49457 | __ret = (uint64x2_t) __builtin_neon_vcgtzq_v((int8x16_t)__rev0, 51); | 50275 | uint16x8_t __s1_494 = __p1_494; \ |
| 49458 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50276 | uint16x4_t __s2_494 = __p2_494; \ |
| 49459 | return __ret; | 50277 | uint32x4_t __rev0_494; __rev0_494 = __builtin_shufflevector(__s0_494, __s0_494, 3, 2, 1, 0); \ |
| 49460 | } | 50278 | uint16x8_t __rev1_494; __rev1_494 = __builtin_shufflevector(__s1_494, __s1_494, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50279 | uint16x4_t __rev2_494; __rev2_494 = __builtin_shufflevector(__s2_494, __s2_494, 3, 2, 1, 0); \ |
| | 50280 | __ret_494 = __rev0_494 - __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_494), __noswap_splat_lane_u16(__rev2_494, __p3_494)); \ |
| | 50281 | __ret_494 = __builtin_shufflevector(__ret_494, __ret_494, 3, 2, 1, 0); \ |
| | 50282 | __ret_494; \ |
| | 50283 | }) |
| 49461 | #endif | 50284 | #endif |
| 49462 | | 50285 | |
| 49463 | #ifdef __LITTLE_ENDIAN__ | 50286 | #ifdef __LITTLE_ENDIAN__ |
| 49464 | __ai uint32x4_t vcgtzq_f32(float32x4_t __p0) { | 50287 | #define vmlsl_high_lane_s32(__p0_495, __p1_495, __p2_495, __p3_495) __extension__ ({ \ |
| 49465 | uint32x4_t __ret; | 50288 | int64x2_t __ret_495; \ |
| 49466 | __ret = (uint32x4_t) __builtin_neon_vcgtzq_v((int8x16_t)__p0, 50); | 50289 | int64x2_t __s0_495 = __p0_495; \ |
| 49467 | return __ret; | 50290 | int32x4_t __s1_495 = __p1_495; \ |
| 49468 | } | 50291 | int32x2_t __s2_495 = __p2_495; \ |
| | 50292 | __ret_495 = __s0_495 - vmull_s32(vget_high_s32(__s1_495), splat_lane_s32(__s2_495, __p3_495)); \ |
| | 50293 | __ret_495; \ |
| | 50294 | }) |
| 49469 | #else | 50295 | #else |
| 49470 | __ai uint32x4_t vcgtzq_f32(float32x4_t __p0) { | 50296 | #define vmlsl_high_lane_s32(__p0_496, __p1_496, __p2_496, __p3_496) __extension__ ({ \ |
| 49471 | uint32x4_t __ret; | 50297 | int64x2_t __ret_496; \ |
| 49472 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 50298 | int64x2_t __s0_496 = __p0_496; \ |
| 49473 | __ret = (uint32x4_t) __builtin_neon_vcgtzq_v((int8x16_t)__rev0, 50); | 50299 | int32x4_t __s1_496 = __p1_496; \ |
| 49474 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 50300 | int32x2_t __s2_496 = __p2_496; \ |
| 49475 | return __ret; | 50301 | int64x2_t __rev0_496; __rev0_496 = __builtin_shufflevector(__s0_496, __s0_496, 1, 0); \ |
| 49476 | } | 50302 | int32x4_t __rev1_496; __rev1_496 = __builtin_shufflevector(__s1_496, __s1_496, 3, 2, 1, 0); \ |
| | 50303 | int32x2_t __rev2_496; __rev2_496 = __builtin_shufflevector(__s2_496, __s2_496, 1, 0); \ |
| | 50304 | __ret_496 = __rev0_496 - __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_496), __noswap_splat_lane_s32(__rev2_496, __p3_496)); \ |
| | 50305 | __ret_496 = __builtin_shufflevector(__ret_496, __ret_496, 1, 0); \ |
| | 50306 | __ret_496; \ |
| | 50307 | }) |
| 49477 | #endif | 50308 | #endif |
| 49478 | | 50309 | |
| 49479 | #ifdef __LITTLE_ENDIAN__ | 50310 | #ifdef __LITTLE_ENDIAN__ |
| 49480 | __ai uint32x4_t vcgtzq_s32(int32x4_t __p0) { | 50311 | #define vmlsl_high_lane_s16(__p0_497, __p1_497, __p2_497, __p3_497) __extension__ ({ \ |
| 49481 | uint32x4_t __ret; | 50312 | int32x4_t __ret_497; \ |
| 49482 | __ret = (uint32x4_t) __builtin_neon_vcgtzq_v((int8x16_t)__p0, 50); | 50313 | int32x4_t __s0_497 = __p0_497; \ |
| 49483 | return __ret; | 50314 | int16x8_t __s1_497 = __p1_497; \ |
| 49484 | } | 50315 | int16x4_t __s2_497 = __p2_497; \ |
| | 50316 | __ret_497 = __s0_497 - vmull_s16(vget_high_s16(__s1_497), splat_lane_s16(__s2_497, __p3_497)); \ |
| | 50317 | __ret_497; \ |
| | 50318 | }) |
| 49485 | #else | 50319 | #else |
| 49486 | __ai uint32x4_t vcgtzq_s32(int32x4_t __p0) { | 50320 | #define vmlsl_high_lane_s16(__p0_498, __p1_498, __p2_498, __p3_498) __extension__ ({ \ |
| 49487 | uint32x4_t __ret; | 50321 | int32x4_t __ret_498; \ |
| 49488 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 50322 | int32x4_t __s0_498 = __p0_498; \ |
| 49489 | __ret = (uint32x4_t) __builtin_neon_vcgtzq_v((int8x16_t)__rev0, 50); | 50323 | int16x8_t __s1_498 = __p1_498; \ |
| 49490 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 50324 | int16x4_t __s2_498 = __p2_498; \ |
| 49491 | return __ret; | 50325 | int32x4_t __rev0_498; __rev0_498 = __builtin_shufflevector(__s0_498, __s0_498, 3, 2, 1, 0); \ |
| 49492 | } | 50326 | int16x8_t __rev1_498; __rev1_498 = __builtin_shufflevector(__s1_498, __s1_498, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50327 | int16x4_t __rev2_498; __rev2_498 = __builtin_shufflevector(__s2_498, __s2_498, 3, 2, 1, 0); \ |
| | 50328 | __ret_498 = __rev0_498 - __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_498), __noswap_splat_lane_s16(__rev2_498, __p3_498)); \ |
| | 50329 | __ret_498 = __builtin_shufflevector(__ret_498, __ret_498, 3, 2, 1, 0); \ |
| | 50330 | __ret_498; \ |
| | 50331 | }) |
| 49493 | #endif | 50332 | #endif |
| 49494 | | 50333 | |
| 49495 | #ifdef __LITTLE_ENDIAN__ | 50334 | #ifdef __LITTLE_ENDIAN__ |
| 49496 | __ai uint64x2_t vcgtzq_s64(int64x2_t __p0) { | 50335 | #define vmlsl_high_laneq_u32(__p0_499, __p1_499, __p2_499, __p3_499) __extension__ ({ \ |
| 49497 | uint64x2_t __ret; | 50336 | uint64x2_t __ret_499; \ |
| 49498 | __ret = (uint64x2_t) __builtin_neon_vcgtzq_v((int8x16_t)__p0, 51); | 50337 | uint64x2_t __s0_499 = __p0_499; \ |
| 49499 | return __ret; | 50338 | uint32x4_t __s1_499 = __p1_499; \ |
| 49500 | } | 50339 | uint32x4_t __s2_499 = __p2_499; \ |
| | 50340 | __ret_499 = __s0_499 - vmull_u32(vget_high_u32(__s1_499), splat_laneq_u32(__s2_499, __p3_499)); \ |
| | 50341 | __ret_499; \ |
| | 50342 | }) |
| 49501 | #else | 50343 | #else |
| 49502 | __ai uint64x2_t vcgtzq_s64(int64x2_t __p0) { | 50344 | #define vmlsl_high_laneq_u32(__p0_500, __p1_500, __p2_500, __p3_500) __extension__ ({ \ |
| 49503 | uint64x2_t __ret; | 50345 | uint64x2_t __ret_500; \ |
| 49504 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50346 | uint64x2_t __s0_500 = __p0_500; \ |
| 49505 | __ret = (uint64x2_t) __builtin_neon_vcgtzq_v((int8x16_t)__rev0, 51); | 50347 | uint32x4_t __s1_500 = __p1_500; \ |
| 49506 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50348 | uint32x4_t __s2_500 = __p2_500; \ |
| 49507 | return __ret; | 50349 | uint64x2_t __rev0_500; __rev0_500 = __builtin_shufflevector(__s0_500, __s0_500, 1, 0); \ |
| 49508 | } | 50350 | uint32x4_t __rev1_500; __rev1_500 = __builtin_shufflevector(__s1_500, __s1_500, 3, 2, 1, 0); \ |
| | 50351 | uint32x4_t __rev2_500; __rev2_500 = __builtin_shufflevector(__s2_500, __s2_500, 3, 2, 1, 0); \ |
| | 50352 | __ret_500 = __rev0_500 - __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_500), __noswap_splat_laneq_u32(__rev2_500, __p3_500)); \ |
| | 50353 | __ret_500 = __builtin_shufflevector(__ret_500, __ret_500, 1, 0); \ |
| | 50354 | __ret_500; \ |
| | 50355 | }) |
| 49509 | #endif | 50356 | #endif |
| 49510 | | 50357 | |
| 49511 | #ifdef __LITTLE_ENDIAN__ | 50358 | #ifdef __LITTLE_ENDIAN__ |
| 49512 | __ai uint16x8_t vcgtzq_s16(int16x8_t __p0) { | 50359 | #define vmlsl_high_laneq_u16(__p0_501, __p1_501, __p2_501, __p3_501) __extension__ ({ \ |
| 49513 | uint16x8_t __ret; | 50360 | uint32x4_t __ret_501; \ |
| 49514 | __ret = (uint16x8_t) __builtin_neon_vcgtzq_v((int8x16_t)__p0, 49); | 50361 | uint32x4_t __s0_501 = __p0_501; \ |
| 49515 | return __ret; | 50362 | uint16x8_t __s1_501 = __p1_501; \ |
| 49516 | } | 50363 | uint16x8_t __s2_501 = __p2_501; \ |
| | 50364 | __ret_501 = __s0_501 - vmull_u16(vget_high_u16(__s1_501), splat_laneq_u16(__s2_501, __p3_501)); \ |
| | 50365 | __ret_501; \ |
| | 50366 | }) |
| 49517 | #else | 50367 | #else |
| 49518 | __ai uint16x8_t vcgtzq_s16(int16x8_t __p0) { | 50368 | #define vmlsl_high_laneq_u16(__p0_502, __p1_502, __p2_502, __p3_502) __extension__ ({ \ |
| 49519 | uint16x8_t __ret; | 50369 | uint32x4_t __ret_502; \ |
| 49520 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 50370 | uint32x4_t __s0_502 = __p0_502; \ |
| 49521 | __ret = (uint16x8_t) __builtin_neon_vcgtzq_v((int8x16_t)__rev0, 49); | 50371 | uint16x8_t __s1_502 = __p1_502; \ |
| 49522 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 50372 | uint16x8_t __s2_502 = __p2_502; \ |
| 49523 | return __ret; | 50373 | uint32x4_t __rev0_502; __rev0_502 = __builtin_shufflevector(__s0_502, __s0_502, 3, 2, 1, 0); \ |
| 49524 | } | 50374 | uint16x8_t __rev1_502; __rev1_502 = __builtin_shufflevector(__s1_502, __s1_502, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50375 | uint16x8_t __rev2_502; __rev2_502 = __builtin_shufflevector(__s2_502, __s2_502, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50376 | __ret_502 = __rev0_502 - __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_502), __noswap_splat_laneq_u16(__rev2_502, __p3_502)); \ |
| | 50377 | __ret_502 = __builtin_shufflevector(__ret_502, __ret_502, 3, 2, 1, 0); \ |
| | 50378 | __ret_502; \ |
| | 50379 | }) |
| 49525 | #endif | 50380 | #endif |
| 49526 | | 50381 | |
| 49527 | #ifdef __LITTLE_ENDIAN__ | 50382 | #ifdef __LITTLE_ENDIAN__ |
| 49528 | __ai uint8x8_t vcgtz_s8(int8x8_t __p0) { | 50383 | #define vmlsl_high_laneq_s32(__p0_503, __p1_503, __p2_503, __p3_503) __extension__ ({ \ |
| 49529 | uint8x8_t __ret; | 50384 | int64x2_t __ret_503; \ |
| 49530 | __ret = (uint8x8_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 16); | 50385 | int64x2_t __s0_503 = __p0_503; \ |
| 49531 | return __ret; | 50386 | int32x4_t __s1_503 = __p1_503; \ |
| 49532 | } | 50387 | int32x4_t __s2_503 = __p2_503; \ |
| | 50388 | __ret_503 = __s0_503 - vmull_s32(vget_high_s32(__s1_503), splat_laneq_s32(__s2_503, __p3_503)); \ |
| | 50389 | __ret_503; \ |
| | 50390 | }) |
| 49533 | #else | 50391 | #else |
| 49534 | __ai uint8x8_t vcgtz_s8(int8x8_t __p0) { | 50392 | #define vmlsl_high_laneq_s32(__p0_504, __p1_504, __p2_504, __p3_504) __extension__ ({ \ |
| 49535 | uint8x8_t __ret; | 50393 | int64x2_t __ret_504; \ |
| 49536 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 50394 | int64x2_t __s0_504 = __p0_504; \ |
| 49537 | __ret = (uint8x8_t) __builtin_neon_vcgtz_v((int8x8_t)__rev0, 16); | 50395 | int32x4_t __s1_504 = __p1_504; \ |
| 49538 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 50396 | int32x4_t __s2_504 = __p2_504; \ |
| 49539 | return __ret; | 50397 | int64x2_t __rev0_504; __rev0_504 = __builtin_shufflevector(__s0_504, __s0_504, 1, 0); \ |
| 49540 | } | 50398 | int32x4_t __rev1_504; __rev1_504 = __builtin_shufflevector(__s1_504, __s1_504, 3, 2, 1, 0); \ |
| | 50399 | int32x4_t __rev2_504; __rev2_504 = __builtin_shufflevector(__s2_504, __s2_504, 3, 2, 1, 0); \ |
| | 50400 | __ret_504 = __rev0_504 - __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_504), __noswap_splat_laneq_s32(__rev2_504, __p3_504)); \ |
| | 50401 | __ret_504 = __builtin_shufflevector(__ret_504, __ret_504, 1, 0); \ |
| | 50402 | __ret_504; \ |
| | 50403 | }) |
| 49541 | #endif | 50404 | #endif |
| 49542 | | 50405 | |
| 49543 | __ai uint64x1_t vcgtz_f64(float64x1_t __p0) { | | |
| 49544 | uint64x1_t __ret; | | |
| 49545 | __ret = (uint64x1_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 19); | | |
| 49546 | return __ret; | | |
| 49547 | } | | |
| 49548 | #ifdef __LITTLE_ENDIAN__ | 50406 | #ifdef __LITTLE_ENDIAN__ |
| 49549 | __ai uint32x2_t vcgtz_f32(float32x2_t __p0) { | 50407 | #define vmlsl_high_laneq_s16(__p0_505, __p1_505, __p2_505, __p3_505) __extension__ ({ \ |
| 49550 | uint32x2_t __ret; | 50408 | int32x4_t __ret_505; \ |
| 49551 | __ret = (uint32x2_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 18); | 50409 | int32x4_t __s0_505 = __p0_505; \ |
| 49552 | return __ret; | 50410 | int16x8_t __s1_505 = __p1_505; \ |
| 49553 | } | 50411 | int16x8_t __s2_505 = __p2_505; \ |
| | 50412 | __ret_505 = __s0_505 - vmull_s16(vget_high_s16(__s1_505), splat_laneq_s16(__s2_505, __p3_505)); \ |
| | 50413 | __ret_505; \ |
| | 50414 | }) |
| 49554 | #else | 50415 | #else |
| 49555 | __ai uint32x2_t vcgtz_f32(float32x2_t __p0) { | 50416 | #define vmlsl_high_laneq_s16(__p0_506, __p1_506, __p2_506, __p3_506) __extension__ ({ \ |
| 49556 | uint32x2_t __ret; | 50417 | int32x4_t __ret_506; \ |
| 49557 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50418 | int32x4_t __s0_506 = __p0_506; \ |
| 49558 | __ret = (uint32x2_t) __builtin_neon_vcgtz_v((int8x8_t)__rev0, 18); | 50419 | int16x8_t __s1_506 = __p1_506; \ |
| 49559 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50420 | int16x8_t __s2_506 = __p2_506; \ |
| 49560 | return __ret; | 50421 | int32x4_t __rev0_506; __rev0_506 = __builtin_shufflevector(__s0_506, __s0_506, 3, 2, 1, 0); \ |
| 49561 | } | 50422 | int16x8_t __rev1_506; __rev1_506 = __builtin_shufflevector(__s1_506, __s1_506, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50423 | int16x8_t __rev2_506; __rev2_506 = __builtin_shufflevector(__s2_506, __s2_506, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50424 | __ret_506 = __rev0_506 - __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_506), __noswap_splat_laneq_s16(__rev2_506, __p3_506)); \ |
| | 50425 | __ret_506 = __builtin_shufflevector(__ret_506, __ret_506, 3, 2, 1, 0); \ |
| | 50426 | __ret_506; \ |
| | 50427 | }) |
| 49562 | #endif | 50428 | #endif |
| 49563 | | 50429 | |
| 49564 | #ifdef __LITTLE_ENDIAN__ | 50430 | #ifdef __LITTLE_ENDIAN__ |
| 49565 | __ai uint32x2_t vcgtz_s32(int32x2_t __p0) { | 50431 | #define vmlsl_laneq_u32(__p0_507, __p1_507, __p2_507, __p3_507) __extension__ ({ \ |
| 49566 | uint32x2_t __ret; | 50432 | uint64x2_t __ret_507; \ |
| 49567 | __ret = (uint32x2_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 18); | 50433 | uint64x2_t __s0_507 = __p0_507; \ |
| 49568 | return __ret; | 50434 | uint32x2_t __s1_507 = __p1_507; \ |
| 49569 | } | 50435 | uint32x4_t __s2_507 = __p2_507; \ |
| | 50436 | __ret_507 = __s0_507 - vmull_u32(__s1_507, splat_laneq_u32(__s2_507, __p3_507)); \ |
| | 50437 | __ret_507; \ |
| | 50438 | }) |
| 49570 | #else | 50439 | #else |
| 49571 | __ai uint32x2_t vcgtz_s32(int32x2_t __p0) { | 50440 | #define vmlsl_laneq_u32(__p0_508, __p1_508, __p2_508, __p3_508) __extension__ ({ \ |
| 49572 | uint32x2_t __ret; | 50441 | uint64x2_t __ret_508; \ |
| 49573 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50442 | uint64x2_t __s0_508 = __p0_508; \ |
| 49574 | __ret = (uint32x2_t) __builtin_neon_vcgtz_v((int8x8_t)__rev0, 18); | 50443 | uint32x2_t __s1_508 = __p1_508; \ |
| 49575 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50444 | uint32x4_t __s2_508 = __p2_508; \ |
| 49576 | return __ret; | 50445 | uint64x2_t __rev0_508; __rev0_508 = __builtin_shufflevector(__s0_508, __s0_508, 1, 0); \ |
| 49577 | } | 50446 | uint32x2_t __rev1_508; __rev1_508 = __builtin_shufflevector(__s1_508, __s1_508, 1, 0); \ |
| | 50447 | uint32x4_t __rev2_508; __rev2_508 = __builtin_shufflevector(__s2_508, __s2_508, 3, 2, 1, 0); \ |
| | 50448 | __ret_508 = __rev0_508 - __noswap_vmull_u32(__rev1_508, __noswap_splat_laneq_u32(__rev2_508, __p3_508)); \ |
| | 50449 | __ret_508 = __builtin_shufflevector(__ret_508, __ret_508, 1, 0); \ |
| | 50450 | __ret_508; \ |
| | 50451 | }) |
| 49578 | #endif | 50452 | #endif |
| 49579 | | 50453 | |
| 49580 | __ai uint64x1_t vcgtz_s64(int64x1_t __p0) { | | |
| 49581 | uint64x1_t __ret; | | |
| 49582 | __ret = (uint64x1_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 19); | | |
| 49583 | return __ret; | | |
| 49584 | } | | |
| 49585 | #ifdef __LITTLE_ENDIAN__ | 50454 | #ifdef __LITTLE_ENDIAN__ |
| 49586 | __ai uint16x4_t vcgtz_s16(int16x4_t __p0) { | 50455 | #define vmlsl_laneq_u16(__p0_509, __p1_509, __p2_509, __p3_509) __extension__ ({ \ |
| 49587 | uint16x4_t __ret; | 50456 | uint32x4_t __ret_509; \ |
| 49588 | __ret = (uint16x4_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 17); | 50457 | uint32x4_t __s0_509 = __p0_509; \ |
| 49589 | return __ret; | 50458 | uint16x4_t __s1_509 = __p1_509; \ |
| 49590 | } | 50459 | uint16x8_t __s2_509 = __p2_509; \ |
| | 50460 | __ret_509 = __s0_509 - vmull_u16(__s1_509, splat_laneq_u16(__s2_509, __p3_509)); \ |
| | 50461 | __ret_509; \ |
| | 50462 | }) |
| 49591 | #else | 50463 | #else |
| 49592 | __ai uint16x4_t vcgtz_s16(int16x4_t __p0) { | 50464 | #define vmlsl_laneq_u16(__p0_510, __p1_510, __p2_510, __p3_510) __extension__ ({ \ |
| 49593 | uint16x4_t __ret; | 50465 | uint32x4_t __ret_510; \ |
| 49594 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 50466 | uint32x4_t __s0_510 = __p0_510; \ |
| 49595 | __ret = (uint16x4_t) __builtin_neon_vcgtz_v((int8x8_t)__rev0, 17); | 50467 | uint16x4_t __s1_510 = __p1_510; \ |
| 49596 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 50468 | uint16x8_t __s2_510 = __p2_510; \ |
| 49597 | return __ret; | 50469 | uint32x4_t __rev0_510; __rev0_510 = __builtin_shufflevector(__s0_510, __s0_510, 3, 2, 1, 0); \ |
| 49598 | } | 50470 | uint16x4_t __rev1_510; __rev1_510 = __builtin_shufflevector(__s1_510, __s1_510, 3, 2, 1, 0); \ |
| | 50471 | uint16x8_t __rev2_510; __rev2_510 = __builtin_shufflevector(__s2_510, __s2_510, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50472 | __ret_510 = __rev0_510 - __noswap_vmull_u16(__rev1_510, __noswap_splat_laneq_u16(__rev2_510, __p3_510)); \ |
| | 50473 | __ret_510 = __builtin_shufflevector(__ret_510, __ret_510, 3, 2, 1, 0); \ |
| | 50474 | __ret_510; \ |
| | 50475 | }) |
| | 50476 | #endif |
| | 50477 | |
| | 50478 | #ifdef __LITTLE_ENDIAN__ |
| | 50479 | #define vmlsl_laneq_s32(__p0_511, __p1_511, __p2_511, __p3_511) __extension__ ({ \ |
| | 50480 | int64x2_t __ret_511; \ |
| | 50481 | int64x2_t __s0_511 = __p0_511; \ |
| | 50482 | int32x2_t __s1_511 = __p1_511; \ |
| | 50483 | int32x4_t __s2_511 = __p2_511; \ |
| | 50484 | __ret_511 = __s0_511 - vmull_s32(__s1_511, splat_laneq_s32(__s2_511, __p3_511)); \ |
| | 50485 | __ret_511; \ |
| | 50486 | }) |
| | 50487 | #else |
| | 50488 | #define vmlsl_laneq_s32(__p0_512, __p1_512, __p2_512, __p3_512) __extension__ ({ \ |
| | 50489 | int64x2_t __ret_512; \ |
| | 50490 | int64x2_t __s0_512 = __p0_512; \ |
| | 50491 | int32x2_t __s1_512 = __p1_512; \ |
| | 50492 | int32x4_t __s2_512 = __p2_512; \ |
| | 50493 | int64x2_t __rev0_512; __rev0_512 = __builtin_shufflevector(__s0_512, __s0_512, 1, 0); \ |
| | 50494 | int32x2_t __rev1_512; __rev1_512 = __builtin_shufflevector(__s1_512, __s1_512, 1, 0); \ |
| | 50495 | int32x4_t __rev2_512; __rev2_512 = __builtin_shufflevector(__s2_512, __s2_512, 3, 2, 1, 0); \ |
| | 50496 | __ret_512 = __rev0_512 - __noswap_vmull_s32(__rev1_512, __noswap_splat_laneq_s32(__rev2_512, __p3_512)); \ |
| | 50497 | __ret_512 = __builtin_shufflevector(__ret_512, __ret_512, 1, 0); \ |
| | 50498 | __ret_512; \ |
| | 50499 | }) |
| 49599 | #endif | 50500 | #endif |
| 49600 | | 50501 | |
| 49601 | __ai uint64_t vcgtzd_s64(int64_t __p0) { | | |
| 49602 | uint64_t __ret; | | |
| 49603 | __ret = (uint64_t) __builtin_neon_vcgtzd_s64(__p0); | | |
| 49604 | return __ret; | | |
| 49605 | } | | |
| 49606 | __ai uint64_t vcgtzd_f64(float64_t __p0) { | | |
| 49607 | uint64_t __ret; | | |
| 49608 | __ret = (uint64_t) __builtin_neon_vcgtzd_f64(__p0); | | |
| 49609 | return __ret; | | |
| 49610 | } | | |
| 49611 | __ai uint32_t vcgtzs_f32(float32_t __p0) { | | |
| 49612 | uint32_t __ret; | | |
| 49613 | __ret = (uint32_t) __builtin_neon_vcgtzs_f32(__p0); | | |
| 49614 | return __ret; | | |
| 49615 | } | | |
| 49616 | #ifdef __LITTLE_ENDIAN__ | 50502 | #ifdef __LITTLE_ENDIAN__ |
| 49617 | __ai uint64x2_t vcleq_u64(uint64x2_t __p0, uint64x2_t __p1) { | 50503 | #define vmlsl_laneq_s16(__p0_513, __p1_513, __p2_513, __p3_513) __extension__ ({ \ |
| 49618 | uint64x2_t __ret; | 50504 | int32x4_t __ret_513; \ |
| 49619 | __ret = (uint64x2_t)(__p0 <= __p1); | 50505 | int32x4_t __s0_513 = __p0_513; \ |
| 49620 | return __ret; | 50506 | int16x4_t __s1_513 = __p1_513; \ |
| 49621 | } | 50507 | int16x8_t __s2_513 = __p2_513; \ |
| | 50508 | __ret_513 = __s0_513 - vmull_s16(__s1_513, splat_laneq_s16(__s2_513, __p3_513)); \ |
| | 50509 | __ret_513; \ |
| | 50510 | }) |
| 49622 | #else | 50511 | #else |
| 49623 | __ai uint64x2_t vcleq_u64(uint64x2_t __p0, uint64x2_t __p1) { | 50512 | #define vmlsl_laneq_s16(__p0_514, __p1_514, __p2_514, __p3_514) __extension__ ({ \ |
| 49624 | uint64x2_t __ret; | 50513 | int32x4_t __ret_514; \ |
| 49625 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50514 | int32x4_t __s0_514 = __p0_514; \ |
| 49626 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 50515 | int16x4_t __s1_514 = __p1_514; \ |
| 49627 | __ret = (uint64x2_t)(__rev0 <= __rev1); | 50516 | int16x8_t __s2_514 = __p2_514; \ |
| 49628 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50517 | int32x4_t __rev0_514; __rev0_514 = __builtin_shufflevector(__s0_514, __s0_514, 3, 2, 1, 0); \ |
| 49629 | return __ret; | 50518 | int16x4_t __rev1_514; __rev1_514 = __builtin_shufflevector(__s1_514, __s1_514, 3, 2, 1, 0); \ |
| 49630 | } | 50519 | int16x8_t __rev2_514; __rev2_514 = __builtin_shufflevector(__s2_514, __s2_514, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50520 | __ret_514 = __rev0_514 - __noswap_vmull_s16(__rev1_514, __noswap_splat_laneq_s16(__rev2_514, __p3_514)); \ |
| | 50521 | __ret_514 = __builtin_shufflevector(__ret_514, __ret_514, 3, 2, 1, 0); \ |
| | 50522 | __ret_514; \ |
| | 50523 | }) |
| 49631 | #endif | 50524 | #endif |
| 49632 | | 50525 | |
| | 50526 | __ai poly64x1_t vmov_n_p64(poly64_t __p0) { |
| | 50527 | poly64x1_t __ret; |
| | 50528 | __ret = (poly64x1_t) {__p0}; |
| | 50529 | return __ret; |
| | 50530 | } |
| 49633 | #ifdef __LITTLE_ENDIAN__ | 50531 | #ifdef __LITTLE_ENDIAN__ |
| 49634 | __ai uint64x2_t vcleq_f64(float64x2_t __p0, float64x2_t __p1) { | 50532 | __ai poly64x2_t vmovq_n_p64(poly64_t __p0) { |
| 49635 | uint64x2_t __ret; | 50533 | poly64x2_t __ret; |
| 49636 | __ret = (uint64x2_t)(__p0 <= __p1); | 50534 | __ret = (poly64x2_t) {__p0, __p0}; |
| 49637 | return __ret; | 50535 | return __ret; |
| 49638 | } | 50536 | } |
| 49639 | #else | 50537 | #else |
| 49640 | __ai uint64x2_t vcleq_f64(float64x2_t __p0, float64x2_t __p1) { | 50538 | __ai poly64x2_t vmovq_n_p64(poly64_t __p0) { |
| 49641 | uint64x2_t __ret; | 50539 | poly64x2_t __ret; |
| 49642 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50540 | __ret = (poly64x2_t) {__p0, __p0}; |
| 49643 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 49644 | __ret = (uint64x2_t)(__rev0 <= __rev1); | | |
| 49645 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50541 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 49646 | return __ret; | 50542 | return __ret; |
| 49647 | } | 50543 | } |
| 49648 | #endif | 50544 | #endif |
| 49649 | | 50545 | |
| 49650 | #ifdef __LITTLE_ENDIAN__ | 50546 | #ifdef __LITTLE_ENDIAN__ |
| 49651 | __ai uint64x2_t vcleq_s64(int64x2_t __p0, int64x2_t __p1) { | 50547 | __ai float64x2_t vmovq_n_f64(float64_t __p0) { |
| 49652 | uint64x2_t __ret; | 50548 | float64x2_t __ret; |
| 49653 | __ret = (uint64x2_t)(__p0 <= __p1); | 50549 | __ret = (float64x2_t) {__p0, __p0}; |
| 49654 | return __ret; | 50550 | return __ret; |
| 49655 | } | 50551 | } |
| 49656 | #else | 50552 | #else |
| 49657 | __ai uint64x2_t vcleq_s64(int64x2_t __p0, int64x2_t __p1) { | 50553 | __ai float64x2_t vmovq_n_f64(float64_t __p0) { |
| 49658 | uint64x2_t __ret; | 50554 | float64x2_t __ret; |
| 49659 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50555 | __ret = (float64x2_t) {__p0, __p0}; |
| 49660 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 49661 | __ret = (uint64x2_t)(__rev0 <= __rev1); | | |
| 49662 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50556 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 49663 | return __ret; | 50557 | return __ret; |
| 49664 | } | 50558 | } |
| 49665 | #endif | 50559 | #endif |
| 49666 | | 50560 | |
| 49667 | __ai uint64x1_t vcle_u64(uint64x1_t __p0, uint64x1_t __p1) { | 50561 | __ai float64x1_t vmov_n_f64(float64_t __p0) { |
| 49668 | uint64x1_t __ret; | 50562 | float64x1_t __ret; |
| 49669 | __ret = (uint64x1_t)(__p0 <= __p1); | 50563 | __ret = (float64x1_t) {__p0}; |
| 49670 | return __ret; | | |
| 49671 | } | | |
| 49672 | __ai uint64x1_t vcle_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 49673 | uint64x1_t __ret; | | |
| 49674 | __ret = (uint64x1_t)(__p0 <= __p1); | | |
| 49675 | return __ret; | | |
| 49676 | } | | |
| 49677 | __ai uint64x1_t vcle_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 49678 | uint64x1_t __ret; | | |
| 49679 | __ret = (uint64x1_t)(__p0 <= __p1); | | |
| 49680 | return __ret; | | |
| 49681 | } | | |
| 49682 | __ai uint64_t vcled_u64(uint64_t __p0, uint64_t __p1) { | | |
| 49683 | uint64_t __ret; | | |
| 49684 | __ret = (uint64_t) __builtin_neon_vcled_u64(__p0, __p1); | | |
| 49685 | return __ret; | 50564 | return __ret; |
| 49686 | } | 50565 | } |
| 49687 | __ai uint64_t vcled_s64(int64_t __p0, int64_t __p1) { | 50566 | #ifdef __LITTLE_ENDIAN__ |
| 49688 | uint64_t __ret; | 50567 | __ai uint16x8_t vmovl_high_u8(uint8x16_t __p0_515) { |
| 49689 | __ret = (uint64_t) __builtin_neon_vcled_s64(__p0, __p1); | 50568 | uint16x8_t __ret_515; |
| 49690 | return __ret; | 50569 | uint8x8_t __a1_515 = vget_high_u8(__p0_515); |
| | 50570 | __ret_515 = (uint16x8_t)(vshll_n_u8(__a1_515, 0)); |
| | 50571 | return __ret_515; |
| 49691 | } | 50572 | } |
| 49692 | __ai uint64_t vcled_f64(float64_t __p0, float64_t __p1) { | 50573 | #else |
| 49693 | uint64_t __ret; | 50574 | __ai uint16x8_t vmovl_high_u8(uint8x16_t __p0_516) { |
| 49694 | __ret = (uint64_t) __builtin_neon_vcled_f64(__p0, __p1); | 50575 | uint16x8_t __ret_516; |
| 49695 | return __ret; | 50576 | uint8x16_t __rev0_516; __rev0_516 = __builtin_shufflevector(__p0_516, __p0_516, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 50577 | uint8x8_t __a1_516 = __noswap_vget_high_u8(__rev0_516); |
| | 50578 | __ret_516 = (uint16x8_t)(__noswap_vshll_n_u8(__a1_516, 0)); |
| | 50579 | __ret_516 = __builtin_shufflevector(__ret_516, __ret_516, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 50580 | return __ret_516; |
| 49696 | } | 50581 | } |
| 49697 | __ai uint32_t vcles_f32(float32_t __p0, float32_t __p1) { | 50582 | __ai uint16x8_t __noswap_vmovl_high_u8(uint8x16_t __p0_517) { |
| 49698 | uint32_t __ret; | 50583 | uint16x8_t __ret_517; |
| 49699 | __ret = (uint32_t) __builtin_neon_vcles_f32(__p0, __p1); | 50584 | uint8x8_t __a1_517 = __noswap_vget_high_u8(__p0_517); |
| 49700 | return __ret; | 50585 | __ret_517 = (uint16x8_t)(__noswap_vshll_n_u8(__a1_517, 0)); |
| | 50586 | return __ret_517; |
| 49701 | } | 50587 | } |
| | 50588 | #endif |
| | 50589 | |
| 49702 | #ifdef __LITTLE_ENDIAN__ | 50590 | #ifdef __LITTLE_ENDIAN__ |
| 49703 | __ai uint8x16_t vclezq_s8(int8x16_t __p0) { | 50591 | __ai uint64x2_t vmovl_high_u32(uint32x4_t __p0_518) { |
| 49704 | uint8x16_t __ret; | 50592 | uint64x2_t __ret_518; |
| 49705 | __ret = (uint8x16_t) __builtin_neon_vclezq_v((int8x16_t)__p0, 48); | 50593 | uint32x2_t __a1_518 = vget_high_u32(__p0_518); |
| 49706 | return __ret; | 50594 | __ret_518 = (uint64x2_t)(vshll_n_u32(__a1_518, 0)); |
| | 50595 | return __ret_518; |
| 49707 | } | 50596 | } |
| 49708 | #else | 50597 | #else |
| 49709 | __ai uint8x16_t vclezq_s8(int8x16_t __p0) { | 50598 | __ai uint64x2_t vmovl_high_u32(uint32x4_t __p0_519) { |
| 49710 | uint8x16_t __ret; | 50599 | uint64x2_t __ret_519; |
| 49711 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 50600 | uint32x4_t __rev0_519; __rev0_519 = __builtin_shufflevector(__p0_519, __p0_519, 3, 2, 1, 0); |
| 49712 | __ret = (uint8x16_t) __builtin_neon_vclezq_v((int8x16_t)__rev0, 48); | 50601 | uint32x2_t __a1_519 = __noswap_vget_high_u32(__rev0_519); |
| 49713 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 50602 | __ret_519 = (uint64x2_t)(__noswap_vshll_n_u32(__a1_519, 0)); |
| 49714 | return __ret; | 50603 | __ret_519 = __builtin_shufflevector(__ret_519, __ret_519, 1, 0); |
| | 50604 | return __ret_519; |
| | 50605 | } |
| | 50606 | __ai uint64x2_t __noswap_vmovl_high_u32(uint32x4_t __p0_520) { |
| | 50607 | uint64x2_t __ret_520; |
| | 50608 | uint32x2_t __a1_520 = __noswap_vget_high_u32(__p0_520); |
| | 50609 | __ret_520 = (uint64x2_t)(__noswap_vshll_n_u32(__a1_520, 0)); |
| | 50610 | return __ret_520; |
| 49715 | } | 50611 | } |
| 49716 | #endif | 50612 | #endif |
| 49717 | | 50613 | |
| 49718 | #ifdef __LITTLE_ENDIAN__ | 50614 | #ifdef __LITTLE_ENDIAN__ |
| 49719 | __ai uint64x2_t vclezq_f64(float64x2_t __p0) { | 50615 | __ai uint32x4_t vmovl_high_u16(uint16x8_t __p0_521) { |
| 49720 | uint64x2_t __ret; | 50616 | uint32x4_t __ret_521; |
| 49721 | __ret = (uint64x2_t) __builtin_neon_vclezq_v((int8x16_t)__p0, 51); | 50617 | uint16x4_t __a1_521 = vget_high_u16(__p0_521); |
| 49722 | return __ret; | 50618 | __ret_521 = (uint32x4_t)(vshll_n_u16(__a1_521, 0)); |
| | 50619 | return __ret_521; |
| 49723 | } | 50620 | } |
| 49724 | #else | 50621 | #else |
| 49725 | __ai uint64x2_t vclezq_f64(float64x2_t __p0) { | 50622 | __ai uint32x4_t vmovl_high_u16(uint16x8_t __p0_522) { |
| 49726 | uint64x2_t __ret; | 50623 | uint32x4_t __ret_522; |
| 49727 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50624 | uint16x8_t __rev0_522; __rev0_522 = __builtin_shufflevector(__p0_522, __p0_522, 7, 6, 5, 4, 3, 2, 1, 0); |
| 49728 | __ret = (uint64x2_t) __builtin_neon_vclezq_v((int8x16_t)__rev0, 51); | 50625 | uint16x4_t __a1_522 = __noswap_vget_high_u16(__rev0_522); |
| 49729 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50626 | __ret_522 = (uint32x4_t)(__noswap_vshll_n_u16(__a1_522, 0)); |
| 49730 | return __ret; | 50627 | __ret_522 = __builtin_shufflevector(__ret_522, __ret_522, 3, 2, 1, 0); |
| | 50628 | return __ret_522; |
| | 50629 | } |
| | 50630 | __ai uint32x4_t __noswap_vmovl_high_u16(uint16x8_t __p0_523) { |
| | 50631 | uint32x4_t __ret_523; |
| | 50632 | uint16x4_t __a1_523 = __noswap_vget_high_u16(__p0_523); |
| | 50633 | __ret_523 = (uint32x4_t)(__noswap_vshll_n_u16(__a1_523, 0)); |
| | 50634 | return __ret_523; |
| 49731 | } | 50635 | } |
| 49732 | #endif | 50636 | #endif |
| 49733 | | 50637 | |
| 49734 | #ifdef __LITTLE_ENDIAN__ | 50638 | #ifdef __LITTLE_ENDIAN__ |
| 49735 | __ai uint32x4_t vclezq_f32(float32x4_t __p0) { | 50639 | __ai int16x8_t vmovl_high_s8(int8x16_t __p0_524) { |
| 49736 | uint32x4_t __ret; | 50640 | int16x8_t __ret_524; |
| 49737 | __ret = (uint32x4_t) __builtin_neon_vclezq_v((int8x16_t)__p0, 50); | 50641 | int8x8_t __a1_524 = vget_high_s8(__p0_524); |
| 49738 | return __ret; | 50642 | __ret_524 = (int16x8_t)(vshll_n_s8(__a1_524, 0)); |
| | 50643 | return __ret_524; |
| 49739 | } | 50644 | } |
| 49740 | #else | 50645 | #else |
| 49741 | __ai uint32x4_t vclezq_f32(float32x4_t __p0) { | 50646 | __ai int16x8_t vmovl_high_s8(int8x16_t __p0_525) { |
| 49742 | uint32x4_t __ret; | 50647 | int16x8_t __ret_525; |
| 49743 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 50648 | int8x16_t __rev0_525; __rev0_525 = __builtin_shufflevector(__p0_525, __p0_525, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 49744 | __ret = (uint32x4_t) __builtin_neon_vclezq_v((int8x16_t)__rev0, 50); | 50649 | int8x8_t __a1_525 = __noswap_vget_high_s8(__rev0_525); |
| 49745 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 50650 | __ret_525 = (int16x8_t)(__noswap_vshll_n_s8(__a1_525, 0)); |
| 49746 | return __ret; | 50651 | __ret_525 = __builtin_shufflevector(__ret_525, __ret_525, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 50652 | return __ret_525; |
| | 50653 | } |
| | 50654 | __ai int16x8_t __noswap_vmovl_high_s8(int8x16_t __p0_526) { |
| | 50655 | int16x8_t __ret_526; |
| | 50656 | int8x8_t __a1_526 = __noswap_vget_high_s8(__p0_526); |
| | 50657 | __ret_526 = (int16x8_t)(__noswap_vshll_n_s8(__a1_526, 0)); |
| | 50658 | return __ret_526; |
| 49747 | } | 50659 | } |
| 49748 | #endif | 50660 | #endif |
| 49749 | | 50661 | |
| 49750 | #ifdef __LITTLE_ENDIAN__ | 50662 | #ifdef __LITTLE_ENDIAN__ |
| 49751 | __ai uint32x4_t vclezq_s32(int32x4_t __p0) { | 50663 | __ai int64x2_t vmovl_high_s32(int32x4_t __p0_527) { |
| 49752 | uint32x4_t __ret; | 50664 | int64x2_t __ret_527; |
| 49753 | __ret = (uint32x4_t) __builtin_neon_vclezq_v((int8x16_t)__p0, 50); | 50665 | int32x2_t __a1_527 = vget_high_s32(__p0_527); |
| 49754 | return __ret; | 50666 | __ret_527 = (int64x2_t)(vshll_n_s32(__a1_527, 0)); |
| | 50667 | return __ret_527; |
| 49755 | } | 50668 | } |
| 49756 | #else | 50669 | #else |
| 49757 | __ai uint32x4_t vclezq_s32(int32x4_t __p0) { | 50670 | __ai int64x2_t vmovl_high_s32(int32x4_t __p0_528) { |
| 49758 | uint32x4_t __ret; | 50671 | int64x2_t __ret_528; |
| 49759 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 50672 | int32x4_t __rev0_528; __rev0_528 = __builtin_shufflevector(__p0_528, __p0_528, 3, 2, 1, 0); |
| 49760 | __ret = (uint32x4_t) __builtin_neon_vclezq_v((int8x16_t)__rev0, 50); | 50673 | int32x2_t __a1_528 = __noswap_vget_high_s32(__rev0_528); |
| 49761 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 50674 | __ret_528 = (int64x2_t)(__noswap_vshll_n_s32(__a1_528, 0)); |
| 49762 | return __ret; | 50675 | __ret_528 = __builtin_shufflevector(__ret_528, __ret_528, 1, 0); |
| | 50676 | return __ret_528; |
| | 50677 | } |
| | 50678 | __ai int64x2_t __noswap_vmovl_high_s32(int32x4_t __p0_529) { |
| | 50679 | int64x2_t __ret_529; |
| | 50680 | int32x2_t __a1_529 = __noswap_vget_high_s32(__p0_529); |
| | 50681 | __ret_529 = (int64x2_t)(__noswap_vshll_n_s32(__a1_529, 0)); |
| | 50682 | return __ret_529; |
| 49763 | } | 50683 | } |
| 49764 | #endif | 50684 | #endif |
| 49765 | | 50685 | |
| 49766 | #ifdef __LITTLE_ENDIAN__ | 50686 | #ifdef __LITTLE_ENDIAN__ |
| 49767 | __ai uint64x2_t vclezq_s64(int64x2_t __p0) { | 50687 | __ai int32x4_t vmovl_high_s16(int16x8_t __p0_530) { |
| 49768 | uint64x2_t __ret; | 50688 | int32x4_t __ret_530; |
| 49769 | __ret = (uint64x2_t) __builtin_neon_vclezq_v((int8x16_t)__p0, 51); | 50689 | int16x4_t __a1_530 = vget_high_s16(__p0_530); |
| 49770 | return __ret; | 50690 | __ret_530 = (int32x4_t)(vshll_n_s16(__a1_530, 0)); |
| | 50691 | return __ret_530; |
| 49771 | } | 50692 | } |
| 49772 | #else | 50693 | #else |
| 49773 | __ai uint64x2_t vclezq_s64(int64x2_t __p0) { | 50694 | __ai int32x4_t vmovl_high_s16(int16x8_t __p0_531) { |
| 49774 | uint64x2_t __ret; | 50695 | int32x4_t __ret_531; |
| 49775 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50696 | int16x8_t __rev0_531; __rev0_531 = __builtin_shufflevector(__p0_531, __p0_531, 7, 6, 5, 4, 3, 2, 1, 0); |
| 49776 | __ret = (uint64x2_t) __builtin_neon_vclezq_v((int8x16_t)__rev0, 51); | 50697 | int16x4_t __a1_531 = __noswap_vget_high_s16(__rev0_531); |
| 49777 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50698 | __ret_531 = (int32x4_t)(__noswap_vshll_n_s16(__a1_531, 0)); |
| 49778 | return __ret; | 50699 | __ret_531 = __builtin_shufflevector(__ret_531, __ret_531, 3, 2, 1, 0); |
| | 50700 | return __ret_531; |
| | 50701 | } |
| | 50702 | __ai int32x4_t __noswap_vmovl_high_s16(int16x8_t __p0_532) { |
| | 50703 | int32x4_t __ret_532; |
| | 50704 | int16x4_t __a1_532 = __noswap_vget_high_s16(__p0_532); |
| | 50705 | __ret_532 = (int32x4_t)(__noswap_vshll_n_s16(__a1_532, 0)); |
| | 50706 | return __ret_532; |
| 49779 | } | 50707 | } |
| 49780 | #endif | 50708 | #endif |
| 49781 | | 50709 | |
| 49782 | #ifdef __LITTLE_ENDIAN__ | 50710 | #ifdef __LITTLE_ENDIAN__ |
| 49783 | __ai uint16x8_t vclezq_s16(int16x8_t __p0) { | 50711 | __ai uint16x8_t vmovn_high_u32(uint16x4_t __p0, uint32x4_t __p1) { |
| 49784 | uint16x8_t __ret; | 50712 | uint16x8_t __ret; |
| 49785 | __ret = (uint16x8_t) __builtin_neon_vclezq_v((int8x16_t)__p0, 49); | 50713 | __ret = vcombine_u16(__p0, vmovn_u32(__p1)); |
| 49786 | return __ret; | 50714 | return __ret; |
| 49787 | } | 50715 | } |
| 49788 | #else | 50716 | #else |
| 49789 | __ai uint16x8_t vclezq_s16(int16x8_t __p0) { | 50717 | __ai uint16x8_t vmovn_high_u32(uint16x4_t __p0, uint32x4_t __p1) { |
| 49790 | uint16x8_t __ret; | 50718 | uint16x8_t __ret; |
| 49791 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 50719 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 49792 | __ret = (uint16x8_t) __builtin_neon_vclezq_v((int8x16_t)__rev0, 49); | 50720 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 50721 | __ret = __noswap_vcombine_u16(__rev0, __noswap_vmovn_u32(__rev1)); |
| 49793 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 50722 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 49794 | return __ret; | 50723 | return __ret; |
| 49795 | } | 50724 | } |
| 49796 | #endif | 50725 | #endif |
| 49797 | | 50726 | |
| 49798 | #ifdef __LITTLE_ENDIAN__ | 50727 | #ifdef __LITTLE_ENDIAN__ |
| 49799 | __ai uint8x8_t vclez_s8(int8x8_t __p0) { | 50728 | __ai uint32x4_t vmovn_high_u64(uint32x2_t __p0, uint64x2_t __p1) { |
| 49800 | uint8x8_t __ret; | 50729 | uint32x4_t __ret; |
| 49801 | __ret = (uint8x8_t) __builtin_neon_vclez_v((int8x8_t)__p0, 16); | 50730 | __ret = vcombine_u32(__p0, vmovn_u64(__p1)); |
| 49802 | return __ret; | 50731 | return __ret; |
| 49803 | } | 50732 | } |
| 49804 | #else | 50733 | #else |
| 49805 | __ai uint8x8_t vclez_s8(int8x8_t __p0) { | 50734 | __ai uint32x4_t vmovn_high_u64(uint32x2_t __p0, uint64x2_t __p1) { |
| 49806 | uint8x8_t __ret; | 50735 | uint32x4_t __ret; |
| 49807 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 50736 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 49808 | __ret = (uint8x8_t) __builtin_neon_vclez_v((int8x8_t)__rev0, 16); | 50737 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 49809 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 50738 | __ret = __noswap_vcombine_u32(__rev0, __noswap_vmovn_u64(__rev1)); |
| | 50739 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 49810 | return __ret; | 50740 | return __ret; |
| 49811 | } | 50741 | } |
| 49812 | #endif | 50742 | #endif |
| 49813 | | 50743 | |
| 49814 | __ai uint64x1_t vclez_f64(float64x1_t __p0) { | | |
| 49815 | uint64x1_t __ret; | | |
| 49816 | __ret = (uint64x1_t) __builtin_neon_vclez_v((int8x8_t)__p0, 19); | | |
| 49817 | return __ret; | | |
| 49818 | } | | |
| 49819 | #ifdef __LITTLE_ENDIAN__ | 50744 | #ifdef __LITTLE_ENDIAN__ |
| 49820 | __ai uint32x2_t vclez_f32(float32x2_t __p0) { | 50745 | __ai uint8x16_t vmovn_high_u16(uint8x8_t __p0, uint16x8_t __p1) { |
| 49821 | uint32x2_t __ret; | 50746 | uint8x16_t __ret; |
| 49822 | __ret = (uint32x2_t) __builtin_neon_vclez_v((int8x8_t)__p0, 18); | 50747 | __ret = vcombine_u8(__p0, vmovn_u16(__p1)); |
| 49823 | return __ret; | 50748 | return __ret; |
| 49824 | } | 50749 | } |
| 49825 | #else | 50750 | #else |
| 49826 | __ai uint32x2_t vclez_f32(float32x2_t __p0) { | 50751 | __ai uint8x16_t vmovn_high_u16(uint8x8_t __p0, uint16x8_t __p1) { |
| 49827 | uint32x2_t __ret; | 50752 | uint8x16_t __ret; |
| 49828 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50753 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 49829 | __ret = (uint32x2_t) __builtin_neon_vclez_v((int8x8_t)__rev0, 18); | 50754 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 49830 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50755 | __ret = __noswap_vcombine_u8(__rev0, __noswap_vmovn_u16(__rev1)); |
| | 50756 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 49831 | return __ret; | 50757 | return __ret; |
| 49832 | } | 50758 | } |
| 49833 | #endif | 50759 | #endif |
| 49834 | | 50760 | |
| 49835 | #ifdef __LITTLE_ENDIAN__ | 50761 | #ifdef __LITTLE_ENDIAN__ |
| 49836 | __ai uint32x2_t vclez_s32(int32x2_t __p0) { | 50762 | __ai int16x8_t vmovn_high_s32(int16x4_t __p0, int32x4_t __p1) { |
| 49837 | uint32x2_t __ret; | 50763 | int16x8_t __ret; |
| 49838 | __ret = (uint32x2_t) __builtin_neon_vclez_v((int8x8_t)__p0, 18); | 50764 | __ret = vcombine_s16(__p0, vmovn_s32(__p1)); |
| 49839 | return __ret; | 50765 | return __ret; |
| 49840 | } | 50766 | } |
| 49841 | #else | 50767 | #else |
| 49842 | __ai uint32x2_t vclez_s32(int32x2_t __p0) { | 50768 | __ai int16x8_t vmovn_high_s32(int16x4_t __p0, int32x4_t __p1) { |
| 49843 | uint32x2_t __ret; | 50769 | int16x8_t __ret; |
| 49844 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50770 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 49845 | __ret = (uint32x2_t) __builtin_neon_vclez_v((int8x8_t)__rev0, 18); | 50771 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 49846 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50772 | __ret = __noswap_vcombine_s16(__rev0, __noswap_vmovn_s32(__rev1)); |
| | 50773 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 49847 | return __ret; | 50774 | return __ret; |
| 49848 | } | 50775 | } |
| 49849 | #endif | 50776 | #endif |
| 49850 | | 50777 | |
| 49851 | __ai uint64x1_t vclez_s64(int64x1_t __p0) { | | |
| 49852 | uint64x1_t __ret; | | |
| 49853 | __ret = (uint64x1_t) __builtin_neon_vclez_v((int8x8_t)__p0, 19); | | |
| 49854 | return __ret; | | |
| 49855 | } | | |
| 49856 | #ifdef __LITTLE_ENDIAN__ | 50778 | #ifdef __LITTLE_ENDIAN__ |
| 49857 | __ai uint16x4_t vclez_s16(int16x4_t __p0) { | 50779 | __ai int32x4_t vmovn_high_s64(int32x2_t __p0, int64x2_t __p1) { |
| 49858 | uint16x4_t __ret; | 50780 | int32x4_t __ret; |
| 49859 | __ret = (uint16x4_t) __builtin_neon_vclez_v((int8x8_t)__p0, 17); | 50781 | __ret = vcombine_s32(__p0, vmovn_s64(__p1)); |
| 49860 | return __ret; | 50782 | return __ret; |
| 49861 | } | 50783 | } |
| 49862 | #else | 50784 | #else |
| 49863 | __ai uint16x4_t vclez_s16(int16x4_t __p0) { | 50785 | __ai int32x4_t vmovn_high_s64(int32x2_t __p0, int64x2_t __p1) { |
| 49864 | uint16x4_t __ret; | 50786 | int32x4_t __ret; |
| 49865 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 50787 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 49866 | __ret = (uint16x4_t) __builtin_neon_vclez_v((int8x8_t)__rev0, 17); | 50788 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 50789 | __ret = __noswap_vcombine_s32(__rev0, __noswap_vmovn_s64(__rev1)); |
| 49867 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 50790 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 49868 | return __ret; | 50791 | return __ret; |
| 49869 | } | 50792 | } |
| 49870 | #endif | 50793 | #endif |
| 49871 | | 50794 | |
| 49872 | __ai uint64_t vclezd_s64(int64_t __p0) { | | |
| 49873 | uint64_t __ret; | | |
| 49874 | __ret = (uint64_t) __builtin_neon_vclezd_s64(__p0); | | |
| 49875 | return __ret; | | |
| 49876 | } | | |
| 49877 | __ai uint64_t vclezd_f64(float64_t __p0) { | | |
| 49878 | uint64_t __ret; | | |
| 49879 | __ret = (uint64_t) __builtin_neon_vclezd_f64(__p0); | | |
| 49880 | return __ret; | | |
| 49881 | } | | |
| 49882 | __ai uint32_t vclezs_f32(float32_t __p0) { | | |
| 49883 | uint32_t __ret; | | |
| 49884 | __ret = (uint32_t) __builtin_neon_vclezs_f32(__p0); | | |
| 49885 | return __ret; | | |
| 49886 | } | | |
| 49887 | #ifdef __LITTLE_ENDIAN__ | 50795 | #ifdef __LITTLE_ENDIAN__ |
| 49888 | __ai uint64x2_t vcltq_u64(uint64x2_t __p0, uint64x2_t __p1) { | 50796 | __ai int8x16_t vmovn_high_s16(int8x8_t __p0, int16x8_t __p1) { |
| 49889 | uint64x2_t __ret; | 50797 | int8x16_t __ret; |
| 49890 | __ret = (uint64x2_t)(__p0 < __p1); | 50798 | __ret = vcombine_s8(__p0, vmovn_s16(__p1)); |
| 49891 | return __ret; | 50799 | return __ret; |
| 49892 | } | 50800 | } |
| 49893 | #else | 50801 | #else |
| 49894 | __ai uint64x2_t vcltq_u64(uint64x2_t __p0, uint64x2_t __p1) { | 50802 | __ai int8x16_t vmovn_high_s16(int8x8_t __p0, int16x8_t __p1) { |
| 49895 | uint64x2_t __ret; | 50803 | int8x16_t __ret; |
| 49896 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50804 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 49897 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 50805 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 49898 | __ret = (uint64x2_t)(__rev0 < __rev1); | 50806 | __ret = __noswap_vcombine_s8(__rev0, __noswap_vmovn_s16(__rev1)); |
| 49899 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50807 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 49900 | return __ret; | 50808 | return __ret; |
| 49901 | } | 50809 | } |
| 49902 | #endif | 50810 | #endif |
| 49903 | | 50811 | |
| 49904 | #ifdef __LITTLE_ENDIAN__ | 50812 | #ifdef __LITTLE_ENDIAN__ |
| 49905 | __ai uint64x2_t vcltq_f64(float64x2_t __p0, float64x2_t __p1) { | 50813 | __ai float64x2_t vmulq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 49906 | uint64x2_t __ret; | 50814 | float64x2_t __ret; |
| 49907 | __ret = (uint64x2_t)(__p0 < __p1); | 50815 | __ret = __p0 * __p1; |
| 49908 | return __ret; | 50816 | return __ret; |
| 49909 | } | 50817 | } |
| 49910 | #else | 50818 | #else |
| 49911 | __ai uint64x2_t vcltq_f64(float64x2_t __p0, float64x2_t __p1) { | 50819 | __ai float64x2_t vmulq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 49912 | uint64x2_t __ret; | 50820 | float64x2_t __ret; |
| 49913 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50821 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 49914 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 50822 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 49915 | __ret = (uint64x2_t)(__rev0 < __rev1); | 50823 | __ret = __rev0 * __rev1; |
| 49916 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50824 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 49917 | return __ret; | 50825 | return __ret; |
| 49918 | } | 50826 | } |
| 49919 | #endif | 50827 | #endif |
| 49920 | | 50828 | |
| 49921 | #ifdef __LITTLE_ENDIAN__ | 50829 | __ai float64x1_t vmul_f64(float64x1_t __p0, float64x1_t __p1) { |
| 49922 | __ai uint64x2_t vcltq_s64(int64x2_t __p0, int64x2_t __p1) { | 50830 | float64x1_t __ret; |
| 49923 | uint64x2_t __ret; | 50831 | __ret = __p0 * __p1; |
| 49924 | __ret = (uint64x2_t)(__p0 < __p1); | | |
| 49925 | return __ret; | 50832 | return __ret; |
| 49926 | } | 50833 | } |
| | 50834 | #define vmuld_lane_f64(__p0_533, __p1_533, __p2_533) __extension__ ({ \ |
| | 50835 | float64_t __ret_533; \ |
| | 50836 | float64_t __s0_533 = __p0_533; \ |
| | 50837 | float64x1_t __s1_533 = __p1_533; \ |
| | 50838 | __ret_533 = __s0_533 * vget_lane_f64(__s1_533, __p2_533); \ |
| | 50839 | __ret_533; \ |
| | 50840 | }) |
| | 50841 | #ifdef __LITTLE_ENDIAN__ |
| | 50842 | #define vmuls_lane_f32(__p0_534, __p1_534, __p2_534) __extension__ ({ \ |
| | 50843 | float32_t __ret_534; \ |
| | 50844 | float32_t __s0_534 = __p0_534; \ |
| | 50845 | float32x2_t __s1_534 = __p1_534; \ |
| | 50846 | __ret_534 = __s0_534 * vget_lane_f32(__s1_534, __p2_534); \ |
| | 50847 | __ret_534; \ |
| | 50848 | }) |
| 49927 | #else | 50849 | #else |
| 49928 | __ai uint64x2_t vcltq_s64(int64x2_t __p0, int64x2_t __p1) { | 50850 | #define vmuls_lane_f32(__p0_535, __p1_535, __p2_535) __extension__ ({ \ |
| 49929 | uint64x2_t __ret; | 50851 | float32_t __ret_535; \ |
| 49930 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50852 | float32_t __s0_535 = __p0_535; \ |
| 49931 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 50853 | float32x2_t __s1_535 = __p1_535; \ |
| 49932 | __ret = (uint64x2_t)(__rev0 < __rev1); | 50854 | float32x2_t __rev1_535; __rev1_535 = __builtin_shufflevector(__s1_535, __s1_535, 1, 0); \ |
| 49933 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 50855 | __ret_535 = __s0_535 * __noswap_vget_lane_f32(__rev1_535, __p2_535); \ |
| 49934 | return __ret; | 50856 | __ret_535; \ |
| 49935 | } | 50857 | }) |
| 49936 | #endif | 50858 | #endif |
| 49937 | | 50859 | |
| 49938 | __ai uint64x1_t vclt_u64(uint64x1_t __p0, uint64x1_t __p1) { | 50860 | #define vmul_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 49939 | uint64x1_t __ret; | 50861 | float64x1_t __ret; \ |
| 49940 | __ret = (uint64x1_t)(__p0 < __p1); | 50862 | float64x1_t __s0 = __p0; \ |
| 49941 | return __ret; | 50863 | float64x1_t __s1 = __p1; \ |
| 49942 | } | 50864 | __ret = (float64x1_t) __builtin_neon_vmul_lane_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 10); \ |
| 49943 | __ai uint64x1_t vclt_f64(float64x1_t __p0, float64x1_t __p1) { | 50865 | __ret; \ |
| 49944 | uint64x1_t __ret; | 50866 | }) |
| 49945 | __ret = (uint64x1_t)(__p0 < __p1); | 50867 | #ifdef __LITTLE_ENDIAN__ |
| 49946 | return __ret; | 50868 | #define vmulq_lane_f64(__p0_536, __p1_536, __p2_536) __extension__ ({ \ |
| 49947 | } | 50869 | float64x2_t __ret_536; \ |
| 49948 | __ai uint64x1_t vclt_s64(int64x1_t __p0, int64x1_t __p1) { | 50870 | float64x2_t __s0_536 = __p0_536; \ |
| 49949 | uint64x1_t __ret; | 50871 | float64x1_t __s1_536 = __p1_536; \ |
| 49950 | __ret = (uint64x1_t)(__p0 < __p1); | 50872 | __ret_536 = __s0_536 * splatq_lane_f64(__s1_536, __p2_536); \ |
| | 50873 | __ret_536; \ |
| | 50874 | }) |
| | 50875 | #else |
| | 50876 | #define vmulq_lane_f64(__p0_537, __p1_537, __p2_537) __extension__ ({ \ |
| | 50877 | float64x2_t __ret_537; \ |
| | 50878 | float64x2_t __s0_537 = __p0_537; \ |
| | 50879 | float64x1_t __s1_537 = __p1_537; \ |
| | 50880 | float64x2_t __rev0_537; __rev0_537 = __builtin_shufflevector(__s0_537, __s0_537, 1, 0); \ |
| | 50881 | __ret_537 = __rev0_537 * __noswap_splatq_lane_f64(__s1_537, __p2_537); \ |
| | 50882 | __ret_537 = __builtin_shufflevector(__ret_537, __ret_537, 1, 0); \ |
| | 50883 | __ret_537; \ |
| | 50884 | }) |
| | 50885 | #endif |
| | 50886 | |
| | 50887 | #ifdef __LITTLE_ENDIAN__ |
| | 50888 | #define vmuld_laneq_f64(__p0_538, __p1_538, __p2_538) __extension__ ({ \ |
| | 50889 | float64_t __ret_538; \ |
| | 50890 | float64_t __s0_538 = __p0_538; \ |
| | 50891 | float64x2_t __s1_538 = __p1_538; \ |
| | 50892 | __ret_538 = __s0_538 * vgetq_lane_f64(__s1_538, __p2_538); \ |
| | 50893 | __ret_538; \ |
| | 50894 | }) |
| | 50895 | #else |
| | 50896 | #define vmuld_laneq_f64(__p0_539, __p1_539, __p2_539) __extension__ ({ \ |
| | 50897 | float64_t __ret_539; \ |
| | 50898 | float64_t __s0_539 = __p0_539; \ |
| | 50899 | float64x2_t __s1_539 = __p1_539; \ |
| | 50900 | float64x2_t __rev1_539; __rev1_539 = __builtin_shufflevector(__s1_539, __s1_539, 1, 0); \ |
| | 50901 | __ret_539 = __s0_539 * __noswap_vgetq_lane_f64(__rev1_539, __p2_539); \ |
| | 50902 | __ret_539; \ |
| | 50903 | }) |
| | 50904 | #endif |
| | 50905 | |
| | 50906 | #ifdef __LITTLE_ENDIAN__ |
| | 50907 | #define vmuls_laneq_f32(__p0_540, __p1_540, __p2_540) __extension__ ({ \ |
| | 50908 | float32_t __ret_540; \ |
| | 50909 | float32_t __s0_540 = __p0_540; \ |
| | 50910 | float32x4_t __s1_540 = __p1_540; \ |
| | 50911 | __ret_540 = __s0_540 * vgetq_lane_f32(__s1_540, __p2_540); \ |
| | 50912 | __ret_540; \ |
| | 50913 | }) |
| | 50914 | #else |
| | 50915 | #define vmuls_laneq_f32(__p0_541, __p1_541, __p2_541) __extension__ ({ \ |
| | 50916 | float32_t __ret_541; \ |
| | 50917 | float32_t __s0_541 = __p0_541; \ |
| | 50918 | float32x4_t __s1_541 = __p1_541; \ |
| | 50919 | float32x4_t __rev1_541; __rev1_541 = __builtin_shufflevector(__s1_541, __s1_541, 3, 2, 1, 0); \ |
| | 50920 | __ret_541 = __s0_541 * __noswap_vgetq_lane_f32(__rev1_541, __p2_541); \ |
| | 50921 | __ret_541; \ |
| | 50922 | }) |
| | 50923 | #endif |
| | 50924 | |
| | 50925 | #ifdef __LITTLE_ENDIAN__ |
| | 50926 | #define vmul_laneq_f64(__p0, __p1, __p2) __extension__ ({ \ |
| | 50927 | float64x1_t __ret; \ |
| | 50928 | float64x1_t __s0 = __p0; \ |
| | 50929 | float64x2_t __s1 = __p1; \ |
| | 50930 | __ret = (float64x1_t) __builtin_neon_vmul_laneq_v((int8x8_t)__s0, (int8x16_t)__s1, __p2, 10); \ |
| | 50931 | __ret; \ |
| | 50932 | }) |
| | 50933 | #else |
| | 50934 | #define vmul_laneq_f64(__p0, __p1, __p2) __extension__ ({ \ |
| | 50935 | float64x1_t __ret; \ |
| | 50936 | float64x1_t __s0 = __p0; \ |
| | 50937 | float64x2_t __s1 = __p1; \ |
| | 50938 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| | 50939 | __ret = (float64x1_t) __builtin_neon_vmul_laneq_v((int8x8_t)__s0, (int8x16_t)__rev1, __p2, 10); \ |
| | 50940 | __ret; \ |
| | 50941 | }) |
| | 50942 | #endif |
| | 50943 | |
| | 50944 | #ifdef __LITTLE_ENDIAN__ |
| | 50945 | #define vmulq_laneq_u32(__p0_542, __p1_542, __p2_542) __extension__ ({ \ |
| | 50946 | uint32x4_t __ret_542; \ |
| | 50947 | uint32x4_t __s0_542 = __p0_542; \ |
| | 50948 | uint32x4_t __s1_542 = __p1_542; \ |
| | 50949 | __ret_542 = __s0_542 * splatq_laneq_u32(__s1_542, __p2_542); \ |
| | 50950 | __ret_542; \ |
| | 50951 | }) |
| | 50952 | #else |
| | 50953 | #define vmulq_laneq_u32(__p0_543, __p1_543, __p2_543) __extension__ ({ \ |
| | 50954 | uint32x4_t __ret_543; \ |
| | 50955 | uint32x4_t __s0_543 = __p0_543; \ |
| | 50956 | uint32x4_t __s1_543 = __p1_543; \ |
| | 50957 | uint32x4_t __rev0_543; __rev0_543 = __builtin_shufflevector(__s0_543, __s0_543, 3, 2, 1, 0); \ |
| | 50958 | uint32x4_t __rev1_543; __rev1_543 = __builtin_shufflevector(__s1_543, __s1_543, 3, 2, 1, 0); \ |
| | 50959 | __ret_543 = __rev0_543 * __noswap_splatq_laneq_u32(__rev1_543, __p2_543); \ |
| | 50960 | __ret_543 = __builtin_shufflevector(__ret_543, __ret_543, 3, 2, 1, 0); \ |
| | 50961 | __ret_543; \ |
| | 50962 | }) |
| | 50963 | #endif |
| | 50964 | |
| | 50965 | #ifdef __LITTLE_ENDIAN__ |
| | 50966 | #define vmulq_laneq_u16(__p0_544, __p1_544, __p2_544) __extension__ ({ \ |
| | 50967 | uint16x8_t __ret_544; \ |
| | 50968 | uint16x8_t __s0_544 = __p0_544; \ |
| | 50969 | uint16x8_t __s1_544 = __p1_544; \ |
| | 50970 | __ret_544 = __s0_544 * splatq_laneq_u16(__s1_544, __p2_544); \ |
| | 50971 | __ret_544; \ |
| | 50972 | }) |
| | 50973 | #else |
| | 50974 | #define vmulq_laneq_u16(__p0_545, __p1_545, __p2_545) __extension__ ({ \ |
| | 50975 | uint16x8_t __ret_545; \ |
| | 50976 | uint16x8_t __s0_545 = __p0_545; \ |
| | 50977 | uint16x8_t __s1_545 = __p1_545; \ |
| | 50978 | uint16x8_t __rev0_545; __rev0_545 = __builtin_shufflevector(__s0_545, __s0_545, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50979 | uint16x8_t __rev1_545; __rev1_545 = __builtin_shufflevector(__s1_545, __s1_545, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50980 | __ret_545 = __rev0_545 * __noswap_splatq_laneq_u16(__rev1_545, __p2_545); \ |
| | 50981 | __ret_545 = __builtin_shufflevector(__ret_545, __ret_545, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 50982 | __ret_545; \ |
| | 50983 | }) |
| | 50984 | #endif |
| | 50985 | |
| | 50986 | #ifdef __LITTLE_ENDIAN__ |
| | 50987 | #define vmulq_laneq_f64(__p0_546, __p1_546, __p2_546) __extension__ ({ \ |
| | 50988 | float64x2_t __ret_546; \ |
| | 50989 | float64x2_t __s0_546 = __p0_546; \ |
| | 50990 | float64x2_t __s1_546 = __p1_546; \ |
| | 50991 | __ret_546 = __s0_546 * splatq_laneq_f64(__s1_546, __p2_546); \ |
| | 50992 | __ret_546; \ |
| | 50993 | }) |
| | 50994 | #else |
| | 50995 | #define vmulq_laneq_f64(__p0_547, __p1_547, __p2_547) __extension__ ({ \ |
| | 50996 | float64x2_t __ret_547; \ |
| | 50997 | float64x2_t __s0_547 = __p0_547; \ |
| | 50998 | float64x2_t __s1_547 = __p1_547; \ |
| | 50999 | float64x2_t __rev0_547; __rev0_547 = __builtin_shufflevector(__s0_547, __s0_547, 1, 0); \ |
| | 51000 | float64x2_t __rev1_547; __rev1_547 = __builtin_shufflevector(__s1_547, __s1_547, 1, 0); \ |
| | 51001 | __ret_547 = __rev0_547 * __noswap_splatq_laneq_f64(__rev1_547, __p2_547); \ |
| | 51002 | __ret_547 = __builtin_shufflevector(__ret_547, __ret_547, 1, 0); \ |
| | 51003 | __ret_547; \ |
| | 51004 | }) |
| | 51005 | #endif |
| | 51006 | |
| | 51007 | #ifdef __LITTLE_ENDIAN__ |
| | 51008 | #define vmulq_laneq_f32(__p0_548, __p1_548, __p2_548) __extension__ ({ \ |
| | 51009 | float32x4_t __ret_548; \ |
| | 51010 | float32x4_t __s0_548 = __p0_548; \ |
| | 51011 | float32x4_t __s1_548 = __p1_548; \ |
| | 51012 | __ret_548 = __s0_548 * splatq_laneq_f32(__s1_548, __p2_548); \ |
| | 51013 | __ret_548; \ |
| | 51014 | }) |
| | 51015 | #else |
| | 51016 | #define vmulq_laneq_f32(__p0_549, __p1_549, __p2_549) __extension__ ({ \ |
| | 51017 | float32x4_t __ret_549; \ |
| | 51018 | float32x4_t __s0_549 = __p0_549; \ |
| | 51019 | float32x4_t __s1_549 = __p1_549; \ |
| | 51020 | float32x4_t __rev0_549; __rev0_549 = __builtin_shufflevector(__s0_549, __s0_549, 3, 2, 1, 0); \ |
| | 51021 | float32x4_t __rev1_549; __rev1_549 = __builtin_shufflevector(__s1_549, __s1_549, 3, 2, 1, 0); \ |
| | 51022 | __ret_549 = __rev0_549 * __noswap_splatq_laneq_f32(__rev1_549, __p2_549); \ |
| | 51023 | __ret_549 = __builtin_shufflevector(__ret_549, __ret_549, 3, 2, 1, 0); \ |
| | 51024 | __ret_549; \ |
| | 51025 | }) |
| | 51026 | #endif |
| | 51027 | |
| | 51028 | #ifdef __LITTLE_ENDIAN__ |
| | 51029 | #define vmulq_laneq_s32(__p0_550, __p1_550, __p2_550) __extension__ ({ \ |
| | 51030 | int32x4_t __ret_550; \ |
| | 51031 | int32x4_t __s0_550 = __p0_550; \ |
| | 51032 | int32x4_t __s1_550 = __p1_550; \ |
| | 51033 | __ret_550 = __s0_550 * splatq_laneq_s32(__s1_550, __p2_550); \ |
| | 51034 | __ret_550; \ |
| | 51035 | }) |
| | 51036 | #else |
| | 51037 | #define vmulq_laneq_s32(__p0_551, __p1_551, __p2_551) __extension__ ({ \ |
| | 51038 | int32x4_t __ret_551; \ |
| | 51039 | int32x4_t __s0_551 = __p0_551; \ |
| | 51040 | int32x4_t __s1_551 = __p1_551; \ |
| | 51041 | int32x4_t __rev0_551; __rev0_551 = __builtin_shufflevector(__s0_551, __s0_551, 3, 2, 1, 0); \ |
| | 51042 | int32x4_t __rev1_551; __rev1_551 = __builtin_shufflevector(__s1_551, __s1_551, 3, 2, 1, 0); \ |
| | 51043 | __ret_551 = __rev0_551 * __noswap_splatq_laneq_s32(__rev1_551, __p2_551); \ |
| | 51044 | __ret_551 = __builtin_shufflevector(__ret_551, __ret_551, 3, 2, 1, 0); \ |
| | 51045 | __ret_551; \ |
| | 51046 | }) |
| | 51047 | #endif |
| | 51048 | |
| | 51049 | #ifdef __LITTLE_ENDIAN__ |
| | 51050 | #define vmulq_laneq_s16(__p0_552, __p1_552, __p2_552) __extension__ ({ \ |
| | 51051 | int16x8_t __ret_552; \ |
| | 51052 | int16x8_t __s0_552 = __p0_552; \ |
| | 51053 | int16x8_t __s1_552 = __p1_552; \ |
| | 51054 | __ret_552 = __s0_552 * splatq_laneq_s16(__s1_552, __p2_552); \ |
| | 51055 | __ret_552; \ |
| | 51056 | }) |
| | 51057 | #else |
| | 51058 | #define vmulq_laneq_s16(__p0_553, __p1_553, __p2_553) __extension__ ({ \ |
| | 51059 | int16x8_t __ret_553; \ |
| | 51060 | int16x8_t __s0_553 = __p0_553; \ |
| | 51061 | int16x8_t __s1_553 = __p1_553; \ |
| | 51062 | int16x8_t __rev0_553; __rev0_553 = __builtin_shufflevector(__s0_553, __s0_553, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 51063 | int16x8_t __rev1_553; __rev1_553 = __builtin_shufflevector(__s1_553, __s1_553, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 51064 | __ret_553 = __rev0_553 * __noswap_splatq_laneq_s16(__rev1_553, __p2_553); \ |
| | 51065 | __ret_553 = __builtin_shufflevector(__ret_553, __ret_553, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 51066 | __ret_553; \ |
| | 51067 | }) |
| | 51068 | #endif |
| | 51069 | |
| | 51070 | #ifdef __LITTLE_ENDIAN__ |
| | 51071 | #define vmul_laneq_u32(__p0_554, __p1_554, __p2_554) __extension__ ({ \ |
| | 51072 | uint32x2_t __ret_554; \ |
| | 51073 | uint32x2_t __s0_554 = __p0_554; \ |
| | 51074 | uint32x4_t __s1_554 = __p1_554; \ |
| | 51075 | __ret_554 = __s0_554 * splat_laneq_u32(__s1_554, __p2_554); \ |
| | 51076 | __ret_554; \ |
| | 51077 | }) |
| | 51078 | #else |
| | 51079 | #define vmul_laneq_u32(__p0_555, __p1_555, __p2_555) __extension__ ({ \ |
| | 51080 | uint32x2_t __ret_555; \ |
| | 51081 | uint32x2_t __s0_555 = __p0_555; \ |
| | 51082 | uint32x4_t __s1_555 = __p1_555; \ |
| | 51083 | uint32x2_t __rev0_555; __rev0_555 = __builtin_shufflevector(__s0_555, __s0_555, 1, 0); \ |
| | 51084 | uint32x4_t __rev1_555; __rev1_555 = __builtin_shufflevector(__s1_555, __s1_555, 3, 2, 1, 0); \ |
| | 51085 | __ret_555 = __rev0_555 * __noswap_splat_laneq_u32(__rev1_555, __p2_555); \ |
| | 51086 | __ret_555 = __builtin_shufflevector(__ret_555, __ret_555, 1, 0); \ |
| | 51087 | __ret_555; \ |
| | 51088 | }) |
| | 51089 | #endif |
| | 51090 | |
| | 51091 | #ifdef __LITTLE_ENDIAN__ |
| | 51092 | #define vmul_laneq_u16(__p0_556, __p1_556, __p2_556) __extension__ ({ \ |
| | 51093 | uint16x4_t __ret_556; \ |
| | 51094 | uint16x4_t __s0_556 = __p0_556; \ |
| | 51095 | uint16x8_t __s1_556 = __p1_556; \ |
| | 51096 | __ret_556 = __s0_556 * splat_laneq_u16(__s1_556, __p2_556); \ |
| | 51097 | __ret_556; \ |
| | 51098 | }) |
| | 51099 | #else |
| | 51100 | #define vmul_laneq_u16(__p0_557, __p1_557, __p2_557) __extension__ ({ \ |
| | 51101 | uint16x4_t __ret_557; \ |
| | 51102 | uint16x4_t __s0_557 = __p0_557; \ |
| | 51103 | uint16x8_t __s1_557 = __p1_557; \ |
| | 51104 | uint16x4_t __rev0_557; __rev0_557 = __builtin_shufflevector(__s0_557, __s0_557, 3, 2, 1, 0); \ |
| | 51105 | uint16x8_t __rev1_557; __rev1_557 = __builtin_shufflevector(__s1_557, __s1_557, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 51106 | __ret_557 = __rev0_557 * __noswap_splat_laneq_u16(__rev1_557, __p2_557); \ |
| | 51107 | __ret_557 = __builtin_shufflevector(__ret_557, __ret_557, 3, 2, 1, 0); \ |
| | 51108 | __ret_557; \ |
| | 51109 | }) |
| | 51110 | #endif |
| | 51111 | |
| | 51112 | #ifdef __LITTLE_ENDIAN__ |
| | 51113 | #define vmul_laneq_f32(__p0_558, __p1_558, __p2_558) __extension__ ({ \ |
| | 51114 | float32x2_t __ret_558; \ |
| | 51115 | float32x2_t __s0_558 = __p0_558; \ |
| | 51116 | float32x4_t __s1_558 = __p1_558; \ |
| | 51117 | __ret_558 = __s0_558 * splat_laneq_f32(__s1_558, __p2_558); \ |
| | 51118 | __ret_558; \ |
| | 51119 | }) |
| | 51120 | #else |
| | 51121 | #define vmul_laneq_f32(__p0_559, __p1_559, __p2_559) __extension__ ({ \ |
| | 51122 | float32x2_t __ret_559; \ |
| | 51123 | float32x2_t __s0_559 = __p0_559; \ |
| | 51124 | float32x4_t __s1_559 = __p1_559; \ |
| | 51125 | float32x2_t __rev0_559; __rev0_559 = __builtin_shufflevector(__s0_559, __s0_559, 1, 0); \ |
| | 51126 | float32x4_t __rev1_559; __rev1_559 = __builtin_shufflevector(__s1_559, __s1_559, 3, 2, 1, 0); \ |
| | 51127 | __ret_559 = __rev0_559 * __noswap_splat_laneq_f32(__rev1_559, __p2_559); \ |
| | 51128 | __ret_559 = __builtin_shufflevector(__ret_559, __ret_559, 1, 0); \ |
| | 51129 | __ret_559; \ |
| | 51130 | }) |
| | 51131 | #endif |
| | 51132 | |
| | 51133 | #ifdef __LITTLE_ENDIAN__ |
| | 51134 | #define vmul_laneq_s32(__p0_560, __p1_560, __p2_560) __extension__ ({ \ |
| | 51135 | int32x2_t __ret_560; \ |
| | 51136 | int32x2_t __s0_560 = __p0_560; \ |
| | 51137 | int32x4_t __s1_560 = __p1_560; \ |
| | 51138 | __ret_560 = __s0_560 * splat_laneq_s32(__s1_560, __p2_560); \ |
| | 51139 | __ret_560; \ |
| | 51140 | }) |
| | 51141 | #else |
| | 51142 | #define vmul_laneq_s32(__p0_561, __p1_561, __p2_561) __extension__ ({ \ |
| | 51143 | int32x2_t __ret_561; \ |
| | 51144 | int32x2_t __s0_561 = __p0_561; \ |
| | 51145 | int32x4_t __s1_561 = __p1_561; \ |
| | 51146 | int32x2_t __rev0_561; __rev0_561 = __builtin_shufflevector(__s0_561, __s0_561, 1, 0); \ |
| | 51147 | int32x4_t __rev1_561; __rev1_561 = __builtin_shufflevector(__s1_561, __s1_561, 3, 2, 1, 0); \ |
| | 51148 | __ret_561 = __rev0_561 * __noswap_splat_laneq_s32(__rev1_561, __p2_561); \ |
| | 51149 | __ret_561 = __builtin_shufflevector(__ret_561, __ret_561, 1, 0); \ |
| | 51150 | __ret_561; \ |
| | 51151 | }) |
| | 51152 | #endif |
| | 51153 | |
| | 51154 | #ifdef __LITTLE_ENDIAN__ |
| | 51155 | #define vmul_laneq_s16(__p0_562, __p1_562, __p2_562) __extension__ ({ \ |
| | 51156 | int16x4_t __ret_562; \ |
| | 51157 | int16x4_t __s0_562 = __p0_562; \ |
| | 51158 | int16x8_t __s1_562 = __p1_562; \ |
| | 51159 | __ret_562 = __s0_562 * splat_laneq_s16(__s1_562, __p2_562); \ |
| | 51160 | __ret_562; \ |
| | 51161 | }) |
| | 51162 | #else |
| | 51163 | #define vmul_laneq_s16(__p0_563, __p1_563, __p2_563) __extension__ ({ \ |
| | 51164 | int16x4_t __ret_563; \ |
| | 51165 | int16x4_t __s0_563 = __p0_563; \ |
| | 51166 | int16x8_t __s1_563 = __p1_563; \ |
| | 51167 | int16x4_t __rev0_563; __rev0_563 = __builtin_shufflevector(__s0_563, __s0_563, 3, 2, 1, 0); \ |
| | 51168 | int16x8_t __rev1_563; __rev1_563 = __builtin_shufflevector(__s1_563, __s1_563, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 51169 | __ret_563 = __rev0_563 * __noswap_splat_laneq_s16(__rev1_563, __p2_563); \ |
| | 51170 | __ret_563 = __builtin_shufflevector(__ret_563, __ret_563, 3, 2, 1, 0); \ |
| | 51171 | __ret_563; \ |
| | 51172 | }) |
| | 51173 | #endif |
| | 51174 | |
| | 51175 | __ai float64x1_t vmul_n_f64(float64x1_t __p0, float64_t __p1) { |
| | 51176 | float64x1_t __ret; |
| | 51177 | __ret = (float64x1_t) __builtin_neon_vmul_n_f64((float64x1_t)__p0, __p1); |
| 49951 | return __ret; | 51178 | return __ret; |
| 49952 | } | 51179 | } |
| 49953 | __ai uint64_t vcltd_u64(uint64_t __p0, uint64_t __p1) { | 51180 | #ifdef __LITTLE_ENDIAN__ |
| 49954 | uint64_t __ret; | 51181 | __ai float64x2_t vmulq_n_f64(float64x2_t __p0, float64_t __p1) { |
| 49955 | __ret = (uint64_t) __builtin_neon_vcltd_u64(__p0, __p1); | 51182 | float64x2_t __ret; |
| | 51183 | __ret = __p0 * (float64x2_t) {__p1, __p1}; |
| 49956 | return __ret; | 51184 | return __ret; |
| 49957 | } | 51185 | } |
| 49958 | __ai uint64_t vcltd_s64(int64_t __p0, int64_t __p1) { | 51186 | #else |
| 49959 | uint64_t __ret; | 51187 | __ai float64x2_t vmulq_n_f64(float64x2_t __p0, float64_t __p1) { |
| 49960 | __ret = (uint64_t) __builtin_neon_vcltd_s64(__p0, __p1); | 51188 | float64x2_t __ret; |
| | 51189 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 51190 | __ret = __rev0 * (float64x2_t) {__p1, __p1}; |
| | 51191 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 49961 | return __ret; | 51192 | return __ret; |
| 49962 | } | 51193 | } |
| 49963 | __ai uint64_t vcltd_f64(float64_t __p0, float64_t __p1) { | 51194 | #endif |
| 49964 | uint64_t __ret; | 51195 | |
| 49965 | __ret = (uint64_t) __builtin_neon_vcltd_f64(__p0, __p1); | 51196 | #ifdef __LITTLE_ENDIAN__ |
| | 51197 | __ai poly16x8_t vmull_high_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| | 51198 | poly16x8_t __ret; |
| | 51199 | __ret = vmull_p8(vget_high_p8(__p0), vget_high_p8(__p1)); |
| 49966 | return __ret; | 51200 | return __ret; |
| 49967 | } | 51201 | } |
| 49968 | __ai uint32_t vclts_f32(float32_t __p0, float32_t __p1) { | 51202 | #else |
| 49969 | uint32_t __ret; | 51203 | __ai poly16x8_t vmull_high_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| 49970 | __ret = (uint32_t) __builtin_neon_vclts_f32(__p0, __p1); | 51204 | poly16x8_t __ret; |
| | 51205 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 51206 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 51207 | __ret = __noswap_vmull_p8(__noswap_vget_high_p8(__rev0), __noswap_vget_high_p8(__rev1)); |
| | 51208 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 49971 | return __ret; | 51209 | return __ret; |
| 49972 | } | 51210 | } |
| | 51211 | #endif |
| | 51212 | |
| 49973 | #ifdef __LITTLE_ENDIAN__ | 51213 | #ifdef __LITTLE_ENDIAN__ |
| 49974 | __ai uint8x16_t vcltzq_s8(int8x16_t __p0) { | 51214 | __ai uint16x8_t vmull_high_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 49975 | uint8x16_t __ret; | 51215 | uint16x8_t __ret; |
| 49976 | __ret = (uint8x16_t) __builtin_neon_vcltzq_v((int8x16_t)__p0, 48); | 51216 | __ret = vmull_u8(vget_high_u8(__p0), vget_high_u8(__p1)); |
| 49977 | return __ret; | 51217 | return __ret; |
| 49978 | } | 51218 | } |
| 49979 | #else | 51219 | #else |
| 49980 | __ai uint8x16_t vcltzq_s8(int8x16_t __p0) { | 51220 | __ai uint16x8_t vmull_high_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 49981 | uint8x16_t __ret; | 51221 | uint16x8_t __ret; |
| 49982 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 51222 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 49983 | __ret = (uint8x16_t) __builtin_neon_vcltzq_v((int8x16_t)__rev0, 48); | 51223 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 49984 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 51224 | __ret = __noswap_vmull_u8(__noswap_vget_high_u8(__rev0), __noswap_vget_high_u8(__rev1)); |
| | 51225 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 49985 | return __ret; | 51226 | return __ret; |
| 49986 | } | 51227 | } |
| 49987 | #endif | 51228 | #endif |
| 49988 | | 51229 | |
| 49989 | #ifdef __LITTLE_ENDIAN__ | 51230 | #ifdef __LITTLE_ENDIAN__ |
| 49990 | __ai uint64x2_t vcltzq_f64(float64x2_t __p0) { | 51231 | __ai uint64x2_t vmull_high_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 49991 | uint64x2_t __ret; | 51232 | uint64x2_t __ret; |
| 49992 | __ret = (uint64x2_t) __builtin_neon_vcltzq_v((int8x16_t)__p0, 51); | 51233 | __ret = vmull_u32(vget_high_u32(__p0), vget_high_u32(__p1)); |
| 49993 | return __ret; | 51234 | return __ret; |
| 49994 | } | 51235 | } |
| 49995 | #else | 51236 | #else |
| 49996 | __ai uint64x2_t vcltzq_f64(float64x2_t __p0) { | 51237 | __ai uint64x2_t vmull_high_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 49997 | uint64x2_t __ret; | 51238 | uint64x2_t __ret; |
| 49998 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 51239 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 49999 | __ret = (uint64x2_t) __builtin_neon_vcltzq_v((int8x16_t)__rev0, 51); | 51240 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 51241 | __ret = __noswap_vmull_u32(__noswap_vget_high_u32(__rev0), __noswap_vget_high_u32(__rev1)); |
| 50000 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 51242 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 50001 | return __ret; | 51243 | return __ret; |
| 50002 | } | 51244 | } |
| 50003 | #endif | 51245 | #endif |
| 50004 | | 51246 | |
| 50005 | #ifdef __LITTLE_ENDIAN__ | 51247 | #ifdef __LITTLE_ENDIAN__ |
| 50006 | __ai uint32x4_t vcltzq_f32(float32x4_t __p0) { | 51248 | __ai uint32x4_t vmull_high_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 50007 | uint32x4_t __ret; | 51249 | uint32x4_t __ret; |
| 50008 | __ret = (uint32x4_t) __builtin_neon_vcltzq_v((int8x16_t)__p0, 50); | 51250 | __ret = vmull_u16(vget_high_u16(__p0), vget_high_u16(__p1)); |
| 50009 | return __ret; | 51251 | return __ret; |
| 50010 | } | 51252 | } |
| 50011 | #else | 51253 | #else |
| 50012 | __ai uint32x4_t vcltzq_f32(float32x4_t __p0) { | 51254 | __ai uint32x4_t vmull_high_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 50013 | uint32x4_t __ret; | 51255 | uint32x4_t __ret; |
| 50014 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 51256 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50015 | __ret = (uint32x4_t) __builtin_neon_vcltzq_v((int8x16_t)__rev0, 50); | 51257 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 51258 | __ret = __noswap_vmull_u16(__noswap_vget_high_u16(__rev0), __noswap_vget_high_u16(__rev1)); |
| 50016 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 51259 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 50017 | return __ret; | 51260 | return __ret; |
| 50018 | } | 51261 | } |
| 50019 | #endif | 51262 | #endif |
| 50020 | | 51263 | |
| 50021 | #ifdef __LITTLE_ENDIAN__ | 51264 | #ifdef __LITTLE_ENDIAN__ |
| 50022 | __ai uint32x4_t vcltzq_s32(int32x4_t __p0) { | 51265 | __ai int16x8_t vmull_high_s8(int8x16_t __p0, int8x16_t __p1) { |
| 50023 | uint32x4_t __ret; | 51266 | int16x8_t __ret; |
| 50024 | __ret = (uint32x4_t) __builtin_neon_vcltzq_v((int8x16_t)__p0, 50); | 51267 | __ret = vmull_s8(vget_high_s8(__p0), vget_high_s8(__p1)); |
| 50025 | return __ret; | 51268 | return __ret; |
| 50026 | } | 51269 | } |
| 50027 | #else | 51270 | #else |
| 50028 | __ai uint32x4_t vcltzq_s32(int32x4_t __p0) { | 51271 | __ai int16x8_t vmull_high_s8(int8x16_t __p0, int8x16_t __p1) { |
| 50029 | uint32x4_t __ret; | 51272 | int16x8_t __ret; |
| 50030 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 51273 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50031 | __ret = (uint32x4_t) __builtin_neon_vcltzq_v((int8x16_t)__rev0, 50); | 51274 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50032 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 51275 | __ret = __noswap_vmull_s8(__noswap_vget_high_s8(__rev0), __noswap_vget_high_s8(__rev1)); |
| | 51276 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50033 | return __ret; | 51277 | return __ret; |
| 50034 | } | 51278 | } |
| 50035 | #endif | 51279 | #endif |
| 50036 | | 51280 | |
| 50037 | #ifdef __LITTLE_ENDIAN__ | 51281 | #ifdef __LITTLE_ENDIAN__ |
| 50038 | __ai uint64x2_t vcltzq_s64(int64x2_t __p0) { | 51282 | __ai int64x2_t vmull_high_s32(int32x4_t __p0, int32x4_t __p1) { |
| 50039 | uint64x2_t __ret; | 51283 | int64x2_t __ret; |
| 50040 | __ret = (uint64x2_t) __builtin_neon_vcltzq_v((int8x16_t)__p0, 51); | 51284 | __ret = vmull_s32(vget_high_s32(__p0), vget_high_s32(__p1)); |
| 50041 | return __ret; | 51285 | return __ret; |
| 50042 | } | 51286 | } |
| 50043 | #else | 51287 | #else |
| 50044 | __ai uint64x2_t vcltzq_s64(int64x2_t __p0) { | 51288 | __ai int64x2_t vmull_high_s32(int32x4_t __p0, int32x4_t __p1) { |
| 50045 | uint64x2_t __ret; | 51289 | int64x2_t __ret; |
| 50046 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 51290 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 50047 | __ret = (uint64x2_t) __builtin_neon_vcltzq_v((int8x16_t)__rev0, 51); | 51291 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 51292 | __ret = __noswap_vmull_s32(__noswap_vget_high_s32(__rev0), __noswap_vget_high_s32(__rev1)); |
| 50048 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 51293 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 50049 | return __ret; | 51294 | return __ret; |
| 50050 | } | 51295 | } |
| 50051 | #endif | 51296 | #endif |
| 50052 | | 51297 | |
| 50053 | #ifdef __LITTLE_ENDIAN__ | 51298 | #ifdef __LITTLE_ENDIAN__ |
| 50054 | __ai uint16x8_t vcltzq_s16(int16x8_t __p0) { | 51299 | __ai int32x4_t vmull_high_s16(int16x8_t __p0, int16x8_t __p1) { |
| 50055 | uint16x8_t __ret; | 51300 | int32x4_t __ret; |
| 50056 | __ret = (uint16x8_t) __builtin_neon_vcltzq_v((int8x16_t)__p0, 49); | 51301 | __ret = vmull_s16(vget_high_s16(__p0), vget_high_s16(__p1)); |
| 50057 | return __ret; | 51302 | return __ret; |
| 50058 | } | 51303 | } |
| 50059 | #else | 51304 | #else |
| 50060 | __ai uint16x8_t vcltzq_s16(int16x8_t __p0) { | 51305 | __ai int32x4_t vmull_high_s16(int16x8_t __p0, int16x8_t __p1) { |
| 50061 | uint16x8_t __ret; | 51306 | int32x4_t __ret; |
| 50062 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 51307 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50063 | __ret = (uint16x8_t) __builtin_neon_vcltzq_v((int8x16_t)__rev0, 49); | 51308 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50064 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 51309 | __ret = __noswap_vmull_s16(__noswap_vget_high_s16(__rev0), __noswap_vget_high_s16(__rev1)); |
| | 51310 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 50065 | return __ret; | 51311 | return __ret; |
| 50066 | } | 51312 | } |
| 50067 | #endif | 51313 | #endif |
| 50068 | | 51314 | |
| 50069 | #ifdef __LITTLE_ENDIAN__ | 51315 | #ifdef __LITTLE_ENDIAN__ |
| 50070 | __ai uint8x8_t vcltz_s8(int8x8_t __p0) { | 51316 | #define vmull_high_lane_u32(__p0_564, __p1_564, __p2_564) __extension__ ({ \ |
| 50071 | uint8x8_t __ret; | 51317 | uint64x2_t __ret_564; \ |
| 50072 | __ret = (uint8x8_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 16); | 51318 | uint32x4_t __s0_564 = __p0_564; \ |
| 50073 | return __ret; | 51319 | uint32x2_t __s1_564 = __p1_564; \ |
| 50074 | } | 51320 | __ret_564 = vmull_u32(vget_high_u32(__s0_564), splat_lane_u32(__s1_564, __p2_564)); \ |
| | 51321 | __ret_564; \ |
| | 51322 | }) |
| 50075 | #else | 51323 | #else |
| 50076 | __ai uint8x8_t vcltz_s8(int8x8_t __p0) { | 51324 | #define vmull_high_lane_u32(__p0_565, __p1_565, __p2_565) __extension__ ({ \ |
| 50077 | uint8x8_t __ret; | 51325 | uint64x2_t __ret_565; \ |
| 50078 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 51326 | uint32x4_t __s0_565 = __p0_565; \ |
| 50079 | __ret = (uint8x8_t) __builtin_neon_vcltz_v((int8x8_t)__rev0, 16); | 51327 | uint32x2_t __s1_565 = __p1_565; \ |
| 50080 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 51328 | uint32x4_t __rev0_565; __rev0_565 = __builtin_shufflevector(__s0_565, __s0_565, 3, 2, 1, 0); \ |
| 50081 | return __ret; | 51329 | uint32x2_t __rev1_565; __rev1_565 = __builtin_shufflevector(__s1_565, __s1_565, 1, 0); \ |
| 50082 | } | 51330 | __ret_565 = __noswap_vmull_u32(__noswap_vget_high_u32(__rev0_565), __noswap_splat_lane_u32(__rev1_565, __p2_565)); \ |
| | 51331 | __ret_565 = __builtin_shufflevector(__ret_565, __ret_565, 1, 0); \ |
| | 51332 | __ret_565; \ |
| | 51333 | }) |
| 50083 | #endif | 51334 | #endif |
| 50084 | | 51335 | |
| 50085 | __ai uint64x1_t vcltz_f64(float64x1_t __p0) { | | |
| 50086 | uint64x1_t __ret; | | |
| 50087 | __ret = (uint64x1_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 19); | | |
| 50088 | return __ret; | | |
| 50089 | } | | |
| 50090 | #ifdef __LITTLE_ENDIAN__ | 51336 | #ifdef __LITTLE_ENDIAN__ |
| 50091 | __ai uint32x2_t vcltz_f32(float32x2_t __p0) { | 51337 | #define vmull_high_lane_u16(__p0_566, __p1_566, __p2_566) __extension__ ({ \ |
| 50092 | uint32x2_t __ret; | 51338 | uint32x4_t __ret_566; \ |
| 50093 | __ret = (uint32x2_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 18); | 51339 | uint16x8_t __s0_566 = __p0_566; \ |
| 50094 | return __ret; | 51340 | uint16x4_t __s1_566 = __p1_566; \ |
| 50095 | } | 51341 | __ret_566 = vmull_u16(vget_high_u16(__s0_566), splat_lane_u16(__s1_566, __p2_566)); \ |
| | 51342 | __ret_566; \ |
| | 51343 | }) |
| 50096 | #else | 51344 | #else |
| 50097 | __ai uint32x2_t vcltz_f32(float32x2_t __p0) { | 51345 | #define vmull_high_lane_u16(__p0_567, __p1_567, __p2_567) __extension__ ({ \ |
| 50098 | uint32x2_t __ret; | 51346 | uint32x4_t __ret_567; \ |
| 50099 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 51347 | uint16x8_t __s0_567 = __p0_567; \ |
| 50100 | __ret = (uint32x2_t) __builtin_neon_vcltz_v((int8x8_t)__rev0, 18); | 51348 | uint16x4_t __s1_567 = __p1_567; \ |
| 50101 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 51349 | uint16x8_t __rev0_567; __rev0_567 = __builtin_shufflevector(__s0_567, __s0_567, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 50102 | return __ret; | 51350 | uint16x4_t __rev1_567; __rev1_567 = __builtin_shufflevector(__s1_567, __s1_567, 3, 2, 1, 0); \ |
| 50103 | } | 51351 | __ret_567 = __noswap_vmull_u16(__noswap_vget_high_u16(__rev0_567), __noswap_splat_lane_u16(__rev1_567, __p2_567)); \ |
| | 51352 | __ret_567 = __builtin_shufflevector(__ret_567, __ret_567, 3, 2, 1, 0); \ |
| | 51353 | __ret_567; \ |
| | 51354 | }) |
| 50104 | #endif | 51355 | #endif |
| 50105 | | 51356 | |
| 50106 | #ifdef __LITTLE_ENDIAN__ | 51357 | #ifdef __LITTLE_ENDIAN__ |
| 50107 | __ai uint32x2_t vcltz_s32(int32x2_t __p0) { | 51358 | #define vmull_high_lane_s32(__p0_568, __p1_568, __p2_568) __extension__ ({ \ |
| 50108 | uint32x2_t __ret; | 51359 | int64x2_t __ret_568; \ |
| 50109 | __ret = (uint32x2_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 18); | 51360 | int32x4_t __s0_568 = __p0_568; \ |
| | 51361 | int32x2_t __s1_568 = __p1_568; \ |
| | 51362 | __ret_568 = vmull_s32(vget_high_s32(__s0_568), splat_lane_s32(__s1_568, __p2_568)); \ |
| | 51363 | __ret_568; \ |
| | 51364 | }) |
| | 51365 | #else |
| | 51366 | #define vmull_high_lane_s32(__p0_569, __p1_569, __p2_569) __extension__ ({ \ |
| | 51367 | int64x2_t __ret_569; \ |
| | 51368 | int32x4_t __s0_569 = __p0_569; \ |
| | 51369 | int32x2_t __s1_569 = __p1_569; \ |
| | 51370 | int32x4_t __rev0_569; __rev0_569 = __builtin_shufflevector(__s0_569, __s0_569, 3, 2, 1, 0); \ |
| | 51371 | int32x2_t __rev1_569; __rev1_569 = __builtin_shufflevector(__s1_569, __s1_569, 1, 0); \ |
| | 51372 | __ret_569 = __noswap_vmull_s32(__noswap_vget_high_s32(__rev0_569), __noswap_splat_lane_s32(__rev1_569, __p2_569)); \ |
| | 51373 | __ret_569 = __builtin_shufflevector(__ret_569, __ret_569, 1, 0); \ |
| | 51374 | __ret_569; \ |
| | 51375 | }) |
| | 51376 | #endif |
| | 51377 | |
| | 51378 | #ifdef __LITTLE_ENDIAN__ |
| | 51379 | #define vmull_high_lane_s16(__p0_570, __p1_570, __p2_570) __extension__ ({ \ |
| | 51380 | int32x4_t __ret_570; \ |
| | 51381 | int16x8_t __s0_570 = __p0_570; \ |
| | 51382 | int16x4_t __s1_570 = __p1_570; \ |
| | 51383 | __ret_570 = vmull_s16(vget_high_s16(__s0_570), splat_lane_s16(__s1_570, __p2_570)); \ |
| | 51384 | __ret_570; \ |
| | 51385 | }) |
| | 51386 | #else |
| | 51387 | #define vmull_high_lane_s16(__p0_571, __p1_571, __p2_571) __extension__ ({ \ |
| | 51388 | int32x4_t __ret_571; \ |
| | 51389 | int16x8_t __s0_571 = __p0_571; \ |
| | 51390 | int16x4_t __s1_571 = __p1_571; \ |
| | 51391 | int16x8_t __rev0_571; __rev0_571 = __builtin_shufflevector(__s0_571, __s0_571, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 51392 | int16x4_t __rev1_571; __rev1_571 = __builtin_shufflevector(__s1_571, __s1_571, 3, 2, 1, 0); \ |
| | 51393 | __ret_571 = __noswap_vmull_s16(__noswap_vget_high_s16(__rev0_571), __noswap_splat_lane_s16(__rev1_571, __p2_571)); \ |
| | 51394 | __ret_571 = __builtin_shufflevector(__ret_571, __ret_571, 3, 2, 1, 0); \ |
| | 51395 | __ret_571; \ |
| | 51396 | }) |
| | 51397 | #endif |
| | 51398 | |
| | 51399 | #ifdef __LITTLE_ENDIAN__ |
| | 51400 | #define vmull_high_laneq_u32(__p0_572, __p1_572, __p2_572) __extension__ ({ \ |
| | 51401 | uint64x2_t __ret_572; \ |
| | 51402 | uint32x4_t __s0_572 = __p0_572; \ |
| | 51403 | uint32x4_t __s1_572 = __p1_572; \ |
| | 51404 | __ret_572 = vmull_u32(vget_high_u32(__s0_572), splat_laneq_u32(__s1_572, __p2_572)); \ |
| | 51405 | __ret_572; \ |
| | 51406 | }) |
| | 51407 | #else |
| | 51408 | #define vmull_high_laneq_u32(__p0_573, __p1_573, __p2_573) __extension__ ({ \ |
| | 51409 | uint64x2_t __ret_573; \ |
| | 51410 | uint32x4_t __s0_573 = __p0_573; \ |
| | 51411 | uint32x4_t __s1_573 = __p1_573; \ |
| | 51412 | uint32x4_t __rev0_573; __rev0_573 = __builtin_shufflevector(__s0_573, __s0_573, 3, 2, 1, 0); \ |
| | 51413 | uint32x4_t __rev1_573; __rev1_573 = __builtin_shufflevector(__s1_573, __s1_573, 3, 2, 1, 0); \ |
| | 51414 | __ret_573 = __noswap_vmull_u32(__noswap_vget_high_u32(__rev0_573), __noswap_splat_laneq_u32(__rev1_573, __p2_573)); \ |
| | 51415 | __ret_573 = __builtin_shufflevector(__ret_573, __ret_573, 1, 0); \ |
| | 51416 | __ret_573; \ |
| | 51417 | }) |
| | 51418 | #endif |
| | 51419 | |
| | 51420 | #ifdef __LITTLE_ENDIAN__ |
| | 51421 | #define vmull_high_laneq_u16(__p0_574, __p1_574, __p2_574) __extension__ ({ \ |
| | 51422 | uint32x4_t __ret_574; \ |
| | 51423 | uint16x8_t __s0_574 = __p0_574; \ |
| | 51424 | uint16x8_t __s1_574 = __p1_574; \ |
| | 51425 | __ret_574 = vmull_u16(vget_high_u16(__s0_574), splat_laneq_u16(__s1_574, __p2_574)); \ |
| | 51426 | __ret_574; \ |
| | 51427 | }) |
| | 51428 | #else |
| | 51429 | #define vmull_high_laneq_u16(__p0_575, __p1_575, __p2_575) __extension__ ({ \ |
| | 51430 | uint32x4_t __ret_575; \ |
| | 51431 | uint16x8_t __s0_575 = __p0_575; \ |
| | 51432 | uint16x8_t __s1_575 = __p1_575; \ |
| | 51433 | uint16x8_t __rev0_575; __rev0_575 = __builtin_shufflevector(__s0_575, __s0_575, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 51434 | uint16x8_t __rev1_575; __rev1_575 = __builtin_shufflevector(__s1_575, __s1_575, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 51435 | __ret_575 = __noswap_vmull_u16(__noswap_vget_high_u16(__rev0_575), __noswap_splat_laneq_u16(__rev1_575, __p2_575)); \ |
| | 51436 | __ret_575 = __builtin_shufflevector(__ret_575, __ret_575, 3, 2, 1, 0); \ |
| | 51437 | __ret_575; \ |
| | 51438 | }) |
| | 51439 | #endif |
| | 51440 | |
| | 51441 | #ifdef __LITTLE_ENDIAN__ |
| | 51442 | #define vmull_high_laneq_s32(__p0_576, __p1_576, __p2_576) __extension__ ({ \ |
| | 51443 | int64x2_t __ret_576; \ |
| | 51444 | int32x4_t __s0_576 = __p0_576; \ |
| | 51445 | int32x4_t __s1_576 = __p1_576; \ |
| | 51446 | __ret_576 = vmull_s32(vget_high_s32(__s0_576), splat_laneq_s32(__s1_576, __p2_576)); \ |
| | 51447 | __ret_576; \ |
| | 51448 | }) |
| | 51449 | #else |
| | 51450 | #define vmull_high_laneq_s32(__p0_577, __p1_577, __p2_577) __extension__ ({ \ |
| | 51451 | int64x2_t __ret_577; \ |
| | 51452 | int32x4_t __s0_577 = __p0_577; \ |
| | 51453 | int32x4_t __s1_577 = __p1_577; \ |
| | 51454 | int32x4_t __rev0_577; __rev0_577 = __builtin_shufflevector(__s0_577, __s0_577, 3, 2, 1, 0); \ |
| | 51455 | int32x4_t __rev1_577; __rev1_577 = __builtin_shufflevector(__s1_577, __s1_577, 3, 2, 1, 0); \ |
| | 51456 | __ret_577 = __noswap_vmull_s32(__noswap_vget_high_s32(__rev0_577), __noswap_splat_laneq_s32(__rev1_577, __p2_577)); \ |
| | 51457 | __ret_577 = __builtin_shufflevector(__ret_577, __ret_577, 1, 0); \ |
| | 51458 | __ret_577; \ |
| | 51459 | }) |
| | 51460 | #endif |
| | 51461 | |
| | 51462 | #ifdef __LITTLE_ENDIAN__ |
| | 51463 | #define vmull_high_laneq_s16(__p0_578, __p1_578, __p2_578) __extension__ ({ \ |
| | 51464 | int32x4_t __ret_578; \ |
| | 51465 | int16x8_t __s0_578 = __p0_578; \ |
| | 51466 | int16x8_t __s1_578 = __p1_578; \ |
| | 51467 | __ret_578 = vmull_s16(vget_high_s16(__s0_578), splat_laneq_s16(__s1_578, __p2_578)); \ |
| | 51468 | __ret_578; \ |
| | 51469 | }) |
| | 51470 | #else |
| | 51471 | #define vmull_high_laneq_s16(__p0_579, __p1_579, __p2_579) __extension__ ({ \ |
| | 51472 | int32x4_t __ret_579; \ |
| | 51473 | int16x8_t __s0_579 = __p0_579; \ |
| | 51474 | int16x8_t __s1_579 = __p1_579; \ |
| | 51475 | int16x8_t __rev0_579; __rev0_579 = __builtin_shufflevector(__s0_579, __s0_579, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 51476 | int16x8_t __rev1_579; __rev1_579 = __builtin_shufflevector(__s1_579, __s1_579, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 51477 | __ret_579 = __noswap_vmull_s16(__noswap_vget_high_s16(__rev0_579), __noswap_splat_laneq_s16(__rev1_579, __p2_579)); \ |
| | 51478 | __ret_579 = __builtin_shufflevector(__ret_579, __ret_579, 3, 2, 1, 0); \ |
| | 51479 | __ret_579; \ |
| | 51480 | }) |
| | 51481 | #endif |
| | 51482 | |
| | 51483 | #ifdef __LITTLE_ENDIAN__ |
| | 51484 | __ai uint64x2_t vmull_high_n_u32(uint32x4_t __p0, uint32_t __p1) { |
| | 51485 | uint64x2_t __ret; |
| | 51486 | __ret = vmull_n_u32(vget_high_u32(__p0), __p1); |
| 50110 | return __ret; | 51487 | return __ret; |
| 50111 | } | 51488 | } |
| 50112 | #else | 51489 | #else |
| 50113 | __ai uint32x2_t vcltz_s32(int32x2_t __p0) { | 51490 | __ai uint64x2_t vmull_high_n_u32(uint32x4_t __p0, uint32_t __p1) { |
| 50114 | uint32x2_t __ret; | 51491 | uint64x2_t __ret; |
| 50115 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 51492 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 50116 | __ret = (uint32x2_t) __builtin_neon_vcltz_v((int8x8_t)__rev0, 18); | 51493 | __ret = __noswap_vmull_n_u32(__noswap_vget_high_u32(__rev0), __p1); |
| 50117 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 51494 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 50118 | return __ret; | 51495 | return __ret; |
| 50119 | } | 51496 | } |
| 50120 | #endif | 51497 | #endif |
| 50121 | | 51498 | |
| 50122 | __ai uint64x1_t vcltz_s64(int64x1_t __p0) { | | |
| 50123 | uint64x1_t __ret; | | |
| 50124 | __ret = (uint64x1_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 19); | | |
| 50125 | return __ret; | | |
| 50126 | } | | |
| 50127 | #ifdef __LITTLE_ENDIAN__ | 51499 | #ifdef __LITTLE_ENDIAN__ |
| 50128 | __ai uint16x4_t vcltz_s16(int16x4_t __p0) { | 51500 | __ai uint32x4_t vmull_high_n_u16(uint16x8_t __p0, uint16_t __p1) { |
| 50129 | uint16x4_t __ret; | 51501 | uint32x4_t __ret; |
| 50130 | __ret = (uint16x4_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 17); | 51502 | __ret = vmull_n_u16(vget_high_u16(__p0), __p1); |
| 50131 | return __ret; | 51503 | return __ret; |
| 50132 | } | 51504 | } |
| 50133 | #else | 51505 | #else |
| 50134 | __ai uint16x4_t vcltz_s16(int16x4_t __p0) { | 51506 | __ai uint32x4_t vmull_high_n_u16(uint16x8_t __p0, uint16_t __p1) { |
| 50135 | uint16x4_t __ret; | 51507 | uint32x4_t __ret; |
| 50136 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 51508 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50137 | __ret = (uint16x4_t) __builtin_neon_vcltz_v((int8x8_t)__rev0, 17); | 51509 | __ret = __noswap_vmull_n_u16(__noswap_vget_high_u16(__rev0), __p1); |
| 50138 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 51510 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 50139 | return __ret; | 51511 | return __ret; |
| 50140 | } | 51512 | } |
| 50141 | #endif | 51513 | #endif |
| 50142 | | 51514 | |
| 50143 | __ai uint64_t vcltzd_s64(int64_t __p0) { | | |
| 50144 | uint64_t __ret; | | |
| 50145 | __ret = (uint64_t) __builtin_neon_vcltzd_s64(__p0); | | |
| 50146 | return __ret; | | |
| 50147 | } | | |
| 50148 | __ai uint64_t vcltzd_f64(float64_t __p0) { | | |
| 50149 | uint64_t __ret; | | |
| 50150 | __ret = (uint64_t) __builtin_neon_vcltzd_f64(__p0); | | |
| 50151 | return __ret; | | |
| 50152 | } | | |
| 50153 | __ai uint32_t vcltzs_f32(float32_t __p0) { | | |
| 50154 | uint32_t __ret; | | |
| 50155 | __ret = (uint32_t) __builtin_neon_vcltzs_f32(__p0); | | |
| 50156 | return __ret; | | |
| 50157 | } | | |
| 50158 | #ifdef __LITTLE_ENDIAN__ | 51515 | #ifdef __LITTLE_ENDIAN__ |
| 50159 | __ai poly64x2_t vcombine_p64(poly64x1_t __p0, poly64x1_t __p1) { | 51516 | __ai int64x2_t vmull_high_n_s32(int32x4_t __p0, int32_t __p1) { |
| 50160 | poly64x2_t __ret; | 51517 | int64x2_t __ret; |
| 50161 | __ret = __builtin_shufflevector(__p0, __p1, 0, 1); | 51518 | __ret = vmull_n_s32(vget_high_s32(__p0), __p1); |
| 50162 | return __ret; | 51519 | return __ret; |
| 50163 | } | 51520 | } |
| 50164 | #else | 51521 | #else |
| 50165 | __ai poly64x2_t vcombine_p64(poly64x1_t __p0, poly64x1_t __p1) { | 51522 | __ai int64x2_t vmull_high_n_s32(int32x4_t __p0, int32_t __p1) { |
| 50166 | poly64x2_t __ret; | 51523 | int64x2_t __ret; |
| 50167 | __ret = __builtin_shufflevector(__p0, __p1, 0, 1); | 51524 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 51525 | __ret = __noswap_vmull_n_s32(__noswap_vget_high_s32(__rev0), __p1); |
| 50168 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 51526 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 50169 | return __ret; | 51527 | return __ret; |
| 50170 | } | 51528 | } |
| 50171 | #endif | 51529 | #endif |
| 50172 | | 51530 | |
| 50173 | #ifdef __LITTLE_ENDIAN__ | 51531 | #ifdef __LITTLE_ENDIAN__ |
| 50174 | __ai float64x2_t vcombine_f64(float64x1_t __p0, float64x1_t __p1) { | 51532 | __ai int32x4_t vmull_high_n_s16(int16x8_t __p0, int16_t __p1) { |
| 50175 | float64x2_t __ret; | 51533 | int32x4_t __ret; |
| 50176 | __ret = __builtin_shufflevector(__p0, __p1, 0, 1); | 51534 | __ret = vmull_n_s16(vget_high_s16(__p0), __p1); |
| 50177 | return __ret; | 51535 | return __ret; |
| 50178 | } | 51536 | } |
| 50179 | #else | 51537 | #else |
| 50180 | __ai float64x2_t vcombine_f64(float64x1_t __p0, float64x1_t __p1) { | 51538 | __ai int32x4_t vmull_high_n_s16(int16x8_t __p0, int16_t __p1) { |
| 50181 | float64x2_t __ret; | 51539 | int32x4_t __ret; |
| 50182 | __ret = __builtin_shufflevector(__p0, __p1, 0, 1); | 51540 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50183 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 51541 | __ret = __noswap_vmull_n_s16(__noswap_vget_high_s16(__rev0), __p1); |
| | 51542 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 50184 | return __ret; | 51543 | return __ret; |
| 50185 | } | 51544 | } |
| 50186 | #endif | 51545 | #endif |
| 50187 | | 51546 | |
| 50188 | #ifdef __LITTLE_ENDIAN__ | 51547 | #ifdef __LITTLE_ENDIAN__ |
| 50189 | #define vcopyq_lane_p8(__p0_357, __p1_357, __p2_357, __p3_357) __extension__ ({ \ | 51548 | #define vmull_laneq_u32(__p0_580, __p1_580, __p2_580) __extension__ ({ \ |
| 50190 | poly8x16_t __ret_357; \ | 51549 | uint64x2_t __ret_580; \ |
| 50191 | poly8x16_t __s0_357 = __p0_357; \ | 51550 | uint32x2_t __s0_580 = __p0_580; \ |
| 50192 | poly8x8_t __s2_357 = __p2_357; \ | 51551 | uint32x4_t __s1_580 = __p1_580; \ |
| 50193 | __ret_357 = vsetq_lane_p8(vget_lane_p8(__s2_357, __p3_357), __s0_357, __p1_357); \ | 51552 | __ret_580 = vmull_u32(__s0_580, splat_laneq_u32(__s1_580, __p2_580)); \ |
| 50194 | __ret_357; \ | 51553 | __ret_580; \ |
| 50195 | }) | 51554 | }) |
| 50196 | #else | 51555 | #else |
| 50197 | #define vcopyq_lane_p8(__p0_358, __p1_358, __p2_358, __p3_358) __extension__ ({ \ | 51556 | #define vmull_laneq_u32(__p0_581, __p1_581, __p2_581) __extension__ ({ \ |
| 50198 | poly8x16_t __ret_358; \ | 51557 | uint64x2_t __ret_581; \ |
| 50199 | poly8x16_t __s0_358 = __p0_358; \ | 51558 | uint32x2_t __s0_581 = __p0_581; \ |
| 50200 | poly8x8_t __s2_358 = __p2_358; \ | 51559 | uint32x4_t __s1_581 = __p1_581; \ |
| 50201 | poly8x16_t __rev0_358; __rev0_358 = __builtin_shufflevector(__s0_358, __s0_358, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51560 | uint32x2_t __rev0_581; __rev0_581 = __builtin_shufflevector(__s0_581, __s0_581, 1, 0); \ |
| 50202 | poly8x8_t __rev2_358; __rev2_358 = __builtin_shufflevector(__s2_358, __s2_358, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51561 | uint32x4_t __rev1_581; __rev1_581 = __builtin_shufflevector(__s1_581, __s1_581, 3, 2, 1, 0); \ |
| 50203 | __ret_358 = __noswap_vsetq_lane_p8(__noswap_vget_lane_p8(__rev2_358, __p3_358), __rev0_358, __p1_358); \ | 51562 | __ret_581 = __noswap_vmull_u32(__rev0_581, __noswap_splat_laneq_u32(__rev1_581, __p2_581)); \ |
| 50204 | __ret_358 = __builtin_shufflevector(__ret_358, __ret_358, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51563 | __ret_581 = __builtin_shufflevector(__ret_581, __ret_581, 1, 0); \ |
| 50205 | __ret_358; \ | 51564 | __ret_581; \ |
| 50206 | }) | 51565 | }) |
| 50207 | #endif | 51566 | #endif |
| 50208 | | 51567 | |
| 50209 | #ifdef __LITTLE_ENDIAN__ | 51568 | #ifdef __LITTLE_ENDIAN__ |
| 50210 | #define vcopyq_lane_p16(__p0_359, __p1_359, __p2_359, __p3_359) __extension__ ({ \ | 51569 | #define vmull_laneq_u16(__p0_582, __p1_582, __p2_582) __extension__ ({ \ |
| 50211 | poly16x8_t __ret_359; \ | 51570 | uint32x4_t __ret_582; \ |
| 50212 | poly16x8_t __s0_359 = __p0_359; \ | 51571 | uint16x4_t __s0_582 = __p0_582; \ |
| 50213 | poly16x4_t __s2_359 = __p2_359; \ | 51572 | uint16x8_t __s1_582 = __p1_582; \ |
| 50214 | __ret_359 = vsetq_lane_p16(vget_lane_p16(__s2_359, __p3_359), __s0_359, __p1_359); \ | 51573 | __ret_582 = vmull_u16(__s0_582, splat_laneq_u16(__s1_582, __p2_582)); \ |
| 50215 | __ret_359; \ | 51574 | __ret_582; \ |
| 50216 | }) | 51575 | }) |
| 50217 | #else | 51576 | #else |
| 50218 | #define vcopyq_lane_p16(__p0_360, __p1_360, __p2_360, __p3_360) __extension__ ({ \ | 51577 | #define vmull_laneq_u16(__p0_583, __p1_583, __p2_583) __extension__ ({ \ |
| 50219 | poly16x8_t __ret_360; \ | 51578 | uint32x4_t __ret_583; \ |
| 50220 | poly16x8_t __s0_360 = __p0_360; \ | 51579 | uint16x4_t __s0_583 = __p0_583; \ |
| 50221 | poly16x4_t __s2_360 = __p2_360; \ | 51580 | uint16x8_t __s1_583 = __p1_583; \ |
| 50222 | poly16x8_t __rev0_360; __rev0_360 = __builtin_shufflevector(__s0_360, __s0_360, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51581 | uint16x4_t __rev0_583; __rev0_583 = __builtin_shufflevector(__s0_583, __s0_583, 3, 2, 1, 0); \ |
| 50223 | poly16x4_t __rev2_360; __rev2_360 = __builtin_shufflevector(__s2_360, __s2_360, 3, 2, 1, 0); \ | 51582 | uint16x8_t __rev1_583; __rev1_583 = __builtin_shufflevector(__s1_583, __s1_583, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 50224 | __ret_360 = __noswap_vsetq_lane_p16(__noswap_vget_lane_p16(__rev2_360, __p3_360), __rev0_360, __p1_360); \ | 51583 | __ret_583 = __noswap_vmull_u16(__rev0_583, __noswap_splat_laneq_u16(__rev1_583, __p2_583)); \ |
| 50225 | __ret_360 = __builtin_shufflevector(__ret_360, __ret_360, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51584 | __ret_583 = __builtin_shufflevector(__ret_583, __ret_583, 3, 2, 1, 0); \ |
| 50226 | __ret_360; \ | 51585 | __ret_583; \ |
| 50227 | }) | 51586 | }) |
| 50228 | #endif | 51587 | #endif |
| 50229 | | 51588 | |
| 50230 | #ifdef __LITTLE_ENDIAN__ | 51589 | #ifdef __LITTLE_ENDIAN__ |
| 50231 | #define vcopyq_lane_u8(__p0_361, __p1_361, __p2_361, __p3_361) __extension__ ({ \ | 51590 | #define vmull_laneq_s32(__p0_584, __p1_584, __p2_584) __extension__ ({ \ |
| 50232 | uint8x16_t __ret_361; \ | 51591 | int64x2_t __ret_584; \ |
| 50233 | uint8x16_t __s0_361 = __p0_361; \ | 51592 | int32x2_t __s0_584 = __p0_584; \ |
| 50234 | uint8x8_t __s2_361 = __p2_361; \ | 51593 | int32x4_t __s1_584 = __p1_584; \ |
| 50235 | __ret_361 = vsetq_lane_u8(vget_lane_u8(__s2_361, __p3_361), __s0_361, __p1_361); \ | 51594 | __ret_584 = vmull_s32(__s0_584, splat_laneq_s32(__s1_584, __p2_584)); \ |
| 50236 | __ret_361; \ | 51595 | __ret_584; \ |
| 50237 | }) | 51596 | }) |
| 50238 | #else | 51597 | #else |
| 50239 | #define vcopyq_lane_u8(__p0_362, __p1_362, __p2_362, __p3_362) __extension__ ({ \ | 51598 | #define vmull_laneq_s32(__p0_585, __p1_585, __p2_585) __extension__ ({ \ |
| 50240 | uint8x16_t __ret_362; \ | 51599 | int64x2_t __ret_585; \ |
| 50241 | uint8x16_t __s0_362 = __p0_362; \ | 51600 | int32x2_t __s0_585 = __p0_585; \ |
| 50242 | uint8x8_t __s2_362 = __p2_362; \ | 51601 | int32x4_t __s1_585 = __p1_585; \ |
| 50243 | uint8x16_t __rev0_362; __rev0_362 = __builtin_shufflevector(__s0_362, __s0_362, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51602 | int32x2_t __rev0_585; __rev0_585 = __builtin_shufflevector(__s0_585, __s0_585, 1, 0); \ |
| 50244 | uint8x8_t __rev2_362; __rev2_362 = __builtin_shufflevector(__s2_362, __s2_362, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51603 | int32x4_t __rev1_585; __rev1_585 = __builtin_shufflevector(__s1_585, __s1_585, 3, 2, 1, 0); \ |
| 50245 | __ret_362 = __noswap_vsetq_lane_u8(__noswap_vget_lane_u8(__rev2_362, __p3_362), __rev0_362, __p1_362); \ | 51604 | __ret_585 = __noswap_vmull_s32(__rev0_585, __noswap_splat_laneq_s32(__rev1_585, __p2_585)); \ |
| 50246 | __ret_362 = __builtin_shufflevector(__ret_362, __ret_362, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51605 | __ret_585 = __builtin_shufflevector(__ret_585, __ret_585, 1, 0); \ |
| 50247 | __ret_362; \ | 51606 | __ret_585; \ |
| 50248 | }) | 51607 | }) |
| 50249 | #endif | 51608 | #endif |
| 50250 | | 51609 | |
| 50251 | #ifdef __LITTLE_ENDIAN__ | 51610 | #ifdef __LITTLE_ENDIAN__ |
| 50252 | #define vcopyq_lane_u32(__p0_363, __p1_363, __p2_363, __p3_363) __extension__ ({ \ | 51611 | #define vmull_laneq_s16(__p0_586, __p1_586, __p2_586) __extension__ ({ \ |
| 50253 | uint32x4_t __ret_363; \ | 51612 | int32x4_t __ret_586; \ |
| 50254 | uint32x4_t __s0_363 = __p0_363; \ | 51613 | int16x4_t __s0_586 = __p0_586; \ |
| 50255 | uint32x2_t __s2_363 = __p2_363; \ | 51614 | int16x8_t __s1_586 = __p1_586; \ |
| 50256 | __ret_363 = vsetq_lane_u32(vget_lane_u32(__s2_363, __p3_363), __s0_363, __p1_363); \ | 51615 | __ret_586 = vmull_s16(__s0_586, splat_laneq_s16(__s1_586, __p2_586)); \ |
| 50257 | __ret_363; \ | 51616 | __ret_586; \ |
| 50258 | }) | 51617 | }) |
| 50259 | #else | 51618 | #else |
| 50260 | #define vcopyq_lane_u32(__p0_364, __p1_364, __p2_364, __p3_364) __extension__ ({ \ | 51619 | #define vmull_laneq_s16(__p0_587, __p1_587, __p2_587) __extension__ ({ \ |
| 50261 | uint32x4_t __ret_364; \ | 51620 | int32x4_t __ret_587; \ |
| 50262 | uint32x4_t __s0_364 = __p0_364; \ | 51621 | int16x4_t __s0_587 = __p0_587; \ |
| 50263 | uint32x2_t __s2_364 = __p2_364; \ | 51622 | int16x8_t __s1_587 = __p1_587; \ |
| 50264 | uint32x4_t __rev0_364; __rev0_364 = __builtin_shufflevector(__s0_364, __s0_364, 3, 2, 1, 0); \ | 51623 | int16x4_t __rev0_587; __rev0_587 = __builtin_shufflevector(__s0_587, __s0_587, 3, 2, 1, 0); \ |
| 50265 | uint32x2_t __rev2_364; __rev2_364 = __builtin_shufflevector(__s2_364, __s2_364, 1, 0); \ | 51624 | int16x8_t __rev1_587; __rev1_587 = __builtin_shufflevector(__s1_587, __s1_587, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 50266 | __ret_364 = __noswap_vsetq_lane_u32(__noswap_vget_lane_u32(__rev2_364, __p3_364), __rev0_364, __p1_364); \ | 51625 | __ret_587 = __noswap_vmull_s16(__rev0_587, __noswap_splat_laneq_s16(__rev1_587, __p2_587)); \ |
| 50267 | __ret_364 = __builtin_shufflevector(__ret_364, __ret_364, 3, 2, 1, 0); \ | 51626 | __ret_587 = __builtin_shufflevector(__ret_587, __ret_587, 3, 2, 1, 0); \ |
| 50268 | __ret_364; \ | 51627 | __ret_587; \ |
| 50269 | }) | 51628 | }) |
| 50270 | #endif | 51629 | #endif |
| 50271 | | 51630 | |
| 50272 | #ifdef __LITTLE_ENDIAN__ | 51631 | #ifdef __LITTLE_ENDIAN__ |
| 50273 | #define vcopyq_lane_u64(__p0_365, __p1_365, __p2_365, __p3_365) __extension__ ({ \ | 51632 | __ai float64x2_t vmulxq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 50274 | uint64x2_t __ret_365; \ | 51633 | float64x2_t __ret; |
| 50275 | uint64x2_t __s0_365 = __p0_365; \ | 51634 | __ret = (float64x2_t) __builtin_neon_vmulxq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| 50276 | uint64x1_t __s2_365 = __p2_365; \ | 51635 | return __ret; |
| 50277 | __ret_365 = vsetq_lane_u64(vget_lane_u64(__s2_365, __p3_365), __s0_365, __p1_365); \ | 51636 | } |
| 50278 | __ret_365; \ | | |
| 50279 | }) | | |
| 50280 | #else | 51637 | #else |
| 50281 | #define vcopyq_lane_u64(__p0_366, __p1_366, __p2_366, __p3_366) __extension__ ({ \ | 51638 | __ai float64x2_t vmulxq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 50282 | uint64x2_t __ret_366; \ | 51639 | float64x2_t __ret; |
| 50283 | uint64x2_t __s0_366 = __p0_366; \ | 51640 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 50284 | uint64x1_t __s2_366 = __p2_366; \ | 51641 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 50285 | uint64x2_t __rev0_366; __rev0_366 = __builtin_shufflevector(__s0_366, __s0_366, 1, 0); \ | 51642 | __ret = (float64x2_t) __builtin_neon_vmulxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| 50286 | __ret_366 = __noswap_vsetq_lane_u64(vget_lane_u64(__s2_366, __p3_366), __rev0_366, __p1_366); \ | 51643 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 50287 | __ret_366 = __builtin_shufflevector(__ret_366, __ret_366, 1, 0); \ | 51644 | return __ret; |
| 50288 | __ret_366; \ | 51645 | } |
| 50289 | }) | 51646 | __ai float64x2_t __noswap_vmulxq_f64(float64x2_t __p0, float64x2_t __p1) { |
| | 51647 | float64x2_t __ret; |
| | 51648 | __ret = (float64x2_t) __builtin_neon_vmulxq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| | 51649 | return __ret; |
| | 51650 | } |
| 50290 | #endif | 51651 | #endif |
| 50291 | | 51652 | |
| 50292 | #ifdef __LITTLE_ENDIAN__ | 51653 | #ifdef __LITTLE_ENDIAN__ |
| 50293 | #define vcopyq_lane_u16(__p0_367, __p1_367, __p2_367, __p3_367) __extension__ ({ \ | 51654 | __ai float32x4_t vmulxq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 50294 | uint16x8_t __ret_367; \ | 51655 | float32x4_t __ret; |
| 50295 | uint16x8_t __s0_367 = __p0_367; \ | 51656 | __ret = (float32x4_t) __builtin_neon_vmulxq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); |
| 50296 | uint16x4_t __s2_367 = __p2_367; \ | 51657 | return __ret; |
| 50297 | __ret_367 = vsetq_lane_u16(vget_lane_u16(__s2_367, __p3_367), __s0_367, __p1_367); \ | 51658 | } |
| 50298 | __ret_367; \ | | |
| 50299 | }) | | |
| 50300 | #else | 51659 | #else |
| 50301 | #define vcopyq_lane_u16(__p0_368, __p1_368, __p2_368, __p3_368) __extension__ ({ \ | 51660 | __ai float32x4_t vmulxq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 50302 | uint16x8_t __ret_368; \ | 51661 | float32x4_t __ret; |
| 50303 | uint16x8_t __s0_368 = __p0_368; \ | 51662 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 50304 | uint16x4_t __s2_368 = __p2_368; \ | 51663 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 50305 | uint16x8_t __rev0_368; __rev0_368 = __builtin_shufflevector(__s0_368, __s0_368, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51664 | __ret = (float32x4_t) __builtin_neon_vmulxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); |
| 50306 | uint16x4_t __rev2_368; __rev2_368 = __builtin_shufflevector(__s2_368, __s2_368, 3, 2, 1, 0); \ | 51665 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 50307 | __ret_368 = __noswap_vsetq_lane_u16(__noswap_vget_lane_u16(__rev2_368, __p3_368), __rev0_368, __p1_368); \ | 51666 | return __ret; |
| 50308 | __ret_368 = __builtin_shufflevector(__ret_368, __ret_368, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51667 | } |
| 50309 | __ret_368; \ | 51668 | __ai float32x4_t __noswap_vmulxq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 50310 | }) | 51669 | float32x4_t __ret; |
| | 51670 | __ret = (float32x4_t) __builtin_neon_vmulxq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); |
| | 51671 | return __ret; |
| | 51672 | } |
| 50311 | #endif | 51673 | #endif |
| 50312 | | 51674 | |
| | 51675 | __ai float64x1_t vmulx_f64(float64x1_t __p0, float64x1_t __p1) { |
| | 51676 | float64x1_t __ret; |
| | 51677 | __ret = (float64x1_t) __builtin_neon_vmulx_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| | 51678 | return __ret; |
| | 51679 | } |
| 50313 | #ifdef __LITTLE_ENDIAN__ | 51680 | #ifdef __LITTLE_ENDIAN__ |
| 50314 | #define vcopyq_lane_s8(__p0_369, __p1_369, __p2_369, __p3_369) __extension__ ({ \ | 51681 | __ai float32x2_t vmulx_f32(float32x2_t __p0, float32x2_t __p1) { |
| 50315 | int8x16_t __ret_369; \ | 51682 | float32x2_t __ret; |
| 50316 | int8x16_t __s0_369 = __p0_369; \ | 51683 | __ret = (float32x2_t) __builtin_neon_vmulx_v((int8x8_t)__p0, (int8x8_t)__p1, 9); |
| 50317 | int8x8_t __s2_369 = __p2_369; \ | 51684 | return __ret; |
| 50318 | __ret_369 = vsetq_lane_s8(vget_lane_s8(__s2_369, __p3_369), __s0_369, __p1_369); \ | 51685 | } |
| 50319 | __ret_369; \ | | |
| 50320 | }) | | |
| 50321 | #else | 51686 | #else |
| 50322 | #define vcopyq_lane_s8(__p0_370, __p1_370, __p2_370, __p3_370) __extension__ ({ \ | 51687 | __ai float32x2_t vmulx_f32(float32x2_t __p0, float32x2_t __p1) { |
| 50323 | int8x16_t __ret_370; \ | 51688 | float32x2_t __ret; |
| 50324 | int8x16_t __s0_370 = __p0_370; \ | 51689 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 50325 | int8x8_t __s2_370 = __p2_370; \ | 51690 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 50326 | int8x16_t __rev0_370; __rev0_370 = __builtin_shufflevector(__s0_370, __s0_370, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51691 | __ret = (float32x2_t) __builtin_neon_vmulx_v((int8x8_t)__rev0, (int8x8_t)__rev1, 9); |
| 50327 | int8x8_t __rev2_370; __rev2_370 = __builtin_shufflevector(__s2_370, __s2_370, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51692 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 50328 | __ret_370 = __noswap_vsetq_lane_s8(__noswap_vget_lane_s8(__rev2_370, __p3_370), __rev0_370, __p1_370); \ | 51693 | return __ret; |
| 50329 | __ret_370 = __builtin_shufflevector(__ret_370, __ret_370, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51694 | } |
| 50330 | __ret_370; \ | 51695 | __ai float32x2_t __noswap_vmulx_f32(float32x2_t __p0, float32x2_t __p1) { |
| 50331 | }) | 51696 | float32x2_t __ret; |
| | 51697 | __ret = (float32x2_t) __builtin_neon_vmulx_v((int8x8_t)__p0, (int8x8_t)__p1, 9); |
| | 51698 | return __ret; |
| | 51699 | } |
| 50332 | #endif | 51700 | #endif |
| 50333 | | 51701 | |
| | 51702 | __ai float64_t vmulxd_f64(float64_t __p0, float64_t __p1) { |
| | 51703 | float64_t __ret; |
| | 51704 | __ret = (float64_t) __builtin_neon_vmulxd_f64(__p0, __p1); |
| | 51705 | return __ret; |
| | 51706 | } |
| | 51707 | __ai float32_t vmulxs_f32(float32_t __p0, float32_t __p1) { |
| | 51708 | float32_t __ret; |
| | 51709 | __ret = (float32_t) __builtin_neon_vmulxs_f32(__p0, __p1); |
| | 51710 | return __ret; |
| | 51711 | } |
| | 51712 | #define vmulxd_lane_f64(__p0_588, __p1_588, __p2_588) __extension__ ({ \ |
| | 51713 | float64_t __ret_588; \ |
| | 51714 | float64_t __s0_588 = __p0_588; \ |
| | 51715 | float64x1_t __s1_588 = __p1_588; \ |
| | 51716 | __ret_588 = vmulxd_f64(__s0_588, vget_lane_f64(__s1_588, __p2_588)); \ |
| | 51717 | __ret_588; \ |
| | 51718 | }) |
| 50334 | #ifdef __LITTLE_ENDIAN__ | 51719 | #ifdef __LITTLE_ENDIAN__ |
| 50335 | #define vcopyq_lane_f32(__p0_371, __p1_371, __p2_371, __p3_371) __extension__ ({ \ | 51720 | #define vmulxs_lane_f32(__p0_589, __p1_589, __p2_589) __extension__ ({ \ |
| 50336 | float32x4_t __ret_371; \ | 51721 | float32_t __ret_589; \ |
| 50337 | float32x4_t __s0_371 = __p0_371; \ | 51722 | float32_t __s0_589 = __p0_589; \ |
| 50338 | float32x2_t __s2_371 = __p2_371; \ | 51723 | float32x2_t __s1_589 = __p1_589; \ |
| 50339 | __ret_371 = vsetq_lane_f32(vget_lane_f32(__s2_371, __p3_371), __s0_371, __p1_371); \ | 51724 | __ret_589 = vmulxs_f32(__s0_589, vget_lane_f32(__s1_589, __p2_589)); \ |
| 50340 | __ret_371; \ | 51725 | __ret_589; \ |
| 50341 | }) | 51726 | }) |
| 50342 | #else | 51727 | #else |
| 50343 | #define vcopyq_lane_f32(__p0_372, __p1_372, __p2_372, __p3_372) __extension__ ({ \ | 51728 | #define vmulxs_lane_f32(__p0_590, __p1_590, __p2_590) __extension__ ({ \ |
| 50344 | float32x4_t __ret_372; \ | 51729 | float32_t __ret_590; \ |
| 50345 | float32x4_t __s0_372 = __p0_372; \ | 51730 | float32_t __s0_590 = __p0_590; \ |
| 50346 | float32x2_t __s2_372 = __p2_372; \ | 51731 | float32x2_t __s1_590 = __p1_590; \ |
| 50347 | float32x4_t __rev0_372; __rev0_372 = __builtin_shufflevector(__s0_372, __s0_372, 3, 2, 1, 0); \ | 51732 | float32x2_t __rev1_590; __rev1_590 = __builtin_shufflevector(__s1_590, __s1_590, 1, 0); \ |
| 50348 | float32x2_t __rev2_372; __rev2_372 = __builtin_shufflevector(__s2_372, __s2_372, 1, 0); \ | 51733 | __ret_590 = vmulxs_f32(__s0_590, __noswap_vget_lane_f32(__rev1_590, __p2_590)); \ |
| 50349 | __ret_372 = __noswap_vsetq_lane_f32(__noswap_vget_lane_f32(__rev2_372, __p3_372), __rev0_372, __p1_372); \ | 51734 | __ret_590; \ |
| 50350 | __ret_372 = __builtin_shufflevector(__ret_372, __ret_372, 3, 2, 1, 0); \ | | |
| 50351 | __ret_372; \ | | |
| 50352 | }) | 51735 | }) |
| 50353 | #endif | 51736 | #endif |
| 50354 | | 51737 | |
| 50355 | #ifdef __LITTLE_ENDIAN__ | 51738 | #ifdef __LITTLE_ENDIAN__ |
| 50356 | #define vcopyq_lane_s32(__p0_373, __p1_373, __p2_373, __p3_373) __extension__ ({ \ | 51739 | #define vmulxq_lane_f64(__p0_591, __p1_591, __p2_591) __extension__ ({ \ |
| 50357 | int32x4_t __ret_373; \ | 51740 | float64x2_t __ret_591; \ |
| 50358 | int32x4_t __s0_373 = __p0_373; \ | 51741 | float64x2_t __s0_591 = __p0_591; \ |
| 50359 | int32x2_t __s2_373 = __p2_373; \ | 51742 | float64x1_t __s1_591 = __p1_591; \ |
| 50360 | __ret_373 = vsetq_lane_s32(vget_lane_s32(__s2_373, __p3_373), __s0_373, __p1_373); \ | 51743 | __ret_591 = vmulxq_f64(__s0_591, splatq_lane_f64(__s1_591, __p2_591)); \ |
| 50361 | __ret_373; \ | 51744 | __ret_591; \ |
| 50362 | }) | 51745 | }) |
| 50363 | #else | 51746 | #else |
| 50364 | #define vcopyq_lane_s32(__p0_374, __p1_374, __p2_374, __p3_374) __extension__ ({ \ | 51747 | #define vmulxq_lane_f64(__p0_592, __p1_592, __p2_592) __extension__ ({ \ |
| 50365 | int32x4_t __ret_374; \ | 51748 | float64x2_t __ret_592; \ |
| 50366 | int32x4_t __s0_374 = __p0_374; \ | 51749 | float64x2_t __s0_592 = __p0_592; \ |
| 50367 | int32x2_t __s2_374 = __p2_374; \ | 51750 | float64x1_t __s1_592 = __p1_592; \ |
| 50368 | int32x4_t __rev0_374; __rev0_374 = __builtin_shufflevector(__s0_374, __s0_374, 3, 2, 1, 0); \ | 51751 | float64x2_t __rev0_592; __rev0_592 = __builtin_shufflevector(__s0_592, __s0_592, 1, 0); \ |
| 50369 | int32x2_t __rev2_374; __rev2_374 = __builtin_shufflevector(__s2_374, __s2_374, 1, 0); \ | 51752 | __ret_592 = __noswap_vmulxq_f64(__rev0_592, __noswap_splatq_lane_f64(__s1_592, __p2_592)); \ |
| 50370 | __ret_374 = __noswap_vsetq_lane_s32(__noswap_vget_lane_s32(__rev2_374, __p3_374), __rev0_374, __p1_374); \ | 51753 | __ret_592 = __builtin_shufflevector(__ret_592, __ret_592, 1, 0); \ |
| 50371 | __ret_374 = __builtin_shufflevector(__ret_374, __ret_374, 3, 2, 1, 0); \ | 51754 | __ret_592; \ |
| 50372 | __ret_374; \ | | |
| 50373 | }) | 51755 | }) |
| 50374 | #endif | 51756 | #endif |
| 50375 | | 51757 | |
| 50376 | #ifdef __LITTLE_ENDIAN__ | 51758 | #ifdef __LITTLE_ENDIAN__ |
| 50377 | #define vcopyq_lane_s64(__p0_375, __p1_375, __p2_375, __p3_375) __extension__ ({ \ | 51759 | #define vmulxq_lane_f32(__p0_593, __p1_593, __p2_593) __extension__ ({ \ |
| 50378 | int64x2_t __ret_375; \ | 51760 | float32x4_t __ret_593; \ |
| 50379 | int64x2_t __s0_375 = __p0_375; \ | 51761 | float32x4_t __s0_593 = __p0_593; \ |
| 50380 | int64x1_t __s2_375 = __p2_375; \ | 51762 | float32x2_t __s1_593 = __p1_593; \ |
| 50381 | __ret_375 = vsetq_lane_s64(vget_lane_s64(__s2_375, __p3_375), __s0_375, __p1_375); \ | 51763 | __ret_593 = vmulxq_f32(__s0_593, splatq_lane_f32(__s1_593, __p2_593)); \ |
| 50382 | __ret_375; \ | 51764 | __ret_593; \ |
| 50383 | }) | 51765 | }) |
| 50384 | #else | 51766 | #else |
| 50385 | #define vcopyq_lane_s64(__p0_376, __p1_376, __p2_376, __p3_376) __extension__ ({ \ | 51767 | #define vmulxq_lane_f32(__p0_594, __p1_594, __p2_594) __extension__ ({ \ |
| 50386 | int64x2_t __ret_376; \ | 51768 | float32x4_t __ret_594; \ |
| 50387 | int64x2_t __s0_376 = __p0_376; \ | 51769 | float32x4_t __s0_594 = __p0_594; \ |
| 50388 | int64x1_t __s2_376 = __p2_376; \ | 51770 | float32x2_t __s1_594 = __p1_594; \ |
| 50389 | int64x2_t __rev0_376; __rev0_376 = __builtin_shufflevector(__s0_376, __s0_376, 1, 0); \ | 51771 | float32x4_t __rev0_594; __rev0_594 = __builtin_shufflevector(__s0_594, __s0_594, 3, 2, 1, 0); \ |
| 50390 | __ret_376 = __noswap_vsetq_lane_s64(vget_lane_s64(__s2_376, __p3_376), __rev0_376, __p1_376); \ | 51772 | float32x2_t __rev1_594; __rev1_594 = __builtin_shufflevector(__s1_594, __s1_594, 1, 0); \ |
| 50391 | __ret_376 = __builtin_shufflevector(__ret_376, __ret_376, 1, 0); \ | 51773 | __ret_594 = __noswap_vmulxq_f32(__rev0_594, __noswap_splatq_lane_f32(__rev1_594, __p2_594)); \ |
| 50392 | __ret_376; \ | 51774 | __ret_594 = __builtin_shufflevector(__ret_594, __ret_594, 3, 2, 1, 0); \ |
| | 51775 | __ret_594; \ |
| 50393 | }) | 51776 | }) |
| 50394 | #endif | 51777 | #endif |
| 50395 | | 51778 | |
| 50396 | #ifdef __LITTLE_ENDIAN__ | 51779 | #ifdef __LITTLE_ENDIAN__ |
| 50397 | #define vcopyq_lane_s16(__p0_377, __p1_377, __p2_377, __p3_377) __extension__ ({ \ | 51780 | #define vmulx_lane_f32(__p0_595, __p1_595, __p2_595) __extension__ ({ \ |
| 50398 | int16x8_t __ret_377; \ | 51781 | float32x2_t __ret_595; \ |
| 50399 | int16x8_t __s0_377 = __p0_377; \ | 51782 | float32x2_t __s0_595 = __p0_595; \ |
| 50400 | int16x4_t __s2_377 = __p2_377; \ | 51783 | float32x2_t __s1_595 = __p1_595; \ |
| 50401 | __ret_377 = vsetq_lane_s16(vget_lane_s16(__s2_377, __p3_377), __s0_377, __p1_377); \ | 51784 | __ret_595 = vmulx_f32(__s0_595, splat_lane_f32(__s1_595, __p2_595)); \ |
| 50402 | __ret_377; \ | 51785 | __ret_595; \ |
| 50403 | }) | 51786 | }) |
| 50404 | #else | 51787 | #else |
| 50405 | #define vcopyq_lane_s16(__p0_378, __p1_378, __p2_378, __p3_378) __extension__ ({ \ | 51788 | #define vmulx_lane_f32(__p0_596, __p1_596, __p2_596) __extension__ ({ \ |
| 50406 | int16x8_t __ret_378; \ | 51789 | float32x2_t __ret_596; \ |
| 50407 | int16x8_t __s0_378 = __p0_378; \ | 51790 | float32x2_t __s0_596 = __p0_596; \ |
| 50408 | int16x4_t __s2_378 = __p2_378; \ | 51791 | float32x2_t __s1_596 = __p1_596; \ |
| 50409 | int16x8_t __rev0_378; __rev0_378 = __builtin_shufflevector(__s0_378, __s0_378, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51792 | float32x2_t __rev0_596; __rev0_596 = __builtin_shufflevector(__s0_596, __s0_596, 1, 0); \ |
| 50410 | int16x4_t __rev2_378; __rev2_378 = __builtin_shufflevector(__s2_378, __s2_378, 3, 2, 1, 0); \ | 51793 | float32x2_t __rev1_596; __rev1_596 = __builtin_shufflevector(__s1_596, __s1_596, 1, 0); \ |
| 50411 | __ret_378 = __noswap_vsetq_lane_s16(__noswap_vget_lane_s16(__rev2_378, __p3_378), __rev0_378, __p1_378); \ | 51794 | __ret_596 = __noswap_vmulx_f32(__rev0_596, __noswap_splat_lane_f32(__rev1_596, __p2_596)); \ |
| 50412 | __ret_378 = __builtin_shufflevector(__ret_378, __ret_378, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51795 | __ret_596 = __builtin_shufflevector(__ret_596, __ret_596, 1, 0); \ |
| 50413 | __ret_378; \ | 51796 | __ret_596; \ |
| 50414 | }) | 51797 | }) |
| 50415 | #endif | 51798 | #endif |
| 50416 | | 51799 | |
| 50417 | #ifdef __LITTLE_ENDIAN__ | 51800 | #ifdef __LITTLE_ENDIAN__ |
| 50418 | #define vcopy_lane_p8(__p0_379, __p1_379, __p2_379, __p3_379) __extension__ ({ \ | 51801 | #define vmulxd_laneq_f64(__p0_597, __p1_597, __p2_597) __extension__ ({ \ |
| 50419 | poly8x8_t __ret_379; \ | 51802 | float64_t __ret_597; \ |
| 50420 | poly8x8_t __s0_379 = __p0_379; \ | 51803 | float64_t __s0_597 = __p0_597; \ |
| 50421 | poly8x8_t __s2_379 = __p2_379; \ | 51804 | float64x2_t __s1_597 = __p1_597; \ |
| 50422 | __ret_379 = vset_lane_p8(vget_lane_p8(__s2_379, __p3_379), __s0_379, __p1_379); \ | 51805 | __ret_597 = vmulxd_f64(__s0_597, vgetq_lane_f64(__s1_597, __p2_597)); \ |
| 50423 | __ret_379; \ | 51806 | __ret_597; \ |
| 50424 | }) | 51807 | }) |
| 50425 | #else | 51808 | #else |
| 50426 | #define vcopy_lane_p8(__p0_380, __p1_380, __p2_380, __p3_380) __extension__ ({ \ | 51809 | #define vmulxd_laneq_f64(__p0_598, __p1_598, __p2_598) __extension__ ({ \ |
| 50427 | poly8x8_t __ret_380; \ | 51810 | float64_t __ret_598; \ |
| 50428 | poly8x8_t __s0_380 = __p0_380; \ | 51811 | float64_t __s0_598 = __p0_598; \ |
| 50429 | poly8x8_t __s2_380 = __p2_380; \ | 51812 | float64x2_t __s1_598 = __p1_598; \ |
| 50430 | poly8x8_t __rev0_380; __rev0_380 = __builtin_shufflevector(__s0_380, __s0_380, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51813 | float64x2_t __rev1_598; __rev1_598 = __builtin_shufflevector(__s1_598, __s1_598, 1, 0); \ |
| 50431 | poly8x8_t __rev2_380; __rev2_380 = __builtin_shufflevector(__s2_380, __s2_380, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51814 | __ret_598 = vmulxd_f64(__s0_598, __noswap_vgetq_lane_f64(__rev1_598, __p2_598)); \ |
| 50432 | __ret_380 = __noswap_vset_lane_p8(__noswap_vget_lane_p8(__rev2_380, __p3_380), __rev0_380, __p1_380); \ | 51815 | __ret_598; \ |
| 50433 | __ret_380 = __builtin_shufflevector(__ret_380, __ret_380, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 50434 | __ret_380; \ | | |
| 50435 | }) | 51816 | }) |
| 50436 | #endif | 51817 | #endif |
| 50437 | | 51818 | |
| 50438 | #ifdef __LITTLE_ENDIAN__ | 51819 | #ifdef __LITTLE_ENDIAN__ |
| 50439 | #define vcopy_lane_p16(__p0_381, __p1_381, __p2_381, __p3_381) __extension__ ({ \ | 51820 | #define vmulxs_laneq_f32(__p0_599, __p1_599, __p2_599) __extension__ ({ \ |
| 50440 | poly16x4_t __ret_381; \ | 51821 | float32_t __ret_599; \ |
| 50441 | poly16x4_t __s0_381 = __p0_381; \ | 51822 | float32_t __s0_599 = __p0_599; \ |
| 50442 | poly16x4_t __s2_381 = __p2_381; \ | 51823 | float32x4_t __s1_599 = __p1_599; \ |
| 50443 | __ret_381 = vset_lane_p16(vget_lane_p16(__s2_381, __p3_381), __s0_381, __p1_381); \ | 51824 | __ret_599 = vmulxs_f32(__s0_599, vgetq_lane_f32(__s1_599, __p2_599)); \ |
| 50444 | __ret_381; \ | 51825 | __ret_599; \ |
| 50445 | }) | 51826 | }) |
| 50446 | #else | 51827 | #else |
| 50447 | #define vcopy_lane_p16(__p0_382, __p1_382, __p2_382, __p3_382) __extension__ ({ \ | 51828 | #define vmulxs_laneq_f32(__p0_600, __p1_600, __p2_600) __extension__ ({ \ |
| 50448 | poly16x4_t __ret_382; \ | 51829 | float32_t __ret_600; \ |
| 50449 | poly16x4_t __s0_382 = __p0_382; \ | 51830 | float32_t __s0_600 = __p0_600; \ |
| 50450 | poly16x4_t __s2_382 = __p2_382; \ | 51831 | float32x4_t __s1_600 = __p1_600; \ |
| 50451 | poly16x4_t __rev0_382; __rev0_382 = __builtin_shufflevector(__s0_382, __s0_382, 3, 2, 1, 0); \ | 51832 | float32x4_t __rev1_600; __rev1_600 = __builtin_shufflevector(__s1_600, __s1_600, 3, 2, 1, 0); \ |
| 50452 | poly16x4_t __rev2_382; __rev2_382 = __builtin_shufflevector(__s2_382, __s2_382, 3, 2, 1, 0); \ | 51833 | __ret_600 = vmulxs_f32(__s0_600, __noswap_vgetq_lane_f32(__rev1_600, __p2_600)); \ |
| 50453 | __ret_382 = __noswap_vset_lane_p16(__noswap_vget_lane_p16(__rev2_382, __p3_382), __rev0_382, __p1_382); \ | 51834 | __ret_600; \ |
| 50454 | __ret_382 = __builtin_shufflevector(__ret_382, __ret_382, 3, 2, 1, 0); \ | | |
| 50455 | __ret_382; \ | | |
| 50456 | }) | 51835 | }) |
| 50457 | #endif | 51836 | #endif |
| 50458 | | 51837 | |
| 50459 | #ifdef __LITTLE_ENDIAN__ | 51838 | #ifdef __LITTLE_ENDIAN__ |
| 50460 | #define vcopy_lane_u8(__p0_383, __p1_383, __p2_383, __p3_383) __extension__ ({ \ | 51839 | #define vmulxq_laneq_f64(__p0_601, __p1_601, __p2_601) __extension__ ({ \ |
| 50461 | uint8x8_t __ret_383; \ | 51840 | float64x2_t __ret_601; \ |
| 50462 | uint8x8_t __s0_383 = __p0_383; \ | 51841 | float64x2_t __s0_601 = __p0_601; \ |
| 50463 | uint8x8_t __s2_383 = __p2_383; \ | 51842 | float64x2_t __s1_601 = __p1_601; \ |
| 50464 | __ret_383 = vset_lane_u8(vget_lane_u8(__s2_383, __p3_383), __s0_383, __p1_383); \ | 51843 | __ret_601 = vmulxq_f64(__s0_601, splatq_laneq_f64(__s1_601, __p2_601)); \ |
| 50465 | __ret_383; \ | 51844 | __ret_601; \ |
| 50466 | }) | 51845 | }) |
| 50467 | #else | 51846 | #else |
| 50468 | #define vcopy_lane_u8(__p0_384, __p1_384, __p2_384, __p3_384) __extension__ ({ \ | 51847 | #define vmulxq_laneq_f64(__p0_602, __p1_602, __p2_602) __extension__ ({ \ |
| 50469 | uint8x8_t __ret_384; \ | 51848 | float64x2_t __ret_602; \ |
| 50470 | uint8x8_t __s0_384 = __p0_384; \ | 51849 | float64x2_t __s0_602 = __p0_602; \ |
| 50471 | uint8x8_t __s2_384 = __p2_384; \ | 51850 | float64x2_t __s1_602 = __p1_602; \ |
| 50472 | uint8x8_t __rev0_384; __rev0_384 = __builtin_shufflevector(__s0_384, __s0_384, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51851 | float64x2_t __rev0_602; __rev0_602 = __builtin_shufflevector(__s0_602, __s0_602, 1, 0); \ |
| 50473 | uint8x8_t __rev2_384; __rev2_384 = __builtin_shufflevector(__s2_384, __s2_384, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51852 | float64x2_t __rev1_602; __rev1_602 = __builtin_shufflevector(__s1_602, __s1_602, 1, 0); \ |
| 50474 | __ret_384 = __noswap_vset_lane_u8(__noswap_vget_lane_u8(__rev2_384, __p3_384), __rev0_384, __p1_384); \ | 51853 | __ret_602 = __noswap_vmulxq_f64(__rev0_602, __noswap_splatq_laneq_f64(__rev1_602, __p2_602)); \ |
| 50475 | __ret_384 = __builtin_shufflevector(__ret_384, __ret_384, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51854 | __ret_602 = __builtin_shufflevector(__ret_602, __ret_602, 1, 0); \ |
| 50476 | __ret_384; \ | 51855 | __ret_602; \ |
| 50477 | }) | 51856 | }) |
| 50478 | #endif | 51857 | #endif |
| 50479 | | 51858 | |
| 50480 | #ifdef __LITTLE_ENDIAN__ | 51859 | #ifdef __LITTLE_ENDIAN__ |
| 50481 | #define vcopy_lane_u32(__p0_385, __p1_385, __p2_385, __p3_385) __extension__ ({ \ | 51860 | #define vmulxq_laneq_f32(__p0_603, __p1_603, __p2_603) __extension__ ({ \ |
| 50482 | uint32x2_t __ret_385; \ | 51861 | float32x4_t __ret_603; \ |
| 50483 | uint32x2_t __s0_385 = __p0_385; \ | 51862 | float32x4_t __s0_603 = __p0_603; \ |
| 50484 | uint32x2_t __s2_385 = __p2_385; \ | 51863 | float32x4_t __s1_603 = __p1_603; \ |
| 50485 | __ret_385 = vset_lane_u32(vget_lane_u32(__s2_385, __p3_385), __s0_385, __p1_385); \ | 51864 | __ret_603 = vmulxq_f32(__s0_603, splatq_laneq_f32(__s1_603, __p2_603)); \ |
| 50486 | __ret_385; \ | 51865 | __ret_603; \ |
| 50487 | }) | 51866 | }) |
| 50488 | #else | 51867 | #else |
| 50489 | #define vcopy_lane_u32(__p0_386, __p1_386, __p2_386, __p3_386) __extension__ ({ \ | 51868 | #define vmulxq_laneq_f32(__p0_604, __p1_604, __p2_604) __extension__ ({ \ |
| 50490 | uint32x2_t __ret_386; \ | 51869 | float32x4_t __ret_604; \ |
| 50491 | uint32x2_t __s0_386 = __p0_386; \ | 51870 | float32x4_t __s0_604 = __p0_604; \ |
| 50492 | uint32x2_t __s2_386 = __p2_386; \ | 51871 | float32x4_t __s1_604 = __p1_604; \ |
| 50493 | uint32x2_t __rev0_386; __rev0_386 = __builtin_shufflevector(__s0_386, __s0_386, 1, 0); \ | 51872 | float32x4_t __rev0_604; __rev0_604 = __builtin_shufflevector(__s0_604, __s0_604, 3, 2, 1, 0); \ |
| 50494 | uint32x2_t __rev2_386; __rev2_386 = __builtin_shufflevector(__s2_386, __s2_386, 1, 0); \ | 51873 | float32x4_t __rev1_604; __rev1_604 = __builtin_shufflevector(__s1_604, __s1_604, 3, 2, 1, 0); \ |
| 50495 | __ret_386 = __noswap_vset_lane_u32(__noswap_vget_lane_u32(__rev2_386, __p3_386), __rev0_386, __p1_386); \ | 51874 | __ret_604 = __noswap_vmulxq_f32(__rev0_604, __noswap_splatq_laneq_f32(__rev1_604, __p2_604)); \ |
| 50496 | __ret_386 = __builtin_shufflevector(__ret_386, __ret_386, 1, 0); \ | 51875 | __ret_604 = __builtin_shufflevector(__ret_604, __ret_604, 3, 2, 1, 0); \ |
| 50497 | __ret_386; \ | 51876 | __ret_604; \ |
| 50498 | }) | 51877 | }) |
| 50499 | #endif | 51878 | #endif |
| 50500 | | 51879 | |
| 50501 | #define vcopy_lane_u64(__p0_387, __p1_387, __p2_387, __p3_387) __extension__ ({ \ | | |
| 50502 | uint64x1_t __ret_387; \ | | |
| 50503 | uint64x1_t __s0_387 = __p0_387; \ | | |
| 50504 | uint64x1_t __s2_387 = __p2_387; \ | | |
| 50505 | __ret_387 = vset_lane_u64(vget_lane_u64(__s2_387, __p3_387), __s0_387, __p1_387); \ | | |
| 50506 | __ret_387; \ | | |
| 50507 | }) | | |
| 50508 | #ifdef __LITTLE_ENDIAN__ | 51880 | #ifdef __LITTLE_ENDIAN__ |
| 50509 | #define vcopy_lane_u16(__p0_388, __p1_388, __p2_388, __p3_388) __extension__ ({ \ | 51881 | #define vmulx_laneq_f32(__p0_605, __p1_605, __p2_605) __extension__ ({ \ |
| 50510 | uint16x4_t __ret_388; \ | 51882 | float32x2_t __ret_605; \ |
| 50511 | uint16x4_t __s0_388 = __p0_388; \ | 51883 | float32x2_t __s0_605 = __p0_605; \ |
| 50512 | uint16x4_t __s2_388 = __p2_388; \ | 51884 | float32x4_t __s1_605 = __p1_605; \ |
| 50513 | __ret_388 = vset_lane_u16(vget_lane_u16(__s2_388, __p3_388), __s0_388, __p1_388); \ | 51885 | __ret_605 = vmulx_f32(__s0_605, splat_laneq_f32(__s1_605, __p2_605)); \ |
| 50514 | __ret_388; \ | 51886 | __ret_605; \ |
| 50515 | }) | 51887 | }) |
| 50516 | #else | 51888 | #else |
| 50517 | #define vcopy_lane_u16(__p0_389, __p1_389, __p2_389, __p3_389) __extension__ ({ \ | 51889 | #define vmulx_laneq_f32(__p0_606, __p1_606, __p2_606) __extension__ ({ \ |
| 50518 | uint16x4_t __ret_389; \ | 51890 | float32x2_t __ret_606; \ |
| 50519 | uint16x4_t __s0_389 = __p0_389; \ | 51891 | float32x2_t __s0_606 = __p0_606; \ |
| 50520 | uint16x4_t __s2_389 = __p2_389; \ | 51892 | float32x4_t __s1_606 = __p1_606; \ |
| 50521 | uint16x4_t __rev0_389; __rev0_389 = __builtin_shufflevector(__s0_389, __s0_389, 3, 2, 1, 0); \ | 51893 | float32x2_t __rev0_606; __rev0_606 = __builtin_shufflevector(__s0_606, __s0_606, 1, 0); \ |
| 50522 | uint16x4_t __rev2_389; __rev2_389 = __builtin_shufflevector(__s2_389, __s2_389, 3, 2, 1, 0); \ | 51894 | float32x4_t __rev1_606; __rev1_606 = __builtin_shufflevector(__s1_606, __s1_606, 3, 2, 1, 0); \ |
| 50523 | __ret_389 = __noswap_vset_lane_u16(__noswap_vget_lane_u16(__rev2_389, __p3_389), __rev0_389, __p1_389); \ | 51895 | __ret_606 = __noswap_vmulx_f32(__rev0_606, __noswap_splat_laneq_f32(__rev1_606, __p2_606)); \ |
| 50524 | __ret_389 = __builtin_shufflevector(__ret_389, __ret_389, 3, 2, 1, 0); \ | 51896 | __ret_606 = __builtin_shufflevector(__ret_606, __ret_606, 1, 0); \ |
| 50525 | __ret_389; \ | 51897 | __ret_606; \ |
| 50526 | }) | 51898 | }) |
| 50527 | #endif | 51899 | #endif |
| 50528 | | 51900 | |
| 50529 | #ifdef __LITTLE_ENDIAN__ | 51901 | #ifdef __LITTLE_ENDIAN__ |
| 50530 | #define vcopy_lane_s8(__p0_390, __p1_390, __p2_390, __p3_390) __extension__ ({ \ | 51902 | __ai float64x2_t vnegq_f64(float64x2_t __p0) { |
| 50531 | int8x8_t __ret_390; \ | 51903 | float64x2_t __ret; |
| 50532 | int8x8_t __s0_390 = __p0_390; \ | 51904 | __ret = -__p0; |
| 50533 | int8x8_t __s2_390 = __p2_390; \ | 51905 | return __ret; |
| 50534 | __ret_390 = vset_lane_s8(vget_lane_s8(__s2_390, __p3_390), __s0_390, __p1_390); \ | 51906 | } |
| 50535 | __ret_390; \ | | |
| 50536 | }) | | |
| 50537 | #else | 51907 | #else |
| 50538 | #define vcopy_lane_s8(__p0_391, __p1_391, __p2_391, __p3_391) __extension__ ({ \ | 51908 | __ai float64x2_t vnegq_f64(float64x2_t __p0) { |
| 50539 | int8x8_t __ret_391; \ | 51909 | float64x2_t __ret; |
| 50540 | int8x8_t __s0_391 = __p0_391; \ | 51910 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 50541 | int8x8_t __s2_391 = __p2_391; \ | 51911 | __ret = -__rev0; |
| 50542 | int8x8_t __rev0_391; __rev0_391 = __builtin_shufflevector(__s0_391, __s0_391, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51912 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 50543 | int8x8_t __rev2_391; __rev2_391 = __builtin_shufflevector(__s2_391, __s2_391, 7, 6, 5, 4, 3, 2, 1, 0); \ | 51913 | return __ret; |
| 50544 | __ret_391 = __noswap_vset_lane_s8(__noswap_vget_lane_s8(__rev2_391, __p3_391), __rev0_391, __p1_391); \ | 51914 | } |
| 50545 | __ret_391 = __builtin_shufflevector(__ret_391, __ret_391, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 50546 | __ret_391; \ | | |
| 50547 | }) | | |
| 50548 | #endif | 51915 | #endif |
| 50549 | | 51916 | |
| 50550 | #ifdef __LITTLE_ENDIAN__ | 51917 | #ifdef __LITTLE_ENDIAN__ |
| 50551 | #define vcopy_lane_f32(__p0_392, __p1_392, __p2_392, __p3_392) __extension__ ({ \ | 51918 | __ai int64x2_t vnegq_s64(int64x2_t __p0) { |
| 50552 | float32x2_t __ret_392; \ | 51919 | int64x2_t __ret; |
| 50553 | float32x2_t __s0_392 = __p0_392; \ | 51920 | __ret = -__p0; |
| 50554 | float32x2_t __s2_392 = __p2_392; \ | 51921 | return __ret; |
| 50555 | __ret_392 = vset_lane_f32(vget_lane_f32(__s2_392, __p3_392), __s0_392, __p1_392); \ | 51922 | } |
| 50556 | __ret_392; \ | | |
| 50557 | }) | | |
| 50558 | #else | 51923 | #else |
| 50559 | #define vcopy_lane_f32(__p0_393, __p1_393, __p2_393, __p3_393) __extension__ ({ \ | 51924 | __ai int64x2_t vnegq_s64(int64x2_t __p0) { |
| 50560 | float32x2_t __ret_393; \ | 51925 | int64x2_t __ret; |
| 50561 | float32x2_t __s0_393 = __p0_393; \ | 51926 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 50562 | float32x2_t __s2_393 = __p2_393; \ | 51927 | __ret = -__rev0; |
| 50563 | float32x2_t __rev0_393; __rev0_393 = __builtin_shufflevector(__s0_393, __s0_393, 1, 0); \ | 51928 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 50564 | float32x2_t __rev2_393; __rev2_393 = __builtin_shufflevector(__s2_393, __s2_393, 1, 0); \ | 51929 | return __ret; |
| 50565 | __ret_393 = __noswap_vset_lane_f32(__noswap_vget_lane_f32(__rev2_393, __p3_393), __rev0_393, __p1_393); \ | 51930 | } |
| 50566 | __ret_393 = __builtin_shufflevector(__ret_393, __ret_393, 1, 0); \ | 51931 | #endif |
| 50567 | __ret_393; \ | 51932 | |
| 50568 | }) | 51933 | __ai float64x1_t vneg_f64(float64x1_t __p0) { |
| | 51934 | float64x1_t __ret; |
| | 51935 | __ret = -__p0; |
| | 51936 | return __ret; |
| | 51937 | } |
| | 51938 | __ai int64x1_t vneg_s64(int64x1_t __p0) { |
| | 51939 | int64x1_t __ret; |
| | 51940 | __ret = -__p0; |
| | 51941 | return __ret; |
| | 51942 | } |
| | 51943 | __ai int64_t vnegd_s64(int64_t __p0) { |
| | 51944 | int64_t __ret; |
| | 51945 | __ret = (int64_t) __builtin_neon_vnegd_s64(__p0); |
| | 51946 | return __ret; |
| | 51947 | } |
| | 51948 | #ifdef __LITTLE_ENDIAN__ |
| | 51949 | __ai uint8x16_t vpaddq_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| | 51950 | uint8x16_t __ret; |
| | 51951 | __ret = (uint8x16_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 48); |
| | 51952 | return __ret; |
| | 51953 | } |
| | 51954 | #else |
| | 51955 | __ai uint8x16_t vpaddq_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| | 51956 | uint8x16_t __ret; |
| | 51957 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 51958 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 51959 | __ret = (uint8x16_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 48); |
| | 51960 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 51961 | return __ret; |
| | 51962 | } |
| 50569 | #endif | 51963 | #endif |
| 50570 | | 51964 | |
| 50571 | #ifdef __LITTLE_ENDIAN__ | 51965 | #ifdef __LITTLE_ENDIAN__ |
| 50572 | #define vcopy_lane_s32(__p0_394, __p1_394, __p2_394, __p3_394) __extension__ ({ \ | 51966 | __ai uint32x4_t vpaddq_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 50573 | int32x2_t __ret_394; \ | 51967 | uint32x4_t __ret; |
| 50574 | int32x2_t __s0_394 = __p0_394; \ | 51968 | __ret = (uint32x4_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 50); |
| 50575 | int32x2_t __s2_394 = __p2_394; \ | 51969 | return __ret; |
| 50576 | __ret_394 = vset_lane_s32(vget_lane_s32(__s2_394, __p3_394), __s0_394, __p1_394); \ | 51970 | } |
| 50577 | __ret_394; \ | | |
| 50578 | }) | | |
| 50579 | #else | 51971 | #else |
| 50580 | #define vcopy_lane_s32(__p0_395, __p1_395, __p2_395, __p3_395) __extension__ ({ \ | 51972 | __ai uint32x4_t vpaddq_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 50581 | int32x2_t __ret_395; \ | 51973 | uint32x4_t __ret; |
| 50582 | int32x2_t __s0_395 = __p0_395; \ | 51974 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 50583 | int32x2_t __s2_395 = __p2_395; \ | 51975 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 50584 | int32x2_t __rev0_395; __rev0_395 = __builtin_shufflevector(__s0_395, __s0_395, 1, 0); \ | 51976 | __ret = (uint32x4_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50); |
| 50585 | int32x2_t __rev2_395; __rev2_395 = __builtin_shufflevector(__s2_395, __s2_395, 1, 0); \ | 51977 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 50586 | __ret_395 = __noswap_vset_lane_s32(__noswap_vget_lane_s32(__rev2_395, __p3_395), __rev0_395, __p1_395); \ | 51978 | return __ret; |
| 50587 | __ret_395 = __builtin_shufflevector(__ret_395, __ret_395, 1, 0); \ | 51979 | } |
| 50588 | __ret_395; \ | | |
| 50589 | }) | | |
| 50590 | #endif | 51980 | #endif |
| 50591 | | 51981 | |
| 50592 | #define vcopy_lane_s64(__p0_396, __p1_396, __p2_396, __p3_396) __extension__ ({ \ | | |
| 50593 | int64x1_t __ret_396; \ | | |
| 50594 | int64x1_t __s0_396 = __p0_396; \ | | |
| 50595 | int64x1_t __s2_396 = __p2_396; \ | | |
| 50596 | __ret_396 = vset_lane_s64(vget_lane_s64(__s2_396, __p3_396), __s0_396, __p1_396); \ | | |
| 50597 | __ret_396; \ | | |
| 50598 | }) | | |
| 50599 | #ifdef __LITTLE_ENDIAN__ | 51982 | #ifdef __LITTLE_ENDIAN__ |
| 50600 | #define vcopy_lane_s16(__p0_397, __p1_397, __p2_397, __p3_397) __extension__ ({ \ | 51983 | __ai uint64x2_t vpaddq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 50601 | int16x4_t __ret_397; \ | 51984 | uint64x2_t __ret; |
| 50602 | int16x4_t __s0_397 = __p0_397; \ | 51985 | __ret = (uint64x2_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); |
| 50603 | int16x4_t __s2_397 = __p2_397; \ | 51986 | return __ret; |
| 50604 | __ret_397 = vset_lane_s16(vget_lane_s16(__s2_397, __p3_397), __s0_397, __p1_397); \ | 51987 | } |
| 50605 | __ret_397; \ | | |
| 50606 | }) | | |
| 50607 | #else | 51988 | #else |
| 50608 | #define vcopy_lane_s16(__p0_398, __p1_398, __p2_398, __p3_398) __extension__ ({ \ | 51989 | __ai uint64x2_t vpaddq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 50609 | int16x4_t __ret_398; \ | 51990 | uint64x2_t __ret; |
| 50610 | int16x4_t __s0_398 = __p0_398; \ | 51991 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 50611 | int16x4_t __s2_398 = __p2_398; \ | 51992 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 50612 | int16x4_t __rev0_398; __rev0_398 = __builtin_shufflevector(__s0_398, __s0_398, 3, 2, 1, 0); \ | 51993 | __ret = (uint64x2_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); |
| 50613 | int16x4_t __rev2_398; __rev2_398 = __builtin_shufflevector(__s2_398, __s2_398, 3, 2, 1, 0); \ | 51994 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 50614 | __ret_398 = __noswap_vset_lane_s16(__noswap_vget_lane_s16(__rev2_398, __p3_398), __rev0_398, __p1_398); \ | 51995 | return __ret; |
| 50615 | __ret_398 = __builtin_shufflevector(__ret_398, __ret_398, 3, 2, 1, 0); \ | 51996 | } |
| 50616 | __ret_398; \ | | |
| 50617 | }) | | |
| 50618 | #endif | 51997 | #endif |
| 50619 | | 51998 | |
| 50620 | #ifdef __LITTLE_ENDIAN__ | 51999 | #ifdef __LITTLE_ENDIAN__ |
| 50621 | #define vcopyq_laneq_p8(__p0_399, __p1_399, __p2_399, __p3_399) __extension__ ({ \ | 52000 | __ai uint16x8_t vpaddq_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 50622 | poly8x16_t __ret_399; \ | 52001 | uint16x8_t __ret; |
| 50623 | poly8x16_t __s0_399 = __p0_399; \ | 52002 | __ret = (uint16x8_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 49); |
| 50624 | poly8x16_t __s2_399 = __p2_399; \ | 52003 | return __ret; |
| 50625 | __ret_399 = vsetq_lane_p8(vgetq_lane_p8(__s2_399, __p3_399), __s0_399, __p1_399); \ | 52004 | } |
| 50626 | __ret_399; \ | | |
| 50627 | }) | | |
| 50628 | #else | 52005 | #else |
| 50629 | #define vcopyq_laneq_p8(__p0_400, __p1_400, __p2_400, __p3_400) __extension__ ({ \ | 52006 | __ai uint16x8_t vpaddq_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 50630 | poly8x16_t __ret_400; \ | 52007 | uint16x8_t __ret; |
| 50631 | poly8x16_t __s0_400 = __p0_400; \ | 52008 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50632 | poly8x16_t __s2_400 = __p2_400; \ | 52009 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50633 | poly8x16_t __rev0_400; __rev0_400 = __builtin_shufflevector(__s0_400, __s0_400, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52010 | __ret = (uint16x8_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 49); |
| 50634 | poly8x16_t __rev2_400; __rev2_400 = __builtin_shufflevector(__s2_400, __s2_400, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52011 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50635 | __ret_400 = __noswap_vsetq_lane_p8(__noswap_vgetq_lane_p8(__rev2_400, __p3_400), __rev0_400, __p1_400); \ | 52012 | return __ret; |
| 50636 | __ret_400 = __builtin_shufflevector(__ret_400, __ret_400, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52013 | } |
| 50637 | __ret_400; \ | | |
| 50638 | }) | | |
| 50639 | #endif | 52014 | #endif |
| 50640 | | 52015 | |
| 50641 | #ifdef __LITTLE_ENDIAN__ | 52016 | #ifdef __LITTLE_ENDIAN__ |
| 50642 | #define vcopyq_laneq_p16(__p0_401, __p1_401, __p2_401, __p3_401) __extension__ ({ \ | 52017 | __ai int8x16_t vpaddq_s8(int8x16_t __p0, int8x16_t __p1) { |
| 50643 | poly16x8_t __ret_401; \ | 52018 | int8x16_t __ret; |
| 50644 | poly16x8_t __s0_401 = __p0_401; \ | 52019 | __ret = (int8x16_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 32); |
| 50645 | poly16x8_t __s2_401 = __p2_401; \ | 52020 | return __ret; |
| 50646 | __ret_401 = vsetq_lane_p16(vgetq_lane_p16(__s2_401, __p3_401), __s0_401, __p1_401); \ | 52021 | } |
| 50647 | __ret_401; \ | | |
| 50648 | }) | | |
| 50649 | #else | 52022 | #else |
| 50650 | #define vcopyq_laneq_p16(__p0_402, __p1_402, __p2_402, __p3_402) __extension__ ({ \ | 52023 | __ai int8x16_t vpaddq_s8(int8x16_t __p0, int8x16_t __p1) { |
| 50651 | poly16x8_t __ret_402; \ | 52024 | int8x16_t __ret; |
| 50652 | poly16x8_t __s0_402 = __p0_402; \ | 52025 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50653 | poly16x8_t __s2_402 = __p2_402; \ | 52026 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50654 | poly16x8_t __rev0_402; __rev0_402 = __builtin_shufflevector(__s0_402, __s0_402, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52027 | __ret = (int8x16_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 32); |
| 50655 | poly16x8_t __rev2_402; __rev2_402 = __builtin_shufflevector(__s2_402, __s2_402, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52028 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50656 | __ret_402 = __noswap_vsetq_lane_p16(__noswap_vgetq_lane_p16(__rev2_402, __p3_402), __rev0_402, __p1_402); \ | 52029 | return __ret; |
| 50657 | __ret_402 = __builtin_shufflevector(__ret_402, __ret_402, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52030 | } |
| 50658 | __ret_402; \ | | |
| 50659 | }) | | |
| 50660 | #endif | 52031 | #endif |
| 50661 | | 52032 | |
| 50662 | #ifdef __LITTLE_ENDIAN__ | 52033 | #ifdef __LITTLE_ENDIAN__ |
| 50663 | #define vcopyq_laneq_u8(__p0_403, __p1_403, __p2_403, __p3_403) __extension__ ({ \ | 52034 | __ai float64x2_t vpaddq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 50664 | uint8x16_t __ret_403; \ | 52035 | float64x2_t __ret; |
| 50665 | uint8x16_t __s0_403 = __p0_403; \ | 52036 | __ret = (float64x2_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| 50666 | uint8x16_t __s2_403 = __p2_403; \ | 52037 | return __ret; |
| 50667 | __ret_403 = vsetq_lane_u8(vgetq_lane_u8(__s2_403, __p3_403), __s0_403, __p1_403); \ | 52038 | } |
| 50668 | __ret_403; \ | | |
| 50669 | }) | | |
| 50670 | #else | 52039 | #else |
| 50671 | #define vcopyq_laneq_u8(__p0_404, __p1_404, __p2_404, __p3_404) __extension__ ({ \ | 52040 | __ai float64x2_t vpaddq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 50672 | uint8x16_t __ret_404; \ | 52041 | float64x2_t __ret; |
| 50673 | uint8x16_t __s0_404 = __p0_404; \ | 52042 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 50674 | uint8x16_t __s2_404 = __p2_404; \ | 52043 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 50675 | uint8x16_t __rev0_404; __rev0_404 = __builtin_shufflevector(__s0_404, __s0_404, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52044 | __ret = (float64x2_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| 50676 | uint8x16_t __rev2_404; __rev2_404 = __builtin_shufflevector(__s2_404, __s2_404, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52045 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 50677 | __ret_404 = __noswap_vsetq_lane_u8(__noswap_vgetq_lane_u8(__rev2_404, __p3_404), __rev0_404, __p1_404); \ | 52046 | return __ret; |
| 50678 | __ret_404 = __builtin_shufflevector(__ret_404, __ret_404, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52047 | } |
| 50679 | __ret_404; \ | | |
| 50680 | }) | | |
| 50681 | #endif | 52048 | #endif |
| 50682 | | 52049 | |
| 50683 | #ifdef __LITTLE_ENDIAN__ | 52050 | #ifdef __LITTLE_ENDIAN__ |
| 50684 | #define vcopyq_laneq_u32(__p0_405, __p1_405, __p2_405, __p3_405) __extension__ ({ \ | 52051 | __ai float32x4_t vpaddq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 50685 | uint32x4_t __ret_405; \ | 52052 | float32x4_t __ret; |
| 50686 | uint32x4_t __s0_405 = __p0_405; \ | 52053 | __ret = (float32x4_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); |
| 50687 | uint32x4_t __s2_405 = __p2_405; \ | 52054 | return __ret; |
| 50688 | __ret_405 = vsetq_lane_u32(vgetq_lane_u32(__s2_405, __p3_405), __s0_405, __p1_405); \ | 52055 | } |
| 50689 | __ret_405; \ | | |
| 50690 | }) | | |
| 50691 | #else | 52056 | #else |
| 50692 | #define vcopyq_laneq_u32(__p0_406, __p1_406, __p2_406, __p3_406) __extension__ ({ \ | 52057 | __ai float32x4_t vpaddq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 50693 | uint32x4_t __ret_406; \ | 52058 | float32x4_t __ret; |
| 50694 | uint32x4_t __s0_406 = __p0_406; \ | 52059 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 50695 | uint32x4_t __s2_406 = __p2_406; \ | 52060 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 50696 | uint32x4_t __rev0_406; __rev0_406 = __builtin_shufflevector(__s0_406, __s0_406, 3, 2, 1, 0); \ | 52061 | __ret = (float32x4_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); |
| 50697 | uint32x4_t __rev2_406; __rev2_406 = __builtin_shufflevector(__s2_406, __s2_406, 3, 2, 1, 0); \ | 52062 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 50698 | __ret_406 = __noswap_vsetq_lane_u32(__noswap_vgetq_lane_u32(__rev2_406, __p3_406), __rev0_406, __p1_406); \ | 52063 | return __ret; |
| 50699 | __ret_406 = __builtin_shufflevector(__ret_406, __ret_406, 3, 2, 1, 0); \ | 52064 | } |
| 50700 | __ret_406; \ | | |
| 50701 | }) | | |
| 50702 | #endif | 52065 | #endif |
| 50703 | | 52066 | |
| 50704 | #ifdef __LITTLE_ENDIAN__ | 52067 | #ifdef __LITTLE_ENDIAN__ |
| 50705 | #define vcopyq_laneq_u64(__p0_407, __p1_407, __p2_407, __p3_407) __extension__ ({ \ | 52068 | __ai int32x4_t vpaddq_s32(int32x4_t __p0, int32x4_t __p1) { |
| 50706 | uint64x2_t __ret_407; \ | 52069 | int32x4_t __ret; |
| 50707 | uint64x2_t __s0_407 = __p0_407; \ | 52070 | __ret = (int32x4_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 34); |
| 50708 | uint64x2_t __s2_407 = __p2_407; \ | 52071 | return __ret; |
| 50709 | __ret_407 = vsetq_lane_u64(vgetq_lane_u64(__s2_407, __p3_407), __s0_407, __p1_407); \ | 52072 | } |
| 50710 | __ret_407; \ | | |
| 50711 | }) | | |
| 50712 | #else | 52073 | #else |
| 50713 | #define vcopyq_laneq_u64(__p0_408, __p1_408, __p2_408, __p3_408) __extension__ ({ \ | 52074 | __ai int32x4_t vpaddq_s32(int32x4_t __p0, int32x4_t __p1) { |
| 50714 | uint64x2_t __ret_408; \ | 52075 | int32x4_t __ret; |
| 50715 | uint64x2_t __s0_408 = __p0_408; \ | 52076 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 50716 | uint64x2_t __s2_408 = __p2_408; \ | 52077 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 50717 | uint64x2_t __rev0_408; __rev0_408 = __builtin_shufflevector(__s0_408, __s0_408, 1, 0); \ | 52078 | __ret = (int32x4_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 34); |
| 50718 | uint64x2_t __rev2_408; __rev2_408 = __builtin_shufflevector(__s2_408, __s2_408, 1, 0); \ | 52079 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 50719 | __ret_408 = __noswap_vsetq_lane_u64(__noswap_vgetq_lane_u64(__rev2_408, __p3_408), __rev0_408, __p1_408); \ | 52080 | return __ret; |
| 50720 | __ret_408 = __builtin_shufflevector(__ret_408, __ret_408, 1, 0); \ | 52081 | } |
| 50721 | __ret_408; \ | | |
| 50722 | }) | | |
| 50723 | #endif | 52082 | #endif |
| 50724 | | 52083 | |
| 50725 | #ifdef __LITTLE_ENDIAN__ | 52084 | #ifdef __LITTLE_ENDIAN__ |
| 50726 | #define vcopyq_laneq_u16(__p0_409, __p1_409, __p2_409, __p3_409) __extension__ ({ \ | 52085 | __ai int64x2_t vpaddq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 50727 | uint16x8_t __ret_409; \ | 52086 | int64x2_t __ret; |
| 50728 | uint16x8_t __s0_409 = __p0_409; \ | 52087 | __ret = (int64x2_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 35); |
| 50729 | uint16x8_t __s2_409 = __p2_409; \ | 52088 | return __ret; |
| 50730 | __ret_409 = vsetq_lane_u16(vgetq_lane_u16(__s2_409, __p3_409), __s0_409, __p1_409); \ | 52089 | } |
| 50731 | __ret_409; \ | | |
| 50732 | }) | | |
| 50733 | #else | 52090 | #else |
| 50734 | #define vcopyq_laneq_u16(__p0_410, __p1_410, __p2_410, __p3_410) __extension__ ({ \ | 52091 | __ai int64x2_t vpaddq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 50735 | uint16x8_t __ret_410; \ | 52092 | int64x2_t __ret; |
| 50736 | uint16x8_t __s0_410 = __p0_410; \ | 52093 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 50737 | uint16x8_t __s2_410 = __p2_410; \ | 52094 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 50738 | uint16x8_t __rev0_410; __rev0_410 = __builtin_shufflevector(__s0_410, __s0_410, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52095 | __ret = (int64x2_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 35); |
| 50739 | uint16x8_t __rev2_410; __rev2_410 = __builtin_shufflevector(__s2_410, __s2_410, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52096 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 50740 | __ret_410 = __noswap_vsetq_lane_u16(__noswap_vgetq_lane_u16(__rev2_410, __p3_410), __rev0_410, __p1_410); \ | 52097 | return __ret; |
| 50741 | __ret_410 = __builtin_shufflevector(__ret_410, __ret_410, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52098 | } |
| 50742 | __ret_410; \ | | |
| 50743 | }) | | |
| 50744 | #endif | 52099 | #endif |
| 50745 | | 52100 | |
| 50746 | #ifdef __LITTLE_ENDIAN__ | 52101 | #ifdef __LITTLE_ENDIAN__ |
| 50747 | #define vcopyq_laneq_s8(__p0_411, __p1_411, __p2_411, __p3_411) __extension__ ({ \ | 52102 | __ai int16x8_t vpaddq_s16(int16x8_t __p0, int16x8_t __p1) { |
| 50748 | int8x16_t __ret_411; \ | 52103 | int16x8_t __ret; |
| 50749 | int8x16_t __s0_411 = __p0_411; \ | 52104 | __ret = (int16x8_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 33); |
| 50750 | int8x16_t __s2_411 = __p2_411; \ | 52105 | return __ret; |
| 50751 | __ret_411 = vsetq_lane_s8(vgetq_lane_s8(__s2_411, __p3_411), __s0_411, __p1_411); \ | 52106 | } |
| 50752 | __ret_411; \ | | |
| 50753 | }) | | |
| 50754 | #else | 52107 | #else |
| 50755 | #define vcopyq_laneq_s8(__p0_412, __p1_412, __p2_412, __p3_412) __extension__ ({ \ | 52108 | __ai int16x8_t vpaddq_s16(int16x8_t __p0, int16x8_t __p1) { |
| 50756 | int8x16_t __ret_412; \ | 52109 | int16x8_t __ret; |
| 50757 | int8x16_t __s0_412 = __p0_412; \ | 52110 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50758 | int8x16_t __s2_412 = __p2_412; \ | 52111 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50759 | int8x16_t __rev0_412; __rev0_412 = __builtin_shufflevector(__s0_412, __s0_412, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52112 | __ret = (int16x8_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 33); |
| 50760 | int8x16_t __rev2_412; __rev2_412 = __builtin_shufflevector(__s2_412, __s2_412, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52113 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50761 | __ret_412 = __noswap_vsetq_lane_s8(__noswap_vgetq_lane_s8(__rev2_412, __p3_412), __rev0_412, __p1_412); \ | 52114 | return __ret; |
| 50762 | __ret_412 = __builtin_shufflevector(__ret_412, __ret_412, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52115 | } |
| 50763 | __ret_412; \ | | |
| 50764 | }) | | |
| 50765 | #endif | 52116 | #endif |
| 50766 | | 52117 | |
| 50767 | #ifdef __LITTLE_ENDIAN__ | 52118 | #ifdef __LITTLE_ENDIAN__ |
| 50768 | #define vcopyq_laneq_f32(__p0_413, __p1_413, __p2_413, __p3_413) __extension__ ({ \ | 52119 | __ai uint64_t vpaddd_u64(uint64x2_t __p0) { |
| 50769 | float32x4_t __ret_413; \ | 52120 | uint64_t __ret; |
| 50770 | float32x4_t __s0_413 = __p0_413; \ | 52121 | __ret = (uint64_t) __builtin_neon_vpaddd_u64(__p0); |
| 50771 | float32x4_t __s2_413 = __p2_413; \ | 52122 | return __ret; |
| 50772 | __ret_413 = vsetq_lane_f32(vgetq_lane_f32(__s2_413, __p3_413), __s0_413, __p1_413); \ | 52123 | } |
| 50773 | __ret_413; \ | | |
| 50774 | }) | | |
| 50775 | #else | 52124 | #else |
| 50776 | #define vcopyq_laneq_f32(__p0_414, __p1_414, __p2_414, __p3_414) __extension__ ({ \ | 52125 | __ai uint64_t vpaddd_u64(uint64x2_t __p0) { |
| 50777 | float32x4_t __ret_414; \ | 52126 | uint64_t __ret; |
| 50778 | float32x4_t __s0_414 = __p0_414; \ | 52127 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 50779 | float32x4_t __s2_414 = __p2_414; \ | 52128 | __ret = (uint64_t) __builtin_neon_vpaddd_u64(__rev0); |
| 50780 | float32x4_t __rev0_414; __rev0_414 = __builtin_shufflevector(__s0_414, __s0_414, 3, 2, 1, 0); \ | 52129 | return __ret; |
| 50781 | float32x4_t __rev2_414; __rev2_414 = __builtin_shufflevector(__s2_414, __s2_414, 3, 2, 1, 0); \ | 52130 | } |
| 50782 | __ret_414 = __noswap_vsetq_lane_f32(__noswap_vgetq_lane_f32(__rev2_414, __p3_414), __rev0_414, __p1_414); \ | | |
| 50783 | __ret_414 = __builtin_shufflevector(__ret_414, __ret_414, 3, 2, 1, 0); \ | | |
| 50784 | __ret_414; \ | | |
| 50785 | }) | | |
| 50786 | #endif | 52131 | #endif |
| 50787 | | 52132 | |
| 50788 | #ifdef __LITTLE_ENDIAN__ | 52133 | #ifdef __LITTLE_ENDIAN__ |
| 50789 | #define vcopyq_laneq_s32(__p0_415, __p1_415, __p2_415, __p3_415) __extension__ ({ \ | 52134 | __ai float64_t vpaddd_f64(float64x2_t __p0) { |
| 50790 | int32x4_t __ret_415; \ | 52135 | float64_t __ret; |
| 50791 | int32x4_t __s0_415 = __p0_415; \ | 52136 | __ret = (float64_t) __builtin_neon_vpaddd_f64(__p0); |
| 50792 | int32x4_t __s2_415 = __p2_415; \ | 52137 | return __ret; |
| 50793 | __ret_415 = vsetq_lane_s32(vgetq_lane_s32(__s2_415, __p3_415), __s0_415, __p1_415); \ | 52138 | } |
| 50794 | __ret_415; \ | | |
| 50795 | }) | | |
| 50796 | #else | 52139 | #else |
| 50797 | #define vcopyq_laneq_s32(__p0_416, __p1_416, __p2_416, __p3_416) __extension__ ({ \ | 52140 | __ai float64_t vpaddd_f64(float64x2_t __p0) { |
| 50798 | int32x4_t __ret_416; \ | 52141 | float64_t __ret; |
| 50799 | int32x4_t __s0_416 = __p0_416; \ | 52142 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 50800 | int32x4_t __s2_416 = __p2_416; \ | 52143 | __ret = (float64_t) __builtin_neon_vpaddd_f64(__rev0); |
| 50801 | int32x4_t __rev0_416; __rev0_416 = __builtin_shufflevector(__s0_416, __s0_416, 3, 2, 1, 0); \ | 52144 | return __ret; |
| 50802 | int32x4_t __rev2_416; __rev2_416 = __builtin_shufflevector(__s2_416, __s2_416, 3, 2, 1, 0); \ | 52145 | } |
| 50803 | __ret_416 = __noswap_vsetq_lane_s32(__noswap_vgetq_lane_s32(__rev2_416, __p3_416), __rev0_416, __p1_416); \ | | |
| 50804 | __ret_416 = __builtin_shufflevector(__ret_416, __ret_416, 3, 2, 1, 0); \ | | |
| 50805 | __ret_416; \ | | |
| 50806 | }) | | |
| 50807 | #endif | 52146 | #endif |
| 50808 | | 52147 | |
| 50809 | #ifdef __LITTLE_ENDIAN__ | 52148 | #ifdef __LITTLE_ENDIAN__ |
| 50810 | #define vcopyq_laneq_s64(__p0_417, __p1_417, __p2_417, __p3_417) __extension__ ({ \ | 52149 | __ai int64_t vpaddd_s64(int64x2_t __p0) { |
| 50811 | int64x2_t __ret_417; \ | 52150 | int64_t __ret; |
| 50812 | int64x2_t __s0_417 = __p0_417; \ | 52151 | __ret = (int64_t) __builtin_neon_vpaddd_s64(__p0); |
| 50813 | int64x2_t __s2_417 = __p2_417; \ | 52152 | return __ret; |
| 50814 | __ret_417 = vsetq_lane_s64(vgetq_lane_s64(__s2_417, __p3_417), __s0_417, __p1_417); \ | 52153 | } |
| 50815 | __ret_417; \ | | |
| 50816 | }) | | |
| 50817 | #else | 52154 | #else |
| 50818 | #define vcopyq_laneq_s64(__p0_418, __p1_418, __p2_418, __p3_418) __extension__ ({ \ | 52155 | __ai int64_t vpaddd_s64(int64x2_t __p0) { |
| 50819 | int64x2_t __ret_418; \ | 52156 | int64_t __ret; |
| 50820 | int64x2_t __s0_418 = __p0_418; \ | 52157 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 50821 | int64x2_t __s2_418 = __p2_418; \ | 52158 | __ret = (int64_t) __builtin_neon_vpaddd_s64(__rev0); |
| 50822 | int64x2_t __rev0_418; __rev0_418 = __builtin_shufflevector(__s0_418, __s0_418, 1, 0); \ | 52159 | return __ret; |
| 50823 | int64x2_t __rev2_418; __rev2_418 = __builtin_shufflevector(__s2_418, __s2_418, 1, 0); \ | 52160 | } |
| 50824 | __ret_418 = __noswap_vsetq_lane_s64(__noswap_vgetq_lane_s64(__rev2_418, __p3_418), __rev0_418, __p1_418); \ | | |
| 50825 | __ret_418 = __builtin_shufflevector(__ret_418, __ret_418, 1, 0); \ | | |
| 50826 | __ret_418; \ | | |
| 50827 | }) | | |
| 50828 | #endif | 52161 | #endif |
| 50829 | | 52162 | |
| 50830 | #ifdef __LITTLE_ENDIAN__ | 52163 | #ifdef __LITTLE_ENDIAN__ |
| 50831 | #define vcopyq_laneq_s16(__p0_419, __p1_419, __p2_419, __p3_419) __extension__ ({ \ | 52164 | __ai float32_t vpadds_f32(float32x2_t __p0) { |
| 50832 | int16x8_t __ret_419; \ | 52165 | float32_t __ret; |
| 50833 | int16x8_t __s0_419 = __p0_419; \ | 52166 | __ret = (float32_t) __builtin_neon_vpadds_f32(__p0); |
| 50834 | int16x8_t __s2_419 = __p2_419; \ | 52167 | return __ret; |
| 50835 | __ret_419 = vsetq_lane_s16(vgetq_lane_s16(__s2_419, __p3_419), __s0_419, __p1_419); \ | 52168 | } |
| 50836 | __ret_419; \ | | |
| 50837 | }) | | |
| 50838 | #else | 52169 | #else |
| 50839 | #define vcopyq_laneq_s16(__p0_420, __p1_420, __p2_420, __p3_420) __extension__ ({ \ | 52170 | __ai float32_t vpadds_f32(float32x2_t __p0) { |
| 50840 | int16x8_t __ret_420; \ | 52171 | float32_t __ret; |
| 50841 | int16x8_t __s0_420 = __p0_420; \ | 52172 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 50842 | int16x8_t __s2_420 = __p2_420; \ | 52173 | __ret = (float32_t) __builtin_neon_vpadds_f32(__rev0); |
| 50843 | int16x8_t __rev0_420; __rev0_420 = __builtin_shufflevector(__s0_420, __s0_420, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52174 | return __ret; |
| 50844 | int16x8_t __rev2_420; __rev2_420 = __builtin_shufflevector(__s2_420, __s2_420, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52175 | } |
| 50845 | __ret_420 = __noswap_vsetq_lane_s16(__noswap_vgetq_lane_s16(__rev2_420, __p3_420), __rev0_420, __p1_420); \ | | |
| 50846 | __ret_420 = __builtin_shufflevector(__ret_420, __ret_420, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 50847 | __ret_420; \ | | |
| 50848 | }) | | |
| 50849 | #endif | 52176 | #endif |
| 50850 | | 52177 | |
| 50851 | #ifdef __LITTLE_ENDIAN__ | 52178 | #ifdef __LITTLE_ENDIAN__ |
| 50852 | #define vcopy_laneq_p8(__p0_421, __p1_421, __p2_421, __p3_421) __extension__ ({ \ | 52179 | __ai uint8x16_t vpmaxq_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 50853 | poly8x8_t __ret_421; \ | 52180 | uint8x16_t __ret; |
| 50854 | poly8x8_t __s0_421 = __p0_421; \ | 52181 | __ret = (uint8x16_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 48); |
| 50855 | poly8x16_t __s2_421 = __p2_421; \ | 52182 | return __ret; |
| 50856 | __ret_421 = vset_lane_p8(vgetq_lane_p8(__s2_421, __p3_421), __s0_421, __p1_421); \ | 52183 | } |
| 50857 | __ret_421; \ | | |
| 50858 | }) | | |
| 50859 | #else | 52184 | #else |
| 50860 | #define vcopy_laneq_p8(__p0_422, __p1_422, __p2_422, __p3_422) __extension__ ({ \ | 52185 | __ai uint8x16_t vpmaxq_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 50861 | poly8x8_t __ret_422; \ | 52186 | uint8x16_t __ret; |
| 50862 | poly8x8_t __s0_422 = __p0_422; \ | 52187 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50863 | poly8x16_t __s2_422 = __p2_422; \ | 52188 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50864 | poly8x8_t __rev0_422; __rev0_422 = __builtin_shufflevector(__s0_422, __s0_422, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52189 | __ret = (uint8x16_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 48); |
| 50865 | poly8x16_t __rev2_422; __rev2_422 = __builtin_shufflevector(__s2_422, __s2_422, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52190 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50866 | __ret_422 = __noswap_vset_lane_p8(__noswap_vgetq_lane_p8(__rev2_422, __p3_422), __rev0_422, __p1_422); \ | 52191 | return __ret; |
| 50867 | __ret_422 = __builtin_shufflevector(__ret_422, __ret_422, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52192 | } |
| 50868 | __ret_422; \ | | |
| 50869 | }) | | |
| 50870 | #endif | 52193 | #endif |
| 50871 | | 52194 | |
| 50872 | #ifdef __LITTLE_ENDIAN__ | 52195 | #ifdef __LITTLE_ENDIAN__ |
| 50873 | #define vcopy_laneq_p16(__p0_423, __p1_423, __p2_423, __p3_423) __extension__ ({ \ | 52196 | __ai uint32x4_t vpmaxq_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 50874 | poly16x4_t __ret_423; \ | 52197 | uint32x4_t __ret; |
| 50875 | poly16x4_t __s0_423 = __p0_423; \ | 52198 | __ret = (uint32x4_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 50); |
| 50876 | poly16x8_t __s2_423 = __p2_423; \ | 52199 | return __ret; |
| 50877 | __ret_423 = vset_lane_p16(vgetq_lane_p16(__s2_423, __p3_423), __s0_423, __p1_423); \ | 52200 | } |
| 50878 | __ret_423; \ | | |
| 50879 | }) | | |
| 50880 | #else | 52201 | #else |
| 50881 | #define vcopy_laneq_p16(__p0_424, __p1_424, __p2_424, __p3_424) __extension__ ({ \ | 52202 | __ai uint32x4_t vpmaxq_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 50882 | poly16x4_t __ret_424; \ | 52203 | uint32x4_t __ret; |
| 50883 | poly16x4_t __s0_424 = __p0_424; \ | 52204 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 50884 | poly16x8_t __s2_424 = __p2_424; \ | 52205 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 50885 | poly16x4_t __rev0_424; __rev0_424 = __builtin_shufflevector(__s0_424, __s0_424, 3, 2, 1, 0); \ | 52206 | __ret = (uint32x4_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50); |
| 50886 | poly16x8_t __rev2_424; __rev2_424 = __builtin_shufflevector(__s2_424, __s2_424, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52207 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 50887 | __ret_424 = __noswap_vset_lane_p16(__noswap_vgetq_lane_p16(__rev2_424, __p3_424), __rev0_424, __p1_424); \ | 52208 | return __ret; |
| 50888 | __ret_424 = __builtin_shufflevector(__ret_424, __ret_424, 3, 2, 1, 0); \ | 52209 | } |
| 50889 | __ret_424; \ | | |
| 50890 | }) | | |
| 50891 | #endif | 52210 | #endif |
| 50892 | | 52211 | |
| 50893 | #ifdef __LITTLE_ENDIAN__ | 52212 | #ifdef __LITTLE_ENDIAN__ |
| 50894 | #define vcopy_laneq_u8(__p0_425, __p1_425, __p2_425, __p3_425) __extension__ ({ \ | 52213 | __ai uint16x8_t vpmaxq_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 50895 | uint8x8_t __ret_425; \ | 52214 | uint16x8_t __ret; |
| 50896 | uint8x8_t __s0_425 = __p0_425; \ | 52215 | __ret = (uint16x8_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 49); |
| 50897 | uint8x16_t __s2_425 = __p2_425; \ | 52216 | return __ret; |
| 50898 | __ret_425 = vset_lane_u8(vgetq_lane_u8(__s2_425, __p3_425), __s0_425, __p1_425); \ | 52217 | } |
| 50899 | __ret_425; \ | | |
| 50900 | }) | | |
| 50901 | #else | 52218 | #else |
| 50902 | #define vcopy_laneq_u8(__p0_426, __p1_426, __p2_426, __p3_426) __extension__ ({ \ | 52219 | __ai uint16x8_t vpmaxq_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 50903 | uint8x8_t __ret_426; \ | 52220 | uint16x8_t __ret; |
| 50904 | uint8x8_t __s0_426 = __p0_426; \ | 52221 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50905 | uint8x16_t __s2_426 = __p2_426; \ | 52222 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50906 | uint8x8_t __rev0_426; __rev0_426 = __builtin_shufflevector(__s0_426, __s0_426, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52223 | __ret = (uint16x8_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 49); |
| 50907 | uint8x16_t __rev2_426; __rev2_426 = __builtin_shufflevector(__s2_426, __s2_426, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52224 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50908 | __ret_426 = __noswap_vset_lane_u8(__noswap_vgetq_lane_u8(__rev2_426, __p3_426), __rev0_426, __p1_426); \ | 52225 | return __ret; |
| 50909 | __ret_426 = __builtin_shufflevector(__ret_426, __ret_426, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52226 | } |
| 50910 | __ret_426; \ | | |
| 50911 | }) | | |
| 50912 | #endif | 52227 | #endif |
| 50913 | | 52228 | |
| 50914 | #ifdef __LITTLE_ENDIAN__ | 52229 | #ifdef __LITTLE_ENDIAN__ |
| 50915 | #define vcopy_laneq_u32(__p0_427, __p1_427, __p2_427, __p3_427) __extension__ ({ \ | 52230 | __ai int8x16_t vpmaxq_s8(int8x16_t __p0, int8x16_t __p1) { |
| 50916 | uint32x2_t __ret_427; \ | 52231 | int8x16_t __ret; |
| 50917 | uint32x2_t __s0_427 = __p0_427; \ | 52232 | __ret = (int8x16_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 32); |
| 50918 | uint32x4_t __s2_427 = __p2_427; \ | 52233 | return __ret; |
| 50919 | __ret_427 = vset_lane_u32(vgetq_lane_u32(__s2_427, __p3_427), __s0_427, __p1_427); \ | 52234 | } |
| 50920 | __ret_427; \ | | |
| 50921 | }) | | |
| 50922 | #else | 52235 | #else |
| 50923 | #define vcopy_laneq_u32(__p0_428, __p1_428, __p2_428, __p3_428) __extension__ ({ \ | 52236 | __ai int8x16_t vpmaxq_s8(int8x16_t __p0, int8x16_t __p1) { |
| 50924 | uint32x2_t __ret_428; \ | 52237 | int8x16_t __ret; |
| 50925 | uint32x2_t __s0_428 = __p0_428; \ | 52238 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50926 | uint32x4_t __s2_428 = __p2_428; \ | 52239 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50927 | uint32x2_t __rev0_428; __rev0_428 = __builtin_shufflevector(__s0_428, __s0_428, 1, 0); \ | 52240 | __ret = (int8x16_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 32); |
| 50928 | uint32x4_t __rev2_428; __rev2_428 = __builtin_shufflevector(__s2_428, __s2_428, 3, 2, 1, 0); \ | 52241 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 50929 | __ret_428 = __noswap_vset_lane_u32(__noswap_vgetq_lane_u32(__rev2_428, __p3_428), __rev0_428, __p1_428); \ | 52242 | return __ret; |
| 50930 | __ret_428 = __builtin_shufflevector(__ret_428, __ret_428, 1, 0); \ | 52243 | } |
| 50931 | __ret_428; \ | | |
| 50932 | }) | | |
| 50933 | #endif | 52244 | #endif |
| 50934 | | 52245 | |
| 50935 | #ifdef __LITTLE_ENDIAN__ | 52246 | #ifdef __LITTLE_ENDIAN__ |
| 50936 | #define vcopy_laneq_u64(__p0_429, __p1_429, __p2_429, __p3_429) __extension__ ({ \ | 52247 | __ai float64x2_t vpmaxq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 50937 | uint64x1_t __ret_429; \ | 52248 | float64x2_t __ret; |
| 50938 | uint64x1_t __s0_429 = __p0_429; \ | 52249 | __ret = (float64x2_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| 50939 | uint64x2_t __s2_429 = __p2_429; \ | 52250 | return __ret; |
| 50940 | __ret_429 = vset_lane_u64(vgetq_lane_u64(__s2_429, __p3_429), __s0_429, __p1_429); \ | 52251 | } |
| 50941 | __ret_429; \ | | |
| 50942 | }) | | |
| 50943 | #else | 52252 | #else |
| 50944 | #define vcopy_laneq_u64(__p0_430, __p1_430, __p2_430, __p3_430) __extension__ ({ \ | 52253 | __ai float64x2_t vpmaxq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 50945 | uint64x1_t __ret_430; \ | 52254 | float64x2_t __ret; |
| 50946 | uint64x1_t __s0_430 = __p0_430; \ | 52255 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 50947 | uint64x2_t __s2_430 = __p2_430; \ | 52256 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 50948 | uint64x2_t __rev2_430; __rev2_430 = __builtin_shufflevector(__s2_430, __s2_430, 1, 0); \ | 52257 | __ret = (float64x2_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| 50949 | __ret_430 = vset_lane_u64(__noswap_vgetq_lane_u64(__rev2_430, __p3_430), __s0_430, __p1_430); \ | 52258 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 50950 | __ret_430; \ | 52259 | return __ret; |
| 50951 | }) | 52260 | } |
| 50952 | #endif | 52261 | #endif |
| 50953 | | 52262 | |
| 50954 | #ifdef __LITTLE_ENDIAN__ | 52263 | #ifdef __LITTLE_ENDIAN__ |
| 50955 | #define vcopy_laneq_u16(__p0_431, __p1_431, __p2_431, __p3_431) __extension__ ({ \ | 52264 | __ai float32x4_t vpmaxq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 50956 | uint16x4_t __ret_431; \ | 52265 | float32x4_t __ret; |
| 50957 | uint16x4_t __s0_431 = __p0_431; \ | 52266 | __ret = (float32x4_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); |
| 50958 | uint16x8_t __s2_431 = __p2_431; \ | 52267 | return __ret; |
| 50959 | __ret_431 = vset_lane_u16(vgetq_lane_u16(__s2_431, __p3_431), __s0_431, __p1_431); \ | 52268 | } |
| 50960 | __ret_431; \ | | |
| 50961 | }) | | |
| 50962 | #else | 52269 | #else |
| 50963 | #define vcopy_laneq_u16(__p0_432, __p1_432, __p2_432, __p3_432) __extension__ ({ \ | 52270 | __ai float32x4_t vpmaxq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 50964 | uint16x4_t __ret_432; \ | 52271 | float32x4_t __ret; |
| 50965 | uint16x4_t __s0_432 = __p0_432; \ | 52272 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 50966 | uint16x8_t __s2_432 = __p2_432; \ | 52273 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 50967 | uint16x4_t __rev0_432; __rev0_432 = __builtin_shufflevector(__s0_432, __s0_432, 3, 2, 1, 0); \ | 52274 | __ret = (float32x4_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); |
| 50968 | uint16x8_t __rev2_432; __rev2_432 = __builtin_shufflevector(__s2_432, __s2_432, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52275 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 50969 | __ret_432 = __noswap_vset_lane_u16(__noswap_vgetq_lane_u16(__rev2_432, __p3_432), __rev0_432, __p1_432); \ | 52276 | return __ret; |
| 50970 | __ret_432 = __builtin_shufflevector(__ret_432, __ret_432, 3, 2, 1, 0); \ | 52277 | } |
| 50971 | __ret_432; \ | | |
| 50972 | }) | | |
| 50973 | #endif | 52278 | #endif |
| 50974 | | 52279 | |
| 50975 | #ifdef __LITTLE_ENDIAN__ | 52280 | #ifdef __LITTLE_ENDIAN__ |
| 50976 | #define vcopy_laneq_s8(__p0_433, __p1_433, __p2_433, __p3_433) __extension__ ({ \ | 52281 | __ai int32x4_t vpmaxq_s32(int32x4_t __p0, int32x4_t __p1) { |
| 50977 | int8x8_t __ret_433; \ | 52282 | int32x4_t __ret; |
| 50978 | int8x8_t __s0_433 = __p0_433; \ | 52283 | __ret = (int32x4_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 34); |
| 50979 | int8x16_t __s2_433 = __p2_433; \ | 52284 | return __ret; |
| 50980 | __ret_433 = vset_lane_s8(vgetq_lane_s8(__s2_433, __p3_433), __s0_433, __p1_433); \ | 52285 | } |
| 50981 | __ret_433; \ | | |
| 50982 | }) | | |
| 50983 | #else | 52286 | #else |
| 50984 | #define vcopy_laneq_s8(__p0_434, __p1_434, __p2_434, __p3_434) __extension__ ({ \ | 52287 | __ai int32x4_t vpmaxq_s32(int32x4_t __p0, int32x4_t __p1) { |
| 50985 | int8x8_t __ret_434; \ | 52288 | int32x4_t __ret; |
| 50986 | int8x8_t __s0_434 = __p0_434; \ | 52289 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 50987 | int8x16_t __s2_434 = __p2_434; \ | 52290 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 50988 | int8x8_t __rev0_434; __rev0_434 = __builtin_shufflevector(__s0_434, __s0_434, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52291 | __ret = (int32x4_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 34); |
| 50989 | int8x16_t __rev2_434; __rev2_434 = __builtin_shufflevector(__s2_434, __s2_434, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52292 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 50990 | __ret_434 = __noswap_vset_lane_s8(__noswap_vgetq_lane_s8(__rev2_434, __p3_434), __rev0_434, __p1_434); \ | 52293 | return __ret; |
| 50991 | __ret_434 = __builtin_shufflevector(__ret_434, __ret_434, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52294 | } |
| 50992 | __ret_434; \ | | |
| 50993 | }) | | |
| 50994 | #endif | 52295 | #endif |
| 50995 | | 52296 | |
| 50996 | #ifdef __LITTLE_ENDIAN__ | 52297 | #ifdef __LITTLE_ENDIAN__ |
| 50997 | #define vcopy_laneq_f32(__p0_435, __p1_435, __p2_435, __p3_435) __extension__ ({ \ | 52298 | __ai int16x8_t vpmaxq_s16(int16x8_t __p0, int16x8_t __p1) { |
| 50998 | float32x2_t __ret_435; \ | 52299 | int16x8_t __ret; |
| 50999 | float32x2_t __s0_435 = __p0_435; \ | 52300 | __ret = (int16x8_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 33); |
| 51000 | float32x4_t __s2_435 = __p2_435; \ | 52301 | return __ret; |
| 51001 | __ret_435 = vset_lane_f32(vgetq_lane_f32(__s2_435, __p3_435), __s0_435, __p1_435); \ | 52302 | } |
| 51002 | __ret_435; \ | | |
| 51003 | }) | | |
| 51004 | #else | 52303 | #else |
| 51005 | #define vcopy_laneq_f32(__p0_436, __p1_436, __p2_436, __p3_436) __extension__ ({ \ | 52304 | __ai int16x8_t vpmaxq_s16(int16x8_t __p0, int16x8_t __p1) { |
| 51006 | float32x2_t __ret_436; \ | 52305 | int16x8_t __ret; |
| 51007 | float32x2_t __s0_436 = __p0_436; \ | 52306 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51008 | float32x4_t __s2_436 = __p2_436; \ | 52307 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51009 | float32x2_t __rev0_436; __rev0_436 = __builtin_shufflevector(__s0_436, __s0_436, 1, 0); \ | 52308 | __ret = (int16x8_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 33); |
| 51010 | float32x4_t __rev2_436; __rev2_436 = __builtin_shufflevector(__s2_436, __s2_436, 3, 2, 1, 0); \ | 52309 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51011 | __ret_436 = __noswap_vset_lane_f32(__noswap_vgetq_lane_f32(__rev2_436, __p3_436), __rev0_436, __p1_436); \ | 52310 | return __ret; |
| 51012 | __ret_436 = __builtin_shufflevector(__ret_436, __ret_436, 1, 0); \ | 52311 | } |
| 51013 | __ret_436; \ | | |
| 51014 | }) | | |
| 51015 | #endif | 52312 | #endif |
| 51016 | | 52313 | |
| 51017 | #ifdef __LITTLE_ENDIAN__ | 52314 | #ifdef __LITTLE_ENDIAN__ |
| 51018 | #define vcopy_laneq_s32(__p0_437, __p1_437, __p2_437, __p3_437) __extension__ ({ \ | 52315 | __ai float64_t vpmaxqd_f64(float64x2_t __p0) { |
| 51019 | int32x2_t __ret_437; \ | 52316 | float64_t __ret; |
| 51020 | int32x2_t __s0_437 = __p0_437; \ | 52317 | __ret = (float64_t) __builtin_neon_vpmaxqd_f64(__p0); |
| 51021 | int32x4_t __s2_437 = __p2_437; \ | 52318 | return __ret; |
| 51022 | __ret_437 = vset_lane_s32(vgetq_lane_s32(__s2_437, __p3_437), __s0_437, __p1_437); \ | 52319 | } |
| 51023 | __ret_437; \ | | |
| 51024 | }) | | |
| 51025 | #else | 52320 | #else |
| 51026 | #define vcopy_laneq_s32(__p0_438, __p1_438, __p2_438, __p3_438) __extension__ ({ \ | 52321 | __ai float64_t vpmaxqd_f64(float64x2_t __p0) { |
| 51027 | int32x2_t __ret_438; \ | 52322 | float64_t __ret; |
| 51028 | int32x2_t __s0_438 = __p0_438; \ | 52323 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 51029 | int32x4_t __s2_438 = __p2_438; \ | 52324 | __ret = (float64_t) __builtin_neon_vpmaxqd_f64(__rev0); |
| 51030 | int32x2_t __rev0_438; __rev0_438 = __builtin_shufflevector(__s0_438, __s0_438, 1, 0); \ | 52325 | return __ret; |
| 51031 | int32x4_t __rev2_438; __rev2_438 = __builtin_shufflevector(__s2_438, __s2_438, 3, 2, 1, 0); \ | 52326 | } |
| 51032 | __ret_438 = __noswap_vset_lane_s32(__noswap_vgetq_lane_s32(__rev2_438, __p3_438), __rev0_438, __p1_438); \ | | |
| 51033 | __ret_438 = __builtin_shufflevector(__ret_438, __ret_438, 1, 0); \ | | |
| 51034 | __ret_438; \ | | |
| 51035 | }) | | |
| 51036 | #endif | 52327 | #endif |
| 51037 | | 52328 | |
| 51038 | #ifdef __LITTLE_ENDIAN__ | 52329 | #ifdef __LITTLE_ENDIAN__ |
| 51039 | #define vcopy_laneq_s64(__p0_439, __p1_439, __p2_439, __p3_439) __extension__ ({ \ | 52330 | __ai float32_t vpmaxs_f32(float32x2_t __p0) { |
| 51040 | int64x1_t __ret_439; \ | 52331 | float32_t __ret; |
| 51041 | int64x1_t __s0_439 = __p0_439; \ | 52332 | __ret = (float32_t) __builtin_neon_vpmaxs_f32(__p0); |
| 51042 | int64x2_t __s2_439 = __p2_439; \ | 52333 | return __ret; |
| 51043 | __ret_439 = vset_lane_s64(vgetq_lane_s64(__s2_439, __p3_439), __s0_439, __p1_439); \ | 52334 | } |
| 51044 | __ret_439; \ | | |
| 51045 | }) | | |
| 51046 | #else | 52335 | #else |
| 51047 | #define vcopy_laneq_s64(__p0_440, __p1_440, __p2_440, __p3_440) __extension__ ({ \ | 52336 | __ai float32_t vpmaxs_f32(float32x2_t __p0) { |
| 51048 | int64x1_t __ret_440; \ | 52337 | float32_t __ret; |
| 51049 | int64x1_t __s0_440 = __p0_440; \ | 52338 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 51050 | int64x2_t __s2_440 = __p2_440; \ | 52339 | __ret = (float32_t) __builtin_neon_vpmaxs_f32(__rev0); |
| 51051 | int64x2_t __rev2_440; __rev2_440 = __builtin_shufflevector(__s2_440, __s2_440, 1, 0); \ | 52340 | return __ret; |
| 51052 | __ret_440 = vset_lane_s64(__noswap_vgetq_lane_s64(__rev2_440, __p3_440), __s0_440, __p1_440); \ | 52341 | } |
| 51053 | __ret_440; \ | | |
| 51054 | }) | | |
| 51055 | #endif | 52342 | #endif |
| 51056 | | 52343 | |
| 51057 | #ifdef __LITTLE_ENDIAN__ | 52344 | #ifdef __LITTLE_ENDIAN__ |
| 51058 | #define vcopy_laneq_s16(__p0_441, __p1_441, __p2_441, __p3_441) __extension__ ({ \ | 52345 | __ai float64x2_t vpmaxnmq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 51059 | int16x4_t __ret_441; \ | 52346 | float64x2_t __ret; |
| 51060 | int16x4_t __s0_441 = __p0_441; \ | 52347 | __ret = (float64x2_t) __builtin_neon_vpmaxnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| 51061 | int16x8_t __s2_441 = __p2_441; \ | 52348 | return __ret; |
| 51062 | __ret_441 = vset_lane_s16(vgetq_lane_s16(__s2_441, __p3_441), __s0_441, __p1_441); \ | 52349 | } |
| 51063 | __ret_441; \ | | |
| 51064 | }) | | |
| 51065 | #else | 52350 | #else |
| 51066 | #define vcopy_laneq_s16(__p0_442, __p1_442, __p2_442, __p3_442) __extension__ ({ \ | 52351 | __ai float64x2_t vpmaxnmq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 51067 | int16x4_t __ret_442; \ | 52352 | float64x2_t __ret; |
| 51068 | int16x4_t __s0_442 = __p0_442; \ | 52353 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 51069 | int16x8_t __s2_442 = __p2_442; \ | 52354 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 51070 | int16x4_t __rev0_442; __rev0_442 = __builtin_shufflevector(__s0_442, __s0_442, 3, 2, 1, 0); \ | 52355 | __ret = (float64x2_t) __builtin_neon_vpmaxnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| 51071 | int16x8_t __rev2_442; __rev2_442 = __builtin_shufflevector(__s2_442, __s2_442, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52356 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 51072 | __ret_442 = __noswap_vset_lane_s16(__noswap_vgetq_lane_s16(__rev2_442, __p3_442), __rev0_442, __p1_442); \ | 52357 | return __ret; |
| 51073 | __ret_442 = __builtin_shufflevector(__ret_442, __ret_442, 3, 2, 1, 0); \ | 52358 | } |
| 51074 | __ret_442; \ | | |
| 51075 | }) | | |
| 51076 | #endif | 52359 | #endif |
| 51077 | | 52360 | |
| 51078 | #define vcreate_p64(__p0) __extension__ ({ \ | 52361 | #ifdef __LITTLE_ENDIAN__ |
| 51079 | poly64x1_t __ret; \ | 52362 | __ai float32x4_t vpmaxnmq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 51080 | uint64_t __promote = __p0; \ | 52363 | float32x4_t __ret; |
| 51081 | __ret = (poly64x1_t)(__promote); \ | 52364 | __ret = (float32x4_t) __builtin_neon_vpmaxnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); |
| 51082 | __ret; \ | | |
| 51083 | }) | | |
| 51084 | #define vcreate_f64(__p0) __extension__ ({ \ | | |
| 51085 | float64x1_t __ret; \ | | |
| 51086 | uint64_t __promote = __p0; \ | | |
| 51087 | __ret = (float64x1_t)(__promote); \ | | |
| 51088 | __ret; \ | | |
| 51089 | }) | | |
| 51090 | __ai float32_t vcvts_f32_s32(int32_t __p0) { | | |
| 51091 | float32_t __ret; | | |
| 51092 | __ret = (float32_t) __builtin_neon_vcvts_f32_s32(__p0); | | |
| 51093 | return __ret; | 52365 | return __ret; |
| 51094 | } | 52366 | } |
| 51095 | __ai float32_t vcvts_f32_u32(uint32_t __p0) { | 52367 | #else |
| 51096 | float32_t __ret; | 52368 | __ai float32x4_t vpmaxnmq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 51097 | __ret = (float32_t) __builtin_neon_vcvts_f32_u32(__p0); | 52369 | float32x4_t __ret; |
| | 52370 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 52371 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 52372 | __ret = (float32x4_t) __builtin_neon_vpmaxnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); |
| | 52373 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 51098 | return __ret; | 52374 | return __ret; |
| 51099 | } | 52375 | } |
| | 52376 | #endif |
| | 52377 | |
| 51100 | #ifdef __LITTLE_ENDIAN__ | 52378 | #ifdef __LITTLE_ENDIAN__ |
| 51101 | __ai float32x2_t vcvt_f32_f64(float64x2_t __p0) { | 52379 | __ai float32x2_t vpmaxnm_f32(float32x2_t __p0, float32x2_t __p1) { |
| 51102 | float32x2_t __ret; | 52380 | float32x2_t __ret; |
| 51103 | __ret = (float32x2_t) __builtin_neon_vcvt_f32_f64((int8x16_t)__p0, 9); | 52381 | __ret = (float32x2_t) __builtin_neon_vpmaxnm_v((int8x8_t)__p0, (int8x8_t)__p1, 9); |
| 51104 | return __ret; | 52382 | return __ret; |
| 51105 | } | 52383 | } |
| 51106 | #else | 52384 | #else |
| 51107 | __ai float32x2_t vcvt_f32_f64(float64x2_t __p0) { | 52385 | __ai float32x2_t vpmaxnm_f32(float32x2_t __p0, float32x2_t __p1) { |
| 51108 | float32x2_t __ret; | 52386 | float32x2_t __ret; |
| 51109 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 52387 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 51110 | __ret = (float32x2_t) __builtin_neon_vcvt_f32_f64((int8x16_t)__rev0, 9); | 52388 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 52389 | __ret = (float32x2_t) __builtin_neon_vpmaxnm_v((int8x8_t)__rev0, (int8x8_t)__rev1, 9); |
| 51111 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 52390 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 51112 | return __ret; | 52391 | return __ret; |
| 51113 | } | 52392 | } |
| 51114 | __ai float32x2_t __noswap_vcvt_f32_f64(float64x2_t __p0) { | | |
| 51115 | float32x2_t __ret; | | |
| 51116 | __ret = (float32x2_t) __builtin_neon_vcvt_f32_f64((int8x16_t)__p0, 9); | | |
| 51117 | return __ret; | | |
| 51118 | } | | |
| 51119 | #endif | 52393 | #endif |
| 51120 | | 52394 | |
| 51121 | __ai float64_t vcvtd_f64_s64(int64_t __p0) { | 52395 | #ifdef __LITTLE_ENDIAN__ |
| | 52396 | __ai float64_t vpmaxnmqd_f64(float64x2_t __p0) { |
| 51122 | float64_t __ret; | 52397 | float64_t __ret; |
| 51123 | __ret = (float64_t) __builtin_neon_vcvtd_f64_s64(__p0); | 52398 | __ret = (float64_t) __builtin_neon_vpmaxnmqd_f64(__p0); |
| 51124 | return __ret; | 52399 | return __ret; |
| 51125 | } | 52400 | } |
| 51126 | __ai float64_t vcvtd_f64_u64(uint64_t __p0) { | 52401 | #else |
| | 52402 | __ai float64_t vpmaxnmqd_f64(float64x2_t __p0) { |
| 51127 | float64_t __ret; | 52403 | float64_t __ret; |
| 51128 | __ret = (float64_t) __builtin_neon_vcvtd_f64_u64(__p0); | 52404 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 52405 | __ret = (float64_t) __builtin_neon_vpmaxnmqd_f64(__rev0); |
| 51129 | return __ret; | 52406 | return __ret; |
| 51130 | } | 52407 | } |
| | 52408 | #endif |
| | 52409 | |
| 51131 | #ifdef __LITTLE_ENDIAN__ | 52410 | #ifdef __LITTLE_ENDIAN__ |
| 51132 | __ai float64x2_t vcvtq_f64_u64(uint64x2_t __p0) { | 52411 | __ai float32_t vpmaxnms_f32(float32x2_t __p0) { |
| 51133 | float64x2_t __ret; | 52412 | float32_t __ret; |
| 51134 | __ret = (float64x2_t) __builtin_neon_vcvtq_f64_v((int8x16_t)__p0, 51); | 52413 | __ret = (float32_t) __builtin_neon_vpmaxnms_f32(__p0); |
| 51135 | return __ret; | 52414 | return __ret; |
| 51136 | } | 52415 | } |
| 51137 | #else | 52416 | #else |
| 51138 | __ai float64x2_t vcvtq_f64_u64(uint64x2_t __p0) { | 52417 | __ai float32_t vpmaxnms_f32(float32x2_t __p0) { |
| 51139 | float64x2_t __ret; | 52418 | float32_t __ret; |
| 51140 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 52419 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 51141 | __ret = (float64x2_t) __builtin_neon_vcvtq_f64_v((int8x16_t)__rev0, 51); | 52420 | __ret = (float32_t) __builtin_neon_vpmaxnms_f32(__rev0); |
| 51142 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 51143 | return __ret; | 52421 | return __ret; |
| 51144 | } | 52422 | } |
| 51145 | #endif | 52423 | #endif |
| 51146 | | 52424 | |
| 51147 | #ifdef __LITTLE_ENDIAN__ | 52425 | #ifdef __LITTLE_ENDIAN__ |
| 51148 | __ai float64x2_t vcvtq_f64_s64(int64x2_t __p0) { | 52426 | __ai uint8x16_t vpminq_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 51149 | float64x2_t __ret; | 52427 | uint8x16_t __ret; |
| 51150 | __ret = (float64x2_t) __builtin_neon_vcvtq_f64_v((int8x16_t)__p0, 35); | 52428 | __ret = (uint8x16_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 48); |
| 51151 | return __ret; | 52429 | return __ret; |
| 51152 | } | 52430 | } |
| 51153 | #else | 52431 | #else |
| 51154 | __ai float64x2_t vcvtq_f64_s64(int64x2_t __p0) { | 52432 | __ai uint8x16_t vpminq_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 51155 | float64x2_t __ret; | 52433 | uint8x16_t __ret; |
| 51156 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 52434 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51157 | __ret = (float64x2_t) __builtin_neon_vcvtq_f64_v((int8x16_t)__rev0, 35); | 52435 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51158 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 52436 | __ret = (uint8x16_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 48); |
| | 52437 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51159 | return __ret; | 52438 | return __ret; |
| 51160 | } | 52439 | } |
| 51161 | #endif | 52440 | #endif |
| 51162 | | 52441 | |
| 51163 | __ai float64x1_t vcvt_f64_u64(uint64x1_t __p0) { | 52442 | #ifdef __LITTLE_ENDIAN__ |
| 51164 | float64x1_t __ret; | 52443 | __ai uint32x4_t vpminq_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 51165 | __ret = (float64x1_t) __builtin_neon_vcvt_f64_v((int8x8_t)__p0, 19); | 52444 | uint32x4_t __ret; |
| | 52445 | __ret = (uint32x4_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 50); |
| 51166 | return __ret; | 52446 | return __ret; |
| 51167 | } | 52447 | } |
| 51168 | __ai float64x1_t vcvt_f64_s64(int64x1_t __p0) { | 52448 | #else |
| 51169 | float64x1_t __ret; | 52449 | __ai uint32x4_t vpminq_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 51170 | __ret = (float64x1_t) __builtin_neon_vcvt_f64_v((int8x8_t)__p0, 3); | 52450 | uint32x4_t __ret; |
| | 52451 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 52452 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 52453 | __ret = (uint32x4_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50); |
| | 52454 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 51171 | return __ret; | 52455 | return __ret; |
| 51172 | } | 52456 | } |
| | 52457 | #endif |
| | 52458 | |
| 51173 | #ifdef __LITTLE_ENDIAN__ | 52459 | #ifdef __LITTLE_ENDIAN__ |
| 51174 | __ai float64x2_t vcvt_f64_f32(float32x2_t __p0) { | 52460 | __ai uint16x8_t vpminq_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 51175 | float64x2_t __ret; | 52461 | uint16x8_t __ret; |
| 51176 | __ret = (float64x2_t) __builtin_neon_vcvt_f64_f32((int8x8_t)__p0, 42); | 52462 | __ret = (uint16x8_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 49); |
| 51177 | return __ret; | 52463 | return __ret; |
| 51178 | } | 52464 | } |
| 51179 | #else | 52465 | #else |
| 51180 | __ai float64x2_t vcvt_f64_f32(float32x2_t __p0) { | 52466 | __ai uint16x8_t vpminq_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 51181 | float64x2_t __ret; | 52467 | uint16x8_t __ret; |
| 51182 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 52468 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51183 | __ret = (float64x2_t) __builtin_neon_vcvt_f64_f32((int8x8_t)__rev0, 42); | 52469 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51184 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 52470 | __ret = (uint16x8_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 49); |
| | 52471 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51185 | return __ret; | 52472 | return __ret; |
| 51186 | } | 52473 | } |
| 51187 | __ai float64x2_t __noswap_vcvt_f64_f32(float32x2_t __p0) { | 52474 | #endif |
| 51188 | float64x2_t __ret; | 52475 | |
| 51189 | __ret = (float64x2_t) __builtin_neon_vcvt_f64_f32((int8x8_t)__p0, 42); | 52476 | #ifdef __LITTLE_ENDIAN__ |
| | 52477 | __ai int8x16_t vpminq_s8(int8x16_t __p0, int8x16_t __p1) { |
| | 52478 | int8x16_t __ret; |
| | 52479 | __ret = (int8x16_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 32); |
| | 52480 | return __ret; |
| | 52481 | } |
| | 52482 | #else |
| | 52483 | __ai int8x16_t vpminq_s8(int8x16_t __p0, int8x16_t __p1) { |
| | 52484 | int8x16_t __ret; |
| | 52485 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 52486 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 52487 | __ret = (int8x16_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 32); |
| | 52488 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51190 | return __ret; | 52489 | return __ret; |
| 51191 | } | 52490 | } |
| 51192 | #endif | 52491 | #endif |
| 51193 | | 52492 | |
| 51194 | #ifdef __LITTLE_ENDIAN__ | 52493 | #ifdef __LITTLE_ENDIAN__ |
| 51195 | __ai float16x8_t vcvt_high_f16_f32(float16x4_t __p0, float32x4_t __p1) { | 52494 | __ai float64x2_t vpminq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 51196 | float16x8_t __ret; | 52495 | float64x2_t __ret; |
| 51197 | __ret = vcombine_f16(__p0, vcvt_f16_f32(__p1)); | 52496 | __ret = (float64x2_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| 51198 | return __ret; | 52497 | return __ret; |
| 51199 | } | 52498 | } |
| 51200 | #else | 52499 | #else |
| 51201 | __ai float16x8_t vcvt_high_f16_f32(float16x4_t __p0, float32x4_t __p1) { | 52500 | __ai float64x2_t vpminq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 51202 | float16x8_t __ret; | 52501 | float64x2_t __ret; |
| 51203 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 52502 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 51204 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 52503 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 51205 | __ret = __noswap_vcombine_f16(__rev0, __noswap_vcvt_f16_f32(__rev1)); | 52504 | __ret = (float64x2_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| 51206 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 52505 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 51207 | return __ret; | 52506 | return __ret; |
| 51208 | } | 52507 | } |
| 51209 | #endif | 52508 | #endif |
| 51210 | | 52509 | |
| 51211 | #ifdef __LITTLE_ENDIAN__ | 52510 | #ifdef __LITTLE_ENDIAN__ |
| 51212 | __ai float32x4_t vcvt_high_f32_f16(float16x8_t __p0) { | 52511 | __ai float32x4_t vpminq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 51213 | float32x4_t __ret; | 52512 | float32x4_t __ret; |
| 51214 | __ret = vcvt_f32_f16(vget_high_f16(__p0)); | 52513 | __ret = (float32x4_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); |
| 51215 | return __ret; | 52514 | return __ret; |
| 51216 | } | 52515 | } |
| 51217 | #else | 52516 | #else |
| 51218 | __ai float32x4_t vcvt_high_f32_f16(float16x8_t __p0) { | 52517 | __ai float32x4_t vpminq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 51219 | float32x4_t __ret; | 52518 | float32x4_t __ret; |
| 51220 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 52519 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 51221 | __ret = __noswap_vcvt_f32_f16(__noswap_vget_high_f16(__rev0)); | 52520 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 52521 | __ret = (float32x4_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); |
| 51222 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 52522 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 51223 | return __ret; | 52523 | return __ret; |
| 51224 | } | 52524 | } |
| 51225 | #endif | 52525 | #endif |
| 51226 | | 52526 | |
| 51227 | #ifdef __LITTLE_ENDIAN__ | 52527 | #ifdef __LITTLE_ENDIAN__ |
| 51228 | __ai float32x4_t vcvt_high_f32_f64(float32x2_t __p0, float64x2_t __p1) { | 52528 | __ai int32x4_t vpminq_s32(int32x4_t __p0, int32x4_t __p1) { |
| 51229 | float32x4_t __ret; | 52529 | int32x4_t __ret; |
| 51230 | __ret = vcombine_f32(__p0, vcvt_f32_f64(__p1)); | 52530 | __ret = (int32x4_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 34); |
| 51231 | return __ret; | 52531 | return __ret; |
| 51232 | } | 52532 | } |
| 51233 | #else | 52533 | #else |
| 51234 | __ai float32x4_t vcvt_high_f32_f64(float32x2_t __p0, float64x2_t __p1) { | 52534 | __ai int32x4_t vpminq_s32(int32x4_t __p0, int32x4_t __p1) { |
| 51235 | float32x4_t __ret; | 52535 | int32x4_t __ret; |
| 51236 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 52536 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 51237 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 52537 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 51238 | __ret = __noswap_vcombine_f32(__rev0, __noswap_vcvt_f32_f64(__rev1)); | 52538 | __ret = (int32x4_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 34); |
| 51239 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 52539 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 51240 | return __ret; | 52540 | return __ret; |
| 51241 | } | 52541 | } |
| 51242 | #endif | 52542 | #endif |
| 51243 | | 52543 | |
| 51244 | #ifdef __LITTLE_ENDIAN__ | 52544 | #ifdef __LITTLE_ENDIAN__ |
| 51245 | __ai float64x2_t vcvt_high_f64_f32(float32x4_t __p0) { | 52545 | __ai int16x8_t vpminq_s16(int16x8_t __p0, int16x8_t __p1) { |
| 51246 | float64x2_t __ret; | 52546 | int16x8_t __ret; |
| 51247 | __ret = vcvt_f64_f32(vget_high_f32(__p0)); | 52547 | __ret = (int16x8_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 33); |
| 51248 | return __ret; | 52548 | return __ret; |
| 51249 | } | 52549 | } |
| 51250 | #else | 52550 | #else |
| 51251 | __ai float64x2_t vcvt_high_f64_f32(float32x4_t __p0) { | 52551 | __ai int16x8_t vpminq_s16(int16x8_t __p0, int16x8_t __p1) { |
| 51252 | float64x2_t __ret; | 52552 | int16x8_t __ret; |
| 51253 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 52553 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51254 | __ret = __noswap_vcvt_f64_f32(__noswap_vget_high_f32(__rev0)); | 52554 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51255 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 52555 | __ret = (int16x8_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 33); |
| | 52556 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51256 | return __ret; | 52557 | return __ret; |
| 51257 | } | 52558 | } |
| 51258 | #endif | 52559 | #endif |
| 51259 | | 52560 | |
| 51260 | #define vcvts_n_f32_u32(__p0, __p1) __extension__ ({ \ | | |
| 51261 | float32_t __ret; \ | | |
| 51262 | uint32_t __s0 = __p0; \ | | |
| 51263 | __ret = (float32_t) __builtin_neon_vcvts_n_f32_u32(__s0, __p1); \ | | |
| 51264 | __ret; \ | | |
| 51265 | }) | | |
| 51266 | #define vcvts_n_f32_s32(__p0, __p1) __extension__ ({ \ | | |
| 51267 | float32_t __ret; \ | | |
| 51268 | int32_t __s0 = __p0; \ | | |
| 51269 | __ret = (float32_t) __builtin_neon_vcvts_n_f32_s32(__s0, __p1); \ | | |
| 51270 | __ret; \ | | |
| 51271 | }) | | |
| 51272 | #ifdef __LITTLE_ENDIAN__ | 52561 | #ifdef __LITTLE_ENDIAN__ |
| 51273 | #define vcvtq_n_f64_u64(__p0, __p1) __extension__ ({ \ | 52562 | __ai float64_t vpminqd_f64(float64x2_t __p0) { |
| 51274 | float64x2_t __ret; \ | 52563 | float64_t __ret; |
| 51275 | uint64x2_t __s0 = __p0; \ | 52564 | __ret = (float64_t) __builtin_neon_vpminqd_f64(__p0); |
| 51276 | __ret = (float64x2_t) __builtin_neon_vcvtq_n_f64_v((int8x16_t)__s0, __p1, 51); \ | 52565 | return __ret; |
| 51277 | __ret; \ | 52566 | } |
| 51278 | }) | | |
| 51279 | #else | 52567 | #else |
| 51280 | #define vcvtq_n_f64_u64(__p0, __p1) __extension__ ({ \ | 52568 | __ai float64_t vpminqd_f64(float64x2_t __p0) { |
| 51281 | float64x2_t __ret; \ | 52569 | float64_t __ret; |
| 51282 | uint64x2_t __s0 = __p0; \ | 52570 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 51283 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 52571 | __ret = (float64_t) __builtin_neon_vpminqd_f64(__rev0); |
| 51284 | __ret = (float64x2_t) __builtin_neon_vcvtq_n_f64_v((int8x16_t)__rev0, __p1, 51); \ | 52572 | return __ret; |
| 51285 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 52573 | } |
| 51286 | __ret; \ | | |
| 51287 | }) | | |
| 51288 | #endif | 52574 | #endif |
| 51289 | | 52575 | |
| 51290 | #ifdef __LITTLE_ENDIAN__ | 52576 | #ifdef __LITTLE_ENDIAN__ |
| 51291 | #define vcvtq_n_f64_s64(__p0, __p1) __extension__ ({ \ | 52577 | __ai float32_t vpmins_f32(float32x2_t __p0) { |
| 51292 | float64x2_t __ret; \ | 52578 | float32_t __ret; |
| 51293 | int64x2_t __s0 = __p0; \ | 52579 | __ret = (float32_t) __builtin_neon_vpmins_f32(__p0); |
| 51294 | __ret = (float64x2_t) __builtin_neon_vcvtq_n_f64_v((int8x16_t)__s0, __p1, 35); \ | 52580 | return __ret; |
| 51295 | __ret; \ | 52581 | } |
| 51296 | }) | | |
| 51297 | #else | 52582 | #else |
| 51298 | #define vcvtq_n_f64_s64(__p0, __p1) __extension__ ({ \ | 52583 | __ai float32_t vpmins_f32(float32x2_t __p0) { |
| 51299 | float64x2_t __ret; \ | 52584 | float32_t __ret; |
| 51300 | int64x2_t __s0 = __p0; \ | 52585 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 51301 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 52586 | __ret = (float32_t) __builtin_neon_vpmins_f32(__rev0); |
| 51302 | __ret = (float64x2_t) __builtin_neon_vcvtq_n_f64_v((int8x16_t)__rev0, __p1, 35); \ | 52587 | return __ret; |
| 51303 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 52588 | } |
| 51304 | __ret; \ | | |
| 51305 | }) | | |
| 51306 | #endif | 52589 | #endif |
| 51307 | | 52590 | |
| 51308 | #define vcvt_n_f64_u64(__p0, __p1) __extension__ ({ \ | | |
| 51309 | float64x1_t __ret; \ | | |
| 51310 | uint64x1_t __s0 = __p0; \ | | |
| 51311 | __ret = (float64x1_t) __builtin_neon_vcvt_n_f64_v((int8x8_t)__s0, __p1, 19); \ | | |
| 51312 | __ret; \ | | |
| 51313 | }) | | |
| 51314 | #define vcvt_n_f64_s64(__p0, __p1) __extension__ ({ \ | | |
| 51315 | float64x1_t __ret; \ | | |
| 51316 | int64x1_t __s0 = __p0; \ | | |
| 51317 | __ret = (float64x1_t) __builtin_neon_vcvt_n_f64_v((int8x8_t)__s0, __p1, 3); \ | | |
| 51318 | __ret; \ | | |
| 51319 | }) | | |
| 51320 | #define vcvtd_n_f64_u64(__p0, __p1) __extension__ ({ \ | | |
| 51321 | float64_t __ret; \ | | |
| 51322 | uint64_t __s0 = __p0; \ | | |
| 51323 | __ret = (float64_t) __builtin_neon_vcvtd_n_f64_u64(__s0, __p1); \ | | |
| 51324 | __ret; \ | | |
| 51325 | }) | | |
| 51326 | #define vcvtd_n_f64_s64(__p0, __p1) __extension__ ({ \ | | |
| 51327 | float64_t __ret; \ | | |
| 51328 | int64_t __s0 = __p0; \ | | |
| 51329 | __ret = (float64_t) __builtin_neon_vcvtd_n_f64_s64(__s0, __p1); \ | | |
| 51330 | __ret; \ | | |
| 51331 | }) | | |
| 51332 | #define vcvts_n_s32_f32(__p0, __p1) __extension__ ({ \ | | |
| 51333 | int32_t __ret; \ | | |
| 51334 | float32_t __s0 = __p0; \ | | |
| 51335 | __ret = (int32_t) __builtin_neon_vcvts_n_s32_f32(__s0, __p1); \ | | |
| 51336 | __ret; \ | | |
| 51337 | }) | | |
| 51338 | #ifdef __LITTLE_ENDIAN__ | 52591 | #ifdef __LITTLE_ENDIAN__ |
| 51339 | #define vcvtq_n_s64_f64(__p0, __p1) __extension__ ({ \ | 52592 | __ai float64x2_t vpminnmq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 51340 | int64x2_t __ret; \ | 52593 | float64x2_t __ret; |
| 51341 | float64x2_t __s0 = __p0; \ | 52594 | __ret = (float64x2_t) __builtin_neon_vpminnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| 51342 | __ret = (int64x2_t) __builtin_neon_vcvtq_n_s64_v((int8x16_t)__s0, __p1, 35); \ | 52595 | return __ret; |
| 51343 | __ret; \ | 52596 | } |
| 51344 | }) | | |
| 51345 | #else | 52597 | #else |
| 51346 | #define vcvtq_n_s64_f64(__p0, __p1) __extension__ ({ \ | 52598 | __ai float64x2_t vpminnmq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 51347 | int64x2_t __ret; \ | 52599 | float64x2_t __ret; |
| 51348 | float64x2_t __s0 = __p0; \ | 52600 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 51349 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 52601 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 51350 | __ret = (int64x2_t) __builtin_neon_vcvtq_n_s64_v((int8x16_t)__rev0, __p1, 35); \ | 52602 | __ret = (float64x2_t) __builtin_neon_vpminnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| 51351 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 52603 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 51352 | __ret; \ | 52604 | return __ret; |
| 51353 | }) | 52605 | } |
| 51354 | #endif | 52606 | #endif |
| 51355 | | 52607 | |
| 51356 | #define vcvt_n_s64_f64(__p0, __p1) __extension__ ({ \ | | |
| 51357 | int64x1_t __ret; \ | | |
| 51358 | float64x1_t __s0 = __p0; \ | | |
| 51359 | __ret = (int64x1_t) __builtin_neon_vcvt_n_s64_v((int8x8_t)__s0, __p1, 3); \ | | |
| 51360 | __ret; \ | | |
| 51361 | }) | | |
| 51362 | #define vcvtd_n_s64_f64(__p0, __p1) __extension__ ({ \ | | |
| 51363 | int64_t __ret; \ | | |
| 51364 | float64_t __s0 = __p0; \ | | |
| 51365 | __ret = (int64_t) __builtin_neon_vcvtd_n_s64_f64(__s0, __p1); \ | | |
| 51366 | __ret; \ | | |
| 51367 | }) | | |
| 51368 | #define vcvts_n_u32_f32(__p0, __p1) __extension__ ({ \ | | |
| 51369 | uint32_t __ret; \ | | |
| 51370 | float32_t __s0 = __p0; \ | | |
| 51371 | __ret = (uint32_t) __builtin_neon_vcvts_n_u32_f32(__s0, __p1); \ | | |
| 51372 | __ret; \ | | |
| 51373 | }) | | |
| 51374 | #ifdef __LITTLE_ENDIAN__ | 52608 | #ifdef __LITTLE_ENDIAN__ |
| 51375 | #define vcvtq_n_u64_f64(__p0, __p1) __extension__ ({ \ | 52609 | __ai float32x4_t vpminnmq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 51376 | uint64x2_t __ret; \ | 52610 | float32x4_t __ret; |
| 51377 | float64x2_t __s0 = __p0; \ | 52611 | __ret = (float32x4_t) __builtin_neon_vpminnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); |
| 51378 | __ret = (uint64x2_t) __builtin_neon_vcvtq_n_u64_v((int8x16_t)__s0, __p1, 51); \ | | |
| 51379 | __ret; \ | | |
| 51380 | }) | | |
| 51381 | #else | | |
| 51382 | #define vcvtq_n_u64_f64(__p0, __p1) __extension__ ({ \ | | |
| 51383 | uint64x2_t __ret; \ | | |
| 51384 | float64x2_t __s0 = __p0; \ | | |
| 51385 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | | |
| 51386 | __ret = (uint64x2_t) __builtin_neon_vcvtq_n_u64_v((int8x16_t)__rev0, __p1, 51); \ | | |
| 51387 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | | |
| 51388 | __ret; \ | | |
| 51389 | }) | | |
| 51390 | #endif | | |
| 51391 | | | |
| 51392 | #define vcvt_n_u64_f64(__p0, __p1) __extension__ ({ \ | | |
| 51393 | uint64x1_t __ret; \ | | |
| 51394 | float64x1_t __s0 = __p0; \ | | |
| 51395 | __ret = (uint64x1_t) __builtin_neon_vcvt_n_u64_v((int8x8_t)__s0, __p1, 19); \ | | |
| 51396 | __ret; \ | | |
| 51397 | }) | | |
| 51398 | #define vcvtd_n_u64_f64(__p0, __p1) __extension__ ({ \ | | |
| 51399 | uint64_t __ret; \ | | |
| 51400 | float64_t __s0 = __p0; \ | | |
| 51401 | __ret = (uint64_t) __builtin_neon_vcvtd_n_u64_f64(__s0, __p1); \ | | |
| 51402 | __ret; \ | | |
| 51403 | }) | | |
| 51404 | __ai int32_t vcvts_s32_f32(float32_t __p0) { | | |
| 51405 | int32_t __ret; | | |
| 51406 | __ret = (int32_t) __builtin_neon_vcvts_s32_f32(__p0); | | |
| 51407 | return __ret; | 52612 | return __ret; |
| 51408 | } | 52613 | } |
| 51409 | __ai int64_t vcvtd_s64_f64(float64_t __p0) { | 52614 | #else |
| 51410 | int64_t __ret; | 52615 | __ai float32x4_t vpminnmq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 51411 | __ret = (int64_t) __builtin_neon_vcvtd_s64_f64(__p0); | 52616 | float32x4_t __ret; |
| | 52617 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 52618 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 52619 | __ret = (float32x4_t) __builtin_neon_vpminnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); |
| | 52620 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 51412 | return __ret; | 52621 | return __ret; |
| 51413 | } | 52622 | } |
| | 52623 | #endif |
| | 52624 | |
| 51414 | #ifdef __LITTLE_ENDIAN__ | 52625 | #ifdef __LITTLE_ENDIAN__ |
| 51415 | __ai int64x2_t vcvtq_s64_f64(float64x2_t __p0) { | 52626 | __ai float32x2_t vpminnm_f32(float32x2_t __p0, float32x2_t __p1) { |
| 51416 | int64x2_t __ret; | 52627 | float32x2_t __ret; |
| 51417 | __ret = (int64x2_t) __builtin_neon_vcvtq_s64_v((int8x16_t)__p0, 35); | 52628 | __ret = (float32x2_t) __builtin_neon_vpminnm_v((int8x8_t)__p0, (int8x8_t)__p1, 9); |
| 51418 | return __ret; | 52629 | return __ret; |
| 51419 | } | 52630 | } |
| 51420 | #else | 52631 | #else |
| 51421 | __ai int64x2_t vcvtq_s64_f64(float64x2_t __p0) { | 52632 | __ai float32x2_t vpminnm_f32(float32x2_t __p0, float32x2_t __p1) { |
| 51422 | int64x2_t __ret; | 52633 | float32x2_t __ret; |
| 51423 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 52634 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 51424 | __ret = (int64x2_t) __builtin_neon_vcvtq_s64_v((int8x16_t)__rev0, 35); | 52635 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 52636 | __ret = (float32x2_t) __builtin_neon_vpminnm_v((int8x8_t)__rev0, (int8x8_t)__rev1, 9); |
| 51425 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 52637 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 51426 | return __ret; | 52638 | return __ret; |
| 51427 | } | 52639 | } |
| 51428 | #endif | 52640 | #endif |
| 51429 | | 52641 | |
| 51430 | __ai int64x1_t vcvt_s64_f64(float64x1_t __p0) { | 52642 | #ifdef __LITTLE_ENDIAN__ |
| 51431 | int64x1_t __ret; | 52643 | __ai float64_t vpminnmqd_f64(float64x2_t __p0) { |
| 51432 | __ret = (int64x1_t) __builtin_neon_vcvt_s64_v((int8x8_t)__p0, 3); | 52644 | float64_t __ret; |
| 51433 | return __ret; | 52645 | __ret = (float64_t) __builtin_neon_vpminnmqd_f64(__p0); |
| 51434 | } | | |
| 51435 | __ai uint32_t vcvts_u32_f32(float32_t __p0) { | | |
| 51436 | uint32_t __ret; | | |
| 51437 | __ret = (uint32_t) __builtin_neon_vcvts_u32_f32(__p0); | | |
| 51438 | return __ret; | 52646 | return __ret; |
| 51439 | } | 52647 | } |
| 51440 | __ai uint64_t vcvtd_u64_f64(float64_t __p0) { | 52648 | #else |
| 51441 | uint64_t __ret; | 52649 | __ai float64_t vpminnmqd_f64(float64x2_t __p0) { |
| 51442 | __ret = (uint64_t) __builtin_neon_vcvtd_u64_f64(__p0); | 52650 | float64_t __ret; |
| | 52651 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 52652 | __ret = (float64_t) __builtin_neon_vpminnmqd_f64(__rev0); |
| 51443 | return __ret; | 52653 | return __ret; |
| 51444 | } | 52654 | } |
| | 52655 | #endif |
| | 52656 | |
| 51445 | #ifdef __LITTLE_ENDIAN__ | 52657 | #ifdef __LITTLE_ENDIAN__ |
| 51446 | __ai uint64x2_t vcvtq_u64_f64(float64x2_t __p0) { | 52658 | __ai float32_t vpminnms_f32(float32x2_t __p0) { |
| 51447 | uint64x2_t __ret; | 52659 | float32_t __ret; |
| 51448 | __ret = (uint64x2_t) __builtin_neon_vcvtq_u64_v((int8x16_t)__p0, 51); | 52660 | __ret = (float32_t) __builtin_neon_vpminnms_f32(__p0); |
| 51449 | return __ret; | 52661 | return __ret; |
| 51450 | } | 52662 | } |
| 51451 | #else | 52663 | #else |
| 51452 | __ai uint64x2_t vcvtq_u64_f64(float64x2_t __p0) { | 52664 | __ai float32_t vpminnms_f32(float32x2_t __p0) { |
| 51453 | uint64x2_t __ret; | 52665 | float32_t __ret; |
| 51454 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 52666 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 51455 | __ret = (uint64x2_t) __builtin_neon_vcvtq_u64_v((int8x16_t)__rev0, 51); | 52667 | __ret = (float32_t) __builtin_neon_vpminnms_f32(__rev0); |
| 51456 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 51457 | return __ret; | 52668 | return __ret; |
| 51458 | } | 52669 | } |
| 51459 | #endif | 52670 | #endif |
| 51460 | | 52671 | |
| 51461 | __ai uint64x1_t vcvt_u64_f64(float64x1_t __p0) { | 52672 | #ifdef __LITTLE_ENDIAN__ |
| 51462 | uint64x1_t __ret; | 52673 | __ai int64x2_t vqabsq_s64(int64x2_t __p0) { |
| 51463 | __ret = (uint64x1_t) __builtin_neon_vcvt_u64_v((int8x8_t)__p0, 19); | 52674 | int64x2_t __ret; |
| 51464 | return __ret; | 52675 | __ret = (int64x2_t) __builtin_neon_vqabsq_v((int8x16_t)__p0, 35); |
| 51465 | } | | |
| 51466 | __ai int32_t vcvtas_s32_f32(float32_t __p0) { | | |
| 51467 | int32_t __ret; | | |
| 51468 | __ret = (int32_t) __builtin_neon_vcvtas_s32_f32(__p0); | | |
| 51469 | return __ret; | 52676 | return __ret; |
| 51470 | } | 52677 | } |
| 51471 | __ai int64_t vcvtad_s64_f64(float64_t __p0) { | 52678 | #else |
| 51472 | int64_t __ret; | 52679 | __ai int64x2_t vqabsq_s64(int64x2_t __p0) { |
| 51473 | __ret = (int64_t) __builtin_neon_vcvtad_s64_f64(__p0); | 52680 | int64x2_t __ret; |
| | 52681 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 52682 | __ret = (int64x2_t) __builtin_neon_vqabsq_v((int8x16_t)__rev0, 35); |
| | 52683 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 51474 | return __ret; | 52684 | return __ret; |
| 51475 | } | 52685 | } |
| 51476 | __ai uint32_t vcvtas_u32_f32(float32_t __p0) { | 52686 | #endif |
| 51477 | uint32_t __ret; | 52687 | |
| 51478 | __ret = (uint32_t) __builtin_neon_vcvtas_u32_f32(__p0); | 52688 | __ai int64x1_t vqabs_s64(int64x1_t __p0) { |
| | 52689 | int64x1_t __ret; |
| | 52690 | __ret = (int64x1_t) __builtin_neon_vqabs_v((int8x8_t)__p0, 3); |
| 51479 | return __ret; | 52691 | return __ret; |
| 51480 | } | 52692 | } |
| 51481 | __ai uint64_t vcvtad_u64_f64(float64_t __p0) { | 52693 | __ai int8_t vqabsb_s8(int8_t __p0) { |
| 51482 | uint64_t __ret; | 52694 | int8_t __ret; |
| 51483 | __ret = (uint64_t) __builtin_neon_vcvtad_u64_f64(__p0); | 52695 | __ret = (int8_t) __builtin_neon_vqabsb_s8(__p0); |
| 51484 | return __ret; | 52696 | return __ret; |
| 51485 | } | 52697 | } |
| 51486 | __ai int32_t vcvtms_s32_f32(float32_t __p0) { | 52698 | __ai int32_t vqabss_s32(int32_t __p0) { |
| 51487 | int32_t __ret; | 52699 | int32_t __ret; |
| 51488 | __ret = (int32_t) __builtin_neon_vcvtms_s32_f32(__p0); | 52700 | __ret = (int32_t) __builtin_neon_vqabss_s32(__p0); |
| 51489 | return __ret; | 52701 | return __ret; |
| 51490 | } | 52702 | } |
| 51491 | __ai int64_t vcvtmd_s64_f64(float64_t __p0) { | 52703 | __ai int64_t vqabsd_s64(int64_t __p0) { |
| 51492 | int64_t __ret; | 52704 | int64_t __ret; |
| 51493 | __ret = (int64_t) __builtin_neon_vcvtmd_s64_f64(__p0); | 52705 | __ret = (int64_t) __builtin_neon_vqabsd_s64(__p0); |
| 51494 | return __ret; | 52706 | return __ret; |
| 51495 | } | 52707 | } |
| 51496 | __ai uint32_t vcvtms_u32_f32(float32_t __p0) { | 52708 | __ai int16_t vqabsh_s16(int16_t __p0) { |
| 51497 | uint32_t __ret; | 52709 | int16_t __ret; |
| 51498 | __ret = (uint32_t) __builtin_neon_vcvtms_u32_f32(__p0); | 52710 | __ret = (int16_t) __builtin_neon_vqabsh_s16(__p0); |
| 51499 | return __ret; | 52711 | return __ret; |
| 51500 | } | 52712 | } |
| 51501 | __ai uint64_t vcvtmd_u64_f64(float64_t __p0) { | 52713 | __ai uint8_t vqaddb_u8(uint8_t __p0, uint8_t __p1) { |
| 51502 | uint64_t __ret; | 52714 | uint8_t __ret; |
| 51503 | __ret = (uint64_t) __builtin_neon_vcvtmd_u64_f64(__p0); | 52715 | __ret = (uint8_t) __builtin_neon_vqaddb_u8(__p0, __p1); |
| 51504 | return __ret; | 52716 | return __ret; |
| 51505 | } | 52717 | } |
| 51506 | __ai int32_t vcvtns_s32_f32(float32_t __p0) { | 52718 | __ai uint32_t vqadds_u32(uint32_t __p0, uint32_t __p1) { |
| 51507 | int32_t __ret; | 52719 | uint32_t __ret; |
| 51508 | __ret = (int32_t) __builtin_neon_vcvtns_s32_f32(__p0); | 52720 | __ret = (uint32_t) __builtin_neon_vqadds_u32(__p0, __p1); |
| 51509 | return __ret; | 52721 | return __ret; |
| 51510 | } | 52722 | } |
| 51511 | __ai int64_t vcvtnd_s64_f64(float64_t __p0) { | 52723 | __ai uint64_t vqaddd_u64(uint64_t __p0, uint64_t __p1) { |
| 51512 | int64_t __ret; | 52724 | uint64_t __ret; |
| 51513 | __ret = (int64_t) __builtin_neon_vcvtnd_s64_f64(__p0); | 52725 | __ret = (uint64_t) __builtin_neon_vqaddd_u64(__p0, __p1); |
| 51514 | return __ret; | 52726 | return __ret; |
| 51515 | } | 52727 | } |
| 51516 | __ai uint32_t vcvtns_u32_f32(float32_t __p0) { | 52728 | __ai uint16_t vqaddh_u16(uint16_t __p0, uint16_t __p1) { |
| 51517 | uint32_t __ret; | 52729 | uint16_t __ret; |
| 51518 | __ret = (uint32_t) __builtin_neon_vcvtns_u32_f32(__p0); | 52730 | __ret = (uint16_t) __builtin_neon_vqaddh_u16(__p0, __p1); |
| 51519 | return __ret; | 52731 | return __ret; |
| 51520 | } | 52732 | } |
| 51521 | __ai uint64_t vcvtnd_u64_f64(float64_t __p0) { | 52733 | __ai int8_t vqaddb_s8(int8_t __p0, int8_t __p1) { |
| 51522 | uint64_t __ret; | 52734 | int8_t __ret; |
| 51523 | __ret = (uint64_t) __builtin_neon_vcvtnd_u64_f64(__p0); | 52735 | __ret = (int8_t) __builtin_neon_vqaddb_s8(__p0, __p1); |
| 51524 | return __ret; | 52736 | return __ret; |
| 51525 | } | 52737 | } |
| 51526 | __ai int32_t vcvtps_s32_f32(float32_t __p0) { | 52738 | __ai int32_t vqadds_s32(int32_t __p0, int32_t __p1) { |
| 51527 | int32_t __ret; | 52739 | int32_t __ret; |
| 51528 | __ret = (int32_t) __builtin_neon_vcvtps_s32_f32(__p0); | 52740 | __ret = (int32_t) __builtin_neon_vqadds_s32(__p0, __p1); |
| 51529 | return __ret; | 52741 | return __ret; |
| 51530 | } | 52742 | } |
| 51531 | __ai int64_t vcvtpd_s64_f64(float64_t __p0) { | 52743 | __ai int64_t vqaddd_s64(int64_t __p0, int64_t __p1) { |
| 51532 | int64_t __ret; | 52744 | int64_t __ret; |
| 51533 | __ret = (int64_t) __builtin_neon_vcvtpd_s64_f64(__p0); | 52745 | __ret = (int64_t) __builtin_neon_vqaddd_s64(__p0, __p1); |
| 51534 | return __ret; | 52746 | return __ret; |
| 51535 | } | 52747 | } |
| 51536 | __ai uint32_t vcvtps_u32_f32(float32_t __p0) { | 52748 | __ai int16_t vqaddh_s16(int16_t __p0, int16_t __p1) { |
| 51537 | uint32_t __ret; | 52749 | int16_t __ret; |
| 51538 | __ret = (uint32_t) __builtin_neon_vcvtps_u32_f32(__p0); | 52750 | __ret = (int16_t) __builtin_neon_vqaddh_s16(__p0, __p1); |
| 51539 | return __ret; | 52751 | return __ret; |
| 51540 | } | 52752 | } |
| 51541 | __ai uint64_t vcvtpd_u64_f64(float64_t __p0) { | 52753 | __ai int64_t vqdmlals_s32(int64_t __p0, int32_t __p1, int32_t __p2) { |
| 51542 | uint64_t __ret; | 52754 | int64_t __ret; |
| 51543 | __ret = (uint64_t) __builtin_neon_vcvtpd_u64_f64(__p0); | 52755 | __ret = (int64_t) __builtin_neon_vqdmlals_s32(__p0, __p1, __p2); |
| 51544 | return __ret; | 52756 | return __ret; |
| 51545 | } | 52757 | } |
| 51546 | __ai float32_t vcvtxd_f32_f64(float64_t __p0) { | 52758 | __ai int32_t vqdmlalh_s16(int32_t __p0, int16_t __p1, int16_t __p2) { |
| 51547 | float32_t __ret; | 52759 | int32_t __ret; |
| 51548 | __ret = (float32_t) __builtin_neon_vcvtxd_f32_f64(__p0); | 52760 | __ret = (int32_t) __builtin_neon_vqdmlalh_s16(__p0, __p1, __p2); |
| 51549 | return __ret; | 52761 | return __ret; |
| 51550 | } | 52762 | } |
| 51551 | #ifdef __LITTLE_ENDIAN__ | 52763 | #ifdef __LITTLE_ENDIAN__ |
| 51552 | __ai float32x2_t vcvtx_f32_f64(float64x2_t __p0) { | 52764 | __ai int64x2_t vqdmlal_high_s32(int64x2_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 51553 | float32x2_t __ret; | 52765 | int64x2_t __ret; |
| 51554 | __ret = (float32x2_t) __builtin_neon_vcvtx_f32_v((int8x16_t)__p0, 42); | 52766 | __ret = vqdmlal_s32(__p0, vget_high_s32(__p1), vget_high_s32(__p2)); |
| 51555 | return __ret; | 52767 | return __ret; |
| 51556 | } | 52768 | } |
| 51557 | #else | 52769 | #else |
| 51558 | __ai float32x2_t vcvtx_f32_f64(float64x2_t __p0) { | 52770 | __ai int64x2_t vqdmlal_high_s32(int64x2_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 51559 | float32x2_t __ret; | 52771 | int64x2_t __ret; |
| 51560 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 52772 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 51561 | __ret = (float32x2_t) __builtin_neon_vcvtx_f32_v((int8x16_t)__rev0, 42); | 52773 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 52774 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 52775 | __ret = __noswap_vqdmlal_s32(__rev0, __noswap_vget_high_s32(__rev1), __noswap_vget_high_s32(__rev2)); |
| 51562 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 52776 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 51563 | return __ret; | 52777 | return __ret; |
| 51564 | } | 52778 | } |
| 51565 | __ai float32x2_t __noswap_vcvtx_f32_f64(float64x2_t __p0) { | | |
| 51566 | float32x2_t __ret; | | |
| 51567 | __ret = (float32x2_t) __builtin_neon_vcvtx_f32_v((int8x16_t)__p0, 42); | | |
| 51568 | return __ret; | | |
| 51569 | } | | |
| 51570 | #endif | 52779 | #endif |
| 51571 | | 52780 | |
| 51572 | #ifdef __LITTLE_ENDIAN__ | 52781 | #ifdef __LITTLE_ENDIAN__ |
| 51573 | __ai float32x4_t vcvtx_high_f32_f64(float32x2_t __p0, float64x2_t __p1) { | 52782 | __ai int32x4_t vqdmlal_high_s16(int32x4_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 51574 | float32x4_t __ret; | 52783 | int32x4_t __ret; |
| 51575 | __ret = vcombine_f32(__p0, vcvtx_f32_f64(__p1)); | 52784 | __ret = vqdmlal_s16(__p0, vget_high_s16(__p1), vget_high_s16(__p2)); |
| 51576 | return __ret; | 52785 | return __ret; |
| 51577 | } | 52786 | } |
| 51578 | #else | 52787 | #else |
| 51579 | __ai float32x4_t vcvtx_high_f32_f64(float32x2_t __p0, float64x2_t __p1) { | 52788 | __ai int32x4_t vqdmlal_high_s16(int32x4_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 51580 | float32x4_t __ret; | 52789 | int32x4_t __ret; |
| 51581 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 52790 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 51582 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 52791 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51583 | __ret = __noswap_vcombine_f32(__rev0, __noswap_vcvtx_f32_f64(__rev1)); | 52792 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 52793 | __ret = __noswap_vqdmlal_s16(__rev0, __noswap_vget_high_s16(__rev1), __noswap_vget_high_s16(__rev2)); |
| 51584 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 52794 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 51585 | return __ret; | 52795 | return __ret; |
| 51586 | } | 52796 | } |
| 51587 | #endif | 52797 | #endif |
| 51588 | | 52798 | |
| 51589 | #ifdef __LITTLE_ENDIAN__ | 52799 | #ifdef __LITTLE_ENDIAN__ |
| 51590 | __ai float64x2_t vdivq_f64(float64x2_t __p0, float64x2_t __p1) { | 52800 | #define vqdmlal_high_lane_s32(__p0_607, __p1_607, __p2_607, __p3_607) __extension__ ({ \ |
| 51591 | float64x2_t __ret; | 52801 | int64x2_t __ret_607; \ |
| 51592 | __ret = __p0 / __p1; | 52802 | int64x2_t __s0_607 = __p0_607; \ |
| 51593 | return __ret; | 52803 | int32x4_t __s1_607 = __p1_607; \ |
| 51594 | } | 52804 | int32x2_t __s2_607 = __p2_607; \ |
| | 52805 | __ret_607 = vqdmlal_s32(__s0_607, vget_high_s32(__s1_607), splat_lane_s32(__s2_607, __p3_607)); \ |
| | 52806 | __ret_607; \ |
| | 52807 | }) |
| 51595 | #else | 52808 | #else |
| 51596 | __ai float64x2_t vdivq_f64(float64x2_t __p0, float64x2_t __p1) { | 52809 | #define vqdmlal_high_lane_s32(__p0_608, __p1_608, __p2_608, __p3_608) __extension__ ({ \ |
| 51597 | float64x2_t __ret; | 52810 | int64x2_t __ret_608; \ |
| 51598 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 52811 | int64x2_t __s0_608 = __p0_608; \ |
| 51599 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 52812 | int32x4_t __s1_608 = __p1_608; \ |
| 51600 | __ret = __rev0 / __rev1; | 52813 | int32x2_t __s2_608 = __p2_608; \ |
| 51601 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 52814 | int64x2_t __rev0_608; __rev0_608 = __builtin_shufflevector(__s0_608, __s0_608, 1, 0); \ |
| 51602 | return __ret; | 52815 | int32x4_t __rev1_608; __rev1_608 = __builtin_shufflevector(__s1_608, __s1_608, 3, 2, 1, 0); \ |
| 51603 | } | 52816 | int32x2_t __rev2_608; __rev2_608 = __builtin_shufflevector(__s2_608, __s2_608, 1, 0); \ |
| | 52817 | __ret_608 = __noswap_vqdmlal_s32(__rev0_608, __noswap_vget_high_s32(__rev1_608), __noswap_splat_lane_s32(__rev2_608, __p3_608)); \ |
| | 52818 | __ret_608 = __builtin_shufflevector(__ret_608, __ret_608, 1, 0); \ |
| | 52819 | __ret_608; \ |
| | 52820 | }) |
| 51604 | #endif | 52821 | #endif |
| 51605 | | 52822 | |
| 51606 | #ifdef __LITTLE_ENDIAN__ | 52823 | #ifdef __LITTLE_ENDIAN__ |
| 51607 | __ai float32x4_t vdivq_f32(float32x4_t __p0, float32x4_t __p1) { | 52824 | #define vqdmlal_high_lane_s16(__p0_609, __p1_609, __p2_609, __p3_609) __extension__ ({ \ |
| 51608 | float32x4_t __ret; | 52825 | int32x4_t __ret_609; \ |
| 51609 | __ret = __p0 / __p1; | 52826 | int32x4_t __s0_609 = __p0_609; \ |
| | 52827 | int16x8_t __s1_609 = __p1_609; \ |
| | 52828 | int16x4_t __s2_609 = __p2_609; \ |
| | 52829 | __ret_609 = vqdmlal_s16(__s0_609, vget_high_s16(__s1_609), splat_lane_s16(__s2_609, __p3_609)); \ |
| | 52830 | __ret_609; \ |
| | 52831 | }) |
| | 52832 | #else |
| | 52833 | #define vqdmlal_high_lane_s16(__p0_610, __p1_610, __p2_610, __p3_610) __extension__ ({ \ |
| | 52834 | int32x4_t __ret_610; \ |
| | 52835 | int32x4_t __s0_610 = __p0_610; \ |
| | 52836 | int16x8_t __s1_610 = __p1_610; \ |
| | 52837 | int16x4_t __s2_610 = __p2_610; \ |
| | 52838 | int32x4_t __rev0_610; __rev0_610 = __builtin_shufflevector(__s0_610, __s0_610, 3, 2, 1, 0); \ |
| | 52839 | int16x8_t __rev1_610; __rev1_610 = __builtin_shufflevector(__s1_610, __s1_610, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 52840 | int16x4_t __rev2_610; __rev2_610 = __builtin_shufflevector(__s2_610, __s2_610, 3, 2, 1, 0); \ |
| | 52841 | __ret_610 = __noswap_vqdmlal_s16(__rev0_610, __noswap_vget_high_s16(__rev1_610), __noswap_splat_lane_s16(__rev2_610, __p3_610)); \ |
| | 52842 | __ret_610 = __builtin_shufflevector(__ret_610, __ret_610, 3, 2, 1, 0); \ |
| | 52843 | __ret_610; \ |
| | 52844 | }) |
| | 52845 | #endif |
| | 52846 | |
| | 52847 | #ifdef __LITTLE_ENDIAN__ |
| | 52848 | #define vqdmlal_high_laneq_s32(__p0_611, __p1_611, __p2_611, __p3_611) __extension__ ({ \ |
| | 52849 | int64x2_t __ret_611; \ |
| | 52850 | int64x2_t __s0_611 = __p0_611; \ |
| | 52851 | int32x4_t __s1_611 = __p1_611; \ |
| | 52852 | int32x4_t __s2_611 = __p2_611; \ |
| | 52853 | __ret_611 = vqdmlal_s32(__s0_611, vget_high_s32(__s1_611), splat_laneq_s32(__s2_611, __p3_611)); \ |
| | 52854 | __ret_611; \ |
| | 52855 | }) |
| | 52856 | #else |
| | 52857 | #define vqdmlal_high_laneq_s32(__p0_612, __p1_612, __p2_612, __p3_612) __extension__ ({ \ |
| | 52858 | int64x2_t __ret_612; \ |
| | 52859 | int64x2_t __s0_612 = __p0_612; \ |
| | 52860 | int32x4_t __s1_612 = __p1_612; \ |
| | 52861 | int32x4_t __s2_612 = __p2_612; \ |
| | 52862 | int64x2_t __rev0_612; __rev0_612 = __builtin_shufflevector(__s0_612, __s0_612, 1, 0); \ |
| | 52863 | int32x4_t __rev1_612; __rev1_612 = __builtin_shufflevector(__s1_612, __s1_612, 3, 2, 1, 0); \ |
| | 52864 | int32x4_t __rev2_612; __rev2_612 = __builtin_shufflevector(__s2_612, __s2_612, 3, 2, 1, 0); \ |
| | 52865 | __ret_612 = __noswap_vqdmlal_s32(__rev0_612, __noswap_vget_high_s32(__rev1_612), __noswap_splat_laneq_s32(__rev2_612, __p3_612)); \ |
| | 52866 | __ret_612 = __builtin_shufflevector(__ret_612, __ret_612, 1, 0); \ |
| | 52867 | __ret_612; \ |
| | 52868 | }) |
| | 52869 | #endif |
| | 52870 | |
| | 52871 | #ifdef __LITTLE_ENDIAN__ |
| | 52872 | #define vqdmlal_high_laneq_s16(__p0_613, __p1_613, __p2_613, __p3_613) __extension__ ({ \ |
| | 52873 | int32x4_t __ret_613; \ |
| | 52874 | int32x4_t __s0_613 = __p0_613; \ |
| | 52875 | int16x8_t __s1_613 = __p1_613; \ |
| | 52876 | int16x8_t __s2_613 = __p2_613; \ |
| | 52877 | __ret_613 = vqdmlal_s16(__s0_613, vget_high_s16(__s1_613), splat_laneq_s16(__s2_613, __p3_613)); \ |
| | 52878 | __ret_613; \ |
| | 52879 | }) |
| | 52880 | #else |
| | 52881 | #define vqdmlal_high_laneq_s16(__p0_614, __p1_614, __p2_614, __p3_614) __extension__ ({ \ |
| | 52882 | int32x4_t __ret_614; \ |
| | 52883 | int32x4_t __s0_614 = __p0_614; \ |
| | 52884 | int16x8_t __s1_614 = __p1_614; \ |
| | 52885 | int16x8_t __s2_614 = __p2_614; \ |
| | 52886 | int32x4_t __rev0_614; __rev0_614 = __builtin_shufflevector(__s0_614, __s0_614, 3, 2, 1, 0); \ |
| | 52887 | int16x8_t __rev1_614; __rev1_614 = __builtin_shufflevector(__s1_614, __s1_614, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 52888 | int16x8_t __rev2_614; __rev2_614 = __builtin_shufflevector(__s2_614, __s2_614, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 52889 | __ret_614 = __noswap_vqdmlal_s16(__rev0_614, __noswap_vget_high_s16(__rev1_614), __noswap_splat_laneq_s16(__rev2_614, __p3_614)); \ |
| | 52890 | __ret_614 = __builtin_shufflevector(__ret_614, __ret_614, 3, 2, 1, 0); \ |
| | 52891 | __ret_614; \ |
| | 52892 | }) |
| | 52893 | #endif |
| | 52894 | |
| | 52895 | #ifdef __LITTLE_ENDIAN__ |
| | 52896 | __ai int64x2_t vqdmlal_high_n_s32(int64x2_t __p0, int32x4_t __p1, int32_t __p2) { |
| | 52897 | int64x2_t __ret; |
| | 52898 | __ret = vqdmlal_n_s32(__p0, vget_high_s32(__p1), __p2); |
| 51610 | return __ret; | 52899 | return __ret; |
| 51611 | } | 52900 | } |
| 51612 | #else | 52901 | #else |
| 51613 | __ai float32x4_t vdivq_f32(float32x4_t __p0, float32x4_t __p1) { | 52902 | __ai int64x2_t vqdmlal_high_n_s32(int64x2_t __p0, int32x4_t __p1, int32_t __p2) { |
| 51614 | float32x4_t __ret; | 52903 | int64x2_t __ret; |
| 51615 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 52904 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 51616 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 52905 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 51617 | __ret = __rev0 / __rev1; | 52906 | __ret = __noswap_vqdmlal_n_s32(__rev0, __noswap_vget_high_s32(__rev1), __p2); |
| 51618 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 52907 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 51619 | return __ret; | 52908 | return __ret; |
| 51620 | } | 52909 | } |
| 51621 | #endif | 52910 | #endif |
| 51622 | | 52911 | |
| 51623 | __ai float64x1_t vdiv_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 51624 | float64x1_t __ret; | | |
| 51625 | __ret = __p0 / __p1; | | |
| 51626 | return __ret; | | |
| 51627 | } | | |
| 51628 | #ifdef __LITTLE_ENDIAN__ | 52912 | #ifdef __LITTLE_ENDIAN__ |
| 51629 | __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | 52913 | __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) { |
| 51630 | float32x2_t __ret; | 52914 | int32x4_t __ret; |
| 51631 | __ret = __p0 / __p1; | 52915 | __ret = vqdmlal_n_s16(__p0, vget_high_s16(__p1), __p2); |
| 51632 | return __ret; | 52916 | return __ret; |
| 51633 | } | 52917 | } |
| 51634 | #else | 52918 | #else |
| 51635 | __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | 52919 | __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) { |
| 51636 | float32x2_t __ret; | 52920 | int32x4_t __ret; |
| 51637 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 52921 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 51638 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 52922 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51639 | __ret = __rev0 / __rev1; | 52923 | __ret = __noswap_vqdmlal_n_s16(__rev0, __noswap_vget_high_s16(__rev1), __p2); |
| 51640 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 52924 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 51641 | return __ret; | 52925 | return __ret; |
| 51642 | } | 52926 | } |
| 51643 | #endif | 52927 | #endif |
| 51644 | | 52928 | |
| 51645 | #ifdef __LITTLE_ENDIAN__ | 52929 | #ifdef __LITTLE_ENDIAN__ |
| 51646 | #define vdupb_lane_p8(__p0, __p1) __extension__ ({ \ | 52930 | #define vqdmlals_lane_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 51647 | poly8_t __ret; \ | 52931 | int64_t __ret; \ |
| 51648 | poly8x8_t __s0 = __p0; \ | 52932 | int64_t __s0 = __p0; \ |
| 51649 | __ret = (poly8_t) __builtin_neon_vdupb_lane_i8((poly8x8_t)__s0, __p1); \ | 52933 | int32_t __s1 = __p1; \ |
| | 52934 | int32x2_t __s2 = __p2; \ |
| | 52935 | __ret = (int64_t) __builtin_neon_vqdmlals_lane_s32(__s0, __s1, __s2, __p3); \ |
| 51650 | __ret; \ | 52936 | __ret; \ |
| 51651 | }) | 52937 | }) |
| 51652 | #else | 52938 | #else |
| 51653 | #define vdupb_lane_p8(__p0, __p1) __extension__ ({ \ | 52939 | #define vqdmlals_lane_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 51654 | poly8_t __ret; \ | 52940 | int64_t __ret; \ |
| 51655 | poly8x8_t __s0 = __p0; \ | 52941 | int64_t __s0 = __p0; \ |
| 51656 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52942 | int32_t __s1 = __p1; \ |
| 51657 | __ret = (poly8_t) __builtin_neon_vdupb_lane_i8((poly8x8_t)__rev0, __p1); \ | 52943 | int32x2_t __s2 = __p2; \ |
| | 52944 | int32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ |
| | 52945 | __ret = (int64_t) __builtin_neon_vqdmlals_lane_s32(__s0, __s1, __rev2, __p3); \ |
| 51658 | __ret; \ | 52946 | __ret; \ |
| 51659 | }) | 52947 | }) |
| 51660 | #endif | 52948 | #endif |
| 51661 | | 52949 | |
| 51662 | #ifdef __LITTLE_ENDIAN__ | 52950 | #ifdef __LITTLE_ENDIAN__ |
| 51663 | #define vduph_lane_p16(__p0, __p1) __extension__ ({ \ | 52951 | #define vqdmlalh_lane_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 51664 | poly16_t __ret; \ | 52952 | int32_t __ret; \ |
| 51665 | poly16x4_t __s0 = __p0; \ | 52953 | int32_t __s0 = __p0; \ |
| 51666 | __ret = (poly16_t) __builtin_neon_vduph_lane_i16((poly16x4_t)__s0, __p1); \ | 52954 | int16_t __s1 = __p1; \ |
| | 52955 | int16x4_t __s2 = __p2; \ |
| | 52956 | __ret = (int32_t) __builtin_neon_vqdmlalh_lane_s16(__s0, __s1, __s2, __p3); \ |
| 51667 | __ret; \ | 52957 | __ret; \ |
| 51668 | }) | 52958 | }) |
| 51669 | #else | 52959 | #else |
| 51670 | #define vduph_lane_p16(__p0, __p1) __extension__ ({ \ | 52960 | #define vqdmlalh_lane_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 51671 | poly16_t __ret; \ | 52961 | int32_t __ret; \ |
| 51672 | poly16x4_t __s0 = __p0; \ | 52962 | int32_t __s0 = __p0; \ |
| 51673 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 52963 | int16_t __s1 = __p1; \ |
| 51674 | __ret = (poly16_t) __builtin_neon_vduph_lane_i16((poly16x4_t)__rev0, __p1); \ | 52964 | int16x4_t __s2 = __p2; \ |
| | 52965 | int16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| | 52966 | __ret = (int32_t) __builtin_neon_vqdmlalh_lane_s16(__s0, __s1, __rev2, __p3); \ |
| 51675 | __ret; \ | 52967 | __ret; \ |
| 51676 | }) | 52968 | }) |
| 51677 | #endif | 52969 | #endif |
| 51678 | | 52970 | |
| 51679 | #ifdef __LITTLE_ENDIAN__ | 52971 | #ifdef __LITTLE_ENDIAN__ |
| 51680 | #define vdupb_lane_u8(__p0, __p1) __extension__ ({ \ | 52972 | #define vqdmlals_laneq_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 51681 | uint8_t __ret; \ | 52973 | int64_t __ret; \ |
| 51682 | uint8x8_t __s0 = __p0; \ | 52974 | int64_t __s0 = __p0; \ |
| 51683 | __ret = (uint8_t) __builtin_neon_vdupb_lane_i8((int8x8_t)__s0, __p1); \ | 52975 | int32_t __s1 = __p1; \ |
| | 52976 | int32x4_t __s2 = __p2; \ |
| | 52977 | __ret = (int64_t) __builtin_neon_vqdmlals_laneq_s32(__s0, __s1, __s2, __p3); \ |
| 51684 | __ret; \ | 52978 | __ret; \ |
| 51685 | }) | 52979 | }) |
| 51686 | #else | 52980 | #else |
| 51687 | #define vdupb_lane_u8(__p0, __p1) __extension__ ({ \ | 52981 | #define vqdmlals_laneq_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 51688 | uint8_t __ret; \ | 52982 | int64_t __ret; \ |
| 51689 | uint8x8_t __s0 = __p0; \ | 52983 | int64_t __s0 = __p0; \ |
| 51690 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52984 | int32_t __s1 = __p1; \ |
| 51691 | __ret = (uint8_t) __builtin_neon_vdupb_lane_i8((int8x8_t)__rev0, __p1); \ | 52985 | int32x4_t __s2 = __p2; \ |
| | 52986 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| | 52987 | __ret = (int64_t) __builtin_neon_vqdmlals_laneq_s32(__s0, __s1, __rev2, __p3); \ |
| 51692 | __ret; \ | 52988 | __ret; \ |
| 51693 | }) | 52989 | }) |
| 51694 | #endif | 52990 | #endif |
| 51695 | | 52991 | |
| 51696 | #ifdef __LITTLE_ENDIAN__ | 52992 | #ifdef __LITTLE_ENDIAN__ |
| 51697 | #define vdups_lane_u32(__p0, __p1) __extension__ ({ \ | 52993 | #define vqdmlalh_laneq_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 51698 | uint32_t __ret; \ | 52994 | int32_t __ret; \ |
| 51699 | uint32x2_t __s0 = __p0; \ | 52995 | int32_t __s0 = __p0; \ |
| 51700 | __ret = (uint32_t) __builtin_neon_vdups_lane_i32((int32x2_t)__s0, __p1); \ | 52996 | int16_t __s1 = __p1; \ |
| | 52997 | int16x8_t __s2 = __p2; \ |
| | 52998 | __ret = (int32_t) __builtin_neon_vqdmlalh_laneq_s16(__s0, __s1, __s2, __p3); \ |
| 51701 | __ret; \ | 52999 | __ret; \ |
| 51702 | }) | 53000 | }) |
| 51703 | #else | 53001 | #else |
| 51704 | #define vdups_lane_u32(__p0, __p1) __extension__ ({ \ | 53002 | #define vqdmlalh_laneq_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 51705 | uint32_t __ret; \ | 53003 | int32_t __ret; \ |
| 51706 | uint32x2_t __s0 = __p0; \ | 53004 | int32_t __s0 = __p0; \ |
| 51707 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 53005 | int16_t __s1 = __p1; \ |
| 51708 | __ret = (uint32_t) __builtin_neon_vdups_lane_i32((int32x2_t)__rev0, __p1); \ | 53006 | int16x8_t __s2 = __p2; \ |
| | 53007 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 53008 | __ret = (int32_t) __builtin_neon_vqdmlalh_laneq_s16(__s0, __s1, __rev2, __p3); \ |
| 51709 | __ret; \ | 53009 | __ret; \ |
| 51710 | }) | 53010 | }) |
| 51711 | #endif | 53011 | #endif |
| 51712 | | 53012 | |
| 51713 | #define vdupd_lane_u64(__p0, __p1) __extension__ ({ \ | | |
| 51714 | uint64_t __ret; \ | | |
| 51715 | uint64x1_t __s0 = __p0; \ | | |
| 51716 | __ret = (uint64_t) __builtin_neon_vdupd_lane_i64((int64x1_t)__s0, __p1); \ | | |
| 51717 | __ret; \ | | |
| 51718 | }) | | |
| 51719 | #ifdef __LITTLE_ENDIAN__ | 53013 | #ifdef __LITTLE_ENDIAN__ |
| 51720 | #define vduph_lane_u16(__p0, __p1) __extension__ ({ \ | 53014 | #define vqdmlal_laneq_s32(__p0_615, __p1_615, __p2_615, __p3_615) __extension__ ({ \ |
| 51721 | uint16_t __ret; \ | 53015 | int64x2_t __ret_615; \ |
| 51722 | uint16x4_t __s0 = __p0; \ | 53016 | int64x2_t __s0_615 = __p0_615; \ |
| 51723 | __ret = (uint16_t) __builtin_neon_vduph_lane_i16((int16x4_t)__s0, __p1); \ | 53017 | int32x2_t __s1_615 = __p1_615; \ |
| 51724 | __ret; \ | 53018 | int32x4_t __s2_615 = __p2_615; \ |
| | 53019 | __ret_615 = vqdmlal_s32(__s0_615, __s1_615, splat_laneq_s32(__s2_615, __p3_615)); \ |
| | 53020 | __ret_615; \ |
| 51725 | }) | 53021 | }) |
| 51726 | #else | 53022 | #else |
| 51727 | #define vduph_lane_u16(__p0, __p1) __extension__ ({ \ | 53023 | #define vqdmlal_laneq_s32(__p0_616, __p1_616, __p2_616, __p3_616) __extension__ ({ \ |
| 51728 | uint16_t __ret; \ | 53024 | int64x2_t __ret_616; \ |
| 51729 | uint16x4_t __s0 = __p0; \ | 53025 | int64x2_t __s0_616 = __p0_616; \ |
| 51730 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 53026 | int32x2_t __s1_616 = __p1_616; \ |
| 51731 | __ret = (uint16_t) __builtin_neon_vduph_lane_i16((int16x4_t)__rev0, __p1); \ | 53027 | int32x4_t __s2_616 = __p2_616; \ |
| 51732 | __ret; \ | 53028 | int64x2_t __rev0_616; __rev0_616 = __builtin_shufflevector(__s0_616, __s0_616, 1, 0); \ |
| | 53029 | int32x2_t __rev1_616; __rev1_616 = __builtin_shufflevector(__s1_616, __s1_616, 1, 0); \ |
| | 53030 | int32x4_t __rev2_616; __rev2_616 = __builtin_shufflevector(__s2_616, __s2_616, 3, 2, 1, 0); \ |
| | 53031 | __ret_616 = __noswap_vqdmlal_s32(__rev0_616, __rev1_616, __noswap_splat_laneq_s32(__rev2_616, __p3_616)); \ |
| | 53032 | __ret_616 = __builtin_shufflevector(__ret_616, __ret_616, 1, 0); \ |
| | 53033 | __ret_616; \ |
| 51733 | }) | 53034 | }) |
| 51734 | #endif | 53035 | #endif |
| 51735 | | 53036 | |
| 51736 | #ifdef __LITTLE_ENDIAN__ | 53037 | #ifdef __LITTLE_ENDIAN__ |
| 51737 | #define vdupb_lane_s8(__p0, __p1) __extension__ ({ \ | 53038 | #define vqdmlal_laneq_s16(__p0_617, __p1_617, __p2_617, __p3_617) __extension__ ({ \ |
| 51738 | int8_t __ret; \ | 53039 | int32x4_t __ret_617; \ |
| 51739 | int8x8_t __s0 = __p0; \ | 53040 | int32x4_t __s0_617 = __p0_617; \ |
| 51740 | __ret = (int8_t) __builtin_neon_vdupb_lane_i8((int8x8_t)__s0, __p1); \ | 53041 | int16x4_t __s1_617 = __p1_617; \ |
| 51741 | __ret; \ | 53042 | int16x8_t __s2_617 = __p2_617; \ |
| | 53043 | __ret_617 = vqdmlal_s16(__s0_617, __s1_617, splat_laneq_s16(__s2_617, __p3_617)); \ |
| | 53044 | __ret_617; \ |
| 51742 | }) | 53045 | }) |
| 51743 | #else | 53046 | #else |
| 51744 | #define vdupb_lane_s8(__p0, __p1) __extension__ ({ \ | 53047 | #define vqdmlal_laneq_s16(__p0_618, __p1_618, __p2_618, __p3_618) __extension__ ({ \ |
| 51745 | int8_t __ret; \ | 53048 | int32x4_t __ret_618; \ |
| 51746 | int8x8_t __s0 = __p0; \ | 53049 | int32x4_t __s0_618 = __p0_618; \ |
| 51747 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53050 | int16x4_t __s1_618 = __p1_618; \ |
| 51748 | __ret = (int8_t) __builtin_neon_vdupb_lane_i8((int8x8_t)__rev0, __p1); \ | 53051 | int16x8_t __s2_618 = __p2_618; \ |
| 51749 | __ret; \ | 53052 | int32x4_t __rev0_618; __rev0_618 = __builtin_shufflevector(__s0_618, __s0_618, 3, 2, 1, 0); \ |
| | 53053 | int16x4_t __rev1_618; __rev1_618 = __builtin_shufflevector(__s1_618, __s1_618, 3, 2, 1, 0); \ |
| | 53054 | int16x8_t __rev2_618; __rev2_618 = __builtin_shufflevector(__s2_618, __s2_618, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 53055 | __ret_618 = __noswap_vqdmlal_s16(__rev0_618, __rev1_618, __noswap_splat_laneq_s16(__rev2_618, __p3_618)); \ |
| | 53056 | __ret_618 = __builtin_shufflevector(__ret_618, __ret_618, 3, 2, 1, 0); \ |
| | 53057 | __ret_618; \ |
| 51750 | }) | 53058 | }) |
| 51751 | #endif | 53059 | #endif |
| 51752 | | 53060 | |
| 51753 | #define vdupd_lane_f64(__p0, __p1) __extension__ ({ \ | 53061 | __ai int64_t vqdmlsls_s32(int64_t __p0, int32_t __p1, int32_t __p2) { |
| 51754 | float64_t __ret; \ | 53062 | int64_t __ret; |
| 51755 | float64x1_t __s0 = __p0; \ | 53063 | __ret = (int64_t) __builtin_neon_vqdmlsls_s32(__p0, __p1, __p2); |
| 51756 | __ret = (float64_t) __builtin_neon_vdupd_lane_f64((float64x1_t)__s0, __p1); \ | 53064 | return __ret; |
| 51757 | __ret; \ | 53065 | } |
| 51758 | }) | 53066 | __ai int32_t vqdmlslh_s16(int32_t __p0, int16_t __p1, int16_t __p2) { |
| | 53067 | int32_t __ret; |
| | 53068 | __ret = (int32_t) __builtin_neon_vqdmlslh_s16(__p0, __p1, __p2); |
| | 53069 | return __ret; |
| | 53070 | } |
| 51759 | #ifdef __LITTLE_ENDIAN__ | 53071 | #ifdef __LITTLE_ENDIAN__ |
| 51760 | #define vdups_lane_f32(__p0, __p1) __extension__ ({ \ | 53072 | __ai int64x2_t vqdmlsl_high_s32(int64x2_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 51761 | float32_t __ret; \ | 53073 | int64x2_t __ret; |
| 51762 | float32x2_t __s0 = __p0; \ | 53074 | __ret = vqdmlsl_s32(__p0, vget_high_s32(__p1), vget_high_s32(__p2)); |
| 51763 | __ret = (float32_t) __builtin_neon_vdups_lane_f32((float32x2_t)__s0, __p1); \ | 53075 | return __ret; |
| 51764 | __ret; \ | 53076 | } |
| 51765 | }) | | |
| 51766 | #else | 53077 | #else |
| 51767 | #define vdups_lane_f32(__p0, __p1) __extension__ ({ \ | 53078 | __ai int64x2_t vqdmlsl_high_s32(int64x2_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 51768 | float32_t __ret; \ | 53079 | int64x2_t __ret; |
| 51769 | float32x2_t __s0 = __p0; \ | 53080 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 51770 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 53081 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 51771 | __ret = (float32_t) __builtin_neon_vdups_lane_f32((float32x2_t)__rev0, __p1); \ | 53082 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 51772 | __ret; \ | 53083 | __ret = __noswap_vqdmlsl_s32(__rev0, __noswap_vget_high_s32(__rev1), __noswap_vget_high_s32(__rev2)); |
| 51773 | }) | 53084 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 53085 | return __ret; |
| | 53086 | } |
| 51774 | #endif | 53087 | #endif |
| 51775 | | 53088 | |
| 51776 | #ifdef __LITTLE_ENDIAN__ | 53089 | #ifdef __LITTLE_ENDIAN__ |
| 51777 | #define vdups_lane_s32(__p0, __p1) __extension__ ({ \ | 53090 | __ai int32x4_t vqdmlsl_high_s16(int32x4_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 51778 | int32_t __ret; \ | 53091 | int32x4_t __ret; |
| 51779 | int32x2_t __s0 = __p0; \ | 53092 | __ret = vqdmlsl_s16(__p0, vget_high_s16(__p1), vget_high_s16(__p2)); |
| 51780 | __ret = (int32_t) __builtin_neon_vdups_lane_i32((int32x2_t)__s0, __p1); \ | 53093 | return __ret; |
| 51781 | __ret; \ | 53094 | } |
| 51782 | }) | | |
| 51783 | #else | 53095 | #else |
| 51784 | #define vdups_lane_s32(__p0, __p1) __extension__ ({ \ | 53096 | __ai int32x4_t vqdmlsl_high_s16(int32x4_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 51785 | int32_t __ret; \ | 53097 | int32x4_t __ret; |
| 51786 | int32x2_t __s0 = __p0; \ | 53098 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 51787 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 53099 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51788 | __ret = (int32_t) __builtin_neon_vdups_lane_i32((int32x2_t)__rev0, __p1); \ | 53100 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 51789 | __ret; \ | 53101 | __ret = __noswap_vqdmlsl_s16(__rev0, __noswap_vget_high_s16(__rev1), __noswap_vget_high_s16(__rev2)); |
| 51790 | }) | 53102 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 53103 | return __ret; |
| | 53104 | } |
| 51791 | #endif | 53105 | #endif |
| 51792 | | 53106 | |
| 51793 | #define vdupd_lane_s64(__p0, __p1) __extension__ ({ \ | | |
| 51794 | int64_t __ret; \ | | |
| 51795 | int64x1_t __s0 = __p0; \ | | |
| 51796 | __ret = (int64_t) __builtin_neon_vdupd_lane_i64((int64x1_t)__s0, __p1); \ | | |
| 51797 | __ret; \ | | |
| 51798 | }) | | |
| 51799 | #ifdef __LITTLE_ENDIAN__ | 53107 | #ifdef __LITTLE_ENDIAN__ |
| 51800 | #define vduph_lane_s16(__p0, __p1) __extension__ ({ \ | 53108 | #define vqdmlsl_high_lane_s32(__p0_619, __p1_619, __p2_619, __p3_619) __extension__ ({ \ |
| 51801 | int16_t __ret; \ | 53109 | int64x2_t __ret_619; \ |
| 51802 | int16x4_t __s0 = __p0; \ | 53110 | int64x2_t __s0_619 = __p0_619; \ |
| 51803 | __ret = (int16_t) __builtin_neon_vduph_lane_i16((int16x4_t)__s0, __p1); \ | 53111 | int32x4_t __s1_619 = __p1_619; \ |
| 51804 | __ret; \ | 53112 | int32x2_t __s2_619 = __p2_619; \ |
| | 53113 | __ret_619 = vqdmlsl_s32(__s0_619, vget_high_s32(__s1_619), splat_lane_s32(__s2_619, __p3_619)); \ |
| | 53114 | __ret_619; \ |
| 51805 | }) | 53115 | }) |
| 51806 | #else | 53116 | #else |
| 51807 | #define vduph_lane_s16(__p0, __p1) __extension__ ({ \ | 53117 | #define vqdmlsl_high_lane_s32(__p0_620, __p1_620, __p2_620, __p3_620) __extension__ ({ \ |
| 51808 | int16_t __ret; \ | 53118 | int64x2_t __ret_620; \ |
| 51809 | int16x4_t __s0 = __p0; \ | 53119 | int64x2_t __s0_620 = __p0_620; \ |
| 51810 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 53120 | int32x4_t __s1_620 = __p1_620; \ |
| 51811 | __ret = (int16_t) __builtin_neon_vduph_lane_i16((int16x4_t)__rev0, __p1); \ | 53121 | int32x2_t __s2_620 = __p2_620; \ |
| 51812 | __ret; \ | 53122 | int64x2_t __rev0_620; __rev0_620 = __builtin_shufflevector(__s0_620, __s0_620, 1, 0); \ |
| | 53123 | int32x4_t __rev1_620; __rev1_620 = __builtin_shufflevector(__s1_620, __s1_620, 3, 2, 1, 0); \ |
| | 53124 | int32x2_t __rev2_620; __rev2_620 = __builtin_shufflevector(__s2_620, __s2_620, 1, 0); \ |
| | 53125 | __ret_620 = __noswap_vqdmlsl_s32(__rev0_620, __noswap_vget_high_s32(__rev1_620), __noswap_splat_lane_s32(__rev2_620, __p3_620)); \ |
| | 53126 | __ret_620 = __builtin_shufflevector(__ret_620, __ret_620, 1, 0); \ |
| | 53127 | __ret_620; \ |
| 51813 | }) | 53128 | }) |
| 51814 | #endif | 53129 | #endif |
| 51815 | | 53130 | |
| 51816 | #define vdup_lane_p64(__p0_443, __p1_443) __extension__ ({ \ | | |
| 51817 | poly64x1_t __ret_443; \ | | |
| 51818 | poly64x1_t __s0_443 = __p0_443; \ | | |
| 51819 | __ret_443 = splat_lane_p64(__s0_443, __p1_443); \ | | |
| 51820 | __ret_443; \ | | |
| 51821 | }) | | |
| 51822 | #ifdef __LITTLE_ENDIAN__ | 53131 | #ifdef __LITTLE_ENDIAN__ |
| 51823 | #define vdupq_lane_p64(__p0_444, __p1_444) __extension__ ({ \ | 53132 | #define vqdmlsl_high_lane_s16(__p0_621, __p1_621, __p2_621, __p3_621) __extension__ ({ \ |
| 51824 | poly64x2_t __ret_444; \ | 53133 | int32x4_t __ret_621; \ |
| 51825 | poly64x1_t __s0_444 = __p0_444; \ | 53134 | int32x4_t __s0_621 = __p0_621; \ |
| 51826 | __ret_444 = splatq_lane_p64(__s0_444, __p1_444); \ | 53135 | int16x8_t __s1_621 = __p1_621; \ |
| 51827 | __ret_444; \ | 53136 | int16x4_t __s2_621 = __p2_621; \ |
| | 53137 | __ret_621 = vqdmlsl_s16(__s0_621, vget_high_s16(__s1_621), splat_lane_s16(__s2_621, __p3_621)); \ |
| | 53138 | __ret_621; \ |
| 51828 | }) | 53139 | }) |
| 51829 | #else | 53140 | #else |
| 51830 | #define vdupq_lane_p64(__p0_445, __p1_445) __extension__ ({ \ | 53141 | #define vqdmlsl_high_lane_s16(__p0_622, __p1_622, __p2_622, __p3_622) __extension__ ({ \ |
| 51831 | poly64x2_t __ret_445; \ | 53142 | int32x4_t __ret_622; \ |
| 51832 | poly64x1_t __s0_445 = __p0_445; \ | 53143 | int32x4_t __s0_622 = __p0_622; \ |
| 51833 | __ret_445 = __noswap_splatq_lane_p64(__s0_445, __p1_445); \ | 53144 | int16x8_t __s1_622 = __p1_622; \ |
| 51834 | __ret_445 = __builtin_shufflevector(__ret_445, __ret_445, 1, 0); \ | 53145 | int16x4_t __s2_622 = __p2_622; \ |
| 51835 | __ret_445; \ | 53146 | int32x4_t __rev0_622; __rev0_622 = __builtin_shufflevector(__s0_622, __s0_622, 3, 2, 1, 0); \ |
| | 53147 | int16x8_t __rev1_622; __rev1_622 = __builtin_shufflevector(__s1_622, __s1_622, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 53148 | int16x4_t __rev2_622; __rev2_622 = __builtin_shufflevector(__s2_622, __s2_622, 3, 2, 1, 0); \ |
| | 53149 | __ret_622 = __noswap_vqdmlsl_s16(__rev0_622, __noswap_vget_high_s16(__rev1_622), __noswap_splat_lane_s16(__rev2_622, __p3_622)); \ |
| | 53150 | __ret_622 = __builtin_shufflevector(__ret_622, __ret_622, 3, 2, 1, 0); \ |
| | 53151 | __ret_622; \ |
| 51836 | }) | 53152 | }) |
| 51837 | #endif | 53153 | #endif |
| 51838 | | 53154 | |
| 51839 | #ifdef __LITTLE_ENDIAN__ | 53155 | #ifdef __LITTLE_ENDIAN__ |
| 51840 | #define vdupq_lane_f64(__p0_446, __p1_446) __extension__ ({ \ | 53156 | #define vqdmlsl_high_laneq_s32(__p0_623, __p1_623, __p2_623, __p3_623) __extension__ ({ \ |
| 51841 | float64x2_t __ret_446; \ | 53157 | int64x2_t __ret_623; \ |
| 51842 | float64x1_t __s0_446 = __p0_446; \ | 53158 | int64x2_t __s0_623 = __p0_623; \ |
| 51843 | __ret_446 = splatq_lane_f64(__s0_446, __p1_446); \ | 53159 | int32x4_t __s1_623 = __p1_623; \ |
| 51844 | __ret_446; \ | 53160 | int32x4_t __s2_623 = __p2_623; \ |
| | 53161 | __ret_623 = vqdmlsl_s32(__s0_623, vget_high_s32(__s1_623), splat_laneq_s32(__s2_623, __p3_623)); \ |
| | 53162 | __ret_623; \ |
| 51845 | }) | 53163 | }) |
| 51846 | #else | 53164 | #else |
| 51847 | #define vdupq_lane_f64(__p0_447, __p1_447) __extension__ ({ \ | 53165 | #define vqdmlsl_high_laneq_s32(__p0_624, __p1_624, __p2_624, __p3_624) __extension__ ({ \ |
| 51848 | float64x2_t __ret_447; \ | 53166 | int64x2_t __ret_624; \ |
| 51849 | float64x1_t __s0_447 = __p0_447; \ | 53167 | int64x2_t __s0_624 = __p0_624; \ |
| 51850 | __ret_447 = __noswap_splatq_lane_f64(__s0_447, __p1_447); \ | 53168 | int32x4_t __s1_624 = __p1_624; \ |
| 51851 | __ret_447 = __builtin_shufflevector(__ret_447, __ret_447, 1, 0); \ | 53169 | int32x4_t __s2_624 = __p2_624; \ |
| 51852 | __ret_447; \ | 53170 | int64x2_t __rev0_624; __rev0_624 = __builtin_shufflevector(__s0_624, __s0_624, 1, 0); \ |
| | 53171 | int32x4_t __rev1_624; __rev1_624 = __builtin_shufflevector(__s1_624, __s1_624, 3, 2, 1, 0); \ |
| | 53172 | int32x4_t __rev2_624; __rev2_624 = __builtin_shufflevector(__s2_624, __s2_624, 3, 2, 1, 0); \ |
| | 53173 | __ret_624 = __noswap_vqdmlsl_s32(__rev0_624, __noswap_vget_high_s32(__rev1_624), __noswap_splat_laneq_s32(__rev2_624, __p3_624)); \ |
| | 53174 | __ret_624 = __builtin_shufflevector(__ret_624, __ret_624, 1, 0); \ |
| | 53175 | __ret_624; \ |
| 51853 | }) | 53176 | }) |
| 51854 | #endif | 53177 | #endif |
| 51855 | | 53178 | |
| 51856 | #ifdef __LITTLE_ENDIAN__ | 53179 | #ifdef __LITTLE_ENDIAN__ |
| 51857 | #define vdupq_lane_f16(__p0_448, __p1_448) __extension__ ({ \ | 53180 | #define vqdmlsl_high_laneq_s16(__p0_625, __p1_625, __p2_625, __p3_625) __extension__ ({ \ |
| 51858 | float16x8_t __ret_448; \ | 53181 | int32x4_t __ret_625; \ |
| 51859 | float16x4_t __s0_448 = __p0_448; \ | 53182 | int32x4_t __s0_625 = __p0_625; \ |
| 51860 | __ret_448 = splatq_lane_f16(__s0_448, __p1_448); \ | 53183 | int16x8_t __s1_625 = __p1_625; \ |
| 51861 | __ret_448; \ | 53184 | int16x8_t __s2_625 = __p2_625; \ |
| | 53185 | __ret_625 = vqdmlsl_s16(__s0_625, vget_high_s16(__s1_625), splat_laneq_s16(__s2_625, __p3_625)); \ |
| | 53186 | __ret_625; \ |
| 51862 | }) | 53187 | }) |
| 51863 | #else | 53188 | #else |
| 51864 | #define vdupq_lane_f16(__p0_449, __p1_449) __extension__ ({ \ | 53189 | #define vqdmlsl_high_laneq_s16(__p0_626, __p1_626, __p2_626, __p3_626) __extension__ ({ \ |
| 51865 | float16x8_t __ret_449; \ | 53190 | int32x4_t __ret_626; \ |
| 51866 | float16x4_t __s0_449 = __p0_449; \ | 53191 | int32x4_t __s0_626 = __p0_626; \ |
| 51867 | float16x4_t __rev0_449; __rev0_449 = __builtin_shufflevector(__s0_449, __s0_449, 3, 2, 1, 0); \ | 53192 | int16x8_t __s1_626 = __p1_626; \ |
| 51868 | __ret_449 = __noswap_splatq_lane_f16(__rev0_449, __p1_449); \ | 53193 | int16x8_t __s2_626 = __p2_626; \ |
| 51869 | __ret_449 = __builtin_shufflevector(__ret_449, __ret_449, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53194 | int32x4_t __rev0_626; __rev0_626 = __builtin_shufflevector(__s0_626, __s0_626, 3, 2, 1, 0); \ |
| 51870 | __ret_449; \ | 53195 | int16x8_t __rev1_626; __rev1_626 = __builtin_shufflevector(__s1_626, __s1_626, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 53196 | int16x8_t __rev2_626; __rev2_626 = __builtin_shufflevector(__s2_626, __s2_626, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 53197 | __ret_626 = __noswap_vqdmlsl_s16(__rev0_626, __noswap_vget_high_s16(__rev1_626), __noswap_splat_laneq_s16(__rev2_626, __p3_626)); \ |
| | 53198 | __ret_626 = __builtin_shufflevector(__ret_626, __ret_626, 3, 2, 1, 0); \ |
| | 53199 | __ret_626; \ |
| 51871 | }) | 53200 | }) |
| 51872 | #endif | 53201 | #endif |
| 51873 | | 53202 | |
| 51874 | #define vdup_lane_f64(__p0_450, __p1_450) __extension__ ({ \ | | |
| 51875 | float64x1_t __ret_450; \ | | |
| 51876 | float64x1_t __s0_450 = __p0_450; \ | | |
| 51877 | __ret_450 = splat_lane_f64(__s0_450, __p1_450); \ | | |
| 51878 | __ret_450; \ | | |
| 51879 | }) | | |
| 51880 | #ifdef __LITTLE_ENDIAN__ | 53203 | #ifdef __LITTLE_ENDIAN__ |
| 51881 | #define vdup_lane_f16(__p0_451, __p1_451) __extension__ ({ \ | 53204 | __ai int64x2_t vqdmlsl_high_n_s32(int64x2_t __p0, int32x4_t __p1, int32_t __p2) { |
| 51882 | float16x4_t __ret_451; \ | 53205 | int64x2_t __ret; |
| 51883 | float16x4_t __s0_451 = __p0_451; \ | 53206 | __ret = vqdmlsl_n_s32(__p0, vget_high_s32(__p1), __p2); |
| 51884 | __ret_451 = splat_lane_f16(__s0_451, __p1_451); \ | 53207 | return __ret; |
| 51885 | __ret_451; \ | 53208 | } |
| | 53209 | #else |
| | 53210 | __ai int64x2_t vqdmlsl_high_n_s32(int64x2_t __p0, int32x4_t __p1, int32_t __p2) { |
| | 53211 | int64x2_t __ret; |
| | 53212 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 53213 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 53214 | __ret = __noswap_vqdmlsl_n_s32(__rev0, __noswap_vget_high_s32(__rev1), __p2); |
| | 53215 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 53216 | return __ret; |
| | 53217 | } |
| | 53218 | #endif |
| | 53219 | |
| | 53220 | #ifdef __LITTLE_ENDIAN__ |
| | 53221 | __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) { |
| | 53222 | int32x4_t __ret; |
| | 53223 | __ret = vqdmlsl_n_s16(__p0, vget_high_s16(__p1), __p2); |
| | 53224 | return __ret; |
| | 53225 | } |
| | 53226 | #else |
| | 53227 | __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) { |
| | 53228 | int32x4_t __ret; |
| | 53229 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 53230 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 53231 | __ret = __noswap_vqdmlsl_n_s16(__rev0, __noswap_vget_high_s16(__rev1), __p2); |
| | 53232 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 53233 | return __ret; |
| | 53234 | } |
| | 53235 | #endif |
| | 53236 | |
| | 53237 | #ifdef __LITTLE_ENDIAN__ |
| | 53238 | #define vqdmlsls_lane_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 53239 | int64_t __ret; \ |
| | 53240 | int64_t __s0 = __p0; \ |
| | 53241 | int32_t __s1 = __p1; \ |
| | 53242 | int32x2_t __s2 = __p2; \ |
| | 53243 | __ret = (int64_t) __builtin_neon_vqdmlsls_lane_s32(__s0, __s1, __s2, __p3); \ |
| | 53244 | __ret; \ |
| 51886 | }) | 53245 | }) |
| 51887 | #else | 53246 | #else |
| 51888 | #define vdup_lane_f16(__p0_452, __p1_452) __extension__ ({ \ | 53247 | #define vqdmlsls_lane_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 51889 | float16x4_t __ret_452; \ | 53248 | int64_t __ret; \ |
| 51890 | float16x4_t __s0_452 = __p0_452; \ | 53249 | int64_t __s0 = __p0; \ |
| 51891 | float16x4_t __rev0_452; __rev0_452 = __builtin_shufflevector(__s0_452, __s0_452, 3, 2, 1, 0); \ | 53250 | int32_t __s1 = __p1; \ |
| 51892 | __ret_452 = __noswap_splat_lane_f16(__rev0_452, __p1_452); \ | 53251 | int32x2_t __s2 = __p2; \ |
| 51893 | __ret_452 = __builtin_shufflevector(__ret_452, __ret_452, 3, 2, 1, 0); \ | 53252 | int32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ |
| 51894 | __ret_452; \ | 53253 | __ret = (int64_t) __builtin_neon_vqdmlsls_lane_s32(__s0, __s1, __rev2, __p3); \ |
| | 53254 | __ret; \ |
| 51895 | }) | 53255 | }) |
| 51896 | #endif | 53256 | #endif |
| 51897 | | 53257 | |
| 51898 | #ifdef __LITTLE_ENDIAN__ | 53258 | #ifdef __LITTLE_ENDIAN__ |
| 51899 | #define vdupb_laneq_p8(__p0, __p1) __extension__ ({ \ | 53259 | #define vqdmlslh_lane_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 51900 | poly8_t __ret; \ | 53260 | int32_t __ret; \ |
| 51901 | poly8x16_t __s0 = __p0; \ | 53261 | int32_t __s0 = __p0; \ |
| 51902 | __ret = (poly8_t) __builtin_neon_vdupb_laneq_i8((poly8x16_t)__s0, __p1); \ | 53262 | int16_t __s1 = __p1; \ |
| | 53263 | int16x4_t __s2 = __p2; \ |
| | 53264 | __ret = (int32_t) __builtin_neon_vqdmlslh_lane_s16(__s0, __s1, __s2, __p3); \ |
| 51903 | __ret; \ | 53265 | __ret; \ |
| 51904 | }) | 53266 | }) |
| 51905 | #else | 53267 | #else |
| 51906 | #define vdupb_laneq_p8(__p0, __p1) __extension__ ({ \ | 53268 | #define vqdmlslh_lane_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 51907 | poly8_t __ret; \ | 53269 | int32_t __ret; \ |
| 51908 | poly8x16_t __s0 = __p0; \ | 53270 | int32_t __s0 = __p0; \ |
| 51909 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53271 | int16_t __s1 = __p1; \ |
| 51910 | __ret = (poly8_t) __builtin_neon_vdupb_laneq_i8((poly8x16_t)__rev0, __p1); \ | 53272 | int16x4_t __s2 = __p2; \ |
| | 53273 | int16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| | 53274 | __ret = (int32_t) __builtin_neon_vqdmlslh_lane_s16(__s0, __s1, __rev2, __p3); \ |
| 51911 | __ret; \ | 53275 | __ret; \ |
| 51912 | }) | 53276 | }) |
| 51913 | #endif | 53277 | #endif |
| 51914 | | 53278 | |
| 51915 | #ifdef __LITTLE_ENDIAN__ | 53279 | #ifdef __LITTLE_ENDIAN__ |
| 51916 | #define vduph_laneq_p16(__p0, __p1) __extension__ ({ \ | 53280 | #define vqdmlsls_laneq_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 51917 | poly16_t __ret; \ | 53281 | int64_t __ret; \ |
| 51918 | poly16x8_t __s0 = __p0; \ | 53282 | int64_t __s0 = __p0; \ |
| 51919 | __ret = (poly16_t) __builtin_neon_vduph_laneq_i16((poly16x8_t)__s0, __p1); \ | 53283 | int32_t __s1 = __p1; \ |
| | 53284 | int32x4_t __s2 = __p2; \ |
| | 53285 | __ret = (int64_t) __builtin_neon_vqdmlsls_laneq_s32(__s0, __s1, __s2, __p3); \ |
| 51920 | __ret; \ | 53286 | __ret; \ |
| 51921 | }) | 53287 | }) |
| 51922 | #else | 53288 | #else |
| 51923 | #define vduph_laneq_p16(__p0, __p1) __extension__ ({ \ | 53289 | #define vqdmlsls_laneq_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 51924 | poly16_t __ret; \ | 53290 | int64_t __ret; \ |
| 51925 | poly16x8_t __s0 = __p0; \ | 53291 | int64_t __s0 = __p0; \ |
| 51926 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53292 | int32_t __s1 = __p1; \ |
| 51927 | __ret = (poly16_t) __builtin_neon_vduph_laneq_i16((poly16x8_t)__rev0, __p1); \ | 53293 | int32x4_t __s2 = __p2; \ |
| | 53294 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| | 53295 | __ret = (int64_t) __builtin_neon_vqdmlsls_laneq_s32(__s0, __s1, __rev2, __p3); \ |
| 51928 | __ret; \ | 53296 | __ret; \ |
| 51929 | }) | 53297 | }) |
| 51930 | #endif | 53298 | #endif |
| 51931 | | 53299 | |
| 51932 | #ifdef __LITTLE_ENDIAN__ | 53300 | #ifdef __LITTLE_ENDIAN__ |
| 51933 | #define vdupb_laneq_u8(__p0, __p1) __extension__ ({ \ | 53301 | #define vqdmlslh_laneq_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 51934 | uint8_t __ret; \ | 53302 | int32_t __ret; \ |
| 51935 | uint8x16_t __s0 = __p0; \ | 53303 | int32_t __s0 = __p0; \ |
| 51936 | __ret = (uint8_t) __builtin_neon_vdupb_laneq_i8((int8x16_t)__s0, __p1); \ | 53304 | int16_t __s1 = __p1; \ |
| | 53305 | int16x8_t __s2 = __p2; \ |
| | 53306 | __ret = (int32_t) __builtin_neon_vqdmlslh_laneq_s16(__s0, __s1, __s2, __p3); \ |
| 51937 | __ret; \ | 53307 | __ret; \ |
| 51938 | }) | 53308 | }) |
| 51939 | #else | 53309 | #else |
| 51940 | #define vdupb_laneq_u8(__p0, __p1) __extension__ ({ \ | 53310 | #define vqdmlslh_laneq_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 51941 | uint8_t __ret; \ | 53311 | int32_t __ret; \ |
| 51942 | uint8x16_t __s0 = __p0; \ | 53312 | int32_t __s0 = __p0; \ |
| 51943 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53313 | int16_t __s1 = __p1; \ |
| 51944 | __ret = (uint8_t) __builtin_neon_vdupb_laneq_i8((int8x16_t)__rev0, __p1); \ | 53314 | int16x8_t __s2 = __p2; \ |
| | 53315 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 53316 | __ret = (int32_t) __builtin_neon_vqdmlslh_laneq_s16(__s0, __s1, __rev2, __p3); \ |
| 51945 | __ret; \ | 53317 | __ret; \ |
| 51946 | }) | 53318 | }) |
| 51947 | #endif | 53319 | #endif |
| 51948 | | 53320 | |
| 51949 | #ifdef __LITTLE_ENDIAN__ | 53321 | #ifdef __LITTLE_ENDIAN__ |
| 51950 | #define vdups_laneq_u32(__p0, __p1) __extension__ ({ \ | 53322 | #define vqdmlsl_laneq_s32(__p0_627, __p1_627, __p2_627, __p3_627) __extension__ ({ \ |
| 51951 | uint32_t __ret; \ | 53323 | int64x2_t __ret_627; \ |
| 51952 | uint32x4_t __s0 = __p0; \ | 53324 | int64x2_t __s0_627 = __p0_627; \ |
| 51953 | __ret = (uint32_t) __builtin_neon_vdups_laneq_i32((int32x4_t)__s0, __p1); \ | 53325 | int32x2_t __s1_627 = __p1_627; \ |
| | 53326 | int32x4_t __s2_627 = __p2_627; \ |
| | 53327 | __ret_627 = vqdmlsl_s32(__s0_627, __s1_627, splat_laneq_s32(__s2_627, __p3_627)); \ |
| | 53328 | __ret_627; \ |
| | 53329 | }) |
| | 53330 | #else |
| | 53331 | #define vqdmlsl_laneq_s32(__p0_628, __p1_628, __p2_628, __p3_628) __extension__ ({ \ |
| | 53332 | int64x2_t __ret_628; \ |
| | 53333 | int64x2_t __s0_628 = __p0_628; \ |
| | 53334 | int32x2_t __s1_628 = __p1_628; \ |
| | 53335 | int32x4_t __s2_628 = __p2_628; \ |
| | 53336 | int64x2_t __rev0_628; __rev0_628 = __builtin_shufflevector(__s0_628, __s0_628, 1, 0); \ |
| | 53337 | int32x2_t __rev1_628; __rev1_628 = __builtin_shufflevector(__s1_628, __s1_628, 1, 0); \ |
| | 53338 | int32x4_t __rev2_628; __rev2_628 = __builtin_shufflevector(__s2_628, __s2_628, 3, 2, 1, 0); \ |
| | 53339 | __ret_628 = __noswap_vqdmlsl_s32(__rev0_628, __rev1_628, __noswap_splat_laneq_s32(__rev2_628, __p3_628)); \ |
| | 53340 | __ret_628 = __builtin_shufflevector(__ret_628, __ret_628, 1, 0); \ |
| | 53341 | __ret_628; \ |
| | 53342 | }) |
| | 53343 | #endif |
| | 53344 | |
| | 53345 | #ifdef __LITTLE_ENDIAN__ |
| | 53346 | #define vqdmlsl_laneq_s16(__p0_629, __p1_629, __p2_629, __p3_629) __extension__ ({ \ |
| | 53347 | int32x4_t __ret_629; \ |
| | 53348 | int32x4_t __s0_629 = __p0_629; \ |
| | 53349 | int16x4_t __s1_629 = __p1_629; \ |
| | 53350 | int16x8_t __s2_629 = __p2_629; \ |
| | 53351 | __ret_629 = vqdmlsl_s16(__s0_629, __s1_629, splat_laneq_s16(__s2_629, __p3_629)); \ |
| | 53352 | __ret_629; \ |
| | 53353 | }) |
| | 53354 | #else |
| | 53355 | #define vqdmlsl_laneq_s16(__p0_630, __p1_630, __p2_630, __p3_630) __extension__ ({ \ |
| | 53356 | int32x4_t __ret_630; \ |
| | 53357 | int32x4_t __s0_630 = __p0_630; \ |
| | 53358 | int16x4_t __s1_630 = __p1_630; \ |
| | 53359 | int16x8_t __s2_630 = __p2_630; \ |
| | 53360 | int32x4_t __rev0_630; __rev0_630 = __builtin_shufflevector(__s0_630, __s0_630, 3, 2, 1, 0); \ |
| | 53361 | int16x4_t __rev1_630; __rev1_630 = __builtin_shufflevector(__s1_630, __s1_630, 3, 2, 1, 0); \ |
| | 53362 | int16x8_t __rev2_630; __rev2_630 = __builtin_shufflevector(__s2_630, __s2_630, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 53363 | __ret_630 = __noswap_vqdmlsl_s16(__rev0_630, __rev1_630, __noswap_splat_laneq_s16(__rev2_630, __p3_630)); \ |
| | 53364 | __ret_630 = __builtin_shufflevector(__ret_630, __ret_630, 3, 2, 1, 0); \ |
| | 53365 | __ret_630; \ |
| | 53366 | }) |
| | 53367 | #endif |
| | 53368 | |
| | 53369 | __ai int32_t vqdmulhs_s32(int32_t __p0, int32_t __p1) { |
| | 53370 | int32_t __ret; |
| | 53371 | __ret = (int32_t) __builtin_neon_vqdmulhs_s32(__p0, __p1); |
| | 53372 | return __ret; |
| | 53373 | } |
| | 53374 | __ai int16_t vqdmulhh_s16(int16_t __p0, int16_t __p1) { |
| | 53375 | int16_t __ret; |
| | 53376 | __ret = (int16_t) __builtin_neon_vqdmulhh_s16(__p0, __p1); |
| | 53377 | return __ret; |
| | 53378 | } |
| | 53379 | #ifdef __LITTLE_ENDIAN__ |
| | 53380 | #define vqdmulhq_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| | 53381 | int32x4_t __ret; \ |
| | 53382 | int32x4_t __s0 = __p0; \ |
| | 53383 | int32x2_t __s1 = __p1; \ |
| | 53384 | __ret = (int32x4_t) __builtin_neon_vqdmulhq_lane_v((int8x16_t)__s0, (int8x8_t)__s1, __p2, 2); \ |
| 51954 | __ret; \ | 53385 | __ret; \ |
| 51955 | }) | 53386 | }) |
| 51956 | #else | 53387 | #else |
| 51957 | #define vdups_laneq_u32(__p0, __p1) __extension__ ({ \ | 53388 | #define vqdmulhq_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 51958 | uint32_t __ret; \ | 53389 | int32x4_t __ret; \ |
| 51959 | uint32x4_t __s0 = __p0; \ | 53390 | int32x4_t __s0 = __p0; \ |
| 51960 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 53391 | int32x2_t __s1 = __p1; \ |
| 51961 | __ret = (uint32_t) __builtin_neon_vdups_laneq_i32((int32x4_t)__rev0, __p1); \ | 53392 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| | 53393 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| | 53394 | __ret = (int32x4_t) __builtin_neon_vqdmulhq_lane_v((int8x16_t)__rev0, (int8x8_t)__rev1, __p2, 2); \ |
| | 53395 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 51962 | __ret; \ | 53396 | __ret; \ |
| 51963 | }) | 53397 | }) |
| 51964 | #endif | 53398 | #endif |
| 51965 | | 53399 | |
| 51966 | #ifdef __LITTLE_ENDIAN__ | 53400 | #ifdef __LITTLE_ENDIAN__ |
| 51967 | #define vdupd_laneq_u64(__p0, __p1) __extension__ ({ \ | 53401 | #define vqdmulhq_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 51968 | uint64_t __ret; \ | 53402 | int16x8_t __ret; \ |
| 51969 | uint64x2_t __s0 = __p0; \ | 53403 | int16x8_t __s0 = __p0; \ |
| 51970 | __ret = (uint64_t) __builtin_neon_vdupd_laneq_i64((int64x2_t)__s0, __p1); \ | 53404 | int16x4_t __s1 = __p1; \ |
| | 53405 | __ret = (int16x8_t) __builtin_neon_vqdmulhq_lane_v((int8x16_t)__s0, (int8x8_t)__s1, __p2, 1); \ |
| 51971 | __ret; \ | 53406 | __ret; \ |
| 51972 | }) | 53407 | }) |
| 51973 | #else | 53408 | #else |
| 51974 | #define vdupd_laneq_u64(__p0, __p1) __extension__ ({ \ | 53409 | #define vqdmulhq_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 51975 | uint64_t __ret; \ | 53410 | int16x8_t __ret; \ |
| 51976 | uint64x2_t __s0 = __p0; \ | 53411 | int16x8_t __s0 = __p0; \ |
| 51977 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 53412 | int16x4_t __s1 = __p1; \ |
| 51978 | __ret = (uint64_t) __builtin_neon_vdupd_laneq_i64((int64x2_t)__rev0, __p1); \ | 53413 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 53414 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| | 53415 | __ret = (int16x8_t) __builtin_neon_vqdmulhq_lane_v((int8x16_t)__rev0, (int8x8_t)__rev1, __p2, 1); \ |
| | 53416 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51979 | __ret; \ | 53417 | __ret; \ |
| 51980 | }) | 53418 | }) |
| 51981 | #endif | 53419 | #endif |
| 51982 | | 53420 | |
| 51983 | #ifdef __LITTLE_ENDIAN__ | 53421 | #ifdef __LITTLE_ENDIAN__ |
| 51984 | #define vduph_laneq_u16(__p0, __p1) __extension__ ({ \ | 53422 | #define vqdmulh_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 51985 | uint16_t __ret; \ | 53423 | int32x2_t __ret; \ |
| 51986 | uint16x8_t __s0 = __p0; \ | 53424 | int32x2_t __s0 = __p0; \ |
| 51987 | __ret = (uint16_t) __builtin_neon_vduph_laneq_i16((int16x8_t)__s0, __p1); \ | 53425 | int32x2_t __s1 = __p1; \ |
| | 53426 | __ret = (int32x2_t) __builtin_neon_vqdmulh_lane_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 2); \ |
| 51988 | __ret; \ | 53427 | __ret; \ |
| 51989 | }) | 53428 | }) |
| 51990 | #else | 53429 | #else |
| 51991 | #define vduph_laneq_u16(__p0, __p1) __extension__ ({ \ | 53430 | #define vqdmulh_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 51992 | uint16_t __ret; \ | 53431 | int32x2_t __ret; \ |
| 51993 | uint16x8_t __s0 = __p0; \ | 53432 | int32x2_t __s0 = __p0; \ |
| 51994 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53433 | int32x2_t __s1 = __p1; \ |
| 51995 | __ret = (uint16_t) __builtin_neon_vduph_laneq_i16((int16x8_t)__rev0, __p1); \ | 53434 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| | 53435 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| | 53436 | __ret = (int32x2_t) __builtin_neon_vqdmulh_lane_v((int8x8_t)__rev0, (int8x8_t)__rev1, __p2, 2); \ |
| | 53437 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 51996 | __ret; \ | 53438 | __ret; \ |
| 51997 | }) | 53439 | }) |
| 51998 | #endif | 53440 | #endif |
| 51999 | | 53441 | |
| 52000 | #ifdef __LITTLE_ENDIAN__ | 53442 | #ifdef __LITTLE_ENDIAN__ |
| 52001 | #define vdupb_laneq_s8(__p0, __p1) __extension__ ({ \ | 53443 | #define vqdmulh_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 52002 | int8_t __ret; \ | 53444 | int16x4_t __ret; \ |
| 52003 | int8x16_t __s0 = __p0; \ | 53445 | int16x4_t __s0 = __p0; \ |
| 52004 | __ret = (int8_t) __builtin_neon_vdupb_laneq_i8((int8x16_t)__s0, __p1); \ | 53446 | int16x4_t __s1 = __p1; \ |
| | 53447 | __ret = (int16x4_t) __builtin_neon_vqdmulh_lane_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 1); \ |
| 52005 | __ret; \ | 53448 | __ret; \ |
| 52006 | }) | 53449 | }) |
| 52007 | #else | 53450 | #else |
| 52008 | #define vdupb_laneq_s8(__p0, __p1) __extension__ ({ \ | 53451 | #define vqdmulh_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 52009 | int8_t __ret; \ | 53452 | int16x4_t __ret; \ |
| 52010 | int8x16_t __s0 = __p0; \ | 53453 | int16x4_t __s0 = __p0; \ |
| 52011 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53454 | int16x4_t __s1 = __p1; \ |
| 52012 | __ret = (int8_t) __builtin_neon_vdupb_laneq_i8((int8x16_t)__rev0, __p1); \ | 53455 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| | 53456 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| | 53457 | __ret = (int16x4_t) __builtin_neon_vqdmulh_lane_v((int8x8_t)__rev0, (int8x8_t)__rev1, __p2, 1); \ |
| | 53458 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 52013 | __ret; \ | 53459 | __ret; \ |
| 52014 | }) | 53460 | }) |
| 52015 | #endif | 53461 | #endif |
| 52016 | | 53462 | |
| 52017 | #ifdef __LITTLE_ENDIAN__ | 53463 | #ifdef __LITTLE_ENDIAN__ |
| 52018 | #define vdupd_laneq_f64(__p0, __p1) __extension__ ({ \ | 53464 | #define vqdmulhs_lane_s32(__p0_631, __p1_631, __p2_631) __extension__ ({ \ |
| 52019 | float64_t __ret; \ | 53465 | int32_t __ret_631; \ |
| 52020 | float64x2_t __s0 = __p0; \ | 53466 | int32_t __s0_631 = __p0_631; \ |
| 52021 | __ret = (float64_t) __builtin_neon_vdupd_laneq_f64((float64x2_t)__s0, __p1); \ | 53467 | int32x2_t __s1_631 = __p1_631; \ |
| 52022 | __ret; \ | 53468 | __ret_631 = vqdmulhs_s32(__s0_631, vget_lane_s32(__s1_631, __p2_631)); \ |
| | 53469 | __ret_631; \ |
| | 53470 | }) |
| | 53471 | #else |
| | 53472 | #define vqdmulhs_lane_s32(__p0_632, __p1_632, __p2_632) __extension__ ({ \ |
| | 53473 | int32_t __ret_632; \ |
| | 53474 | int32_t __s0_632 = __p0_632; \ |
| | 53475 | int32x2_t __s1_632 = __p1_632; \ |
| | 53476 | int32x2_t __rev1_632; __rev1_632 = __builtin_shufflevector(__s1_632, __s1_632, 1, 0); \ |
| | 53477 | __ret_632 = vqdmulhs_s32(__s0_632, __noswap_vget_lane_s32(__rev1_632, __p2_632)); \ |
| | 53478 | __ret_632; \ |
| | 53479 | }) |
| | 53480 | #endif |
| | 53481 | |
| | 53482 | #ifdef __LITTLE_ENDIAN__ |
| | 53483 | #define vqdmulhh_lane_s16(__p0_633, __p1_633, __p2_633) __extension__ ({ \ |
| | 53484 | int16_t __ret_633; \ |
| | 53485 | int16_t __s0_633 = __p0_633; \ |
| | 53486 | int16x4_t __s1_633 = __p1_633; \ |
| | 53487 | __ret_633 = vqdmulhh_s16(__s0_633, vget_lane_s16(__s1_633, __p2_633)); \ |
| | 53488 | __ret_633; \ |
| | 53489 | }) |
| | 53490 | #else |
| | 53491 | #define vqdmulhh_lane_s16(__p0_634, __p1_634, __p2_634) __extension__ ({ \ |
| | 53492 | int16_t __ret_634; \ |
| | 53493 | int16_t __s0_634 = __p0_634; \ |
| | 53494 | int16x4_t __s1_634 = __p1_634; \ |
| | 53495 | int16x4_t __rev1_634; __rev1_634 = __builtin_shufflevector(__s1_634, __s1_634, 3, 2, 1, 0); \ |
| | 53496 | __ret_634 = vqdmulhh_s16(__s0_634, __noswap_vget_lane_s16(__rev1_634, __p2_634)); \ |
| | 53497 | __ret_634; \ |
| | 53498 | }) |
| | 53499 | #endif |
| | 53500 | |
| | 53501 | #ifdef __LITTLE_ENDIAN__ |
| | 53502 | #define vqdmulhs_laneq_s32(__p0_635, __p1_635, __p2_635) __extension__ ({ \ |
| | 53503 | int32_t __ret_635; \ |
| | 53504 | int32_t __s0_635 = __p0_635; \ |
| | 53505 | int32x4_t __s1_635 = __p1_635; \ |
| | 53506 | __ret_635 = vqdmulhs_s32(__s0_635, vgetq_lane_s32(__s1_635, __p2_635)); \ |
| | 53507 | __ret_635; \ |
| 52023 | }) | 53508 | }) |
| 52024 | #else | 53509 | #else |
| 52025 | #define vdupd_laneq_f64(__p0, __p1) __extension__ ({ \ | 53510 | #define vqdmulhs_laneq_s32(__p0_636, __p1_636, __p2_636) __extension__ ({ \ |
| 52026 | float64_t __ret; \ | 53511 | int32_t __ret_636; \ |
| 52027 | float64x2_t __s0 = __p0; \ | 53512 | int32_t __s0_636 = __p0_636; \ |
| 52028 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 53513 | int32x4_t __s1_636 = __p1_636; \ |
| 52029 | __ret = (float64_t) __builtin_neon_vdupd_laneq_f64((float64x2_t)__rev0, __p1); \ | 53514 | int32x4_t __rev1_636; __rev1_636 = __builtin_shufflevector(__s1_636, __s1_636, 3, 2, 1, 0); \ |
| 52030 | __ret; \ | 53515 | __ret_636 = vqdmulhs_s32(__s0_636, __noswap_vgetq_lane_s32(__rev1_636, __p2_636)); \ |
| | 53516 | __ret_636; \ |
| 52031 | }) | 53517 | }) |
| 52032 | #endif | 53518 | #endif |
| 52033 | | 53519 | |
| 52034 | #ifdef __LITTLE_ENDIAN__ | 53520 | #ifdef __LITTLE_ENDIAN__ |
| 52035 | #define vdups_laneq_f32(__p0, __p1) __extension__ ({ \ | 53521 | #define vqdmulhh_laneq_s16(__p0_637, __p1_637, __p2_637) __extension__ ({ \ |
| 52036 | float32_t __ret; \ | 53522 | int16_t __ret_637; \ |
| 52037 | float32x4_t __s0 = __p0; \ | 53523 | int16_t __s0_637 = __p0_637; \ |
| 52038 | __ret = (float32_t) __builtin_neon_vdups_laneq_f32((float32x4_t)__s0, __p1); \ | 53524 | int16x8_t __s1_637 = __p1_637; \ |
| 52039 | __ret; \ | 53525 | __ret_637 = vqdmulhh_s16(__s0_637, vgetq_lane_s16(__s1_637, __p2_637)); \ |
| | 53526 | __ret_637; \ |
| 52040 | }) | 53527 | }) |
| 52041 | #else | 53528 | #else |
| 52042 | #define vdups_laneq_f32(__p0, __p1) __extension__ ({ \ | 53529 | #define vqdmulhh_laneq_s16(__p0_638, __p1_638, __p2_638) __extension__ ({ \ |
| 52043 | float32_t __ret; \ | 53530 | int16_t __ret_638; \ |
| 52044 | float32x4_t __s0 = __p0; \ | 53531 | int16_t __s0_638 = __p0_638; \ |
| 52045 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 53532 | int16x8_t __s1_638 = __p1_638; \ |
| 52046 | __ret = (float32_t) __builtin_neon_vdups_laneq_f32((float32x4_t)__rev0, __p1); \ | 53533 | int16x8_t __rev1_638; __rev1_638 = __builtin_shufflevector(__s1_638, __s1_638, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52047 | __ret; \ | 53534 | __ret_638 = vqdmulhh_s16(__s0_638, __noswap_vgetq_lane_s16(__rev1_638, __p2_638)); \ |
| | 53535 | __ret_638; \ |
| 52048 | }) | 53536 | }) |
| 52049 | #endif | 53537 | #endif |
| 52050 | | 53538 | |
| 52051 | #ifdef __LITTLE_ENDIAN__ | 53539 | #ifdef __LITTLE_ENDIAN__ |
| 52052 | #define vdups_laneq_s32(__p0, __p1) __extension__ ({ \ | 53540 | #define vqdmulhq_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 52053 | int32_t __ret; \ | 53541 | int32x4_t __ret; \ |
| 52054 | int32x4_t __s0 = __p0; \ | 53542 | int32x4_t __s0 = __p0; \ |
| 52055 | __ret = (int32_t) __builtin_neon_vdups_laneq_i32((int32x4_t)__s0, __p1); \ | 53543 | int32x4_t __s1 = __p1; \ |
| | 53544 | __ret = (int32x4_t) __builtin_neon_vqdmulhq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 34); \ |
| 52056 | __ret; \ | 53545 | __ret; \ |
| 52057 | }) | 53546 | }) |
| 52058 | #else | 53547 | #else |
| 52059 | #define vdups_laneq_s32(__p0, __p1) __extension__ ({ \ | 53548 | #define vqdmulhq_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 52060 | int32_t __ret; \ | 53549 | int32x4_t __ret; \ |
| 52061 | int32x4_t __s0 = __p0; \ | 53550 | int32x4_t __s0 = __p0; \ |
| | 53551 | int32x4_t __s1 = __p1; \ |
| 52062 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 53552 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 52063 | __ret = (int32_t) __builtin_neon_vdups_laneq_i32((int32x4_t)__rev0, __p1); \ | 53553 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| | 53554 | __ret = (int32x4_t) __builtin_neon_vqdmulhq_laneq_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 34); \ |
| | 53555 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 52064 | __ret; \ | 53556 | __ret; \ |
| 52065 | }) | 53557 | }) |
| 52066 | #endif | 53558 | #endif |
| 52067 | | 53559 | |
| 52068 | #ifdef __LITTLE_ENDIAN__ | 53560 | #ifdef __LITTLE_ENDIAN__ |
| 52069 | #define vdupd_laneq_s64(__p0, __p1) __extension__ ({ \ | 53561 | #define vqdmulhq_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 52070 | int64_t __ret; \ | 53562 | int16x8_t __ret; \ |
| 52071 | int64x2_t __s0 = __p0; \ | 53563 | int16x8_t __s0 = __p0; \ |
| 52072 | __ret = (int64_t) __builtin_neon_vdupd_laneq_i64((int64x2_t)__s0, __p1); \ | 53564 | int16x8_t __s1 = __p1; \ |
| | 53565 | __ret = (int16x8_t) __builtin_neon_vqdmulhq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 33); \ |
| 52073 | __ret; \ | 53566 | __ret; \ |
| 52074 | }) | 53567 | }) |
| 52075 | #else | 53568 | #else |
| 52076 | #define vdupd_laneq_s64(__p0, __p1) __extension__ ({ \ | 53569 | #define vqdmulhq_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 52077 | int64_t __ret; \ | 53570 | int16x8_t __ret; \ |
| 52078 | int64x2_t __s0 = __p0; \ | 53571 | int16x8_t __s0 = __p0; \ |
| 52079 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 53572 | int16x8_t __s1 = __p1; \ |
| 52080 | __ret = (int64_t) __builtin_neon_vdupd_laneq_i64((int64x2_t)__rev0, __p1); \ | 53573 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 53574 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 53575 | __ret = (int16x8_t) __builtin_neon_vqdmulhq_laneq_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 33); \ |
| | 53576 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52081 | __ret; \ | 53577 | __ret; \ |
| 52082 | }) | 53578 | }) |
| 52083 | #endif | 53579 | #endif |
| 52084 | | 53580 | |
| 52085 | #ifdef __LITTLE_ENDIAN__ | 53581 | #ifdef __LITTLE_ENDIAN__ |
| 52086 | #define vduph_laneq_s16(__p0, __p1) __extension__ ({ \ | 53582 | #define vqdmulh_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 52087 | int16_t __ret; \ | 53583 | int32x2_t __ret; \ |
| 52088 | int16x8_t __s0 = __p0; \ | 53584 | int32x2_t __s0 = __p0; \ |
| 52089 | __ret = (int16_t) __builtin_neon_vduph_laneq_i16((int16x8_t)__s0, __p1); \ | 53585 | int32x4_t __s1 = __p1; \ |
| | 53586 | __ret = (int32x2_t) __builtin_neon_vqdmulh_laneq_v((int8x8_t)__s0, (int8x16_t)__s1, __p2, 2); \ |
| 52090 | __ret; \ | 53587 | __ret; \ |
| 52091 | }) | 53588 | }) |
| 52092 | #else | 53589 | #else |
| 52093 | #define vduph_laneq_s16(__p0, __p1) __extension__ ({ \ | 53590 | #define vqdmulh_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 52094 | int16_t __ret; \ | 53591 | int32x2_t __ret; \ |
| 52095 | int16x8_t __s0 = __p0; \ | 53592 | int32x2_t __s0 = __p0; \ |
| 52096 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53593 | int32x4_t __s1 = __p1; \ |
| 52097 | __ret = (int16_t) __builtin_neon_vduph_laneq_i16((int16x8_t)__rev0, __p1); \ | 53594 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| | 53595 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| | 53596 | __ret = (int32x2_t) __builtin_neon_vqdmulh_laneq_v((int8x8_t)__rev0, (int8x16_t)__rev1, __p2, 2); \ |
| | 53597 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 52098 | __ret; \ | 53598 | __ret; \ |
| 52099 | }) | 53599 | }) |
| 52100 | #endif | 53600 | #endif |
| 52101 | | 53601 | |
| 52102 | #ifdef __LITTLE_ENDIAN__ | 53602 | #ifdef __LITTLE_ENDIAN__ |
| 52103 | #define vdup_laneq_p8(__p0_453, __p1_453) __extension__ ({ \ | 53603 | #define vqdmulh_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 52104 | poly8x8_t __ret_453; \ | 53604 | int16x4_t __ret; \ |
| 52105 | poly8x16_t __s0_453 = __p0_453; \ | 53605 | int16x4_t __s0 = __p0; \ |
| 52106 | __ret_453 = splat_laneq_p8(__s0_453, __p1_453); \ | 53606 | int16x8_t __s1 = __p1; \ |
| 52107 | __ret_453; \ | 53607 | __ret = (int16x4_t) __builtin_neon_vqdmulh_laneq_v((int8x8_t)__s0, (int8x16_t)__s1, __p2, 1); \ |
| | 53608 | __ret; \ |
| 52108 | }) | 53609 | }) |
| 52109 | #else | 53610 | #else |
| 52110 | #define vdup_laneq_p8(__p0_454, __p1_454) __extension__ ({ \ | 53611 | #define vqdmulh_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 52111 | poly8x8_t __ret_454; \ | 53612 | int16x4_t __ret; \ |
| 52112 | poly8x16_t __s0_454 = __p0_454; \ | 53613 | int16x4_t __s0 = __p0; \ |
| 52113 | poly8x16_t __rev0_454; __rev0_454 = __builtin_shufflevector(__s0_454, __s0_454, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53614 | int16x8_t __s1 = __p1; \ |
| 52114 | __ret_454 = __noswap_splat_laneq_p8(__rev0_454, __p1_454); \ | 53615 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 52115 | __ret_454 = __builtin_shufflevector(__ret_454, __ret_454, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53616 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52116 | __ret_454; \ | 53617 | __ret = (int16x4_t) __builtin_neon_vqdmulh_laneq_v((int8x8_t)__rev0, (int8x16_t)__rev1, __p2, 1); \ |
| | 53618 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 53619 | __ret; \ |
| 52117 | }) | 53620 | }) |
| 52118 | #endif | 53621 | #endif |
| 52119 | | 53622 | |
| | 53623 | __ai int64_t vqdmulls_s32(int32_t __p0, int32_t __p1) { |
| | 53624 | int64_t __ret; |
| | 53625 | __ret = (int64_t) __builtin_neon_vqdmulls_s32(__p0, __p1); |
| | 53626 | return __ret; |
| | 53627 | } |
| | 53628 | __ai int32_t vqdmullh_s16(int16_t __p0, int16_t __p1) { |
| | 53629 | int32_t __ret; |
| | 53630 | __ret = (int32_t) __builtin_neon_vqdmullh_s16(__p0, __p1); |
| | 53631 | return __ret; |
| | 53632 | } |
| 52120 | #ifdef __LITTLE_ENDIAN__ | 53633 | #ifdef __LITTLE_ENDIAN__ |
| 52121 | #define vdup_laneq_p64(__p0_455, __p1_455) __extension__ ({ \ | 53634 | __ai int64x2_t vqdmull_high_s32(int32x4_t __p0, int32x4_t __p1) { |
| 52122 | poly64x1_t __ret_455; \ | 53635 | int64x2_t __ret; |
| 52123 | poly64x2_t __s0_455 = __p0_455; \ | 53636 | __ret = vqdmull_s32(vget_high_s32(__p0), vget_high_s32(__p1)); |
| 52124 | __ret_455 = splat_laneq_p64(__s0_455, __p1_455); \ | 53637 | return __ret; |
| 52125 | __ret_455; \ | 53638 | } |
| 52126 | }) | | |
| 52127 | #else | 53639 | #else |
| 52128 | #define vdup_laneq_p64(__p0_456, __p1_456) __extension__ ({ \ | 53640 | __ai int64x2_t vqdmull_high_s32(int32x4_t __p0, int32x4_t __p1) { |
| 52129 | poly64x1_t __ret_456; \ | 53641 | int64x2_t __ret; |
| 52130 | poly64x2_t __s0_456 = __p0_456; \ | 53642 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 52131 | poly64x2_t __rev0_456; __rev0_456 = __builtin_shufflevector(__s0_456, __s0_456, 1, 0); \ | 53643 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 52132 | __ret_456 = __noswap_splat_laneq_p64(__rev0_456, __p1_456); \ | 53644 | __ret = __noswap_vqdmull_s32(__noswap_vget_high_s32(__rev0), __noswap_vget_high_s32(__rev1)); |
| 52133 | __ret_456; \ | 53645 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 52134 | }) | 53646 | return __ret; |
| | 53647 | } |
| 52135 | #endif | 53648 | #endif |
| 52136 | | 53649 | |
| 52137 | #ifdef __LITTLE_ENDIAN__ | 53650 | #ifdef __LITTLE_ENDIAN__ |
| 52138 | #define vdup_laneq_p16(__p0_457, __p1_457) __extension__ ({ \ | 53651 | __ai int32x4_t vqdmull_high_s16(int16x8_t __p0, int16x8_t __p1) { |
| 52139 | poly16x4_t __ret_457; \ | 53652 | int32x4_t __ret; |
| 52140 | poly16x8_t __s0_457 = __p0_457; \ | 53653 | __ret = vqdmull_s16(vget_high_s16(__p0), vget_high_s16(__p1)); |
| 52141 | __ret_457 = splat_laneq_p16(__s0_457, __p1_457); \ | 53654 | return __ret; |
| 52142 | __ret_457; \ | 53655 | } |
| 52143 | }) | | |
| 52144 | #else | 53656 | #else |
| 52145 | #define vdup_laneq_p16(__p0_458, __p1_458) __extension__ ({ \ | 53657 | __ai int32x4_t vqdmull_high_s16(int16x8_t __p0, int16x8_t __p1) { |
| 52146 | poly16x4_t __ret_458; \ | 53658 | int32x4_t __ret; |
| 52147 | poly16x8_t __s0_458 = __p0_458; \ | 53659 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 52148 | poly16x8_t __rev0_458; __rev0_458 = __builtin_shufflevector(__s0_458, __s0_458, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53660 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 52149 | __ret_458 = __noswap_splat_laneq_p16(__rev0_458, __p1_458); \ | 53661 | __ret = __noswap_vqdmull_s16(__noswap_vget_high_s16(__rev0), __noswap_vget_high_s16(__rev1)); |
| 52150 | __ret_458 = __builtin_shufflevector(__ret_458, __ret_458, 3, 2, 1, 0); \ | 53662 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 52151 | __ret_458; \ | 53663 | return __ret; |
| 52152 | }) | 53664 | } |
| 52153 | #endif | 53665 | #endif |
| 52154 | | 53666 | |
| 52155 | #ifdef __LITTLE_ENDIAN__ | 53667 | #ifdef __LITTLE_ENDIAN__ |
| 52156 | #define vdupq_laneq_p8(__p0_459, __p1_459) __extension__ ({ \ | 53668 | #define vqdmull_high_lane_s32(__p0_639, __p1_639, __p2_639) __extension__ ({ \ |
| 52157 | poly8x16_t __ret_459; \ | 53669 | int64x2_t __ret_639; \ |
| 52158 | poly8x16_t __s0_459 = __p0_459; \ | 53670 | int32x4_t __s0_639 = __p0_639; \ |
| 52159 | __ret_459 = splatq_laneq_p8(__s0_459, __p1_459); \ | 53671 | int32x2_t __s1_639 = __p1_639; \ |
| 52160 | __ret_459; \ | 53672 | __ret_639 = vqdmull_s32(vget_high_s32(__s0_639), splat_lane_s32(__s1_639, __p2_639)); \ |
| | 53673 | __ret_639; \ |
| 52161 | }) | 53674 | }) |
| 52162 | #else | 53675 | #else |
| 52163 | #define vdupq_laneq_p8(__p0_460, __p1_460) __extension__ ({ \ | 53676 | #define vqdmull_high_lane_s32(__p0_640, __p1_640, __p2_640) __extension__ ({ \ |
| 52164 | poly8x16_t __ret_460; \ | 53677 | int64x2_t __ret_640; \ |
| 52165 | poly8x16_t __s0_460 = __p0_460; \ | 53678 | int32x4_t __s0_640 = __p0_640; \ |
| 52166 | poly8x16_t __rev0_460; __rev0_460 = __builtin_shufflevector(__s0_460, __s0_460, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53679 | int32x2_t __s1_640 = __p1_640; \ |
| 52167 | __ret_460 = __noswap_splatq_laneq_p8(__rev0_460, __p1_460); \ | 53680 | int32x4_t __rev0_640; __rev0_640 = __builtin_shufflevector(__s0_640, __s0_640, 3, 2, 1, 0); \ |
| 52168 | __ret_460 = __builtin_shufflevector(__ret_460, __ret_460, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53681 | int32x2_t __rev1_640; __rev1_640 = __builtin_shufflevector(__s1_640, __s1_640, 1, 0); \ |
| 52169 | __ret_460; \ | 53682 | __ret_640 = __noswap_vqdmull_s32(__noswap_vget_high_s32(__rev0_640), __noswap_splat_lane_s32(__rev1_640, __p2_640)); \ |
| | 53683 | __ret_640 = __builtin_shufflevector(__ret_640, __ret_640, 1, 0); \ |
| | 53684 | __ret_640; \ |
| 52170 | }) | 53685 | }) |
| 52171 | #endif | 53686 | #endif |
| 52172 | | 53687 | |
| 52173 | #ifdef __LITTLE_ENDIAN__ | 53688 | #ifdef __LITTLE_ENDIAN__ |
| 52174 | #define vdupq_laneq_p64(__p0_461, __p1_461) __extension__ ({ \ | 53689 | #define vqdmull_high_lane_s16(__p0_641, __p1_641, __p2_641) __extension__ ({ \ |
| 52175 | poly64x2_t __ret_461; \ | 53690 | int32x4_t __ret_641; \ |
| 52176 | poly64x2_t __s0_461 = __p0_461; \ | 53691 | int16x8_t __s0_641 = __p0_641; \ |
| 52177 | __ret_461 = splatq_laneq_p64(__s0_461, __p1_461); \ | 53692 | int16x4_t __s1_641 = __p1_641; \ |
| 52178 | __ret_461; \ | 53693 | __ret_641 = vqdmull_s16(vget_high_s16(__s0_641), splat_lane_s16(__s1_641, __p2_641)); \ |
| | 53694 | __ret_641; \ |
| 52179 | }) | 53695 | }) |
| 52180 | #else | 53696 | #else |
| 52181 | #define vdupq_laneq_p64(__p0_462, __p1_462) __extension__ ({ \ | 53697 | #define vqdmull_high_lane_s16(__p0_642, __p1_642, __p2_642) __extension__ ({ \ |
| 52182 | poly64x2_t __ret_462; \ | 53698 | int32x4_t __ret_642; \ |
| 52183 | poly64x2_t __s0_462 = __p0_462; \ | 53699 | int16x8_t __s0_642 = __p0_642; \ |
| 52184 | poly64x2_t __rev0_462; __rev0_462 = __builtin_shufflevector(__s0_462, __s0_462, 1, 0); \ | 53700 | int16x4_t __s1_642 = __p1_642; \ |
| 52185 | __ret_462 = __noswap_splatq_laneq_p64(__rev0_462, __p1_462); \ | 53701 | int16x8_t __rev0_642; __rev0_642 = __builtin_shufflevector(__s0_642, __s0_642, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52186 | __ret_462 = __builtin_shufflevector(__ret_462, __ret_462, 1, 0); \ | 53702 | int16x4_t __rev1_642; __rev1_642 = __builtin_shufflevector(__s1_642, __s1_642, 3, 2, 1, 0); \ |
| 52187 | __ret_462; \ | 53703 | __ret_642 = __noswap_vqdmull_s16(__noswap_vget_high_s16(__rev0_642), __noswap_splat_lane_s16(__rev1_642, __p2_642)); \ |
| | 53704 | __ret_642 = __builtin_shufflevector(__ret_642, __ret_642, 3, 2, 1, 0); \ |
| | 53705 | __ret_642; \ |
| 52188 | }) | 53706 | }) |
| 52189 | #endif | 53707 | #endif |
| 52190 | | 53708 | |
| 52191 | #ifdef __LITTLE_ENDIAN__ | 53709 | #ifdef __LITTLE_ENDIAN__ |
| 52192 | #define vdupq_laneq_p16(__p0_463, __p1_463) __extension__ ({ \ | 53710 | #define vqdmull_high_laneq_s32(__p0_643, __p1_643, __p2_643) __extension__ ({ \ |
| 52193 | poly16x8_t __ret_463; \ | 53711 | int64x2_t __ret_643; \ |
| 52194 | poly16x8_t __s0_463 = __p0_463; \ | 53712 | int32x4_t __s0_643 = __p0_643; \ |
| 52195 | __ret_463 = splatq_laneq_p16(__s0_463, __p1_463); \ | 53713 | int32x4_t __s1_643 = __p1_643; \ |
| 52196 | __ret_463; \ | 53714 | __ret_643 = vqdmull_s32(vget_high_s32(__s0_643), splat_laneq_s32(__s1_643, __p2_643)); \ |
| | 53715 | __ret_643; \ |
| 52197 | }) | 53716 | }) |
| 52198 | #else | 53717 | #else |
| 52199 | #define vdupq_laneq_p16(__p0_464, __p1_464) __extension__ ({ \ | 53718 | #define vqdmull_high_laneq_s32(__p0_644, __p1_644, __p2_644) __extension__ ({ \ |
| 52200 | poly16x8_t __ret_464; \ | 53719 | int64x2_t __ret_644; \ |
| 52201 | poly16x8_t __s0_464 = __p0_464; \ | 53720 | int32x4_t __s0_644 = __p0_644; \ |
| 52202 | poly16x8_t __rev0_464; __rev0_464 = __builtin_shufflevector(__s0_464, __s0_464, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53721 | int32x4_t __s1_644 = __p1_644; \ |
| 52203 | __ret_464 = __noswap_splatq_laneq_p16(__rev0_464, __p1_464); \ | 53722 | int32x4_t __rev0_644; __rev0_644 = __builtin_shufflevector(__s0_644, __s0_644, 3, 2, 1, 0); \ |
| 52204 | __ret_464 = __builtin_shufflevector(__ret_464, __ret_464, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53723 | int32x4_t __rev1_644; __rev1_644 = __builtin_shufflevector(__s1_644, __s1_644, 3, 2, 1, 0); \ |
| 52205 | __ret_464; \ | 53724 | __ret_644 = __noswap_vqdmull_s32(__noswap_vget_high_s32(__rev0_644), __noswap_splat_laneq_s32(__rev1_644, __p2_644)); \ |
| | 53725 | __ret_644 = __builtin_shufflevector(__ret_644, __ret_644, 1, 0); \ |
| | 53726 | __ret_644; \ |
| 52206 | }) | 53727 | }) |
| 52207 | #endif | 53728 | #endif |
| 52208 | | 53729 | |
| 52209 | #ifdef __LITTLE_ENDIAN__ | 53730 | #ifdef __LITTLE_ENDIAN__ |
| 52210 | #define vdupq_laneq_u8(__p0_465, __p1_465) __extension__ ({ \ | 53731 | #define vqdmull_high_laneq_s16(__p0_645, __p1_645, __p2_645) __extension__ ({ \ |
| 52211 | uint8x16_t __ret_465; \ | 53732 | int32x4_t __ret_645; \ |
| 52212 | uint8x16_t __s0_465 = __p0_465; \ | 53733 | int16x8_t __s0_645 = __p0_645; \ |
| 52213 | __ret_465 = splatq_laneq_u8(__s0_465, __p1_465); \ | 53734 | int16x8_t __s1_645 = __p1_645; \ |
| 52214 | __ret_465; \ | 53735 | __ret_645 = vqdmull_s16(vget_high_s16(__s0_645), splat_laneq_s16(__s1_645, __p2_645)); \ |
| | 53736 | __ret_645; \ |
| 52215 | }) | 53737 | }) |
| 52216 | #else | 53738 | #else |
| 52217 | #define vdupq_laneq_u8(__p0_466, __p1_466) __extension__ ({ \ | 53739 | #define vqdmull_high_laneq_s16(__p0_646, __p1_646, __p2_646) __extension__ ({ \ |
| 52218 | uint8x16_t __ret_466; \ | 53740 | int32x4_t __ret_646; \ |
| 52219 | uint8x16_t __s0_466 = __p0_466; \ | 53741 | int16x8_t __s0_646 = __p0_646; \ |
| 52220 | uint8x16_t __rev0_466; __rev0_466 = __builtin_shufflevector(__s0_466, __s0_466, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53742 | int16x8_t __s1_646 = __p1_646; \ |
| 52221 | __ret_466 = __noswap_splatq_laneq_u8(__rev0_466, __p1_466); \ | 53743 | int16x8_t __rev0_646; __rev0_646 = __builtin_shufflevector(__s0_646, __s0_646, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52222 | __ret_466 = __builtin_shufflevector(__ret_466, __ret_466, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53744 | int16x8_t __rev1_646; __rev1_646 = __builtin_shufflevector(__s1_646, __s1_646, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52223 | __ret_466; \ | 53745 | __ret_646 = __noswap_vqdmull_s16(__noswap_vget_high_s16(__rev0_646), __noswap_splat_laneq_s16(__rev1_646, __p2_646)); \ |
| | 53746 | __ret_646 = __builtin_shufflevector(__ret_646, __ret_646, 3, 2, 1, 0); \ |
| | 53747 | __ret_646; \ |
| 52224 | }) | 53748 | }) |
| 52225 | #endif | 53749 | #endif |
| 52226 | | 53750 | |
| 52227 | #ifdef __LITTLE_ENDIAN__ | 53751 | #ifdef __LITTLE_ENDIAN__ |
| 52228 | #define vdupq_laneq_u32(__p0_467, __p1_467) __extension__ ({ \ | 53752 | __ai int64x2_t vqdmull_high_n_s32(int32x4_t __p0, int32_t __p1) { |
| 52229 | uint32x4_t __ret_467; \ | 53753 | int64x2_t __ret; |
| 52230 | uint32x4_t __s0_467 = __p0_467; \ | 53754 | __ret = vqdmull_n_s32(vget_high_s32(__p0), __p1); |
| 52231 | __ret_467 = splatq_laneq_u32(__s0_467, __p1_467); \ | 53755 | return __ret; |
| 52232 | __ret_467; \ | 53756 | } |
| 52233 | }) | | |
| 52234 | #else | 53757 | #else |
| 52235 | #define vdupq_laneq_u32(__p0_468, __p1_468) __extension__ ({ \ | 53758 | __ai int64x2_t vqdmull_high_n_s32(int32x4_t __p0, int32_t __p1) { |
| 52236 | uint32x4_t __ret_468; \ | 53759 | int64x2_t __ret; |
| 52237 | uint32x4_t __s0_468 = __p0_468; \ | 53760 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 52238 | uint32x4_t __rev0_468; __rev0_468 = __builtin_shufflevector(__s0_468, __s0_468, 3, 2, 1, 0); \ | 53761 | __ret = __noswap_vqdmull_n_s32(__noswap_vget_high_s32(__rev0), __p1); |
| 52239 | __ret_468 = __noswap_splatq_laneq_u32(__rev0_468, __p1_468); \ | 53762 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 52240 | __ret_468 = __builtin_shufflevector(__ret_468, __ret_468, 3, 2, 1, 0); \ | 53763 | return __ret; |
| 52241 | __ret_468; \ | 53764 | } |
| 52242 | }) | | |
| 52243 | #endif | 53765 | #endif |
| 52244 | | 53766 | |
| 52245 | #ifdef __LITTLE_ENDIAN__ | 53767 | #ifdef __LITTLE_ENDIAN__ |
| 52246 | #define vdupq_laneq_u64(__p0_469, __p1_469) __extension__ ({ \ | 53768 | __ai int32x4_t vqdmull_high_n_s16(int16x8_t __p0, int16_t __p1) { |
| 52247 | uint64x2_t __ret_469; \ | 53769 | int32x4_t __ret; |
| 52248 | uint64x2_t __s0_469 = __p0_469; \ | 53770 | __ret = vqdmull_n_s16(vget_high_s16(__p0), __p1); |
| 52249 | __ret_469 = splatq_laneq_u64(__s0_469, __p1_469); \ | 53771 | return __ret; |
| 52250 | __ret_469; \ | 53772 | } |
| 52251 | }) | | |
| 52252 | #else | 53773 | #else |
| 52253 | #define vdupq_laneq_u64(__p0_470, __p1_470) __extension__ ({ \ | 53774 | __ai int32x4_t vqdmull_high_n_s16(int16x8_t __p0, int16_t __p1) { |
| 52254 | uint64x2_t __ret_470; \ | 53775 | int32x4_t __ret; |
| 52255 | uint64x2_t __s0_470 = __p0_470; \ | 53776 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 52256 | uint64x2_t __rev0_470; __rev0_470 = __builtin_shufflevector(__s0_470, __s0_470, 1, 0); \ | 53777 | __ret = __noswap_vqdmull_n_s16(__noswap_vget_high_s16(__rev0), __p1); |
| 52257 | __ret_470 = __noswap_splatq_laneq_u64(__rev0_470, __p1_470); \ | 53778 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 52258 | __ret_470 = __builtin_shufflevector(__ret_470, __ret_470, 1, 0); \ | 53779 | return __ret; |
| 52259 | __ret_470; \ | 53780 | } |
| 52260 | }) | | |
| 52261 | #endif | 53781 | #endif |
| 52262 | | 53782 | |
| 52263 | #ifdef __LITTLE_ENDIAN__ | 53783 | #ifdef __LITTLE_ENDIAN__ |
| 52264 | #define vdupq_laneq_u16(__p0_471, __p1_471) __extension__ ({ \ | 53784 | #define vqdmulls_lane_s32(__p0_647, __p1_647, __p2_647) __extension__ ({ \ |
| 52265 | uint16x8_t __ret_471; \ | 53785 | int64_t __ret_647; \ |
| 52266 | uint16x8_t __s0_471 = __p0_471; \ | 53786 | int32_t __s0_647 = __p0_647; \ |
| 52267 | __ret_471 = splatq_laneq_u16(__s0_471, __p1_471); \ | 53787 | int32x2_t __s1_647 = __p1_647; \ |
| 52268 | __ret_471; \ | 53788 | __ret_647 = vqdmulls_s32(__s0_647, vget_lane_s32(__s1_647, __p2_647)); \ |
| | 53789 | __ret_647; \ |
| 52269 | }) | 53790 | }) |
| 52270 | #else | 53791 | #else |
| 52271 | #define vdupq_laneq_u16(__p0_472, __p1_472) __extension__ ({ \ | 53792 | #define vqdmulls_lane_s32(__p0_648, __p1_648, __p2_648) __extension__ ({ \ |
| 52272 | uint16x8_t __ret_472; \ | 53793 | int64_t __ret_648; \ |
| 52273 | uint16x8_t __s0_472 = __p0_472; \ | 53794 | int32_t __s0_648 = __p0_648; \ |
| 52274 | uint16x8_t __rev0_472; __rev0_472 = __builtin_shufflevector(__s0_472, __s0_472, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53795 | int32x2_t __s1_648 = __p1_648; \ |
| 52275 | __ret_472 = __noswap_splatq_laneq_u16(__rev0_472, __p1_472); \ | 53796 | int32x2_t __rev1_648; __rev1_648 = __builtin_shufflevector(__s1_648, __s1_648, 1, 0); \ |
| 52276 | __ret_472 = __builtin_shufflevector(__ret_472, __ret_472, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53797 | __ret_648 = vqdmulls_s32(__s0_648, __noswap_vget_lane_s32(__rev1_648, __p2_648)); \ |
| 52277 | __ret_472; \ | 53798 | __ret_648; \ |
| 52278 | }) | 53799 | }) |
| 52279 | #endif | 53800 | #endif |
| 52280 | | 53801 | |
| 52281 | #ifdef __LITTLE_ENDIAN__ | 53802 | #ifdef __LITTLE_ENDIAN__ |
| 52282 | #define vdupq_laneq_s8(__p0_473, __p1_473) __extension__ ({ \ | 53803 | #define vqdmullh_lane_s16(__p0_649, __p1_649, __p2_649) __extension__ ({ \ |
| 52283 | int8x16_t __ret_473; \ | 53804 | int32_t __ret_649; \ |
| 52284 | int8x16_t __s0_473 = __p0_473; \ | 53805 | int16_t __s0_649 = __p0_649; \ |
| 52285 | __ret_473 = splatq_laneq_s8(__s0_473, __p1_473); \ | 53806 | int16x4_t __s1_649 = __p1_649; \ |
| 52286 | __ret_473; \ | 53807 | __ret_649 = vqdmullh_s16(__s0_649, vget_lane_s16(__s1_649, __p2_649)); \ |
| | 53808 | __ret_649; \ |
| 52287 | }) | 53809 | }) |
| 52288 | #else | 53810 | #else |
| 52289 | #define vdupq_laneq_s8(__p0_474, __p1_474) __extension__ ({ \ | 53811 | #define vqdmullh_lane_s16(__p0_650, __p1_650, __p2_650) __extension__ ({ \ |
| 52290 | int8x16_t __ret_474; \ | 53812 | int32_t __ret_650; \ |
| 52291 | int8x16_t __s0_474 = __p0_474; \ | 53813 | int16_t __s0_650 = __p0_650; \ |
| 52292 | int8x16_t __rev0_474; __rev0_474 = __builtin_shufflevector(__s0_474, __s0_474, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53814 | int16x4_t __s1_650 = __p1_650; \ |
| 52293 | __ret_474 = __noswap_splatq_laneq_s8(__rev0_474, __p1_474); \ | 53815 | int16x4_t __rev1_650; __rev1_650 = __builtin_shufflevector(__s1_650, __s1_650, 3, 2, 1, 0); \ |
| 52294 | __ret_474 = __builtin_shufflevector(__ret_474, __ret_474, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53816 | __ret_650 = vqdmullh_s16(__s0_650, __noswap_vget_lane_s16(__rev1_650, __p2_650)); \ |
| 52295 | __ret_474; \ | 53817 | __ret_650; \ |
| 52296 | }) | 53818 | }) |
| 52297 | #endif | 53819 | #endif |
| 52298 | | 53820 | |
| 52299 | #ifdef __LITTLE_ENDIAN__ | 53821 | #ifdef __LITTLE_ENDIAN__ |
| 52300 | #define vdupq_laneq_f64(__p0_475, __p1_475) __extension__ ({ \ | 53822 | #define vqdmulls_laneq_s32(__p0_651, __p1_651, __p2_651) __extension__ ({ \ |
| 52301 | float64x2_t __ret_475; \ | 53823 | int64_t __ret_651; \ |
| 52302 | float64x2_t __s0_475 = __p0_475; \ | 53824 | int32_t __s0_651 = __p0_651; \ |
| 52303 | __ret_475 = splatq_laneq_f64(__s0_475, __p1_475); \ | 53825 | int32x4_t __s1_651 = __p1_651; \ |
| 52304 | __ret_475; \ | 53826 | __ret_651 = vqdmulls_s32(__s0_651, vgetq_lane_s32(__s1_651, __p2_651)); \ |
| | 53827 | __ret_651; \ |
| 52305 | }) | 53828 | }) |
| 52306 | #else | 53829 | #else |
| 52307 | #define vdupq_laneq_f64(__p0_476, __p1_476) __extension__ ({ \ | 53830 | #define vqdmulls_laneq_s32(__p0_652, __p1_652, __p2_652) __extension__ ({ \ |
| 52308 | float64x2_t __ret_476; \ | 53831 | int64_t __ret_652; \ |
| 52309 | float64x2_t __s0_476 = __p0_476; \ | 53832 | int32_t __s0_652 = __p0_652; \ |
| 52310 | float64x2_t __rev0_476; __rev0_476 = __builtin_shufflevector(__s0_476, __s0_476, 1, 0); \ | 53833 | int32x4_t __s1_652 = __p1_652; \ |
| 52311 | __ret_476 = __noswap_splatq_laneq_f64(__rev0_476, __p1_476); \ | 53834 | int32x4_t __rev1_652; __rev1_652 = __builtin_shufflevector(__s1_652, __s1_652, 3, 2, 1, 0); \ |
| 52312 | __ret_476 = __builtin_shufflevector(__ret_476, __ret_476, 1, 0); \ | 53835 | __ret_652 = vqdmulls_s32(__s0_652, __noswap_vgetq_lane_s32(__rev1_652, __p2_652)); \ |
| 52313 | __ret_476; \ | 53836 | __ret_652; \ |
| 52314 | }) | 53837 | }) |
| 52315 | #endif | 53838 | #endif |
| 52316 | | 53839 | |
| 52317 | #ifdef __LITTLE_ENDIAN__ | 53840 | #ifdef __LITTLE_ENDIAN__ |
| 52318 | #define vdupq_laneq_f32(__p0_477, __p1_477) __extension__ ({ \ | 53841 | #define vqdmullh_laneq_s16(__p0_653, __p1_653, __p2_653) __extension__ ({ \ |
| 52319 | float32x4_t __ret_477; \ | 53842 | int32_t __ret_653; \ |
| 52320 | float32x4_t __s0_477 = __p0_477; \ | 53843 | int16_t __s0_653 = __p0_653; \ |
| 52321 | __ret_477 = splatq_laneq_f32(__s0_477, __p1_477); \ | 53844 | int16x8_t __s1_653 = __p1_653; \ |
| 52322 | __ret_477; \ | 53845 | __ret_653 = vqdmullh_s16(__s0_653, vgetq_lane_s16(__s1_653, __p2_653)); \ |
| | 53846 | __ret_653; \ |
| 52323 | }) | 53847 | }) |
| 52324 | #else | 53848 | #else |
| 52325 | #define vdupq_laneq_f32(__p0_478, __p1_478) __extension__ ({ \ | 53849 | #define vqdmullh_laneq_s16(__p0_654, __p1_654, __p2_654) __extension__ ({ \ |
| 52326 | float32x4_t __ret_478; \ | 53850 | int32_t __ret_654; \ |
| 52327 | float32x4_t __s0_478 = __p0_478; \ | 53851 | int16_t __s0_654 = __p0_654; \ |
| 52328 | float32x4_t __rev0_478; __rev0_478 = __builtin_shufflevector(__s0_478, __s0_478, 3, 2, 1, 0); \ | 53852 | int16x8_t __s1_654 = __p1_654; \ |
| 52329 | __ret_478 = __noswap_splatq_laneq_f32(__rev0_478, __p1_478); \ | 53853 | int16x8_t __rev1_654; __rev1_654 = __builtin_shufflevector(__s1_654, __s1_654, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52330 | __ret_478 = __builtin_shufflevector(__ret_478, __ret_478, 3, 2, 1, 0); \ | 53854 | __ret_654 = vqdmullh_s16(__s0_654, __noswap_vgetq_lane_s16(__rev1_654, __p2_654)); \ |
| 52331 | __ret_478; \ | 53855 | __ret_654; \ |
| 52332 | }) | 53856 | }) |
| 52333 | #endif | 53857 | #endif |
| 52334 | | 53858 | |
| 52335 | #ifdef __LITTLE_ENDIAN__ | 53859 | #ifdef __LITTLE_ENDIAN__ |
| 52336 | #define vdupq_laneq_f16(__p0_479, __p1_479) __extension__ ({ \ | 53860 | #define vqdmull_laneq_s32(__p0_655, __p1_655, __p2_655) __extension__ ({ \ |
| 52337 | float16x8_t __ret_479; \ | 53861 | int64x2_t __ret_655; \ |
| 52338 | float16x8_t __s0_479 = __p0_479; \ | 53862 | int32x2_t __s0_655 = __p0_655; \ |
| 52339 | __ret_479 = splatq_laneq_f16(__s0_479, __p1_479); \ | 53863 | int32x4_t __s1_655 = __p1_655; \ |
| 52340 | __ret_479; \ | 53864 | __ret_655 = vqdmull_s32(__s0_655, splat_laneq_s32(__s1_655, __p2_655)); \ |
| | 53865 | __ret_655; \ |
| 52341 | }) | 53866 | }) |
| 52342 | #else | 53867 | #else |
| 52343 | #define vdupq_laneq_f16(__p0_480, __p1_480) __extension__ ({ \ | 53868 | #define vqdmull_laneq_s32(__p0_656, __p1_656, __p2_656) __extension__ ({ \ |
| 52344 | float16x8_t __ret_480; \ | 53869 | int64x2_t __ret_656; \ |
| 52345 | float16x8_t __s0_480 = __p0_480; \ | 53870 | int32x2_t __s0_656 = __p0_656; \ |
| 52346 | float16x8_t __rev0_480; __rev0_480 = __builtin_shufflevector(__s0_480, __s0_480, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53871 | int32x4_t __s1_656 = __p1_656; \ |
| 52347 | __ret_480 = __noswap_splatq_laneq_f16(__rev0_480, __p1_480); \ | 53872 | int32x2_t __rev0_656; __rev0_656 = __builtin_shufflevector(__s0_656, __s0_656, 1, 0); \ |
| 52348 | __ret_480 = __builtin_shufflevector(__ret_480, __ret_480, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53873 | int32x4_t __rev1_656; __rev1_656 = __builtin_shufflevector(__s1_656, __s1_656, 3, 2, 1, 0); \ |
| 52349 | __ret_480; \ | 53874 | __ret_656 = __noswap_vqdmull_s32(__rev0_656, __noswap_splat_laneq_s32(__rev1_656, __p2_656)); \ |
| | 53875 | __ret_656 = __builtin_shufflevector(__ret_656, __ret_656, 1, 0); \ |
| | 53876 | __ret_656; \ |
| 52350 | }) | 53877 | }) |
| 52351 | #endif | 53878 | #endif |
| 52352 | | 53879 | |
| 52353 | #ifdef __LITTLE_ENDIAN__ | 53880 | #ifdef __LITTLE_ENDIAN__ |
| 52354 | #define vdupq_laneq_s32(__p0_481, __p1_481) __extension__ ({ \ | 53881 | #define vqdmull_laneq_s16(__p0_657, __p1_657, __p2_657) __extension__ ({ \ |
| 52355 | int32x4_t __ret_481; \ | 53882 | int32x4_t __ret_657; \ |
| 52356 | int32x4_t __s0_481 = __p0_481; \ | 53883 | int16x4_t __s0_657 = __p0_657; \ |
| 52357 | __ret_481 = splatq_laneq_s32(__s0_481, __p1_481); \ | 53884 | int16x8_t __s1_657 = __p1_657; \ |
| 52358 | __ret_481; \ | 53885 | __ret_657 = vqdmull_s16(__s0_657, splat_laneq_s16(__s1_657, __p2_657)); \ |
| | 53886 | __ret_657; \ |
| 52359 | }) | 53887 | }) |
| 52360 | #else | 53888 | #else |
| 52361 | #define vdupq_laneq_s32(__p0_482, __p1_482) __extension__ ({ \ | 53889 | #define vqdmull_laneq_s16(__p0_658, __p1_658, __p2_658) __extension__ ({ \ |
| 52362 | int32x4_t __ret_482; \ | 53890 | int32x4_t __ret_658; \ |
| 52363 | int32x4_t __s0_482 = __p0_482; \ | 53891 | int16x4_t __s0_658 = __p0_658; \ |
| 52364 | int32x4_t __rev0_482; __rev0_482 = __builtin_shufflevector(__s0_482, __s0_482, 3, 2, 1, 0); \ | 53892 | int16x8_t __s1_658 = __p1_658; \ |
| 52365 | __ret_482 = __noswap_splatq_laneq_s32(__rev0_482, __p1_482); \ | 53893 | int16x4_t __rev0_658; __rev0_658 = __builtin_shufflevector(__s0_658, __s0_658, 3, 2, 1, 0); \ |
| 52366 | __ret_482 = __builtin_shufflevector(__ret_482, __ret_482, 3, 2, 1, 0); \ | 53894 | int16x8_t __rev1_658; __rev1_658 = __builtin_shufflevector(__s1_658, __s1_658, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52367 | __ret_482; \ | 53895 | __ret_658 = __noswap_vqdmull_s16(__rev0_658, __noswap_splat_laneq_s16(__rev1_658, __p2_658)); \ |
| | 53896 | __ret_658 = __builtin_shufflevector(__ret_658, __ret_658, 3, 2, 1, 0); \ |
| | 53897 | __ret_658; \ |
| 52368 | }) | 53898 | }) |
| 52369 | #endif | 53899 | #endif |
| 52370 | | 53900 | |
| | 53901 | __ai int16_t vqmovns_s32(int32_t __p0) { |
| | 53902 | int16_t __ret; |
| | 53903 | __ret = (int16_t) __builtin_neon_vqmovns_s32(__p0); |
| | 53904 | return __ret; |
| | 53905 | } |
| | 53906 | __ai int32_t vqmovnd_s64(int64_t __p0) { |
| | 53907 | int32_t __ret; |
| | 53908 | __ret = (int32_t) __builtin_neon_vqmovnd_s64(__p0); |
| | 53909 | return __ret; |
| | 53910 | } |
| | 53911 | __ai int8_t vqmovnh_s16(int16_t __p0) { |
| | 53912 | int8_t __ret; |
| | 53913 | __ret = (int8_t) __builtin_neon_vqmovnh_s16(__p0); |
| | 53914 | return __ret; |
| | 53915 | } |
| | 53916 | __ai uint16_t vqmovns_u32(uint32_t __p0) { |
| | 53917 | uint16_t __ret; |
| | 53918 | __ret = (uint16_t) __builtin_neon_vqmovns_u32(__p0); |
| | 53919 | return __ret; |
| | 53920 | } |
| | 53921 | __ai uint32_t vqmovnd_u64(uint64_t __p0) { |
| | 53922 | uint32_t __ret; |
| | 53923 | __ret = (uint32_t) __builtin_neon_vqmovnd_u64(__p0); |
| | 53924 | return __ret; |
| | 53925 | } |
| | 53926 | __ai uint8_t vqmovnh_u16(uint16_t __p0) { |
| | 53927 | uint8_t __ret; |
| | 53928 | __ret = (uint8_t) __builtin_neon_vqmovnh_u16(__p0); |
| | 53929 | return __ret; |
| | 53930 | } |
| 52371 | #ifdef __LITTLE_ENDIAN__ | 53931 | #ifdef __LITTLE_ENDIAN__ |
| 52372 | #define vdupq_laneq_s64(__p0_483, __p1_483) __extension__ ({ \ | 53932 | __ai uint16x8_t vqmovn_high_u32(uint16x4_t __p0, uint32x4_t __p1) { |
| 52373 | int64x2_t __ret_483; \ | 53933 | uint16x8_t __ret; |
| 52374 | int64x2_t __s0_483 = __p0_483; \ | 53934 | __ret = vcombine_u16(__p0, vqmovn_u32(__p1)); |
| 52375 | __ret_483 = splatq_laneq_s64(__s0_483, __p1_483); \ | 53935 | return __ret; |
| 52376 | __ret_483; \ | 53936 | } |
| 52377 | }) | | |
| 52378 | #else | 53937 | #else |
| 52379 | #define vdupq_laneq_s64(__p0_484, __p1_484) __extension__ ({ \ | 53938 | __ai uint16x8_t vqmovn_high_u32(uint16x4_t __p0, uint32x4_t __p1) { |
| 52380 | int64x2_t __ret_484; \ | 53939 | uint16x8_t __ret; |
| 52381 | int64x2_t __s0_484 = __p0_484; \ | 53940 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 52382 | int64x2_t __rev0_484; __rev0_484 = __builtin_shufflevector(__s0_484, __s0_484, 1, 0); \ | 53941 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 52383 | __ret_484 = __noswap_splatq_laneq_s64(__rev0_484, __p1_484); \ | 53942 | __ret = __noswap_vcombine_u16(__rev0, __noswap_vqmovn_u32(__rev1)); |
| 52384 | __ret_484 = __builtin_shufflevector(__ret_484, __ret_484, 1, 0); \ | 53943 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 52385 | __ret_484; \ | 53944 | return __ret; |
| 52386 | }) | 53945 | } |
| 52387 | #endif | 53946 | #endif |
| 52388 | | 53947 | |
| 52389 | #ifdef __LITTLE_ENDIAN__ | 53948 | #ifdef __LITTLE_ENDIAN__ |
| 52390 | #define vdupq_laneq_s16(__p0_485, __p1_485) __extension__ ({ \ | 53949 | __ai uint32x4_t vqmovn_high_u64(uint32x2_t __p0, uint64x2_t __p1) { |
| 52391 | int16x8_t __ret_485; \ | 53950 | uint32x4_t __ret; |
| 52392 | int16x8_t __s0_485 = __p0_485; \ | 53951 | __ret = vcombine_u32(__p0, vqmovn_u64(__p1)); |
| 52393 | __ret_485 = splatq_laneq_s16(__s0_485, __p1_485); \ | 53952 | return __ret; |
| 52394 | __ret_485; \ | 53953 | } |
| 52395 | }) | | |
| 52396 | #else | 53954 | #else |
| 52397 | #define vdupq_laneq_s16(__p0_486, __p1_486) __extension__ ({ \ | 53955 | __ai uint32x4_t vqmovn_high_u64(uint32x2_t __p0, uint64x2_t __p1) { |
| 52398 | int16x8_t __ret_486; \ | 53956 | uint32x4_t __ret; |
| 52399 | int16x8_t __s0_486 = __p0_486; \ | 53957 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 52400 | int16x8_t __rev0_486; __rev0_486 = __builtin_shufflevector(__s0_486, __s0_486, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53958 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 52401 | __ret_486 = __noswap_splatq_laneq_s16(__rev0_486, __p1_486); \ | 53959 | __ret = __noswap_vcombine_u32(__rev0, __noswap_vqmovn_u64(__rev1)); |
| 52402 | __ret_486 = __builtin_shufflevector(__ret_486, __ret_486, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53960 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 52403 | __ret_486; \ | 53961 | return __ret; |
| 52404 | }) | 53962 | } |
| 52405 | #endif | 53963 | #endif |
| 52406 | | 53964 | |
| 52407 | #ifdef __LITTLE_ENDIAN__ | 53965 | #ifdef __LITTLE_ENDIAN__ |
| 52408 | #define vdup_laneq_u8(__p0_487, __p1_487) __extension__ ({ \ | 53966 | __ai uint8x16_t vqmovn_high_u16(uint8x8_t __p0, uint16x8_t __p1) { |
| 52409 | uint8x8_t __ret_487; \ | 53967 | uint8x16_t __ret; |
| 52410 | uint8x16_t __s0_487 = __p0_487; \ | 53968 | __ret = vcombine_u8(__p0, vqmovn_u16(__p1)); |
| 52411 | __ret_487 = splat_laneq_u8(__s0_487, __p1_487); \ | 53969 | return __ret; |
| 52412 | __ret_487; \ | 53970 | } |
| 52413 | }) | | |
| 52414 | #else | 53971 | #else |
| 52415 | #define vdup_laneq_u8(__p0_488, __p1_488) __extension__ ({ \ | 53972 | __ai uint8x16_t vqmovn_high_u16(uint8x8_t __p0, uint16x8_t __p1) { |
| 52416 | uint8x8_t __ret_488; \ | 53973 | uint8x16_t __ret; |
| 52417 | uint8x16_t __s0_488 = __p0_488; \ | 53974 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 52418 | uint8x16_t __rev0_488; __rev0_488 = __builtin_shufflevector(__s0_488, __s0_488, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53975 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 52419 | __ret_488 = __noswap_splat_laneq_u8(__rev0_488, __p1_488); \ | 53976 | __ret = __noswap_vcombine_u8(__rev0, __noswap_vqmovn_u16(__rev1)); |
| 52420 | __ret_488 = __builtin_shufflevector(__ret_488, __ret_488, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53977 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 52421 | __ret_488; \ | 53978 | return __ret; |
| 52422 | }) | 53979 | } |
| 52423 | #endif | 53980 | #endif |
| 52424 | | 53981 | |
| 52425 | #ifdef __LITTLE_ENDIAN__ | 53982 | #ifdef __LITTLE_ENDIAN__ |
| 52426 | #define vdup_laneq_u32(__p0_489, __p1_489) __extension__ ({ \ | 53983 | __ai int16x8_t vqmovn_high_s32(int16x4_t __p0, int32x4_t __p1) { |
| 52427 | uint32x2_t __ret_489; \ | 53984 | int16x8_t __ret; |
| 52428 | uint32x4_t __s0_489 = __p0_489; \ | 53985 | __ret = vcombine_s16(__p0, vqmovn_s32(__p1)); |
| 52429 | __ret_489 = splat_laneq_u32(__s0_489, __p1_489); \ | 53986 | return __ret; |
| 52430 | __ret_489; \ | 53987 | } |
| 52431 | }) | | |
| 52432 | #else | 53988 | #else |
| 52433 | #define vdup_laneq_u32(__p0_490, __p1_490) __extension__ ({ \ | 53989 | __ai int16x8_t vqmovn_high_s32(int16x4_t __p0, int32x4_t __p1) { |
| 52434 | uint32x2_t __ret_490; \ | 53990 | int16x8_t __ret; |
| 52435 | uint32x4_t __s0_490 = __p0_490; \ | 53991 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 52436 | uint32x4_t __rev0_490; __rev0_490 = __builtin_shufflevector(__s0_490, __s0_490, 3, 2, 1, 0); \ | 53992 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 52437 | __ret_490 = __noswap_splat_laneq_u32(__rev0_490, __p1_490); \ | 53993 | __ret = __noswap_vcombine_s16(__rev0, __noswap_vqmovn_s32(__rev1)); |
| 52438 | __ret_490 = __builtin_shufflevector(__ret_490, __ret_490, 1, 0); \ | 53994 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 52439 | __ret_490; \ | 53995 | return __ret; |
| 52440 | }) | 53996 | } |
| 52441 | #endif | 53997 | #endif |
| 52442 | | 53998 | |
| 52443 | #ifdef __LITTLE_ENDIAN__ | 53999 | #ifdef __LITTLE_ENDIAN__ |
| 52444 | #define vdup_laneq_u64(__p0_491, __p1_491) __extension__ ({ \ | 54000 | __ai int32x4_t vqmovn_high_s64(int32x2_t __p0, int64x2_t __p1) { |
| 52445 | uint64x1_t __ret_491; \ | 54001 | int32x4_t __ret; |
| 52446 | uint64x2_t __s0_491 = __p0_491; \ | 54002 | __ret = vcombine_s32(__p0, vqmovn_s64(__p1)); |
| 52447 | __ret_491 = splat_laneq_u64(__s0_491, __p1_491); \ | 54003 | return __ret; |
| 52448 | __ret_491; \ | 54004 | } |
| 52449 | }) | | |
| 52450 | #else | 54005 | #else |
| 52451 | #define vdup_laneq_u64(__p0_492, __p1_492) __extension__ ({ \ | 54006 | __ai int32x4_t vqmovn_high_s64(int32x2_t __p0, int64x2_t __p1) { |
| 52452 | uint64x1_t __ret_492; \ | 54007 | int32x4_t __ret; |
| 52453 | uint64x2_t __s0_492 = __p0_492; \ | 54008 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 52454 | uint64x2_t __rev0_492; __rev0_492 = __builtin_shufflevector(__s0_492, __s0_492, 1, 0); \ | 54009 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 52455 | __ret_492 = __noswap_splat_laneq_u64(__rev0_492, __p1_492); \ | 54010 | __ret = __noswap_vcombine_s32(__rev0, __noswap_vqmovn_s64(__rev1)); |
| 52456 | __ret_492; \ | 54011 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 52457 | }) | 54012 | return __ret; |
| | 54013 | } |
| 52458 | #endif | 54014 | #endif |
| 52459 | | 54015 | |
| 52460 | #ifdef __LITTLE_ENDIAN__ | 54016 | #ifdef __LITTLE_ENDIAN__ |
| 52461 | #define vdup_laneq_u16(__p0_493, __p1_493) __extension__ ({ \ | 54017 | __ai int8x16_t vqmovn_high_s16(int8x8_t __p0, int16x8_t __p1) { |
| 52462 | uint16x4_t __ret_493; \ | 54018 | int8x16_t __ret; |
| 52463 | uint16x8_t __s0_493 = __p0_493; \ | 54019 | __ret = vcombine_s8(__p0, vqmovn_s16(__p1)); |
| 52464 | __ret_493 = splat_laneq_u16(__s0_493, __p1_493); \ | 54020 | return __ret; |
| 52465 | __ret_493; \ | 54021 | } |
| | 54022 | #else |
| | 54023 | __ai int8x16_t vqmovn_high_s16(int8x8_t __p0, int16x8_t __p1) { |
| | 54024 | int8x16_t __ret; |
| | 54025 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 54026 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 54027 | __ret = __noswap_vcombine_s8(__rev0, __noswap_vqmovn_s16(__rev1)); |
| | 54028 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 54029 | return __ret; |
| | 54030 | } |
| | 54031 | #endif |
| | 54032 | |
| | 54033 | __ai uint16_t vqmovuns_s32(int32_t __p0) { |
| | 54034 | uint16_t __ret; |
| | 54035 | __ret = (uint16_t) __builtin_neon_vqmovuns_s32(__p0); |
| | 54036 | return __ret; |
| | 54037 | } |
| | 54038 | __ai uint32_t vqmovund_s64(int64_t __p0) { |
| | 54039 | uint32_t __ret; |
| | 54040 | __ret = (uint32_t) __builtin_neon_vqmovund_s64(__p0); |
| | 54041 | return __ret; |
| | 54042 | } |
| | 54043 | __ai uint8_t vqmovunh_s16(int16_t __p0) { |
| | 54044 | uint8_t __ret; |
| | 54045 | __ret = (uint8_t) __builtin_neon_vqmovunh_s16(__p0); |
| | 54046 | return __ret; |
| | 54047 | } |
| | 54048 | #ifdef __LITTLE_ENDIAN__ |
| | 54049 | __ai uint16x8_t vqmovun_high_s32(uint16x4_t __p0, int32x4_t __p1) { |
| | 54050 | uint16x8_t __ret; |
| | 54051 | __ret = vcombine_u16((uint16x4_t)(__p0), vqmovun_s32(__p1)); |
| | 54052 | return __ret; |
| | 54053 | } |
| | 54054 | #else |
| | 54055 | __ai uint16x8_t vqmovun_high_s32(uint16x4_t __p0, int32x4_t __p1) { |
| | 54056 | uint16x8_t __ret; |
| | 54057 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 54058 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 54059 | __ret = __noswap_vcombine_u16((uint16x4_t)(__rev0), __noswap_vqmovun_s32(__rev1)); |
| | 54060 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 54061 | return __ret; |
| | 54062 | } |
| | 54063 | #endif |
| | 54064 | |
| | 54065 | #ifdef __LITTLE_ENDIAN__ |
| | 54066 | __ai uint32x4_t vqmovun_high_s64(uint32x2_t __p0, int64x2_t __p1) { |
| | 54067 | uint32x4_t __ret; |
| | 54068 | __ret = vcombine_u32((uint32x2_t)(__p0), vqmovun_s64(__p1)); |
| | 54069 | return __ret; |
| | 54070 | } |
| | 54071 | #else |
| | 54072 | __ai uint32x4_t vqmovun_high_s64(uint32x2_t __p0, int64x2_t __p1) { |
| | 54073 | uint32x4_t __ret; |
| | 54074 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 54075 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 54076 | __ret = __noswap_vcombine_u32((uint32x2_t)(__rev0), __noswap_vqmovun_s64(__rev1)); |
| | 54077 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 54078 | return __ret; |
| | 54079 | } |
| | 54080 | #endif |
| | 54081 | |
| | 54082 | #ifdef __LITTLE_ENDIAN__ |
| | 54083 | __ai uint8x16_t vqmovun_high_s16(uint8x8_t __p0, int16x8_t __p1) { |
| | 54084 | uint8x16_t __ret; |
| | 54085 | __ret = vcombine_u8((uint8x8_t)(__p0), vqmovun_s16(__p1)); |
| | 54086 | return __ret; |
| | 54087 | } |
| | 54088 | #else |
| | 54089 | __ai uint8x16_t vqmovun_high_s16(uint8x8_t __p0, int16x8_t __p1) { |
| | 54090 | uint8x16_t __ret; |
| | 54091 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 54092 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 54093 | __ret = __noswap_vcombine_u8((uint8x8_t)(__rev0), __noswap_vqmovun_s16(__rev1)); |
| | 54094 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 54095 | return __ret; |
| | 54096 | } |
| | 54097 | #endif |
| | 54098 | |
| | 54099 | #ifdef __LITTLE_ENDIAN__ |
| | 54100 | __ai int64x2_t vqnegq_s64(int64x2_t __p0) { |
| | 54101 | int64x2_t __ret; |
| | 54102 | __ret = (int64x2_t) __builtin_neon_vqnegq_v((int8x16_t)__p0, 35); |
| | 54103 | return __ret; |
| | 54104 | } |
| | 54105 | #else |
| | 54106 | __ai int64x2_t vqnegq_s64(int64x2_t __p0) { |
| | 54107 | int64x2_t __ret; |
| | 54108 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 54109 | __ret = (int64x2_t) __builtin_neon_vqnegq_v((int8x16_t)__rev0, 35); |
| | 54110 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 54111 | return __ret; |
| | 54112 | } |
| | 54113 | #endif |
| | 54114 | |
| | 54115 | __ai int64x1_t vqneg_s64(int64x1_t __p0) { |
| | 54116 | int64x1_t __ret; |
| | 54117 | __ret = (int64x1_t) __builtin_neon_vqneg_v((int8x8_t)__p0, 3); |
| | 54118 | return __ret; |
| | 54119 | } |
| | 54120 | __ai int8_t vqnegb_s8(int8_t __p0) { |
| | 54121 | int8_t __ret; |
| | 54122 | __ret = (int8_t) __builtin_neon_vqnegb_s8(__p0); |
| | 54123 | return __ret; |
| | 54124 | } |
| | 54125 | __ai int32_t vqnegs_s32(int32_t __p0) { |
| | 54126 | int32_t __ret; |
| | 54127 | __ret = (int32_t) __builtin_neon_vqnegs_s32(__p0); |
| | 54128 | return __ret; |
| | 54129 | } |
| | 54130 | __ai int64_t vqnegd_s64(int64_t __p0) { |
| | 54131 | int64_t __ret; |
| | 54132 | __ret = (int64_t) __builtin_neon_vqnegd_s64(__p0); |
| | 54133 | return __ret; |
| | 54134 | } |
| | 54135 | __ai int16_t vqnegh_s16(int16_t __p0) { |
| | 54136 | int16_t __ret; |
| | 54137 | __ret = (int16_t) __builtin_neon_vqnegh_s16(__p0); |
| | 54138 | return __ret; |
| | 54139 | } |
| | 54140 | __ai int32_t vqrdmulhs_s32(int32_t __p0, int32_t __p1) { |
| | 54141 | int32_t __ret; |
| | 54142 | __ret = (int32_t) __builtin_neon_vqrdmulhs_s32(__p0, __p1); |
| | 54143 | return __ret; |
| | 54144 | } |
| | 54145 | __ai int16_t vqrdmulhh_s16(int16_t __p0, int16_t __p1) { |
| | 54146 | int16_t __ret; |
| | 54147 | __ret = (int16_t) __builtin_neon_vqrdmulhh_s16(__p0, __p1); |
| | 54148 | return __ret; |
| | 54149 | } |
| | 54150 | #ifdef __LITTLE_ENDIAN__ |
| | 54151 | #define vqrdmulhq_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| | 54152 | int32x4_t __ret; \ |
| | 54153 | int32x4_t __s0 = __p0; \ |
| | 54154 | int32x2_t __s1 = __p1; \ |
| | 54155 | __ret = (int32x4_t) __builtin_neon_vqrdmulhq_lane_v((int8x16_t)__s0, (int8x8_t)__s1, __p2, 2); \ |
| | 54156 | __ret; \ |
| 52466 | }) | 54157 | }) |
| 52467 | #else | 54158 | #else |
| 52468 | #define vdup_laneq_u16(__p0_494, __p1_494) __extension__ ({ \ | 54159 | #define vqrdmulhq_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 52469 | uint16x4_t __ret_494; \ | 54160 | int32x4_t __ret; \ |
| 52470 | uint16x8_t __s0_494 = __p0_494; \ | 54161 | int32x4_t __s0 = __p0; \ |
| 52471 | uint16x8_t __rev0_494; __rev0_494 = __builtin_shufflevector(__s0_494, __s0_494, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54162 | int32x2_t __s1 = __p1; \ |
| 52472 | __ret_494 = __noswap_splat_laneq_u16(__rev0_494, __p1_494); \ | 54163 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 52473 | __ret_494 = __builtin_shufflevector(__ret_494, __ret_494, 3, 2, 1, 0); \ | 54164 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 52474 | __ret_494; \ | 54165 | __ret = (int32x4_t) __builtin_neon_vqrdmulhq_lane_v((int8x16_t)__rev0, (int8x8_t)__rev1, __p2, 2); \ |
| | 54166 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 54167 | __ret; \ |
| 52475 | }) | 54168 | }) |
| 52476 | #endif | 54169 | #endif |
| 52477 | | 54170 | |
| 52478 | #ifdef __LITTLE_ENDIAN__ | 54171 | #ifdef __LITTLE_ENDIAN__ |
| 52479 | #define vdup_laneq_s8(__p0_495, __p1_495) __extension__ ({ \ | 54172 | #define vqrdmulhq_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 52480 | int8x8_t __ret_495; \ | 54173 | int16x8_t __ret; \ |
| 52481 | int8x16_t __s0_495 = __p0_495; \ | 54174 | int16x8_t __s0 = __p0; \ |
| 52482 | __ret_495 = splat_laneq_s8(__s0_495, __p1_495); \ | 54175 | int16x4_t __s1 = __p1; \ |
| 52483 | __ret_495; \ | 54176 | __ret = (int16x8_t) __builtin_neon_vqrdmulhq_lane_v((int8x16_t)__s0, (int8x8_t)__s1, __p2, 1); \ |
| | 54177 | __ret; \ |
| 52484 | }) | 54178 | }) |
| 52485 | #else | 54179 | #else |
| 52486 | #define vdup_laneq_s8(__p0_496, __p1_496) __extension__ ({ \ | 54180 | #define vqrdmulhq_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 52487 | int8x8_t __ret_496; \ | 54181 | int16x8_t __ret; \ |
| 52488 | int8x16_t __s0_496 = __p0_496; \ | 54182 | int16x8_t __s0 = __p0; \ |
| 52489 | int8x16_t __rev0_496; __rev0_496 = __builtin_shufflevector(__s0_496, __s0_496, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54183 | int16x4_t __s1 = __p1; \ |
| 52490 | __ret_496 = __noswap_splat_laneq_s8(__rev0_496, __p1_496); \ | 54184 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52491 | __ret_496 = __builtin_shufflevector(__ret_496, __ret_496, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54185 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 52492 | __ret_496; \ | 54186 | __ret = (int16x8_t) __builtin_neon_vqrdmulhq_lane_v((int8x16_t)__rev0, (int8x8_t)__rev1, __p2, 1); \ |
| | 54187 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 54188 | __ret; \ |
| 52493 | }) | 54189 | }) |
| 52494 | #endif | 54190 | #endif |
| 52495 | | 54191 | |
| 52496 | #ifdef __LITTLE_ENDIAN__ | 54192 | #ifdef __LITTLE_ENDIAN__ |
| 52497 | #define vdup_laneq_f64(__p0_497, __p1_497) __extension__ ({ \ | 54193 | #define vqrdmulh_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 52498 | float64x1_t __ret_497; \ | 54194 | int32x2_t __ret; \ |
| 52499 | float64x2_t __s0_497 = __p0_497; \ | 54195 | int32x2_t __s0 = __p0; \ |
| 52500 | __ret_497 = splat_laneq_f64(__s0_497, __p1_497); \ | 54196 | int32x2_t __s1 = __p1; \ |
| 52501 | __ret_497; \ | 54197 | __ret = (int32x2_t) __builtin_neon_vqrdmulh_lane_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 2); \ |
| | 54198 | __ret; \ |
| 52502 | }) | 54199 | }) |
| 52503 | #else | 54200 | #else |
| 52504 | #define vdup_laneq_f64(__p0_498, __p1_498) __extension__ ({ \ | 54201 | #define vqrdmulh_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 52505 | float64x1_t __ret_498; \ | 54202 | int32x2_t __ret; \ |
| 52506 | float64x2_t __s0_498 = __p0_498; \ | 54203 | int32x2_t __s0 = __p0; \ |
| 52507 | float64x2_t __rev0_498; __rev0_498 = __builtin_shufflevector(__s0_498, __s0_498, 1, 0); \ | 54204 | int32x2_t __s1 = __p1; \ |
| 52508 | __ret_498 = __noswap_splat_laneq_f64(__rev0_498, __p1_498); \ | 54205 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 52509 | __ret_498; \ | 54206 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| | 54207 | __ret = (int32x2_t) __builtin_neon_vqrdmulh_lane_v((int8x8_t)__rev0, (int8x8_t)__rev1, __p2, 2); \ |
| | 54208 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| | 54209 | __ret; \ |
| 52510 | }) | 54210 | }) |
| 52511 | #endif | 54211 | #endif |
| 52512 | | 54212 | |
| 52513 | #ifdef __LITTLE_ENDIAN__ | 54213 | #ifdef __LITTLE_ENDIAN__ |
| 52514 | #define vdup_laneq_f32(__p0_499, __p1_499) __extension__ ({ \ | 54214 | #define vqrdmulh_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 52515 | float32x2_t __ret_499; \ | 54215 | int16x4_t __ret; \ |
| 52516 | float32x4_t __s0_499 = __p0_499; \ | 54216 | int16x4_t __s0 = __p0; \ |
| 52517 | __ret_499 = splat_laneq_f32(__s0_499, __p1_499); \ | 54217 | int16x4_t __s1 = __p1; \ |
| 52518 | __ret_499; \ | 54218 | __ret = (int16x4_t) __builtin_neon_vqrdmulh_lane_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 1); \ |
| | 54219 | __ret; \ |
| 52519 | }) | 54220 | }) |
| 52520 | #else | 54221 | #else |
| 52521 | #define vdup_laneq_f32(__p0_500, __p1_500) __extension__ ({ \ | 54222 | #define vqrdmulh_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 52522 | float32x2_t __ret_500; \ | 54223 | int16x4_t __ret; \ |
| 52523 | float32x4_t __s0_500 = __p0_500; \ | 54224 | int16x4_t __s0 = __p0; \ |
| 52524 | float32x4_t __rev0_500; __rev0_500 = __builtin_shufflevector(__s0_500, __s0_500, 3, 2, 1, 0); \ | 54225 | int16x4_t __s1 = __p1; \ |
| 52525 | __ret_500 = __noswap_splat_laneq_f32(__rev0_500, __p1_500); \ | 54226 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 52526 | __ret_500 = __builtin_shufflevector(__ret_500, __ret_500, 1, 0); \ | 54227 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 52527 | __ret_500; \ | 54228 | __ret = (int16x4_t) __builtin_neon_vqrdmulh_lane_v((int8x8_t)__rev0, (int8x8_t)__rev1, __p2, 1); \ |
| | 54229 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 54230 | __ret; \ |
| 52528 | }) | 54231 | }) |
| 52529 | #endif | 54232 | #endif |
| 52530 | | 54233 | |
| 52531 | #ifdef __LITTLE_ENDIAN__ | 54234 | #ifdef __LITTLE_ENDIAN__ |
| 52532 | #define vdup_laneq_f16(__p0_501, __p1_501) __extension__ ({ \ | 54235 | #define vqrdmulhs_lane_s32(__p0_659, __p1_659, __p2_659) __extension__ ({ \ |
| 52533 | float16x4_t __ret_501; \ | 54236 | int32_t __ret_659; \ |
| 52534 | float16x8_t __s0_501 = __p0_501; \ | 54237 | int32_t __s0_659 = __p0_659; \ |
| 52535 | __ret_501 = splat_laneq_f16(__s0_501, __p1_501); \ | 54238 | int32x2_t __s1_659 = __p1_659; \ |
| 52536 | __ret_501; \ | 54239 | __ret_659 = vqrdmulhs_s32(__s0_659, vget_lane_s32(__s1_659, __p2_659)); \ |
| | 54240 | __ret_659; \ |
| 52537 | }) | 54241 | }) |
| 52538 | #else | 54242 | #else |
| 52539 | #define vdup_laneq_f16(__p0_502, __p1_502) __extension__ ({ \ | 54243 | #define vqrdmulhs_lane_s32(__p0_660, __p1_660, __p2_660) __extension__ ({ \ |
| 52540 | float16x4_t __ret_502; \ | 54244 | int32_t __ret_660; \ |
| 52541 | float16x8_t __s0_502 = __p0_502; \ | 54245 | int32_t __s0_660 = __p0_660; \ |
| 52542 | float16x8_t __rev0_502; __rev0_502 = __builtin_shufflevector(__s0_502, __s0_502, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54246 | int32x2_t __s1_660 = __p1_660; \ |
| 52543 | __ret_502 = __noswap_splat_laneq_f16(__rev0_502, __p1_502); \ | 54247 | int32x2_t __rev1_660; __rev1_660 = __builtin_shufflevector(__s1_660, __s1_660, 1, 0); \ |
| 52544 | __ret_502 = __builtin_shufflevector(__ret_502, __ret_502, 3, 2, 1, 0); \ | 54248 | __ret_660 = vqrdmulhs_s32(__s0_660, __noswap_vget_lane_s32(__rev1_660, __p2_660)); \ |
| 52545 | __ret_502; \ | 54249 | __ret_660; \ |
| 52546 | }) | 54250 | }) |
| 52547 | #endif | 54251 | #endif |
| 52548 | | 54252 | |
| 52549 | #ifdef __LITTLE_ENDIAN__ | 54253 | #ifdef __LITTLE_ENDIAN__ |
| 52550 | #define vdup_laneq_s32(__p0_503, __p1_503) __extension__ ({ \ | 54254 | #define vqrdmulhh_lane_s16(__p0_661, __p1_661, __p2_661) __extension__ ({ \ |
| 52551 | int32x2_t __ret_503; \ | 54255 | int16_t __ret_661; \ |
| 52552 | int32x4_t __s0_503 = __p0_503; \ | 54256 | int16_t __s0_661 = __p0_661; \ |
| 52553 | __ret_503 = splat_laneq_s32(__s0_503, __p1_503); \ | 54257 | int16x4_t __s1_661 = __p1_661; \ |
| 52554 | __ret_503; \ | 54258 | __ret_661 = vqrdmulhh_s16(__s0_661, vget_lane_s16(__s1_661, __p2_661)); \ |
| | 54259 | __ret_661; \ |
| 52555 | }) | 54260 | }) |
| 52556 | #else | 54261 | #else |
| 52557 | #define vdup_laneq_s32(__p0_504, __p1_504) __extension__ ({ \ | 54262 | #define vqrdmulhh_lane_s16(__p0_662, __p1_662, __p2_662) __extension__ ({ \ |
| 52558 | int32x2_t __ret_504; \ | 54263 | int16_t __ret_662; \ |
| 52559 | int32x4_t __s0_504 = __p0_504; \ | 54264 | int16_t __s0_662 = __p0_662; \ |
| 52560 | int32x4_t __rev0_504; __rev0_504 = __builtin_shufflevector(__s0_504, __s0_504, 3, 2, 1, 0); \ | 54265 | int16x4_t __s1_662 = __p1_662; \ |
| 52561 | __ret_504 = __noswap_splat_laneq_s32(__rev0_504, __p1_504); \ | 54266 | int16x4_t __rev1_662; __rev1_662 = __builtin_shufflevector(__s1_662, __s1_662, 3, 2, 1, 0); \ |
| 52562 | __ret_504 = __builtin_shufflevector(__ret_504, __ret_504, 1, 0); \ | 54267 | __ret_662 = vqrdmulhh_s16(__s0_662, __noswap_vget_lane_s16(__rev1_662, __p2_662)); \ |
| 52563 | __ret_504; \ | 54268 | __ret_662; \ |
| 52564 | }) | 54269 | }) |
| 52565 | #endif | 54270 | #endif |
| 52566 | | 54271 | |
| 52567 | #ifdef __LITTLE_ENDIAN__ | 54272 | #ifdef __LITTLE_ENDIAN__ |
| 52568 | #define vdup_laneq_s64(__p0_505, __p1_505) __extension__ ({ \ | 54273 | #define vqrdmulhs_laneq_s32(__p0_663, __p1_663, __p2_663) __extension__ ({ \ |
| 52569 | int64x1_t __ret_505; \ | 54274 | int32_t __ret_663; \ |
| 52570 | int64x2_t __s0_505 = __p0_505; \ | 54275 | int32_t __s0_663 = __p0_663; \ |
| 52571 | __ret_505 = splat_laneq_s64(__s0_505, __p1_505); \ | 54276 | int32x4_t __s1_663 = __p1_663; \ |
| 52572 | __ret_505; \ | 54277 | __ret_663 = vqrdmulhs_s32(__s0_663, vgetq_lane_s32(__s1_663, __p2_663)); \ |
| | 54278 | __ret_663; \ |
| 52573 | }) | 54279 | }) |
| 52574 | #else | 54280 | #else |
| 52575 | #define vdup_laneq_s64(__p0_506, __p1_506) __extension__ ({ \ | 54281 | #define vqrdmulhs_laneq_s32(__p0_664, __p1_664, __p2_664) __extension__ ({ \ |
| 52576 | int64x1_t __ret_506; \ | 54282 | int32_t __ret_664; \ |
| 52577 | int64x2_t __s0_506 = __p0_506; \ | 54283 | int32_t __s0_664 = __p0_664; \ |
| 52578 | int64x2_t __rev0_506; __rev0_506 = __builtin_shufflevector(__s0_506, __s0_506, 1, 0); \ | 54284 | int32x4_t __s1_664 = __p1_664; \ |
| 52579 | __ret_506 = __noswap_splat_laneq_s64(__rev0_506, __p1_506); \ | 54285 | int32x4_t __rev1_664; __rev1_664 = __builtin_shufflevector(__s1_664, __s1_664, 3, 2, 1, 0); \ |
| 52580 | __ret_506; \ | 54286 | __ret_664 = vqrdmulhs_s32(__s0_664, __noswap_vgetq_lane_s32(__rev1_664, __p2_664)); \ |
| | 54287 | __ret_664; \ |
| 52581 | }) | 54288 | }) |
| 52582 | #endif | 54289 | #endif |
| 52583 | | 54290 | |
| 52584 | #ifdef __LITTLE_ENDIAN__ | 54291 | #ifdef __LITTLE_ENDIAN__ |
| 52585 | #define vdup_laneq_s16(__p0_507, __p1_507) __extension__ ({ \ | 54292 | #define vqrdmulhh_laneq_s16(__p0_665, __p1_665, __p2_665) __extension__ ({ \ |
| 52586 | int16x4_t __ret_507; \ | 54293 | int16_t __ret_665; \ |
| 52587 | int16x8_t __s0_507 = __p0_507; \ | 54294 | int16_t __s0_665 = __p0_665; \ |
| 52588 | __ret_507 = splat_laneq_s16(__s0_507, __p1_507); \ | 54295 | int16x8_t __s1_665 = __p1_665; \ |
| 52589 | __ret_507; \ | 54296 | __ret_665 = vqrdmulhh_s16(__s0_665, vgetq_lane_s16(__s1_665, __p2_665)); \ |
| | 54297 | __ret_665; \ |
| 52590 | }) | 54298 | }) |
| 52591 | #else | 54299 | #else |
| 52592 | #define vdup_laneq_s16(__p0_508, __p1_508) __extension__ ({ \ | 54300 | #define vqrdmulhh_laneq_s16(__p0_666, __p1_666, __p2_666) __extension__ ({ \ |
| 52593 | int16x4_t __ret_508; \ | 54301 | int16_t __ret_666; \ |
| 52594 | int16x8_t __s0_508 = __p0_508; \ | 54302 | int16_t __s0_666 = __p0_666; \ |
| 52595 | int16x8_t __rev0_508; __rev0_508 = __builtin_shufflevector(__s0_508, __s0_508, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54303 | int16x8_t __s1_666 = __p1_666; \ |
| 52596 | __ret_508 = __noswap_splat_laneq_s16(__rev0_508, __p1_508); \ | 54304 | int16x8_t __rev1_666; __rev1_666 = __builtin_shufflevector(__s1_666, __s1_666, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52597 | __ret_508 = __builtin_shufflevector(__ret_508, __ret_508, 3, 2, 1, 0); \ | 54305 | __ret_666 = vqrdmulhh_s16(__s0_666, __noswap_vgetq_lane_s16(__rev1_666, __p2_666)); \ |
| 52598 | __ret_508; \ | 54306 | __ret_666; \ |
| 52599 | }) | 54307 | }) |
| 52600 | #endif | 54308 | #endif |
| 52601 | | 54309 | |
| 52602 | __ai poly64x1_t vdup_n_p64(poly64_t __p0) { | | |
| 52603 | poly64x1_t __ret; | | |
| 52604 | __ret = (poly64x1_t) {__p0}; | | |
| 52605 | return __ret; | | |
| 52606 | } | | |
| 52607 | #ifdef __LITTLE_ENDIAN__ | 54310 | #ifdef __LITTLE_ENDIAN__ |
| 52608 | __ai poly64x2_t vdupq_n_p64(poly64_t __p0) { | 54311 | #define vqrdmulhq_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 52609 | poly64x2_t __ret; | 54312 | int32x4_t __ret; \ |
| 52610 | __ret = (poly64x2_t) {__p0, __p0}; | 54313 | int32x4_t __s0 = __p0; \ |
| 52611 | return __ret; | 54314 | int32x4_t __s1 = __p1; \ |
| 52612 | } | 54315 | __ret = (int32x4_t) __builtin_neon_vqrdmulhq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 34); \ |
| | 54316 | __ret; \ |
| | 54317 | }) |
| 52613 | #else | 54318 | #else |
| 52614 | __ai poly64x2_t vdupq_n_p64(poly64_t __p0) { | 54319 | #define vqrdmulhq_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 52615 | poly64x2_t __ret; | 54320 | int32x4_t __ret; \ |
| 52616 | __ret = (poly64x2_t) {__p0, __p0}; | 54321 | int32x4_t __s0 = __p0; \ |
| 52617 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 54322 | int32x4_t __s1 = __p1; \ |
| 52618 | return __ret; | 54323 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 52619 | } | 54324 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| | 54325 | __ret = (int32x4_t) __builtin_neon_vqrdmulhq_laneq_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 34); \ |
| | 54326 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 54327 | __ret; \ |
| | 54328 | }) |
| 52620 | #endif | 54329 | #endif |
| 52621 | | 54330 | |
| 52622 | #ifdef __LITTLE_ENDIAN__ | 54331 | #ifdef __LITTLE_ENDIAN__ |
| 52623 | __ai float64x2_t vdupq_n_f64(float64_t __p0) { | 54332 | #define vqrdmulhq_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 52624 | float64x2_t __ret; | 54333 | int16x8_t __ret; \ |
| 52625 | __ret = (float64x2_t) {__p0, __p0}; | 54334 | int16x8_t __s0 = __p0; \ |
| 52626 | return __ret; | 54335 | int16x8_t __s1 = __p1; \ |
| 52627 | } | 54336 | __ret = (int16x8_t) __builtin_neon_vqrdmulhq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 33); \ |
| | 54337 | __ret; \ |
| | 54338 | }) |
| 52628 | #else | 54339 | #else |
| 52629 | __ai float64x2_t vdupq_n_f64(float64_t __p0) { | 54340 | #define vqrdmulhq_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 52630 | float64x2_t __ret; | 54341 | int16x8_t __ret; \ |
| 52631 | __ret = (float64x2_t) {__p0, __p0}; | 54342 | int16x8_t __s0 = __p0; \ |
| 52632 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 54343 | int16x8_t __s1 = __p1; \ |
| 52633 | return __ret; | 54344 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52634 | } | 54345 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52635 | #endif | 54346 | __ret = (int16x8_t) __builtin_neon_vqrdmulhq_laneq_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 33); \ |
| 52636 | | 54347 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52637 | __ai float64x1_t vdup_n_f64(float64_t __p0) { | | |
| 52638 | float64x1_t __ret; | | |
| 52639 | __ret = (float64x1_t) {__p0}; | | |
| 52640 | return __ret; | | |
| 52641 | } | | |
| 52642 | #define vext_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 52643 | poly64x1_t __ret; \ | | |
| 52644 | poly64x1_t __s0 = __p0; \ | | |
| 52645 | poly64x1_t __s1 = __p1; \ | | |
| 52646 | __ret = (poly64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 6); \ | | |
| 52647 | __ret; \ | 54348 | __ret; \ |
| 52648 | }) | 54349 | }) |
| | 54350 | #endif |
| | 54351 | |
| 52649 | #ifdef __LITTLE_ENDIAN__ | 54352 | #ifdef __LITTLE_ENDIAN__ |
| 52650 | #define vextq_p64(__p0, __p1, __p2) __extension__ ({ \ | 54353 | #define vqrdmulh_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 52651 | poly64x2_t __ret; \ | 54354 | int32x2_t __ret; \ |
| 52652 | poly64x2_t __s0 = __p0; \ | 54355 | int32x2_t __s0 = __p0; \ |
| 52653 | poly64x2_t __s1 = __p1; \ | 54356 | int32x4_t __s1 = __p1; \ |
| 52654 | __ret = (poly64x2_t) __builtin_neon_vextq_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 38); \ | 54357 | __ret = (int32x2_t) __builtin_neon_vqrdmulh_laneq_v((int8x8_t)__s0, (int8x16_t)__s1, __p2, 2); \ |
| 52655 | __ret; \ | 54358 | __ret; \ |
| 52656 | }) | 54359 | }) |
| 52657 | #else | 54360 | #else |
| 52658 | #define vextq_p64(__p0, __p1, __p2) __extension__ ({ \ | 54361 | #define vqrdmulh_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 52659 | poly64x2_t __ret; \ | 54362 | int32x2_t __ret; \ |
| 52660 | poly64x2_t __s0 = __p0; \ | 54363 | int32x2_t __s0 = __p0; \ |
| 52661 | poly64x2_t __s1 = __p1; \ | 54364 | int32x4_t __s1 = __p1; \ |
| 52662 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 54365 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 52663 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 54366 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 52664 | __ret = (poly64x2_t) __builtin_neon_vextq_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 38); \ | 54367 | __ret = (int32x2_t) __builtin_neon_vqrdmulh_laneq_v((int8x8_t)__rev0, (int8x16_t)__rev1, __p2, 2); \ |
| 52665 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 54368 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 52666 | __ret; \ | 54369 | __ret; \ |
| 52667 | }) | 54370 | }) |
| 52668 | #endif | 54371 | #endif |
| 52669 | | 54372 | |
| 52670 | #ifdef __LITTLE_ENDIAN__ | 54373 | #ifdef __LITTLE_ENDIAN__ |
| 52671 | #define vextq_f64(__p0, __p1, __p2) __extension__ ({ \ | 54374 | #define vqrdmulh_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 52672 | float64x2_t __ret; \ | 54375 | int16x4_t __ret; \ |
| 52673 | float64x2_t __s0 = __p0; \ | 54376 | int16x4_t __s0 = __p0; \ |
| 52674 | float64x2_t __s1 = __p1; \ | 54377 | int16x8_t __s1 = __p1; \ |
| 52675 | __ret = (float64x2_t) __builtin_neon_vextq_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 42); \ | 54378 | __ret = (int16x4_t) __builtin_neon_vqrdmulh_laneq_v((int8x8_t)__s0, (int8x16_t)__s1, __p2, 1); \ |
| 52676 | __ret; \ | 54379 | __ret; \ |
| 52677 | }) | 54380 | }) |
| 52678 | #else | 54381 | #else |
| 52679 | #define vextq_f64(__p0, __p1, __p2) __extension__ ({ \ | 54382 | #define vqrdmulh_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 52680 | float64x2_t __ret; \ | 54383 | int16x4_t __ret; \ |
| 52681 | float64x2_t __s0 = __p0; \ | 54384 | int16x4_t __s0 = __p0; \ |
| 52682 | float64x2_t __s1 = __p1; \ | 54385 | int16x8_t __s1 = __p1; \ |
| 52683 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 54386 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 52684 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 54387 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52685 | __ret = (float64x2_t) __builtin_neon_vextq_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 42); \ | 54388 | __ret = (int16x4_t) __builtin_neon_vqrdmulh_laneq_v((int8x8_t)__rev0, (int8x16_t)__rev1, __p2, 1); \ |
| 52686 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 54389 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 52687 | __ret; \ | 54390 | __ret; \ |
| 52688 | }) | 54391 | }) |
| 52689 | #endif | 54392 | #endif |
| 52690 | | 54393 | |
| 52691 | #define vext_f64(__p0, __p1, __p2) __extension__ ({ \ | 54394 | __ai uint8_t vqrshlb_u8(uint8_t __p0, int8_t __p1) { |
| 52692 | float64x1_t __ret; \ | 54395 | uint8_t __ret; |
| 52693 | float64x1_t __s0 = __p0; \ | 54396 | __ret = (uint8_t) __builtin_neon_vqrshlb_u8(__p0, __p1); |
| 52694 | float64x1_t __s1 = __p1; \ | | |
| 52695 | __ret = (float64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 10); \ | | |
| 52696 | __ret; \ | | |
| 52697 | }) | | |
| 52698 | #ifdef __LITTLE_ENDIAN__ | | |
| 52699 | __ai float64x2_t vfmaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | | |
| 52700 | float64x2_t __ret; | | |
| 52701 | __ret = (float64x2_t) __builtin_neon_vfmaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); | | |
| 52702 | return __ret; | 54397 | return __ret; |
| 52703 | } | 54398 | } |
| 52704 | #else | 54399 | __ai uint32_t vqrshls_u32(uint32_t __p0, int32_t __p1) { |
| 52705 | __ai float64x2_t vfmaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 54400 | uint32_t __ret; |
| 52706 | float64x2_t __ret; | 54401 | __ret = (uint32_t) __builtin_neon_vqrshls_u32(__p0, __p1); |
| 52707 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 52708 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 52709 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 52710 | __ret = (float64x2_t) __builtin_neon_vfmaq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 42); | | |
| 52711 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 52712 | return __ret; | 54402 | return __ret; |
| 52713 | } | 54403 | } |
| 52714 | __ai float64x2_t __noswap_vfmaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 54404 | __ai uint64_t vqrshld_u64(uint64_t __p0, int64_t __p1) { |
| 52715 | float64x2_t __ret; | 54405 | uint64_t __ret; |
| 52716 | __ret = (float64x2_t) __builtin_neon_vfmaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); | 54406 | __ret = (uint64_t) __builtin_neon_vqrshld_u64(__p0, __p1); |
| 52717 | return __ret; | 54407 | return __ret; |
| 52718 | } | 54408 | } |
| 52719 | #endif | 54409 | __ai uint16_t vqrshlh_u16(uint16_t __p0, int16_t __p1) { |
| 52720 | | 54410 | uint16_t __ret; |
| 52721 | __ai float64x1_t vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | 54411 | __ret = (uint16_t) __builtin_neon_vqrshlh_u16(__p0, __p1); |
| 52722 | float64x1_t __ret; | 54412 | return __ret; |
| 52723 | __ret = (float64x1_t) __builtin_neon_vfma_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); | 54413 | } |
| | 54414 | __ai int8_t vqrshlb_s8(int8_t __p0, int8_t __p1) { |
| | 54415 | int8_t __ret; |
| | 54416 | __ret = (int8_t) __builtin_neon_vqrshlb_s8(__p0, __p1); |
| | 54417 | return __ret; |
| | 54418 | } |
| | 54419 | __ai int32_t vqrshls_s32(int32_t __p0, int32_t __p1) { |
| | 54420 | int32_t __ret; |
| | 54421 | __ret = (int32_t) __builtin_neon_vqrshls_s32(__p0, __p1); |
| | 54422 | return __ret; |
| | 54423 | } |
| | 54424 | __ai int64_t vqrshld_s64(int64_t __p0, int64_t __p1) { |
| | 54425 | int64_t __ret; |
| | 54426 | __ret = (int64_t) __builtin_neon_vqrshld_s64(__p0, __p1); |
| | 54427 | return __ret; |
| | 54428 | } |
| | 54429 | __ai int16_t vqrshlh_s16(int16_t __p0, int16_t __p1) { |
| | 54430 | int16_t __ret; |
| | 54431 | __ret = (int16_t) __builtin_neon_vqrshlh_s16(__p0, __p1); |
| 52724 | return __ret; | 54432 | return __ret; |
| 52725 | } | 54433 | } |
| 52726 | #define vfmad_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 52727 | float64_t __ret; \ | | |
| 52728 | float64_t __s0 = __p0; \ | | |
| 52729 | float64_t __s1 = __p1; \ | | |
| 52730 | float64x1_t __s2 = __p2; \ | | |
| 52731 | __ret = (float64_t) __builtin_neon_vfmad_lane_f64(__s0, __s1, (float64x1_t)__s2, __p3); \ | | |
| 52732 | __ret; \ | | |
| 52733 | }) | | |
| 52734 | #ifdef __LITTLE_ENDIAN__ | 54434 | #ifdef __LITTLE_ENDIAN__ |
| 52735 | #define vfmas_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54435 | #define vqrshrn_high_n_u32(__p0_667, __p1_667, __p2_667) __extension__ ({ \ |
| 52736 | float32_t __ret; \ | 54436 | uint16x8_t __ret_667; \ |
| 52737 | float32_t __s0 = __p0; \ | 54437 | uint16x4_t __s0_667 = __p0_667; \ |
| 52738 | float32_t __s1 = __p1; \ | 54438 | uint32x4_t __s1_667 = __p1_667; \ |
| 52739 | float32x2_t __s2 = __p2; \ | 54439 | __ret_667 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_667), (uint16x4_t)(vqrshrn_n_u32(__s1_667, __p2_667)))); \ |
| 52740 | __ret = (float32_t) __builtin_neon_vfmas_lane_f32(__s0, __s1, (float32x2_t)__s2, __p3); \ | 54440 | __ret_667; \ |
| 52741 | __ret; \ | | |
| 52742 | }) | 54441 | }) |
| 52743 | #else | 54442 | #else |
| 52744 | #define vfmas_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54443 | #define vqrshrn_high_n_u32(__p0_668, __p1_668, __p2_668) __extension__ ({ \ |
| 52745 | float32_t __ret; \ | 54444 | uint16x8_t __ret_668; \ |
| 52746 | float32_t __s0 = __p0; \ | 54445 | uint16x4_t __s0_668 = __p0_668; \ |
| 52747 | float32_t __s1 = __p1; \ | 54446 | uint32x4_t __s1_668 = __p1_668; \ |
| 52748 | float32x2_t __s2 = __p2; \ | 54447 | uint16x4_t __rev0_668; __rev0_668 = __builtin_shufflevector(__s0_668, __s0_668, 3, 2, 1, 0); \ |
| 52749 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ | 54448 | uint32x4_t __rev1_668; __rev1_668 = __builtin_shufflevector(__s1_668, __s1_668, 3, 2, 1, 0); \ |
| 52750 | __ret = (float32_t) __builtin_neon_vfmas_lane_f32(__s0, __s1, (float32x2_t)__rev2, __p3); \ | 54449 | __ret_668 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_668), (uint16x4_t)(__noswap_vqrshrn_n_u32(__rev1_668, __p2_668)))); \ |
| 52751 | __ret; \ | 54450 | __ret_668 = __builtin_shufflevector(__ret_668, __ret_668, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52752 | }) | 54451 | __ret_668; \ |
| 52753 | #define __noswap_vfmas_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 52754 | float32_t __ret; \ | | |
| 52755 | float32_t __s0 = __p0; \ | | |
| 52756 | float32_t __s1 = __p1; \ | | |
| 52757 | float32x2_t __s2 = __p2; \ | | |
| 52758 | __ret = (float32_t) __builtin_neon_vfmas_lane_f32(__s0, __s1, (float32x2_t)__s2, __p3); \ | | |
| 52759 | __ret; \ | | |
| 52760 | }) | 54452 | }) |
| 52761 | #endif | 54453 | #endif |
| 52762 | | 54454 | |
| 52763 | #ifdef __LITTLE_ENDIAN__ | 54455 | #ifdef __LITTLE_ENDIAN__ |
| 52764 | #define vfmaq_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54456 | #define vqrshrn_high_n_u64(__p0_669, __p1_669, __p2_669) __extension__ ({ \ |
| 52765 | float64x2_t __ret; \ | 54457 | uint32x4_t __ret_669; \ |
| 52766 | float64x2_t __s0 = __p0; \ | 54458 | uint32x2_t __s0_669 = __p0_669; \ |
| 52767 | float64x2_t __s1 = __p1; \ | 54459 | uint64x2_t __s1_669 = __p1_669; \ |
| 52768 | float64x1_t __s2 = __p2; \ | 54460 | __ret_669 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_669), (uint32x2_t)(vqrshrn_n_u64(__s1_669, __p2_669)))); \ |
| 52769 | __ret = (float64x2_t) __builtin_neon_vfmaq_lane_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x8_t)__s2, __p3, 42); \ | 54461 | __ret_669; \ |
| 52770 | __ret; \ | | |
| 52771 | }) | 54462 | }) |
| 52772 | #else | 54463 | #else |
| 52773 | #define vfmaq_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54464 | #define vqrshrn_high_n_u64(__p0_670, __p1_670, __p2_670) __extension__ ({ \ |
| 52774 | float64x2_t __ret; \ | 54465 | uint32x4_t __ret_670; \ |
| 52775 | float64x2_t __s0 = __p0; \ | 54466 | uint32x2_t __s0_670 = __p0_670; \ |
| 52776 | float64x2_t __s1 = __p1; \ | 54467 | uint64x2_t __s1_670 = __p1_670; \ |
| 52777 | float64x1_t __s2 = __p2; \ | 54468 | uint32x2_t __rev0_670; __rev0_670 = __builtin_shufflevector(__s0_670, __s0_670, 1, 0); \ |
| 52778 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 54469 | uint64x2_t __rev1_670; __rev1_670 = __builtin_shufflevector(__s1_670, __s1_670, 1, 0); \ |
| 52779 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 54470 | __ret_670 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_670), (uint32x2_t)(__noswap_vqrshrn_n_u64(__rev1_670, __p2_670)))); \ |
| 52780 | __ret = (float64x2_t) __builtin_neon_vfmaq_lane_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x8_t)__s2, __p3, 42); \ | 54471 | __ret_670 = __builtin_shufflevector(__ret_670, __ret_670, 3, 2, 1, 0); \ |
| 52781 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 54472 | __ret_670; \ |
| 52782 | __ret; \ | | |
| 52783 | }) | | |
| 52784 | #define __noswap_vfmaq_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 52785 | float64x2_t __ret; \ | | |
| 52786 | float64x2_t __s0 = __p0; \ | | |
| 52787 | float64x2_t __s1 = __p1; \ | | |
| 52788 | float64x1_t __s2 = __p2; \ | | |
| 52789 | __ret = (float64x2_t) __builtin_neon_vfmaq_lane_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x8_t)__s2, __p3, 42); \ | | |
| 52790 | __ret; \ | | |
| 52791 | }) | 54473 | }) |
| 52792 | #endif | 54474 | #endif |
| 52793 | | 54475 | |
| 52794 | #ifdef __LITTLE_ENDIAN__ | 54476 | #ifdef __LITTLE_ENDIAN__ |
| 52795 | #define vfmaq_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54477 | #define vqrshrn_high_n_u16(__p0_671, __p1_671, __p2_671) __extension__ ({ \ |
| 52796 | float32x4_t __ret; \ | 54478 | uint8x16_t __ret_671; \ |
| 52797 | float32x4_t __s0 = __p0; \ | 54479 | uint8x8_t __s0_671 = __p0_671; \ |
| 52798 | float32x4_t __s1 = __p1; \ | 54480 | uint16x8_t __s1_671 = __p1_671; \ |
| 52799 | float32x2_t __s2 = __p2; \ | 54481 | __ret_671 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_671), (uint8x8_t)(vqrshrn_n_u16(__s1_671, __p2_671)))); \ |
| 52800 | __ret = (float32x4_t) __builtin_neon_vfmaq_lane_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x8_t)__s2, __p3, 41); \ | 54482 | __ret_671; \ |
| 52801 | __ret; \ | | |
| 52802 | }) | 54483 | }) |
| 52803 | #else | 54484 | #else |
| 52804 | #define vfmaq_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54485 | #define vqrshrn_high_n_u16(__p0_672, __p1_672, __p2_672) __extension__ ({ \ |
| 52805 | float32x4_t __ret; \ | 54486 | uint8x16_t __ret_672; \ |
| 52806 | float32x4_t __s0 = __p0; \ | 54487 | uint8x8_t __s0_672 = __p0_672; \ |
| 52807 | float32x4_t __s1 = __p1; \ | 54488 | uint16x8_t __s1_672 = __p1_672; \ |
| 52808 | float32x2_t __s2 = __p2; \ | 54489 | uint8x8_t __rev0_672; __rev0_672 = __builtin_shufflevector(__s0_672, __s0_672, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52809 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 54490 | uint16x8_t __rev1_672; __rev1_672 = __builtin_shufflevector(__s1_672, __s1_672, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52810 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 54491 | __ret_672 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_672), (uint8x8_t)(__noswap_vqrshrn_n_u16(__rev1_672, __p2_672)))); \ |
| 52811 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ | 54492 | __ret_672 = __builtin_shufflevector(__ret_672, __ret_672, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52812 | __ret = (float32x4_t) __builtin_neon_vfmaq_lane_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x8_t)__rev2, __p3, 41); \ | 54493 | __ret_672; \ |
| 52813 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | | |
| 52814 | __ret; \ | | |
| 52815 | }) | | |
| 52816 | #define __noswap_vfmaq_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 52817 | float32x4_t __ret; \ | | |
| 52818 | float32x4_t __s0 = __p0; \ | | |
| 52819 | float32x4_t __s1 = __p1; \ | | |
| 52820 | float32x2_t __s2 = __p2; \ | | |
| 52821 | __ret = (float32x4_t) __builtin_neon_vfmaq_lane_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x8_t)__s2, __p3, 41); \ | | |
| 52822 | __ret; \ | | |
| 52823 | }) | 54494 | }) |
| 52824 | #endif | 54495 | #endif |
| 52825 | | 54496 | |
| 52826 | #define vfma_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 52827 | float64x1_t __ret; \ | | |
| 52828 | float64x1_t __s0 = __p0; \ | | |
| 52829 | float64x1_t __s1 = __p1; \ | | |
| 52830 | float64x1_t __s2 = __p2; \ | | |
| 52831 | __ret = (float64x1_t) __builtin_neon_vfma_lane_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x8_t)__s2, __p3, 10); \ | | |
| 52832 | __ret; \ | | |
| 52833 | }) | | |
| 52834 | #ifdef __LITTLE_ENDIAN__ | 54497 | #ifdef __LITTLE_ENDIAN__ |
| 52835 | #define vfma_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54498 | #define vqrshrn_high_n_s32(__p0_673, __p1_673, __p2_673) __extension__ ({ \ |
| 52836 | float32x2_t __ret; \ | 54499 | int16x8_t __ret_673; \ |
| 52837 | float32x2_t __s0 = __p0; \ | 54500 | int16x4_t __s0_673 = __p0_673; \ |
| 52838 | float32x2_t __s1 = __p1; \ | 54501 | int32x4_t __s1_673 = __p1_673; \ |
| 52839 | float32x2_t __s2 = __p2; \ | 54502 | __ret_673 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_673), (int16x4_t)(vqrshrn_n_s32(__s1_673, __p2_673)))); \ |
| 52840 | __ret = (float32x2_t) __builtin_neon_vfma_lane_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x8_t)__s2, __p3, 9); \ | 54503 | __ret_673; \ |
| 52841 | __ret; \ | | |
| 52842 | }) | 54504 | }) |
| 52843 | #else | 54505 | #else |
| 52844 | #define vfma_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54506 | #define vqrshrn_high_n_s32(__p0_674, __p1_674, __p2_674) __extension__ ({ \ |
| 52845 | float32x2_t __ret; \ | 54507 | int16x8_t __ret_674; \ |
| 52846 | float32x2_t __s0 = __p0; \ | 54508 | int16x4_t __s0_674 = __p0_674; \ |
| 52847 | float32x2_t __s1 = __p1; \ | 54509 | int32x4_t __s1_674 = __p1_674; \ |
| 52848 | float32x2_t __s2 = __p2; \ | 54510 | int16x4_t __rev0_674; __rev0_674 = __builtin_shufflevector(__s0_674, __s0_674, 3, 2, 1, 0); \ |
| 52849 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 54511 | int32x4_t __rev1_674; __rev1_674 = __builtin_shufflevector(__s1_674, __s1_674, 3, 2, 1, 0); \ |
| 52850 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 54512 | __ret_674 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_674), (int16x4_t)(__noswap_vqrshrn_n_s32(__rev1_674, __p2_674)))); \ |
| 52851 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ | 54513 | __ret_674 = __builtin_shufflevector(__ret_674, __ret_674, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52852 | __ret = (float32x2_t) __builtin_neon_vfma_lane_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, __p3, 9); \ | 54514 | __ret_674; \ |
| 52853 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | | |
| 52854 | __ret; \ | | |
| 52855 | }) | | |
| 52856 | #define __noswap_vfma_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 52857 | float32x2_t __ret; \ | | |
| 52858 | float32x2_t __s0 = __p0; \ | | |
| 52859 | float32x2_t __s1 = __p1; \ | | |
| 52860 | float32x2_t __s2 = __p2; \ | | |
| 52861 | __ret = (float32x2_t) __builtin_neon_vfma_lane_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x8_t)__s2, __p3, 9); \ | | |
| 52862 | __ret; \ | | |
| 52863 | }) | 54515 | }) |
| 52864 | #endif | 54516 | #endif |
| 52865 | | 54517 | |
| 52866 | #ifdef __LITTLE_ENDIAN__ | 54518 | #ifdef __LITTLE_ENDIAN__ |
| 52867 | #define vfmad_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54519 | #define vqrshrn_high_n_s64(__p0_675, __p1_675, __p2_675) __extension__ ({ \ |
| 52868 | float64_t __ret; \ | 54520 | int32x4_t __ret_675; \ |
| 52869 | float64_t __s0 = __p0; \ | 54521 | int32x2_t __s0_675 = __p0_675; \ |
| 52870 | float64_t __s1 = __p1; \ | 54522 | int64x2_t __s1_675 = __p1_675; \ |
| 52871 | float64x2_t __s2 = __p2; \ | 54523 | __ret_675 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_675), (int32x2_t)(vqrshrn_n_s64(__s1_675, __p2_675)))); \ |
| 52872 | __ret = (float64_t) __builtin_neon_vfmad_laneq_f64(__s0, __s1, (float64x2_t)__s2, __p3); \ | 54524 | __ret_675; \ |
| 52873 | __ret; \ | | |
| 52874 | }) | 54525 | }) |
| 52875 | #else | 54526 | #else |
| 52876 | #define vfmad_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54527 | #define vqrshrn_high_n_s64(__p0_676, __p1_676, __p2_676) __extension__ ({ \ |
| 52877 | float64_t __ret; \ | 54528 | int32x4_t __ret_676; \ |
| 52878 | float64_t __s0 = __p0; \ | 54529 | int32x2_t __s0_676 = __p0_676; \ |
| 52879 | float64_t __s1 = __p1; \ | 54530 | int64x2_t __s1_676 = __p1_676; \ |
| 52880 | float64x2_t __s2 = __p2; \ | 54531 | int32x2_t __rev0_676; __rev0_676 = __builtin_shufflevector(__s0_676, __s0_676, 1, 0); \ |
| 52881 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ | 54532 | int64x2_t __rev1_676; __rev1_676 = __builtin_shufflevector(__s1_676, __s1_676, 1, 0); \ |
| 52882 | __ret = (float64_t) __builtin_neon_vfmad_laneq_f64(__s0, __s1, (float64x2_t)__rev2, __p3); \ | 54533 | __ret_676 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_676), (int32x2_t)(__noswap_vqrshrn_n_s64(__rev1_676, __p2_676)))); \ |
| 52883 | __ret; \ | 54534 | __ret_676 = __builtin_shufflevector(__ret_676, __ret_676, 3, 2, 1, 0); \ |
| 52884 | }) | 54535 | __ret_676; \ |
| 52885 | #define __noswap_vfmad_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 52886 | float64_t __ret; \ | | |
| 52887 | float64_t __s0 = __p0; \ | | |
| 52888 | float64_t __s1 = __p1; \ | | |
| 52889 | float64x2_t __s2 = __p2; \ | | |
| 52890 | __ret = (float64_t) __builtin_neon_vfmad_laneq_f64(__s0, __s1, (float64x2_t)__s2, __p3); \ | | |
| 52891 | __ret; \ | | |
| 52892 | }) | 54536 | }) |
| 52893 | #endif | 54537 | #endif |
| 52894 | | 54538 | |
| 52895 | #ifdef __LITTLE_ENDIAN__ | 54539 | #ifdef __LITTLE_ENDIAN__ |
| 52896 | #define vfmas_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54540 | #define vqrshrn_high_n_s16(__p0_677, __p1_677, __p2_677) __extension__ ({ \ |
| 52897 | float32_t __ret; \ | 54541 | int8x16_t __ret_677; \ |
| 52898 | float32_t __s0 = __p0; \ | 54542 | int8x8_t __s0_677 = __p0_677; \ |
| 52899 | float32_t __s1 = __p1; \ | 54543 | int16x8_t __s1_677 = __p1_677; \ |
| 52900 | float32x4_t __s2 = __p2; \ | 54544 | __ret_677 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_677), (int8x8_t)(vqrshrn_n_s16(__s1_677, __p2_677)))); \ |
| 52901 | __ret = (float32_t) __builtin_neon_vfmas_laneq_f32(__s0, __s1, (float32x4_t)__s2, __p3); \ | 54545 | __ret_677; \ |
| 52902 | __ret; \ | | |
| 52903 | }) | 54546 | }) |
| 52904 | #else | 54547 | #else |
| 52905 | #define vfmas_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54548 | #define vqrshrn_high_n_s16(__p0_678, __p1_678, __p2_678) __extension__ ({ \ |
| 52906 | float32_t __ret; \ | 54549 | int8x16_t __ret_678; \ |
| 52907 | float32_t __s0 = __p0; \ | 54550 | int8x8_t __s0_678 = __p0_678; \ |
| 52908 | float32_t __s1 = __p1; \ | 54551 | int16x8_t __s1_678 = __p1_678; \ |
| 52909 | float32x4_t __s2 = __p2; \ | 54552 | int8x8_t __rev0_678; __rev0_678 = __builtin_shufflevector(__s0_678, __s0_678, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52910 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | 54553 | int16x8_t __rev1_678; __rev1_678 = __builtin_shufflevector(__s1_678, __s1_678, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52911 | __ret = (float32_t) __builtin_neon_vfmas_laneq_f32(__s0, __s1, (float32x4_t)__rev2, __p3); \ | 54554 | __ret_678 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_678), (int8x8_t)(__noswap_vqrshrn_n_s16(__rev1_678, __p2_678)))); \ |
| 52912 | __ret; \ | 54555 | __ret_678 = __builtin_shufflevector(__ret_678, __ret_678, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52913 | }) | 54556 | __ret_678; \ |
| 52914 | #define __noswap_vfmas_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 52915 | float32_t __ret; \ | | |
| 52916 | float32_t __s0 = __p0; \ | | |
| 52917 | float32_t __s1 = __p1; \ | | |
| 52918 | float32x4_t __s2 = __p2; \ | | |
| 52919 | __ret = (float32_t) __builtin_neon_vfmas_laneq_f32(__s0, __s1, (float32x4_t)__s2, __p3); \ | | |
| 52920 | __ret; \ | | |
| 52921 | }) | 54557 | }) |
| 52922 | #endif | 54558 | #endif |
| 52923 | | 54559 | |
| 52924 | #ifdef __LITTLE_ENDIAN__ | 54560 | #define vqrshrns_n_u32(__p0, __p1) __extension__ ({ \ |
| 52925 | #define vfmaq_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54561 | uint16_t __ret; \ |
| 52926 | float64x2_t __ret; \ | 54562 | uint32_t __s0 = __p0; \ |
| 52927 | float64x2_t __s0 = __p0; \ | 54563 | __ret = (uint16_t) __builtin_neon_vqrshrns_n_u32(__s0, __p1); \ |
| 52928 | float64x2_t __s1 = __p1; \ | | |
| 52929 | float64x2_t __s2 = __p2; \ | | |
| 52930 | __ret = (float64x2_t) __builtin_neon_vfmaq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 42); \ | | |
| 52931 | __ret; \ | 54564 | __ret; \ |
| 52932 | }) | 54565 | }) |
| 52933 | #else | 54566 | #define vqrshrnd_n_u64(__p0, __p1) __extension__ ({ \ |
| 52934 | #define vfmaq_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54567 | uint32_t __ret; \ |
| 52935 | float64x2_t __ret; \ | 54568 | uint64_t __s0 = __p0; \ |
| 52936 | float64x2_t __s0 = __p0; \ | 54569 | __ret = (uint32_t) __builtin_neon_vqrshrnd_n_u64(__s0, __p1); \ |
| 52937 | float64x2_t __s1 = __p1; \ | | |
| 52938 | float64x2_t __s2 = __p2; \ | | |
| 52939 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | | |
| 52940 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | | |
| 52941 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ | | |
| 52942 | __ret = (float64x2_t) __builtin_neon_vfmaq_laneq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 42); \ | | |
| 52943 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | | |
| 52944 | __ret; \ | 54570 | __ret; \ |
| 52945 | }) | 54571 | }) |
| 52946 | #define __noswap_vfmaq_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54572 | #define vqrshrnh_n_u16(__p0, __p1) __extension__ ({ \ |
| 52947 | float64x2_t __ret; \ | 54573 | uint8_t __ret; \ |
| 52948 | float64x2_t __s0 = __p0; \ | 54574 | uint16_t __s0 = __p0; \ |
| 52949 | float64x2_t __s1 = __p1; \ | 54575 | __ret = (uint8_t) __builtin_neon_vqrshrnh_n_u16(__s0, __p1); \ |
| 52950 | float64x2_t __s2 = __p2; \ | | |
| 52951 | __ret = (float64x2_t) __builtin_neon_vfmaq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 42); \ | | |
| 52952 | __ret; \ | 54576 | __ret; \ |
| 52953 | }) | 54577 | }) |
| 52954 | #endif | 54578 | #define vqrshrns_n_s32(__p0, __p1) __extension__ ({ \ |
| 52955 | | 54579 | int16_t __ret; \ |
| 52956 | #ifdef __LITTLE_ENDIAN__ | 54580 | int32_t __s0 = __p0; \ |
| 52957 | #define vfmaq_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54581 | __ret = (int16_t) __builtin_neon_vqrshrns_n_s32(__s0, __p1); \ |
| 52958 | float32x4_t __ret; \ | | |
| 52959 | float32x4_t __s0 = __p0; \ | | |
| 52960 | float32x4_t __s1 = __p1; \ | | |
| 52961 | float32x4_t __s2 = __p2; \ | | |
| 52962 | __ret = (float32x4_t) __builtin_neon_vfmaq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 41); \ | | |
| 52963 | __ret; \ | 54582 | __ret; \ |
| 52964 | }) | 54583 | }) |
| 52965 | #else | 54584 | #define vqrshrnd_n_s64(__p0, __p1) __extension__ ({ \ |
| 52966 | #define vfmaq_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54585 | int32_t __ret; \ |
| 52967 | float32x4_t __ret; \ | 54586 | int64_t __s0 = __p0; \ |
| 52968 | float32x4_t __s0 = __p0; \ | 54587 | __ret = (int32_t) __builtin_neon_vqrshrnd_n_s64(__s0, __p1); \ |
| 52969 | float32x4_t __s1 = __p1; \ | | |
| 52970 | float32x4_t __s2 = __p2; \ | | |
| 52971 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | | |
| 52972 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | | |
| 52973 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | | |
| 52974 | __ret = (float32x4_t) __builtin_neon_vfmaq_laneq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 41); \ | | |
| 52975 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | | |
| 52976 | __ret; \ | 54588 | __ret; \ |
| 52977 | }) | 54589 | }) |
| 52978 | #define __noswap_vfmaq_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54590 | #define vqrshrnh_n_s16(__p0, __p1) __extension__ ({ \ |
| 52979 | float32x4_t __ret; \ | 54591 | int8_t __ret; \ |
| 52980 | float32x4_t __s0 = __p0; \ | 54592 | int16_t __s0 = __p0; \ |
| 52981 | float32x4_t __s1 = __p1; \ | 54593 | __ret = (int8_t) __builtin_neon_vqrshrnh_n_s16(__s0, __p1); \ |
| 52982 | float32x4_t __s2 = __p2; \ | | |
| 52983 | __ret = (float32x4_t) __builtin_neon_vfmaq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 41); \ | | |
| 52984 | __ret; \ | 54594 | __ret; \ |
| 52985 | }) | 54595 | }) |
| 52986 | #endif | | |
| 52987 | | | |
| 52988 | #ifdef __LITTLE_ENDIAN__ | 54596 | #ifdef __LITTLE_ENDIAN__ |
| 52989 | #define vfma_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54597 | #define vqrshrun_high_n_s32(__p0_679, __p1_679, __p2_679) __extension__ ({ \ |
| 52990 | float64x1_t __ret; \ | 54598 | int16x8_t __ret_679; \ |
| 52991 | float64x1_t __s0 = __p0; \ | 54599 | int16x4_t __s0_679 = __p0_679; \ |
| 52992 | float64x1_t __s1 = __p1; \ | 54600 | int32x4_t __s1_679 = __p1_679; \ |
| 52993 | float64x2_t __s2 = __p2; \ | 54601 | __ret_679 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_679), (int16x4_t)(vqrshrun_n_s32(__s1_679, __p2_679)))); \ |
| 52994 | __ret = (float64x1_t) __builtin_neon_vfma_laneq_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x16_t)__s2, __p3, 10); \ | 54602 | __ret_679; \ |
| 52995 | __ret; \ | | |
| 52996 | }) | 54603 | }) |
| 52997 | #else | 54604 | #else |
| 52998 | #define vfma_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54605 | #define vqrshrun_high_n_s32(__p0_680, __p1_680, __p2_680) __extension__ ({ \ |
| 52999 | float64x1_t __ret; \ | 54606 | int16x8_t __ret_680; \ |
| 53000 | float64x1_t __s0 = __p0; \ | 54607 | int16x4_t __s0_680 = __p0_680; \ |
| 53001 | float64x1_t __s1 = __p1; \ | 54608 | int32x4_t __s1_680 = __p1_680; \ |
| 53002 | float64x2_t __s2 = __p2; \ | 54609 | int16x4_t __rev0_680; __rev0_680 = __builtin_shufflevector(__s0_680, __s0_680, 3, 2, 1, 0); \ |
| 53003 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ | 54610 | int32x4_t __rev1_680; __rev1_680 = __builtin_shufflevector(__s1_680, __s1_680, 3, 2, 1, 0); \ |
| 53004 | __ret = (float64x1_t) __builtin_neon_vfma_laneq_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x16_t)__rev2, __p3, 10); \ | 54611 | __ret_680 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_680), (int16x4_t)(__noswap_vqrshrun_n_s32(__rev1_680, __p2_680)))); \ |
| 53005 | __ret; \ | 54612 | __ret_680 = __builtin_shufflevector(__ret_680, __ret_680, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 54613 | __ret_680; \ |
| | 54614 | }) |
| | 54615 | #endif |
| | 54616 | |
| | 54617 | #ifdef __LITTLE_ENDIAN__ |
| | 54618 | #define vqrshrun_high_n_s64(__p0_681, __p1_681, __p2_681) __extension__ ({ \ |
| | 54619 | int32x4_t __ret_681; \ |
| | 54620 | int32x2_t __s0_681 = __p0_681; \ |
| | 54621 | int64x2_t __s1_681 = __p1_681; \ |
| | 54622 | __ret_681 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_681), (int32x2_t)(vqrshrun_n_s64(__s1_681, __p2_681)))); \ |
| | 54623 | __ret_681; \ |
| 53006 | }) | 54624 | }) |
| 53007 | #define __noswap_vfma_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54625 | #else |
| 53008 | float64x1_t __ret; \ | 54626 | #define vqrshrun_high_n_s64(__p0_682, __p1_682, __p2_682) __extension__ ({ \ |
| 53009 | float64x1_t __s0 = __p0; \ | 54627 | int32x4_t __ret_682; \ |
| 53010 | float64x1_t __s1 = __p1; \ | 54628 | int32x2_t __s0_682 = __p0_682; \ |
| 53011 | float64x2_t __s2 = __p2; \ | 54629 | int64x2_t __s1_682 = __p1_682; \ |
| 53012 | __ret = (float64x1_t) __builtin_neon_vfma_laneq_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x16_t)__s2, __p3, 10); \ | 54630 | int32x2_t __rev0_682; __rev0_682 = __builtin_shufflevector(__s0_682, __s0_682, 1, 0); \ |
| 53013 | __ret; \ | 54631 | int64x2_t __rev1_682; __rev1_682 = __builtin_shufflevector(__s1_682, __s1_682, 1, 0); \ |
| | 54632 | __ret_682 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_682), (int32x2_t)(__noswap_vqrshrun_n_s64(__rev1_682, __p2_682)))); \ |
| | 54633 | __ret_682 = __builtin_shufflevector(__ret_682, __ret_682, 3, 2, 1, 0); \ |
| | 54634 | __ret_682; \ |
| 53014 | }) | 54635 | }) |
| 53015 | #endif | 54636 | #endif |
| 53016 | | 54637 | |
| 53017 | #ifdef __LITTLE_ENDIAN__ | 54638 | #ifdef __LITTLE_ENDIAN__ |
| 53018 | #define vfma_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54639 | #define vqrshrun_high_n_s16(__p0_683, __p1_683, __p2_683) __extension__ ({ \ |
| 53019 | float32x2_t __ret; \ | 54640 | int8x16_t __ret_683; \ |
| 53020 | float32x2_t __s0 = __p0; \ | 54641 | int8x8_t __s0_683 = __p0_683; \ |
| 53021 | float32x2_t __s1 = __p1; \ | 54642 | int16x8_t __s1_683 = __p1_683; \ |
| 53022 | float32x4_t __s2 = __p2; \ | 54643 | __ret_683 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_683), (int8x8_t)(vqrshrun_n_s16(__s1_683, __p2_683)))); \ |
| 53023 | __ret = (float32x2_t) __builtin_neon_vfma_laneq_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x16_t)__s2, __p3, 9); \ | 54644 | __ret_683; \ |
| 53024 | __ret; \ | | |
| 53025 | }) | 54645 | }) |
| 53026 | #else | 54646 | #else |
| 53027 | #define vfma_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54647 | #define vqrshrun_high_n_s16(__p0_684, __p1_684, __p2_684) __extension__ ({ \ |
| 53028 | float32x2_t __ret; \ | 54648 | int8x16_t __ret_684; \ |
| 53029 | float32x2_t __s0 = __p0; \ | 54649 | int8x8_t __s0_684 = __p0_684; \ |
| 53030 | float32x2_t __s1 = __p1; \ | 54650 | int16x8_t __s1_684 = __p1_684; \ |
| 53031 | float32x4_t __s2 = __p2; \ | 54651 | int8x8_t __rev0_684; __rev0_684 = __builtin_shufflevector(__s0_684, __s0_684, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53032 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 54652 | int16x8_t __rev1_684; __rev1_684 = __builtin_shufflevector(__s1_684, __s1_684, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53033 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 54653 | __ret_684 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_684), (int8x8_t)(__noswap_vqrshrun_n_s16(__rev1_684, __p2_684)))); \ |
| 53034 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | 54654 | __ret_684 = __builtin_shufflevector(__ret_684, __ret_684, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53035 | __ret = (float32x2_t) __builtin_neon_vfma_laneq_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x16_t)__rev2, __p3, 9); \ | 54655 | __ret_684; \ |
| 53036 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 54656 | }) |
| | 54657 | #endif |
| | 54658 | |
| | 54659 | #define vqrshruns_n_s32(__p0, __p1) __extension__ ({ \ |
| | 54660 | int16_t __ret; \ |
| | 54661 | int32_t __s0 = __p0; \ |
| | 54662 | __ret = (int16_t) __builtin_neon_vqrshruns_n_s32(__s0, __p1); \ |
| 53037 | __ret; \ | 54663 | __ret; \ |
| 53038 | }) | 54664 | }) |
| 53039 | #define __noswap_vfma_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 54665 | #define vqrshrund_n_s64(__p0, __p1) __extension__ ({ \ |
| 53040 | float32x2_t __ret; \ | 54666 | int32_t __ret; \ |
| 53041 | float32x2_t __s0 = __p0; \ | 54667 | int64_t __s0 = __p0; \ |
| 53042 | float32x2_t __s1 = __p1; \ | 54668 | __ret = (int32_t) __builtin_neon_vqrshrund_n_s64(__s0, __p1); \ |
| 53043 | float32x4_t __s2 = __p2; \ | | |
| 53044 | __ret = (float32x2_t) __builtin_neon_vfma_laneq_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x16_t)__s2, __p3, 9); \ | | |
| 53045 | __ret; \ | 54669 | __ret; \ |
| 53046 | }) | 54670 | }) |
| 53047 | #endif | 54671 | #define vqrshrunh_n_s16(__p0, __p1) __extension__ ({ \ |
| 53048 | | 54672 | int8_t __ret; \ |
| 53049 | #ifdef __LITTLE_ENDIAN__ | 54673 | int16_t __s0 = __p0; \ |
| 53050 | __ai float64x2_t vfmaq_n_f64(float64x2_t __p0, float64x2_t __p1, float64_t __p2) { | 54674 | __ret = (int8_t) __builtin_neon_vqrshrunh_n_s16(__s0, __p1); \ |
| 53051 | float64x2_t __ret; | 54675 | __ret; \ |
| 53052 | __ret = vfmaq_f64(__p0, __p1, (float64x2_t) {__p2, __p2}); | 54676 | }) |
| | 54677 | __ai uint8_t vqshlb_u8(uint8_t __p0, int8_t __p1) { |
| | 54678 | uint8_t __ret; |
| | 54679 | __ret = (uint8_t) __builtin_neon_vqshlb_u8(__p0, __p1); |
| 53053 | return __ret; | 54680 | return __ret; |
| 53054 | } | 54681 | } |
| 53055 | #else | 54682 | __ai uint32_t vqshls_u32(uint32_t __p0, int32_t __p1) { |
| 53056 | __ai float64x2_t vfmaq_n_f64(float64x2_t __p0, float64x2_t __p1, float64_t __p2) { | 54683 | uint32_t __ret; |
| 53057 | float64x2_t __ret; | 54684 | __ret = (uint32_t) __builtin_neon_vqshls_u32(__p0, __p1); |
| 53058 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 53059 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 53060 | __ret = __noswap_vfmaq_f64(__rev0, __rev1, (float64x2_t) {__p2, __p2}); | | |
| 53061 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 53062 | return __ret; | 54685 | return __ret; |
| 53063 | } | 54686 | } |
| 53064 | #endif | 54687 | __ai uint64_t vqshld_u64(uint64_t __p0, int64_t __p1) { |
| 53065 | | 54688 | uint64_t __ret; |
| 53066 | __ai float64x1_t vfma_n_f64(float64x1_t __p0, float64x1_t __p1, float64_t __p2) { | 54689 | __ret = (uint64_t) __builtin_neon_vqshld_u64(__p0, __p1); |
| 53067 | float64x1_t __ret; | | |
| 53068 | __ret = vfma_f64(__p0, __p1, (float64x1_t) {__p2}); | | |
| 53069 | return __ret; | 54690 | return __ret; |
| 53070 | } | 54691 | } |
| 53071 | #ifdef __LITTLE_ENDIAN__ | 54692 | __ai uint16_t vqshlh_u16(uint16_t __p0, int16_t __p1) { |
| 53072 | __ai float64x2_t vfmsq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 54693 | uint16_t __ret; |
| 53073 | float64x2_t __ret; | 54694 | __ret = (uint16_t) __builtin_neon_vqshlh_u16(__p0, __p1); |
| 53074 | __ret = vfmaq_f64(__p0, -__p1, __p2); | | |
| 53075 | return __ret; | 54695 | return __ret; |
| 53076 | } | 54696 | } |
| 53077 | #else | 54697 | __ai int8_t vqshlb_s8(int8_t __p0, int8_t __p1) { |
| 53078 | __ai float64x2_t vfmsq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 54698 | int8_t __ret; |
| 53079 | float64x2_t __ret; | 54699 | __ret = (int8_t) __builtin_neon_vqshlb_s8(__p0, __p1); |
| 53080 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 53081 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 53082 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 53083 | __ret = __noswap_vfmaq_f64(__rev0, -__rev1, __rev2); | | |
| 53084 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 53085 | return __ret; | 54700 | return __ret; |
| 53086 | } | 54701 | } |
| 53087 | #endif | 54702 | __ai int32_t vqshls_s32(int32_t __p0, int32_t __p1) { |
| 53088 | | 54703 | int32_t __ret; |
| 53089 | __ai float64x1_t vfms_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | 54704 | __ret = (int32_t) __builtin_neon_vqshls_s32(__p0, __p1); |
| 53090 | float64x1_t __ret; | | |
| 53091 | __ret = vfma_f64(__p0, -__p1, __p2); | | |
| 53092 | return __ret; | 54705 | return __ret; |
| 53093 | } | 54706 | } |
| 53094 | #define vfmsd_lane_f64(__p0_509, __p1_509, __p2_509, __p3_509) __extension__ ({ \ | 54707 | __ai int64_t vqshld_s64(int64_t __p0, int64_t __p1) { |
| 53095 | float64_t __ret_509; \ | 54708 | int64_t __ret; |
| 53096 | float64_t __s0_509 = __p0_509; \ | 54709 | __ret = (int64_t) __builtin_neon_vqshld_s64(__p0, __p1); |
| 53097 | float64_t __s1_509 = __p1_509; \ | 54710 | return __ret; |
| 53098 | float64x1_t __s2_509 = __p2_509; \ | 54711 | } |
| 53099 | __ret_509 = vfmad_lane_f64(__s0_509, -__s1_509, __s2_509, __p3_509); \ | 54712 | __ai int16_t vqshlh_s16(int16_t __p0, int16_t __p1) { |
| 53100 | __ret_509; \ | 54713 | int16_t __ret; |
| | 54714 | __ret = (int16_t) __builtin_neon_vqshlh_s16(__p0, __p1); |
| | 54715 | return __ret; |
| | 54716 | } |
| | 54717 | #define vqshlb_n_u8(__p0, __p1) __extension__ ({ \ |
| | 54718 | uint8_t __ret; \ |
| | 54719 | uint8_t __s0 = __p0; \ |
| | 54720 | __ret = (uint8_t) __builtin_neon_vqshlb_n_u8(__s0, __p1); \ |
| | 54721 | __ret; \ |
| 53101 | }) | 54722 | }) |
| 53102 | #ifdef __LITTLE_ENDIAN__ | 54723 | #define vqshls_n_u32(__p0, __p1) __extension__ ({ \ |
| 53103 | #define vfmss_lane_f32(__p0_510, __p1_510, __p2_510, __p3_510) __extension__ ({ \ | 54724 | uint32_t __ret; \ |
| 53104 | float32_t __ret_510; \ | 54725 | uint32_t __s0 = __p0; \ |
| 53105 | float32_t __s0_510 = __p0_510; \ | 54726 | __ret = (uint32_t) __builtin_neon_vqshls_n_u32(__s0, __p1); \ |
| 53106 | float32_t __s1_510 = __p1_510; \ | 54727 | __ret; \ |
| 53107 | float32x2_t __s2_510 = __p2_510; \ | | |
| 53108 | __ret_510 = vfmas_lane_f32(__s0_510, -__s1_510, __s2_510, __p3_510); \ | | |
| 53109 | __ret_510; \ | | |
| 53110 | }) | 54728 | }) |
| 53111 | #else | 54729 | #define vqshld_n_u64(__p0, __p1) __extension__ ({ \ |
| 53112 | #define vfmss_lane_f32(__p0_511, __p1_511, __p2_511, __p3_511) __extension__ ({ \ | 54730 | uint64_t __ret; \ |
| 53113 | float32_t __ret_511; \ | 54731 | uint64_t __s0 = __p0; \ |
| 53114 | float32_t __s0_511 = __p0_511; \ | 54732 | __ret = (uint64_t) __builtin_neon_vqshld_n_u64(__s0, __p1); \ |
| 53115 | float32_t __s1_511 = __p1_511; \ | 54733 | __ret; \ |
| 53116 | float32x2_t __s2_511 = __p2_511; \ | 54734 | }) |
| 53117 | float32x2_t __rev2_511; __rev2_511 = __builtin_shufflevector(__s2_511, __s2_511, 1, 0); \ | 54735 | #define vqshlh_n_u16(__p0, __p1) __extension__ ({ \ |
| 53118 | __ret_511 = __noswap_vfmas_lane_f32(__s0_511, -__s1_511, __rev2_511, __p3_511); \ | 54736 | uint16_t __ret; \ |
| 53119 | __ret_511; \ | 54737 | uint16_t __s0 = __p0; \ |
| | 54738 | __ret = (uint16_t) __builtin_neon_vqshlh_n_u16(__s0, __p1); \ |
| | 54739 | __ret; \ |
| | 54740 | }) |
| | 54741 | #define vqshlb_n_s8(__p0, __p1) __extension__ ({ \ |
| | 54742 | int8_t __ret; \ |
| | 54743 | int8_t __s0 = __p0; \ |
| | 54744 | __ret = (int8_t) __builtin_neon_vqshlb_n_s8(__s0, __p1); \ |
| | 54745 | __ret; \ |
| | 54746 | }) |
| | 54747 | #define vqshls_n_s32(__p0, __p1) __extension__ ({ \ |
| | 54748 | int32_t __ret; \ |
| | 54749 | int32_t __s0 = __p0; \ |
| | 54750 | __ret = (int32_t) __builtin_neon_vqshls_n_s32(__s0, __p1); \ |
| | 54751 | __ret; \ |
| | 54752 | }) |
| | 54753 | #define vqshld_n_s64(__p0, __p1) __extension__ ({ \ |
| | 54754 | int64_t __ret; \ |
| | 54755 | int64_t __s0 = __p0; \ |
| | 54756 | __ret = (int64_t) __builtin_neon_vqshld_n_s64(__s0, __p1); \ |
| | 54757 | __ret; \ |
| | 54758 | }) |
| | 54759 | #define vqshlh_n_s16(__p0, __p1) __extension__ ({ \ |
| | 54760 | int16_t __ret; \ |
| | 54761 | int16_t __s0 = __p0; \ |
| | 54762 | __ret = (int16_t) __builtin_neon_vqshlh_n_s16(__s0, __p1); \ |
| | 54763 | __ret; \ |
| | 54764 | }) |
| | 54765 | #define vqshlub_n_s8(__p0, __p1) __extension__ ({ \ |
| | 54766 | int8_t __ret; \ |
| | 54767 | int8_t __s0 = __p0; \ |
| | 54768 | __ret = (int8_t) __builtin_neon_vqshlub_n_s8(__s0, __p1); \ |
| | 54769 | __ret; \ |
| | 54770 | }) |
| | 54771 | #define vqshlus_n_s32(__p0, __p1) __extension__ ({ \ |
| | 54772 | int32_t __ret; \ |
| | 54773 | int32_t __s0 = __p0; \ |
| | 54774 | __ret = (int32_t) __builtin_neon_vqshlus_n_s32(__s0, __p1); \ |
| | 54775 | __ret; \ |
| | 54776 | }) |
| | 54777 | #define vqshlud_n_s64(__p0, __p1) __extension__ ({ \ |
| | 54778 | int64_t __ret; \ |
| | 54779 | int64_t __s0 = __p0; \ |
| | 54780 | __ret = (int64_t) __builtin_neon_vqshlud_n_s64(__s0, __p1); \ |
| | 54781 | __ret; \ |
| | 54782 | }) |
| | 54783 | #define vqshluh_n_s16(__p0, __p1) __extension__ ({ \ |
| | 54784 | int16_t __ret; \ |
| | 54785 | int16_t __s0 = __p0; \ |
| | 54786 | __ret = (int16_t) __builtin_neon_vqshluh_n_s16(__s0, __p1); \ |
| | 54787 | __ret; \ |
| 53120 | }) | 54788 | }) |
| 53121 | #endif | | |
| 53122 | | | |
| 53123 | #ifdef __LITTLE_ENDIAN__ | 54789 | #ifdef __LITTLE_ENDIAN__ |
| 53124 | #define vfmsq_lane_f64(__p0_512, __p1_512, __p2_512, __p3_512) __extension__ ({ \ | 54790 | #define vqshrn_high_n_u32(__p0_685, __p1_685, __p2_685) __extension__ ({ \ |
| 53125 | float64x2_t __ret_512; \ | 54791 | uint16x8_t __ret_685; \ |
| 53126 | float64x2_t __s0_512 = __p0_512; \ | 54792 | uint16x4_t __s0_685 = __p0_685; \ |
| 53127 | float64x2_t __s1_512 = __p1_512; \ | 54793 | uint32x4_t __s1_685 = __p1_685; \ |
| 53128 | float64x1_t __s2_512 = __p2_512; \ | 54794 | __ret_685 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_685), (uint16x4_t)(vqshrn_n_u32(__s1_685, __p2_685)))); \ |
| 53129 | __ret_512 = vfmaq_lane_f64(__s0_512, -__s1_512, __s2_512, __p3_512); \ | 54795 | __ret_685; \ |
| 53130 | __ret_512; \ | | |
| 53131 | }) | 54796 | }) |
| 53132 | #else | 54797 | #else |
| 53133 | #define vfmsq_lane_f64(__p0_513, __p1_513, __p2_513, __p3_513) __extension__ ({ \ | 54798 | #define vqshrn_high_n_u32(__p0_686, __p1_686, __p2_686) __extension__ ({ \ |
| 53134 | float64x2_t __ret_513; \ | 54799 | uint16x8_t __ret_686; \ |
| 53135 | float64x2_t __s0_513 = __p0_513; \ | 54800 | uint16x4_t __s0_686 = __p0_686; \ |
| 53136 | float64x2_t __s1_513 = __p1_513; \ | 54801 | uint32x4_t __s1_686 = __p1_686; \ |
| 53137 | float64x1_t __s2_513 = __p2_513; \ | 54802 | uint16x4_t __rev0_686; __rev0_686 = __builtin_shufflevector(__s0_686, __s0_686, 3, 2, 1, 0); \ |
| 53138 | float64x2_t __rev0_513; __rev0_513 = __builtin_shufflevector(__s0_513, __s0_513, 1, 0); \ | 54803 | uint32x4_t __rev1_686; __rev1_686 = __builtin_shufflevector(__s1_686, __s1_686, 3, 2, 1, 0); \ |
| 53139 | float64x2_t __rev1_513; __rev1_513 = __builtin_shufflevector(__s1_513, __s1_513, 1, 0); \ | 54804 | __ret_686 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_686), (uint16x4_t)(__noswap_vqshrn_n_u32(__rev1_686, __p2_686)))); \ |
| 53140 | __ret_513 = __noswap_vfmaq_lane_f64(__rev0_513, -__rev1_513, __s2_513, __p3_513); \ | 54805 | __ret_686 = __builtin_shufflevector(__ret_686, __ret_686, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53141 | __ret_513 = __builtin_shufflevector(__ret_513, __ret_513, 1, 0); \ | 54806 | __ret_686; \ |
| 53142 | __ret_513; \ | | |
| 53143 | }) | 54807 | }) |
| 53144 | #endif | 54808 | #endif |
| 53145 | | 54809 | |
| 53146 | #ifdef __LITTLE_ENDIAN__ | 54810 | #ifdef __LITTLE_ENDIAN__ |
| 53147 | #define vfmsq_lane_f32(__p0_514, __p1_514, __p2_514, __p3_514) __extension__ ({ \ | 54811 | #define vqshrn_high_n_u64(__p0_687, __p1_687, __p2_687) __extension__ ({ \ |
| 53148 | float32x4_t __ret_514; \ | 54812 | uint32x4_t __ret_687; \ |
| 53149 | float32x4_t __s0_514 = __p0_514; \ | 54813 | uint32x2_t __s0_687 = __p0_687; \ |
| 53150 | float32x4_t __s1_514 = __p1_514; \ | 54814 | uint64x2_t __s1_687 = __p1_687; \ |
| 53151 | float32x2_t __s2_514 = __p2_514; \ | 54815 | __ret_687 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_687), (uint32x2_t)(vqshrn_n_u64(__s1_687, __p2_687)))); \ |
| 53152 | __ret_514 = vfmaq_lane_f32(__s0_514, -__s1_514, __s2_514, __p3_514); \ | 54816 | __ret_687; \ |
| 53153 | __ret_514; \ | | |
| 53154 | }) | 54817 | }) |
| 53155 | #else | 54818 | #else |
| 53156 | #define vfmsq_lane_f32(__p0_515, __p1_515, __p2_515, __p3_515) __extension__ ({ \ | 54819 | #define vqshrn_high_n_u64(__p0_688, __p1_688, __p2_688) __extension__ ({ \ |
| 53157 | float32x4_t __ret_515; \ | 54820 | uint32x4_t __ret_688; \ |
| 53158 | float32x4_t __s0_515 = __p0_515; \ | 54821 | uint32x2_t __s0_688 = __p0_688; \ |
| 53159 | float32x4_t __s1_515 = __p1_515; \ | 54822 | uint64x2_t __s1_688 = __p1_688; \ |
| 53160 | float32x2_t __s2_515 = __p2_515; \ | 54823 | uint32x2_t __rev0_688; __rev0_688 = __builtin_shufflevector(__s0_688, __s0_688, 1, 0); \ |
| 53161 | float32x4_t __rev0_515; __rev0_515 = __builtin_shufflevector(__s0_515, __s0_515, 3, 2, 1, 0); \ | 54824 | uint64x2_t __rev1_688; __rev1_688 = __builtin_shufflevector(__s1_688, __s1_688, 1, 0); \ |
| 53162 | float32x4_t __rev1_515; __rev1_515 = __builtin_shufflevector(__s1_515, __s1_515, 3, 2, 1, 0); \ | 54825 | __ret_688 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_688), (uint32x2_t)(__noswap_vqshrn_n_u64(__rev1_688, __p2_688)))); \ |
| 53163 | float32x2_t __rev2_515; __rev2_515 = __builtin_shufflevector(__s2_515, __s2_515, 1, 0); \ | 54826 | __ret_688 = __builtin_shufflevector(__ret_688, __ret_688, 3, 2, 1, 0); \ |
| 53164 | __ret_515 = __noswap_vfmaq_lane_f32(__rev0_515, -__rev1_515, __rev2_515, __p3_515); \ | 54827 | __ret_688; \ |
| 53165 | __ret_515 = __builtin_shufflevector(__ret_515, __ret_515, 3, 2, 1, 0); \ | | |
| 53166 | __ret_515; \ | | |
| 53167 | }) | 54828 | }) |
| 53168 | #endif | 54829 | #endif |
| 53169 | | 54830 | |
| 53170 | #define vfms_lane_f64(__p0_516, __p1_516, __p2_516, __p3_516) __extension__ ({ \ | | |
| 53171 | float64x1_t __ret_516; \ | | |
| 53172 | float64x1_t __s0_516 = __p0_516; \ | | |
| 53173 | float64x1_t __s1_516 = __p1_516; \ | | |
| 53174 | float64x1_t __s2_516 = __p2_516; \ | | |
| 53175 | __ret_516 = vfma_lane_f64(__s0_516, -__s1_516, __s2_516, __p3_516); \ | | |
| 53176 | __ret_516; \ | | |
| 53177 | }) | | |
| 53178 | #ifdef __LITTLE_ENDIAN__ | 54831 | #ifdef __LITTLE_ENDIAN__ |
| 53179 | #define vfms_lane_f32(__p0_517, __p1_517, __p2_517, __p3_517) __extension__ ({ \ | 54832 | #define vqshrn_high_n_u16(__p0_689, __p1_689, __p2_689) __extension__ ({ \ |
| 53180 | float32x2_t __ret_517; \ | 54833 | uint8x16_t __ret_689; \ |
| 53181 | float32x2_t __s0_517 = __p0_517; \ | 54834 | uint8x8_t __s0_689 = __p0_689; \ |
| 53182 | float32x2_t __s1_517 = __p1_517; \ | 54835 | uint16x8_t __s1_689 = __p1_689; \ |
| 53183 | float32x2_t __s2_517 = __p2_517; \ | 54836 | __ret_689 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_689), (uint8x8_t)(vqshrn_n_u16(__s1_689, __p2_689)))); \ |
| 53184 | __ret_517 = vfma_lane_f32(__s0_517, -__s1_517, __s2_517, __p3_517); \ | 54837 | __ret_689; \ |
| 53185 | __ret_517; \ | | |
| 53186 | }) | 54838 | }) |
| 53187 | #else | 54839 | #else |
| 53188 | #define vfms_lane_f32(__p0_518, __p1_518, __p2_518, __p3_518) __extension__ ({ \ | 54840 | #define vqshrn_high_n_u16(__p0_690, __p1_690, __p2_690) __extension__ ({ \ |
| 53189 | float32x2_t __ret_518; \ | 54841 | uint8x16_t __ret_690; \ |
| 53190 | float32x2_t __s0_518 = __p0_518; \ | 54842 | uint8x8_t __s0_690 = __p0_690; \ |
| 53191 | float32x2_t __s1_518 = __p1_518; \ | 54843 | uint16x8_t __s1_690 = __p1_690; \ |
| 53192 | float32x2_t __s2_518 = __p2_518; \ | 54844 | uint8x8_t __rev0_690; __rev0_690 = __builtin_shufflevector(__s0_690, __s0_690, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53193 | float32x2_t __rev0_518; __rev0_518 = __builtin_shufflevector(__s0_518, __s0_518, 1, 0); \ | 54845 | uint16x8_t __rev1_690; __rev1_690 = __builtin_shufflevector(__s1_690, __s1_690, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53194 | float32x2_t __rev1_518; __rev1_518 = __builtin_shufflevector(__s1_518, __s1_518, 1, 0); \ | 54846 | __ret_690 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_690), (uint8x8_t)(__noswap_vqshrn_n_u16(__rev1_690, __p2_690)))); \ |
| 53195 | float32x2_t __rev2_518; __rev2_518 = __builtin_shufflevector(__s2_518, __s2_518, 1, 0); \ | 54847 | __ret_690 = __builtin_shufflevector(__ret_690, __ret_690, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53196 | __ret_518 = __noswap_vfma_lane_f32(__rev0_518, -__rev1_518, __rev2_518, __p3_518); \ | 54848 | __ret_690; \ |
| 53197 | __ret_518 = __builtin_shufflevector(__ret_518, __ret_518, 1, 0); \ | | |
| 53198 | __ret_518; \ | | |
| 53199 | }) | 54849 | }) |
| 53200 | #endif | 54850 | #endif |
| 53201 | | 54851 | |
| 53202 | #ifdef __LITTLE_ENDIAN__ | 54852 | #ifdef __LITTLE_ENDIAN__ |
| 53203 | #define vfmsd_laneq_f64(__p0_519, __p1_519, __p2_519, __p3_519) __extension__ ({ \ | 54853 | #define vqshrn_high_n_s32(__p0_691, __p1_691, __p2_691) __extension__ ({ \ |
| 53204 | float64_t __ret_519; \ | 54854 | int16x8_t __ret_691; \ |
| 53205 | float64_t __s0_519 = __p0_519; \ | 54855 | int16x4_t __s0_691 = __p0_691; \ |
| 53206 | float64_t __s1_519 = __p1_519; \ | 54856 | int32x4_t __s1_691 = __p1_691; \ |
| 53207 | float64x2_t __s2_519 = __p2_519; \ | 54857 | __ret_691 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_691), (int16x4_t)(vqshrn_n_s32(__s1_691, __p2_691)))); \ |
| 53208 | __ret_519 = vfmad_laneq_f64(__s0_519, -__s1_519, __s2_519, __p3_519); \ | 54858 | __ret_691; \ |
| 53209 | __ret_519; \ | | |
| 53210 | }) | 54859 | }) |
| 53211 | #else | 54860 | #else |
| 53212 | #define vfmsd_laneq_f64(__p0_520, __p1_520, __p2_520, __p3_520) __extension__ ({ \ | 54861 | #define vqshrn_high_n_s32(__p0_692, __p1_692, __p2_692) __extension__ ({ \ |
| 53213 | float64_t __ret_520; \ | 54862 | int16x8_t __ret_692; \ |
| 53214 | float64_t __s0_520 = __p0_520; \ | 54863 | int16x4_t __s0_692 = __p0_692; \ |
| 53215 | float64_t __s1_520 = __p1_520; \ | 54864 | int32x4_t __s1_692 = __p1_692; \ |
| 53216 | float64x2_t __s2_520 = __p2_520; \ | 54865 | int16x4_t __rev0_692; __rev0_692 = __builtin_shufflevector(__s0_692, __s0_692, 3, 2, 1, 0); \ |
| 53217 | float64x2_t __rev2_520; __rev2_520 = __builtin_shufflevector(__s2_520, __s2_520, 1, 0); \ | 54866 | int32x4_t __rev1_692; __rev1_692 = __builtin_shufflevector(__s1_692, __s1_692, 3, 2, 1, 0); \ |
| 53218 | __ret_520 = __noswap_vfmad_laneq_f64(__s0_520, -__s1_520, __rev2_520, __p3_520); \ | 54867 | __ret_692 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_692), (int16x4_t)(__noswap_vqshrn_n_s32(__rev1_692, __p2_692)))); \ |
| 53219 | __ret_520; \ | 54868 | __ret_692 = __builtin_shufflevector(__ret_692, __ret_692, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 54869 | __ret_692; \ |
| 53220 | }) | 54870 | }) |
| 53221 | #endif | 54871 | #endif |
| 53222 | | 54872 | |
| 53223 | #ifdef __LITTLE_ENDIAN__ | 54873 | #ifdef __LITTLE_ENDIAN__ |
| 53224 | #define vfmss_laneq_f32(__p0_521, __p1_521, __p2_521, __p3_521) __extension__ ({ \ | 54874 | #define vqshrn_high_n_s64(__p0_693, __p1_693, __p2_693) __extension__ ({ \ |
| 53225 | float32_t __ret_521; \ | 54875 | int32x4_t __ret_693; \ |
| 53226 | float32_t __s0_521 = __p0_521; \ | 54876 | int32x2_t __s0_693 = __p0_693; \ |
| 53227 | float32_t __s1_521 = __p1_521; \ | 54877 | int64x2_t __s1_693 = __p1_693; \ |
| 53228 | float32x4_t __s2_521 = __p2_521; \ | 54878 | __ret_693 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_693), (int32x2_t)(vqshrn_n_s64(__s1_693, __p2_693)))); \ |
| 53229 | __ret_521 = vfmas_laneq_f32(__s0_521, -__s1_521, __s2_521, __p3_521); \ | 54879 | __ret_693; \ |
| 53230 | __ret_521; \ | | |
| 53231 | }) | 54880 | }) |
| 53232 | #else | 54881 | #else |
| 53233 | #define vfmss_laneq_f32(__p0_522, __p1_522, __p2_522, __p3_522) __extension__ ({ \ | 54882 | #define vqshrn_high_n_s64(__p0_694, __p1_694, __p2_694) __extension__ ({ \ |
| 53234 | float32_t __ret_522; \ | 54883 | int32x4_t __ret_694; \ |
| 53235 | float32_t __s0_522 = __p0_522; \ | 54884 | int32x2_t __s0_694 = __p0_694; \ |
| 53236 | float32_t __s1_522 = __p1_522; \ | 54885 | int64x2_t __s1_694 = __p1_694; \ |
| 53237 | float32x4_t __s2_522 = __p2_522; \ | 54886 | int32x2_t __rev0_694; __rev0_694 = __builtin_shufflevector(__s0_694, __s0_694, 1, 0); \ |
| 53238 | float32x4_t __rev2_522; __rev2_522 = __builtin_shufflevector(__s2_522, __s2_522, 3, 2, 1, 0); \ | 54887 | int64x2_t __rev1_694; __rev1_694 = __builtin_shufflevector(__s1_694, __s1_694, 1, 0); \ |
| 53239 | __ret_522 = __noswap_vfmas_laneq_f32(__s0_522, -__s1_522, __rev2_522, __p3_522); \ | 54888 | __ret_694 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_694), (int32x2_t)(__noswap_vqshrn_n_s64(__rev1_694, __p2_694)))); \ |
| 53240 | __ret_522; \ | 54889 | __ret_694 = __builtin_shufflevector(__ret_694, __ret_694, 3, 2, 1, 0); \ |
| | 54890 | __ret_694; \ |
| 53241 | }) | 54891 | }) |
| 53242 | #endif | 54892 | #endif |
| 53243 | | 54893 | |
| 53244 | #ifdef __LITTLE_ENDIAN__ | 54894 | #ifdef __LITTLE_ENDIAN__ |
| 53245 | #define vfmsq_laneq_f64(__p0_523, __p1_523, __p2_523, __p3_523) __extension__ ({ \ | 54895 | #define vqshrn_high_n_s16(__p0_695, __p1_695, __p2_695) __extension__ ({ \ |
| 53246 | float64x2_t __ret_523; \ | 54896 | int8x16_t __ret_695; \ |
| 53247 | float64x2_t __s0_523 = __p0_523; \ | 54897 | int8x8_t __s0_695 = __p0_695; \ |
| 53248 | float64x2_t __s1_523 = __p1_523; \ | 54898 | int16x8_t __s1_695 = __p1_695; \ |
| 53249 | float64x2_t __s2_523 = __p2_523; \ | 54899 | __ret_695 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_695), (int8x8_t)(vqshrn_n_s16(__s1_695, __p2_695)))); \ |
| 53250 | __ret_523 = vfmaq_laneq_f64(__s0_523, -__s1_523, __s2_523, __p3_523); \ | 54900 | __ret_695; \ |
| 53251 | __ret_523; \ | | |
| 53252 | }) | 54901 | }) |
| 53253 | #else | 54902 | #else |
| 53254 | #define vfmsq_laneq_f64(__p0_524, __p1_524, __p2_524, __p3_524) __extension__ ({ \ | 54903 | #define vqshrn_high_n_s16(__p0_696, __p1_696, __p2_696) __extension__ ({ \ |
| 53255 | float64x2_t __ret_524; \ | 54904 | int8x16_t __ret_696; \ |
| 53256 | float64x2_t __s0_524 = __p0_524; \ | 54905 | int8x8_t __s0_696 = __p0_696; \ |
| 53257 | float64x2_t __s1_524 = __p1_524; \ | 54906 | int16x8_t __s1_696 = __p1_696; \ |
| 53258 | float64x2_t __s2_524 = __p2_524; \ | 54907 | int8x8_t __rev0_696; __rev0_696 = __builtin_shufflevector(__s0_696, __s0_696, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53259 | float64x2_t __rev0_524; __rev0_524 = __builtin_shufflevector(__s0_524, __s0_524, 1, 0); \ | 54908 | int16x8_t __rev1_696; __rev1_696 = __builtin_shufflevector(__s1_696, __s1_696, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53260 | float64x2_t __rev1_524; __rev1_524 = __builtin_shufflevector(__s1_524, __s1_524, 1, 0); \ | 54909 | __ret_696 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_696), (int8x8_t)(__noswap_vqshrn_n_s16(__rev1_696, __p2_696)))); \ |
| 53261 | float64x2_t __rev2_524; __rev2_524 = __builtin_shufflevector(__s2_524, __s2_524, 1, 0); \ | 54910 | __ret_696 = __builtin_shufflevector(__ret_696, __ret_696, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53262 | __ret_524 = __noswap_vfmaq_laneq_f64(__rev0_524, -__rev1_524, __rev2_524, __p3_524); \ | 54911 | __ret_696; \ |
| 53263 | __ret_524 = __builtin_shufflevector(__ret_524, __ret_524, 1, 0); \ | | |
| 53264 | __ret_524; \ | | |
| 53265 | }) | 54912 | }) |
| 53266 | #endif | 54913 | #endif |
| 53267 | | 54914 | |
| | 54915 | #define vqshrns_n_u32(__p0, __p1) __extension__ ({ \ |
| | 54916 | uint16_t __ret; \ |
| | 54917 | uint32_t __s0 = __p0; \ |
| | 54918 | __ret = (uint16_t) __builtin_neon_vqshrns_n_u32(__s0, __p1); \ |
| | 54919 | __ret; \ |
| | 54920 | }) |
| | 54921 | #define vqshrnd_n_u64(__p0, __p1) __extension__ ({ \ |
| | 54922 | uint32_t __ret; \ |
| | 54923 | uint64_t __s0 = __p0; \ |
| | 54924 | __ret = (uint32_t) __builtin_neon_vqshrnd_n_u64(__s0, __p1); \ |
| | 54925 | __ret; \ |
| | 54926 | }) |
| | 54927 | #define vqshrnh_n_u16(__p0, __p1) __extension__ ({ \ |
| | 54928 | uint8_t __ret; \ |
| | 54929 | uint16_t __s0 = __p0; \ |
| | 54930 | __ret = (uint8_t) __builtin_neon_vqshrnh_n_u16(__s0, __p1); \ |
| | 54931 | __ret; \ |
| | 54932 | }) |
| | 54933 | #define vqshrns_n_s32(__p0, __p1) __extension__ ({ \ |
| | 54934 | int16_t __ret; \ |
| | 54935 | int32_t __s0 = __p0; \ |
| | 54936 | __ret = (int16_t) __builtin_neon_vqshrns_n_s32(__s0, __p1); \ |
| | 54937 | __ret; \ |
| | 54938 | }) |
| | 54939 | #define vqshrnd_n_s64(__p0, __p1) __extension__ ({ \ |
| | 54940 | int32_t __ret; \ |
| | 54941 | int64_t __s0 = __p0; \ |
| | 54942 | __ret = (int32_t) __builtin_neon_vqshrnd_n_s64(__s0, __p1); \ |
| | 54943 | __ret; \ |
| | 54944 | }) |
| | 54945 | #define vqshrnh_n_s16(__p0, __p1) __extension__ ({ \ |
| | 54946 | int8_t __ret; \ |
| | 54947 | int16_t __s0 = __p0; \ |
| | 54948 | __ret = (int8_t) __builtin_neon_vqshrnh_n_s16(__s0, __p1); \ |
| | 54949 | __ret; \ |
| | 54950 | }) |
| 53268 | #ifdef __LITTLE_ENDIAN__ | 54951 | #ifdef __LITTLE_ENDIAN__ |
| 53269 | #define vfmsq_laneq_f32(__p0_525, __p1_525, __p2_525, __p3_525) __extension__ ({ \ | 54952 | #define vqshrun_high_n_s32(__p0_697, __p1_697, __p2_697) __extension__ ({ \ |
| 53270 | float32x4_t __ret_525; \ | 54953 | int16x8_t __ret_697; \ |
| 53271 | float32x4_t __s0_525 = __p0_525; \ | 54954 | int16x4_t __s0_697 = __p0_697; \ |
| 53272 | float32x4_t __s1_525 = __p1_525; \ | 54955 | int32x4_t __s1_697 = __p1_697; \ |
| 53273 | float32x4_t __s2_525 = __p2_525; \ | 54956 | __ret_697 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_697), (int16x4_t)(vqshrun_n_s32(__s1_697, __p2_697)))); \ |
| 53274 | __ret_525 = vfmaq_laneq_f32(__s0_525, -__s1_525, __s2_525, __p3_525); \ | 54957 | __ret_697; \ |
| 53275 | __ret_525; \ | | |
| 53276 | }) | 54958 | }) |
| 53277 | #else | 54959 | #else |
| 53278 | #define vfmsq_laneq_f32(__p0_526, __p1_526, __p2_526, __p3_526) __extension__ ({ \ | 54960 | #define vqshrun_high_n_s32(__p0_698, __p1_698, __p2_698) __extension__ ({ \ |
| 53279 | float32x4_t __ret_526; \ | 54961 | int16x8_t __ret_698; \ |
| 53280 | float32x4_t __s0_526 = __p0_526; \ | 54962 | int16x4_t __s0_698 = __p0_698; \ |
| 53281 | float32x4_t __s1_526 = __p1_526; \ | 54963 | int32x4_t __s1_698 = __p1_698; \ |
| 53282 | float32x4_t __s2_526 = __p2_526; \ | 54964 | int16x4_t __rev0_698; __rev0_698 = __builtin_shufflevector(__s0_698, __s0_698, 3, 2, 1, 0); \ |
| 53283 | float32x4_t __rev0_526; __rev0_526 = __builtin_shufflevector(__s0_526, __s0_526, 3, 2, 1, 0); \ | 54965 | int32x4_t __rev1_698; __rev1_698 = __builtin_shufflevector(__s1_698, __s1_698, 3, 2, 1, 0); \ |
| 53284 | float32x4_t __rev1_526; __rev1_526 = __builtin_shufflevector(__s1_526, __s1_526, 3, 2, 1, 0); \ | 54966 | __ret_698 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_698), (int16x4_t)(__noswap_vqshrun_n_s32(__rev1_698, __p2_698)))); \ |
| 53285 | float32x4_t __rev2_526; __rev2_526 = __builtin_shufflevector(__s2_526, __s2_526, 3, 2, 1, 0); \ | 54967 | __ret_698 = __builtin_shufflevector(__ret_698, __ret_698, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53286 | __ret_526 = __noswap_vfmaq_laneq_f32(__rev0_526, -__rev1_526, __rev2_526, __p3_526); \ | 54968 | __ret_698; \ |
| 53287 | __ret_526 = __builtin_shufflevector(__ret_526, __ret_526, 3, 2, 1, 0); \ | | |
| 53288 | __ret_526; \ | | |
| 53289 | }) | 54969 | }) |
| 53290 | #endif | 54970 | #endif |
| 53291 | | 54971 | |
| 53292 | #ifdef __LITTLE_ENDIAN__ | 54972 | #ifdef __LITTLE_ENDIAN__ |
| 53293 | #define vfms_laneq_f64(__p0_527, __p1_527, __p2_527, __p3_527) __extension__ ({ \ | 54973 | #define vqshrun_high_n_s64(__p0_699, __p1_699, __p2_699) __extension__ ({ \ |
| 53294 | float64x1_t __ret_527; \ | 54974 | int32x4_t __ret_699; \ |
| 53295 | float64x1_t __s0_527 = __p0_527; \ | 54975 | int32x2_t __s0_699 = __p0_699; \ |
| 53296 | float64x1_t __s1_527 = __p1_527; \ | 54976 | int64x2_t __s1_699 = __p1_699; \ |
| 53297 | float64x2_t __s2_527 = __p2_527; \ | 54977 | __ret_699 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_699), (int32x2_t)(vqshrun_n_s64(__s1_699, __p2_699)))); \ |
| 53298 | __ret_527 = vfma_laneq_f64(__s0_527, -__s1_527, __s2_527, __p3_527); \ | 54978 | __ret_699; \ |
| 53299 | __ret_527; \ | | |
| 53300 | }) | 54979 | }) |
| 53301 | #else | 54980 | #else |
| 53302 | #define vfms_laneq_f64(__p0_528, __p1_528, __p2_528, __p3_528) __extension__ ({ \ | 54981 | #define vqshrun_high_n_s64(__p0_700, __p1_700, __p2_700) __extension__ ({ \ |
| 53303 | float64x1_t __ret_528; \ | 54982 | int32x4_t __ret_700; \ |
| 53304 | float64x1_t __s0_528 = __p0_528; \ | 54983 | int32x2_t __s0_700 = __p0_700; \ |
| 53305 | float64x1_t __s1_528 = __p1_528; \ | 54984 | int64x2_t __s1_700 = __p1_700; \ |
| 53306 | float64x2_t __s2_528 = __p2_528; \ | 54985 | int32x2_t __rev0_700; __rev0_700 = __builtin_shufflevector(__s0_700, __s0_700, 1, 0); \ |
| 53307 | float64x2_t __rev2_528; __rev2_528 = __builtin_shufflevector(__s2_528, __s2_528, 1, 0); \ | 54986 | int64x2_t __rev1_700; __rev1_700 = __builtin_shufflevector(__s1_700, __s1_700, 1, 0); \ |
| 53308 | __ret_528 = __noswap_vfma_laneq_f64(__s0_528, -__s1_528, __rev2_528, __p3_528); \ | 54987 | __ret_700 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_700), (int32x2_t)(__noswap_vqshrun_n_s64(__rev1_700, __p2_700)))); \ |
| 53309 | __ret_528; \ | 54988 | __ret_700 = __builtin_shufflevector(__ret_700, __ret_700, 3, 2, 1, 0); \ |
| | 54989 | __ret_700; \ |
| 53310 | }) | 54990 | }) |
| 53311 | #endif | 54991 | #endif |
| 53312 | | 54992 | |
| 53313 | #ifdef __LITTLE_ENDIAN__ | 54993 | #ifdef __LITTLE_ENDIAN__ |
| 53314 | #define vfms_laneq_f32(__p0_529, __p1_529, __p2_529, __p3_529) __extension__ ({ \ | 54994 | #define vqshrun_high_n_s16(__p0_701, __p1_701, __p2_701) __extension__ ({ \ |
| 53315 | float32x2_t __ret_529; \ | 54995 | int8x16_t __ret_701; \ |
| 53316 | float32x2_t __s0_529 = __p0_529; \ | 54996 | int8x8_t __s0_701 = __p0_701; \ |
| 53317 | float32x2_t __s1_529 = __p1_529; \ | 54997 | int16x8_t __s1_701 = __p1_701; \ |
| 53318 | float32x4_t __s2_529 = __p2_529; \ | 54998 | __ret_701 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_701), (int8x8_t)(vqshrun_n_s16(__s1_701, __p2_701)))); \ |
| 53319 | __ret_529 = vfma_laneq_f32(__s0_529, -__s1_529, __s2_529, __p3_529); \ | 54999 | __ret_701; \ |
| 53320 | __ret_529; \ | | |
| 53321 | }) | 55000 | }) |
| 53322 | #else | 55001 | #else |
| 53323 | #define vfms_laneq_f32(__p0_530, __p1_530, __p2_530, __p3_530) __extension__ ({ \ | 55002 | #define vqshrun_high_n_s16(__p0_702, __p1_702, __p2_702) __extension__ ({ \ |
| 53324 | float32x2_t __ret_530; \ | 55003 | int8x16_t __ret_702; \ |
| 53325 | float32x2_t __s0_530 = __p0_530; \ | 55004 | int8x8_t __s0_702 = __p0_702; \ |
| 53326 | float32x2_t __s1_530 = __p1_530; \ | 55005 | int16x8_t __s1_702 = __p1_702; \ |
| 53327 | float32x4_t __s2_530 = __p2_530; \ | 55006 | int8x8_t __rev0_702; __rev0_702 = __builtin_shufflevector(__s0_702, __s0_702, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53328 | float32x2_t __rev0_530; __rev0_530 = __builtin_shufflevector(__s0_530, __s0_530, 1, 0); \ | 55007 | int16x8_t __rev1_702; __rev1_702 = __builtin_shufflevector(__s1_702, __s1_702, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53329 | float32x2_t __rev1_530; __rev1_530 = __builtin_shufflevector(__s1_530, __s1_530, 1, 0); \ | 55008 | __ret_702 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_702), (int8x8_t)(__noswap_vqshrun_n_s16(__rev1_702, __p2_702)))); \ |
| 53330 | float32x4_t __rev2_530; __rev2_530 = __builtin_shufflevector(__s2_530, __s2_530, 3, 2, 1, 0); \ | 55009 | __ret_702 = __builtin_shufflevector(__ret_702, __ret_702, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53331 | __ret_530 = __noswap_vfma_laneq_f32(__rev0_530, -__rev1_530, __rev2_530, __p3_530); \ | 55010 | __ret_702; \ |
| 53332 | __ret_530 = __builtin_shufflevector(__ret_530, __ret_530, 1, 0); \ | | |
| 53333 | __ret_530; \ | | |
| 53334 | }) | 55011 | }) |
| 53335 | #endif | 55012 | #endif |
| 53336 | | 55013 | |
| | 55014 | #define vqshruns_n_s32(__p0, __p1) __extension__ ({ \ |
| | 55015 | int16_t __ret; \ |
| | 55016 | int32_t __s0 = __p0; \ |
| | 55017 | __ret = (int16_t) __builtin_neon_vqshruns_n_s32(__s0, __p1); \ |
| | 55018 | __ret; \ |
| | 55019 | }) |
| | 55020 | #define vqshrund_n_s64(__p0, __p1) __extension__ ({ \ |
| | 55021 | int32_t __ret; \ |
| | 55022 | int64_t __s0 = __p0; \ |
| | 55023 | __ret = (int32_t) __builtin_neon_vqshrund_n_s64(__s0, __p1); \ |
| | 55024 | __ret; \ |
| | 55025 | }) |
| | 55026 | #define vqshrunh_n_s16(__p0, __p1) __extension__ ({ \ |
| | 55027 | int8_t __ret; \ |
| | 55028 | int16_t __s0 = __p0; \ |
| | 55029 | __ret = (int8_t) __builtin_neon_vqshrunh_n_s16(__s0, __p1); \ |
| | 55030 | __ret; \ |
| | 55031 | }) |
| | 55032 | __ai uint8_t vqsubb_u8(uint8_t __p0, uint8_t __p1) { |
| | 55033 | uint8_t __ret; |
| | 55034 | __ret = (uint8_t) __builtin_neon_vqsubb_u8(__p0, __p1); |
| | 55035 | return __ret; |
| | 55036 | } |
| | 55037 | __ai uint32_t vqsubs_u32(uint32_t __p0, uint32_t __p1) { |
| | 55038 | uint32_t __ret; |
| | 55039 | __ret = (uint32_t) __builtin_neon_vqsubs_u32(__p0, __p1); |
| | 55040 | return __ret; |
| | 55041 | } |
| | 55042 | __ai uint64_t vqsubd_u64(uint64_t __p0, uint64_t __p1) { |
| | 55043 | uint64_t __ret; |
| | 55044 | __ret = (uint64_t) __builtin_neon_vqsubd_u64(__p0, __p1); |
| | 55045 | return __ret; |
| | 55046 | } |
| | 55047 | __ai uint16_t vqsubh_u16(uint16_t __p0, uint16_t __p1) { |
| | 55048 | uint16_t __ret; |
| | 55049 | __ret = (uint16_t) __builtin_neon_vqsubh_u16(__p0, __p1); |
| | 55050 | return __ret; |
| | 55051 | } |
| | 55052 | __ai int8_t vqsubb_s8(int8_t __p0, int8_t __p1) { |
| | 55053 | int8_t __ret; |
| | 55054 | __ret = (int8_t) __builtin_neon_vqsubb_s8(__p0, __p1); |
| | 55055 | return __ret; |
| | 55056 | } |
| | 55057 | __ai int32_t vqsubs_s32(int32_t __p0, int32_t __p1) { |
| | 55058 | int32_t __ret; |
| | 55059 | __ret = (int32_t) __builtin_neon_vqsubs_s32(__p0, __p1); |
| | 55060 | return __ret; |
| | 55061 | } |
| | 55062 | __ai int64_t vqsubd_s64(int64_t __p0, int64_t __p1) { |
| | 55063 | int64_t __ret; |
| | 55064 | __ret = (int64_t) __builtin_neon_vqsubd_s64(__p0, __p1); |
| | 55065 | return __ret; |
| | 55066 | } |
| | 55067 | __ai int16_t vqsubh_s16(int16_t __p0, int16_t __p1) { |
| | 55068 | int16_t __ret; |
| | 55069 | __ret = (int16_t) __builtin_neon_vqsubh_s16(__p0, __p1); |
| | 55070 | return __ret; |
| | 55071 | } |
| 53337 | #ifdef __LITTLE_ENDIAN__ | 55072 | #ifdef __LITTLE_ENDIAN__ |
| 53338 | __ai float64x2_t vfmsq_n_f64(float64x2_t __p0, float64x2_t __p1, float64_t __p2) { | 55073 | __ai poly8x8_t vqtbl1_p8(poly8x16_t __p0, uint8x8_t __p1) { |
| 53339 | float64x2_t __ret; | 55074 | poly8x8_t __ret; |
| 53340 | __ret = vfmaq_f64(__p0, -__p1, (float64x2_t) {__p2, __p2}); | 55075 | __ret = (poly8x8_t) __builtin_neon_vqtbl1_v((int8x16_t)__p0, (int8x8_t)__p1, 4); |
| 53341 | return __ret; | 55076 | return __ret; |
| 53342 | } | 55077 | } |
| 53343 | #else | 55078 | #else |
| 53344 | __ai float64x2_t vfmsq_n_f64(float64x2_t __p0, float64x2_t __p1, float64_t __p2) { | 55079 | __ai poly8x8_t vqtbl1_p8(poly8x16_t __p0, uint8x8_t __p1) { |
| 53345 | float64x2_t __ret; | 55080 | poly8x8_t __ret; |
| 53346 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 55081 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53347 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 55082 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53348 | __ret = __noswap_vfmaq_f64(__rev0, -__rev1, (float64x2_t) {__p2, __p2}); | 55083 | __ret = (poly8x8_t) __builtin_neon_vqtbl1_v((int8x16_t)__rev0, (int8x8_t)__rev1, 4); |
| 53349 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 55084 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53350 | return __ret; | 55085 | return __ret; |
| 53351 | } | 55086 | } |
| 53352 | #endif | 55087 | #endif |
| 53353 | | 55088 | |
| 53354 | #ifdef __LITTLE_ENDIAN__ | 55089 | #ifdef __LITTLE_ENDIAN__ |
| 53355 | __ai float32x4_t vfmsq_n_f32(float32x4_t __p0, float32x4_t __p1, float32_t __p2) { | 55090 | __ai poly8x16_t vqtbl1q_p8(poly8x16_t __p0, uint8x16_t __p1) { |
| 53356 | float32x4_t __ret; | 55091 | poly8x16_t __ret; |
| 53357 | __ret = vfmaq_f32(__p0, -__p1, (float32x4_t) {__p2, __p2, __p2, __p2}); | 55092 | __ret = (poly8x16_t) __builtin_neon_vqtbl1q_v((int8x16_t)__p0, (int8x16_t)__p1, 36); |
| 53358 | return __ret; | 55093 | return __ret; |
| 53359 | } | 55094 | } |
| 53360 | #else | 55095 | #else |
| 53361 | __ai float32x4_t vfmsq_n_f32(float32x4_t __p0, float32x4_t __p1, float32_t __p2) { | 55096 | __ai poly8x16_t vqtbl1q_p8(poly8x16_t __p0, uint8x16_t __p1) { |
| 53362 | float32x4_t __ret; | 55097 | poly8x16_t __ret; |
| 53363 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 55098 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53364 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 55099 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53365 | __ret = __noswap_vfmaq_f32(__rev0, -__rev1, (float32x4_t) {__p2, __p2, __p2, __p2}); | 55100 | __ret = (poly8x16_t) __builtin_neon_vqtbl1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 36); |
| 53366 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 55101 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53367 | return __ret; | 55102 | return __ret; |
| 53368 | } | 55103 | } |
| 53369 | #endif | 55104 | #endif |
| 53370 | | 55105 | |
| 53371 | __ai float64x1_t vfms_n_f64(float64x1_t __p0, float64x1_t __p1, float64_t __p2) { | | |
| 53372 | float64x1_t __ret; | | |
| 53373 | __ret = vfma_f64(__p0, -__p1, (float64x1_t) {__p2}); | | |
| 53374 | return __ret; | | |
| 53375 | } | | |
| 53376 | #ifdef __LITTLE_ENDIAN__ | 55106 | #ifdef __LITTLE_ENDIAN__ |
| 53377 | __ai float32x2_t vfms_n_f32(float32x2_t __p0, float32x2_t __p1, float32_t __p2) { | 55107 | __ai uint8x16_t vqtbl1q_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 53378 | float32x2_t __ret; | 55108 | uint8x16_t __ret; |
| 53379 | __ret = vfma_f32(__p0, -__p1, (float32x2_t) {__p2, __p2}); | 55109 | __ret = (uint8x16_t) __builtin_neon_vqtbl1q_v((int8x16_t)__p0, (int8x16_t)__p1, 48); |
| 53380 | return __ret; | 55110 | return __ret; |
| 53381 | } | 55111 | } |
| 53382 | #else | 55112 | #else |
| 53383 | __ai float32x2_t vfms_n_f32(float32x2_t __p0, float32x2_t __p1, float32_t __p2) { | 55113 | __ai uint8x16_t vqtbl1q_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 53384 | float32x2_t __ret; | 55114 | uint8x16_t __ret; |
| 53385 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 55115 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53386 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 55116 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53387 | __ret = __noswap_vfma_f32(__rev0, -__rev1, (float32x2_t) {__p2, __p2}); | 55117 | __ret = (uint8x16_t) __builtin_neon_vqtbl1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 48); |
| 53388 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 55118 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53389 | return __ret; | 55119 | return __ret; |
| 53390 | } | 55120 | } |
| 53391 | #endif | 55121 | #endif |
| 53392 | | 55122 | |
| 53393 | #ifdef __LITTLE_ENDIAN__ | 55123 | #ifdef __LITTLE_ENDIAN__ |
| 53394 | __ai poly64x1_t vget_high_p64(poly64x2_t __p0) { | 55124 | __ai int8x16_t vqtbl1q_s8(int8x16_t __p0, uint8x16_t __p1) { |
| 53395 | poly64x1_t __ret; | 55125 | int8x16_t __ret; |
| 53396 | __ret = __builtin_shufflevector(__p0, __p0, 1); | 55126 | __ret = (int8x16_t) __builtin_neon_vqtbl1q_v((int8x16_t)__p0, (int8x16_t)__p1, 32); |
| 53397 | return __ret; | 55127 | return __ret; |
| 53398 | } | 55128 | } |
| 53399 | #else | 55129 | #else |
| 53400 | __ai poly64x1_t vget_high_p64(poly64x2_t __p0) { | 55130 | __ai int8x16_t vqtbl1q_s8(int8x16_t __p0, uint8x16_t __p1) { |
| 53401 | poly64x1_t __ret; | 55131 | int8x16_t __ret; |
| 53402 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 55132 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53403 | __ret = __builtin_shufflevector(__rev0, __rev0, 1); | 55133 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55134 | __ret = (int8x16_t) __builtin_neon_vqtbl1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 32); |
| | 55135 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53404 | return __ret; | 55136 | return __ret; |
| 53405 | } | 55137 | } |
| 53406 | __ai poly64x1_t __noswap_vget_high_p64(poly64x2_t __p0) { | 55138 | #endif |
| 53407 | poly64x1_t __ret; | 55139 | |
| 53408 | __ret = __builtin_shufflevector(__p0, __p0, 1); | 55140 | #ifdef __LITTLE_ENDIAN__ |
| | 55141 | __ai uint8x8_t vqtbl1_u8(uint8x16_t __p0, uint8x8_t __p1) { |
| | 55142 | uint8x8_t __ret; |
| | 55143 | __ret = (uint8x8_t) __builtin_neon_vqtbl1_v((int8x16_t)__p0, (int8x8_t)__p1, 16); |
| | 55144 | return __ret; |
| | 55145 | } |
| | 55146 | #else |
| | 55147 | __ai uint8x8_t vqtbl1_u8(uint8x16_t __p0, uint8x8_t __p1) { |
| | 55148 | uint8x8_t __ret; |
| | 55149 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55150 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55151 | __ret = (uint8x8_t) __builtin_neon_vqtbl1_v((int8x16_t)__rev0, (int8x8_t)__rev1, 16); |
| | 55152 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53409 | return __ret; | 55153 | return __ret; |
| 53410 | } | 55154 | } |
| 53411 | #endif | 55155 | #endif |
| 53412 | | 55156 | |
| 53413 | #ifdef __LITTLE_ENDIAN__ | 55157 | #ifdef __LITTLE_ENDIAN__ |
| 53414 | __ai float64x1_t vget_high_f64(float64x2_t __p0) { | 55158 | __ai int8x8_t vqtbl1_s8(int8x16_t __p0, uint8x8_t __p1) { |
| 53415 | float64x1_t __ret; | 55159 | int8x8_t __ret; |
| 53416 | __ret = __builtin_shufflevector(__p0, __p0, 1); | 55160 | __ret = (int8x8_t) __builtin_neon_vqtbl1_v((int8x16_t)__p0, (int8x8_t)__p1, 0); |
| 53417 | return __ret; | 55161 | return __ret; |
| 53418 | } | 55162 | } |
| 53419 | #else | 55163 | #else |
| 53420 | __ai float64x1_t vget_high_f64(float64x2_t __p0) { | 55164 | __ai int8x8_t vqtbl1_s8(int8x16_t __p0, uint8x8_t __p1) { |
| 53421 | float64x1_t __ret; | 55165 | int8x8_t __ret; |
| 53422 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 55166 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53423 | __ret = __builtin_shufflevector(__rev0, __rev0, 1); | 55167 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55168 | __ret = (int8x8_t) __builtin_neon_vqtbl1_v((int8x16_t)__rev0, (int8x8_t)__rev1, 0); |
| | 55169 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53424 | return __ret; | 55170 | return __ret; |
| 53425 | } | 55171 | } |
| 53426 | #endif | 55172 | #endif |
| 53427 | | 55173 | |
| 53428 | #define vget_lane_p64(__p0, __p1) __extension__ ({ \ | | |
| 53429 | poly64_t __ret; \ | | |
| 53430 | poly64x1_t __s0 = __p0; \ | | |
| 53431 | __ret = (poly64_t) __builtin_neon_vget_lane_i64((poly64x1_t)__s0, __p1); \ | | |
| 53432 | __ret; \ | | |
| 53433 | }) | | |
| 53434 | #ifdef __LITTLE_ENDIAN__ | 55174 | #ifdef __LITTLE_ENDIAN__ |
| 53435 | #define vgetq_lane_p64(__p0, __p1) __extension__ ({ \ | 55175 | __ai poly8x8_t vqtbl2_p8(poly8x16x2_t __p0, uint8x8_t __p1) { |
| 53436 | poly64_t __ret; \ | 55176 | poly8x8_t __ret; |
| 53437 | poly64x2_t __s0 = __p0; \ | 55177 | __ret = (poly8x8_t) __builtin_neon_vqtbl2_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x8_t)__p1, 4); |
| 53438 | __ret = (poly64_t) __builtin_neon_vgetq_lane_i64((poly64x2_t)__s0, __p1); \ | 55178 | return __ret; |
| 53439 | __ret; \ | 55179 | } |
| 53440 | }) | | |
| 53441 | #else | 55180 | #else |
| 53442 | #define vgetq_lane_p64(__p0, __p1) __extension__ ({ \ | 55181 | __ai poly8x8_t vqtbl2_p8(poly8x16x2_t __p0, uint8x8_t __p1) { |
| 53443 | poly64_t __ret; \ | 55182 | poly8x8_t __ret; |
| 53444 | poly64x2_t __s0 = __p0; \ | 55183 | poly8x16x2_t __rev0; |
| 53445 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 55184 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53446 | __ret = (poly64_t) __builtin_neon_vgetq_lane_i64((poly64x2_t)__rev0, __p1); \ | 55185 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53447 | __ret; \ | 55186 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53448 | }) | 55187 | __ret = (poly8x8_t) __builtin_neon_vqtbl2_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x8_t)__rev1, 4); |
| 53449 | #define __noswap_vgetq_lane_p64(__p0, __p1) __extension__ ({ \ | 55188 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53450 | poly64_t __ret; \ | 55189 | return __ret; |
| 53451 | poly64x2_t __s0 = __p0; \ | 55190 | } |
| 53452 | __ret = (poly64_t) __builtin_neon_vgetq_lane_i64((poly64x2_t)__s0, __p1); \ | | |
| 53453 | __ret; \ | | |
| 53454 | }) | | |
| 53455 | #endif | 55191 | #endif |
| 53456 | | 55192 | |
| 53457 | #ifdef __LITTLE_ENDIAN__ | 55193 | #ifdef __LITTLE_ENDIAN__ |
| 53458 | #define vgetq_lane_f64(__p0, __p1) __extension__ ({ \ | 55194 | __ai poly8x16_t vqtbl2q_p8(poly8x16x2_t __p0, uint8x16_t __p1) { |
| 53459 | float64_t __ret; \ | 55195 | poly8x16_t __ret; |
| 53460 | float64x2_t __s0 = __p0; \ | 55196 | __ret = (poly8x16_t) __builtin_neon_vqtbl2q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p1, 36); |
| 53461 | __ret = (float64_t) __builtin_neon_vgetq_lane_f64((float64x2_t)__s0, __p1); \ | 55197 | return __ret; |
| 53462 | __ret; \ | 55198 | } |
| 53463 | }) | | |
| 53464 | #else | 55199 | #else |
| 53465 | #define vgetq_lane_f64(__p0, __p1) __extension__ ({ \ | 55200 | __ai poly8x16_t vqtbl2q_p8(poly8x16x2_t __p0, uint8x16_t __p1) { |
| 53466 | float64_t __ret; \ | 55201 | poly8x16_t __ret; |
| 53467 | float64x2_t __s0 = __p0; \ | 55202 | poly8x16x2_t __rev0; |
| 53468 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 55203 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53469 | __ret = (float64_t) __builtin_neon_vgetq_lane_f64((float64x2_t)__rev0, __p1); \ | 55204 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53470 | __ret; \ | 55205 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53471 | }) | 55206 | __ret = (poly8x16_t) __builtin_neon_vqtbl2q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev1, 36); |
| 53472 | #define __noswap_vgetq_lane_f64(__p0, __p1) __extension__ ({ \ | 55207 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53473 | float64_t __ret; \ | 55208 | return __ret; |
| 53474 | float64x2_t __s0 = __p0; \ | 55209 | } |
| 53475 | __ret = (float64_t) __builtin_neon_vgetq_lane_f64((float64x2_t)__s0, __p1); \ | | |
| 53476 | __ret; \ | | |
| 53477 | }) | | |
| 53478 | #endif | 55210 | #endif |
| 53479 | | 55211 | |
| 53480 | #define vget_lane_f64(__p0, __p1) __extension__ ({ \ | | |
| 53481 | float64_t __ret; \ | | |
| 53482 | float64x1_t __s0 = __p0; \ | | |
| 53483 | __ret = (float64_t) __builtin_neon_vget_lane_f64((float64x1_t)__s0, __p1); \ | | |
| 53484 | __ret; \ | | |
| 53485 | }) | | |
| 53486 | #ifdef __LITTLE_ENDIAN__ | 55212 | #ifdef __LITTLE_ENDIAN__ |
| 53487 | __ai poly64x1_t vget_low_p64(poly64x2_t __p0) { | 55213 | __ai uint8x16_t vqtbl2q_u8(uint8x16x2_t __p0, uint8x16_t __p1) { |
| 53488 | poly64x1_t __ret; | 55214 | uint8x16_t __ret; |
| 53489 | __ret = __builtin_shufflevector(__p0, __p0, 0); | 55215 | __ret = (uint8x16_t) __builtin_neon_vqtbl2q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p1, 48); |
| 53490 | return __ret; | 55216 | return __ret; |
| 53491 | } | 55217 | } |
| 53492 | #else | 55218 | #else |
| 53493 | __ai poly64x1_t vget_low_p64(poly64x2_t __p0) { | 55219 | __ai uint8x16_t vqtbl2q_u8(uint8x16x2_t __p0, uint8x16_t __p1) { |
| 53494 | poly64x1_t __ret; | 55220 | uint8x16_t __ret; |
| 53495 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 55221 | uint8x16x2_t __rev0; |
| 53496 | __ret = __builtin_shufflevector(__rev0, __rev0, 0); | 55222 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55223 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55224 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55225 | __ret = (uint8x16_t) __builtin_neon_vqtbl2q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev1, 48); |
| | 55226 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53497 | return __ret; | 55227 | return __ret; |
| 53498 | } | 55228 | } |
| 53499 | #endif | 55229 | #endif |
| 53500 | | 55230 | |
| 53501 | #ifdef __LITTLE_ENDIAN__ | 55231 | #ifdef __LITTLE_ENDIAN__ |
| 53502 | __ai float64x1_t vget_low_f64(float64x2_t __p0) { | 55232 | __ai int8x16_t vqtbl2q_s8(int8x16x2_t __p0, uint8x16_t __p1) { |
| 53503 | float64x1_t __ret; | 55233 | int8x16_t __ret; |
| 53504 | __ret = __builtin_shufflevector(__p0, __p0, 0); | 55234 | __ret = (int8x16_t) __builtin_neon_vqtbl2q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p1, 32); |
| 53505 | return __ret; | 55235 | return __ret; |
| 53506 | } | 55236 | } |
| 53507 | #else | 55237 | #else |
| 53508 | __ai float64x1_t vget_low_f64(float64x2_t __p0) { | 55238 | __ai int8x16_t vqtbl2q_s8(int8x16x2_t __p0, uint8x16_t __p1) { |
| 53509 | float64x1_t __ret; | 55239 | int8x16_t __ret; |
| 53510 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 55240 | int8x16x2_t __rev0; |
| 53511 | __ret = __builtin_shufflevector(__rev0, __rev0, 0); | 55241 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55242 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55243 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55244 | __ret = (int8x16_t) __builtin_neon_vqtbl2q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev1, 32); |
| | 55245 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53512 | return __ret; | 55246 | return __ret; |
| 53513 | } | 55247 | } |
| 53514 | #endif | 55248 | #endif |
| 53515 | | 55249 | |
| 53516 | #define vld1_p64(__p0) __extension__ ({ \ | | |
| 53517 | poly64x1_t __ret; \ | | |
| 53518 | __ret = (poly64x1_t) __builtin_neon_vld1_v(__p0, 6); \ | | |
| 53519 | __ret; \ | | |
| 53520 | }) | | |
| 53521 | #ifdef __LITTLE_ENDIAN__ | | |
| 53522 | #define vld1q_p64(__p0) __extension__ ({ \ | | |
| 53523 | poly64x2_t __ret; \ | | |
| 53524 | __ret = (poly64x2_t) __builtin_neon_vld1q_v(__p0, 38); \ | | |
| 53525 | __ret; \ | | |
| 53526 | }) | | |
| 53527 | #else | | |
| 53528 | #define vld1q_p64(__p0) __extension__ ({ \ | | |
| 53529 | poly64x2_t __ret; \ | | |
| 53530 | __ret = (poly64x2_t) __builtin_neon_vld1q_v(__p0, 38); \ | | |
| 53531 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | | |
| 53532 | __ret; \ | | |
| 53533 | }) | | |
| 53534 | #endif | | |
| 53535 | | | |
| 53536 | #ifdef __LITTLE_ENDIAN__ | 55250 | #ifdef __LITTLE_ENDIAN__ |
| 53537 | #define vld1q_f64(__p0) __extension__ ({ \ | 55251 | __ai uint8x8_t vqtbl2_u8(uint8x16x2_t __p0, uint8x8_t __p1) { |
| 53538 | float64x2_t __ret; \ | 55252 | uint8x8_t __ret; |
| 53539 | __ret = (float64x2_t) __builtin_neon_vld1q_v(__p0, 42); \ | 55253 | __ret = (uint8x8_t) __builtin_neon_vqtbl2_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x8_t)__p1, 16); |
| 53540 | __ret; \ | 55254 | return __ret; |
| 53541 | }) | 55255 | } |
| 53542 | #else | 55256 | #else |
| 53543 | #define vld1q_f64(__p0) __extension__ ({ \ | 55257 | __ai uint8x8_t vqtbl2_u8(uint8x16x2_t __p0, uint8x8_t __p1) { |
| 53544 | float64x2_t __ret; \ | 55258 | uint8x8_t __ret; |
| 53545 | __ret = (float64x2_t) __builtin_neon_vld1q_v(__p0, 42); \ | 55259 | uint8x16x2_t __rev0; |
| 53546 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 55260 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53547 | __ret; \ | 55261 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53548 | }) | 55262 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55263 | __ret = (uint8x8_t) __builtin_neon_vqtbl2_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x8_t)__rev1, 16); |
| | 55264 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55265 | return __ret; |
| | 55266 | } |
| 53549 | #endif | 55267 | #endif |
| 53550 | | 55268 | |
| 53551 | #define vld1_f64(__p0) __extension__ ({ \ | | |
| 53552 | float64x1_t __ret; \ | | |
| 53553 | __ret = (float64x1_t) __builtin_neon_vld1_v(__p0, 10); \ | | |
| 53554 | __ret; \ | | |
| 53555 | }) | | |
| 53556 | #define vld1_dup_p64(__p0) __extension__ ({ \ | | |
| 53557 | poly64x1_t __ret; \ | | |
| 53558 | __ret = (poly64x1_t) __builtin_neon_vld1_dup_v(__p0, 6); \ | | |
| 53559 | __ret; \ | | |
| 53560 | }) | | |
| 53561 | #ifdef __LITTLE_ENDIAN__ | 55269 | #ifdef __LITTLE_ENDIAN__ |
| 53562 | #define vld1q_dup_p64(__p0) __extension__ ({ \ | 55270 | __ai int8x8_t vqtbl2_s8(int8x16x2_t __p0, uint8x8_t __p1) { |
| 53563 | poly64x2_t __ret; \ | 55271 | int8x8_t __ret; |
| 53564 | __ret = (poly64x2_t) __builtin_neon_vld1q_dup_v(__p0, 38); \ | 55272 | __ret = (int8x8_t) __builtin_neon_vqtbl2_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x8_t)__p1, 0); |
| 53565 | __ret; \ | 55273 | return __ret; |
| 53566 | }) | 55274 | } |
| 53567 | #else | 55275 | #else |
| 53568 | #define vld1q_dup_p64(__p0) __extension__ ({ \ | 55276 | __ai int8x8_t vqtbl2_s8(int8x16x2_t __p0, uint8x8_t __p1) { |
| 53569 | poly64x2_t __ret; \ | 55277 | int8x8_t __ret; |
| 53570 | __ret = (poly64x2_t) __builtin_neon_vld1q_dup_v(__p0, 38); \ | 55278 | int8x16x2_t __rev0; |
| 53571 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 55279 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53572 | __ret; \ | 55280 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53573 | }) | 55281 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55282 | __ret = (int8x8_t) __builtin_neon_vqtbl2_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x8_t)__rev1, 0); |
| | 55283 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55284 | return __ret; |
| | 55285 | } |
| 53574 | #endif | 55286 | #endif |
| 53575 | | 55287 | |
| 53576 | #ifdef __LITTLE_ENDIAN__ | 55288 | #ifdef __LITTLE_ENDIAN__ |
| 53577 | #define vld1q_dup_f64(__p0) __extension__ ({ \ | 55289 | __ai poly8x8_t vqtbl3_p8(poly8x16x3_t __p0, uint8x8_t __p1) { |
| 53578 | float64x2_t __ret; \ | 55290 | poly8x8_t __ret; |
| 53579 | __ret = (float64x2_t) __builtin_neon_vld1q_dup_v(__p0, 42); \ | 55291 | __ret = (poly8x8_t) __builtin_neon_vqtbl3_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x8_t)__p1, 4); |
| 53580 | __ret; \ | 55292 | return __ret; |
| 53581 | }) | 55293 | } |
| 53582 | #else | 55294 | #else |
| 53583 | #define vld1q_dup_f64(__p0) __extension__ ({ \ | 55295 | __ai poly8x8_t vqtbl3_p8(poly8x16x3_t __p0, uint8x8_t __p1) { |
| 53584 | float64x2_t __ret; \ | 55296 | poly8x8_t __ret; |
| 53585 | __ret = (float64x2_t) __builtin_neon_vld1q_dup_v(__p0, 42); \ | 55297 | poly8x16x3_t __rev0; |
| 53586 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 55298 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53587 | __ret; \ | 55299 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53588 | }) | 55300 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55301 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55302 | __ret = (poly8x8_t) __builtin_neon_vqtbl3_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x8_t)__rev1, 4); |
| | 55303 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55304 | return __ret; |
| | 55305 | } |
| 53589 | #endif | 55306 | #endif |
| 53590 | | 55307 | |
| 53591 | #define vld1_dup_f64(__p0) __extension__ ({ \ | | |
| 53592 | float64x1_t __ret; \ | | |
| 53593 | __ret = (float64x1_t) __builtin_neon_vld1_dup_v(__p0, 10); \ | | |
| 53594 | __ret; \ | | |
| 53595 | }) | | |
| 53596 | #define vld1_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 53597 | poly64x1_t __ret; \ | | |
| 53598 | poly64x1_t __s1 = __p1; \ | | |
| 53599 | __ret = (poly64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 6); \ | | |
| 53600 | __ret; \ | | |
| 53601 | }) | | |
| 53602 | #ifdef __LITTLE_ENDIAN__ | 55308 | #ifdef __LITTLE_ENDIAN__ |
| 53603 | #define vld1q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 55309 | __ai poly8x16_t vqtbl3q_p8(poly8x16x3_t __p0, uint8x16_t __p1) { |
| 53604 | poly64x2_t __ret; \ | 55310 | poly8x16_t __ret; |
| 53605 | poly64x2_t __s1 = __p1; \ | 55311 | __ret = (poly8x16_t) __builtin_neon_vqtbl3q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p1, 36); |
| 53606 | __ret = (poly64x2_t) __builtin_neon_vld1q_lane_v(__p0, (int8x16_t)__s1, __p2, 38); \ | 55312 | return __ret; |
| 53607 | __ret; \ | 55313 | } |
| 53608 | }) | | |
| 53609 | #else | 55314 | #else |
| 53610 | #define vld1q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 55315 | __ai poly8x16_t vqtbl3q_p8(poly8x16x3_t __p0, uint8x16_t __p1) { |
| 53611 | poly64x2_t __ret; \ | 55316 | poly8x16_t __ret; |
| 53612 | poly64x2_t __s1 = __p1; \ | 55317 | poly8x16x3_t __rev0; |
| 53613 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 55318 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53614 | __ret = (poly64x2_t) __builtin_neon_vld1q_lane_v(__p0, (int8x16_t)__rev1, __p2, 38); \ | 55319 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53615 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 55320 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53616 | __ret; \ | 55321 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53617 | }) | 55322 | __ret = (poly8x16_t) __builtin_neon_vqtbl3q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev1, 36); |
| | 55323 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55324 | return __ret; |
| | 55325 | } |
| 53618 | #endif | 55326 | #endif |
| 53619 | | 55327 | |
| 53620 | #ifdef __LITTLE_ENDIAN__ | 55328 | #ifdef __LITTLE_ENDIAN__ |
| 53621 | #define vld1q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 55329 | __ai uint8x16_t vqtbl3q_u8(uint8x16x3_t __p0, uint8x16_t __p1) { |
| 53622 | float64x2_t __ret; \ | 55330 | uint8x16_t __ret; |
| 53623 | float64x2_t __s1 = __p1; \ | 55331 | __ret = (uint8x16_t) __builtin_neon_vqtbl3q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p1, 48); |
| 53624 | __ret = (float64x2_t) __builtin_neon_vld1q_lane_v(__p0, (int8x16_t)__s1, __p2, 42); \ | 55332 | return __ret; |
| 53625 | __ret; \ | 55333 | } |
| 53626 | }) | | |
| 53627 | #else | 55334 | #else |
| 53628 | #define vld1q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 55335 | __ai uint8x16_t vqtbl3q_u8(uint8x16x3_t __p0, uint8x16_t __p1) { |
| 53629 | float64x2_t __ret; \ | 55336 | uint8x16_t __ret; |
| 53630 | float64x2_t __s1 = __p1; \ | 55337 | uint8x16x3_t __rev0; |
| 53631 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 55338 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53632 | __ret = (float64x2_t) __builtin_neon_vld1q_lane_v(__p0, (int8x16_t)__rev1, __p2, 42); \ | 55339 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53633 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 55340 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53634 | __ret; \ | 55341 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53635 | }) | 55342 | __ret = (uint8x16_t) __builtin_neon_vqtbl3q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev1, 48); |
| | 55343 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55344 | return __ret; |
| | 55345 | } |
| 53636 | #endif | 55346 | #endif |
| 53637 | | 55347 | |
| 53638 | #define vld1_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 53639 | float64x1_t __ret; \ | | |
| 53640 | float64x1_t __s1 = __p1; \ | | |
| 53641 | __ret = (float64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 10); \ | | |
| 53642 | __ret; \ | | |
| 53643 | }) | | |
| 53644 | #define vld1_p64_x2(__p0) __extension__ ({ \ | | |
| 53645 | poly64x1x2_t __ret; \ | | |
| 53646 | __builtin_neon_vld1_x2_v(&__ret, __p0, 6); \ | | |
| 53647 | __ret; \ | | |
| 53648 | }) | | |
| 53649 | #ifdef __LITTLE_ENDIAN__ | 55348 | #ifdef __LITTLE_ENDIAN__ |
| 53650 | #define vld1q_p64_x2(__p0) __extension__ ({ \ | 55349 | __ai int8x16_t vqtbl3q_s8(int8x16x3_t __p0, uint8x16_t __p1) { |
| 53651 | poly64x2x2_t __ret; \ | 55350 | int8x16_t __ret; |
| 53652 | __builtin_neon_vld1q_x2_v(&__ret, __p0, 38); \ | 55351 | __ret = (int8x16_t) __builtin_neon_vqtbl3q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p1, 32); |
| 53653 | __ret; \ | 55352 | return __ret; |
| 53654 | }) | 55353 | } |
| 53655 | #else | 55354 | #else |
| 53656 | #define vld1q_p64_x2(__p0) __extension__ ({ \ | 55355 | __ai int8x16_t vqtbl3q_s8(int8x16x3_t __p0, uint8x16_t __p1) { |
| 53657 | poly64x2x2_t __ret; \ | 55356 | int8x16_t __ret; |
| 53658 | __builtin_neon_vld1q_x2_v(&__ret, __p0, 38); \ | 55357 | int8x16x3_t __rev0; |
| 53659 | \ | 55358 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53660 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55359 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53661 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55360 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53662 | __ret; \ | 55361 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53663 | }) | 55362 | __ret = (int8x16_t) __builtin_neon_vqtbl3q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev1, 32); |
| | 55363 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55364 | return __ret; |
| | 55365 | } |
| 53664 | #endif | 55366 | #endif |
| 53665 | | 55367 | |
| 53666 | #ifdef __LITTLE_ENDIAN__ | 55368 | #ifdef __LITTLE_ENDIAN__ |
| 53667 | #define vld1q_f64_x2(__p0) __extension__ ({ \ | 55369 | __ai uint8x8_t vqtbl3_u8(uint8x16x3_t __p0, uint8x8_t __p1) { |
| 53668 | float64x2x2_t __ret; \ | 55370 | uint8x8_t __ret; |
| 53669 | __builtin_neon_vld1q_x2_v(&__ret, __p0, 42); \ | 55371 | __ret = (uint8x8_t) __builtin_neon_vqtbl3_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x8_t)__p1, 16); |
| 53670 | __ret; \ | 55372 | return __ret; |
| 53671 | }) | 55373 | } |
| 53672 | #else | 55374 | #else |
| 53673 | #define vld1q_f64_x2(__p0) __extension__ ({ \ | 55375 | __ai uint8x8_t vqtbl3_u8(uint8x16x3_t __p0, uint8x8_t __p1) { |
| 53674 | float64x2x2_t __ret; \ | 55376 | uint8x8_t __ret; |
| 53675 | __builtin_neon_vld1q_x2_v(&__ret, __p0, 42); \ | 55377 | uint8x16x3_t __rev0; |
| 53676 | \ | 55378 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53677 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55379 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53678 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55380 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53679 | __ret; \ | 55381 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53680 | }) | 55382 | __ret = (uint8x8_t) __builtin_neon_vqtbl3_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x8_t)__rev1, 16); |
| | 55383 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55384 | return __ret; |
| | 55385 | } |
| 53681 | #endif | 55386 | #endif |
| 53682 | | 55387 | |
| 53683 | #define vld1_f64_x2(__p0) __extension__ ({ \ | | |
| 53684 | float64x1x2_t __ret; \ | | |
| 53685 | __builtin_neon_vld1_x2_v(&__ret, __p0, 10); \ | | |
| 53686 | __ret; \ | | |
| 53687 | }) | | |
| 53688 | #define vld1_p64_x3(__p0) __extension__ ({ \ | | |
| 53689 | poly64x1x3_t __ret; \ | | |
| 53690 | __builtin_neon_vld1_x3_v(&__ret, __p0, 6); \ | | |
| 53691 | __ret; \ | | |
| 53692 | }) | | |
| 53693 | #ifdef __LITTLE_ENDIAN__ | 55388 | #ifdef __LITTLE_ENDIAN__ |
| 53694 | #define vld1q_p64_x3(__p0) __extension__ ({ \ | 55389 | __ai int8x8_t vqtbl3_s8(int8x16x3_t __p0, uint8x8_t __p1) { |
| 53695 | poly64x2x3_t __ret; \ | 55390 | int8x8_t __ret; |
| 53696 | __builtin_neon_vld1q_x3_v(&__ret, __p0, 38); \ | 55391 | __ret = (int8x8_t) __builtin_neon_vqtbl3_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x8_t)__p1, 0); |
| 53697 | __ret; \ | 55392 | return __ret; |
| 53698 | }) | 55393 | } |
| 53699 | #else | 55394 | #else |
| 53700 | #define vld1q_p64_x3(__p0) __extension__ ({ \ | 55395 | __ai int8x8_t vqtbl3_s8(int8x16x3_t __p0, uint8x8_t __p1) { |
| 53701 | poly64x2x3_t __ret; \ | 55396 | int8x8_t __ret; |
| 53702 | __builtin_neon_vld1q_x3_v(&__ret, __p0, 38); \ | 55397 | int8x16x3_t __rev0; |
| 53703 | \ | 55398 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53704 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55399 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53705 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55400 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53706 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 55401 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53707 | __ret; \ | 55402 | __ret = (int8x8_t) __builtin_neon_vqtbl3_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x8_t)__rev1, 0); |
| 53708 | }) | 55403 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55404 | return __ret; |
| | 55405 | } |
| 53709 | #endif | 55406 | #endif |
| 53710 | | 55407 | |
| 53711 | #ifdef __LITTLE_ENDIAN__ | 55408 | #ifdef __LITTLE_ENDIAN__ |
| 53712 | #define vld1q_f64_x3(__p0) __extension__ ({ \ | 55409 | __ai poly8x8_t vqtbl4_p8(poly8x16x4_t __p0, uint8x8_t __p1) { |
| 53713 | float64x2x3_t __ret; \ | 55410 | poly8x8_t __ret; |
| 53714 | __builtin_neon_vld1q_x3_v(&__ret, __p0, 42); \ | 55411 | __ret = (poly8x8_t) __builtin_neon_vqtbl4_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p0.val[3], (int8x8_t)__p1, 4); |
| 53715 | __ret; \ | 55412 | return __ret; |
| 53716 | }) | 55413 | } |
| 53717 | #else | 55414 | #else |
| 53718 | #define vld1q_f64_x3(__p0) __extension__ ({ \ | 55415 | __ai poly8x8_t vqtbl4_p8(poly8x16x4_t __p0, uint8x8_t __p1) { |
| 53719 | float64x2x3_t __ret; \ | 55416 | poly8x8_t __ret; |
| 53720 | __builtin_neon_vld1q_x3_v(&__ret, __p0, 42); \ | 55417 | poly8x16x4_t __rev0; |
| 53721 | \ | 55418 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53722 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55419 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53723 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55420 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53724 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 55421 | __rev0.val[3] = __builtin_shufflevector(__p0.val[3], __p0.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53725 | __ret; \ | 55422 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53726 | }) | 55423 | __ret = (poly8x8_t) __builtin_neon_vqtbl4_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev0.val[3], (int8x8_t)__rev1, 4); |
| | 55424 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55425 | return __ret; |
| | 55426 | } |
| 53727 | #endif | 55427 | #endif |
| 53728 | | 55428 | |
| 53729 | #define vld1_f64_x3(__p0) __extension__ ({ \ | | |
| 53730 | float64x1x3_t __ret; \ | | |
| 53731 | __builtin_neon_vld1_x3_v(&__ret, __p0, 10); \ | | |
| 53732 | __ret; \ | | |
| 53733 | }) | | |
| 53734 | #define vld1_p64_x4(__p0) __extension__ ({ \ | | |
| 53735 | poly64x1x4_t __ret; \ | | |
| 53736 | __builtin_neon_vld1_x4_v(&__ret, __p0, 6); \ | | |
| 53737 | __ret; \ | | |
| 53738 | }) | | |
| 53739 | #ifdef __LITTLE_ENDIAN__ | 55429 | #ifdef __LITTLE_ENDIAN__ |
| 53740 | #define vld1q_p64_x4(__p0) __extension__ ({ \ | 55430 | __ai poly8x16_t vqtbl4q_p8(poly8x16x4_t __p0, uint8x16_t __p1) { |
| 53741 | poly64x2x4_t __ret; \ | 55431 | poly8x16_t __ret; |
| 53742 | __builtin_neon_vld1q_x4_v(&__ret, __p0, 38); \ | 55432 | __ret = (poly8x16_t) __builtin_neon_vqtbl4q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p0.val[3], (int8x16_t)__p1, 36); |
| 53743 | __ret; \ | 55433 | return __ret; |
| 53744 | }) | 55434 | } |
| 53745 | #else | 55435 | #else |
| 53746 | #define vld1q_p64_x4(__p0) __extension__ ({ \ | 55436 | __ai poly8x16_t vqtbl4q_p8(poly8x16x4_t __p0, uint8x16_t __p1) { |
| 53747 | poly64x2x4_t __ret; \ | 55437 | poly8x16_t __ret; |
| 53748 | __builtin_neon_vld1q_x4_v(&__ret, __p0, 38); \ | 55438 | poly8x16x4_t __rev0; |
| 53749 | \ | 55439 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53750 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55440 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53751 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55441 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53752 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 55442 | __rev0.val[3] = __builtin_shufflevector(__p0.val[3], __p0.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53753 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ | 55443 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53754 | __ret; \ | 55444 | __ret = (poly8x16_t) __builtin_neon_vqtbl4q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev0.val[3], (int8x16_t)__rev1, 36); |
| 53755 | }) | 55445 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55446 | return __ret; |
| | 55447 | } |
| 53756 | #endif | 55448 | #endif |
| 53757 | | 55449 | |
| 53758 | #ifdef __LITTLE_ENDIAN__ | 55450 | #ifdef __LITTLE_ENDIAN__ |
| 53759 | #define vld1q_f64_x4(__p0) __extension__ ({ \ | 55451 | __ai uint8x16_t vqtbl4q_u8(uint8x16x4_t __p0, uint8x16_t __p1) { |
| 53760 | float64x2x4_t __ret; \ | 55452 | uint8x16_t __ret; |
| 53761 | __builtin_neon_vld1q_x4_v(&__ret, __p0, 42); \ | 55453 | __ret = (uint8x16_t) __builtin_neon_vqtbl4q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p0.val[3], (int8x16_t)__p1, 48); |
| 53762 | __ret; \ | 55454 | return __ret; |
| 53763 | }) | 55455 | } |
| 53764 | #else | 55456 | #else |
| 53765 | #define vld1q_f64_x4(__p0) __extension__ ({ \ | 55457 | __ai uint8x16_t vqtbl4q_u8(uint8x16x4_t __p0, uint8x16_t __p1) { |
| 53766 | float64x2x4_t __ret; \ | 55458 | uint8x16_t __ret; |
| 53767 | __builtin_neon_vld1q_x4_v(&__ret, __p0, 42); \ | 55459 | uint8x16x4_t __rev0; |
| 53768 | \ | 55460 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53769 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55461 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53770 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55462 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53771 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 55463 | __rev0.val[3] = __builtin_shufflevector(__p0.val[3], __p0.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53772 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ | 55464 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53773 | __ret; \ | 55465 | __ret = (uint8x16_t) __builtin_neon_vqtbl4q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev0.val[3], (int8x16_t)__rev1, 48); |
| 53774 | }) | 55466 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55467 | return __ret; |
| | 55468 | } |
| 53775 | #endif | 55469 | #endif |
| 53776 | | 55470 | |
| 53777 | #define vld1_f64_x4(__p0) __extension__ ({ \ | | |
| 53778 | float64x1x4_t __ret; \ | | |
| 53779 | __builtin_neon_vld1_x4_v(&__ret, __p0, 10); \ | | |
| 53780 | __ret; \ | | |
| 53781 | }) | | |
| 53782 | #define vld2_p64(__p0) __extension__ ({ \ | | |
| 53783 | poly64x1x2_t __ret; \ | | |
| 53784 | __builtin_neon_vld2_v(&__ret, __p0, 6); \ | | |
| 53785 | __ret; \ | | |
| 53786 | }) | | |
| 53787 | #ifdef __LITTLE_ENDIAN__ | 55471 | #ifdef __LITTLE_ENDIAN__ |
| 53788 | #define vld2q_p64(__p0) __extension__ ({ \ | 55472 | __ai int8x16_t vqtbl4q_s8(int8x16x4_t __p0, uint8x16_t __p1) { |
| 53789 | poly64x2x2_t __ret; \ | 55473 | int8x16_t __ret; |
| 53790 | __builtin_neon_vld2q_v(&__ret, __p0, 38); \ | 55474 | __ret = (int8x16_t) __builtin_neon_vqtbl4q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p0.val[3], (int8x16_t)__p1, 32); |
| 53791 | __ret; \ | 55475 | return __ret; |
| 53792 | }) | 55476 | } |
| 53793 | #else | 55477 | #else |
| 53794 | #define vld2q_p64(__p0) __extension__ ({ \ | 55478 | __ai int8x16_t vqtbl4q_s8(int8x16x4_t __p0, uint8x16_t __p1) { |
| 53795 | poly64x2x2_t __ret; \ | 55479 | int8x16_t __ret; |
| 53796 | __builtin_neon_vld2q_v(&__ret, __p0, 38); \ | 55480 | int8x16x4_t __rev0; |
| 53797 | \ | 55481 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53798 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55482 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53799 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55483 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53800 | __ret; \ | 55484 | __rev0.val[3] = __builtin_shufflevector(__p0.val[3], __p0.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53801 | }) | 55485 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55486 | __ret = (int8x16_t) __builtin_neon_vqtbl4q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev0.val[3], (int8x16_t)__rev1, 32); |
| | 55487 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55488 | return __ret; |
| | 55489 | } |
| 53802 | #endif | 55490 | #endif |
| 53803 | | 55491 | |
| 53804 | #ifdef __LITTLE_ENDIAN__ | 55492 | #ifdef __LITTLE_ENDIAN__ |
| 53805 | #define vld2q_u64(__p0) __extension__ ({ \ | 55493 | __ai uint8x8_t vqtbl4_u8(uint8x16x4_t __p0, uint8x8_t __p1) { |
| 53806 | uint64x2x2_t __ret; \ | 55494 | uint8x8_t __ret; |
| 53807 | __builtin_neon_vld2q_v(&__ret, __p0, 51); \ | 55495 | __ret = (uint8x8_t) __builtin_neon_vqtbl4_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p0.val[3], (int8x8_t)__p1, 16); |
| 53808 | __ret; \ | 55496 | return __ret; |
| 53809 | }) | 55497 | } |
| 53810 | #else | 55498 | #else |
| 53811 | #define vld2q_u64(__p0) __extension__ ({ \ | 55499 | __ai uint8x8_t vqtbl4_u8(uint8x16x4_t __p0, uint8x8_t __p1) { |
| 53812 | uint64x2x2_t __ret; \ | 55500 | uint8x8_t __ret; |
| 53813 | __builtin_neon_vld2q_v(&__ret, __p0, 51); \ | 55501 | uint8x16x4_t __rev0; |
| 53814 | \ | 55502 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53815 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55503 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53816 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55504 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53817 | __ret; \ | 55505 | __rev0.val[3] = __builtin_shufflevector(__p0.val[3], __p0.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53818 | }) | 55506 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55507 | __ret = (uint8x8_t) __builtin_neon_vqtbl4_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev0.val[3], (int8x8_t)__rev1, 16); |
| | 55508 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55509 | return __ret; |
| | 55510 | } |
| 53819 | #endif | 55511 | #endif |
| 53820 | | 55512 | |
| 53821 | #ifdef __LITTLE_ENDIAN__ | 55513 | #ifdef __LITTLE_ENDIAN__ |
| 53822 | #define vld2q_f64(__p0) __extension__ ({ \ | 55514 | __ai int8x8_t vqtbl4_s8(int8x16x4_t __p0, uint8x8_t __p1) { |
| 53823 | float64x2x2_t __ret; \ | 55515 | int8x8_t __ret; |
| 53824 | __builtin_neon_vld2q_v(&__ret, __p0, 42); \ | 55516 | __ret = (int8x8_t) __builtin_neon_vqtbl4_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p0.val[3], (int8x8_t)__p1, 0); |
| 53825 | __ret; \ | 55517 | return __ret; |
| 53826 | }) | 55518 | } |
| 53827 | #else | 55519 | #else |
| 53828 | #define vld2q_f64(__p0) __extension__ ({ \ | 55520 | __ai int8x8_t vqtbl4_s8(int8x16x4_t __p0, uint8x8_t __p1) { |
| 53829 | float64x2x2_t __ret; \ | 55521 | int8x8_t __ret; |
| 53830 | __builtin_neon_vld2q_v(&__ret, __p0, 42); \ | 55522 | int8x16x4_t __rev0; |
| 53831 | \ | 55523 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53832 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55524 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53833 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55525 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53834 | __ret; \ | 55526 | __rev0.val[3] = __builtin_shufflevector(__p0.val[3], __p0.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53835 | }) | 55527 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55528 | __ret = (int8x8_t) __builtin_neon_vqtbl4_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev0.val[3], (int8x8_t)__rev1, 0); |
| | 55529 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55530 | return __ret; |
| | 55531 | } |
| 53836 | #endif | 55532 | #endif |
| 53837 | | 55533 | |
| 53838 | #ifdef __LITTLE_ENDIAN__ | 55534 | #ifdef __LITTLE_ENDIAN__ |
| 53839 | #define vld2q_s64(__p0) __extension__ ({ \ | 55535 | __ai poly8x8_t vqtbx1_p8(poly8x8_t __p0, poly8x16_t __p1, uint8x8_t __p2) { |
| 53840 | int64x2x2_t __ret; \ | 55536 | poly8x8_t __ret; |
| 53841 | __builtin_neon_vld2q_v(&__ret, __p0, 35); \ | 55537 | __ret = (poly8x8_t) __builtin_neon_vqtbx1_v((int8x8_t)__p0, (int8x16_t)__p1, (int8x8_t)__p2, 4); |
| 53842 | __ret; \ | 55538 | return __ret; |
| 53843 | }) | 55539 | } |
| 53844 | #else | 55540 | #else |
| 53845 | #define vld2q_s64(__p0) __extension__ ({ \ | 55541 | __ai poly8x8_t vqtbx1_p8(poly8x8_t __p0, poly8x16_t __p1, uint8x8_t __p2) { |
| 53846 | int64x2x2_t __ret; \ | 55542 | poly8x8_t __ret; |
| 53847 | __builtin_neon_vld2q_v(&__ret, __p0, 35); \ | 55543 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53848 | \ | 55544 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53849 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55545 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53850 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55546 | __ret = (poly8x8_t) __builtin_neon_vqtbx1_v((int8x8_t)__rev0, (int8x16_t)__rev1, (int8x8_t)__rev2, 4); |
| 53851 | __ret; \ | 55547 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53852 | }) | 55548 | return __ret; |
| | 55549 | } |
| 53853 | #endif | 55550 | #endif |
| 53854 | | 55551 | |
| 53855 | #define vld2_f64(__p0) __extension__ ({ \ | | |
| 53856 | float64x1x2_t __ret; \ | | |
| 53857 | __builtin_neon_vld2_v(&__ret, __p0, 10); \ | | |
| 53858 | __ret; \ | | |
| 53859 | }) | | |
| 53860 | #define vld2_dup_p64(__p0) __extension__ ({ \ | | |
| 53861 | poly64x1x2_t __ret; \ | | |
| 53862 | __builtin_neon_vld2_dup_v(&__ret, __p0, 6); \ | | |
| 53863 | __ret; \ | | |
| 53864 | }) | | |
| 53865 | #ifdef __LITTLE_ENDIAN__ | 55552 | #ifdef __LITTLE_ENDIAN__ |
| 53866 | #define vld2q_dup_p64(__p0) __extension__ ({ \ | 55553 | __ai poly8x16_t vqtbx1q_p8(poly8x16_t __p0, poly8x16_t __p1, uint8x16_t __p2) { |
| 53867 | poly64x2x2_t __ret; \ | 55554 | poly8x16_t __ret; |
| 53868 | __builtin_neon_vld2q_dup_v(&__ret, __p0, 38); \ | 55555 | __ret = (poly8x16_t) __builtin_neon_vqtbx1q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 36); |
| 53869 | __ret; \ | 55556 | return __ret; |
| 53870 | }) | 55557 | } |
| 53871 | #else | 55558 | #else |
| 53872 | #define vld2q_dup_p64(__p0) __extension__ ({ \ | 55559 | __ai poly8x16_t vqtbx1q_p8(poly8x16_t __p0, poly8x16_t __p1, uint8x16_t __p2) { |
| 53873 | poly64x2x2_t __ret; \ | 55560 | poly8x16_t __ret; |
| 53874 | __builtin_neon_vld2q_dup_v(&__ret, __p0, 38); \ | 55561 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53875 | \ | 55562 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53876 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55563 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53877 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55564 | __ret = (poly8x16_t) __builtin_neon_vqtbx1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 36); |
| 53878 | __ret; \ | 55565 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53879 | }) | 55566 | return __ret; |
| | 55567 | } |
| 53880 | #endif | 55568 | #endif |
| 53881 | | 55569 | |
| 53882 | #ifdef __LITTLE_ENDIAN__ | 55570 | #ifdef __LITTLE_ENDIAN__ |
| 53883 | #define vld2q_dup_f64(__p0) __extension__ ({ \ | 55571 | __ai uint8x16_t vqtbx1q_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) { |
| 53884 | float64x2x2_t __ret; \ | 55572 | uint8x16_t __ret; |
| 53885 | __builtin_neon_vld2q_dup_v(&__ret, __p0, 42); \ | 55573 | __ret = (uint8x16_t) __builtin_neon_vqtbx1q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 48); |
| 53886 | __ret; \ | 55574 | return __ret; |
| 53887 | }) | 55575 | } |
| 53888 | #else | 55576 | #else |
| 53889 | #define vld2q_dup_f64(__p0) __extension__ ({ \ | 55577 | __ai uint8x16_t vqtbx1q_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) { |
| 53890 | float64x2x2_t __ret; \ | 55578 | uint8x16_t __ret; |
| 53891 | __builtin_neon_vld2q_dup_v(&__ret, __p0, 42); \ | 55579 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53892 | \ | 55580 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53893 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55581 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53894 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55582 | __ret = (uint8x16_t) __builtin_neon_vqtbx1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 48); |
| 53895 | __ret; \ | 55583 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53896 | }) | 55584 | return __ret; |
| | 55585 | } |
| 53897 | #endif | 55586 | #endif |
| 53898 | | 55587 | |
| 53899 | #define vld2_dup_f64(__p0) __extension__ ({ \ | | |
| 53900 | float64x1x2_t __ret; \ | | |
| 53901 | __builtin_neon_vld2_dup_v(&__ret, __p0, 10); \ | | |
| 53902 | __ret; \ | | |
| 53903 | }) | | |
| 53904 | #define vld2_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 53905 | poly64x1x2_t __ret; \ | | |
| 53906 | poly64x1x2_t __s1 = __p1; \ | | |
| 53907 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 6); \ | | |
| 53908 | __ret; \ | | |
| 53909 | }) | | |
| 53910 | #ifdef __LITTLE_ENDIAN__ | 55588 | #ifdef __LITTLE_ENDIAN__ |
| 53911 | #define vld2q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 55589 | __ai int8x16_t vqtbx1q_s8(int8x16_t __p0, int8x16_t __p1, uint8x16_t __p2) { |
| 53912 | poly8x16x2_t __ret; \ | 55590 | int8x16_t __ret; |
| 53913 | poly8x16x2_t __s1 = __p1; \ | 55591 | __ret = (int8x16_t) __builtin_neon_vqtbx1q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 32); |
| 53914 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 36); \ | 55592 | return __ret; |
| 53915 | __ret; \ | 55593 | } |
| 53916 | }) | | |
| 53917 | #else | 55594 | #else |
| 53918 | #define vld2q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 55595 | __ai int8x16_t vqtbx1q_s8(int8x16_t __p0, int8x16_t __p1, uint8x16_t __p2) { |
| 53919 | poly8x16x2_t __ret; \ | 55596 | int8x16_t __ret; |
| 53920 | poly8x16x2_t __s1 = __p1; \ | 55597 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53921 | poly8x16x2_t __rev1; \ | 55598 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53922 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55599 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53923 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55600 | __ret = (int8x16_t) __builtin_neon_vqtbx1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 32); |
| 53924 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 36); \ | 55601 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53925 | \ | 55602 | return __ret; |
| 53926 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55603 | } |
| 53927 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 53928 | __ret; \ | | |
| 53929 | }) | | |
| 53930 | #endif | 55604 | #endif |
| 53931 | | 55605 | |
| 53932 | #ifdef __LITTLE_ENDIAN__ | 55606 | #ifdef __LITTLE_ENDIAN__ |
| 53933 | #define vld2q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 55607 | __ai uint8x8_t vqtbx1_u8(uint8x8_t __p0, uint8x16_t __p1, uint8x8_t __p2) { |
| 53934 | poly64x2x2_t __ret; \ | 55608 | uint8x8_t __ret; |
| 53935 | poly64x2x2_t __s1 = __p1; \ | 55609 | __ret = (uint8x8_t) __builtin_neon_vqtbx1_v((int8x8_t)__p0, (int8x16_t)__p1, (int8x8_t)__p2, 16); |
| 53936 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 38); \ | 55610 | return __ret; |
| 53937 | __ret; \ | 55611 | } |
| 53938 | }) | | |
| 53939 | #else | 55612 | #else |
| 53940 | #define vld2q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 55613 | __ai uint8x8_t vqtbx1_u8(uint8x8_t __p0, uint8x16_t __p1, uint8x8_t __p2) { |
| 53941 | poly64x2x2_t __ret; \ | 55614 | uint8x8_t __ret; |
| 53942 | poly64x2x2_t __s1 = __p1; \ | 55615 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53943 | poly64x2x2_t __rev1; \ | 55616 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53944 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 55617 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53945 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 55618 | __ret = (uint8x8_t) __builtin_neon_vqtbx1_v((int8x8_t)__rev0, (int8x16_t)__rev1, (int8x8_t)__rev2, 16); |
| 53946 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 38); \ | 55619 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53947 | \ | 55620 | return __ret; |
| 53948 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55621 | } |
| 53949 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | | |
| 53950 | __ret; \ | | |
| 53951 | }) | | |
| 53952 | #endif | 55622 | #endif |
| 53953 | | 55623 | |
| 53954 | #ifdef __LITTLE_ENDIAN__ | 55624 | #ifdef __LITTLE_ENDIAN__ |
| 53955 | #define vld2q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ | 55625 | __ai int8x8_t vqtbx1_s8(int8x8_t __p0, int8x16_t __p1, uint8x8_t __p2) { |
| 53956 | uint8x16x2_t __ret; \ | 55626 | int8x8_t __ret; |
| 53957 | uint8x16x2_t __s1 = __p1; \ | 55627 | __ret = (int8x8_t) __builtin_neon_vqtbx1_v((int8x8_t)__p0, (int8x16_t)__p1, (int8x8_t)__p2, 0); |
| 53958 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 48); \ | 55628 | return __ret; |
| 53959 | __ret; \ | 55629 | } |
| 53960 | }) | | |
| 53961 | #else | 55630 | #else |
| 53962 | #define vld2q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ | 55631 | __ai int8x8_t vqtbx1_s8(int8x8_t __p0, int8x16_t __p1, uint8x8_t __p2) { |
| 53963 | uint8x16x2_t __ret; \ | 55632 | int8x8_t __ret; |
| 53964 | uint8x16x2_t __s1 = __p1; \ | 55633 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53965 | uint8x16x2_t __rev1; \ | 55634 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53966 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55635 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53967 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55636 | __ret = (int8x8_t) __builtin_neon_vqtbx1_v((int8x8_t)__rev0, (int8x16_t)__rev1, (int8x8_t)__rev2, 0); |
| 53968 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 48); \ | 55637 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53969 | \ | 55638 | return __ret; |
| 53970 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55639 | } |
| 53971 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 53972 | __ret; \ | | |
| 53973 | }) | | |
| 53974 | #endif | 55640 | #endif |
| 53975 | | 55641 | |
| 53976 | #ifdef __LITTLE_ENDIAN__ | 55642 | #ifdef __LITTLE_ENDIAN__ |
| 53977 | #define vld2q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 55643 | __ai poly8x8_t vqtbx2_p8(poly8x8_t __p0, poly8x16x2_t __p1, uint8x8_t __p2) { |
| 53978 | uint64x2x2_t __ret; \ | 55644 | poly8x8_t __ret; |
| 53979 | uint64x2x2_t __s1 = __p1; \ | 55645 | __ret = (poly8x8_t) __builtin_neon_vqtbx2_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x8_t)__p2, 4); |
| 53980 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 51); \ | 55646 | return __ret; |
| 53981 | __ret; \ | 55647 | } |
| 53982 | }) | | |
| 53983 | #else | 55648 | #else |
| 53984 | #define vld2q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 55649 | __ai poly8x8_t vqtbx2_p8(poly8x8_t __p0, poly8x16x2_t __p1, uint8x8_t __p2) { |
| 53985 | uint64x2x2_t __ret; \ | 55650 | poly8x8_t __ret; |
| 53986 | uint64x2x2_t __s1 = __p1; \ | 55651 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53987 | uint64x2x2_t __rev1; \ | 55652 | poly8x16x2_t __rev1; |
| 53988 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 55653 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53989 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 55654 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53990 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 51); \ | 55655 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53991 | \ | 55656 | __ret = (poly8x8_t) __builtin_neon_vqtbx2_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x8_t)__rev2, 4); |
| 53992 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55657 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 53993 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55658 | return __ret; |
| 53994 | __ret; \ | 55659 | } |
| 53995 | }) | | |
| 53996 | #endif | 55660 | #endif |
| 53997 | | 55661 | |
| 53998 | #ifdef __LITTLE_ENDIAN__ | 55662 | #ifdef __LITTLE_ENDIAN__ |
| 53999 | #define vld2q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ | 55663 | __ai poly8x16_t vqtbx2q_p8(poly8x16_t __p0, poly8x16x2_t __p1, uint8x16_t __p2) { |
| 54000 | int8x16x2_t __ret; \ | 55664 | poly8x16_t __ret; |
| 54001 | int8x16x2_t __s1 = __p1; \ | 55665 | __ret = (poly8x16_t) __builtin_neon_vqtbx2q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p2, 36); |
| 54002 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 32); \ | 55666 | return __ret; |
| 54003 | __ret; \ | 55667 | } |
| 54004 | }) | | |
| 54005 | #else | 55668 | #else |
| 54006 | #define vld2q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ | 55669 | __ai poly8x16_t vqtbx2q_p8(poly8x16_t __p0, poly8x16x2_t __p1, uint8x16_t __p2) { |
| 54007 | int8x16x2_t __ret; \ | 55670 | poly8x16_t __ret; |
| 54008 | int8x16x2_t __s1 = __p1; \ | 55671 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54009 | int8x16x2_t __rev1; \ | 55672 | poly8x16x2_t __rev1; |
| 54010 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55673 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54011 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55674 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54012 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 32); \ | 55675 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54013 | \ | 55676 | __ret = (poly8x16_t) __builtin_neon_vqtbx2q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev2, 36); |
| 54014 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55677 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54015 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55678 | return __ret; |
| 54016 | __ret; \ | 55679 | } |
| 54017 | }) | | |
| 54018 | #endif | 55680 | #endif |
| 54019 | | 55681 | |
| 54020 | #ifdef __LITTLE_ENDIAN__ | 55682 | #ifdef __LITTLE_ENDIAN__ |
| 54021 | #define vld2q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 55683 | __ai uint8x16_t vqtbx2q_u8(uint8x16_t __p0, uint8x16x2_t __p1, uint8x16_t __p2) { |
| 54022 | float64x2x2_t __ret; \ | 55684 | uint8x16_t __ret; |
| 54023 | float64x2x2_t __s1 = __p1; \ | 55685 | __ret = (uint8x16_t) __builtin_neon_vqtbx2q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p2, 48); |
| 54024 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 42); \ | 55686 | return __ret; |
| 54025 | __ret; \ | 55687 | } |
| 54026 | }) | | |
| 54027 | #else | 55688 | #else |
| 54028 | #define vld2q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 55689 | __ai uint8x16_t vqtbx2q_u8(uint8x16_t __p0, uint8x16x2_t __p1, uint8x16_t __p2) { |
| 54029 | float64x2x2_t __ret; \ | 55690 | uint8x16_t __ret; |
| 54030 | float64x2x2_t __s1 = __p1; \ | 55691 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54031 | float64x2x2_t __rev1; \ | 55692 | uint8x16x2_t __rev1; |
| 54032 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 55693 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54033 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 55694 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54034 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 42); \ | 55695 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54035 | \ | 55696 | __ret = (uint8x16_t) __builtin_neon_vqtbx2q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev2, 48); |
| 54036 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55697 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54037 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55698 | return __ret; |
| 54038 | __ret; \ | 55699 | } |
| 54039 | }) | | |
| 54040 | #endif | 55700 | #endif |
| 54041 | | 55701 | |
| 54042 | #ifdef __LITTLE_ENDIAN__ | 55702 | #ifdef __LITTLE_ENDIAN__ |
| 54043 | #define vld2q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 55703 | __ai int8x16_t vqtbx2q_s8(int8x16_t __p0, int8x16x2_t __p1, uint8x16_t __p2) { |
| 54044 | int64x2x2_t __ret; \ | 55704 | int8x16_t __ret; |
| 54045 | int64x2x2_t __s1 = __p1; \ | 55705 | __ret = (int8x16_t) __builtin_neon_vqtbx2q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p2, 32); |
| 54046 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 35); \ | 55706 | return __ret; |
| 54047 | __ret; \ | 55707 | } |
| 54048 | }) | | |
| 54049 | #else | 55708 | #else |
| 54050 | #define vld2q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 55709 | __ai int8x16_t vqtbx2q_s8(int8x16_t __p0, int8x16x2_t __p1, uint8x16_t __p2) { |
| 54051 | int64x2x2_t __ret; \ | 55710 | int8x16_t __ret; |
| 54052 | int64x2x2_t __s1 = __p1; \ | 55711 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54053 | int64x2x2_t __rev1; \ | 55712 | int8x16x2_t __rev1; |
| 54054 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 55713 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54055 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 55714 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54056 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 35); \ | 55715 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54057 | \ | 55716 | __ret = (int8x16_t) __builtin_neon_vqtbx2q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev2, 32); |
| 54058 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55717 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54059 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55718 | return __ret; |
| 54060 | __ret; \ | 55719 | } |
| 54061 | }) | | |
| 54062 | #endif | 55720 | #endif |
| 54063 | | 55721 | |
| 54064 | #define vld2_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 54065 | uint64x1x2_t __ret; \ | | |
| 54066 | uint64x1x2_t __s1 = __p1; \ | | |
| 54067 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 19); \ | | |
| 54068 | __ret; \ | | |
| 54069 | }) | | |
| 54070 | #define vld2_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 54071 | float64x1x2_t __ret; \ | | |
| 54072 | float64x1x2_t __s1 = __p1; \ | | |
| 54073 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 10); \ | | |
| 54074 | __ret; \ | | |
| 54075 | }) | | |
| 54076 | #define vld2_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 54077 | int64x1x2_t __ret; \ | | |
| 54078 | int64x1x2_t __s1 = __p1; \ | | |
| 54079 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 3); \ | | |
| 54080 | __ret; \ | | |
| 54081 | }) | | |
| 54082 | #define vld3_p64(__p0) __extension__ ({ \ | | |
| 54083 | poly64x1x3_t __ret; \ | | |
| 54084 | __builtin_neon_vld3_v(&__ret, __p0, 6); \ | | |
| 54085 | __ret; \ | | |
| 54086 | }) | | |
| 54087 | #ifdef __LITTLE_ENDIAN__ | 55722 | #ifdef __LITTLE_ENDIAN__ |
| 54088 | #define vld3q_p64(__p0) __extension__ ({ \ | 55723 | __ai uint8x8_t vqtbx2_u8(uint8x8_t __p0, uint8x16x2_t __p1, uint8x8_t __p2) { |
| 54089 | poly64x2x3_t __ret; \ | 55724 | uint8x8_t __ret; |
| 54090 | __builtin_neon_vld3q_v(&__ret, __p0, 38); \ | 55725 | __ret = (uint8x8_t) __builtin_neon_vqtbx2_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x8_t)__p2, 16); |
| 54091 | __ret; \ | 55726 | return __ret; |
| 54092 | }) | 55727 | } |
| 54093 | #else | 55728 | #else |
| 54094 | #define vld3q_p64(__p0) __extension__ ({ \ | 55729 | __ai uint8x8_t vqtbx2_u8(uint8x8_t __p0, uint8x16x2_t __p1, uint8x8_t __p2) { |
| 54095 | poly64x2x3_t __ret; \ | 55730 | uint8x8_t __ret; |
| 54096 | __builtin_neon_vld3q_v(&__ret, __p0, 38); \ | 55731 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54097 | \ | 55732 | uint8x16x2_t __rev1; |
| 54098 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55733 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54099 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55734 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54100 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 55735 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54101 | __ret; \ | 55736 | __ret = (uint8x8_t) __builtin_neon_vqtbx2_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x8_t)__rev2, 16); |
| 54102 | }) | 55737 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55738 | return __ret; |
| | 55739 | } |
| 54103 | #endif | 55740 | #endif |
| 54104 | | 55741 | |
| 54105 | #ifdef __LITTLE_ENDIAN__ | 55742 | #ifdef __LITTLE_ENDIAN__ |
| 54106 | #define vld3q_u64(__p0) __extension__ ({ \ | 55743 | __ai int8x8_t vqtbx2_s8(int8x8_t __p0, int8x16x2_t __p1, uint8x8_t __p2) { |
| 54107 | uint64x2x3_t __ret; \ | 55744 | int8x8_t __ret; |
| 54108 | __builtin_neon_vld3q_v(&__ret, __p0, 51); \ | 55745 | __ret = (int8x8_t) __builtin_neon_vqtbx2_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x8_t)__p2, 0); |
| 54109 | __ret; \ | 55746 | return __ret; |
| 54110 | }) | 55747 | } |
| 54111 | #else | 55748 | #else |
| 54112 | #define vld3q_u64(__p0) __extension__ ({ \ | 55749 | __ai int8x8_t vqtbx2_s8(int8x8_t __p0, int8x16x2_t __p1, uint8x8_t __p2) { |
| 54113 | uint64x2x3_t __ret; \ | 55750 | int8x8_t __ret; |
| 54114 | __builtin_neon_vld3q_v(&__ret, __p0, 51); \ | 55751 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54115 | \ | 55752 | int8x16x2_t __rev1; |
| 54116 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55753 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54117 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55754 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54118 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 55755 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54119 | __ret; \ | 55756 | __ret = (int8x8_t) __builtin_neon_vqtbx2_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x8_t)__rev2, 0); |
| 54120 | }) | 55757 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55758 | return __ret; |
| | 55759 | } |
| 54121 | #endif | 55760 | #endif |
| 54122 | | 55761 | |
| 54123 | #ifdef __LITTLE_ENDIAN__ | 55762 | #ifdef __LITTLE_ENDIAN__ |
| 54124 | #define vld3q_f64(__p0) __extension__ ({ \ | 55763 | __ai poly8x8_t vqtbx3_p8(poly8x8_t __p0, poly8x16x3_t __p1, uint8x8_t __p2) { |
| 54125 | float64x2x3_t __ret; \ | 55764 | poly8x8_t __ret; |
| 54126 | __builtin_neon_vld3q_v(&__ret, __p0, 42); \ | 55765 | __ret = (poly8x8_t) __builtin_neon_vqtbx3_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x8_t)__p2, 4); |
| 54127 | __ret; \ | 55766 | return __ret; |
| 54128 | }) | 55767 | } |
| 54129 | #else | 55768 | #else |
| 54130 | #define vld3q_f64(__p0) __extension__ ({ \ | 55769 | __ai poly8x8_t vqtbx3_p8(poly8x8_t __p0, poly8x16x3_t __p1, uint8x8_t __p2) { |
| 54131 | float64x2x3_t __ret; \ | 55770 | poly8x8_t __ret; |
| 54132 | __builtin_neon_vld3q_v(&__ret, __p0, 42); \ | 55771 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54133 | \ | 55772 | poly8x16x3_t __rev1; |
| 54134 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55773 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54135 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55774 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54136 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 55775 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54137 | __ret; \ | 55776 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54138 | }) | 55777 | __ret = (poly8x8_t) __builtin_neon_vqtbx3_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x8_t)__rev2, 4); |
| | 55778 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55779 | return __ret; |
| | 55780 | } |
| 54139 | #endif | 55781 | #endif |
| 54140 | | 55782 | |
| 54141 | #ifdef __LITTLE_ENDIAN__ | 55783 | #ifdef __LITTLE_ENDIAN__ |
| 54142 | #define vld3q_s64(__p0) __extension__ ({ \ | 55784 | __ai poly8x16_t vqtbx3q_p8(poly8x16_t __p0, poly8x16x3_t __p1, uint8x16_t __p2) { |
| 54143 | int64x2x3_t __ret; \ | 55785 | poly8x16_t __ret; |
| 54144 | __builtin_neon_vld3q_v(&__ret, __p0, 35); \ | 55786 | __ret = (poly8x16_t) __builtin_neon_vqtbx3q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p2, 36); |
| 54145 | __ret; \ | 55787 | return __ret; |
| 54146 | }) | 55788 | } |
| 54147 | #else | 55789 | #else |
| 54148 | #define vld3q_s64(__p0) __extension__ ({ \ | 55790 | __ai poly8x16_t vqtbx3q_p8(poly8x16_t __p0, poly8x16x3_t __p1, uint8x16_t __p2) { |
| 54149 | int64x2x3_t __ret; \ | 55791 | poly8x16_t __ret; |
| 54150 | __builtin_neon_vld3q_v(&__ret, __p0, 35); \ | 55792 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54151 | \ | 55793 | poly8x16x3_t __rev1; |
| 54152 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55794 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54153 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55795 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54154 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 55796 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54155 | __ret; \ | 55797 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54156 | }) | 55798 | __ret = (poly8x16_t) __builtin_neon_vqtbx3q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev2, 36); |
| | 55799 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55800 | return __ret; |
| | 55801 | } |
| | 55802 | #endif |
| | 55803 | |
| | 55804 | #ifdef __LITTLE_ENDIAN__ |
| | 55805 | __ai uint8x16_t vqtbx3q_u8(uint8x16_t __p0, uint8x16x3_t __p1, uint8x16_t __p2) { |
| | 55806 | uint8x16_t __ret; |
| | 55807 | __ret = (uint8x16_t) __builtin_neon_vqtbx3q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p2, 48); |
| | 55808 | return __ret; |
| | 55809 | } |
| | 55810 | #else |
| | 55811 | __ai uint8x16_t vqtbx3q_u8(uint8x16_t __p0, uint8x16x3_t __p1, uint8x16_t __p2) { |
| | 55812 | uint8x16_t __ret; |
| | 55813 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55814 | uint8x16x3_t __rev1; |
| | 55815 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55816 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55817 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55818 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55819 | __ret = (uint8x16_t) __builtin_neon_vqtbx3q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev2, 48); |
| | 55820 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55821 | return __ret; |
| | 55822 | } |
| 54157 | #endif | 55823 | #endif |
| 54158 | | 55824 | |
| 54159 | #define vld3_f64(__p0) __extension__ ({ \ | | |
| 54160 | float64x1x3_t __ret; \ | | |
| 54161 | __builtin_neon_vld3_v(&__ret, __p0, 10); \ | | |
| 54162 | __ret; \ | | |
| 54163 | }) | | |
| 54164 | #define vld3_dup_p64(__p0) __extension__ ({ \ | | |
| 54165 | poly64x1x3_t __ret; \ | | |
| 54166 | __builtin_neon_vld3_dup_v(&__ret, __p0, 6); \ | | |
| 54167 | __ret; \ | | |
| 54168 | }) | | |
| 54169 | #ifdef __LITTLE_ENDIAN__ | 55825 | #ifdef __LITTLE_ENDIAN__ |
| 54170 | #define vld3q_dup_p64(__p0) __extension__ ({ \ | 55826 | __ai int8x16_t vqtbx3q_s8(int8x16_t __p0, int8x16x3_t __p1, uint8x16_t __p2) { |
| 54171 | poly64x2x3_t __ret; \ | 55827 | int8x16_t __ret; |
| 54172 | __builtin_neon_vld3q_dup_v(&__ret, __p0, 38); \ | 55828 | __ret = (int8x16_t) __builtin_neon_vqtbx3q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p2, 32); |
| 54173 | __ret; \ | 55829 | return __ret; |
| 54174 | }) | 55830 | } |
| 54175 | #else | 55831 | #else |
| 54176 | #define vld3q_dup_p64(__p0) __extension__ ({ \ | 55832 | __ai int8x16_t vqtbx3q_s8(int8x16_t __p0, int8x16x3_t __p1, uint8x16_t __p2) { |
| 54177 | poly64x2x3_t __ret; \ | 55833 | int8x16_t __ret; |
| 54178 | __builtin_neon_vld3q_dup_v(&__ret, __p0, 38); \ | 55834 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54179 | \ | 55835 | int8x16x3_t __rev1; |
| 54180 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55836 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54181 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55837 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54182 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 55838 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54183 | __ret; \ | 55839 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54184 | }) | 55840 | __ret = (int8x16_t) __builtin_neon_vqtbx3q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev2, 32); |
| | 55841 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55842 | return __ret; |
| | 55843 | } |
| 54185 | #endif | 55844 | #endif |
| 54186 | | 55845 | |
| 54187 | #ifdef __LITTLE_ENDIAN__ | 55846 | #ifdef __LITTLE_ENDIAN__ |
| 54188 | #define vld3q_dup_f64(__p0) __extension__ ({ \ | 55847 | __ai uint8x8_t vqtbx3_u8(uint8x8_t __p0, uint8x16x3_t __p1, uint8x8_t __p2) { |
| 54189 | float64x2x3_t __ret; \ | 55848 | uint8x8_t __ret; |
| 54190 | __builtin_neon_vld3q_dup_v(&__ret, __p0, 42); \ | 55849 | __ret = (uint8x8_t) __builtin_neon_vqtbx3_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x8_t)__p2, 16); |
| 54191 | __ret; \ | 55850 | return __ret; |
| 54192 | }) | 55851 | } |
| 54193 | #else | 55852 | #else |
| 54194 | #define vld3q_dup_f64(__p0) __extension__ ({ \ | 55853 | __ai uint8x8_t vqtbx3_u8(uint8x8_t __p0, uint8x16x3_t __p1, uint8x8_t __p2) { |
| 54195 | float64x2x3_t __ret; \ | 55854 | uint8x8_t __ret; |
| 54196 | __builtin_neon_vld3q_dup_v(&__ret, __p0, 42); \ | 55855 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54197 | \ | 55856 | uint8x16x3_t __rev1; |
| 54198 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55857 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54199 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55858 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54200 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 55859 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54201 | __ret; \ | 55860 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54202 | }) | 55861 | __ret = (uint8x8_t) __builtin_neon_vqtbx3_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x8_t)__rev2, 16); |
| | 55862 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 55863 | return __ret; |
| | 55864 | } |
| 54203 | #endif | 55865 | #endif |
| 54204 | | 55866 | |
| 54205 | #define vld3_dup_f64(__p0) __extension__ ({ \ | | |
| 54206 | float64x1x3_t __ret; \ | | |
| 54207 | __builtin_neon_vld3_dup_v(&__ret, __p0, 10); \ | | |
| 54208 | __ret; \ | | |
| 54209 | }) | | |
| 54210 | #define vld3_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 54211 | poly64x1x3_t __ret; \ | | |
| 54212 | poly64x1x3_t __s1 = __p1; \ | | |
| 54213 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 6); \ | | |
| 54214 | __ret; \ | | |
| 54215 | }) | | |
| 54216 | #ifdef __LITTLE_ENDIAN__ | 55867 | #ifdef __LITTLE_ENDIAN__ |
| 54217 | #define vld3q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 55868 | __ai int8x8_t vqtbx3_s8(int8x8_t __p0, int8x16x3_t __p1, uint8x8_t __p2) { |
| 54218 | poly8x16x3_t __ret; \ | 55869 | int8x8_t __ret; |
| 54219 | poly8x16x3_t __s1 = __p1; \ | 55870 | __ret = (int8x8_t) __builtin_neon_vqtbx3_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x8_t)__p2, 0); |
| 54220 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 36); \ | 55871 | return __ret; |
| 54221 | __ret; \ | 55872 | } |
| 54222 | }) | | |
| 54223 | #else | 55873 | #else |
| 54224 | #define vld3q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 55874 | __ai int8x8_t vqtbx3_s8(int8x8_t __p0, int8x16x3_t __p1, uint8x8_t __p2) { |
| 54225 | poly8x16x3_t __ret; \ | 55875 | int8x8_t __ret; |
| 54226 | poly8x16x3_t __s1 = __p1; \ | 55876 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54227 | poly8x16x3_t __rev1; \ | 55877 | int8x16x3_t __rev1; |
| 54228 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55878 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54229 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55879 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54230 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55880 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54231 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 36); \ | 55881 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54232 | \ | 55882 | __ret = (int8x8_t) __builtin_neon_vqtbx3_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x8_t)__rev2, 0); |
| 54233 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55883 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54234 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55884 | return __ret; |
| 54235 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55885 | } |
| 54236 | __ret; \ | | |
| 54237 | }) | | |
| 54238 | #endif | 55886 | #endif |
| 54239 | | 55887 | |
| 54240 | #ifdef __LITTLE_ENDIAN__ | 55888 | #ifdef __LITTLE_ENDIAN__ |
| 54241 | #define vld3q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 55889 | __ai poly8x8_t vqtbx4_p8(poly8x8_t __p0, poly8x16x4_t __p1, uint8x8_t __p2) { |
| 54242 | poly64x2x3_t __ret; \ | 55890 | poly8x8_t __ret; |
| 54243 | poly64x2x3_t __s1 = __p1; \ | 55891 | __ret = (poly8x8_t) __builtin_neon_vqtbx4_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p1.val[3], (int8x8_t)__p2, 4); |
| 54244 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 38); \ | 55892 | return __ret; |
| 54245 | __ret; \ | 55893 | } |
| 54246 | }) | | |
| 54247 | #else | 55894 | #else |
| 54248 | #define vld3q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 55895 | __ai poly8x8_t vqtbx4_p8(poly8x8_t __p0, poly8x16x4_t __p1, uint8x8_t __p2) { |
| 54249 | poly64x2x3_t __ret; \ | 55896 | poly8x8_t __ret; |
| 54250 | poly64x2x3_t __s1 = __p1; \ | 55897 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54251 | poly64x2x3_t __rev1; \ | 55898 | poly8x16x4_t __rev1; |
| 54252 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 55899 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54253 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 55900 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54254 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 55901 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54255 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 38); \ | 55902 | __rev1.val[3] = __builtin_shufflevector(__p1.val[3], __p1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54256 | \ | 55903 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54257 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55904 | __ret = (poly8x8_t) __builtin_neon_vqtbx4_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], (int8x8_t)__rev2, 4); |
| 54258 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55905 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54259 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 55906 | return __ret; |
| 54260 | __ret; \ | 55907 | } |
| 54261 | }) | | |
| 54262 | #endif | 55908 | #endif |
| 54263 | | 55909 | |
| 54264 | #ifdef __LITTLE_ENDIAN__ | 55910 | #ifdef __LITTLE_ENDIAN__ |
| 54265 | #define vld3q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ | 55911 | __ai poly8x16_t vqtbx4q_p8(poly8x16_t __p0, poly8x16x4_t __p1, uint8x16_t __p2) { |
| 54266 | uint8x16x3_t __ret; \ | 55912 | poly8x16_t __ret; |
| 54267 | uint8x16x3_t __s1 = __p1; \ | 55913 | __ret = (poly8x16_t) __builtin_neon_vqtbx4q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p1.val[3], (int8x16_t)__p2, 36); |
| 54268 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 48); \ | 55914 | return __ret; |
| 54269 | __ret; \ | 55915 | } |
| 54270 | }) | | |
| 54271 | #else | 55916 | #else |
| 54272 | #define vld3q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ | 55917 | __ai poly8x16_t vqtbx4q_p8(poly8x16_t __p0, poly8x16x4_t __p1, uint8x16_t __p2) { |
| 54273 | uint8x16x3_t __ret; \ | 55918 | poly8x16_t __ret; |
| 54274 | uint8x16x3_t __s1 = __p1; \ | 55919 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54275 | uint8x16x3_t __rev1; \ | 55920 | poly8x16x4_t __rev1; |
| 54276 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55921 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54277 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55922 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54278 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55923 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54279 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 48); \ | 55924 | __rev1.val[3] = __builtin_shufflevector(__p1.val[3], __p1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54280 | \ | 55925 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54281 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55926 | __ret = (poly8x16_t) __builtin_neon_vqtbx4q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], (int8x16_t)__rev2, 36); |
| 54282 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55927 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54283 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55928 | return __ret; |
| 54284 | __ret; \ | 55929 | } |
| 54285 | }) | | |
| 54286 | #endif | 55930 | #endif |
| 54287 | | 55931 | |
| 54288 | #ifdef __LITTLE_ENDIAN__ | 55932 | #ifdef __LITTLE_ENDIAN__ |
| 54289 | #define vld3q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 55933 | __ai uint8x16_t vqtbx4q_u8(uint8x16_t __p0, uint8x16x4_t __p1, uint8x16_t __p2) { |
| 54290 | uint64x2x3_t __ret; \ | 55934 | uint8x16_t __ret; |
| 54291 | uint64x2x3_t __s1 = __p1; \ | 55935 | __ret = (uint8x16_t) __builtin_neon_vqtbx4q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p1.val[3], (int8x16_t)__p2, 48); |
| 54292 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 51); \ | 55936 | return __ret; |
| 54293 | __ret; \ | 55937 | } |
| 54294 | }) | | |
| 54295 | #else | 55938 | #else |
| 54296 | #define vld3q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 55939 | __ai uint8x16_t vqtbx4q_u8(uint8x16_t __p0, uint8x16x4_t __p1, uint8x16_t __p2) { |
| 54297 | uint64x2x3_t __ret; \ | 55940 | uint8x16_t __ret; |
| 54298 | uint64x2x3_t __s1 = __p1; \ | 55941 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54299 | uint64x2x3_t __rev1; \ | 55942 | uint8x16x4_t __rev1; |
| 54300 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 55943 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54301 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 55944 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54302 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 55945 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54303 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 51); \ | 55946 | __rev1.val[3] = __builtin_shufflevector(__p1.val[3], __p1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54304 | \ | 55947 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54305 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55948 | __ret = (uint8x16_t) __builtin_neon_vqtbx4q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], (int8x16_t)__rev2, 48); |
| 54306 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55949 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54307 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 55950 | return __ret; |
| 54308 | __ret; \ | 55951 | } |
| 54309 | }) | | |
| 54310 | #endif | 55952 | #endif |
| 54311 | | 55953 | |
| 54312 | #ifdef __LITTLE_ENDIAN__ | 55954 | #ifdef __LITTLE_ENDIAN__ |
| 54313 | #define vld3q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ | 55955 | __ai int8x16_t vqtbx4q_s8(int8x16_t __p0, int8x16x4_t __p1, uint8x16_t __p2) { |
| 54314 | int8x16x3_t __ret; \ | 55956 | int8x16_t __ret; |
| 54315 | int8x16x3_t __s1 = __p1; \ | 55957 | __ret = (int8x16_t) __builtin_neon_vqtbx4q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p1.val[3], (int8x16_t)__p2, 32); |
| 54316 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 32); \ | 55958 | return __ret; |
| 54317 | __ret; \ | 55959 | } |
| 54318 | }) | | |
| 54319 | #else | 55960 | #else |
| 54320 | #define vld3q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ | 55961 | __ai int8x16_t vqtbx4q_s8(int8x16_t __p0, int8x16x4_t __p1, uint8x16_t __p2) { |
| 54321 | int8x16x3_t __ret; \ | 55962 | int8x16_t __ret; |
| 54322 | int8x16x3_t __s1 = __p1; \ | 55963 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54323 | int8x16x3_t __rev1; \ | 55964 | int8x16x4_t __rev1; |
| 54324 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55965 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54325 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55966 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54326 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55967 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54327 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 32); \ | 55968 | __rev1.val[3] = __builtin_shufflevector(__p1.val[3], __p1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54328 | \ | 55969 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54329 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55970 | __ret = (int8x16_t) __builtin_neon_vqtbx4q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], (int8x16_t)__rev2, 32); |
| 54330 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55971 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54331 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55972 | return __ret; |
| 54332 | __ret; \ | 55973 | } |
| 54333 | }) | | |
| 54334 | #endif | 55974 | #endif |
| 54335 | | 55975 | |
| 54336 | #ifdef __LITTLE_ENDIAN__ | 55976 | #ifdef __LITTLE_ENDIAN__ |
| 54337 | #define vld3q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 55977 | __ai uint8x8_t vqtbx4_u8(uint8x8_t __p0, uint8x16x4_t __p1, uint8x8_t __p2) { |
| 54338 | float64x2x3_t __ret; \ | 55978 | uint8x8_t __ret; |
| 54339 | float64x2x3_t __s1 = __p1; \ | 55979 | __ret = (uint8x8_t) __builtin_neon_vqtbx4_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p1.val[3], (int8x8_t)__p2, 16); |
| 54340 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 42); \ | 55980 | return __ret; |
| 54341 | __ret; \ | 55981 | } |
| 54342 | }) | | |
| 54343 | #else | 55982 | #else |
| 54344 | #define vld3q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 55983 | __ai uint8x8_t vqtbx4_u8(uint8x8_t __p0, uint8x16x4_t __p1, uint8x8_t __p2) { |
| 54345 | float64x2x3_t __ret; \ | 55984 | uint8x8_t __ret; |
| 54346 | float64x2x3_t __s1 = __p1; \ | 55985 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54347 | float64x2x3_t __rev1; \ | 55986 | uint8x16x4_t __rev1; |
| 54348 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 55987 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54349 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 55988 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54350 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 55989 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54351 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 42); \ | 55990 | __rev1.val[3] = __builtin_shufflevector(__p1.val[3], __p1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54352 | \ | 55991 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54353 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 55992 | __ret = (uint8x8_t) __builtin_neon_vqtbx4_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], (int8x8_t)__rev2, 16); |
| 54354 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 55993 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54355 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 55994 | return __ret; |
| 54356 | __ret; \ | 55995 | } |
| 54357 | }) | | |
| 54358 | #endif | 55996 | #endif |
| 54359 | | 55997 | |
| 54360 | #ifdef __LITTLE_ENDIAN__ | 55998 | #ifdef __LITTLE_ENDIAN__ |
| 54361 | #define vld3q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 55999 | __ai int8x8_t vqtbx4_s8(int8x8_t __p0, int8x16x4_t __p1, uint8x8_t __p2) { |
| 54362 | int64x2x3_t __ret; \ | 56000 | int8x8_t __ret; |
| 54363 | int64x2x3_t __s1 = __p1; \ | 56001 | __ret = (int8x8_t) __builtin_neon_vqtbx4_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p1.val[3], (int8x8_t)__p2, 0); |
| 54364 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 35); \ | 56002 | return __ret; |
| 54365 | __ret; \ | 56003 | } |
| 54366 | }) | | |
| 54367 | #else | 56004 | #else |
| 54368 | #define vld3q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 56005 | __ai int8x8_t vqtbx4_s8(int8x8_t __p0, int8x16x4_t __p1, uint8x8_t __p2) { |
| 54369 | int64x2x3_t __ret; \ | 56006 | int8x8_t __ret; |
| 54370 | int64x2x3_t __s1 = __p1; \ | 56007 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54371 | int64x2x3_t __rev1; \ | 56008 | int8x16x4_t __rev1; |
| 54372 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 56009 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54373 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 56010 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54374 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 56011 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54375 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 35); \ | 56012 | __rev1.val[3] = __builtin_shufflevector(__p1.val[3], __p1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54376 | \ | 56013 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54377 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 56014 | __ret = (int8x8_t) __builtin_neon_vqtbx4_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], (int8x8_t)__rev2, 0); |
| 54378 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 56015 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54379 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 56016 | return __ret; |
| 54380 | __ret; \ | 56017 | } |
| 54381 | }) | | |
| 54382 | #endif | 56018 | #endif |
| 54383 | | 56019 | |
| 54384 | #define vld3_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 54385 | uint64x1x3_t __ret; \ | | |
| 54386 | uint64x1x3_t __s1 = __p1; \ | | |
| 54387 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 19); \ | | |
| 54388 | __ret; \ | | |
| 54389 | }) | | |
| 54390 | #define vld3_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 54391 | float64x1x3_t __ret; \ | | |
| 54392 | float64x1x3_t __s1 = __p1; \ | | |
| 54393 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 10); \ | | |
| 54394 | __ret; \ | | |
| 54395 | }) | | |
| 54396 | #define vld3_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 54397 | int64x1x3_t __ret; \ | | |
| 54398 | int64x1x3_t __s1 = __p1; \ | | |
| 54399 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 3); \ | | |
| 54400 | __ret; \ | | |
| 54401 | }) | | |
| 54402 | #define vld4_p64(__p0) __extension__ ({ \ | | |
| 54403 | poly64x1x4_t __ret; \ | | |
| 54404 | __builtin_neon_vld4_v(&__ret, __p0, 6); \ | | |
| 54405 | __ret; \ | | |
| 54406 | }) | | |
| 54407 | #ifdef __LITTLE_ENDIAN__ | 56020 | #ifdef __LITTLE_ENDIAN__ |
| 54408 | #define vld4q_p64(__p0) __extension__ ({ \ | 56021 | __ai uint16x8_t vraddhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 54409 | poly64x2x4_t __ret; \ | 56022 | uint16x8_t __ret; |
| 54410 | __builtin_neon_vld4q_v(&__ret, __p0, 38); \ | 56023 | __ret = vcombine_u16(__p0, vraddhn_u32(__p1, __p2)); |
| 54411 | __ret; \ | 56024 | return __ret; |
| 54412 | }) | 56025 | } |
| 54413 | #else | 56026 | #else |
| 54414 | #define vld4q_p64(__p0) __extension__ ({ \ | 56027 | __ai uint16x8_t vraddhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 54415 | poly64x2x4_t __ret; \ | 56028 | uint16x8_t __ret; |
| 54416 | __builtin_neon_vld4q_v(&__ret, __p0, 38); \ | 56029 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 54417 | \ | 56030 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 54418 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 56031 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 54419 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 56032 | __ret = __noswap_vcombine_u16(__rev0, __noswap_vraddhn_u32(__rev1, __rev2)); |
| 54420 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 56033 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54421 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ | 56034 | return __ret; |
| 54422 | __ret; \ | 56035 | } |
| 54423 | }) | | |
| 54424 | #endif | 56036 | #endif |
| 54425 | | 56037 | |
| 54426 | #ifdef __LITTLE_ENDIAN__ | 56038 | #ifdef __LITTLE_ENDIAN__ |
| 54427 | #define vld4q_u64(__p0) __extension__ ({ \ | 56039 | __ai uint32x4_t vraddhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 54428 | uint64x2x4_t __ret; \ | 56040 | uint32x4_t __ret; |
| 54429 | __builtin_neon_vld4q_v(&__ret, __p0, 51); \ | 56041 | __ret = vcombine_u32(__p0, vraddhn_u64(__p1, __p2)); |
| 54430 | __ret; \ | 56042 | return __ret; |
| 54431 | }) | 56043 | } |
| 54432 | #else | 56044 | #else |
| 54433 | #define vld4q_u64(__p0) __extension__ ({ \ | 56045 | __ai uint32x4_t vraddhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 54434 | uint64x2x4_t __ret; \ | 56046 | uint32x4_t __ret; |
| 54435 | __builtin_neon_vld4q_v(&__ret, __p0, 51); \ | 56047 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 54436 | \ | 56048 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 54437 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 56049 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 54438 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 56050 | __ret = __noswap_vcombine_u32(__rev0, __noswap_vraddhn_u64(__rev1, __rev2)); |
| 54439 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 56051 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 54440 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ | 56052 | return __ret; |
| 54441 | __ret; \ | 56053 | } |
| 54442 | }) | | |
| 54443 | #endif | 56054 | #endif |
| 54444 | | 56055 | |
| 54445 | #ifdef __LITTLE_ENDIAN__ | 56056 | #ifdef __LITTLE_ENDIAN__ |
| 54446 | #define vld4q_f64(__p0) __extension__ ({ \ | 56057 | __ai uint8x16_t vraddhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { |
| 54447 | float64x2x4_t __ret; \ | 56058 | uint8x16_t __ret; |
| 54448 | __builtin_neon_vld4q_v(&__ret, __p0, 42); \ | 56059 | __ret = vcombine_u8(__p0, vraddhn_u16(__p1, __p2)); |
| 54449 | __ret; \ | 56060 | return __ret; |
| 54450 | }) | 56061 | } |
| 54451 | #else | 56062 | #else |
| 54452 | #define vld4q_f64(__p0) __extension__ ({ \ | 56063 | __ai uint8x16_t vraddhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { |
| 54453 | float64x2x4_t __ret; \ | 56064 | uint8x16_t __ret; |
| 54454 | __builtin_neon_vld4q_v(&__ret, __p0, 42); \ | 56065 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54455 | \ | 56066 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54456 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 56067 | uint16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54457 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 56068 | __ret = __noswap_vcombine_u8(__rev0, __noswap_vraddhn_u16(__rev1, __rev2)); |
| 54458 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 56069 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54459 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ | 56070 | return __ret; |
| 54460 | __ret; \ | 56071 | } |
| 54461 | }) | | |
| 54462 | #endif | 56072 | #endif |
| 54463 | | 56073 | |
| 54464 | #ifdef __LITTLE_ENDIAN__ | 56074 | #ifdef __LITTLE_ENDIAN__ |
| 54465 | #define vld4q_s64(__p0) __extension__ ({ \ | 56075 | __ai int16x8_t vraddhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 54466 | int64x2x4_t __ret; \ | 56076 | int16x8_t __ret; |
| 54467 | __builtin_neon_vld4q_v(&__ret, __p0, 35); \ | 56077 | __ret = vcombine_s16(__p0, vraddhn_s32(__p1, __p2)); |
| 54468 | __ret; \ | 56078 | return __ret; |
| 54469 | }) | 56079 | } |
| 54470 | #else | 56080 | #else |
| 54471 | #define vld4q_s64(__p0) __extension__ ({ \ | 56081 | __ai int16x8_t vraddhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 54472 | int64x2x4_t __ret; \ | 56082 | int16x8_t __ret; |
| 54473 | __builtin_neon_vld4q_v(&__ret, __p0, 35); \ | 56083 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 54474 | \ | 56084 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 54475 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 56085 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 54476 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 56086 | __ret = __noswap_vcombine_s16(__rev0, __noswap_vraddhn_s32(__rev1, __rev2)); |
| 54477 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 56087 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54478 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ | 56088 | return __ret; |
| 54479 | __ret; \ | 56089 | } |
| 54480 | }) | | |
| 54481 | #endif | 56090 | #endif |
| 54482 | | 56091 | |
| 54483 | #define vld4_f64(__p0) __extension__ ({ \ | | |
| 54484 | float64x1x4_t __ret; \ | | |
| 54485 | __builtin_neon_vld4_v(&__ret, __p0, 10); \ | | |
| 54486 | __ret; \ | | |
| 54487 | }) | | |
| 54488 | #define vld4_dup_p64(__p0) __extension__ ({ \ | | |
| 54489 | poly64x1x4_t __ret; \ | | |
| 54490 | __builtin_neon_vld4_dup_v(&__ret, __p0, 6); \ | | |
| 54491 | __ret; \ | | |
| 54492 | }) | | |
| 54493 | #ifdef __LITTLE_ENDIAN__ | 56092 | #ifdef __LITTLE_ENDIAN__ |
| 54494 | #define vld4q_dup_p64(__p0) __extension__ ({ \ | 56093 | __ai int32x4_t vraddhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { |
| 54495 | poly64x2x4_t __ret; \ | 56094 | int32x4_t __ret; |
| 54496 | __builtin_neon_vld4q_dup_v(&__ret, __p0, 38); \ | 56095 | __ret = vcombine_s32(__p0, vraddhn_s64(__p1, __p2)); |
| 54497 | __ret; \ | 56096 | return __ret; |
| 54498 | }) | 56097 | } |
| 54499 | #else | 56098 | #else |
| 54500 | #define vld4q_dup_p64(__p0) __extension__ ({ \ | 56099 | __ai int32x4_t vraddhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { |
| 54501 | poly64x2x4_t __ret; \ | 56100 | int32x4_t __ret; |
| 54502 | __builtin_neon_vld4q_dup_v(&__ret, __p0, 38); \ | 56101 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 54503 | \ | 56102 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 54504 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 56103 | int64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 54505 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 56104 | __ret = __noswap_vcombine_s32(__rev0, __noswap_vraddhn_s64(__rev1, __rev2)); |
| 54506 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 56105 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 54507 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ | 56106 | return __ret; |
| 54508 | __ret; \ | 56107 | } |
| 54509 | }) | | |
| 54510 | #endif | 56108 | #endif |
| 54511 | | 56109 | |
| 54512 | #ifdef __LITTLE_ENDIAN__ | 56110 | #ifdef __LITTLE_ENDIAN__ |
| 54513 | #define vld4q_dup_f64(__p0) __extension__ ({ \ | 56111 | __ai int8x16_t vraddhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 54514 | float64x2x4_t __ret; \ | 56112 | int8x16_t __ret; |
| 54515 | __builtin_neon_vld4q_dup_v(&__ret, __p0, 42); \ | 56113 | __ret = vcombine_s8(__p0, vraddhn_s16(__p1, __p2)); |
| 54516 | __ret; \ | 56114 | return __ret; |
| 54517 | }) | 56115 | } |
| 54518 | #else | 56116 | #else |
| 54519 | #define vld4q_dup_f64(__p0) __extension__ ({ \ | 56117 | __ai int8x16_t vraddhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 54520 | float64x2x4_t __ret; \ | 56118 | int8x16_t __ret; |
| 54521 | __builtin_neon_vld4q_dup_v(&__ret, __p0, 42); \ | 56119 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54522 | \ | 56120 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54523 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 56121 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54524 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 56122 | __ret = __noswap_vcombine_s8(__rev0, __noswap_vraddhn_s16(__rev1, __rev2)); |
| 54525 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | 56123 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54526 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ | 56124 | return __ret; |
| 54527 | __ret; \ | 56125 | } |
| 54528 | }) | | |
| 54529 | #endif | 56126 | #endif |
| 54530 | | 56127 | |
| 54531 | #define vld4_dup_f64(__p0) __extension__ ({ \ | | |
| 54532 | float64x1x4_t __ret; \ | | |
| 54533 | __builtin_neon_vld4_dup_v(&__ret, __p0, 10); \ | | |
| 54534 | __ret; \ | | |
| 54535 | }) | | |
| 54536 | #define vld4_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 54537 | poly64x1x4_t __ret; \ | | |
| 54538 | poly64x1x4_t __s1 = __p1; \ | | |
| 54539 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 6); \ | | |
| 54540 | __ret; \ | | |
| 54541 | }) | | |
| 54542 | #ifdef __LITTLE_ENDIAN__ | 56128 | #ifdef __LITTLE_ENDIAN__ |
| 54543 | #define vld4q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 56129 | __ai poly8x8_t vrbit_p8(poly8x8_t __p0) { |
| 54544 | poly8x16x4_t __ret; \ | 56130 | poly8x8_t __ret; |
| 54545 | poly8x16x4_t __s1 = __p1; \ | 56131 | __ret = (poly8x8_t) __builtin_neon_vrbit_v((int8x8_t)__p0, 4); |
| 54546 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 36); \ | 56132 | return __ret; |
| 54547 | __ret; \ | 56133 | } |
| 54548 | }) | | |
| 54549 | #else | 56134 | #else |
| 54550 | #define vld4q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 56135 | __ai poly8x8_t vrbit_p8(poly8x8_t __p0) { |
| 54551 | poly8x16x4_t __ret; \ | 56136 | poly8x8_t __ret; |
| 54552 | poly8x16x4_t __s1 = __p1; \ | 56137 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54553 | poly8x16x4_t __rev1; \ | 56138 | __ret = (poly8x8_t) __builtin_neon_vrbit_v((int8x8_t)__rev0, 4); |
| 54554 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56139 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54555 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56140 | return __ret; |
| 54556 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56141 | } |
| 54557 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 54558 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 36); \ | | |
| 54559 | \ | | |
| 54560 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 54561 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 54562 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 54563 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 54564 | __ret; \ | | |
| 54565 | }) | | |
| 54566 | #endif | 56142 | #endif |
| 54567 | | 56143 | |
| 54568 | #ifdef __LITTLE_ENDIAN__ | 56144 | #ifdef __LITTLE_ENDIAN__ |
| 54569 | #define vld4q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 56145 | __ai poly8x16_t vrbitq_p8(poly8x16_t __p0) { |
| 54570 | poly64x2x4_t __ret; \ | 56146 | poly8x16_t __ret; |
| 54571 | poly64x2x4_t __s1 = __p1; \ | 56147 | __ret = (poly8x16_t) __builtin_neon_vrbitq_v((int8x16_t)__p0, 36); |
| 54572 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 38); \ | 56148 | return __ret; |
| 54573 | __ret; \ | 56149 | } |
| 54574 | }) | | |
| 54575 | #else | 56150 | #else |
| 54576 | #define vld4q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 56151 | __ai poly8x16_t vrbitq_p8(poly8x16_t __p0) { |
| 54577 | poly64x2x4_t __ret; \ | 56152 | poly8x16_t __ret; |
| 54578 | poly64x2x4_t __s1 = __p1; \ | 56153 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54579 | poly64x2x4_t __rev1; \ | 56154 | __ret = (poly8x16_t) __builtin_neon_vrbitq_v((int8x16_t)__rev0, 36); |
| 54580 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 56155 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54581 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 56156 | return __ret; |
| 54582 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 56157 | } |
| 54583 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | | |
| 54584 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 38); \ | | |
| 54585 | \ | | |
| 54586 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | | |
| 54587 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | | |
| 54588 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | | |
| 54589 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ | | |
| 54590 | __ret; \ | | |
| 54591 | }) | | |
| 54592 | #endif | 56158 | #endif |
| 54593 | | 56159 | |
| 54594 | #ifdef __LITTLE_ENDIAN__ | 56160 | #ifdef __LITTLE_ENDIAN__ |
| 54595 | #define vld4q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ | 56161 | __ai uint8x16_t vrbitq_u8(uint8x16_t __p0) { |
| 54596 | uint8x16x4_t __ret; \ | 56162 | uint8x16_t __ret; |
| 54597 | uint8x16x4_t __s1 = __p1; \ | 56163 | __ret = (uint8x16_t) __builtin_neon_vrbitq_v((int8x16_t)__p0, 48); |
| 54598 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 48); \ | 56164 | return __ret; |
| 54599 | __ret; \ | 56165 | } |
| 54600 | }) | | |
| 54601 | #else | 56166 | #else |
| 54602 | #define vld4q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ | 56167 | __ai uint8x16_t vrbitq_u8(uint8x16_t __p0) { |
| 54603 | uint8x16x4_t __ret; \ | 56168 | uint8x16_t __ret; |
| 54604 | uint8x16x4_t __s1 = __p1; \ | 56169 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54605 | uint8x16x4_t __rev1; \ | 56170 | __ret = (uint8x16_t) __builtin_neon_vrbitq_v((int8x16_t)__rev0, 48); |
| 54606 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56171 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54607 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56172 | return __ret; |
| 54608 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56173 | } |
| 54609 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 54610 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 48); \ | | |
| 54611 | \ | | |
| 54612 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 54613 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 54614 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 54615 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 54616 | __ret; \ | | |
| 54617 | }) | | |
| 54618 | #endif | 56174 | #endif |
| 54619 | | 56175 | |
| 54620 | #ifdef __LITTLE_ENDIAN__ | 56176 | #ifdef __LITTLE_ENDIAN__ |
| 54621 | #define vld4q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 56177 | __ai int8x16_t vrbitq_s8(int8x16_t __p0) { |
| 54622 | uint64x2x4_t __ret; \ | 56178 | int8x16_t __ret; |
| 54623 | uint64x2x4_t __s1 = __p1; \ | 56179 | __ret = (int8x16_t) __builtin_neon_vrbitq_v((int8x16_t)__p0, 32); |
| 54624 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 51); \ | 56180 | return __ret; |
| 54625 | __ret; \ | 56181 | } |
| 54626 | }) | | |
| 54627 | #else | 56182 | #else |
| 54628 | #define vld4q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 56183 | __ai int8x16_t vrbitq_s8(int8x16_t __p0) { |
| 54629 | uint64x2x4_t __ret; \ | 56184 | int8x16_t __ret; |
| 54630 | uint64x2x4_t __s1 = __p1; \ | 56185 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54631 | uint64x2x4_t __rev1; \ | 56186 | __ret = (int8x16_t) __builtin_neon_vrbitq_v((int8x16_t)__rev0, 32); |
| 54632 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 56187 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54633 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 56188 | return __ret; |
| 54634 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 56189 | } |
| 54635 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | | |
| 54636 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 51); \ | | |
| 54637 | \ | | |
| 54638 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | | |
| 54639 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | | |
| 54640 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | | |
| 54641 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ | | |
| 54642 | __ret; \ | | |
| 54643 | }) | | |
| 54644 | #endif | 56190 | #endif |
| 54645 | | 56191 | |
| 54646 | #ifdef __LITTLE_ENDIAN__ | 56192 | #ifdef __LITTLE_ENDIAN__ |
| 54647 | #define vld4q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ | 56193 | __ai uint8x8_t vrbit_u8(uint8x8_t __p0) { |
| 54648 | int8x16x4_t __ret; \ | 56194 | uint8x8_t __ret; |
| 54649 | int8x16x4_t __s1 = __p1; \ | 56195 | __ret = (uint8x8_t) __builtin_neon_vrbit_v((int8x8_t)__p0, 16); |
| 54650 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 32); \ | 56196 | return __ret; |
| 54651 | __ret; \ | 56197 | } |
| 54652 | }) | | |
| 54653 | #else | 56198 | #else |
| 54654 | #define vld4q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ | 56199 | __ai uint8x8_t vrbit_u8(uint8x8_t __p0) { |
| 54655 | int8x16x4_t __ret; \ | 56200 | uint8x8_t __ret; |
| 54656 | int8x16x4_t __s1 = __p1; \ | 56201 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54657 | int8x16x4_t __rev1; \ | 56202 | __ret = (uint8x8_t) __builtin_neon_vrbit_v((int8x8_t)__rev0, 16); |
| 54658 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56203 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54659 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56204 | return __ret; |
| 54660 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56205 | } |
| 54661 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 54662 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 32); \ | | |
| 54663 | \ | | |
| 54664 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 54665 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 54666 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 54667 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 54668 | __ret; \ | | |
| 54669 | }) | | |
| 54670 | #endif | 56206 | #endif |
| 54671 | | 56207 | |
| 54672 | #ifdef __LITTLE_ENDIAN__ | 56208 | #ifdef __LITTLE_ENDIAN__ |
| 54673 | #define vld4q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 56209 | __ai int8x8_t vrbit_s8(int8x8_t __p0) { |
| 54674 | float64x2x4_t __ret; \ | 56210 | int8x8_t __ret; |
| 54675 | float64x2x4_t __s1 = __p1; \ | 56211 | __ret = (int8x8_t) __builtin_neon_vrbit_v((int8x8_t)__p0, 0); |
| 54676 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 42); \ | 56212 | return __ret; |
| 54677 | __ret; \ | 56213 | } |
| 54678 | }) | | |
| 54679 | #else | 56214 | #else |
| 54680 | #define vld4q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 56215 | __ai int8x8_t vrbit_s8(int8x8_t __p0) { |
| 54681 | float64x2x4_t __ret; \ | 56216 | int8x8_t __ret; |
| 54682 | float64x2x4_t __s1 = __p1; \ | 56217 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54683 | float64x2x4_t __rev1; \ | 56218 | __ret = (int8x8_t) __builtin_neon_vrbit_v((int8x8_t)__rev0, 0); |
| 54684 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 56219 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54685 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 56220 | return __ret; |
| 54686 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 56221 | } |
| 54687 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | | |
| 54688 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 42); \ | | |
| 54689 | \ | | |
| 54690 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | | |
| 54691 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | | |
| 54692 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | | |
| 54693 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ | | |
| 54694 | __ret; \ | | |
| 54695 | }) | | |
| 54696 | #endif | 56222 | #endif |
| 54697 | | 56223 | |
| 54698 | #ifdef __LITTLE_ENDIAN__ | 56224 | #ifdef __LITTLE_ENDIAN__ |
| 54699 | #define vld4q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 56225 | __ai float64x2_t vrecpeq_f64(float64x2_t __p0) { |
| 54700 | int64x2x4_t __ret; \ | 56226 | float64x2_t __ret; |
| 54701 | int64x2x4_t __s1 = __p1; \ | 56227 | __ret = (float64x2_t) __builtin_neon_vrecpeq_v((int8x16_t)__p0, 42); |
| 54702 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 35); \ | 56228 | return __ret; |
| 54703 | __ret; \ | 56229 | } |
| 54704 | }) | | |
| 54705 | #else | 56230 | #else |
| 54706 | #define vld4q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 56231 | __ai float64x2_t vrecpeq_f64(float64x2_t __p0) { |
| 54707 | int64x2x4_t __ret; \ | 56232 | float64x2_t __ret; |
| 54708 | int64x2x4_t __s1 = __p1; \ | 56233 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 54709 | int64x2x4_t __rev1; \ | 56234 | __ret = (float64x2_t) __builtin_neon_vrecpeq_v((int8x16_t)__rev0, 42); |
| 54710 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 56235 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 54711 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 56236 | return __ret; |
| 54712 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 56237 | } |
| 54713 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | | |
| 54714 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 35); \ | | |
| 54715 | \ | | |
| 54716 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | | |
| 54717 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | | |
| 54718 | __ret.val[2] = __builtin_shufflevector(__ret.val[2], __ret.val[2], 1, 0); \ | | |
| 54719 | __ret.val[3] = __builtin_shufflevector(__ret.val[3], __ret.val[3], 1, 0); \ | | |
| 54720 | __ret; \ | | |
| 54721 | }) | | |
| 54722 | #endif | 56238 | #endif |
| 54723 | | 56239 | |
| 54724 | #define vld4_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 56240 | __ai float64x1_t vrecpe_f64(float64x1_t __p0) { |
| 54725 | uint64x1x4_t __ret; \ | 56241 | float64x1_t __ret; |
| 54726 | uint64x1x4_t __s1 = __p1; \ | 56242 | __ret = (float64x1_t) __builtin_neon_vrecpe_v((int8x8_t)__p0, 10); |
| 54727 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 19); \ | 56243 | return __ret; |
| 54728 | __ret; \ | 56244 | } |
| 54729 | }) | 56245 | __ai float64_t vrecped_f64(float64_t __p0) { |
| 54730 | #define vld4_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 56246 | float64_t __ret; |
| 54731 | float64x1x4_t __ret; \ | 56247 | __ret = (float64_t) __builtin_neon_vrecped_f64(__p0); |
| 54732 | float64x1x4_t __s1 = __p1; \ | 56248 | return __ret; |
| 54733 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 10); \ | 56249 | } |
| 54734 | __ret; \ | 56250 | __ai float32_t vrecpes_f32(float32_t __p0) { |
| 54735 | }) | 56251 | float32_t __ret; |
| 54736 | #define vld4_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 56252 | __ret = (float32_t) __builtin_neon_vrecpes_f32(__p0); |
| 54737 | int64x1x4_t __ret; \ | 56253 | return __ret; |
| 54738 | int64x1x4_t __s1 = __p1; \ | 56254 | } |
| 54739 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 3); \ | | |
| 54740 | __ret; \ | | |
| 54741 | }) | | |
| 54742 | #define vldrq_p128(__p0) __extension__ ({ \ | | |
| 54743 | poly128_t __ret; \ | | |
| 54744 | __ret = (poly128_t) __builtin_neon_vldrq_p128(__p0); \ | | |
| 54745 | __ret; \ | | |
| 54746 | }) | | |
| 54747 | #ifdef __LITTLE_ENDIAN__ | 56255 | #ifdef __LITTLE_ENDIAN__ |
| 54748 | __ai float64x2_t vmaxq_f64(float64x2_t __p0, float64x2_t __p1) { | 56256 | __ai float64x2_t vrecpsq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 54749 | float64x2_t __ret; | 56257 | float64x2_t __ret; |
| 54750 | __ret = (float64x2_t) __builtin_neon_vmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | 56258 | __ret = (float64x2_t) __builtin_neon_vrecpsq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| | 56259 | return __ret; |
| | 56260 | } |
| | 56261 | #else |
| | 56262 | __ai float64x2_t vrecpsq_f64(float64x2_t __p0, float64x2_t __p1) { |
| | 56263 | float64x2_t __ret; |
| | 56264 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 56265 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 56266 | __ret = (float64x2_t) __builtin_neon_vrecpsq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| | 56267 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 56268 | return __ret; |
| | 56269 | } |
| | 56270 | #endif |
| | 56271 | |
| | 56272 | __ai float64x1_t vrecps_f64(float64x1_t __p0, float64x1_t __p1) { |
| | 56273 | float64x1_t __ret; |
| | 56274 | __ret = (float64x1_t) __builtin_neon_vrecps_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| | 56275 | return __ret; |
| | 56276 | } |
| | 56277 | __ai float64_t vrecpsd_f64(float64_t __p0, float64_t __p1) { |
| | 56278 | float64_t __ret; |
| | 56279 | __ret = (float64_t) __builtin_neon_vrecpsd_f64(__p0, __p1); |
| | 56280 | return __ret; |
| | 56281 | } |
| | 56282 | __ai float32_t vrecpss_f32(float32_t __p0, float32_t __p1) { |
| | 56283 | float32_t __ret; |
| | 56284 | __ret = (float32_t) __builtin_neon_vrecpss_f32(__p0, __p1); |
| | 56285 | return __ret; |
| | 56286 | } |
| | 56287 | __ai float64_t vrecpxd_f64(float64_t __p0) { |
| | 56288 | float64_t __ret; |
| | 56289 | __ret = (float64_t) __builtin_neon_vrecpxd_f64(__p0); |
| | 56290 | return __ret; |
| | 56291 | } |
| | 56292 | __ai float32_t vrecpxs_f32(float32_t __p0) { |
| | 56293 | float32_t __ret; |
| | 56294 | __ret = (float32_t) __builtin_neon_vrecpxs_f32(__p0); |
| | 56295 | return __ret; |
| | 56296 | } |
| | 56297 | __ai poly8x8_t vreinterpret_p8_p64(poly64x1_t __p0) { |
| | 56298 | poly8x8_t __ret; |
| | 56299 | __ret = (poly8x8_t)(__p0); |
| | 56300 | return __ret; |
| | 56301 | } |
| | 56302 | __ai poly8x8_t vreinterpret_p8_p16(poly16x4_t __p0) { |
| | 56303 | poly8x8_t __ret; |
| | 56304 | __ret = (poly8x8_t)(__p0); |
| | 56305 | return __ret; |
| | 56306 | } |
| | 56307 | __ai poly8x8_t vreinterpret_p8_u8(uint8x8_t __p0) { |
| | 56308 | poly8x8_t __ret; |
| | 56309 | __ret = (poly8x8_t)(__p0); |
| | 56310 | return __ret; |
| | 56311 | } |
| | 56312 | __ai poly8x8_t vreinterpret_p8_u32(uint32x2_t __p0) { |
| | 56313 | poly8x8_t __ret; |
| | 56314 | __ret = (poly8x8_t)(__p0); |
| | 56315 | return __ret; |
| | 56316 | } |
| | 56317 | __ai poly8x8_t vreinterpret_p8_u64(uint64x1_t __p0) { |
| | 56318 | poly8x8_t __ret; |
| | 56319 | __ret = (poly8x8_t)(__p0); |
| | 56320 | return __ret; |
| | 56321 | } |
| | 56322 | __ai poly8x8_t vreinterpret_p8_u16(uint16x4_t __p0) { |
| | 56323 | poly8x8_t __ret; |
| | 56324 | __ret = (poly8x8_t)(__p0); |
| | 56325 | return __ret; |
| | 56326 | } |
| | 56327 | __ai poly8x8_t vreinterpret_p8_s8(int8x8_t __p0) { |
| | 56328 | poly8x8_t __ret; |
| | 56329 | __ret = (poly8x8_t)(__p0); |
| | 56330 | return __ret; |
| | 56331 | } |
| | 56332 | __ai poly8x8_t vreinterpret_p8_f64(float64x1_t __p0) { |
| | 56333 | poly8x8_t __ret; |
| | 56334 | __ret = (poly8x8_t)(__p0); |
| | 56335 | return __ret; |
| | 56336 | } |
| | 56337 | __ai poly8x8_t vreinterpret_p8_f32(float32x2_t __p0) { |
| | 56338 | poly8x8_t __ret; |
| | 56339 | __ret = (poly8x8_t)(__p0); |
| | 56340 | return __ret; |
| | 56341 | } |
| | 56342 | __ai poly8x8_t vreinterpret_p8_f16(float16x4_t __p0) { |
| | 56343 | poly8x8_t __ret; |
| | 56344 | __ret = (poly8x8_t)(__p0); |
| | 56345 | return __ret; |
| | 56346 | } |
| | 56347 | __ai poly8x8_t vreinterpret_p8_s32(int32x2_t __p0) { |
| | 56348 | poly8x8_t __ret; |
| | 56349 | __ret = (poly8x8_t)(__p0); |
| | 56350 | return __ret; |
| | 56351 | } |
| | 56352 | __ai poly8x8_t vreinterpret_p8_s64(int64x1_t __p0) { |
| | 56353 | poly8x8_t __ret; |
| | 56354 | __ret = (poly8x8_t)(__p0); |
| | 56355 | return __ret; |
| | 56356 | } |
| | 56357 | __ai poly8x8_t vreinterpret_p8_s16(int16x4_t __p0) { |
| | 56358 | poly8x8_t __ret; |
| | 56359 | __ret = (poly8x8_t)(__p0); |
| | 56360 | return __ret; |
| | 56361 | } |
| | 56362 | __ai poly64x1_t vreinterpret_p64_p8(poly8x8_t __p0) { |
| | 56363 | poly64x1_t __ret; |
| | 56364 | __ret = (poly64x1_t)(__p0); |
| | 56365 | return __ret; |
| | 56366 | } |
| | 56367 | __ai poly64x1_t vreinterpret_p64_p16(poly16x4_t __p0) { |
| | 56368 | poly64x1_t __ret; |
| | 56369 | __ret = (poly64x1_t)(__p0); |
| | 56370 | return __ret; |
| | 56371 | } |
| | 56372 | __ai poly64x1_t vreinterpret_p64_u8(uint8x8_t __p0) { |
| | 56373 | poly64x1_t __ret; |
| | 56374 | __ret = (poly64x1_t)(__p0); |
| | 56375 | return __ret; |
| | 56376 | } |
| | 56377 | __ai poly64x1_t vreinterpret_p64_u32(uint32x2_t __p0) { |
| | 56378 | poly64x1_t __ret; |
| | 56379 | __ret = (poly64x1_t)(__p0); |
| | 56380 | return __ret; |
| | 56381 | } |
| | 56382 | __ai poly64x1_t vreinterpret_p64_u64(uint64x1_t __p0) { |
| | 56383 | poly64x1_t __ret; |
| | 56384 | __ret = (poly64x1_t)(__p0); |
| | 56385 | return __ret; |
| | 56386 | } |
| | 56387 | __ai poly64x1_t vreinterpret_p64_u16(uint16x4_t __p0) { |
| | 56388 | poly64x1_t __ret; |
| | 56389 | __ret = (poly64x1_t)(__p0); |
| | 56390 | return __ret; |
| | 56391 | } |
| | 56392 | __ai poly64x1_t vreinterpret_p64_s8(int8x8_t __p0) { |
| | 56393 | poly64x1_t __ret; |
| | 56394 | __ret = (poly64x1_t)(__p0); |
| | 56395 | return __ret; |
| | 56396 | } |
| | 56397 | __ai poly64x1_t vreinterpret_p64_f64(float64x1_t __p0) { |
| | 56398 | poly64x1_t __ret; |
| | 56399 | __ret = (poly64x1_t)(__p0); |
| | 56400 | return __ret; |
| | 56401 | } |
| | 56402 | __ai poly64x1_t vreinterpret_p64_f32(float32x2_t __p0) { |
| | 56403 | poly64x1_t __ret; |
| | 56404 | __ret = (poly64x1_t)(__p0); |
| | 56405 | return __ret; |
| | 56406 | } |
| | 56407 | __ai poly64x1_t vreinterpret_p64_f16(float16x4_t __p0) { |
| | 56408 | poly64x1_t __ret; |
| | 56409 | __ret = (poly64x1_t)(__p0); |
| | 56410 | return __ret; |
| | 56411 | } |
| | 56412 | __ai poly64x1_t vreinterpret_p64_s32(int32x2_t __p0) { |
| | 56413 | poly64x1_t __ret; |
| | 56414 | __ret = (poly64x1_t)(__p0); |
| | 56415 | return __ret; |
| | 56416 | } |
| | 56417 | __ai poly64x1_t vreinterpret_p64_s64(int64x1_t __p0) { |
| | 56418 | poly64x1_t __ret; |
| | 56419 | __ret = (poly64x1_t)(__p0); |
| | 56420 | return __ret; |
| | 56421 | } |
| | 56422 | __ai poly64x1_t vreinterpret_p64_s16(int16x4_t __p0) { |
| | 56423 | poly64x1_t __ret; |
| | 56424 | __ret = (poly64x1_t)(__p0); |
| | 56425 | return __ret; |
| | 56426 | } |
| | 56427 | __ai poly16x4_t vreinterpret_p16_p8(poly8x8_t __p0) { |
| | 56428 | poly16x4_t __ret; |
| | 56429 | __ret = (poly16x4_t)(__p0); |
| | 56430 | return __ret; |
| | 56431 | } |
| | 56432 | __ai poly16x4_t vreinterpret_p16_p64(poly64x1_t __p0) { |
| | 56433 | poly16x4_t __ret; |
| | 56434 | __ret = (poly16x4_t)(__p0); |
| | 56435 | return __ret; |
| | 56436 | } |
| | 56437 | __ai poly16x4_t vreinterpret_p16_u8(uint8x8_t __p0) { |
| | 56438 | poly16x4_t __ret; |
| | 56439 | __ret = (poly16x4_t)(__p0); |
| 54751 | return __ret; | 56440 | return __ret; |
| 54752 | } | 56441 | } |
| 54753 | #else | 56442 | __ai poly16x4_t vreinterpret_p16_u32(uint32x2_t __p0) { |
| 54754 | __ai float64x2_t vmaxq_f64(float64x2_t __p0, float64x2_t __p1) { | 56443 | poly16x4_t __ret; |
| 54755 | float64x2_t __ret; | 56444 | __ret = (poly16x4_t)(__p0); |
| 54756 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 54757 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 54758 | __ret = (float64x2_t) __builtin_neon_vmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); | | |
| 54759 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 54760 | return __ret; | 56445 | return __ret; |
| 54761 | } | 56446 | } |
| 54762 | #endif | 56447 | __ai poly16x4_t vreinterpret_p16_u64(uint64x1_t __p0) { |
| 54763 | | 56448 | poly16x4_t __ret; |
| 54764 | __ai float64x1_t vmax_f64(float64x1_t __p0, float64x1_t __p1) { | 56449 | __ret = (poly16x4_t)(__p0); |
| 54765 | float64x1_t __ret; | | |
| 54766 | __ret = (float64x1_t) __builtin_neon_vmax_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | | |
| 54767 | return __ret; | 56450 | return __ret; |
| 54768 | } | 56451 | } |
| 54769 | #ifdef __LITTLE_ENDIAN__ | 56452 | __ai poly16x4_t vreinterpret_p16_u16(uint16x4_t __p0) { |
| 54770 | __ai float64_t vmaxnmvq_f64(float64x2_t __p0) { | 56453 | poly16x4_t __ret; |
| 54771 | float64_t __ret; | 56454 | __ret = (poly16x4_t)(__p0); |
| 54772 | __ret = (float64_t) __builtin_neon_vmaxnmvq_f64(__p0); | | |
| 54773 | return __ret; | 56455 | return __ret; |
| 54774 | } | 56456 | } |
| 54775 | #else | 56457 | __ai poly16x4_t vreinterpret_p16_s8(int8x8_t __p0) { |
| 54776 | __ai float64_t vmaxnmvq_f64(float64x2_t __p0) { | 56458 | poly16x4_t __ret; |
| 54777 | float64_t __ret; | 56459 | __ret = (poly16x4_t)(__p0); |
| 54778 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 54779 | __ret = (float64_t) __builtin_neon_vmaxnmvq_f64(__rev0); | | |
| 54780 | return __ret; | 56460 | return __ret; |
| 54781 | } | 56461 | } |
| 54782 | #endif | 56462 | __ai poly16x4_t vreinterpret_p16_f64(float64x1_t __p0) { |
| 54783 | | 56463 | poly16x4_t __ret; |
| 54784 | #ifdef __LITTLE_ENDIAN__ | 56464 | __ret = (poly16x4_t)(__p0); |
| 54785 | __ai float32_t vmaxnmvq_f32(float32x4_t __p0) { | | |
| 54786 | float32_t __ret; | | |
| 54787 | __ret = (float32_t) __builtin_neon_vmaxnmvq_f32(__p0); | | |
| 54788 | return __ret; | 56465 | return __ret; |
| 54789 | } | 56466 | } |
| 54790 | #else | 56467 | __ai poly16x4_t vreinterpret_p16_f32(float32x2_t __p0) { |
| 54791 | __ai float32_t vmaxnmvq_f32(float32x4_t __p0) { | 56468 | poly16x4_t __ret; |
| 54792 | float32_t __ret; | 56469 | __ret = (poly16x4_t)(__p0); |
| 54793 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 54794 | __ret = (float32_t) __builtin_neon_vmaxnmvq_f32(__rev0); | | |
| 54795 | return __ret; | 56470 | return __ret; |
| 54796 | } | 56471 | } |
| 54797 | #endif | 56472 | __ai poly16x4_t vreinterpret_p16_f16(float16x4_t __p0) { |
| 54798 | | 56473 | poly16x4_t __ret; |
| 54799 | #ifdef __LITTLE_ENDIAN__ | 56474 | __ret = (poly16x4_t)(__p0); |
| 54800 | __ai float32_t vmaxnmv_f32(float32x2_t __p0) { | | |
| 54801 | float32_t __ret; | | |
| 54802 | __ret = (float32_t) __builtin_neon_vmaxnmv_f32(__p0); | | |
| 54803 | return __ret; | 56475 | return __ret; |
| 54804 | } | 56476 | } |
| 54805 | #else | 56477 | __ai poly16x4_t vreinterpret_p16_s32(int32x2_t __p0) { |
| 54806 | __ai float32_t vmaxnmv_f32(float32x2_t __p0) { | 56478 | poly16x4_t __ret; |
| 54807 | float32_t __ret; | 56479 | __ret = (poly16x4_t)(__p0); |
| 54808 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 54809 | __ret = (float32_t) __builtin_neon_vmaxnmv_f32(__rev0); | | |
| 54810 | return __ret; | 56480 | return __ret; |
| 54811 | } | 56481 | } |
| 54812 | #endif | 56482 | __ai poly16x4_t vreinterpret_p16_s64(int64x1_t __p0) { |
| 54813 | | 56483 | poly16x4_t __ret; |
| 54814 | #ifdef __LITTLE_ENDIAN__ | 56484 | __ret = (poly16x4_t)(__p0); |
| 54815 | __ai uint8_t vmaxvq_u8(uint8x16_t __p0) { | | |
| 54816 | uint8_t __ret; | | |
| 54817 | __ret = (uint8_t) __builtin_neon_vmaxvq_u8(__p0); | | |
| 54818 | return __ret; | 56485 | return __ret; |
| 54819 | } | 56486 | } |
| 54820 | #else | 56487 | __ai poly16x4_t vreinterpret_p16_s16(int16x4_t __p0) { |
| 54821 | __ai uint8_t vmaxvq_u8(uint8x16_t __p0) { | 56488 | poly16x4_t __ret; |
| 54822 | uint8_t __ret; | 56489 | __ret = (poly16x4_t)(__p0); |
| 54823 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 54824 | __ret = (uint8_t) __builtin_neon_vmaxvq_u8(__rev0); | | |
| 54825 | return __ret; | 56490 | return __ret; |
| 54826 | } | 56491 | } |
| 54827 | #endif | 56492 | __ai poly8x16_t vreinterpretq_p8_p128(poly128_t __p0) { |
| 54828 | | 56493 | poly8x16_t __ret; |
| 54829 | #ifdef __LITTLE_ENDIAN__ | 56494 | __ret = (poly8x16_t)(__p0); |
| 54830 | __ai uint32_t vmaxvq_u32(uint32x4_t __p0) { | 56495 | return __ret; |
| 54831 | uint32_t __ret; | 56496 | } |
| 54832 | __ret = (uint32_t) __builtin_neon_vmaxvq_u32(__p0); | 56497 | __ai poly8x16_t vreinterpretq_p8_p64(poly64x2_t __p0) { |
| | 56498 | poly8x16_t __ret; |
| | 56499 | __ret = (poly8x16_t)(__p0); |
| | 56500 | return __ret; |
| | 56501 | } |
| | 56502 | __ai poly8x16_t vreinterpretq_p8_p16(poly16x8_t __p0) { |
| | 56503 | poly8x16_t __ret; |
| | 56504 | __ret = (poly8x16_t)(__p0); |
| | 56505 | return __ret; |
| | 56506 | } |
| | 56507 | __ai poly8x16_t vreinterpretq_p8_u8(uint8x16_t __p0) { |
| | 56508 | poly8x16_t __ret; |
| | 56509 | __ret = (poly8x16_t)(__p0); |
| | 56510 | return __ret; |
| | 56511 | } |
| | 56512 | __ai poly8x16_t vreinterpretq_p8_u32(uint32x4_t __p0) { |
| | 56513 | poly8x16_t __ret; |
| | 56514 | __ret = (poly8x16_t)(__p0); |
| | 56515 | return __ret; |
| | 56516 | } |
| | 56517 | __ai poly8x16_t vreinterpretq_p8_u64(uint64x2_t __p0) { |
| | 56518 | poly8x16_t __ret; |
| | 56519 | __ret = (poly8x16_t)(__p0); |
| | 56520 | return __ret; |
| | 56521 | } |
| | 56522 | __ai poly8x16_t vreinterpretq_p8_u16(uint16x8_t __p0) { |
| | 56523 | poly8x16_t __ret; |
| | 56524 | __ret = (poly8x16_t)(__p0); |
| | 56525 | return __ret; |
| | 56526 | } |
| | 56527 | __ai poly8x16_t vreinterpretq_p8_s8(int8x16_t __p0) { |
| | 56528 | poly8x16_t __ret; |
| | 56529 | __ret = (poly8x16_t)(__p0); |
| | 56530 | return __ret; |
| | 56531 | } |
| | 56532 | __ai poly8x16_t vreinterpretq_p8_f64(float64x2_t __p0) { |
| | 56533 | poly8x16_t __ret; |
| | 56534 | __ret = (poly8x16_t)(__p0); |
| | 56535 | return __ret; |
| | 56536 | } |
| | 56537 | __ai poly8x16_t vreinterpretq_p8_f32(float32x4_t __p0) { |
| | 56538 | poly8x16_t __ret; |
| | 56539 | __ret = (poly8x16_t)(__p0); |
| | 56540 | return __ret; |
| | 56541 | } |
| | 56542 | __ai poly8x16_t vreinterpretq_p8_f16(float16x8_t __p0) { |
| | 56543 | poly8x16_t __ret; |
| | 56544 | __ret = (poly8x16_t)(__p0); |
| | 56545 | return __ret; |
| | 56546 | } |
| | 56547 | __ai poly8x16_t vreinterpretq_p8_s32(int32x4_t __p0) { |
| | 56548 | poly8x16_t __ret; |
| | 56549 | __ret = (poly8x16_t)(__p0); |
| | 56550 | return __ret; |
| | 56551 | } |
| | 56552 | __ai poly8x16_t vreinterpretq_p8_s64(int64x2_t __p0) { |
| | 56553 | poly8x16_t __ret; |
| | 56554 | __ret = (poly8x16_t)(__p0); |
| | 56555 | return __ret; |
| | 56556 | } |
| | 56557 | __ai poly8x16_t vreinterpretq_p8_s16(int16x8_t __p0) { |
| | 56558 | poly8x16_t __ret; |
| | 56559 | __ret = (poly8x16_t)(__p0); |
| | 56560 | return __ret; |
| | 56561 | } |
| | 56562 | __ai poly128_t vreinterpretq_p128_p8(poly8x16_t __p0) { |
| | 56563 | poly128_t __ret; |
| | 56564 | __ret = (poly128_t)(__p0); |
| | 56565 | return __ret; |
| | 56566 | } |
| | 56567 | __ai poly128_t vreinterpretq_p128_p64(poly64x2_t __p0) { |
| | 56568 | poly128_t __ret; |
| | 56569 | __ret = (poly128_t)(__p0); |
| | 56570 | return __ret; |
| | 56571 | } |
| | 56572 | __ai poly128_t vreinterpretq_p128_p16(poly16x8_t __p0) { |
| | 56573 | poly128_t __ret; |
| | 56574 | __ret = (poly128_t)(__p0); |
| | 56575 | return __ret; |
| | 56576 | } |
| | 56577 | __ai poly128_t vreinterpretq_p128_u8(uint8x16_t __p0) { |
| | 56578 | poly128_t __ret; |
| | 56579 | __ret = (poly128_t)(__p0); |
| | 56580 | return __ret; |
| | 56581 | } |
| | 56582 | __ai poly128_t vreinterpretq_p128_u32(uint32x4_t __p0) { |
| | 56583 | poly128_t __ret; |
| | 56584 | __ret = (poly128_t)(__p0); |
| | 56585 | return __ret; |
| | 56586 | } |
| | 56587 | __ai poly128_t vreinterpretq_p128_u64(uint64x2_t __p0) { |
| | 56588 | poly128_t __ret; |
| | 56589 | __ret = (poly128_t)(__p0); |
| | 56590 | return __ret; |
| | 56591 | } |
| | 56592 | __ai poly128_t vreinterpretq_p128_u16(uint16x8_t __p0) { |
| | 56593 | poly128_t __ret; |
| | 56594 | __ret = (poly128_t)(__p0); |
| | 56595 | return __ret; |
| | 56596 | } |
| | 56597 | __ai poly128_t vreinterpretq_p128_s8(int8x16_t __p0) { |
| | 56598 | poly128_t __ret; |
| | 56599 | __ret = (poly128_t)(__p0); |
| | 56600 | return __ret; |
| | 56601 | } |
| | 56602 | __ai poly128_t vreinterpretq_p128_f64(float64x2_t __p0) { |
| | 56603 | poly128_t __ret; |
| | 56604 | __ret = (poly128_t)(__p0); |
| | 56605 | return __ret; |
| | 56606 | } |
| | 56607 | __ai poly128_t vreinterpretq_p128_f32(float32x4_t __p0) { |
| | 56608 | poly128_t __ret; |
| | 56609 | __ret = (poly128_t)(__p0); |
| | 56610 | return __ret; |
| | 56611 | } |
| | 56612 | __ai poly128_t vreinterpretq_p128_f16(float16x8_t __p0) { |
| | 56613 | poly128_t __ret; |
| | 56614 | __ret = (poly128_t)(__p0); |
| | 56615 | return __ret; |
| | 56616 | } |
| | 56617 | __ai poly128_t vreinterpretq_p128_s32(int32x4_t __p0) { |
| | 56618 | poly128_t __ret; |
| | 56619 | __ret = (poly128_t)(__p0); |
| | 56620 | return __ret; |
| | 56621 | } |
| | 56622 | __ai poly128_t vreinterpretq_p128_s64(int64x2_t __p0) { |
| | 56623 | poly128_t __ret; |
| | 56624 | __ret = (poly128_t)(__p0); |
| | 56625 | return __ret; |
| | 56626 | } |
| | 56627 | __ai poly128_t vreinterpretq_p128_s16(int16x8_t __p0) { |
| | 56628 | poly128_t __ret; |
| | 56629 | __ret = (poly128_t)(__p0); |
| | 56630 | return __ret; |
| | 56631 | } |
| | 56632 | __ai poly64x2_t vreinterpretq_p64_p8(poly8x16_t __p0) { |
| | 56633 | poly64x2_t __ret; |
| | 56634 | __ret = (poly64x2_t)(__p0); |
| | 56635 | return __ret; |
| | 56636 | } |
| | 56637 | __ai poly64x2_t vreinterpretq_p64_p128(poly128_t __p0) { |
| | 56638 | poly64x2_t __ret; |
| | 56639 | __ret = (poly64x2_t)(__p0); |
| | 56640 | return __ret; |
| | 56641 | } |
| | 56642 | __ai poly64x2_t vreinterpretq_p64_p16(poly16x8_t __p0) { |
| | 56643 | poly64x2_t __ret; |
| | 56644 | __ret = (poly64x2_t)(__p0); |
| | 56645 | return __ret; |
| | 56646 | } |
| | 56647 | __ai poly64x2_t vreinterpretq_p64_u8(uint8x16_t __p0) { |
| | 56648 | poly64x2_t __ret; |
| | 56649 | __ret = (poly64x2_t)(__p0); |
| | 56650 | return __ret; |
| | 56651 | } |
| | 56652 | __ai poly64x2_t vreinterpretq_p64_u32(uint32x4_t __p0) { |
| | 56653 | poly64x2_t __ret; |
| | 56654 | __ret = (poly64x2_t)(__p0); |
| | 56655 | return __ret; |
| | 56656 | } |
| | 56657 | __ai poly64x2_t vreinterpretq_p64_u64(uint64x2_t __p0) { |
| | 56658 | poly64x2_t __ret; |
| | 56659 | __ret = (poly64x2_t)(__p0); |
| | 56660 | return __ret; |
| | 56661 | } |
| | 56662 | __ai poly64x2_t vreinterpretq_p64_u16(uint16x8_t __p0) { |
| | 56663 | poly64x2_t __ret; |
| | 56664 | __ret = (poly64x2_t)(__p0); |
| | 56665 | return __ret; |
| | 56666 | } |
| | 56667 | __ai poly64x2_t vreinterpretq_p64_s8(int8x16_t __p0) { |
| | 56668 | poly64x2_t __ret; |
| | 56669 | __ret = (poly64x2_t)(__p0); |
| | 56670 | return __ret; |
| | 56671 | } |
| | 56672 | __ai poly64x2_t vreinterpretq_p64_f64(float64x2_t __p0) { |
| | 56673 | poly64x2_t __ret; |
| | 56674 | __ret = (poly64x2_t)(__p0); |
| | 56675 | return __ret; |
| | 56676 | } |
| | 56677 | __ai poly64x2_t vreinterpretq_p64_f32(float32x4_t __p0) { |
| | 56678 | poly64x2_t __ret; |
| | 56679 | __ret = (poly64x2_t)(__p0); |
| | 56680 | return __ret; |
| | 56681 | } |
| | 56682 | __ai poly64x2_t vreinterpretq_p64_f16(float16x8_t __p0) { |
| | 56683 | poly64x2_t __ret; |
| | 56684 | __ret = (poly64x2_t)(__p0); |
| | 56685 | return __ret; |
| | 56686 | } |
| | 56687 | __ai poly64x2_t vreinterpretq_p64_s32(int32x4_t __p0) { |
| | 56688 | poly64x2_t __ret; |
| | 56689 | __ret = (poly64x2_t)(__p0); |
| | 56690 | return __ret; |
| | 56691 | } |
| | 56692 | __ai poly64x2_t vreinterpretq_p64_s64(int64x2_t __p0) { |
| | 56693 | poly64x2_t __ret; |
| | 56694 | __ret = (poly64x2_t)(__p0); |
| | 56695 | return __ret; |
| | 56696 | } |
| | 56697 | __ai poly64x2_t vreinterpretq_p64_s16(int16x8_t __p0) { |
| | 56698 | poly64x2_t __ret; |
| | 56699 | __ret = (poly64x2_t)(__p0); |
| | 56700 | return __ret; |
| | 56701 | } |
| | 56702 | __ai poly16x8_t vreinterpretq_p16_p8(poly8x16_t __p0) { |
| | 56703 | poly16x8_t __ret; |
| | 56704 | __ret = (poly16x8_t)(__p0); |
| | 56705 | return __ret; |
| | 56706 | } |
| | 56707 | __ai poly16x8_t vreinterpretq_p16_p128(poly128_t __p0) { |
| | 56708 | poly16x8_t __ret; |
| | 56709 | __ret = (poly16x8_t)(__p0); |
| | 56710 | return __ret; |
| | 56711 | } |
| | 56712 | __ai poly16x8_t vreinterpretq_p16_p64(poly64x2_t __p0) { |
| | 56713 | poly16x8_t __ret; |
| | 56714 | __ret = (poly16x8_t)(__p0); |
| | 56715 | return __ret; |
| | 56716 | } |
| | 56717 | __ai poly16x8_t vreinterpretq_p16_u8(uint8x16_t __p0) { |
| | 56718 | poly16x8_t __ret; |
| | 56719 | __ret = (poly16x8_t)(__p0); |
| | 56720 | return __ret; |
| | 56721 | } |
| | 56722 | __ai poly16x8_t vreinterpretq_p16_u32(uint32x4_t __p0) { |
| | 56723 | poly16x8_t __ret; |
| | 56724 | __ret = (poly16x8_t)(__p0); |
| | 56725 | return __ret; |
| | 56726 | } |
| | 56727 | __ai poly16x8_t vreinterpretq_p16_u64(uint64x2_t __p0) { |
| | 56728 | poly16x8_t __ret; |
| | 56729 | __ret = (poly16x8_t)(__p0); |
| | 56730 | return __ret; |
| | 56731 | } |
| | 56732 | __ai poly16x8_t vreinterpretq_p16_u16(uint16x8_t __p0) { |
| | 56733 | poly16x8_t __ret; |
| | 56734 | __ret = (poly16x8_t)(__p0); |
| | 56735 | return __ret; |
| | 56736 | } |
| | 56737 | __ai poly16x8_t vreinterpretq_p16_s8(int8x16_t __p0) { |
| | 56738 | poly16x8_t __ret; |
| | 56739 | __ret = (poly16x8_t)(__p0); |
| | 56740 | return __ret; |
| | 56741 | } |
| | 56742 | __ai poly16x8_t vreinterpretq_p16_f64(float64x2_t __p0) { |
| | 56743 | poly16x8_t __ret; |
| | 56744 | __ret = (poly16x8_t)(__p0); |
| | 56745 | return __ret; |
| | 56746 | } |
| | 56747 | __ai poly16x8_t vreinterpretq_p16_f32(float32x4_t __p0) { |
| | 56748 | poly16x8_t __ret; |
| | 56749 | __ret = (poly16x8_t)(__p0); |
| | 56750 | return __ret; |
| | 56751 | } |
| | 56752 | __ai poly16x8_t vreinterpretq_p16_f16(float16x8_t __p0) { |
| | 56753 | poly16x8_t __ret; |
| | 56754 | __ret = (poly16x8_t)(__p0); |
| | 56755 | return __ret; |
| | 56756 | } |
| | 56757 | __ai poly16x8_t vreinterpretq_p16_s32(int32x4_t __p0) { |
| | 56758 | poly16x8_t __ret; |
| | 56759 | __ret = (poly16x8_t)(__p0); |
| | 56760 | return __ret; |
| | 56761 | } |
| | 56762 | __ai poly16x8_t vreinterpretq_p16_s64(int64x2_t __p0) { |
| | 56763 | poly16x8_t __ret; |
| | 56764 | __ret = (poly16x8_t)(__p0); |
| | 56765 | return __ret; |
| | 56766 | } |
| | 56767 | __ai poly16x8_t vreinterpretq_p16_s16(int16x8_t __p0) { |
| | 56768 | poly16x8_t __ret; |
| | 56769 | __ret = (poly16x8_t)(__p0); |
| | 56770 | return __ret; |
| | 56771 | } |
| | 56772 | __ai uint8x16_t vreinterpretq_u8_p8(poly8x16_t __p0) { |
| | 56773 | uint8x16_t __ret; |
| | 56774 | __ret = (uint8x16_t)(__p0); |
| | 56775 | return __ret; |
| | 56776 | } |
| | 56777 | __ai uint8x16_t vreinterpretq_u8_p128(poly128_t __p0) { |
| | 56778 | uint8x16_t __ret; |
| | 56779 | __ret = (uint8x16_t)(__p0); |
| | 56780 | return __ret; |
| | 56781 | } |
| | 56782 | __ai uint8x16_t vreinterpretq_u8_p64(poly64x2_t __p0) { |
| | 56783 | uint8x16_t __ret; |
| | 56784 | __ret = (uint8x16_t)(__p0); |
| | 56785 | return __ret; |
| | 56786 | } |
| | 56787 | __ai uint8x16_t vreinterpretq_u8_p16(poly16x8_t __p0) { |
| | 56788 | uint8x16_t __ret; |
| | 56789 | __ret = (uint8x16_t)(__p0); |
| | 56790 | return __ret; |
| | 56791 | } |
| | 56792 | __ai uint8x16_t vreinterpretq_u8_u32(uint32x4_t __p0) { |
| | 56793 | uint8x16_t __ret; |
| | 56794 | __ret = (uint8x16_t)(__p0); |
| | 56795 | return __ret; |
| | 56796 | } |
| | 56797 | __ai uint8x16_t vreinterpretq_u8_u64(uint64x2_t __p0) { |
| | 56798 | uint8x16_t __ret; |
| | 56799 | __ret = (uint8x16_t)(__p0); |
| | 56800 | return __ret; |
| | 56801 | } |
| | 56802 | __ai uint8x16_t vreinterpretq_u8_u16(uint16x8_t __p0) { |
| | 56803 | uint8x16_t __ret; |
| | 56804 | __ret = (uint8x16_t)(__p0); |
| | 56805 | return __ret; |
| | 56806 | } |
| | 56807 | __ai uint8x16_t vreinterpretq_u8_s8(int8x16_t __p0) { |
| | 56808 | uint8x16_t __ret; |
| | 56809 | __ret = (uint8x16_t)(__p0); |
| | 56810 | return __ret; |
| | 56811 | } |
| | 56812 | __ai uint8x16_t vreinterpretq_u8_f64(float64x2_t __p0) { |
| | 56813 | uint8x16_t __ret; |
| | 56814 | __ret = (uint8x16_t)(__p0); |
| | 56815 | return __ret; |
| | 56816 | } |
| | 56817 | __ai uint8x16_t vreinterpretq_u8_f32(float32x4_t __p0) { |
| | 56818 | uint8x16_t __ret; |
| | 56819 | __ret = (uint8x16_t)(__p0); |
| | 56820 | return __ret; |
| | 56821 | } |
| | 56822 | __ai uint8x16_t vreinterpretq_u8_f16(float16x8_t __p0) { |
| | 56823 | uint8x16_t __ret; |
| | 56824 | __ret = (uint8x16_t)(__p0); |
| | 56825 | return __ret; |
| | 56826 | } |
| | 56827 | __ai uint8x16_t vreinterpretq_u8_s32(int32x4_t __p0) { |
| | 56828 | uint8x16_t __ret; |
| | 56829 | __ret = (uint8x16_t)(__p0); |
| | 56830 | return __ret; |
| | 56831 | } |
| | 56832 | __ai uint8x16_t vreinterpretq_u8_s64(int64x2_t __p0) { |
| | 56833 | uint8x16_t __ret; |
| | 56834 | __ret = (uint8x16_t)(__p0); |
| | 56835 | return __ret; |
| | 56836 | } |
| | 56837 | __ai uint8x16_t vreinterpretq_u8_s16(int16x8_t __p0) { |
| | 56838 | uint8x16_t __ret; |
| | 56839 | __ret = (uint8x16_t)(__p0); |
| | 56840 | return __ret; |
| | 56841 | } |
| | 56842 | __ai uint32x4_t vreinterpretq_u32_p8(poly8x16_t __p0) { |
| | 56843 | uint32x4_t __ret; |
| | 56844 | __ret = (uint32x4_t)(__p0); |
| | 56845 | return __ret; |
| | 56846 | } |
| | 56847 | __ai uint32x4_t vreinterpretq_u32_p128(poly128_t __p0) { |
| | 56848 | uint32x4_t __ret; |
| | 56849 | __ret = (uint32x4_t)(__p0); |
| | 56850 | return __ret; |
| | 56851 | } |
| | 56852 | __ai uint32x4_t vreinterpretq_u32_p64(poly64x2_t __p0) { |
| | 56853 | uint32x4_t __ret; |
| | 56854 | __ret = (uint32x4_t)(__p0); |
| | 56855 | return __ret; |
| | 56856 | } |
| | 56857 | __ai uint32x4_t vreinterpretq_u32_p16(poly16x8_t __p0) { |
| | 56858 | uint32x4_t __ret; |
| | 56859 | __ret = (uint32x4_t)(__p0); |
| | 56860 | return __ret; |
| | 56861 | } |
| | 56862 | __ai uint32x4_t vreinterpretq_u32_u8(uint8x16_t __p0) { |
| | 56863 | uint32x4_t __ret; |
| | 56864 | __ret = (uint32x4_t)(__p0); |
| | 56865 | return __ret; |
| | 56866 | } |
| | 56867 | __ai uint32x4_t vreinterpretq_u32_u64(uint64x2_t __p0) { |
| | 56868 | uint32x4_t __ret; |
| | 56869 | __ret = (uint32x4_t)(__p0); |
| | 56870 | return __ret; |
| | 56871 | } |
| | 56872 | __ai uint32x4_t vreinterpretq_u32_u16(uint16x8_t __p0) { |
| | 56873 | uint32x4_t __ret; |
| | 56874 | __ret = (uint32x4_t)(__p0); |
| | 56875 | return __ret; |
| | 56876 | } |
| | 56877 | __ai uint32x4_t vreinterpretq_u32_s8(int8x16_t __p0) { |
| | 56878 | uint32x4_t __ret; |
| | 56879 | __ret = (uint32x4_t)(__p0); |
| | 56880 | return __ret; |
| | 56881 | } |
| | 56882 | __ai uint32x4_t vreinterpretq_u32_f64(float64x2_t __p0) { |
| | 56883 | uint32x4_t __ret; |
| | 56884 | __ret = (uint32x4_t)(__p0); |
| | 56885 | return __ret; |
| | 56886 | } |
| | 56887 | __ai uint32x4_t vreinterpretq_u32_f32(float32x4_t __p0) { |
| | 56888 | uint32x4_t __ret; |
| | 56889 | __ret = (uint32x4_t)(__p0); |
| | 56890 | return __ret; |
| | 56891 | } |
| | 56892 | __ai uint32x4_t vreinterpretq_u32_f16(float16x8_t __p0) { |
| | 56893 | uint32x4_t __ret; |
| | 56894 | __ret = (uint32x4_t)(__p0); |
| | 56895 | return __ret; |
| | 56896 | } |
| | 56897 | __ai uint32x4_t vreinterpretq_u32_s32(int32x4_t __p0) { |
| | 56898 | uint32x4_t __ret; |
| | 56899 | __ret = (uint32x4_t)(__p0); |
| | 56900 | return __ret; |
| | 56901 | } |
| | 56902 | __ai uint32x4_t vreinterpretq_u32_s64(int64x2_t __p0) { |
| | 56903 | uint32x4_t __ret; |
| | 56904 | __ret = (uint32x4_t)(__p0); |
| | 56905 | return __ret; |
| | 56906 | } |
| | 56907 | __ai uint32x4_t vreinterpretq_u32_s16(int16x8_t __p0) { |
| | 56908 | uint32x4_t __ret; |
| | 56909 | __ret = (uint32x4_t)(__p0); |
| | 56910 | return __ret; |
| | 56911 | } |
| | 56912 | __ai uint64x2_t vreinterpretq_u64_p8(poly8x16_t __p0) { |
| | 56913 | uint64x2_t __ret; |
| | 56914 | __ret = (uint64x2_t)(__p0); |
| 54833 | return __ret; | 56915 | return __ret; |
| 54834 | } | 56916 | } |
| 54835 | #else | 56917 | __ai uint64x2_t vreinterpretq_u64_p128(poly128_t __p0) { |
| 54836 | __ai uint32_t vmaxvq_u32(uint32x4_t __p0) { | 56918 | uint64x2_t __ret; |
| 54837 | uint32_t __ret; | 56919 | __ret = (uint64x2_t)(__p0); |
| 54838 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 54839 | __ret = (uint32_t) __builtin_neon_vmaxvq_u32(__rev0); | | |
| 54840 | return __ret; | 56920 | return __ret; |
| 54841 | } | 56921 | } |
| 54842 | #endif | 56922 | __ai uint64x2_t vreinterpretq_u64_p64(poly64x2_t __p0) { |
| 54843 | | 56923 | uint64x2_t __ret; |
| 54844 | #ifdef __LITTLE_ENDIAN__ | 56924 | __ret = (uint64x2_t)(__p0); |
| 54845 | __ai uint16_t vmaxvq_u16(uint16x8_t __p0) { | | |
| 54846 | uint16_t __ret; | | |
| 54847 | __ret = (uint16_t) __builtin_neon_vmaxvq_u16(__p0); | | |
| 54848 | return __ret; | 56925 | return __ret; |
| 54849 | } | 56926 | } |
| 54850 | #else | 56927 | __ai uint64x2_t vreinterpretq_u64_p16(poly16x8_t __p0) { |
| 54851 | __ai uint16_t vmaxvq_u16(uint16x8_t __p0) { | 56928 | uint64x2_t __ret; |
| 54852 | uint16_t __ret; | 56929 | __ret = (uint64x2_t)(__p0); |
| 54853 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 54854 | __ret = (uint16_t) __builtin_neon_vmaxvq_u16(__rev0); | | |
| 54855 | return __ret; | 56930 | return __ret; |
| 54856 | } | 56931 | } |
| 54857 | #endif | 56932 | __ai uint64x2_t vreinterpretq_u64_u8(uint8x16_t __p0) { |
| 54858 | | 56933 | uint64x2_t __ret; |
| 54859 | #ifdef __LITTLE_ENDIAN__ | 56934 | __ret = (uint64x2_t)(__p0); |
| 54860 | __ai int8_t vmaxvq_s8(int8x16_t __p0) { | | |
| 54861 | int8_t __ret; | | |
| 54862 | __ret = (int8_t) __builtin_neon_vmaxvq_s8(__p0); | | |
| 54863 | return __ret; | 56935 | return __ret; |
| 54864 | } | 56936 | } |
| 54865 | #else | 56937 | __ai uint64x2_t vreinterpretq_u64_u32(uint32x4_t __p0) { |
| 54866 | __ai int8_t vmaxvq_s8(int8x16_t __p0) { | 56938 | uint64x2_t __ret; |
| 54867 | int8_t __ret; | 56939 | __ret = (uint64x2_t)(__p0); |
| 54868 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 54869 | __ret = (int8_t) __builtin_neon_vmaxvq_s8(__rev0); | | |
| 54870 | return __ret; | 56940 | return __ret; |
| 54871 | } | 56941 | } |
| 54872 | #endif | 56942 | __ai uint64x2_t vreinterpretq_u64_u16(uint16x8_t __p0) { |
| 54873 | | 56943 | uint64x2_t __ret; |
| 54874 | #ifdef __LITTLE_ENDIAN__ | 56944 | __ret = (uint64x2_t)(__p0); |
| 54875 | __ai float64_t vmaxvq_f64(float64x2_t __p0) { | | |
| 54876 | float64_t __ret; | | |
| 54877 | __ret = (float64_t) __builtin_neon_vmaxvq_f64(__p0); | | |
| 54878 | return __ret; | 56945 | return __ret; |
| 54879 | } | 56946 | } |
| 54880 | #else | 56947 | __ai uint64x2_t vreinterpretq_u64_s8(int8x16_t __p0) { |
| 54881 | __ai float64_t vmaxvq_f64(float64x2_t __p0) { | 56948 | uint64x2_t __ret; |
| 54882 | float64_t __ret; | 56949 | __ret = (uint64x2_t)(__p0); |
| 54883 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 54884 | __ret = (float64_t) __builtin_neon_vmaxvq_f64(__rev0); | | |
| 54885 | return __ret; | 56950 | return __ret; |
| 54886 | } | 56951 | } |
| 54887 | #endif | 56952 | __ai uint64x2_t vreinterpretq_u64_f64(float64x2_t __p0) { |
| 54888 | | 56953 | uint64x2_t __ret; |
| 54889 | #ifdef __LITTLE_ENDIAN__ | 56954 | __ret = (uint64x2_t)(__p0); |
| 54890 | __ai float32_t vmaxvq_f32(float32x4_t __p0) { | | |
| 54891 | float32_t __ret; | | |
| 54892 | __ret = (float32_t) __builtin_neon_vmaxvq_f32(__p0); | | |
| 54893 | return __ret; | 56955 | return __ret; |
| 54894 | } | 56956 | } |
| 54895 | #else | 56957 | __ai uint64x2_t vreinterpretq_u64_f32(float32x4_t __p0) { |
| 54896 | __ai float32_t vmaxvq_f32(float32x4_t __p0) { | 56958 | uint64x2_t __ret; |
| 54897 | float32_t __ret; | 56959 | __ret = (uint64x2_t)(__p0); |
| 54898 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 54899 | __ret = (float32_t) __builtin_neon_vmaxvq_f32(__rev0); | | |
| 54900 | return __ret; | 56960 | return __ret; |
| 54901 | } | 56961 | } |
| 54902 | #endif | 56962 | __ai uint64x2_t vreinterpretq_u64_f16(float16x8_t __p0) { |
| 54903 | | 56963 | uint64x2_t __ret; |
| 54904 | #ifdef __LITTLE_ENDIAN__ | 56964 | __ret = (uint64x2_t)(__p0); |
| 54905 | __ai int32_t vmaxvq_s32(int32x4_t __p0) { | | |
| 54906 | int32_t __ret; | | |
| 54907 | __ret = (int32_t) __builtin_neon_vmaxvq_s32(__p0); | | |
| 54908 | return __ret; | 56965 | return __ret; |
| 54909 | } | 56966 | } |
| 54910 | #else | 56967 | __ai uint64x2_t vreinterpretq_u64_s32(int32x4_t __p0) { |
| 54911 | __ai int32_t vmaxvq_s32(int32x4_t __p0) { | 56968 | uint64x2_t __ret; |
| 54912 | int32_t __ret; | 56969 | __ret = (uint64x2_t)(__p0); |
| 54913 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 54914 | __ret = (int32_t) __builtin_neon_vmaxvq_s32(__rev0); | | |
| 54915 | return __ret; | 56970 | return __ret; |
| 54916 | } | 56971 | } |
| 54917 | #endif | 56972 | __ai uint64x2_t vreinterpretq_u64_s64(int64x2_t __p0) { |
| 54918 | | 56973 | uint64x2_t __ret; |
| 54919 | #ifdef __LITTLE_ENDIAN__ | 56974 | __ret = (uint64x2_t)(__p0); |
| 54920 | __ai int16_t vmaxvq_s16(int16x8_t __p0) { | | |
| 54921 | int16_t __ret; | | |
| 54922 | __ret = (int16_t) __builtin_neon_vmaxvq_s16(__p0); | | |
| 54923 | return __ret; | 56975 | return __ret; |
| 54924 | } | 56976 | } |
| 54925 | #else | 56977 | __ai uint64x2_t vreinterpretq_u64_s16(int16x8_t __p0) { |
| 54926 | __ai int16_t vmaxvq_s16(int16x8_t __p0) { | 56978 | uint64x2_t __ret; |
| 54927 | int16_t __ret; | 56979 | __ret = (uint64x2_t)(__p0); |
| 54928 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 54929 | __ret = (int16_t) __builtin_neon_vmaxvq_s16(__rev0); | | |
| 54930 | return __ret; | 56980 | return __ret; |
| 54931 | } | 56981 | } |
| 54932 | #endif | 56982 | __ai uint16x8_t vreinterpretq_u16_p8(poly8x16_t __p0) { |
| 54933 | | 56983 | uint16x8_t __ret; |
| 54934 | #ifdef __LITTLE_ENDIAN__ | 56984 | __ret = (uint16x8_t)(__p0); |
| 54935 | __ai uint8_t vmaxv_u8(uint8x8_t __p0) { | | |
| 54936 | uint8_t __ret; | | |
| 54937 | __ret = (uint8_t) __builtin_neon_vmaxv_u8(__p0); | | |
| 54938 | return __ret; | 56985 | return __ret; |
| 54939 | } | 56986 | } |
| 54940 | #else | 56987 | __ai uint16x8_t vreinterpretq_u16_p128(poly128_t __p0) { |
| 54941 | __ai uint8_t vmaxv_u8(uint8x8_t __p0) { | 56988 | uint16x8_t __ret; |
| 54942 | uint8_t __ret; | 56989 | __ret = (uint16x8_t)(__p0); |
| 54943 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 54944 | __ret = (uint8_t) __builtin_neon_vmaxv_u8(__rev0); | | |
| 54945 | return __ret; | 56990 | return __ret; |
| 54946 | } | 56991 | } |
| 54947 | #endif | 56992 | __ai uint16x8_t vreinterpretq_u16_p64(poly64x2_t __p0) { |
| 54948 | | 56993 | uint16x8_t __ret; |
| 54949 | #ifdef __LITTLE_ENDIAN__ | 56994 | __ret = (uint16x8_t)(__p0); |
| 54950 | __ai uint32_t vmaxv_u32(uint32x2_t __p0) { | | |
| 54951 | uint32_t __ret; | | |
| 54952 | __ret = (uint32_t) __builtin_neon_vmaxv_u32(__p0); | | |
| 54953 | return __ret; | 56995 | return __ret; |
| 54954 | } | 56996 | } |
| 54955 | #else | 56997 | __ai uint16x8_t vreinterpretq_u16_p16(poly16x8_t __p0) { |
| 54956 | __ai uint32_t vmaxv_u32(uint32x2_t __p0) { | 56998 | uint16x8_t __ret; |
| 54957 | uint32_t __ret; | 56999 | __ret = (uint16x8_t)(__p0); |
| 54958 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 54959 | __ret = (uint32_t) __builtin_neon_vmaxv_u32(__rev0); | | |
| 54960 | return __ret; | 57000 | return __ret; |
| 54961 | } | 57001 | } |
| 54962 | #endif | 57002 | __ai uint16x8_t vreinterpretq_u16_u8(uint8x16_t __p0) { |
| 54963 | | 57003 | uint16x8_t __ret; |
| 54964 | #ifdef __LITTLE_ENDIAN__ | 57004 | __ret = (uint16x8_t)(__p0); |
| 54965 | __ai uint16_t vmaxv_u16(uint16x4_t __p0) { | | |
| 54966 | uint16_t __ret; | | |
| 54967 | __ret = (uint16_t) __builtin_neon_vmaxv_u16(__p0); | | |
| 54968 | return __ret; | 57005 | return __ret; |
| 54969 | } | 57006 | } |
| 54970 | #else | 57007 | __ai uint16x8_t vreinterpretq_u16_u32(uint32x4_t __p0) { |
| 54971 | __ai uint16_t vmaxv_u16(uint16x4_t __p0) { | 57008 | uint16x8_t __ret; |
| 54972 | uint16_t __ret; | 57009 | __ret = (uint16x8_t)(__p0); |
| 54973 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 54974 | __ret = (uint16_t) __builtin_neon_vmaxv_u16(__rev0); | | |
| 54975 | return __ret; | 57010 | return __ret; |
| 54976 | } | 57011 | } |
| 54977 | #endif | 57012 | __ai uint16x8_t vreinterpretq_u16_u64(uint64x2_t __p0) { |
| 54978 | | 57013 | uint16x8_t __ret; |
| 54979 | #ifdef __LITTLE_ENDIAN__ | 57014 | __ret = (uint16x8_t)(__p0); |
| 54980 | __ai int8_t vmaxv_s8(int8x8_t __p0) { | | |
| 54981 | int8_t __ret; | | |
| 54982 | __ret = (int8_t) __builtin_neon_vmaxv_s8(__p0); | | |
| 54983 | return __ret; | 57015 | return __ret; |
| 54984 | } | 57016 | } |
| 54985 | #else | 57017 | __ai uint16x8_t vreinterpretq_u16_s8(int8x16_t __p0) { |
| 54986 | __ai int8_t vmaxv_s8(int8x8_t __p0) { | 57018 | uint16x8_t __ret; |
| 54987 | int8_t __ret; | 57019 | __ret = (uint16x8_t)(__p0); |
| 54988 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 54989 | __ret = (int8_t) __builtin_neon_vmaxv_s8(__rev0); | | |
| 54990 | return __ret; | 57020 | return __ret; |
| 54991 | } | 57021 | } |
| 54992 | #endif | 57022 | __ai uint16x8_t vreinterpretq_u16_f64(float64x2_t __p0) { |
| 54993 | | 57023 | uint16x8_t __ret; |
| 54994 | #ifdef __LITTLE_ENDIAN__ | 57024 | __ret = (uint16x8_t)(__p0); |
| 54995 | __ai float32_t vmaxv_f32(float32x2_t __p0) { | | |
| 54996 | float32_t __ret; | | |
| 54997 | __ret = (float32_t) __builtin_neon_vmaxv_f32(__p0); | | |
| 54998 | return __ret; | 57025 | return __ret; |
| 54999 | } | 57026 | } |
| 55000 | #else | 57027 | __ai uint16x8_t vreinterpretq_u16_f32(float32x4_t __p0) { |
| 55001 | __ai float32_t vmaxv_f32(float32x2_t __p0) { | 57028 | uint16x8_t __ret; |
| 55002 | float32_t __ret; | 57029 | __ret = (uint16x8_t)(__p0); |
| 55003 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 55004 | __ret = (float32_t) __builtin_neon_vmaxv_f32(__rev0); | | |
| 55005 | return __ret; | 57030 | return __ret; |
| 55006 | } | 57031 | } |
| 55007 | #endif | 57032 | __ai uint16x8_t vreinterpretq_u16_f16(float16x8_t __p0) { |
| 55008 | | 57033 | uint16x8_t __ret; |
| 55009 | #ifdef __LITTLE_ENDIAN__ | 57034 | __ret = (uint16x8_t)(__p0); |
| 55010 | __ai int32_t vmaxv_s32(int32x2_t __p0) { | | |
| 55011 | int32_t __ret; | | |
| 55012 | __ret = (int32_t) __builtin_neon_vmaxv_s32(__p0); | | |
| 55013 | return __ret; | 57035 | return __ret; |
| 55014 | } | 57036 | } |
| 55015 | #else | 57037 | __ai uint16x8_t vreinterpretq_u16_s32(int32x4_t __p0) { |
| 55016 | __ai int32_t vmaxv_s32(int32x2_t __p0) { | 57038 | uint16x8_t __ret; |
| 55017 | int32_t __ret; | 57039 | __ret = (uint16x8_t)(__p0); |
| 55018 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 55019 | __ret = (int32_t) __builtin_neon_vmaxv_s32(__rev0); | | |
| 55020 | return __ret; | 57040 | return __ret; |
| 55021 | } | 57041 | } |
| 55022 | #endif | 57042 | __ai uint16x8_t vreinterpretq_u16_s64(int64x2_t __p0) { |
| 55023 | | 57043 | uint16x8_t __ret; |
| 55024 | #ifdef __LITTLE_ENDIAN__ | 57044 | __ret = (uint16x8_t)(__p0); |
| 55025 | __ai int16_t vmaxv_s16(int16x4_t __p0) { | | |
| 55026 | int16_t __ret; | | |
| 55027 | __ret = (int16_t) __builtin_neon_vmaxv_s16(__p0); | | |
| 55028 | return __ret; | 57045 | return __ret; |
| 55029 | } | 57046 | } |
| 55030 | #else | 57047 | __ai uint16x8_t vreinterpretq_u16_s16(int16x8_t __p0) { |
| 55031 | __ai int16_t vmaxv_s16(int16x4_t __p0) { | 57048 | uint16x8_t __ret; |
| 55032 | int16_t __ret; | 57049 | __ret = (uint16x8_t)(__p0); |
| 55033 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 55034 | __ret = (int16_t) __builtin_neon_vmaxv_s16(__rev0); | | |
| 55035 | return __ret; | 57050 | return __ret; |
| 55036 | } | 57051 | } |
| 55037 | #endif | 57052 | __ai int8x16_t vreinterpretq_s8_p8(poly8x16_t __p0) { |
| 55038 | | 57053 | int8x16_t __ret; |
| 55039 | #ifdef __LITTLE_ENDIAN__ | 57054 | __ret = (int8x16_t)(__p0); |
| 55040 | __ai float64x2_t vminq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 55041 | float64x2_t __ret; | | |
| 55042 | __ret = (float64x2_t) __builtin_neon_vminq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | | |
| 55043 | return __ret; | 57055 | return __ret; |
| 55044 | } | 57056 | } |
| 55045 | #else | 57057 | __ai int8x16_t vreinterpretq_s8_p128(poly128_t __p0) { |
| 55046 | __ai float64x2_t vminq_f64(float64x2_t __p0, float64x2_t __p1) { | 57058 | int8x16_t __ret; |
| 55047 | float64x2_t __ret; | 57059 | __ret = (int8x16_t)(__p0); |
| 55048 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 55049 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 55050 | __ret = (float64x2_t) __builtin_neon_vminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); | | |
| 55051 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 55052 | return __ret; | 57060 | return __ret; |
| 55053 | } | 57061 | } |
| 55054 | #endif | 57062 | __ai int8x16_t vreinterpretq_s8_p64(poly64x2_t __p0) { |
| 55055 | | 57063 | int8x16_t __ret; |
| 55056 | __ai float64x1_t vmin_f64(float64x1_t __p0, float64x1_t __p1) { | 57064 | __ret = (int8x16_t)(__p0); |
| 55057 | float64x1_t __ret; | | |
| 55058 | __ret = (float64x1_t) __builtin_neon_vmin_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | | |
| 55059 | return __ret; | 57065 | return __ret; |
| 55060 | } | 57066 | } |
| 55061 | #ifdef __LITTLE_ENDIAN__ | 57067 | __ai int8x16_t vreinterpretq_s8_p16(poly16x8_t __p0) { |
| 55062 | __ai float64_t vminnmvq_f64(float64x2_t __p0) { | 57068 | int8x16_t __ret; |
| 55063 | float64_t __ret; | 57069 | __ret = (int8x16_t)(__p0); |
| 55064 | __ret = (float64_t) __builtin_neon_vminnmvq_f64(__p0); | | |
| 55065 | return __ret; | 57070 | return __ret; |
| 55066 | } | 57071 | } |
| 55067 | #else | 57072 | __ai int8x16_t vreinterpretq_s8_u8(uint8x16_t __p0) { |
| 55068 | __ai float64_t vminnmvq_f64(float64x2_t __p0) { | 57073 | int8x16_t __ret; |
| 55069 | float64_t __ret; | 57074 | __ret = (int8x16_t)(__p0); |
| 55070 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 55071 | __ret = (float64_t) __builtin_neon_vminnmvq_f64(__rev0); | | |
| 55072 | return __ret; | 57075 | return __ret; |
| 55073 | } | 57076 | } |
| 55074 | #endif | 57077 | __ai int8x16_t vreinterpretq_s8_u32(uint32x4_t __p0) { |
| 55075 | | 57078 | int8x16_t __ret; |
| 55076 | #ifdef __LITTLE_ENDIAN__ | 57079 | __ret = (int8x16_t)(__p0); |
| 55077 | __ai float32_t vminnmvq_f32(float32x4_t __p0) { | | |
| 55078 | float32_t __ret; | | |
| 55079 | __ret = (float32_t) __builtin_neon_vminnmvq_f32(__p0); | | |
| 55080 | return __ret; | 57080 | return __ret; |
| 55081 | } | 57081 | } |
| 55082 | #else | 57082 | __ai int8x16_t vreinterpretq_s8_u64(uint64x2_t __p0) { |
| 55083 | __ai float32_t vminnmvq_f32(float32x4_t __p0) { | 57083 | int8x16_t __ret; |
| 55084 | float32_t __ret; | 57084 | __ret = (int8x16_t)(__p0); |
| 55085 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 55086 | __ret = (float32_t) __builtin_neon_vminnmvq_f32(__rev0); | | |
| 55087 | return __ret; | 57085 | return __ret; |
| 55088 | } | 57086 | } |
| 55089 | #endif | 57087 | __ai int8x16_t vreinterpretq_s8_u16(uint16x8_t __p0) { |
| 55090 | | 57088 | int8x16_t __ret; |
| 55091 | #ifdef __LITTLE_ENDIAN__ | 57089 | __ret = (int8x16_t)(__p0); |
| 55092 | __ai float32_t vminnmv_f32(float32x2_t __p0) { | | |
| 55093 | float32_t __ret; | | |
| 55094 | __ret = (float32_t) __builtin_neon_vminnmv_f32(__p0); | | |
| 55095 | return __ret; | 57090 | return __ret; |
| 55096 | } | 57091 | } |
| 55097 | #else | 57092 | __ai int8x16_t vreinterpretq_s8_f64(float64x2_t __p0) { |
| 55098 | __ai float32_t vminnmv_f32(float32x2_t __p0) { | 57093 | int8x16_t __ret; |
| 55099 | float32_t __ret; | 57094 | __ret = (int8x16_t)(__p0); |
| 55100 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 55101 | __ret = (float32_t) __builtin_neon_vminnmv_f32(__rev0); | | |
| 55102 | return __ret; | 57095 | return __ret; |
| 55103 | } | 57096 | } |
| 55104 | #endif | 57097 | __ai int8x16_t vreinterpretq_s8_f32(float32x4_t __p0) { |
| 55105 | | 57098 | int8x16_t __ret; |
| 55106 | #ifdef __LITTLE_ENDIAN__ | 57099 | __ret = (int8x16_t)(__p0); |
| 55107 | __ai uint8_t vminvq_u8(uint8x16_t __p0) { | | |
| 55108 | uint8_t __ret; | | |
| 55109 | __ret = (uint8_t) __builtin_neon_vminvq_u8(__p0); | | |
| 55110 | return __ret; | 57100 | return __ret; |
| 55111 | } | 57101 | } |
| 55112 | #else | 57102 | __ai int8x16_t vreinterpretq_s8_f16(float16x8_t __p0) { |
| 55113 | __ai uint8_t vminvq_u8(uint8x16_t __p0) { | 57103 | int8x16_t __ret; |
| 55114 | uint8_t __ret; | 57104 | __ret = (int8x16_t)(__p0); |
| 55115 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 55116 | __ret = (uint8_t) __builtin_neon_vminvq_u8(__rev0); | | |
| 55117 | return __ret; | 57105 | return __ret; |
| 55118 | } | 57106 | } |
| 55119 | #endif | 57107 | __ai int8x16_t vreinterpretq_s8_s32(int32x4_t __p0) { |
| 55120 | | 57108 | int8x16_t __ret; |
| 55121 | #ifdef __LITTLE_ENDIAN__ | 57109 | __ret = (int8x16_t)(__p0); |
| 55122 | __ai uint32_t vminvq_u32(uint32x4_t __p0) { | | |
| 55123 | uint32_t __ret; | | |
| 55124 | __ret = (uint32_t) __builtin_neon_vminvq_u32(__p0); | | |
| 55125 | return __ret; | 57110 | return __ret; |
| 55126 | } | 57111 | } |
| 55127 | #else | 57112 | __ai int8x16_t vreinterpretq_s8_s64(int64x2_t __p0) { |
| 55128 | __ai uint32_t vminvq_u32(uint32x4_t __p0) { | 57113 | int8x16_t __ret; |
| 55129 | uint32_t __ret; | 57114 | __ret = (int8x16_t)(__p0); |
| 55130 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 55131 | __ret = (uint32_t) __builtin_neon_vminvq_u32(__rev0); | | |
| 55132 | return __ret; | 57115 | return __ret; |
| 55133 | } | 57116 | } |
| 55134 | #endif | 57117 | __ai int8x16_t vreinterpretq_s8_s16(int16x8_t __p0) { |
| 55135 | | 57118 | int8x16_t __ret; |
| 55136 | #ifdef __LITTLE_ENDIAN__ | 57119 | __ret = (int8x16_t)(__p0); |
| 55137 | __ai uint16_t vminvq_u16(uint16x8_t __p0) { | | |
| 55138 | uint16_t __ret; | | |
| 55139 | __ret = (uint16_t) __builtin_neon_vminvq_u16(__p0); | | |
| 55140 | return __ret; | 57120 | return __ret; |
| 55141 | } | 57121 | } |
| 55142 | #else | 57122 | __ai float64x2_t vreinterpretq_f64_p8(poly8x16_t __p0) { |
| 55143 | __ai uint16_t vminvq_u16(uint16x8_t __p0) { | 57123 | float64x2_t __ret; |
| 55144 | uint16_t __ret; | 57124 | __ret = (float64x2_t)(__p0); |
| 55145 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 55146 | __ret = (uint16_t) __builtin_neon_vminvq_u16(__rev0); | | |
| 55147 | return __ret; | 57125 | return __ret; |
| 55148 | } | 57126 | } |
| 55149 | #endif | 57127 | __ai float64x2_t vreinterpretq_f64_p128(poly128_t __p0) { |
| 55150 | | 57128 | float64x2_t __ret; |
| 55151 | #ifdef __LITTLE_ENDIAN__ | 57129 | __ret = (float64x2_t)(__p0); |
| 55152 | __ai int8_t vminvq_s8(int8x16_t __p0) { | | |
| 55153 | int8_t __ret; | | |
| 55154 | __ret = (int8_t) __builtin_neon_vminvq_s8(__p0); | | |
| 55155 | return __ret; | 57130 | return __ret; |
| 55156 | } | 57131 | } |
| 55157 | #else | 57132 | __ai float64x2_t vreinterpretq_f64_p64(poly64x2_t __p0) { |
| 55158 | __ai int8_t vminvq_s8(int8x16_t __p0) { | 57133 | float64x2_t __ret; |
| 55159 | int8_t __ret; | 57134 | __ret = (float64x2_t)(__p0); |
| 55160 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 55161 | __ret = (int8_t) __builtin_neon_vminvq_s8(__rev0); | | |
| 55162 | return __ret; | 57135 | return __ret; |
| 55163 | } | 57136 | } |
| 55164 | #endif | 57137 | __ai float64x2_t vreinterpretq_f64_p16(poly16x8_t __p0) { |
| 55165 | | 57138 | float64x2_t __ret; |
| 55166 | #ifdef __LITTLE_ENDIAN__ | 57139 | __ret = (float64x2_t)(__p0); |
| 55167 | __ai float64_t vminvq_f64(float64x2_t __p0) { | | |
| 55168 | float64_t __ret; | | |
| 55169 | __ret = (float64_t) __builtin_neon_vminvq_f64(__p0); | | |
| 55170 | return __ret; | 57140 | return __ret; |
| 55171 | } | 57141 | } |
| 55172 | #else | 57142 | __ai float64x2_t vreinterpretq_f64_u8(uint8x16_t __p0) { |
| 55173 | __ai float64_t vminvq_f64(float64x2_t __p0) { | 57143 | float64x2_t __ret; |
| 55174 | float64_t __ret; | 57144 | __ret = (float64x2_t)(__p0); |
| 55175 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 55176 | __ret = (float64_t) __builtin_neon_vminvq_f64(__rev0); | | |
| 55177 | return __ret; | 57145 | return __ret; |
| 55178 | } | 57146 | } |
| 55179 | #endif | 57147 | __ai float64x2_t vreinterpretq_f64_u32(uint32x4_t __p0) { |
| 55180 | | 57148 | float64x2_t __ret; |
| 55181 | #ifdef __LITTLE_ENDIAN__ | 57149 | __ret = (float64x2_t)(__p0); |
| 55182 | __ai float32_t vminvq_f32(float32x4_t __p0) { | | |
| 55183 | float32_t __ret; | | |
| 55184 | __ret = (float32_t) __builtin_neon_vminvq_f32(__p0); | | |
| 55185 | return __ret; | 57150 | return __ret; |
| 55186 | } | 57151 | } |
| 55187 | #else | 57152 | __ai float64x2_t vreinterpretq_f64_u64(uint64x2_t __p0) { |
| 55188 | __ai float32_t vminvq_f32(float32x4_t __p0) { | 57153 | float64x2_t __ret; |
| 55189 | float32_t __ret; | 57154 | __ret = (float64x2_t)(__p0); |
| 55190 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 55191 | __ret = (float32_t) __builtin_neon_vminvq_f32(__rev0); | | |
| 55192 | return __ret; | 57155 | return __ret; |
| 55193 | } | 57156 | } |
| 55194 | #endif | 57157 | __ai float64x2_t vreinterpretq_f64_u16(uint16x8_t __p0) { |
| 55195 | | 57158 | float64x2_t __ret; |
| 55196 | #ifdef __LITTLE_ENDIAN__ | 57159 | __ret = (float64x2_t)(__p0); |
| 55197 | __ai int32_t vminvq_s32(int32x4_t __p0) { | | |
| 55198 | int32_t __ret; | | |
| 55199 | __ret = (int32_t) __builtin_neon_vminvq_s32(__p0); | | |
| 55200 | return __ret; | 57160 | return __ret; |
| 55201 | } | 57161 | } |
| 55202 | #else | 57162 | __ai float64x2_t vreinterpretq_f64_s8(int8x16_t __p0) { |
| 55203 | __ai int32_t vminvq_s32(int32x4_t __p0) { | 57163 | float64x2_t __ret; |
| 55204 | int32_t __ret; | 57164 | __ret = (float64x2_t)(__p0); |
| 55205 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 55206 | __ret = (int32_t) __builtin_neon_vminvq_s32(__rev0); | | |
| 55207 | return __ret; | 57165 | return __ret; |
| 55208 | } | 57166 | } |
| 55209 | #endif | 57167 | __ai float64x2_t vreinterpretq_f64_f32(float32x4_t __p0) { |
| 55210 | | 57168 | float64x2_t __ret; |
| 55211 | #ifdef __LITTLE_ENDIAN__ | 57169 | __ret = (float64x2_t)(__p0); |
| 55212 | __ai int16_t vminvq_s16(int16x8_t __p0) { | | |
| 55213 | int16_t __ret; | | |
| 55214 | __ret = (int16_t) __builtin_neon_vminvq_s16(__p0); | | |
| 55215 | return __ret; | 57170 | return __ret; |
| 55216 | } | 57171 | } |
| 55217 | #else | 57172 | __ai float64x2_t vreinterpretq_f64_f16(float16x8_t __p0) { |
| 55218 | __ai int16_t vminvq_s16(int16x8_t __p0) { | 57173 | float64x2_t __ret; |
| 55219 | int16_t __ret; | 57174 | __ret = (float64x2_t)(__p0); |
| 55220 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 55221 | __ret = (int16_t) __builtin_neon_vminvq_s16(__rev0); | | |
| 55222 | return __ret; | 57175 | return __ret; |
| 55223 | } | 57176 | } |
| 55224 | #endif | 57177 | __ai float64x2_t vreinterpretq_f64_s32(int32x4_t __p0) { |
| 55225 | | 57178 | float64x2_t __ret; |
| 55226 | #ifdef __LITTLE_ENDIAN__ | 57179 | __ret = (float64x2_t)(__p0); |
| 55227 | __ai uint8_t vminv_u8(uint8x8_t __p0) { | | |
| 55228 | uint8_t __ret; | | |
| 55229 | __ret = (uint8_t) __builtin_neon_vminv_u8(__p0); | | |
| 55230 | return __ret; | 57180 | return __ret; |
| 55231 | } | 57181 | } |
| 55232 | #else | 57182 | __ai float64x2_t vreinterpretq_f64_s64(int64x2_t __p0) { |
| 55233 | __ai uint8_t vminv_u8(uint8x8_t __p0) { | 57183 | float64x2_t __ret; |
| 55234 | uint8_t __ret; | 57184 | __ret = (float64x2_t)(__p0); |
| 55235 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 55236 | __ret = (uint8_t) __builtin_neon_vminv_u8(__rev0); | | |
| 55237 | return __ret; | 57185 | return __ret; |
| 55238 | } | 57186 | } |
| 55239 | #endif | 57187 | __ai float64x2_t vreinterpretq_f64_s16(int16x8_t __p0) { |
| 55240 | | 57188 | float64x2_t __ret; |
| 55241 | #ifdef __LITTLE_ENDIAN__ | 57189 | __ret = (float64x2_t)(__p0); |
| 55242 | __ai uint32_t vminv_u32(uint32x2_t __p0) { | | |
| 55243 | uint32_t __ret; | | |
| 55244 | __ret = (uint32_t) __builtin_neon_vminv_u32(__p0); | | |
| 55245 | return __ret; | 57190 | return __ret; |
| 55246 | } | 57191 | } |
| 55247 | #else | 57192 | __ai float32x4_t vreinterpretq_f32_p8(poly8x16_t __p0) { |
| 55248 | __ai uint32_t vminv_u32(uint32x2_t __p0) { | 57193 | float32x4_t __ret; |
| 55249 | uint32_t __ret; | 57194 | __ret = (float32x4_t)(__p0); |
| 55250 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 55251 | __ret = (uint32_t) __builtin_neon_vminv_u32(__rev0); | | |
| 55252 | return __ret; | 57195 | return __ret; |
| 55253 | } | 57196 | } |
| 55254 | #endif | 57197 | __ai float32x4_t vreinterpretq_f32_p128(poly128_t __p0) { |
| 55255 | | 57198 | float32x4_t __ret; |
| 55256 | #ifdef __LITTLE_ENDIAN__ | 57199 | __ret = (float32x4_t)(__p0); |
| 55257 | __ai uint16_t vminv_u16(uint16x4_t __p0) { | | |
| 55258 | uint16_t __ret; | | |
| 55259 | __ret = (uint16_t) __builtin_neon_vminv_u16(__p0); | | |
| 55260 | return __ret; | 57200 | return __ret; |
| 55261 | } | 57201 | } |
| 55262 | #else | 57202 | __ai float32x4_t vreinterpretq_f32_p64(poly64x2_t __p0) { |
| 55263 | __ai uint16_t vminv_u16(uint16x4_t __p0) { | 57203 | float32x4_t __ret; |
| 55264 | uint16_t __ret; | 57204 | __ret = (float32x4_t)(__p0); |
| 55265 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 55266 | __ret = (uint16_t) __builtin_neon_vminv_u16(__rev0); | | |
| 55267 | return __ret; | 57205 | return __ret; |
| 55268 | } | 57206 | } |
| 55269 | #endif | 57207 | __ai float32x4_t vreinterpretq_f32_p16(poly16x8_t __p0) { |
| 55270 | | 57208 | float32x4_t __ret; |
| 55271 | #ifdef __LITTLE_ENDIAN__ | 57209 | __ret = (float32x4_t)(__p0); |
| 55272 | __ai int8_t vminv_s8(int8x8_t __p0) { | | |
| 55273 | int8_t __ret; | | |
| 55274 | __ret = (int8_t) __builtin_neon_vminv_s8(__p0); | | |
| 55275 | return __ret; | 57210 | return __ret; |
| 55276 | } | 57211 | } |
| 55277 | #else | 57212 | __ai float32x4_t vreinterpretq_f32_u8(uint8x16_t __p0) { |
| 55278 | __ai int8_t vminv_s8(int8x8_t __p0) { | 57213 | float32x4_t __ret; |
| 55279 | int8_t __ret; | 57214 | __ret = (float32x4_t)(__p0); |
| 55280 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 57215 | return __ret; |
| 55281 | __ret = (int8_t) __builtin_neon_vminv_s8(__rev0); | 57216 | } |
| | 57217 | __ai float32x4_t vreinterpretq_f32_u32(uint32x4_t __p0) { |
| | 57218 | float32x4_t __ret; |
| | 57219 | __ret = (float32x4_t)(__p0); |
| 55282 | return __ret; | 57220 | return __ret; |
| 55283 | } | 57221 | } |
| 55284 | #endif | 57222 | __ai float32x4_t vreinterpretq_f32_u64(uint64x2_t __p0) { |
| 55285 | | 57223 | float32x4_t __ret; |
| 55286 | #ifdef __LITTLE_ENDIAN__ | 57224 | __ret = (float32x4_t)(__p0); |
| 55287 | __ai float32_t vminv_f32(float32x2_t __p0) { | | |
| 55288 | float32_t __ret; | | |
| 55289 | __ret = (float32_t) __builtin_neon_vminv_f32(__p0); | | |
| 55290 | return __ret; | 57225 | return __ret; |
| 55291 | } | 57226 | } |
| 55292 | #else | 57227 | __ai float32x4_t vreinterpretq_f32_u16(uint16x8_t __p0) { |
| 55293 | __ai float32_t vminv_f32(float32x2_t __p0) { | 57228 | float32x4_t __ret; |
| 55294 | float32_t __ret; | 57229 | __ret = (float32x4_t)(__p0); |
| 55295 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 55296 | __ret = (float32_t) __builtin_neon_vminv_f32(__rev0); | | |
| 55297 | return __ret; | 57230 | return __ret; |
| 55298 | } | 57231 | } |
| 55299 | #endif | 57232 | __ai float32x4_t vreinterpretq_f32_s8(int8x16_t __p0) { |
| 55300 | | 57233 | float32x4_t __ret; |
| 55301 | #ifdef __LITTLE_ENDIAN__ | 57234 | __ret = (float32x4_t)(__p0); |
| 55302 | __ai int32_t vminv_s32(int32x2_t __p0) { | | |
| 55303 | int32_t __ret; | | |
| 55304 | __ret = (int32_t) __builtin_neon_vminv_s32(__p0); | | |
| 55305 | return __ret; | 57235 | return __ret; |
| 55306 | } | 57236 | } |
| 55307 | #else | 57237 | __ai float32x4_t vreinterpretq_f32_f64(float64x2_t __p0) { |
| 55308 | __ai int32_t vminv_s32(int32x2_t __p0) { | 57238 | float32x4_t __ret; |
| 55309 | int32_t __ret; | 57239 | __ret = (float32x4_t)(__p0); |
| 55310 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 55311 | __ret = (int32_t) __builtin_neon_vminv_s32(__rev0); | | |
| 55312 | return __ret; | 57240 | return __ret; |
| 55313 | } | 57241 | } |
| 55314 | #endif | 57242 | __ai float32x4_t vreinterpretq_f32_f16(float16x8_t __p0) { |
| 55315 | | 57243 | float32x4_t __ret; |
| 55316 | #ifdef __LITTLE_ENDIAN__ | 57244 | __ret = (float32x4_t)(__p0); |
| 55317 | __ai int16_t vminv_s16(int16x4_t __p0) { | | |
| 55318 | int16_t __ret; | | |
| 55319 | __ret = (int16_t) __builtin_neon_vminv_s16(__p0); | | |
| 55320 | return __ret; | 57245 | return __ret; |
| 55321 | } | 57246 | } |
| 55322 | #else | 57247 | __ai float32x4_t vreinterpretq_f32_s32(int32x4_t __p0) { |
| 55323 | __ai int16_t vminv_s16(int16x4_t __p0) { | 57248 | float32x4_t __ret; |
| 55324 | int16_t __ret; | 57249 | __ret = (float32x4_t)(__p0); |
| 55325 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 55326 | __ret = (int16_t) __builtin_neon_vminv_s16(__rev0); | | |
| 55327 | return __ret; | 57250 | return __ret; |
| 55328 | } | 57251 | } |
| 55329 | #endif | 57252 | __ai float32x4_t vreinterpretq_f32_s64(int64x2_t __p0) { |
| 55330 | | 57253 | float32x4_t __ret; |
| 55331 | #ifdef __LITTLE_ENDIAN__ | 57254 | __ret = (float32x4_t)(__p0); |
| 55332 | __ai float64x2_t vmlaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | | |
| 55333 | float64x2_t __ret; | | |
| 55334 | __ret = __p0 + __p1 * __p2; | | |
| 55335 | return __ret; | 57255 | return __ret; |
| 55336 | } | 57256 | } |
| 55337 | #else | 57257 | __ai float32x4_t vreinterpretq_f32_s16(int16x8_t __p0) { |
| 55338 | __ai float64x2_t vmlaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 57258 | float32x4_t __ret; |
| 55339 | float64x2_t __ret; | 57259 | __ret = (float32x4_t)(__p0); |
| 55340 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 55341 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 55342 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 55343 | __ret = __rev0 + __rev1 * __rev2; | | |
| 55344 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 55345 | return __ret; | 57260 | return __ret; |
| 55346 | } | 57261 | } |
| 55347 | #endif | 57262 | __ai float16x8_t vreinterpretq_f16_p8(poly8x16_t __p0) { |
| 55348 | | 57263 | float16x8_t __ret; |
| 55349 | __ai float64x1_t vmla_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | 57264 | __ret = (float16x8_t)(__p0); |
| 55350 | float64x1_t __ret; | | |
| 55351 | __ret = __p0 + __p1 * __p2; | | |
| 55352 | return __ret; | 57265 | return __ret; |
| 55353 | } | 57266 | } |
| 55354 | #ifdef __LITTLE_ENDIAN__ | 57267 | __ai float16x8_t vreinterpretq_f16_p128(poly128_t __p0) { |
| 55355 | #define vmlaq_laneq_u32(__p0_531, __p1_531, __p2_531, __p3_531) __extension__ ({ \ | 57268 | float16x8_t __ret; |
| 55356 | uint32x4_t __ret_531; \ | 57269 | __ret = (float16x8_t)(__p0); |
| 55357 | uint32x4_t __s0_531 = __p0_531; \ | | |
| 55358 | uint32x4_t __s1_531 = __p1_531; \ | | |
| 55359 | uint32x4_t __s2_531 = __p2_531; \ | | |
| 55360 | __ret_531 = __s0_531 + __s1_531 * splatq_laneq_u32(__s2_531, __p3_531); \ | | |
| 55361 | __ret_531; \ | | |
| 55362 | }) | | |
| 55363 | #else | | |
| 55364 | #define vmlaq_laneq_u32(__p0_532, __p1_532, __p2_532, __p3_532) __extension__ ({ \ | | |
| 55365 | uint32x4_t __ret_532; \ | | |
| 55366 | uint32x4_t __s0_532 = __p0_532; \ | | |
| 55367 | uint32x4_t __s1_532 = __p1_532; \ | | |
| 55368 | uint32x4_t __s2_532 = __p2_532; \ | | |
| 55369 | uint32x4_t __rev0_532; __rev0_532 = __builtin_shufflevector(__s0_532, __s0_532, 3, 2, 1, 0); \ | | |
| 55370 | uint32x4_t __rev1_532; __rev1_532 = __builtin_shufflevector(__s1_532, __s1_532, 3, 2, 1, 0); \ | | |
| 55371 | uint32x4_t __rev2_532; __rev2_532 = __builtin_shufflevector(__s2_532, __s2_532, 3, 2, 1, 0); \ | | |
| 55372 | __ret_532 = __rev0_532 + __rev1_532 * __noswap_splatq_laneq_u32(__rev2_532, __p3_532); \ | | |
| 55373 | __ret_532 = __builtin_shufflevector(__ret_532, __ret_532, 3, 2, 1, 0); \ | | |
| 55374 | __ret_532; \ | | |
| 55375 | }) | | |
| 55376 | #endif | | |
| 55377 | | | |
| 55378 | #ifdef __LITTLE_ENDIAN__ | | |
| 55379 | #define vmlaq_laneq_u16(__p0_533, __p1_533, __p2_533, __p3_533) __extension__ ({ \ | | |
| 55380 | uint16x8_t __ret_533; \ | | |
| 55381 | uint16x8_t __s0_533 = __p0_533; \ | | |
| 55382 | uint16x8_t __s1_533 = __p1_533; \ | | |
| 55383 | uint16x8_t __s2_533 = __p2_533; \ | | |
| 55384 | __ret_533 = __s0_533 + __s1_533 * splatq_laneq_u16(__s2_533, __p3_533); \ | | |
| 55385 | __ret_533; \ | | |
| 55386 | }) | | |
| 55387 | #else | | |
| 55388 | #define vmlaq_laneq_u16(__p0_534, __p1_534, __p2_534, __p3_534) __extension__ ({ \ | | |
| 55389 | uint16x8_t __ret_534; \ | | |
| 55390 | uint16x8_t __s0_534 = __p0_534; \ | | |
| 55391 | uint16x8_t __s1_534 = __p1_534; \ | | |
| 55392 | uint16x8_t __s2_534 = __p2_534; \ | | |
| 55393 | uint16x8_t __rev0_534; __rev0_534 = __builtin_shufflevector(__s0_534, __s0_534, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55394 | uint16x8_t __rev1_534; __rev1_534 = __builtin_shufflevector(__s1_534, __s1_534, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55395 | uint16x8_t __rev2_534; __rev2_534 = __builtin_shufflevector(__s2_534, __s2_534, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55396 | __ret_534 = __rev0_534 + __rev1_534 * __noswap_splatq_laneq_u16(__rev2_534, __p3_534); \ | | |
| 55397 | __ret_534 = __builtin_shufflevector(__ret_534, __ret_534, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55398 | __ret_534; \ | | |
| 55399 | }) | | |
| 55400 | #endif | | |
| 55401 | | | |
| 55402 | #ifdef __LITTLE_ENDIAN__ | | |
| 55403 | #define vmlaq_laneq_f32(__p0_535, __p1_535, __p2_535, __p3_535) __extension__ ({ \ | | |
| 55404 | float32x4_t __ret_535; \ | | |
| 55405 | float32x4_t __s0_535 = __p0_535; \ | | |
| 55406 | float32x4_t __s1_535 = __p1_535; \ | | |
| 55407 | float32x4_t __s2_535 = __p2_535; \ | | |
| 55408 | __ret_535 = __s0_535 + __s1_535 * splatq_laneq_f32(__s2_535, __p3_535); \ | | |
| 55409 | __ret_535; \ | | |
| 55410 | }) | | |
| 55411 | #else | | |
| 55412 | #define vmlaq_laneq_f32(__p0_536, __p1_536, __p2_536, __p3_536) __extension__ ({ \ | | |
| 55413 | float32x4_t __ret_536; \ | | |
| 55414 | float32x4_t __s0_536 = __p0_536; \ | | |
| 55415 | float32x4_t __s1_536 = __p1_536; \ | | |
| 55416 | float32x4_t __s2_536 = __p2_536; \ | | |
| 55417 | float32x4_t __rev0_536; __rev0_536 = __builtin_shufflevector(__s0_536, __s0_536, 3, 2, 1, 0); \ | | |
| 55418 | float32x4_t __rev1_536; __rev1_536 = __builtin_shufflevector(__s1_536, __s1_536, 3, 2, 1, 0); \ | | |
| 55419 | float32x4_t __rev2_536; __rev2_536 = __builtin_shufflevector(__s2_536, __s2_536, 3, 2, 1, 0); \ | | |
| 55420 | __ret_536 = __rev0_536 + __rev1_536 * __noswap_splatq_laneq_f32(__rev2_536, __p3_536); \ | | |
| 55421 | __ret_536 = __builtin_shufflevector(__ret_536, __ret_536, 3, 2, 1, 0); \ | | |
| 55422 | __ret_536; \ | | |
| 55423 | }) | | |
| 55424 | #endif | | |
| 55425 | | | |
| 55426 | #ifdef __LITTLE_ENDIAN__ | | |
| 55427 | #define vmlaq_laneq_s32(__p0_537, __p1_537, __p2_537, __p3_537) __extension__ ({ \ | | |
| 55428 | int32x4_t __ret_537; \ | | |
| 55429 | int32x4_t __s0_537 = __p0_537; \ | | |
| 55430 | int32x4_t __s1_537 = __p1_537; \ | | |
| 55431 | int32x4_t __s2_537 = __p2_537; \ | | |
| 55432 | __ret_537 = __s0_537 + __s1_537 * splatq_laneq_s32(__s2_537, __p3_537); \ | | |
| 55433 | __ret_537; \ | | |
| 55434 | }) | | |
| 55435 | #else | | |
| 55436 | #define vmlaq_laneq_s32(__p0_538, __p1_538, __p2_538, __p3_538) __extension__ ({ \ | | |
| 55437 | int32x4_t __ret_538; \ | | |
| 55438 | int32x4_t __s0_538 = __p0_538; \ | | |
| 55439 | int32x4_t __s1_538 = __p1_538; \ | | |
| 55440 | int32x4_t __s2_538 = __p2_538; \ | | |
| 55441 | int32x4_t __rev0_538; __rev0_538 = __builtin_shufflevector(__s0_538, __s0_538, 3, 2, 1, 0); \ | | |
| 55442 | int32x4_t __rev1_538; __rev1_538 = __builtin_shufflevector(__s1_538, __s1_538, 3, 2, 1, 0); \ | | |
| 55443 | int32x4_t __rev2_538; __rev2_538 = __builtin_shufflevector(__s2_538, __s2_538, 3, 2, 1, 0); \ | | |
| 55444 | __ret_538 = __rev0_538 + __rev1_538 * __noswap_splatq_laneq_s32(__rev2_538, __p3_538); \ | | |
| 55445 | __ret_538 = __builtin_shufflevector(__ret_538, __ret_538, 3, 2, 1, 0); \ | | |
| 55446 | __ret_538; \ | | |
| 55447 | }) | | |
| 55448 | #endif | | |
| 55449 | | | |
| 55450 | #ifdef __LITTLE_ENDIAN__ | | |
| 55451 | #define vmlaq_laneq_s16(__p0_539, __p1_539, __p2_539, __p3_539) __extension__ ({ \ | | |
| 55452 | int16x8_t __ret_539; \ | | |
| 55453 | int16x8_t __s0_539 = __p0_539; \ | | |
| 55454 | int16x8_t __s1_539 = __p1_539; \ | | |
| 55455 | int16x8_t __s2_539 = __p2_539; \ | | |
| 55456 | __ret_539 = __s0_539 + __s1_539 * splatq_laneq_s16(__s2_539, __p3_539); \ | | |
| 55457 | __ret_539; \ | | |
| 55458 | }) | | |
| 55459 | #else | | |
| 55460 | #define vmlaq_laneq_s16(__p0_540, __p1_540, __p2_540, __p3_540) __extension__ ({ \ | | |
| 55461 | int16x8_t __ret_540; \ | | |
| 55462 | int16x8_t __s0_540 = __p0_540; \ | | |
| 55463 | int16x8_t __s1_540 = __p1_540; \ | | |
| 55464 | int16x8_t __s2_540 = __p2_540; \ | | |
| 55465 | int16x8_t __rev0_540; __rev0_540 = __builtin_shufflevector(__s0_540, __s0_540, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55466 | int16x8_t __rev1_540; __rev1_540 = __builtin_shufflevector(__s1_540, __s1_540, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55467 | int16x8_t __rev2_540; __rev2_540 = __builtin_shufflevector(__s2_540, __s2_540, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55468 | __ret_540 = __rev0_540 + __rev1_540 * __noswap_splatq_laneq_s16(__rev2_540, __p3_540); \ | | |
| 55469 | __ret_540 = __builtin_shufflevector(__ret_540, __ret_540, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55470 | __ret_540; \ | | |
| 55471 | }) | | |
| 55472 | #endif | | |
| 55473 | | | |
| 55474 | #ifdef __LITTLE_ENDIAN__ | | |
| 55475 | #define vmla_laneq_u32(__p0_541, __p1_541, __p2_541, __p3_541) __extension__ ({ \ | | |
| 55476 | uint32x2_t __ret_541; \ | | |
| 55477 | uint32x2_t __s0_541 = __p0_541; \ | | |
| 55478 | uint32x2_t __s1_541 = __p1_541; \ | | |
| 55479 | uint32x4_t __s2_541 = __p2_541; \ | | |
| 55480 | __ret_541 = __s0_541 + __s1_541 * splat_laneq_u32(__s2_541, __p3_541); \ | | |
| 55481 | __ret_541; \ | | |
| 55482 | }) | | |
| 55483 | #else | | |
| 55484 | #define vmla_laneq_u32(__p0_542, __p1_542, __p2_542, __p3_542) __extension__ ({ \ | | |
| 55485 | uint32x2_t __ret_542; \ | | |
| 55486 | uint32x2_t __s0_542 = __p0_542; \ | | |
| 55487 | uint32x2_t __s1_542 = __p1_542; \ | | |
| 55488 | uint32x4_t __s2_542 = __p2_542; \ | | |
| 55489 | uint32x2_t __rev0_542; __rev0_542 = __builtin_shufflevector(__s0_542, __s0_542, 1, 0); \ | | |
| 55490 | uint32x2_t __rev1_542; __rev1_542 = __builtin_shufflevector(__s1_542, __s1_542, 1, 0); \ | | |
| 55491 | uint32x4_t __rev2_542; __rev2_542 = __builtin_shufflevector(__s2_542, __s2_542, 3, 2, 1, 0); \ | | |
| 55492 | __ret_542 = __rev0_542 + __rev1_542 * __noswap_splat_laneq_u32(__rev2_542, __p3_542); \ | | |
| 55493 | __ret_542 = __builtin_shufflevector(__ret_542, __ret_542, 1, 0); \ | | |
| 55494 | __ret_542; \ | | |
| 55495 | }) | | |
| 55496 | #endif | | |
| 55497 | | | |
| 55498 | #ifdef __LITTLE_ENDIAN__ | | |
| 55499 | #define vmla_laneq_u16(__p0_543, __p1_543, __p2_543, __p3_543) __extension__ ({ \ | | |
| 55500 | uint16x4_t __ret_543; \ | | |
| 55501 | uint16x4_t __s0_543 = __p0_543; \ | | |
| 55502 | uint16x4_t __s1_543 = __p1_543; \ | | |
| 55503 | uint16x8_t __s2_543 = __p2_543; \ | | |
| 55504 | __ret_543 = __s0_543 + __s1_543 * splat_laneq_u16(__s2_543, __p3_543); \ | | |
| 55505 | __ret_543; \ | | |
| 55506 | }) | | |
| 55507 | #else | | |
| 55508 | #define vmla_laneq_u16(__p0_544, __p1_544, __p2_544, __p3_544) __extension__ ({ \ | | |
| 55509 | uint16x4_t __ret_544; \ | | |
| 55510 | uint16x4_t __s0_544 = __p0_544; \ | | |
| 55511 | uint16x4_t __s1_544 = __p1_544; \ | | |
| 55512 | uint16x8_t __s2_544 = __p2_544; \ | | |
| 55513 | uint16x4_t __rev0_544; __rev0_544 = __builtin_shufflevector(__s0_544, __s0_544, 3, 2, 1, 0); \ | | |
| 55514 | uint16x4_t __rev1_544; __rev1_544 = __builtin_shufflevector(__s1_544, __s1_544, 3, 2, 1, 0); \ | | |
| 55515 | uint16x8_t __rev2_544; __rev2_544 = __builtin_shufflevector(__s2_544, __s2_544, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55516 | __ret_544 = __rev0_544 + __rev1_544 * __noswap_splat_laneq_u16(__rev2_544, __p3_544); \ | | |
| 55517 | __ret_544 = __builtin_shufflevector(__ret_544, __ret_544, 3, 2, 1, 0); \ | | |
| 55518 | __ret_544; \ | | |
| 55519 | }) | | |
| 55520 | #endif | | |
| 55521 | | | |
| 55522 | #ifdef __LITTLE_ENDIAN__ | | |
| 55523 | #define vmla_laneq_f32(__p0_545, __p1_545, __p2_545, __p3_545) __extension__ ({ \ | | |
| 55524 | float32x2_t __ret_545; \ | | |
| 55525 | float32x2_t __s0_545 = __p0_545; \ | | |
| 55526 | float32x2_t __s1_545 = __p1_545; \ | | |
| 55527 | float32x4_t __s2_545 = __p2_545; \ | | |
| 55528 | __ret_545 = __s0_545 + __s1_545 * splat_laneq_f32(__s2_545, __p3_545); \ | | |
| 55529 | __ret_545; \ | | |
| 55530 | }) | | |
| 55531 | #else | | |
| 55532 | #define vmla_laneq_f32(__p0_546, __p1_546, __p2_546, __p3_546) __extension__ ({ \ | | |
| 55533 | float32x2_t __ret_546; \ | | |
| 55534 | float32x2_t __s0_546 = __p0_546; \ | | |
| 55535 | float32x2_t __s1_546 = __p1_546; \ | | |
| 55536 | float32x4_t __s2_546 = __p2_546; \ | | |
| 55537 | float32x2_t __rev0_546; __rev0_546 = __builtin_shufflevector(__s0_546, __s0_546, 1, 0); \ | | |
| 55538 | float32x2_t __rev1_546; __rev1_546 = __builtin_shufflevector(__s1_546, __s1_546, 1, 0); \ | | |
| 55539 | float32x4_t __rev2_546; __rev2_546 = __builtin_shufflevector(__s2_546, __s2_546, 3, 2, 1, 0); \ | | |
| 55540 | __ret_546 = __rev0_546 + __rev1_546 * __noswap_splat_laneq_f32(__rev2_546, __p3_546); \ | | |
| 55541 | __ret_546 = __builtin_shufflevector(__ret_546, __ret_546, 1, 0); \ | | |
| 55542 | __ret_546; \ | | |
| 55543 | }) | | |
| 55544 | #endif | | |
| 55545 | | | |
| 55546 | #ifdef __LITTLE_ENDIAN__ | | |
| 55547 | #define vmla_laneq_s32(__p0_547, __p1_547, __p2_547, __p3_547) __extension__ ({ \ | | |
| 55548 | int32x2_t __ret_547; \ | | |
| 55549 | int32x2_t __s0_547 = __p0_547; \ | | |
| 55550 | int32x2_t __s1_547 = __p1_547; \ | | |
| 55551 | int32x4_t __s2_547 = __p2_547; \ | | |
| 55552 | __ret_547 = __s0_547 + __s1_547 * splat_laneq_s32(__s2_547, __p3_547); \ | | |
| 55553 | __ret_547; \ | | |
| 55554 | }) | | |
| 55555 | #else | | |
| 55556 | #define vmla_laneq_s32(__p0_548, __p1_548, __p2_548, __p3_548) __extension__ ({ \ | | |
| 55557 | int32x2_t __ret_548; \ | | |
| 55558 | int32x2_t __s0_548 = __p0_548; \ | | |
| 55559 | int32x2_t __s1_548 = __p1_548; \ | | |
| 55560 | int32x4_t __s2_548 = __p2_548; \ | | |
| 55561 | int32x2_t __rev0_548; __rev0_548 = __builtin_shufflevector(__s0_548, __s0_548, 1, 0); \ | | |
| 55562 | int32x2_t __rev1_548; __rev1_548 = __builtin_shufflevector(__s1_548, __s1_548, 1, 0); \ | | |
| 55563 | int32x4_t __rev2_548; __rev2_548 = __builtin_shufflevector(__s2_548, __s2_548, 3, 2, 1, 0); \ | | |
| 55564 | __ret_548 = __rev0_548 + __rev1_548 * __noswap_splat_laneq_s32(__rev2_548, __p3_548); \ | | |
| 55565 | __ret_548 = __builtin_shufflevector(__ret_548, __ret_548, 1, 0); \ | | |
| 55566 | __ret_548; \ | | |
| 55567 | }) | | |
| 55568 | #endif | | |
| 55569 | | | |
| 55570 | #ifdef __LITTLE_ENDIAN__ | | |
| 55571 | #define vmla_laneq_s16(__p0_549, __p1_549, __p2_549, __p3_549) __extension__ ({ \ | | |
| 55572 | int16x4_t __ret_549; \ | | |
| 55573 | int16x4_t __s0_549 = __p0_549; \ | | |
| 55574 | int16x4_t __s1_549 = __p1_549; \ | | |
| 55575 | int16x8_t __s2_549 = __p2_549; \ | | |
| 55576 | __ret_549 = __s0_549 + __s1_549 * splat_laneq_s16(__s2_549, __p3_549); \ | | |
| 55577 | __ret_549; \ | | |
| 55578 | }) | | |
| 55579 | #else | | |
| 55580 | #define vmla_laneq_s16(__p0_550, __p1_550, __p2_550, __p3_550) __extension__ ({ \ | | |
| 55581 | int16x4_t __ret_550; \ | | |
| 55582 | int16x4_t __s0_550 = __p0_550; \ | | |
| 55583 | int16x4_t __s1_550 = __p1_550; \ | | |
| 55584 | int16x8_t __s2_550 = __p2_550; \ | | |
| 55585 | int16x4_t __rev0_550; __rev0_550 = __builtin_shufflevector(__s0_550, __s0_550, 3, 2, 1, 0); \ | | |
| 55586 | int16x4_t __rev1_550; __rev1_550 = __builtin_shufflevector(__s1_550, __s1_550, 3, 2, 1, 0); \ | | |
| 55587 | int16x8_t __rev2_550; __rev2_550 = __builtin_shufflevector(__s2_550, __s2_550, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55588 | __ret_550 = __rev0_550 + __rev1_550 * __noswap_splat_laneq_s16(__rev2_550, __p3_550); \ | | |
| 55589 | __ret_550 = __builtin_shufflevector(__ret_550, __ret_550, 3, 2, 1, 0); \ | | |
| 55590 | __ret_550; \ | | |
| 55591 | }) | | |
| 55592 | #endif | | |
| 55593 | | | |
| 55594 | #ifdef __LITTLE_ENDIAN__ | | |
| 55595 | #define vmlal_high_lane_u32(__p0_551, __p1_551, __p2_551, __p3_551) __extension__ ({ \ | | |
| 55596 | uint64x2_t __ret_551; \ | | |
| 55597 | uint64x2_t __s0_551 = __p0_551; \ | | |
| 55598 | uint32x4_t __s1_551 = __p1_551; \ | | |
| 55599 | uint32x2_t __s2_551 = __p2_551; \ | | |
| 55600 | __ret_551 = __s0_551 + vmull_u32(vget_high_u32(__s1_551), splat_lane_u32(__s2_551, __p3_551)); \ | | |
| 55601 | __ret_551; \ | | |
| 55602 | }) | | |
| 55603 | #else | | |
| 55604 | #define vmlal_high_lane_u32(__p0_552, __p1_552, __p2_552, __p3_552) __extension__ ({ \ | | |
| 55605 | uint64x2_t __ret_552; \ | | |
| 55606 | uint64x2_t __s0_552 = __p0_552; \ | | |
| 55607 | uint32x4_t __s1_552 = __p1_552; \ | | |
| 55608 | uint32x2_t __s2_552 = __p2_552; \ | | |
| 55609 | uint64x2_t __rev0_552; __rev0_552 = __builtin_shufflevector(__s0_552, __s0_552, 1, 0); \ | | |
| 55610 | uint32x4_t __rev1_552; __rev1_552 = __builtin_shufflevector(__s1_552, __s1_552, 3, 2, 1, 0); \ | | |
| 55611 | uint32x2_t __rev2_552; __rev2_552 = __builtin_shufflevector(__s2_552, __s2_552, 1, 0); \ | | |
| 55612 | __ret_552 = __rev0_552 + __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_552), __noswap_splat_lane_u32(__rev2_552, __p3_552)); \ | | |
| 55613 | __ret_552 = __builtin_shufflevector(__ret_552, __ret_552, 1, 0); \ | | |
| 55614 | __ret_552; \ | | |
| 55615 | }) | | |
| 55616 | #endif | | |
| 55617 | | | |
| 55618 | #ifdef __LITTLE_ENDIAN__ | | |
| 55619 | #define vmlal_high_lane_u16(__p0_553, __p1_553, __p2_553, __p3_553) __extension__ ({ \ | | |
| 55620 | uint32x4_t __ret_553; \ | | |
| 55621 | uint32x4_t __s0_553 = __p0_553; \ | | |
| 55622 | uint16x8_t __s1_553 = __p1_553; \ | | |
| 55623 | uint16x4_t __s2_553 = __p2_553; \ | | |
| 55624 | __ret_553 = __s0_553 + vmull_u16(vget_high_u16(__s1_553), splat_lane_u16(__s2_553, __p3_553)); \ | | |
| 55625 | __ret_553; \ | | |
| 55626 | }) | | |
| 55627 | #else | | |
| 55628 | #define vmlal_high_lane_u16(__p0_554, __p1_554, __p2_554, __p3_554) __extension__ ({ \ | | |
| 55629 | uint32x4_t __ret_554; \ | | |
| 55630 | uint32x4_t __s0_554 = __p0_554; \ | | |
| 55631 | uint16x8_t __s1_554 = __p1_554; \ | | |
| 55632 | uint16x4_t __s2_554 = __p2_554; \ | | |
| 55633 | uint32x4_t __rev0_554; __rev0_554 = __builtin_shufflevector(__s0_554, __s0_554, 3, 2, 1, 0); \ | | |
| 55634 | uint16x8_t __rev1_554; __rev1_554 = __builtin_shufflevector(__s1_554, __s1_554, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55635 | uint16x4_t __rev2_554; __rev2_554 = __builtin_shufflevector(__s2_554, __s2_554, 3, 2, 1, 0); \ | | |
| 55636 | __ret_554 = __rev0_554 + __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_554), __noswap_splat_lane_u16(__rev2_554, __p3_554)); \ | | |
| 55637 | __ret_554 = __builtin_shufflevector(__ret_554, __ret_554, 3, 2, 1, 0); \ | | |
| 55638 | __ret_554; \ | | |
| 55639 | }) | | |
| 55640 | #endif | | |
| 55641 | | | |
| 55642 | #ifdef __LITTLE_ENDIAN__ | | |
| 55643 | #define vmlal_high_lane_s32(__p0_555, __p1_555, __p2_555, __p3_555) __extension__ ({ \ | | |
| 55644 | int64x2_t __ret_555; \ | | |
| 55645 | int64x2_t __s0_555 = __p0_555; \ | | |
| 55646 | int32x4_t __s1_555 = __p1_555; \ | | |
| 55647 | int32x2_t __s2_555 = __p2_555; \ | | |
| 55648 | __ret_555 = __s0_555 + vmull_s32(vget_high_s32(__s1_555), splat_lane_s32(__s2_555, __p3_555)); \ | | |
| 55649 | __ret_555; \ | | |
| 55650 | }) | | |
| 55651 | #else | | |
| 55652 | #define vmlal_high_lane_s32(__p0_556, __p1_556, __p2_556, __p3_556) __extension__ ({ \ | | |
| 55653 | int64x2_t __ret_556; \ | | |
| 55654 | int64x2_t __s0_556 = __p0_556; \ | | |
| 55655 | int32x4_t __s1_556 = __p1_556; \ | | |
| 55656 | int32x2_t __s2_556 = __p2_556; \ | | |
| 55657 | int64x2_t __rev0_556; __rev0_556 = __builtin_shufflevector(__s0_556, __s0_556, 1, 0); \ | | |
| 55658 | int32x4_t __rev1_556; __rev1_556 = __builtin_shufflevector(__s1_556, __s1_556, 3, 2, 1, 0); \ | | |
| 55659 | int32x2_t __rev2_556; __rev2_556 = __builtin_shufflevector(__s2_556, __s2_556, 1, 0); \ | | |
| 55660 | __ret_556 = __rev0_556 + __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_556), __noswap_splat_lane_s32(__rev2_556, __p3_556)); \ | | |
| 55661 | __ret_556 = __builtin_shufflevector(__ret_556, __ret_556, 1, 0); \ | | |
| 55662 | __ret_556; \ | | |
| 55663 | }) | | |
| 55664 | #endif | | |
| 55665 | | | |
| 55666 | #ifdef __LITTLE_ENDIAN__ | | |
| 55667 | #define vmlal_high_lane_s16(__p0_557, __p1_557, __p2_557, __p3_557) __extension__ ({ \ | | |
| 55668 | int32x4_t __ret_557; \ | | |
| 55669 | int32x4_t __s0_557 = __p0_557; \ | | |
| 55670 | int16x8_t __s1_557 = __p1_557; \ | | |
| 55671 | int16x4_t __s2_557 = __p2_557; \ | | |
| 55672 | __ret_557 = __s0_557 + vmull_s16(vget_high_s16(__s1_557), splat_lane_s16(__s2_557, __p3_557)); \ | | |
| 55673 | __ret_557; \ | | |
| 55674 | }) | | |
| 55675 | #else | | |
| 55676 | #define vmlal_high_lane_s16(__p0_558, __p1_558, __p2_558, __p3_558) __extension__ ({ \ | | |
| 55677 | int32x4_t __ret_558; \ | | |
| 55678 | int32x4_t __s0_558 = __p0_558; \ | | |
| 55679 | int16x8_t __s1_558 = __p1_558; \ | | |
| 55680 | int16x4_t __s2_558 = __p2_558; \ | | |
| 55681 | int32x4_t __rev0_558; __rev0_558 = __builtin_shufflevector(__s0_558, __s0_558, 3, 2, 1, 0); \ | | |
| 55682 | int16x8_t __rev1_558; __rev1_558 = __builtin_shufflevector(__s1_558, __s1_558, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55683 | int16x4_t __rev2_558; __rev2_558 = __builtin_shufflevector(__s2_558, __s2_558, 3, 2, 1, 0); \ | | |
| 55684 | __ret_558 = __rev0_558 + __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_558), __noswap_splat_lane_s16(__rev2_558, __p3_558)); \ | | |
| 55685 | __ret_558 = __builtin_shufflevector(__ret_558, __ret_558, 3, 2, 1, 0); \ | | |
| 55686 | __ret_558; \ | | |
| 55687 | }) | | |
| 55688 | #endif | | |
| 55689 | | | |
| 55690 | #ifdef __LITTLE_ENDIAN__ | | |
| 55691 | #define vmlal_high_laneq_u32(__p0_559, __p1_559, __p2_559, __p3_559) __extension__ ({ \ | | |
| 55692 | uint64x2_t __ret_559; \ | | |
| 55693 | uint64x2_t __s0_559 = __p0_559; \ | | |
| 55694 | uint32x4_t __s1_559 = __p1_559; \ | | |
| 55695 | uint32x4_t __s2_559 = __p2_559; \ | | |
| 55696 | __ret_559 = __s0_559 + vmull_u32(vget_high_u32(__s1_559), splat_laneq_u32(__s2_559, __p3_559)); \ | | |
| 55697 | __ret_559; \ | | |
| 55698 | }) | | |
| 55699 | #else | | |
| 55700 | #define vmlal_high_laneq_u32(__p0_560, __p1_560, __p2_560, __p3_560) __extension__ ({ \ | | |
| 55701 | uint64x2_t __ret_560; \ | | |
| 55702 | uint64x2_t __s0_560 = __p0_560; \ | | |
| 55703 | uint32x4_t __s1_560 = __p1_560; \ | | |
| 55704 | uint32x4_t __s2_560 = __p2_560; \ | | |
| 55705 | uint64x2_t __rev0_560; __rev0_560 = __builtin_shufflevector(__s0_560, __s0_560, 1, 0); \ | | |
| 55706 | uint32x4_t __rev1_560; __rev1_560 = __builtin_shufflevector(__s1_560, __s1_560, 3, 2, 1, 0); \ | | |
| 55707 | uint32x4_t __rev2_560; __rev2_560 = __builtin_shufflevector(__s2_560, __s2_560, 3, 2, 1, 0); \ | | |
| 55708 | __ret_560 = __rev0_560 + __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_560), __noswap_splat_laneq_u32(__rev2_560, __p3_560)); \ | | |
| 55709 | __ret_560 = __builtin_shufflevector(__ret_560, __ret_560, 1, 0); \ | | |
| 55710 | __ret_560; \ | | |
| 55711 | }) | | |
| 55712 | #endif | | |
| 55713 | | | |
| 55714 | #ifdef __LITTLE_ENDIAN__ | | |
| 55715 | #define vmlal_high_laneq_u16(__p0_561, __p1_561, __p2_561, __p3_561) __extension__ ({ \ | | |
| 55716 | uint32x4_t __ret_561; \ | | |
| 55717 | uint32x4_t __s0_561 = __p0_561; \ | | |
| 55718 | uint16x8_t __s1_561 = __p1_561; \ | | |
| 55719 | uint16x8_t __s2_561 = __p2_561; \ | | |
| 55720 | __ret_561 = __s0_561 + vmull_u16(vget_high_u16(__s1_561), splat_laneq_u16(__s2_561, __p3_561)); \ | | |
| 55721 | __ret_561; \ | | |
| 55722 | }) | | |
| 55723 | #else | | |
| 55724 | #define vmlal_high_laneq_u16(__p0_562, __p1_562, __p2_562, __p3_562) __extension__ ({ \ | | |
| 55725 | uint32x4_t __ret_562; \ | | |
| 55726 | uint32x4_t __s0_562 = __p0_562; \ | | |
| 55727 | uint16x8_t __s1_562 = __p1_562; \ | | |
| 55728 | uint16x8_t __s2_562 = __p2_562; \ | | |
| 55729 | uint32x4_t __rev0_562; __rev0_562 = __builtin_shufflevector(__s0_562, __s0_562, 3, 2, 1, 0); \ | | |
| 55730 | uint16x8_t __rev1_562; __rev1_562 = __builtin_shufflevector(__s1_562, __s1_562, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55731 | uint16x8_t __rev2_562; __rev2_562 = __builtin_shufflevector(__s2_562, __s2_562, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55732 | __ret_562 = __rev0_562 + __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_562), __noswap_splat_laneq_u16(__rev2_562, __p3_562)); \ | | |
| 55733 | __ret_562 = __builtin_shufflevector(__ret_562, __ret_562, 3, 2, 1, 0); \ | | |
| 55734 | __ret_562; \ | | |
| 55735 | }) | | |
| 55736 | #endif | | |
| 55737 | | | |
| 55738 | #ifdef __LITTLE_ENDIAN__ | | |
| 55739 | #define vmlal_high_laneq_s32(__p0_563, __p1_563, __p2_563, __p3_563) __extension__ ({ \ | | |
| 55740 | int64x2_t __ret_563; \ | | |
| 55741 | int64x2_t __s0_563 = __p0_563; \ | | |
| 55742 | int32x4_t __s1_563 = __p1_563; \ | | |
| 55743 | int32x4_t __s2_563 = __p2_563; \ | | |
| 55744 | __ret_563 = __s0_563 + vmull_s32(vget_high_s32(__s1_563), splat_laneq_s32(__s2_563, __p3_563)); \ | | |
| 55745 | __ret_563; \ | | |
| 55746 | }) | | |
| 55747 | #else | | |
| 55748 | #define vmlal_high_laneq_s32(__p0_564, __p1_564, __p2_564, __p3_564) __extension__ ({ \ | | |
| 55749 | int64x2_t __ret_564; \ | | |
| 55750 | int64x2_t __s0_564 = __p0_564; \ | | |
| 55751 | int32x4_t __s1_564 = __p1_564; \ | | |
| 55752 | int32x4_t __s2_564 = __p2_564; \ | | |
| 55753 | int64x2_t __rev0_564; __rev0_564 = __builtin_shufflevector(__s0_564, __s0_564, 1, 0); \ | | |
| 55754 | int32x4_t __rev1_564; __rev1_564 = __builtin_shufflevector(__s1_564, __s1_564, 3, 2, 1, 0); \ | | |
| 55755 | int32x4_t __rev2_564; __rev2_564 = __builtin_shufflevector(__s2_564, __s2_564, 3, 2, 1, 0); \ | | |
| 55756 | __ret_564 = __rev0_564 + __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_564), __noswap_splat_laneq_s32(__rev2_564, __p3_564)); \ | | |
| 55757 | __ret_564 = __builtin_shufflevector(__ret_564, __ret_564, 1, 0); \ | | |
| 55758 | __ret_564; \ | | |
| 55759 | }) | | |
| 55760 | #endif | | |
| 55761 | | | |
| 55762 | #ifdef __LITTLE_ENDIAN__ | | |
| 55763 | #define vmlal_high_laneq_s16(__p0_565, __p1_565, __p2_565, __p3_565) __extension__ ({ \ | | |
| 55764 | int32x4_t __ret_565; \ | | |
| 55765 | int32x4_t __s0_565 = __p0_565; \ | | |
| 55766 | int16x8_t __s1_565 = __p1_565; \ | | |
| 55767 | int16x8_t __s2_565 = __p2_565; \ | | |
| 55768 | __ret_565 = __s0_565 + vmull_s16(vget_high_s16(__s1_565), splat_laneq_s16(__s2_565, __p3_565)); \ | | |
| 55769 | __ret_565; \ | | |
| 55770 | }) | | |
| 55771 | #else | | |
| 55772 | #define vmlal_high_laneq_s16(__p0_566, __p1_566, __p2_566, __p3_566) __extension__ ({ \ | | |
| 55773 | int32x4_t __ret_566; \ | | |
| 55774 | int32x4_t __s0_566 = __p0_566; \ | | |
| 55775 | int16x8_t __s1_566 = __p1_566; \ | | |
| 55776 | int16x8_t __s2_566 = __p2_566; \ | | |
| 55777 | int32x4_t __rev0_566; __rev0_566 = __builtin_shufflevector(__s0_566, __s0_566, 3, 2, 1, 0); \ | | |
| 55778 | int16x8_t __rev1_566; __rev1_566 = __builtin_shufflevector(__s1_566, __s1_566, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55779 | int16x8_t __rev2_566; __rev2_566 = __builtin_shufflevector(__s2_566, __s2_566, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55780 | __ret_566 = __rev0_566 + __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_566), __noswap_splat_laneq_s16(__rev2_566, __p3_566)); \ | | |
| 55781 | __ret_566 = __builtin_shufflevector(__ret_566, __ret_566, 3, 2, 1, 0); \ | | |
| 55782 | __ret_566; \ | | |
| 55783 | }) | | |
| 55784 | #endif | | |
| 55785 | | | |
| 55786 | #ifdef __LITTLE_ENDIAN__ | | |
| 55787 | #define vmlal_laneq_u32(__p0_567, __p1_567, __p2_567, __p3_567) __extension__ ({ \ | | |
| 55788 | uint64x2_t __ret_567; \ | | |
| 55789 | uint64x2_t __s0_567 = __p0_567; \ | | |
| 55790 | uint32x2_t __s1_567 = __p1_567; \ | | |
| 55791 | uint32x4_t __s2_567 = __p2_567; \ | | |
| 55792 | __ret_567 = __s0_567 + vmull_u32(__s1_567, splat_laneq_u32(__s2_567, __p3_567)); \ | | |
| 55793 | __ret_567; \ | | |
| 55794 | }) | | |
| 55795 | #else | | |
| 55796 | #define vmlal_laneq_u32(__p0_568, __p1_568, __p2_568, __p3_568) __extension__ ({ \ | | |
| 55797 | uint64x2_t __ret_568; \ | | |
| 55798 | uint64x2_t __s0_568 = __p0_568; \ | | |
| 55799 | uint32x2_t __s1_568 = __p1_568; \ | | |
| 55800 | uint32x4_t __s2_568 = __p2_568; \ | | |
| 55801 | uint64x2_t __rev0_568; __rev0_568 = __builtin_shufflevector(__s0_568, __s0_568, 1, 0); \ | | |
| 55802 | uint32x2_t __rev1_568; __rev1_568 = __builtin_shufflevector(__s1_568, __s1_568, 1, 0); \ | | |
| 55803 | uint32x4_t __rev2_568; __rev2_568 = __builtin_shufflevector(__s2_568, __s2_568, 3, 2, 1, 0); \ | | |
| 55804 | __ret_568 = __rev0_568 + __noswap_vmull_u32(__rev1_568, __noswap_splat_laneq_u32(__rev2_568, __p3_568)); \ | | |
| 55805 | __ret_568 = __builtin_shufflevector(__ret_568, __ret_568, 1, 0); \ | | |
| 55806 | __ret_568; \ | | |
| 55807 | }) | | |
| 55808 | #endif | | |
| 55809 | | | |
| 55810 | #ifdef __LITTLE_ENDIAN__ | | |
| 55811 | #define vmlal_laneq_u16(__p0_569, __p1_569, __p2_569, __p3_569) __extension__ ({ \ | | |
| 55812 | uint32x4_t __ret_569; \ | | |
| 55813 | uint32x4_t __s0_569 = __p0_569; \ | | |
| 55814 | uint16x4_t __s1_569 = __p1_569; \ | | |
| 55815 | uint16x8_t __s2_569 = __p2_569; \ | | |
| 55816 | __ret_569 = __s0_569 + vmull_u16(__s1_569, splat_laneq_u16(__s2_569, __p3_569)); \ | | |
| 55817 | __ret_569; \ | | |
| 55818 | }) | | |
| 55819 | #else | | |
| 55820 | #define vmlal_laneq_u16(__p0_570, __p1_570, __p2_570, __p3_570) __extension__ ({ \ | | |
| 55821 | uint32x4_t __ret_570; \ | | |
| 55822 | uint32x4_t __s0_570 = __p0_570; \ | | |
| 55823 | uint16x4_t __s1_570 = __p1_570; \ | | |
| 55824 | uint16x8_t __s2_570 = __p2_570; \ | | |
| 55825 | uint32x4_t __rev0_570; __rev0_570 = __builtin_shufflevector(__s0_570, __s0_570, 3, 2, 1, 0); \ | | |
| 55826 | uint16x4_t __rev1_570; __rev1_570 = __builtin_shufflevector(__s1_570, __s1_570, 3, 2, 1, 0); \ | | |
| 55827 | uint16x8_t __rev2_570; __rev2_570 = __builtin_shufflevector(__s2_570, __s2_570, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55828 | __ret_570 = __rev0_570 + __noswap_vmull_u16(__rev1_570, __noswap_splat_laneq_u16(__rev2_570, __p3_570)); \ | | |
| 55829 | __ret_570 = __builtin_shufflevector(__ret_570, __ret_570, 3, 2, 1, 0); \ | | |
| 55830 | __ret_570; \ | | |
| 55831 | }) | | |
| 55832 | #endif | | |
| 55833 | | | |
| 55834 | #ifdef __LITTLE_ENDIAN__ | | |
| 55835 | #define vmlal_laneq_s32(__p0_571, __p1_571, __p2_571, __p3_571) __extension__ ({ \ | | |
| 55836 | int64x2_t __ret_571; \ | | |
| 55837 | int64x2_t __s0_571 = __p0_571; \ | | |
| 55838 | int32x2_t __s1_571 = __p1_571; \ | | |
| 55839 | int32x4_t __s2_571 = __p2_571; \ | | |
| 55840 | __ret_571 = __s0_571 + vmull_s32(__s1_571, splat_laneq_s32(__s2_571, __p3_571)); \ | | |
| 55841 | __ret_571; \ | | |
| 55842 | }) | | |
| 55843 | #else | | |
| 55844 | #define vmlal_laneq_s32(__p0_572, __p1_572, __p2_572, __p3_572) __extension__ ({ \ | | |
| 55845 | int64x2_t __ret_572; \ | | |
| 55846 | int64x2_t __s0_572 = __p0_572; \ | | |
| 55847 | int32x2_t __s1_572 = __p1_572; \ | | |
| 55848 | int32x4_t __s2_572 = __p2_572; \ | | |
| 55849 | int64x2_t __rev0_572; __rev0_572 = __builtin_shufflevector(__s0_572, __s0_572, 1, 0); \ | | |
| 55850 | int32x2_t __rev1_572; __rev1_572 = __builtin_shufflevector(__s1_572, __s1_572, 1, 0); \ | | |
| 55851 | int32x4_t __rev2_572; __rev2_572 = __builtin_shufflevector(__s2_572, __s2_572, 3, 2, 1, 0); \ | | |
| 55852 | __ret_572 = __rev0_572 + __noswap_vmull_s32(__rev1_572, __noswap_splat_laneq_s32(__rev2_572, __p3_572)); \ | | |
| 55853 | __ret_572 = __builtin_shufflevector(__ret_572, __ret_572, 1, 0); \ | | |
| 55854 | __ret_572; \ | | |
| 55855 | }) | | |
| 55856 | #endif | | |
| 55857 | | | |
| 55858 | #ifdef __LITTLE_ENDIAN__ | | |
| 55859 | #define vmlal_laneq_s16(__p0_573, __p1_573, __p2_573, __p3_573) __extension__ ({ \ | | |
| 55860 | int32x4_t __ret_573; \ | | |
| 55861 | int32x4_t __s0_573 = __p0_573; \ | | |
| 55862 | int16x4_t __s1_573 = __p1_573; \ | | |
| 55863 | int16x8_t __s2_573 = __p2_573; \ | | |
| 55864 | __ret_573 = __s0_573 + vmull_s16(__s1_573, splat_laneq_s16(__s2_573, __p3_573)); \ | | |
| 55865 | __ret_573; \ | | |
| 55866 | }) | | |
| 55867 | #else | | |
| 55868 | #define vmlal_laneq_s16(__p0_574, __p1_574, __p2_574, __p3_574) __extension__ ({ \ | | |
| 55869 | int32x4_t __ret_574; \ | | |
| 55870 | int32x4_t __s0_574 = __p0_574; \ | | |
| 55871 | int16x4_t __s1_574 = __p1_574; \ | | |
| 55872 | int16x8_t __s2_574 = __p2_574; \ | | |
| 55873 | int32x4_t __rev0_574; __rev0_574 = __builtin_shufflevector(__s0_574, __s0_574, 3, 2, 1, 0); \ | | |
| 55874 | int16x4_t __rev1_574; __rev1_574 = __builtin_shufflevector(__s1_574, __s1_574, 3, 2, 1, 0); \ | | |
| 55875 | int16x8_t __rev2_574; __rev2_574 = __builtin_shufflevector(__s2_574, __s2_574, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55876 | __ret_574 = __rev0_574 + __noswap_vmull_s16(__rev1_574, __noswap_splat_laneq_s16(__rev2_574, __p3_574)); \ | | |
| 55877 | __ret_574 = __builtin_shufflevector(__ret_574, __ret_574, 3, 2, 1, 0); \ | | |
| 55878 | __ret_574; \ | | |
| 55879 | }) | | |
| 55880 | #endif | | |
| 55881 | | | |
| 55882 | #ifdef __LITTLE_ENDIAN__ | | |
| 55883 | __ai float64x2_t vmlsq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | | |
| 55884 | float64x2_t __ret; | | |
| 55885 | __ret = __p0 - __p1 * __p2; | | |
| 55886 | return __ret; | 57270 | return __ret; |
| 55887 | } | 57271 | } |
| 55888 | #else | 57272 | __ai float16x8_t vreinterpretq_f16_p64(poly64x2_t __p0) { |
| 55889 | __ai float64x2_t vmlsq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 57273 | float16x8_t __ret; |
| 55890 | float64x2_t __ret; | 57274 | __ret = (float16x8_t)(__p0); |
| 55891 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 55892 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 55893 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | | |
| 55894 | __ret = __rev0 - __rev1 * __rev2; | | |
| 55895 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 55896 | return __ret; | 57275 | return __ret; |
| 55897 | } | 57276 | } |
| 55898 | #endif | 57277 | __ai float16x8_t vreinterpretq_f16_p16(poly16x8_t __p0) { |
| 55899 | | 57278 | float16x8_t __ret; |
| 55900 | __ai float64x1_t vmls_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | 57279 | __ret = (float16x8_t)(__p0); |
| 55901 | float64x1_t __ret; | | |
| 55902 | __ret = __p0 - __p1 * __p2; | | |
| 55903 | return __ret; | 57280 | return __ret; |
| 55904 | } | 57281 | } |
| 55905 | #ifdef __LITTLE_ENDIAN__ | 57282 | __ai float16x8_t vreinterpretq_f16_u8(uint8x16_t __p0) { |
| 55906 | #define vmlsq_laneq_u32(__p0_575, __p1_575, __p2_575, __p3_575) __extension__ ({ \ | 57283 | float16x8_t __ret; |
| 55907 | uint32x4_t __ret_575; \ | 57284 | __ret = (float16x8_t)(__p0); |
| 55908 | uint32x4_t __s0_575 = __p0_575; \ | | |
| 55909 | uint32x4_t __s1_575 = __p1_575; \ | | |
| 55910 | uint32x4_t __s2_575 = __p2_575; \ | | |
| 55911 | __ret_575 = __s0_575 - __s1_575 * splatq_laneq_u32(__s2_575, __p3_575); \ | | |
| 55912 | __ret_575; \ | | |
| 55913 | }) | | |
| 55914 | #else | | |
| 55915 | #define vmlsq_laneq_u32(__p0_576, __p1_576, __p2_576, __p3_576) __extension__ ({ \ | | |
| 55916 | uint32x4_t __ret_576; \ | | |
| 55917 | uint32x4_t __s0_576 = __p0_576; \ | | |
| 55918 | uint32x4_t __s1_576 = __p1_576; \ | | |
| 55919 | uint32x4_t __s2_576 = __p2_576; \ | | |
| 55920 | uint32x4_t __rev0_576; __rev0_576 = __builtin_shufflevector(__s0_576, __s0_576, 3, 2, 1, 0); \ | | |
| 55921 | uint32x4_t __rev1_576; __rev1_576 = __builtin_shufflevector(__s1_576, __s1_576, 3, 2, 1, 0); \ | | |
| 55922 | uint32x4_t __rev2_576; __rev2_576 = __builtin_shufflevector(__s2_576, __s2_576, 3, 2, 1, 0); \ | | |
| 55923 | __ret_576 = __rev0_576 - __rev1_576 * __noswap_splatq_laneq_u32(__rev2_576, __p3_576); \ | | |
| 55924 | __ret_576 = __builtin_shufflevector(__ret_576, __ret_576, 3, 2, 1, 0); \ | | |
| 55925 | __ret_576; \ | | |
| 55926 | }) | | |
| 55927 | #endif | | |
| 55928 | | | |
| 55929 | #ifdef __LITTLE_ENDIAN__ | | |
| 55930 | #define vmlsq_laneq_u16(__p0_577, __p1_577, __p2_577, __p3_577) __extension__ ({ \ | | |
| 55931 | uint16x8_t __ret_577; \ | | |
| 55932 | uint16x8_t __s0_577 = __p0_577; \ | | |
| 55933 | uint16x8_t __s1_577 = __p1_577; \ | | |
| 55934 | uint16x8_t __s2_577 = __p2_577; \ | | |
| 55935 | __ret_577 = __s0_577 - __s1_577 * splatq_laneq_u16(__s2_577, __p3_577); \ | | |
| 55936 | __ret_577; \ | | |
| 55937 | }) | | |
| 55938 | #else | | |
| 55939 | #define vmlsq_laneq_u16(__p0_578, __p1_578, __p2_578, __p3_578) __extension__ ({ \ | | |
| 55940 | uint16x8_t __ret_578; \ | | |
| 55941 | uint16x8_t __s0_578 = __p0_578; \ | | |
| 55942 | uint16x8_t __s1_578 = __p1_578; \ | | |
| 55943 | uint16x8_t __s2_578 = __p2_578; \ | | |
| 55944 | uint16x8_t __rev0_578; __rev0_578 = __builtin_shufflevector(__s0_578, __s0_578, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55945 | uint16x8_t __rev1_578; __rev1_578 = __builtin_shufflevector(__s1_578, __s1_578, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55946 | uint16x8_t __rev2_578; __rev2_578 = __builtin_shufflevector(__s2_578, __s2_578, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55947 | __ret_578 = __rev0_578 - __rev1_578 * __noswap_splatq_laneq_u16(__rev2_578, __p3_578); \ | | |
| 55948 | __ret_578 = __builtin_shufflevector(__ret_578, __ret_578, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 55949 | __ret_578; \ | | |
| 55950 | }) | | |
| 55951 | #endif | | |
| 55952 | | | |
| 55953 | #ifdef __LITTLE_ENDIAN__ | | |
| 55954 | #define vmlsq_laneq_f32(__p0_579, __p1_579, __p2_579, __p3_579) __extension__ ({ \ | | |
| 55955 | float32x4_t __ret_579; \ | | |
| 55956 | float32x4_t __s0_579 = __p0_579; \ | | |
| 55957 | float32x4_t __s1_579 = __p1_579; \ | | |
| 55958 | float32x4_t __s2_579 = __p2_579; \ | | |
| 55959 | __ret_579 = __s0_579 - __s1_579 * splatq_laneq_f32(__s2_579, __p3_579); \ | | |
| 55960 | __ret_579; \ | | |
| 55961 | }) | | |
| 55962 | #else | | |
| 55963 | #define vmlsq_laneq_f32(__p0_580, __p1_580, __p2_580, __p3_580) __extension__ ({ \ | | |
| 55964 | float32x4_t __ret_580; \ | | |
| 55965 | float32x4_t __s0_580 = __p0_580; \ | | |
| 55966 | float32x4_t __s1_580 = __p1_580; \ | | |
| 55967 | float32x4_t __s2_580 = __p2_580; \ | | |
| 55968 | float32x4_t __rev0_580; __rev0_580 = __builtin_shufflevector(__s0_580, __s0_580, 3, 2, 1, 0); \ | | |
| 55969 | float32x4_t __rev1_580; __rev1_580 = __builtin_shufflevector(__s1_580, __s1_580, 3, 2, 1, 0); \ | | |
| 55970 | float32x4_t __rev2_580; __rev2_580 = __builtin_shufflevector(__s2_580, __s2_580, 3, 2, 1, 0); \ | | |
| 55971 | __ret_580 = __rev0_580 - __rev1_580 * __noswap_splatq_laneq_f32(__rev2_580, __p3_580); \ | | |
| 55972 | __ret_580 = __builtin_shufflevector(__ret_580, __ret_580, 3, 2, 1, 0); \ | | |
| 55973 | __ret_580; \ | | |
| 55974 | }) | | |
| 55975 | #endif | | |
| 55976 | | | |
| 55977 | #ifdef __LITTLE_ENDIAN__ | | |
| 55978 | #define vmlsq_laneq_s32(__p0_581, __p1_581, __p2_581, __p3_581) __extension__ ({ \ | | |
| 55979 | int32x4_t __ret_581; \ | | |
| 55980 | int32x4_t __s0_581 = __p0_581; \ | | |
| 55981 | int32x4_t __s1_581 = __p1_581; \ | | |
| 55982 | int32x4_t __s2_581 = __p2_581; \ | | |
| 55983 | __ret_581 = __s0_581 - __s1_581 * splatq_laneq_s32(__s2_581, __p3_581); \ | | |
| 55984 | __ret_581; \ | | |
| 55985 | }) | | |
| 55986 | #else | | |
| 55987 | #define vmlsq_laneq_s32(__p0_582, __p1_582, __p2_582, __p3_582) __extension__ ({ \ | | |
| 55988 | int32x4_t __ret_582; \ | | |
| 55989 | int32x4_t __s0_582 = __p0_582; \ | | |
| 55990 | int32x4_t __s1_582 = __p1_582; \ | | |
| 55991 | int32x4_t __s2_582 = __p2_582; \ | | |
| 55992 | int32x4_t __rev0_582; __rev0_582 = __builtin_shufflevector(__s0_582, __s0_582, 3, 2, 1, 0); \ | | |
| 55993 | int32x4_t __rev1_582; __rev1_582 = __builtin_shufflevector(__s1_582, __s1_582, 3, 2, 1, 0); \ | | |
| 55994 | int32x4_t __rev2_582; __rev2_582 = __builtin_shufflevector(__s2_582, __s2_582, 3, 2, 1, 0); \ | | |
| 55995 | __ret_582 = __rev0_582 - __rev1_582 * __noswap_splatq_laneq_s32(__rev2_582, __p3_582); \ | | |
| 55996 | __ret_582 = __builtin_shufflevector(__ret_582, __ret_582, 3, 2, 1, 0); \ | | |
| 55997 | __ret_582; \ | | |
| 55998 | }) | | |
| 55999 | #endif | | |
| 56000 | | | |
| 56001 | #ifdef __LITTLE_ENDIAN__ | | |
| 56002 | #define vmlsq_laneq_s16(__p0_583, __p1_583, __p2_583, __p3_583) __extension__ ({ \ | | |
| 56003 | int16x8_t __ret_583; \ | | |
| 56004 | int16x8_t __s0_583 = __p0_583; \ | | |
| 56005 | int16x8_t __s1_583 = __p1_583; \ | | |
| 56006 | int16x8_t __s2_583 = __p2_583; \ | | |
| 56007 | __ret_583 = __s0_583 - __s1_583 * splatq_laneq_s16(__s2_583, __p3_583); \ | | |
| 56008 | __ret_583; \ | | |
| 56009 | }) | | |
| 56010 | #else | | |
| 56011 | #define vmlsq_laneq_s16(__p0_584, __p1_584, __p2_584, __p3_584) __extension__ ({ \ | | |
| 56012 | int16x8_t __ret_584; \ | | |
| 56013 | int16x8_t __s0_584 = __p0_584; \ | | |
| 56014 | int16x8_t __s1_584 = __p1_584; \ | | |
| 56015 | int16x8_t __s2_584 = __p2_584; \ | | |
| 56016 | int16x8_t __rev0_584; __rev0_584 = __builtin_shufflevector(__s0_584, __s0_584, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56017 | int16x8_t __rev1_584; __rev1_584 = __builtin_shufflevector(__s1_584, __s1_584, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56018 | int16x8_t __rev2_584; __rev2_584 = __builtin_shufflevector(__s2_584, __s2_584, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56019 | __ret_584 = __rev0_584 - __rev1_584 * __noswap_splatq_laneq_s16(__rev2_584, __p3_584); \ | | |
| 56020 | __ret_584 = __builtin_shufflevector(__ret_584, __ret_584, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56021 | __ret_584; \ | | |
| 56022 | }) | | |
| 56023 | #endif | | |
| 56024 | | | |
| 56025 | #ifdef __LITTLE_ENDIAN__ | | |
| 56026 | #define vmls_laneq_u32(__p0_585, __p1_585, __p2_585, __p3_585) __extension__ ({ \ | | |
| 56027 | uint32x2_t __ret_585; \ | | |
| 56028 | uint32x2_t __s0_585 = __p0_585; \ | | |
| 56029 | uint32x2_t __s1_585 = __p1_585; \ | | |
| 56030 | uint32x4_t __s2_585 = __p2_585; \ | | |
| 56031 | __ret_585 = __s0_585 - __s1_585 * splat_laneq_u32(__s2_585, __p3_585); \ | | |
| 56032 | __ret_585; \ | | |
| 56033 | }) | | |
| 56034 | #else | | |
| 56035 | #define vmls_laneq_u32(__p0_586, __p1_586, __p2_586, __p3_586) __extension__ ({ \ | | |
| 56036 | uint32x2_t __ret_586; \ | | |
| 56037 | uint32x2_t __s0_586 = __p0_586; \ | | |
| 56038 | uint32x2_t __s1_586 = __p1_586; \ | | |
| 56039 | uint32x4_t __s2_586 = __p2_586; \ | | |
| 56040 | uint32x2_t __rev0_586; __rev0_586 = __builtin_shufflevector(__s0_586, __s0_586, 1, 0); \ | | |
| 56041 | uint32x2_t __rev1_586; __rev1_586 = __builtin_shufflevector(__s1_586, __s1_586, 1, 0); \ | | |
| 56042 | uint32x4_t __rev2_586; __rev2_586 = __builtin_shufflevector(__s2_586, __s2_586, 3, 2, 1, 0); \ | | |
| 56043 | __ret_586 = __rev0_586 - __rev1_586 * __noswap_splat_laneq_u32(__rev2_586, __p3_586); \ | | |
| 56044 | __ret_586 = __builtin_shufflevector(__ret_586, __ret_586, 1, 0); \ | | |
| 56045 | __ret_586; \ | | |
| 56046 | }) | | |
| 56047 | #endif | | |
| 56048 | | | |
| 56049 | #ifdef __LITTLE_ENDIAN__ | | |
| 56050 | #define vmls_laneq_u16(__p0_587, __p1_587, __p2_587, __p3_587) __extension__ ({ \ | | |
| 56051 | uint16x4_t __ret_587; \ | | |
| 56052 | uint16x4_t __s0_587 = __p0_587; \ | | |
| 56053 | uint16x4_t __s1_587 = __p1_587; \ | | |
| 56054 | uint16x8_t __s2_587 = __p2_587; \ | | |
| 56055 | __ret_587 = __s0_587 - __s1_587 * splat_laneq_u16(__s2_587, __p3_587); \ | | |
| 56056 | __ret_587; \ | | |
| 56057 | }) | | |
| 56058 | #else | | |
| 56059 | #define vmls_laneq_u16(__p0_588, __p1_588, __p2_588, __p3_588) __extension__ ({ \ | | |
| 56060 | uint16x4_t __ret_588; \ | | |
| 56061 | uint16x4_t __s0_588 = __p0_588; \ | | |
| 56062 | uint16x4_t __s1_588 = __p1_588; \ | | |
| 56063 | uint16x8_t __s2_588 = __p2_588; \ | | |
| 56064 | uint16x4_t __rev0_588; __rev0_588 = __builtin_shufflevector(__s0_588, __s0_588, 3, 2, 1, 0); \ | | |
| 56065 | uint16x4_t __rev1_588; __rev1_588 = __builtin_shufflevector(__s1_588, __s1_588, 3, 2, 1, 0); \ | | |
| 56066 | uint16x8_t __rev2_588; __rev2_588 = __builtin_shufflevector(__s2_588, __s2_588, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56067 | __ret_588 = __rev0_588 - __rev1_588 * __noswap_splat_laneq_u16(__rev2_588, __p3_588); \ | | |
| 56068 | __ret_588 = __builtin_shufflevector(__ret_588, __ret_588, 3, 2, 1, 0); \ | | |
| 56069 | __ret_588; \ | | |
| 56070 | }) | | |
| 56071 | #endif | | |
| 56072 | | | |
| 56073 | #ifdef __LITTLE_ENDIAN__ | | |
| 56074 | #define vmls_laneq_f32(__p0_589, __p1_589, __p2_589, __p3_589) __extension__ ({ \ | | |
| 56075 | float32x2_t __ret_589; \ | | |
| 56076 | float32x2_t __s0_589 = __p0_589; \ | | |
| 56077 | float32x2_t __s1_589 = __p1_589; \ | | |
| 56078 | float32x4_t __s2_589 = __p2_589; \ | | |
| 56079 | __ret_589 = __s0_589 - __s1_589 * splat_laneq_f32(__s2_589, __p3_589); \ | | |
| 56080 | __ret_589; \ | | |
| 56081 | }) | | |
| 56082 | #else | | |
| 56083 | #define vmls_laneq_f32(__p0_590, __p1_590, __p2_590, __p3_590) __extension__ ({ \ | | |
| 56084 | float32x2_t __ret_590; \ | | |
| 56085 | float32x2_t __s0_590 = __p0_590; \ | | |
| 56086 | float32x2_t __s1_590 = __p1_590; \ | | |
| 56087 | float32x4_t __s2_590 = __p2_590; \ | | |
| 56088 | float32x2_t __rev0_590; __rev0_590 = __builtin_shufflevector(__s0_590, __s0_590, 1, 0); \ | | |
| 56089 | float32x2_t __rev1_590; __rev1_590 = __builtin_shufflevector(__s1_590, __s1_590, 1, 0); \ | | |
| 56090 | float32x4_t __rev2_590; __rev2_590 = __builtin_shufflevector(__s2_590, __s2_590, 3, 2, 1, 0); \ | | |
| 56091 | __ret_590 = __rev0_590 - __rev1_590 * __noswap_splat_laneq_f32(__rev2_590, __p3_590); \ | | |
| 56092 | __ret_590 = __builtin_shufflevector(__ret_590, __ret_590, 1, 0); \ | | |
| 56093 | __ret_590; \ | | |
| 56094 | }) | | |
| 56095 | #endif | | |
| 56096 | | | |
| 56097 | #ifdef __LITTLE_ENDIAN__ | | |
| 56098 | #define vmls_laneq_s32(__p0_591, __p1_591, __p2_591, __p3_591) __extension__ ({ \ | | |
| 56099 | int32x2_t __ret_591; \ | | |
| 56100 | int32x2_t __s0_591 = __p0_591; \ | | |
| 56101 | int32x2_t __s1_591 = __p1_591; \ | | |
| 56102 | int32x4_t __s2_591 = __p2_591; \ | | |
| 56103 | __ret_591 = __s0_591 - __s1_591 * splat_laneq_s32(__s2_591, __p3_591); \ | | |
| 56104 | __ret_591; \ | | |
| 56105 | }) | | |
| 56106 | #else | | |
| 56107 | #define vmls_laneq_s32(__p0_592, __p1_592, __p2_592, __p3_592) __extension__ ({ \ | | |
| 56108 | int32x2_t __ret_592; \ | | |
| 56109 | int32x2_t __s0_592 = __p0_592; \ | | |
| 56110 | int32x2_t __s1_592 = __p1_592; \ | | |
| 56111 | int32x4_t __s2_592 = __p2_592; \ | | |
| 56112 | int32x2_t __rev0_592; __rev0_592 = __builtin_shufflevector(__s0_592, __s0_592, 1, 0); \ | | |
| 56113 | int32x2_t __rev1_592; __rev1_592 = __builtin_shufflevector(__s1_592, __s1_592, 1, 0); \ | | |
| 56114 | int32x4_t __rev2_592; __rev2_592 = __builtin_shufflevector(__s2_592, __s2_592, 3, 2, 1, 0); \ | | |
| 56115 | __ret_592 = __rev0_592 - __rev1_592 * __noswap_splat_laneq_s32(__rev2_592, __p3_592); \ | | |
| 56116 | __ret_592 = __builtin_shufflevector(__ret_592, __ret_592, 1, 0); \ | | |
| 56117 | __ret_592; \ | | |
| 56118 | }) | | |
| 56119 | #endif | | |
| 56120 | | | |
| 56121 | #ifdef __LITTLE_ENDIAN__ | | |
| 56122 | #define vmls_laneq_s16(__p0_593, __p1_593, __p2_593, __p3_593) __extension__ ({ \ | | |
| 56123 | int16x4_t __ret_593; \ | | |
| 56124 | int16x4_t __s0_593 = __p0_593; \ | | |
| 56125 | int16x4_t __s1_593 = __p1_593; \ | | |
| 56126 | int16x8_t __s2_593 = __p2_593; \ | | |
| 56127 | __ret_593 = __s0_593 - __s1_593 * splat_laneq_s16(__s2_593, __p3_593); \ | | |
| 56128 | __ret_593; \ | | |
| 56129 | }) | | |
| 56130 | #else | | |
| 56131 | #define vmls_laneq_s16(__p0_594, __p1_594, __p2_594, __p3_594) __extension__ ({ \ | | |
| 56132 | int16x4_t __ret_594; \ | | |
| 56133 | int16x4_t __s0_594 = __p0_594; \ | | |
| 56134 | int16x4_t __s1_594 = __p1_594; \ | | |
| 56135 | int16x8_t __s2_594 = __p2_594; \ | | |
| 56136 | int16x4_t __rev0_594; __rev0_594 = __builtin_shufflevector(__s0_594, __s0_594, 3, 2, 1, 0); \ | | |
| 56137 | int16x4_t __rev1_594; __rev1_594 = __builtin_shufflevector(__s1_594, __s1_594, 3, 2, 1, 0); \ | | |
| 56138 | int16x8_t __rev2_594; __rev2_594 = __builtin_shufflevector(__s2_594, __s2_594, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56139 | __ret_594 = __rev0_594 - __rev1_594 * __noswap_splat_laneq_s16(__rev2_594, __p3_594); \ | | |
| 56140 | __ret_594 = __builtin_shufflevector(__ret_594, __ret_594, 3, 2, 1, 0); \ | | |
| 56141 | __ret_594; \ | | |
| 56142 | }) | | |
| 56143 | #endif | | |
| 56144 | | | |
| 56145 | #ifdef __LITTLE_ENDIAN__ | | |
| 56146 | #define vmlsl_high_lane_u32(__p0_595, __p1_595, __p2_595, __p3_595) __extension__ ({ \ | | |
| 56147 | uint64x2_t __ret_595; \ | | |
| 56148 | uint64x2_t __s0_595 = __p0_595; \ | | |
| 56149 | uint32x4_t __s1_595 = __p1_595; \ | | |
| 56150 | uint32x2_t __s2_595 = __p2_595; \ | | |
| 56151 | __ret_595 = __s0_595 - vmull_u32(vget_high_u32(__s1_595), splat_lane_u32(__s2_595, __p3_595)); \ | | |
| 56152 | __ret_595; \ | | |
| 56153 | }) | | |
| 56154 | #else | | |
| 56155 | #define vmlsl_high_lane_u32(__p0_596, __p1_596, __p2_596, __p3_596) __extension__ ({ \ | | |
| 56156 | uint64x2_t __ret_596; \ | | |
| 56157 | uint64x2_t __s0_596 = __p0_596; \ | | |
| 56158 | uint32x4_t __s1_596 = __p1_596; \ | | |
| 56159 | uint32x2_t __s2_596 = __p2_596; \ | | |
| 56160 | uint64x2_t __rev0_596; __rev0_596 = __builtin_shufflevector(__s0_596, __s0_596, 1, 0); \ | | |
| 56161 | uint32x4_t __rev1_596; __rev1_596 = __builtin_shufflevector(__s1_596, __s1_596, 3, 2, 1, 0); \ | | |
| 56162 | uint32x2_t __rev2_596; __rev2_596 = __builtin_shufflevector(__s2_596, __s2_596, 1, 0); \ | | |
| 56163 | __ret_596 = __rev0_596 - __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_596), __noswap_splat_lane_u32(__rev2_596, __p3_596)); \ | | |
| 56164 | __ret_596 = __builtin_shufflevector(__ret_596, __ret_596, 1, 0); \ | | |
| 56165 | __ret_596; \ | | |
| 56166 | }) | | |
| 56167 | #endif | | |
| 56168 | | | |
| 56169 | #ifdef __LITTLE_ENDIAN__ | | |
| 56170 | #define vmlsl_high_lane_u16(__p0_597, __p1_597, __p2_597, __p3_597) __extension__ ({ \ | | |
| 56171 | uint32x4_t __ret_597; \ | | |
| 56172 | uint32x4_t __s0_597 = __p0_597; \ | | |
| 56173 | uint16x8_t __s1_597 = __p1_597; \ | | |
| 56174 | uint16x4_t __s2_597 = __p2_597; \ | | |
| 56175 | __ret_597 = __s0_597 - vmull_u16(vget_high_u16(__s1_597), splat_lane_u16(__s2_597, __p3_597)); \ | | |
| 56176 | __ret_597; \ | | |
| 56177 | }) | | |
| 56178 | #else | | |
| 56179 | #define vmlsl_high_lane_u16(__p0_598, __p1_598, __p2_598, __p3_598) __extension__ ({ \ | | |
| 56180 | uint32x4_t __ret_598; \ | | |
| 56181 | uint32x4_t __s0_598 = __p0_598; \ | | |
| 56182 | uint16x8_t __s1_598 = __p1_598; \ | | |
| 56183 | uint16x4_t __s2_598 = __p2_598; \ | | |
| 56184 | uint32x4_t __rev0_598; __rev0_598 = __builtin_shufflevector(__s0_598, __s0_598, 3, 2, 1, 0); \ | | |
| 56185 | uint16x8_t __rev1_598; __rev1_598 = __builtin_shufflevector(__s1_598, __s1_598, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56186 | uint16x4_t __rev2_598; __rev2_598 = __builtin_shufflevector(__s2_598, __s2_598, 3, 2, 1, 0); \ | | |
| 56187 | __ret_598 = __rev0_598 - __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_598), __noswap_splat_lane_u16(__rev2_598, __p3_598)); \ | | |
| 56188 | __ret_598 = __builtin_shufflevector(__ret_598, __ret_598, 3, 2, 1, 0); \ | | |
| 56189 | __ret_598; \ | | |
| 56190 | }) | | |
| 56191 | #endif | | |
| 56192 | | | |
| 56193 | #ifdef __LITTLE_ENDIAN__ | | |
| 56194 | #define vmlsl_high_lane_s32(__p0_599, __p1_599, __p2_599, __p3_599) __extension__ ({ \ | | |
| 56195 | int64x2_t __ret_599; \ | | |
| 56196 | int64x2_t __s0_599 = __p0_599; \ | | |
| 56197 | int32x4_t __s1_599 = __p1_599; \ | | |
| 56198 | int32x2_t __s2_599 = __p2_599; \ | | |
| 56199 | __ret_599 = __s0_599 - vmull_s32(vget_high_s32(__s1_599), splat_lane_s32(__s2_599, __p3_599)); \ | | |
| 56200 | __ret_599; \ | | |
| 56201 | }) | | |
| 56202 | #else | | |
| 56203 | #define vmlsl_high_lane_s32(__p0_600, __p1_600, __p2_600, __p3_600) __extension__ ({ \ | | |
| 56204 | int64x2_t __ret_600; \ | | |
| 56205 | int64x2_t __s0_600 = __p0_600; \ | | |
| 56206 | int32x4_t __s1_600 = __p1_600; \ | | |
| 56207 | int32x2_t __s2_600 = __p2_600; \ | | |
| 56208 | int64x2_t __rev0_600; __rev0_600 = __builtin_shufflevector(__s0_600, __s0_600, 1, 0); \ | | |
| 56209 | int32x4_t __rev1_600; __rev1_600 = __builtin_shufflevector(__s1_600, __s1_600, 3, 2, 1, 0); \ | | |
| 56210 | int32x2_t __rev2_600; __rev2_600 = __builtin_shufflevector(__s2_600, __s2_600, 1, 0); \ | | |
| 56211 | __ret_600 = __rev0_600 - __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_600), __noswap_splat_lane_s32(__rev2_600, __p3_600)); \ | | |
| 56212 | __ret_600 = __builtin_shufflevector(__ret_600, __ret_600, 1, 0); \ | | |
| 56213 | __ret_600; \ | | |
| 56214 | }) | | |
| 56215 | #endif | | |
| 56216 | | | |
| 56217 | #ifdef __LITTLE_ENDIAN__ | | |
| 56218 | #define vmlsl_high_lane_s16(__p0_601, __p1_601, __p2_601, __p3_601) __extension__ ({ \ | | |
| 56219 | int32x4_t __ret_601; \ | | |
| 56220 | int32x4_t __s0_601 = __p0_601; \ | | |
| 56221 | int16x8_t __s1_601 = __p1_601; \ | | |
| 56222 | int16x4_t __s2_601 = __p2_601; \ | | |
| 56223 | __ret_601 = __s0_601 - vmull_s16(vget_high_s16(__s1_601), splat_lane_s16(__s2_601, __p3_601)); \ | | |
| 56224 | __ret_601; \ | | |
| 56225 | }) | | |
| 56226 | #else | | |
| 56227 | #define vmlsl_high_lane_s16(__p0_602, __p1_602, __p2_602, __p3_602) __extension__ ({ \ | | |
| 56228 | int32x4_t __ret_602; \ | | |
| 56229 | int32x4_t __s0_602 = __p0_602; \ | | |
| 56230 | int16x8_t __s1_602 = __p1_602; \ | | |
| 56231 | int16x4_t __s2_602 = __p2_602; \ | | |
| 56232 | int32x4_t __rev0_602; __rev0_602 = __builtin_shufflevector(__s0_602, __s0_602, 3, 2, 1, 0); \ | | |
| 56233 | int16x8_t __rev1_602; __rev1_602 = __builtin_shufflevector(__s1_602, __s1_602, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56234 | int16x4_t __rev2_602; __rev2_602 = __builtin_shufflevector(__s2_602, __s2_602, 3, 2, 1, 0); \ | | |
| 56235 | __ret_602 = __rev0_602 - __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_602), __noswap_splat_lane_s16(__rev2_602, __p3_602)); \ | | |
| 56236 | __ret_602 = __builtin_shufflevector(__ret_602, __ret_602, 3, 2, 1, 0); \ | | |
| 56237 | __ret_602; \ | | |
| 56238 | }) | | |
| 56239 | #endif | | |
| 56240 | | | |
| 56241 | #ifdef __LITTLE_ENDIAN__ | | |
| 56242 | #define vmlsl_high_laneq_u32(__p0_603, __p1_603, __p2_603, __p3_603) __extension__ ({ \ | | |
| 56243 | uint64x2_t __ret_603; \ | | |
| 56244 | uint64x2_t __s0_603 = __p0_603; \ | | |
| 56245 | uint32x4_t __s1_603 = __p1_603; \ | | |
| 56246 | uint32x4_t __s2_603 = __p2_603; \ | | |
| 56247 | __ret_603 = __s0_603 - vmull_u32(vget_high_u32(__s1_603), splat_laneq_u32(__s2_603, __p3_603)); \ | | |
| 56248 | __ret_603; \ | | |
| 56249 | }) | | |
| 56250 | #else | | |
| 56251 | #define vmlsl_high_laneq_u32(__p0_604, __p1_604, __p2_604, __p3_604) __extension__ ({ \ | | |
| 56252 | uint64x2_t __ret_604; \ | | |
| 56253 | uint64x2_t __s0_604 = __p0_604; \ | | |
| 56254 | uint32x4_t __s1_604 = __p1_604; \ | | |
| 56255 | uint32x4_t __s2_604 = __p2_604; \ | | |
| 56256 | uint64x2_t __rev0_604; __rev0_604 = __builtin_shufflevector(__s0_604, __s0_604, 1, 0); \ | | |
| 56257 | uint32x4_t __rev1_604; __rev1_604 = __builtin_shufflevector(__s1_604, __s1_604, 3, 2, 1, 0); \ | | |
| 56258 | uint32x4_t __rev2_604; __rev2_604 = __builtin_shufflevector(__s2_604, __s2_604, 3, 2, 1, 0); \ | | |
| 56259 | __ret_604 = __rev0_604 - __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_604), __noswap_splat_laneq_u32(__rev2_604, __p3_604)); \ | | |
| 56260 | __ret_604 = __builtin_shufflevector(__ret_604, __ret_604, 1, 0); \ | | |
| 56261 | __ret_604; \ | | |
| 56262 | }) | | |
| 56263 | #endif | | |
| 56264 | | | |
| 56265 | #ifdef __LITTLE_ENDIAN__ | | |
| 56266 | #define vmlsl_high_laneq_u16(__p0_605, __p1_605, __p2_605, __p3_605) __extension__ ({ \ | | |
| 56267 | uint32x4_t __ret_605; \ | | |
| 56268 | uint32x4_t __s0_605 = __p0_605; \ | | |
| 56269 | uint16x8_t __s1_605 = __p1_605; \ | | |
| 56270 | uint16x8_t __s2_605 = __p2_605; \ | | |
| 56271 | __ret_605 = __s0_605 - vmull_u16(vget_high_u16(__s1_605), splat_laneq_u16(__s2_605, __p3_605)); \ | | |
| 56272 | __ret_605; \ | | |
| 56273 | }) | | |
| 56274 | #else | | |
| 56275 | #define vmlsl_high_laneq_u16(__p0_606, __p1_606, __p2_606, __p3_606) __extension__ ({ \ | | |
| 56276 | uint32x4_t __ret_606; \ | | |
| 56277 | uint32x4_t __s0_606 = __p0_606; \ | | |
| 56278 | uint16x8_t __s1_606 = __p1_606; \ | | |
| 56279 | uint16x8_t __s2_606 = __p2_606; \ | | |
| 56280 | uint32x4_t __rev0_606; __rev0_606 = __builtin_shufflevector(__s0_606, __s0_606, 3, 2, 1, 0); \ | | |
| 56281 | uint16x8_t __rev1_606; __rev1_606 = __builtin_shufflevector(__s1_606, __s1_606, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56282 | uint16x8_t __rev2_606; __rev2_606 = __builtin_shufflevector(__s2_606, __s2_606, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56283 | __ret_606 = __rev0_606 - __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_606), __noswap_splat_laneq_u16(__rev2_606, __p3_606)); \ | | |
| 56284 | __ret_606 = __builtin_shufflevector(__ret_606, __ret_606, 3, 2, 1, 0); \ | | |
| 56285 | __ret_606; \ | | |
| 56286 | }) | | |
| 56287 | #endif | | |
| 56288 | | | |
| 56289 | #ifdef __LITTLE_ENDIAN__ | | |
| 56290 | #define vmlsl_high_laneq_s32(__p0_607, __p1_607, __p2_607, __p3_607) __extension__ ({ \ | | |
| 56291 | int64x2_t __ret_607; \ | | |
| 56292 | int64x2_t __s0_607 = __p0_607; \ | | |
| 56293 | int32x4_t __s1_607 = __p1_607; \ | | |
| 56294 | int32x4_t __s2_607 = __p2_607; \ | | |
| 56295 | __ret_607 = __s0_607 - vmull_s32(vget_high_s32(__s1_607), splat_laneq_s32(__s2_607, __p3_607)); \ | | |
| 56296 | __ret_607; \ | | |
| 56297 | }) | | |
| 56298 | #else | | |
| 56299 | #define vmlsl_high_laneq_s32(__p0_608, __p1_608, __p2_608, __p3_608) __extension__ ({ \ | | |
| 56300 | int64x2_t __ret_608; \ | | |
| 56301 | int64x2_t __s0_608 = __p0_608; \ | | |
| 56302 | int32x4_t __s1_608 = __p1_608; \ | | |
| 56303 | int32x4_t __s2_608 = __p2_608; \ | | |
| 56304 | int64x2_t __rev0_608; __rev0_608 = __builtin_shufflevector(__s0_608, __s0_608, 1, 0); \ | | |
| 56305 | int32x4_t __rev1_608; __rev1_608 = __builtin_shufflevector(__s1_608, __s1_608, 3, 2, 1, 0); \ | | |
| 56306 | int32x4_t __rev2_608; __rev2_608 = __builtin_shufflevector(__s2_608, __s2_608, 3, 2, 1, 0); \ | | |
| 56307 | __ret_608 = __rev0_608 - __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_608), __noswap_splat_laneq_s32(__rev2_608, __p3_608)); \ | | |
| 56308 | __ret_608 = __builtin_shufflevector(__ret_608, __ret_608, 1, 0); \ | | |
| 56309 | __ret_608; \ | | |
| 56310 | }) | | |
| 56311 | #endif | | |
| 56312 | | | |
| 56313 | #ifdef __LITTLE_ENDIAN__ | | |
| 56314 | #define vmlsl_high_laneq_s16(__p0_609, __p1_609, __p2_609, __p3_609) __extension__ ({ \ | | |
| 56315 | int32x4_t __ret_609; \ | | |
| 56316 | int32x4_t __s0_609 = __p0_609; \ | | |
| 56317 | int16x8_t __s1_609 = __p1_609; \ | | |
| 56318 | int16x8_t __s2_609 = __p2_609; \ | | |
| 56319 | __ret_609 = __s0_609 - vmull_s16(vget_high_s16(__s1_609), splat_laneq_s16(__s2_609, __p3_609)); \ | | |
| 56320 | __ret_609; \ | | |
| 56321 | }) | | |
| 56322 | #else | | |
| 56323 | #define vmlsl_high_laneq_s16(__p0_610, __p1_610, __p2_610, __p3_610) __extension__ ({ \ | | |
| 56324 | int32x4_t __ret_610; \ | | |
| 56325 | int32x4_t __s0_610 = __p0_610; \ | | |
| 56326 | int16x8_t __s1_610 = __p1_610; \ | | |
| 56327 | int16x8_t __s2_610 = __p2_610; \ | | |
| 56328 | int32x4_t __rev0_610; __rev0_610 = __builtin_shufflevector(__s0_610, __s0_610, 3, 2, 1, 0); \ | | |
| 56329 | int16x8_t __rev1_610; __rev1_610 = __builtin_shufflevector(__s1_610, __s1_610, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56330 | int16x8_t __rev2_610; __rev2_610 = __builtin_shufflevector(__s2_610, __s2_610, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56331 | __ret_610 = __rev0_610 - __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_610), __noswap_splat_laneq_s16(__rev2_610, __p3_610)); \ | | |
| 56332 | __ret_610 = __builtin_shufflevector(__ret_610, __ret_610, 3, 2, 1, 0); \ | | |
| 56333 | __ret_610; \ | | |
| 56334 | }) | | |
| 56335 | #endif | | |
| 56336 | | | |
| 56337 | #ifdef __LITTLE_ENDIAN__ | | |
| 56338 | #define vmlsl_laneq_u32(__p0_611, __p1_611, __p2_611, __p3_611) __extension__ ({ \ | | |
| 56339 | uint64x2_t __ret_611; \ | | |
| 56340 | uint64x2_t __s0_611 = __p0_611; \ | | |
| 56341 | uint32x2_t __s1_611 = __p1_611; \ | | |
| 56342 | uint32x4_t __s2_611 = __p2_611; \ | | |
| 56343 | __ret_611 = __s0_611 - vmull_u32(__s1_611, splat_laneq_u32(__s2_611, __p3_611)); \ | | |
| 56344 | __ret_611; \ | | |
| 56345 | }) | | |
| 56346 | #else | | |
| 56347 | #define vmlsl_laneq_u32(__p0_612, __p1_612, __p2_612, __p3_612) __extension__ ({ \ | | |
| 56348 | uint64x2_t __ret_612; \ | | |
| 56349 | uint64x2_t __s0_612 = __p0_612; \ | | |
| 56350 | uint32x2_t __s1_612 = __p1_612; \ | | |
| 56351 | uint32x4_t __s2_612 = __p2_612; \ | | |
| 56352 | uint64x2_t __rev0_612; __rev0_612 = __builtin_shufflevector(__s0_612, __s0_612, 1, 0); \ | | |
| 56353 | uint32x2_t __rev1_612; __rev1_612 = __builtin_shufflevector(__s1_612, __s1_612, 1, 0); \ | | |
| 56354 | uint32x4_t __rev2_612; __rev2_612 = __builtin_shufflevector(__s2_612, __s2_612, 3, 2, 1, 0); \ | | |
| 56355 | __ret_612 = __rev0_612 - __noswap_vmull_u32(__rev1_612, __noswap_splat_laneq_u32(__rev2_612, __p3_612)); \ | | |
| 56356 | __ret_612 = __builtin_shufflevector(__ret_612, __ret_612, 1, 0); \ | | |
| 56357 | __ret_612; \ | | |
| 56358 | }) | | |
| 56359 | #endif | | |
| 56360 | | | |
| 56361 | #ifdef __LITTLE_ENDIAN__ | | |
| 56362 | #define vmlsl_laneq_u16(__p0_613, __p1_613, __p2_613, __p3_613) __extension__ ({ \ | | |
| 56363 | uint32x4_t __ret_613; \ | | |
| 56364 | uint32x4_t __s0_613 = __p0_613; \ | | |
| 56365 | uint16x4_t __s1_613 = __p1_613; \ | | |
| 56366 | uint16x8_t __s2_613 = __p2_613; \ | | |
| 56367 | __ret_613 = __s0_613 - vmull_u16(__s1_613, splat_laneq_u16(__s2_613, __p3_613)); \ | | |
| 56368 | __ret_613; \ | | |
| 56369 | }) | | |
| 56370 | #else | | |
| 56371 | #define vmlsl_laneq_u16(__p0_614, __p1_614, __p2_614, __p3_614) __extension__ ({ \ | | |
| 56372 | uint32x4_t __ret_614; \ | | |
| 56373 | uint32x4_t __s0_614 = __p0_614; \ | | |
| 56374 | uint16x4_t __s1_614 = __p1_614; \ | | |
| 56375 | uint16x8_t __s2_614 = __p2_614; \ | | |
| 56376 | uint32x4_t __rev0_614; __rev0_614 = __builtin_shufflevector(__s0_614, __s0_614, 3, 2, 1, 0); \ | | |
| 56377 | uint16x4_t __rev1_614; __rev1_614 = __builtin_shufflevector(__s1_614, __s1_614, 3, 2, 1, 0); \ | | |
| 56378 | uint16x8_t __rev2_614; __rev2_614 = __builtin_shufflevector(__s2_614, __s2_614, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56379 | __ret_614 = __rev0_614 - __noswap_vmull_u16(__rev1_614, __noswap_splat_laneq_u16(__rev2_614, __p3_614)); \ | | |
| 56380 | __ret_614 = __builtin_shufflevector(__ret_614, __ret_614, 3, 2, 1, 0); \ | | |
| 56381 | __ret_614; \ | | |
| 56382 | }) | | |
| 56383 | #endif | | |
| 56384 | | | |
| 56385 | #ifdef __LITTLE_ENDIAN__ | | |
| 56386 | #define vmlsl_laneq_s32(__p0_615, __p1_615, __p2_615, __p3_615) __extension__ ({ \ | | |
| 56387 | int64x2_t __ret_615; \ | | |
| 56388 | int64x2_t __s0_615 = __p0_615; \ | | |
| 56389 | int32x2_t __s1_615 = __p1_615; \ | | |
| 56390 | int32x4_t __s2_615 = __p2_615; \ | | |
| 56391 | __ret_615 = __s0_615 - vmull_s32(__s1_615, splat_laneq_s32(__s2_615, __p3_615)); \ | | |
| 56392 | __ret_615; \ | | |
| 56393 | }) | | |
| 56394 | #else | | |
| 56395 | #define vmlsl_laneq_s32(__p0_616, __p1_616, __p2_616, __p3_616) __extension__ ({ \ | | |
| 56396 | int64x2_t __ret_616; \ | | |
| 56397 | int64x2_t __s0_616 = __p0_616; \ | | |
| 56398 | int32x2_t __s1_616 = __p1_616; \ | | |
| 56399 | int32x4_t __s2_616 = __p2_616; \ | | |
| 56400 | int64x2_t __rev0_616; __rev0_616 = __builtin_shufflevector(__s0_616, __s0_616, 1, 0); \ | | |
| 56401 | int32x2_t __rev1_616; __rev1_616 = __builtin_shufflevector(__s1_616, __s1_616, 1, 0); \ | | |
| 56402 | int32x4_t __rev2_616; __rev2_616 = __builtin_shufflevector(__s2_616, __s2_616, 3, 2, 1, 0); \ | | |
| 56403 | __ret_616 = __rev0_616 - __noswap_vmull_s32(__rev1_616, __noswap_splat_laneq_s32(__rev2_616, __p3_616)); \ | | |
| 56404 | __ret_616 = __builtin_shufflevector(__ret_616, __ret_616, 1, 0); \ | | |
| 56405 | __ret_616; \ | | |
| 56406 | }) | | |
| 56407 | #endif | | |
| 56408 | | | |
| 56409 | #ifdef __LITTLE_ENDIAN__ | | |
| 56410 | #define vmlsl_laneq_s16(__p0_617, __p1_617, __p2_617, __p3_617) __extension__ ({ \ | | |
| 56411 | int32x4_t __ret_617; \ | | |
| 56412 | int32x4_t __s0_617 = __p0_617; \ | | |
| 56413 | int16x4_t __s1_617 = __p1_617; \ | | |
| 56414 | int16x8_t __s2_617 = __p2_617; \ | | |
| 56415 | __ret_617 = __s0_617 - vmull_s16(__s1_617, splat_laneq_s16(__s2_617, __p3_617)); \ | | |
| 56416 | __ret_617; \ | | |
| 56417 | }) | | |
| 56418 | #else | | |
| 56419 | #define vmlsl_laneq_s16(__p0_618, __p1_618, __p2_618, __p3_618) __extension__ ({ \ | | |
| 56420 | int32x4_t __ret_618; \ | | |
| 56421 | int32x4_t __s0_618 = __p0_618; \ | | |
| 56422 | int16x4_t __s1_618 = __p1_618; \ | | |
| 56423 | int16x8_t __s2_618 = __p2_618; \ | | |
| 56424 | int32x4_t __rev0_618; __rev0_618 = __builtin_shufflevector(__s0_618, __s0_618, 3, 2, 1, 0); \ | | |
| 56425 | int16x4_t __rev1_618; __rev1_618 = __builtin_shufflevector(__s1_618, __s1_618, 3, 2, 1, 0); \ | | |
| 56426 | int16x8_t __rev2_618; __rev2_618 = __builtin_shufflevector(__s2_618, __s2_618, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56427 | __ret_618 = __rev0_618 - __noswap_vmull_s16(__rev1_618, __noswap_splat_laneq_s16(__rev2_618, __p3_618)); \ | | |
| 56428 | __ret_618 = __builtin_shufflevector(__ret_618, __ret_618, 3, 2, 1, 0); \ | | |
| 56429 | __ret_618; \ | | |
| 56430 | }) | | |
| 56431 | #endif | | |
| 56432 | | | |
| 56433 | __ai poly64x1_t vmov_n_p64(poly64_t __p0) { | | |
| 56434 | poly64x1_t __ret; | | |
| 56435 | __ret = (poly64x1_t) {__p0}; | | |
| 56436 | return __ret; | 57285 | return __ret; |
| 56437 | } | 57286 | } |
| 56438 | #ifdef __LITTLE_ENDIAN__ | 57287 | __ai float16x8_t vreinterpretq_f16_u32(uint32x4_t __p0) { |
| 56439 | __ai poly64x2_t vmovq_n_p64(poly64_t __p0) { | 57288 | float16x8_t __ret; |
| 56440 | poly64x2_t __ret; | 57289 | __ret = (float16x8_t)(__p0); |
| 56441 | __ret = (poly64x2_t) {__p0, __p0}; | | |
| 56442 | return __ret; | 57290 | return __ret; |
| 56443 | } | 57291 | } |
| 56444 | #else | 57292 | __ai float16x8_t vreinterpretq_f16_u64(uint64x2_t __p0) { |
| 56445 | __ai poly64x2_t vmovq_n_p64(poly64_t __p0) { | 57293 | float16x8_t __ret; |
| 56446 | poly64x2_t __ret; | 57294 | __ret = (float16x8_t)(__p0); |
| 56447 | __ret = (poly64x2_t) {__p0, __p0}; | | |
| 56448 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 56449 | return __ret; | 57295 | return __ret; |
| 56450 | } | 57296 | } |
| 56451 | #endif | 57297 | __ai float16x8_t vreinterpretq_f16_u16(uint16x8_t __p0) { |
| 56452 | | 57298 | float16x8_t __ret; |
| 56453 | #ifdef __LITTLE_ENDIAN__ | 57299 | __ret = (float16x8_t)(__p0); |
| 56454 | __ai float64x2_t vmovq_n_f64(float64_t __p0) { | | |
| 56455 | float64x2_t __ret; | | |
| 56456 | __ret = (float64x2_t) {__p0, __p0}; | | |
| 56457 | return __ret; | 57300 | return __ret; |
| 56458 | } | 57301 | } |
| 56459 | #else | 57302 | __ai float16x8_t vreinterpretq_f16_s8(int8x16_t __p0) { |
| 56460 | __ai float64x2_t vmovq_n_f64(float64_t __p0) { | 57303 | float16x8_t __ret; |
| 56461 | float64x2_t __ret; | 57304 | __ret = (float16x8_t)(__p0); |
| 56462 | __ret = (float64x2_t) {__p0, __p0}; | | |
| 56463 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 56464 | return __ret; | 57305 | return __ret; |
| 56465 | } | 57306 | } |
| 56466 | #endif | 57307 | __ai float16x8_t vreinterpretq_f16_f64(float64x2_t __p0) { |
| 56467 | | 57308 | float16x8_t __ret; |
| 56468 | __ai float64x1_t vmov_n_f64(float64_t __p0) { | 57309 | __ret = (float16x8_t)(__p0); |
| 56469 | float64x1_t __ret; | | |
| 56470 | __ret = (float64x1_t) {__p0}; | | |
| 56471 | return __ret; | 57310 | return __ret; |
| 56472 | } | 57311 | } |
| 56473 | #ifdef __LITTLE_ENDIAN__ | 57312 | __ai float16x8_t vreinterpretq_f16_f32(float32x4_t __p0) { |
| 56474 | __ai uint16x8_t vmovl_high_u8(uint8x16_t __p0_619) { | 57313 | float16x8_t __ret; |
| 56475 | uint16x8_t __ret_619; | 57314 | __ret = (float16x8_t)(__p0); |
| 56476 | uint8x8_t __a1_619 = vget_high_u8(__p0_619); | 57315 | return __ret; |
| 56477 | __ret_619 = (uint16x8_t)(vshll_n_u8(__a1_619, 0)); | | |
| 56478 | return __ret_619; | | |
| 56479 | } | 57316 | } |
| 56480 | #else | 57317 | __ai float16x8_t vreinterpretq_f16_s32(int32x4_t __p0) { |
| 56481 | __ai uint16x8_t vmovl_high_u8(uint8x16_t __p0_620) { | 57318 | float16x8_t __ret; |
| 56482 | uint16x8_t __ret_620; | 57319 | __ret = (float16x8_t)(__p0); |
| 56483 | uint8x16_t __rev0_620; __rev0_620 = __builtin_shufflevector(__p0_620, __p0_620, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 57320 | return __ret; |
| 56484 | uint8x8_t __a1_620 = __noswap_vget_high_u8(__rev0_620); | | |
| 56485 | __ret_620 = (uint16x8_t)(__noswap_vshll_n_u8(__a1_620, 0)); | | |
| 56486 | __ret_620 = __builtin_shufflevector(__ret_620, __ret_620, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 56487 | return __ret_620; | | |
| 56488 | } | 57321 | } |
| 56489 | __ai uint16x8_t __noswap_vmovl_high_u8(uint8x16_t __p0_621) { | 57322 | __ai float16x8_t vreinterpretq_f16_s64(int64x2_t __p0) { |
| 56490 | uint16x8_t __ret_621; | 57323 | float16x8_t __ret; |
| 56491 | uint8x8_t __a1_621 = __noswap_vget_high_u8(__p0_621); | 57324 | __ret = (float16x8_t)(__p0); |
| 56492 | __ret_621 = (uint16x8_t)(__noswap_vshll_n_u8(__a1_621, 0)); | 57325 | return __ret; |
| 56493 | return __ret_621; | | |
| 56494 | } | 57326 | } |
| 56495 | #endif | 57327 | __ai float16x8_t vreinterpretq_f16_s16(int16x8_t __p0) { |
| 56496 | | 57328 | float16x8_t __ret; |
| 56497 | #ifdef __LITTLE_ENDIAN__ | 57329 | __ret = (float16x8_t)(__p0); |
| 56498 | __ai uint64x2_t vmovl_high_u32(uint32x4_t __p0_622) { | 57330 | return __ret; |
| 56499 | uint64x2_t __ret_622; | | |
| 56500 | uint32x2_t __a1_622 = vget_high_u32(__p0_622); | | |
| 56501 | __ret_622 = (uint64x2_t)(vshll_n_u32(__a1_622, 0)); | | |
| 56502 | return __ret_622; | | |
| 56503 | } | 57331 | } |
| 56504 | #else | 57332 | __ai int32x4_t vreinterpretq_s32_p8(poly8x16_t __p0) { |
| 56505 | __ai uint64x2_t vmovl_high_u32(uint32x4_t __p0_623) { | 57333 | int32x4_t __ret; |
| 56506 | uint64x2_t __ret_623; | 57334 | __ret = (int32x4_t)(__p0); |
| 56507 | uint32x4_t __rev0_623; __rev0_623 = __builtin_shufflevector(__p0_623, __p0_623, 3, 2, 1, 0); | 57335 | return __ret; |
| 56508 | uint32x2_t __a1_623 = __noswap_vget_high_u32(__rev0_623); | | |
| 56509 | __ret_623 = (uint64x2_t)(__noswap_vshll_n_u32(__a1_623, 0)); | | |
| 56510 | __ret_623 = __builtin_shufflevector(__ret_623, __ret_623, 1, 0); | | |
| 56511 | return __ret_623; | | |
| 56512 | } | 57336 | } |
| 56513 | __ai uint64x2_t __noswap_vmovl_high_u32(uint32x4_t __p0_624) { | 57337 | __ai int32x4_t vreinterpretq_s32_p128(poly128_t __p0) { |
| 56514 | uint64x2_t __ret_624; | 57338 | int32x4_t __ret; |
| 56515 | uint32x2_t __a1_624 = __noswap_vget_high_u32(__p0_624); | 57339 | __ret = (int32x4_t)(__p0); |
| 56516 | __ret_624 = (uint64x2_t)(__noswap_vshll_n_u32(__a1_624, 0)); | 57340 | return __ret; |
| 56517 | return __ret_624; | | |
| 56518 | } | 57341 | } |
| 56519 | #endif | 57342 | __ai int32x4_t vreinterpretq_s32_p64(poly64x2_t __p0) { |
| 56520 | | 57343 | int32x4_t __ret; |
| 56521 | #ifdef __LITTLE_ENDIAN__ | 57344 | __ret = (int32x4_t)(__p0); |
| 56522 | __ai uint32x4_t vmovl_high_u16(uint16x8_t __p0_625) { | 57345 | return __ret; |
| 56523 | uint32x4_t __ret_625; | | |
| 56524 | uint16x4_t __a1_625 = vget_high_u16(__p0_625); | | |
| 56525 | __ret_625 = (uint32x4_t)(vshll_n_u16(__a1_625, 0)); | | |
| 56526 | return __ret_625; | | |
| 56527 | } | 57346 | } |
| 56528 | #else | 57347 | __ai int32x4_t vreinterpretq_s32_p16(poly16x8_t __p0) { |
| 56529 | __ai uint32x4_t vmovl_high_u16(uint16x8_t __p0_626) { | 57348 | int32x4_t __ret; |
| 56530 | uint32x4_t __ret_626; | 57349 | __ret = (int32x4_t)(__p0); |
| 56531 | uint16x8_t __rev0_626; __rev0_626 = __builtin_shufflevector(__p0_626, __p0_626, 7, 6, 5, 4, 3, 2, 1, 0); | 57350 | return __ret; |
| 56532 | uint16x4_t __a1_626 = __noswap_vget_high_u16(__rev0_626); | | |
| 56533 | __ret_626 = (uint32x4_t)(__noswap_vshll_n_u16(__a1_626, 0)); | | |
| 56534 | __ret_626 = __builtin_shufflevector(__ret_626, __ret_626, 3, 2, 1, 0); | | |
| 56535 | return __ret_626; | | |
| 56536 | } | 57351 | } |
| 56537 | __ai uint32x4_t __noswap_vmovl_high_u16(uint16x8_t __p0_627) { | 57352 | __ai int32x4_t vreinterpretq_s32_u8(uint8x16_t __p0) { |
| 56538 | uint32x4_t __ret_627; | 57353 | int32x4_t __ret; |
| 56539 | uint16x4_t __a1_627 = __noswap_vget_high_u16(__p0_627); | 57354 | __ret = (int32x4_t)(__p0); |
| 56540 | __ret_627 = (uint32x4_t)(__noswap_vshll_n_u16(__a1_627, 0)); | 57355 | return __ret; |
| 56541 | return __ret_627; | | |
| 56542 | } | 57356 | } |
| 56543 | #endif | 57357 | __ai int32x4_t vreinterpretq_s32_u32(uint32x4_t __p0) { |
| 56544 | | 57358 | int32x4_t __ret; |
| 56545 | #ifdef __LITTLE_ENDIAN__ | 57359 | __ret = (int32x4_t)(__p0); |
| 56546 | __ai int16x8_t vmovl_high_s8(int8x16_t __p0_628) { | 57360 | return __ret; |
| 56547 | int16x8_t __ret_628; | | |
| 56548 | int8x8_t __a1_628 = vget_high_s8(__p0_628); | | |
| 56549 | __ret_628 = (int16x8_t)(vshll_n_s8(__a1_628, 0)); | | |
| 56550 | return __ret_628; | | |
| 56551 | } | 57361 | } |
| 56552 | #else | 57362 | __ai int32x4_t vreinterpretq_s32_u64(uint64x2_t __p0) { |
| 56553 | __ai int16x8_t vmovl_high_s8(int8x16_t __p0_629) { | 57363 | int32x4_t __ret; |
| 56554 | int16x8_t __ret_629; | 57364 | __ret = (int32x4_t)(__p0); |
| 56555 | int8x16_t __rev0_629; __rev0_629 = __builtin_shufflevector(__p0_629, __p0_629, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 57365 | return __ret; |
| 56556 | int8x8_t __a1_629 = __noswap_vget_high_s8(__rev0_629); | | |
| 56557 | __ret_629 = (int16x8_t)(__noswap_vshll_n_s8(__a1_629, 0)); | | |
| 56558 | __ret_629 = __builtin_shufflevector(__ret_629, __ret_629, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 56559 | return __ret_629; | | |
| 56560 | } | 57366 | } |
| 56561 | __ai int16x8_t __noswap_vmovl_high_s8(int8x16_t __p0_630) { | 57367 | __ai int32x4_t vreinterpretq_s32_u16(uint16x8_t __p0) { |
| 56562 | int16x8_t __ret_630; | 57368 | int32x4_t __ret; |
| 56563 | int8x8_t __a1_630 = __noswap_vget_high_s8(__p0_630); | 57369 | __ret = (int32x4_t)(__p0); |
| 56564 | __ret_630 = (int16x8_t)(__noswap_vshll_n_s8(__a1_630, 0)); | 57370 | return __ret; |
| 56565 | return __ret_630; | | |
| 56566 | } | 57371 | } |
| 56567 | #endif | 57372 | __ai int32x4_t vreinterpretq_s32_s8(int8x16_t __p0) { |
| 56568 | | 57373 | int32x4_t __ret; |
| 56569 | #ifdef __LITTLE_ENDIAN__ | 57374 | __ret = (int32x4_t)(__p0); |
| 56570 | __ai int64x2_t vmovl_high_s32(int32x4_t __p0_631) { | 57375 | return __ret; |
| 56571 | int64x2_t __ret_631; | | |
| 56572 | int32x2_t __a1_631 = vget_high_s32(__p0_631); | | |
| 56573 | __ret_631 = (int64x2_t)(vshll_n_s32(__a1_631, 0)); | | |
| 56574 | return __ret_631; | | |
| 56575 | } | 57376 | } |
| 56576 | #else | 57377 | __ai int32x4_t vreinterpretq_s32_f64(float64x2_t __p0) { |
| 56577 | __ai int64x2_t vmovl_high_s32(int32x4_t __p0_632) { | 57378 | int32x4_t __ret; |
| 56578 | int64x2_t __ret_632; | 57379 | __ret = (int32x4_t)(__p0); |
| 56579 | int32x4_t __rev0_632; __rev0_632 = __builtin_shufflevector(__p0_632, __p0_632, 3, 2, 1, 0); | 57380 | return __ret; |
| 56580 | int32x2_t __a1_632 = __noswap_vget_high_s32(__rev0_632); | | |
| 56581 | __ret_632 = (int64x2_t)(__noswap_vshll_n_s32(__a1_632, 0)); | | |
| 56582 | __ret_632 = __builtin_shufflevector(__ret_632, __ret_632, 1, 0); | | |
| 56583 | return __ret_632; | | |
| 56584 | } | 57381 | } |
| 56585 | __ai int64x2_t __noswap_vmovl_high_s32(int32x4_t __p0_633) { | 57382 | __ai int32x4_t vreinterpretq_s32_f32(float32x4_t __p0) { |
| 56586 | int64x2_t __ret_633; | 57383 | int32x4_t __ret; |
| 56587 | int32x2_t __a1_633 = __noswap_vget_high_s32(__p0_633); | 57384 | __ret = (int32x4_t)(__p0); |
| 56588 | __ret_633 = (int64x2_t)(__noswap_vshll_n_s32(__a1_633, 0)); | 57385 | return __ret; |
| 56589 | return __ret_633; | | |
| 56590 | } | 57386 | } |
| 56591 | #endif | 57387 | __ai int32x4_t vreinterpretq_s32_f16(float16x8_t __p0) { |
| 56592 | | 57388 | int32x4_t __ret; |
| 56593 | #ifdef __LITTLE_ENDIAN__ | 57389 | __ret = (int32x4_t)(__p0); |
| 56594 | __ai int32x4_t vmovl_high_s16(int16x8_t __p0_634) { | 57390 | return __ret; |
| 56595 | int32x4_t __ret_634; | | |
| 56596 | int16x4_t __a1_634 = vget_high_s16(__p0_634); | | |
| 56597 | __ret_634 = (int32x4_t)(vshll_n_s16(__a1_634, 0)); | | |
| 56598 | return __ret_634; | | |
| 56599 | } | 57391 | } |
| 56600 | #else | 57392 | __ai int32x4_t vreinterpretq_s32_s64(int64x2_t __p0) { |
| 56601 | __ai int32x4_t vmovl_high_s16(int16x8_t __p0_635) { | 57393 | int32x4_t __ret; |
| 56602 | int32x4_t __ret_635; | 57394 | __ret = (int32x4_t)(__p0); |
| 56603 | int16x8_t __rev0_635; __rev0_635 = __builtin_shufflevector(__p0_635, __p0_635, 7, 6, 5, 4, 3, 2, 1, 0); | 57395 | return __ret; |
| 56604 | int16x4_t __a1_635 = __noswap_vget_high_s16(__rev0_635); | | |
| 56605 | __ret_635 = (int32x4_t)(__noswap_vshll_n_s16(__a1_635, 0)); | | |
| 56606 | __ret_635 = __builtin_shufflevector(__ret_635, __ret_635, 3, 2, 1, 0); | | |
| 56607 | return __ret_635; | | |
| 56608 | } | 57396 | } |
| 56609 | __ai int32x4_t __noswap_vmovl_high_s16(int16x8_t __p0_636) { | 57397 | __ai int32x4_t vreinterpretq_s32_s16(int16x8_t __p0) { |
| 56610 | int32x4_t __ret_636; | 57398 | int32x4_t __ret; |
| 56611 | int16x4_t __a1_636 = __noswap_vget_high_s16(__p0_636); | 57399 | __ret = (int32x4_t)(__p0); |
| 56612 | __ret_636 = (int32x4_t)(__noswap_vshll_n_s16(__a1_636, 0)); | 57400 | return __ret; |
| 56613 | return __ret_636; | | |
| 56614 | } | 57401 | } |
| 56615 | #endif | 57402 | __ai int64x2_t vreinterpretq_s64_p8(poly8x16_t __p0) { |
| 56616 | | 57403 | int64x2_t __ret; |
| 56617 | #ifdef __LITTLE_ENDIAN__ | 57404 | __ret = (int64x2_t)(__p0); |
| 56618 | __ai uint16x8_t vmovn_high_u32(uint16x4_t __p0, uint32x4_t __p1) { | | |
| 56619 | uint16x8_t __ret; | | |
| 56620 | __ret = vcombine_u16(__p0, vmovn_u32(__p1)); | | |
| 56621 | return __ret; | 57405 | return __ret; |
| 56622 | } | 57406 | } |
| 56623 | #else | 57407 | __ai int64x2_t vreinterpretq_s64_p128(poly128_t __p0) { |
| 56624 | __ai uint16x8_t vmovn_high_u32(uint16x4_t __p0, uint32x4_t __p1) { | 57408 | int64x2_t __ret; |
| 56625 | uint16x8_t __ret; | 57409 | __ret = (int64x2_t)(__p0); |
| 56626 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 56627 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 56628 | __ret = __noswap_vcombine_u16(__rev0, __noswap_vmovn_u32(__rev1)); | | |
| 56629 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 56630 | return __ret; | 57410 | return __ret; |
| 56631 | } | 57411 | } |
| 56632 | #endif | 57412 | __ai int64x2_t vreinterpretq_s64_p64(poly64x2_t __p0) { |
| 56633 | | 57413 | int64x2_t __ret; |
| 56634 | #ifdef __LITTLE_ENDIAN__ | 57414 | __ret = (int64x2_t)(__p0); |
| 56635 | __ai uint32x4_t vmovn_high_u64(uint32x2_t __p0, uint64x2_t __p1) { | | |
| 56636 | uint32x4_t __ret; | | |
| 56637 | __ret = vcombine_u32(__p0, vmovn_u64(__p1)); | | |
| 56638 | return __ret; | 57415 | return __ret; |
| 56639 | } | 57416 | } |
| 56640 | #else | 57417 | __ai int64x2_t vreinterpretq_s64_p16(poly16x8_t __p0) { |
| 56641 | __ai uint32x4_t vmovn_high_u64(uint32x2_t __p0, uint64x2_t __p1) { | 57418 | int64x2_t __ret; |
| 56642 | uint32x4_t __ret; | 57419 | __ret = (int64x2_t)(__p0); |
| 56643 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 56644 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 56645 | __ret = __noswap_vcombine_u32(__rev0, __noswap_vmovn_u64(__rev1)); | | |
| 56646 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 56647 | return __ret; | 57420 | return __ret; |
| 56648 | } | 57421 | } |
| 56649 | #endif | 57422 | __ai int64x2_t vreinterpretq_s64_u8(uint8x16_t __p0) { |
| 56650 | | 57423 | int64x2_t __ret; |
| 56651 | #ifdef __LITTLE_ENDIAN__ | 57424 | __ret = (int64x2_t)(__p0); |
| 56652 | __ai uint8x16_t vmovn_high_u16(uint8x8_t __p0, uint16x8_t __p1) { | | |
| 56653 | uint8x16_t __ret; | | |
| 56654 | __ret = vcombine_u8(__p0, vmovn_u16(__p1)); | | |
| 56655 | return __ret; | 57425 | return __ret; |
| 56656 | } | 57426 | } |
| 56657 | #else | 57427 | __ai int64x2_t vreinterpretq_s64_u32(uint32x4_t __p0) { |
| 56658 | __ai uint8x16_t vmovn_high_u16(uint8x8_t __p0, uint16x8_t __p1) { | 57428 | int64x2_t __ret; |
| 56659 | uint8x16_t __ret; | 57429 | __ret = (int64x2_t)(__p0); |
| 56660 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 56661 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 56662 | __ret = __noswap_vcombine_u8(__rev0, __noswap_vmovn_u16(__rev1)); | | |
| 56663 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 56664 | return __ret; | 57430 | return __ret; |
| 56665 | } | 57431 | } |
| 56666 | #endif | 57432 | __ai int64x2_t vreinterpretq_s64_u64(uint64x2_t __p0) { |
| 56667 | | 57433 | int64x2_t __ret; |
| 56668 | #ifdef __LITTLE_ENDIAN__ | 57434 | __ret = (int64x2_t)(__p0); |
| 56669 | __ai int16x8_t vmovn_high_s32(int16x4_t __p0, int32x4_t __p1) { | 57435 | return __ret; |
| | 57436 | } |
| | 57437 | __ai int64x2_t vreinterpretq_s64_u16(uint16x8_t __p0) { |
| | 57438 | int64x2_t __ret; |
| | 57439 | __ret = (int64x2_t)(__p0); |
| | 57440 | return __ret; |
| | 57441 | } |
| | 57442 | __ai int64x2_t vreinterpretq_s64_s8(int8x16_t __p0) { |
| | 57443 | int64x2_t __ret; |
| | 57444 | __ret = (int64x2_t)(__p0); |
| | 57445 | return __ret; |
| | 57446 | } |
| | 57447 | __ai int64x2_t vreinterpretq_s64_f64(float64x2_t __p0) { |
| | 57448 | int64x2_t __ret; |
| | 57449 | __ret = (int64x2_t)(__p0); |
| | 57450 | return __ret; |
| | 57451 | } |
| | 57452 | __ai int64x2_t vreinterpretq_s64_f32(float32x4_t __p0) { |
| | 57453 | int64x2_t __ret; |
| | 57454 | __ret = (int64x2_t)(__p0); |
| | 57455 | return __ret; |
| | 57456 | } |
| | 57457 | __ai int64x2_t vreinterpretq_s64_f16(float16x8_t __p0) { |
| | 57458 | int64x2_t __ret; |
| | 57459 | __ret = (int64x2_t)(__p0); |
| | 57460 | return __ret; |
| | 57461 | } |
| | 57462 | __ai int64x2_t vreinterpretq_s64_s32(int32x4_t __p0) { |
| | 57463 | int64x2_t __ret; |
| | 57464 | __ret = (int64x2_t)(__p0); |
| | 57465 | return __ret; |
| | 57466 | } |
| | 57467 | __ai int64x2_t vreinterpretq_s64_s16(int16x8_t __p0) { |
| | 57468 | int64x2_t __ret; |
| | 57469 | __ret = (int64x2_t)(__p0); |
| | 57470 | return __ret; |
| | 57471 | } |
| | 57472 | __ai int16x8_t vreinterpretq_s16_p8(poly8x16_t __p0) { |
| 56670 | int16x8_t __ret; | 57473 | int16x8_t __ret; |
| 56671 | __ret = vcombine_s16(__p0, vmovn_s32(__p1)); | 57474 | __ret = (int16x8_t)(__p0); |
| 56672 | return __ret; | 57475 | return __ret; |
| 56673 | } | 57476 | } |
| 56674 | #else | 57477 | __ai int16x8_t vreinterpretq_s16_p128(poly128_t __p0) { |
| 56675 | __ai int16x8_t vmovn_high_s32(int16x4_t __p0, int32x4_t __p1) { | | |
| 56676 | int16x8_t __ret; | 57478 | int16x8_t __ret; |
| 56677 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 57479 | __ret = (int16x8_t)(__p0); |
| 56678 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 56679 | __ret = __noswap_vcombine_s16(__rev0, __noswap_vmovn_s32(__rev1)); | | |
| 56680 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 56681 | return __ret; | 57480 | return __ret; |
| 56682 | } | 57481 | } |
| 56683 | #endif | 57482 | __ai int16x8_t vreinterpretq_s16_p64(poly64x2_t __p0) { |
| 56684 | | 57483 | int16x8_t __ret; |
| 56685 | #ifdef __LITTLE_ENDIAN__ | 57484 | __ret = (int16x8_t)(__p0); |
| 56686 | __ai int32x4_t vmovn_high_s64(int32x2_t __p0, int64x2_t __p1) { | | |
| 56687 | int32x4_t __ret; | | |
| 56688 | __ret = vcombine_s32(__p0, vmovn_s64(__p1)); | | |
| 56689 | return __ret; | 57485 | return __ret; |
| 56690 | } | 57486 | } |
| 56691 | #else | 57487 | __ai int16x8_t vreinterpretq_s16_p16(poly16x8_t __p0) { |
| 56692 | __ai int32x4_t vmovn_high_s64(int32x2_t __p0, int64x2_t __p1) { | 57488 | int16x8_t __ret; |
| 56693 | int32x4_t __ret; | 57489 | __ret = (int16x8_t)(__p0); |
| 56694 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 56695 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 56696 | __ret = __noswap_vcombine_s32(__rev0, __noswap_vmovn_s64(__rev1)); | | |
| 56697 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 56698 | return __ret; | 57490 | return __ret; |
| 56699 | } | 57491 | } |
| 56700 | #endif | 57492 | __ai int16x8_t vreinterpretq_s16_u8(uint8x16_t __p0) { |
| 56701 | | 57493 | int16x8_t __ret; |
| 56702 | #ifdef __LITTLE_ENDIAN__ | 57494 | __ret = (int16x8_t)(__p0); |
| 56703 | __ai int8x16_t vmovn_high_s16(int8x8_t __p0, int16x8_t __p1) { | | |
| 56704 | int8x16_t __ret; | | |
| 56705 | __ret = vcombine_s8(__p0, vmovn_s16(__p1)); | | |
| 56706 | return __ret; | 57495 | return __ret; |
| 56707 | } | 57496 | } |
| 56708 | #else | 57497 | __ai int16x8_t vreinterpretq_s16_u32(uint32x4_t __p0) { |
| 56709 | __ai int8x16_t vmovn_high_s16(int8x8_t __p0, int16x8_t __p1) { | 57498 | int16x8_t __ret; |
| 56710 | int8x16_t __ret; | 57499 | __ret = (int16x8_t)(__p0); |
| 56711 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 56712 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 56713 | __ret = __noswap_vcombine_s8(__rev0, __noswap_vmovn_s16(__rev1)); | | |
| 56714 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 56715 | return __ret; | 57500 | return __ret; |
| 56716 | } | 57501 | } |
| 56717 | #endif | 57502 | __ai int16x8_t vreinterpretq_s16_u64(uint64x2_t __p0) { |
| 56718 | | 57503 | int16x8_t __ret; |
| 56719 | #ifdef __LITTLE_ENDIAN__ | 57504 | __ret = (int16x8_t)(__p0); |
| 56720 | __ai float64x2_t vmulq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 56721 | float64x2_t __ret; | | |
| 56722 | __ret = __p0 * __p1; | | |
| 56723 | return __ret; | 57505 | return __ret; |
| 56724 | } | 57506 | } |
| 56725 | #else | 57507 | __ai int16x8_t vreinterpretq_s16_u16(uint16x8_t __p0) { |
| 56726 | __ai float64x2_t vmulq_f64(float64x2_t __p0, float64x2_t __p1) { | 57508 | int16x8_t __ret; |
| 56727 | float64x2_t __ret; | 57509 | __ret = (int16x8_t)(__p0); |
| 56728 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 56729 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 56730 | __ret = __rev0 * __rev1; | | |
| 56731 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 56732 | return __ret; | 57510 | return __ret; |
| 56733 | } | 57511 | } |
| 56734 | #endif | 57512 | __ai int16x8_t vreinterpretq_s16_s8(int8x16_t __p0) { |
| 56735 | | 57513 | int16x8_t __ret; |
| 56736 | __ai float64x1_t vmul_f64(float64x1_t __p0, float64x1_t __p1) { | 57514 | __ret = (int16x8_t)(__p0); |
| 56737 | float64x1_t __ret; | | |
| 56738 | __ret = __p0 * __p1; | | |
| 56739 | return __ret; | 57515 | return __ret; |
| 56740 | } | 57516 | } |
| 56741 | #define vmuld_lane_f64(__p0_637, __p1_637, __p2_637) __extension__ ({ \ | 57517 | __ai int16x8_t vreinterpretq_s16_f64(float64x2_t __p0) { |
| 56742 | float64_t __ret_637; \ | 57518 | int16x8_t __ret; |
| 56743 | float64_t __s0_637 = __p0_637; \ | 57519 | __ret = (int16x8_t)(__p0); |
| 56744 | float64x1_t __s1_637 = __p1_637; \ | 57520 | return __ret; |
| 56745 | __ret_637 = __s0_637 * vget_lane_f64(__s1_637, __p2_637); \ | 57521 | } |
| 56746 | __ret_637; \ | 57522 | __ai int16x8_t vreinterpretq_s16_f32(float32x4_t __p0) { |
| 56747 | }) | 57523 | int16x8_t __ret; |
| 56748 | #ifdef __LITTLE_ENDIAN__ | 57524 | __ret = (int16x8_t)(__p0); |
| 56749 | #define vmuls_lane_f32(__p0_638, __p1_638, __p2_638) __extension__ ({ \ | 57525 | return __ret; |
| 56750 | float32_t __ret_638; \ | 57526 | } |
| 56751 | float32_t __s0_638 = __p0_638; \ | 57527 | __ai int16x8_t vreinterpretq_s16_f16(float16x8_t __p0) { |
| 56752 | float32x2_t __s1_638 = __p1_638; \ | 57528 | int16x8_t __ret; |
| 56753 | __ret_638 = __s0_638 * vget_lane_f32(__s1_638, __p2_638); \ | 57529 | __ret = (int16x8_t)(__p0); |
| 56754 | __ret_638; \ | 57530 | return __ret; |
| 56755 | }) | 57531 | } |
| 56756 | #else | 57532 | __ai int16x8_t vreinterpretq_s16_s32(int32x4_t __p0) { |
| 56757 | #define vmuls_lane_f32(__p0_639, __p1_639, __p2_639) __extension__ ({ \ | 57533 | int16x8_t __ret; |
| 56758 | float32_t __ret_639; \ | 57534 | __ret = (int16x8_t)(__p0); |
| 56759 | float32_t __s0_639 = __p0_639; \ | 57535 | return __ret; |
| 56760 | float32x2_t __s1_639 = __p1_639; \ | 57536 | } |
| 56761 | float32x2_t __rev1_639; __rev1_639 = __builtin_shufflevector(__s1_639, __s1_639, 1, 0); \ | 57537 | __ai int16x8_t vreinterpretq_s16_s64(int64x2_t __p0) { |
| 56762 | __ret_639 = __s0_639 * __noswap_vget_lane_f32(__rev1_639, __p2_639); \ | 57538 | int16x8_t __ret; |
| 56763 | __ret_639; \ | 57539 | __ret = (int16x8_t)(__p0); |
| 56764 | }) | 57540 | return __ret; |
| 56765 | #endif | 57541 | } |
| 56766 | | 57542 | __ai uint8x8_t vreinterpret_u8_p8(poly8x8_t __p0) { |
| 56767 | #define vmul_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 57543 | uint8x8_t __ret; |
| 56768 | float64x1_t __ret; \ | 57544 | __ret = (uint8x8_t)(__p0); |
| 56769 | float64x1_t __s0 = __p0; \ | 57545 | return __ret; |
| 56770 | float64x1_t __s1 = __p1; \ | 57546 | } |
| 56771 | __ret = (float64x1_t) __builtin_neon_vmul_lane_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 10); \ | 57547 | __ai uint8x8_t vreinterpret_u8_p64(poly64x1_t __p0) { |
| 56772 | __ret; \ | 57548 | uint8x8_t __ret; |
| 56773 | }) | 57549 | __ret = (uint8x8_t)(__p0); |
| 56774 | #ifdef __LITTLE_ENDIAN__ | 57550 | return __ret; |
| 56775 | #define vmulq_lane_f64(__p0_640, __p1_640, __p2_640) __extension__ ({ \ | 57551 | } |
| 56776 | float64x2_t __ret_640; \ | 57552 | __ai uint8x8_t vreinterpret_u8_p16(poly16x4_t __p0) { |
| 56777 | float64x2_t __s0_640 = __p0_640; \ | 57553 | uint8x8_t __ret; |
| 56778 | float64x1_t __s1_640 = __p1_640; \ | 57554 | __ret = (uint8x8_t)(__p0); |
| 56779 | __ret_640 = __s0_640 * splatq_lane_f64(__s1_640, __p2_640); \ | 57555 | return __ret; |
| 56780 | __ret_640; \ | 57556 | } |
| 56781 | }) | 57557 | __ai uint8x8_t vreinterpret_u8_u32(uint32x2_t __p0) { |
| 56782 | #else | 57558 | uint8x8_t __ret; |
| 56783 | #define vmulq_lane_f64(__p0_641, __p1_641, __p2_641) __extension__ ({ \ | 57559 | __ret = (uint8x8_t)(__p0); |
| 56784 | float64x2_t __ret_641; \ | | |
| 56785 | float64x2_t __s0_641 = __p0_641; \ | | |
| 56786 | float64x1_t __s1_641 = __p1_641; \ | | |
| 56787 | float64x2_t __rev0_641; __rev0_641 = __builtin_shufflevector(__s0_641, __s0_641, 1, 0); \ | | |
| 56788 | __ret_641 = __rev0_641 * __noswap_splatq_lane_f64(__s1_641, __p2_641); \ | | |
| 56789 | __ret_641 = __builtin_shufflevector(__ret_641, __ret_641, 1, 0); \ | | |
| 56790 | __ret_641; \ | | |
| 56791 | }) | | |
| 56792 | #endif | | |
| 56793 | | | |
| 56794 | #ifdef __LITTLE_ENDIAN__ | | |
| 56795 | #define vmuld_laneq_f64(__p0_642, __p1_642, __p2_642) __extension__ ({ \ | | |
| 56796 | float64_t __ret_642; \ | | |
| 56797 | float64_t __s0_642 = __p0_642; \ | | |
| 56798 | float64x2_t __s1_642 = __p1_642; \ | | |
| 56799 | __ret_642 = __s0_642 * vgetq_lane_f64(__s1_642, __p2_642); \ | | |
| 56800 | __ret_642; \ | | |
| 56801 | }) | | |
| 56802 | #else | | |
| 56803 | #define vmuld_laneq_f64(__p0_643, __p1_643, __p2_643) __extension__ ({ \ | | |
| 56804 | float64_t __ret_643; \ | | |
| 56805 | float64_t __s0_643 = __p0_643; \ | | |
| 56806 | float64x2_t __s1_643 = __p1_643; \ | | |
| 56807 | float64x2_t __rev1_643; __rev1_643 = __builtin_shufflevector(__s1_643, __s1_643, 1, 0); \ | | |
| 56808 | __ret_643 = __s0_643 * __noswap_vgetq_lane_f64(__rev1_643, __p2_643); \ | | |
| 56809 | __ret_643; \ | | |
| 56810 | }) | | |
| 56811 | #endif | | |
| 56812 | | | |
| 56813 | #ifdef __LITTLE_ENDIAN__ | | |
| 56814 | #define vmuls_laneq_f32(__p0_644, __p1_644, __p2_644) __extension__ ({ \ | | |
| 56815 | float32_t __ret_644; \ | | |
| 56816 | float32_t __s0_644 = __p0_644; \ | | |
| 56817 | float32x4_t __s1_644 = __p1_644; \ | | |
| 56818 | __ret_644 = __s0_644 * vgetq_lane_f32(__s1_644, __p2_644); \ | | |
| 56819 | __ret_644; \ | | |
| 56820 | }) | | |
| 56821 | #else | | |
| 56822 | #define vmuls_laneq_f32(__p0_645, __p1_645, __p2_645) __extension__ ({ \ | | |
| 56823 | float32_t __ret_645; \ | | |
| 56824 | float32_t __s0_645 = __p0_645; \ | | |
| 56825 | float32x4_t __s1_645 = __p1_645; \ | | |
| 56826 | float32x4_t __rev1_645; __rev1_645 = __builtin_shufflevector(__s1_645, __s1_645, 3, 2, 1, 0); \ | | |
| 56827 | __ret_645 = __s0_645 * __noswap_vgetq_lane_f32(__rev1_645, __p2_645); \ | | |
| 56828 | __ret_645; \ | | |
| 56829 | }) | | |
| 56830 | #endif | | |
| 56831 | | | |
| 56832 | #ifdef __LITTLE_ENDIAN__ | | |
| 56833 | #define vmul_laneq_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 56834 | float64x1_t __ret; \ | | |
| 56835 | float64x1_t __s0 = __p0; \ | | |
| 56836 | float64x2_t __s1 = __p1; \ | | |
| 56837 | __ret = (float64x1_t) __builtin_neon_vmul_laneq_v((int8x8_t)__s0, (int8x16_t)__s1, __p2, 10); \ | | |
| 56838 | __ret; \ | | |
| 56839 | }) | | |
| 56840 | #else | | |
| 56841 | #define vmul_laneq_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 56842 | float64x1_t __ret; \ | | |
| 56843 | float64x1_t __s0 = __p0; \ | | |
| 56844 | float64x2_t __s1 = __p1; \ | | |
| 56845 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | | |
| 56846 | __ret = (float64x1_t) __builtin_neon_vmul_laneq_v((int8x8_t)__s0, (int8x16_t)__rev1, __p2, 10); \ | | |
| 56847 | __ret; \ | | |
| 56848 | }) | | |
| 56849 | #endif | | |
| 56850 | | | |
| 56851 | #ifdef __LITTLE_ENDIAN__ | | |
| 56852 | #define vmulq_laneq_u32(__p0_646, __p1_646, __p2_646) __extension__ ({ \ | | |
| 56853 | uint32x4_t __ret_646; \ | | |
| 56854 | uint32x4_t __s0_646 = __p0_646; \ | | |
| 56855 | uint32x4_t __s1_646 = __p1_646; \ | | |
| 56856 | __ret_646 = __s0_646 * splatq_laneq_u32(__s1_646, __p2_646); \ | | |
| 56857 | __ret_646; \ | | |
| 56858 | }) | | |
| 56859 | #else | | |
| 56860 | #define vmulq_laneq_u32(__p0_647, __p1_647, __p2_647) __extension__ ({ \ | | |
| 56861 | uint32x4_t __ret_647; \ | | |
| 56862 | uint32x4_t __s0_647 = __p0_647; \ | | |
| 56863 | uint32x4_t __s1_647 = __p1_647; \ | | |
| 56864 | uint32x4_t __rev0_647; __rev0_647 = __builtin_shufflevector(__s0_647, __s0_647, 3, 2, 1, 0); \ | | |
| 56865 | uint32x4_t __rev1_647; __rev1_647 = __builtin_shufflevector(__s1_647, __s1_647, 3, 2, 1, 0); \ | | |
| 56866 | __ret_647 = __rev0_647 * __noswap_splatq_laneq_u32(__rev1_647, __p2_647); \ | | |
| 56867 | __ret_647 = __builtin_shufflevector(__ret_647, __ret_647, 3, 2, 1, 0); \ | | |
| 56868 | __ret_647; \ | | |
| 56869 | }) | | |
| 56870 | #endif | | |
| 56871 | | | |
| 56872 | #ifdef __LITTLE_ENDIAN__ | | |
| 56873 | #define vmulq_laneq_u16(__p0_648, __p1_648, __p2_648) __extension__ ({ \ | | |
| 56874 | uint16x8_t __ret_648; \ | | |
| 56875 | uint16x8_t __s0_648 = __p0_648; \ | | |
| 56876 | uint16x8_t __s1_648 = __p1_648; \ | | |
| 56877 | __ret_648 = __s0_648 * splatq_laneq_u16(__s1_648, __p2_648); \ | | |
| 56878 | __ret_648; \ | | |
| 56879 | }) | | |
| 56880 | #else | | |
| 56881 | #define vmulq_laneq_u16(__p0_649, __p1_649, __p2_649) __extension__ ({ \ | | |
| 56882 | uint16x8_t __ret_649; \ | | |
| 56883 | uint16x8_t __s0_649 = __p0_649; \ | | |
| 56884 | uint16x8_t __s1_649 = __p1_649; \ | | |
| 56885 | uint16x8_t __rev0_649; __rev0_649 = __builtin_shufflevector(__s0_649, __s0_649, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56886 | uint16x8_t __rev1_649; __rev1_649 = __builtin_shufflevector(__s1_649, __s1_649, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56887 | __ret_649 = __rev0_649 * __noswap_splatq_laneq_u16(__rev1_649, __p2_649); \ | | |
| 56888 | __ret_649 = __builtin_shufflevector(__ret_649, __ret_649, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56889 | __ret_649; \ | | |
| 56890 | }) | | |
| 56891 | #endif | | |
| 56892 | | | |
| 56893 | #ifdef __LITTLE_ENDIAN__ | | |
| 56894 | #define vmulq_laneq_f64(__p0_650, __p1_650, __p2_650) __extension__ ({ \ | | |
| 56895 | float64x2_t __ret_650; \ | | |
| 56896 | float64x2_t __s0_650 = __p0_650; \ | | |
| 56897 | float64x2_t __s1_650 = __p1_650; \ | | |
| 56898 | __ret_650 = __s0_650 * splatq_laneq_f64(__s1_650, __p2_650); \ | | |
| 56899 | __ret_650; \ | | |
| 56900 | }) | | |
| 56901 | #else | | |
| 56902 | #define vmulq_laneq_f64(__p0_651, __p1_651, __p2_651) __extension__ ({ \ | | |
| 56903 | float64x2_t __ret_651; \ | | |
| 56904 | float64x2_t __s0_651 = __p0_651; \ | | |
| 56905 | float64x2_t __s1_651 = __p1_651; \ | | |
| 56906 | float64x2_t __rev0_651; __rev0_651 = __builtin_shufflevector(__s0_651, __s0_651, 1, 0); \ | | |
| 56907 | float64x2_t __rev1_651; __rev1_651 = __builtin_shufflevector(__s1_651, __s1_651, 1, 0); \ | | |
| 56908 | __ret_651 = __rev0_651 * __noswap_splatq_laneq_f64(__rev1_651, __p2_651); \ | | |
| 56909 | __ret_651 = __builtin_shufflevector(__ret_651, __ret_651, 1, 0); \ | | |
| 56910 | __ret_651; \ | | |
| 56911 | }) | | |
| 56912 | #endif | | |
| 56913 | | | |
| 56914 | #ifdef __LITTLE_ENDIAN__ | | |
| 56915 | #define vmulq_laneq_f32(__p0_652, __p1_652, __p2_652) __extension__ ({ \ | | |
| 56916 | float32x4_t __ret_652; \ | | |
| 56917 | float32x4_t __s0_652 = __p0_652; \ | | |
| 56918 | float32x4_t __s1_652 = __p1_652; \ | | |
| 56919 | __ret_652 = __s0_652 * splatq_laneq_f32(__s1_652, __p2_652); \ | | |
| 56920 | __ret_652; \ | | |
| 56921 | }) | | |
| 56922 | #else | | |
| 56923 | #define vmulq_laneq_f32(__p0_653, __p1_653, __p2_653) __extension__ ({ \ | | |
| 56924 | float32x4_t __ret_653; \ | | |
| 56925 | float32x4_t __s0_653 = __p0_653; \ | | |
| 56926 | float32x4_t __s1_653 = __p1_653; \ | | |
| 56927 | float32x4_t __rev0_653; __rev0_653 = __builtin_shufflevector(__s0_653, __s0_653, 3, 2, 1, 0); \ | | |
| 56928 | float32x4_t __rev1_653; __rev1_653 = __builtin_shufflevector(__s1_653, __s1_653, 3, 2, 1, 0); \ | | |
| 56929 | __ret_653 = __rev0_653 * __noswap_splatq_laneq_f32(__rev1_653, __p2_653); \ | | |
| 56930 | __ret_653 = __builtin_shufflevector(__ret_653, __ret_653, 3, 2, 1, 0); \ | | |
| 56931 | __ret_653; \ | | |
| 56932 | }) | | |
| 56933 | #endif | | |
| 56934 | | | |
| 56935 | #ifdef __LITTLE_ENDIAN__ | | |
| 56936 | #define vmulq_laneq_s32(__p0_654, __p1_654, __p2_654) __extension__ ({ \ | | |
| 56937 | int32x4_t __ret_654; \ | | |
| 56938 | int32x4_t __s0_654 = __p0_654; \ | | |
| 56939 | int32x4_t __s1_654 = __p1_654; \ | | |
| 56940 | __ret_654 = __s0_654 * splatq_laneq_s32(__s1_654, __p2_654); \ | | |
| 56941 | __ret_654; \ | | |
| 56942 | }) | | |
| 56943 | #else | | |
| 56944 | #define vmulq_laneq_s32(__p0_655, __p1_655, __p2_655) __extension__ ({ \ | | |
| 56945 | int32x4_t __ret_655; \ | | |
| 56946 | int32x4_t __s0_655 = __p0_655; \ | | |
| 56947 | int32x4_t __s1_655 = __p1_655; \ | | |
| 56948 | int32x4_t __rev0_655; __rev0_655 = __builtin_shufflevector(__s0_655, __s0_655, 3, 2, 1, 0); \ | | |
| 56949 | int32x4_t __rev1_655; __rev1_655 = __builtin_shufflevector(__s1_655, __s1_655, 3, 2, 1, 0); \ | | |
| 56950 | __ret_655 = __rev0_655 * __noswap_splatq_laneq_s32(__rev1_655, __p2_655); \ | | |
| 56951 | __ret_655 = __builtin_shufflevector(__ret_655, __ret_655, 3, 2, 1, 0); \ | | |
| 56952 | __ret_655; \ | | |
| 56953 | }) | | |
| 56954 | #endif | | |
| 56955 | | | |
| 56956 | #ifdef __LITTLE_ENDIAN__ | | |
| 56957 | #define vmulq_laneq_s16(__p0_656, __p1_656, __p2_656) __extension__ ({ \ | | |
| 56958 | int16x8_t __ret_656; \ | | |
| 56959 | int16x8_t __s0_656 = __p0_656; \ | | |
| 56960 | int16x8_t __s1_656 = __p1_656; \ | | |
| 56961 | __ret_656 = __s0_656 * splatq_laneq_s16(__s1_656, __p2_656); \ | | |
| 56962 | __ret_656; \ | | |
| 56963 | }) | | |
| 56964 | #else | | |
| 56965 | #define vmulq_laneq_s16(__p0_657, __p1_657, __p2_657) __extension__ ({ \ | | |
| 56966 | int16x8_t __ret_657; \ | | |
| 56967 | int16x8_t __s0_657 = __p0_657; \ | | |
| 56968 | int16x8_t __s1_657 = __p1_657; \ | | |
| 56969 | int16x8_t __rev0_657; __rev0_657 = __builtin_shufflevector(__s0_657, __s0_657, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56970 | int16x8_t __rev1_657; __rev1_657 = __builtin_shufflevector(__s1_657, __s1_657, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56971 | __ret_657 = __rev0_657 * __noswap_splatq_laneq_s16(__rev1_657, __p2_657); \ | | |
| 56972 | __ret_657 = __builtin_shufflevector(__ret_657, __ret_657, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 56973 | __ret_657; \ | | |
| 56974 | }) | | |
| 56975 | #endif | | |
| 56976 | | | |
| 56977 | #ifdef __LITTLE_ENDIAN__ | | |
| 56978 | #define vmul_laneq_u32(__p0_658, __p1_658, __p2_658) __extension__ ({ \ | | |
| 56979 | uint32x2_t __ret_658; \ | | |
| 56980 | uint32x2_t __s0_658 = __p0_658; \ | | |
| 56981 | uint32x4_t __s1_658 = __p1_658; \ | | |
| 56982 | __ret_658 = __s0_658 * splat_laneq_u32(__s1_658, __p2_658); \ | | |
| 56983 | __ret_658; \ | | |
| 56984 | }) | | |
| 56985 | #else | | |
| 56986 | #define vmul_laneq_u32(__p0_659, __p1_659, __p2_659) __extension__ ({ \ | | |
| 56987 | uint32x2_t __ret_659; \ | | |
| 56988 | uint32x2_t __s0_659 = __p0_659; \ | | |
| 56989 | uint32x4_t __s1_659 = __p1_659; \ | | |
| 56990 | uint32x2_t __rev0_659; __rev0_659 = __builtin_shufflevector(__s0_659, __s0_659, 1, 0); \ | | |
| 56991 | uint32x4_t __rev1_659; __rev1_659 = __builtin_shufflevector(__s1_659, __s1_659, 3, 2, 1, 0); \ | | |
| 56992 | __ret_659 = __rev0_659 * __noswap_splat_laneq_u32(__rev1_659, __p2_659); \ | | |
| 56993 | __ret_659 = __builtin_shufflevector(__ret_659, __ret_659, 1, 0); \ | | |
| 56994 | __ret_659; \ | | |
| 56995 | }) | | |
| 56996 | #endif | | |
| 56997 | | | |
| 56998 | #ifdef __LITTLE_ENDIAN__ | | |
| 56999 | #define vmul_laneq_u16(__p0_660, __p1_660, __p2_660) __extension__ ({ \ | | |
| 57000 | uint16x4_t __ret_660; \ | | |
| 57001 | uint16x4_t __s0_660 = __p0_660; \ | | |
| 57002 | uint16x8_t __s1_660 = __p1_660; \ | | |
| 57003 | __ret_660 = __s0_660 * splat_laneq_u16(__s1_660, __p2_660); \ | | |
| 57004 | __ret_660; \ | | |
| 57005 | }) | | |
| 57006 | #else | | |
| 57007 | #define vmul_laneq_u16(__p0_661, __p1_661, __p2_661) __extension__ ({ \ | | |
| 57008 | uint16x4_t __ret_661; \ | | |
| 57009 | uint16x4_t __s0_661 = __p0_661; \ | | |
| 57010 | uint16x8_t __s1_661 = __p1_661; \ | | |
| 57011 | uint16x4_t __rev0_661; __rev0_661 = __builtin_shufflevector(__s0_661, __s0_661, 3, 2, 1, 0); \ | | |
| 57012 | uint16x8_t __rev1_661; __rev1_661 = __builtin_shufflevector(__s1_661, __s1_661, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 57013 | __ret_661 = __rev0_661 * __noswap_splat_laneq_u16(__rev1_661, __p2_661); \ | | |
| 57014 | __ret_661 = __builtin_shufflevector(__ret_661, __ret_661, 3, 2, 1, 0); \ | | |
| 57015 | __ret_661; \ | | |
| 57016 | }) | | |
| 57017 | #endif | | |
| 57018 | | | |
| 57019 | #ifdef __LITTLE_ENDIAN__ | | |
| 57020 | #define vmul_laneq_f32(__p0_662, __p1_662, __p2_662) __extension__ ({ \ | | |
| 57021 | float32x2_t __ret_662; \ | | |
| 57022 | float32x2_t __s0_662 = __p0_662; \ | | |
| 57023 | float32x4_t __s1_662 = __p1_662; \ | | |
| 57024 | __ret_662 = __s0_662 * splat_laneq_f32(__s1_662, __p2_662); \ | | |
| 57025 | __ret_662; \ | | |
| 57026 | }) | | |
| 57027 | #else | | |
| 57028 | #define vmul_laneq_f32(__p0_663, __p1_663, __p2_663) __extension__ ({ \ | | |
| 57029 | float32x2_t __ret_663; \ | | |
| 57030 | float32x2_t __s0_663 = __p0_663; \ | | |
| 57031 | float32x4_t __s1_663 = __p1_663; \ | | |
| 57032 | float32x2_t __rev0_663; __rev0_663 = __builtin_shufflevector(__s0_663, __s0_663, 1, 0); \ | | |
| 57033 | float32x4_t __rev1_663; __rev1_663 = __builtin_shufflevector(__s1_663, __s1_663, 3, 2, 1, 0); \ | | |
| 57034 | __ret_663 = __rev0_663 * __noswap_splat_laneq_f32(__rev1_663, __p2_663); \ | | |
| 57035 | __ret_663 = __builtin_shufflevector(__ret_663, __ret_663, 1, 0); \ | | |
| 57036 | __ret_663; \ | | |
| 57037 | }) | | |
| 57038 | #endif | | |
| 57039 | | | |
| 57040 | #ifdef __LITTLE_ENDIAN__ | | |
| 57041 | #define vmul_laneq_s32(__p0_664, __p1_664, __p2_664) __extension__ ({ \ | | |
| 57042 | int32x2_t __ret_664; \ | | |
| 57043 | int32x2_t __s0_664 = __p0_664; \ | | |
| 57044 | int32x4_t __s1_664 = __p1_664; \ | | |
| 57045 | __ret_664 = __s0_664 * splat_laneq_s32(__s1_664, __p2_664); \ | | |
| 57046 | __ret_664; \ | | |
| 57047 | }) | | |
| 57048 | #else | | |
| 57049 | #define vmul_laneq_s32(__p0_665, __p1_665, __p2_665) __extension__ ({ \ | | |
| 57050 | int32x2_t __ret_665; \ | | |
| 57051 | int32x2_t __s0_665 = __p0_665; \ | | |
| 57052 | int32x4_t __s1_665 = __p1_665; \ | | |
| 57053 | int32x2_t __rev0_665; __rev0_665 = __builtin_shufflevector(__s0_665, __s0_665, 1, 0); \ | | |
| 57054 | int32x4_t __rev1_665; __rev1_665 = __builtin_shufflevector(__s1_665, __s1_665, 3, 2, 1, 0); \ | | |
| 57055 | __ret_665 = __rev0_665 * __noswap_splat_laneq_s32(__rev1_665, __p2_665); \ | | |
| 57056 | __ret_665 = __builtin_shufflevector(__ret_665, __ret_665, 1, 0); \ | | |
| 57057 | __ret_665; \ | | |
| 57058 | }) | | |
| 57059 | #endif | | |
| 57060 | | | |
| 57061 | #ifdef __LITTLE_ENDIAN__ | | |
| 57062 | #define vmul_laneq_s16(__p0_666, __p1_666, __p2_666) __extension__ ({ \ | | |
| 57063 | int16x4_t __ret_666; \ | | |
| 57064 | int16x4_t __s0_666 = __p0_666; \ | | |
| 57065 | int16x8_t __s1_666 = __p1_666; \ | | |
| 57066 | __ret_666 = __s0_666 * splat_laneq_s16(__s1_666, __p2_666); \ | | |
| 57067 | __ret_666; \ | | |
| 57068 | }) | | |
| 57069 | #else | | |
| 57070 | #define vmul_laneq_s16(__p0_667, __p1_667, __p2_667) __extension__ ({ \ | | |
| 57071 | int16x4_t __ret_667; \ | | |
| 57072 | int16x4_t __s0_667 = __p0_667; \ | | |
| 57073 | int16x8_t __s1_667 = __p1_667; \ | | |
| 57074 | int16x4_t __rev0_667; __rev0_667 = __builtin_shufflevector(__s0_667, __s0_667, 3, 2, 1, 0); \ | | |
| 57075 | int16x8_t __rev1_667; __rev1_667 = __builtin_shufflevector(__s1_667, __s1_667, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 57076 | __ret_667 = __rev0_667 * __noswap_splat_laneq_s16(__rev1_667, __p2_667); \ | | |
| 57077 | __ret_667 = __builtin_shufflevector(__ret_667, __ret_667, 3, 2, 1, 0); \ | | |
| 57078 | __ret_667; \ | | |
| 57079 | }) | | |
| 57080 | #endif | | |
| 57081 | | | |
| 57082 | __ai float64x1_t vmul_n_f64(float64x1_t __p0, float64_t __p1) { | | |
| 57083 | float64x1_t __ret; | | |
| 57084 | __ret = (float64x1_t) __builtin_neon_vmul_n_f64((float64x1_t)__p0, __p1); | | |
| 57085 | return __ret; | 57560 | return __ret; |
| 57086 | } | 57561 | } |
| 57087 | #ifdef __LITTLE_ENDIAN__ | 57562 | __ai uint8x8_t vreinterpret_u8_u64(uint64x1_t __p0) { |
| 57088 | __ai float64x2_t vmulq_n_f64(float64x2_t __p0, float64_t __p1) { | 57563 | uint8x8_t __ret; |
| 57089 | float64x2_t __ret; | 57564 | __ret = (uint8x8_t)(__p0); |
| 57090 | __ret = __p0 * (float64x2_t) {__p1, __p1}; | | |
| 57091 | return __ret; | 57565 | return __ret; |
| 57092 | } | 57566 | } |
| 57093 | #else | 57567 | __ai uint8x8_t vreinterpret_u8_u16(uint16x4_t __p0) { |
| 57094 | __ai float64x2_t vmulq_n_f64(float64x2_t __p0, float64_t __p1) { | 57568 | uint8x8_t __ret; |
| 57095 | float64x2_t __ret; | 57569 | __ret = (uint8x8_t)(__p0); |
| 57096 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 57097 | __ret = __rev0 * (float64x2_t) {__p1, __p1}; | | |
| 57098 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 57099 | return __ret; | 57570 | return __ret; |
| 57100 | } | 57571 | } |
| 57101 | #endif | 57572 | __ai uint8x8_t vreinterpret_u8_s8(int8x8_t __p0) { |
| 57102 | | 57573 | uint8x8_t __ret; |
| 57103 | __ai poly128_t vmull_p64(poly64_t __p0, poly64_t __p1) { | 57574 | __ret = (uint8x8_t)(__p0); |
| 57104 | poly128_t __ret; | | |
| 57105 | __ret = (poly128_t) __builtin_neon_vmull_p64(__p0, __p1); | | |
| 57106 | return __ret; | 57575 | return __ret; |
| 57107 | } | 57576 | } |
| 57108 | #ifdef __LITTLE_ENDIAN__ | 57577 | __ai uint8x8_t vreinterpret_u8_f64(float64x1_t __p0) { |
| 57109 | __ai poly16x8_t vmull_high_p8(poly8x16_t __p0, poly8x16_t __p1) { | 57578 | uint8x8_t __ret; |
| 57110 | poly16x8_t __ret; | 57579 | __ret = (uint8x8_t)(__p0); |
| 57111 | __ret = vmull_p8(vget_high_p8(__p0), vget_high_p8(__p1)); | | |
| 57112 | return __ret; | 57580 | return __ret; |
| 57113 | } | 57581 | } |
| 57114 | #else | 57582 | __ai uint8x8_t vreinterpret_u8_f32(float32x2_t __p0) { |
| 57115 | __ai poly16x8_t vmull_high_p8(poly8x16_t __p0, poly8x16_t __p1) { | 57583 | uint8x8_t __ret; |
| 57116 | poly16x8_t __ret; | 57584 | __ret = (uint8x8_t)(__p0); |
| 57117 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57118 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57119 | __ret = __noswap_vmull_p8(__noswap_vget_high_p8(__rev0), __noswap_vget_high_p8(__rev1)); | | |
| 57120 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57121 | return __ret; | 57585 | return __ret; |
| 57122 | } | 57586 | } |
| 57123 | #endif | 57587 | __ai uint8x8_t vreinterpret_u8_f16(float16x4_t __p0) { |
| 57124 | | 57588 | uint8x8_t __ret; |
| 57125 | #ifdef __LITTLE_ENDIAN__ | 57589 | __ret = (uint8x8_t)(__p0); |
| 57126 | __ai uint16x8_t vmull_high_u8(uint8x16_t __p0, uint8x16_t __p1) { | | |
| 57127 | uint16x8_t __ret; | | |
| 57128 | __ret = vmull_u8(vget_high_u8(__p0), vget_high_u8(__p1)); | | |
| 57129 | return __ret; | 57590 | return __ret; |
| 57130 | } | 57591 | } |
| 57131 | #else | 57592 | __ai uint8x8_t vreinterpret_u8_s32(int32x2_t __p0) { |
| 57132 | __ai uint16x8_t vmull_high_u8(uint8x16_t __p0, uint8x16_t __p1) { | 57593 | uint8x8_t __ret; |
| 57133 | uint16x8_t __ret; | 57594 | __ret = (uint8x8_t)(__p0); |
| 57134 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57135 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57136 | __ret = __noswap_vmull_u8(__noswap_vget_high_u8(__rev0), __noswap_vget_high_u8(__rev1)); | | |
| 57137 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57138 | return __ret; | 57595 | return __ret; |
| 57139 | } | 57596 | } |
| 57140 | #endif | 57597 | __ai uint8x8_t vreinterpret_u8_s64(int64x1_t __p0) { |
| 57141 | | 57598 | uint8x8_t __ret; |
| 57142 | #ifdef __LITTLE_ENDIAN__ | 57599 | __ret = (uint8x8_t)(__p0); |
| 57143 | __ai uint64x2_t vmull_high_u32(uint32x4_t __p0, uint32x4_t __p1) { | | |
| 57144 | uint64x2_t __ret; | | |
| 57145 | __ret = vmull_u32(vget_high_u32(__p0), vget_high_u32(__p1)); | | |
| 57146 | return __ret; | 57600 | return __ret; |
| 57147 | } | 57601 | } |
| 57148 | #else | 57602 | __ai uint8x8_t vreinterpret_u8_s16(int16x4_t __p0) { |
| 57149 | __ai uint64x2_t vmull_high_u32(uint32x4_t __p0, uint32x4_t __p1) { | 57603 | uint8x8_t __ret; |
| 57150 | uint64x2_t __ret; | 57604 | __ret = (uint8x8_t)(__p0); |
| 57151 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 57152 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 57153 | __ret = __noswap_vmull_u32(__noswap_vget_high_u32(__rev0), __noswap_vget_high_u32(__rev1)); | | |
| 57154 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 57155 | return __ret; | 57605 | return __ret; |
| 57156 | } | 57606 | } |
| 57157 | #endif | 57607 | __ai uint32x2_t vreinterpret_u32_p8(poly8x8_t __p0) { |
| 57158 | | 57608 | uint32x2_t __ret; |
| 57159 | #ifdef __LITTLE_ENDIAN__ | 57609 | __ret = (uint32x2_t)(__p0); |
| 57160 | __ai uint32x4_t vmull_high_u16(uint16x8_t __p0, uint16x8_t __p1) { | | |
| 57161 | uint32x4_t __ret; | | |
| 57162 | __ret = vmull_u16(vget_high_u16(__p0), vget_high_u16(__p1)); | | |
| 57163 | return __ret; | 57610 | return __ret; |
| 57164 | } | 57611 | } |
| 57165 | #else | 57612 | __ai uint32x2_t vreinterpret_u32_p64(poly64x1_t __p0) { |
| 57166 | __ai uint32x4_t vmull_high_u16(uint16x8_t __p0, uint16x8_t __p1) { | 57613 | uint32x2_t __ret; |
| 57167 | uint32x4_t __ret; | 57614 | __ret = (uint32x2_t)(__p0); |
| 57168 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57169 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57170 | __ret = __noswap_vmull_u16(__noswap_vget_high_u16(__rev0), __noswap_vget_high_u16(__rev1)); | | |
| 57171 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 57172 | return __ret; | 57615 | return __ret; |
| 57173 | } | 57616 | } |
| 57174 | #endif | 57617 | __ai uint32x2_t vreinterpret_u32_p16(poly16x4_t __p0) { |
| 57175 | | 57618 | uint32x2_t __ret; |
| 57176 | #ifdef __LITTLE_ENDIAN__ | 57619 | __ret = (uint32x2_t)(__p0); |
| 57177 | __ai int16x8_t vmull_high_s8(int8x16_t __p0, int8x16_t __p1) { | | |
| 57178 | int16x8_t __ret; | | |
| 57179 | __ret = vmull_s8(vget_high_s8(__p0), vget_high_s8(__p1)); | | |
| 57180 | return __ret; | 57620 | return __ret; |
| 57181 | } | 57621 | } |
| 57182 | #else | 57622 | __ai uint32x2_t vreinterpret_u32_u8(uint8x8_t __p0) { |
| 57183 | __ai int16x8_t vmull_high_s8(int8x16_t __p0, int8x16_t __p1) { | 57623 | uint32x2_t __ret; |
| 57184 | int16x8_t __ret; | 57624 | __ret = (uint32x2_t)(__p0); |
| 57185 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57186 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57187 | __ret = __noswap_vmull_s8(__noswap_vget_high_s8(__rev0), __noswap_vget_high_s8(__rev1)); | | |
| 57188 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57189 | return __ret; | 57625 | return __ret; |
| 57190 | } | 57626 | } |
| 57191 | #endif | 57627 | __ai uint32x2_t vreinterpret_u32_u64(uint64x1_t __p0) { |
| 57192 | | 57628 | uint32x2_t __ret; |
| 57193 | #ifdef __LITTLE_ENDIAN__ | 57629 | __ret = (uint32x2_t)(__p0); |
| 57194 | __ai int64x2_t vmull_high_s32(int32x4_t __p0, int32x4_t __p1) { | | |
| 57195 | int64x2_t __ret; | | |
| 57196 | __ret = vmull_s32(vget_high_s32(__p0), vget_high_s32(__p1)); | | |
| 57197 | return __ret; | 57630 | return __ret; |
| 57198 | } | 57631 | } |
| 57199 | #else | 57632 | __ai uint32x2_t vreinterpret_u32_u16(uint16x4_t __p0) { |
| 57200 | __ai int64x2_t vmull_high_s32(int32x4_t __p0, int32x4_t __p1) { | 57633 | uint32x2_t __ret; |
| 57201 | int64x2_t __ret; | 57634 | __ret = (uint32x2_t)(__p0); |
| 57202 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 57203 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 57204 | __ret = __noswap_vmull_s32(__noswap_vget_high_s32(__rev0), __noswap_vget_high_s32(__rev1)); | | |
| 57205 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 57206 | return __ret; | 57635 | return __ret; |
| 57207 | } | 57636 | } |
| 57208 | #endif | 57637 | __ai uint32x2_t vreinterpret_u32_s8(int8x8_t __p0) { |
| 57209 | | 57638 | uint32x2_t __ret; |
| 57210 | #ifdef __LITTLE_ENDIAN__ | 57639 | __ret = (uint32x2_t)(__p0); |
| 57211 | __ai int32x4_t vmull_high_s16(int16x8_t __p0, int16x8_t __p1) { | | |
| 57212 | int32x4_t __ret; | | |
| 57213 | __ret = vmull_s16(vget_high_s16(__p0), vget_high_s16(__p1)); | | |
| 57214 | return __ret; | 57640 | return __ret; |
| 57215 | } | 57641 | } |
| 57216 | #else | 57642 | __ai uint32x2_t vreinterpret_u32_f64(float64x1_t __p0) { |
| 57217 | __ai int32x4_t vmull_high_s16(int16x8_t __p0, int16x8_t __p1) { | 57643 | uint32x2_t __ret; |
| 57218 | int32x4_t __ret; | 57644 | __ret = (uint32x2_t)(__p0); |
| 57219 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57220 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57221 | __ret = __noswap_vmull_s16(__noswap_vget_high_s16(__rev0), __noswap_vget_high_s16(__rev1)); | | |
| 57222 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 57223 | return __ret; | 57645 | return __ret; |
| 57224 | } | 57646 | } |
| 57225 | #endif | 57647 | __ai uint32x2_t vreinterpret_u32_f32(float32x2_t __p0) { |
| 57226 | | 57648 | uint32x2_t __ret; |
| 57227 | #ifdef __LITTLE_ENDIAN__ | 57649 | __ret = (uint32x2_t)(__p0); |
| 57228 | __ai poly128_t vmull_high_p64(poly64x2_t __p0, poly64x2_t __p1) { | | |
| 57229 | poly128_t __ret; | | |
| 57230 | __ret = vmull_p64((poly64_t)(vget_high_p64(__p0)), (poly64_t)(vget_high_p64(__p1))); | | |
| 57231 | return __ret; | 57650 | return __ret; |
| 57232 | } | 57651 | } |
| 57233 | #else | 57652 | __ai uint32x2_t vreinterpret_u32_f16(float16x4_t __p0) { |
| 57234 | __ai poly128_t vmull_high_p64(poly64x2_t __p0, poly64x2_t __p1) { | 57653 | uint32x2_t __ret; |
| 57235 | poly128_t __ret; | 57654 | __ret = (uint32x2_t)(__p0); |
| 57236 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 57237 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 57238 | __ret = vmull_p64((poly64_t)(__noswap_vget_high_p64(__rev0)), (poly64_t)(__noswap_vget_high_p64(__rev1))); | | |
| 57239 | return __ret; | 57655 | return __ret; |
| 57240 | } | 57656 | } |
| 57241 | #endif | 57657 | __ai uint32x2_t vreinterpret_u32_s32(int32x2_t __p0) { |
| 57242 | | 57658 | uint32x2_t __ret; |
| 57243 | #ifdef __LITTLE_ENDIAN__ | 57659 | __ret = (uint32x2_t)(__p0); |
| 57244 | #define vmull_high_lane_u32(__p0_668, __p1_668, __p2_668) __extension__ ({ \ | | |
| 57245 | uint64x2_t __ret_668; \ | | |
| 57246 | uint32x4_t __s0_668 = __p0_668; \ | | |
| 57247 | uint32x2_t __s1_668 = __p1_668; \ | | |
| 57248 | __ret_668 = vmull_u32(vget_high_u32(__s0_668), splat_lane_u32(__s1_668, __p2_668)); \ | | |
| 57249 | __ret_668; \ | | |
| 57250 | }) | | |
| 57251 | #else | | |
| 57252 | #define vmull_high_lane_u32(__p0_669, __p1_669, __p2_669) __extension__ ({ \ | | |
| 57253 | uint64x2_t __ret_669; \ | | |
| 57254 | uint32x4_t __s0_669 = __p0_669; \ | | |
| 57255 | uint32x2_t __s1_669 = __p1_669; \ | | |
| 57256 | uint32x4_t __rev0_669; __rev0_669 = __builtin_shufflevector(__s0_669, __s0_669, 3, 2, 1, 0); \ | | |
| 57257 | uint32x2_t __rev1_669; __rev1_669 = __builtin_shufflevector(__s1_669, __s1_669, 1, 0); \ | | |
| 57258 | __ret_669 = __noswap_vmull_u32(__noswap_vget_high_u32(__rev0_669), __noswap_splat_lane_u32(__rev1_669, __p2_669)); \ | | |
| 57259 | __ret_669 = __builtin_shufflevector(__ret_669, __ret_669, 1, 0); \ | | |
| 57260 | __ret_669; \ | | |
| 57261 | }) | | |
| 57262 | #endif | | |
| 57263 | | | |
| 57264 | #ifdef __LITTLE_ENDIAN__ | | |
| 57265 | #define vmull_high_lane_u16(__p0_670, __p1_670, __p2_670) __extension__ ({ \ | | |
| 57266 | uint32x4_t __ret_670; \ | | |
| 57267 | uint16x8_t __s0_670 = __p0_670; \ | | |
| 57268 | uint16x4_t __s1_670 = __p1_670; \ | | |
| 57269 | __ret_670 = vmull_u16(vget_high_u16(__s0_670), splat_lane_u16(__s1_670, __p2_670)); \ | | |
| 57270 | __ret_670; \ | | |
| 57271 | }) | | |
| 57272 | #else | | |
| 57273 | #define vmull_high_lane_u16(__p0_671, __p1_671, __p2_671) __extension__ ({ \ | | |
| 57274 | uint32x4_t __ret_671; \ | | |
| 57275 | uint16x8_t __s0_671 = __p0_671; \ | | |
| 57276 | uint16x4_t __s1_671 = __p1_671; \ | | |
| 57277 | uint16x8_t __rev0_671; __rev0_671 = __builtin_shufflevector(__s0_671, __s0_671, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 57278 | uint16x4_t __rev1_671; __rev1_671 = __builtin_shufflevector(__s1_671, __s1_671, 3, 2, 1, 0); \ | | |
| 57279 | __ret_671 = __noswap_vmull_u16(__noswap_vget_high_u16(__rev0_671), __noswap_splat_lane_u16(__rev1_671, __p2_671)); \ | | |
| 57280 | __ret_671 = __builtin_shufflevector(__ret_671, __ret_671, 3, 2, 1, 0); \ | | |
| 57281 | __ret_671; \ | | |
| 57282 | }) | | |
| 57283 | #endif | | |
| 57284 | | | |
| 57285 | #ifdef __LITTLE_ENDIAN__ | | |
| 57286 | #define vmull_high_lane_s32(__p0_672, __p1_672, __p2_672) __extension__ ({ \ | | |
| 57287 | int64x2_t __ret_672; \ | | |
| 57288 | int32x4_t __s0_672 = __p0_672; \ | | |
| 57289 | int32x2_t __s1_672 = __p1_672; \ | | |
| 57290 | __ret_672 = vmull_s32(vget_high_s32(__s0_672), splat_lane_s32(__s1_672, __p2_672)); \ | | |
| 57291 | __ret_672; \ | | |
| 57292 | }) | | |
| 57293 | #else | | |
| 57294 | #define vmull_high_lane_s32(__p0_673, __p1_673, __p2_673) __extension__ ({ \ | | |
| 57295 | int64x2_t __ret_673; \ | | |
| 57296 | int32x4_t __s0_673 = __p0_673; \ | | |
| 57297 | int32x2_t __s1_673 = __p1_673; \ | | |
| 57298 | int32x4_t __rev0_673; __rev0_673 = __builtin_shufflevector(__s0_673, __s0_673, 3, 2, 1, 0); \ | | |
| 57299 | int32x2_t __rev1_673; __rev1_673 = __builtin_shufflevector(__s1_673, __s1_673, 1, 0); \ | | |
| 57300 | __ret_673 = __noswap_vmull_s32(__noswap_vget_high_s32(__rev0_673), __noswap_splat_lane_s32(__rev1_673, __p2_673)); \ | | |
| 57301 | __ret_673 = __builtin_shufflevector(__ret_673, __ret_673, 1, 0); \ | | |
| 57302 | __ret_673; \ | | |
| 57303 | }) | | |
| 57304 | #endif | | |
| 57305 | | | |
| 57306 | #ifdef __LITTLE_ENDIAN__ | | |
| 57307 | #define vmull_high_lane_s16(__p0_674, __p1_674, __p2_674) __extension__ ({ \ | | |
| 57308 | int32x4_t __ret_674; \ | | |
| 57309 | int16x8_t __s0_674 = __p0_674; \ | | |
| 57310 | int16x4_t __s1_674 = __p1_674; \ | | |
| 57311 | __ret_674 = vmull_s16(vget_high_s16(__s0_674), splat_lane_s16(__s1_674, __p2_674)); \ | | |
| 57312 | __ret_674; \ | | |
| 57313 | }) | | |
| 57314 | #else | | |
| 57315 | #define vmull_high_lane_s16(__p0_675, __p1_675, __p2_675) __extension__ ({ \ | | |
| 57316 | int32x4_t __ret_675; \ | | |
| 57317 | int16x8_t __s0_675 = __p0_675; \ | | |
| 57318 | int16x4_t __s1_675 = __p1_675; \ | | |
| 57319 | int16x8_t __rev0_675; __rev0_675 = __builtin_shufflevector(__s0_675, __s0_675, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 57320 | int16x4_t __rev1_675; __rev1_675 = __builtin_shufflevector(__s1_675, __s1_675, 3, 2, 1, 0); \ | | |
| 57321 | __ret_675 = __noswap_vmull_s16(__noswap_vget_high_s16(__rev0_675), __noswap_splat_lane_s16(__rev1_675, __p2_675)); \ | | |
| 57322 | __ret_675 = __builtin_shufflevector(__ret_675, __ret_675, 3, 2, 1, 0); \ | | |
| 57323 | __ret_675; \ | | |
| 57324 | }) | | |
| 57325 | #endif | | |
| 57326 | | | |
| 57327 | #ifdef __LITTLE_ENDIAN__ | | |
| 57328 | #define vmull_high_laneq_u32(__p0_676, __p1_676, __p2_676) __extension__ ({ \ | | |
| 57329 | uint64x2_t __ret_676; \ | | |
| 57330 | uint32x4_t __s0_676 = __p0_676; \ | | |
| 57331 | uint32x4_t __s1_676 = __p1_676; \ | | |
| 57332 | __ret_676 = vmull_u32(vget_high_u32(__s0_676), splat_laneq_u32(__s1_676, __p2_676)); \ | | |
| 57333 | __ret_676; \ | | |
| 57334 | }) | | |
| 57335 | #else | | |
| 57336 | #define vmull_high_laneq_u32(__p0_677, __p1_677, __p2_677) __extension__ ({ \ | | |
| 57337 | uint64x2_t __ret_677; \ | | |
| 57338 | uint32x4_t __s0_677 = __p0_677; \ | | |
| 57339 | uint32x4_t __s1_677 = __p1_677; \ | | |
| 57340 | uint32x4_t __rev0_677; __rev0_677 = __builtin_shufflevector(__s0_677, __s0_677, 3, 2, 1, 0); \ | | |
| 57341 | uint32x4_t __rev1_677; __rev1_677 = __builtin_shufflevector(__s1_677, __s1_677, 3, 2, 1, 0); \ | | |
| 57342 | __ret_677 = __noswap_vmull_u32(__noswap_vget_high_u32(__rev0_677), __noswap_splat_laneq_u32(__rev1_677, __p2_677)); \ | | |
| 57343 | __ret_677 = __builtin_shufflevector(__ret_677, __ret_677, 1, 0); \ | | |
| 57344 | __ret_677; \ | | |
| 57345 | }) | | |
| 57346 | #endif | | |
| 57347 | | | |
| 57348 | #ifdef __LITTLE_ENDIAN__ | | |
| 57349 | #define vmull_high_laneq_u16(__p0_678, __p1_678, __p2_678) __extension__ ({ \ | | |
| 57350 | uint32x4_t __ret_678; \ | | |
| 57351 | uint16x8_t __s0_678 = __p0_678; \ | | |
| 57352 | uint16x8_t __s1_678 = __p1_678; \ | | |
| 57353 | __ret_678 = vmull_u16(vget_high_u16(__s0_678), splat_laneq_u16(__s1_678, __p2_678)); \ | | |
| 57354 | __ret_678; \ | | |
| 57355 | }) | | |
| 57356 | #else | | |
| 57357 | #define vmull_high_laneq_u16(__p0_679, __p1_679, __p2_679) __extension__ ({ \ | | |
| 57358 | uint32x4_t __ret_679; \ | | |
| 57359 | uint16x8_t __s0_679 = __p0_679; \ | | |
| 57360 | uint16x8_t __s1_679 = __p1_679; \ | | |
| 57361 | uint16x8_t __rev0_679; __rev0_679 = __builtin_shufflevector(__s0_679, __s0_679, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 57362 | uint16x8_t __rev1_679; __rev1_679 = __builtin_shufflevector(__s1_679, __s1_679, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 57363 | __ret_679 = __noswap_vmull_u16(__noswap_vget_high_u16(__rev0_679), __noswap_splat_laneq_u16(__rev1_679, __p2_679)); \ | | |
| 57364 | __ret_679 = __builtin_shufflevector(__ret_679, __ret_679, 3, 2, 1, 0); \ | | |
| 57365 | __ret_679; \ | | |
| 57366 | }) | | |
| 57367 | #endif | | |
| 57368 | | | |
| 57369 | #ifdef __LITTLE_ENDIAN__ | | |
| 57370 | #define vmull_high_laneq_s32(__p0_680, __p1_680, __p2_680) __extension__ ({ \ | | |
| 57371 | int64x2_t __ret_680; \ | | |
| 57372 | int32x4_t __s0_680 = __p0_680; \ | | |
| 57373 | int32x4_t __s1_680 = __p1_680; \ | | |
| 57374 | __ret_680 = vmull_s32(vget_high_s32(__s0_680), splat_laneq_s32(__s1_680, __p2_680)); \ | | |
| 57375 | __ret_680; \ | | |
| 57376 | }) | | |
| 57377 | #else | | |
| 57378 | #define vmull_high_laneq_s32(__p0_681, __p1_681, __p2_681) __extension__ ({ \ | | |
| 57379 | int64x2_t __ret_681; \ | | |
| 57380 | int32x4_t __s0_681 = __p0_681; \ | | |
| 57381 | int32x4_t __s1_681 = __p1_681; \ | | |
| 57382 | int32x4_t __rev0_681; __rev0_681 = __builtin_shufflevector(__s0_681, __s0_681, 3, 2, 1, 0); \ | | |
| 57383 | int32x4_t __rev1_681; __rev1_681 = __builtin_shufflevector(__s1_681, __s1_681, 3, 2, 1, 0); \ | | |
| 57384 | __ret_681 = __noswap_vmull_s32(__noswap_vget_high_s32(__rev0_681), __noswap_splat_laneq_s32(__rev1_681, __p2_681)); \ | | |
| 57385 | __ret_681 = __builtin_shufflevector(__ret_681, __ret_681, 1, 0); \ | | |
| 57386 | __ret_681; \ | | |
| 57387 | }) | | |
| 57388 | #endif | | |
| 57389 | | | |
| 57390 | #ifdef __LITTLE_ENDIAN__ | | |
| 57391 | #define vmull_high_laneq_s16(__p0_682, __p1_682, __p2_682) __extension__ ({ \ | | |
| 57392 | int32x4_t __ret_682; \ | | |
| 57393 | int16x8_t __s0_682 = __p0_682; \ | | |
| 57394 | int16x8_t __s1_682 = __p1_682; \ | | |
| 57395 | __ret_682 = vmull_s16(vget_high_s16(__s0_682), splat_laneq_s16(__s1_682, __p2_682)); \ | | |
| 57396 | __ret_682; \ | | |
| 57397 | }) | | |
| 57398 | #else | | |
| 57399 | #define vmull_high_laneq_s16(__p0_683, __p1_683, __p2_683) __extension__ ({ \ | | |
| 57400 | int32x4_t __ret_683; \ | | |
| 57401 | int16x8_t __s0_683 = __p0_683; \ | | |
| 57402 | int16x8_t __s1_683 = __p1_683; \ | | |
| 57403 | int16x8_t __rev0_683; __rev0_683 = __builtin_shufflevector(__s0_683, __s0_683, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 57404 | int16x8_t __rev1_683; __rev1_683 = __builtin_shufflevector(__s1_683, __s1_683, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 57405 | __ret_683 = __noswap_vmull_s16(__noswap_vget_high_s16(__rev0_683), __noswap_splat_laneq_s16(__rev1_683, __p2_683)); \ | | |
| 57406 | __ret_683 = __builtin_shufflevector(__ret_683, __ret_683, 3, 2, 1, 0); \ | | |
| 57407 | __ret_683; \ | | |
| 57408 | }) | | |
| 57409 | #endif | | |
| 57410 | | | |
| 57411 | #ifdef __LITTLE_ENDIAN__ | | |
| 57412 | __ai uint64x2_t vmull_high_n_u32(uint32x4_t __p0, uint32_t __p1) { | | |
| 57413 | uint64x2_t __ret; | | |
| 57414 | __ret = vmull_n_u32(vget_high_u32(__p0), __p1); | | |
| 57415 | return __ret; | 57660 | return __ret; |
| 57416 | } | 57661 | } |
| 57417 | #else | 57662 | __ai uint32x2_t vreinterpret_u32_s64(int64x1_t __p0) { |
| 57418 | __ai uint64x2_t vmull_high_n_u32(uint32x4_t __p0, uint32_t __p1) { | 57663 | uint32x2_t __ret; |
| 57419 | uint64x2_t __ret; | 57664 | __ret = (uint32x2_t)(__p0); |
| 57420 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 57421 | __ret = __noswap_vmull_n_u32(__noswap_vget_high_u32(__rev0), __p1); | | |
| 57422 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 57423 | return __ret; | 57665 | return __ret; |
| 57424 | } | 57666 | } |
| 57425 | #endif | 57667 | __ai uint32x2_t vreinterpret_u32_s16(int16x4_t __p0) { |
| 57426 | | 57668 | uint32x2_t __ret; |
| 57427 | #ifdef __LITTLE_ENDIAN__ | 57669 | __ret = (uint32x2_t)(__p0); |
| 57428 | __ai uint32x4_t vmull_high_n_u16(uint16x8_t __p0, uint16_t __p1) { | | |
| 57429 | uint32x4_t __ret; | | |
| 57430 | __ret = vmull_n_u16(vget_high_u16(__p0), __p1); | | |
| 57431 | return __ret; | 57670 | return __ret; |
| 57432 | } | 57671 | } |
| 57433 | #else | 57672 | __ai uint64x1_t vreinterpret_u64_p8(poly8x8_t __p0) { |
| 57434 | __ai uint32x4_t vmull_high_n_u16(uint16x8_t __p0, uint16_t __p1) { | 57673 | uint64x1_t __ret; |
| 57435 | uint32x4_t __ret; | 57674 | __ret = (uint64x1_t)(__p0); |
| 57436 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57437 | __ret = __noswap_vmull_n_u16(__noswap_vget_high_u16(__rev0), __p1); | | |
| 57438 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 57439 | return __ret; | 57675 | return __ret; |
| 57440 | } | 57676 | } |
| 57441 | #endif | 57677 | __ai uint64x1_t vreinterpret_u64_p64(poly64x1_t __p0) { |
| 57442 | | 57678 | uint64x1_t __ret; |
| 57443 | #ifdef __LITTLE_ENDIAN__ | 57679 | __ret = (uint64x1_t)(__p0); |
| 57444 | __ai int64x2_t vmull_high_n_s32(int32x4_t __p0, int32_t __p1) { | | |
| 57445 | int64x2_t __ret; | | |
| 57446 | __ret = vmull_n_s32(vget_high_s32(__p0), __p1); | | |
| 57447 | return __ret; | 57680 | return __ret; |
| 57448 | } | 57681 | } |
| 57449 | #else | 57682 | __ai uint64x1_t vreinterpret_u64_p16(poly16x4_t __p0) { |
| 57450 | __ai int64x2_t vmull_high_n_s32(int32x4_t __p0, int32_t __p1) { | 57683 | uint64x1_t __ret; |
| 57451 | int64x2_t __ret; | 57684 | __ret = (uint64x1_t)(__p0); |
| 57452 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 57453 | __ret = __noswap_vmull_n_s32(__noswap_vget_high_s32(__rev0), __p1); | | |
| 57454 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 57455 | return __ret; | 57685 | return __ret; |
| 57456 | } | 57686 | } |
| 57457 | #endif | 57687 | __ai uint64x1_t vreinterpret_u64_u8(uint8x8_t __p0) { |
| 57458 | | 57688 | uint64x1_t __ret; |
| 57459 | #ifdef __LITTLE_ENDIAN__ | 57689 | __ret = (uint64x1_t)(__p0); |
| 57460 | __ai int32x4_t vmull_high_n_s16(int16x8_t __p0, int16_t __p1) { | | |
| 57461 | int32x4_t __ret; | | |
| 57462 | __ret = vmull_n_s16(vget_high_s16(__p0), __p1); | | |
| 57463 | return __ret; | 57690 | return __ret; |
| 57464 | } | 57691 | } |
| 57465 | #else | 57692 | __ai uint64x1_t vreinterpret_u64_u32(uint32x2_t __p0) { |
| 57466 | __ai int32x4_t vmull_high_n_s16(int16x8_t __p0, int16_t __p1) { | 57693 | uint64x1_t __ret; |
| 57467 | int32x4_t __ret; | 57694 | __ret = (uint64x1_t)(__p0); |
| 57468 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57469 | __ret = __noswap_vmull_n_s16(__noswap_vget_high_s16(__rev0), __p1); | | |
| 57470 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 57471 | return __ret; | 57695 | return __ret; |
| 57472 | } | 57696 | } |
| 57473 | #endif | 57697 | __ai uint64x1_t vreinterpret_u64_u16(uint16x4_t __p0) { |
| 57474 | | 57698 | uint64x1_t __ret; |
| 57475 | #ifdef __LITTLE_ENDIAN__ | 57699 | __ret = (uint64x1_t)(__p0); |
| 57476 | #define vmull_laneq_u32(__p0_684, __p1_684, __p2_684) __extension__ ({ \ | | |
| 57477 | uint64x2_t __ret_684; \ | | |
| 57478 | uint32x2_t __s0_684 = __p0_684; \ | | |
| 57479 | uint32x4_t __s1_684 = __p1_684; \ | | |
| 57480 | __ret_684 = vmull_u32(__s0_684, splat_laneq_u32(__s1_684, __p2_684)); \ | | |
| 57481 | __ret_684; \ | | |
| 57482 | }) | | |
| 57483 | #else | | |
| 57484 | #define vmull_laneq_u32(__p0_685, __p1_685, __p2_685) __extension__ ({ \ | | |
| 57485 | uint64x2_t __ret_685; \ | | |
| 57486 | uint32x2_t __s0_685 = __p0_685; \ | | |
| 57487 | uint32x4_t __s1_685 = __p1_685; \ | | |
| 57488 | uint32x2_t __rev0_685; __rev0_685 = __builtin_shufflevector(__s0_685, __s0_685, 1, 0); \ | | |
| 57489 | uint32x4_t __rev1_685; __rev1_685 = __builtin_shufflevector(__s1_685, __s1_685, 3, 2, 1, 0); \ | | |
| 57490 | __ret_685 = __noswap_vmull_u32(__rev0_685, __noswap_splat_laneq_u32(__rev1_685, __p2_685)); \ | | |
| 57491 | __ret_685 = __builtin_shufflevector(__ret_685, __ret_685, 1, 0); \ | | |
| 57492 | __ret_685; \ | | |
| 57493 | }) | | |
| 57494 | #endif | | |
| 57495 | | | |
| 57496 | #ifdef __LITTLE_ENDIAN__ | | |
| 57497 | #define vmull_laneq_u16(__p0_686, __p1_686, __p2_686) __extension__ ({ \ | | |
| 57498 | uint32x4_t __ret_686; \ | | |
| 57499 | uint16x4_t __s0_686 = __p0_686; \ | | |
| 57500 | uint16x8_t __s1_686 = __p1_686; \ | | |
| 57501 | __ret_686 = vmull_u16(__s0_686, splat_laneq_u16(__s1_686, __p2_686)); \ | | |
| 57502 | __ret_686; \ | | |
| 57503 | }) | | |
| 57504 | #else | | |
| 57505 | #define vmull_laneq_u16(__p0_687, __p1_687, __p2_687) __extension__ ({ \ | | |
| 57506 | uint32x4_t __ret_687; \ | | |
| 57507 | uint16x4_t __s0_687 = __p0_687; \ | | |
| 57508 | uint16x8_t __s1_687 = __p1_687; \ | | |
| 57509 | uint16x4_t __rev0_687; __rev0_687 = __builtin_shufflevector(__s0_687, __s0_687, 3, 2, 1, 0); \ | | |
| 57510 | uint16x8_t __rev1_687; __rev1_687 = __builtin_shufflevector(__s1_687, __s1_687, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 57511 | __ret_687 = __noswap_vmull_u16(__rev0_687, __noswap_splat_laneq_u16(__rev1_687, __p2_687)); \ | | |
| 57512 | __ret_687 = __builtin_shufflevector(__ret_687, __ret_687, 3, 2, 1, 0); \ | | |
| 57513 | __ret_687; \ | | |
| 57514 | }) | | |
| 57515 | #endif | | |
| 57516 | | | |
| 57517 | #ifdef __LITTLE_ENDIAN__ | | |
| 57518 | #define vmull_laneq_s32(__p0_688, __p1_688, __p2_688) __extension__ ({ \ | | |
| 57519 | int64x2_t __ret_688; \ | | |
| 57520 | int32x2_t __s0_688 = __p0_688; \ | | |
| 57521 | int32x4_t __s1_688 = __p1_688; \ | | |
| 57522 | __ret_688 = vmull_s32(__s0_688, splat_laneq_s32(__s1_688, __p2_688)); \ | | |
| 57523 | __ret_688; \ | | |
| 57524 | }) | | |
| 57525 | #else | | |
| 57526 | #define vmull_laneq_s32(__p0_689, __p1_689, __p2_689) __extension__ ({ \ | | |
| 57527 | int64x2_t __ret_689; \ | | |
| 57528 | int32x2_t __s0_689 = __p0_689; \ | | |
| 57529 | int32x4_t __s1_689 = __p1_689; \ | | |
| 57530 | int32x2_t __rev0_689; __rev0_689 = __builtin_shufflevector(__s0_689, __s0_689, 1, 0); \ | | |
| 57531 | int32x4_t __rev1_689; __rev1_689 = __builtin_shufflevector(__s1_689, __s1_689, 3, 2, 1, 0); \ | | |
| 57532 | __ret_689 = __noswap_vmull_s32(__rev0_689, __noswap_splat_laneq_s32(__rev1_689, __p2_689)); \ | | |
| 57533 | __ret_689 = __builtin_shufflevector(__ret_689, __ret_689, 1, 0); \ | | |
| 57534 | __ret_689; \ | | |
| 57535 | }) | | |
| 57536 | #endif | | |
| 57537 | | | |
| 57538 | #ifdef __LITTLE_ENDIAN__ | | |
| 57539 | #define vmull_laneq_s16(__p0_690, __p1_690, __p2_690) __extension__ ({ \ | | |
| 57540 | int32x4_t __ret_690; \ | | |
| 57541 | int16x4_t __s0_690 = __p0_690; \ | | |
| 57542 | int16x8_t __s1_690 = __p1_690; \ | | |
| 57543 | __ret_690 = vmull_s16(__s0_690, splat_laneq_s16(__s1_690, __p2_690)); \ | | |
| 57544 | __ret_690; \ | | |
| 57545 | }) | | |
| 57546 | #else | | |
| 57547 | #define vmull_laneq_s16(__p0_691, __p1_691, __p2_691) __extension__ ({ \ | | |
| 57548 | int32x4_t __ret_691; \ | | |
| 57549 | int16x4_t __s0_691 = __p0_691; \ | | |
| 57550 | int16x8_t __s1_691 = __p1_691; \ | | |
| 57551 | int16x4_t __rev0_691; __rev0_691 = __builtin_shufflevector(__s0_691, __s0_691, 3, 2, 1, 0); \ | | |
| 57552 | int16x8_t __rev1_691; __rev1_691 = __builtin_shufflevector(__s1_691, __s1_691, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 57553 | __ret_691 = __noswap_vmull_s16(__rev0_691, __noswap_splat_laneq_s16(__rev1_691, __p2_691)); \ | | |
| 57554 | __ret_691 = __builtin_shufflevector(__ret_691, __ret_691, 3, 2, 1, 0); \ | | |
| 57555 | __ret_691; \ | | |
| 57556 | }) | | |
| 57557 | #endif | | |
| 57558 | | | |
| 57559 | #ifdef __LITTLE_ENDIAN__ | | |
| 57560 | __ai float64x2_t vmulxq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 57561 | float64x2_t __ret; | | |
| 57562 | __ret = (float64x2_t) __builtin_neon_vmulxq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | | |
| 57563 | return __ret; | 57700 | return __ret; |
| 57564 | } | 57701 | } |
| 57565 | #else | 57702 | __ai uint64x1_t vreinterpret_u64_s8(int8x8_t __p0) { |
| 57566 | __ai float64x2_t vmulxq_f64(float64x2_t __p0, float64x2_t __p1) { | 57703 | uint64x1_t __ret; |
| 57567 | float64x2_t __ret; | 57704 | __ret = (uint64x1_t)(__p0); |
| 57568 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 57569 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 57570 | __ret = (float64x2_t) __builtin_neon_vmulxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); | | |
| 57571 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 57572 | return __ret; | 57705 | return __ret; |
| 57573 | } | 57706 | } |
| 57574 | __ai float64x2_t __noswap_vmulxq_f64(float64x2_t __p0, float64x2_t __p1) { | 57707 | __ai uint64x1_t vreinterpret_u64_f64(float64x1_t __p0) { |
| 57575 | float64x2_t __ret; | 57708 | uint64x1_t __ret; |
| 57576 | __ret = (float64x2_t) __builtin_neon_vmulxq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | 57709 | __ret = (uint64x1_t)(__p0); |
| 57577 | return __ret; | 57710 | return __ret; |
| 57578 | } | 57711 | } |
| 57579 | #endif | 57712 | __ai uint64x1_t vreinterpret_u64_f32(float32x2_t __p0) { |
| 57580 | | 57713 | uint64x1_t __ret; |
| 57581 | #ifdef __LITTLE_ENDIAN__ | 57714 | __ret = (uint64x1_t)(__p0); |
| 57582 | __ai float32x4_t vmulxq_f32(float32x4_t __p0, float32x4_t __p1) { | | |
| 57583 | float32x4_t __ret; | | |
| 57584 | __ret = (float32x4_t) __builtin_neon_vmulxq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); | | |
| 57585 | return __ret; | 57715 | return __ret; |
| 57586 | } | 57716 | } |
| 57587 | #else | 57717 | __ai uint64x1_t vreinterpret_u64_f16(float16x4_t __p0) { |
| 57588 | __ai float32x4_t vmulxq_f32(float32x4_t __p0, float32x4_t __p1) { | 57718 | uint64x1_t __ret; |
| 57589 | float32x4_t __ret; | 57719 | __ret = (uint64x1_t)(__p0); |
| 57590 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 57591 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 57592 | __ret = (float32x4_t) __builtin_neon_vmulxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); | | |
| 57593 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 57594 | return __ret; | 57720 | return __ret; |
| 57595 | } | 57721 | } |
| 57596 | __ai float32x4_t __noswap_vmulxq_f32(float32x4_t __p0, float32x4_t __p1) { | 57722 | __ai uint64x1_t vreinterpret_u64_s32(int32x2_t __p0) { |
| 57597 | float32x4_t __ret; | 57723 | uint64x1_t __ret; |
| 57598 | __ret = (float32x4_t) __builtin_neon_vmulxq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); | 57724 | __ret = (uint64x1_t)(__p0); |
| 57599 | return __ret; | 57725 | return __ret; |
| 57600 | } | 57726 | } |
| 57601 | #endif | 57727 | __ai uint64x1_t vreinterpret_u64_s64(int64x1_t __p0) { |
| 57602 | | 57728 | uint64x1_t __ret; |
| 57603 | __ai float64x1_t vmulx_f64(float64x1_t __p0, float64x1_t __p1) { | 57729 | __ret = (uint64x1_t)(__p0); |
| 57604 | float64x1_t __ret; | | |
| 57605 | __ret = (float64x1_t) __builtin_neon_vmulx_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | | |
| 57606 | return __ret; | 57730 | return __ret; |
| 57607 | } | 57731 | } |
| 57608 | #ifdef __LITTLE_ENDIAN__ | 57732 | __ai uint64x1_t vreinterpret_u64_s16(int16x4_t __p0) { |
| 57609 | __ai float32x2_t vmulx_f32(float32x2_t __p0, float32x2_t __p1) { | 57733 | uint64x1_t __ret; |
| 57610 | float32x2_t __ret; | 57734 | __ret = (uint64x1_t)(__p0); |
| 57611 | __ret = (float32x2_t) __builtin_neon_vmulx_v((int8x8_t)__p0, (int8x8_t)__p1, 9); | | |
| 57612 | return __ret; | 57735 | return __ret; |
| 57613 | } | 57736 | } |
| 57614 | #else | 57737 | __ai uint16x4_t vreinterpret_u16_p8(poly8x8_t __p0) { |
| 57615 | __ai float32x2_t vmulx_f32(float32x2_t __p0, float32x2_t __p1) { | 57738 | uint16x4_t __ret; |
| 57616 | float32x2_t __ret; | 57739 | __ret = (uint16x4_t)(__p0); |
| 57617 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 57618 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 57619 | __ret = (float32x2_t) __builtin_neon_vmulx_v((int8x8_t)__rev0, (int8x8_t)__rev1, 9); | | |
| 57620 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 57621 | return __ret; | 57740 | return __ret; |
| 57622 | } | 57741 | } |
| 57623 | __ai float32x2_t __noswap_vmulx_f32(float32x2_t __p0, float32x2_t __p1) { | 57742 | __ai uint16x4_t vreinterpret_u16_p64(poly64x1_t __p0) { |
| 57624 | float32x2_t __ret; | 57743 | uint16x4_t __ret; |
| 57625 | __ret = (float32x2_t) __builtin_neon_vmulx_v((int8x8_t)__p0, (int8x8_t)__p1, 9); | 57744 | __ret = (uint16x4_t)(__p0); |
| | 57745 | return __ret; |
| | 57746 | } |
| | 57747 | __ai uint16x4_t vreinterpret_u16_p16(poly16x4_t __p0) { |
| | 57748 | uint16x4_t __ret; |
| | 57749 | __ret = (uint16x4_t)(__p0); |
| | 57750 | return __ret; |
| | 57751 | } |
| | 57752 | __ai uint16x4_t vreinterpret_u16_u8(uint8x8_t __p0) { |
| | 57753 | uint16x4_t __ret; |
| | 57754 | __ret = (uint16x4_t)(__p0); |
| | 57755 | return __ret; |
| | 57756 | } |
| | 57757 | __ai uint16x4_t vreinterpret_u16_u32(uint32x2_t __p0) { |
| | 57758 | uint16x4_t __ret; |
| | 57759 | __ret = (uint16x4_t)(__p0); |
| | 57760 | return __ret; |
| | 57761 | } |
| | 57762 | __ai uint16x4_t vreinterpret_u16_u64(uint64x1_t __p0) { |
| | 57763 | uint16x4_t __ret; |
| | 57764 | __ret = (uint16x4_t)(__p0); |
| | 57765 | return __ret; |
| | 57766 | } |
| | 57767 | __ai uint16x4_t vreinterpret_u16_s8(int8x8_t __p0) { |
| | 57768 | uint16x4_t __ret; |
| | 57769 | __ret = (uint16x4_t)(__p0); |
| | 57770 | return __ret; |
| | 57771 | } |
| | 57772 | __ai uint16x4_t vreinterpret_u16_f64(float64x1_t __p0) { |
| | 57773 | uint16x4_t __ret; |
| | 57774 | __ret = (uint16x4_t)(__p0); |
| | 57775 | return __ret; |
| | 57776 | } |
| | 57777 | __ai uint16x4_t vreinterpret_u16_f32(float32x2_t __p0) { |
| | 57778 | uint16x4_t __ret; |
| | 57779 | __ret = (uint16x4_t)(__p0); |
| | 57780 | return __ret; |
| | 57781 | } |
| | 57782 | __ai uint16x4_t vreinterpret_u16_f16(float16x4_t __p0) { |
| | 57783 | uint16x4_t __ret; |
| | 57784 | __ret = (uint16x4_t)(__p0); |
| | 57785 | return __ret; |
| | 57786 | } |
| | 57787 | __ai uint16x4_t vreinterpret_u16_s32(int32x2_t __p0) { |
| | 57788 | uint16x4_t __ret; |
| | 57789 | __ret = (uint16x4_t)(__p0); |
| | 57790 | return __ret; |
| | 57791 | } |
| | 57792 | __ai uint16x4_t vreinterpret_u16_s64(int64x1_t __p0) { |
| | 57793 | uint16x4_t __ret; |
| | 57794 | __ret = (uint16x4_t)(__p0); |
| | 57795 | return __ret; |
| | 57796 | } |
| | 57797 | __ai uint16x4_t vreinterpret_u16_s16(int16x4_t __p0) { |
| | 57798 | uint16x4_t __ret; |
| | 57799 | __ret = (uint16x4_t)(__p0); |
| | 57800 | return __ret; |
| | 57801 | } |
| | 57802 | __ai int8x8_t vreinterpret_s8_p8(poly8x8_t __p0) { |
| | 57803 | int8x8_t __ret; |
| | 57804 | __ret = (int8x8_t)(__p0); |
| | 57805 | return __ret; |
| | 57806 | } |
| | 57807 | __ai int8x8_t vreinterpret_s8_p64(poly64x1_t __p0) { |
| | 57808 | int8x8_t __ret; |
| | 57809 | __ret = (int8x8_t)(__p0); |
| | 57810 | return __ret; |
| | 57811 | } |
| | 57812 | __ai int8x8_t vreinterpret_s8_p16(poly16x4_t __p0) { |
| | 57813 | int8x8_t __ret; |
| | 57814 | __ret = (int8x8_t)(__p0); |
| | 57815 | return __ret; |
| | 57816 | } |
| | 57817 | __ai int8x8_t vreinterpret_s8_u8(uint8x8_t __p0) { |
| | 57818 | int8x8_t __ret; |
| | 57819 | __ret = (int8x8_t)(__p0); |
| | 57820 | return __ret; |
| | 57821 | } |
| | 57822 | __ai int8x8_t vreinterpret_s8_u32(uint32x2_t __p0) { |
| | 57823 | int8x8_t __ret; |
| | 57824 | __ret = (int8x8_t)(__p0); |
| | 57825 | return __ret; |
| | 57826 | } |
| | 57827 | __ai int8x8_t vreinterpret_s8_u64(uint64x1_t __p0) { |
| | 57828 | int8x8_t __ret; |
| | 57829 | __ret = (int8x8_t)(__p0); |
| 57626 | return __ret; | 57830 | return __ret; |
| 57627 | } | 57831 | } |
| 57628 | #endif | 57832 | __ai int8x8_t vreinterpret_s8_u16(uint16x4_t __p0) { |
| 57629 | | 57833 | int8x8_t __ret; |
| 57630 | __ai float64_t vmulxd_f64(float64_t __p0, float64_t __p1) { | 57834 | __ret = (int8x8_t)(__p0); |
| 57631 | float64_t __ret; | | |
| 57632 | __ret = (float64_t) __builtin_neon_vmulxd_f64(__p0, __p1); | | |
| 57633 | return __ret; | 57835 | return __ret; |
| 57634 | } | 57836 | } |
| 57635 | __ai float32_t vmulxs_f32(float32_t __p0, float32_t __p1) { | 57837 | __ai int8x8_t vreinterpret_s8_f64(float64x1_t __p0) { |
| 57636 | float32_t __ret; | 57838 | int8x8_t __ret; |
| 57637 | __ret = (float32_t) __builtin_neon_vmulxs_f32(__p0, __p1); | 57839 | __ret = (int8x8_t)(__p0); |
| 57638 | return __ret; | 57840 | return __ret; |
| 57639 | } | 57841 | } |
| 57640 | #define vmulxd_lane_f64(__p0_692, __p1_692, __p2_692) __extension__ ({ \ | 57842 | __ai int8x8_t vreinterpret_s8_f32(float32x2_t __p0) { |
| 57641 | float64_t __ret_692; \ | 57843 | int8x8_t __ret; |
| 57642 | float64_t __s0_692 = __p0_692; \ | 57844 | __ret = (int8x8_t)(__p0); |
| 57643 | float64x1_t __s1_692 = __p1_692; \ | | |
| 57644 | __ret_692 = vmulxd_f64(__s0_692, vget_lane_f64(__s1_692, __p2_692)); \ | | |
| 57645 | __ret_692; \ | | |
| 57646 | }) | | |
| 57647 | #ifdef __LITTLE_ENDIAN__ | | |
| 57648 | #define vmulxs_lane_f32(__p0_693, __p1_693, __p2_693) __extension__ ({ \ | | |
| 57649 | float32_t __ret_693; \ | | |
| 57650 | float32_t __s0_693 = __p0_693; \ | | |
| 57651 | float32x2_t __s1_693 = __p1_693; \ | | |
| 57652 | __ret_693 = vmulxs_f32(__s0_693, vget_lane_f32(__s1_693, __p2_693)); \ | | |
| 57653 | __ret_693; \ | | |
| 57654 | }) | | |
| 57655 | #else | | |
| 57656 | #define vmulxs_lane_f32(__p0_694, __p1_694, __p2_694) __extension__ ({ \ | | |
| 57657 | float32_t __ret_694; \ | | |
| 57658 | float32_t __s0_694 = __p0_694; \ | | |
| 57659 | float32x2_t __s1_694 = __p1_694; \ | | |
| 57660 | float32x2_t __rev1_694; __rev1_694 = __builtin_shufflevector(__s1_694, __s1_694, 1, 0); \ | | |
| 57661 | __ret_694 = vmulxs_f32(__s0_694, __noswap_vget_lane_f32(__rev1_694, __p2_694)); \ | | |
| 57662 | __ret_694; \ | | |
| 57663 | }) | | |
| 57664 | #endif | | |
| 57665 | | | |
| 57666 | #ifdef __LITTLE_ENDIAN__ | | |
| 57667 | #define vmulxq_lane_f64(__p0_695, __p1_695, __p2_695) __extension__ ({ \ | | |
| 57668 | float64x2_t __ret_695; \ | | |
| 57669 | float64x2_t __s0_695 = __p0_695; \ | | |
| 57670 | float64x1_t __s1_695 = __p1_695; \ | | |
| 57671 | __ret_695 = vmulxq_f64(__s0_695, splatq_lane_f64(__s1_695, __p2_695)); \ | | |
| 57672 | __ret_695; \ | | |
| 57673 | }) | | |
| 57674 | #else | | |
| 57675 | #define vmulxq_lane_f64(__p0_696, __p1_696, __p2_696) __extension__ ({ \ | | |
| 57676 | float64x2_t __ret_696; \ | | |
| 57677 | float64x2_t __s0_696 = __p0_696; \ | | |
| 57678 | float64x1_t __s1_696 = __p1_696; \ | | |
| 57679 | float64x2_t __rev0_696; __rev0_696 = __builtin_shufflevector(__s0_696, __s0_696, 1, 0); \ | | |
| 57680 | __ret_696 = __noswap_vmulxq_f64(__rev0_696, __noswap_splatq_lane_f64(__s1_696, __p2_696)); \ | | |
| 57681 | __ret_696 = __builtin_shufflevector(__ret_696, __ret_696, 1, 0); \ | | |
| 57682 | __ret_696; \ | | |
| 57683 | }) | | |
| 57684 | #endif | | |
| 57685 | | | |
| 57686 | #ifdef __LITTLE_ENDIAN__ | | |
| 57687 | #define vmulxq_lane_f32(__p0_697, __p1_697, __p2_697) __extension__ ({ \ | | |
| 57688 | float32x4_t __ret_697; \ | | |
| 57689 | float32x4_t __s0_697 = __p0_697; \ | | |
| 57690 | float32x2_t __s1_697 = __p1_697; \ | | |
| 57691 | __ret_697 = vmulxq_f32(__s0_697, splatq_lane_f32(__s1_697, __p2_697)); \ | | |
| 57692 | __ret_697; \ | | |
| 57693 | }) | | |
| 57694 | #else | | |
| 57695 | #define vmulxq_lane_f32(__p0_698, __p1_698, __p2_698) __extension__ ({ \ | | |
| 57696 | float32x4_t __ret_698; \ | | |
| 57697 | float32x4_t __s0_698 = __p0_698; \ | | |
| 57698 | float32x2_t __s1_698 = __p1_698; \ | | |
| 57699 | float32x4_t __rev0_698; __rev0_698 = __builtin_shufflevector(__s0_698, __s0_698, 3, 2, 1, 0); \ | | |
| 57700 | float32x2_t __rev1_698; __rev1_698 = __builtin_shufflevector(__s1_698, __s1_698, 1, 0); \ | | |
| 57701 | __ret_698 = __noswap_vmulxq_f32(__rev0_698, __noswap_splatq_lane_f32(__rev1_698, __p2_698)); \ | | |
| 57702 | __ret_698 = __builtin_shufflevector(__ret_698, __ret_698, 3, 2, 1, 0); \ | | |
| 57703 | __ret_698; \ | | |
| 57704 | }) | | |
| 57705 | #endif | | |
| 57706 | | | |
| 57707 | #ifdef __LITTLE_ENDIAN__ | | |
| 57708 | #define vmulx_lane_f32(__p0_699, __p1_699, __p2_699) __extension__ ({ \ | | |
| 57709 | float32x2_t __ret_699; \ | | |
| 57710 | float32x2_t __s0_699 = __p0_699; \ | | |
| 57711 | float32x2_t __s1_699 = __p1_699; \ | | |
| 57712 | __ret_699 = vmulx_f32(__s0_699, splat_lane_f32(__s1_699, __p2_699)); \ | | |
| 57713 | __ret_699; \ | | |
| 57714 | }) | | |
| 57715 | #else | | |
| 57716 | #define vmulx_lane_f32(__p0_700, __p1_700, __p2_700) __extension__ ({ \ | | |
| 57717 | float32x2_t __ret_700; \ | | |
| 57718 | float32x2_t __s0_700 = __p0_700; \ | | |
| 57719 | float32x2_t __s1_700 = __p1_700; \ | | |
| 57720 | float32x2_t __rev0_700; __rev0_700 = __builtin_shufflevector(__s0_700, __s0_700, 1, 0); \ | | |
| 57721 | float32x2_t __rev1_700; __rev1_700 = __builtin_shufflevector(__s1_700, __s1_700, 1, 0); \ | | |
| 57722 | __ret_700 = __noswap_vmulx_f32(__rev0_700, __noswap_splat_lane_f32(__rev1_700, __p2_700)); \ | | |
| 57723 | __ret_700 = __builtin_shufflevector(__ret_700, __ret_700, 1, 0); \ | | |
| 57724 | __ret_700; \ | | |
| 57725 | }) | | |
| 57726 | #endif | | |
| 57727 | | | |
| 57728 | #ifdef __LITTLE_ENDIAN__ | | |
| 57729 | #define vmulxd_laneq_f64(__p0_701, __p1_701, __p2_701) __extension__ ({ \ | | |
| 57730 | float64_t __ret_701; \ | | |
| 57731 | float64_t __s0_701 = __p0_701; \ | | |
| 57732 | float64x2_t __s1_701 = __p1_701; \ | | |
| 57733 | __ret_701 = vmulxd_f64(__s0_701, vgetq_lane_f64(__s1_701, __p2_701)); \ | | |
| 57734 | __ret_701; \ | | |
| 57735 | }) | | |
| 57736 | #else | | |
| 57737 | #define vmulxd_laneq_f64(__p0_702, __p1_702, __p2_702) __extension__ ({ \ | | |
| 57738 | float64_t __ret_702; \ | | |
| 57739 | float64_t __s0_702 = __p0_702; \ | | |
| 57740 | float64x2_t __s1_702 = __p1_702; \ | | |
| 57741 | float64x2_t __rev1_702; __rev1_702 = __builtin_shufflevector(__s1_702, __s1_702, 1, 0); \ | | |
| 57742 | __ret_702 = vmulxd_f64(__s0_702, __noswap_vgetq_lane_f64(__rev1_702, __p2_702)); \ | | |
| 57743 | __ret_702; \ | | |
| 57744 | }) | | |
| 57745 | #endif | | |
| 57746 | | | |
| 57747 | #ifdef __LITTLE_ENDIAN__ | | |
| 57748 | #define vmulxs_laneq_f32(__p0_703, __p1_703, __p2_703) __extension__ ({ \ | | |
| 57749 | float32_t __ret_703; \ | | |
| 57750 | float32_t __s0_703 = __p0_703; \ | | |
| 57751 | float32x4_t __s1_703 = __p1_703; \ | | |
| 57752 | __ret_703 = vmulxs_f32(__s0_703, vgetq_lane_f32(__s1_703, __p2_703)); \ | | |
| 57753 | __ret_703; \ | | |
| 57754 | }) | | |
| 57755 | #else | | |
| 57756 | #define vmulxs_laneq_f32(__p0_704, __p1_704, __p2_704) __extension__ ({ \ | | |
| 57757 | float32_t __ret_704; \ | | |
| 57758 | float32_t __s0_704 = __p0_704; \ | | |
| 57759 | float32x4_t __s1_704 = __p1_704; \ | | |
| 57760 | float32x4_t __rev1_704; __rev1_704 = __builtin_shufflevector(__s1_704, __s1_704, 3, 2, 1, 0); \ | | |
| 57761 | __ret_704 = vmulxs_f32(__s0_704, __noswap_vgetq_lane_f32(__rev1_704, __p2_704)); \ | | |
| 57762 | __ret_704; \ | | |
| 57763 | }) | | |
| 57764 | #endif | | |
| 57765 | | | |
| 57766 | #ifdef __LITTLE_ENDIAN__ | | |
| 57767 | #define vmulxq_laneq_f64(__p0_705, __p1_705, __p2_705) __extension__ ({ \ | | |
| 57768 | float64x2_t __ret_705; \ | | |
| 57769 | float64x2_t __s0_705 = __p0_705; \ | | |
| 57770 | float64x2_t __s1_705 = __p1_705; \ | | |
| 57771 | __ret_705 = vmulxq_f64(__s0_705, splatq_laneq_f64(__s1_705, __p2_705)); \ | | |
| 57772 | __ret_705; \ | | |
| 57773 | }) | | |
| 57774 | #else | | |
| 57775 | #define vmulxq_laneq_f64(__p0_706, __p1_706, __p2_706) __extension__ ({ \ | | |
| 57776 | float64x2_t __ret_706; \ | | |
| 57777 | float64x2_t __s0_706 = __p0_706; \ | | |
| 57778 | float64x2_t __s1_706 = __p1_706; \ | | |
| 57779 | float64x2_t __rev0_706; __rev0_706 = __builtin_shufflevector(__s0_706, __s0_706, 1, 0); \ | | |
| 57780 | float64x2_t __rev1_706; __rev1_706 = __builtin_shufflevector(__s1_706, __s1_706, 1, 0); \ | | |
| 57781 | __ret_706 = __noswap_vmulxq_f64(__rev0_706, __noswap_splatq_laneq_f64(__rev1_706, __p2_706)); \ | | |
| 57782 | __ret_706 = __builtin_shufflevector(__ret_706, __ret_706, 1, 0); \ | | |
| 57783 | __ret_706; \ | | |
| 57784 | }) | | |
| 57785 | #endif | | |
| 57786 | | | |
| 57787 | #ifdef __LITTLE_ENDIAN__ | | |
| 57788 | #define vmulxq_laneq_f32(__p0_707, __p1_707, __p2_707) __extension__ ({ \ | | |
| 57789 | float32x4_t __ret_707; \ | | |
| 57790 | float32x4_t __s0_707 = __p0_707; \ | | |
| 57791 | float32x4_t __s1_707 = __p1_707; \ | | |
| 57792 | __ret_707 = vmulxq_f32(__s0_707, splatq_laneq_f32(__s1_707, __p2_707)); \ | | |
| 57793 | __ret_707; \ | | |
| 57794 | }) | | |
| 57795 | #else | | |
| 57796 | #define vmulxq_laneq_f32(__p0_708, __p1_708, __p2_708) __extension__ ({ \ | | |
| 57797 | float32x4_t __ret_708; \ | | |
| 57798 | float32x4_t __s0_708 = __p0_708; \ | | |
| 57799 | float32x4_t __s1_708 = __p1_708; \ | | |
| 57800 | float32x4_t __rev0_708; __rev0_708 = __builtin_shufflevector(__s0_708, __s0_708, 3, 2, 1, 0); \ | | |
| 57801 | float32x4_t __rev1_708; __rev1_708 = __builtin_shufflevector(__s1_708, __s1_708, 3, 2, 1, 0); \ | | |
| 57802 | __ret_708 = __noswap_vmulxq_f32(__rev0_708, __noswap_splatq_laneq_f32(__rev1_708, __p2_708)); \ | | |
| 57803 | __ret_708 = __builtin_shufflevector(__ret_708, __ret_708, 3, 2, 1, 0); \ | | |
| 57804 | __ret_708; \ | | |
| 57805 | }) | | |
| 57806 | #endif | | |
| 57807 | | | |
| 57808 | #ifdef __LITTLE_ENDIAN__ | | |
| 57809 | #define vmulx_laneq_f32(__p0_709, __p1_709, __p2_709) __extension__ ({ \ | | |
| 57810 | float32x2_t __ret_709; \ | | |
| 57811 | float32x2_t __s0_709 = __p0_709; \ | | |
| 57812 | float32x4_t __s1_709 = __p1_709; \ | | |
| 57813 | __ret_709 = vmulx_f32(__s0_709, splat_laneq_f32(__s1_709, __p2_709)); \ | | |
| 57814 | __ret_709; \ | | |
| 57815 | }) | | |
| 57816 | #else | | |
| 57817 | #define vmulx_laneq_f32(__p0_710, __p1_710, __p2_710) __extension__ ({ \ | | |
| 57818 | float32x2_t __ret_710; \ | | |
| 57819 | float32x2_t __s0_710 = __p0_710; \ | | |
| 57820 | float32x4_t __s1_710 = __p1_710; \ | | |
| 57821 | float32x2_t __rev0_710; __rev0_710 = __builtin_shufflevector(__s0_710, __s0_710, 1, 0); \ | | |
| 57822 | float32x4_t __rev1_710; __rev1_710 = __builtin_shufflevector(__s1_710, __s1_710, 3, 2, 1, 0); \ | | |
| 57823 | __ret_710 = __noswap_vmulx_f32(__rev0_710, __noswap_splat_laneq_f32(__rev1_710, __p2_710)); \ | | |
| 57824 | __ret_710 = __builtin_shufflevector(__ret_710, __ret_710, 1, 0); \ | | |
| 57825 | __ret_710; \ | | |
| 57826 | }) | | |
| 57827 | #endif | | |
| 57828 | | | |
| 57829 | #ifdef __LITTLE_ENDIAN__ | | |
| 57830 | __ai float64x2_t vnegq_f64(float64x2_t __p0) { | | |
| 57831 | float64x2_t __ret; | | |
| 57832 | __ret = -__p0; | | |
| 57833 | return __ret; | 57845 | return __ret; |
| 57834 | } | 57846 | } |
| 57835 | #else | 57847 | __ai int8x8_t vreinterpret_s8_f16(float16x4_t __p0) { |
| 57836 | __ai float64x2_t vnegq_f64(float64x2_t __p0) { | 57848 | int8x8_t __ret; |
| 57837 | float64x2_t __ret; | 57849 | __ret = (int8x8_t)(__p0); |
| 57838 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 57839 | __ret = -__rev0; | | |
| 57840 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 57841 | return __ret; | 57850 | return __ret; |
| 57842 | } | 57851 | } |
| 57843 | #endif | 57852 | __ai int8x8_t vreinterpret_s8_s32(int32x2_t __p0) { |
| 57844 | | 57853 | int8x8_t __ret; |
| 57845 | #ifdef __LITTLE_ENDIAN__ | 57854 | __ret = (int8x8_t)(__p0); |
| 57846 | __ai int64x2_t vnegq_s64(int64x2_t __p0) { | | |
| 57847 | int64x2_t __ret; | | |
| 57848 | __ret = -__p0; | | |
| 57849 | return __ret; | 57855 | return __ret; |
| 57850 | } | 57856 | } |
| 57851 | #else | 57857 | __ai int8x8_t vreinterpret_s8_s64(int64x1_t __p0) { |
| 57852 | __ai int64x2_t vnegq_s64(int64x2_t __p0) { | 57858 | int8x8_t __ret; |
| 57853 | int64x2_t __ret; | 57859 | __ret = (int8x8_t)(__p0); |
| 57854 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 57855 | __ret = -__rev0; | | |
| 57856 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 57857 | return __ret; | 57860 | return __ret; |
| 57858 | } | 57861 | } |
| 57859 | #endif | 57862 | __ai int8x8_t vreinterpret_s8_s16(int16x4_t __p0) { |
| 57860 | | 57863 | int8x8_t __ret; |
| 57861 | __ai float64x1_t vneg_f64(float64x1_t __p0) { | 57864 | __ret = (int8x8_t)(__p0); |
| 57862 | float64x1_t __ret; | | |
| 57863 | __ret = -__p0; | | |
| 57864 | return __ret; | 57865 | return __ret; |
| 57865 | } | 57866 | } |
| 57866 | __ai int64x1_t vneg_s64(int64x1_t __p0) { | 57867 | __ai float64x1_t vreinterpret_f64_p8(poly8x8_t __p0) { |
| 57867 | int64x1_t __ret; | 57868 | float64x1_t __ret; |
| 57868 | __ret = -__p0; | 57869 | __ret = (float64x1_t)(__p0); |
| 57869 | return __ret; | 57870 | return __ret; |
| 57870 | } | 57871 | } |
| 57871 | __ai int64_t vnegd_s64(int64_t __p0) { | 57872 | __ai float64x1_t vreinterpret_f64_p64(poly64x1_t __p0) { |
| 57872 | int64_t __ret; | 57873 | float64x1_t __ret; |
| 57873 | __ret = (int64_t) __builtin_neon_vnegd_s64(__p0); | 57874 | __ret = (float64x1_t)(__p0); |
| 57874 | return __ret; | 57875 | return __ret; |
| 57875 | } | 57876 | } |
| 57876 | #ifdef __LITTLE_ENDIAN__ | 57877 | __ai float64x1_t vreinterpret_f64_p16(poly16x4_t __p0) { |
| 57877 | __ai uint8x16_t vpaddq_u8(uint8x16_t __p0, uint8x16_t __p1) { | 57878 | float64x1_t __ret; |
| 57878 | uint8x16_t __ret; | 57879 | __ret = (float64x1_t)(__p0); |
| 57879 | __ret = (uint8x16_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 48); | | |
| 57880 | return __ret; | 57880 | return __ret; |
| 57881 | } | 57881 | } |
| 57882 | #else | 57882 | __ai float64x1_t vreinterpret_f64_u8(uint8x8_t __p0) { |
| 57883 | __ai uint8x16_t vpaddq_u8(uint8x16_t __p0, uint8x16_t __p1) { | 57883 | float64x1_t __ret; |
| 57884 | uint8x16_t __ret; | 57884 | __ret = (float64x1_t)(__p0); |
| 57885 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57886 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57887 | __ret = (uint8x16_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 48); | | |
| 57888 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57889 | return __ret; | 57885 | return __ret; |
| 57890 | } | 57886 | } |
| 57891 | #endif | 57887 | __ai float64x1_t vreinterpret_f64_u32(uint32x2_t __p0) { |
| 57892 | | 57888 | float64x1_t __ret; |
| 57893 | #ifdef __LITTLE_ENDIAN__ | 57889 | __ret = (float64x1_t)(__p0); |
| 57894 | __ai uint32x4_t vpaddq_u32(uint32x4_t __p0, uint32x4_t __p1) { | | |
| 57895 | uint32x4_t __ret; | | |
| 57896 | __ret = (uint32x4_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 50); | | |
| 57897 | return __ret; | 57890 | return __ret; |
| 57898 | } | 57891 | } |
| 57899 | #else | 57892 | __ai float64x1_t vreinterpret_f64_u64(uint64x1_t __p0) { |
| 57900 | __ai uint32x4_t vpaddq_u32(uint32x4_t __p0, uint32x4_t __p1) { | 57893 | float64x1_t __ret; |
| 57901 | uint32x4_t __ret; | 57894 | __ret = (float64x1_t)(__p0); |
| 57902 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 57903 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 57904 | __ret = (uint32x4_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50); | | |
| 57905 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 57906 | return __ret; | 57895 | return __ret; |
| 57907 | } | 57896 | } |
| 57908 | #endif | 57897 | __ai float64x1_t vreinterpret_f64_u16(uint16x4_t __p0) { |
| 57909 | | 57898 | float64x1_t __ret; |
| 57910 | #ifdef __LITTLE_ENDIAN__ | 57899 | __ret = (float64x1_t)(__p0); |
| 57911 | __ai uint64x2_t vpaddq_u64(uint64x2_t __p0, uint64x2_t __p1) { | | |
| 57912 | uint64x2_t __ret; | | |
| 57913 | __ret = (uint64x2_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); | | |
| 57914 | return __ret; | 57900 | return __ret; |
| 57915 | } | 57901 | } |
| 57916 | #else | 57902 | __ai float64x1_t vreinterpret_f64_s8(int8x8_t __p0) { |
| 57917 | __ai uint64x2_t vpaddq_u64(uint64x2_t __p0, uint64x2_t __p1) { | 57903 | float64x1_t __ret; |
| 57918 | uint64x2_t __ret; | 57904 | __ret = (float64x1_t)(__p0); |
| 57919 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 57920 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 57921 | __ret = (uint64x2_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); | | |
| 57922 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 57923 | return __ret; | 57905 | return __ret; |
| 57924 | } | 57906 | } |
| 57925 | #endif | 57907 | __ai float64x1_t vreinterpret_f64_f32(float32x2_t __p0) { |
| 57926 | | 57908 | float64x1_t __ret; |
| 57927 | #ifdef __LITTLE_ENDIAN__ | 57909 | __ret = (float64x1_t)(__p0); |
| 57928 | __ai uint16x8_t vpaddq_u16(uint16x8_t __p0, uint16x8_t __p1) { | | |
| 57929 | uint16x8_t __ret; | | |
| 57930 | __ret = (uint16x8_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 49); | | |
| 57931 | return __ret; | 57910 | return __ret; |
| 57932 | } | 57911 | } |
| 57933 | #else | 57912 | __ai float64x1_t vreinterpret_f64_f16(float16x4_t __p0) { |
| 57934 | __ai uint16x8_t vpaddq_u16(uint16x8_t __p0, uint16x8_t __p1) { | 57913 | float64x1_t __ret; |
| 57935 | uint16x8_t __ret; | 57914 | __ret = (float64x1_t)(__p0); |
| 57936 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57937 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57938 | __ret = (uint16x8_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 49); | | |
| 57939 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57940 | return __ret; | 57915 | return __ret; |
| 57941 | } | 57916 | } |
| 57942 | #endif | 57917 | __ai float64x1_t vreinterpret_f64_s32(int32x2_t __p0) { |
| 57943 | | 57918 | float64x1_t __ret; |
| 57944 | #ifdef __LITTLE_ENDIAN__ | 57919 | __ret = (float64x1_t)(__p0); |
| 57945 | __ai int8x16_t vpaddq_s8(int8x16_t __p0, int8x16_t __p1) { | | |
| 57946 | int8x16_t __ret; | | |
| 57947 | __ret = (int8x16_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 32); | | |
| 57948 | return __ret; | 57920 | return __ret; |
| 57949 | } | 57921 | } |
| 57950 | #else | 57922 | __ai float64x1_t vreinterpret_f64_s64(int64x1_t __p0) { |
| 57951 | __ai int8x16_t vpaddq_s8(int8x16_t __p0, int8x16_t __p1) { | 57923 | float64x1_t __ret; |
| 57952 | int8x16_t __ret; | 57924 | __ret = (float64x1_t)(__p0); |
| 57953 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57954 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57955 | __ret = (int8x16_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 32); | | |
| 57956 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 57957 | return __ret; | 57925 | return __ret; |
| 57958 | } | 57926 | } |
| 57959 | #endif | 57927 | __ai float64x1_t vreinterpret_f64_s16(int16x4_t __p0) { |
| 57960 | | 57928 | float64x1_t __ret; |
| 57961 | #ifdef __LITTLE_ENDIAN__ | 57929 | __ret = (float64x1_t)(__p0); |
| 57962 | __ai float64x2_t vpaddq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 57963 | float64x2_t __ret; | | |
| 57964 | __ret = (float64x2_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | | |
| 57965 | return __ret; | 57930 | return __ret; |
| 57966 | } | 57931 | } |
| 57967 | #else | 57932 | __ai float32x2_t vreinterpret_f32_p8(poly8x8_t __p0) { |
| 57968 | __ai float64x2_t vpaddq_f64(float64x2_t __p0, float64x2_t __p1) { | 57933 | float32x2_t __ret; |
| 57969 | float64x2_t __ret; | 57934 | __ret = (float32x2_t)(__p0); |
| 57970 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 57971 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 57972 | __ret = (float64x2_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); | | |
| 57973 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 57974 | return __ret; | 57935 | return __ret; |
| 57975 | } | 57936 | } |
| 57976 | #endif | 57937 | __ai float32x2_t vreinterpret_f32_p64(poly64x1_t __p0) { |
| 57977 | | 57938 | float32x2_t __ret; |
| 57978 | #ifdef __LITTLE_ENDIAN__ | 57939 | __ret = (float32x2_t)(__p0); |
| 57979 | __ai float32x4_t vpaddq_f32(float32x4_t __p0, float32x4_t __p1) { | | |
| 57980 | float32x4_t __ret; | | |
| 57981 | __ret = (float32x4_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); | | |
| 57982 | return __ret; | 57940 | return __ret; |
| 57983 | } | 57941 | } |
| 57984 | #else | 57942 | __ai float32x2_t vreinterpret_f32_p16(poly16x4_t __p0) { |
| 57985 | __ai float32x4_t vpaddq_f32(float32x4_t __p0, float32x4_t __p1) { | 57943 | float32x2_t __ret; |
| 57986 | float32x4_t __ret; | 57944 | __ret = (float32x2_t)(__p0); |
| 57987 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 57988 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 57989 | __ret = (float32x4_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); | | |
| 57990 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 57991 | return __ret; | 57945 | return __ret; |
| 57992 | } | 57946 | } |
| 57993 | #endif | 57947 | __ai float32x2_t vreinterpret_f32_u8(uint8x8_t __p0) { |
| 57994 | | 57948 | float32x2_t __ret; |
| 57995 | #ifdef __LITTLE_ENDIAN__ | 57949 | __ret = (float32x2_t)(__p0); |
| 57996 | __ai int32x4_t vpaddq_s32(int32x4_t __p0, int32x4_t __p1) { | | |
| 57997 | int32x4_t __ret; | | |
| 57998 | __ret = (int32x4_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 34); | | |
| 57999 | return __ret; | 57950 | return __ret; |
| 58000 | } | 57951 | } |
| 58001 | #else | 57952 | __ai float32x2_t vreinterpret_f32_u32(uint32x2_t __p0) { |
| 58002 | __ai int32x4_t vpaddq_s32(int32x4_t __p0, int32x4_t __p1) { | 57953 | float32x2_t __ret; |
| 58003 | int32x4_t __ret; | 57954 | __ret = (float32x2_t)(__p0); |
| 58004 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 58005 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 58006 | __ret = (int32x4_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 34); | | |
| 58007 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 58008 | return __ret; | 57955 | return __ret; |
| 58009 | } | 57956 | } |
| 58010 | #endif | 57957 | __ai float32x2_t vreinterpret_f32_u64(uint64x1_t __p0) { |
| 58011 | | 57958 | float32x2_t __ret; |
| 58012 | #ifdef __LITTLE_ENDIAN__ | 57959 | __ret = (float32x2_t)(__p0); |
| 58013 | __ai int64x2_t vpaddq_s64(int64x2_t __p0, int64x2_t __p1) { | | |
| 58014 | int64x2_t __ret; | | |
| 58015 | __ret = (int64x2_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 35); | | |
| 58016 | return __ret; | 57960 | return __ret; |
| 58017 | } | 57961 | } |
| 58018 | #else | 57962 | __ai float32x2_t vreinterpret_f32_u16(uint16x4_t __p0) { |
| 58019 | __ai int64x2_t vpaddq_s64(int64x2_t __p0, int64x2_t __p1) { | 57963 | float32x2_t __ret; |
| 58020 | int64x2_t __ret; | 57964 | __ret = (float32x2_t)(__p0); |
| 58021 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 58022 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 58023 | __ret = (int64x2_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 35); | | |
| 58024 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 58025 | return __ret; | 57965 | return __ret; |
| 58026 | } | 57966 | } |
| 58027 | #endif | 57967 | __ai float32x2_t vreinterpret_f32_s8(int8x8_t __p0) { |
| 58028 | | 57968 | float32x2_t __ret; |
| 58029 | #ifdef __LITTLE_ENDIAN__ | 57969 | __ret = (float32x2_t)(__p0); |
| 58030 | __ai int16x8_t vpaddq_s16(int16x8_t __p0, int16x8_t __p1) { | | |
| 58031 | int16x8_t __ret; | | |
| 58032 | __ret = (int16x8_t) __builtin_neon_vpaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 33); | | |
| 58033 | return __ret; | 57970 | return __ret; |
| 58034 | } | 57971 | } |
| 58035 | #else | 57972 | __ai float32x2_t vreinterpret_f32_f64(float64x1_t __p0) { |
| 58036 | __ai int16x8_t vpaddq_s16(int16x8_t __p0, int16x8_t __p1) { | 57973 | float32x2_t __ret; |
| 58037 | int16x8_t __ret; | 57974 | __ret = (float32x2_t)(__p0); |
| 58038 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58039 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58040 | __ret = (int16x8_t) __builtin_neon_vpaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 33); | | |
| 58041 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58042 | return __ret; | 57975 | return __ret; |
| 58043 | } | 57976 | } |
| 58044 | #endif | 57977 | __ai float32x2_t vreinterpret_f32_f16(float16x4_t __p0) { |
| 58045 | | 57978 | float32x2_t __ret; |
| 58046 | #ifdef __LITTLE_ENDIAN__ | 57979 | __ret = (float32x2_t)(__p0); |
| 58047 | __ai uint64_t vpaddd_u64(uint64x2_t __p0) { | | |
| 58048 | uint64_t __ret; | | |
| 58049 | __ret = (uint64_t) __builtin_neon_vpaddd_u64(__p0); | | |
| 58050 | return __ret; | 57980 | return __ret; |
| 58051 | } | 57981 | } |
| 58052 | #else | 57982 | __ai float32x2_t vreinterpret_f32_s32(int32x2_t __p0) { |
| 58053 | __ai uint64_t vpaddd_u64(uint64x2_t __p0) { | 57983 | float32x2_t __ret; |
| 58054 | uint64_t __ret; | 57984 | __ret = (float32x2_t)(__p0); |
| 58055 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 58056 | __ret = (uint64_t) __builtin_neon_vpaddd_u64(__rev0); | | |
| 58057 | return __ret; | 57985 | return __ret; |
| 58058 | } | 57986 | } |
| 58059 | #endif | 57987 | __ai float32x2_t vreinterpret_f32_s64(int64x1_t __p0) { |
| 58060 | | 57988 | float32x2_t __ret; |
| 58061 | #ifdef __LITTLE_ENDIAN__ | 57989 | __ret = (float32x2_t)(__p0); |
| 58062 | __ai float64_t vpaddd_f64(float64x2_t __p0) { | | |
| 58063 | float64_t __ret; | | |
| 58064 | __ret = (float64_t) __builtin_neon_vpaddd_f64(__p0); | | |
| 58065 | return __ret; | 57990 | return __ret; |
| 58066 | } | 57991 | } |
| 58067 | #else | 57992 | __ai float32x2_t vreinterpret_f32_s16(int16x4_t __p0) { |
| 58068 | __ai float64_t vpaddd_f64(float64x2_t __p0) { | 57993 | float32x2_t __ret; |
| 58069 | float64_t __ret; | 57994 | __ret = (float32x2_t)(__p0); |
| 58070 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 58071 | __ret = (float64_t) __builtin_neon_vpaddd_f64(__rev0); | | |
| 58072 | return __ret; | 57995 | return __ret; |
| 58073 | } | 57996 | } |
| 58074 | #endif | 57997 | __ai float16x4_t vreinterpret_f16_p8(poly8x8_t __p0) { |
| 58075 | | 57998 | float16x4_t __ret; |
| 58076 | #ifdef __LITTLE_ENDIAN__ | 57999 | __ret = (float16x4_t)(__p0); |
| 58077 | __ai int64_t vpaddd_s64(int64x2_t __p0) { | | |
| 58078 | int64_t __ret; | | |
| 58079 | __ret = (int64_t) __builtin_neon_vpaddd_s64(__p0); | | |
| 58080 | return __ret; | 58000 | return __ret; |
| 58081 | } | 58001 | } |
| 58082 | #else | 58002 | __ai float16x4_t vreinterpret_f16_p64(poly64x1_t __p0) { |
| 58083 | __ai int64_t vpaddd_s64(int64x2_t __p0) { | 58003 | float16x4_t __ret; |
| 58084 | int64_t __ret; | 58004 | __ret = (float16x4_t)(__p0); |
| 58085 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 58086 | __ret = (int64_t) __builtin_neon_vpaddd_s64(__rev0); | | |
| 58087 | return __ret; | 58005 | return __ret; |
| 58088 | } | 58006 | } |
| 58089 | #endif | 58007 | __ai float16x4_t vreinterpret_f16_p16(poly16x4_t __p0) { |
| 58090 | | 58008 | float16x4_t __ret; |
| 58091 | #ifdef __LITTLE_ENDIAN__ | 58009 | __ret = (float16x4_t)(__p0); |
| 58092 | __ai float32_t vpadds_f32(float32x2_t __p0) { | | |
| 58093 | float32_t __ret; | | |
| 58094 | __ret = (float32_t) __builtin_neon_vpadds_f32(__p0); | | |
| 58095 | return __ret; | 58010 | return __ret; |
| 58096 | } | 58011 | } |
| 58097 | #else | 58012 | __ai float16x4_t vreinterpret_f16_u8(uint8x8_t __p0) { |
| 58098 | __ai float32_t vpadds_f32(float32x2_t __p0) { | 58013 | float16x4_t __ret; |
| 58099 | float32_t __ret; | 58014 | __ret = (float16x4_t)(__p0); |
| 58100 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 58101 | __ret = (float32_t) __builtin_neon_vpadds_f32(__rev0); | | |
| 58102 | return __ret; | 58015 | return __ret; |
| 58103 | } | 58016 | } |
| 58104 | #endif | 58017 | __ai float16x4_t vreinterpret_f16_u32(uint32x2_t __p0) { |
| 58105 | | 58018 | float16x4_t __ret; |
| 58106 | #ifdef __LITTLE_ENDIAN__ | 58019 | __ret = (float16x4_t)(__p0); |
| 58107 | __ai uint8x16_t vpmaxq_u8(uint8x16_t __p0, uint8x16_t __p1) { | | |
| 58108 | uint8x16_t __ret; | | |
| 58109 | __ret = (uint8x16_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 48); | | |
| 58110 | return __ret; | 58020 | return __ret; |
| 58111 | } | 58021 | } |
| 58112 | #else | 58022 | __ai float16x4_t vreinterpret_f16_u64(uint64x1_t __p0) { |
| 58113 | __ai uint8x16_t vpmaxq_u8(uint8x16_t __p0, uint8x16_t __p1) { | 58023 | float16x4_t __ret; |
| 58114 | uint8x16_t __ret; | 58024 | __ret = (float16x4_t)(__p0); |
| 58115 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58116 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58117 | __ret = (uint8x16_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 48); | | |
| 58118 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58119 | return __ret; | 58025 | return __ret; |
| 58120 | } | 58026 | } |
| 58121 | #endif | 58027 | __ai float16x4_t vreinterpret_f16_u16(uint16x4_t __p0) { |
| 58122 | | 58028 | float16x4_t __ret; |
| 58123 | #ifdef __LITTLE_ENDIAN__ | 58029 | __ret = (float16x4_t)(__p0); |
| 58124 | __ai uint32x4_t vpmaxq_u32(uint32x4_t __p0, uint32x4_t __p1) { | | |
| 58125 | uint32x4_t __ret; | | |
| 58126 | __ret = (uint32x4_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 50); | | |
| 58127 | return __ret; | 58030 | return __ret; |
| 58128 | } | 58031 | } |
| 58129 | #else | 58032 | __ai float16x4_t vreinterpret_f16_s8(int8x8_t __p0) { |
| 58130 | __ai uint32x4_t vpmaxq_u32(uint32x4_t __p0, uint32x4_t __p1) { | 58033 | float16x4_t __ret; |
| 58131 | uint32x4_t __ret; | 58034 | __ret = (float16x4_t)(__p0); |
| 58132 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 58133 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 58134 | __ret = (uint32x4_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50); | | |
| 58135 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 58136 | return __ret; | 58035 | return __ret; |
| 58137 | } | 58036 | } |
| 58138 | #endif | 58037 | __ai float16x4_t vreinterpret_f16_f64(float64x1_t __p0) { |
| 58139 | | 58038 | float16x4_t __ret; |
| 58140 | #ifdef __LITTLE_ENDIAN__ | 58039 | __ret = (float16x4_t)(__p0); |
| 58141 | __ai uint16x8_t vpmaxq_u16(uint16x8_t __p0, uint16x8_t __p1) { | | |
| 58142 | uint16x8_t __ret; | | |
| 58143 | __ret = (uint16x8_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 49); | | |
| 58144 | return __ret; | 58040 | return __ret; |
| 58145 | } | 58041 | } |
| 58146 | #else | 58042 | __ai float16x4_t vreinterpret_f16_f32(float32x2_t __p0) { |
| 58147 | __ai uint16x8_t vpmaxq_u16(uint16x8_t __p0, uint16x8_t __p1) { | 58043 | float16x4_t __ret; |
| 58148 | uint16x8_t __ret; | 58044 | __ret = (float16x4_t)(__p0); |
| 58149 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58150 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58151 | __ret = (uint16x8_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 49); | | |
| 58152 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58153 | return __ret; | 58045 | return __ret; |
| 58154 | } | 58046 | } |
| 58155 | #endif | 58047 | __ai float16x4_t vreinterpret_f16_s32(int32x2_t __p0) { |
| 58156 | | 58048 | float16x4_t __ret; |
| 58157 | #ifdef __LITTLE_ENDIAN__ | 58049 | __ret = (float16x4_t)(__p0); |
| 58158 | __ai int8x16_t vpmaxq_s8(int8x16_t __p0, int8x16_t __p1) { | | |
| 58159 | int8x16_t __ret; | | |
| 58160 | __ret = (int8x16_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 32); | | |
| 58161 | return __ret; | 58050 | return __ret; |
| 58162 | } | 58051 | } |
| 58163 | #else | 58052 | __ai float16x4_t vreinterpret_f16_s64(int64x1_t __p0) { |
| 58164 | __ai int8x16_t vpmaxq_s8(int8x16_t __p0, int8x16_t __p1) { | 58053 | float16x4_t __ret; |
| 58165 | int8x16_t __ret; | 58054 | __ret = (float16x4_t)(__p0); |
| 58166 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58167 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58168 | __ret = (int8x16_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 32); | | |
| 58169 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58170 | return __ret; | 58055 | return __ret; |
| 58171 | } | 58056 | } |
| 58172 | #endif | 58057 | __ai float16x4_t vreinterpret_f16_s16(int16x4_t __p0) { |
| 58173 | | 58058 | float16x4_t __ret; |
| 58174 | #ifdef __LITTLE_ENDIAN__ | 58059 | __ret = (float16x4_t)(__p0); |
| 58175 | __ai float64x2_t vpmaxq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 58176 | float64x2_t __ret; | | |
| 58177 | __ret = (float64x2_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | | |
| 58178 | return __ret; | 58060 | return __ret; |
| 58179 | } | 58061 | } |
| 58180 | #else | 58062 | __ai int32x2_t vreinterpret_s32_p8(poly8x8_t __p0) { |
| 58181 | __ai float64x2_t vpmaxq_f64(float64x2_t __p0, float64x2_t __p1) { | 58063 | int32x2_t __ret; |
| 58182 | float64x2_t __ret; | 58064 | __ret = (int32x2_t)(__p0); |
| 58183 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 58184 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 58185 | __ret = (float64x2_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); | | |
| 58186 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 58187 | return __ret; | 58065 | return __ret; |
| 58188 | } | 58066 | } |
| 58189 | #endif | 58067 | __ai int32x2_t vreinterpret_s32_p64(poly64x1_t __p0) { |
| 58190 | | 58068 | int32x2_t __ret; |
| 58191 | #ifdef __LITTLE_ENDIAN__ | 58069 | __ret = (int32x2_t)(__p0); |
| 58192 | __ai float32x4_t vpmaxq_f32(float32x4_t __p0, float32x4_t __p1) { | | |
| 58193 | float32x4_t __ret; | | |
| 58194 | __ret = (float32x4_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); | | |
| 58195 | return __ret; | 58070 | return __ret; |
| 58196 | } | 58071 | } |
| 58197 | #else | 58072 | __ai int32x2_t vreinterpret_s32_p16(poly16x4_t __p0) { |
| 58198 | __ai float32x4_t vpmaxq_f32(float32x4_t __p0, float32x4_t __p1) { | 58073 | int32x2_t __ret; |
| 58199 | float32x4_t __ret; | 58074 | __ret = (int32x2_t)(__p0); |
| 58200 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 58201 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 58202 | __ret = (float32x4_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); | | |
| 58203 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 58204 | return __ret; | 58075 | return __ret; |
| 58205 | } | 58076 | } |
| 58206 | #endif | 58077 | __ai int32x2_t vreinterpret_s32_u8(uint8x8_t __p0) { |
| 58207 | | 58078 | int32x2_t __ret; |
| 58208 | #ifdef __LITTLE_ENDIAN__ | 58079 | __ret = (int32x2_t)(__p0); |
| 58209 | __ai int32x4_t vpmaxq_s32(int32x4_t __p0, int32x4_t __p1) { | | |
| 58210 | int32x4_t __ret; | | |
| 58211 | __ret = (int32x4_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 34); | | |
| 58212 | return __ret; | 58080 | return __ret; |
| 58213 | } | 58081 | } |
| 58214 | #else | 58082 | __ai int32x2_t vreinterpret_s32_u32(uint32x2_t __p0) { |
| 58215 | __ai int32x4_t vpmaxq_s32(int32x4_t __p0, int32x4_t __p1) { | 58083 | int32x2_t __ret; |
| 58216 | int32x4_t __ret; | 58084 | __ret = (int32x2_t)(__p0); |
| 58217 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 58218 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 58219 | __ret = (int32x4_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 34); | | |
| 58220 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 58221 | return __ret; | 58085 | return __ret; |
| 58222 | } | 58086 | } |
| 58223 | #endif | 58087 | __ai int32x2_t vreinterpret_s32_u64(uint64x1_t __p0) { |
| 58224 | | 58088 | int32x2_t __ret; |
| 58225 | #ifdef __LITTLE_ENDIAN__ | 58089 | __ret = (int32x2_t)(__p0); |
| 58226 | __ai int16x8_t vpmaxq_s16(int16x8_t __p0, int16x8_t __p1) { | | |
| 58227 | int16x8_t __ret; | | |
| 58228 | __ret = (int16x8_t) __builtin_neon_vpmaxq_v((int8x16_t)__p0, (int8x16_t)__p1, 33); | | |
| 58229 | return __ret; | 58090 | return __ret; |
| 58230 | } | 58091 | } |
| 58231 | #else | 58092 | __ai int32x2_t vreinterpret_s32_u16(uint16x4_t __p0) { |
| 58232 | __ai int16x8_t vpmaxq_s16(int16x8_t __p0, int16x8_t __p1) { | 58093 | int32x2_t __ret; |
| 58233 | int16x8_t __ret; | 58094 | __ret = (int32x2_t)(__p0); |
| 58234 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58235 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58236 | __ret = (int16x8_t) __builtin_neon_vpmaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 33); | | |
| 58237 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58238 | return __ret; | 58095 | return __ret; |
| 58239 | } | 58096 | } |
| 58240 | #endif | 58097 | __ai int32x2_t vreinterpret_s32_s8(int8x8_t __p0) { |
| 58241 | | 58098 | int32x2_t __ret; |
| 58242 | #ifdef __LITTLE_ENDIAN__ | 58099 | __ret = (int32x2_t)(__p0); |
| 58243 | __ai float64_t vpmaxqd_f64(float64x2_t __p0) { | | |
| 58244 | float64_t __ret; | | |
| 58245 | __ret = (float64_t) __builtin_neon_vpmaxqd_f64(__p0); | | |
| 58246 | return __ret; | 58100 | return __ret; |
| 58247 | } | 58101 | } |
| 58248 | #else | 58102 | __ai int32x2_t vreinterpret_s32_f64(float64x1_t __p0) { |
| 58249 | __ai float64_t vpmaxqd_f64(float64x2_t __p0) { | 58103 | int32x2_t __ret; |
| 58250 | float64_t __ret; | 58104 | __ret = (int32x2_t)(__p0); |
| 58251 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 58252 | __ret = (float64_t) __builtin_neon_vpmaxqd_f64(__rev0); | | |
| 58253 | return __ret; | 58105 | return __ret; |
| 58254 | } | 58106 | } |
| 58255 | #endif | 58107 | __ai int32x2_t vreinterpret_s32_f32(float32x2_t __p0) { |
| 58256 | | 58108 | int32x2_t __ret; |
| 58257 | #ifdef __LITTLE_ENDIAN__ | 58109 | __ret = (int32x2_t)(__p0); |
| 58258 | __ai float32_t vpmaxs_f32(float32x2_t __p0) { | | |
| 58259 | float32_t __ret; | | |
| 58260 | __ret = (float32_t) __builtin_neon_vpmaxs_f32(__p0); | | |
| 58261 | return __ret; | 58110 | return __ret; |
| 58262 | } | 58111 | } |
| 58263 | #else | 58112 | __ai int32x2_t vreinterpret_s32_f16(float16x4_t __p0) { |
| 58264 | __ai float32_t vpmaxs_f32(float32x2_t __p0) { | 58113 | int32x2_t __ret; |
| 58265 | float32_t __ret; | 58114 | __ret = (int32x2_t)(__p0); |
| 58266 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 58267 | __ret = (float32_t) __builtin_neon_vpmaxs_f32(__rev0); | | |
| 58268 | return __ret; | 58115 | return __ret; |
| 58269 | } | 58116 | } |
| 58270 | #endif | 58117 | __ai int32x2_t vreinterpret_s32_s64(int64x1_t __p0) { |
| 58271 | | 58118 | int32x2_t __ret; |
| 58272 | #ifdef __LITTLE_ENDIAN__ | 58119 | __ret = (int32x2_t)(__p0); |
| 58273 | __ai float64x2_t vpmaxnmq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 58274 | float64x2_t __ret; | | |
| 58275 | __ret = (float64x2_t) __builtin_neon_vpmaxnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | | |
| 58276 | return __ret; | 58120 | return __ret; |
| 58277 | } | 58121 | } |
| 58278 | #else | 58122 | __ai int32x2_t vreinterpret_s32_s16(int16x4_t __p0) { |
| 58279 | __ai float64x2_t vpmaxnmq_f64(float64x2_t __p0, float64x2_t __p1) { | 58123 | int32x2_t __ret; |
| 58280 | float64x2_t __ret; | 58124 | __ret = (int32x2_t)(__p0); |
| 58281 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 58282 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 58283 | __ret = (float64x2_t) __builtin_neon_vpmaxnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); | | |
| 58284 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 58285 | return __ret; | 58125 | return __ret; |
| 58286 | } | 58126 | } |
| 58287 | #endif | 58127 | __ai int64x1_t vreinterpret_s64_p8(poly8x8_t __p0) { |
| 58288 | | 58128 | int64x1_t __ret; |
| 58289 | #ifdef __LITTLE_ENDIAN__ | 58129 | __ret = (int64x1_t)(__p0); |
| 58290 | __ai float32x4_t vpmaxnmq_f32(float32x4_t __p0, float32x4_t __p1) { | | |
| 58291 | float32x4_t __ret; | | |
| 58292 | __ret = (float32x4_t) __builtin_neon_vpmaxnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); | | |
| 58293 | return __ret; | 58130 | return __ret; |
| 58294 | } | 58131 | } |
| 58295 | #else | 58132 | __ai int64x1_t vreinterpret_s64_p64(poly64x1_t __p0) { |
| 58296 | __ai float32x4_t vpmaxnmq_f32(float32x4_t __p0, float32x4_t __p1) { | 58133 | int64x1_t __ret; |
| 58297 | float32x4_t __ret; | 58134 | __ret = (int64x1_t)(__p0); |
| 58298 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 58299 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 58300 | __ret = (float32x4_t) __builtin_neon_vpmaxnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); | | |
| 58301 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 58302 | return __ret; | 58135 | return __ret; |
| 58303 | } | 58136 | } |
| 58304 | #endif | 58137 | __ai int64x1_t vreinterpret_s64_p16(poly16x4_t __p0) { |
| 58305 | | 58138 | int64x1_t __ret; |
| 58306 | #ifdef __LITTLE_ENDIAN__ | 58139 | __ret = (int64x1_t)(__p0); |
| 58307 | __ai float32x2_t vpmaxnm_f32(float32x2_t __p0, float32x2_t __p1) { | | |
| 58308 | float32x2_t __ret; | | |
| 58309 | __ret = (float32x2_t) __builtin_neon_vpmaxnm_v((int8x8_t)__p0, (int8x8_t)__p1, 9); | | |
| 58310 | return __ret; | 58140 | return __ret; |
| 58311 | } | 58141 | } |
| 58312 | #else | 58142 | __ai int64x1_t vreinterpret_s64_u8(uint8x8_t __p0) { |
| 58313 | __ai float32x2_t vpmaxnm_f32(float32x2_t __p0, float32x2_t __p1) { | 58143 | int64x1_t __ret; |
| 58314 | float32x2_t __ret; | 58144 | __ret = (int64x1_t)(__p0); |
| 58315 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 58316 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 58317 | __ret = (float32x2_t) __builtin_neon_vpmaxnm_v((int8x8_t)__rev0, (int8x8_t)__rev1, 9); | | |
| 58318 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 58319 | return __ret; | 58145 | return __ret; |
| 58320 | } | 58146 | } |
| 58321 | #endif | 58147 | __ai int64x1_t vreinterpret_s64_u32(uint32x2_t __p0) { |
| 58322 | | 58148 | int64x1_t __ret; |
| 58323 | #ifdef __LITTLE_ENDIAN__ | 58149 | __ret = (int64x1_t)(__p0); |
| 58324 | __ai float64_t vpmaxnmqd_f64(float64x2_t __p0) { | | |
| 58325 | float64_t __ret; | | |
| 58326 | __ret = (float64_t) __builtin_neon_vpmaxnmqd_f64(__p0); | | |
| 58327 | return __ret; | 58150 | return __ret; |
| 58328 | } | 58151 | } |
| 58329 | #else | 58152 | __ai int64x1_t vreinterpret_s64_u64(uint64x1_t __p0) { |
| 58330 | __ai float64_t vpmaxnmqd_f64(float64x2_t __p0) { | 58153 | int64x1_t __ret; |
| 58331 | float64_t __ret; | 58154 | __ret = (int64x1_t)(__p0); |
| 58332 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 58333 | __ret = (float64_t) __builtin_neon_vpmaxnmqd_f64(__rev0); | | |
| 58334 | return __ret; | 58155 | return __ret; |
| 58335 | } | 58156 | } |
| 58336 | #endif | 58157 | __ai int64x1_t vreinterpret_s64_u16(uint16x4_t __p0) { |
| 58337 | | 58158 | int64x1_t __ret; |
| 58338 | #ifdef __LITTLE_ENDIAN__ | 58159 | __ret = (int64x1_t)(__p0); |
| 58339 | __ai float32_t vpmaxnms_f32(float32x2_t __p0) { | | |
| 58340 | float32_t __ret; | | |
| 58341 | __ret = (float32_t) __builtin_neon_vpmaxnms_f32(__p0); | | |
| 58342 | return __ret; | 58160 | return __ret; |
| 58343 | } | 58161 | } |
| 58344 | #else | 58162 | __ai int64x1_t vreinterpret_s64_s8(int8x8_t __p0) { |
| 58345 | __ai float32_t vpmaxnms_f32(float32x2_t __p0) { | 58163 | int64x1_t __ret; |
| 58346 | float32_t __ret; | 58164 | __ret = (int64x1_t)(__p0); |
| 58347 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 58348 | __ret = (float32_t) __builtin_neon_vpmaxnms_f32(__rev0); | | |
| 58349 | return __ret; | 58165 | return __ret; |
| 58350 | } | 58166 | } |
| 58351 | #endif | 58167 | __ai int64x1_t vreinterpret_s64_f64(float64x1_t __p0) { |
| 58352 | | 58168 | int64x1_t __ret; |
| 58353 | #ifdef __LITTLE_ENDIAN__ | 58169 | __ret = (int64x1_t)(__p0); |
| 58354 | __ai uint8x16_t vpminq_u8(uint8x16_t __p0, uint8x16_t __p1) { | | |
| 58355 | uint8x16_t __ret; | | |
| 58356 | __ret = (uint8x16_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 48); | | |
| 58357 | return __ret; | 58170 | return __ret; |
| 58358 | } | 58171 | } |
| 58359 | #else | 58172 | __ai int64x1_t vreinterpret_s64_f32(float32x2_t __p0) { |
| 58360 | __ai uint8x16_t vpminq_u8(uint8x16_t __p0, uint8x16_t __p1) { | 58173 | int64x1_t __ret; |
| 58361 | uint8x16_t __ret; | 58174 | __ret = (int64x1_t)(__p0); |
| 58362 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58363 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58364 | __ret = (uint8x16_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 48); | | |
| 58365 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58366 | return __ret; | 58175 | return __ret; |
| 58367 | } | 58176 | } |
| 58368 | #endif | 58177 | __ai int64x1_t vreinterpret_s64_f16(float16x4_t __p0) { |
| 58369 | | 58178 | int64x1_t __ret; |
| 58370 | #ifdef __LITTLE_ENDIAN__ | 58179 | __ret = (int64x1_t)(__p0); |
| 58371 | __ai uint32x4_t vpminq_u32(uint32x4_t __p0, uint32x4_t __p1) { | | |
| 58372 | uint32x4_t __ret; | | |
| 58373 | __ret = (uint32x4_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 50); | | |
| 58374 | return __ret; | 58180 | return __ret; |
| 58375 | } | 58181 | } |
| 58376 | #else | 58182 | __ai int64x1_t vreinterpret_s64_s32(int32x2_t __p0) { |
| 58377 | __ai uint32x4_t vpminq_u32(uint32x4_t __p0, uint32x4_t __p1) { | 58183 | int64x1_t __ret; |
| 58378 | uint32x4_t __ret; | 58184 | __ret = (int64x1_t)(__p0); |
| 58379 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 58380 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 58381 | __ret = (uint32x4_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50); | | |
| 58382 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 58383 | return __ret; | 58185 | return __ret; |
| 58384 | } | 58186 | } |
| 58385 | #endif | 58187 | __ai int64x1_t vreinterpret_s64_s16(int16x4_t __p0) { |
| 58386 | | 58188 | int64x1_t __ret; |
| 58387 | #ifdef __LITTLE_ENDIAN__ | 58189 | __ret = (int64x1_t)(__p0); |
| 58388 | __ai uint16x8_t vpminq_u16(uint16x8_t __p0, uint16x8_t __p1) { | | |
| 58389 | uint16x8_t __ret; | | |
| 58390 | __ret = (uint16x8_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 49); | | |
| 58391 | return __ret; | 58190 | return __ret; |
| 58392 | } | 58191 | } |
| 58393 | #else | 58192 | __ai int16x4_t vreinterpret_s16_p8(poly8x8_t __p0) { |
| 58394 | __ai uint16x8_t vpminq_u16(uint16x8_t __p0, uint16x8_t __p1) { | 58193 | int16x4_t __ret; |
| 58395 | uint16x8_t __ret; | 58194 | __ret = (int16x4_t)(__p0); |
| 58396 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58397 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58398 | __ret = (uint16x8_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 49); | | |
| 58399 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58400 | return __ret; | 58195 | return __ret; |
| 58401 | } | 58196 | } |
| 58402 | #endif | 58197 | __ai int16x4_t vreinterpret_s16_p64(poly64x1_t __p0) { |
| 58403 | | 58198 | int16x4_t __ret; |
| 58404 | #ifdef __LITTLE_ENDIAN__ | 58199 | __ret = (int16x4_t)(__p0); |
| 58405 | __ai int8x16_t vpminq_s8(int8x16_t __p0, int8x16_t __p1) { | | |
| 58406 | int8x16_t __ret; | | |
| 58407 | __ret = (int8x16_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 32); | | |
| 58408 | return __ret; | 58200 | return __ret; |
| 58409 | } | 58201 | } |
| 58410 | #else | 58202 | __ai int16x4_t vreinterpret_s16_p16(poly16x4_t __p0) { |
| 58411 | __ai int8x16_t vpminq_s8(int8x16_t __p0, int8x16_t __p1) { | 58203 | int16x4_t __ret; |
| 58412 | int8x16_t __ret; | 58204 | __ret = (int16x4_t)(__p0); |
| 58413 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58414 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58415 | __ret = (int8x16_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 32); | | |
| 58416 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58417 | return __ret; | 58205 | return __ret; |
| 58418 | } | 58206 | } |
| 58419 | #endif | 58207 | __ai int16x4_t vreinterpret_s16_u8(uint8x8_t __p0) { |
| 58420 | | 58208 | int16x4_t __ret; |
| 58421 | #ifdef __LITTLE_ENDIAN__ | 58209 | __ret = (int16x4_t)(__p0); |
| 58422 | __ai float64x2_t vpminq_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 58423 | float64x2_t __ret; | | |
| 58424 | __ret = (float64x2_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | | |
| 58425 | return __ret; | 58210 | return __ret; |
| 58426 | } | 58211 | } |
| 58427 | #else | 58212 | __ai int16x4_t vreinterpret_s16_u32(uint32x2_t __p0) { |
| 58428 | __ai float64x2_t vpminq_f64(float64x2_t __p0, float64x2_t __p1) { | 58213 | int16x4_t __ret; |
| 58429 | float64x2_t __ret; | 58214 | __ret = (int16x4_t)(__p0); |
| 58430 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 58431 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 58432 | __ret = (float64x2_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); | | |
| 58433 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 58434 | return __ret; | 58215 | return __ret; |
| 58435 | } | 58216 | } |
| 58436 | #endif | 58217 | __ai int16x4_t vreinterpret_s16_u64(uint64x1_t __p0) { |
| 58437 | | 58218 | int16x4_t __ret; |
| 58438 | #ifdef __LITTLE_ENDIAN__ | 58219 | __ret = (int16x4_t)(__p0); |
| 58439 | __ai float32x4_t vpminq_f32(float32x4_t __p0, float32x4_t __p1) { | | |
| 58440 | float32x4_t __ret; | | |
| 58441 | __ret = (float32x4_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); | | |
| 58442 | return __ret; | 58220 | return __ret; |
| 58443 | } | 58221 | } |
| 58444 | #else | 58222 | __ai int16x4_t vreinterpret_s16_u16(uint16x4_t __p0) { |
| 58445 | __ai float32x4_t vpminq_f32(float32x4_t __p0, float32x4_t __p1) { | 58223 | int16x4_t __ret; |
| 58446 | float32x4_t __ret; | 58224 | __ret = (int16x4_t)(__p0); |
| 58447 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 58448 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 58449 | __ret = (float32x4_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); | | |
| 58450 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 58451 | return __ret; | 58225 | return __ret; |
| 58452 | } | 58226 | } |
| 58453 | #endif | 58227 | __ai int16x4_t vreinterpret_s16_s8(int8x8_t __p0) { |
| 58454 | | 58228 | int16x4_t __ret; |
| 58455 | #ifdef __LITTLE_ENDIAN__ | 58229 | __ret = (int16x4_t)(__p0); |
| 58456 | __ai int32x4_t vpminq_s32(int32x4_t __p0, int32x4_t __p1) { | | |
| 58457 | int32x4_t __ret; | | |
| 58458 | __ret = (int32x4_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 34); | | |
| 58459 | return __ret; | 58230 | return __ret; |
| 58460 | } | 58231 | } |
| 58461 | #else | 58232 | __ai int16x4_t vreinterpret_s16_f64(float64x1_t __p0) { |
| 58462 | __ai int32x4_t vpminq_s32(int32x4_t __p0, int32x4_t __p1) { | 58233 | int16x4_t __ret; |
| 58463 | int32x4_t __ret; | 58234 | __ret = (int16x4_t)(__p0); |
| 58464 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 58465 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 58466 | __ret = (int32x4_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 34); | | |
| 58467 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 58468 | return __ret; | 58235 | return __ret; |
| 58469 | } | 58236 | } |
| 58470 | #endif | 58237 | __ai int16x4_t vreinterpret_s16_f32(float32x2_t __p0) { |
| 58471 | | 58238 | int16x4_t __ret; |
| 58472 | #ifdef __LITTLE_ENDIAN__ | 58239 | __ret = (int16x4_t)(__p0); |
| 58473 | __ai int16x8_t vpminq_s16(int16x8_t __p0, int16x8_t __p1) { | | |
| 58474 | int16x8_t __ret; | | |
| 58475 | __ret = (int16x8_t) __builtin_neon_vpminq_v((int8x16_t)__p0, (int8x16_t)__p1, 33); | | |
| 58476 | return __ret; | 58240 | return __ret; |
| 58477 | } | 58241 | } |
| 58478 | #else | 58242 | __ai int16x4_t vreinterpret_s16_f16(float16x4_t __p0) { |
| 58479 | __ai int16x8_t vpminq_s16(int16x8_t __p0, int16x8_t __p1) { | 58243 | int16x4_t __ret; |
| 58480 | int16x8_t __ret; | 58244 | __ret = (int16x4_t)(__p0); |
| 58481 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58482 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58483 | __ret = (int16x8_t) __builtin_neon_vpminq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 33); | | |
| 58484 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 58485 | return __ret; | 58245 | return __ret; |
| 58486 | } | 58246 | } |
| 58487 | #endif | 58247 | __ai int16x4_t vreinterpret_s16_s32(int32x2_t __p0) { |
| 58488 | | 58248 | int16x4_t __ret; |
| 58489 | #ifdef __LITTLE_ENDIAN__ | 58249 | __ret = (int16x4_t)(__p0); |
| 58490 | __ai float64_t vpminqd_f64(float64x2_t __p0) { | | |
| 58491 | float64_t __ret; | | |
| 58492 | __ret = (float64_t) __builtin_neon_vpminqd_f64(__p0); | | |
| 58493 | return __ret; | 58250 | return __ret; |
| 58494 | } | 58251 | } |
| 58495 | #else | 58252 | __ai int16x4_t vreinterpret_s16_s64(int64x1_t __p0) { |
| 58496 | __ai float64_t vpminqd_f64(float64x2_t __p0) { | 58253 | int16x4_t __ret; |
| 58497 | float64_t __ret; | 58254 | __ret = (int16x4_t)(__p0); |
| 58498 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 58499 | __ret = (float64_t) __builtin_neon_vpminqd_f64(__rev0); | | |
| 58500 | return __ret; | 58255 | return __ret; |
| 58501 | } | 58256 | } |
| 58502 | #endif | 58257 | __ai uint64_t vrshld_u64(uint64_t __p0, int64_t __p1) { |
| 58503 | | 58258 | uint64_t __ret; |
| 58504 | #ifdef __LITTLE_ENDIAN__ | 58259 | __ret = (uint64_t) __builtin_neon_vrshld_u64(__p0, __p1); |
| 58505 | __ai float32_t vpmins_f32(float32x2_t __p0) { | | |
| 58506 | float32_t __ret; | | |
| 58507 | __ret = (float32_t) __builtin_neon_vpmins_f32(__p0); | | |
| 58508 | return __ret; | 58260 | return __ret; |
| 58509 | } | 58261 | } |
| 58510 | #else | 58262 | __ai int64_t vrshld_s64(int64_t __p0, int64_t __p1) { |
| 58511 | __ai float32_t vpmins_f32(float32x2_t __p0) { | 58263 | int64_t __ret; |
| 58512 | float32_t __ret; | 58264 | __ret = (int64_t) __builtin_neon_vrshld_s64(__p0, __p1); |
| 58513 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 58514 | __ret = (float32_t) __builtin_neon_vpmins_f32(__rev0); | | |
| 58515 | return __ret; | 58265 | return __ret; |
| 58516 | } | 58266 | } |
| | 58267 | #define vrshrd_n_u64(__p0, __p1) __extension__ ({ \ |
| | 58268 | uint64_t __ret; \ |
| | 58269 | uint64_t __s0 = __p0; \ |
| | 58270 | __ret = (uint64_t) __builtin_neon_vrshrd_n_u64(__s0, __p1); \ |
| | 58271 | __ret; \ |
| | 58272 | }) |
| | 58273 | #define vrshrd_n_s64(__p0, __p1) __extension__ ({ \ |
| | 58274 | int64_t __ret; \ |
| | 58275 | int64_t __s0 = __p0; \ |
| | 58276 | __ret = (int64_t) __builtin_neon_vrshrd_n_s64(__s0, __p1); \ |
| | 58277 | __ret; \ |
| | 58278 | }) |
| | 58279 | #ifdef __LITTLE_ENDIAN__ |
| | 58280 | #define vrshrn_high_n_u32(__p0_703, __p1_703, __p2_703) __extension__ ({ \ |
| | 58281 | uint16x8_t __ret_703; \ |
| | 58282 | uint16x4_t __s0_703 = __p0_703; \ |
| | 58283 | uint32x4_t __s1_703 = __p1_703; \ |
| | 58284 | __ret_703 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_703), (uint16x4_t)(vrshrn_n_u32(__s1_703, __p2_703)))); \ |
| | 58285 | __ret_703; \ |
| | 58286 | }) |
| | 58287 | #else |
| | 58288 | #define vrshrn_high_n_u32(__p0_704, __p1_704, __p2_704) __extension__ ({ \ |
| | 58289 | uint16x8_t __ret_704; \ |
| | 58290 | uint16x4_t __s0_704 = __p0_704; \ |
| | 58291 | uint32x4_t __s1_704 = __p1_704; \ |
| | 58292 | uint16x4_t __rev0_704; __rev0_704 = __builtin_shufflevector(__s0_704, __s0_704, 3, 2, 1, 0); \ |
| | 58293 | uint32x4_t __rev1_704; __rev1_704 = __builtin_shufflevector(__s1_704, __s1_704, 3, 2, 1, 0); \ |
| | 58294 | __ret_704 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_704), (uint16x4_t)(__noswap_vrshrn_n_u32(__rev1_704, __p2_704)))); \ |
| | 58295 | __ret_704 = __builtin_shufflevector(__ret_704, __ret_704, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 58296 | __ret_704; \ |
| | 58297 | }) |
| 58517 | #endif | 58298 | #endif |
| 58518 | | 58299 | |
| 58519 | #ifdef __LITTLE_ENDIAN__ | 58300 | #ifdef __LITTLE_ENDIAN__ |
| 58520 | __ai float64x2_t vpminnmq_f64(float64x2_t __p0, float64x2_t __p1) { | 58301 | #define vrshrn_high_n_u64(__p0_705, __p1_705, __p2_705) __extension__ ({ \ |
| 58521 | float64x2_t __ret; | 58302 | uint32x4_t __ret_705; \ |
| 58522 | __ret = (float64x2_t) __builtin_neon_vpminnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | 58303 | uint32x2_t __s0_705 = __p0_705; \ |
| 58523 | return __ret; | 58304 | uint64x2_t __s1_705 = __p1_705; \ |
| 58524 | } | 58305 | __ret_705 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_705), (uint32x2_t)(vrshrn_n_u64(__s1_705, __p2_705)))); \ |
| | 58306 | __ret_705; \ |
| | 58307 | }) |
| 58525 | #else | 58308 | #else |
| 58526 | __ai float64x2_t vpminnmq_f64(float64x2_t __p0, float64x2_t __p1) { | 58309 | #define vrshrn_high_n_u64(__p0_706, __p1_706, __p2_706) __extension__ ({ \ |
| 58527 | float64x2_t __ret; | 58310 | uint32x4_t __ret_706; \ |
| 58528 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 58311 | uint32x2_t __s0_706 = __p0_706; \ |
| 58529 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 58312 | uint64x2_t __s1_706 = __p1_706; \ |
| 58530 | __ret = (float64x2_t) __builtin_neon_vpminnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); | 58313 | uint32x2_t __rev0_706; __rev0_706 = __builtin_shufflevector(__s0_706, __s0_706, 1, 0); \ |
| 58531 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 58314 | uint64x2_t __rev1_706; __rev1_706 = __builtin_shufflevector(__s1_706, __s1_706, 1, 0); \ |
| 58532 | return __ret; | 58315 | __ret_706 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_706), (uint32x2_t)(__noswap_vrshrn_n_u64(__rev1_706, __p2_706)))); \ |
| 58533 | } | 58316 | __ret_706 = __builtin_shufflevector(__ret_706, __ret_706, 3, 2, 1, 0); \ |
| | 58317 | __ret_706; \ |
| | 58318 | }) |
| 58534 | #endif | 58319 | #endif |
| 58535 | | 58320 | |
| 58536 | #ifdef __LITTLE_ENDIAN__ | 58321 | #ifdef __LITTLE_ENDIAN__ |
| 58537 | __ai float32x4_t vpminnmq_f32(float32x4_t __p0, float32x4_t __p1) { | 58322 | #define vrshrn_high_n_u16(__p0_707, __p1_707, __p2_707) __extension__ ({ \ |
| 58538 | float32x4_t __ret; | 58323 | uint8x16_t __ret_707; \ |
| 58539 | __ret = (float32x4_t) __builtin_neon_vpminnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 41); | 58324 | uint8x8_t __s0_707 = __p0_707; \ |
| 58540 | return __ret; | 58325 | uint16x8_t __s1_707 = __p1_707; \ |
| 58541 | } | 58326 | __ret_707 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_707), (uint8x8_t)(vrshrn_n_u16(__s1_707, __p2_707)))); \ |
| | 58327 | __ret_707; \ |
| | 58328 | }) |
| 58542 | #else | 58329 | #else |
| 58543 | __ai float32x4_t vpminnmq_f32(float32x4_t __p0, float32x4_t __p1) { | 58330 | #define vrshrn_high_n_u16(__p0_708, __p1_708, __p2_708) __extension__ ({ \ |
| 58544 | float32x4_t __ret; | 58331 | uint8x16_t __ret_708; \ |
| 58545 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 58332 | uint8x8_t __s0_708 = __p0_708; \ |
| 58546 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 58333 | uint16x8_t __s1_708 = __p1_708; \ |
| 58547 | __ret = (float32x4_t) __builtin_neon_vpminnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); | 58334 | uint8x8_t __rev0_708; __rev0_708 = __builtin_shufflevector(__s0_708, __s0_708, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58548 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 58335 | uint16x8_t __rev1_708; __rev1_708 = __builtin_shufflevector(__s1_708, __s1_708, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58549 | return __ret; | 58336 | __ret_708 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_708), (uint8x8_t)(__noswap_vrshrn_n_u16(__rev1_708, __p2_708)))); \ |
| 58550 | } | 58337 | __ret_708 = __builtin_shufflevector(__ret_708, __ret_708, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 58338 | __ret_708; \ |
| | 58339 | }) |
| 58551 | #endif | 58340 | #endif |
| 58552 | | 58341 | |
| 58553 | #ifdef __LITTLE_ENDIAN__ | 58342 | #ifdef __LITTLE_ENDIAN__ |
| 58554 | __ai float32x2_t vpminnm_f32(float32x2_t __p0, float32x2_t __p1) { | 58343 | #define vrshrn_high_n_s32(__p0_709, __p1_709, __p2_709) __extension__ ({ \ |
| 58555 | float32x2_t __ret; | 58344 | int16x8_t __ret_709; \ |
| 58556 | __ret = (float32x2_t) __builtin_neon_vpminnm_v((int8x8_t)__p0, (int8x8_t)__p1, 9); | 58345 | int16x4_t __s0_709 = __p0_709; \ |
| 58557 | return __ret; | 58346 | int32x4_t __s1_709 = __p1_709; \ |
| 58558 | } | 58347 | __ret_709 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_709), (int16x4_t)(vrshrn_n_s32(__s1_709, __p2_709)))); \ |
| | 58348 | __ret_709; \ |
| | 58349 | }) |
| 58559 | #else | 58350 | #else |
| 58560 | __ai float32x2_t vpminnm_f32(float32x2_t __p0, float32x2_t __p1) { | 58351 | #define vrshrn_high_n_s32(__p0_710, __p1_710, __p2_710) __extension__ ({ \ |
| 58561 | float32x2_t __ret; | 58352 | int16x8_t __ret_710; \ |
| 58562 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 58353 | int16x4_t __s0_710 = __p0_710; \ |
| 58563 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 58354 | int32x4_t __s1_710 = __p1_710; \ |
| 58564 | __ret = (float32x2_t) __builtin_neon_vpminnm_v((int8x8_t)__rev0, (int8x8_t)__rev1, 9); | 58355 | int16x4_t __rev0_710; __rev0_710 = __builtin_shufflevector(__s0_710, __s0_710, 3, 2, 1, 0); \ |
| 58565 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 58356 | int32x4_t __rev1_710; __rev1_710 = __builtin_shufflevector(__s1_710, __s1_710, 3, 2, 1, 0); \ |
| 58566 | return __ret; | 58357 | __ret_710 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_710), (int16x4_t)(__noswap_vrshrn_n_s32(__rev1_710, __p2_710)))); \ |
| 58567 | } | 58358 | __ret_710 = __builtin_shufflevector(__ret_710, __ret_710, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 58359 | __ret_710; \ |
| | 58360 | }) |
| 58568 | #endif | 58361 | #endif |
| 58569 | | 58362 | |
| 58570 | #ifdef __LITTLE_ENDIAN__ | 58363 | #ifdef __LITTLE_ENDIAN__ |
| 58571 | __ai float64_t vpminnmqd_f64(float64x2_t __p0) { | 58364 | #define vrshrn_high_n_s64(__p0_711, __p1_711, __p2_711) __extension__ ({ \ |
| 58572 | float64_t __ret; | 58365 | int32x4_t __ret_711; \ |
| 58573 | __ret = (float64_t) __builtin_neon_vpminnmqd_f64(__p0); | 58366 | int32x2_t __s0_711 = __p0_711; \ |
| 58574 | return __ret; | 58367 | int64x2_t __s1_711 = __p1_711; \ |
| 58575 | } | 58368 | __ret_711 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_711), (int32x2_t)(vrshrn_n_s64(__s1_711, __p2_711)))); \ |
| | 58369 | __ret_711; \ |
| | 58370 | }) |
| 58576 | #else | 58371 | #else |
| 58577 | __ai float64_t vpminnmqd_f64(float64x2_t __p0) { | 58372 | #define vrshrn_high_n_s64(__p0_712, __p1_712, __p2_712) __extension__ ({ \ |
| 58578 | float64_t __ret; | 58373 | int32x4_t __ret_712; \ |
| 58579 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 58374 | int32x2_t __s0_712 = __p0_712; \ |
| 58580 | __ret = (float64_t) __builtin_neon_vpminnmqd_f64(__rev0); | 58375 | int64x2_t __s1_712 = __p1_712; \ |
| 58581 | return __ret; | 58376 | int32x2_t __rev0_712; __rev0_712 = __builtin_shufflevector(__s0_712, __s0_712, 1, 0); \ |
| 58582 | } | 58377 | int64x2_t __rev1_712; __rev1_712 = __builtin_shufflevector(__s1_712, __s1_712, 1, 0); \ |
| | 58378 | __ret_712 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_712), (int32x2_t)(__noswap_vrshrn_n_s64(__rev1_712, __p2_712)))); \ |
| | 58379 | __ret_712 = __builtin_shufflevector(__ret_712, __ret_712, 3, 2, 1, 0); \ |
| | 58380 | __ret_712; \ |
| | 58381 | }) |
| 58583 | #endif | 58382 | #endif |
| 58584 | | 58383 | |
| 58585 | #ifdef __LITTLE_ENDIAN__ | 58384 | #ifdef __LITTLE_ENDIAN__ |
| 58586 | __ai float32_t vpminnms_f32(float32x2_t __p0) { | 58385 | #define vrshrn_high_n_s16(__p0_713, __p1_713, __p2_713) __extension__ ({ \ |
| 58587 | float32_t __ret; | 58386 | int8x16_t __ret_713; \ |
| 58588 | __ret = (float32_t) __builtin_neon_vpminnms_f32(__p0); | 58387 | int8x8_t __s0_713 = __p0_713; \ |
| 58589 | return __ret; | 58388 | int16x8_t __s1_713 = __p1_713; \ |
| 58590 | } | 58389 | __ret_713 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_713), (int8x8_t)(vrshrn_n_s16(__s1_713, __p2_713)))); \ |
| | 58390 | __ret_713; \ |
| | 58391 | }) |
| 58591 | #else | 58392 | #else |
| 58592 | __ai float32_t vpminnms_f32(float32x2_t __p0) { | 58393 | #define vrshrn_high_n_s16(__p0_714, __p1_714, __p2_714) __extension__ ({ \ |
| 58593 | float32_t __ret; | 58394 | int8x16_t __ret_714; \ |
| 58594 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 58395 | int8x8_t __s0_714 = __p0_714; \ |
| 58595 | __ret = (float32_t) __builtin_neon_vpminnms_f32(__rev0); | 58396 | int16x8_t __s1_714 = __p1_714; \ |
| 58596 | return __ret; | 58397 | int8x8_t __rev0_714; __rev0_714 = __builtin_shufflevector(__s0_714, __s0_714, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58597 | } | 58398 | int16x8_t __rev1_714; __rev1_714 = __builtin_shufflevector(__s1_714, __s1_714, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 58399 | __ret_714 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_714), (int8x8_t)(__noswap_vrshrn_n_s16(__rev1_714, __p2_714)))); \ |
| | 58400 | __ret_714 = __builtin_shufflevector(__ret_714, __ret_714, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 58401 | __ret_714; \ |
| | 58402 | }) |
| 58598 | #endif | 58403 | #endif |
| 58599 | | 58404 | |
| 58600 | #ifdef __LITTLE_ENDIAN__ | 58405 | #ifdef __LITTLE_ENDIAN__ |
| 58601 | __ai int64x2_t vqabsq_s64(int64x2_t __p0) { | 58406 | __ai float64x2_t vrsqrteq_f64(float64x2_t __p0) { |
| 58602 | int64x2_t __ret; | 58407 | float64x2_t __ret; |
| 58603 | __ret = (int64x2_t) __builtin_neon_vqabsq_v((int8x16_t)__p0, 35); | 58408 | __ret = (float64x2_t) __builtin_neon_vrsqrteq_v((int8x16_t)__p0, 42); |
| 58604 | return __ret; | 58409 | return __ret; |
| 58605 | } | 58410 | } |
| 58606 | #else | 58411 | #else |
| 58607 | __ai int64x2_t vqabsq_s64(int64x2_t __p0) { | 58412 | __ai float64x2_t vrsqrteq_f64(float64x2_t __p0) { |
| 58608 | int64x2_t __ret; | 58413 | float64x2_t __ret; |
| 58609 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 58414 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 58610 | __ret = (int64x2_t) __builtin_neon_vqabsq_v((int8x16_t)__rev0, 35); | 58415 | __ret = (float64x2_t) __builtin_neon_vrsqrteq_v((int8x16_t)__rev0, 42); |
| 58611 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 58416 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 58612 | return __ret; | 58417 | return __ret; |
| 58613 | } | 58418 | } |
| 58614 | #endif | 58419 | #endif |
| 58615 | | 58420 | |
| 58616 | __ai int64x1_t vqabs_s64(int64x1_t __p0) { | 58421 | __ai float64x1_t vrsqrte_f64(float64x1_t __p0) { |
| 58617 | int64x1_t __ret; | 58422 | float64x1_t __ret; |
| 58618 | __ret = (int64x1_t) __builtin_neon_vqabs_v((int8x8_t)__p0, 3); | 58423 | __ret = (float64x1_t) __builtin_neon_vrsqrte_v((int8x8_t)__p0, 10); |
| 58619 | return __ret; | | |
| 58620 | } | | |
| 58621 | __ai int8_t vqabsb_s8(int8_t __p0) { | | |
| 58622 | int8_t __ret; | | |
| 58623 | __ret = (int8_t) __builtin_neon_vqabsb_s8(__p0); | | |
| 58624 | return __ret; | 58424 | return __ret; |
| 58625 | } | 58425 | } |
| 58626 | __ai int32_t vqabss_s32(int32_t __p0) { | 58426 | __ai float64_t vrsqrted_f64(float64_t __p0) { |
| 58627 | int32_t __ret; | 58427 | float64_t __ret; |
| 58628 | __ret = (int32_t) __builtin_neon_vqabss_s32(__p0); | 58428 | __ret = (float64_t) __builtin_neon_vrsqrted_f64(__p0); |
| 58629 | return __ret; | 58429 | return __ret; |
| 58630 | } | 58430 | } |
| 58631 | __ai int64_t vqabsd_s64(int64_t __p0) { | 58431 | __ai float32_t vrsqrtes_f32(float32_t __p0) { |
| 58632 | int64_t __ret; | 58432 | float32_t __ret; |
| 58633 | __ret = (int64_t) __builtin_neon_vqabsd_s64(__p0); | 58433 | __ret = (float32_t) __builtin_neon_vrsqrtes_f32(__p0); |
| 58634 | return __ret; | 58434 | return __ret; |
| 58635 | } | 58435 | } |
| 58636 | __ai int16_t vqabsh_s16(int16_t __p0) { | 58436 | #ifdef __LITTLE_ENDIAN__ |
| 58637 | int16_t __ret; | 58437 | __ai float64x2_t vrsqrtsq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 58638 | __ret = (int16_t) __builtin_neon_vqabsh_s16(__p0); | 58438 | float64x2_t __ret; |
| | 58439 | __ret = (float64x2_t) __builtin_neon_vrsqrtsq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| 58639 | return __ret; | 58440 | return __ret; |
| 58640 | } | 58441 | } |
| 58641 | __ai uint8_t vqaddb_u8(uint8_t __p0, uint8_t __p1) { | 58442 | #else |
| 58642 | uint8_t __ret; | 58443 | __ai float64x2_t vrsqrtsq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 58643 | __ret = (uint8_t) __builtin_neon_vqaddb_u8(__p0, __p1); | 58444 | float64x2_t __ret; |
| | 58445 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 58446 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 58447 | __ret = (float64x2_t) __builtin_neon_vrsqrtsq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| | 58448 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 58644 | return __ret; | 58449 | return __ret; |
| 58645 | } | 58450 | } |
| 58646 | __ai uint32_t vqadds_u32(uint32_t __p0, uint32_t __p1) { | 58451 | #endif |
| 58647 | uint32_t __ret; | 58452 | |
| 58648 | __ret = (uint32_t) __builtin_neon_vqadds_u32(__p0, __p1); | 58453 | __ai float64x1_t vrsqrts_f64(float64x1_t __p0, float64x1_t __p1) { |
| | 58454 | float64x1_t __ret; |
| | 58455 | __ret = (float64x1_t) __builtin_neon_vrsqrts_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| 58649 | return __ret; | 58456 | return __ret; |
| 58650 | } | 58457 | } |
| 58651 | __ai uint64_t vqaddd_u64(uint64_t __p0, uint64_t __p1) { | 58458 | __ai float64_t vrsqrtsd_f64(float64_t __p0, float64_t __p1) { |
| 58652 | uint64_t __ret; | 58459 | float64_t __ret; |
| 58653 | __ret = (uint64_t) __builtin_neon_vqaddd_u64(__p0, __p1); | 58460 | __ret = (float64_t) __builtin_neon_vrsqrtsd_f64(__p0, __p1); |
| 58654 | return __ret; | 58461 | return __ret; |
| 58655 | } | 58462 | } |
| 58656 | __ai uint16_t vqaddh_u16(uint16_t __p0, uint16_t __p1) { | 58463 | __ai float32_t vrsqrtss_f32(float32_t __p0, float32_t __p1) { |
| 58657 | uint16_t __ret; | 58464 | float32_t __ret; |
| 58658 | __ret = (uint16_t) __builtin_neon_vqaddh_u16(__p0, __p1); | 58465 | __ret = (float32_t) __builtin_neon_vrsqrtss_f32(__p0, __p1); |
| 58659 | return __ret; | 58466 | return __ret; |
| 58660 | } | 58467 | } |
| 58661 | __ai int8_t vqaddb_s8(int8_t __p0, int8_t __p1) { | 58468 | #define vrsrad_n_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 58662 | int8_t __ret; | 58469 | uint64_t __ret; \ |
| 58663 | __ret = (int8_t) __builtin_neon_vqaddb_s8(__p0, __p1); | 58470 | uint64_t __s0 = __p0; \ |
| | 58471 | uint64_t __s1 = __p1; \ |
| | 58472 | __ret = (uint64_t) __builtin_neon_vrsrad_n_u64(__s0, __s1, __p2); \ |
| | 58473 | __ret; \ |
| | 58474 | }) |
| | 58475 | #define vrsrad_n_s64(__p0, __p1, __p2) __extension__ ({ \ |
| | 58476 | int64_t __ret; \ |
| | 58477 | int64_t __s0 = __p0; \ |
| | 58478 | int64_t __s1 = __p1; \ |
| | 58479 | __ret = (int64_t) __builtin_neon_vrsrad_n_s64(__s0, __s1, __p2); \ |
| | 58480 | __ret; \ |
| | 58481 | }) |
| | 58482 | #ifdef __LITTLE_ENDIAN__ |
| | 58483 | __ai uint16x8_t vrsubhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| | 58484 | uint16x8_t __ret; |
| | 58485 | __ret = vcombine_u16(__p0, vrsubhn_u32(__p1, __p2)); |
| 58664 | return __ret; | 58486 | return __ret; |
| 58665 | } | 58487 | } |
| 58666 | __ai int32_t vqadds_s32(int32_t __p0, int32_t __p1) { | 58488 | #else |
| 58667 | int32_t __ret; | 58489 | __ai uint16x8_t vrsubhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 58668 | __ret = (int32_t) __builtin_neon_vqadds_s32(__p0, __p1); | 58490 | uint16x8_t __ret; |
| | 58491 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 58492 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 58493 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 58494 | __ret = __noswap_vcombine_u16(__rev0, __noswap_vrsubhn_u32(__rev1, __rev2)); |
| | 58495 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 58669 | return __ret; | 58496 | return __ret; |
| 58670 | } | 58497 | } |
| 58671 | __ai int64_t vqaddd_s64(int64_t __p0, int64_t __p1) { | 58498 | #endif |
| 58672 | int64_t __ret; | 58499 | |
| 58673 | __ret = (int64_t) __builtin_neon_vqaddd_s64(__p0, __p1); | 58500 | #ifdef __LITTLE_ENDIAN__ |
| | 58501 | __ai uint32x4_t vrsubhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| | 58502 | uint32x4_t __ret; |
| | 58503 | __ret = vcombine_u32(__p0, vrsubhn_u64(__p1, __p2)); |
| 58674 | return __ret; | 58504 | return __ret; |
| 58675 | } | 58505 | } |
| 58676 | __ai int16_t vqaddh_s16(int16_t __p0, int16_t __p1) { | 58506 | #else |
| 58677 | int16_t __ret; | 58507 | __ai uint32x4_t vrsubhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 58678 | __ret = (int16_t) __builtin_neon_vqaddh_s16(__p0, __p1); | 58508 | uint32x4_t __ret; |
| | 58509 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 58510 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 58511 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 58512 | __ret = __noswap_vcombine_u32(__rev0, __noswap_vrsubhn_u64(__rev1, __rev2)); |
| | 58513 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 58679 | return __ret; | 58514 | return __ret; |
| 58680 | } | 58515 | } |
| 58681 | __ai int64_t vqdmlals_s32(int64_t __p0, int32_t __p1, int32_t __p2) { | 58516 | #endif |
| 58682 | int64_t __ret; | 58517 | |
| 58683 | __ret = (int64_t) __builtin_neon_vqdmlals_s32(__p0, __p1, __p2); | 58518 | #ifdef __LITTLE_ENDIAN__ |
| | 58519 | __ai uint8x16_t vrsubhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { |
| | 58520 | uint8x16_t __ret; |
| | 58521 | __ret = vcombine_u8(__p0, vrsubhn_u16(__p1, __p2)); |
| 58684 | return __ret; | 58522 | return __ret; |
| 58685 | } | 58523 | } |
| 58686 | __ai int32_t vqdmlalh_s16(int32_t __p0, int16_t __p1, int16_t __p2) { | 58524 | #else |
| 58687 | int32_t __ret; | 58525 | __ai uint8x16_t vrsubhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { |
| 58688 | __ret = (int32_t) __builtin_neon_vqdmlalh_s16(__p0, __p1, __p2); | 58526 | uint8x16_t __ret; |
| | 58527 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 58528 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 58529 | uint16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 58530 | __ret = __noswap_vcombine_u8(__rev0, __noswap_vrsubhn_u16(__rev1, __rev2)); |
| | 58531 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 58689 | return __ret; | 58532 | return __ret; |
| 58690 | } | 58533 | } |
| | 58534 | #endif |
| | 58535 | |
| 58691 | #ifdef __LITTLE_ENDIAN__ | 58536 | #ifdef __LITTLE_ENDIAN__ |
| 58692 | __ai int64x2_t vqdmlal_high_s32(int64x2_t __p0, int32x4_t __p1, int32x4_t __p2) { | 58537 | __ai int16x8_t vrsubhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 58693 | int64x2_t __ret; | 58538 | int16x8_t __ret; |
| 58694 | __ret = vqdmlal_s32(__p0, vget_high_s32(__p1), vget_high_s32(__p2)); | 58539 | __ret = vcombine_s16(__p0, vrsubhn_s32(__p1, __p2)); |
| 58695 | return __ret; | 58540 | return __ret; |
| 58696 | } | 58541 | } |
| 58697 | #else | 58542 | #else |
| 58698 | __ai int64x2_t vqdmlal_high_s32(int64x2_t __p0, int32x4_t __p1, int32x4_t __p2) { | 58543 | __ai int16x8_t vrsubhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 58699 | int64x2_t __ret; | 58544 | int16x8_t __ret; |
| 58700 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 58545 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 58701 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 58546 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 58702 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 58547 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 58703 | __ret = __noswap_vqdmlal_s32(__rev0, __noswap_vget_high_s32(__rev1), __noswap_vget_high_s32(__rev2)); | 58548 | __ret = __noswap_vcombine_s16(__rev0, __noswap_vrsubhn_s32(__rev1, __rev2)); |
| 58704 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 58549 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 58705 | return __ret; | 58550 | return __ret; |
| 58706 | } | 58551 | } |
| 58707 | #endif | 58552 | #endif |
| 58708 | | 58553 | |
| 58709 | #ifdef __LITTLE_ENDIAN__ | 58554 | #ifdef __LITTLE_ENDIAN__ |
| 58710 | __ai int32x4_t vqdmlal_high_s16(int32x4_t __p0, int16x8_t __p1, int16x8_t __p2) { | 58555 | __ai int32x4_t vrsubhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { |
| 58711 | int32x4_t __ret; | 58556 | int32x4_t __ret; |
| 58712 | __ret = vqdmlal_s16(__p0, vget_high_s16(__p1), vget_high_s16(__p2)); | 58557 | __ret = vcombine_s32(__p0, vrsubhn_s64(__p1, __p2)); |
| 58713 | return __ret; | 58558 | return __ret; |
| 58714 | } | 58559 | } |
| 58715 | #else | 58560 | #else |
| 58716 | __ai int32x4_t vqdmlal_high_s16(int32x4_t __p0, int16x8_t __p1, int16x8_t __p2) { | 58561 | __ai int32x4_t vrsubhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { |
| 58717 | int32x4_t __ret; | 58562 | int32x4_t __ret; |
| 58718 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 58563 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 58564 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 58565 | int64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 58566 | __ret = __noswap_vcombine_s32(__rev0, __noswap_vrsubhn_s64(__rev1, __rev2)); |
| | 58567 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 58568 | return __ret; |
| | 58569 | } |
| | 58570 | #endif |
| | 58571 | |
| | 58572 | #ifdef __LITTLE_ENDIAN__ |
| | 58573 | __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| | 58574 | int8x16_t __ret; |
| | 58575 | __ret = vcombine_s8(__p0, vrsubhn_s16(__p1, __p2)); |
| | 58576 | return __ret; |
| | 58577 | } |
| | 58578 | #else |
| | 58579 | __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| | 58580 | int8x16_t __ret; |
| | 58581 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 58719 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 58582 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 58720 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 58583 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 58721 | __ret = __noswap_vqdmlal_s16(__rev0, __noswap_vget_high_s16(__rev1), __noswap_vget_high_s16(__rev2)); | 58584 | __ret = __noswap_vcombine_s8(__rev0, __noswap_vrsubhn_s16(__rev1, __rev2)); |
| 58722 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 58585 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 58723 | return __ret; | 58586 | return __ret; |
| 58724 | } | 58587 | } |
| 58725 | #endif | 58588 | #endif |
| 58726 | | 58589 | |
| | 58590 | #define vset_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| | 58591 | poly64x1_t __ret; \ |
| | 58592 | poly64_t __s0 = __p0; \ |
| | 58593 | poly64x1_t __s1 = __p1; \ |
| | 58594 | __ret = (poly64x1_t) __builtin_neon_vset_lane_i64(__s0, (poly64x1_t)__s1, __p2); \ |
| | 58595 | __ret; \ |
| | 58596 | }) |
| 58727 | #ifdef __LITTLE_ENDIAN__ | 58597 | #ifdef __LITTLE_ENDIAN__ |
| 58728 | #define vqdmlal_high_lane_s32(__p0_711, __p1_711, __p2_711, __p3_711) __extension__ ({ \ | 58598 | #define vsetq_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 58729 | int64x2_t __ret_711; \ | 58599 | poly64x2_t __ret; \ |
| 58730 | int64x2_t __s0_711 = __p0_711; \ | 58600 | poly64_t __s0 = __p0; \ |
| 58731 | int32x4_t __s1_711 = __p1_711; \ | 58601 | poly64x2_t __s1 = __p1; \ |
| 58732 | int32x2_t __s2_711 = __p2_711; \ | 58602 | __ret = (poly64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (poly64x2_t)__s1, __p2); \ |
| 58733 | __ret_711 = vqdmlal_s32(__s0_711, vget_high_s32(__s1_711), splat_lane_s32(__s2_711, __p3_711)); \ | 58603 | __ret; \ |
| 58734 | __ret_711; \ | | |
| 58735 | }) | 58604 | }) |
| 58736 | #else | 58605 | #else |
| 58737 | #define vqdmlal_high_lane_s32(__p0_712, __p1_712, __p2_712, __p3_712) __extension__ ({ \ | 58606 | #define vsetq_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 58738 | int64x2_t __ret_712; \ | 58607 | poly64x2_t __ret; \ |
| 58739 | int64x2_t __s0_712 = __p0_712; \ | 58608 | poly64_t __s0 = __p0; \ |
| 58740 | int32x4_t __s1_712 = __p1_712; \ | 58609 | poly64x2_t __s1 = __p1; \ |
| 58741 | int32x2_t __s2_712 = __p2_712; \ | 58610 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 58742 | int64x2_t __rev0_712; __rev0_712 = __builtin_shufflevector(__s0_712, __s0_712, 1, 0); \ | 58611 | __ret = (poly64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (poly64x2_t)__rev1, __p2); \ |
| 58743 | int32x4_t __rev1_712; __rev1_712 = __builtin_shufflevector(__s1_712, __s1_712, 3, 2, 1, 0); \ | 58612 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 58744 | int32x2_t __rev2_712; __rev2_712 = __builtin_shufflevector(__s2_712, __s2_712, 1, 0); \ | 58613 | __ret; \ |
| 58745 | __ret_712 = __noswap_vqdmlal_s32(__rev0_712, __noswap_vget_high_s32(__rev1_712), __noswap_splat_lane_s32(__rev2_712, __p3_712)); \ | 58614 | }) |
| 58746 | __ret_712 = __builtin_shufflevector(__ret_712, __ret_712, 1, 0); \ | 58615 | #define __noswap_vsetq_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 58747 | __ret_712; \ | 58616 | poly64x2_t __ret; \ |
| | 58617 | poly64_t __s0 = __p0; \ |
| | 58618 | poly64x2_t __s1 = __p1; \ |
| | 58619 | __ret = (poly64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (poly64x2_t)__s1, __p2); \ |
| | 58620 | __ret; \ |
| 58748 | }) | 58621 | }) |
| 58749 | #endif | 58622 | #endif |
| 58750 | | 58623 | |
| 58751 | #ifdef __LITTLE_ENDIAN__ | 58624 | #ifdef __LITTLE_ENDIAN__ |
| 58752 | #define vqdmlal_high_lane_s16(__p0_713, __p1_713, __p2_713, __p3_713) __extension__ ({ \ | 58625 | #define vsetq_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 58753 | int32x4_t __ret_713; \ | 58626 | float64x2_t __ret; \ |
| 58754 | int32x4_t __s0_713 = __p0_713; \ | 58627 | float64_t __s0 = __p0; \ |
| 58755 | int16x8_t __s1_713 = __p1_713; \ | 58628 | float64x2_t __s1 = __p1; \ |
| 58756 | int16x4_t __s2_713 = __p2_713; \ | 58629 | __ret = (float64x2_t) __builtin_neon_vsetq_lane_f64(__s0, (float64x2_t)__s1, __p2); \ |
| 58757 | __ret_713 = vqdmlal_s16(__s0_713, vget_high_s16(__s1_713), splat_lane_s16(__s2_713, __p3_713)); \ | 58630 | __ret; \ |
| 58758 | __ret_713; \ | | |
| 58759 | }) | 58631 | }) |
| 58760 | #else | 58632 | #else |
| 58761 | #define vqdmlal_high_lane_s16(__p0_714, __p1_714, __p2_714, __p3_714) __extension__ ({ \ | 58633 | #define vsetq_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 58762 | int32x4_t __ret_714; \ | 58634 | float64x2_t __ret; \ |
| 58763 | int32x4_t __s0_714 = __p0_714; \ | 58635 | float64_t __s0 = __p0; \ |
| 58764 | int16x8_t __s1_714 = __p1_714; \ | 58636 | float64x2_t __s1 = __p1; \ |
| 58765 | int16x4_t __s2_714 = __p2_714; \ | 58637 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 58766 | int32x4_t __rev0_714; __rev0_714 = __builtin_shufflevector(__s0_714, __s0_714, 3, 2, 1, 0); \ | 58638 | __ret = (float64x2_t) __builtin_neon_vsetq_lane_f64(__s0, (float64x2_t)__rev1, __p2); \ |
| 58767 | int16x8_t __rev1_714; __rev1_714 = __builtin_shufflevector(__s1_714, __s1_714, 7, 6, 5, 4, 3, 2, 1, 0); \ | 58639 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 58768 | int16x4_t __rev2_714; __rev2_714 = __builtin_shufflevector(__s2_714, __s2_714, 3, 2, 1, 0); \ | 58640 | __ret; \ |
| 58769 | __ret_714 = __noswap_vqdmlal_s16(__rev0_714, __noswap_vget_high_s16(__rev1_714), __noswap_splat_lane_s16(__rev2_714, __p3_714)); \ | 58641 | }) |
| 58770 | __ret_714 = __builtin_shufflevector(__ret_714, __ret_714, 3, 2, 1, 0); \ | 58642 | #define __noswap_vsetq_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 58771 | __ret_714; \ | 58643 | float64x2_t __ret; \ |
| | 58644 | float64_t __s0 = __p0; \ |
| | 58645 | float64x2_t __s1 = __p1; \ |
| | 58646 | __ret = (float64x2_t) __builtin_neon_vsetq_lane_f64(__s0, (float64x2_t)__s1, __p2); \ |
| | 58647 | __ret; \ |
| 58772 | }) | 58648 | }) |
| 58773 | #endif | 58649 | #endif |
| 58774 | | 58650 | |
| | 58651 | #define vset_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| | 58652 | float64x1_t __ret; \ |
| | 58653 | float64_t __s0 = __p0; \ |
| | 58654 | float64x1_t __s1 = __p1; \ |
| | 58655 | __ret = (float64x1_t) __builtin_neon_vset_lane_f64(__s0, (float64x1_t)__s1, __p2); \ |
| | 58656 | __ret; \ |
| | 58657 | }) |
| | 58658 | __ai uint64_t vshld_u64(uint64_t __p0, int64_t __p1) { |
| | 58659 | uint64_t __ret; |
| | 58660 | __ret = (uint64_t) __builtin_neon_vshld_u64(__p0, __p1); |
| | 58661 | return __ret; |
| | 58662 | } |
| | 58663 | __ai int64_t vshld_s64(int64_t __p0, int64_t __p1) { |
| | 58664 | int64_t __ret; |
| | 58665 | __ret = (int64_t) __builtin_neon_vshld_s64(__p0, __p1); |
| | 58666 | return __ret; |
| | 58667 | } |
| | 58668 | #define vshld_n_u64(__p0, __p1) __extension__ ({ \ |
| | 58669 | uint64_t __ret; \ |
| | 58670 | uint64_t __s0 = __p0; \ |
| | 58671 | __ret = (uint64_t) __builtin_neon_vshld_n_u64(__s0, __p1); \ |
| | 58672 | __ret; \ |
| | 58673 | }) |
| | 58674 | #define vshld_n_s64(__p0, __p1) __extension__ ({ \ |
| | 58675 | int64_t __ret; \ |
| | 58676 | int64_t __s0 = __p0; \ |
| | 58677 | __ret = (int64_t) __builtin_neon_vshld_n_s64(__s0, __p1); \ |
| | 58678 | __ret; \ |
| | 58679 | }) |
| 58775 | #ifdef __LITTLE_ENDIAN__ | 58680 | #ifdef __LITTLE_ENDIAN__ |
| 58776 | #define vqdmlal_high_laneq_s32(__p0_715, __p1_715, __p2_715, __p3_715) __extension__ ({ \ | 58681 | #define vshll_high_n_u8(__p0_715, __p1_715) __extension__ ({ \ |
| 58777 | int64x2_t __ret_715; \ | 58682 | uint16x8_t __ret_715; \ |
| 58778 | int64x2_t __s0_715 = __p0_715; \ | 58683 | uint8x16_t __s0_715 = __p0_715; \ |
| 58779 | int32x4_t __s1_715 = __p1_715; \ | 58684 | __ret_715 = (uint16x8_t)(vshll_n_u8(vget_high_u8(__s0_715), __p1_715)); \ |
| 58780 | int32x4_t __s2_715 = __p2_715; \ | | |
| 58781 | __ret_715 = vqdmlal_s32(__s0_715, vget_high_s32(__s1_715), splat_laneq_s32(__s2_715, __p3_715)); \ | | |
| 58782 | __ret_715; \ | 58685 | __ret_715; \ |
| 58783 | }) | 58686 | }) |
| 58784 | #else | 58687 | #else |
| 58785 | #define vqdmlal_high_laneq_s32(__p0_716, __p1_716, __p2_716, __p3_716) __extension__ ({ \ | 58688 | #define vshll_high_n_u8(__p0_716, __p1_716) __extension__ ({ \ |
| 58786 | int64x2_t __ret_716; \ | 58689 | uint16x8_t __ret_716; \ |
| 58787 | int64x2_t __s0_716 = __p0_716; \ | 58690 | uint8x16_t __s0_716 = __p0_716; \ |
| 58788 | int32x4_t __s1_716 = __p1_716; \ | 58691 | uint8x16_t __rev0_716; __rev0_716 = __builtin_shufflevector(__s0_716, __s0_716, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58789 | int32x4_t __s2_716 = __p2_716; \ | 58692 | __ret_716 = (uint16x8_t)(__noswap_vshll_n_u8(__noswap_vget_high_u8(__rev0_716), __p1_716)); \ |
| 58790 | int64x2_t __rev0_716; __rev0_716 = __builtin_shufflevector(__s0_716, __s0_716, 1, 0); \ | 58693 | __ret_716 = __builtin_shufflevector(__ret_716, __ret_716, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58791 | int32x4_t __rev1_716; __rev1_716 = __builtin_shufflevector(__s1_716, __s1_716, 3, 2, 1, 0); \ | | |
| 58792 | int32x4_t __rev2_716; __rev2_716 = __builtin_shufflevector(__s2_716, __s2_716, 3, 2, 1, 0); \ | | |
| 58793 | __ret_716 = __noswap_vqdmlal_s32(__rev0_716, __noswap_vget_high_s32(__rev1_716), __noswap_splat_laneq_s32(__rev2_716, __p3_716)); \ | | |
| 58794 | __ret_716 = __builtin_shufflevector(__ret_716, __ret_716, 1, 0); \ | | |
| 58795 | __ret_716; \ | 58694 | __ret_716; \ |
| 58796 | }) | 58695 | }) |
| 58797 | #endif | 58696 | #endif |
| 58798 | | 58697 | |
| 58799 | #ifdef __LITTLE_ENDIAN__ | 58698 | #ifdef __LITTLE_ENDIAN__ |
| 58800 | #define vqdmlal_high_laneq_s16(__p0_717, __p1_717, __p2_717, __p3_717) __extension__ ({ \ | 58699 | #define vshll_high_n_u32(__p0_717, __p1_717) __extension__ ({ \ |
| 58801 | int32x4_t __ret_717; \ | 58700 | uint64x2_t __ret_717; \ |
| 58802 | int32x4_t __s0_717 = __p0_717; \ | 58701 | uint32x4_t __s0_717 = __p0_717; \ |
| 58803 | int16x8_t __s1_717 = __p1_717; \ | 58702 | __ret_717 = (uint64x2_t)(vshll_n_u32(vget_high_u32(__s0_717), __p1_717)); \ |
| 58804 | int16x8_t __s2_717 = __p2_717; \ | | |
| 58805 | __ret_717 = vqdmlal_s16(__s0_717, vget_high_s16(__s1_717), splat_laneq_s16(__s2_717, __p3_717)); \ | | |
| 58806 | __ret_717; \ | 58703 | __ret_717; \ |
| 58807 | }) | 58704 | }) |
| 58808 | #else | 58705 | #else |
| 58809 | #define vqdmlal_high_laneq_s16(__p0_718, __p1_718, __p2_718, __p3_718) __extension__ ({ \ | 58706 | #define vshll_high_n_u32(__p0_718, __p1_718) __extension__ ({ \ |
| 58810 | int32x4_t __ret_718; \ | 58707 | uint64x2_t __ret_718; \ |
| 58811 | int32x4_t __s0_718 = __p0_718; \ | 58708 | uint32x4_t __s0_718 = __p0_718; \ |
| 58812 | int16x8_t __s1_718 = __p1_718; \ | 58709 | uint32x4_t __rev0_718; __rev0_718 = __builtin_shufflevector(__s0_718, __s0_718, 3, 2, 1, 0); \ |
| 58813 | int16x8_t __s2_718 = __p2_718; \ | 58710 | __ret_718 = (uint64x2_t)(__noswap_vshll_n_u32(__noswap_vget_high_u32(__rev0_718), __p1_718)); \ |
| 58814 | int32x4_t __rev0_718; __rev0_718 = __builtin_shufflevector(__s0_718, __s0_718, 3, 2, 1, 0); \ | 58711 | __ret_718 = __builtin_shufflevector(__ret_718, __ret_718, 1, 0); \ |
| 58815 | int16x8_t __rev1_718; __rev1_718 = __builtin_shufflevector(__s1_718, __s1_718, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 58816 | int16x8_t __rev2_718; __rev2_718 = __builtin_shufflevector(__s2_718, __s2_718, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 58817 | __ret_718 = __noswap_vqdmlal_s16(__rev0_718, __noswap_vget_high_s16(__rev1_718), __noswap_splat_laneq_s16(__rev2_718, __p3_718)); \ | | |
| 58818 | __ret_718 = __builtin_shufflevector(__ret_718, __ret_718, 3, 2, 1, 0); \ | | |
| 58819 | __ret_718; \ | 58712 | __ret_718; \ |
| 58820 | }) | 58713 | }) |
| 58821 | #endif | 58714 | #endif |
| 58822 | | 58715 | |
| 58823 | #ifdef __LITTLE_ENDIAN__ | 58716 | #ifdef __LITTLE_ENDIAN__ |
| 58824 | __ai int64x2_t vqdmlal_high_n_s32(int64x2_t __p0, int32x4_t __p1, int32_t __p2) { | 58717 | #define vshll_high_n_u16(__p0_719, __p1_719) __extension__ ({ \ |
| 58825 | int64x2_t __ret; | 58718 | uint32x4_t __ret_719; \ |
| 58826 | __ret = vqdmlal_n_s32(__p0, vget_high_s32(__p1), __p2); | 58719 | uint16x8_t __s0_719 = __p0_719; \ |
| 58827 | return __ret; | 58720 | __ret_719 = (uint32x4_t)(vshll_n_u16(vget_high_u16(__s0_719), __p1_719)); \ |
| 58828 | } | 58721 | __ret_719; \ |
| | 58722 | }) |
| 58829 | #else | 58723 | #else |
| 58830 | __ai int64x2_t vqdmlal_high_n_s32(int64x2_t __p0, int32x4_t __p1, int32_t __p2) { | 58724 | #define vshll_high_n_u16(__p0_720, __p1_720) __extension__ ({ \ |
| 58831 | int64x2_t __ret; | 58725 | uint32x4_t __ret_720; \ |
| 58832 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 58726 | uint16x8_t __s0_720 = __p0_720; \ |
| 58833 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 58727 | uint16x8_t __rev0_720; __rev0_720 = __builtin_shufflevector(__s0_720, __s0_720, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58834 | __ret = __noswap_vqdmlal_n_s32(__rev0, __noswap_vget_high_s32(__rev1), __p2); | 58728 | __ret_720 = (uint32x4_t)(__noswap_vshll_n_u16(__noswap_vget_high_u16(__rev0_720), __p1_720)); \ |
| 58835 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 58729 | __ret_720 = __builtin_shufflevector(__ret_720, __ret_720, 3, 2, 1, 0); \ |
| 58836 | return __ret; | 58730 | __ret_720; \ |
| 58837 | } | 58731 | }) |
| 58838 | #endif | 58732 | #endif |
| 58839 | | 58733 | |
| 58840 | #ifdef __LITTLE_ENDIAN__ | 58734 | #ifdef __LITTLE_ENDIAN__ |
| 58841 | __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) { | 58735 | #define vshll_high_n_s8(__p0_721, __p1_721) __extension__ ({ \ |
| 58842 | int32x4_t __ret; | 58736 | int16x8_t __ret_721; \ |
| 58843 | __ret = vqdmlal_n_s16(__p0, vget_high_s16(__p1), __p2); | 58737 | int8x16_t __s0_721 = __p0_721; \ |
| 58844 | return __ret; | 58738 | __ret_721 = (int16x8_t)(vshll_n_s8(vget_high_s8(__s0_721), __p1_721)); \ |
| 58845 | } | 58739 | __ret_721; \ |
| | 58740 | }) |
| 58846 | #else | 58741 | #else |
| 58847 | __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) { | 58742 | #define vshll_high_n_s8(__p0_722, __p1_722) __extension__ ({ \ |
| 58848 | int32x4_t __ret; | 58743 | int16x8_t __ret_722; \ |
| 58849 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 58744 | int8x16_t __s0_722 = __p0_722; \ |
| 58850 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 58745 | int8x16_t __rev0_722; __rev0_722 = __builtin_shufflevector(__s0_722, __s0_722, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58851 | __ret = __noswap_vqdmlal_n_s16(__rev0, __noswap_vget_high_s16(__rev1), __p2); | 58746 | __ret_722 = (int16x8_t)(__noswap_vshll_n_s8(__noswap_vget_high_s8(__rev0_722), __p1_722)); \ |
| 58852 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 58747 | __ret_722 = __builtin_shufflevector(__ret_722, __ret_722, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58853 | return __ret; | 58748 | __ret_722; \ |
| 58854 | } | 58749 | }) |
| 58855 | #endif | 58750 | #endif |
| 58856 | | 58751 | |
| 58857 | #ifdef __LITTLE_ENDIAN__ | 58752 | #ifdef __LITTLE_ENDIAN__ |
| 58858 | #define vqdmlals_lane_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 58753 | #define vshll_high_n_s32(__p0_723, __p1_723) __extension__ ({ \ |
| 58859 | int64_t __ret; \ | 58754 | int64x2_t __ret_723; \ |
| 58860 | int64_t __s0 = __p0; \ | 58755 | int32x4_t __s0_723 = __p0_723; \ |
| 58861 | int32_t __s1 = __p1; \ | 58756 | __ret_723 = (int64x2_t)(vshll_n_s32(vget_high_s32(__s0_723), __p1_723)); \ |
| 58862 | int32x2_t __s2 = __p2; \ | 58757 | __ret_723; \ |
| 58863 | __ret = (int64_t) __builtin_neon_vqdmlals_lane_s32(__s0, __s1, __s2, __p3); \ | | |
| 58864 | __ret; \ | | |
| 58865 | }) | 58758 | }) |
| 58866 | #else | 58759 | #else |
| 58867 | #define vqdmlals_lane_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 58760 | #define vshll_high_n_s32(__p0_724, __p1_724) __extension__ ({ \ |
| | 58761 | int64x2_t __ret_724; \ |
| | 58762 | int32x4_t __s0_724 = __p0_724; \ |
| | 58763 | int32x4_t __rev0_724; __rev0_724 = __builtin_shufflevector(__s0_724, __s0_724, 3, 2, 1, 0); \ |
| | 58764 | __ret_724 = (int64x2_t)(__noswap_vshll_n_s32(__noswap_vget_high_s32(__rev0_724), __p1_724)); \ |
| | 58765 | __ret_724 = __builtin_shufflevector(__ret_724, __ret_724, 1, 0); \ |
| | 58766 | __ret_724; \ |
| | 58767 | }) |
| | 58768 | #endif |
| | 58769 | |
| | 58770 | #ifdef __LITTLE_ENDIAN__ |
| | 58771 | #define vshll_high_n_s16(__p0_725, __p1_725) __extension__ ({ \ |
| | 58772 | int32x4_t __ret_725; \ |
| | 58773 | int16x8_t __s0_725 = __p0_725; \ |
| | 58774 | __ret_725 = (int32x4_t)(vshll_n_s16(vget_high_s16(__s0_725), __p1_725)); \ |
| | 58775 | __ret_725; \ |
| | 58776 | }) |
| | 58777 | #else |
| | 58778 | #define vshll_high_n_s16(__p0_726, __p1_726) __extension__ ({ \ |
| | 58779 | int32x4_t __ret_726; \ |
| | 58780 | int16x8_t __s0_726 = __p0_726; \ |
| | 58781 | int16x8_t __rev0_726; __rev0_726 = __builtin_shufflevector(__s0_726, __s0_726, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 58782 | __ret_726 = (int32x4_t)(__noswap_vshll_n_s16(__noswap_vget_high_s16(__rev0_726), __p1_726)); \ |
| | 58783 | __ret_726 = __builtin_shufflevector(__ret_726, __ret_726, 3, 2, 1, 0); \ |
| | 58784 | __ret_726; \ |
| | 58785 | }) |
| | 58786 | #endif |
| | 58787 | |
| | 58788 | #define vshrd_n_u64(__p0, __p1) __extension__ ({ \ |
| | 58789 | uint64_t __ret; \ |
| | 58790 | uint64_t __s0 = __p0; \ |
| | 58791 | __ret = (uint64_t) __builtin_neon_vshrd_n_u64(__s0, __p1); \ |
| | 58792 | __ret; \ |
| | 58793 | }) |
| | 58794 | #define vshrd_n_s64(__p0, __p1) __extension__ ({ \ |
| 58868 | int64_t __ret; \ | 58795 | int64_t __ret; \ |
| 58869 | int64_t __s0 = __p0; \ | 58796 | int64_t __s0 = __p0; \ |
| 58870 | int32_t __s1 = __p1; \ | 58797 | __ret = (int64_t) __builtin_neon_vshrd_n_s64(__s0, __p1); \ |
| 58871 | int32x2_t __s2 = __p2; \ | | |
| 58872 | int32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ | | |
| 58873 | __ret = (int64_t) __builtin_neon_vqdmlals_lane_s32(__s0, __s1, __rev2, __p3); \ | | |
| 58874 | __ret; \ | 58798 | __ret; \ |
| 58875 | }) | 58799 | }) |
| | 58800 | #ifdef __LITTLE_ENDIAN__ |
| | 58801 | #define vshrn_high_n_u32(__p0_727, __p1_727, __p2_727) __extension__ ({ \ |
| | 58802 | uint16x8_t __ret_727; \ |
| | 58803 | uint16x4_t __s0_727 = __p0_727; \ |
| | 58804 | uint32x4_t __s1_727 = __p1_727; \ |
| | 58805 | __ret_727 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_727), (uint16x4_t)(vshrn_n_u32(__s1_727, __p2_727)))); \ |
| | 58806 | __ret_727; \ |
| | 58807 | }) |
| | 58808 | #else |
| | 58809 | #define vshrn_high_n_u32(__p0_728, __p1_728, __p2_728) __extension__ ({ \ |
| | 58810 | uint16x8_t __ret_728; \ |
| | 58811 | uint16x4_t __s0_728 = __p0_728; \ |
| | 58812 | uint32x4_t __s1_728 = __p1_728; \ |
| | 58813 | uint16x4_t __rev0_728; __rev0_728 = __builtin_shufflevector(__s0_728, __s0_728, 3, 2, 1, 0); \ |
| | 58814 | uint32x4_t __rev1_728; __rev1_728 = __builtin_shufflevector(__s1_728, __s1_728, 3, 2, 1, 0); \ |
| | 58815 | __ret_728 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_728), (uint16x4_t)(__noswap_vshrn_n_u32(__rev1_728, __p2_728)))); \ |
| | 58816 | __ret_728 = __builtin_shufflevector(__ret_728, __ret_728, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 58817 | __ret_728; \ |
| | 58818 | }) |
| 58876 | #endif | 58819 | #endif |
| 58877 | | 58820 | |
| 58878 | #ifdef __LITTLE_ENDIAN__ | 58821 | #ifdef __LITTLE_ENDIAN__ |
| 58879 | #define vqdmlalh_lane_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 58822 | #define vshrn_high_n_u64(__p0_729, __p1_729, __p2_729) __extension__ ({ \ |
| 58880 | int32_t __ret; \ | 58823 | uint32x4_t __ret_729; \ |
| 58881 | int32_t __s0 = __p0; \ | 58824 | uint32x2_t __s0_729 = __p0_729; \ |
| 58882 | int16_t __s1 = __p1; \ | 58825 | uint64x2_t __s1_729 = __p1_729; \ |
| 58883 | int16x4_t __s2 = __p2; \ | 58826 | __ret_729 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_729), (uint32x2_t)(vshrn_n_u64(__s1_729, __p2_729)))); \ |
| 58884 | __ret = (int32_t) __builtin_neon_vqdmlalh_lane_s16(__s0, __s1, __s2, __p3); \ | 58827 | __ret_729; \ |
| 58885 | __ret; \ | | |
| 58886 | }) | 58828 | }) |
| 58887 | #else | 58829 | #else |
| 58888 | #define vqdmlalh_lane_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 58830 | #define vshrn_high_n_u64(__p0_730, __p1_730, __p2_730) __extension__ ({ \ |
| 58889 | int32_t __ret; \ | 58831 | uint32x4_t __ret_730; \ |
| 58890 | int32_t __s0 = __p0; \ | 58832 | uint32x2_t __s0_730 = __p0_730; \ |
| 58891 | int16_t __s1 = __p1; \ | 58833 | uint64x2_t __s1_730 = __p1_730; \ |
| 58892 | int16x4_t __s2 = __p2; \ | 58834 | uint32x2_t __rev0_730; __rev0_730 = __builtin_shufflevector(__s0_730, __s0_730, 1, 0); \ |
| 58893 | int16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | 58835 | uint64x2_t __rev1_730; __rev1_730 = __builtin_shufflevector(__s1_730, __s1_730, 1, 0); \ |
| 58894 | __ret = (int32_t) __builtin_neon_vqdmlalh_lane_s16(__s0, __s1, __rev2, __p3); \ | 58836 | __ret_730 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_730), (uint32x2_t)(__noswap_vshrn_n_u64(__rev1_730, __p2_730)))); \ |
| 58895 | __ret; \ | 58837 | __ret_730 = __builtin_shufflevector(__ret_730, __ret_730, 3, 2, 1, 0); \ |
| | 58838 | __ret_730; \ |
| 58896 | }) | 58839 | }) |
| 58897 | #endif | 58840 | #endif |
| 58898 | | 58841 | |
| 58899 | #ifdef __LITTLE_ENDIAN__ | 58842 | #ifdef __LITTLE_ENDIAN__ |
| 58900 | #define vqdmlals_laneq_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 58843 | #define vshrn_high_n_u16(__p0_731, __p1_731, __p2_731) __extension__ ({ \ |
| 58901 | int64_t __ret; \ | 58844 | uint8x16_t __ret_731; \ |
| 58902 | int64_t __s0 = __p0; \ | 58845 | uint8x8_t __s0_731 = __p0_731; \ |
| 58903 | int32_t __s1 = __p1; \ | 58846 | uint16x8_t __s1_731 = __p1_731; \ |
| 58904 | int32x4_t __s2 = __p2; \ | 58847 | __ret_731 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_731), (uint8x8_t)(vshrn_n_u16(__s1_731, __p2_731)))); \ |
| 58905 | __ret = (int64_t) __builtin_neon_vqdmlals_laneq_s32(__s0, __s1, __s2, __p3); \ | 58848 | __ret_731; \ |
| 58906 | __ret; \ | | |
| 58907 | }) | 58849 | }) |
| 58908 | #else | 58850 | #else |
| 58909 | #define vqdmlals_laneq_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 58851 | #define vshrn_high_n_u16(__p0_732, __p1_732, __p2_732) __extension__ ({ \ |
| 58910 | int64_t __ret; \ | 58852 | uint8x16_t __ret_732; \ |
| 58911 | int64_t __s0 = __p0; \ | 58853 | uint8x8_t __s0_732 = __p0_732; \ |
| 58912 | int32_t __s1 = __p1; \ | 58854 | uint16x8_t __s1_732 = __p1_732; \ |
| 58913 | int32x4_t __s2 = __p2; \ | 58855 | uint8x8_t __rev0_732; __rev0_732 = __builtin_shufflevector(__s0_732, __s0_732, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58914 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | 58856 | uint16x8_t __rev1_732; __rev1_732 = __builtin_shufflevector(__s1_732, __s1_732, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58915 | __ret = (int64_t) __builtin_neon_vqdmlals_laneq_s32(__s0, __s1, __rev2, __p3); \ | 58857 | __ret_732 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_732), (uint8x8_t)(__noswap_vshrn_n_u16(__rev1_732, __p2_732)))); \ |
| 58916 | __ret; \ | 58858 | __ret_732 = __builtin_shufflevector(__ret_732, __ret_732, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 58859 | __ret_732; \ |
| 58917 | }) | 58860 | }) |
| 58918 | #endif | 58861 | #endif |
| 58919 | | 58862 | |
| 58920 | #ifdef __LITTLE_ENDIAN__ | 58863 | #ifdef __LITTLE_ENDIAN__ |
| 58921 | #define vqdmlalh_laneq_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 58864 | #define vshrn_high_n_s32(__p0_733, __p1_733, __p2_733) __extension__ ({ \ |
| 58922 | int32_t __ret; \ | 58865 | int16x8_t __ret_733; \ |
| 58923 | int32_t __s0 = __p0; \ | 58866 | int16x4_t __s0_733 = __p0_733; \ |
| 58924 | int16_t __s1 = __p1; \ | 58867 | int32x4_t __s1_733 = __p1_733; \ |
| 58925 | int16x8_t __s2 = __p2; \ | 58868 | __ret_733 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_733), (int16x4_t)(vshrn_n_s32(__s1_733, __p2_733)))); \ |
| 58926 | __ret = (int32_t) __builtin_neon_vqdmlalh_laneq_s16(__s0, __s1, __s2, __p3); \ | 58869 | __ret_733; \ |
| 58927 | __ret; \ | | |
| 58928 | }) | 58870 | }) |
| 58929 | #else | 58871 | #else |
| 58930 | #define vqdmlalh_laneq_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 58872 | #define vshrn_high_n_s32(__p0_734, __p1_734, __p2_734) __extension__ ({ \ |
| 58931 | int32_t __ret; \ | 58873 | int16x8_t __ret_734; \ |
| 58932 | int32_t __s0 = __p0; \ | 58874 | int16x4_t __s0_734 = __p0_734; \ |
| 58933 | int16_t __s1 = __p1; \ | 58875 | int32x4_t __s1_734 = __p1_734; \ |
| 58934 | int16x8_t __s2 = __p2; \ | 58876 | int16x4_t __rev0_734; __rev0_734 = __builtin_shufflevector(__s0_734, __s0_734, 3, 2, 1, 0); \ |
| 58935 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ | 58877 | int32x4_t __rev1_734; __rev1_734 = __builtin_shufflevector(__s1_734, __s1_734, 3, 2, 1, 0); \ |
| 58936 | __ret = (int32_t) __builtin_neon_vqdmlalh_laneq_s16(__s0, __s1, __rev2, __p3); \ | 58878 | __ret_734 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_734), (int16x4_t)(__noswap_vshrn_n_s32(__rev1_734, __p2_734)))); \ |
| 58937 | __ret; \ | 58879 | __ret_734 = __builtin_shufflevector(__ret_734, __ret_734, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 58880 | __ret_734; \ |
| 58938 | }) | 58881 | }) |
| 58939 | #endif | 58882 | #endif |
| 58940 | | 58883 | |
| 58941 | #ifdef __LITTLE_ENDIAN__ | 58884 | #ifdef __LITTLE_ENDIAN__ |
| 58942 | #define vqdmlal_laneq_s32(__p0_719, __p1_719, __p2_719, __p3_719) __extension__ ({ \ | 58885 | #define vshrn_high_n_s64(__p0_735, __p1_735, __p2_735) __extension__ ({ \ |
| 58943 | int64x2_t __ret_719; \ | 58886 | int32x4_t __ret_735; \ |
| 58944 | int64x2_t __s0_719 = __p0_719; \ | 58887 | int32x2_t __s0_735 = __p0_735; \ |
| 58945 | int32x2_t __s1_719 = __p1_719; \ | 58888 | int64x2_t __s1_735 = __p1_735; \ |
| 58946 | int32x4_t __s2_719 = __p2_719; \ | 58889 | __ret_735 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_735), (int32x2_t)(vshrn_n_s64(__s1_735, __p2_735)))); \ |
| 58947 | __ret_719 = vqdmlal_s32(__s0_719, __s1_719, splat_laneq_s32(__s2_719, __p3_719)); \ | 58890 | __ret_735; \ |
| 58948 | __ret_719; \ | | |
| 58949 | }) | 58891 | }) |
| 58950 | #else | 58892 | #else |
| 58951 | #define vqdmlal_laneq_s32(__p0_720, __p1_720, __p2_720, __p3_720) __extension__ ({ \ | 58893 | #define vshrn_high_n_s64(__p0_736, __p1_736, __p2_736) __extension__ ({ \ |
| 58952 | int64x2_t __ret_720; \ | 58894 | int32x4_t __ret_736; \ |
| 58953 | int64x2_t __s0_720 = __p0_720; \ | 58895 | int32x2_t __s0_736 = __p0_736; \ |
| 58954 | int32x2_t __s1_720 = __p1_720; \ | 58896 | int64x2_t __s1_736 = __p1_736; \ |
| 58955 | int32x4_t __s2_720 = __p2_720; \ | 58897 | int32x2_t __rev0_736; __rev0_736 = __builtin_shufflevector(__s0_736, __s0_736, 1, 0); \ |
| 58956 | int64x2_t __rev0_720; __rev0_720 = __builtin_shufflevector(__s0_720, __s0_720, 1, 0); \ | 58898 | int64x2_t __rev1_736; __rev1_736 = __builtin_shufflevector(__s1_736, __s1_736, 1, 0); \ |
| 58957 | int32x2_t __rev1_720; __rev1_720 = __builtin_shufflevector(__s1_720, __s1_720, 1, 0); \ | 58899 | __ret_736 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_736), (int32x2_t)(__noswap_vshrn_n_s64(__rev1_736, __p2_736)))); \ |
| 58958 | int32x4_t __rev2_720; __rev2_720 = __builtin_shufflevector(__s2_720, __s2_720, 3, 2, 1, 0); \ | 58900 | __ret_736 = __builtin_shufflevector(__ret_736, __ret_736, 3, 2, 1, 0); \ |
| 58959 | __ret_720 = __noswap_vqdmlal_s32(__rev0_720, __rev1_720, __noswap_splat_laneq_s32(__rev2_720, __p3_720)); \ | 58901 | __ret_736; \ |
| 58960 | __ret_720 = __builtin_shufflevector(__ret_720, __ret_720, 1, 0); \ | | |
| 58961 | __ret_720; \ | | |
| 58962 | }) | 58902 | }) |
| 58963 | #endif | 58903 | #endif |
| 58964 | | 58904 | |
| 58965 | #ifdef __LITTLE_ENDIAN__ | 58905 | #ifdef __LITTLE_ENDIAN__ |
| 58966 | #define vqdmlal_laneq_s16(__p0_721, __p1_721, __p2_721, __p3_721) __extension__ ({ \ | 58906 | #define vshrn_high_n_s16(__p0_737, __p1_737, __p2_737) __extension__ ({ \ |
| 58967 | int32x4_t __ret_721; \ | 58907 | int8x16_t __ret_737; \ |
| 58968 | int32x4_t __s0_721 = __p0_721; \ | 58908 | int8x8_t __s0_737 = __p0_737; \ |
| 58969 | int16x4_t __s1_721 = __p1_721; \ | 58909 | int16x8_t __s1_737 = __p1_737; \ |
| 58970 | int16x8_t __s2_721 = __p2_721; \ | 58910 | __ret_737 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_737), (int8x8_t)(vshrn_n_s16(__s1_737, __p2_737)))); \ |
| 58971 | __ret_721 = vqdmlal_s16(__s0_721, __s1_721, splat_laneq_s16(__s2_721, __p3_721)); \ | 58911 | __ret_737; \ |
| 58972 | __ret_721; \ | | |
| 58973 | }) | 58912 | }) |
| 58974 | #else | 58913 | #else |
| 58975 | #define vqdmlal_laneq_s16(__p0_722, __p1_722, __p2_722, __p3_722) __extension__ ({ \ | 58914 | #define vshrn_high_n_s16(__p0_738, __p1_738, __p2_738) __extension__ ({ \ |
| 58976 | int32x4_t __ret_722; \ | 58915 | int8x16_t __ret_738; \ |
| 58977 | int32x4_t __s0_722 = __p0_722; \ | 58916 | int8x8_t __s0_738 = __p0_738; \ |
| 58978 | int16x4_t __s1_722 = __p1_722; \ | 58917 | int16x8_t __s1_738 = __p1_738; \ |
| 58979 | int16x8_t __s2_722 = __p2_722; \ | 58918 | int8x8_t __rev0_738; __rev0_738 = __builtin_shufflevector(__s0_738, __s0_738, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58980 | int32x4_t __rev0_722; __rev0_722 = __builtin_shufflevector(__s0_722, __s0_722, 3, 2, 1, 0); \ | 58919 | int16x8_t __rev1_738; __rev1_738 = __builtin_shufflevector(__s1_738, __s1_738, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58981 | int16x4_t __rev1_722; __rev1_722 = __builtin_shufflevector(__s1_722, __s1_722, 3, 2, 1, 0); \ | 58920 | __ret_738 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_738), (int8x8_t)(__noswap_vshrn_n_s16(__rev1_738, __p2_738)))); \ |
| 58982 | int16x8_t __rev2_722; __rev2_722 = __builtin_shufflevector(__s2_722, __s2_722, 7, 6, 5, 4, 3, 2, 1, 0); \ | 58921 | __ret_738 = __builtin_shufflevector(__ret_738, __ret_738, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58983 | __ret_722 = __noswap_vqdmlal_s16(__rev0_722, __rev1_722, __noswap_splat_laneq_s16(__rev2_722, __p3_722)); \ | 58922 | __ret_738; \ |
| 58984 | __ret_722 = __builtin_shufflevector(__ret_722, __ret_722, 3, 2, 1, 0); \ | | |
| 58985 | __ret_722; \ | | |
| 58986 | }) | 58923 | }) |
| 58987 | #endif | 58924 | #endif |
| 58988 | | 58925 | |
| 58989 | __ai int64_t vqdmlsls_s32(int64_t __p0, int32_t __p1, int32_t __p2) { | 58926 | #define vslid_n_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 58990 | int64_t __ret; | 58927 | uint64_t __ret; \ |
| 58991 | __ret = (int64_t) __builtin_neon_vqdmlsls_s32(__p0, __p1, __p2); | 58928 | uint64_t __s0 = __p0; \ |
| | 58929 | uint64_t __s1 = __p1; \ |
| | 58930 | __ret = (uint64_t) __builtin_neon_vslid_n_u64(__s0, __s1, __p2); \ |
| | 58931 | __ret; \ |
| | 58932 | }) |
| | 58933 | #define vslid_n_s64(__p0, __p1, __p2) __extension__ ({ \ |
| | 58934 | int64_t __ret; \ |
| | 58935 | int64_t __s0 = __p0; \ |
| | 58936 | int64_t __s1 = __p1; \ |
| | 58937 | __ret = (int64_t) __builtin_neon_vslid_n_s64(__s0, __s1, __p2); \ |
| | 58938 | __ret; \ |
| | 58939 | }) |
| | 58940 | #define vsli_n_p64(__p0, __p1, __p2) __extension__ ({ \ |
| | 58941 | poly64x1_t __ret; \ |
| | 58942 | poly64x1_t __s0 = __p0; \ |
| | 58943 | poly64x1_t __s1 = __p1; \ |
| | 58944 | __ret = (poly64x1_t) __builtin_neon_vsli_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 6); \ |
| | 58945 | __ret; \ |
| | 58946 | }) |
| | 58947 | #ifdef __LITTLE_ENDIAN__ |
| | 58948 | #define vsliq_n_p64(__p0, __p1, __p2) __extension__ ({ \ |
| | 58949 | poly64x2_t __ret; \ |
| | 58950 | poly64x2_t __s0 = __p0; \ |
| | 58951 | poly64x2_t __s1 = __p1; \ |
| | 58952 | __ret = (poly64x2_t) __builtin_neon_vsliq_n_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 38); \ |
| | 58953 | __ret; \ |
| | 58954 | }) |
| | 58955 | #else |
| | 58956 | #define vsliq_n_p64(__p0, __p1, __p2) __extension__ ({ \ |
| | 58957 | poly64x2_t __ret; \ |
| | 58958 | poly64x2_t __s0 = __p0; \ |
| | 58959 | poly64x2_t __s1 = __p1; \ |
| | 58960 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| | 58961 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| | 58962 | __ret = (poly64x2_t) __builtin_neon_vsliq_n_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 38); \ |
| | 58963 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| | 58964 | __ret; \ |
| | 58965 | }) |
| | 58966 | #endif |
| | 58967 | |
| | 58968 | __ai uint8_t vsqaddb_u8(uint8_t __p0, int8_t __p1) { |
| | 58969 | uint8_t __ret; |
| | 58970 | __ret = (uint8_t) __builtin_neon_vsqaddb_u8(__p0, __p1); |
| 58992 | return __ret; | 58971 | return __ret; |
| 58993 | } | 58972 | } |
| 58994 | __ai int32_t vqdmlslh_s16(int32_t __p0, int16_t __p1, int16_t __p2) { | 58973 | __ai uint32_t vsqadds_u32(uint32_t __p0, int32_t __p1) { |
| 58995 | int32_t __ret; | 58974 | uint32_t __ret; |
| 58996 | __ret = (int32_t) __builtin_neon_vqdmlslh_s16(__p0, __p1, __p2); | 58975 | __ret = (uint32_t) __builtin_neon_vsqadds_u32(__p0, __p1); |
| | 58976 | return __ret; |
| | 58977 | } |
| | 58978 | __ai uint64_t vsqaddd_u64(uint64_t __p0, int64_t __p1) { |
| | 58979 | uint64_t __ret; |
| | 58980 | __ret = (uint64_t) __builtin_neon_vsqaddd_u64(__p0, __p1); |
| | 58981 | return __ret; |
| | 58982 | } |
| | 58983 | __ai uint16_t vsqaddh_u16(uint16_t __p0, int16_t __p1) { |
| | 58984 | uint16_t __ret; |
| | 58985 | __ret = (uint16_t) __builtin_neon_vsqaddh_u16(__p0, __p1); |
| 58997 | return __ret; | 58986 | return __ret; |
| 58998 | } | 58987 | } |
| 58999 | #ifdef __LITTLE_ENDIAN__ | 58988 | #ifdef __LITTLE_ENDIAN__ |
| 59000 | __ai int64x2_t vqdmlsl_high_s32(int64x2_t __p0, int32x4_t __p1, int32x4_t __p2) { | 58989 | __ai uint8x16_t vsqaddq_u8(uint8x16_t __p0, int8x16_t __p1) { |
| 59001 | int64x2_t __ret; | 58990 | uint8x16_t __ret; |
| 59002 | __ret = vqdmlsl_s32(__p0, vget_high_s32(__p1), vget_high_s32(__p2)); | 58991 | __ret = (uint8x16_t) __builtin_neon_vsqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 48); |
| 59003 | return __ret; | 58992 | return __ret; |
| 59004 | } | 58993 | } |
| 59005 | #else | 58994 | #else |
| 59006 | __ai int64x2_t vqdmlsl_high_s32(int64x2_t __p0, int32x4_t __p1, int32x4_t __p2) { | 58995 | __ai uint8x16_t vsqaddq_u8(uint8x16_t __p0, int8x16_t __p1) { |
| 59007 | int64x2_t __ret; | 58996 | uint8x16_t __ret; |
| 59008 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 58997 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 59009 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 58998 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 59010 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 58999 | __ret = (uint8x16_t) __builtin_neon_vsqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 48); |
| 59011 | __ret = __noswap_vqdmlsl_s32(__rev0, __noswap_vget_high_s32(__rev1), __noswap_vget_high_s32(__rev2)); | 59000 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 59012 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 59013 | return __ret; | 59001 | return __ret; |
| 59014 | } | 59002 | } |
| 59015 | #endif | 59003 | #endif |
| 59016 | | 59004 | |
| 59017 | #ifdef __LITTLE_ENDIAN__ | 59005 | #ifdef __LITTLE_ENDIAN__ |
| 59018 | __ai int32x4_t vqdmlsl_high_s16(int32x4_t __p0, int16x8_t __p1, int16x8_t __p2) { | 59006 | __ai uint32x4_t vsqaddq_u32(uint32x4_t __p0, int32x4_t __p1) { |
| 59019 | int32x4_t __ret; | 59007 | uint32x4_t __ret; |
| 59020 | __ret = vqdmlsl_s16(__p0, vget_high_s16(__p1), vget_high_s16(__p2)); | 59008 | __ret = (uint32x4_t) __builtin_neon_vsqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 50); |
| 59021 | return __ret; | 59009 | return __ret; |
| 59022 | } | 59010 | } |
| 59023 | #else | 59011 | #else |
| 59024 | __ai int32x4_t vqdmlsl_high_s16(int32x4_t __p0, int16x8_t __p1, int16x8_t __p2) { | 59012 | __ai uint32x4_t vsqaddq_u32(uint32x4_t __p0, int32x4_t __p1) { |
| 59025 | int32x4_t __ret; | 59013 | uint32x4_t __ret; |
| 59026 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 59014 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 59027 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 59015 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 59028 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 59016 | __ret = (uint32x4_t) __builtin_neon_vsqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50); |
| 59029 | __ret = __noswap_vqdmlsl_s16(__rev0, __noswap_vget_high_s16(__rev1), __noswap_vget_high_s16(__rev2)); | | |
| 59030 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 59017 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 59031 | return __ret; | 59018 | return __ret; |
| 59032 | } | 59019 | } |
| 59033 | #endif | 59020 | #endif |
| 59034 | | 59021 | |
| 59035 | #ifdef __LITTLE_ENDIAN__ | 59022 | #ifdef __LITTLE_ENDIAN__ |
| 59036 | #define vqdmlsl_high_lane_s32(__p0_723, __p1_723, __p2_723, __p3_723) __extension__ ({ \ | 59023 | __ai uint64x2_t vsqaddq_u64(uint64x2_t __p0, int64x2_t __p1) { |
| 59037 | int64x2_t __ret_723; \ | 59024 | uint64x2_t __ret; |
| 59038 | int64x2_t __s0_723 = __p0_723; \ | 59025 | __ret = (uint64x2_t) __builtin_neon_vsqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); |
| 59039 | int32x4_t __s1_723 = __p1_723; \ | 59026 | return __ret; |
| 59040 | int32x2_t __s2_723 = __p2_723; \ | 59027 | } |
| 59041 | __ret_723 = vqdmlsl_s32(__s0_723, vget_high_s32(__s1_723), splat_lane_s32(__s2_723, __p3_723)); \ | | |
| 59042 | __ret_723; \ | | |
| 59043 | }) | | |
| 59044 | #else | 59028 | #else |
| 59045 | #define vqdmlsl_high_lane_s32(__p0_724, __p1_724, __p2_724, __p3_724) __extension__ ({ \ | 59029 | __ai uint64x2_t vsqaddq_u64(uint64x2_t __p0, int64x2_t __p1) { |
| 59046 | int64x2_t __ret_724; \ | 59030 | uint64x2_t __ret; |
| 59047 | int64x2_t __s0_724 = __p0_724; \ | 59031 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 59048 | int32x4_t __s1_724 = __p1_724; \ | 59032 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 59049 | int32x2_t __s2_724 = __p2_724; \ | 59033 | __ret = (uint64x2_t) __builtin_neon_vsqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); |
| 59050 | int64x2_t __rev0_724; __rev0_724 = __builtin_shufflevector(__s0_724, __s0_724, 1, 0); \ | 59034 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 59051 | int32x4_t __rev1_724; __rev1_724 = __builtin_shufflevector(__s1_724, __s1_724, 3, 2, 1, 0); \ | 59035 | return __ret; |
| 59052 | int32x2_t __rev2_724; __rev2_724 = __builtin_shufflevector(__s2_724, __s2_724, 1, 0); \ | 59036 | } |
| 59053 | __ret_724 = __noswap_vqdmlsl_s32(__rev0_724, __noswap_vget_high_s32(__rev1_724), __noswap_splat_lane_s32(__rev2_724, __p3_724)); \ | | |
| 59054 | __ret_724 = __builtin_shufflevector(__ret_724, __ret_724, 1, 0); \ | | |
| 59055 | __ret_724; \ | | |
| 59056 | }) | | |
| 59057 | #endif | 59037 | #endif |
| 59058 | | 59038 | |
| 59059 | #ifdef __LITTLE_ENDIAN__ | 59039 | #ifdef __LITTLE_ENDIAN__ |
| 59060 | #define vqdmlsl_high_lane_s16(__p0_725, __p1_725, __p2_725, __p3_725) __extension__ ({ \ | 59040 | __ai uint16x8_t vsqaddq_u16(uint16x8_t __p0, int16x8_t __p1) { |
| 59061 | int32x4_t __ret_725; \ | 59041 | uint16x8_t __ret; |
| 59062 | int32x4_t __s0_725 = __p0_725; \ | 59042 | __ret = (uint16x8_t) __builtin_neon_vsqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 49); |
| 59063 | int16x8_t __s1_725 = __p1_725; \ | 59043 | return __ret; |
| 59064 | int16x4_t __s2_725 = __p2_725; \ | 59044 | } |
| 59065 | __ret_725 = vqdmlsl_s16(__s0_725, vget_high_s16(__s1_725), splat_lane_s16(__s2_725, __p3_725)); \ | | |
| 59066 | __ret_725; \ | | |
| 59067 | }) | | |
| 59068 | #else | 59045 | #else |
| 59069 | #define vqdmlsl_high_lane_s16(__p0_726, __p1_726, __p2_726, __p3_726) __extension__ ({ \ | 59046 | __ai uint16x8_t vsqaddq_u16(uint16x8_t __p0, int16x8_t __p1) { |
| 59070 | int32x4_t __ret_726; \ | 59047 | uint16x8_t __ret; |
| 59071 | int32x4_t __s0_726 = __p0_726; \ | 59048 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 59072 | int16x8_t __s1_726 = __p1_726; \ | 59049 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 59073 | int16x4_t __s2_726 = __p2_726; \ | 59050 | __ret = (uint16x8_t) __builtin_neon_vsqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 49); |
| 59074 | int32x4_t __rev0_726; __rev0_726 = __builtin_shufflevector(__s0_726, __s0_726, 3, 2, 1, 0); \ | 59051 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 59075 | int16x8_t __rev1_726; __rev1_726 = __builtin_shufflevector(__s1_726, __s1_726, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59052 | return __ret; |
| 59076 | int16x4_t __rev2_726; __rev2_726 = __builtin_shufflevector(__s2_726, __s2_726, 3, 2, 1, 0); \ | 59053 | } |
| 59077 | __ret_726 = __noswap_vqdmlsl_s16(__rev0_726, __noswap_vget_high_s16(__rev1_726), __noswap_splat_lane_s16(__rev2_726, __p3_726)); \ | 59054 | #endif |
| 59078 | __ret_726 = __builtin_shufflevector(__ret_726, __ret_726, 3, 2, 1, 0); \ | 59055 | |
| 59079 | __ret_726; \ | 59056 | #ifdef __LITTLE_ENDIAN__ |
| 59080 | }) | 59057 | __ai uint8x8_t vsqadd_u8(uint8x8_t __p0, int8x8_t __p1) { |
| | 59058 | uint8x8_t __ret; |
| | 59059 | __ret = (uint8x8_t) __builtin_neon_vsqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 16); |
| | 59060 | return __ret; |
| | 59061 | } |
| | 59062 | #else |
| | 59063 | __ai uint8x8_t vsqadd_u8(uint8x8_t __p0, int8x8_t __p1) { |
| | 59064 | uint8x8_t __ret; |
| | 59065 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 59066 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 59067 | __ret = (uint8x8_t) __builtin_neon_vsqadd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 16); |
| | 59068 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 59069 | return __ret; |
| | 59070 | } |
| 59081 | #endif | 59071 | #endif |
| 59082 | | 59072 | |
| 59083 | #ifdef __LITTLE_ENDIAN__ | 59073 | #ifdef __LITTLE_ENDIAN__ |
| 59084 | #define vqdmlsl_high_laneq_s32(__p0_727, __p1_727, __p2_727, __p3_727) __extension__ ({ \ | 59074 | __ai uint32x2_t vsqadd_u32(uint32x2_t __p0, int32x2_t __p1) { |
| 59085 | int64x2_t __ret_727; \ | 59075 | uint32x2_t __ret; |
| 59086 | int64x2_t __s0_727 = __p0_727; \ | 59076 | __ret = (uint32x2_t) __builtin_neon_vsqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 18); |
| 59087 | int32x4_t __s1_727 = __p1_727; \ | 59077 | return __ret; |
| 59088 | int32x4_t __s2_727 = __p2_727; \ | 59078 | } |
| 59089 | __ret_727 = vqdmlsl_s32(__s0_727, vget_high_s32(__s1_727), splat_laneq_s32(__s2_727, __p3_727)); \ | | |
| 59090 | __ret_727; \ | | |
| 59091 | }) | | |
| 59092 | #else | 59079 | #else |
| 59093 | #define vqdmlsl_high_laneq_s32(__p0_728, __p1_728, __p2_728, __p3_728) __extension__ ({ \ | 59080 | __ai uint32x2_t vsqadd_u32(uint32x2_t __p0, int32x2_t __p1) { |
| 59094 | int64x2_t __ret_728; \ | 59081 | uint32x2_t __ret; |
| 59095 | int64x2_t __s0_728 = __p0_728; \ | 59082 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 59096 | int32x4_t __s1_728 = __p1_728; \ | 59083 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 59097 | int32x4_t __s2_728 = __p2_728; \ | 59084 | __ret = (uint32x2_t) __builtin_neon_vsqadd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 18); |
| 59098 | int64x2_t __rev0_728; __rev0_728 = __builtin_shufflevector(__s0_728, __s0_728, 1, 0); \ | 59085 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 59099 | int32x4_t __rev1_728; __rev1_728 = __builtin_shufflevector(__s1_728, __s1_728, 3, 2, 1, 0); \ | 59086 | return __ret; |
| 59100 | int32x4_t __rev2_728; __rev2_728 = __builtin_shufflevector(__s2_728, __s2_728, 3, 2, 1, 0); \ | 59087 | } |
| 59101 | __ret_728 = __noswap_vqdmlsl_s32(__rev0_728, __noswap_vget_high_s32(__rev1_728), __noswap_splat_laneq_s32(__rev2_728, __p3_728)); \ | | |
| 59102 | __ret_728 = __builtin_shufflevector(__ret_728, __ret_728, 1, 0); \ | | |
| 59103 | __ret_728; \ | | |
| 59104 | }) | | |
| 59105 | #endif | 59088 | #endif |
| 59106 | | 59089 | |
| | 59090 | __ai uint64x1_t vsqadd_u64(uint64x1_t __p0, int64x1_t __p1) { |
| | 59091 | uint64x1_t __ret; |
| | 59092 | __ret = (uint64x1_t) __builtin_neon_vsqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| | 59093 | return __ret; |
| | 59094 | } |
| 59107 | #ifdef __LITTLE_ENDIAN__ | 59095 | #ifdef __LITTLE_ENDIAN__ |
| 59108 | #define vqdmlsl_high_laneq_s16(__p0_729, __p1_729, __p2_729, __p3_729) __extension__ ({ \ | 59096 | __ai uint16x4_t vsqadd_u16(uint16x4_t __p0, int16x4_t __p1) { |
| 59109 | int32x4_t __ret_729; \ | 59097 | uint16x4_t __ret; |
| 59110 | int32x4_t __s0_729 = __p0_729; \ | 59098 | __ret = (uint16x4_t) __builtin_neon_vsqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 17); |
| 59111 | int16x8_t __s1_729 = __p1_729; \ | 59099 | return __ret; |
| 59112 | int16x8_t __s2_729 = __p2_729; \ | 59100 | } |
| 59113 | __ret_729 = vqdmlsl_s16(__s0_729, vget_high_s16(__s1_729), splat_laneq_s16(__s2_729, __p3_729)); \ | | |
| 59114 | __ret_729; \ | | |
| 59115 | }) | | |
| 59116 | #else | 59101 | #else |
| 59117 | #define vqdmlsl_high_laneq_s16(__p0_730, __p1_730, __p2_730, __p3_730) __extension__ ({ \ | 59102 | __ai uint16x4_t vsqadd_u16(uint16x4_t __p0, int16x4_t __p1) { |
| 59118 | int32x4_t __ret_730; \ | 59103 | uint16x4_t __ret; |
| 59119 | int32x4_t __s0_730 = __p0_730; \ | 59104 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 59120 | int16x8_t __s1_730 = __p1_730; \ | 59105 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 59121 | int16x8_t __s2_730 = __p2_730; \ | 59106 | __ret = (uint16x4_t) __builtin_neon_vsqadd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 17); |
| 59122 | int32x4_t __rev0_730; __rev0_730 = __builtin_shufflevector(__s0_730, __s0_730, 3, 2, 1, 0); \ | 59107 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 59123 | int16x8_t __rev1_730; __rev1_730 = __builtin_shufflevector(__s1_730, __s1_730, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59108 | return __ret; |
| 59124 | int16x8_t __rev2_730; __rev2_730 = __builtin_shufflevector(__s2_730, __s2_730, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59109 | } |
| 59125 | __ret_730 = __noswap_vqdmlsl_s16(__rev0_730, __noswap_vget_high_s16(__rev1_730), __noswap_splat_laneq_s16(__rev2_730, __p3_730)); \ | | |
| 59126 | __ret_730 = __builtin_shufflevector(__ret_730, __ret_730, 3, 2, 1, 0); \ | | |
| 59127 | __ret_730; \ | | |
| 59128 | }) | | |
| 59129 | #endif | 59110 | #endif |
| 59130 | | 59111 | |
| 59131 | #ifdef __LITTLE_ENDIAN__ | 59112 | #ifdef __LITTLE_ENDIAN__ |
| 59132 | __ai int64x2_t vqdmlsl_high_n_s32(int64x2_t __p0, int32x4_t __p1, int32_t __p2) { | 59113 | __ai float64x2_t vsqrtq_f64(float64x2_t __p0) { |
| 59133 | int64x2_t __ret; | 59114 | float64x2_t __ret; |
| 59134 | __ret = vqdmlsl_n_s32(__p0, vget_high_s32(__p1), __p2); | 59115 | __ret = (float64x2_t) __builtin_neon_vsqrtq_v((int8x16_t)__p0, 42); |
| 59135 | return __ret; | 59116 | return __ret; |
| 59136 | } | 59117 | } |
| 59137 | #else | 59118 | #else |
| 59138 | __ai int64x2_t vqdmlsl_high_n_s32(int64x2_t __p0, int32x4_t __p1, int32_t __p2) { | 59119 | __ai float64x2_t vsqrtq_f64(float64x2_t __p0) { |
| 59139 | int64x2_t __ret; | 59120 | float64x2_t __ret; |
| 59140 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 59121 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 59141 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 59122 | __ret = (float64x2_t) __builtin_neon_vsqrtq_v((int8x16_t)__rev0, 42); |
| 59142 | __ret = __noswap_vqdmlsl_n_s32(__rev0, __noswap_vget_high_s32(__rev1), __p2); | | |
| 59143 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 59123 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 59144 | return __ret; | 59124 | return __ret; |
| 59145 | } | 59125 | } |
| 59146 | #endif | 59126 | #endif |
| 59147 | | 59127 | |
| 59148 | #ifdef __LITTLE_ENDIAN__ | 59128 | #ifdef __LITTLE_ENDIAN__ |
| 59149 | __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) { | 59129 | __ai float32x4_t vsqrtq_f32(float32x4_t __p0) { |
| 59150 | int32x4_t __ret; | 59130 | float32x4_t __ret; |
| 59151 | __ret = vqdmlsl_n_s16(__p0, vget_high_s16(__p1), __p2); | 59131 | __ret = (float32x4_t) __builtin_neon_vsqrtq_v((int8x16_t)__p0, 41); |
| 59152 | return __ret; | 59132 | return __ret; |
| 59153 | } | 59133 | } |
| 59154 | #else | 59134 | #else |
| 59155 | __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) { | 59135 | __ai float32x4_t vsqrtq_f32(float32x4_t __p0) { |
| 59156 | int32x4_t __ret; | 59136 | float32x4_t __ret; |
| 59157 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 59137 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 59158 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 59138 | __ret = (float32x4_t) __builtin_neon_vsqrtq_v((int8x16_t)__rev0, 41); |
| 59159 | __ret = __noswap_vqdmlsl_n_s16(__rev0, __noswap_vget_high_s16(__rev1), __p2); | | |
| 59160 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 59139 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 59161 | return __ret; | 59140 | return __ret; |
| 59162 | } | 59141 | } |
| 59163 | #endif | 59142 | #endif |
| 59164 | | 59143 | |
| | 59144 | __ai float64x1_t vsqrt_f64(float64x1_t __p0) { |
| | 59145 | float64x1_t __ret; |
| | 59146 | __ret = (float64x1_t) __builtin_neon_vsqrt_v((int8x8_t)__p0, 10); |
| | 59147 | return __ret; |
| | 59148 | } |
| 59165 | #ifdef __LITTLE_ENDIAN__ | 59149 | #ifdef __LITTLE_ENDIAN__ |
| 59166 | #define vqdmlsls_lane_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 59150 | __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 59167 | int64_t __ret; \ | 59151 | float32x2_t __ret; |
| 59168 | int64_t __s0 = __p0; \ | 59152 | __ret = (float32x2_t) __builtin_neon_vsqrt_v((int8x8_t)__p0, 9); |
| 59169 | int32_t __s1 = __p1; \ | 59153 | return __ret; |
| 59170 | int32x2_t __s2 = __p2; \ | 59154 | } |
| 59171 | __ret = (int64_t) __builtin_neon_vqdmlsls_lane_s32(__s0, __s1, __s2, __p3); \ | 59155 | #else |
| | 59156 | __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| | 59157 | float32x2_t __ret; |
| | 59158 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 59159 | __ret = (float32x2_t) __builtin_neon_vsqrt_v((int8x8_t)__rev0, 9); |
| | 59160 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 59161 | return __ret; |
| | 59162 | } |
| | 59163 | #endif |
| | 59164 | |
| | 59165 | #define vsrad_n_u64(__p0, __p1, __p2) __extension__ ({ \ |
| | 59166 | uint64_t __ret; \ |
| | 59167 | uint64_t __s0 = __p0; \ |
| | 59168 | uint64_t __s1 = __p1; \ |
| | 59169 | __ret = (uint64_t) __builtin_neon_vsrad_n_u64(__s0, __s1, __p2); \ |
| 59172 | __ret; \ | 59170 | __ret; \ |
| 59173 | }) | 59171 | }) |
| 59174 | #else | 59172 | #define vsrad_n_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 59175 | #define vqdmlsls_lane_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 59176 | int64_t __ret; \ | 59173 | int64_t __ret; \ |
| 59177 | int64_t __s0 = __p0; \ | 59174 | int64_t __s0 = __p0; \ |
| 59178 | int32_t __s1 = __p1; \ | 59175 | int64_t __s1 = __p1; \ |
| 59179 | int32x2_t __s2 = __p2; \ | 59176 | __ret = (int64_t) __builtin_neon_vsrad_n_s64(__s0, __s1, __p2); \ |
| 59180 | int32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ | | |
| 59181 | __ret = (int64_t) __builtin_neon_vqdmlsls_lane_s32(__s0, __s1, __rev2, __p3); \ | | |
| 59182 | __ret; \ | | |
| 59183 | }) | | |
| 59184 | #endif | | |
| 59185 | | | |
| 59186 | #ifdef __LITTLE_ENDIAN__ | | |
| 59187 | #define vqdmlslh_lane_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 59188 | int32_t __ret; \ | | |
| 59189 | int32_t __s0 = __p0; \ | | |
| 59190 | int16_t __s1 = __p1; \ | | |
| 59191 | int16x4_t __s2 = __p2; \ | | |
| 59192 | __ret = (int32_t) __builtin_neon_vqdmlslh_lane_s16(__s0, __s1, __s2, __p3); \ | | |
| 59193 | __ret; \ | 59177 | __ret; \ |
| 59194 | }) | 59178 | }) |
| 59195 | #else | 59179 | #define vsrid_n_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 59196 | #define vqdmlslh_lane_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 59180 | uint64_t __ret; \ |
| 59197 | int32_t __ret; \ | 59181 | uint64_t __s0 = __p0; \ |
| 59198 | int32_t __s0 = __p0; \ | 59182 | uint64_t __s1 = __p1; \ |
| 59199 | int16_t __s1 = __p1; \ | 59183 | __ret = (uint64_t) __builtin_neon_vsrid_n_u64(__s0, __s1, __p2); \ |
| 59200 | int16x4_t __s2 = __p2; \ | | |
| 59201 | int16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | | |
| 59202 | __ret = (int32_t) __builtin_neon_vqdmlslh_lane_s16(__s0, __s1, __rev2, __p3); \ | | |
| 59203 | __ret; \ | 59184 | __ret; \ |
| 59204 | }) | 59185 | }) |
| 59205 | #endif | 59186 | #define vsrid_n_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 59206 | | | |
| 59207 | #ifdef __LITTLE_ENDIAN__ | | |
| 59208 | #define vqdmlsls_laneq_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 59209 | int64_t __ret; \ | 59187 | int64_t __ret; \ |
| 59210 | int64_t __s0 = __p0; \ | 59188 | int64_t __s0 = __p0; \ |
| 59211 | int32_t __s1 = __p1; \ | 59189 | int64_t __s1 = __p1; \ |
| 59212 | int32x4_t __s2 = __p2; \ | 59190 | __ret = (int64_t) __builtin_neon_vsrid_n_s64(__s0, __s1, __p2); \ |
| 59213 | __ret = (int64_t) __builtin_neon_vqdmlsls_laneq_s32(__s0, __s1, __s2, __p3); \ | | |
| 59214 | __ret; \ | 59191 | __ret; \ |
| 59215 | }) | 59192 | }) |
| 59216 | #else | 59193 | #define vsri_n_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 59217 | #define vqdmlsls_laneq_s32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 59194 | poly64x1_t __ret; \ |
| 59218 | int64_t __ret; \ | 59195 | poly64x1_t __s0 = __p0; \ |
| 59219 | int64_t __s0 = __p0; \ | 59196 | poly64x1_t __s1 = __p1; \ |
| 59220 | int32_t __s1 = __p1; \ | 59197 | __ret = (poly64x1_t) __builtin_neon_vsri_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 6); \ |
| 59221 | int32x4_t __s2 = __p2; \ | | |
| 59222 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | | |
| 59223 | __ret = (int64_t) __builtin_neon_vqdmlsls_laneq_s32(__s0, __s1, __rev2, __p3); \ | | |
| 59224 | __ret; \ | 59198 | __ret; \ |
| 59225 | }) | 59199 | }) |
| 59226 | #endif | | |
| 59227 | | | |
| 59228 | #ifdef __LITTLE_ENDIAN__ | 59200 | #ifdef __LITTLE_ENDIAN__ |
| 59229 | #define vqdmlslh_laneq_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 59201 | #define vsriq_n_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 59230 | int32_t __ret; \ | 59202 | poly64x2_t __ret; \ |
| 59231 | int32_t __s0 = __p0; \ | 59203 | poly64x2_t __s0 = __p0; \ |
| 59232 | int16_t __s1 = __p1; \ | 59204 | poly64x2_t __s1 = __p1; \ |
| 59233 | int16x8_t __s2 = __p2; \ | 59205 | __ret = (poly64x2_t) __builtin_neon_vsriq_n_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 38); \ |
| 59234 | __ret = (int32_t) __builtin_neon_vqdmlslh_laneq_s16(__s0, __s1, __s2, __p3); \ | | |
| 59235 | __ret; \ | 59206 | __ret; \ |
| 59236 | }) | 59207 | }) |
| 59237 | #else | 59208 | #else |
| 59238 | #define vqdmlslh_laneq_s16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 59209 | #define vsriq_n_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 59239 | int32_t __ret; \ | 59210 | poly64x2_t __ret; \ |
| 59240 | int32_t __s0 = __p0; \ | 59211 | poly64x2_t __s0 = __p0; \ |
| 59241 | int16_t __s1 = __p1; \ | 59212 | poly64x2_t __s1 = __p1; \ |
| 59242 | int16x8_t __s2 = __p2; \ | 59213 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 59243 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59214 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 59244 | __ret = (int32_t) __builtin_neon_vqdmlslh_laneq_s16(__s0, __s1, __rev2, __p3); \ | 59215 | __ret = (poly64x2_t) __builtin_neon_vsriq_n_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 38); \ |
| | 59216 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 59245 | __ret; \ | 59217 | __ret; \ |
| 59246 | }) | 59218 | }) |
| 59247 | #endif | 59219 | #endif |
| 59248 | | 59220 | |
| 59249 | #ifdef __LITTLE_ENDIAN__ | 59221 | #define vst1_p64(__p0, __p1) __extension__ ({ \ |
| 59250 | #define vqdmlsl_laneq_s32(__p0_731, __p1_731, __p2_731, __p3_731) __extension__ ({ \ | 59222 | poly64x1_t __s1 = __p1; \ |
| 59251 | int64x2_t __ret_731; \ | 59223 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 6); \ |
| 59252 | int64x2_t __s0_731 = __p0_731; \ | | |
| 59253 | int32x2_t __s1_731 = __p1_731; \ | | |
| 59254 | int32x4_t __s2_731 = __p2_731; \ | | |
| 59255 | __ret_731 = vqdmlsl_s32(__s0_731, __s1_731, splat_laneq_s32(__s2_731, __p3_731)); \ | | |
| 59256 | __ret_731; \ | | |
| 59257 | }) | | |
| 59258 | #else | | |
| 59259 | #define vqdmlsl_laneq_s32(__p0_732, __p1_732, __p2_732, __p3_732) __extension__ ({ \ | | |
| 59260 | int64x2_t __ret_732; \ | | |
| 59261 | int64x2_t __s0_732 = __p0_732; \ | | |
| 59262 | int32x2_t __s1_732 = __p1_732; \ | | |
| 59263 | int32x4_t __s2_732 = __p2_732; \ | | |
| 59264 | int64x2_t __rev0_732; __rev0_732 = __builtin_shufflevector(__s0_732, __s0_732, 1, 0); \ | | |
| 59265 | int32x2_t __rev1_732; __rev1_732 = __builtin_shufflevector(__s1_732, __s1_732, 1, 0); \ | | |
| 59266 | int32x4_t __rev2_732; __rev2_732 = __builtin_shufflevector(__s2_732, __s2_732, 3, 2, 1, 0); \ | | |
| 59267 | __ret_732 = __noswap_vqdmlsl_s32(__rev0_732, __rev1_732, __noswap_splat_laneq_s32(__rev2_732, __p3_732)); \ | | |
| 59268 | __ret_732 = __builtin_shufflevector(__ret_732, __ret_732, 1, 0); \ | | |
| 59269 | __ret_732; \ | | |
| 59270 | }) | 59224 | }) |
| 59271 | #endif | | |
| 59272 | | | |
| 59273 | #ifdef __LITTLE_ENDIAN__ | 59225 | #ifdef __LITTLE_ENDIAN__ |
| 59274 | #define vqdmlsl_laneq_s16(__p0_733, __p1_733, __p2_733, __p3_733) __extension__ ({ \ | 59226 | #define vst1q_p64(__p0, __p1) __extension__ ({ \ |
| 59275 | int32x4_t __ret_733; \ | 59227 | poly64x2_t __s1 = __p1; \ |
| 59276 | int32x4_t __s0_733 = __p0_733; \ | 59228 | __builtin_neon_vst1q_v(__p0, (int8x16_t)__s1, 38); \ |
| 59277 | int16x4_t __s1_733 = __p1_733; \ | | |
| 59278 | int16x8_t __s2_733 = __p2_733; \ | | |
| 59279 | __ret_733 = vqdmlsl_s16(__s0_733, __s1_733, splat_laneq_s16(__s2_733, __p3_733)); \ | | |
| 59280 | __ret_733; \ | | |
| 59281 | }) | 59229 | }) |
| 59282 | #else | 59230 | #else |
| 59283 | #define vqdmlsl_laneq_s16(__p0_734, __p1_734, __p2_734, __p3_734) __extension__ ({ \ | 59231 | #define vst1q_p64(__p0, __p1) __extension__ ({ \ |
| 59284 | int32x4_t __ret_734; \ | 59232 | poly64x2_t __s1 = __p1; \ |
| 59285 | int32x4_t __s0_734 = __p0_734; \ | 59233 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 59286 | int16x4_t __s1_734 = __p1_734; \ | 59234 | __builtin_neon_vst1q_v(__p0, (int8x16_t)__rev1, 38); \ |
| 59287 | int16x8_t __s2_734 = __p2_734; \ | | |
| 59288 | int32x4_t __rev0_734; __rev0_734 = __builtin_shufflevector(__s0_734, __s0_734, 3, 2, 1, 0); \ | | |
| 59289 | int16x4_t __rev1_734; __rev1_734 = __builtin_shufflevector(__s1_734, __s1_734, 3, 2, 1, 0); \ | | |
| 59290 | int16x8_t __rev2_734; __rev2_734 = __builtin_shufflevector(__s2_734, __s2_734, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 59291 | __ret_734 = __noswap_vqdmlsl_s16(__rev0_734, __rev1_734, __noswap_splat_laneq_s16(__rev2_734, __p3_734)); \ | | |
| 59292 | __ret_734 = __builtin_shufflevector(__ret_734, __ret_734, 3, 2, 1, 0); \ | | |
| 59293 | __ret_734; \ | | |
| 59294 | }) | 59235 | }) |
| 59295 | #endif | 59236 | #endif |
| 59296 | | 59237 | |
| 59297 | __ai int32_t vqdmulhs_s32(int32_t __p0, int32_t __p1) { | | |
| 59298 | int32_t __ret; | | |
| 59299 | __ret = (int32_t) __builtin_neon_vqdmulhs_s32(__p0, __p1); | | |
| 59300 | return __ret; | | |
| 59301 | } | | |
| 59302 | __ai int16_t vqdmulhh_s16(int16_t __p0, int16_t __p1) { | | |
| 59303 | int16_t __ret; | | |
| 59304 | __ret = (int16_t) __builtin_neon_vqdmulhh_s16(__p0, __p1); | | |
| 59305 | return __ret; | | |
| 59306 | } | | |
| 59307 | #ifdef __LITTLE_ENDIAN__ | 59238 | #ifdef __LITTLE_ENDIAN__ |
| 59308 | #define vqdmulhq_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 59239 | #define vst1q_f64(__p0, __p1) __extension__ ({ \ |
| 59309 | int32x4_t __ret; \ | 59240 | float64x2_t __s1 = __p1; \ |
| 59310 | int32x4_t __s0 = __p0; \ | 59241 | __builtin_neon_vst1q_v(__p0, (int8x16_t)__s1, 42); \ |
| 59311 | int32x2_t __s1 = __p1; \ | | |
| 59312 | __ret = (int32x4_t) __builtin_neon_vqdmulhq_lane_v((int8x16_t)__s0, (int8x8_t)__s1, __p2, 2); \ | | |
| 59313 | __ret; \ | | |
| 59314 | }) | 59242 | }) |
| 59315 | #else | 59243 | #else |
| 59316 | #define vqdmulhq_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 59244 | #define vst1q_f64(__p0, __p1) __extension__ ({ \ |
| 59317 | int32x4_t __ret; \ | 59245 | float64x2_t __s1 = __p1; \ |
| 59318 | int32x4_t __s0 = __p0; \ | 59246 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 59319 | int32x2_t __s1 = __p1; \ | 59247 | __builtin_neon_vst1q_v(__p0, (int8x16_t)__rev1, 42); \ |
| 59320 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | | |
| 59321 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | | |
| 59322 | __ret = (int32x4_t) __builtin_neon_vqdmulhq_lane_v((int8x16_t)__rev0, (int8x8_t)__rev1, __p2, 2); \ | | |
| 59323 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | | |
| 59324 | __ret; \ | | |
| 59325 | }) | 59248 | }) |
| 59326 | #endif | 59249 | #endif |
| 59327 | | 59250 | |
| 59328 | #ifdef __LITTLE_ENDIAN__ | 59251 | #define vst1_f64(__p0, __p1) __extension__ ({ \ |
| 59329 | #define vqdmulhq_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 59252 | float64x1_t __s1 = __p1; \ |
| 59330 | int16x8_t __ret; \ | 59253 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 10); \ |
| 59331 | int16x8_t __s0 = __p0; \ | | |
| 59332 | int16x4_t __s1 = __p1; \ | | |
| 59333 | __ret = (int16x8_t) __builtin_neon_vqdmulhq_lane_v((int8x16_t)__s0, (int8x8_t)__s1, __p2, 1); \ | | |
| 59334 | __ret; \ | | |
| 59335 | }) | 59254 | }) |
| 59336 | #else | 59255 | #define vst1_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 59337 | #define vqdmulhq_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 59256 | poly64x1_t __s1 = __p1; \ |
| 59338 | int16x8_t __ret; \ | 59257 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 6); \ |
| 59339 | int16x8_t __s0 = __p0; \ | | |
| 59340 | int16x4_t __s1 = __p1; \ | | |
| 59341 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 59342 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | | |
| 59343 | __ret = (int16x8_t) __builtin_neon_vqdmulhq_lane_v((int8x16_t)__rev0, (int8x8_t)__rev1, __p2, 1); \ | | |
| 59344 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 59345 | __ret; \ | | |
| 59346 | }) | 59258 | }) |
| 59347 | #endif | | |
| 59348 | | | |
| 59349 | #ifdef __LITTLE_ENDIAN__ | 59259 | #ifdef __LITTLE_ENDIAN__ |
| 59350 | #define vqdmulh_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 59260 | #define vst1q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 59351 | int32x2_t __ret; \ | 59261 | poly64x2_t __s1 = __p1; \ |
| 59352 | int32x2_t __s0 = __p0; \ | 59262 | __builtin_neon_vst1q_lane_v(__p0, (int8x16_t)__s1, __p2, 38); \ |
| 59353 | int32x2_t __s1 = __p1; \ | | |
| 59354 | __ret = (int32x2_t) __builtin_neon_vqdmulh_lane_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 2); \ | | |
| 59355 | __ret; \ | | |
| 59356 | }) | 59263 | }) |
| 59357 | #else | 59264 | #else |
| 59358 | #define vqdmulh_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 59265 | #define vst1q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 59359 | int32x2_t __ret; \ | 59266 | poly64x2_t __s1 = __p1; \ |
| 59360 | int32x2_t __s0 = __p0; \ | 59267 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 59361 | int32x2_t __s1 = __p1; \ | 59268 | __builtin_neon_vst1q_lane_v(__p0, (int8x16_t)__rev1, __p2, 38); \ |
| 59362 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | | |
| 59363 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | | |
| 59364 | __ret = (int32x2_t) __builtin_neon_vqdmulh_lane_v((int8x8_t)__rev0, (int8x8_t)__rev1, __p2, 2); \ | | |
| 59365 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | | |
| 59366 | __ret; \ | | |
| 59367 | }) | 59269 | }) |
| 59368 | #endif | 59270 | #endif |
| 59369 | | 59271 | |
| 59370 | #ifdef __LITTLE_ENDIAN__ | 59272 | #ifdef __LITTLE_ENDIAN__ |
| 59371 | #define vqdmulh_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 59273 | #define vst1q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 59372 | int16x4_t __ret; \ | 59274 | float64x2_t __s1 = __p1; \ |
| 59373 | int16x4_t __s0 = __p0; \ | 59275 | __builtin_neon_vst1q_lane_v(__p0, (int8x16_t)__s1, __p2, 42); \ |
| 59374 | int16x4_t __s1 = __p1; \ | | |
| 59375 | __ret = (int16x4_t) __builtin_neon_vqdmulh_lane_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 1); \ | | |
| 59376 | __ret; \ | | |
| 59377 | }) | 59276 | }) |
| 59378 | #else | 59277 | #else |
| 59379 | #define vqdmulh_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 59278 | #define vst1q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 59380 | int16x4_t __ret; \ | 59279 | float64x2_t __s1 = __p1; \ |
| 59381 | int16x4_t __s0 = __p0; \ | 59280 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 59382 | int16x4_t __s1 = __p1; \ | 59281 | __builtin_neon_vst1q_lane_v(__p0, (int8x16_t)__rev1, __p2, 42); \ |
| 59383 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | | |
| 59384 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | | |
| 59385 | __ret = (int16x4_t) __builtin_neon_vqdmulh_lane_v((int8x8_t)__rev0, (int8x8_t)__rev1, __p2, 1); \ | | |
| 59386 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | | |
| 59387 | __ret; \ | | |
| 59388 | }) | 59282 | }) |
| 59389 | #endif | 59283 | #endif |
| 59390 | | 59284 | |
| 59391 | #ifdef __LITTLE_ENDIAN__ | 59285 | #define vst1_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 59392 | #define vqdmulhs_lane_s32(__p0_735, __p1_735, __p2_735) __extension__ ({ \ | 59286 | float64x1_t __s1 = __p1; \ |
| 59393 | int32_t __ret_735; \ | 59287 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 10); \ |
| 59394 | int32_t __s0_735 = __p0_735; \ | | |
| 59395 | int32x2_t __s1_735 = __p1_735; \ | | |
| 59396 | __ret_735 = vqdmulhs_s32(__s0_735, vget_lane_s32(__s1_735, __p2_735)); \ | | |
| 59397 | __ret_735; \ | | |
| 59398 | }) | 59288 | }) |
| 59399 | #else | 59289 | #define vst1_p64_x2(__p0, __p1) __extension__ ({ \ |
| 59400 | #define vqdmulhs_lane_s32(__p0_736, __p1_736, __p2_736) __extension__ ({ \ | 59290 | poly64x1x2_t __s1 = __p1; \ |
| 59401 | int32_t __ret_736; \ | 59291 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 6); \ |
| 59402 | int32_t __s0_736 = __p0_736; \ | | |
| 59403 | int32x2_t __s1_736 = __p1_736; \ | | |
| 59404 | int32x2_t __rev1_736; __rev1_736 = __builtin_shufflevector(__s1_736, __s1_736, 1, 0); \ | | |
| 59405 | __ret_736 = vqdmulhs_s32(__s0_736, __noswap_vget_lane_s32(__rev1_736, __p2_736)); \ | | |
| 59406 | __ret_736; \ | | |
| 59407 | }) | 59292 | }) |
| 59408 | #endif | | |
| 59409 | | | |
| 59410 | #ifdef __LITTLE_ENDIAN__ | 59293 | #ifdef __LITTLE_ENDIAN__ |
| 59411 | #define vqdmulhh_lane_s16(__p0_737, __p1_737, __p2_737) __extension__ ({ \ | 59294 | #define vst1q_p64_x2(__p0, __p1) __extension__ ({ \ |
| 59412 | int16_t __ret_737; \ | 59295 | poly64x2x2_t __s1 = __p1; \ |
| 59413 | int16_t __s0_737 = __p0_737; \ | 59296 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 38); \ |
| 59414 | int16x4_t __s1_737 = __p1_737; \ | | |
| 59415 | __ret_737 = vqdmulhh_s16(__s0_737, vget_lane_s16(__s1_737, __p2_737)); \ | | |
| 59416 | __ret_737; \ | | |
| 59417 | }) | 59297 | }) |
| 59418 | #else | 59298 | #else |
| 59419 | #define vqdmulhh_lane_s16(__p0_738, __p1_738, __p2_738) __extension__ ({ \ | 59299 | #define vst1q_p64_x2(__p0, __p1) __extension__ ({ \ |
| 59420 | int16_t __ret_738; \ | 59300 | poly64x2x2_t __s1 = __p1; \ |
| 59421 | int16_t __s0_738 = __p0_738; \ | 59301 | poly64x2x2_t __rev1; \ |
| 59422 | int16x4_t __s1_738 = __p1_738; \ | 59302 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59423 | int16x4_t __rev1_738; __rev1_738 = __builtin_shufflevector(__s1_738, __s1_738, 3, 2, 1, 0); \ | 59303 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59424 | __ret_738 = vqdmulhh_s16(__s0_738, __noswap_vget_lane_s16(__rev1_738, __p2_738)); \ | 59304 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 38); \ |
| 59425 | __ret_738; \ | | |
| 59426 | }) | 59305 | }) |
| 59427 | #endif | 59306 | #endif |
| 59428 | | 59307 | |
| 59429 | #ifdef __LITTLE_ENDIAN__ | 59308 | #ifdef __LITTLE_ENDIAN__ |
| 59430 | #define vqdmulhs_laneq_s32(__p0_739, __p1_739, __p2_739) __extension__ ({ \ | 59309 | #define vst1q_f64_x2(__p0, __p1) __extension__ ({ \ |
| 59431 | int32_t __ret_739; \ | 59310 | float64x2x2_t __s1 = __p1; \ |
| 59432 | int32_t __s0_739 = __p0_739; \ | 59311 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 42); \ |
| 59433 | int32x4_t __s1_739 = __p1_739; \ | | |
| 59434 | __ret_739 = vqdmulhs_s32(__s0_739, vgetq_lane_s32(__s1_739, __p2_739)); \ | | |
| 59435 | __ret_739; \ | | |
| 59436 | }) | 59312 | }) |
| 59437 | #else | 59313 | #else |
| 59438 | #define vqdmulhs_laneq_s32(__p0_740, __p1_740, __p2_740) __extension__ ({ \ | 59314 | #define vst1q_f64_x2(__p0, __p1) __extension__ ({ \ |
| 59439 | int32_t __ret_740; \ | 59315 | float64x2x2_t __s1 = __p1; \ |
| 59440 | int32_t __s0_740 = __p0_740; \ | 59316 | float64x2x2_t __rev1; \ |
| 59441 | int32x4_t __s1_740 = __p1_740; \ | 59317 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59442 | int32x4_t __rev1_740; __rev1_740 = __builtin_shufflevector(__s1_740, __s1_740, 3, 2, 1, 0); \ | 59318 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59443 | __ret_740 = vqdmulhs_s32(__s0_740, __noswap_vgetq_lane_s32(__rev1_740, __p2_740)); \ | 59319 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 42); \ |
| 59444 | __ret_740; \ | | |
| 59445 | }) | 59320 | }) |
| 59446 | #endif | 59321 | #endif |
| 59447 | | 59322 | |
| 59448 | #ifdef __LITTLE_ENDIAN__ | 59323 | #define vst1_f64_x2(__p0, __p1) __extension__ ({ \ |
| 59449 | #define vqdmulhh_laneq_s16(__p0_741, __p1_741, __p2_741) __extension__ ({ \ | 59324 | float64x1x2_t __s1 = __p1; \ |
| 59450 | int16_t __ret_741; \ | 59325 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 10); \ |
| 59451 | int16_t __s0_741 = __p0_741; \ | | |
| 59452 | int16x8_t __s1_741 = __p1_741; \ | | |
| 59453 | __ret_741 = vqdmulhh_s16(__s0_741, vgetq_lane_s16(__s1_741, __p2_741)); \ | | |
| 59454 | __ret_741; \ | | |
| 59455 | }) | 59326 | }) |
| 59456 | #else | 59327 | #define vst1_p64_x3(__p0, __p1) __extension__ ({ \ |
| 59457 | #define vqdmulhh_laneq_s16(__p0_742, __p1_742, __p2_742) __extension__ ({ \ | 59328 | poly64x1x3_t __s1 = __p1; \ |
| 59458 | int16_t __ret_742; \ | 59329 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 6); \ |
| 59459 | int16_t __s0_742 = __p0_742; \ | | |
| 59460 | int16x8_t __s1_742 = __p1_742; \ | | |
| 59461 | int16x8_t __rev1_742; __rev1_742 = __builtin_shufflevector(__s1_742, __s1_742, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 59462 | __ret_742 = vqdmulhh_s16(__s0_742, __noswap_vgetq_lane_s16(__rev1_742, __p2_742)); \ | | |
| 59463 | __ret_742; \ | | |
| 59464 | }) | 59330 | }) |
| 59465 | #endif | | |
| 59466 | | | |
| 59467 | #ifdef __LITTLE_ENDIAN__ | 59331 | #ifdef __LITTLE_ENDIAN__ |
| 59468 | #define vqdmulhq_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ | 59332 | #define vst1q_p64_x3(__p0, __p1) __extension__ ({ \ |
| 59469 | int32x4_t __ret; \ | 59333 | poly64x2x3_t __s1 = __p1; \ |
| 59470 | int32x4_t __s0 = __p0; \ | 59334 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 38); \ |
| 59471 | int32x4_t __s1 = __p1; \ | | |
| 59472 | __ret = (int32x4_t) __builtin_neon_vqdmulhq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 34); \ | | |
| 59473 | __ret; \ | | |
| 59474 | }) | 59335 | }) |
| 59475 | #else | 59336 | #else |
| 59476 | #define vqdmulhq_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ | 59337 | #define vst1q_p64_x3(__p0, __p1) __extension__ ({ \ |
| 59477 | int32x4_t __ret; \ | 59338 | poly64x2x3_t __s1 = __p1; \ |
| 59478 | int32x4_t __s0 = __p0; \ | 59339 | poly64x2x3_t __rev1; \ |
| 59479 | int32x4_t __s1 = __p1; \ | 59340 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59480 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 59341 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59481 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 59342 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 59482 | __ret = (int32x4_t) __builtin_neon_vqdmulhq_laneq_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 34); \ | 59343 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 38); \ |
| 59483 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | | |
| 59484 | __ret; \ | | |
| 59485 | }) | 59344 | }) |
| 59486 | #endif | 59345 | #endif |
| 59487 | | 59346 | |
| 59488 | #ifdef __LITTLE_ENDIAN__ | 59347 | #ifdef __LITTLE_ENDIAN__ |
| 59489 | #define vqdmulhq_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ | 59348 | #define vst1q_f64_x3(__p0, __p1) __extension__ ({ \ |
| 59490 | int16x8_t __ret; \ | 59349 | float64x2x3_t __s1 = __p1; \ |
| 59491 | int16x8_t __s0 = __p0; \ | 59350 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 42); \ |
| 59492 | int16x8_t __s1 = __p1; \ | | |
| 59493 | __ret = (int16x8_t) __builtin_neon_vqdmulhq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 33); \ | | |
| 59494 | __ret; \ | | |
| 59495 | }) | 59351 | }) |
| 59496 | #else | 59352 | #else |
| 59497 | #define vqdmulhq_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ | 59353 | #define vst1q_f64_x3(__p0, __p1) __extension__ ({ \ |
| 59498 | int16x8_t __ret; \ | 59354 | float64x2x3_t __s1 = __p1; \ |
| 59499 | int16x8_t __s0 = __p0; \ | 59355 | float64x2x3_t __rev1; \ |
| 59500 | int16x8_t __s1 = __p1; \ | 59356 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59501 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59357 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59502 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59358 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 59503 | __ret = (int16x8_t) __builtin_neon_vqdmulhq_laneq_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 33); \ | 59359 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 42); \ |
| 59504 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 59505 | __ret; \ | | |
| 59506 | }) | 59360 | }) |
| 59507 | #endif | 59361 | #endif |
| 59508 | | 59362 | |
| 59509 | #ifdef __LITTLE_ENDIAN__ | 59363 | #define vst1_f64_x3(__p0, __p1) __extension__ ({ \ |
| 59510 | #define vqdmulh_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ | 59364 | float64x1x3_t __s1 = __p1; \ |
| 59511 | int32x2_t __ret; \ | 59365 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 10); \ |
| 59512 | int32x2_t __s0 = __p0; \ | | |
| 59513 | int32x4_t __s1 = __p1; \ | | |
| 59514 | __ret = (int32x2_t) __builtin_neon_vqdmulh_laneq_v((int8x8_t)__s0, (int8x16_t)__s1, __p2, 2); \ | | |
| 59515 | __ret; \ | | |
| 59516 | }) | 59366 | }) |
| 59517 | #else | 59367 | #define vst1_p64_x4(__p0, __p1) __extension__ ({ \ |
| 59518 | #define vqdmulh_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ | 59368 | poly64x1x4_t __s1 = __p1; \ |
| 59519 | int32x2_t __ret; \ | 59369 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 6); \ |
| 59520 | int32x2_t __s0 = __p0; \ | | |
| 59521 | int32x4_t __s1 = __p1; \ | | |
| 59522 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | | |
| 59523 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | | |
| 59524 | __ret = (int32x2_t) __builtin_neon_vqdmulh_laneq_v((int8x8_t)__rev0, (int8x16_t)__rev1, __p2, 2); \ | | |
| 59525 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | | |
| 59526 | __ret; \ | | |
| 59527 | }) | 59370 | }) |
| 59528 | #endif | | |
| 59529 | | | |
| 59530 | #ifdef __LITTLE_ENDIAN__ | 59371 | #ifdef __LITTLE_ENDIAN__ |
| 59531 | #define vqdmulh_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ | 59372 | #define vst1q_p64_x4(__p0, __p1) __extension__ ({ \ |
| 59532 | int16x4_t __ret; \ | 59373 | poly64x2x4_t __s1 = __p1; \ |
| 59533 | int16x4_t __s0 = __p0; \ | 59374 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 38); \ |
| 59534 | int16x8_t __s1 = __p1; \ | | |
| 59535 | __ret = (int16x4_t) __builtin_neon_vqdmulh_laneq_v((int8x8_t)__s0, (int8x16_t)__s1, __p2, 1); \ | | |
| 59536 | __ret; \ | | |
| 59537 | }) | 59375 | }) |
| 59538 | #else | 59376 | #else |
| 59539 | #define vqdmulh_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ | 59377 | #define vst1q_p64_x4(__p0, __p1) __extension__ ({ \ |
| 59540 | int16x4_t __ret; \ | 59378 | poly64x2x4_t __s1 = __p1; \ |
| 59541 | int16x4_t __s0 = __p0; \ | 59379 | poly64x2x4_t __rev1; \ |
| 59542 | int16x8_t __s1 = __p1; \ | 59380 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59543 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 59381 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59544 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59382 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 59545 | __ret = (int16x4_t) __builtin_neon_vqdmulh_laneq_v((int8x8_t)__rev0, (int8x16_t)__rev1, __p2, 1); \ | 59383 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 59546 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 59384 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 38); \ |
| 59547 | __ret; \ | | |
| 59548 | }) | 59385 | }) |
| 59549 | #endif | 59386 | #endif |
| 59550 | | 59387 | |
| 59551 | __ai int64_t vqdmulls_s32(int32_t __p0, int32_t __p1) { | | |
| 59552 | int64_t __ret; | | |
| 59553 | __ret = (int64_t) __builtin_neon_vqdmulls_s32(__p0, __p1); | | |
| 59554 | return __ret; | | |
| 59555 | } | | |
| 59556 | __ai int32_t vqdmullh_s16(int16_t __p0, int16_t __p1) { | | |
| 59557 | int32_t __ret; | | |
| 59558 | __ret = (int32_t) __builtin_neon_vqdmullh_s16(__p0, __p1); | | |
| 59559 | return __ret; | | |
| 59560 | } | | |
| 59561 | #ifdef __LITTLE_ENDIAN__ | | |
| 59562 | __ai int64x2_t vqdmull_high_s32(int32x4_t __p0, int32x4_t __p1) { | | |
| 59563 | int64x2_t __ret; | | |
| 59564 | __ret = vqdmull_s32(vget_high_s32(__p0), vget_high_s32(__p1)); | | |
| 59565 | return __ret; | | |
| 59566 | } | | |
| 59567 | #else | | |
| 59568 | __ai int64x2_t vqdmull_high_s32(int32x4_t __p0, int32x4_t __p1) { | | |
| 59569 | int64x2_t __ret; | | |
| 59570 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 59571 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 59572 | __ret = __noswap_vqdmull_s32(__noswap_vget_high_s32(__rev0), __noswap_vget_high_s32(__rev1)); | | |
| 59573 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 59574 | return __ret; | | |
| 59575 | } | | |
| 59576 | #endif | | |
| 59577 | | | |
| 59578 | #ifdef __LITTLE_ENDIAN__ | | |
| 59579 | __ai int32x4_t vqdmull_high_s16(int16x8_t __p0, int16x8_t __p1) { | | |
| 59580 | int32x4_t __ret; | | |
| 59581 | __ret = vqdmull_s16(vget_high_s16(__p0), vget_high_s16(__p1)); | | |
| 59582 | return __ret; | | |
| 59583 | } | | |
| 59584 | #else | | |
| 59585 | __ai int32x4_t vqdmull_high_s16(int16x8_t __p0, int16x8_t __p1) { | | |
| 59586 | int32x4_t __ret; | | |
| 59587 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 59588 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 59589 | __ret = __noswap_vqdmull_s16(__noswap_vget_high_s16(__rev0), __noswap_vget_high_s16(__rev1)); | | |
| 59590 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 59591 | return __ret; | | |
| 59592 | } | | |
| 59593 | #endif | | |
| 59594 | | | |
| 59595 | #ifdef __LITTLE_ENDIAN__ | 59388 | #ifdef __LITTLE_ENDIAN__ |
| 59596 | #define vqdmull_high_lane_s32(__p0_743, __p1_743, __p2_743) __extension__ ({ \ | 59389 | #define vst1q_f64_x4(__p0, __p1) __extension__ ({ \ |
| 59597 | int64x2_t __ret_743; \ | 59390 | float64x2x4_t __s1 = __p1; \ |
| 59598 | int32x4_t __s0_743 = __p0_743; \ | 59391 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 42); \ |
| 59599 | int32x2_t __s1_743 = __p1_743; \ | | |
| 59600 | __ret_743 = vqdmull_s32(vget_high_s32(__s0_743), splat_lane_s32(__s1_743, __p2_743)); \ | | |
| 59601 | __ret_743; \ | | |
| 59602 | }) | 59392 | }) |
| 59603 | #else | 59393 | #else |
| 59604 | #define vqdmull_high_lane_s32(__p0_744, __p1_744, __p2_744) __extension__ ({ \ | 59394 | #define vst1q_f64_x4(__p0, __p1) __extension__ ({ \ |
| 59605 | int64x2_t __ret_744; \ | 59395 | float64x2x4_t __s1 = __p1; \ |
| 59606 | int32x4_t __s0_744 = __p0_744; \ | 59396 | float64x2x4_t __rev1; \ |
| 59607 | int32x2_t __s1_744 = __p1_744; \ | 59397 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59608 | int32x4_t __rev0_744; __rev0_744 = __builtin_shufflevector(__s0_744, __s0_744, 3, 2, 1, 0); \ | 59398 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59609 | int32x2_t __rev1_744; __rev1_744 = __builtin_shufflevector(__s1_744, __s1_744, 1, 0); \ | 59399 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 59610 | __ret_744 = __noswap_vqdmull_s32(__noswap_vget_high_s32(__rev0_744), __noswap_splat_lane_s32(__rev1_744, __p2_744)); \ | 59400 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 59611 | __ret_744 = __builtin_shufflevector(__ret_744, __ret_744, 1, 0); \ | 59401 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 42); \ |
| 59612 | __ret_744; \ | | |
| 59613 | }) | 59402 | }) |
| 59614 | #endif | 59403 | #endif |
| 59615 | | 59404 | |
| | 59405 | #define vst1_f64_x4(__p0, __p1) __extension__ ({ \ |
| | 59406 | float64x1x4_t __s1 = __p1; \ |
| | 59407 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 10); \ |
| | 59408 | }) |
| | 59409 | #define vst2_p64(__p0, __p1) __extension__ ({ \ |
| | 59410 | poly64x1x2_t __s1 = __p1; \ |
| | 59411 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 6); \ |
| | 59412 | }) |
| 59616 | #ifdef __LITTLE_ENDIAN__ | 59413 | #ifdef __LITTLE_ENDIAN__ |
| 59617 | #define vqdmull_high_lane_s16(__p0_745, __p1_745, __p2_745) __extension__ ({ \ | 59414 | #define vst2q_p64(__p0, __p1) __extension__ ({ \ |
| 59618 | int32x4_t __ret_745; \ | 59415 | poly64x2x2_t __s1 = __p1; \ |
| 59619 | int16x8_t __s0_745 = __p0_745; \ | 59416 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 38); \ |
| 59620 | int16x4_t __s1_745 = __p1_745; \ | | |
| 59621 | __ret_745 = vqdmull_s16(vget_high_s16(__s0_745), splat_lane_s16(__s1_745, __p2_745)); \ | | |
| 59622 | __ret_745; \ | | |
| 59623 | }) | 59417 | }) |
| 59624 | #else | 59418 | #else |
| 59625 | #define vqdmull_high_lane_s16(__p0_746, __p1_746, __p2_746) __extension__ ({ \ | 59419 | #define vst2q_p64(__p0, __p1) __extension__ ({ \ |
| 59626 | int32x4_t __ret_746; \ | 59420 | poly64x2x2_t __s1 = __p1; \ |
| 59627 | int16x8_t __s0_746 = __p0_746; \ | 59421 | poly64x2x2_t __rev1; \ |
| 59628 | int16x4_t __s1_746 = __p1_746; \ | 59422 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59629 | int16x8_t __rev0_746; __rev0_746 = __builtin_shufflevector(__s0_746, __s0_746, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59423 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59630 | int16x4_t __rev1_746; __rev1_746 = __builtin_shufflevector(__s1_746, __s1_746, 3, 2, 1, 0); \ | 59424 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 38); \ |
| 59631 | __ret_746 = __noswap_vqdmull_s16(__noswap_vget_high_s16(__rev0_746), __noswap_splat_lane_s16(__rev1_746, __p2_746)); \ | | |
| 59632 | __ret_746 = __builtin_shufflevector(__ret_746, __ret_746, 3, 2, 1, 0); \ | | |
| 59633 | __ret_746; \ | | |
| 59634 | }) | 59425 | }) |
| 59635 | #endif | 59426 | #endif |
| 59636 | | 59427 | |
| 59637 | #ifdef __LITTLE_ENDIAN__ | 59428 | #ifdef __LITTLE_ENDIAN__ |
| 59638 | #define vqdmull_high_laneq_s32(__p0_747, __p1_747, __p2_747) __extension__ ({ \ | 59429 | #define vst2q_u64(__p0, __p1) __extension__ ({ \ |
| 59639 | int64x2_t __ret_747; \ | 59430 | uint64x2x2_t __s1 = __p1; \ |
| 59640 | int32x4_t __s0_747 = __p0_747; \ | 59431 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 51); \ |
| 59641 | int32x4_t __s1_747 = __p1_747; \ | | |
| 59642 | __ret_747 = vqdmull_s32(vget_high_s32(__s0_747), splat_laneq_s32(__s1_747, __p2_747)); \ | | |
| 59643 | __ret_747; \ | | |
| 59644 | }) | 59432 | }) |
| 59645 | #else | 59433 | #else |
| 59646 | #define vqdmull_high_laneq_s32(__p0_748, __p1_748, __p2_748) __extension__ ({ \ | 59434 | #define vst2q_u64(__p0, __p1) __extension__ ({ \ |
| 59647 | int64x2_t __ret_748; \ | 59435 | uint64x2x2_t __s1 = __p1; \ |
| 59648 | int32x4_t __s0_748 = __p0_748; \ | 59436 | uint64x2x2_t __rev1; \ |
| 59649 | int32x4_t __s1_748 = __p1_748; \ | 59437 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59650 | int32x4_t __rev0_748; __rev0_748 = __builtin_shufflevector(__s0_748, __s0_748, 3, 2, 1, 0); \ | 59438 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59651 | int32x4_t __rev1_748; __rev1_748 = __builtin_shufflevector(__s1_748, __s1_748, 3, 2, 1, 0); \ | 59439 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 51); \ |
| 59652 | __ret_748 = __noswap_vqdmull_s32(__noswap_vget_high_s32(__rev0_748), __noswap_splat_laneq_s32(__rev1_748, __p2_748)); \ | | |
| 59653 | __ret_748 = __builtin_shufflevector(__ret_748, __ret_748, 1, 0); \ | | |
| 59654 | __ret_748; \ | | |
| 59655 | }) | 59440 | }) |
| 59656 | #endif | 59441 | #endif |
| 59657 | | 59442 | |
| 59658 | #ifdef __LITTLE_ENDIAN__ | 59443 | #ifdef __LITTLE_ENDIAN__ |
| 59659 | #define vqdmull_high_laneq_s16(__p0_749, __p1_749, __p2_749) __extension__ ({ \ | 59444 | #define vst2q_f64(__p0, __p1) __extension__ ({ \ |
| 59660 | int32x4_t __ret_749; \ | 59445 | float64x2x2_t __s1 = __p1; \ |
| 59661 | int16x8_t __s0_749 = __p0_749; \ | 59446 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 42); \ |
| 59662 | int16x8_t __s1_749 = __p1_749; \ | | |
| 59663 | __ret_749 = vqdmull_s16(vget_high_s16(__s0_749), splat_laneq_s16(__s1_749, __p2_749)); \ | | |
| 59664 | __ret_749; \ | | |
| 59665 | }) | 59447 | }) |
| 59666 | #else | 59448 | #else |
| 59667 | #define vqdmull_high_laneq_s16(__p0_750, __p1_750, __p2_750) __extension__ ({ \ | 59449 | #define vst2q_f64(__p0, __p1) __extension__ ({ \ |
| 59668 | int32x4_t __ret_750; \ | 59450 | float64x2x2_t __s1 = __p1; \ |
| 59669 | int16x8_t __s0_750 = __p0_750; \ | 59451 | float64x2x2_t __rev1; \ |
| 59670 | int16x8_t __s1_750 = __p1_750; \ | 59452 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59671 | int16x8_t __rev0_750; __rev0_750 = __builtin_shufflevector(__s0_750, __s0_750, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59453 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59672 | int16x8_t __rev1_750; __rev1_750 = __builtin_shufflevector(__s1_750, __s1_750, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59454 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 42); \ |
| 59673 | __ret_750 = __noswap_vqdmull_s16(__noswap_vget_high_s16(__rev0_750), __noswap_splat_laneq_s16(__rev1_750, __p2_750)); \ | | |
| 59674 | __ret_750 = __builtin_shufflevector(__ret_750, __ret_750, 3, 2, 1, 0); \ | | |
| 59675 | __ret_750; \ | | |
| 59676 | }) | 59455 | }) |
| 59677 | #endif | 59456 | #endif |
| 59678 | | 59457 | |
| 59679 | #ifdef __LITTLE_ENDIAN__ | 59458 | #ifdef __LITTLE_ENDIAN__ |
| 59680 | __ai int64x2_t vqdmull_high_n_s32(int32x4_t __p0, int32_t __p1) { | 59459 | #define vst2q_s64(__p0, __p1) __extension__ ({ \ |
| 59681 | int64x2_t __ret; | 59460 | int64x2x2_t __s1 = __p1; \ |
| 59682 | __ret = vqdmull_n_s32(vget_high_s32(__p0), __p1); | 59461 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 35); \ |
| 59683 | return __ret; | 59462 | }) |
| 59684 | } | | |
| 59685 | #else | 59463 | #else |
| 59686 | __ai int64x2_t vqdmull_high_n_s32(int32x4_t __p0, int32_t __p1) { | 59464 | #define vst2q_s64(__p0, __p1) __extension__ ({ \ |
| 59687 | int64x2_t __ret; | 59465 | int64x2x2_t __s1 = __p1; \ |
| 59688 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 59466 | int64x2x2_t __rev1; \ |
| 59689 | __ret = __noswap_vqdmull_n_s32(__noswap_vget_high_s32(__rev0), __p1); | 59467 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59690 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 59468 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59691 | return __ret; | 59469 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 35); \ |
| 59692 | } | 59470 | }) |
| 59693 | #endif | 59471 | #endif |
| 59694 | | 59472 | |
| | 59473 | #define vst2_f64(__p0, __p1) __extension__ ({ \ |
| | 59474 | float64x1x2_t __s1 = __p1; \ |
| | 59475 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 10); \ |
| | 59476 | }) |
| | 59477 | #define vst2_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| | 59478 | poly64x1x2_t __s1 = __p1; \ |
| | 59479 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 6); \ |
| | 59480 | }) |
| 59695 | #ifdef __LITTLE_ENDIAN__ | 59481 | #ifdef __LITTLE_ENDIAN__ |
| 59696 | __ai int32x4_t vqdmull_high_n_s16(int16x8_t __p0, int16_t __p1) { | 59482 | #define vst2q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 59697 | int32x4_t __ret; | 59483 | poly8x16x2_t __s1 = __p1; \ |
| 59698 | __ret = vqdmull_n_s16(vget_high_s16(__p0), __p1); | 59484 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 36); \ |
| 59699 | return __ret; | 59485 | }) |
| 59700 | } | | |
| 59701 | #else | 59486 | #else |
| 59702 | __ai int32x4_t vqdmull_high_n_s16(int16x8_t __p0, int16_t __p1) { | 59487 | #define vst2q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 59703 | int32x4_t __ret; | 59488 | poly8x16x2_t __s1 = __p1; \ |
| 59704 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 59489 | poly8x16x2_t __rev1; \ |
| 59705 | __ret = __noswap_vqdmull_n_s16(__noswap_vget_high_s16(__rev0), __p1); | 59490 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59706 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 59491 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59707 | return __ret; | 59492 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 36); \ |
| 59708 | } | 59493 | }) |
| 59709 | #endif | 59494 | #endif |
| 59710 | | 59495 | |
| 59711 | #ifdef __LITTLE_ENDIAN__ | 59496 | #ifdef __LITTLE_ENDIAN__ |
| 59712 | #define vqdmulls_lane_s32(__p0_751, __p1_751, __p2_751) __extension__ ({ \ | 59497 | #define vst2q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 59713 | int64_t __ret_751; \ | 59498 | poly64x2x2_t __s1 = __p1; \ |
| 59714 | int32_t __s0_751 = __p0_751; \ | 59499 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 38); \ |
| 59715 | int32x2_t __s1_751 = __p1_751; \ | | |
| 59716 | __ret_751 = vqdmulls_s32(__s0_751, vget_lane_s32(__s1_751, __p2_751)); \ | | |
| 59717 | __ret_751; \ | | |
| 59718 | }) | 59500 | }) |
| 59719 | #else | 59501 | #else |
| 59720 | #define vqdmulls_lane_s32(__p0_752, __p1_752, __p2_752) __extension__ ({ \ | 59502 | #define vst2q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 59721 | int64_t __ret_752; \ | 59503 | poly64x2x2_t __s1 = __p1; \ |
| 59722 | int32_t __s0_752 = __p0_752; \ | 59504 | poly64x2x2_t __rev1; \ |
| 59723 | int32x2_t __s1_752 = __p1_752; \ | 59505 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59724 | int32x2_t __rev1_752; __rev1_752 = __builtin_shufflevector(__s1_752, __s1_752, 1, 0); \ | 59506 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59725 | __ret_752 = vqdmulls_s32(__s0_752, __noswap_vget_lane_s32(__rev1_752, __p2_752)); \ | 59507 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 38); \ |
| 59726 | __ret_752; \ | | |
| 59727 | }) | 59508 | }) |
| 59728 | #endif | 59509 | #endif |
| 59729 | | 59510 | |
| 59730 | #ifdef __LITTLE_ENDIAN__ | 59511 | #ifdef __LITTLE_ENDIAN__ |
| 59731 | #define vqdmullh_lane_s16(__p0_753, __p1_753, __p2_753) __extension__ ({ \ | 59512 | #define vst2q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ |
| 59732 | int32_t __ret_753; \ | 59513 | uint8x16x2_t __s1 = __p1; \ |
| 59733 | int16_t __s0_753 = __p0_753; \ | 59514 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 48); \ |
| 59734 | int16x4_t __s1_753 = __p1_753; \ | | |
| 59735 | __ret_753 = vqdmullh_s16(__s0_753, vget_lane_s16(__s1_753, __p2_753)); \ | | |
| 59736 | __ret_753; \ | | |
| 59737 | }) | 59515 | }) |
| 59738 | #else | 59516 | #else |
| 59739 | #define vqdmullh_lane_s16(__p0_754, __p1_754, __p2_754) __extension__ ({ \ | 59517 | #define vst2q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ |
| 59740 | int32_t __ret_754; \ | 59518 | uint8x16x2_t __s1 = __p1; \ |
| 59741 | int16_t __s0_754 = __p0_754; \ | 59519 | uint8x16x2_t __rev1; \ |
| 59742 | int16x4_t __s1_754 = __p1_754; \ | 59520 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59743 | int16x4_t __rev1_754; __rev1_754 = __builtin_shufflevector(__s1_754, __s1_754, 3, 2, 1, 0); \ | 59521 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59744 | __ret_754 = vqdmullh_s16(__s0_754, __noswap_vget_lane_s16(__rev1_754, __p2_754)); \ | 59522 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 48); \ |
| 59745 | __ret_754; \ | | |
| 59746 | }) | 59523 | }) |
| 59747 | #endif | 59524 | #endif |
| 59748 | | 59525 | |
| 59749 | #ifdef __LITTLE_ENDIAN__ | 59526 | #ifdef __LITTLE_ENDIAN__ |
| 59750 | #define vqdmulls_laneq_s32(__p0_755, __p1_755, __p2_755) __extension__ ({ \ | 59527 | #define vst2q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 59751 | int64_t __ret_755; \ | 59528 | uint64x2x2_t __s1 = __p1; \ |
| 59752 | int32_t __s0_755 = __p0_755; \ | 59529 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 51); \ |
| 59753 | int32x4_t __s1_755 = __p1_755; \ | | |
| 59754 | __ret_755 = vqdmulls_s32(__s0_755, vgetq_lane_s32(__s1_755, __p2_755)); \ | | |
| 59755 | __ret_755; \ | | |
| 59756 | }) | 59530 | }) |
| 59757 | #else | 59531 | #else |
| 59758 | #define vqdmulls_laneq_s32(__p0_756, __p1_756, __p2_756) __extension__ ({ \ | 59532 | #define vst2q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 59759 | int64_t __ret_756; \ | 59533 | uint64x2x2_t __s1 = __p1; \ |
| 59760 | int32_t __s0_756 = __p0_756; \ | 59534 | uint64x2x2_t __rev1; \ |
| 59761 | int32x4_t __s1_756 = __p1_756; \ | 59535 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59762 | int32x4_t __rev1_756; __rev1_756 = __builtin_shufflevector(__s1_756, __s1_756, 3, 2, 1, 0); \ | 59536 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59763 | __ret_756 = vqdmulls_s32(__s0_756, __noswap_vgetq_lane_s32(__rev1_756, __p2_756)); \ | 59537 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 51); \ |
| 59764 | __ret_756; \ | | |
| 59765 | }) | 59538 | }) |
| 59766 | #endif | 59539 | #endif |
| 59767 | | 59540 | |
| 59768 | #ifdef __LITTLE_ENDIAN__ | 59541 | #ifdef __LITTLE_ENDIAN__ |
| 59769 | #define vqdmullh_laneq_s16(__p0_757, __p1_757, __p2_757) __extension__ ({ \ | 59542 | #define vst2q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ |
| 59770 | int32_t __ret_757; \ | 59543 | int8x16x2_t __s1 = __p1; \ |
| 59771 | int16_t __s0_757 = __p0_757; \ | 59544 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 32); \ |
| 59772 | int16x8_t __s1_757 = __p1_757; \ | | |
| 59773 | __ret_757 = vqdmullh_s16(__s0_757, vgetq_lane_s16(__s1_757, __p2_757)); \ | | |
| 59774 | __ret_757; \ | | |
| 59775 | }) | 59545 | }) |
| 59776 | #else | 59546 | #else |
| 59777 | #define vqdmullh_laneq_s16(__p0_758, __p1_758, __p2_758) __extension__ ({ \ | 59547 | #define vst2q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ |
| 59778 | int32_t __ret_758; \ | 59548 | int8x16x2_t __s1 = __p1; \ |
| 59779 | int16_t __s0_758 = __p0_758; \ | 59549 | int8x16x2_t __rev1; \ |
| 59780 | int16x8_t __s1_758 = __p1_758; \ | 59550 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59781 | int16x8_t __rev1_758; __rev1_758 = __builtin_shufflevector(__s1_758, __s1_758, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59551 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59782 | __ret_758 = vqdmullh_s16(__s0_758, __noswap_vgetq_lane_s16(__rev1_758, __p2_758)); \ | 59552 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 32); \ |
| 59783 | __ret_758; \ | | |
| 59784 | }) | 59553 | }) |
| 59785 | #endif | 59554 | #endif |
| 59786 | | 59555 | |
| 59787 | #ifdef __LITTLE_ENDIAN__ | 59556 | #ifdef __LITTLE_ENDIAN__ |
| 59788 | #define vqdmull_laneq_s32(__p0_759, __p1_759, __p2_759) __extension__ ({ \ | 59557 | #define vst2q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 59789 | int64x2_t __ret_759; \ | 59558 | float64x2x2_t __s1 = __p1; \ |
| 59790 | int32x2_t __s0_759 = __p0_759; \ | 59559 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 42); \ |
| 59791 | int32x4_t __s1_759 = __p1_759; \ | | |
| 59792 | __ret_759 = vqdmull_s32(__s0_759, splat_laneq_s32(__s1_759, __p2_759)); \ | | |
| 59793 | __ret_759; \ | | |
| 59794 | }) | 59560 | }) |
| 59795 | #else | 59561 | #else |
| 59796 | #define vqdmull_laneq_s32(__p0_760, __p1_760, __p2_760) __extension__ ({ \ | 59562 | #define vst2q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 59797 | int64x2_t __ret_760; \ | 59563 | float64x2x2_t __s1 = __p1; \ |
| 59798 | int32x2_t __s0_760 = __p0_760; \ | 59564 | float64x2x2_t __rev1; \ |
| 59799 | int32x4_t __s1_760 = __p1_760; \ | 59565 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59800 | int32x2_t __rev0_760; __rev0_760 = __builtin_shufflevector(__s0_760, __s0_760, 1, 0); \ | 59566 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59801 | int32x4_t __rev1_760; __rev1_760 = __builtin_shufflevector(__s1_760, __s1_760, 3, 2, 1, 0); \ | 59567 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 42); \ |
| 59802 | __ret_760 = __noswap_vqdmull_s32(__rev0_760, __noswap_splat_laneq_s32(__rev1_760, __p2_760)); \ | | |
| 59803 | __ret_760 = __builtin_shufflevector(__ret_760, __ret_760, 1, 0); \ | | |
| 59804 | __ret_760; \ | | |
| 59805 | }) | 59568 | }) |
| 59806 | #endif | 59569 | #endif |
| 59807 | | 59570 | |
| 59808 | #ifdef __LITTLE_ENDIAN__ | 59571 | #ifdef __LITTLE_ENDIAN__ |
| 59809 | #define vqdmull_laneq_s16(__p0_761, __p1_761, __p2_761) __extension__ ({ \ | 59572 | #define vst2q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 59810 | int32x4_t __ret_761; \ | 59573 | int64x2x2_t __s1 = __p1; \ |
| 59811 | int16x4_t __s0_761 = __p0_761; \ | 59574 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 35); \ |
| 59812 | int16x8_t __s1_761 = __p1_761; \ | | |
| 59813 | __ret_761 = vqdmull_s16(__s0_761, splat_laneq_s16(__s1_761, __p2_761)); \ | | |
| 59814 | __ret_761; \ | | |
| 59815 | }) | 59575 | }) |
| 59816 | #else | 59576 | #else |
| 59817 | #define vqdmull_laneq_s16(__p0_762, __p1_762, __p2_762) __extension__ ({ \ | 59577 | #define vst2q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 59818 | int32x4_t __ret_762; \ | 59578 | int64x2x2_t __s1 = __p1; \ |
| 59819 | int16x4_t __s0_762 = __p0_762; \ | 59579 | int64x2x2_t __rev1; \ |
| 59820 | int16x8_t __s1_762 = __p1_762; \ | 59580 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59821 | int16x4_t __rev0_762; __rev0_762 = __builtin_shufflevector(__s0_762, __s0_762, 3, 2, 1, 0); \ | 59581 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59822 | int16x8_t __rev1_762; __rev1_762 = __builtin_shufflevector(__s1_762, __s1_762, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59582 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 35); \ |
| 59823 | __ret_762 = __noswap_vqdmull_s16(__rev0_762, __noswap_splat_laneq_s16(__rev1_762, __p2_762)); \ | | |
| 59824 | __ret_762 = __builtin_shufflevector(__ret_762, __ret_762, 3, 2, 1, 0); \ | | |
| 59825 | __ret_762; \ | | |
| 59826 | }) | 59583 | }) |
| 59827 | #endif | 59584 | #endif |
| 59828 | | 59585 | |
| 59829 | __ai int16_t vqmovns_s32(int32_t __p0) { | 59586 | #define vst2_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 59830 | int16_t __ret; | 59587 | uint64x1x2_t __s1 = __p1; \ |
| 59831 | __ret = (int16_t) __builtin_neon_vqmovns_s32(__p0); | 59588 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 19); \ |
| 59832 | return __ret; | 59589 | }) |
| 59833 | } | 59590 | #define vst2_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 59834 | __ai int32_t vqmovnd_s64(int64_t __p0) { | 59591 | float64x1x2_t __s1 = __p1; \ |
| 59835 | int32_t __ret; | 59592 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 10); \ |
| 59836 | __ret = (int32_t) __builtin_neon_vqmovnd_s64(__p0); | 59593 | }) |
| 59837 | return __ret; | 59594 | #define vst2_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 59838 | } | 59595 | int64x1x2_t __s1 = __p1; \ |
| 59839 | __ai int8_t vqmovnh_s16(int16_t __p0) { | 59596 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 3); \ |
| 59840 | int8_t __ret; | 59597 | }) |
| 59841 | __ret = (int8_t) __builtin_neon_vqmovnh_s16(__p0); | 59598 | #define vst3_p64(__p0, __p1) __extension__ ({ \ |
| 59842 | return __ret; | 59599 | poly64x1x3_t __s1 = __p1; \ |
| 59843 | } | 59600 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 6); \ |
| 59844 | __ai uint16_t vqmovns_u32(uint32_t __p0) { | 59601 | }) |
| 59845 | uint16_t __ret; | | |
| 59846 | __ret = (uint16_t) __builtin_neon_vqmovns_u32(__p0); | | |
| 59847 | return __ret; | | |
| 59848 | } | | |
| 59849 | __ai uint32_t vqmovnd_u64(uint64_t __p0) { | | |
| 59850 | uint32_t __ret; | | |
| 59851 | __ret = (uint32_t) __builtin_neon_vqmovnd_u64(__p0); | | |
| 59852 | return __ret; | | |
| 59853 | } | | |
| 59854 | __ai uint8_t vqmovnh_u16(uint16_t __p0) { | | |
| 59855 | uint8_t __ret; | | |
| 59856 | __ret = (uint8_t) __builtin_neon_vqmovnh_u16(__p0); | | |
| 59857 | return __ret; | | |
| 59858 | } | | |
| 59859 | #ifdef __LITTLE_ENDIAN__ | 59602 | #ifdef __LITTLE_ENDIAN__ |
| 59860 | __ai uint16x8_t vqmovn_high_u32(uint16x4_t __p0, uint32x4_t __p1) { | 59603 | #define vst3q_p64(__p0, __p1) __extension__ ({ \ |
| 59861 | uint16x8_t __ret; | 59604 | poly64x2x3_t __s1 = __p1; \ |
| 59862 | __ret = vcombine_u16(__p0, vqmovn_u32(__p1)); | 59605 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 38); \ |
| 59863 | return __ret; | 59606 | }) |
| 59864 | } | | |
| 59865 | #else | 59607 | #else |
| 59866 | __ai uint16x8_t vqmovn_high_u32(uint16x4_t __p0, uint32x4_t __p1) { | 59608 | #define vst3q_p64(__p0, __p1) __extension__ ({ \ |
| 59867 | uint16x8_t __ret; | 59609 | poly64x2x3_t __s1 = __p1; \ |
| 59868 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 59610 | poly64x2x3_t __rev1; \ |
| 59869 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 59611 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59870 | __ret = __noswap_vcombine_u16(__rev0, __noswap_vqmovn_u32(__rev1)); | 59612 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59871 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 59613 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 59872 | return __ret; | 59614 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 38); \ |
| 59873 | } | 59615 | }) |
| 59874 | #endif | 59616 | #endif |
| 59875 | | 59617 | |
| 59876 | #ifdef __LITTLE_ENDIAN__ | 59618 | #ifdef __LITTLE_ENDIAN__ |
| 59877 | __ai uint32x4_t vqmovn_high_u64(uint32x2_t __p0, uint64x2_t __p1) { | 59619 | #define vst3q_u64(__p0, __p1) __extension__ ({ \ |
| 59878 | uint32x4_t __ret; | 59620 | uint64x2x3_t __s1 = __p1; \ |
| 59879 | __ret = vcombine_u32(__p0, vqmovn_u64(__p1)); | 59621 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 51); \ |
| 59880 | return __ret; | 59622 | }) |
| 59881 | } | | |
| 59882 | #else | 59623 | #else |
| 59883 | __ai uint32x4_t vqmovn_high_u64(uint32x2_t __p0, uint64x2_t __p1) { | 59624 | #define vst3q_u64(__p0, __p1) __extension__ ({ \ |
| 59884 | uint32x4_t __ret; | 59625 | uint64x2x3_t __s1 = __p1; \ |
| 59885 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 59626 | uint64x2x3_t __rev1; \ |
| 59886 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 59627 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59887 | __ret = __noswap_vcombine_u32(__rev0, __noswap_vqmovn_u64(__rev1)); | 59628 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59888 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 59629 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 59889 | return __ret; | 59630 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 51); \ |
| 59890 | } | 59631 | }) |
| 59891 | #endif | 59632 | #endif |
| 59892 | | 59633 | |
| 59893 | #ifdef __LITTLE_ENDIAN__ | 59634 | #ifdef __LITTLE_ENDIAN__ |
| 59894 | __ai uint8x16_t vqmovn_high_u16(uint8x8_t __p0, uint16x8_t __p1) { | 59635 | #define vst3q_f64(__p0, __p1) __extension__ ({ \ |
| 59895 | uint8x16_t __ret; | 59636 | float64x2x3_t __s1 = __p1; \ |
| 59896 | __ret = vcombine_u8(__p0, vqmovn_u16(__p1)); | 59637 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 42); \ |
| 59897 | return __ret; | 59638 | }) |
| 59898 | } | | |
| 59899 | #else | 59639 | #else |
| 59900 | __ai uint8x16_t vqmovn_high_u16(uint8x8_t __p0, uint16x8_t __p1) { | 59640 | #define vst3q_f64(__p0, __p1) __extension__ ({ \ |
| 59901 | uint8x16_t __ret; | 59641 | float64x2x3_t __s1 = __p1; \ |
| 59902 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 59642 | float64x2x3_t __rev1; \ |
| 59903 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 59643 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59904 | __ret = __noswap_vcombine_u8(__rev0, __noswap_vqmovn_u16(__rev1)); | 59644 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59905 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 59645 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 59906 | return __ret; | 59646 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 42); \ |
| 59907 | } | 59647 | }) |
| 59908 | #endif | 59648 | #endif |
| 59909 | | 59649 | |
| 59910 | #ifdef __LITTLE_ENDIAN__ | 59650 | #ifdef __LITTLE_ENDIAN__ |
| 59911 | __ai int16x8_t vqmovn_high_s32(int16x4_t __p0, int32x4_t __p1) { | 59651 | #define vst3q_s64(__p0, __p1) __extension__ ({ \ |
| 59912 | int16x8_t __ret; | 59652 | int64x2x3_t __s1 = __p1; \ |
| 59913 | __ret = vcombine_s16(__p0, vqmovn_s32(__p1)); | 59653 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 35); \ |
| 59914 | return __ret; | 59654 | }) |
| 59915 | } | | |
| 59916 | #else | 59655 | #else |
| 59917 | __ai int16x8_t vqmovn_high_s32(int16x4_t __p0, int32x4_t __p1) { | 59656 | #define vst3q_s64(__p0, __p1) __extension__ ({ \ |
| 59918 | int16x8_t __ret; | 59657 | int64x2x3_t __s1 = __p1; \ |
| 59919 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 59658 | int64x2x3_t __rev1; \ |
| 59920 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 59659 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59921 | __ret = __noswap_vcombine_s16(__rev0, __noswap_vqmovn_s32(__rev1)); | 59660 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59922 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 59661 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 59923 | return __ret; | 59662 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 35); \ |
| 59924 | } | 59663 | }) |
| 59925 | #endif | 59664 | #endif |
| 59926 | | 59665 | |
| | 59666 | #define vst3_f64(__p0, __p1) __extension__ ({ \ |
| | 59667 | float64x1x3_t __s1 = __p1; \ |
| | 59668 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 10); \ |
| | 59669 | }) |
| | 59670 | #define vst3_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| | 59671 | poly64x1x3_t __s1 = __p1; \ |
| | 59672 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 6); \ |
| | 59673 | }) |
| 59927 | #ifdef __LITTLE_ENDIAN__ | 59674 | #ifdef __LITTLE_ENDIAN__ |
| 59928 | __ai int32x4_t vqmovn_high_s64(int32x2_t __p0, int64x2_t __p1) { | 59675 | #define vst3q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 59929 | int32x4_t __ret; | 59676 | poly8x16x3_t __s1 = __p1; \ |
| 59930 | __ret = vcombine_s32(__p0, vqmovn_s64(__p1)); | 59677 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 36); \ |
| 59931 | return __ret; | 59678 | }) |
| 59932 | } | | |
| 59933 | #else | 59679 | #else |
| 59934 | __ai int32x4_t vqmovn_high_s64(int32x2_t __p0, int64x2_t __p1) { | 59680 | #define vst3q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 59935 | int32x4_t __ret; | 59681 | poly8x16x3_t __s1 = __p1; \ |
| 59936 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 59682 | poly8x16x3_t __rev1; \ |
| 59937 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 59683 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59938 | __ret = __noswap_vcombine_s32(__rev0, __noswap_vqmovn_s64(__rev1)); | 59684 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59939 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 59685 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59940 | return __ret; | 59686 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 36); \ |
| 59941 | } | 59687 | }) |
| 59942 | #endif | 59688 | #endif |
| 59943 | | 59689 | |
| 59944 | #ifdef __LITTLE_ENDIAN__ | 59690 | #ifdef __LITTLE_ENDIAN__ |
| 59945 | __ai int8x16_t vqmovn_high_s16(int8x8_t __p0, int16x8_t __p1) { | 59691 | #define vst3q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 59946 | int8x16_t __ret; | 59692 | poly64x2x3_t __s1 = __p1; \ |
| 59947 | __ret = vcombine_s8(__p0, vqmovn_s16(__p1)); | 59693 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 38); \ |
| 59948 | return __ret; | 59694 | }) |
| 59949 | } | | |
| 59950 | #else | 59695 | #else |
| 59951 | __ai int8x16_t vqmovn_high_s16(int8x8_t __p0, int16x8_t __p1) { | 59696 | #define vst3q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 59952 | int8x16_t __ret; | 59697 | poly64x2x3_t __s1 = __p1; \ |
| 59953 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 59698 | poly64x2x3_t __rev1; \ |
| 59954 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 59699 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 59955 | __ret = __noswap_vcombine_s8(__rev0, __noswap_vqmovn_s16(__rev1)); | 59700 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 59956 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 59701 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 59957 | return __ret; | 59702 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 38); \ |
| 59958 | } | 59703 | }) |
| 59959 | #endif | 59704 | #endif |
| 59960 | | 59705 | |
| 59961 | __ai uint16_t vqmovuns_s32(int32_t __p0) { | | |
| 59962 | uint16_t __ret; | | |
| 59963 | __ret = (uint16_t) __builtin_neon_vqmovuns_s32(__p0); | | |
| 59964 | return __ret; | | |
| 59965 | } | | |
| 59966 | __ai uint32_t vqmovund_s64(int64_t __p0) { | | |
| 59967 | uint32_t __ret; | | |
| 59968 | __ret = (uint32_t) __builtin_neon_vqmovund_s64(__p0); | | |
| 59969 | return __ret; | | |
| 59970 | } | | |
| 59971 | __ai uint8_t vqmovunh_s16(int16_t __p0) { | | |
| 59972 | uint8_t __ret; | | |
| 59973 | __ret = (uint8_t) __builtin_neon_vqmovunh_s16(__p0); | | |
| 59974 | return __ret; | | |
| 59975 | } | | |
| 59976 | #ifdef __LITTLE_ENDIAN__ | 59706 | #ifdef __LITTLE_ENDIAN__ |
| 59977 | __ai uint16x8_t vqmovun_high_s32(uint16x4_t __p0, int32x4_t __p1) { | 59707 | #define vst3q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ |
| 59978 | uint16x8_t __ret; | 59708 | uint8x16x3_t __s1 = __p1; \ |
| 59979 | __ret = vcombine_u16((uint16x4_t)(__p0), vqmovun_s32(__p1)); | 59709 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 48); \ |
| 59980 | return __ret; | 59710 | }) |
| 59981 | } | | |
| 59982 | #else | 59711 | #else |
| 59983 | __ai uint16x8_t vqmovun_high_s32(uint16x4_t __p0, int32x4_t __p1) { | 59712 | #define vst3q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ |
| 59984 | uint16x8_t __ret; | 59713 | uint8x16x3_t __s1 = __p1; \ |
| 59985 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 59714 | uint8x16x3_t __rev1; \ |
| 59986 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 59715 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59987 | __ret = __noswap_vcombine_u16((uint16x4_t)(__rev0), __noswap_vqmovun_s32(__rev1)); | 59716 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59988 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 59717 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59989 | return __ret; | 59718 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 48); \ |
| 59990 | } | 59719 | }) |
| 59991 | #endif | 59720 | #endif |
| 59992 | | 59721 | |
| 59993 | #ifdef __LITTLE_ENDIAN__ | 59722 | #ifdef __LITTLE_ENDIAN__ |
| 59994 | __ai uint32x4_t vqmovun_high_s64(uint32x2_t __p0, int64x2_t __p1) { | 59723 | #define vst3q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 59995 | uint32x4_t __ret; | 59724 | uint64x2x3_t __s1 = __p1; \ |
| 59996 | __ret = vcombine_u32((uint32x2_t)(__p0), vqmovun_s64(__p1)); | 59725 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 51); \ |
| 59997 | return __ret; | 59726 | }) |
| 59998 | } | | |
| 59999 | #else | 59727 | #else |
| 60000 | __ai uint32x4_t vqmovun_high_s64(uint32x2_t __p0, int64x2_t __p1) { | 59728 | #define vst3q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 60001 | uint32x4_t __ret; | 59729 | uint64x2x3_t __s1 = __p1; \ |
| 60002 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 59730 | uint64x2x3_t __rev1; \ |
| 60003 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 59731 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 60004 | __ret = __noswap_vcombine_u32((uint32x2_t)(__rev0), __noswap_vqmovun_s64(__rev1)); | 59732 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 60005 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 59733 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 60006 | return __ret; | 59734 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 51); \ |
| 60007 | } | 59735 | }) |
| 60008 | #endif | 59736 | #endif |
| 60009 | | 59737 | |
| 60010 | #ifdef __LITTLE_ENDIAN__ | 59738 | #ifdef __LITTLE_ENDIAN__ |
| 60011 | __ai uint8x16_t vqmovun_high_s16(uint8x8_t __p0, int16x8_t __p1) { | 59739 | #define vst3q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ |
| 60012 | uint8x16_t __ret; | 59740 | int8x16x3_t __s1 = __p1; \ |
| 60013 | __ret = vcombine_u8((uint8x8_t)(__p0), vqmovun_s16(__p1)); | 59741 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 32); \ |
| 60014 | return __ret; | 59742 | }) |
| 60015 | } | | |
| 60016 | #else | 59743 | #else |
| 60017 | __ai uint8x16_t vqmovun_high_s16(uint8x8_t __p0, int16x8_t __p1) { | 59744 | #define vst3q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ |
| 60018 | uint8x16_t __ret; | 59745 | int8x16x3_t __s1 = __p1; \ |
| 60019 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 59746 | int8x16x3_t __rev1; \ |
| 60020 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 59747 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60021 | __ret = __noswap_vcombine_u8((uint8x8_t)(__rev0), __noswap_vqmovun_s16(__rev1)); | 59748 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60022 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 59749 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60023 | return __ret; | 59750 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 32); \ |
| 60024 | } | 59751 | }) |
| 60025 | #endif | 59752 | #endif |
| 60026 | | 59753 | |
| 60027 | #ifdef __LITTLE_ENDIAN__ | 59754 | #ifdef __LITTLE_ENDIAN__ |
| 60028 | __ai int64x2_t vqnegq_s64(int64x2_t __p0) { | 59755 | #define vst3q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 60029 | int64x2_t __ret; | 59756 | float64x2x3_t __s1 = __p1; \ |
| 60030 | __ret = (int64x2_t) __builtin_neon_vqnegq_v((int8x16_t)__p0, 35); | 59757 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 42); \ |
| 60031 | return __ret; | 59758 | }) |
| 60032 | } | | |
| 60033 | #else | 59759 | #else |
| 60034 | __ai int64x2_t vqnegq_s64(int64x2_t __p0) { | 59760 | #define vst3q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 60035 | int64x2_t __ret; | 59761 | float64x2x3_t __s1 = __p1; \ |
| 60036 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 59762 | float64x2x3_t __rev1; \ |
| 60037 | __ret = (int64x2_t) __builtin_neon_vqnegq_v((int8x16_t)__rev0, 35); | 59763 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 60038 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 59764 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 60039 | return __ret; | 59765 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 60040 | } | 59766 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 42); \ |
| 60041 | #endif | 59767 | }) |
| 60042 | | 59768 | #endif |
| 60043 | __ai int64x1_t vqneg_s64(int64x1_t __p0) { | 59769 | |
| 60044 | int64x1_t __ret; | | |
| 60045 | __ret = (int64x1_t) __builtin_neon_vqneg_v((int8x8_t)__p0, 3); | | |
| 60046 | return __ret; | | |
| 60047 | } | | |
| 60048 | __ai int8_t vqnegb_s8(int8_t __p0) { | | |
| 60049 | int8_t __ret; | | |
| 60050 | __ret = (int8_t) __builtin_neon_vqnegb_s8(__p0); | | |
| 60051 | return __ret; | | |
| 60052 | } | | |
| 60053 | __ai int32_t vqnegs_s32(int32_t __p0) { | | |
| 60054 | int32_t __ret; | | |
| 60055 | __ret = (int32_t) __builtin_neon_vqnegs_s32(__p0); | | |
| 60056 | return __ret; | | |
| 60057 | } | | |
| 60058 | __ai int64_t vqnegd_s64(int64_t __p0) { | | |
| 60059 | int64_t __ret; | | |
| 60060 | __ret = (int64_t) __builtin_neon_vqnegd_s64(__p0); | | |
| 60061 | return __ret; | | |
| 60062 | } | | |
| 60063 | __ai int16_t vqnegh_s16(int16_t __p0) { | | |
| 60064 | int16_t __ret; | | |
| 60065 | __ret = (int16_t) __builtin_neon_vqnegh_s16(__p0); | | |
| 60066 | return __ret; | | |
| 60067 | } | | |
| 60068 | __ai int32_t vqrdmulhs_s32(int32_t __p0, int32_t __p1) { | | |
| 60069 | int32_t __ret; | | |
| 60070 | __ret = (int32_t) __builtin_neon_vqrdmulhs_s32(__p0, __p1); | | |
| 60071 | return __ret; | | |
| 60072 | } | | |
| 60073 | __ai int16_t vqrdmulhh_s16(int16_t __p0, int16_t __p1) { | | |
| 60074 | int16_t __ret; | | |
| 60075 | __ret = (int16_t) __builtin_neon_vqrdmulhh_s16(__p0, __p1); | | |
| 60076 | return __ret; | | |
| 60077 | } | | |
| 60078 | #ifdef __LITTLE_ENDIAN__ | 59770 | #ifdef __LITTLE_ENDIAN__ |
| 60079 | #define vqrdmulhq_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 59771 | #define vst3q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 60080 | int32x4_t __ret; \ | 59772 | int64x2x3_t __s1 = __p1; \ |
| 60081 | int32x4_t __s0 = __p0; \ | 59773 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 35); \ |
| 60082 | int32x2_t __s1 = __p1; \ | | |
| 60083 | __ret = (int32x4_t) __builtin_neon_vqrdmulhq_lane_v((int8x16_t)__s0, (int8x8_t)__s1, __p2, 2); \ | | |
| 60084 | __ret; \ | | |
| 60085 | }) | 59774 | }) |
| 60086 | #else | 59775 | #else |
| 60087 | #define vqrdmulhq_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 59776 | #define vst3q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 60088 | int32x4_t __ret; \ | 59777 | int64x2x3_t __s1 = __p1; \ |
| 60089 | int32x4_t __s0 = __p0; \ | 59778 | int64x2x3_t __rev1; \ |
| 60090 | int32x2_t __s1 = __p1; \ | 59779 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 60091 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 59780 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 60092 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 59781 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 60093 | __ret = (int32x4_t) __builtin_neon_vqrdmulhq_lane_v((int8x16_t)__rev0, (int8x8_t)__rev1, __p2, 2); \ | 59782 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 35); \ |
| 60094 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | | |
| 60095 | __ret; \ | | |
| 60096 | }) | 59783 | }) |
| 60097 | #endif | 59784 | #endif |
| 60098 | | 59785 | |
| | 59786 | #define vst3_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| | 59787 | uint64x1x3_t __s1 = __p1; \ |
| | 59788 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 19); \ |
| | 59789 | }) |
| | 59790 | #define vst3_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| | 59791 | float64x1x3_t __s1 = __p1; \ |
| | 59792 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 10); \ |
| | 59793 | }) |
| | 59794 | #define vst3_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| | 59795 | int64x1x3_t __s1 = __p1; \ |
| | 59796 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 3); \ |
| | 59797 | }) |
| | 59798 | #define vst4_p64(__p0, __p1) __extension__ ({ \ |
| | 59799 | poly64x1x4_t __s1 = __p1; \ |
| | 59800 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 6); \ |
| | 59801 | }) |
| 60099 | #ifdef __LITTLE_ENDIAN__ | 59802 | #ifdef __LITTLE_ENDIAN__ |
| 60100 | #define vqrdmulhq_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 59803 | #define vst4q_p64(__p0, __p1) __extension__ ({ \ |
| 60101 | int16x8_t __ret; \ | 59804 | poly64x2x4_t __s1 = __p1; \ |
| 60102 | int16x8_t __s0 = __p0; \ | 59805 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 38); \ |
| 60103 | int16x4_t __s1 = __p1; \ | | |
| 60104 | __ret = (int16x8_t) __builtin_neon_vqrdmulhq_lane_v((int8x16_t)__s0, (int8x8_t)__s1, __p2, 1); \ | | |
| 60105 | __ret; \ | | |
| 60106 | }) | 59806 | }) |
| 60107 | #else | 59807 | #else |
| 60108 | #define vqrdmulhq_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 59808 | #define vst4q_p64(__p0, __p1) __extension__ ({ \ |
| 60109 | int16x8_t __ret; \ | 59809 | poly64x2x4_t __s1 = __p1; \ |
| 60110 | int16x8_t __s0 = __p0; \ | 59810 | poly64x2x4_t __rev1; \ |
| 60111 | int16x4_t __s1 = __p1; \ | 59811 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 60112 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59812 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 60113 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 59813 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 60114 | __ret = (int16x8_t) __builtin_neon_vqrdmulhq_lane_v((int8x16_t)__rev0, (int8x8_t)__rev1, __p2, 1); \ | 59814 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 60115 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59815 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 38); \ |
| 60116 | __ret; \ | | |
| 60117 | }) | 59816 | }) |
| 60118 | #endif | 59817 | #endif |
| 60119 | | 59818 | |
| 60120 | #ifdef __LITTLE_ENDIAN__ | 59819 | #ifdef __LITTLE_ENDIAN__ |
| 60121 | #define vqrdmulh_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 59820 | #define vst4q_u64(__p0, __p1) __extension__ ({ \ |
| 60122 | int32x2_t __ret; \ | 59821 | uint64x2x4_t __s1 = __p1; \ |
| 60123 | int32x2_t __s0 = __p0; \ | 59822 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 51); \ |
| 60124 | int32x2_t __s1 = __p1; \ | | |
| 60125 | __ret = (int32x2_t) __builtin_neon_vqrdmulh_lane_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 2); \ | | |
| 60126 | __ret; \ | | |
| 60127 | }) | 59823 | }) |
| 60128 | #else | 59824 | #else |
| 60129 | #define vqrdmulh_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 59825 | #define vst4q_u64(__p0, __p1) __extension__ ({ \ |
| 60130 | int32x2_t __ret; \ | 59826 | uint64x2x4_t __s1 = __p1; \ |
| 60131 | int32x2_t __s0 = __p0; \ | 59827 | uint64x2x4_t __rev1; \ |
| 60132 | int32x2_t __s1 = __p1; \ | 59828 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 60133 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 59829 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 60134 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 59830 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 60135 | __ret = (int32x2_t) __builtin_neon_vqrdmulh_lane_v((int8x8_t)__rev0, (int8x8_t)__rev1, __p2, 2); \ | 59831 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 60136 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 59832 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 51); \ |
| 60137 | __ret; \ | | |
| 60138 | }) | 59833 | }) |
| 60139 | #endif | 59834 | #endif |
| 60140 | | 59835 | |
| 60141 | #ifdef __LITTLE_ENDIAN__ | 59836 | #ifdef __LITTLE_ENDIAN__ |
| 60142 | #define vqrdmulh_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 59837 | #define vst4q_f64(__p0, __p1) __extension__ ({ \ |
| 60143 | int16x4_t __ret; \ | 59838 | float64x2x4_t __s1 = __p1; \ |
| 60144 | int16x4_t __s0 = __p0; \ | 59839 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 42); \ |
| 60145 | int16x4_t __s1 = __p1; \ | | |
| 60146 | __ret = (int16x4_t) __builtin_neon_vqrdmulh_lane_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 1); \ | | |
| 60147 | __ret; \ | | |
| 60148 | }) | 59840 | }) |
| 60149 | #else | 59841 | #else |
| 60150 | #define vqrdmulh_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 59842 | #define vst4q_f64(__p0, __p1) __extension__ ({ \ |
| 60151 | int16x4_t __ret; \ | 59843 | float64x2x4_t __s1 = __p1; \ |
| 60152 | int16x4_t __s0 = __p0; \ | 59844 | float64x2x4_t __rev1; \ |
| 60153 | int16x4_t __s1 = __p1; \ | 59845 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 60154 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 59846 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 60155 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 59847 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 60156 | __ret = (int16x4_t) __builtin_neon_vqrdmulh_lane_v((int8x8_t)__rev0, (int8x8_t)__rev1, __p2, 1); \ | 59848 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 60157 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 59849 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 42); \ |
| 60158 | __ret; \ | | |
| 60159 | }) | 59850 | }) |
| 60160 | #endif | 59851 | #endif |
| 60161 | | 59852 | |
| 60162 | #ifdef __LITTLE_ENDIAN__ | 59853 | #ifdef __LITTLE_ENDIAN__ |
| 60163 | #define vqrdmulhs_lane_s32(__p0_763, __p1_763, __p2_763) __extension__ ({ \ | 59854 | #define vst4q_s64(__p0, __p1) __extension__ ({ \ |
| 60164 | int32_t __ret_763; \ | 59855 | int64x2x4_t __s1 = __p1; \ |
| 60165 | int32_t __s0_763 = __p0_763; \ | 59856 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 35); \ |
| 60166 | int32x2_t __s1_763 = __p1_763; \ | | |
| 60167 | __ret_763 = vqrdmulhs_s32(__s0_763, vget_lane_s32(__s1_763, __p2_763)); \ | | |
| 60168 | __ret_763; \ | | |
| 60169 | }) | 59857 | }) |
| 60170 | #else | 59858 | #else |
| 60171 | #define vqrdmulhs_lane_s32(__p0_764, __p1_764, __p2_764) __extension__ ({ \ | 59859 | #define vst4q_s64(__p0, __p1) __extension__ ({ \ |
| 60172 | int32_t __ret_764; \ | 59860 | int64x2x4_t __s1 = __p1; \ |
| 60173 | int32_t __s0_764 = __p0_764; \ | 59861 | int64x2x4_t __rev1; \ |
| 60174 | int32x2_t __s1_764 = __p1_764; \ | 59862 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 60175 | int32x2_t __rev1_764; __rev1_764 = __builtin_shufflevector(__s1_764, __s1_764, 1, 0); \ | 59863 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 60176 | __ret_764 = vqrdmulhs_s32(__s0_764, __noswap_vget_lane_s32(__rev1_764, __p2_764)); \ | 59864 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 60177 | __ret_764; \ | 59865 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| | 59866 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 35); \ |
| 60178 | }) | 59867 | }) |
| 60179 | #endif | 59868 | #endif |
| 60180 | | 59869 | |
| | 59870 | #define vst4_f64(__p0, __p1) __extension__ ({ \ |
| | 59871 | float64x1x4_t __s1 = __p1; \ |
| | 59872 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 10); \ |
| | 59873 | }) |
| | 59874 | #define vst4_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| | 59875 | poly64x1x4_t __s1 = __p1; \ |
| | 59876 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 6); \ |
| | 59877 | }) |
| 60181 | #ifdef __LITTLE_ENDIAN__ | 59878 | #ifdef __LITTLE_ENDIAN__ |
| 60182 | #define vqrdmulhh_lane_s16(__p0_765, __p1_765, __p2_765) __extension__ ({ \ | 59879 | #define vst4q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 60183 | int16_t __ret_765; \ | 59880 | poly8x16x4_t __s1 = __p1; \ |
| 60184 | int16_t __s0_765 = __p0_765; \ | 59881 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 36); \ |
| 60185 | int16x4_t __s1_765 = __p1_765; \ | | |
| 60186 | __ret_765 = vqrdmulhh_s16(__s0_765, vget_lane_s16(__s1_765, __p2_765)); \ | | |
| 60187 | __ret_765; \ | | |
| 60188 | }) | 59882 | }) |
| 60189 | #else | 59883 | #else |
| 60190 | #define vqrdmulhh_lane_s16(__p0_766, __p1_766, __p2_766) __extension__ ({ \ | 59884 | #define vst4q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 60191 | int16_t __ret_766; \ | 59885 | poly8x16x4_t __s1 = __p1; \ |
| 60192 | int16_t __s0_766 = __p0_766; \ | 59886 | poly8x16x4_t __rev1; \ |
| 60193 | int16x4_t __s1_766 = __p1_766; \ | 59887 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60194 | int16x4_t __rev1_766; __rev1_766 = __builtin_shufflevector(__s1_766, __s1_766, 3, 2, 1, 0); \ | 59888 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60195 | __ret_766 = vqrdmulhh_s16(__s0_766, __noswap_vget_lane_s16(__rev1_766, __p2_766)); \ | 59889 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60196 | __ret_766; \ | 59890 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 59891 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 36); \ |
| 60197 | }) | 59892 | }) |
| 60198 | #endif | 59893 | #endif |
| 60199 | | 59894 | |
| 60200 | #ifdef __LITTLE_ENDIAN__ | 59895 | #ifdef __LITTLE_ENDIAN__ |
| 60201 | #define vqrdmulhs_laneq_s32(__p0_767, __p1_767, __p2_767) __extension__ ({ \ | 59896 | #define vst4q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 60202 | int32_t __ret_767; \ | 59897 | poly64x2x4_t __s1 = __p1; \ |
| 60203 | int32_t __s0_767 = __p0_767; \ | 59898 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 38); \ |
| 60204 | int32x4_t __s1_767 = __p1_767; \ | | |
| 60205 | __ret_767 = vqrdmulhs_s32(__s0_767, vgetq_lane_s32(__s1_767, __p2_767)); \ | | |
| 60206 | __ret_767; \ | | |
| 60207 | }) | 59899 | }) |
| 60208 | #else | 59900 | #else |
| 60209 | #define vqrdmulhs_laneq_s32(__p0_768, __p1_768, __p2_768) __extension__ ({ \ | 59901 | #define vst4q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 60210 | int32_t __ret_768; \ | 59902 | poly64x2x4_t __s1 = __p1; \ |
| 60211 | int32_t __s0_768 = __p0_768; \ | 59903 | poly64x2x4_t __rev1; \ |
| 60212 | int32x4_t __s1_768 = __p1_768; \ | 59904 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 60213 | int32x4_t __rev1_768; __rev1_768 = __builtin_shufflevector(__s1_768, __s1_768, 3, 2, 1, 0); \ | 59905 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 60214 | __ret_768 = vqrdmulhs_s32(__s0_768, __noswap_vgetq_lane_s32(__rev1_768, __p2_768)); \ | 59906 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 60215 | __ret_768; \ | 59907 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| | 59908 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 38); \ |
| 60216 | }) | 59909 | }) |
| 60217 | #endif | 59910 | #endif |
| 60218 | | 59911 | |
| 60219 | #ifdef __LITTLE_ENDIAN__ | 59912 | #ifdef __LITTLE_ENDIAN__ |
| 60220 | #define vqrdmulhh_laneq_s16(__p0_769, __p1_769, __p2_769) __extension__ ({ \ | 59913 | #define vst4q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ |
| 60221 | int16_t __ret_769; \ | 59914 | uint8x16x4_t __s1 = __p1; \ |
| 60222 | int16_t __s0_769 = __p0_769; \ | 59915 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 48); \ |
| 60223 | int16x8_t __s1_769 = __p1_769; \ | | |
| 60224 | __ret_769 = vqrdmulhh_s16(__s0_769, vgetq_lane_s16(__s1_769, __p2_769)); \ | | |
| 60225 | __ret_769; \ | | |
| 60226 | }) | 59916 | }) |
| 60227 | #else | 59917 | #else |
| 60228 | #define vqrdmulhh_laneq_s16(__p0_770, __p1_770, __p2_770) __extension__ ({ \ | 59918 | #define vst4q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ |
| 60229 | int16_t __ret_770; \ | 59919 | uint8x16x4_t __s1 = __p1; \ |
| 60230 | int16_t __s0_770 = __p0_770; \ | 59920 | uint8x16x4_t __rev1; \ |
| 60231 | int16x8_t __s1_770 = __p1_770; \ | 59921 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60232 | int16x8_t __rev1_770; __rev1_770 = __builtin_shufflevector(__s1_770, __s1_770, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59922 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60233 | __ret_770 = vqrdmulhh_s16(__s0_770, __noswap_vgetq_lane_s16(__rev1_770, __p2_770)); \ | 59923 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60234 | __ret_770; \ | 59924 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 59925 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 48); \ |
| 60235 | }) | 59926 | }) |
| 60236 | #endif | 59927 | #endif |
| 60237 | | 59928 | |
| 60238 | #ifdef __LITTLE_ENDIAN__ | 59929 | #ifdef __LITTLE_ENDIAN__ |
| 60239 | #define vqrdmulhq_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ | 59930 | #define vst4q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 60240 | int32x4_t __ret; \ | 59931 | uint64x2x4_t __s1 = __p1; \ |
| 60241 | int32x4_t __s0 = __p0; \ | 59932 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 51); \ |
| 60242 | int32x4_t __s1 = __p1; \ | | |
| 60243 | __ret = (int32x4_t) __builtin_neon_vqrdmulhq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 34); \ | | |
| 60244 | __ret; \ | | |
| 60245 | }) | 59933 | }) |
| 60246 | #else | 59934 | #else |
| 60247 | #define vqrdmulhq_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ | 59935 | #define vst4q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 60248 | int32x4_t __ret; \ | 59936 | uint64x2x4_t __s1 = __p1; \ |
| 60249 | int32x4_t __s0 = __p0; \ | 59937 | uint64x2x4_t __rev1; \ |
| 60250 | int32x4_t __s1 = __p1; \ | 59938 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 60251 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 59939 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 60252 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 59940 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 60253 | __ret = (int32x4_t) __builtin_neon_vqrdmulhq_laneq_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 34); \ | 59941 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 60254 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 59942 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 51); \ |
| 60255 | __ret; \ | | |
| 60256 | }) | 59943 | }) |
| 60257 | #endif | 59944 | #endif |
| 60258 | | 59945 | |
| 60259 | #ifdef __LITTLE_ENDIAN__ | 59946 | #ifdef __LITTLE_ENDIAN__ |
| 60260 | #define vqrdmulhq_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ | 59947 | #define vst4q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ |
| 60261 | int16x8_t __ret; \ | 59948 | int8x16x4_t __s1 = __p1; \ |
| 60262 | int16x8_t __s0 = __p0; \ | 59949 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 32); \ |
| 60263 | int16x8_t __s1 = __p1; \ | | |
| 60264 | __ret = (int16x8_t) __builtin_neon_vqrdmulhq_laneq_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 33); \ | | |
| 60265 | __ret; \ | | |
| 60266 | }) | 59950 | }) |
| 60267 | #else | 59951 | #else |
| 60268 | #define vqrdmulhq_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ | 59952 | #define vst4q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ |
| 60269 | int16x8_t __ret; \ | 59953 | int8x16x4_t __s1 = __p1; \ |
| 60270 | int16x8_t __s0 = __p0; \ | 59954 | int8x16x4_t __rev1; \ |
| 60271 | int16x8_t __s1 = __p1; \ | 59955 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60272 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59956 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60273 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59957 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60274 | __ret = (int16x8_t) __builtin_neon_vqrdmulhq_laneq_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 33); \ | 59958 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60275 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59959 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 32); \ |
| 60276 | __ret; \ | | |
| 60277 | }) | 59960 | }) |
| 60278 | #endif | 59961 | #endif |
| 60279 | | 59962 | |
| 60280 | #ifdef __LITTLE_ENDIAN__ | 59963 | #ifdef __LITTLE_ENDIAN__ |
| 60281 | #define vqrdmulh_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ | 59964 | #define vst4q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 60282 | int32x2_t __ret; \ | 59965 | float64x2x4_t __s1 = __p1; \ |
| 60283 | int32x2_t __s0 = __p0; \ | 59966 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 42); \ |
| 60284 | int32x4_t __s1 = __p1; \ | | |
| 60285 | __ret = (int32x2_t) __builtin_neon_vqrdmulh_laneq_v((int8x8_t)__s0, (int8x16_t)__s1, __p2, 2); \ | | |
| 60286 | __ret; \ | | |
| 60287 | }) | 59967 | }) |
| 60288 | #else | 59968 | #else |
| 60289 | #define vqrdmulh_laneq_s32(__p0, __p1, __p2) __extension__ ({ \ | 59969 | #define vst4q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 60290 | int32x2_t __ret; \ | 59970 | float64x2x4_t __s1 = __p1; \ |
| 60291 | int32x2_t __s0 = __p0; \ | 59971 | float64x2x4_t __rev1; \ |
| 60292 | int32x4_t __s1 = __p1; \ | 59972 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 60293 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 59973 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 60294 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 59974 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 60295 | __ret = (int32x2_t) __builtin_neon_vqrdmulh_laneq_v((int8x8_t)__rev0, (int8x16_t)__rev1, __p2, 2); \ | 59975 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 60296 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 59976 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 42); \ |
| 60297 | __ret; \ | | |
| 60298 | }) | 59977 | }) |
| 60299 | #endif | 59978 | #endif |
| 60300 | | 59979 | |
| 60301 | #ifdef __LITTLE_ENDIAN__ | 59980 | #ifdef __LITTLE_ENDIAN__ |
| 60302 | #define vqrdmulh_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ | 59981 | #define vst4q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 60303 | int16x4_t __ret; \ | 59982 | int64x2x4_t __s1 = __p1; \ |
| 60304 | int16x4_t __s0 = __p0; \ | 59983 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 35); \ |
| 60305 | int16x8_t __s1 = __p1; \ | | |
| 60306 | __ret = (int16x4_t) __builtin_neon_vqrdmulh_laneq_v((int8x8_t)__s0, (int8x16_t)__s1, __p2, 1); \ | | |
| 60307 | __ret; \ | | |
| 60308 | }) | 59984 | }) |
| 60309 | #else | 59985 | #else |
| 60310 | #define vqrdmulh_laneq_s16(__p0, __p1, __p2) __extension__ ({ \ | 59986 | #define vst4q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 60311 | int16x4_t __ret; \ | 59987 | int64x2x4_t __s1 = __p1; \ |
| 60312 | int16x4_t __s0 = __p0; \ | 59988 | int64x2x4_t __rev1; \ |
| 60313 | int16x8_t __s1 = __p1; \ | 59989 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 60314 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 59990 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 60315 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 59991 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 60316 | __ret = (int16x4_t) __builtin_neon_vqrdmulh_laneq_v((int8x8_t)__rev0, (int8x16_t)__rev1, __p2, 1); \ | 59992 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 60317 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 59993 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 35); \ |
| 60318 | __ret; \ | | |
| 60319 | }) | 59994 | }) |
| 60320 | #endif | 59995 | #endif |
| 60321 | | 59996 | |
| 60322 | __ai uint8_t vqrshlb_u8(uint8_t __p0, int8_t __p1) { | 59997 | #define vst4_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 60323 | uint8_t __ret; | 59998 | uint64x1x4_t __s1 = __p1; \ |
| 60324 | __ret = (uint8_t) __builtin_neon_vqrshlb_u8(__p0, __p1); | 59999 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 19); \ |
| | 60000 | }) |
| | 60001 | #define vst4_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| | 60002 | float64x1x4_t __s1 = __p1; \ |
| | 60003 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 10); \ |
| | 60004 | }) |
| | 60005 | #define vst4_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| | 60006 | int64x1x4_t __s1 = __p1; \ |
| | 60007 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 3); \ |
| | 60008 | }) |
| | 60009 | #define vstrq_p128(__p0, __p1) __extension__ ({ \ |
| | 60010 | poly128_t __s1 = __p1; \ |
| | 60011 | __builtin_neon_vstrq_p128(__p0, __s1); \ |
| | 60012 | }) |
| | 60013 | __ai uint64_t vsubd_u64(uint64_t __p0, uint64_t __p1) { |
| | 60014 | uint64_t __ret; |
| | 60015 | __ret = (uint64_t) __builtin_neon_vsubd_u64(__p0, __p1); |
| 60325 | return __ret; | 60016 | return __ret; |
| 60326 | } | 60017 | } |
| 60327 | __ai uint32_t vqrshls_u32(uint32_t __p0, int32_t __p1) { | 60018 | __ai int64_t vsubd_s64(int64_t __p0, int64_t __p1) { |
| 60328 | uint32_t __ret; | 60019 | int64_t __ret; |
| 60329 | __ret = (uint32_t) __builtin_neon_vqrshls_u32(__p0, __p1); | 60020 | __ret = (int64_t) __builtin_neon_vsubd_s64(__p0, __p1); |
| 60330 | return __ret; | 60021 | return __ret; |
| 60331 | } | 60022 | } |
| 60332 | __ai uint64_t vqrshld_u64(uint64_t __p0, int64_t __p1) { | 60023 | #ifdef __LITTLE_ENDIAN__ |
| 60333 | uint64_t __ret; | 60024 | __ai float64x2_t vsubq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 60334 | __ret = (uint64_t) __builtin_neon_vqrshld_u64(__p0, __p1); | 60025 | float64x2_t __ret; |
| | 60026 | __ret = __p0 - __p1; |
| 60335 | return __ret; | 60027 | return __ret; |
| 60336 | } | 60028 | } |
| 60337 | __ai uint16_t vqrshlh_u16(uint16_t __p0, int16_t __p1) { | 60029 | #else |
| 60338 | uint16_t __ret; | 60030 | __ai float64x2_t vsubq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 60339 | __ret = (uint16_t) __builtin_neon_vqrshlh_u16(__p0, __p1); | 60031 | float64x2_t __ret; |
| | 60032 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 60033 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 60034 | __ret = __rev0 - __rev1; |
| | 60035 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 60340 | return __ret; | 60036 | return __ret; |
| 60341 | } | 60037 | } |
| 60342 | __ai int8_t vqrshlb_s8(int8_t __p0, int8_t __p1) { | 60038 | #endif |
| 60343 | int8_t __ret; | 60039 | |
| 60344 | __ret = (int8_t) __builtin_neon_vqrshlb_s8(__p0, __p1); | 60040 | __ai float64x1_t vsub_f64(float64x1_t __p0, float64x1_t __p1) { |
| | 60041 | float64x1_t __ret; |
| | 60042 | __ret = __p0 - __p1; |
| 60345 | return __ret; | 60043 | return __ret; |
| 60346 | } | 60044 | } |
| 60347 | __ai int32_t vqrshls_s32(int32_t __p0, int32_t __p1) { | 60045 | #ifdef __LITTLE_ENDIAN__ |
| 60348 | int32_t __ret; | 60046 | __ai uint16x8_t vsubhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 60349 | __ret = (int32_t) __builtin_neon_vqrshls_s32(__p0, __p1); | 60047 | uint16x8_t __ret; |
| | 60048 | __ret = vcombine_u16(__p0, vsubhn_u32(__p1, __p2)); |
| 60350 | return __ret; | 60049 | return __ret; |
| 60351 | } | 60050 | } |
| 60352 | __ai int64_t vqrshld_s64(int64_t __p0, int64_t __p1) { | 60051 | #else |
| 60353 | int64_t __ret; | 60052 | __ai uint16x8_t vsubhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 60354 | __ret = (int64_t) __builtin_neon_vqrshld_s64(__p0, __p1); | 60053 | uint16x8_t __ret; |
| | 60054 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 60055 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 60056 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 60057 | __ret = __noswap_vcombine_u16(__rev0, __noswap_vsubhn_u32(__rev1, __rev2)); |
| | 60058 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60355 | return __ret; | 60059 | return __ret; |
| 60356 | } | 60060 | } |
| 60357 | __ai int16_t vqrshlh_s16(int16_t __p0, int16_t __p1) { | 60061 | #endif |
| 60358 | int16_t __ret; | 60062 | |
| 60359 | __ret = (int16_t) __builtin_neon_vqrshlh_s16(__p0, __p1); | 60063 | #ifdef __LITTLE_ENDIAN__ |
| | 60064 | __ai uint32x4_t vsubhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| | 60065 | uint32x4_t __ret; |
| | 60066 | __ret = vcombine_u32(__p0, vsubhn_u64(__p1, __p2)); |
| 60360 | return __ret; | 60067 | return __ret; |
| 60361 | } | 60068 | } |
| 60362 | #ifdef __LITTLE_ENDIAN__ | | |
| 60363 | #define vqrshrn_high_n_u32(__p0_771, __p1_771, __p2_771) __extension__ ({ \ | | |
| 60364 | uint16x8_t __ret_771; \ | | |
| 60365 | uint16x4_t __s0_771 = __p0_771; \ | | |
| 60366 | uint32x4_t __s1_771 = __p1_771; \ | | |
| 60367 | __ret_771 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_771), (uint16x4_t)(vqrshrn_n_u32(__s1_771, __p2_771)))); \ | | |
| 60368 | __ret_771; \ | | |
| 60369 | }) | | |
| 60370 | #else | 60069 | #else |
| 60371 | #define vqrshrn_high_n_u32(__p0_772, __p1_772, __p2_772) __extension__ ({ \ | 60070 | __ai uint32x4_t vsubhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 60372 | uint16x8_t __ret_772; \ | 60071 | uint32x4_t __ret; |
| 60373 | uint16x4_t __s0_772 = __p0_772; \ | 60072 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60374 | uint32x4_t __s1_772 = __p1_772; \ | 60073 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 60375 | uint16x4_t __rev0_772; __rev0_772 = __builtin_shufflevector(__s0_772, __s0_772, 3, 2, 1, 0); \ | 60074 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 60376 | uint32x4_t __rev1_772; __rev1_772 = __builtin_shufflevector(__s1_772, __s1_772, 3, 2, 1, 0); \ | 60075 | __ret = __noswap_vcombine_u32(__rev0, __noswap_vsubhn_u64(__rev1, __rev2)); |
| 60377 | __ret_772 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_772), (uint16x4_t)(__noswap_vqrshrn_n_u32(__rev1_772, __p2_772)))); \ | 60076 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 60378 | __ret_772 = __builtin_shufflevector(__ret_772, __ret_772, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60077 | return __ret; |
| 60379 | __ret_772; \ | 60078 | } |
| 60380 | }) | | |
| 60381 | #endif | 60079 | #endif |
| 60382 | | 60080 | |
| 60383 | #ifdef __LITTLE_ENDIAN__ | 60081 | #ifdef __LITTLE_ENDIAN__ |
| 60384 | #define vqrshrn_high_n_u64(__p0_773, __p1_773, __p2_773) __extension__ ({ \ | 60082 | __ai uint8x16_t vsubhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { |
| 60385 | uint32x4_t __ret_773; \ | 60083 | uint8x16_t __ret; |
| 60386 | uint32x2_t __s0_773 = __p0_773; \ | 60084 | __ret = vcombine_u8(__p0, vsubhn_u16(__p1, __p2)); |
| 60387 | uint64x2_t __s1_773 = __p1_773; \ | 60085 | return __ret; |
| 60388 | __ret_773 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_773), (uint32x2_t)(vqrshrn_n_u64(__s1_773, __p2_773)))); \ | 60086 | } |
| 60389 | __ret_773; \ | | |
| 60390 | }) | | |
| 60391 | #else | 60087 | #else |
| 60392 | #define vqrshrn_high_n_u64(__p0_774, __p1_774, __p2_774) __extension__ ({ \ | 60088 | __ai uint8x16_t vsubhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { |
| 60393 | uint32x4_t __ret_774; \ | 60089 | uint8x16_t __ret; |
| 60394 | uint32x2_t __s0_774 = __p0_774; \ | 60090 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60395 | uint64x2_t __s1_774 = __p1_774; \ | 60091 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60396 | uint32x2_t __rev0_774; __rev0_774 = __builtin_shufflevector(__s0_774, __s0_774, 1, 0); \ | 60092 | uint16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60397 | uint64x2_t __rev1_774; __rev1_774 = __builtin_shufflevector(__s1_774, __s1_774, 1, 0); \ | 60093 | __ret = __noswap_vcombine_u8(__rev0, __noswap_vsubhn_u16(__rev1, __rev2)); |
| 60398 | __ret_774 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_774), (uint32x2_t)(__noswap_vqrshrn_n_u64(__rev1_774, __p2_774)))); \ | 60094 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60399 | __ret_774 = __builtin_shufflevector(__ret_774, __ret_774, 3, 2, 1, 0); \ | 60095 | return __ret; |
| 60400 | __ret_774; \ | 60096 | } |
| 60401 | }) | | |
| 60402 | #endif | 60097 | #endif |
| 60403 | | 60098 | |
| 60404 | #ifdef __LITTLE_ENDIAN__ | 60099 | #ifdef __LITTLE_ENDIAN__ |
| 60405 | #define vqrshrn_high_n_u16(__p0_775, __p1_775, __p2_775) __extension__ ({ \ | 60100 | __ai int16x8_t vsubhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 60406 | uint8x16_t __ret_775; \ | 60101 | int16x8_t __ret; |
| 60407 | uint8x8_t __s0_775 = __p0_775; \ | 60102 | __ret = vcombine_s16(__p0, vsubhn_s32(__p1, __p2)); |
| 60408 | uint16x8_t __s1_775 = __p1_775; \ | 60103 | return __ret; |
| 60409 | __ret_775 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_775), (uint8x8_t)(vqrshrn_n_u16(__s1_775, __p2_775)))); \ | 60104 | } |
| 60410 | __ret_775; \ | | |
| 60411 | }) | | |
| 60412 | #else | 60105 | #else |
| 60413 | #define vqrshrn_high_n_u16(__p0_776, __p1_776, __p2_776) __extension__ ({ \ | 60106 | __ai int16x8_t vsubhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 60414 | uint8x16_t __ret_776; \ | 60107 | int16x8_t __ret; |
| 60415 | uint8x8_t __s0_776 = __p0_776; \ | 60108 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 60416 | uint16x8_t __s1_776 = __p1_776; \ | 60109 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 60417 | uint8x8_t __rev0_776; __rev0_776 = __builtin_shufflevector(__s0_776, __s0_776, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60110 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 60418 | uint16x8_t __rev1_776; __rev1_776 = __builtin_shufflevector(__s1_776, __s1_776, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60111 | __ret = __noswap_vcombine_s16(__rev0, __noswap_vsubhn_s32(__rev1, __rev2)); |
| 60419 | __ret_776 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_776), (uint8x8_t)(__noswap_vqrshrn_n_u16(__rev1_776, __p2_776)))); \ | 60112 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60420 | __ret_776 = __builtin_shufflevector(__ret_776, __ret_776, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60113 | return __ret; |
| 60421 | __ret_776; \ | 60114 | } |
| 60422 | }) | | |
| 60423 | #endif | 60115 | #endif |
| 60424 | | 60116 | |
| 60425 | #ifdef __LITTLE_ENDIAN__ | 60117 | #ifdef __LITTLE_ENDIAN__ |
| 60426 | #define vqrshrn_high_n_s32(__p0_777, __p1_777, __p2_777) __extension__ ({ \ | 60118 | __ai int32x4_t vsubhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { |
| 60427 | int16x8_t __ret_777; \ | 60119 | int32x4_t __ret; |
| 60428 | int16x4_t __s0_777 = __p0_777; \ | 60120 | __ret = vcombine_s32(__p0, vsubhn_s64(__p1, __p2)); |
| 60429 | int32x4_t __s1_777 = __p1_777; \ | 60121 | return __ret; |
| 60430 | __ret_777 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_777), (int16x4_t)(vqrshrn_n_s32(__s1_777, __p2_777)))); \ | 60122 | } |
| 60431 | __ret_777; \ | | |
| 60432 | }) | | |
| 60433 | #else | 60123 | #else |
| 60434 | #define vqrshrn_high_n_s32(__p0_778, __p1_778, __p2_778) __extension__ ({ \ | 60124 | __ai int32x4_t vsubhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { |
| 60435 | int16x8_t __ret_778; \ | 60125 | int32x4_t __ret; |
| 60436 | int16x4_t __s0_778 = __p0_778; \ | 60126 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60437 | int32x4_t __s1_778 = __p1_778; \ | 60127 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 60438 | int16x4_t __rev0_778; __rev0_778 = __builtin_shufflevector(__s0_778, __s0_778, 3, 2, 1, 0); \ | 60128 | int64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 60439 | int32x4_t __rev1_778; __rev1_778 = __builtin_shufflevector(__s1_778, __s1_778, 3, 2, 1, 0); \ | 60129 | __ret = __noswap_vcombine_s32(__rev0, __noswap_vsubhn_s64(__rev1, __rev2)); |
| 60440 | __ret_778 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_778), (int16x4_t)(__noswap_vqrshrn_n_s32(__rev1_778, __p2_778)))); \ | 60130 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 60441 | __ret_778 = __builtin_shufflevector(__ret_778, __ret_778, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60131 | return __ret; |
| 60442 | __ret_778; \ | 60132 | } |
| 60443 | }) | | |
| 60444 | #endif | 60133 | #endif |
| 60445 | | 60134 | |
| 60446 | #ifdef __LITTLE_ENDIAN__ | 60135 | #ifdef __LITTLE_ENDIAN__ |
| 60447 | #define vqrshrn_high_n_s64(__p0_779, __p1_779, __p2_779) __extension__ ({ \ | 60136 | __ai int8x16_t vsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 60448 | int32x4_t __ret_779; \ | 60137 | int8x16_t __ret; |
| 60449 | int32x2_t __s0_779 = __p0_779; \ | 60138 | __ret = vcombine_s8(__p0, vsubhn_s16(__p1, __p2)); |
| 60450 | int64x2_t __s1_779 = __p1_779; \ | 60139 | return __ret; |
| 60451 | __ret_779 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_779), (int32x2_t)(vqrshrn_n_s64(__s1_779, __p2_779)))); \ | 60140 | } |
| 60452 | __ret_779; \ | | |
| 60453 | }) | | |
| 60454 | #else | 60141 | #else |
| 60455 | #define vqrshrn_high_n_s64(__p0_780, __p1_780, __p2_780) __extension__ ({ \ | 60142 | __ai int8x16_t vsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 60456 | int32x4_t __ret_780; \ | 60143 | int8x16_t __ret; |
| 60457 | int32x2_t __s0_780 = __p0_780; \ | 60144 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60458 | int64x2_t __s1_780 = __p1_780; \ | 60145 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60459 | int32x2_t __rev0_780; __rev0_780 = __builtin_shufflevector(__s0_780, __s0_780, 1, 0); \ | 60146 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60460 | int64x2_t __rev1_780; __rev1_780 = __builtin_shufflevector(__s1_780, __s1_780, 1, 0); \ | 60147 | __ret = __noswap_vcombine_s8(__rev0, __noswap_vsubhn_s16(__rev1, __rev2)); |
| 60461 | __ret_780 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_780), (int32x2_t)(__noswap_vqrshrn_n_s64(__rev1_780, __p2_780)))); \ | 60148 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60462 | __ret_780 = __builtin_shufflevector(__ret_780, __ret_780, 3, 2, 1, 0); \ | 60149 | return __ret; |
| 60463 | __ret_780; \ | 60150 | } |
| 60464 | }) | | |
| 60465 | #endif | 60151 | #endif |
| 60466 | | 60152 | |
| 60467 | #ifdef __LITTLE_ENDIAN__ | 60153 | #ifdef __LITTLE_ENDIAN__ |
| 60468 | #define vqrshrn_high_n_s16(__p0_781, __p1_781, __p2_781) __extension__ ({ \ | 60154 | __ai uint16x8_t vsubl_high_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 60469 | int8x16_t __ret_781; \ | 60155 | uint16x8_t __ret; |
| 60470 | int8x8_t __s0_781 = __p0_781; \ | 60156 | __ret = vmovl_high_u8(__p0) - vmovl_high_u8(__p1); |
| 60471 | int16x8_t __s1_781 = __p1_781; \ | 60157 | return __ret; |
| 60472 | __ret_781 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_781), (int8x8_t)(vqrshrn_n_s16(__s1_781, __p2_781)))); \ | 60158 | } |
| 60473 | __ret_781; \ | | |
| 60474 | }) | | |
| 60475 | #else | 60159 | #else |
| 60476 | #define vqrshrn_high_n_s16(__p0_782, __p1_782, __p2_782) __extension__ ({ \ | 60160 | __ai uint16x8_t vsubl_high_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 60477 | int8x16_t __ret_782; \ | 60161 | uint16x8_t __ret; |
| 60478 | int8x8_t __s0_782 = __p0_782; \ | 60162 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60479 | int16x8_t __s1_782 = __p1_782; \ | 60163 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60480 | int8x8_t __rev0_782; __rev0_782 = __builtin_shufflevector(__s0_782, __s0_782, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60164 | __ret = __noswap_vmovl_high_u8(__rev0) - __noswap_vmovl_high_u8(__rev1); |
| 60481 | int16x8_t __rev1_782; __rev1_782 = __builtin_shufflevector(__s1_782, __s1_782, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60165 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60482 | __ret_782 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_782), (int8x8_t)(__noswap_vqrshrn_n_s16(__rev1_782, __p2_782)))); \ | 60166 | return __ret; |
| 60483 | __ret_782 = __builtin_shufflevector(__ret_782, __ret_782, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60167 | } |
| 60484 | __ret_782; \ | 60168 | #endif |
| 60485 | }) | 60169 | |
| 60486 | #endif | | |
| 60487 | | | |
| 60488 | #define vqrshrns_n_u32(__p0, __p1) __extension__ ({ \ | | |
| 60489 | uint16_t __ret; \ | | |
| 60490 | uint32_t __s0 = __p0; \ | | |
| 60491 | __ret = (uint16_t) __builtin_neon_vqrshrns_n_u32(__s0, __p1); \ | | |
| 60492 | __ret; \ | | |
| 60493 | }) | | |
| 60494 | #define vqrshrnd_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 60495 | uint32_t __ret; \ | | |
| 60496 | uint64_t __s0 = __p0; \ | | |
| 60497 | __ret = (uint32_t) __builtin_neon_vqrshrnd_n_u64(__s0, __p1); \ | | |
| 60498 | __ret; \ | | |
| 60499 | }) | | |
| 60500 | #define vqrshrnh_n_u16(__p0, __p1) __extension__ ({ \ | | |
| 60501 | uint8_t __ret; \ | | |
| 60502 | uint16_t __s0 = __p0; \ | | |
| 60503 | __ret = (uint8_t) __builtin_neon_vqrshrnh_n_u16(__s0, __p1); \ | | |
| 60504 | __ret; \ | | |
| 60505 | }) | | |
| 60506 | #define vqrshrns_n_s32(__p0, __p1) __extension__ ({ \ | | |
| 60507 | int16_t __ret; \ | | |
| 60508 | int32_t __s0 = __p0; \ | | |
| 60509 | __ret = (int16_t) __builtin_neon_vqrshrns_n_s32(__s0, __p1); \ | | |
| 60510 | __ret; \ | | |
| 60511 | }) | | |
| 60512 | #define vqrshrnd_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 60513 | int32_t __ret; \ | | |
| 60514 | int64_t __s0 = __p0; \ | | |
| 60515 | __ret = (int32_t) __builtin_neon_vqrshrnd_n_s64(__s0, __p1); \ | | |
| 60516 | __ret; \ | | |
| 60517 | }) | | |
| 60518 | #define vqrshrnh_n_s16(__p0, __p1) __extension__ ({ \ | | |
| 60519 | int8_t __ret; \ | | |
| 60520 | int16_t __s0 = __p0; \ | | |
| 60521 | __ret = (int8_t) __builtin_neon_vqrshrnh_n_s16(__s0, __p1); \ | | |
| 60522 | __ret; \ | | |
| 60523 | }) | | |
| 60524 | #ifdef __LITTLE_ENDIAN__ | 60170 | #ifdef __LITTLE_ENDIAN__ |
| 60525 | #define vqrshrun_high_n_s32(__p0_783, __p1_783, __p2_783) __extension__ ({ \ | 60171 | __ai uint64x2_t vsubl_high_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 60526 | int16x8_t __ret_783; \ | 60172 | uint64x2_t __ret; |
| 60527 | int16x4_t __s0_783 = __p0_783; \ | 60173 | __ret = vmovl_high_u32(__p0) - vmovl_high_u32(__p1); |
| 60528 | int32x4_t __s1_783 = __p1_783; \ | 60174 | return __ret; |
| 60529 | __ret_783 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_783), (int16x4_t)(vqrshrun_n_s32(__s1_783, __p2_783)))); \ | 60175 | } |
| 60530 | __ret_783; \ | | |
| 60531 | }) | | |
| 60532 | #else | 60176 | #else |
| 60533 | #define vqrshrun_high_n_s32(__p0_784, __p1_784, __p2_784) __extension__ ({ \ | 60177 | __ai uint64x2_t vsubl_high_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 60534 | int16x8_t __ret_784; \ | 60178 | uint64x2_t __ret; |
| 60535 | int16x4_t __s0_784 = __p0_784; \ | 60179 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 60536 | int32x4_t __s1_784 = __p1_784; \ | 60180 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 60537 | int16x4_t __rev0_784; __rev0_784 = __builtin_shufflevector(__s0_784, __s0_784, 3, 2, 1, 0); \ | 60181 | __ret = __noswap_vmovl_high_u32(__rev0) - __noswap_vmovl_high_u32(__rev1); |
| 60538 | int32x4_t __rev1_784; __rev1_784 = __builtin_shufflevector(__s1_784, __s1_784, 3, 2, 1, 0); \ | 60182 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 60539 | __ret_784 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_784), (int16x4_t)(__noswap_vqrshrun_n_s32(__rev1_784, __p2_784)))); \ | 60183 | return __ret; |
| 60540 | __ret_784 = __builtin_shufflevector(__ret_784, __ret_784, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60184 | } |
| 60541 | __ret_784; \ | | |
| 60542 | }) | | |
| 60543 | #endif | 60185 | #endif |
| 60544 | | 60186 | |
| 60545 | #ifdef __LITTLE_ENDIAN__ | 60187 | #ifdef __LITTLE_ENDIAN__ |
| 60546 | #define vqrshrun_high_n_s64(__p0_785, __p1_785, __p2_785) __extension__ ({ \ | 60188 | __ai uint32x4_t vsubl_high_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 60547 | int32x4_t __ret_785; \ | 60189 | uint32x4_t __ret; |
| 60548 | int32x2_t __s0_785 = __p0_785; \ | 60190 | __ret = vmovl_high_u16(__p0) - vmovl_high_u16(__p1); |
| 60549 | int64x2_t __s1_785 = __p1_785; \ | 60191 | return __ret; |
| 60550 | __ret_785 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_785), (int32x2_t)(vqrshrun_n_s64(__s1_785, __p2_785)))); \ | 60192 | } |
| 60551 | __ret_785; \ | | |
| 60552 | }) | | |
| 60553 | #else | 60193 | #else |
| 60554 | #define vqrshrun_high_n_s64(__p0_786, __p1_786, __p2_786) __extension__ ({ \ | 60194 | __ai uint32x4_t vsubl_high_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 60555 | int32x4_t __ret_786; \ | 60195 | uint32x4_t __ret; |
| 60556 | int32x2_t __s0_786 = __p0_786; \ | 60196 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60557 | int64x2_t __s1_786 = __p1_786; \ | 60197 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60558 | int32x2_t __rev0_786; __rev0_786 = __builtin_shufflevector(__s0_786, __s0_786, 1, 0); \ | 60198 | __ret = __noswap_vmovl_high_u16(__rev0) - __noswap_vmovl_high_u16(__rev1); |
| 60559 | int64x2_t __rev1_786; __rev1_786 = __builtin_shufflevector(__s1_786, __s1_786, 1, 0); \ | 60199 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 60560 | __ret_786 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_786), (int32x2_t)(__noswap_vqrshrun_n_s64(__rev1_786, __p2_786)))); \ | 60200 | return __ret; |
| 60561 | __ret_786 = __builtin_shufflevector(__ret_786, __ret_786, 3, 2, 1, 0); \ | 60201 | } |
| 60562 | __ret_786; \ | | |
| 60563 | }) | | |
| 60564 | #endif | 60202 | #endif |
| 60565 | | 60203 | |
| 60566 | #ifdef __LITTLE_ENDIAN__ | 60204 | #ifdef __LITTLE_ENDIAN__ |
| 60567 | #define vqrshrun_high_n_s16(__p0_787, __p1_787, __p2_787) __extension__ ({ \ | 60205 | __ai int16x8_t vsubl_high_s8(int8x16_t __p0, int8x16_t __p1) { |
| 60568 | int8x16_t __ret_787; \ | 60206 | int16x8_t __ret; |
| 60569 | int8x8_t __s0_787 = __p0_787; \ | 60207 | __ret = vmovl_high_s8(__p0) - vmovl_high_s8(__p1); |
| 60570 | int16x8_t __s1_787 = __p1_787; \ | 60208 | return __ret; |
| 60571 | __ret_787 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_787), (int8x8_t)(vqrshrun_n_s16(__s1_787, __p2_787)))); \ | 60209 | } |
| 60572 | __ret_787; \ | | |
| 60573 | }) | | |
| 60574 | #else | 60210 | #else |
| 60575 | #define vqrshrun_high_n_s16(__p0_788, __p1_788, __p2_788) __extension__ ({ \ | 60211 | __ai int16x8_t vsubl_high_s8(int8x16_t __p0, int8x16_t __p1) { |
| 60576 | int8x16_t __ret_788; \ | 60212 | int16x8_t __ret; |
| 60577 | int8x8_t __s0_788 = __p0_788; \ | 60213 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60578 | int16x8_t __s1_788 = __p1_788; \ | 60214 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60579 | int8x8_t __rev0_788; __rev0_788 = __builtin_shufflevector(__s0_788, __s0_788, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60215 | __ret = __noswap_vmovl_high_s8(__rev0) - __noswap_vmovl_high_s8(__rev1); |
| 60580 | int16x8_t __rev1_788; __rev1_788 = __builtin_shufflevector(__s1_788, __s1_788, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60216 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60581 | __ret_788 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_788), (int8x8_t)(__noswap_vqrshrun_n_s16(__rev1_788, __p2_788)))); \ | 60217 | return __ret; |
| 60582 | __ret_788 = __builtin_shufflevector(__ret_788, __ret_788, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60218 | } |
| 60583 | __ret_788; \ | | |
| 60584 | }) | | |
| 60585 | #endif | 60219 | #endif |
| 60586 | | 60220 | |
| 60587 | #define vqrshruns_n_s32(__p0, __p1) __extension__ ({ \ | 60221 | #ifdef __LITTLE_ENDIAN__ |
| 60588 | int16_t __ret; \ | 60222 | __ai int64x2_t vsubl_high_s32(int32x4_t __p0, int32x4_t __p1) { |
| 60589 | int32_t __s0 = __p0; \ | 60223 | int64x2_t __ret; |
| 60590 | __ret = (int16_t) __builtin_neon_vqrshruns_n_s32(__s0, __p1); \ | 60224 | __ret = vmovl_high_s32(__p0) - vmovl_high_s32(__p1); |
| 60591 | __ret; \ | | |
| 60592 | }) | | |
| 60593 | #define vqrshrund_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 60594 | int32_t __ret; \ | | |
| 60595 | int64_t __s0 = __p0; \ | | |
| 60596 | __ret = (int32_t) __builtin_neon_vqrshrund_n_s64(__s0, __p1); \ | | |
| 60597 | __ret; \ | | |
| 60598 | }) | | |
| 60599 | #define vqrshrunh_n_s16(__p0, __p1) __extension__ ({ \ | | |
| 60600 | int8_t __ret; \ | | |
| 60601 | int16_t __s0 = __p0; \ | | |
| 60602 | __ret = (int8_t) __builtin_neon_vqrshrunh_n_s16(__s0, __p1); \ | | |
| 60603 | __ret; \ | | |
| 60604 | }) | | |
| 60605 | __ai uint8_t vqshlb_u8(uint8_t __p0, int8_t __p1) { | | |
| 60606 | uint8_t __ret; | | |
| 60607 | __ret = (uint8_t) __builtin_neon_vqshlb_u8(__p0, __p1); | | |
| 60608 | return __ret; | 60225 | return __ret; |
| 60609 | } | 60226 | } |
| 60610 | __ai uint32_t vqshls_u32(uint32_t __p0, int32_t __p1) { | 60227 | #else |
| 60611 | uint32_t __ret; | 60228 | __ai int64x2_t vsubl_high_s32(int32x4_t __p0, int32x4_t __p1) { |
| 60612 | __ret = (uint32_t) __builtin_neon_vqshls_u32(__p0, __p1); | 60229 | int64x2_t __ret; |
| | 60230 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 60231 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 60232 | __ret = __noswap_vmovl_high_s32(__rev0) - __noswap_vmovl_high_s32(__rev1); |
| | 60233 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 60613 | return __ret; | 60234 | return __ret; |
| 60614 | } | 60235 | } |
| 60615 | __ai uint64_t vqshld_u64(uint64_t __p0, int64_t __p1) { | 60236 | #endif |
| 60616 | uint64_t __ret; | 60237 | |
| 60617 | __ret = (uint64_t) __builtin_neon_vqshld_u64(__p0, __p1); | 60238 | #ifdef __LITTLE_ENDIAN__ |
| | 60239 | __ai int32x4_t vsubl_high_s16(int16x8_t __p0, int16x8_t __p1) { |
| | 60240 | int32x4_t __ret; |
| | 60241 | __ret = vmovl_high_s16(__p0) - vmovl_high_s16(__p1); |
| 60618 | return __ret; | 60242 | return __ret; |
| 60619 | } | 60243 | } |
| 60620 | __ai uint16_t vqshlh_u16(uint16_t __p0, int16_t __p1) { | 60244 | #else |
| 60621 | uint16_t __ret; | 60245 | __ai int32x4_t vsubl_high_s16(int16x8_t __p0, int16x8_t __p1) { |
| 60622 | __ret = (uint16_t) __builtin_neon_vqshlh_u16(__p0, __p1); | 60246 | int32x4_t __ret; |
| | 60247 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 60248 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 60249 | __ret = __noswap_vmovl_high_s16(__rev0) - __noswap_vmovl_high_s16(__rev1); |
| | 60250 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 60623 | return __ret; | 60251 | return __ret; |
| 60624 | } | 60252 | } |
| 60625 | __ai int8_t vqshlb_s8(int8_t __p0, int8_t __p1) { | 60253 | #endif |
| 60626 | int8_t __ret; | 60254 | |
| 60627 | __ret = (int8_t) __builtin_neon_vqshlb_s8(__p0, __p1); | 60255 | #ifdef __LITTLE_ENDIAN__ |
| | 60256 | __ai uint16x8_t vsubw_high_u8(uint16x8_t __p0, uint8x16_t __p1) { |
| | 60257 | uint16x8_t __ret; |
| | 60258 | __ret = __p0 - vmovl_high_u8(__p1); |
| 60628 | return __ret; | 60259 | return __ret; |
| 60629 | } | 60260 | } |
| 60630 | __ai int32_t vqshls_s32(int32_t __p0, int32_t __p1) { | 60261 | #else |
| 60631 | int32_t __ret; | 60262 | __ai uint16x8_t vsubw_high_u8(uint16x8_t __p0, uint8x16_t __p1) { |
| 60632 | __ret = (int32_t) __builtin_neon_vqshls_s32(__p0, __p1); | 60263 | uint16x8_t __ret; |
| | 60264 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 60265 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 60266 | __ret = __rev0 - __noswap_vmovl_high_u8(__rev1); |
| | 60267 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60633 | return __ret; | 60268 | return __ret; |
| 60634 | } | 60269 | } |
| 60635 | __ai int64_t vqshld_s64(int64_t __p0, int64_t __p1) { | 60270 | #endif |
| 60636 | int64_t __ret; | 60271 | |
| 60637 | __ret = (int64_t) __builtin_neon_vqshld_s64(__p0, __p1); | 60272 | #ifdef __LITTLE_ENDIAN__ |
| | 60273 | __ai uint64x2_t vsubw_high_u32(uint64x2_t __p0, uint32x4_t __p1) { |
| | 60274 | uint64x2_t __ret; |
| | 60275 | __ret = __p0 - vmovl_high_u32(__p1); |
| 60638 | return __ret; | 60276 | return __ret; |
| 60639 | } | 60277 | } |
| 60640 | __ai int16_t vqshlh_s16(int16_t __p0, int16_t __p1) { | 60278 | #else |
| 60641 | int16_t __ret; | 60279 | __ai uint64x2_t vsubw_high_u32(uint64x2_t __p0, uint32x4_t __p1) { |
| 60642 | __ret = (int16_t) __builtin_neon_vqshlh_s16(__p0, __p1); | 60280 | uint64x2_t __ret; |
| | 60281 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 60282 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 60283 | __ret = __rev0 - __noswap_vmovl_high_u32(__rev1); |
| | 60284 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 60643 | return __ret; | 60285 | return __ret; |
| 60644 | } | 60286 | } |
| 60645 | #define vqshlb_n_u8(__p0, __p1) __extension__ ({ \ | 60287 | #endif |
| 60646 | uint8_t __ret; \ | 60288 | |
| 60647 | uint8_t __s0 = __p0; \ | | |
| 60648 | __ret = (uint8_t) __builtin_neon_vqshlb_n_u8(__s0, __p1); \ | | |
| 60649 | __ret; \ | | |
| 60650 | }) | | |
| 60651 | #define vqshls_n_u32(__p0, __p1) __extension__ ({ \ | | |
| 60652 | uint32_t __ret; \ | | |
| 60653 | uint32_t __s0 = __p0; \ | | |
| 60654 | __ret = (uint32_t) __builtin_neon_vqshls_n_u32(__s0, __p1); \ | | |
| 60655 | __ret; \ | | |
| 60656 | }) | | |
| 60657 | #define vqshld_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 60658 | uint64_t __ret; \ | | |
| 60659 | uint64_t __s0 = __p0; \ | | |
| 60660 | __ret = (uint64_t) __builtin_neon_vqshld_n_u64(__s0, __p1); \ | | |
| 60661 | __ret; \ | | |
| 60662 | }) | | |
| 60663 | #define vqshlh_n_u16(__p0, __p1) __extension__ ({ \ | | |
| 60664 | uint16_t __ret; \ | | |
| 60665 | uint16_t __s0 = __p0; \ | | |
| 60666 | __ret = (uint16_t) __builtin_neon_vqshlh_n_u16(__s0, __p1); \ | | |
| 60667 | __ret; \ | | |
| 60668 | }) | | |
| 60669 | #define vqshlb_n_s8(__p0, __p1) __extension__ ({ \ | | |
| 60670 | int8_t __ret; \ | | |
| 60671 | int8_t __s0 = __p0; \ | | |
| 60672 | __ret = (int8_t) __builtin_neon_vqshlb_n_s8(__s0, __p1); \ | | |
| 60673 | __ret; \ | | |
| 60674 | }) | | |
| 60675 | #define vqshls_n_s32(__p0, __p1) __extension__ ({ \ | | |
| 60676 | int32_t __ret; \ | | |
| 60677 | int32_t __s0 = __p0; \ | | |
| 60678 | __ret = (int32_t) __builtin_neon_vqshls_n_s32(__s0, __p1); \ | | |
| 60679 | __ret; \ | | |
| 60680 | }) | | |
| 60681 | #define vqshld_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 60682 | int64_t __ret; \ | | |
| 60683 | int64_t __s0 = __p0; \ | | |
| 60684 | __ret = (int64_t) __builtin_neon_vqshld_n_s64(__s0, __p1); \ | | |
| 60685 | __ret; \ | | |
| 60686 | }) | | |
| 60687 | #define vqshlh_n_s16(__p0, __p1) __extension__ ({ \ | | |
| 60688 | int16_t __ret; \ | | |
| 60689 | int16_t __s0 = __p0; \ | | |
| 60690 | __ret = (int16_t) __builtin_neon_vqshlh_n_s16(__s0, __p1); \ | | |
| 60691 | __ret; \ | | |
| 60692 | }) | | |
| 60693 | #define vqshlub_n_s8(__p0, __p1) __extension__ ({ \ | | |
| 60694 | int8_t __ret; \ | | |
| 60695 | int8_t __s0 = __p0; \ | | |
| 60696 | __ret = (int8_t) __builtin_neon_vqshlub_n_s8(__s0, __p1); \ | | |
| 60697 | __ret; \ | | |
| 60698 | }) | | |
| 60699 | #define vqshlus_n_s32(__p0, __p1) __extension__ ({ \ | | |
| 60700 | int32_t __ret; \ | | |
| 60701 | int32_t __s0 = __p0; \ | | |
| 60702 | __ret = (int32_t) __builtin_neon_vqshlus_n_s32(__s0, __p1); \ | | |
| 60703 | __ret; \ | | |
| 60704 | }) | | |
| 60705 | #define vqshlud_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 60706 | int64_t __ret; \ | | |
| 60707 | int64_t __s0 = __p0; \ | | |
| 60708 | __ret = (int64_t) __builtin_neon_vqshlud_n_s64(__s0, __p1); \ | | |
| 60709 | __ret; \ | | |
| 60710 | }) | | |
| 60711 | #define vqshluh_n_s16(__p0, __p1) __extension__ ({ \ | | |
| 60712 | int16_t __ret; \ | | |
| 60713 | int16_t __s0 = __p0; \ | | |
| 60714 | __ret = (int16_t) __builtin_neon_vqshluh_n_s16(__s0, __p1); \ | | |
| 60715 | __ret; \ | | |
| 60716 | }) | | |
| 60717 | #ifdef __LITTLE_ENDIAN__ | 60289 | #ifdef __LITTLE_ENDIAN__ |
| 60718 | #define vqshrn_high_n_u32(__p0_789, __p1_789, __p2_789) __extension__ ({ \ | 60290 | __ai uint32x4_t vsubw_high_u16(uint32x4_t __p0, uint16x8_t __p1) { |
| 60719 | uint16x8_t __ret_789; \ | 60291 | uint32x4_t __ret; |
| 60720 | uint16x4_t __s0_789 = __p0_789; \ | 60292 | __ret = __p0 - vmovl_high_u16(__p1); |
| 60721 | uint32x4_t __s1_789 = __p1_789; \ | 60293 | return __ret; |
| 60722 | __ret_789 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_789), (uint16x4_t)(vqshrn_n_u32(__s1_789, __p2_789)))); \ | 60294 | } |
| 60723 | __ret_789; \ | | |
| 60724 | }) | | |
| 60725 | #else | 60295 | #else |
| 60726 | #define vqshrn_high_n_u32(__p0_790, __p1_790, __p2_790) __extension__ ({ \ | 60296 | __ai uint32x4_t vsubw_high_u16(uint32x4_t __p0, uint16x8_t __p1) { |
| 60727 | uint16x8_t __ret_790; \ | 60297 | uint32x4_t __ret; |
| 60728 | uint16x4_t __s0_790 = __p0_790; \ | 60298 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 60729 | uint32x4_t __s1_790 = __p1_790; \ | 60299 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60730 | uint16x4_t __rev0_790; __rev0_790 = __builtin_shufflevector(__s0_790, __s0_790, 3, 2, 1, 0); \ | 60300 | __ret = __rev0 - __noswap_vmovl_high_u16(__rev1); |
| 60731 | uint32x4_t __rev1_790; __rev1_790 = __builtin_shufflevector(__s1_790, __s1_790, 3, 2, 1, 0); \ | 60301 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 60732 | __ret_790 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_790), (uint16x4_t)(__noswap_vqshrn_n_u32(__rev1_790, __p2_790)))); \ | 60302 | return __ret; |
| 60733 | __ret_790 = __builtin_shufflevector(__ret_790, __ret_790, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60303 | } |
| 60734 | __ret_790; \ | | |
| 60735 | }) | | |
| 60736 | #endif | 60304 | #endif |
| 60737 | | 60305 | |
| 60738 | #ifdef __LITTLE_ENDIAN__ | 60306 | #ifdef __LITTLE_ENDIAN__ |
| 60739 | #define vqshrn_high_n_u64(__p0_791, __p1_791, __p2_791) __extension__ ({ \ | 60307 | __ai int16x8_t vsubw_high_s8(int16x8_t __p0, int8x16_t __p1) { |
| 60740 | uint32x4_t __ret_791; \ | 60308 | int16x8_t __ret; |
| 60741 | uint32x2_t __s0_791 = __p0_791; \ | 60309 | __ret = __p0 - vmovl_high_s8(__p1); |
| 60742 | uint64x2_t __s1_791 = __p1_791; \ | 60310 | return __ret; |
| 60743 | __ret_791 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_791), (uint32x2_t)(vqshrn_n_u64(__s1_791, __p2_791)))); \ | 60311 | } |
| 60744 | __ret_791; \ | | |
| 60745 | }) | | |
| 60746 | #else | 60312 | #else |
| 60747 | #define vqshrn_high_n_u64(__p0_792, __p1_792, __p2_792) __extension__ ({ \ | 60313 | __ai int16x8_t vsubw_high_s8(int16x8_t __p0, int8x16_t __p1) { |
| 60748 | uint32x4_t __ret_792; \ | 60314 | int16x8_t __ret; |
| 60749 | uint32x2_t __s0_792 = __p0_792; \ | 60315 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60750 | uint64x2_t __s1_792 = __p1_792; \ | 60316 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60751 | uint32x2_t __rev0_792; __rev0_792 = __builtin_shufflevector(__s0_792, __s0_792, 1, 0); \ | 60317 | __ret = __rev0 - __noswap_vmovl_high_s8(__rev1); |
| 60752 | uint64x2_t __rev1_792; __rev1_792 = __builtin_shufflevector(__s1_792, __s1_792, 1, 0); \ | 60318 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60753 | __ret_792 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_792), (uint32x2_t)(__noswap_vqshrn_n_u64(__rev1_792, __p2_792)))); \ | 60319 | return __ret; |
| 60754 | __ret_792 = __builtin_shufflevector(__ret_792, __ret_792, 3, 2, 1, 0); \ | 60320 | } |
| 60755 | __ret_792; \ | | |
| 60756 | }) | | |
| 60757 | #endif | 60321 | #endif |
| 60758 | | 60322 | |
| 60759 | #ifdef __LITTLE_ENDIAN__ | 60323 | #ifdef __LITTLE_ENDIAN__ |
| 60760 | #define vqshrn_high_n_u16(__p0_793, __p1_793, __p2_793) __extension__ ({ \ | 60324 | __ai int64x2_t vsubw_high_s32(int64x2_t __p0, int32x4_t __p1) { |
| 60761 | uint8x16_t __ret_793; \ | 60325 | int64x2_t __ret; |
| 60762 | uint8x8_t __s0_793 = __p0_793; \ | 60326 | __ret = __p0 - vmovl_high_s32(__p1); |
| 60763 | uint16x8_t __s1_793 = __p1_793; \ | 60327 | return __ret; |
| 60764 | __ret_793 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_793), (uint8x8_t)(vqshrn_n_u16(__s1_793, __p2_793)))); \ | 60328 | } |
| 60765 | __ret_793; \ | | |
| 60766 | }) | | |
| 60767 | #else | 60329 | #else |
| 60768 | #define vqshrn_high_n_u16(__p0_794, __p1_794, __p2_794) __extension__ ({ \ | 60330 | __ai int64x2_t vsubw_high_s32(int64x2_t __p0, int32x4_t __p1) { |
| 60769 | uint8x16_t __ret_794; \ | 60331 | int64x2_t __ret; |
| 60770 | uint8x8_t __s0_794 = __p0_794; \ | 60332 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60771 | uint16x8_t __s1_794 = __p1_794; \ | 60333 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 60772 | uint8x8_t __rev0_794; __rev0_794 = __builtin_shufflevector(__s0_794, __s0_794, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60334 | __ret = __rev0 - __noswap_vmovl_high_s32(__rev1); |
| 60773 | uint16x8_t __rev1_794; __rev1_794 = __builtin_shufflevector(__s1_794, __s1_794, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60335 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 60774 | __ret_794 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_794), (uint8x8_t)(__noswap_vqshrn_n_u16(__rev1_794, __p2_794)))); \ | 60336 | return __ret; |
| 60775 | __ret_794 = __builtin_shufflevector(__ret_794, __ret_794, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60337 | } |
| 60776 | __ret_794; \ | | |
| 60777 | }) | | |
| 60778 | #endif | 60338 | #endif |
| 60779 | | 60339 | |
| 60780 | #ifdef __LITTLE_ENDIAN__ | 60340 | #ifdef __LITTLE_ENDIAN__ |
| 60781 | #define vqshrn_high_n_s32(__p0_795, __p1_795, __p2_795) __extension__ ({ \ | 60341 | __ai int32x4_t vsubw_high_s16(int32x4_t __p0, int16x8_t __p1) { |
| 60782 | int16x8_t __ret_795; \ | 60342 | int32x4_t __ret; |
| 60783 | int16x4_t __s0_795 = __p0_795; \ | 60343 | __ret = __p0 - vmovl_high_s16(__p1); |
| 60784 | int32x4_t __s1_795 = __p1_795; \ | 60344 | return __ret; |
| 60785 | __ret_795 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_795), (int16x4_t)(vqshrn_n_s32(__s1_795, __p2_795)))); \ | 60345 | } |
| 60786 | __ret_795; \ | | |
| 60787 | }) | | |
| 60788 | #else | 60346 | #else |
| 60789 | #define vqshrn_high_n_s32(__p0_796, __p1_796, __p2_796) __extension__ ({ \ | 60347 | __ai int32x4_t vsubw_high_s16(int32x4_t __p0, int16x8_t __p1) { |
| 60790 | int16x8_t __ret_796; \ | 60348 | int32x4_t __ret; |
| 60791 | int16x4_t __s0_796 = __p0_796; \ | 60349 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 60792 | int32x4_t __s1_796 = __p1_796; \ | 60350 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60793 | int16x4_t __rev0_796; __rev0_796 = __builtin_shufflevector(__s0_796, __s0_796, 3, 2, 1, 0); \ | 60351 | __ret = __rev0 - __noswap_vmovl_high_s16(__rev1); |
| 60794 | int32x4_t __rev1_796; __rev1_796 = __builtin_shufflevector(__s1_796, __s1_796, 3, 2, 1, 0); \ | 60352 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 60795 | __ret_796 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_796), (int16x4_t)(__noswap_vqshrn_n_s32(__rev1_796, __p2_796)))); \ | 60353 | return __ret; |
| 60796 | __ret_796 = __builtin_shufflevector(__ret_796, __ret_796, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60354 | } |
| 60797 | __ret_796; \ | | |
| 60798 | }) | | |
| 60799 | #endif | 60355 | #endif |
| 60800 | | 60356 | |
| 60801 | #ifdef __LITTLE_ENDIAN__ | 60357 | #ifdef __LITTLE_ENDIAN__ |
| 60802 | #define vqshrn_high_n_s64(__p0_797, __p1_797, __p2_797) __extension__ ({ \ | 60358 | __ai poly8x8_t vtrn1_p8(poly8x8_t __p0, poly8x8_t __p1) { |
| 60803 | int32x4_t __ret_797; \ | 60359 | poly8x8_t __ret; |
| 60804 | int32x2_t __s0_797 = __p0_797; \ | 60360 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 2, 10, 4, 12, 6, 14); |
| 60805 | int64x2_t __s1_797 = __p1_797; \ | 60361 | return __ret; |
| 60806 | __ret_797 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_797), (int32x2_t)(vqshrn_n_s64(__s1_797, __p2_797)))); \ | 60362 | } |
| 60807 | __ret_797; \ | | |
| 60808 | }) | | |
| 60809 | #else | 60363 | #else |
| 60810 | #define vqshrn_high_n_s64(__p0_798, __p1_798, __p2_798) __extension__ ({ \ | 60364 | __ai poly8x8_t vtrn1_p8(poly8x8_t __p0, poly8x8_t __p1) { |
| 60811 | int32x4_t __ret_798; \ | 60365 | poly8x8_t __ret; |
| 60812 | int32x2_t __s0_798 = __p0_798; \ | 60366 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60813 | int64x2_t __s1_798 = __p1_798; \ | 60367 | poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60814 | int32x2_t __rev0_798; __rev0_798 = __builtin_shufflevector(__s0_798, __s0_798, 1, 0); \ | 60368 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 2, 10, 4, 12, 6, 14); |
| 60815 | int64x2_t __rev1_798; __rev1_798 = __builtin_shufflevector(__s1_798, __s1_798, 1, 0); \ | 60369 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60816 | __ret_798 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_798), (int32x2_t)(__noswap_vqshrn_n_s64(__rev1_798, __p2_798)))); \ | 60370 | return __ret; |
| 60817 | __ret_798 = __builtin_shufflevector(__ret_798, __ret_798, 3, 2, 1, 0); \ | 60371 | } |
| 60818 | __ret_798; \ | | |
| 60819 | }) | | |
| 60820 | #endif | 60372 | #endif |
| 60821 | | 60373 | |
| 60822 | #ifdef __LITTLE_ENDIAN__ | 60374 | #ifdef __LITTLE_ENDIAN__ |
| 60823 | #define vqshrn_high_n_s16(__p0_799, __p1_799, __p2_799) __extension__ ({ \ | 60375 | __ai poly16x4_t vtrn1_p16(poly16x4_t __p0, poly16x4_t __p1) { |
| 60824 | int8x16_t __ret_799; \ | 60376 | poly16x4_t __ret; |
| 60825 | int8x8_t __s0_799 = __p0_799; \ | 60377 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 2, 6); |
| 60826 | int16x8_t __s1_799 = __p1_799; \ | 60378 | return __ret; |
| 60827 | __ret_799 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_799), (int8x8_t)(vqshrn_n_s16(__s1_799, __p2_799)))); \ | 60379 | } |
| 60828 | __ret_799; \ | | |
| 60829 | }) | | |
| 60830 | #else | 60380 | #else |
| 60831 | #define vqshrn_high_n_s16(__p0_800, __p1_800, __p2_800) __extension__ ({ \ | 60381 | __ai poly16x4_t vtrn1_p16(poly16x4_t __p0, poly16x4_t __p1) { |
| 60832 | int8x16_t __ret_800; \ | 60382 | poly16x4_t __ret; |
| 60833 | int8x8_t __s0_800 = __p0_800; \ | 60383 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 60834 | int16x8_t __s1_800 = __p1_800; \ | 60384 | poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 60835 | int8x8_t __rev0_800; __rev0_800 = __builtin_shufflevector(__s0_800, __s0_800, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60385 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 2, 6); |
| 60836 | int16x8_t __rev1_800; __rev1_800 = __builtin_shufflevector(__s1_800, __s1_800, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60386 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 60837 | __ret_800 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_800), (int8x8_t)(__noswap_vqshrn_n_s16(__rev1_800, __p2_800)))); \ | 60387 | return __ret; |
| 60838 | __ret_800 = __builtin_shufflevector(__ret_800, __ret_800, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60388 | } |
| 60839 | __ret_800; \ | | |
| 60840 | }) | | |
| 60841 | #endif | 60389 | #endif |
| 60842 | | 60390 | |
| 60843 | #define vqshrns_n_u32(__p0, __p1) __extension__ ({ \ | | |
| 60844 | uint16_t __ret; \ | | |
| 60845 | uint32_t __s0 = __p0; \ | | |
| 60846 | __ret = (uint16_t) __builtin_neon_vqshrns_n_u32(__s0, __p1); \ | | |
| 60847 | __ret; \ | | |
| 60848 | }) | | |
| 60849 | #define vqshrnd_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 60850 | uint32_t __ret; \ | | |
| 60851 | uint64_t __s0 = __p0; \ | | |
| 60852 | __ret = (uint32_t) __builtin_neon_vqshrnd_n_u64(__s0, __p1); \ | | |
| 60853 | __ret; \ | | |
| 60854 | }) | | |
| 60855 | #define vqshrnh_n_u16(__p0, __p1) __extension__ ({ \ | | |
| 60856 | uint8_t __ret; \ | | |
| 60857 | uint16_t __s0 = __p0; \ | | |
| 60858 | __ret = (uint8_t) __builtin_neon_vqshrnh_n_u16(__s0, __p1); \ | | |
| 60859 | __ret; \ | | |
| 60860 | }) | | |
| 60861 | #define vqshrns_n_s32(__p0, __p1) __extension__ ({ \ | | |
| 60862 | int16_t __ret; \ | | |
| 60863 | int32_t __s0 = __p0; \ | | |
| 60864 | __ret = (int16_t) __builtin_neon_vqshrns_n_s32(__s0, __p1); \ | | |
| 60865 | __ret; \ | | |
| 60866 | }) | | |
| 60867 | #define vqshrnd_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 60868 | int32_t __ret; \ | | |
| 60869 | int64_t __s0 = __p0; \ | | |
| 60870 | __ret = (int32_t) __builtin_neon_vqshrnd_n_s64(__s0, __p1); \ | | |
| 60871 | __ret; \ | | |
| 60872 | }) | | |
| 60873 | #define vqshrnh_n_s16(__p0, __p1) __extension__ ({ \ | | |
| 60874 | int8_t __ret; \ | | |
| 60875 | int16_t __s0 = __p0; \ | | |
| 60876 | __ret = (int8_t) __builtin_neon_vqshrnh_n_s16(__s0, __p1); \ | | |
| 60877 | __ret; \ | | |
| 60878 | }) | | |
| 60879 | #ifdef __LITTLE_ENDIAN__ | 60391 | #ifdef __LITTLE_ENDIAN__ |
| 60880 | #define vqshrun_high_n_s32(__p0_801, __p1_801, __p2_801) __extension__ ({ \ | 60392 | __ai poly8x16_t vtrn1q_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| 60881 | int16x8_t __ret_801; \ | 60393 | poly8x16_t __ret; |
| 60882 | int16x4_t __s0_801 = __p0_801; \ | 60394 | __ret = __builtin_shufflevector(__p0, __p1, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30); |
| 60883 | int32x4_t __s1_801 = __p1_801; \ | 60395 | return __ret; |
| 60884 | __ret_801 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_801), (int16x4_t)(vqshrun_n_s32(__s1_801, __p2_801)))); \ | 60396 | } |
| 60885 | __ret_801; \ | | |
| 60886 | }) | | |
| 60887 | #else | 60397 | #else |
| 60888 | #define vqshrun_high_n_s32(__p0_802, __p1_802, __p2_802) __extension__ ({ \ | 60398 | __ai poly8x16_t vtrn1q_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| 60889 | int16x8_t __ret_802; \ | 60399 | poly8x16_t __ret; |
| 60890 | int16x4_t __s0_802 = __p0_802; \ | 60400 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60891 | int32x4_t __s1_802 = __p1_802; \ | 60401 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60892 | int16x4_t __rev0_802; __rev0_802 = __builtin_shufflevector(__s0_802, __s0_802, 3, 2, 1, 0); \ | 60402 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30); |
| 60893 | int32x4_t __rev1_802; __rev1_802 = __builtin_shufflevector(__s1_802, __s1_802, 3, 2, 1, 0); \ | 60403 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60894 | __ret_802 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_802), (int16x4_t)(__noswap_vqshrun_n_s32(__rev1_802, __p2_802)))); \ | 60404 | return __ret; |
| 60895 | __ret_802 = __builtin_shufflevector(__ret_802, __ret_802, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60405 | } |
| 60896 | __ret_802; \ | | |
| 60897 | }) | | |
| 60898 | #endif | 60406 | #endif |
| 60899 | | 60407 | |
| 60900 | #ifdef __LITTLE_ENDIAN__ | 60408 | #ifdef __LITTLE_ENDIAN__ |
| 60901 | #define vqshrun_high_n_s64(__p0_803, __p1_803, __p2_803) __extension__ ({ \ | 60409 | __ai poly64x2_t vtrn1q_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 60902 | int32x4_t __ret_803; \ | 60410 | poly64x2_t __ret; |
| 60903 | int32x2_t __s0_803 = __p0_803; \ | 60411 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 60904 | int64x2_t __s1_803 = __p1_803; \ | 60412 | return __ret; |
| 60905 | __ret_803 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_803), (int32x2_t)(vqshrun_n_s64(__s1_803, __p2_803)))); \ | 60413 | } |
| 60906 | __ret_803; \ | | |
| 60907 | }) | | |
| 60908 | #else | 60414 | #else |
| 60909 | #define vqshrun_high_n_s64(__p0_804, __p1_804, __p2_804) __extension__ ({ \ | 60415 | __ai poly64x2_t vtrn1q_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 60910 | int32x4_t __ret_804; \ | 60416 | poly64x2_t __ret; |
| 60911 | int32x2_t __s0_804 = __p0_804; \ | 60417 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60912 | int64x2_t __s1_804 = __p1_804; \ | 60418 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 60913 | int32x2_t __rev0_804; __rev0_804 = __builtin_shufflevector(__s0_804, __s0_804, 1, 0); \ | 60419 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| 60914 | int64x2_t __rev1_804; __rev1_804 = __builtin_shufflevector(__s1_804, __s1_804, 1, 0); \ | 60420 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 60915 | __ret_804 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_804), (int32x2_t)(__noswap_vqshrun_n_s64(__rev1_804, __p2_804)))); \ | 60421 | return __ret; |
| 60916 | __ret_804 = __builtin_shufflevector(__ret_804, __ret_804, 3, 2, 1, 0); \ | 60422 | } |
| 60917 | __ret_804; \ | | |
| 60918 | }) | | |
| 60919 | #endif | 60423 | #endif |
| 60920 | | 60424 | |
| 60921 | #ifdef __LITTLE_ENDIAN__ | 60425 | #ifdef __LITTLE_ENDIAN__ |
| 60922 | #define vqshrun_high_n_s16(__p0_805, __p1_805, __p2_805) __extension__ ({ \ | 60426 | __ai poly16x8_t vtrn1q_p16(poly16x8_t __p0, poly16x8_t __p1) { |
| 60923 | int8x16_t __ret_805; \ | 60427 | poly16x8_t __ret; |
| 60924 | int8x8_t __s0_805 = __p0_805; \ | 60428 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 2, 10, 4, 12, 6, 14); |
| 60925 | int16x8_t __s1_805 = __p1_805; \ | 60429 | return __ret; |
| 60926 | __ret_805 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_805), (int8x8_t)(vqshrun_n_s16(__s1_805, __p2_805)))); \ | 60430 | } |
| 60927 | __ret_805; \ | | |
| 60928 | }) | | |
| 60929 | #else | 60431 | #else |
| 60930 | #define vqshrun_high_n_s16(__p0_806, __p1_806, __p2_806) __extension__ ({ \ | 60432 | __ai poly16x8_t vtrn1q_p16(poly16x8_t __p0, poly16x8_t __p1) { |
| 60931 | int8x16_t __ret_806; \ | 60433 | poly16x8_t __ret; |
| 60932 | int8x8_t __s0_806 = __p0_806; \ | 60434 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60933 | int16x8_t __s1_806 = __p1_806; \ | 60435 | poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60934 | int8x8_t __rev0_806; __rev0_806 = __builtin_shufflevector(__s0_806, __s0_806, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60436 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 2, 10, 4, 12, 6, 14); |
| 60935 | int16x8_t __rev1_806; __rev1_806 = __builtin_shufflevector(__s1_806, __s1_806, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60437 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60936 | __ret_806 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_806), (int8x8_t)(__noswap_vqshrun_n_s16(__rev1_806, __p2_806)))); \ | 60438 | return __ret; |
| 60937 | __ret_806 = __builtin_shufflevector(__ret_806, __ret_806, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60439 | } |
| 60938 | __ret_806; \ | | |
| 60939 | }) | | |
| 60940 | #endif | 60440 | #endif |
| 60941 | | 60441 | |
| 60942 | #define vqshruns_n_s32(__p0, __p1) __extension__ ({ \ | 60442 | #ifdef __LITTLE_ENDIAN__ |
| 60943 | int16_t __ret; \ | 60443 | __ai uint8x16_t vtrn1q_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 60944 | int32_t __s0 = __p0; \ | 60444 | uint8x16_t __ret; |
| 60945 | __ret = (int16_t) __builtin_neon_vqshruns_n_s32(__s0, __p1); \ | 60445 | __ret = __builtin_shufflevector(__p0, __p1, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30); |
| 60946 | __ret; \ | | |
| 60947 | }) | | |
| 60948 | #define vqshrund_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 60949 | int32_t __ret; \ | | |
| 60950 | int64_t __s0 = __p0; \ | | |
| 60951 | __ret = (int32_t) __builtin_neon_vqshrund_n_s64(__s0, __p1); \ | | |
| 60952 | __ret; \ | | |
| 60953 | }) | | |
| 60954 | #define vqshrunh_n_s16(__p0, __p1) __extension__ ({ \ | | |
| 60955 | int8_t __ret; \ | | |
| 60956 | int16_t __s0 = __p0; \ | | |
| 60957 | __ret = (int8_t) __builtin_neon_vqshrunh_n_s16(__s0, __p1); \ | | |
| 60958 | __ret; \ | | |
| 60959 | }) | | |
| 60960 | __ai uint8_t vqsubb_u8(uint8_t __p0, uint8_t __p1) { | | |
| 60961 | uint8_t __ret; | | |
| 60962 | __ret = (uint8_t) __builtin_neon_vqsubb_u8(__p0, __p1); | | |
| 60963 | return __ret; | 60446 | return __ret; |
| 60964 | } | 60447 | } |
| 60965 | __ai uint32_t vqsubs_u32(uint32_t __p0, uint32_t __p1) { | 60448 | #else |
| 60966 | uint32_t __ret; | 60449 | __ai uint8x16_t vtrn1q_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 60967 | __ret = (uint32_t) __builtin_neon_vqsubs_u32(__p0, __p1); | 60450 | uint8x16_t __ret; |
| | 60451 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 60452 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 60453 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30); |
| | 60454 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60968 | return __ret; | 60455 | return __ret; |
| 60969 | } | 60456 | } |
| 60970 | __ai uint64_t vqsubd_u64(uint64_t __p0, uint64_t __p1) { | 60457 | #endif |
| 60971 | uint64_t __ret; | 60458 | |
| 60972 | __ret = (uint64_t) __builtin_neon_vqsubd_u64(__p0, __p1); | 60459 | #ifdef __LITTLE_ENDIAN__ |
| | 60460 | __ai uint32x4_t vtrn1q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| | 60461 | uint32x4_t __ret; |
| | 60462 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 2, 6); |
| 60973 | return __ret; | 60463 | return __ret; |
| 60974 | } | 60464 | } |
| 60975 | __ai uint16_t vqsubh_u16(uint16_t __p0, uint16_t __p1) { | 60465 | #else |
| 60976 | uint16_t __ret; | 60466 | __ai uint32x4_t vtrn1q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 60977 | __ret = (uint16_t) __builtin_neon_vqsubh_u16(__p0, __p1); | 60467 | uint32x4_t __ret; |
| | 60468 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 60469 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 60470 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 2, 6); |
| | 60471 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 60978 | return __ret; | 60472 | return __ret; |
| 60979 | } | 60473 | } |
| 60980 | __ai int8_t vqsubb_s8(int8_t __p0, int8_t __p1) { | 60474 | #endif |
| 60981 | int8_t __ret; | 60475 | |
| 60982 | __ret = (int8_t) __builtin_neon_vqsubb_s8(__p0, __p1); | 60476 | #ifdef __LITTLE_ENDIAN__ |
| | 60477 | __ai uint64x2_t vtrn1q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| | 60478 | uint64x2_t __ret; |
| | 60479 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 60983 | return __ret; | 60480 | return __ret; |
| 60984 | } | 60481 | } |
| 60985 | __ai int32_t vqsubs_s32(int32_t __p0, int32_t __p1) { | 60482 | #else |
| 60986 | int32_t __ret; | 60483 | __ai uint64x2_t vtrn1q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 60987 | __ret = (int32_t) __builtin_neon_vqsubs_s32(__p0, __p1); | 60484 | uint64x2_t __ret; |
| | 60485 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 60486 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 60487 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| | 60488 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 60489 | return __ret; |
| | 60490 | } |
| | 60491 | #endif |
| | 60492 | |
| | 60493 | #ifdef __LITTLE_ENDIAN__ |
| | 60494 | __ai uint16x8_t vtrn1q_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| | 60495 | uint16x8_t __ret; |
| | 60496 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 2, 10, 4, 12, 6, 14); |
| | 60497 | return __ret; |
| | 60498 | } |
| | 60499 | #else |
| | 60500 | __ai uint16x8_t vtrn1q_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| | 60501 | uint16x8_t __ret; |
| | 60502 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 60503 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 60504 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 2, 10, 4, 12, 6, 14); |
| | 60505 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60988 | return __ret; | 60506 | return __ret; |
| 60989 | } | 60507 | } |
| 60990 | __ai int64_t vqsubd_s64(int64_t __p0, int64_t __p1) { | 60508 | #endif |
| 60991 | int64_t __ret; | 60509 | |
| 60992 | __ret = (int64_t) __builtin_neon_vqsubd_s64(__p0, __p1); | 60510 | #ifdef __LITTLE_ENDIAN__ |
| | 60511 | __ai int8x16_t vtrn1q_s8(int8x16_t __p0, int8x16_t __p1) { |
| | 60512 | int8x16_t __ret; |
| | 60513 | __ret = __builtin_shufflevector(__p0, __p1, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30); |
| 60993 | return __ret; | 60514 | return __ret; |
| 60994 | } | 60515 | } |
| 60995 | __ai int16_t vqsubh_s16(int16_t __p0, int16_t __p1) { | 60516 | #else |
| 60996 | int16_t __ret; | 60517 | __ai int8x16_t vtrn1q_s8(int8x16_t __p0, int8x16_t __p1) { |
| 60997 | __ret = (int16_t) __builtin_neon_vqsubh_s16(__p0, __p1); | 60518 | int8x16_t __ret; |
| | 60519 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 60520 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 60521 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30); |
| | 60522 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 60998 | return __ret; | 60523 | return __ret; |
| 60999 | } | 60524 | } |
| | 60525 | #endif |
| | 60526 | |
| 61000 | #ifdef __LITTLE_ENDIAN__ | 60527 | #ifdef __LITTLE_ENDIAN__ |
| 61001 | __ai poly8x8_t vqtbl1_p8(poly8x16_t __p0, uint8x8_t __p1) { | 60528 | __ai float64x2_t vtrn1q_f64(float64x2_t __p0, float64x2_t __p1) { |
| 61002 | poly8x8_t __ret; | 60529 | float64x2_t __ret; |
| 61003 | __ret = (poly8x8_t) __builtin_neon_vqtbl1_v((int8x16_t)__p0, (int8x8_t)__p1, 4); | 60530 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 61004 | return __ret; | 60531 | return __ret; |
| 61005 | } | 60532 | } |
| 61006 | #else | 60533 | #else |
| 61007 | __ai poly8x8_t vqtbl1_p8(poly8x16_t __p0, uint8x8_t __p1) { | 60534 | __ai float64x2_t vtrn1q_f64(float64x2_t __p0, float64x2_t __p1) { |
| 61008 | poly8x8_t __ret; | 60535 | float64x2_t __ret; |
| 61009 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60536 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61010 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 60537 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61011 | __ret = (poly8x8_t) __builtin_neon_vqtbl1_v((int8x16_t)__rev0, (int8x8_t)__rev1, 4); | 60538 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| 61012 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 60539 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61013 | return __ret; | 60540 | return __ret; |
| 61014 | } | 60541 | } |
| 61015 | #endif | 60542 | #endif |
| 61016 | | 60543 | |
| 61017 | #ifdef __LITTLE_ENDIAN__ | 60544 | #ifdef __LITTLE_ENDIAN__ |
| 61018 | __ai poly8x16_t vqtbl1q_p8(poly8x16_t __p0, uint8x16_t __p1) { | 60545 | __ai float32x4_t vtrn1q_f32(float32x4_t __p0, float32x4_t __p1) { |
| 61019 | poly8x16_t __ret; | 60546 | float32x4_t __ret; |
| 61020 | __ret = (poly8x16_t) __builtin_neon_vqtbl1q_v((int8x16_t)__p0, (int8x16_t)__p1, 36); | 60547 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 2, 6); |
| 61021 | return __ret; | 60548 | return __ret; |
| 61022 | } | 60549 | } |
| 61023 | #else | 60550 | #else |
| 61024 | __ai poly8x16_t vqtbl1q_p8(poly8x16_t __p0, uint8x16_t __p1) { | 60551 | __ai float32x4_t vtrn1q_f32(float32x4_t __p0, float32x4_t __p1) { |
| 61025 | poly8x16_t __ret; | 60552 | float32x4_t __ret; |
| 61026 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60553 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 61027 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60554 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 61028 | __ret = (poly8x16_t) __builtin_neon_vqtbl1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 36); | 60555 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 2, 6); |
| 61029 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60556 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 61030 | return __ret; | 60557 | return __ret; |
| 61031 | } | 60558 | } |
| 61032 | #endif | 60559 | #endif |
| 61033 | | 60560 | |
| 61034 | #ifdef __LITTLE_ENDIAN__ | 60561 | #ifdef __LITTLE_ENDIAN__ |
| 61035 | __ai uint8x16_t vqtbl1q_u8(uint8x16_t __p0, uint8x16_t __p1) { | 60562 | __ai int32x4_t vtrn1q_s32(int32x4_t __p0, int32x4_t __p1) { |
| 61036 | uint8x16_t __ret; | 60563 | int32x4_t __ret; |
| 61037 | __ret = (uint8x16_t) __builtin_neon_vqtbl1q_v((int8x16_t)__p0, (int8x16_t)__p1, 48); | 60564 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 2, 6); |
| 61038 | return __ret; | 60565 | return __ret; |
| 61039 | } | 60566 | } |
| 61040 | #else | 60567 | #else |
| 61041 | __ai uint8x16_t vqtbl1q_u8(uint8x16_t __p0, uint8x16_t __p1) { | 60568 | __ai int32x4_t vtrn1q_s32(int32x4_t __p0, int32x4_t __p1) { |
| 61042 | uint8x16_t __ret; | 60569 | int32x4_t __ret; |
| 61043 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60570 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 61044 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60571 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 61045 | __ret = (uint8x16_t) __builtin_neon_vqtbl1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 48); | 60572 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 2, 6); |
| 61046 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60573 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 61047 | return __ret; | 60574 | return __ret; |
| 61048 | } | 60575 | } |
| 61049 | #endif | 60576 | #endif |
| 61050 | | 60577 | |
| 61051 | #ifdef __LITTLE_ENDIAN__ | 60578 | #ifdef __LITTLE_ENDIAN__ |
| 61052 | __ai int8x16_t vqtbl1q_s8(int8x16_t __p0, uint8x16_t __p1) { | 60579 | __ai int64x2_t vtrn1q_s64(int64x2_t __p0, int64x2_t __p1) { |
| 61053 | int8x16_t __ret; | 60580 | int64x2_t __ret; |
| 61054 | __ret = (int8x16_t) __builtin_neon_vqtbl1q_v((int8x16_t)__p0, (int8x16_t)__p1, 32); | 60581 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 61055 | return __ret; | 60582 | return __ret; |
| 61056 | } | 60583 | } |
| 61057 | #else | 60584 | #else |
| 61058 | __ai int8x16_t vqtbl1q_s8(int8x16_t __p0, uint8x16_t __p1) { | 60585 | __ai int64x2_t vtrn1q_s64(int64x2_t __p0, int64x2_t __p1) { |
| 61059 | int8x16_t __ret; | 60586 | int64x2_t __ret; |
| 61060 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60587 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61061 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60588 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61062 | __ret = (int8x16_t) __builtin_neon_vqtbl1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 32); | 60589 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| 61063 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60590 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61064 | return __ret; | 60591 | return __ret; |
| 61065 | } | 60592 | } |
| 61066 | #endif | 60593 | #endif |
| 61067 | | 60594 | |
| 61068 | #ifdef __LITTLE_ENDIAN__ | 60595 | #ifdef __LITTLE_ENDIAN__ |
| 61069 | __ai uint8x8_t vqtbl1_u8(uint8x16_t __p0, uint8x8_t __p1) { | 60596 | __ai int16x8_t vtrn1q_s16(int16x8_t __p0, int16x8_t __p1) { |
| 61070 | uint8x8_t __ret; | 60597 | int16x8_t __ret; |
| 61071 | __ret = (uint8x8_t) __builtin_neon_vqtbl1_v((int8x16_t)__p0, (int8x8_t)__p1, 16); | 60598 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 2, 10, 4, 12, 6, 14); |
| 61072 | return __ret; | 60599 | return __ret; |
| 61073 | } | 60600 | } |
| 61074 | #else | 60601 | #else |
| 61075 | __ai uint8x8_t vqtbl1_u8(uint8x16_t __p0, uint8x8_t __p1) { | 60602 | __ai int16x8_t vtrn1q_s16(int16x8_t __p0, int16x8_t __p1) { |
| 61076 | uint8x8_t __ret; | 60603 | int16x8_t __ret; |
| 61077 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60604 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61078 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 60605 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61079 | __ret = (uint8x8_t) __builtin_neon_vqtbl1_v((int8x16_t)__rev0, (int8x8_t)__rev1, 16); | 60606 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 2, 10, 4, 12, 6, 14); |
| 61080 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 60607 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61081 | return __ret; | 60608 | return __ret; |
| 61082 | } | 60609 | } |
| 61083 | #endif | 60610 | #endif |
| 61084 | | 60611 | |
| 61085 | #ifdef __LITTLE_ENDIAN__ | 60612 | #ifdef __LITTLE_ENDIAN__ |
| 61086 | __ai int8x8_t vqtbl1_s8(int8x16_t __p0, uint8x8_t __p1) { | 60613 | __ai uint8x8_t vtrn1_u8(uint8x8_t __p0, uint8x8_t __p1) { |
| 61087 | int8x8_t __ret; | 60614 | uint8x8_t __ret; |
| 61088 | __ret = (int8x8_t) __builtin_neon_vqtbl1_v((int8x16_t)__p0, (int8x8_t)__p1, 0); | 60615 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 2, 10, 4, 12, 6, 14); |
| 61089 | return __ret; | 60616 | return __ret; |
| 61090 | } | 60617 | } |
| 61091 | #else | 60618 | #else |
| 61092 | __ai int8x8_t vqtbl1_s8(int8x16_t __p0, uint8x8_t __p1) { | 60619 | __ai uint8x8_t vtrn1_u8(uint8x8_t __p0, uint8x8_t __p1) { |
| 61093 | int8x8_t __ret; | 60620 | uint8x8_t __ret; |
| 61094 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60621 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61095 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 60622 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61096 | __ret = (int8x8_t) __builtin_neon_vqtbl1_v((int8x16_t)__rev0, (int8x8_t)__rev1, 0); | 60623 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 2, 10, 4, 12, 6, 14); |
| 61097 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 60624 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61098 | return __ret; | 60625 | return __ret; |
| 61099 | } | 60626 | } |
| 61100 | #endif | 60627 | #endif |
| 61101 | | 60628 | |
| 61102 | #ifdef __LITTLE_ENDIAN__ | 60629 | #ifdef __LITTLE_ENDIAN__ |
| 61103 | __ai poly8x8_t vqtbl2_p8(poly8x16x2_t __p0, uint8x8_t __p1) { | 60630 | __ai uint32x2_t vtrn1_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 61104 | poly8x8_t __ret; | 60631 | uint32x2_t __ret; |
| 61105 | __ret = (poly8x8_t) __builtin_neon_vqtbl2_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x8_t)__p1, 4); | 60632 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 61106 | return __ret; | 60633 | return __ret; |
| 61107 | } | 60634 | } |
| 61108 | #else | 60635 | #else |
| 61109 | __ai poly8x8_t vqtbl2_p8(poly8x16x2_t __p0, uint8x8_t __p1) { | 60636 | __ai uint32x2_t vtrn1_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 61110 | poly8x8_t __ret; | 60637 | uint32x2_t __ret; |
| 61111 | poly8x16x2_t __rev0; | 60638 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61112 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60639 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61113 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60640 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| 61114 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 60641 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61115 | __ret = (poly8x8_t) __builtin_neon_vqtbl2_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x8_t)__rev1, 4); | | |
| 61116 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61117 | return __ret; | 60642 | return __ret; |
| 61118 | } | 60643 | } |
| 61119 | #endif | 60644 | #endif |
| 61120 | | 60645 | |
| 61121 | #ifdef __LITTLE_ENDIAN__ | 60646 | #ifdef __LITTLE_ENDIAN__ |
| 61122 | __ai poly8x16_t vqtbl2q_p8(poly8x16x2_t __p0, uint8x16_t __p1) { | 60647 | __ai uint16x4_t vtrn1_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 61123 | poly8x16_t __ret; | 60648 | uint16x4_t __ret; |
| 61124 | __ret = (poly8x16_t) __builtin_neon_vqtbl2q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p1, 36); | 60649 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 2, 6); |
| 61125 | return __ret; | 60650 | return __ret; |
| 61126 | } | 60651 | } |
| 61127 | #else | 60652 | #else |
| 61128 | __ai poly8x16_t vqtbl2q_p8(poly8x16x2_t __p0, uint8x16_t __p1) { | 60653 | __ai uint16x4_t vtrn1_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 61129 | poly8x16_t __ret; | 60654 | uint16x4_t __ret; |
| 61130 | poly8x16x2_t __rev0; | 60655 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 61131 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60656 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 61132 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60657 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 2, 6); |
| 61133 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60658 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 61134 | __ret = (poly8x16_t) __builtin_neon_vqtbl2q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev1, 36); | | |
| 61135 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61136 | return __ret; | 60659 | return __ret; |
| 61137 | } | 60660 | } |
| 61138 | #endif | 60661 | #endif |
| 61139 | | 60662 | |
| 61140 | #ifdef __LITTLE_ENDIAN__ | 60663 | #ifdef __LITTLE_ENDIAN__ |
| 61141 | __ai uint8x16_t vqtbl2q_u8(uint8x16x2_t __p0, uint8x16_t __p1) { | 60664 | __ai int8x8_t vtrn1_s8(int8x8_t __p0, int8x8_t __p1) { |
| 61142 | uint8x16_t __ret; | 60665 | int8x8_t __ret; |
| 61143 | __ret = (uint8x16_t) __builtin_neon_vqtbl2q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p1, 48); | 60666 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 2, 10, 4, 12, 6, 14); |
| 61144 | return __ret; | 60667 | return __ret; |
| 61145 | } | 60668 | } |
| 61146 | #else | 60669 | #else |
| 61147 | __ai uint8x16_t vqtbl2q_u8(uint8x16x2_t __p0, uint8x16_t __p1) { | 60670 | __ai int8x8_t vtrn1_s8(int8x8_t __p0, int8x8_t __p1) { |
| 61148 | uint8x16_t __ret; | 60671 | int8x8_t __ret; |
| 61149 | uint8x16x2_t __rev0; | 60672 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61150 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60673 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61151 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60674 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 2, 10, 4, 12, 6, 14); |
| 61152 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60675 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61153 | __ret = (uint8x16_t) __builtin_neon_vqtbl2q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev1, 48); | | |
| 61154 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61155 | return __ret; | 60676 | return __ret; |
| 61156 | } | 60677 | } |
| 61157 | #endif | 60678 | #endif |
| 61158 | | 60679 | |
| 61159 | #ifdef __LITTLE_ENDIAN__ | 60680 | #ifdef __LITTLE_ENDIAN__ |
| 61160 | __ai int8x16_t vqtbl2q_s8(int8x16x2_t __p0, uint8x16_t __p1) { | 60681 | __ai float32x2_t vtrn1_f32(float32x2_t __p0, float32x2_t __p1) { |
| 61161 | int8x16_t __ret; | 60682 | float32x2_t __ret; |
| 61162 | __ret = (int8x16_t) __builtin_neon_vqtbl2q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p1, 32); | 60683 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 61163 | return __ret; | 60684 | return __ret; |
| 61164 | } | 60685 | } |
| 61165 | #else | 60686 | #else |
| 61166 | __ai int8x16_t vqtbl2q_s8(int8x16x2_t __p0, uint8x16_t __p1) { | 60687 | __ai float32x2_t vtrn1_f32(float32x2_t __p0, float32x2_t __p1) { |
| 61167 | int8x16_t __ret; | 60688 | float32x2_t __ret; |
| 61168 | int8x16x2_t __rev0; | 60689 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61169 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60690 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61170 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60691 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| 61171 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60692 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61172 | __ret = (int8x16_t) __builtin_neon_vqtbl2q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev1, 32); | | |
| 61173 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61174 | return __ret; | 60693 | return __ret; |
| 61175 | } | 60694 | } |
| 61176 | #endif | 60695 | #endif |
| 61177 | | 60696 | |
| 61178 | #ifdef __LITTLE_ENDIAN__ | 60697 | #ifdef __LITTLE_ENDIAN__ |
| 61179 | __ai uint8x8_t vqtbl2_u8(uint8x16x2_t __p0, uint8x8_t __p1) { | 60698 | __ai int32x2_t vtrn1_s32(int32x2_t __p0, int32x2_t __p1) { |
| 61180 | uint8x8_t __ret; | 60699 | int32x2_t __ret; |
| 61181 | __ret = (uint8x8_t) __builtin_neon_vqtbl2_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x8_t)__p1, 16); | 60700 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 61182 | return __ret; | 60701 | return __ret; |
| 61183 | } | 60702 | } |
| 61184 | #else | 60703 | #else |
| 61185 | __ai uint8x8_t vqtbl2_u8(uint8x16x2_t __p0, uint8x8_t __p1) { | 60704 | __ai int32x2_t vtrn1_s32(int32x2_t __p0, int32x2_t __p1) { |
| 61186 | uint8x8_t __ret; | 60705 | int32x2_t __ret; |
| 61187 | uint8x16x2_t __rev0; | 60706 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61188 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60707 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61189 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60708 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| 61190 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 60709 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61191 | __ret = (uint8x8_t) __builtin_neon_vqtbl2_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x8_t)__rev1, 16); | | |
| 61192 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61193 | return __ret; | 60710 | return __ret; |
| 61194 | } | 60711 | } |
| 61195 | #endif | 60712 | #endif |
| 61196 | | 60713 | |
| 61197 | #ifdef __LITTLE_ENDIAN__ | 60714 | #ifdef __LITTLE_ENDIAN__ |
| 61198 | __ai int8x8_t vqtbl2_s8(int8x16x2_t __p0, uint8x8_t __p1) { | 60715 | __ai int16x4_t vtrn1_s16(int16x4_t __p0, int16x4_t __p1) { |
| 61199 | int8x8_t __ret; | 60716 | int16x4_t __ret; |
| 61200 | __ret = (int8x8_t) __builtin_neon_vqtbl2_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x8_t)__p1, 0); | 60717 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 2, 6); |
| 61201 | return __ret; | 60718 | return __ret; |
| 61202 | } | 60719 | } |
| 61203 | #else | 60720 | #else |
| 61204 | __ai int8x8_t vqtbl2_s8(int8x16x2_t __p0, uint8x8_t __p1) { | 60721 | __ai int16x4_t vtrn1_s16(int16x4_t __p0, int16x4_t __p1) { |
| 61205 | int8x8_t __ret; | 60722 | int16x4_t __ret; |
| 61206 | int8x16x2_t __rev0; | 60723 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 61207 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60724 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 61208 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60725 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 2, 6); |
| 61209 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 60726 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 61210 | __ret = (int8x8_t) __builtin_neon_vqtbl2_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x8_t)__rev1, 0); | | |
| 61211 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61212 | return __ret; | 60727 | return __ret; |
| 61213 | } | 60728 | } |
| 61214 | #endif | 60729 | #endif |
| 61215 | | 60730 | |
| 61216 | #ifdef __LITTLE_ENDIAN__ | 60731 | #ifdef __LITTLE_ENDIAN__ |
| 61217 | __ai poly8x8_t vqtbl3_p8(poly8x16x3_t __p0, uint8x8_t __p1) { | 60732 | __ai poly8x8_t vtrn2_p8(poly8x8_t __p0, poly8x8_t __p1) { |
| 61218 | poly8x8_t __ret; | 60733 | poly8x8_t __ret; |
| 61219 | __ret = (poly8x8_t) __builtin_neon_vqtbl3_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x8_t)__p1, 4); | 60734 | __ret = __builtin_shufflevector(__p0, __p1, 1, 9, 3, 11, 5, 13, 7, 15); |
| 61220 | return __ret; | 60735 | return __ret; |
| 61221 | } | 60736 | } |
| 61222 | #else | 60737 | #else |
| 61223 | __ai poly8x8_t vqtbl3_p8(poly8x16x3_t __p0, uint8x8_t __p1) { | 60738 | __ai poly8x8_t vtrn2_p8(poly8x8_t __p0, poly8x8_t __p1) { |
| 61224 | poly8x8_t __ret; | 60739 | poly8x8_t __ret; |
| 61225 | poly8x16x3_t __rev0; | 60740 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61226 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60741 | poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61227 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60742 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 9, 3, 11, 5, 13, 7, 15); |
| 61228 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61229 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61230 | __ret = (poly8x8_t) __builtin_neon_vqtbl3_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x8_t)__rev1, 4); | | |
| 61231 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 60743 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61232 | return __ret; | 60744 | return __ret; |
| 61233 | } | 60745 | } |
| 61234 | #endif | 60746 | #endif |
| 61235 | | 60747 | |
| 61236 | #ifdef __LITTLE_ENDIAN__ | 60748 | #ifdef __LITTLE_ENDIAN__ |
| 61237 | __ai poly8x16_t vqtbl3q_p8(poly8x16x3_t __p0, uint8x16_t __p1) { | 60749 | __ai poly16x4_t vtrn2_p16(poly16x4_t __p0, poly16x4_t __p1) { |
| 61238 | poly8x16_t __ret; | 60750 | poly16x4_t __ret; |
| 61239 | __ret = (poly8x16_t) __builtin_neon_vqtbl3q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p1, 36); | 60751 | __ret = __builtin_shufflevector(__p0, __p1, 1, 5, 3, 7); |
| 61240 | return __ret; | 60752 | return __ret; |
| 61241 | } | 60753 | } |
| 61242 | #else | 60754 | #else |
| 61243 | __ai poly8x16_t vqtbl3q_p8(poly8x16x3_t __p0, uint8x16_t __p1) { | 60755 | __ai poly16x4_t vtrn2_p16(poly16x4_t __p0, poly16x4_t __p1) { |
| 61244 | poly8x16_t __ret; | 60756 | poly16x4_t __ret; |
| 61245 | poly8x16x3_t __rev0; | 60757 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 61246 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60758 | poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 61247 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60759 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 5, 3, 7); |
| 61248 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60760 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 61249 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61250 | __ret = (poly8x16_t) __builtin_neon_vqtbl3q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev1, 36); | | |
| 61251 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61252 | return __ret; | 60761 | return __ret; |
| 61253 | } | 60762 | } |
| 61254 | #endif | 60763 | #endif |
| 61255 | | 60764 | |
| 61256 | #ifdef __LITTLE_ENDIAN__ | 60765 | #ifdef __LITTLE_ENDIAN__ |
| 61257 | __ai uint8x16_t vqtbl3q_u8(uint8x16x3_t __p0, uint8x16_t __p1) { | 60766 | __ai poly8x16_t vtrn2q_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| 61258 | uint8x16_t __ret; | 60767 | poly8x16_t __ret; |
| 61259 | __ret = (uint8x16_t) __builtin_neon_vqtbl3q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p1, 48); | 60768 | __ret = __builtin_shufflevector(__p0, __p1, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31); |
| 61260 | return __ret; | 60769 | return __ret; |
| 61261 | } | 60770 | } |
| 61262 | #else | 60771 | #else |
| 61263 | __ai uint8x16_t vqtbl3q_u8(uint8x16x3_t __p0, uint8x16_t __p1) { | 60772 | __ai poly8x16_t vtrn2q_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| 61264 | uint8x16_t __ret; | 60773 | poly8x16_t __ret; |
| 61265 | uint8x16x3_t __rev0; | 60774 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61266 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60775 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61267 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60776 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31); |
| 61268 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61269 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61270 | __ret = (uint8x16_t) __builtin_neon_vqtbl3q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev1, 48); | | |
| 61271 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60777 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61272 | return __ret; | 60778 | return __ret; |
| 61273 | } | 60779 | } |
| 61274 | #endif | 60780 | #endif |
| 61275 | | 60781 | |
| 61276 | #ifdef __LITTLE_ENDIAN__ | 60782 | #ifdef __LITTLE_ENDIAN__ |
| 61277 | __ai int8x16_t vqtbl3q_s8(int8x16x3_t __p0, uint8x16_t __p1) { | 60783 | __ai poly64x2_t vtrn2q_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 61278 | int8x16_t __ret; | 60784 | poly64x2_t __ret; |
| 61279 | __ret = (int8x16_t) __builtin_neon_vqtbl3q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p1, 32); | 60785 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 61280 | return __ret; | 60786 | return __ret; |
| 61281 | } | 60787 | } |
| 61282 | #else | 60788 | #else |
| 61283 | __ai int8x16_t vqtbl3q_s8(int8x16x3_t __p0, uint8x16_t __p1) { | 60789 | __ai poly64x2_t vtrn2q_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 61284 | int8x16_t __ret; | 60790 | poly64x2_t __ret; |
| 61285 | int8x16x3_t __rev0; | 60791 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61286 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60792 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61287 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60793 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 61288 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60794 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61289 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61290 | __ret = (int8x16_t) __builtin_neon_vqtbl3q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev1, 32); | | |
| 61291 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61292 | return __ret; | 60795 | return __ret; |
| 61293 | } | 60796 | } |
| 61294 | #endif | 60797 | #endif |
| 61295 | | 60798 | |
| 61296 | #ifdef __LITTLE_ENDIAN__ | 60799 | #ifdef __LITTLE_ENDIAN__ |
| 61297 | __ai uint8x8_t vqtbl3_u8(uint8x16x3_t __p0, uint8x8_t __p1) { | 60800 | __ai poly16x8_t vtrn2q_p16(poly16x8_t __p0, poly16x8_t __p1) { |
| 61298 | uint8x8_t __ret; | 60801 | poly16x8_t __ret; |
| 61299 | __ret = (uint8x8_t) __builtin_neon_vqtbl3_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x8_t)__p1, 16); | 60802 | __ret = __builtin_shufflevector(__p0, __p1, 1, 9, 3, 11, 5, 13, 7, 15); |
| 61300 | return __ret; | 60803 | return __ret; |
| 61301 | } | 60804 | } |
| 61302 | #else | 60805 | #else |
| 61303 | __ai uint8x8_t vqtbl3_u8(uint8x16x3_t __p0, uint8x8_t __p1) { | 60806 | __ai poly16x8_t vtrn2q_p16(poly16x8_t __p0, poly16x8_t __p1) { |
| 61304 | uint8x8_t __ret; | 60807 | poly16x8_t __ret; |
| 61305 | uint8x16x3_t __rev0; | 60808 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61306 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60809 | poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61307 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60810 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 9, 3, 11, 5, 13, 7, 15); |
| 61308 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61309 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61310 | __ret = (uint8x8_t) __builtin_neon_vqtbl3_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x8_t)__rev1, 16); | | |
| 61311 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 60811 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61312 | return __ret; | 60812 | return __ret; |
| 61313 | } | 60813 | } |
| 61314 | #endif | 60814 | #endif |
| 61315 | | 60815 | |
| 61316 | #ifdef __LITTLE_ENDIAN__ | 60816 | #ifdef __LITTLE_ENDIAN__ |
| 61317 | __ai int8x8_t vqtbl3_s8(int8x16x3_t __p0, uint8x8_t __p1) { | 60817 | __ai uint8x16_t vtrn2q_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 61318 | int8x8_t __ret; | 60818 | uint8x16_t __ret; |
| 61319 | __ret = (int8x8_t) __builtin_neon_vqtbl3_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x8_t)__p1, 0); | 60819 | __ret = __builtin_shufflevector(__p0, __p1, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31); |
| 61320 | return __ret; | 60820 | return __ret; |
| 61321 | } | 60821 | } |
| 61322 | #else | 60822 | #else |
| 61323 | __ai int8x8_t vqtbl3_s8(int8x16x3_t __p0, uint8x8_t __p1) { | 60823 | __ai uint8x16_t vtrn2q_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 61324 | int8x8_t __ret; | 60824 | uint8x16_t __ret; |
| 61325 | int8x16x3_t __rev0; | 60825 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61326 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60826 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61327 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60827 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31); |
| 61328 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60828 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61329 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61330 | __ret = (int8x8_t) __builtin_neon_vqtbl3_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x8_t)__rev1, 0); | | |
| 61331 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61332 | return __ret; | 60829 | return __ret; |
| 61333 | } | 60830 | } |
| 61334 | #endif | 60831 | #endif |
| 61335 | | 60832 | |
| 61336 | #ifdef __LITTLE_ENDIAN__ | 60833 | #ifdef __LITTLE_ENDIAN__ |
| 61337 | __ai poly8x8_t vqtbl4_p8(poly8x16x4_t __p0, uint8x8_t __p1) { | 60834 | __ai uint32x4_t vtrn2q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 61338 | poly8x8_t __ret; | 60835 | uint32x4_t __ret; |
| 61339 | __ret = (poly8x8_t) __builtin_neon_vqtbl4_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p0.val[3], (int8x8_t)__p1, 4); | 60836 | __ret = __builtin_shufflevector(__p0, __p1, 1, 5, 3, 7); |
| 61340 | return __ret; | 60837 | return __ret; |
| 61341 | } | 60838 | } |
| 61342 | #else | 60839 | #else |
| 61343 | __ai poly8x8_t vqtbl4_p8(poly8x16x4_t __p0, uint8x8_t __p1) { | 60840 | __ai uint32x4_t vtrn2q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 61344 | poly8x8_t __ret; | 60841 | uint32x4_t __ret; |
| 61345 | poly8x16x4_t __rev0; | 60842 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 61346 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60843 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 61347 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60844 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 5, 3, 7); |
| 61348 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60845 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 61349 | __rev0.val[3] = __builtin_shufflevector(__p0.val[3], __p0.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61350 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61351 | __ret = (poly8x8_t) __builtin_neon_vqtbl4_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev0.val[3], (int8x8_t)__rev1, 4); | | |
| 61352 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61353 | return __ret; | 60846 | return __ret; |
| 61354 | } | 60847 | } |
| 61355 | #endif | 60848 | #endif |
| 61356 | | 60849 | |
| 61357 | #ifdef __LITTLE_ENDIAN__ | 60850 | #ifdef __LITTLE_ENDIAN__ |
| 61358 | __ai poly8x16_t vqtbl4q_p8(poly8x16x4_t __p0, uint8x16_t __p1) { | 60851 | __ai uint64x2_t vtrn2q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 61359 | poly8x16_t __ret; | 60852 | uint64x2_t __ret; |
| 61360 | __ret = (poly8x16_t) __builtin_neon_vqtbl4q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p0.val[3], (int8x16_t)__p1, 36); | 60853 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 61361 | return __ret; | 60854 | return __ret; |
| 61362 | } | 60855 | } |
| 61363 | #else | 60856 | #else |
| 61364 | __ai poly8x16_t vqtbl4q_p8(poly8x16x4_t __p0, uint8x16_t __p1) { | 60857 | __ai uint64x2_t vtrn2q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 61365 | poly8x16_t __ret; | 60858 | uint64x2_t __ret; |
| 61366 | poly8x16x4_t __rev0; | 60859 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61367 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60860 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61368 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60861 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 61369 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60862 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61370 | __rev0.val[3] = __builtin_shufflevector(__p0.val[3], __p0.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61371 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61372 | __ret = (poly8x16_t) __builtin_neon_vqtbl4q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev0.val[3], (int8x16_t)__rev1, 36); | | |
| 61373 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61374 | return __ret; | 60863 | return __ret; |
| 61375 | } | 60864 | } |
| 61376 | #endif | 60865 | #endif |
| 61377 | | 60866 | |
| 61378 | #ifdef __LITTLE_ENDIAN__ | 60867 | #ifdef __LITTLE_ENDIAN__ |
| 61379 | __ai uint8x16_t vqtbl4q_u8(uint8x16x4_t __p0, uint8x16_t __p1) { | 60868 | __ai uint16x8_t vtrn2q_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 61380 | uint8x16_t __ret; | 60869 | uint16x8_t __ret; |
| 61381 | __ret = (uint8x16_t) __builtin_neon_vqtbl4q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p0.val[3], (int8x16_t)__p1, 48); | 60870 | __ret = __builtin_shufflevector(__p0, __p1, 1, 9, 3, 11, 5, 13, 7, 15); |
| 61382 | return __ret; | 60871 | return __ret; |
| 61383 | } | 60872 | } |
| 61384 | #else | 60873 | #else |
| 61385 | __ai uint8x16_t vqtbl4q_u8(uint8x16x4_t __p0, uint8x16_t __p1) { | 60874 | __ai uint16x8_t vtrn2q_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 61386 | uint8x16_t __ret; | 60875 | uint16x8_t __ret; |
| 61387 | uint8x16x4_t __rev0; | 60876 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61388 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60877 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61389 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60878 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 9, 3, 11, 5, 13, 7, 15); |
| 61390 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60879 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61391 | __rev0.val[3] = __builtin_shufflevector(__p0.val[3], __p0.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61392 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61393 | __ret = (uint8x16_t) __builtin_neon_vqtbl4q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev0.val[3], (int8x16_t)__rev1, 48); | | |
| 61394 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61395 | return __ret; | 60880 | return __ret; |
| 61396 | } | 60881 | } |
| 61397 | #endif | 60882 | #endif |
| 61398 | | 60883 | |
| 61399 | #ifdef __LITTLE_ENDIAN__ | 60884 | #ifdef __LITTLE_ENDIAN__ |
| 61400 | __ai int8x16_t vqtbl4q_s8(int8x16x4_t __p0, uint8x16_t __p1) { | 60885 | __ai int8x16_t vtrn2q_s8(int8x16_t __p0, int8x16_t __p1) { |
| 61401 | int8x16_t __ret; | 60886 | int8x16_t __ret; |
| 61402 | __ret = (int8x16_t) __builtin_neon_vqtbl4q_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p0.val[3], (int8x16_t)__p1, 32); | 60887 | __ret = __builtin_shufflevector(__p0, __p1, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31); |
| 61403 | return __ret; | 60888 | return __ret; |
| 61404 | } | 60889 | } |
| 61405 | #else | 60890 | #else |
| 61406 | __ai int8x16_t vqtbl4q_s8(int8x16x4_t __p0, uint8x16_t __p1) { | 60891 | __ai int8x16_t vtrn2q_s8(int8x16_t __p0, int8x16_t __p1) { |
| 61407 | int8x16_t __ret; | 60892 | int8x16_t __ret; |
| 61408 | int8x16x4_t __rev0; | 60893 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61409 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60894 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61410 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60895 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31); |
| 61411 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61412 | __rev0.val[3] = __builtin_shufflevector(__p0.val[3], __p0.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61413 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61414 | __ret = (int8x16_t) __builtin_neon_vqtbl4q_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev0.val[3], (int8x16_t)__rev1, 32); | | |
| 61415 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60896 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61416 | return __ret; | 60897 | return __ret; |
| 61417 | } | 60898 | } |
| 61418 | #endif | 60899 | #endif |
| 61419 | | 60900 | |
| 61420 | #ifdef __LITTLE_ENDIAN__ | 60901 | #ifdef __LITTLE_ENDIAN__ |
| 61421 | __ai uint8x8_t vqtbl4_u8(uint8x16x4_t __p0, uint8x8_t __p1) { | 60902 | __ai float64x2_t vtrn2q_f64(float64x2_t __p0, float64x2_t __p1) { |
| 61422 | uint8x8_t __ret; | 60903 | float64x2_t __ret; |
| 61423 | __ret = (uint8x8_t) __builtin_neon_vqtbl4_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p0.val[3], (int8x8_t)__p1, 16); | 60904 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 61424 | return __ret; | 60905 | return __ret; |
| 61425 | } | 60906 | } |
| 61426 | #else | 60907 | #else |
| 61427 | __ai uint8x8_t vqtbl4_u8(uint8x16x4_t __p0, uint8x8_t __p1) { | 60908 | __ai float64x2_t vtrn2q_f64(float64x2_t __p0, float64x2_t __p1) { |
| 61428 | uint8x8_t __ret; | 60909 | float64x2_t __ret; |
| 61429 | uint8x16x4_t __rev0; | 60910 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61430 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60911 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61431 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60912 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 61432 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60913 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61433 | __rev0.val[3] = __builtin_shufflevector(__p0.val[3], __p0.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61434 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61435 | __ret = (uint8x8_t) __builtin_neon_vqtbl4_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev0.val[3], (int8x8_t)__rev1, 16); | | |
| 61436 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61437 | return __ret; | 60914 | return __ret; |
| 61438 | } | 60915 | } |
| 61439 | #endif | 60916 | #endif |
| 61440 | | 60917 | |
| 61441 | #ifdef __LITTLE_ENDIAN__ | 60918 | #ifdef __LITTLE_ENDIAN__ |
| 61442 | __ai int8x8_t vqtbl4_s8(int8x16x4_t __p0, uint8x8_t __p1) { | 60919 | __ai float32x4_t vtrn2q_f32(float32x4_t __p0, float32x4_t __p1) { |
| 61443 | int8x8_t __ret; | 60920 | float32x4_t __ret; |
| 61444 | __ret = (int8x8_t) __builtin_neon_vqtbl4_v((int8x16_t)__p0.val[0], (int8x16_t)__p0.val[1], (int8x16_t)__p0.val[2], (int8x16_t)__p0.val[3], (int8x8_t)__p1, 0); | 60921 | __ret = __builtin_shufflevector(__p0, __p1, 1, 5, 3, 7); |
| 61445 | return __ret; | 60922 | return __ret; |
| 61446 | } | 60923 | } |
| 61447 | #else | 60924 | #else |
| 61448 | __ai int8x8_t vqtbl4_s8(int8x16x4_t __p0, uint8x8_t __p1) { | 60925 | __ai float32x4_t vtrn2q_f32(float32x4_t __p0, float32x4_t __p1) { |
| 61449 | int8x8_t __ret; | 60926 | float32x4_t __ret; |
| 61450 | int8x16x4_t __rev0; | 60927 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 61451 | __rev0.val[0] = __builtin_shufflevector(__p0.val[0], __p0.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60928 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 61452 | __rev0.val[1] = __builtin_shufflevector(__p0.val[1], __p0.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60929 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 5, 3, 7); |
| 61453 | __rev0.val[2] = __builtin_shufflevector(__p0.val[2], __p0.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60930 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 61454 | __rev0.val[3] = __builtin_shufflevector(__p0.val[3], __p0.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61455 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61456 | __ret = (int8x8_t) __builtin_neon_vqtbl4_v((int8x16_t)__rev0.val[0], (int8x16_t)__rev0.val[1], (int8x16_t)__rev0.val[2], (int8x16_t)__rev0.val[3], (int8x8_t)__rev1, 0); | | |
| 61457 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61458 | return __ret; | 60931 | return __ret; |
| 61459 | } | 60932 | } |
| 61460 | #endif | 60933 | #endif |
| 61461 | | 60934 | |
| 61462 | #ifdef __LITTLE_ENDIAN__ | 60935 | #ifdef __LITTLE_ENDIAN__ |
| 61463 | __ai poly8x8_t vqtbx1_p8(poly8x8_t __p0, poly8x16_t __p1, uint8x8_t __p2) { | 60936 | __ai int32x4_t vtrn2q_s32(int32x4_t __p0, int32x4_t __p1) { |
| 61464 | poly8x8_t __ret; | 60937 | int32x4_t __ret; |
| 61465 | __ret = (poly8x8_t) __builtin_neon_vqtbx1_v((int8x8_t)__p0, (int8x16_t)__p1, (int8x8_t)__p2, 4); | 60938 | __ret = __builtin_shufflevector(__p0, __p1, 1, 5, 3, 7); |
| 61466 | return __ret; | 60939 | return __ret; |
| 61467 | } | 60940 | } |
| 61468 | #else | 60941 | #else |
| 61469 | __ai poly8x8_t vqtbx1_p8(poly8x8_t __p0, poly8x16_t __p1, uint8x8_t __p2) { | 60942 | __ai int32x4_t vtrn2q_s32(int32x4_t __p0, int32x4_t __p1) { |
| 61470 | poly8x8_t __ret; | 60943 | int32x4_t __ret; |
| 61471 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 60944 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 61472 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60945 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 61473 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 60946 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 5, 3, 7); |
| 61474 | __ret = (poly8x8_t) __builtin_neon_vqtbx1_v((int8x8_t)__rev0, (int8x16_t)__rev1, (int8x8_t)__rev2, 4); | 60947 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 61475 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 60948 | return __ret; |
| | 60949 | } |
| | 60950 | #endif |
| | 60951 | |
| | 60952 | #ifdef __LITTLE_ENDIAN__ |
| | 60953 | __ai int64x2_t vtrn2q_s64(int64x2_t __p0, int64x2_t __p1) { |
| | 60954 | int64x2_t __ret; |
| | 60955 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| | 60956 | return __ret; |
| | 60957 | } |
| | 60958 | #else |
| | 60959 | __ai int64x2_t vtrn2q_s64(int64x2_t __p0, int64x2_t __p1) { |
| | 60960 | int64x2_t __ret; |
| | 60961 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 60962 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 60963 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| | 60964 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61476 | return __ret; | 60965 | return __ret; |
| 61477 | } | 60966 | } |
| 61478 | #endif | 60967 | #endif |
| 61479 | | 60968 | |
| 61480 | #ifdef __LITTLE_ENDIAN__ | 60969 | #ifdef __LITTLE_ENDIAN__ |
| 61481 | __ai poly8x16_t vqtbx1q_p8(poly8x16_t __p0, poly8x16_t __p1, uint8x16_t __p2) { | 60970 | __ai int16x8_t vtrn2q_s16(int16x8_t __p0, int16x8_t __p1) { |
| 61482 | poly8x16_t __ret; | 60971 | int16x8_t __ret; |
| 61483 | __ret = (poly8x16_t) __builtin_neon_vqtbx1q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 36); | 60972 | __ret = __builtin_shufflevector(__p0, __p1, 1, 9, 3, 11, 5, 13, 7, 15); |
| 61484 | return __ret; | 60973 | return __ret; |
| 61485 | } | 60974 | } |
| 61486 | #else | 60975 | #else |
| 61487 | __ai poly8x16_t vqtbx1q_p8(poly8x16_t __p0, poly8x16_t __p1, uint8x16_t __p2) { | 60976 | __ai int16x8_t vtrn2q_s16(int16x8_t __p0, int16x8_t __p1) { |
| 61488 | poly8x16_t __ret; | 60977 | int16x8_t __ret; |
| 61489 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60978 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61490 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60979 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61491 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60980 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 9, 3, 11, 5, 13, 7, 15); |
| 61492 | __ret = (poly8x16_t) __builtin_neon_vqtbx1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 36); | 60981 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61493 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61494 | return __ret; | 60982 | return __ret; |
| 61495 | } | 60983 | } |
| 61496 | #endif | 60984 | #endif |
| 61497 | | 60985 | |
| 61498 | #ifdef __LITTLE_ENDIAN__ | 60986 | #ifdef __LITTLE_ENDIAN__ |
| 61499 | __ai uint8x16_t vqtbx1q_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) { | 60987 | __ai uint8x8_t vtrn2_u8(uint8x8_t __p0, uint8x8_t __p1) { |
| 61500 | uint8x16_t __ret; | 60988 | uint8x8_t __ret; |
| 61501 | __ret = (uint8x16_t) __builtin_neon_vqtbx1q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 48); | 60989 | __ret = __builtin_shufflevector(__p0, __p1, 1, 9, 3, 11, 5, 13, 7, 15); |
| 61502 | return __ret; | 60990 | return __ret; |
| 61503 | } | 60991 | } |
| 61504 | #else | 60992 | #else |
| 61505 | __ai uint8x16_t vqtbx1q_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) { | 60993 | __ai uint8x8_t vtrn2_u8(uint8x8_t __p0, uint8x8_t __p1) { |
| 61506 | uint8x16_t __ret; | 60994 | uint8x8_t __ret; |
| 61507 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60995 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61508 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60996 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61509 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 60997 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 9, 3, 11, 5, 13, 7, 15); |
| 61510 | __ret = (uint8x16_t) __builtin_neon_vqtbx1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 48); | 60998 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61511 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61512 | return __ret; | 60999 | return __ret; |
| 61513 | } | 61000 | } |
| 61514 | #endif | 61001 | #endif |
| 61515 | | 61002 | |
| 61516 | #ifdef __LITTLE_ENDIAN__ | 61003 | #ifdef __LITTLE_ENDIAN__ |
| 61517 | __ai int8x16_t vqtbx1q_s8(int8x16_t __p0, int8x16_t __p1, uint8x16_t __p2) { | 61004 | __ai uint32x2_t vtrn2_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 61518 | int8x16_t __ret; | 61005 | uint32x2_t __ret; |
| 61519 | __ret = (int8x16_t) __builtin_neon_vqtbx1q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 32); | 61006 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 61520 | return __ret; | 61007 | return __ret; |
| 61521 | } | 61008 | } |
| 61522 | #else | 61009 | #else |
| 61523 | __ai int8x16_t vqtbx1q_s8(int8x16_t __p0, int8x16_t __p1, uint8x16_t __p2) { | 61010 | __ai uint32x2_t vtrn2_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 61524 | int8x16_t __ret; | 61011 | uint32x2_t __ret; |
| 61525 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61012 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61526 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61013 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61527 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61014 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 61528 | __ret = (int8x16_t) __builtin_neon_vqtbx1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 32); | 61015 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61529 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61530 | return __ret; | 61016 | return __ret; |
| 61531 | } | 61017 | } |
| 61532 | #endif | 61018 | #endif |
| 61533 | | 61019 | |
| 61534 | #ifdef __LITTLE_ENDIAN__ | 61020 | #ifdef __LITTLE_ENDIAN__ |
| 61535 | __ai uint8x8_t vqtbx1_u8(uint8x8_t __p0, uint8x16_t __p1, uint8x8_t __p2) { | 61021 | __ai uint16x4_t vtrn2_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 61536 | uint8x8_t __ret; | 61022 | uint16x4_t __ret; |
| 61537 | __ret = (uint8x8_t) __builtin_neon_vqtbx1_v((int8x8_t)__p0, (int8x16_t)__p1, (int8x8_t)__p2, 16); | 61023 | __ret = __builtin_shufflevector(__p0, __p1, 1, 5, 3, 7); |
| 61538 | return __ret; | 61024 | return __ret; |
| 61539 | } | 61025 | } |
| 61540 | #else | 61026 | #else |
| 61541 | __ai uint8x8_t vqtbx1_u8(uint8x8_t __p0, uint8x16_t __p1, uint8x8_t __p2) { | 61027 | __ai uint16x4_t vtrn2_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 61542 | uint8x8_t __ret; | 61028 | uint16x4_t __ret; |
| 61543 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61029 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 61544 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61030 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 61545 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 61031 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 5, 3, 7); |
| 61546 | __ret = (uint8x8_t) __builtin_neon_vqtbx1_v((int8x8_t)__rev0, (int8x16_t)__rev1, (int8x8_t)__rev2, 16); | 61032 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 61547 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61548 | return __ret; | 61033 | return __ret; |
| 61549 | } | 61034 | } |
| 61550 | #endif | 61035 | #endif |
| 61551 | | 61036 | |
| 61552 | #ifdef __LITTLE_ENDIAN__ | 61037 | #ifdef __LITTLE_ENDIAN__ |
| 61553 | __ai int8x8_t vqtbx1_s8(int8x8_t __p0, int8x16_t __p1, uint8x8_t __p2) { | 61038 | __ai int8x8_t vtrn2_s8(int8x8_t __p0, int8x8_t __p1) { |
| 61554 | int8x8_t __ret; | 61039 | int8x8_t __ret; |
| 61555 | __ret = (int8x8_t) __builtin_neon_vqtbx1_v((int8x8_t)__p0, (int8x16_t)__p1, (int8x8_t)__p2, 0); | 61040 | __ret = __builtin_shufflevector(__p0, __p1, 1, 9, 3, 11, 5, 13, 7, 15); |
| 61556 | return __ret; | 61041 | return __ret; |
| 61557 | } | 61042 | } |
| 61558 | #else | 61043 | #else |
| 61559 | __ai int8x8_t vqtbx1_s8(int8x8_t __p0, int8x16_t __p1, uint8x8_t __p2) { | 61044 | __ai int8x8_t vtrn2_s8(int8x8_t __p0, int8x8_t __p1) { |
| 61560 | int8x8_t __ret; | 61045 | int8x8_t __ret; |
| 61561 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61046 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61562 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61047 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61563 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 61048 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 9, 3, 11, 5, 13, 7, 15); |
| 61564 | __ret = (int8x8_t) __builtin_neon_vqtbx1_v((int8x8_t)__rev0, (int8x16_t)__rev1, (int8x8_t)__rev2, 0); | | |
| 61565 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 61049 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61566 | return __ret; | 61050 | return __ret; |
| 61567 | } | 61051 | } |
| 61568 | #endif | 61052 | #endif |
| 61569 | | 61053 | |
| 61570 | #ifdef __LITTLE_ENDIAN__ | 61054 | #ifdef __LITTLE_ENDIAN__ |
| 61571 | __ai poly8x8_t vqtbx2_p8(poly8x8_t __p0, poly8x16x2_t __p1, uint8x8_t __p2) { | 61055 | __ai float32x2_t vtrn2_f32(float32x2_t __p0, float32x2_t __p1) { |
| 61572 | poly8x8_t __ret; | 61056 | float32x2_t __ret; |
| 61573 | __ret = (poly8x8_t) __builtin_neon_vqtbx2_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x8_t)__p2, 4); | 61057 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 61574 | return __ret; | 61058 | return __ret; |
| 61575 | } | 61059 | } |
| 61576 | #else | 61060 | #else |
| 61577 | __ai poly8x8_t vqtbx2_p8(poly8x8_t __p0, poly8x16x2_t __p1, uint8x8_t __p2) { | 61061 | __ai float32x2_t vtrn2_f32(float32x2_t __p0, float32x2_t __p1) { |
| 61578 | poly8x8_t __ret; | 61062 | float32x2_t __ret; |
| 61579 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61063 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61580 | poly8x16x2_t __rev1; | 61064 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61581 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61065 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 61582 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61066 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61583 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61584 | __ret = (poly8x8_t) __builtin_neon_vqtbx2_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x8_t)__rev2, 4); | | |
| 61585 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61586 | return __ret; | 61067 | return __ret; |
| 61587 | } | 61068 | } |
| 61588 | #endif | 61069 | #endif |
| 61589 | | 61070 | |
| 61590 | #ifdef __LITTLE_ENDIAN__ | 61071 | #ifdef __LITTLE_ENDIAN__ |
| 61591 | __ai poly8x16_t vqtbx2q_p8(poly8x16_t __p0, poly8x16x2_t __p1, uint8x16_t __p2) { | 61072 | __ai int32x2_t vtrn2_s32(int32x2_t __p0, int32x2_t __p1) { |
| 61592 | poly8x16_t __ret; | 61073 | int32x2_t __ret; |
| 61593 | __ret = (poly8x16_t) __builtin_neon_vqtbx2q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p2, 36); | 61074 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 61594 | return __ret; | 61075 | return __ret; |
| 61595 | } | 61076 | } |
| 61596 | #else | 61077 | #else |
| 61597 | __ai poly8x16_t vqtbx2q_p8(poly8x16_t __p0, poly8x16x2_t __p1, uint8x16_t __p2) { | 61078 | __ai int32x2_t vtrn2_s32(int32x2_t __p0, int32x2_t __p1) { |
| 61598 | poly8x16_t __ret; | 61079 | int32x2_t __ret; |
| 61599 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61080 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61600 | poly8x16x2_t __rev1; | 61081 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61601 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61082 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 61602 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61083 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61603 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61604 | __ret = (poly8x16_t) __builtin_neon_vqtbx2q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev2, 36); | | |
| 61605 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61606 | return __ret; | 61084 | return __ret; |
| 61607 | } | 61085 | } |
| 61608 | #endif | 61086 | #endif |
| 61609 | | 61087 | |
| 61610 | #ifdef __LITTLE_ENDIAN__ | 61088 | #ifdef __LITTLE_ENDIAN__ |
| 61611 | __ai uint8x16_t vqtbx2q_u8(uint8x16_t __p0, uint8x16x2_t __p1, uint8x16_t __p2) { | 61089 | __ai int16x4_t vtrn2_s16(int16x4_t __p0, int16x4_t __p1) { |
| 61612 | uint8x16_t __ret; | 61090 | int16x4_t __ret; |
| 61613 | __ret = (uint8x16_t) __builtin_neon_vqtbx2q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p2, 48); | 61091 | __ret = __builtin_shufflevector(__p0, __p1, 1, 5, 3, 7); |
| 61614 | return __ret; | 61092 | return __ret; |
| 61615 | } | 61093 | } |
| 61616 | #else | 61094 | #else |
| 61617 | __ai uint8x16_t vqtbx2q_u8(uint8x16_t __p0, uint8x16x2_t __p1, uint8x16_t __p2) { | 61095 | __ai int16x4_t vtrn2_s16(int16x4_t __p0, int16x4_t __p1) { |
| 61618 | uint8x16_t __ret; | 61096 | int16x4_t __ret; |
| 61619 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61097 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 61620 | uint8x16x2_t __rev1; | 61098 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 61621 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61099 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 5, 3, 7); |
| 61622 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61100 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 61623 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61624 | __ret = (uint8x16_t) __builtin_neon_vqtbx2q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev2, 48); | | |
| 61625 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61626 | return __ret; | 61101 | return __ret; |
| 61627 | } | 61102 | } |
| 61628 | #endif | 61103 | #endif |
| 61629 | | 61104 | |
| | 61105 | __ai uint64x1_t vtst_p64(poly64x1_t __p0, poly64x1_t __p1) { |
| | 61106 | uint64x1_t __ret; |
| | 61107 | __ret = (uint64x1_t) __builtin_neon_vtst_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| | 61108 | return __ret; |
| | 61109 | } |
| 61630 | #ifdef __LITTLE_ENDIAN__ | 61110 | #ifdef __LITTLE_ENDIAN__ |
| 61631 | __ai int8x16_t vqtbx2q_s8(int8x16_t __p0, int8x16x2_t __p1, uint8x16_t __p2) { | 61111 | __ai uint64x2_t vtstq_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 61632 | int8x16_t __ret; | 61112 | uint64x2_t __ret; |
| 61633 | __ret = (int8x16_t) __builtin_neon_vqtbx2q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p2, 32); | 61113 | __ret = (uint64x2_t) __builtin_neon_vtstq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); |
| 61634 | return __ret; | 61114 | return __ret; |
| 61635 | } | 61115 | } |
| 61636 | #else | 61116 | #else |
| 61637 | __ai int8x16_t vqtbx2q_s8(int8x16_t __p0, int8x16x2_t __p1, uint8x16_t __p2) { | 61117 | __ai uint64x2_t vtstq_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 61638 | int8x16_t __ret; | 61118 | uint64x2_t __ret; |
| 61639 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61119 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61640 | int8x16x2_t __rev1; | 61120 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61641 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61121 | __ret = (uint64x2_t) __builtin_neon_vtstq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); |
| 61642 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61122 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61643 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61644 | __ret = (int8x16_t) __builtin_neon_vqtbx2q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev2, 32); | | |
| 61645 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61646 | return __ret; | 61123 | return __ret; |
| 61647 | } | 61124 | } |
| 61648 | #endif | 61125 | #endif |
| 61649 | | 61126 | |
| 61650 | #ifdef __LITTLE_ENDIAN__ | 61127 | #ifdef __LITTLE_ENDIAN__ |
| 61651 | __ai uint8x8_t vqtbx2_u8(uint8x8_t __p0, uint8x16x2_t __p1, uint8x8_t __p2) { | 61128 | __ai uint64x2_t vtstq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 61652 | uint8x8_t __ret; | 61129 | uint64x2_t __ret; |
| 61653 | __ret = (uint8x8_t) __builtin_neon_vqtbx2_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x8_t)__p2, 16); | 61130 | __ret = (uint64x2_t) __builtin_neon_vtstq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); |
| 61654 | return __ret; | 61131 | return __ret; |
| 61655 | } | 61132 | } |
| 61656 | #else | 61133 | #else |
| 61657 | __ai uint8x8_t vqtbx2_u8(uint8x8_t __p0, uint8x16x2_t __p1, uint8x8_t __p2) { | 61134 | __ai uint64x2_t vtstq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 61658 | uint8x8_t __ret; | 61135 | uint64x2_t __ret; |
| 61659 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61136 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61660 | uint8x16x2_t __rev1; | 61137 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61661 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61138 | __ret = (uint64x2_t) __builtin_neon_vtstq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); |
| 61662 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61139 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61663 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61664 | __ret = (uint8x8_t) __builtin_neon_vqtbx2_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x8_t)__rev2, 16); | | |
| 61665 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61666 | return __ret; | 61140 | return __ret; |
| 61667 | } | 61141 | } |
| 61668 | #endif | 61142 | #endif |
| 61669 | | 61143 | |
| 61670 | #ifdef __LITTLE_ENDIAN__ | 61144 | #ifdef __LITTLE_ENDIAN__ |
| 61671 | __ai int8x8_t vqtbx2_s8(int8x8_t __p0, int8x16x2_t __p1, uint8x8_t __p2) { | 61145 | __ai uint64x2_t vtstq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 61672 | int8x8_t __ret; | 61146 | uint64x2_t __ret; |
| 61673 | __ret = (int8x8_t) __builtin_neon_vqtbx2_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x8_t)__p2, 0); | 61147 | __ret = (uint64x2_t) __builtin_neon_vtstq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); |
| 61674 | return __ret; | 61148 | return __ret; |
| 61675 | } | 61149 | } |
| 61676 | #else | 61150 | #else |
| 61677 | __ai int8x8_t vqtbx2_s8(int8x8_t __p0, int8x16x2_t __p1, uint8x8_t __p2) { | 61151 | __ai uint64x2_t vtstq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 61678 | int8x8_t __ret; | 61152 | uint64x2_t __ret; |
| 61679 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61153 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61680 | int8x16x2_t __rev1; | 61154 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61681 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61155 | __ret = (uint64x2_t) __builtin_neon_vtstq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); |
| 61682 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61156 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61683 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61684 | __ret = (int8x8_t) __builtin_neon_vqtbx2_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x8_t)__rev2, 0); | | |
| 61685 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61686 | return __ret; | 61157 | return __ret; |
| 61687 | } | 61158 | } |
| 61688 | #endif | 61159 | #endif |
| 61689 | | 61160 | |
| 61690 | #ifdef __LITTLE_ENDIAN__ | 61161 | __ai uint64x1_t vtst_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 61691 | __ai poly8x8_t vqtbx3_p8(poly8x8_t __p0, poly8x16x3_t __p1, uint8x8_t __p2) { | 61162 | uint64x1_t __ret; |
| 61692 | poly8x8_t __ret; | 61163 | __ret = (uint64x1_t) __builtin_neon_vtst_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 61693 | __ret = (poly8x8_t) __builtin_neon_vqtbx3_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x8_t)__p2, 4); | | |
| 61694 | return __ret; | 61164 | return __ret; |
| 61695 | } | 61165 | } |
| 61696 | #else | 61166 | __ai uint64x1_t vtst_s64(int64x1_t __p0, int64x1_t __p1) { |
| 61697 | __ai poly8x8_t vqtbx3_p8(poly8x8_t __p0, poly8x16x3_t __p1, uint8x8_t __p2) { | 61167 | uint64x1_t __ret; |
| 61698 | poly8x8_t __ret; | 61168 | __ret = (uint64x1_t) __builtin_neon_vtst_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 61699 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61169 | return __ret; |
| 61700 | poly8x16x3_t __rev1; | 61170 | } |
| 61701 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61171 | __ai uint64_t vtstd_u64(uint64_t __p0, uint64_t __p1) { |
| 61702 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61172 | uint64_t __ret; |
| 61703 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61173 | __ret = (uint64_t) __builtin_neon_vtstd_u64(__p0, __p1); |
| 61704 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 61174 | return __ret; |
| 61705 | __ret = (poly8x8_t) __builtin_neon_vqtbx3_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x8_t)__rev2, 4); | 61175 | } |
| 61706 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 61176 | __ai uint64_t vtstd_s64(int64_t __p0, int64_t __p1) { |
| | 61177 | uint64_t __ret; |
| | 61178 | __ret = (uint64_t) __builtin_neon_vtstd_s64(__p0, __p1); |
| | 61179 | return __ret; |
| | 61180 | } |
| | 61181 | __ai int8_t vuqaddb_s8(int8_t __p0, uint8_t __p1) { |
| | 61182 | int8_t __ret; |
| | 61183 | __ret = (int8_t) __builtin_neon_vuqaddb_s8(__p0, __p1); |
| | 61184 | return __ret; |
| | 61185 | } |
| | 61186 | __ai int32_t vuqadds_s32(int32_t __p0, uint32_t __p1) { |
| | 61187 | int32_t __ret; |
| | 61188 | __ret = (int32_t) __builtin_neon_vuqadds_s32(__p0, __p1); |
| | 61189 | return __ret; |
| | 61190 | } |
| | 61191 | __ai int64_t vuqaddd_s64(int64_t __p0, uint64_t __p1) { |
| | 61192 | int64_t __ret; |
| | 61193 | __ret = (int64_t) __builtin_neon_vuqaddd_s64(__p0, __p1); |
| | 61194 | return __ret; |
| | 61195 | } |
| | 61196 | __ai int16_t vuqaddh_s16(int16_t __p0, uint16_t __p1) { |
| | 61197 | int16_t __ret; |
| | 61198 | __ret = (int16_t) __builtin_neon_vuqaddh_s16(__p0, __p1); |
| 61707 | return __ret; | 61199 | return __ret; |
| 61708 | } | 61200 | } |
| 61709 | #endif | | |
| 61710 | | | |
| 61711 | #ifdef __LITTLE_ENDIAN__ | 61201 | #ifdef __LITTLE_ENDIAN__ |
| 61712 | __ai poly8x16_t vqtbx3q_p8(poly8x16_t __p0, poly8x16x3_t __p1, uint8x16_t __p2) { | 61202 | __ai int8x16_t vuqaddq_s8(int8x16_t __p0, uint8x16_t __p1) { |
| 61713 | poly8x16_t __ret; | 61203 | int8x16_t __ret; |
| 61714 | __ret = (poly8x16_t) __builtin_neon_vqtbx3q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p2, 36); | 61204 | __ret = (int8x16_t) __builtin_neon_vuqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 32); |
| 61715 | return __ret; | 61205 | return __ret; |
| 61716 | } | 61206 | } |
| 61717 | #else | 61207 | #else |
| 61718 | __ai poly8x16_t vqtbx3q_p8(poly8x16_t __p0, poly8x16x3_t __p1, uint8x16_t __p2) { | 61208 | __ai int8x16_t vuqaddq_s8(int8x16_t __p0, uint8x16_t __p1) { |
| 61719 | poly8x16_t __ret; | 61209 | int8x16_t __ret; |
| 61720 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61210 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61721 | poly8x16x3_t __rev1; | 61211 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61722 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61212 | __ret = (int8x16_t) __builtin_neon_vuqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 32); |
| 61723 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61724 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61725 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61726 | __ret = (poly8x16_t) __builtin_neon_vqtbx3q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev2, 36); | | |
| 61727 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61213 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61728 | return __ret; | 61214 | return __ret; |
| 61729 | } | 61215 | } |
| 61730 | #endif | 61216 | #endif |
| 61731 | | 61217 | |
| 61732 | #ifdef __LITTLE_ENDIAN__ | 61218 | #ifdef __LITTLE_ENDIAN__ |
| 61733 | __ai uint8x16_t vqtbx3q_u8(uint8x16_t __p0, uint8x16x3_t __p1, uint8x16_t __p2) { | 61219 | __ai int32x4_t vuqaddq_s32(int32x4_t __p0, uint32x4_t __p1) { |
| 61734 | uint8x16_t __ret; | 61220 | int32x4_t __ret; |
| 61735 | __ret = (uint8x16_t) __builtin_neon_vqtbx3q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p2, 48); | 61221 | __ret = (int32x4_t) __builtin_neon_vuqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 34); |
| 61736 | return __ret; | 61222 | return __ret; |
| 61737 | } | 61223 | } |
| 61738 | #else | 61224 | #else |
| 61739 | __ai uint8x16_t vqtbx3q_u8(uint8x16_t __p0, uint8x16x3_t __p1, uint8x16_t __p2) { | 61225 | __ai int32x4_t vuqaddq_s32(int32x4_t __p0, uint32x4_t __p1) { |
| 61740 | uint8x16_t __ret; | 61226 | int32x4_t __ret; |
| 61741 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61227 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 61742 | uint8x16x3_t __rev1; | 61228 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 61743 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61229 | __ret = (int32x4_t) __builtin_neon_vuqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 34); |
| 61744 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61230 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 61745 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61746 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61747 | __ret = (uint8x16_t) __builtin_neon_vqtbx3q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev2, 48); | | |
| 61748 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61749 | return __ret; | 61231 | return __ret; |
| 61750 | } | 61232 | } |
| 61751 | #endif | 61233 | #endif |
| 61752 | | 61234 | |
| 61753 | #ifdef __LITTLE_ENDIAN__ | 61235 | #ifdef __LITTLE_ENDIAN__ |
| 61754 | __ai int8x16_t vqtbx3q_s8(int8x16_t __p0, int8x16x3_t __p1, uint8x16_t __p2) { | 61236 | __ai int64x2_t vuqaddq_s64(int64x2_t __p0, uint64x2_t __p1) { |
| 61755 | int8x16_t __ret; | 61237 | int64x2_t __ret; |
| 61756 | __ret = (int8x16_t) __builtin_neon_vqtbx3q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p2, 32); | 61238 | __ret = (int64x2_t) __builtin_neon_vuqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 35); |
| 61757 | return __ret; | 61239 | return __ret; |
| 61758 | } | 61240 | } |
| 61759 | #else | 61241 | #else |
| 61760 | __ai int8x16_t vqtbx3q_s8(int8x16_t __p0, int8x16x3_t __p1, uint8x16_t __p2) { | 61242 | __ai int64x2_t vuqaddq_s64(int64x2_t __p0, uint64x2_t __p1) { |
| 61761 | int8x16_t __ret; | 61243 | int64x2_t __ret; |
| 61762 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61244 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61763 | int8x16x3_t __rev1; | 61245 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61764 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61246 | __ret = (int64x2_t) __builtin_neon_vuqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 35); |
| 61765 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61247 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61766 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61767 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61768 | __ret = (int8x16_t) __builtin_neon_vqtbx3q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev2, 32); | | |
| 61769 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61770 | return __ret; | 61248 | return __ret; |
| 61771 | } | 61249 | } |
| 61772 | #endif | 61250 | #endif |
| 61773 | | 61251 | |
| 61774 | #ifdef __LITTLE_ENDIAN__ | 61252 | #ifdef __LITTLE_ENDIAN__ |
| 61775 | __ai uint8x8_t vqtbx3_u8(uint8x8_t __p0, uint8x16x3_t __p1, uint8x8_t __p2) { | 61253 | __ai int16x8_t vuqaddq_s16(int16x8_t __p0, uint16x8_t __p1) { |
| 61776 | uint8x8_t __ret; | 61254 | int16x8_t __ret; |
| 61777 | __ret = (uint8x8_t) __builtin_neon_vqtbx3_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x8_t)__p2, 16); | 61255 | __ret = (int16x8_t) __builtin_neon_vuqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 33); |
| 61778 | return __ret; | 61256 | return __ret; |
| 61779 | } | 61257 | } |
| 61780 | #else | 61258 | #else |
| 61781 | __ai uint8x8_t vqtbx3_u8(uint8x8_t __p0, uint8x16x3_t __p1, uint8x8_t __p2) { | 61259 | __ai int16x8_t vuqaddq_s16(int16x8_t __p0, uint16x8_t __p1) { |
| 61782 | uint8x8_t __ret; | 61260 | int16x8_t __ret; |
| 61783 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61261 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61784 | uint8x16x3_t __rev1; | 61262 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61785 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61263 | __ret = (int16x8_t) __builtin_neon_vuqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 33); |
| 61786 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61787 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61788 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61789 | __ret = (uint8x8_t) __builtin_neon_vqtbx3_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x8_t)__rev2, 16); | | |
| 61790 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 61264 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61791 | return __ret; | 61265 | return __ret; |
| 61792 | } | 61266 | } |
| 61793 | #endif | 61267 | #endif |
| 61794 | | 61268 | |
| 61795 | #ifdef __LITTLE_ENDIAN__ | 61269 | #ifdef __LITTLE_ENDIAN__ |
| 61796 | __ai int8x8_t vqtbx3_s8(int8x8_t __p0, int8x16x3_t __p1, uint8x8_t __p2) { | 61270 | __ai int8x8_t vuqadd_s8(int8x8_t __p0, uint8x8_t __p1) { |
| 61797 | int8x8_t __ret; | 61271 | int8x8_t __ret; |
| 61798 | __ret = (int8x8_t) __builtin_neon_vqtbx3_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x8_t)__p2, 0); | 61272 | __ret = (int8x8_t) __builtin_neon_vuqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 0); |
| 61799 | return __ret; | 61273 | return __ret; |
| 61800 | } | 61274 | } |
| 61801 | #else | 61275 | #else |
| 61802 | __ai int8x8_t vqtbx3_s8(int8x8_t __p0, int8x16x3_t __p1, uint8x8_t __p2) { | 61276 | __ai int8x8_t vuqadd_s8(int8x8_t __p0, uint8x8_t __p1) { |
| 61803 | int8x8_t __ret; | 61277 | int8x8_t __ret; |
| 61804 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61278 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61805 | int8x16x3_t __rev1; | 61279 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61806 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61280 | __ret = (int8x8_t) __builtin_neon_vuqadd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 0); |
| 61807 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61808 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61809 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61810 | __ret = (int8x8_t) __builtin_neon_vqtbx3_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x8_t)__rev2, 0); | | |
| 61811 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 61281 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61812 | return __ret; | 61282 | return __ret; |
| 61813 | } | 61283 | } |
| 61814 | #endif | 61284 | #endif |
| 61815 | | 61285 | |
| 61816 | #ifdef __LITTLE_ENDIAN__ | 61286 | #ifdef __LITTLE_ENDIAN__ |
| 61817 | __ai poly8x8_t vqtbx4_p8(poly8x8_t __p0, poly8x16x4_t __p1, uint8x8_t __p2) { | 61287 | __ai int32x2_t vuqadd_s32(int32x2_t __p0, uint32x2_t __p1) { |
| 61818 | poly8x8_t __ret; | 61288 | int32x2_t __ret; |
| 61819 | __ret = (poly8x8_t) __builtin_neon_vqtbx4_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p1.val[3], (int8x8_t)__p2, 4); | 61289 | __ret = (int32x2_t) __builtin_neon_vuqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 2); |
| 61820 | return __ret; | 61290 | return __ret; |
| 61821 | } | 61291 | } |
| 61822 | #else | 61292 | #else |
| 61823 | __ai poly8x8_t vqtbx4_p8(poly8x8_t __p0, poly8x16x4_t __p1, uint8x8_t __p2) { | 61293 | __ai int32x2_t vuqadd_s32(int32x2_t __p0, uint32x2_t __p1) { |
| 61824 | poly8x8_t __ret; | 61294 | int32x2_t __ret; |
| 61825 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61295 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61826 | poly8x16x4_t __rev1; | 61296 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61827 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61297 | __ret = (int32x2_t) __builtin_neon_vuqadd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 2); |
| 61828 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61298 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61829 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61830 | __rev1.val[3] = __builtin_shufflevector(__p1.val[3], __p1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61831 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61832 | __ret = (poly8x8_t) __builtin_neon_vqtbx4_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], (int8x8_t)__rev2, 4); | | |
| 61833 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61834 | return __ret; | 61299 | return __ret; |
| 61835 | } | 61300 | } |
| 61836 | #endif | 61301 | #endif |
| 61837 | | 61302 | |
| | 61303 | __ai int64x1_t vuqadd_s64(int64x1_t __p0, uint64x1_t __p1) { |
| | 61304 | int64x1_t __ret; |
| | 61305 | __ret = (int64x1_t) __builtin_neon_vuqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 3); |
| | 61306 | return __ret; |
| | 61307 | } |
| 61838 | #ifdef __LITTLE_ENDIAN__ | 61308 | #ifdef __LITTLE_ENDIAN__ |
| 61839 | __ai poly8x16_t vqtbx4q_p8(poly8x16_t __p0, poly8x16x4_t __p1, uint8x16_t __p2) { | 61309 | __ai int16x4_t vuqadd_s16(int16x4_t __p0, uint16x4_t __p1) { |
| 61840 | poly8x16_t __ret; | 61310 | int16x4_t __ret; |
| 61841 | __ret = (poly8x16_t) __builtin_neon_vqtbx4q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p1.val[3], (int8x16_t)__p2, 36); | 61311 | __ret = (int16x4_t) __builtin_neon_vuqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 1); |
| 61842 | return __ret; | 61312 | return __ret; |
| 61843 | } | 61313 | } |
| 61844 | #else | 61314 | #else |
| 61845 | __ai poly8x16_t vqtbx4q_p8(poly8x16_t __p0, poly8x16x4_t __p1, uint8x16_t __p2) { | 61315 | __ai int16x4_t vuqadd_s16(int16x4_t __p0, uint16x4_t __p1) { |
| 61846 | poly8x16_t __ret; | 61316 | int16x4_t __ret; |
| 61847 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61317 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 61848 | poly8x16x4_t __rev1; | 61318 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 61849 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61319 | __ret = (int16x4_t) __builtin_neon_vuqadd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 1); |
| 61850 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61320 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 61851 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61852 | __rev1.val[3] = __builtin_shufflevector(__p1.val[3], __p1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61853 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61854 | __ret = (poly8x16_t) __builtin_neon_vqtbx4q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], (int8x16_t)__rev2, 36); | | |
| 61855 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61856 | return __ret; | 61321 | return __ret; |
| 61857 | } | 61322 | } |
| 61858 | #endif | 61323 | #endif |
| 61859 | | 61324 | |
| 61860 | #ifdef __LITTLE_ENDIAN__ | 61325 | #ifdef __LITTLE_ENDIAN__ |
| 61861 | __ai uint8x16_t vqtbx4q_u8(uint8x16_t __p0, uint8x16x4_t __p1, uint8x16_t __p2) { | 61326 | __ai poly8x8_t vuzp1_p8(poly8x8_t __p0, poly8x8_t __p1) { |
| 61862 | uint8x16_t __ret; | 61327 | poly8x8_t __ret; |
| 61863 | __ret = (uint8x16_t) __builtin_neon_vqtbx4q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p1.val[3], (int8x16_t)__p2, 48); | 61328 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14); |
| 61864 | return __ret; | 61329 | return __ret; |
| 61865 | } | 61330 | } |
| 61866 | #else | 61331 | #else |
| 61867 | __ai uint8x16_t vqtbx4q_u8(uint8x16_t __p0, uint8x16x4_t __p1, uint8x16_t __p2) { | 61332 | __ai poly8x8_t vuzp1_p8(poly8x8_t __p0, poly8x8_t __p1) { |
| 61868 | uint8x16_t __ret; | 61333 | poly8x8_t __ret; |
| 61869 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61334 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61870 | uint8x16x4_t __rev1; | 61335 | poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61871 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61336 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14); |
| 61872 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61337 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61873 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61874 | __rev1.val[3] = __builtin_shufflevector(__p1.val[3], __p1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61875 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61876 | __ret = (uint8x16_t) __builtin_neon_vqtbx4q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], (int8x16_t)__rev2, 48); | | |
| 61877 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61878 | return __ret; | 61338 | return __ret; |
| 61879 | } | 61339 | } |
| 61880 | #endif | 61340 | #endif |
| 61881 | | 61341 | |
| 61882 | #ifdef __LITTLE_ENDIAN__ | 61342 | #ifdef __LITTLE_ENDIAN__ |
| 61883 | __ai int8x16_t vqtbx4q_s8(int8x16_t __p0, int8x16x4_t __p1, uint8x16_t __p2) { | 61343 | __ai poly16x4_t vuzp1_p16(poly16x4_t __p0, poly16x4_t __p1) { |
| 61884 | int8x16_t __ret; | 61344 | poly16x4_t __ret; |
| 61885 | __ret = (int8x16_t) __builtin_neon_vqtbx4q_v((int8x16_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p1.val[3], (int8x16_t)__p2, 32); | 61345 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6); |
| 61886 | return __ret; | 61346 | return __ret; |
| 61887 | } | 61347 | } |
| 61888 | #else | 61348 | #else |
| 61889 | __ai int8x16_t vqtbx4q_s8(int8x16_t __p0, int8x16x4_t __p1, uint8x16_t __p2) { | 61349 | __ai poly16x4_t vuzp1_p16(poly16x4_t __p0, poly16x4_t __p1) { |
| 61890 | int8x16_t __ret; | 61350 | poly16x4_t __ret; |
| 61891 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61351 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 61892 | int8x16x4_t __rev1; | 61352 | poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 61893 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61353 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6); |
| 61894 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61354 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 61895 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61355 | return __ret; |
| 61896 | __rev1.val[3] = __builtin_shufflevector(__p1.val[3], __p1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61356 | } |
| 61897 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61357 | #endif |
| 61898 | __ret = (int8x16_t) __builtin_neon_vqtbx4q_v((int8x16_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], (int8x16_t)__rev2, 32); | 61358 | |
| | 61359 | #ifdef __LITTLE_ENDIAN__ |
| | 61360 | __ai poly8x16_t vuzp1q_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| | 61361 | poly8x16_t __ret; |
| | 61362 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30); |
| | 61363 | return __ret; |
| | 61364 | } |
| | 61365 | #else |
| | 61366 | __ai poly8x16_t vuzp1q_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| | 61367 | poly8x16_t __ret; |
| | 61368 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 61369 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 61370 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30); |
| 61899 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61371 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61900 | return __ret; | 61372 | return __ret; |
| 61901 | } | 61373 | } |
| 61902 | #endif | 61374 | #endif |
| 61903 | | 61375 | |
| 61904 | #ifdef __LITTLE_ENDIAN__ | 61376 | #ifdef __LITTLE_ENDIAN__ |
| 61905 | __ai uint8x8_t vqtbx4_u8(uint8x8_t __p0, uint8x16x4_t __p1, uint8x8_t __p2) { | 61377 | __ai poly64x2_t vuzp1q_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 61906 | uint8x8_t __ret; | 61378 | poly64x2_t __ret; |
| 61907 | __ret = (uint8x8_t) __builtin_neon_vqtbx4_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p1.val[3], (int8x8_t)__p2, 16); | 61379 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 61908 | return __ret; | 61380 | return __ret; |
| 61909 | } | 61381 | } |
| 61910 | #else | 61382 | #else |
| 61911 | __ai uint8x8_t vqtbx4_u8(uint8x8_t __p0, uint8x16x4_t __p1, uint8x8_t __p2) { | 61383 | __ai poly64x2_t vuzp1q_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 61912 | uint8x8_t __ret; | 61384 | poly64x2_t __ret; |
| 61913 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61385 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61914 | uint8x16x4_t __rev1; | 61386 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61915 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61387 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| 61916 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61388 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61917 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61918 | __rev1.val[3] = __builtin_shufflevector(__p1.val[3], __p1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61919 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61920 | __ret = (uint8x8_t) __builtin_neon_vqtbx4_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], (int8x8_t)__rev2, 16); | | |
| 61921 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61922 | return __ret; | 61389 | return __ret; |
| 61923 | } | 61390 | } |
| 61924 | #endif | 61391 | #endif |
| 61925 | | 61392 | |
| 61926 | #ifdef __LITTLE_ENDIAN__ | 61393 | #ifdef __LITTLE_ENDIAN__ |
| 61927 | __ai int8x8_t vqtbx4_s8(int8x8_t __p0, int8x16x4_t __p1, uint8x8_t __p2) { | 61394 | __ai poly16x8_t vuzp1q_p16(poly16x8_t __p0, poly16x8_t __p1) { |
| 61928 | int8x8_t __ret; | 61395 | poly16x8_t __ret; |
| 61929 | __ret = (int8x8_t) __builtin_neon_vqtbx4_v((int8x8_t)__p0, (int8x16_t)__p1.val[0], (int8x16_t)__p1.val[1], (int8x16_t)__p1.val[2], (int8x16_t)__p1.val[3], (int8x8_t)__p2, 0); | 61396 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14); |
| 61930 | return __ret; | 61397 | return __ret; |
| 61931 | } | 61398 | } |
| 61932 | #else | 61399 | #else |
| 61933 | __ai int8x8_t vqtbx4_s8(int8x8_t __p0, int8x16x4_t __p1, uint8x8_t __p2) { | 61400 | __ai poly16x8_t vuzp1q_p16(poly16x8_t __p0, poly16x8_t __p1) { |
| 61934 | int8x8_t __ret; | 61401 | poly16x8_t __ret; |
| 61935 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61402 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61936 | int8x16x4_t __rev1; | 61403 | poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61937 | __rev1.val[0] = __builtin_shufflevector(__p1.val[0], __p1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61404 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14); |
| 61938 | __rev1.val[1] = __builtin_shufflevector(__p1.val[1], __p1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61939 | __rev1.val[2] = __builtin_shufflevector(__p1.val[2], __p1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61940 | __rev1.val[3] = __builtin_shufflevector(__p1.val[3], __p1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61941 | uint8x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61942 | __ret = (int8x8_t) __builtin_neon_vqtbx4_v((int8x8_t)__rev0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], (int8x8_t)__rev2, 0); | | |
| 61943 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 61405 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61944 | return __ret; | 61406 | return __ret; |
| 61945 | } | 61407 | } |
| 61946 | #endif | 61408 | #endif |
| 61947 | | 61409 | |
| 61948 | #ifdef __LITTLE_ENDIAN__ | 61410 | #ifdef __LITTLE_ENDIAN__ |
| 61949 | __ai uint16x8_t vraddhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 61411 | __ai uint8x16_t vuzp1q_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 61950 | uint16x8_t __ret; | 61412 | uint8x16_t __ret; |
| 61951 | __ret = vcombine_u16(__p0, vraddhn_u32(__p1, __p2)); | 61413 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30); |
| 61952 | return __ret; | 61414 | return __ret; |
| 61953 | } | 61415 | } |
| 61954 | #else | 61416 | #else |
| 61955 | __ai uint16x8_t vraddhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 61417 | __ai uint8x16_t vuzp1q_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 61956 | uint16x8_t __ret; | 61418 | uint8x16_t __ret; |
| 61957 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 61419 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61958 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 61420 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61959 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 61421 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30); |
| 61960 | __ret = __noswap_vcombine_u16(__rev0, __noswap_vraddhn_u32(__rev1, __rev2)); | 61422 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 61961 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61962 | return __ret; | 61423 | return __ret; |
| 61963 | } | 61424 | } |
| 61964 | #endif | 61425 | #endif |
| 61965 | | 61426 | |
| 61966 | #ifdef __LITTLE_ENDIAN__ | 61427 | #ifdef __LITTLE_ENDIAN__ |
| 61967 | __ai uint32x4_t vraddhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | 61428 | __ai uint32x4_t vuzp1q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 61968 | uint32x4_t __ret; | 61429 | uint32x4_t __ret; |
| 61969 | __ret = vcombine_u32(__p0, vraddhn_u64(__p1, __p2)); | 61430 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6); |
| 61970 | return __ret; | 61431 | return __ret; |
| 61971 | } | 61432 | } |
| 61972 | #else | 61433 | #else |
| 61973 | __ai uint32x4_t vraddhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | 61434 | __ai uint32x4_t vuzp1q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 61974 | uint32x4_t __ret; | 61435 | uint32x4_t __ret; |
| 61975 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 61436 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 61976 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 61437 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 61977 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 61438 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6); |
| 61978 | __ret = __noswap_vcombine_u32(__rev0, __noswap_vraddhn_u64(__rev1, __rev2)); | | |
| 61979 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 61439 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 61980 | return __ret; | 61440 | return __ret; |
| 61981 | } | 61441 | } |
| 61982 | #endif | 61442 | #endif |
| 61983 | | 61443 | |
| 61984 | #ifdef __LITTLE_ENDIAN__ | 61444 | #ifdef __LITTLE_ENDIAN__ |
| 61985 | __ai uint8x16_t vraddhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { | 61445 | __ai uint64x2_t vuzp1q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 61986 | uint8x16_t __ret; | 61446 | uint64x2_t __ret; |
| 61987 | __ret = vcombine_u8(__p0, vraddhn_u16(__p1, __p2)); | 61447 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 61988 | return __ret; | 61448 | return __ret; |
| 61989 | } | 61449 | } |
| 61990 | #else | 61450 | #else |
| 61991 | __ai uint8x16_t vraddhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { | 61451 | __ai uint64x2_t vuzp1q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 61992 | uint8x16_t __ret; | 61452 | uint64x2_t __ret; |
| 61993 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61453 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 61994 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 61454 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 61995 | uint16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 61455 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| 61996 | __ret = __noswap_vcombine_u8(__rev0, __noswap_vraddhn_u16(__rev1, __rev2)); | 61456 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 61997 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 61998 | return __ret; | 61457 | return __ret; |
| 61999 | } | 61458 | } |
| 62000 | #endif | 61459 | #endif |
| 62001 | | 61460 | |
| 62002 | #ifdef __LITTLE_ENDIAN__ | 61461 | #ifdef __LITTLE_ENDIAN__ |
| 62003 | __ai int16x8_t vraddhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 61462 | __ai uint16x8_t vuzp1q_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 62004 | int16x8_t __ret; | 61463 | uint16x8_t __ret; |
| 62005 | __ret = vcombine_s16(__p0, vraddhn_s32(__p1, __p2)); | 61464 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14); |
| 62006 | return __ret; | 61465 | return __ret; |
| 62007 | } | 61466 | } |
| 62008 | #else | 61467 | #else |
| 62009 | __ai int16x8_t vraddhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 61468 | __ai uint16x8_t vuzp1q_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 62010 | int16x8_t __ret; | 61469 | uint16x8_t __ret; |
| 62011 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 61470 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62012 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 61471 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62013 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 61472 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14); |
| 62014 | __ret = __noswap_vcombine_s16(__rev0, __noswap_vraddhn_s32(__rev1, __rev2)); | | |
| 62015 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 61473 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62016 | return __ret; | 61474 | return __ret; |
| 62017 | } | 61475 | } |
| 62018 | #endif | 61476 | #endif |
| 62019 | | 61477 | |
| 62020 | #ifdef __LITTLE_ENDIAN__ | 61478 | #ifdef __LITTLE_ENDIAN__ |
| 62021 | __ai int32x4_t vraddhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { | 61479 | __ai int8x16_t vuzp1q_s8(int8x16_t __p0, int8x16_t __p1) { |
| 62022 | int32x4_t __ret; | 61480 | int8x16_t __ret; |
| 62023 | __ret = vcombine_s32(__p0, vraddhn_s64(__p1, __p2)); | 61481 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30); |
| 62024 | return __ret; | 61482 | return __ret; |
| 62025 | } | 61483 | } |
| 62026 | #else | 61484 | #else |
| 62027 | __ai int32x4_t vraddhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { | 61485 | __ai int8x16_t vuzp1q_s8(int8x16_t __p0, int8x16_t __p1) { |
| 62028 | int32x4_t __ret; | 61486 | int8x16_t __ret; |
| 62029 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 61487 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62030 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 61488 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62031 | int64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 61489 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30); |
| 62032 | __ret = __noswap_vcombine_s32(__rev0, __noswap_vraddhn_s64(__rev1, __rev2)); | 61490 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62033 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 62034 | return __ret; | 61491 | return __ret; |
| 62035 | } | 61492 | } |
| 62036 | #endif | 61493 | #endif |
| 62037 | | 61494 | |
| 62038 | #ifdef __LITTLE_ENDIAN__ | 61495 | #ifdef __LITTLE_ENDIAN__ |
| 62039 | __ai int8x16_t vraddhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 61496 | __ai float64x2_t vuzp1q_f64(float64x2_t __p0, float64x2_t __p1) { |
| 62040 | int8x16_t __ret; | 61497 | float64x2_t __ret; |
| 62041 | __ret = vcombine_s8(__p0, vraddhn_s16(__p1, __p2)); | 61498 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 62042 | return __ret; | 61499 | return __ret; |
| 62043 | } | 61500 | } |
| 62044 | #else | 61501 | #else |
| 62045 | __ai int8x16_t vraddhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 61502 | __ai float64x2_t vuzp1q_f64(float64x2_t __p0, float64x2_t __p1) { |
| 62046 | int8x16_t __ret; | 61503 | float64x2_t __ret; |
| 62047 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61504 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 62048 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 61505 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 62049 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 61506 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| 62050 | __ret = __noswap_vcombine_s8(__rev0, __noswap_vraddhn_s16(__rev1, __rev2)); | 61507 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 62051 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 62052 | return __ret; | 61508 | return __ret; |
| 62053 | } | 61509 | } |
| 62054 | #endif | 61510 | #endif |
| 62055 | | 61511 | |
| 62056 | #ifdef __LITTLE_ENDIAN__ | 61512 | #ifdef __LITTLE_ENDIAN__ |
| 62057 | __ai poly8x8_t vrbit_p8(poly8x8_t __p0) { | 61513 | __ai float32x4_t vuzp1q_f32(float32x4_t __p0, float32x4_t __p1) { |
| 62058 | poly8x8_t __ret; | 61514 | float32x4_t __ret; |
| 62059 | __ret = (poly8x8_t) __builtin_neon_vrbit_v((int8x8_t)__p0, 4); | 61515 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6); |
| 62060 | return __ret; | 61516 | return __ret; |
| 62061 | } | 61517 | } |
| 62062 | #else | 61518 | #else |
| 62063 | __ai poly8x8_t vrbit_p8(poly8x8_t __p0) { | 61519 | __ai float32x4_t vuzp1q_f32(float32x4_t __p0, float32x4_t __p1) { |
| 62064 | poly8x8_t __ret; | 61520 | float32x4_t __ret; |
| 62065 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61521 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 62066 | __ret = (poly8x8_t) __builtin_neon_vrbit_v((int8x8_t)__rev0, 4); | 61522 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 62067 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 61523 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6); |
| | 61524 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 62068 | return __ret; | 61525 | return __ret; |
| 62069 | } | 61526 | } |
| 62070 | #endif | 61527 | #endif |
| 62071 | | 61528 | |
| 62072 | #ifdef __LITTLE_ENDIAN__ | 61529 | #ifdef __LITTLE_ENDIAN__ |
| 62073 | __ai poly8x16_t vrbitq_p8(poly8x16_t __p0) { | 61530 | __ai int32x4_t vuzp1q_s32(int32x4_t __p0, int32x4_t __p1) { |
| 62074 | poly8x16_t __ret; | 61531 | int32x4_t __ret; |
| 62075 | __ret = (poly8x16_t) __builtin_neon_vrbitq_v((int8x16_t)__p0, 36); | 61532 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6); |
| 62076 | return __ret; | 61533 | return __ret; |
| 62077 | } | 61534 | } |
| 62078 | #else | 61535 | #else |
| 62079 | __ai poly8x16_t vrbitq_p8(poly8x16_t __p0) { | 61536 | __ai int32x4_t vuzp1q_s32(int32x4_t __p0, int32x4_t __p1) { |
| 62080 | poly8x16_t __ret; | 61537 | int32x4_t __ret; |
| 62081 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61538 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 62082 | __ret = (poly8x16_t) __builtin_neon_vrbitq_v((int8x16_t)__rev0, 36); | 61539 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 62083 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61540 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6); |
| | 61541 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 62084 | return __ret; | 61542 | return __ret; |
| 62085 | } | 61543 | } |
| 62086 | #endif | 61544 | #endif |
| 62087 | | 61545 | |
| 62088 | #ifdef __LITTLE_ENDIAN__ | 61546 | #ifdef __LITTLE_ENDIAN__ |
| 62089 | __ai uint8x16_t vrbitq_u8(uint8x16_t __p0) { | 61547 | __ai int64x2_t vuzp1q_s64(int64x2_t __p0, int64x2_t __p1) { |
| 62090 | uint8x16_t __ret; | 61548 | int64x2_t __ret; |
| 62091 | __ret = (uint8x16_t) __builtin_neon_vrbitq_v((int8x16_t)__p0, 48); | 61549 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 62092 | return __ret; | 61550 | return __ret; |
| 62093 | } | 61551 | } |
| 62094 | #else | 61552 | #else |
| 62095 | __ai uint8x16_t vrbitq_u8(uint8x16_t __p0) { | 61553 | __ai int64x2_t vuzp1q_s64(int64x2_t __p0, int64x2_t __p1) { |
| 62096 | uint8x16_t __ret; | 61554 | int64x2_t __ret; |
| 62097 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61555 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 62098 | __ret = (uint8x16_t) __builtin_neon_vrbitq_v((int8x16_t)__rev0, 48); | 61556 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 62099 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61557 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| | 61558 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 62100 | return __ret; | 61559 | return __ret; |
| 62101 | } | 61560 | } |
| 62102 | #endif | 61561 | #endif |
| 62103 | | 61562 | |
| 62104 | #ifdef __LITTLE_ENDIAN__ | 61563 | #ifdef __LITTLE_ENDIAN__ |
| 62105 | __ai int8x16_t vrbitq_s8(int8x16_t __p0) { | 61564 | __ai int16x8_t vuzp1q_s16(int16x8_t __p0, int16x8_t __p1) { |
| 62106 | int8x16_t __ret; | 61565 | int16x8_t __ret; |
| 62107 | __ret = (int8x16_t) __builtin_neon_vrbitq_v((int8x16_t)__p0, 32); | 61566 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14); |
| 62108 | return __ret; | 61567 | return __ret; |
| 62109 | } | 61568 | } |
| 62110 | #else | 61569 | #else |
| 62111 | __ai int8x16_t vrbitq_s8(int8x16_t __p0) { | 61570 | __ai int16x8_t vuzp1q_s16(int16x8_t __p0, int16x8_t __p1) { |
| 62112 | int8x16_t __ret; | 61571 | int16x8_t __ret; |
| 62113 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61572 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62114 | __ret = (int8x16_t) __builtin_neon_vrbitq_v((int8x16_t)__rev0, 32); | 61573 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62115 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 61574 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14); |
| | 61575 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62116 | return __ret; | 61576 | return __ret; |
| 62117 | } | 61577 | } |
| 62118 | #endif | 61578 | #endif |
| 62119 | | 61579 | |
| 62120 | #ifdef __LITTLE_ENDIAN__ | 61580 | #ifdef __LITTLE_ENDIAN__ |
| 62121 | __ai uint8x8_t vrbit_u8(uint8x8_t __p0) { | 61581 | __ai uint8x8_t vuzp1_u8(uint8x8_t __p0, uint8x8_t __p1) { |
| 62122 | uint8x8_t __ret; | 61582 | uint8x8_t __ret; |
| 62123 | __ret = (uint8x8_t) __builtin_neon_vrbit_v((int8x8_t)__p0, 16); | 61583 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14); |
| 62124 | return __ret; | 61584 | return __ret; |
| 62125 | } | 61585 | } |
| 62126 | #else | 61586 | #else |
| 62127 | __ai uint8x8_t vrbit_u8(uint8x8_t __p0) { | 61587 | __ai uint8x8_t vuzp1_u8(uint8x8_t __p0, uint8x8_t __p1) { |
| 62128 | uint8x8_t __ret; | 61588 | uint8x8_t __ret; |
| 62129 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61589 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62130 | __ret = (uint8x8_t) __builtin_neon_vrbit_v((int8x8_t)__rev0, 16); | 61590 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 61591 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14); |
| 62131 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 61592 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62132 | return __ret; | 61593 | return __ret; |
| 62133 | } | 61594 | } |
| 62134 | #endif | 61595 | #endif |
| 62135 | | 61596 | |
| 62136 | #ifdef __LITTLE_ENDIAN__ | 61597 | #ifdef __LITTLE_ENDIAN__ |
| 62137 | __ai int8x8_t vrbit_s8(int8x8_t __p0) { | 61598 | __ai uint32x2_t vuzp1_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 62138 | int8x8_t __ret; | 61599 | uint32x2_t __ret; |
| 62139 | __ret = (int8x8_t) __builtin_neon_vrbit_v((int8x8_t)__p0, 0); | 61600 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 62140 | return __ret; | 61601 | return __ret; |
| 62141 | } | 61602 | } |
| 62142 | #else | 61603 | #else |
| 62143 | __ai int8x8_t vrbit_s8(int8x8_t __p0) { | 61604 | __ai uint32x2_t vuzp1_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 62144 | int8x8_t __ret; | 61605 | uint32x2_t __ret; |
| 62145 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61606 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 62146 | __ret = (int8x8_t) __builtin_neon_vrbit_v((int8x8_t)__rev0, 0); | 61607 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 62147 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 61608 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| | 61609 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 62148 | return __ret; | 61610 | return __ret; |
| 62149 | } | 61611 | } |
| 62150 | #endif | 61612 | #endif |
| 62151 | | 61613 | |
| 62152 | #ifdef __LITTLE_ENDIAN__ | 61614 | #ifdef __LITTLE_ENDIAN__ |
| 62153 | __ai float64x2_t vrecpeq_f64(float64x2_t __p0) { | 61615 | __ai uint16x4_t vuzp1_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 62154 | float64x2_t __ret; | 61616 | uint16x4_t __ret; |
| 62155 | __ret = (float64x2_t) __builtin_neon_vrecpeq_v((int8x16_t)__p0, 42); | 61617 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6); |
| 62156 | return __ret; | 61618 | return __ret; |
| 62157 | } | 61619 | } |
| 62158 | #else | 61620 | #else |
| 62159 | __ai float64x2_t vrecpeq_f64(float64x2_t __p0) { | 61621 | __ai uint16x4_t vuzp1_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 62160 | float64x2_t __ret; | 61622 | uint16x4_t __ret; |
| 62161 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 61623 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 62162 | __ret = (float64x2_t) __builtin_neon_vrecpeq_v((int8x16_t)__rev0, 42); | 61624 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 62163 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 61625 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6); |
| | 61626 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 62164 | return __ret; | 61627 | return __ret; |
| 62165 | } | 61628 | } |
| 62166 | #endif | 61629 | #endif |
| 62167 | | 61630 | |
| 62168 | __ai float64x1_t vrecpe_f64(float64x1_t __p0) { | 61631 | #ifdef __LITTLE_ENDIAN__ |
| 62169 | float64x1_t __ret; | 61632 | __ai int8x8_t vuzp1_s8(int8x8_t __p0, int8x8_t __p1) { |
| 62170 | __ret = (float64x1_t) __builtin_neon_vrecpe_v((int8x8_t)__p0, 10); | 61633 | int8x8_t __ret; |
| 62171 | return __ret; | 61634 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14); |
| 62172 | } | | |
| 62173 | __ai float64_t vrecped_f64(float64_t __p0) { | | |
| 62174 | float64_t __ret; | | |
| 62175 | __ret = (float64_t) __builtin_neon_vrecped_f64(__p0); | | |
| 62176 | return __ret; | 61635 | return __ret; |
| 62177 | } | 61636 | } |
| 62178 | __ai float32_t vrecpes_f32(float32_t __p0) { | 61637 | #else |
| 62179 | float32_t __ret; | 61638 | __ai int8x8_t vuzp1_s8(int8x8_t __p0, int8x8_t __p1) { |
| 62180 | __ret = (float32_t) __builtin_neon_vrecpes_f32(__p0); | 61639 | int8x8_t __ret; |
| | 61640 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 61641 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 61642 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14); |
| | 61643 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62181 | return __ret; | 61644 | return __ret; |
| 62182 | } | 61645 | } |
| | 61646 | #endif |
| | 61647 | |
| 62183 | #ifdef __LITTLE_ENDIAN__ | 61648 | #ifdef __LITTLE_ENDIAN__ |
| 62184 | __ai float64x2_t vrecpsq_f64(float64x2_t __p0, float64x2_t __p1) { | 61649 | __ai float32x2_t vuzp1_f32(float32x2_t __p0, float32x2_t __p1) { |
| 62185 | float64x2_t __ret; | 61650 | float32x2_t __ret; |
| 62186 | __ret = (float64x2_t) __builtin_neon_vrecpsq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | 61651 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 62187 | return __ret; | 61652 | return __ret; |
| 62188 | } | 61653 | } |
| 62189 | #else | 61654 | #else |
| 62190 | __ai float64x2_t vrecpsq_f64(float64x2_t __p0, float64x2_t __p1) { | 61655 | __ai float32x2_t vuzp1_f32(float32x2_t __p0, float32x2_t __p1) { |
| 62191 | float64x2_t __ret; | 61656 | float32x2_t __ret; |
| 62192 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 61657 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 62193 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 61658 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 62194 | __ret = (float64x2_t) __builtin_neon_vrecpsq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); | 61659 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| 62195 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 61660 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 62196 | return __ret; | 61661 | return __ret; |
| 62197 | } | 61662 | } |
| 62198 | #endif | 61663 | #endif |
| 62199 | | 61664 | |
| 62200 | __ai float64x1_t vrecps_f64(float64x1_t __p0, float64x1_t __p1) { | 61665 | #ifdef __LITTLE_ENDIAN__ |
| 62201 | float64x1_t __ret; | 61666 | __ai int32x2_t vuzp1_s32(int32x2_t __p0, int32x2_t __p1) { |
| 62202 | __ret = (float64x1_t) __builtin_neon_vrecps_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | 61667 | int32x2_t __ret; |
| | 61668 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 62203 | return __ret; | 61669 | return __ret; |
| 62204 | } | 61670 | } |
| 62205 | __ai float64_t vrecpsd_f64(float64_t __p0, float64_t __p1) { | 61671 | #else |
| 62206 | float64_t __ret; | 61672 | __ai int32x2_t vuzp1_s32(int32x2_t __p0, int32x2_t __p1) { |
| 62207 | __ret = (float64_t) __builtin_neon_vrecpsd_f64(__p0, __p1); | 61673 | int32x2_t __ret; |
| | 61674 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 61675 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 61676 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| | 61677 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 62208 | return __ret; | 61678 | return __ret; |
| 62209 | } | 61679 | } |
| 62210 | __ai float32_t vrecpss_f32(float32_t __p0, float32_t __p1) { | 61680 | #endif |
| 62211 | float32_t __ret; | 61681 | |
| 62212 | __ret = (float32_t) __builtin_neon_vrecpss_f32(__p0, __p1); | 61682 | #ifdef __LITTLE_ENDIAN__ |
| | 61683 | __ai int16x4_t vuzp1_s16(int16x4_t __p0, int16x4_t __p1) { |
| | 61684 | int16x4_t __ret; |
| | 61685 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6); |
| 62213 | return __ret; | 61686 | return __ret; |
| 62214 | } | 61687 | } |
| 62215 | __ai float64_t vrecpxd_f64(float64_t __p0) { | 61688 | #else |
| 62216 | float64_t __ret; | 61689 | __ai int16x4_t vuzp1_s16(int16x4_t __p0, int16x4_t __p1) { |
| 62217 | __ret = (float64_t) __builtin_neon_vrecpxd_f64(__p0); | 61690 | int16x4_t __ret; |
| | 61691 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 61692 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 61693 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6); |
| | 61694 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 62218 | return __ret; | 61695 | return __ret; |
| 62219 | } | 61696 | } |
| 62220 | __ai float32_t vrecpxs_f32(float32_t __p0) { | 61697 | #endif |
| 62221 | float32_t __ret; | 61698 | |
| 62222 | __ret = (float32_t) __builtin_neon_vrecpxs_f32(__p0); | 61699 | #ifdef __LITTLE_ENDIAN__ |
| | 61700 | __ai poly8x8_t vuzp2_p8(poly8x8_t __p0, poly8x8_t __p1) { |
| | 61701 | poly8x8_t __ret; |
| | 61702 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15); |
| 62223 | return __ret; | 61703 | return __ret; |
| 62224 | } | 61704 | } |
| 62225 | __ai uint64_t vrshld_u64(uint64_t __p0, int64_t __p1) { | 61705 | #else |
| 62226 | uint64_t __ret; | 61706 | __ai poly8x8_t vuzp2_p8(poly8x8_t __p0, poly8x8_t __p1) { |
| 62227 | __ret = (uint64_t) __builtin_neon_vrshld_u64(__p0, __p1); | 61707 | poly8x8_t __ret; |
| | 61708 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 61709 | poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 61710 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15); |
| | 61711 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62228 | return __ret; | 61712 | return __ret; |
| 62229 | } | 61713 | } |
| 62230 | __ai int64_t vrshld_s64(int64_t __p0, int64_t __p1) { | 61714 | #endif |
| 62231 | int64_t __ret; | 61715 | |
| 62232 | __ret = (int64_t) __builtin_neon_vrshld_s64(__p0, __p1); | 61716 | #ifdef __LITTLE_ENDIAN__ |
| | 61717 | __ai poly16x4_t vuzp2_p16(poly16x4_t __p0, poly16x4_t __p1) { |
| | 61718 | poly16x4_t __ret; |
| | 61719 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7); |
| 62233 | return __ret; | 61720 | return __ret; |
| 62234 | } | 61721 | } |
| 62235 | #define vrshrd_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 62236 | uint64_t __ret; \ | | |
| 62237 | uint64_t __s0 = __p0; \ | | |
| 62238 | __ret = (uint64_t) __builtin_neon_vrshrd_n_u64(__s0, __p1); \ | | |
| 62239 | __ret; \ | | |
| 62240 | }) | | |
| 62241 | #define vrshrd_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 62242 | int64_t __ret; \ | | |
| 62243 | int64_t __s0 = __p0; \ | | |
| 62244 | __ret = (int64_t) __builtin_neon_vrshrd_n_s64(__s0, __p1); \ | | |
| 62245 | __ret; \ | | |
| 62246 | }) | | |
| 62247 | #ifdef __LITTLE_ENDIAN__ | | |
| 62248 | #define vrshrn_high_n_u32(__p0_807, __p1_807, __p2_807) __extension__ ({ \ | | |
| 62249 | uint16x8_t __ret_807; \ | | |
| 62250 | uint16x4_t __s0_807 = __p0_807; \ | | |
| 62251 | uint32x4_t __s1_807 = __p1_807; \ | | |
| 62252 | __ret_807 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_807), (uint16x4_t)(vrshrn_n_u32(__s1_807, __p2_807)))); \ | | |
| 62253 | __ret_807; \ | | |
| 62254 | }) | | |
| 62255 | #else | 61722 | #else |
| 62256 | #define vrshrn_high_n_u32(__p0_808, __p1_808, __p2_808) __extension__ ({ \ | 61723 | __ai poly16x4_t vuzp2_p16(poly16x4_t __p0, poly16x4_t __p1) { |
| 62257 | uint16x8_t __ret_808; \ | 61724 | poly16x4_t __ret; |
| 62258 | uint16x4_t __s0_808 = __p0_808; \ | 61725 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 62259 | uint32x4_t __s1_808 = __p1_808; \ | 61726 | poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 62260 | uint16x4_t __rev0_808; __rev0_808 = __builtin_shufflevector(__s0_808, __s0_808, 3, 2, 1, 0); \ | 61727 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7); |
| 62261 | uint32x4_t __rev1_808; __rev1_808 = __builtin_shufflevector(__s1_808, __s1_808, 3, 2, 1, 0); \ | 61728 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 62262 | __ret_808 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_808), (uint16x4_t)(__noswap_vrshrn_n_u32(__rev1_808, __p2_808)))); \ | 61729 | return __ret; |
| 62263 | __ret_808 = __builtin_shufflevector(__ret_808, __ret_808, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61730 | } |
| 62264 | __ret_808; \ | | |
| 62265 | }) | | |
| 62266 | #endif | 61731 | #endif |
| 62267 | | 61732 | |
| 62268 | #ifdef __LITTLE_ENDIAN__ | 61733 | #ifdef __LITTLE_ENDIAN__ |
| 62269 | #define vrshrn_high_n_u64(__p0_809, __p1_809, __p2_809) __extension__ ({ \ | 61734 | __ai poly8x16_t vuzp2q_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| 62270 | uint32x4_t __ret_809; \ | 61735 | poly8x16_t __ret; |
| 62271 | uint32x2_t __s0_809 = __p0_809; \ | 61736 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31); |
| 62272 | uint64x2_t __s1_809 = __p1_809; \ | 61737 | return __ret; |
| 62273 | __ret_809 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_809), (uint32x2_t)(vrshrn_n_u64(__s1_809, __p2_809)))); \ | 61738 | } |
| 62274 | __ret_809; \ | | |
| 62275 | }) | | |
| 62276 | #else | 61739 | #else |
| 62277 | #define vrshrn_high_n_u64(__p0_810, __p1_810, __p2_810) __extension__ ({ \ | 61740 | __ai poly8x16_t vuzp2q_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| 62278 | uint32x4_t __ret_810; \ | 61741 | poly8x16_t __ret; |
| 62279 | uint32x2_t __s0_810 = __p0_810; \ | 61742 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62280 | uint64x2_t __s1_810 = __p1_810; \ | 61743 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62281 | uint32x2_t __rev0_810; __rev0_810 = __builtin_shufflevector(__s0_810, __s0_810, 1, 0); \ | 61744 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31); |
| 62282 | uint64x2_t __rev1_810; __rev1_810 = __builtin_shufflevector(__s1_810, __s1_810, 1, 0); \ | 61745 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62283 | __ret_810 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_810), (uint32x2_t)(__noswap_vrshrn_n_u64(__rev1_810, __p2_810)))); \ | 61746 | return __ret; |
| 62284 | __ret_810 = __builtin_shufflevector(__ret_810, __ret_810, 3, 2, 1, 0); \ | 61747 | } |
| 62285 | __ret_810; \ | | |
| 62286 | }) | | |
| 62287 | #endif | 61748 | #endif |
| 62288 | | 61749 | |
| 62289 | #ifdef __LITTLE_ENDIAN__ | 61750 | #ifdef __LITTLE_ENDIAN__ |
| 62290 | #define vrshrn_high_n_u16(__p0_811, __p1_811, __p2_811) __extension__ ({ \ | 61751 | __ai poly64x2_t vuzp2q_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 62291 | uint8x16_t __ret_811; \ | 61752 | poly64x2_t __ret; |
| 62292 | uint8x8_t __s0_811 = __p0_811; \ | 61753 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 62293 | uint16x8_t __s1_811 = __p1_811; \ | 61754 | return __ret; |
| 62294 | __ret_811 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_811), (uint8x8_t)(vrshrn_n_u16(__s1_811, __p2_811)))); \ | 61755 | } |
| 62295 | __ret_811; \ | | |
| 62296 | }) | | |
| 62297 | #else | 61756 | #else |
| 62298 | #define vrshrn_high_n_u16(__p0_812, __p1_812, __p2_812) __extension__ ({ \ | 61757 | __ai poly64x2_t vuzp2q_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 62299 | uint8x16_t __ret_812; \ | 61758 | poly64x2_t __ret; |
| 62300 | uint8x8_t __s0_812 = __p0_812; \ | 61759 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 62301 | uint16x8_t __s1_812 = __p1_812; \ | 61760 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 62302 | uint8x8_t __rev0_812; __rev0_812 = __builtin_shufflevector(__s0_812, __s0_812, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61761 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 62303 | uint16x8_t __rev1_812; __rev1_812 = __builtin_shufflevector(__s1_812, __s1_812, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61762 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 62304 | __ret_812 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_812), (uint8x8_t)(__noswap_vrshrn_n_u16(__rev1_812, __p2_812)))); \ | 61763 | return __ret; |
| 62305 | __ret_812 = __builtin_shufflevector(__ret_812, __ret_812, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61764 | } |
| 62306 | __ret_812; \ | | |
| 62307 | }) | | |
| 62308 | #endif | 61765 | #endif |
| 62309 | | 61766 | |
| 62310 | #ifdef __LITTLE_ENDIAN__ | 61767 | #ifdef __LITTLE_ENDIAN__ |
| 62311 | #define vrshrn_high_n_s32(__p0_813, __p1_813, __p2_813) __extension__ ({ \ | 61768 | __ai poly16x8_t vuzp2q_p16(poly16x8_t __p0, poly16x8_t __p1) { |
| 62312 | int16x8_t __ret_813; \ | 61769 | poly16x8_t __ret; |
| 62313 | int16x4_t __s0_813 = __p0_813; \ | 61770 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15); |
| 62314 | int32x4_t __s1_813 = __p1_813; \ | 61771 | return __ret; |
| 62315 | __ret_813 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_813), (int16x4_t)(vrshrn_n_s32(__s1_813, __p2_813)))); \ | 61772 | } |
| 62316 | __ret_813; \ | | |
| 62317 | }) | | |
| 62318 | #else | 61773 | #else |
| 62319 | #define vrshrn_high_n_s32(__p0_814, __p1_814, __p2_814) __extension__ ({ \ | 61774 | __ai poly16x8_t vuzp2q_p16(poly16x8_t __p0, poly16x8_t __p1) { |
| 62320 | int16x8_t __ret_814; \ | 61775 | poly16x8_t __ret; |
| 62321 | int16x4_t __s0_814 = __p0_814; \ | 61776 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62322 | int32x4_t __s1_814 = __p1_814; \ | 61777 | poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62323 | int16x4_t __rev0_814; __rev0_814 = __builtin_shufflevector(__s0_814, __s0_814, 3, 2, 1, 0); \ | 61778 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15); |
| 62324 | int32x4_t __rev1_814; __rev1_814 = __builtin_shufflevector(__s1_814, __s1_814, 3, 2, 1, 0); \ | 61779 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62325 | __ret_814 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_814), (int16x4_t)(__noswap_vrshrn_n_s32(__rev1_814, __p2_814)))); \ | 61780 | return __ret; |
| 62326 | __ret_814 = __builtin_shufflevector(__ret_814, __ret_814, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61781 | } |
| 62327 | __ret_814; \ | | |
| 62328 | }) | | |
| 62329 | #endif | 61782 | #endif |
| 62330 | | 61783 | |
| 62331 | #ifdef __LITTLE_ENDIAN__ | 61784 | #ifdef __LITTLE_ENDIAN__ |
| 62332 | #define vrshrn_high_n_s64(__p0_815, __p1_815, __p2_815) __extension__ ({ \ | 61785 | __ai uint8x16_t vuzp2q_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 62333 | int32x4_t __ret_815; \ | 61786 | uint8x16_t __ret; |
| 62334 | int32x2_t __s0_815 = __p0_815; \ | 61787 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31); |
| 62335 | int64x2_t __s1_815 = __p1_815; \ | 61788 | return __ret; |
| 62336 | __ret_815 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_815), (int32x2_t)(vrshrn_n_s64(__s1_815, __p2_815)))); \ | 61789 | } |
| 62337 | __ret_815; \ | | |
| 62338 | }) | | |
| 62339 | #else | 61790 | #else |
| 62340 | #define vrshrn_high_n_s64(__p0_816, __p1_816, __p2_816) __extension__ ({ \ | 61791 | __ai uint8x16_t vuzp2q_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 62341 | int32x4_t __ret_816; \ | 61792 | uint8x16_t __ret; |
| 62342 | int32x2_t __s0_816 = __p0_816; \ | 61793 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62343 | int64x2_t __s1_816 = __p1_816; \ | 61794 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62344 | int32x2_t __rev0_816; __rev0_816 = __builtin_shufflevector(__s0_816, __s0_816, 1, 0); \ | 61795 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31); |
| 62345 | int64x2_t __rev1_816; __rev1_816 = __builtin_shufflevector(__s1_816, __s1_816, 1, 0); \ | 61796 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62346 | __ret_816 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_816), (int32x2_t)(__noswap_vrshrn_n_s64(__rev1_816, __p2_816)))); \ | 61797 | return __ret; |
| 62347 | __ret_816 = __builtin_shufflevector(__ret_816, __ret_816, 3, 2, 1, 0); \ | 61798 | } |
| 62348 | __ret_816; \ | | |
| 62349 | }) | | |
| 62350 | #endif | 61799 | #endif |
| 62351 | | 61800 | |
| 62352 | #ifdef __LITTLE_ENDIAN__ | 61801 | #ifdef __LITTLE_ENDIAN__ |
| 62353 | #define vrshrn_high_n_s16(__p0_817, __p1_817, __p2_817) __extension__ ({ \ | 61802 | __ai uint32x4_t vuzp2q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 62354 | int8x16_t __ret_817; \ | 61803 | uint32x4_t __ret; |
| 62355 | int8x8_t __s0_817 = __p0_817; \ | 61804 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7); |
| 62356 | int16x8_t __s1_817 = __p1_817; \ | 61805 | return __ret; |
| 62357 | __ret_817 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_817), (int8x8_t)(vrshrn_n_s16(__s1_817, __p2_817)))); \ | 61806 | } |
| 62358 | __ret_817; \ | | |
| 62359 | }) | | |
| 62360 | #else | 61807 | #else |
| 62361 | #define vrshrn_high_n_s16(__p0_818, __p1_818, __p2_818) __extension__ ({ \ | 61808 | __ai uint32x4_t vuzp2q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 62362 | int8x16_t __ret_818; \ | 61809 | uint32x4_t __ret; |
| 62363 | int8x8_t __s0_818 = __p0_818; \ | 61810 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 62364 | int16x8_t __s1_818 = __p1_818; \ | 61811 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 62365 | int8x8_t __rev0_818; __rev0_818 = __builtin_shufflevector(__s0_818, __s0_818, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61812 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7); |
| 62366 | int16x8_t __rev1_818; __rev1_818 = __builtin_shufflevector(__s1_818, __s1_818, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61813 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 62367 | __ret_818 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_818), (int8x8_t)(__noswap_vrshrn_n_s16(__rev1_818, __p2_818)))); \ | 61814 | return __ret; |
| 62368 | __ret_818 = __builtin_shufflevector(__ret_818, __ret_818, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61815 | } |
| 62369 | __ret_818; \ | | |
| 62370 | }) | | |
| 62371 | #endif | 61816 | #endif |
| 62372 | | 61817 | |
| 62373 | #ifdef __LITTLE_ENDIAN__ | 61818 | #ifdef __LITTLE_ENDIAN__ |
| 62374 | __ai float64x2_t vrsqrteq_f64(float64x2_t __p0) { | 61819 | __ai uint64x2_t vuzp2q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 62375 | float64x2_t __ret; | 61820 | uint64x2_t __ret; |
| 62376 | __ret = (float64x2_t) __builtin_neon_vrsqrteq_v((int8x16_t)__p0, 42); | 61821 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 62377 | return __ret; | 61822 | return __ret; |
| 62378 | } | 61823 | } |
| 62379 | #else | 61824 | #else |
| 62380 | __ai float64x2_t vrsqrteq_f64(float64x2_t __p0) { | 61825 | __ai uint64x2_t vuzp2q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 62381 | float64x2_t __ret; | 61826 | uint64x2_t __ret; |
| 62382 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 61827 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 62383 | __ret = (float64x2_t) __builtin_neon_vrsqrteq_v((int8x16_t)__rev0, 42); | 61828 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 61829 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 62384 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 61830 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 62385 | return __ret; | 61831 | return __ret; |
| 62386 | } | 61832 | } |
| 62387 | #endif | 61833 | #endif |
| 62388 | | 61834 | |
| 62389 | __ai float64x1_t vrsqrte_f64(float64x1_t __p0) { | 61835 | #ifdef __LITTLE_ENDIAN__ |
| 62390 | float64x1_t __ret; | 61836 | __ai uint16x8_t vuzp2q_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 62391 | __ret = (float64x1_t) __builtin_neon_vrsqrte_v((int8x8_t)__p0, 10); | 61837 | uint16x8_t __ret; |
| | 61838 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15); |
| 62392 | return __ret; | 61839 | return __ret; |
| 62393 | } | 61840 | } |
| 62394 | __ai float64_t vrsqrted_f64(float64_t __p0) { | 61841 | #else |
| 62395 | float64_t __ret; | 61842 | __ai uint16x8_t vuzp2q_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 62396 | __ret = (float64_t) __builtin_neon_vrsqrted_f64(__p0); | 61843 | uint16x8_t __ret; |
| | 61844 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 61845 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 61846 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15); |
| | 61847 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62397 | return __ret; | 61848 | return __ret; |
| 62398 | } | 61849 | } |
| 62399 | __ai float32_t vrsqrtes_f32(float32_t __p0) { | 61850 | #endif |
| 62400 | float32_t __ret; | 61851 | |
| 62401 | __ret = (float32_t) __builtin_neon_vrsqrtes_f32(__p0); | 61852 | #ifdef __LITTLE_ENDIAN__ |
| | 61853 | __ai int8x16_t vuzp2q_s8(int8x16_t __p0, int8x16_t __p1) { |
| | 61854 | int8x16_t __ret; |
| | 61855 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31); |
| | 61856 | return __ret; |
| | 61857 | } |
| | 61858 | #else |
| | 61859 | __ai int8x16_t vuzp2q_s8(int8x16_t __p0, int8x16_t __p1) { |
| | 61860 | int8x16_t __ret; |
| | 61861 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 61862 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 61863 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31); |
| | 61864 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62402 | return __ret; | 61865 | return __ret; |
| 62403 | } | 61866 | } |
| | 61867 | #endif |
| | 61868 | |
| 62404 | #ifdef __LITTLE_ENDIAN__ | 61869 | #ifdef __LITTLE_ENDIAN__ |
| 62405 | __ai float64x2_t vrsqrtsq_f64(float64x2_t __p0, float64x2_t __p1) { | 61870 | __ai float64x2_t vuzp2q_f64(float64x2_t __p0, float64x2_t __p1) { |
| 62406 | float64x2_t __ret; | 61871 | float64x2_t __ret; |
| 62407 | __ret = (float64x2_t) __builtin_neon_vrsqrtsq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); | 61872 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 62408 | return __ret; | 61873 | return __ret; |
| 62409 | } | 61874 | } |
| 62410 | #else | 61875 | #else |
| 62411 | __ai float64x2_t vrsqrtsq_f64(float64x2_t __p0, float64x2_t __p1) { | 61876 | __ai float64x2_t vuzp2q_f64(float64x2_t __p0, float64x2_t __p1) { |
| 62412 | float64x2_t __ret; | 61877 | float64x2_t __ret; |
| 62413 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 61878 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 62414 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 61879 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 62415 | __ret = (float64x2_t) __builtin_neon_vrsqrtsq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); | 61880 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 62416 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 61881 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 62417 | return __ret; | 61882 | return __ret; |
| 62418 | } | 61883 | } |
| 62419 | #endif | 61884 | #endif |
| 62420 | | 61885 | |
| 62421 | __ai float64x1_t vrsqrts_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 62422 | float64x1_t __ret; | | |
| 62423 | __ret = (float64x1_t) __builtin_neon_vrsqrts_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | | |
| 62424 | return __ret; | | |
| 62425 | } | | |
| 62426 | __ai float64_t vrsqrtsd_f64(float64_t __p0, float64_t __p1) { | | |
| 62427 | float64_t __ret; | | |
| 62428 | __ret = (float64_t) __builtin_neon_vrsqrtsd_f64(__p0, __p1); | | |
| 62429 | return __ret; | | |
| 62430 | } | | |
| 62431 | __ai float32_t vrsqrtss_f32(float32_t __p0, float32_t __p1) { | | |
| 62432 | float32_t __ret; | | |
| 62433 | __ret = (float32_t) __builtin_neon_vrsqrtss_f32(__p0, __p1); | | |
| 62434 | return __ret; | | |
| 62435 | } | | |
| 62436 | #define vrsrad_n_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 62437 | uint64_t __ret; \ | | |
| 62438 | uint64_t __s0 = __p0; \ | | |
| 62439 | uint64_t __s1 = __p1; \ | | |
| 62440 | __ret = (uint64_t) __builtin_neon_vrsrad_n_u64(__s0, __s1, __p2); \ | | |
| 62441 | __ret; \ | | |
| 62442 | }) | | |
| 62443 | #define vrsrad_n_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 62444 | int64_t __ret; \ | | |
| 62445 | int64_t __s0 = __p0; \ | | |
| 62446 | int64_t __s1 = __p1; \ | | |
| 62447 | __ret = (int64_t) __builtin_neon_vrsrad_n_s64(__s0, __s1, __p2); \ | | |
| 62448 | __ret; \ | | |
| 62449 | }) | | |
| 62450 | #ifdef __LITTLE_ENDIAN__ | 61886 | #ifdef __LITTLE_ENDIAN__ |
| 62451 | __ai uint16x8_t vrsubhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 61887 | __ai float32x4_t vuzp2q_f32(float32x4_t __p0, float32x4_t __p1) { |
| 62452 | uint16x8_t __ret; | 61888 | float32x4_t __ret; |
| 62453 | __ret = vcombine_u16(__p0, vrsubhn_u32(__p1, __p2)); | 61889 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7); |
| 62454 | return __ret; | 61890 | return __ret; |
| 62455 | } | 61891 | } |
| 62456 | #else | 61892 | #else |
| 62457 | __ai uint16x8_t vrsubhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 61893 | __ai float32x4_t vuzp2q_f32(float32x4_t __p0, float32x4_t __p1) { |
| 62458 | uint16x8_t __ret; | 61894 | float32x4_t __ret; |
| 62459 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 61895 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 62460 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 61896 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 62461 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 61897 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7); |
| 62462 | __ret = __noswap_vcombine_u16(__rev0, __noswap_vrsubhn_u32(__rev1, __rev2)); | 61898 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 62463 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 62464 | return __ret; | 61899 | return __ret; |
| 62465 | } | 61900 | } |
| 62466 | #endif | 61901 | #endif |
| 62467 | | 61902 | |
| 62468 | #ifdef __LITTLE_ENDIAN__ | 61903 | #ifdef __LITTLE_ENDIAN__ |
| 62469 | __ai uint32x4_t vrsubhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | 61904 | __ai int32x4_t vuzp2q_s32(int32x4_t __p0, int32x4_t __p1) { |
| 62470 | uint32x4_t __ret; | 61905 | int32x4_t __ret; |
| 62471 | __ret = vcombine_u32(__p0, vrsubhn_u64(__p1, __p2)); | 61906 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7); |
| 62472 | return __ret; | 61907 | return __ret; |
| 62473 | } | 61908 | } |
| 62474 | #else | 61909 | #else |
| 62475 | __ai uint32x4_t vrsubhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | 61910 | __ai int32x4_t vuzp2q_s32(int32x4_t __p0, int32x4_t __p1) { |
| 62476 | uint32x4_t __ret; | 61911 | int32x4_t __ret; |
| 62477 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 61912 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 62478 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 61913 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 62479 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 61914 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7); |
| 62480 | __ret = __noswap_vcombine_u32(__rev0, __noswap_vrsubhn_u64(__rev1, __rev2)); | | |
| 62481 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 61915 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 62482 | return __ret; | 61916 | return __ret; |
| 62483 | } | 61917 | } |
| 62484 | #endif | 61918 | #endif |
| 62485 | | 61919 | |
| 62486 | #ifdef __LITTLE_ENDIAN__ | 61920 | #ifdef __LITTLE_ENDIAN__ |
| 62487 | __ai uint8x16_t vrsubhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { | 61921 | __ai int64x2_t vuzp2q_s64(int64x2_t __p0, int64x2_t __p1) { |
| 62488 | uint8x16_t __ret; | 61922 | int64x2_t __ret; |
| 62489 | __ret = vcombine_u8(__p0, vrsubhn_u16(__p1, __p2)); | 61923 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 62490 | return __ret; | 61924 | return __ret; |
| 62491 | } | 61925 | } |
| 62492 | #else | 61926 | #else |
| 62493 | __ai uint8x16_t vrsubhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { | 61927 | __ai int64x2_t vuzp2q_s64(int64x2_t __p0, int64x2_t __p1) { |
| 62494 | uint8x16_t __ret; | 61928 | int64x2_t __ret; |
| 62495 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61929 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 62496 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 61930 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 62497 | uint16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 61931 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 62498 | __ret = __noswap_vcombine_u8(__rev0, __noswap_vrsubhn_u16(__rev1, __rev2)); | 61932 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 62499 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 62500 | return __ret; | 61933 | return __ret; |
| 62501 | } | 61934 | } |
| 62502 | #endif | 61935 | #endif |
| 62503 | | 61936 | |
| 62504 | #ifdef __LITTLE_ENDIAN__ | 61937 | #ifdef __LITTLE_ENDIAN__ |
| 62505 | __ai int16x8_t vrsubhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 61938 | __ai int16x8_t vuzp2q_s16(int16x8_t __p0, int16x8_t __p1) { |
| 62506 | int16x8_t __ret; | 61939 | int16x8_t __ret; |
| 62507 | __ret = vcombine_s16(__p0, vrsubhn_s32(__p1, __p2)); | 61940 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15); |
| 62508 | return __ret; | 61941 | return __ret; |
| 62509 | } | 61942 | } |
| 62510 | #else | 61943 | #else |
| 62511 | __ai int16x8_t vrsubhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 61944 | __ai int16x8_t vuzp2q_s16(int16x8_t __p0, int16x8_t __p1) { |
| 62512 | int16x8_t __ret; | 61945 | int16x8_t __ret; |
| 62513 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 61946 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62514 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 61947 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62515 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 61948 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15); |
| 62516 | __ret = __noswap_vcombine_s16(__rev0, __noswap_vrsubhn_s32(__rev1, __rev2)); | | |
| 62517 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 61949 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62518 | return __ret; | 61950 | return __ret; |
| 62519 | } | 61951 | } |
| 62520 | #endif | 61952 | #endif |
| 62521 | | 61953 | |
| 62522 | #ifdef __LITTLE_ENDIAN__ | 61954 | #ifdef __LITTLE_ENDIAN__ |
| 62523 | __ai int32x4_t vrsubhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { | 61955 | __ai uint8x8_t vuzp2_u8(uint8x8_t __p0, uint8x8_t __p1) { |
| 62524 | int32x4_t __ret; | 61956 | uint8x8_t __ret; |
| 62525 | __ret = vcombine_s32(__p0, vrsubhn_s64(__p1, __p2)); | 61957 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15); |
| 62526 | return __ret; | 61958 | return __ret; |
| 62527 | } | 61959 | } |
| 62528 | #else | 61960 | #else |
| 62529 | __ai int32x4_t vrsubhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { | 61961 | __ai uint8x8_t vuzp2_u8(uint8x8_t __p0, uint8x8_t __p1) { |
| 62530 | int32x4_t __ret; | 61962 | uint8x8_t __ret; |
| 62531 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 61963 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62532 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 61964 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62533 | int64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 61965 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15); |
| 62534 | __ret = __noswap_vcombine_s32(__rev0, __noswap_vrsubhn_s64(__rev1, __rev2)); | 61966 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62535 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 62536 | return __ret; | 61967 | return __ret; |
| 62537 | } | 61968 | } |
| 62538 | #endif | 61969 | #endif |
| 62539 | | 61970 | |
| 62540 | #ifdef __LITTLE_ENDIAN__ | 61971 | #ifdef __LITTLE_ENDIAN__ |
| 62541 | __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 61972 | __ai uint32x2_t vuzp2_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 62542 | int8x16_t __ret; | 61973 | uint32x2_t __ret; |
| 62543 | __ret = vcombine_s8(__p0, vrsubhn_s16(__p1, __p2)); | 61974 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 62544 | return __ret; | 61975 | return __ret; |
| 62545 | } | 61976 | } |
| 62546 | #else | 61977 | #else |
| 62547 | __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 61978 | __ai uint32x2_t vuzp2_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 62548 | int8x16_t __ret; | 61979 | uint32x2_t __ret; |
| 62549 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 61980 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 62550 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 61981 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 62551 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 61982 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 62552 | __ret = __noswap_vcombine_s8(__rev0, __noswap_vrsubhn_s16(__rev1, __rev2)); | 61983 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 62553 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 62554 | return __ret; | 61984 | return __ret; |
| 62555 | } | 61985 | } |
| 62556 | #endif | 61986 | #endif |
| 62557 | | 61987 | |
| 62558 | #define vset_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 62559 | poly64x1_t __ret; \ | | |
| 62560 | poly64_t __s0 = __p0; \ | | |
| 62561 | poly64x1_t __s1 = __p1; \ | | |
| 62562 | __ret = (poly64x1_t) __builtin_neon_vset_lane_i64(__s0, (poly64x1_t)__s1, __p2); \ | | |
| 62563 | __ret; \ | | |
| 62564 | }) | | |
| 62565 | #ifdef __LITTLE_ENDIAN__ | 61988 | #ifdef __LITTLE_ENDIAN__ |
| 62566 | #define vsetq_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 61989 | __ai uint16x4_t vuzp2_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 62567 | poly64x2_t __ret; \ | 61990 | uint16x4_t __ret; |
| 62568 | poly64_t __s0 = __p0; \ | 61991 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7); |
| 62569 | poly64x2_t __s1 = __p1; \ | 61992 | return __ret; |
| 62570 | __ret = (poly64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (poly64x2_t)__s1, __p2); \ | 61993 | } |
| 62571 | __ret; \ | | |
| 62572 | }) | | |
| 62573 | #else | 61994 | #else |
| 62574 | #define vsetq_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 61995 | __ai uint16x4_t vuzp2_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 62575 | poly64x2_t __ret; \ | 61996 | uint16x4_t __ret; |
| 62576 | poly64_t __s0 = __p0; \ | 61997 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 62577 | poly64x2_t __s1 = __p1; \ | 61998 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 62578 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 61999 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7); |
| 62579 | __ret = (poly64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (poly64x2_t)__rev1, __p2); \ | 62000 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 62580 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 62001 | return __ret; |
| 62581 | __ret; \ | 62002 | } |
| 62582 | }) | | |
| 62583 | #define __noswap_vsetq_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 62584 | poly64x2_t __ret; \ | | |
| 62585 | poly64_t __s0 = __p0; \ | | |
| 62586 | poly64x2_t __s1 = __p1; \ | | |
| 62587 | __ret = (poly64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (poly64x2_t)__s1, __p2); \ | | |
| 62588 | __ret; \ | | |
| 62589 | }) | | |
| 62590 | #endif | 62003 | #endif |
| 62591 | | 62004 | |
| 62592 | #ifdef __LITTLE_ENDIAN__ | 62005 | #ifdef __LITTLE_ENDIAN__ |
| 62593 | #define vsetq_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 62006 | __ai int8x8_t vuzp2_s8(int8x8_t __p0, int8x8_t __p1) { |
| 62594 | float64x2_t __ret; \ | 62007 | int8x8_t __ret; |
| 62595 | float64_t __s0 = __p0; \ | 62008 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15); |
| 62596 | float64x2_t __s1 = __p1; \ | | |
| 62597 | __ret = (float64x2_t) __builtin_neon_vsetq_lane_f64(__s0, (float64x2_t)__s1, __p2); \ | | |
| 62598 | __ret; \ | | |
| 62599 | }) | | |
| 62600 | #else | | |
| 62601 | #define vsetq_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 62602 | float64x2_t __ret; \ | | |
| 62603 | float64_t __s0 = __p0; \ | | |
| 62604 | float64x2_t __s1 = __p1; \ | | |
| 62605 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | | |
| 62606 | __ret = (float64x2_t) __builtin_neon_vsetq_lane_f64(__s0, (float64x2_t)__rev1, __p2); \ | | |
| 62607 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | | |
| 62608 | __ret; \ | | |
| 62609 | }) | | |
| 62610 | #define __noswap_vsetq_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 62611 | float64x2_t __ret; \ | | |
| 62612 | float64_t __s0 = __p0; \ | | |
| 62613 | float64x2_t __s1 = __p1; \ | | |
| 62614 | __ret = (float64x2_t) __builtin_neon_vsetq_lane_f64(__s0, (float64x2_t)__s1, __p2); \ | | |
| 62615 | __ret; \ | | |
| 62616 | }) | | |
| 62617 | #endif | | |
| 62618 | | | |
| 62619 | #define vset_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 62620 | float64x1_t __ret; \ | | |
| 62621 | float64_t __s0 = __p0; \ | | |
| 62622 | float64x1_t __s1 = __p1; \ | | |
| 62623 | __ret = (float64x1_t) __builtin_neon_vset_lane_f64(__s0, (float64x1_t)__s1, __p2); \ | | |
| 62624 | __ret; \ | | |
| 62625 | }) | | |
| 62626 | __ai uint64_t vshld_u64(uint64_t __p0, int64_t __p1) { | | |
| 62627 | uint64_t __ret; | | |
| 62628 | __ret = (uint64_t) __builtin_neon_vshld_u64(__p0, __p1); | | |
| 62629 | return __ret; | 62009 | return __ret; |
| 62630 | } | 62010 | } |
| 62631 | __ai int64_t vshld_s64(int64_t __p0, int64_t __p1) { | 62011 | #else |
| 62632 | int64_t __ret; | 62012 | __ai int8x8_t vuzp2_s8(int8x8_t __p0, int8x8_t __p1) { |
| 62633 | __ret = (int64_t) __builtin_neon_vshld_s64(__p0, __p1); | 62013 | int8x8_t __ret; |
| | 62014 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 62015 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 62016 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15); |
| | 62017 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62634 | return __ret; | 62018 | return __ret; |
| 62635 | } | 62019 | } |
| 62636 | #define vshld_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 62637 | uint64_t __ret; \ | | |
| 62638 | uint64_t __s0 = __p0; \ | | |
| 62639 | __ret = (uint64_t) __builtin_neon_vshld_n_u64(__s0, __p1); \ | | |
| 62640 | __ret; \ | | |
| 62641 | }) | | |
| 62642 | #define vshld_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 62643 | int64_t __ret; \ | | |
| 62644 | int64_t __s0 = __p0; \ | | |
| 62645 | __ret = (int64_t) __builtin_neon_vshld_n_s64(__s0, __p1); \ | | |
| 62646 | __ret; \ | | |
| 62647 | }) | | |
| 62648 | #ifdef __LITTLE_ENDIAN__ | | |
| 62649 | #define vshll_high_n_u8(__p0_819, __p1_819) __extension__ ({ \ | | |
| 62650 | uint16x8_t __ret_819; \ | | |
| 62651 | uint8x16_t __s0_819 = __p0_819; \ | | |
| 62652 | __ret_819 = (uint16x8_t)(vshll_n_u8(vget_high_u8(__s0_819), __p1_819)); \ | | |
| 62653 | __ret_819; \ | | |
| 62654 | }) | | |
| 62655 | #else | | |
| 62656 | #define vshll_high_n_u8(__p0_820, __p1_820) __extension__ ({ \ | | |
| 62657 | uint16x8_t __ret_820; \ | | |
| 62658 | uint8x16_t __s0_820 = __p0_820; \ | | |
| 62659 | uint8x16_t __rev0_820; __rev0_820 = __builtin_shufflevector(__s0_820, __s0_820, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 62660 | __ret_820 = (uint16x8_t)(__noswap_vshll_n_u8(__noswap_vget_high_u8(__rev0_820), __p1_820)); \ | | |
| 62661 | __ret_820 = __builtin_shufflevector(__ret_820, __ret_820, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 62662 | __ret_820; \ | | |
| 62663 | }) | | |
| 62664 | #endif | 62020 | #endif |
| 62665 | | 62021 | |
| 62666 | #ifdef __LITTLE_ENDIAN__ | 62022 | #ifdef __LITTLE_ENDIAN__ |
| 62667 | #define vshll_high_n_u32(__p0_821, __p1_821) __extension__ ({ \ | 62023 | __ai float32x2_t vuzp2_f32(float32x2_t __p0, float32x2_t __p1) { |
| 62668 | uint64x2_t __ret_821; \ | 62024 | float32x2_t __ret; |
| 62669 | uint32x4_t __s0_821 = __p0_821; \ | 62025 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 62670 | __ret_821 = (uint64x2_t)(vshll_n_u32(vget_high_u32(__s0_821), __p1_821)); \ | 62026 | return __ret; |
| 62671 | __ret_821; \ | 62027 | } |
| 62672 | }) | | |
| 62673 | #else | 62028 | #else |
| 62674 | #define vshll_high_n_u32(__p0_822, __p1_822) __extension__ ({ \ | 62029 | __ai float32x2_t vuzp2_f32(float32x2_t __p0, float32x2_t __p1) { |
| 62675 | uint64x2_t __ret_822; \ | 62030 | float32x2_t __ret; |
| 62676 | uint32x4_t __s0_822 = __p0_822; \ | 62031 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 62677 | uint32x4_t __rev0_822; __rev0_822 = __builtin_shufflevector(__s0_822, __s0_822, 3, 2, 1, 0); \ | 62032 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 62678 | __ret_822 = (uint64x2_t)(__noswap_vshll_n_u32(__noswap_vget_high_u32(__rev0_822), __p1_822)); \ | 62033 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 62679 | __ret_822 = __builtin_shufflevector(__ret_822, __ret_822, 1, 0); \ | 62034 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 62680 | __ret_822; \ | 62035 | return __ret; |
| 62681 | }) | 62036 | } |
| 62682 | #endif | 62037 | #endif |
| 62683 | | 62038 | |
| 62684 | #ifdef __LITTLE_ENDIAN__ | 62039 | #ifdef __LITTLE_ENDIAN__ |
| 62685 | #define vshll_high_n_u16(__p0_823, __p1_823) __extension__ ({ \ | 62040 | __ai int32x2_t vuzp2_s32(int32x2_t __p0, int32x2_t __p1) { |
| 62686 | uint32x4_t __ret_823; \ | 62041 | int32x2_t __ret; |
| 62687 | uint16x8_t __s0_823 = __p0_823; \ | 62042 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 62688 | __ret_823 = (uint32x4_t)(vshll_n_u16(vget_high_u16(__s0_823), __p1_823)); \ | 62043 | return __ret; |
| 62689 | __ret_823; \ | 62044 | } |
| 62690 | }) | | |
| 62691 | #else | 62045 | #else |
| 62692 | #define vshll_high_n_u16(__p0_824, __p1_824) __extension__ ({ \ | 62046 | __ai int32x2_t vuzp2_s32(int32x2_t __p0, int32x2_t __p1) { |
| 62693 | uint32x4_t __ret_824; \ | 62047 | int32x2_t __ret; |
| 62694 | uint16x8_t __s0_824 = __p0_824; \ | 62048 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 62695 | uint16x8_t __rev0_824; __rev0_824 = __builtin_shufflevector(__s0_824, __s0_824, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62049 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 62696 | __ret_824 = (uint32x4_t)(__noswap_vshll_n_u16(__noswap_vget_high_u16(__rev0_824), __p1_824)); \ | 62050 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 62697 | __ret_824 = __builtin_shufflevector(__ret_824, __ret_824, 3, 2, 1, 0); \ | 62051 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 62698 | __ret_824; \ | 62052 | return __ret; |
| 62699 | }) | 62053 | } |
| 62700 | #endif | 62054 | #endif |
| 62701 | | 62055 | |
| 62702 | #ifdef __LITTLE_ENDIAN__ | 62056 | #ifdef __LITTLE_ENDIAN__ |
| 62703 | #define vshll_high_n_s8(__p0_825, __p1_825) __extension__ ({ \ | 62057 | __ai int16x4_t vuzp2_s16(int16x4_t __p0, int16x4_t __p1) { |
| 62704 | int16x8_t __ret_825; \ | 62058 | int16x4_t __ret; |
| 62705 | int8x16_t __s0_825 = __p0_825; \ | 62059 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7); |
| 62706 | __ret_825 = (int16x8_t)(vshll_n_s8(vget_high_s8(__s0_825), __p1_825)); \ | 62060 | return __ret; |
| 62707 | __ret_825; \ | 62061 | } |
| 62708 | }) | | |
| 62709 | #else | 62062 | #else |
| 62710 | #define vshll_high_n_s8(__p0_826, __p1_826) __extension__ ({ \ | 62063 | __ai int16x4_t vuzp2_s16(int16x4_t __p0, int16x4_t __p1) { |
| 62711 | int16x8_t __ret_826; \ | 62064 | int16x4_t __ret; |
| 62712 | int8x16_t __s0_826 = __p0_826; \ | 62065 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 62713 | int8x16_t __rev0_826; __rev0_826 = __builtin_shufflevector(__s0_826, __s0_826, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62066 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 62714 | __ret_826 = (int16x8_t)(__noswap_vshll_n_s8(__noswap_vget_high_s8(__rev0_826), __p1_826)); \ | 62067 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7); |
| 62715 | __ret_826 = __builtin_shufflevector(__ret_826, __ret_826, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62068 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 62716 | __ret_826; \ | 62069 | return __ret; |
| 62717 | }) | 62070 | } |
| 62718 | #endif | 62071 | #endif |
| 62719 | | 62072 | |
| 62720 | #ifdef __LITTLE_ENDIAN__ | 62073 | #ifdef __LITTLE_ENDIAN__ |
| 62721 | #define vshll_high_n_s32(__p0_827, __p1_827) __extension__ ({ \ | 62074 | __ai poly8x8_t vzip1_p8(poly8x8_t __p0, poly8x8_t __p1) { |
| 62722 | int64x2_t __ret_827; \ | 62075 | poly8x8_t __ret; |
| 62723 | int32x4_t __s0_827 = __p0_827; \ | 62076 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 1, 9, 2, 10, 3, 11); |
| 62724 | __ret_827 = (int64x2_t)(vshll_n_s32(vget_high_s32(__s0_827), __p1_827)); \ | 62077 | return __ret; |
| 62725 | __ret_827; \ | 62078 | } |
| 62726 | }) | | |
| 62727 | #else | 62079 | #else |
| 62728 | #define vshll_high_n_s32(__p0_828, __p1_828) __extension__ ({ \ | 62080 | __ai poly8x8_t vzip1_p8(poly8x8_t __p0, poly8x8_t __p1) { |
| 62729 | int64x2_t __ret_828; \ | 62081 | poly8x8_t __ret; |
| 62730 | int32x4_t __s0_828 = __p0_828; \ | 62082 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62731 | int32x4_t __rev0_828; __rev0_828 = __builtin_shufflevector(__s0_828, __s0_828, 3, 2, 1, 0); \ | 62083 | poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62732 | __ret_828 = (int64x2_t)(__noswap_vshll_n_s32(__noswap_vget_high_s32(__rev0_828), __p1_828)); \ | 62084 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 1, 9, 2, 10, 3, 11); |
| 62733 | __ret_828 = __builtin_shufflevector(__ret_828, __ret_828, 1, 0); \ | 62085 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62734 | __ret_828; \ | 62086 | return __ret; |
| 62735 | }) | 62087 | } |
| 62736 | #endif | 62088 | #endif |
| 62737 | | 62089 | |
| 62738 | #ifdef __LITTLE_ENDIAN__ | 62090 | #ifdef __LITTLE_ENDIAN__ |
| 62739 | #define vshll_high_n_s16(__p0_829, __p1_829) __extension__ ({ \ | 62091 | __ai poly16x4_t vzip1_p16(poly16x4_t __p0, poly16x4_t __p1) { |
| 62740 | int32x4_t __ret_829; \ | 62092 | poly16x4_t __ret; |
| 62741 | int16x8_t __s0_829 = __p0_829; \ | 62093 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 1, 5); |
| 62742 | __ret_829 = (int32x4_t)(vshll_n_s16(vget_high_s16(__s0_829), __p1_829)); \ | 62094 | return __ret; |
| 62743 | __ret_829; \ | 62095 | } |
| 62744 | }) | | |
| 62745 | #else | 62096 | #else |
| 62746 | #define vshll_high_n_s16(__p0_830, __p1_830) __extension__ ({ \ | 62097 | __ai poly16x4_t vzip1_p16(poly16x4_t __p0, poly16x4_t __p1) { |
| 62747 | int32x4_t __ret_830; \ | 62098 | poly16x4_t __ret; |
| 62748 | int16x8_t __s0_830 = __p0_830; \ | 62099 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 62749 | int16x8_t __rev0_830; __rev0_830 = __builtin_shufflevector(__s0_830, __s0_830, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62100 | poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 62750 | __ret_830 = (int32x4_t)(__noswap_vshll_n_s16(__noswap_vget_high_s16(__rev0_830), __p1_830)); \ | 62101 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 1, 5); |
| 62751 | __ret_830 = __builtin_shufflevector(__ret_830, __ret_830, 3, 2, 1, 0); \ | 62102 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 62752 | __ret_830; \ | 62103 | return __ret; |
| 62753 | }) | 62104 | } |
| 62754 | #endif | 62105 | #endif |
| 62755 | | 62106 | |
| 62756 | #define vshrd_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 62757 | uint64_t __ret; \ | | |
| 62758 | uint64_t __s0 = __p0; \ | | |
| 62759 | __ret = (uint64_t) __builtin_neon_vshrd_n_u64(__s0, __p1); \ | | |
| 62760 | __ret; \ | | |
| 62761 | }) | | |
| 62762 | #define vshrd_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 62763 | int64_t __ret; \ | | |
| 62764 | int64_t __s0 = __p0; \ | | |
| 62765 | __ret = (int64_t) __builtin_neon_vshrd_n_s64(__s0, __p1); \ | | |
| 62766 | __ret; \ | | |
| 62767 | }) | | |
| 62768 | #ifdef __LITTLE_ENDIAN__ | 62107 | #ifdef __LITTLE_ENDIAN__ |
| 62769 | #define vshrn_high_n_u32(__p0_831, __p1_831, __p2_831) __extension__ ({ \ | 62108 | __ai poly8x16_t vzip1q_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| 62770 | uint16x8_t __ret_831; \ | 62109 | poly8x16_t __ret; |
| 62771 | uint16x4_t __s0_831 = __p0_831; \ | 62110 | __ret = __builtin_shufflevector(__p0, __p1, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); |
| 62772 | uint32x4_t __s1_831 = __p1_831; \ | 62111 | return __ret; |
| 62773 | __ret_831 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_831), (uint16x4_t)(vshrn_n_u32(__s1_831, __p2_831)))); \ | 62112 | } |
| 62774 | __ret_831; \ | | |
| 62775 | }) | | |
| 62776 | #else | 62113 | #else |
| 62777 | #define vshrn_high_n_u32(__p0_832, __p1_832, __p2_832) __extension__ ({ \ | 62114 | __ai poly8x16_t vzip1q_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| 62778 | uint16x8_t __ret_832; \ | 62115 | poly8x16_t __ret; |
| 62779 | uint16x4_t __s0_832 = __p0_832; \ | 62116 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62780 | uint32x4_t __s1_832 = __p1_832; \ | 62117 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62781 | uint16x4_t __rev0_832; __rev0_832 = __builtin_shufflevector(__s0_832, __s0_832, 3, 2, 1, 0); \ | 62118 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); |
| 62782 | uint32x4_t __rev1_832; __rev1_832 = __builtin_shufflevector(__s1_832, __s1_832, 3, 2, 1, 0); \ | 62119 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62783 | __ret_832 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_832), (uint16x4_t)(__noswap_vshrn_n_u32(__rev1_832, __p2_832)))); \ | 62120 | return __ret; |
| 62784 | __ret_832 = __builtin_shufflevector(__ret_832, __ret_832, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62121 | } |
| 62785 | __ret_832; \ | | |
| 62786 | }) | | |
| 62787 | #endif | 62122 | #endif |
| 62788 | | 62123 | |
| 62789 | #ifdef __LITTLE_ENDIAN__ | 62124 | #ifdef __LITTLE_ENDIAN__ |
| 62790 | #define vshrn_high_n_u64(__p0_833, __p1_833, __p2_833) __extension__ ({ \ | 62125 | __ai poly64x2_t vzip1q_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 62791 | uint32x4_t __ret_833; \ | 62126 | poly64x2_t __ret; |
| 62792 | uint32x2_t __s0_833 = __p0_833; \ | 62127 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 62793 | uint64x2_t __s1_833 = __p1_833; \ | 62128 | return __ret; |
| 62794 | __ret_833 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_833), (uint32x2_t)(vshrn_n_u64(__s1_833, __p2_833)))); \ | 62129 | } |
| 62795 | __ret_833; \ | | |
| 62796 | }) | | |
| 62797 | #else | 62130 | #else |
| 62798 | #define vshrn_high_n_u64(__p0_834, __p1_834, __p2_834) __extension__ ({ \ | 62131 | __ai poly64x2_t vzip1q_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 62799 | uint32x4_t __ret_834; \ | 62132 | poly64x2_t __ret; |
| 62800 | uint32x2_t __s0_834 = __p0_834; \ | 62133 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 62801 | uint64x2_t __s1_834 = __p1_834; \ | 62134 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 62802 | uint32x2_t __rev0_834; __rev0_834 = __builtin_shufflevector(__s0_834, __s0_834, 1, 0); \ | 62135 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| 62803 | uint64x2_t __rev1_834; __rev1_834 = __builtin_shufflevector(__s1_834, __s1_834, 1, 0); \ | 62136 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 62804 | __ret_834 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_834), (uint32x2_t)(__noswap_vshrn_n_u64(__rev1_834, __p2_834)))); \ | 62137 | return __ret; |
| 62805 | __ret_834 = __builtin_shufflevector(__ret_834, __ret_834, 3, 2, 1, 0); \ | 62138 | } |
| 62806 | __ret_834; \ | | |
| 62807 | }) | | |
| 62808 | #endif | 62139 | #endif |
| 62809 | | 62140 | |
| 62810 | #ifdef __LITTLE_ENDIAN__ | 62141 | #ifdef __LITTLE_ENDIAN__ |
| 62811 | #define vshrn_high_n_u16(__p0_835, __p1_835, __p2_835) __extension__ ({ \ | 62142 | __ai poly16x8_t vzip1q_p16(poly16x8_t __p0, poly16x8_t __p1) { |
| 62812 | uint8x16_t __ret_835; \ | 62143 | poly16x8_t __ret; |
| 62813 | uint8x8_t __s0_835 = __p0_835; \ | 62144 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 1, 9, 2, 10, 3, 11); |
| 62814 | uint16x8_t __s1_835 = __p1_835; \ | 62145 | return __ret; |
| 62815 | __ret_835 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_835), (uint8x8_t)(vshrn_n_u16(__s1_835, __p2_835)))); \ | 62146 | } |
| 62816 | __ret_835; \ | | |
| 62817 | }) | | |
| 62818 | #else | 62147 | #else |
| 62819 | #define vshrn_high_n_u16(__p0_836, __p1_836, __p2_836) __extension__ ({ \ | 62148 | __ai poly16x8_t vzip1q_p16(poly16x8_t __p0, poly16x8_t __p1) { |
| 62820 | uint8x16_t __ret_836; \ | 62149 | poly16x8_t __ret; |
| 62821 | uint8x8_t __s0_836 = __p0_836; \ | 62150 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62822 | uint16x8_t __s1_836 = __p1_836; \ | 62151 | poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62823 | uint8x8_t __rev0_836; __rev0_836 = __builtin_shufflevector(__s0_836, __s0_836, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62152 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 1, 9, 2, 10, 3, 11); |
| 62824 | uint16x8_t __rev1_836; __rev1_836 = __builtin_shufflevector(__s1_836, __s1_836, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62153 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62825 | __ret_836 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_836), (uint8x8_t)(__noswap_vshrn_n_u16(__rev1_836, __p2_836)))); \ | 62154 | return __ret; |
| 62826 | __ret_836 = __builtin_shufflevector(__ret_836, __ret_836, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62155 | } |
| 62827 | __ret_836; \ | | |
| 62828 | }) | | |
| 62829 | #endif | 62156 | #endif |
| 62830 | | 62157 | |
| 62831 | #ifdef __LITTLE_ENDIAN__ | 62158 | #ifdef __LITTLE_ENDIAN__ |
| 62832 | #define vshrn_high_n_s32(__p0_837, __p1_837, __p2_837) __extension__ ({ \ | 62159 | __ai uint8x16_t vzip1q_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 62833 | int16x8_t __ret_837; \ | 62160 | uint8x16_t __ret; |
| 62834 | int16x4_t __s0_837 = __p0_837; \ | 62161 | __ret = __builtin_shufflevector(__p0, __p1, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); |
| 62835 | int32x4_t __s1_837 = __p1_837; \ | 62162 | return __ret; |
| 62836 | __ret_837 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_837), (int16x4_t)(vshrn_n_s32(__s1_837, __p2_837)))); \ | 62163 | } |
| 62837 | __ret_837; \ | | |
| 62838 | }) | | |
| 62839 | #else | 62164 | #else |
| 62840 | #define vshrn_high_n_s32(__p0_838, __p1_838, __p2_838) __extension__ ({ \ | 62165 | __ai uint8x16_t vzip1q_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 62841 | int16x8_t __ret_838; \ | 62166 | uint8x16_t __ret; |
| 62842 | int16x4_t __s0_838 = __p0_838; \ | 62167 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62843 | int32x4_t __s1_838 = __p1_838; \ | 62168 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62844 | int16x4_t __rev0_838; __rev0_838 = __builtin_shufflevector(__s0_838, __s0_838, 3, 2, 1, 0); \ | 62169 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); |
| 62845 | int32x4_t __rev1_838; __rev1_838 = __builtin_shufflevector(__s1_838, __s1_838, 3, 2, 1, 0); \ | 62170 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62846 | __ret_838 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_838), (int16x4_t)(__noswap_vshrn_n_s32(__rev1_838, __p2_838)))); \ | 62171 | return __ret; |
| 62847 | __ret_838 = __builtin_shufflevector(__ret_838, __ret_838, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62172 | } |
| 62848 | __ret_838; \ | | |
| 62849 | }) | | |
| 62850 | #endif | 62173 | #endif |
| 62851 | | 62174 | |
| 62852 | #ifdef __LITTLE_ENDIAN__ | 62175 | #ifdef __LITTLE_ENDIAN__ |
| 62853 | #define vshrn_high_n_s64(__p0_839, __p1_839, __p2_839) __extension__ ({ \ | 62176 | __ai uint32x4_t vzip1q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 62854 | int32x4_t __ret_839; \ | 62177 | uint32x4_t __ret; |
| 62855 | int32x2_t __s0_839 = __p0_839; \ | 62178 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 1, 5); |
| 62856 | int64x2_t __s1_839 = __p1_839; \ | 62179 | return __ret; |
| 62857 | __ret_839 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_839), (int32x2_t)(vshrn_n_s64(__s1_839, __p2_839)))); \ | 62180 | } |
| 62858 | __ret_839; \ | | |
| 62859 | }) | | |
| 62860 | #else | 62181 | #else |
| 62861 | #define vshrn_high_n_s64(__p0_840, __p1_840, __p2_840) __extension__ ({ \ | 62182 | __ai uint32x4_t vzip1q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 62862 | int32x4_t __ret_840; \ | 62183 | uint32x4_t __ret; |
| 62863 | int32x2_t __s0_840 = __p0_840; \ | 62184 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 62864 | int64x2_t __s1_840 = __p1_840; \ | 62185 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 62865 | int32x2_t __rev0_840; __rev0_840 = __builtin_shufflevector(__s0_840, __s0_840, 1, 0); \ | 62186 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 1, 5); |
| 62866 | int64x2_t __rev1_840; __rev1_840 = __builtin_shufflevector(__s1_840, __s1_840, 1, 0); \ | 62187 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 62867 | __ret_840 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_840), (int32x2_t)(__noswap_vshrn_n_s64(__rev1_840, __p2_840)))); \ | 62188 | return __ret; |
| 62868 | __ret_840 = __builtin_shufflevector(__ret_840, __ret_840, 3, 2, 1, 0); \ | 62189 | } |
| 62869 | __ret_840; \ | | |
| 62870 | }) | | |
| 62871 | #endif | 62190 | #endif |
| 62872 | | 62191 | |
| 62873 | #ifdef __LITTLE_ENDIAN__ | 62192 | #ifdef __LITTLE_ENDIAN__ |
| 62874 | #define vshrn_high_n_s16(__p0_841, __p1_841, __p2_841) __extension__ ({ \ | 62193 | __ai uint64x2_t vzip1q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 62875 | int8x16_t __ret_841; \ | 62194 | uint64x2_t __ret; |
| 62876 | int8x8_t __s0_841 = __p0_841; \ | 62195 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 62877 | int16x8_t __s1_841 = __p1_841; \ | 62196 | return __ret; |
| 62878 | __ret_841 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_841), (int8x8_t)(vshrn_n_s16(__s1_841, __p2_841)))); \ | 62197 | } |
| 62879 | __ret_841; \ | | |
| 62880 | }) | | |
| 62881 | #else | 62198 | #else |
| 62882 | #define vshrn_high_n_s16(__p0_842, __p1_842, __p2_842) __extension__ ({ \ | 62199 | __ai uint64x2_t vzip1q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 62883 | int8x16_t __ret_842; \ | 62200 | uint64x2_t __ret; |
| 62884 | int8x8_t __s0_842 = __p0_842; \ | 62201 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 62885 | int16x8_t __s1_842 = __p1_842; \ | 62202 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 62886 | int8x8_t __rev0_842; __rev0_842 = __builtin_shufflevector(__s0_842, __s0_842, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62203 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| 62887 | int16x8_t __rev1_842; __rev1_842 = __builtin_shufflevector(__s1_842, __s1_842, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62204 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 62888 | __ret_842 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_842), (int8x8_t)(__noswap_vshrn_n_s16(__rev1_842, __p2_842)))); \ | 62205 | return __ret; |
| 62889 | __ret_842 = __builtin_shufflevector(__ret_842, __ret_842, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62206 | } |
| 62890 | __ret_842; \ | | |
| 62891 | }) | | |
| 62892 | #endif | 62207 | #endif |
| 62893 | | 62208 | |
| 62894 | #define vslid_n_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 62895 | uint64_t __ret; \ | | |
| 62896 | uint64_t __s0 = __p0; \ | | |
| 62897 | uint64_t __s1 = __p1; \ | | |
| 62898 | __ret = (uint64_t) __builtin_neon_vslid_n_u64(__s0, __s1, __p2); \ | | |
| 62899 | __ret; \ | | |
| 62900 | }) | | |
| 62901 | #define vslid_n_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 62902 | int64_t __ret; \ | | |
| 62903 | int64_t __s0 = __p0; \ | | |
| 62904 | int64_t __s1 = __p1; \ | | |
| 62905 | __ret = (int64_t) __builtin_neon_vslid_n_s64(__s0, __s1, __p2); \ | | |
| 62906 | __ret; \ | | |
| 62907 | }) | | |
| 62908 | #define vsli_n_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 62909 | poly64x1_t __ret; \ | | |
| 62910 | poly64x1_t __s0 = __p0; \ | | |
| 62911 | poly64x1_t __s1 = __p1; \ | | |
| 62912 | __ret = (poly64x1_t) __builtin_neon_vsli_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 6); \ | | |
| 62913 | __ret; \ | | |
| 62914 | }) | | |
| 62915 | #ifdef __LITTLE_ENDIAN__ | 62209 | #ifdef __LITTLE_ENDIAN__ |
| 62916 | #define vsliq_n_p64(__p0, __p1, __p2) __extension__ ({ \ | 62210 | __ai uint16x8_t vzip1q_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 62917 | poly64x2_t __ret; \ | 62211 | uint16x8_t __ret; |
| 62918 | poly64x2_t __s0 = __p0; \ | 62212 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 1, 9, 2, 10, 3, 11); |
| 62919 | poly64x2_t __s1 = __p1; \ | 62213 | return __ret; |
| 62920 | __ret = (poly64x2_t) __builtin_neon_vsliq_n_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 38); \ | 62214 | } |
| 62921 | __ret; \ | | |
| 62922 | }) | | |
| 62923 | #else | 62215 | #else |
| 62924 | #define vsliq_n_p64(__p0, __p1, __p2) __extension__ ({ \ | 62216 | __ai uint16x8_t vzip1q_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 62925 | poly64x2_t __ret; \ | 62217 | uint16x8_t __ret; |
| 62926 | poly64x2_t __s0 = __p0; \ | 62218 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62927 | poly64x2_t __s1 = __p1; \ | 62219 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62928 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 62220 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 1, 9, 2, 10, 3, 11); |
| 62929 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 62221 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62930 | __ret = (poly64x2_t) __builtin_neon_vsliq_n_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 38); \ | 62222 | return __ret; |
| 62931 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 62223 | } |
| 62932 | __ret; \ | | |
| 62933 | }) | | |
| 62934 | #endif | 62224 | #endif |
| 62935 | | 62225 | |
| 62936 | __ai uint8_t vsqaddb_u8(uint8_t __p0, int8_t __p1) { | 62226 | #ifdef __LITTLE_ENDIAN__ |
| 62937 | uint8_t __ret; | 62227 | __ai int8x16_t vzip1q_s8(int8x16_t __p0, int8x16_t __p1) { |
| 62938 | __ret = (uint8_t) __builtin_neon_vsqaddb_u8(__p0, __p1); | 62228 | int8x16_t __ret; |
| | 62229 | __ret = __builtin_shufflevector(__p0, __p1, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); |
| 62939 | return __ret; | 62230 | return __ret; |
| 62940 | } | 62231 | } |
| 62941 | __ai uint32_t vsqadds_u32(uint32_t __p0, int32_t __p1) { | 62232 | #else |
| 62942 | uint32_t __ret; | 62233 | __ai int8x16_t vzip1q_s8(int8x16_t __p0, int8x16_t __p1) { |
| 62943 | __ret = (uint32_t) __builtin_neon_vsqadds_u32(__p0, __p1); | 62234 | int8x16_t __ret; |
| | 62235 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 62236 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 62237 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); |
| | 62238 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 62944 | return __ret; | 62239 | return __ret; |
| 62945 | } | 62240 | } |
| 62946 | __ai uint64_t vsqaddd_u64(uint64_t __p0, int64_t __p1) { | 62241 | #endif |
| 62947 | uint64_t __ret; | 62242 | |
| 62948 | __ret = (uint64_t) __builtin_neon_vsqaddd_u64(__p0, __p1); | 62243 | #ifdef __LITTLE_ENDIAN__ |
| | 62244 | __ai float64x2_t vzip1q_f64(float64x2_t __p0, float64x2_t __p1) { |
| | 62245 | float64x2_t __ret; |
| | 62246 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 62949 | return __ret; | 62247 | return __ret; |
| 62950 | } | 62248 | } |
| 62951 | __ai uint16_t vsqaddh_u16(uint16_t __p0, int16_t __p1) { | 62249 | #else |
| 62952 | uint16_t __ret; | 62250 | __ai float64x2_t vzip1q_f64(float64x2_t __p0, float64x2_t __p1) { |
| 62953 | __ret = (uint16_t) __builtin_neon_vsqaddh_u16(__p0, __p1); | 62251 | float64x2_t __ret; |
| | 62252 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 62253 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 62254 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| | 62255 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 62954 | return __ret; | 62256 | return __ret; |
| 62955 | } | 62257 | } |
| | 62258 | #endif |
| | 62259 | |
| 62956 | #ifdef __LITTLE_ENDIAN__ | 62260 | #ifdef __LITTLE_ENDIAN__ |
| 62957 | __ai uint8x16_t vsqaddq_u8(uint8x16_t __p0, int8x16_t __p1) { | 62261 | __ai float32x4_t vzip1q_f32(float32x4_t __p0, float32x4_t __p1) { |
| 62958 | uint8x16_t __ret; | 62262 | float32x4_t __ret; |
| 62959 | __ret = (uint8x16_t) __builtin_neon_vsqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 48); | 62263 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 1, 5); |
| 62960 | return __ret; | 62264 | return __ret; |
| 62961 | } | 62265 | } |
| 62962 | #else | 62266 | #else |
| 62963 | __ai uint8x16_t vsqaddq_u8(uint8x16_t __p0, int8x16_t __p1) { | 62267 | __ai float32x4_t vzip1q_f32(float32x4_t __p0, float32x4_t __p1) { |
| 62964 | uint8x16_t __ret; | 62268 | float32x4_t __ret; |
| 62965 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 62269 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 62966 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 62270 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 62967 | __ret = (uint8x16_t) __builtin_neon_vsqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 48); | 62271 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 1, 5); |
| 62968 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 62272 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 62969 | return __ret; | 62273 | return __ret; |
| 62970 | } | 62274 | } |
| 62971 | #endif | 62275 | #endif |
| 62972 | | 62276 | |
| 62973 | #ifdef __LITTLE_ENDIAN__ | 62277 | #ifdef __LITTLE_ENDIAN__ |
| 62974 | __ai uint32x4_t vsqaddq_u32(uint32x4_t __p0, int32x4_t __p1) { | 62278 | __ai int32x4_t vzip1q_s32(int32x4_t __p0, int32x4_t __p1) { |
| 62975 | uint32x4_t __ret; | 62279 | int32x4_t __ret; |
| 62976 | __ret = (uint32x4_t) __builtin_neon_vsqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 50); | 62280 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 1, 5); |
| 62977 | return __ret; | 62281 | return __ret; |
| 62978 | } | 62282 | } |
| 62979 | #else | 62283 | #else |
| 62980 | __ai uint32x4_t vsqaddq_u32(uint32x4_t __p0, int32x4_t __p1) { | 62284 | __ai int32x4_t vzip1q_s32(int32x4_t __p0, int32x4_t __p1) { |
| 62981 | uint32x4_t __ret; | 62285 | int32x4_t __ret; |
| 62982 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 62286 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 62983 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 62287 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 62984 | __ret = (uint32x4_t) __builtin_neon_vsqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50); | 62288 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 1, 5); |
| 62985 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 62289 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 62986 | return __ret; | 62290 | return __ret; |
| 62987 | } | 62291 | } |
| 62988 | #endif | 62292 | #endif |
| 62989 | | 62293 | |
| 62990 | #ifdef __LITTLE_ENDIAN__ | 62294 | #ifdef __LITTLE_ENDIAN__ |
| 62991 | __ai uint64x2_t vsqaddq_u64(uint64x2_t __p0, int64x2_t __p1) { | 62295 | __ai int64x2_t vzip1q_s64(int64x2_t __p0, int64x2_t __p1) { |
| 62992 | uint64x2_t __ret; | 62296 | int64x2_t __ret; |
| 62993 | __ret = (uint64x2_t) __builtin_neon_vsqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); | 62297 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 62994 | return __ret; | 62298 | return __ret; |
| 62995 | } | 62299 | } |
| 62996 | #else | 62300 | #else |
| 62997 | __ai uint64x2_t vsqaddq_u64(uint64x2_t __p0, int64x2_t __p1) { | 62301 | __ai int64x2_t vzip1q_s64(int64x2_t __p0, int64x2_t __p1) { |
| 62998 | uint64x2_t __ret; | 62302 | int64x2_t __ret; |
| 62999 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 62303 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 63000 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 62304 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 63001 | __ret = (uint64x2_t) __builtin_neon_vsqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); | 62305 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| 63002 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 62306 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 63003 | return __ret; | 62307 | return __ret; |
| 63004 | } | 62308 | } |
| 63005 | #endif | 62309 | #endif |
| 63006 | | 62310 | |
| 63007 | #ifdef __LITTLE_ENDIAN__ | 62311 | #ifdef __LITTLE_ENDIAN__ |
| 63008 | __ai uint16x8_t vsqaddq_u16(uint16x8_t __p0, int16x8_t __p1) { | 62312 | __ai int16x8_t vzip1q_s16(int16x8_t __p0, int16x8_t __p1) { |
| 63009 | uint16x8_t __ret; | 62313 | int16x8_t __ret; |
| 63010 | __ret = (uint16x8_t) __builtin_neon_vsqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 49); | 62314 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 1, 9, 2, 10, 3, 11); |
| 63011 | return __ret; | 62315 | return __ret; |
| 63012 | } | 62316 | } |
| 63013 | #else | 62317 | #else |
| 63014 | __ai uint16x8_t vsqaddq_u16(uint16x8_t __p0, int16x8_t __p1) { | 62318 | __ai int16x8_t vzip1q_s16(int16x8_t __p0, int16x8_t __p1) { |
| 63015 | uint16x8_t __ret; | 62319 | int16x8_t __ret; |
| 63016 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 62320 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63017 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 62321 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63018 | __ret = (uint16x8_t) __builtin_neon_vsqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 49); | 62322 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 1, 9, 2, 10, 3, 11); |
| 63019 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 62323 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63020 | return __ret; | 62324 | return __ret; |
| 63021 | } | 62325 | } |
| 63022 | #endif | 62326 | #endif |
| 63023 | | 62327 | |
| 63024 | #ifdef __LITTLE_ENDIAN__ | 62328 | #ifdef __LITTLE_ENDIAN__ |
| 63025 | __ai uint8x8_t vsqadd_u8(uint8x8_t __p0, int8x8_t __p1) { | 62329 | __ai uint8x8_t vzip1_u8(uint8x8_t __p0, uint8x8_t __p1) { |
| 63026 | uint8x8_t __ret; | 62330 | uint8x8_t __ret; |
| 63027 | __ret = (uint8x8_t) __builtin_neon_vsqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 16); | 62331 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 1, 9, 2, 10, 3, 11); |
| 63028 | return __ret; | 62332 | return __ret; |
| 63029 | } | 62333 | } |
| 63030 | #else | 62334 | #else |
| 63031 | __ai uint8x8_t vsqadd_u8(uint8x8_t __p0, int8x8_t __p1) { | 62335 | __ai uint8x8_t vzip1_u8(uint8x8_t __p0, uint8x8_t __p1) { |
| 63032 | uint8x8_t __ret; | 62336 | uint8x8_t __ret; |
| 63033 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 62337 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63034 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 62338 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63035 | __ret = (uint8x8_t) __builtin_neon_vsqadd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 16); | 62339 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 1, 9, 2, 10, 3, 11); |
| 63036 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 62340 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63037 | return __ret; | 62341 | return __ret; |
| 63038 | } | 62342 | } |
| 63039 | #endif | 62343 | #endif |
| 63040 | | 62344 | |
| 63041 | #ifdef __LITTLE_ENDIAN__ | 62345 | #ifdef __LITTLE_ENDIAN__ |
| 63042 | __ai uint32x2_t vsqadd_u32(uint32x2_t __p0, int32x2_t __p1) { | 62346 | __ai uint32x2_t vzip1_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 63043 | uint32x2_t __ret; | 62347 | uint32x2_t __ret; |
| 63044 | __ret = (uint32x2_t) __builtin_neon_vsqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 18); | 62348 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 63045 | return __ret; | 62349 | return __ret; |
| 63046 | } | 62350 | } |
| 63047 | #else | 62351 | #else |
| 63048 | __ai uint32x2_t vsqadd_u32(uint32x2_t __p0, int32x2_t __p1) { | 62352 | __ai uint32x2_t vzip1_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 63049 | uint32x2_t __ret; | 62353 | uint32x2_t __ret; |
| 63050 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 62354 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 63051 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 62355 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 63052 | __ret = (uint32x2_t) __builtin_neon_vsqadd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 18); | 62356 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| 63053 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 62357 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 63054 | return __ret; | 62358 | return __ret; |
| 63055 | } | 62359 | } |
| 63056 | #endif | 62360 | #endif |
| 63057 | | 62361 | |
| 63058 | __ai uint64x1_t vsqadd_u64(uint64x1_t __p0, int64x1_t __p1) { | | |
| 63059 | uint64x1_t __ret; | | |
| 63060 | __ret = (uint64x1_t) __builtin_neon_vsqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 63061 | return __ret; | | |
| 63062 | } | | |
| 63063 | #ifdef __LITTLE_ENDIAN__ | 62362 | #ifdef __LITTLE_ENDIAN__ |
| 63064 | __ai uint16x4_t vsqadd_u16(uint16x4_t __p0, int16x4_t __p1) { | 62363 | __ai uint16x4_t vzip1_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 63065 | uint16x4_t __ret; | 62364 | uint16x4_t __ret; |
| 63066 | __ret = (uint16x4_t) __builtin_neon_vsqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 17); | 62365 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 1, 5); |
| 63067 | return __ret; | 62366 | return __ret; |
| 63068 | } | 62367 | } |
| 63069 | #else | 62368 | #else |
| 63070 | __ai uint16x4_t vsqadd_u16(uint16x4_t __p0, int16x4_t __p1) { | 62369 | __ai uint16x4_t vzip1_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 63071 | uint16x4_t __ret; | 62370 | uint16x4_t __ret; |
| 63072 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 62371 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 63073 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 62372 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 63074 | __ret = (uint16x4_t) __builtin_neon_vsqadd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 17); | 62373 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 1, 5); |
| 63075 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 62374 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 63076 | return __ret; | 62375 | return __ret; |
| 63077 | } | 62376 | } |
| 63078 | #endif | 62377 | #endif |
| 63079 | | 62378 | |
| 63080 | #ifdef __LITTLE_ENDIAN__ | 62379 | #ifdef __LITTLE_ENDIAN__ |
| 63081 | __ai float64x2_t vsqrtq_f64(float64x2_t __p0) { | 62380 | __ai int8x8_t vzip1_s8(int8x8_t __p0, int8x8_t __p1) { |
| 63082 | float64x2_t __ret; | 62381 | int8x8_t __ret; |
| 63083 | __ret = (float64x2_t) __builtin_neon_vsqrtq_v((int8x16_t)__p0, 42); | 62382 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 1, 9, 2, 10, 3, 11); |
| 63084 | return __ret; | 62383 | return __ret; |
| 63085 | } | 62384 | } |
| 63086 | #else | 62385 | #else |
| 63087 | __ai float64x2_t vsqrtq_f64(float64x2_t __p0) { | 62386 | __ai int8x8_t vzip1_s8(int8x8_t __p0, int8x8_t __p1) { |
| 63088 | float64x2_t __ret; | 62387 | int8x8_t __ret; |
| 63089 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 62388 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63090 | __ret = (float64x2_t) __builtin_neon_vsqrtq_v((int8x16_t)__rev0, 42); | 62389 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63091 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 62390 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 1, 9, 2, 10, 3, 11); |
| | 62391 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63092 | return __ret; | 62392 | return __ret; |
| 63093 | } | 62393 | } |
| 63094 | #endif | 62394 | #endif |
| 63095 | | 62395 | |
| 63096 | #ifdef __LITTLE_ENDIAN__ | 62396 | #ifdef __LITTLE_ENDIAN__ |
| 63097 | __ai float32x4_t vsqrtq_f32(float32x4_t __p0) { | 62397 | __ai float32x2_t vzip1_f32(float32x2_t __p0, float32x2_t __p1) { |
| 63098 | float32x4_t __ret; | 62398 | float32x2_t __ret; |
| 63099 | __ret = (float32x4_t) __builtin_neon_vsqrtq_v((int8x16_t)__p0, 41); | 62399 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 63100 | return __ret; | 62400 | return __ret; |
| 63101 | } | 62401 | } |
| 63102 | #else | 62402 | #else |
| 63103 | __ai float32x4_t vsqrtq_f32(float32x4_t __p0) { | 62403 | __ai float32x2_t vzip1_f32(float32x2_t __p0, float32x2_t __p1) { |
| 63104 | float32x4_t __ret; | 62404 | float32x2_t __ret; |
| 63105 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 62405 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 63106 | __ret = (float32x4_t) __builtin_neon_vsqrtq_v((int8x16_t)__rev0, 41); | 62406 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 63107 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 62407 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| | 62408 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 63108 | return __ret; | 62409 | return __ret; |
| 63109 | } | 62410 | } |
| 63110 | #endif | 62411 | #endif |
| 63111 | | 62412 | |
| 63112 | __ai float64x1_t vsqrt_f64(float64x1_t __p0) { | | |
| 63113 | float64x1_t __ret; | | |
| 63114 | __ret = (float64x1_t) __builtin_neon_vsqrt_v((int8x8_t)__p0, 10); | | |
| 63115 | return __ret; | | |
| 63116 | } | | |
| 63117 | #ifdef __LITTLE_ENDIAN__ | 62413 | #ifdef __LITTLE_ENDIAN__ |
| 63118 | __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | 62414 | __ai int32x2_t vzip1_s32(int32x2_t __p0, int32x2_t __p1) { |
| 63119 | float32x2_t __ret; | 62415 | int32x2_t __ret; |
| 63120 | __ret = (float32x2_t) __builtin_neon_vsqrt_v((int8x8_t)__p0, 9); | 62416 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); |
| 63121 | return __ret; | 62417 | return __ret; |
| 63122 | } | 62418 | } |
| 63123 | #else | 62419 | #else |
| 63124 | __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | 62420 | __ai int32x2_t vzip1_s32(int32x2_t __p0, int32x2_t __p1) { |
| 63125 | float32x2_t __ret; | 62421 | int32x2_t __ret; |
| 63126 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 62422 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 63127 | __ret = (float32x2_t) __builtin_neon_vsqrt_v((int8x8_t)__rev0, 9); | 62423 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 62424 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); |
| 63128 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 62425 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 63129 | return __ret; | 62426 | return __ret; |
| 63130 | } | 62427 | } |
| 63131 | #endif | 62428 | #endif |
| 63132 | | 62429 | |
| 63133 | #define vsrad_n_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63134 | uint64_t __ret; \ | | |
| 63135 | uint64_t __s0 = __p0; \ | | |
| 63136 | uint64_t __s1 = __p1; \ | | |
| 63137 | __ret = (uint64_t) __builtin_neon_vsrad_n_u64(__s0, __s1, __p2); \ | | |
| 63138 | __ret; \ | | |
| 63139 | }) | | |
| 63140 | #define vsrad_n_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63141 | int64_t __ret; \ | | |
| 63142 | int64_t __s0 = __p0; \ | | |
| 63143 | int64_t __s1 = __p1; \ | | |
| 63144 | __ret = (int64_t) __builtin_neon_vsrad_n_s64(__s0, __s1, __p2); \ | | |
| 63145 | __ret; \ | | |
| 63146 | }) | | |
| 63147 | #define vsrid_n_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63148 | uint64_t __ret; \ | | |
| 63149 | uint64_t __s0 = __p0; \ | | |
| 63150 | uint64_t __s1 = __p1; \ | | |
| 63151 | __ret = (uint64_t) __builtin_neon_vsrid_n_u64(__s0, __s1, __p2); \ | | |
| 63152 | __ret; \ | | |
| 63153 | }) | | |
| 63154 | #define vsrid_n_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63155 | int64_t __ret; \ | | |
| 63156 | int64_t __s0 = __p0; \ | | |
| 63157 | int64_t __s1 = __p1; \ | | |
| 63158 | __ret = (int64_t) __builtin_neon_vsrid_n_s64(__s0, __s1, __p2); \ | | |
| 63159 | __ret; \ | | |
| 63160 | }) | | |
| 63161 | #define vsri_n_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63162 | poly64x1_t __ret; \ | | |
| 63163 | poly64x1_t __s0 = __p0; \ | | |
| 63164 | poly64x1_t __s1 = __p1; \ | | |
| 63165 | __ret = (poly64x1_t) __builtin_neon_vsri_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 6); \ | | |
| 63166 | __ret; \ | | |
| 63167 | }) | | |
| 63168 | #ifdef __LITTLE_ENDIAN__ | | |
| 63169 | #define vsriq_n_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63170 | poly64x2_t __ret; \ | | |
| 63171 | poly64x2_t __s0 = __p0; \ | | |
| 63172 | poly64x2_t __s1 = __p1; \ | | |
| 63173 | __ret = (poly64x2_t) __builtin_neon_vsriq_n_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 38); \ | | |
| 63174 | __ret; \ | | |
| 63175 | }) | | |
| 63176 | #else | | |
| 63177 | #define vsriq_n_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63178 | poly64x2_t __ret; \ | | |
| 63179 | poly64x2_t __s0 = __p0; \ | | |
| 63180 | poly64x2_t __s1 = __p1; \ | | |
| 63181 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | | |
| 63182 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | | |
| 63183 | __ret = (poly64x2_t) __builtin_neon_vsriq_n_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 38); \ | | |
| 63184 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | | |
| 63185 | __ret; \ | | |
| 63186 | }) | | |
| 63187 | #endif | | |
| 63188 | | | |
| 63189 | #define vst1_p64(__p0, __p1) __extension__ ({ \ | | |
| 63190 | poly64x1_t __s1 = __p1; \ | | |
| 63191 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 6); \ | | |
| 63192 | }) | | |
| 63193 | #ifdef __LITTLE_ENDIAN__ | | |
| 63194 | #define vst1q_p64(__p0, __p1) __extension__ ({ \ | | |
| 63195 | poly64x2_t __s1 = __p1; \ | | |
| 63196 | __builtin_neon_vst1q_v(__p0, (int8x16_t)__s1, 38); \ | | |
| 63197 | }) | | |
| 63198 | #else | | |
| 63199 | #define vst1q_p64(__p0, __p1) __extension__ ({ \ | | |
| 63200 | poly64x2_t __s1 = __p1; \ | | |
| 63201 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | | |
| 63202 | __builtin_neon_vst1q_v(__p0, (int8x16_t)__rev1, 38); \ | | |
| 63203 | }) | | |
| 63204 | #endif | | |
| 63205 | | | |
| 63206 | #ifdef __LITTLE_ENDIAN__ | | |
| 63207 | #define vst1q_f64(__p0, __p1) __extension__ ({ \ | | |
| 63208 | float64x2_t __s1 = __p1; \ | | |
| 63209 | __builtin_neon_vst1q_v(__p0, (int8x16_t)__s1, 42); \ | | |
| 63210 | }) | | |
| 63211 | #else | | |
| 63212 | #define vst1q_f64(__p0, __p1) __extension__ ({ \ | | |
| 63213 | float64x2_t __s1 = __p1; \ | | |
| 63214 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | | |
| 63215 | __builtin_neon_vst1q_v(__p0, (int8x16_t)__rev1, 42); \ | | |
| 63216 | }) | | |
| 63217 | #endif | | |
| 63218 | | | |
| 63219 | #define vst1_f64(__p0, __p1) __extension__ ({ \ | | |
| 63220 | float64x1_t __s1 = __p1; \ | | |
| 63221 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 10); \ | | |
| 63222 | }) | | |
| 63223 | #define vst1_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63224 | poly64x1_t __s1 = __p1; \ | | |
| 63225 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 6); \ | | |
| 63226 | }) | | |
| 63227 | #ifdef __LITTLE_ENDIAN__ | | |
| 63228 | #define vst1q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63229 | poly64x2_t __s1 = __p1; \ | | |
| 63230 | __builtin_neon_vst1q_lane_v(__p0, (int8x16_t)__s1, __p2, 38); \ | | |
| 63231 | }) | | |
| 63232 | #else | | |
| 63233 | #define vst1q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63234 | poly64x2_t __s1 = __p1; \ | | |
| 63235 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | | |
| 63236 | __builtin_neon_vst1q_lane_v(__p0, (int8x16_t)__rev1, __p2, 38); \ | | |
| 63237 | }) | | |
| 63238 | #endif | | |
| 63239 | | | |
| 63240 | #ifdef __LITTLE_ENDIAN__ | | |
| 63241 | #define vst1q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63242 | float64x2_t __s1 = __p1; \ | | |
| 63243 | __builtin_neon_vst1q_lane_v(__p0, (int8x16_t)__s1, __p2, 42); \ | | |
| 63244 | }) | | |
| 63245 | #else | | |
| 63246 | #define vst1q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63247 | float64x2_t __s1 = __p1; \ | | |
| 63248 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | | |
| 63249 | __builtin_neon_vst1q_lane_v(__p0, (int8x16_t)__rev1, __p2, 42); \ | | |
| 63250 | }) | | |
| 63251 | #endif | | |
| 63252 | | | |
| 63253 | #define vst1_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63254 | float64x1_t __s1 = __p1; \ | | |
| 63255 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 10); \ | | |
| 63256 | }) | | |
| 63257 | #define vst1_p64_x2(__p0, __p1) __extension__ ({ \ | | |
| 63258 | poly64x1x2_t __s1 = __p1; \ | | |
| 63259 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 6); \ | | |
| 63260 | }) | | |
| 63261 | #ifdef __LITTLE_ENDIAN__ | | |
| 63262 | #define vst1q_p64_x2(__p0, __p1) __extension__ ({ \ | | |
| 63263 | poly64x2x2_t __s1 = __p1; \ | | |
| 63264 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 38); \ | | |
| 63265 | }) | | |
| 63266 | #else | | |
| 63267 | #define vst1q_p64_x2(__p0, __p1) __extension__ ({ \ | | |
| 63268 | poly64x2x2_t __s1 = __p1; \ | | |
| 63269 | poly64x2x2_t __rev1; \ | | |
| 63270 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | | |
| 63271 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | | |
| 63272 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 38); \ | | |
| 63273 | }) | | |
| 63274 | #endif | | |
| 63275 | | | |
| 63276 | #ifdef __LITTLE_ENDIAN__ | | |
| 63277 | #define vst1q_f64_x2(__p0, __p1) __extension__ ({ \ | | |
| 63278 | float64x2x2_t __s1 = __p1; \ | | |
| 63279 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 42); \ | | |
| 63280 | }) | | |
| 63281 | #else | | |
| 63282 | #define vst1q_f64_x2(__p0, __p1) __extension__ ({ \ | | |
| 63283 | float64x2x2_t __s1 = __p1; \ | | |
| 63284 | float64x2x2_t __rev1; \ | | |
| 63285 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | | |
| 63286 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | | |
| 63287 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 42); \ | | |
| 63288 | }) | | |
| 63289 | #endif | | |
| 63290 | | | |
| 63291 | #define vst1_f64_x2(__p0, __p1) __extension__ ({ \ | | |
| 63292 | float64x1x2_t __s1 = __p1; \ | | |
| 63293 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 10); \ | | |
| 63294 | }) | | |
| 63295 | #define vst1_p64_x3(__p0, __p1) __extension__ ({ \ | | |
| 63296 | poly64x1x3_t __s1 = __p1; \ | | |
| 63297 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 6); \ | | |
| 63298 | }) | | |
| 63299 | #ifdef __LITTLE_ENDIAN__ | | |
| 63300 | #define vst1q_p64_x3(__p0, __p1) __extension__ ({ \ | | |
| 63301 | poly64x2x3_t __s1 = __p1; \ | | |
| 63302 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 38); \ | | |
| 63303 | }) | | |
| 63304 | #else | | |
| 63305 | #define vst1q_p64_x3(__p0, __p1) __extension__ ({ \ | | |
| 63306 | poly64x2x3_t __s1 = __p1; \ | | |
| 63307 | poly64x2x3_t __rev1; \ | | |
| 63308 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | | |
| 63309 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | | |
| 63310 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | | |
| 63311 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 38); \ | | |
| 63312 | }) | | |
| 63313 | #endif | | |
| 63314 | | | |
| 63315 | #ifdef __LITTLE_ENDIAN__ | | |
| 63316 | #define vst1q_f64_x3(__p0, __p1) __extension__ ({ \ | | |
| 63317 | float64x2x3_t __s1 = __p1; \ | | |
| 63318 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 42); \ | | |
| 63319 | }) | | |
| 63320 | #else | | |
| 63321 | #define vst1q_f64_x3(__p0, __p1) __extension__ ({ \ | | |
| 63322 | float64x2x3_t __s1 = __p1; \ | | |
| 63323 | float64x2x3_t __rev1; \ | | |
| 63324 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | | |
| 63325 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | | |
| 63326 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | | |
| 63327 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 42); \ | | |
| 63328 | }) | | |
| 63329 | #endif | | |
| 63330 | | | |
| 63331 | #define vst1_f64_x3(__p0, __p1) __extension__ ({ \ | | |
| 63332 | float64x1x3_t __s1 = __p1; \ | | |
| 63333 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 10); \ | | |
| 63334 | }) | | |
| 63335 | #define vst1_p64_x4(__p0, __p1) __extension__ ({ \ | | |
| 63336 | poly64x1x4_t __s1 = __p1; \ | | |
| 63337 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 6); \ | | |
| 63338 | }) | | |
| 63339 | #ifdef __LITTLE_ENDIAN__ | | |
| 63340 | #define vst1q_p64_x4(__p0, __p1) __extension__ ({ \ | | |
| 63341 | poly64x2x4_t __s1 = __p1; \ | | |
| 63342 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 38); \ | | |
| 63343 | }) | | |
| 63344 | #else | | |
| 63345 | #define vst1q_p64_x4(__p0, __p1) __extension__ ({ \ | | |
| 63346 | poly64x2x4_t __s1 = __p1; \ | | |
| 63347 | poly64x2x4_t __rev1; \ | | |
| 63348 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | | |
| 63349 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | | |
| 63350 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | | |
| 63351 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | | |
| 63352 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 38); \ | | |
| 63353 | }) | | |
| 63354 | #endif | | |
| 63355 | | | |
| 63356 | #ifdef __LITTLE_ENDIAN__ | | |
| 63357 | #define vst1q_f64_x4(__p0, __p1) __extension__ ({ \ | | |
| 63358 | float64x2x4_t __s1 = __p1; \ | | |
| 63359 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 42); \ | | |
| 63360 | }) | | |
| 63361 | #else | | |
| 63362 | #define vst1q_f64_x4(__p0, __p1) __extension__ ({ \ | | |
| 63363 | float64x2x4_t __s1 = __p1; \ | | |
| 63364 | float64x2x4_t __rev1; \ | | |
| 63365 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | | |
| 63366 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | | |
| 63367 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | | |
| 63368 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | | |
| 63369 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 42); \ | | |
| 63370 | }) | | |
| 63371 | #endif | | |
| 63372 | | | |
| 63373 | #define vst1_f64_x4(__p0, __p1) __extension__ ({ \ | | |
| 63374 | float64x1x4_t __s1 = __p1; \ | | |
| 63375 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 10); \ | | |
| 63376 | }) | | |
| 63377 | #define vst2_p64(__p0, __p1) __extension__ ({ \ | | |
| 63378 | poly64x1x2_t __s1 = __p1; \ | | |
| 63379 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 6); \ | | |
| 63380 | }) | | |
| 63381 | #ifdef __LITTLE_ENDIAN__ | | |
| 63382 | #define vst2q_p64(__p0, __p1) __extension__ ({ \ | | |
| 63383 | poly64x2x2_t __s1 = __p1; \ | | |
| 63384 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 38); \ | | |
| 63385 | }) | | |
| 63386 | #else | | |
| 63387 | #define vst2q_p64(__p0, __p1) __extension__ ({ \ | | |
| 63388 | poly64x2x2_t __s1 = __p1; \ | | |
| 63389 | poly64x2x2_t __rev1; \ | | |
| 63390 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | | |
| 63391 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | | |
| 63392 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 38); \ | | |
| 63393 | }) | | |
| 63394 | #endif | | |
| 63395 | | | |
| 63396 | #ifdef __LITTLE_ENDIAN__ | 62430 | #ifdef __LITTLE_ENDIAN__ |
| 63397 | #define vst2q_u64(__p0, __p1) __extension__ ({ \ | 62431 | __ai int16x4_t vzip1_s16(int16x4_t __p0, int16x4_t __p1) { |
| 63398 | uint64x2x2_t __s1 = __p1; \ | 62432 | int16x4_t __ret; |
| 63399 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 51); \ | 62433 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 1, 5); |
| 63400 | }) | 62434 | return __ret; |
| | 62435 | } |
| 63401 | #else | 62436 | #else |
| 63402 | #define vst2q_u64(__p0, __p1) __extension__ ({ \ | 62437 | __ai int16x4_t vzip1_s16(int16x4_t __p0, int16x4_t __p1) { |
| 63403 | uint64x2x2_t __s1 = __p1; \ | 62438 | int16x4_t __ret; |
| 63404 | uint64x2x2_t __rev1; \ | 62439 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 63405 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62440 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 63406 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62441 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 1, 5); |
| 63407 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 51); \ | 62442 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 63408 | }) | 62443 | return __ret; |
| | 62444 | } |
| 63409 | #endif | 62445 | #endif |
| 63410 | | 62446 | |
| 63411 | #ifdef __LITTLE_ENDIAN__ | 62447 | #ifdef __LITTLE_ENDIAN__ |
| 63412 | #define vst2q_f64(__p0, __p1) __extension__ ({ \ | 62448 | __ai poly8x8_t vzip2_p8(poly8x8_t __p0, poly8x8_t __p1) { |
| 63413 | float64x2x2_t __s1 = __p1; \ | 62449 | poly8x8_t __ret; |
| 63414 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 42); \ | 62450 | __ret = __builtin_shufflevector(__p0, __p1, 4, 12, 5, 13, 6, 14, 7, 15); |
| 63415 | }) | 62451 | return __ret; |
| | 62452 | } |
| 63416 | #else | 62453 | #else |
| 63417 | #define vst2q_f64(__p0, __p1) __extension__ ({ \ | 62454 | __ai poly8x8_t vzip2_p8(poly8x8_t __p0, poly8x8_t __p1) { |
| 63418 | float64x2x2_t __s1 = __p1; \ | 62455 | poly8x8_t __ret; |
| 63419 | float64x2x2_t __rev1; \ | 62456 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63420 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62457 | poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63421 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62458 | __ret = __builtin_shufflevector(__rev0, __rev1, 4, 12, 5, 13, 6, 14, 7, 15); |
| 63422 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 42); \ | 62459 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63423 | }) | 62460 | return __ret; |
| | 62461 | } |
| 63424 | #endif | 62462 | #endif |
| 63425 | | 62463 | |
| 63426 | #ifdef __LITTLE_ENDIAN__ | 62464 | #ifdef __LITTLE_ENDIAN__ |
| 63427 | #define vst2q_s64(__p0, __p1) __extension__ ({ \ | 62465 | __ai poly16x4_t vzip2_p16(poly16x4_t __p0, poly16x4_t __p1) { |
| 63428 | int64x2x2_t __s1 = __p1; \ | 62466 | poly16x4_t __ret; |
| 63429 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 35); \ | 62467 | __ret = __builtin_shufflevector(__p0, __p1, 2, 6, 3, 7); |
| 63430 | }) | 62468 | return __ret; |
| | 62469 | } |
| 63431 | #else | 62470 | #else |
| 63432 | #define vst2q_s64(__p0, __p1) __extension__ ({ \ | 62471 | __ai poly16x4_t vzip2_p16(poly16x4_t __p0, poly16x4_t __p1) { |
| 63433 | int64x2x2_t __s1 = __p1; \ | 62472 | poly16x4_t __ret; |
| 63434 | int64x2x2_t __rev1; \ | 62473 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 63435 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62474 | poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 63436 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62475 | __ret = __builtin_shufflevector(__rev0, __rev1, 2, 6, 3, 7); |
| 63437 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 35); \ | 62476 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 63438 | }) | 62477 | return __ret; |
| | 62478 | } |
| 63439 | #endif | 62479 | #endif |
| 63440 | | 62480 | |
| 63441 | #define vst2_f64(__p0, __p1) __extension__ ({ \ | | |
| 63442 | float64x1x2_t __s1 = __p1; \ | | |
| 63443 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 10); \ | | |
| 63444 | }) | | |
| 63445 | #define vst2_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63446 | poly64x1x2_t __s1 = __p1; \ | | |
| 63447 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 6); \ | | |
| 63448 | }) | | |
| 63449 | #ifdef __LITTLE_ENDIAN__ | 62481 | #ifdef __LITTLE_ENDIAN__ |
| 63450 | #define vst2q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 62482 | __ai poly8x16_t vzip2q_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| 63451 | poly8x16x2_t __s1 = __p1; \ | 62483 | poly8x16_t __ret; |
| 63452 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 36); \ | 62484 | __ret = __builtin_shufflevector(__p0, __p1, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); |
| 63453 | }) | 62485 | return __ret; |
| | 62486 | } |
| 63454 | #else | 62487 | #else |
| 63455 | #define vst2q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 62488 | __ai poly8x16_t vzip2q_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| 63456 | poly8x16x2_t __s1 = __p1; \ | 62489 | poly8x16_t __ret; |
| 63457 | poly8x16x2_t __rev1; \ | 62490 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63458 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62491 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63459 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62492 | __ret = __builtin_shufflevector(__rev0, __rev1, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); |
| 63460 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 36); \ | 62493 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63461 | }) | 62494 | return __ret; |
| | 62495 | } |
| 63462 | #endif | 62496 | #endif |
| 63463 | | 62497 | |
| 63464 | #ifdef __LITTLE_ENDIAN__ | 62498 | #ifdef __LITTLE_ENDIAN__ |
| 63465 | #define vst2q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 62499 | __ai poly64x2_t vzip2q_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 63466 | poly64x2x2_t __s1 = __p1; \ | 62500 | poly64x2_t __ret; |
| 63467 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 38); \ | 62501 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 63468 | }) | 62502 | return __ret; |
| | 62503 | } |
| 63469 | #else | 62504 | #else |
| 63470 | #define vst2q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 62505 | __ai poly64x2_t vzip2q_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 63471 | poly64x2x2_t __s1 = __p1; \ | 62506 | poly64x2_t __ret; |
| 63472 | poly64x2x2_t __rev1; \ | 62507 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 63473 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62508 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 63474 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62509 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 63475 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 38); \ | 62510 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 63476 | }) | 62511 | return __ret; |
| | 62512 | } |
| 63477 | #endif | 62513 | #endif |
| 63478 | | 62514 | |
| 63479 | #ifdef __LITTLE_ENDIAN__ | 62515 | #ifdef __LITTLE_ENDIAN__ |
| 63480 | #define vst2q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ | 62516 | __ai poly16x8_t vzip2q_p16(poly16x8_t __p0, poly16x8_t __p1) { |
| 63481 | uint8x16x2_t __s1 = __p1; \ | 62517 | poly16x8_t __ret; |
| 63482 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 48); \ | 62518 | __ret = __builtin_shufflevector(__p0, __p1, 4, 12, 5, 13, 6, 14, 7, 15); |
| 63483 | }) | 62519 | return __ret; |
| | 62520 | } |
| 63484 | #else | 62521 | #else |
| 63485 | #define vst2q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ | 62522 | __ai poly16x8_t vzip2q_p16(poly16x8_t __p0, poly16x8_t __p1) { |
| 63486 | uint8x16x2_t __s1 = __p1; \ | 62523 | poly16x8_t __ret; |
| 63487 | uint8x16x2_t __rev1; \ | 62524 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63488 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62525 | poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63489 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62526 | __ret = __builtin_shufflevector(__rev0, __rev1, 4, 12, 5, 13, 6, 14, 7, 15); |
| 63490 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 48); \ | 62527 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63491 | }) | 62528 | return __ret; |
| | 62529 | } |
| 63492 | #endif | 62530 | #endif |
| 63493 | | 62531 | |
| 63494 | #ifdef __LITTLE_ENDIAN__ | 62532 | #ifdef __LITTLE_ENDIAN__ |
| 63495 | #define vst2q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 62533 | __ai uint8x16_t vzip2q_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 63496 | uint64x2x2_t __s1 = __p1; \ | 62534 | uint8x16_t __ret; |
| 63497 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 51); \ | 62535 | __ret = __builtin_shufflevector(__p0, __p1, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); |
| 63498 | }) | 62536 | return __ret; |
| | 62537 | } |
| 63499 | #else | 62538 | #else |
| 63500 | #define vst2q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 62539 | __ai uint8x16_t vzip2q_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 63501 | uint64x2x2_t __s1 = __p1; \ | 62540 | uint8x16_t __ret; |
| 63502 | uint64x2x2_t __rev1; \ | 62541 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63503 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62542 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63504 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62543 | __ret = __builtin_shufflevector(__rev0, __rev1, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); |
| 63505 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 51); \ | 62544 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63506 | }) | 62545 | return __ret; |
| | 62546 | } |
| 63507 | #endif | 62547 | #endif |
| 63508 | | 62548 | |
| 63509 | #ifdef __LITTLE_ENDIAN__ | 62549 | #ifdef __LITTLE_ENDIAN__ |
| 63510 | #define vst2q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ | 62550 | __ai uint32x4_t vzip2q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 63511 | int8x16x2_t __s1 = __p1; \ | 62551 | uint32x4_t __ret; |
| 63512 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 32); \ | 62552 | __ret = __builtin_shufflevector(__p0, __p1, 2, 6, 3, 7); |
| 63513 | }) | 62553 | return __ret; |
| | 62554 | } |
| 63514 | #else | 62555 | #else |
| 63515 | #define vst2q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ | 62556 | __ai uint32x4_t vzip2q_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 63516 | int8x16x2_t __s1 = __p1; \ | 62557 | uint32x4_t __ret; |
| 63517 | int8x16x2_t __rev1; \ | 62558 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 63518 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62559 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 63519 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62560 | __ret = __builtin_shufflevector(__rev0, __rev1, 2, 6, 3, 7); |
| 63520 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 32); \ | 62561 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 63521 | }) | 62562 | return __ret; |
| | 62563 | } |
| 63522 | #endif | 62564 | #endif |
| 63523 | | 62565 | |
| 63524 | #ifdef __LITTLE_ENDIAN__ | 62566 | #ifdef __LITTLE_ENDIAN__ |
| 63525 | #define vst2q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 62567 | __ai uint64x2_t vzip2q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 63526 | float64x2x2_t __s1 = __p1; \ | 62568 | uint64x2_t __ret; |
| 63527 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 42); \ | 62569 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 63528 | }) | 62570 | return __ret; |
| | 62571 | } |
| 63529 | #else | 62572 | #else |
| 63530 | #define vst2q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 62573 | __ai uint64x2_t vzip2q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 63531 | float64x2x2_t __s1 = __p1; \ | 62574 | uint64x2_t __ret; |
| 63532 | float64x2x2_t __rev1; \ | 62575 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 63533 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62576 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 63534 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62577 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 63535 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 42); \ | 62578 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 63536 | }) | 62579 | return __ret; |
| | 62580 | } |
| 63537 | #endif | 62581 | #endif |
| 63538 | | 62582 | |
| 63539 | #ifdef __LITTLE_ENDIAN__ | 62583 | #ifdef __LITTLE_ENDIAN__ |
| 63540 | #define vst2q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 62584 | __ai uint16x8_t vzip2q_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 63541 | int64x2x2_t __s1 = __p1; \ | 62585 | uint16x8_t __ret; |
| 63542 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 35); \ | 62586 | __ret = __builtin_shufflevector(__p0, __p1, 4, 12, 5, 13, 6, 14, 7, 15); |
| 63543 | }) | 62587 | return __ret; |
| | 62588 | } |
| 63544 | #else | 62589 | #else |
| 63545 | #define vst2q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 62590 | __ai uint16x8_t vzip2q_u16(uint16x8_t __p0, uint16x8_t __p1) { |
| 63546 | int64x2x2_t __s1 = __p1; \ | 62591 | uint16x8_t __ret; |
| 63547 | int64x2x2_t __rev1; \ | 62592 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63548 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62593 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63549 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62594 | __ret = __builtin_shufflevector(__rev0, __rev1, 4, 12, 5, 13, 6, 14, 7, 15); |
| 63550 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 35); \ | 62595 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63551 | }) | 62596 | return __ret; |
| | 62597 | } |
| 63552 | #endif | 62598 | #endif |
| 63553 | | 62599 | |
| 63554 | #define vst2_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63555 | uint64x1x2_t __s1 = __p1; \ | | |
| 63556 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 19); \ | | |
| 63557 | }) | | |
| 63558 | #define vst2_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63559 | float64x1x2_t __s1 = __p1; \ | | |
| 63560 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 10); \ | | |
| 63561 | }) | | |
| 63562 | #define vst2_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63563 | int64x1x2_t __s1 = __p1; \ | | |
| 63564 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 3); \ | | |
| 63565 | }) | | |
| 63566 | #define vst3_p64(__p0, __p1) __extension__ ({ \ | | |
| 63567 | poly64x1x3_t __s1 = __p1; \ | | |
| 63568 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 6); \ | | |
| 63569 | }) | | |
| 63570 | #ifdef __LITTLE_ENDIAN__ | 62600 | #ifdef __LITTLE_ENDIAN__ |
| 63571 | #define vst3q_p64(__p0, __p1) __extension__ ({ \ | 62601 | __ai int8x16_t vzip2q_s8(int8x16_t __p0, int8x16_t __p1) { |
| 63572 | poly64x2x3_t __s1 = __p1; \ | 62602 | int8x16_t __ret; |
| 63573 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 38); \ | 62603 | __ret = __builtin_shufflevector(__p0, __p1, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); |
| 63574 | }) | 62604 | return __ret; |
| | 62605 | } |
| 63575 | #else | 62606 | #else |
| 63576 | #define vst3q_p64(__p0, __p1) __extension__ ({ \ | 62607 | __ai int8x16_t vzip2q_s8(int8x16_t __p0, int8x16_t __p1) { |
| 63577 | poly64x2x3_t __s1 = __p1; \ | 62608 | int8x16_t __ret; |
| 63578 | poly64x2x3_t __rev1; \ | 62609 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63579 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62610 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63580 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62611 | __ret = __builtin_shufflevector(__rev0, __rev1, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); |
| 63581 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62612 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63582 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 38); \ | 62613 | return __ret; |
| 63583 | }) | 62614 | } |
| 63584 | #endif | 62615 | #endif |
| 63585 | | 62616 | |
| 63586 | #ifdef __LITTLE_ENDIAN__ | 62617 | #ifdef __LITTLE_ENDIAN__ |
| 63587 | #define vst3q_u64(__p0, __p1) __extension__ ({ \ | 62618 | __ai float64x2_t vzip2q_f64(float64x2_t __p0, float64x2_t __p1) { |
| 63588 | uint64x2x3_t __s1 = __p1; \ | 62619 | float64x2_t __ret; |
| 63589 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 51); \ | 62620 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 63590 | }) | 62621 | return __ret; |
| | 62622 | } |
| 63591 | #else | 62623 | #else |
| 63592 | #define vst3q_u64(__p0, __p1) __extension__ ({ \ | 62624 | __ai float64x2_t vzip2q_f64(float64x2_t __p0, float64x2_t __p1) { |
| 63593 | uint64x2x3_t __s1 = __p1; \ | 62625 | float64x2_t __ret; |
| 63594 | uint64x2x3_t __rev1; \ | 62626 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 63595 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62627 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 63596 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62628 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 63597 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62629 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 63598 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 51); \ | 62630 | return __ret; |
| 63599 | }) | 62631 | } |
| 63600 | #endif | 62632 | #endif |
| 63601 | | 62633 | |
| 63602 | #ifdef __LITTLE_ENDIAN__ | 62634 | #ifdef __LITTLE_ENDIAN__ |
| 63603 | #define vst3q_f64(__p0, __p1) __extension__ ({ \ | 62635 | __ai float32x4_t vzip2q_f32(float32x4_t __p0, float32x4_t __p1) { |
| 63604 | float64x2x3_t __s1 = __p1; \ | 62636 | float32x4_t __ret; |
| 63605 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 42); \ | 62637 | __ret = __builtin_shufflevector(__p0, __p1, 2, 6, 3, 7); |
| 63606 | }) | 62638 | return __ret; |
| | 62639 | } |
| 63607 | #else | 62640 | #else |
| 63608 | #define vst3q_f64(__p0, __p1) __extension__ ({ \ | 62641 | __ai float32x4_t vzip2q_f32(float32x4_t __p0, float32x4_t __p1) { |
| 63609 | float64x2x3_t __s1 = __p1; \ | 62642 | float32x4_t __ret; |
| 63610 | float64x2x3_t __rev1; \ | 62643 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 63611 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62644 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 63612 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62645 | __ret = __builtin_shufflevector(__rev0, __rev1, 2, 6, 3, 7); |
| 63613 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62646 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 63614 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 42); \ | 62647 | return __ret; |
| 63615 | }) | 62648 | } |
| 63616 | #endif | 62649 | #endif |
| 63617 | | 62650 | |
| 63618 | #ifdef __LITTLE_ENDIAN__ | 62651 | #ifdef __LITTLE_ENDIAN__ |
| 63619 | #define vst3q_s64(__p0, __p1) __extension__ ({ \ | 62652 | __ai int32x4_t vzip2q_s32(int32x4_t __p0, int32x4_t __p1) { |
| 63620 | int64x2x3_t __s1 = __p1; \ | 62653 | int32x4_t __ret; |
| 63621 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 35); \ | 62654 | __ret = __builtin_shufflevector(__p0, __p1, 2, 6, 3, 7); |
| 63622 | }) | 62655 | return __ret; |
| | 62656 | } |
| 63623 | #else | 62657 | #else |
| 63624 | #define vst3q_s64(__p0, __p1) __extension__ ({ \ | 62658 | __ai int32x4_t vzip2q_s32(int32x4_t __p0, int32x4_t __p1) { |
| 63625 | int64x2x3_t __s1 = __p1; \ | 62659 | int32x4_t __ret; |
| 63626 | int64x2x3_t __rev1; \ | 62660 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 63627 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62661 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 63628 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62662 | __ret = __builtin_shufflevector(__rev0, __rev1, 2, 6, 3, 7); |
| 63629 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62663 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 63630 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 35); \ | 62664 | return __ret; |
| 63631 | }) | 62665 | } |
| 63632 | #endif | 62666 | #endif |
| 63633 | | 62667 | |
| 63634 | #define vst3_f64(__p0, __p1) __extension__ ({ \ | | |
| 63635 | float64x1x3_t __s1 = __p1; \ | | |
| 63636 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 10); \ | | |
| 63637 | }) | | |
| 63638 | #define vst3_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63639 | poly64x1x3_t __s1 = __p1; \ | | |
| 63640 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 6); \ | | |
| 63641 | }) | | |
| 63642 | #ifdef __LITTLE_ENDIAN__ | 62668 | #ifdef __LITTLE_ENDIAN__ |
| 63643 | #define vst3q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 62669 | __ai int64x2_t vzip2q_s64(int64x2_t __p0, int64x2_t __p1) { |
| 63644 | poly8x16x3_t __s1 = __p1; \ | 62670 | int64x2_t __ret; |
| 63645 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 36); \ | 62671 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 63646 | }) | 62672 | return __ret; |
| | 62673 | } |
| 63647 | #else | 62674 | #else |
| 63648 | #define vst3q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 62675 | __ai int64x2_t vzip2q_s64(int64x2_t __p0, int64x2_t __p1) { |
| 63649 | poly8x16x3_t __s1 = __p1; \ | 62676 | int64x2_t __ret; |
| 63650 | poly8x16x3_t __rev1; \ | 62677 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 63651 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62678 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 63652 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62679 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 63653 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62680 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 63654 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 36); \ | 62681 | return __ret; |
| 63655 | }) | 62682 | } |
| 63656 | #endif | 62683 | #endif |
| 63657 | | 62684 | |
| 63658 | #ifdef __LITTLE_ENDIAN__ | 62685 | #ifdef __LITTLE_ENDIAN__ |
| 63659 | #define vst3q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 62686 | __ai int16x8_t vzip2q_s16(int16x8_t __p0, int16x8_t __p1) { |
| 63660 | poly64x2x3_t __s1 = __p1; \ | 62687 | int16x8_t __ret; |
| 63661 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 38); \ | 62688 | __ret = __builtin_shufflevector(__p0, __p1, 4, 12, 5, 13, 6, 14, 7, 15); |
| 63662 | }) | 62689 | return __ret; |
| | 62690 | } |
| 63663 | #else | 62691 | #else |
| 63664 | #define vst3q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 62692 | __ai int16x8_t vzip2q_s16(int16x8_t __p0, int16x8_t __p1) { |
| 63665 | poly64x2x3_t __s1 = __p1; \ | 62693 | int16x8_t __ret; |
| 63666 | poly64x2x3_t __rev1; \ | 62694 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63667 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62695 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63668 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62696 | __ret = __builtin_shufflevector(__rev0, __rev1, 4, 12, 5, 13, 6, 14, 7, 15); |
| 63669 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62697 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63670 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 38); \ | 62698 | return __ret; |
| 63671 | }) | 62699 | } |
| 63672 | #endif | 62700 | #endif |
| 63673 | | 62701 | |
| 63674 | #ifdef __LITTLE_ENDIAN__ | 62702 | #ifdef __LITTLE_ENDIAN__ |
| 63675 | #define vst3q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ | 62703 | __ai uint8x8_t vzip2_u8(uint8x8_t __p0, uint8x8_t __p1) { |
| 63676 | uint8x16x3_t __s1 = __p1; \ | 62704 | uint8x8_t __ret; |
| 63677 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 48); \ | 62705 | __ret = __builtin_shufflevector(__p0, __p1, 4, 12, 5, 13, 6, 14, 7, 15); |
| 63678 | }) | 62706 | return __ret; |
| | 62707 | } |
| 63679 | #else | 62708 | #else |
| 63680 | #define vst3q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ | 62709 | __ai uint8x8_t vzip2_u8(uint8x8_t __p0, uint8x8_t __p1) { |
| 63681 | uint8x16x3_t __s1 = __p1; \ | 62710 | uint8x8_t __ret; |
| 63682 | uint8x16x3_t __rev1; \ | 62711 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63683 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62712 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63684 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62713 | __ret = __builtin_shufflevector(__rev0, __rev1, 4, 12, 5, 13, 6, 14, 7, 15); |
| 63685 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62714 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63686 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 48); \ | 62715 | return __ret; |
| 63687 | }) | 62716 | } |
| 63688 | #endif | 62717 | #endif |
| 63689 | | 62718 | |
| 63690 | #ifdef __LITTLE_ENDIAN__ | 62719 | #ifdef __LITTLE_ENDIAN__ |
| 63691 | #define vst3q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 62720 | __ai uint32x2_t vzip2_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 63692 | uint64x2x3_t __s1 = __p1; \ | 62721 | uint32x2_t __ret; |
| 63693 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 51); \ | 62722 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 63694 | }) | 62723 | return __ret; |
| | 62724 | } |
| 63695 | #else | 62725 | #else |
| 63696 | #define vst3q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 62726 | __ai uint32x2_t vzip2_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 63697 | uint64x2x3_t __s1 = __p1; \ | 62727 | uint32x2_t __ret; |
| 63698 | uint64x2x3_t __rev1; \ | 62728 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 63699 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62729 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 63700 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62730 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 63701 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62731 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 63702 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 51); \ | 62732 | return __ret; |
| 63703 | }) | 62733 | } |
| 63704 | #endif | 62734 | #endif |
| 63705 | | 62735 | |
| 63706 | #ifdef __LITTLE_ENDIAN__ | 62736 | #ifdef __LITTLE_ENDIAN__ |
| 63707 | #define vst3q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ | 62737 | __ai uint16x4_t vzip2_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 63708 | int8x16x3_t __s1 = __p1; \ | 62738 | uint16x4_t __ret; |
| 63709 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 32); \ | 62739 | __ret = __builtin_shufflevector(__p0, __p1, 2, 6, 3, 7); |
| 63710 | }) | 62740 | return __ret; |
| | 62741 | } |
| 63711 | #else | 62742 | #else |
| 63712 | #define vst3q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ | 62743 | __ai uint16x4_t vzip2_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 63713 | int8x16x3_t __s1 = __p1; \ | 62744 | uint16x4_t __ret; |
| 63714 | int8x16x3_t __rev1; \ | 62745 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 63715 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62746 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 63716 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62747 | __ret = __builtin_shufflevector(__rev0, __rev1, 2, 6, 3, 7); |
| 63717 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62748 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 63718 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 32); \ | 62749 | return __ret; |
| 63719 | }) | 62750 | } |
| 63720 | #endif | 62751 | #endif |
| 63721 | | 62752 | |
| 63722 | #ifdef __LITTLE_ENDIAN__ | 62753 | #ifdef __LITTLE_ENDIAN__ |
| 63723 | #define vst3q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 62754 | __ai int8x8_t vzip2_s8(int8x8_t __p0, int8x8_t __p1) { |
| 63724 | float64x2x3_t __s1 = __p1; \ | 62755 | int8x8_t __ret; |
| 63725 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 42); \ | 62756 | __ret = __builtin_shufflevector(__p0, __p1, 4, 12, 5, 13, 6, 14, 7, 15); |
| 63726 | }) | 62757 | return __ret; |
| | 62758 | } |
| 63727 | #else | 62759 | #else |
| 63728 | #define vst3q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 62760 | __ai int8x8_t vzip2_s8(int8x8_t __p0, int8x8_t __p1) { |
| 63729 | float64x2x3_t __s1 = __p1; \ | 62761 | int8x8_t __ret; |
| 63730 | float64x2x3_t __rev1; \ | 62762 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63731 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62763 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63732 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62764 | __ret = __builtin_shufflevector(__rev0, __rev1, 4, 12, 5, 13, 6, 14, 7, 15); |
| 63733 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62765 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63734 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 42); \ | 62766 | return __ret; |
| 63735 | }) | 62767 | } |
| 63736 | #endif | 62768 | #endif |
| 63737 | | 62769 | |
| 63738 | #ifdef __LITTLE_ENDIAN__ | 62770 | #ifdef __LITTLE_ENDIAN__ |
| 63739 | #define vst3q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 62771 | __ai float32x2_t vzip2_f32(float32x2_t __p0, float32x2_t __p1) { |
| 63740 | int64x2x3_t __s1 = __p1; \ | 62772 | float32x2_t __ret; |
| 63741 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 35); \ | 62773 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 63742 | }) | 62774 | return __ret; |
| | 62775 | } |
| 63743 | #else | 62776 | #else |
| 63744 | #define vst3q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 62777 | __ai float32x2_t vzip2_f32(float32x2_t __p0, float32x2_t __p1) { |
| 63745 | int64x2x3_t __s1 = __p1; \ | 62778 | float32x2_t __ret; |
| 63746 | int64x2x3_t __rev1; \ | 62779 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 63747 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62780 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 63748 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62781 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 63749 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62782 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 63750 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 35); \ | 62783 | return __ret; |
| 63751 | }) | 62784 | } |
| 63752 | #endif | 62785 | #endif |
| 63753 | | 62786 | |
| 63754 | #define vst3_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63755 | uint64x1x3_t __s1 = __p1; \ | | |
| 63756 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 19); \ | | |
| 63757 | }) | | |
| 63758 | #define vst3_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63759 | float64x1x3_t __s1 = __p1; \ | | |
| 63760 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 10); \ | | |
| 63761 | }) | | |
| 63762 | #define vst3_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63763 | int64x1x3_t __s1 = __p1; \ | | |
| 63764 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 3); \ | | |
| 63765 | }) | | |
| 63766 | #define vst4_p64(__p0, __p1) __extension__ ({ \ | | |
| 63767 | poly64x1x4_t __s1 = __p1; \ | | |
| 63768 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 6); \ | | |
| 63769 | }) | | |
| 63770 | #ifdef __LITTLE_ENDIAN__ | 62787 | #ifdef __LITTLE_ENDIAN__ |
| 63771 | #define vst4q_p64(__p0, __p1) __extension__ ({ \ | 62788 | __ai int32x2_t vzip2_s32(int32x2_t __p0, int32x2_t __p1) { |
| 63772 | poly64x2x4_t __s1 = __p1; \ | 62789 | int32x2_t __ret; |
| 63773 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 38); \ | 62790 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); |
| 63774 | }) | 62791 | return __ret; |
| 63775 | #else | 62792 | } |
| 63776 | #define vst4q_p64(__p0, __p1) __extension__ ({ \ | 62793 | #else |
| 63777 | poly64x2x4_t __s1 = __p1; \ | 62794 | __ai int32x2_t vzip2_s32(int32x2_t __p0, int32x2_t __p1) { |
| 63778 | poly64x2x4_t __rev1; \ | 62795 | int32x2_t __ret; |
| 63779 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62796 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 63780 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62797 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 63781 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62798 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); |
| 63782 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 62799 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 63783 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 38); \ | 62800 | return __ret; |
| 63784 | }) | 62801 | } |
| 63785 | #endif | 62802 | #endif |
| 63786 | | 62803 | |
| 63787 | #ifdef __LITTLE_ENDIAN__ | 62804 | #ifdef __LITTLE_ENDIAN__ |
| 63788 | #define vst4q_u64(__p0, __p1) __extension__ ({ \ | 62805 | __ai int16x4_t vzip2_s16(int16x4_t __p0, int16x4_t __p1) { |
| 63789 | uint64x2x4_t __s1 = __p1; \ | 62806 | int16x4_t __ret; |
| 63790 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 51); \ | 62807 | __ret = __builtin_shufflevector(__p0, __p1, 2, 6, 3, 7); |
| 63791 | }) | 62808 | return __ret; |
| | 62809 | } |
| 63792 | #else | 62810 | #else |
| 63793 | #define vst4q_u64(__p0, __p1) __extension__ ({ \ | 62811 | __ai int16x4_t vzip2_s16(int16x4_t __p0, int16x4_t __p1) { |
| 63794 | uint64x2x4_t __s1 = __p1; \ | 62812 | int16x4_t __ret; |
| 63795 | uint64x2x4_t __rev1; \ | 62813 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 63796 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62814 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 63797 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62815 | __ret = __builtin_shufflevector(__rev0, __rev1, 2, 6, 3, 7); |
| 63798 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62816 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 63799 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 62817 | return __ret; |
| 63800 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 51); \ | 62818 | } |
| 63801 | }) | | |
| 63802 | #endif | 62819 | #endif |
| 63803 | | 62820 | |
| | 62821 | __ai __attribute__((target("aes"))) poly128_t vmull_p64(poly64_t __p0, poly64_t __p1) { |
| | 62822 | poly128_t __ret; |
| | 62823 | __ret = (poly128_t) __builtin_neon_vmull_p64(__p0, __p1); |
| | 62824 | return __ret; |
| | 62825 | } |
| 63804 | #ifdef __LITTLE_ENDIAN__ | 62826 | #ifdef __LITTLE_ENDIAN__ |
| 63805 | #define vst4q_f64(__p0, __p1) __extension__ ({ \ | 62827 | __ai __attribute__((target("aes"))) poly128_t vmull_high_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 63806 | float64x2x4_t __s1 = __p1; \ | 62828 | poly128_t __ret; |
| 63807 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 42); \ | 62829 | __ret = vmull_p64((poly64_t)(vget_high_p64(__p0)), (poly64_t)(vget_high_p64(__p1))); |
| 63808 | }) | 62830 | return __ret; |
| | 62831 | } |
| 63809 | #else | 62832 | #else |
| 63810 | #define vst4q_f64(__p0, __p1) __extension__ ({ \ | 62833 | __ai __attribute__((target("aes"))) poly128_t vmull_high_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 63811 | float64x2x4_t __s1 = __p1; \ | 62834 | poly128_t __ret; |
| 63812 | float64x2x4_t __rev1; \ | 62835 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 63813 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62836 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 63814 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62837 | __ret = vmull_p64((poly64_t)(__noswap_vget_high_p64(__rev0)), (poly64_t)(__noswap_vget_high_p64(__rev1))); |
| 63815 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62838 | return __ret; |
| 63816 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 62839 | } |
| 63817 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 42); \ | | |
| 63818 | }) | | |
| 63819 | #endif | 62840 | #endif |
| 63820 | | 62841 | |
| 63821 | #ifdef __LITTLE_ENDIAN__ | 62842 | #ifdef __LITTLE_ENDIAN__ |
| 63822 | #define vst4q_s64(__p0, __p1) __extension__ ({ \ | 62843 | __ai __attribute__((target("bf16"))) bfloat16x8_t __a64_vcvtq_low_bf16_f32(float32x4_t __p0) { |
| 63823 | int64x2x4_t __s1 = __p1; \ | 62844 | bfloat16x8_t __ret; |
| 63824 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 35); \ | 62845 | __ret = (bfloat16x8_t) __builtin_neon___a64_vcvtq_low_bf16_f32((int8x16_t)__p0, 43); |
| 63825 | }) | 62846 | return __ret; |
| | 62847 | } |
| 63826 | #else | 62848 | #else |
| 63827 | #define vst4q_s64(__p0, __p1) __extension__ ({ \ | 62849 | __ai __attribute__((target("bf16"))) bfloat16x8_t __a64_vcvtq_low_bf16_f32(float32x4_t __p0) { |
| 63828 | int64x2x4_t __s1 = __p1; \ | 62850 | bfloat16x8_t __ret; |
| 63829 | int64x2x4_t __rev1; \ | 62851 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 63830 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62852 | __ret = (bfloat16x8_t) __builtin_neon___a64_vcvtq_low_bf16_f32((int8x16_t)__rev0, 43); |
| 63831 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62853 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63832 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62854 | return __ret; |
| 63833 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 62855 | } |
| 63834 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 35); \ | 62856 | __ai __attribute__((target("bf16"))) bfloat16x8_t __noswap___a64_vcvtq_low_bf16_f32(float32x4_t __p0) { |
| 63835 | }) | 62857 | bfloat16x8_t __ret; |
| | 62858 | __ret = (bfloat16x8_t) __builtin_neon___a64_vcvtq_low_bf16_f32((int8x16_t)__p0, 43); |
| | 62859 | return __ret; |
| | 62860 | } |
| 63836 | #endif | 62861 | #endif |
| 63837 | | 62862 | |
| 63838 | #define vst4_f64(__p0, __p1) __extension__ ({ \ | | |
| 63839 | float64x1x4_t __s1 = __p1; \ | | |
| 63840 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 10); \ | | |
| 63841 | }) | | |
| 63842 | #define vst4_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63843 | poly64x1x4_t __s1 = __p1; \ | | |
| 63844 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 6); \ | | |
| 63845 | }) | | |
| 63846 | #ifdef __LITTLE_ENDIAN__ | 62863 | #ifdef __LITTLE_ENDIAN__ |
| 63847 | #define vst4q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 62864 | #define vcopyq_lane_bf16(__p0_739, __p1_739, __p2_739, __p3_739) __extension__ ({ \ |
| 63848 | poly8x16x4_t __s1 = __p1; \ | 62865 | bfloat16x8_t __ret_739; \ |
| 63849 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 36); \ | 62866 | bfloat16x8_t __s0_739 = __p0_739; \ |
| | 62867 | bfloat16x4_t __s2_739 = __p2_739; \ |
| | 62868 | __ret_739 = vsetq_lane_bf16(vget_lane_bf16(__s2_739, __p3_739), __s0_739, __p1_739); \ |
| | 62869 | __ret_739; \ |
| 63850 | }) | 62870 | }) |
| 63851 | #else | 62871 | #else |
| 63852 | #define vst4q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 62872 | #define vcopyq_lane_bf16(__p0_740, __p1_740, __p2_740, __p3_740) __extension__ ({ \ |
| 63853 | poly8x16x4_t __s1 = __p1; \ | 62873 | bfloat16x8_t __ret_740; \ |
| 63854 | poly8x16x4_t __rev1; \ | 62874 | bfloat16x8_t __s0_740 = __p0_740; \ |
| 63855 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62875 | bfloat16x4_t __s2_740 = __p2_740; \ |
| 63856 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62876 | bfloat16x8_t __rev0_740; __rev0_740 = __builtin_shufflevector(__s0_740, __s0_740, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63857 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62877 | bfloat16x4_t __rev2_740; __rev2_740 = __builtin_shufflevector(__s2_740, __s2_740, 3, 2, 1, 0); \ |
| 63858 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62878 | __ret_740 = __noswap_vsetq_lane_bf16(__noswap_vget_lane_bf16(__rev2_740, __p3_740), __rev0_740, __p1_740); \ |
| 63859 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 36); \ | 62879 | __ret_740 = __builtin_shufflevector(__ret_740, __ret_740, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 62880 | __ret_740; \ |
| 63860 | }) | 62881 | }) |
| 63861 | #endif | 62882 | #endif |
| 63862 | | 62883 | |
| 63863 | #ifdef __LITTLE_ENDIAN__ | 62884 | #ifdef __LITTLE_ENDIAN__ |
| 63864 | #define vst4q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 62885 | #define vcopy_lane_bf16(__p0_741, __p1_741, __p2_741, __p3_741) __extension__ ({ \ |
| 63865 | poly64x2x4_t __s1 = __p1; \ | 62886 | bfloat16x4_t __ret_741; \ |
| 63866 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 38); \ | 62887 | bfloat16x4_t __s0_741 = __p0_741; \ |
| | 62888 | bfloat16x4_t __s2_741 = __p2_741; \ |
| | 62889 | __ret_741 = vset_lane_bf16(vget_lane_bf16(__s2_741, __p3_741), __s0_741, __p1_741); \ |
| | 62890 | __ret_741; \ |
| 63867 | }) | 62891 | }) |
| 63868 | #else | 62892 | #else |
| 63869 | #define vst4q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 62893 | #define vcopy_lane_bf16(__p0_742, __p1_742, __p2_742, __p3_742) __extension__ ({ \ |
| 63870 | poly64x2x4_t __s1 = __p1; \ | 62894 | bfloat16x4_t __ret_742; \ |
| 63871 | poly64x2x4_t __rev1; \ | 62895 | bfloat16x4_t __s0_742 = __p0_742; \ |
| 63872 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62896 | bfloat16x4_t __s2_742 = __p2_742; \ |
| 63873 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62897 | bfloat16x4_t __rev0_742; __rev0_742 = __builtin_shufflevector(__s0_742, __s0_742, 3, 2, 1, 0); \ |
| 63874 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62898 | bfloat16x4_t __rev2_742; __rev2_742 = __builtin_shufflevector(__s2_742, __s2_742, 3, 2, 1, 0); \ |
| 63875 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 62899 | __ret_742 = __noswap_vset_lane_bf16(__noswap_vget_lane_bf16(__rev2_742, __p3_742), __rev0_742, __p1_742); \ |
| 63876 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 38); \ | 62900 | __ret_742 = __builtin_shufflevector(__ret_742, __ret_742, 3, 2, 1, 0); \ |
| | 62901 | __ret_742; \ |
| 63877 | }) | 62902 | }) |
| 63878 | #endif | 62903 | #endif |
| 63879 | | 62904 | |
| 63880 | #ifdef __LITTLE_ENDIAN__ | 62905 | #ifdef __LITTLE_ENDIAN__ |
| 63881 | #define vst4q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ | 62906 | #define vcopyq_laneq_bf16(__p0_743, __p1_743, __p2_743, __p3_743) __extension__ ({ \ |
| 63882 | uint8x16x4_t __s1 = __p1; \ | 62907 | bfloat16x8_t __ret_743; \ |
| 63883 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 48); \ | 62908 | bfloat16x8_t __s0_743 = __p0_743; \ |
| | 62909 | bfloat16x8_t __s2_743 = __p2_743; \ |
| | 62910 | __ret_743 = vsetq_lane_bf16(vgetq_lane_bf16(__s2_743, __p3_743), __s0_743, __p1_743); \ |
| | 62911 | __ret_743; \ |
| 63884 | }) | 62912 | }) |
| 63885 | #else | 62913 | #else |
| 63886 | #define vst4q_lane_u8(__p0, __p1, __p2) __extension__ ({ \ | 62914 | #define vcopyq_laneq_bf16(__p0_744, __p1_744, __p2_744, __p3_744) __extension__ ({ \ |
| 63887 | uint8x16x4_t __s1 = __p1; \ | 62915 | bfloat16x8_t __ret_744; \ |
| 63888 | uint8x16x4_t __rev1; \ | 62916 | bfloat16x8_t __s0_744 = __p0_744; \ |
| 63889 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62917 | bfloat16x8_t __s2_744 = __p2_744; \ |
| 63890 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62918 | bfloat16x8_t __rev0_744; __rev0_744 = __builtin_shufflevector(__s0_744, __s0_744, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63891 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62919 | bfloat16x8_t __rev2_744; __rev2_744 = __builtin_shufflevector(__s2_744, __s2_744, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63892 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62920 | __ret_744 = __noswap_vsetq_lane_bf16(__noswap_vgetq_lane_bf16(__rev2_744, __p3_744), __rev0_744, __p1_744); \ |
| 63893 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 48); \ | 62921 | __ret_744 = __builtin_shufflevector(__ret_744, __ret_744, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 62922 | __ret_744; \ |
| 63894 | }) | 62923 | }) |
| 63895 | #endif | 62924 | #endif |
| 63896 | | 62925 | |
| 63897 | #ifdef __LITTLE_ENDIAN__ | 62926 | #ifdef __LITTLE_ENDIAN__ |
| 63898 | #define vst4q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 62927 | #define vcopy_laneq_bf16(__p0_745, __p1_745, __p2_745, __p3_745) __extension__ ({ \ |
| 63899 | uint64x2x4_t __s1 = __p1; \ | 62928 | bfloat16x4_t __ret_745; \ |
| 63900 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 51); \ | 62929 | bfloat16x4_t __s0_745 = __p0_745; \ |
| | 62930 | bfloat16x8_t __s2_745 = __p2_745; \ |
| | 62931 | __ret_745 = vset_lane_bf16(vgetq_lane_bf16(__s2_745, __p3_745), __s0_745, __p1_745); \ |
| | 62932 | __ret_745; \ |
| 63901 | }) | 62933 | }) |
| 63902 | #else | 62934 | #else |
| 63903 | #define vst4q_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 62935 | #define vcopy_laneq_bf16(__p0_746, __p1_746, __p2_746, __p3_746) __extension__ ({ \ |
| 63904 | uint64x2x4_t __s1 = __p1; \ | 62936 | bfloat16x4_t __ret_746; \ |
| 63905 | uint64x2x4_t __rev1; \ | 62937 | bfloat16x4_t __s0_746 = __p0_746; \ |
| 63906 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62938 | bfloat16x8_t __s2_746 = __p2_746; \ |
| 63907 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62939 | bfloat16x4_t __rev0_746; __rev0_746 = __builtin_shufflevector(__s0_746, __s0_746, 3, 2, 1, 0); \ |
| 63908 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62940 | bfloat16x8_t __rev2_746; __rev2_746 = __builtin_shufflevector(__s2_746, __s2_746, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63909 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 62941 | __ret_746 = __noswap_vset_lane_bf16(__noswap_vgetq_lane_bf16(__rev2_746, __p3_746), __rev0_746, __p1_746); \ |
| 63910 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 51); \ | 62942 | __ret_746 = __builtin_shufflevector(__ret_746, __ret_746, 3, 2, 1, 0); \ |
| | 62943 | __ret_746; \ |
| 63911 | }) | 62944 | }) |
| 63912 | #endif | 62945 | #endif |
| 63913 | | 62946 | |
| 63914 | #ifdef __LITTLE_ENDIAN__ | 62947 | #ifdef __LITTLE_ENDIAN__ |
| 63915 | #define vst4q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ | 62948 | __ai __attribute__((target("bf16"))) bfloat16x4_t vcvt_bf16_f32(float32x4_t __p0) { |
| 63916 | int8x16x4_t __s1 = __p1; \ | 62949 | bfloat16x4_t __ret; |
| 63917 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 32); \ | 62950 | __ret = vget_low_bf16(__a64_vcvtq_low_bf16_f32(__p0)); |
| 63918 | }) | 62951 | return __ret; |
| | 62952 | } |
| 63919 | #else | 62953 | #else |
| 63920 | #define vst4q_lane_s8(__p0, __p1, __p2) __extension__ ({ \ | 62954 | __ai __attribute__((target("bf16"))) bfloat16x4_t vcvt_bf16_f32(float32x4_t __p0) { |
| 63921 | int8x16x4_t __s1 = __p1; \ | 62955 | bfloat16x4_t __ret; |
| 63922 | int8x16x4_t __rev1; \ | 62956 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 63923 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62957 | __ret = __noswap_vget_low_bf16(__noswap___a64_vcvtq_low_bf16_f32(__rev0)); |
| 63924 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62958 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 63925 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62959 | return __ret; |
| 63926 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 62960 | } |
| 63927 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 32); \ | | |
| 63928 | }) | | |
| 63929 | #endif | 62961 | #endif |
| 63930 | | 62962 | |
| 63931 | #ifdef __LITTLE_ENDIAN__ | 62963 | #ifdef __LITTLE_ENDIAN__ |
| 63932 | #define vst4q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 62964 | __ai __attribute__((target("bf16"))) bfloat16x8_t vcvtq_high_bf16_f32(bfloat16x8_t __p0, float32x4_t __p1) { |
| 63933 | float64x2x4_t __s1 = __p1; \ | 62965 | bfloat16x8_t __ret; |
| 63934 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 42); \ | 62966 | __ret = (bfloat16x8_t) __builtin_neon_vcvtq_high_bf16_f32((int8x16_t)__p0, (int8x16_t)__p1, 43); |
| 63935 | }) | 62967 | return __ret; |
| | 62968 | } |
| 63936 | #else | 62969 | #else |
| 63937 | #define vst4q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 62970 | __ai __attribute__((target("bf16"))) bfloat16x8_t vcvtq_high_bf16_f32(bfloat16x8_t __p0, float32x4_t __p1) { |
| 63938 | float64x2x4_t __s1 = __p1; \ | 62971 | bfloat16x8_t __ret; |
| 63939 | float64x2x4_t __rev1; \ | 62972 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63940 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62973 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 63941 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62974 | __ret = (bfloat16x8_t) __builtin_neon_vcvtq_high_bf16_f32((int8x16_t)__rev0, (int8x16_t)__rev1, 43); |
| 63942 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62975 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63943 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 62976 | return __ret; |
| 63944 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 42); \ | 62977 | } |
| 63945 | }) | | |
| 63946 | #endif | 62978 | #endif |
| 63947 | | 62979 | |
| 63948 | #ifdef __LITTLE_ENDIAN__ | 62980 | #ifdef __LITTLE_ENDIAN__ |
| 63949 | #define vst4q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 62981 | __ai __attribute__((target("bf16"))) bfloat16x8_t vcvtq_low_bf16_f32(float32x4_t __p0) { |
| 63950 | int64x2x4_t __s1 = __p1; \ | 62982 | bfloat16x8_t __ret; |
| 63951 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 35); \ | 62983 | __ret = __a64_vcvtq_low_bf16_f32(__p0); |
| 63952 | }) | 62984 | return __ret; |
| | 62985 | } |
| 63953 | #else | 62986 | #else |
| 63954 | #define vst4q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 62987 | __ai __attribute__((target("bf16"))) bfloat16x8_t vcvtq_low_bf16_f32(float32x4_t __p0) { |
| 63955 | int64x2x4_t __s1 = __p1; \ | 62988 | bfloat16x8_t __ret; |
| 63956 | int64x2x4_t __rev1; \ | 62989 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 63957 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 62990 | __ret = __noswap___a64_vcvtq_low_bf16_f32(__rev0); |
| 63958 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 62991 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 63959 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 62992 | return __ret; |
| 63960 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 62993 | } |
| 63961 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 35); \ | | |
| 63962 | }) | | |
| 63963 | #endif | 62994 | #endif |
| 63964 | | 62995 | |
| 63965 | #define vst4_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 62996 | __ai __attribute__((target("bf16"))) poly8x8_t vreinterpret_p8_bf16(bfloat16x4_t __p0) { |
| 63966 | uint64x1x4_t __s1 = __p1; \ | 62997 | poly8x8_t __ret; |
| 63967 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 19); \ | 62998 | __ret = (poly8x8_t)(__p0); |
| 63968 | }) | | |
| 63969 | #define vst4_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63970 | float64x1x4_t __s1 = __p1; \ | | |
| 63971 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 10); \ | | |
| 63972 | }) | | |
| 63973 | #define vst4_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 63974 | int64x1x4_t __s1 = __p1; \ | | |
| 63975 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 3); \ | | |
| 63976 | }) | | |
| 63977 | #define vstrq_p128(__p0, __p1) __extension__ ({ \ | | |
| 63978 | poly128_t __s1 = __p1; \ | | |
| 63979 | __builtin_neon_vstrq_p128(__p0, __s1); \ | | |
| 63980 | }) | | |
| 63981 | __ai uint64_t vsubd_u64(uint64_t __p0, uint64_t __p1) { | | |
| 63982 | uint64_t __ret; | | |
| 63983 | __ret = (uint64_t) __builtin_neon_vsubd_u64(__p0, __p1); | | |
| 63984 | return __ret; | 62999 | return __ret; |
| 63985 | } | 63000 | } |
| 63986 | __ai int64_t vsubd_s64(int64_t __p0, int64_t __p1) { | 63001 | __ai __attribute__((target("bf16"))) poly64x1_t vreinterpret_p64_bf16(bfloat16x4_t __p0) { |
| 63987 | int64_t __ret; | 63002 | poly64x1_t __ret; |
| 63988 | __ret = (int64_t) __builtin_neon_vsubd_s64(__p0, __p1); | 63003 | __ret = (poly64x1_t)(__p0); |
| 63989 | return __ret; | 63004 | return __ret; |
| 63990 | } | 63005 | } |
| 63991 | #ifdef __LITTLE_ENDIAN__ | 63006 | __ai __attribute__((target("bf16"))) poly16x4_t vreinterpret_p16_bf16(bfloat16x4_t __p0) { |
| 63992 | __ai float64x2_t vsubq_f64(float64x2_t __p0, float64x2_t __p1) { | 63007 | poly16x4_t __ret; |
| 63993 | float64x2_t __ret; | 63008 | __ret = (poly16x4_t)(__p0); |
| 63994 | __ret = __p0 - __p1; | | |
| 63995 | return __ret; | 63009 | return __ret; |
| 63996 | } | 63010 | } |
| 63997 | #else | 63011 | __ai __attribute__((target("bf16"))) poly8x16_t vreinterpretq_p8_bf16(bfloat16x8_t __p0) { |
| 63998 | __ai float64x2_t vsubq_f64(float64x2_t __p0, float64x2_t __p1) { | 63012 | poly8x16_t __ret; |
| | 63013 | __ret = (poly8x16_t)(__p0); |
| | 63014 | return __ret; |
| | 63015 | } |
| | 63016 | __ai __attribute__((target("bf16"))) poly128_t vreinterpretq_p128_bf16(bfloat16x8_t __p0) { |
| | 63017 | poly128_t __ret; |
| | 63018 | __ret = (poly128_t)(__p0); |
| | 63019 | return __ret; |
| | 63020 | } |
| | 63021 | __ai __attribute__((target("bf16"))) poly64x2_t vreinterpretq_p64_bf16(bfloat16x8_t __p0) { |
| | 63022 | poly64x2_t __ret; |
| | 63023 | __ret = (poly64x2_t)(__p0); |
| | 63024 | return __ret; |
| | 63025 | } |
| | 63026 | __ai __attribute__((target("bf16"))) poly16x8_t vreinterpretq_p16_bf16(bfloat16x8_t __p0) { |
| | 63027 | poly16x8_t __ret; |
| | 63028 | __ret = (poly16x8_t)(__p0); |
| | 63029 | return __ret; |
| | 63030 | } |
| | 63031 | __ai __attribute__((target("bf16"))) uint8x16_t vreinterpretq_u8_bf16(bfloat16x8_t __p0) { |
| | 63032 | uint8x16_t __ret; |
| | 63033 | __ret = (uint8x16_t)(__p0); |
| | 63034 | return __ret; |
| | 63035 | } |
| | 63036 | __ai __attribute__((target("bf16"))) uint32x4_t vreinterpretq_u32_bf16(bfloat16x8_t __p0) { |
| | 63037 | uint32x4_t __ret; |
| | 63038 | __ret = (uint32x4_t)(__p0); |
| | 63039 | return __ret; |
| | 63040 | } |
| | 63041 | __ai __attribute__((target("bf16"))) uint64x2_t vreinterpretq_u64_bf16(bfloat16x8_t __p0) { |
| | 63042 | uint64x2_t __ret; |
| | 63043 | __ret = (uint64x2_t)(__p0); |
| | 63044 | return __ret; |
| | 63045 | } |
| | 63046 | __ai __attribute__((target("bf16"))) uint16x8_t vreinterpretq_u16_bf16(bfloat16x8_t __p0) { |
| | 63047 | uint16x8_t __ret; |
| | 63048 | __ret = (uint16x8_t)(__p0); |
| | 63049 | return __ret; |
| | 63050 | } |
| | 63051 | __ai __attribute__((target("bf16"))) int8x16_t vreinterpretq_s8_bf16(bfloat16x8_t __p0) { |
| | 63052 | int8x16_t __ret; |
| | 63053 | __ret = (int8x16_t)(__p0); |
| | 63054 | return __ret; |
| | 63055 | } |
| | 63056 | __ai __attribute__((target("bf16"))) float64x2_t vreinterpretq_f64_bf16(bfloat16x8_t __p0) { |
| 63999 | float64x2_t __ret; | 63057 | float64x2_t __ret; |
| 64000 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 63058 | __ret = (float64x2_t)(__p0); |
| 64001 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 64002 | __ret = __rev0 - __rev1; | | |
| 64003 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 64004 | return __ret; | 63059 | return __ret; |
| 64005 | } | 63060 | } |
| 64006 | #endif | 63061 | __ai __attribute__((target("bf16"))) float32x4_t vreinterpretq_f32_bf16(bfloat16x8_t __p0) { |
| 64007 | | 63062 | float32x4_t __ret; |
| 64008 | __ai float64x1_t vsub_f64(float64x1_t __p0, float64x1_t __p1) { | 63063 | __ret = (float32x4_t)(__p0); |
| | 63064 | return __ret; |
| | 63065 | } |
| | 63066 | __ai __attribute__((target("bf16"))) float16x8_t vreinterpretq_f16_bf16(bfloat16x8_t __p0) { |
| | 63067 | float16x8_t __ret; |
| | 63068 | __ret = (float16x8_t)(__p0); |
| | 63069 | return __ret; |
| | 63070 | } |
| | 63071 | __ai __attribute__((target("bf16"))) int32x4_t vreinterpretq_s32_bf16(bfloat16x8_t __p0) { |
| | 63072 | int32x4_t __ret; |
| | 63073 | __ret = (int32x4_t)(__p0); |
| | 63074 | return __ret; |
| | 63075 | } |
| | 63076 | __ai __attribute__((target("bf16"))) int64x2_t vreinterpretq_s64_bf16(bfloat16x8_t __p0) { |
| | 63077 | int64x2_t __ret; |
| | 63078 | __ret = (int64x2_t)(__p0); |
| | 63079 | return __ret; |
| | 63080 | } |
| | 63081 | __ai __attribute__((target("bf16"))) int16x8_t vreinterpretq_s16_bf16(bfloat16x8_t __p0) { |
| | 63082 | int16x8_t __ret; |
| | 63083 | __ret = (int16x8_t)(__p0); |
| | 63084 | return __ret; |
| | 63085 | } |
| | 63086 | __ai __attribute__((target("bf16"))) uint8x8_t vreinterpret_u8_bf16(bfloat16x4_t __p0) { |
| | 63087 | uint8x8_t __ret; |
| | 63088 | __ret = (uint8x8_t)(__p0); |
| | 63089 | return __ret; |
| | 63090 | } |
| | 63091 | __ai __attribute__((target("bf16"))) uint32x2_t vreinterpret_u32_bf16(bfloat16x4_t __p0) { |
| | 63092 | uint32x2_t __ret; |
| | 63093 | __ret = (uint32x2_t)(__p0); |
| | 63094 | return __ret; |
| | 63095 | } |
| | 63096 | __ai __attribute__((target("bf16"))) uint64x1_t vreinterpret_u64_bf16(bfloat16x4_t __p0) { |
| | 63097 | uint64x1_t __ret; |
| | 63098 | __ret = (uint64x1_t)(__p0); |
| | 63099 | return __ret; |
| | 63100 | } |
| | 63101 | __ai __attribute__((target("bf16"))) uint16x4_t vreinterpret_u16_bf16(bfloat16x4_t __p0) { |
| | 63102 | uint16x4_t __ret; |
| | 63103 | __ret = (uint16x4_t)(__p0); |
| | 63104 | return __ret; |
| | 63105 | } |
| | 63106 | __ai __attribute__((target("bf16"))) int8x8_t vreinterpret_s8_bf16(bfloat16x4_t __p0) { |
| | 63107 | int8x8_t __ret; |
| | 63108 | __ret = (int8x8_t)(__p0); |
| | 63109 | return __ret; |
| | 63110 | } |
| | 63111 | __ai __attribute__((target("bf16"))) float64x1_t vreinterpret_f64_bf16(bfloat16x4_t __p0) { |
| 64009 | float64x1_t __ret; | 63112 | float64x1_t __ret; |
| 64010 | __ret = __p0 - __p1; | 63113 | __ret = (float64x1_t)(__p0); |
| 64011 | return __ret; | 63114 | return __ret; |
| 64012 | } | 63115 | } |
| 64013 | #ifdef __LITTLE_ENDIAN__ | 63116 | __ai __attribute__((target("bf16"))) float32x2_t vreinterpret_f32_bf16(bfloat16x4_t __p0) { |
| 64014 | __ai uint16x8_t vsubhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 63117 | float32x2_t __ret; |
| 64015 | uint16x8_t __ret; | 63118 | __ret = (float32x2_t)(__p0); |
| 64016 | __ret = vcombine_u16(__p0, vsubhn_u32(__p1, __p2)); | | |
| 64017 | return __ret; | 63119 | return __ret; |
| 64018 | } | 63120 | } |
| 64019 | #else | 63121 | __ai __attribute__((target("bf16"))) float16x4_t vreinterpret_f16_bf16(bfloat16x4_t __p0) { |
| 64020 | __ai uint16x8_t vsubhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 63122 | float16x4_t __ret; |
| 64021 | uint16x8_t __ret; | 63123 | __ret = (float16x4_t)(__p0); |
| 64022 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 64023 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 64024 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | | |
| 64025 | __ret = __noswap_vcombine_u16(__rev0, __noswap_vsubhn_u32(__rev1, __rev2)); | | |
| 64026 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 64027 | return __ret; | 63124 | return __ret; |
| 64028 | } | 63125 | } |
| 64029 | #endif | 63126 | __ai __attribute__((target("bf16"))) int32x2_t vreinterpret_s32_bf16(bfloat16x4_t __p0) { |
| 64030 | | 63127 | int32x2_t __ret; |
| 64031 | #ifdef __LITTLE_ENDIAN__ | 63128 | __ret = (int32x2_t)(__p0); |
| 64032 | __ai uint32x4_t vsubhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | | |
| 64033 | uint32x4_t __ret; | | |
| 64034 | __ret = vcombine_u32(__p0, vsubhn_u64(__p1, __p2)); | | |
| 64035 | return __ret; | 63129 | return __ret; |
| 64036 | } | 63130 | } |
| 64037 | #else | 63131 | __ai __attribute__((target("bf16"))) int64x1_t vreinterpret_s64_bf16(bfloat16x4_t __p0) { |
| 64038 | __ai uint32x4_t vsubhn_high_u64(uint32x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { | 63132 | int64x1_t __ret; |
| 64039 | uint32x4_t __ret; | 63133 | __ret = (int64x1_t)(__p0); |
| 64040 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 63134 | return __ret; |
| 64041 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 63135 | } |
| 64042 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 63136 | __ai __attribute__((target("bf16"))) int16x4_t vreinterpret_s16_bf16(bfloat16x4_t __p0) { |
| 64043 | __ret = __noswap_vcombine_u32(__rev0, __noswap_vsubhn_u64(__rev1, __rev2)); | 63137 | int16x4_t __ret; |
| 64044 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 63138 | __ret = (int16x4_t)(__p0); |
| | 63139 | return __ret; |
| | 63140 | } |
| | 63141 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_p8(poly8x16_t __p0) { |
| | 63142 | bfloat16x8_t __ret; |
| | 63143 | __ret = (bfloat16x8_t)(__p0); |
| | 63144 | return __ret; |
| | 63145 | } |
| | 63146 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_p128(poly128_t __p0) { |
| | 63147 | bfloat16x8_t __ret; |
| | 63148 | __ret = (bfloat16x8_t)(__p0); |
| | 63149 | return __ret; |
| | 63150 | } |
| | 63151 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_p64(poly64x2_t __p0) { |
| | 63152 | bfloat16x8_t __ret; |
| | 63153 | __ret = (bfloat16x8_t)(__p0); |
| | 63154 | return __ret; |
| | 63155 | } |
| | 63156 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_p16(poly16x8_t __p0) { |
| | 63157 | bfloat16x8_t __ret; |
| | 63158 | __ret = (bfloat16x8_t)(__p0); |
| | 63159 | return __ret; |
| | 63160 | } |
| | 63161 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_u8(uint8x16_t __p0) { |
| | 63162 | bfloat16x8_t __ret; |
| | 63163 | __ret = (bfloat16x8_t)(__p0); |
| | 63164 | return __ret; |
| | 63165 | } |
| | 63166 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_u32(uint32x4_t __p0) { |
| | 63167 | bfloat16x8_t __ret; |
| | 63168 | __ret = (bfloat16x8_t)(__p0); |
| | 63169 | return __ret; |
| | 63170 | } |
| | 63171 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_u64(uint64x2_t __p0) { |
| | 63172 | bfloat16x8_t __ret; |
| | 63173 | __ret = (bfloat16x8_t)(__p0); |
| | 63174 | return __ret; |
| | 63175 | } |
| | 63176 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_u16(uint16x8_t __p0) { |
| | 63177 | bfloat16x8_t __ret; |
| | 63178 | __ret = (bfloat16x8_t)(__p0); |
| | 63179 | return __ret; |
| | 63180 | } |
| | 63181 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_s8(int8x16_t __p0) { |
| | 63182 | bfloat16x8_t __ret; |
| | 63183 | __ret = (bfloat16x8_t)(__p0); |
| | 63184 | return __ret; |
| | 63185 | } |
| | 63186 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_f64(float64x2_t __p0) { |
| | 63187 | bfloat16x8_t __ret; |
| | 63188 | __ret = (bfloat16x8_t)(__p0); |
| | 63189 | return __ret; |
| | 63190 | } |
| | 63191 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_f32(float32x4_t __p0) { |
| | 63192 | bfloat16x8_t __ret; |
| | 63193 | __ret = (bfloat16x8_t)(__p0); |
| | 63194 | return __ret; |
| | 63195 | } |
| | 63196 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_f16(float16x8_t __p0) { |
| | 63197 | bfloat16x8_t __ret; |
| | 63198 | __ret = (bfloat16x8_t)(__p0); |
| | 63199 | return __ret; |
| | 63200 | } |
| | 63201 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_s32(int32x4_t __p0) { |
| | 63202 | bfloat16x8_t __ret; |
| | 63203 | __ret = (bfloat16x8_t)(__p0); |
| | 63204 | return __ret; |
| | 63205 | } |
| | 63206 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_s64(int64x2_t __p0) { |
| | 63207 | bfloat16x8_t __ret; |
| | 63208 | __ret = (bfloat16x8_t)(__p0); |
| | 63209 | return __ret; |
| | 63210 | } |
| | 63211 | __ai __attribute__((target("bf16"))) bfloat16x8_t vreinterpretq_bf16_s16(int16x8_t __p0) { |
| | 63212 | bfloat16x8_t __ret; |
| | 63213 | __ret = (bfloat16x8_t)(__p0); |
| | 63214 | return __ret; |
| | 63215 | } |
| | 63216 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_p8(poly8x8_t __p0) { |
| | 63217 | bfloat16x4_t __ret; |
| | 63218 | __ret = (bfloat16x4_t)(__p0); |
| | 63219 | return __ret; |
| | 63220 | } |
| | 63221 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_p64(poly64x1_t __p0) { |
| | 63222 | bfloat16x4_t __ret; |
| | 63223 | __ret = (bfloat16x4_t)(__p0); |
| | 63224 | return __ret; |
| | 63225 | } |
| | 63226 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_p16(poly16x4_t __p0) { |
| | 63227 | bfloat16x4_t __ret; |
| | 63228 | __ret = (bfloat16x4_t)(__p0); |
| | 63229 | return __ret; |
| | 63230 | } |
| | 63231 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_u8(uint8x8_t __p0) { |
| | 63232 | bfloat16x4_t __ret; |
| | 63233 | __ret = (bfloat16x4_t)(__p0); |
| | 63234 | return __ret; |
| | 63235 | } |
| | 63236 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_u32(uint32x2_t __p0) { |
| | 63237 | bfloat16x4_t __ret; |
| | 63238 | __ret = (bfloat16x4_t)(__p0); |
| | 63239 | return __ret; |
| | 63240 | } |
| | 63241 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_u64(uint64x1_t __p0) { |
| | 63242 | bfloat16x4_t __ret; |
| | 63243 | __ret = (bfloat16x4_t)(__p0); |
| | 63244 | return __ret; |
| | 63245 | } |
| | 63246 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_u16(uint16x4_t __p0) { |
| | 63247 | bfloat16x4_t __ret; |
| | 63248 | __ret = (bfloat16x4_t)(__p0); |
| | 63249 | return __ret; |
| | 63250 | } |
| | 63251 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_s8(int8x8_t __p0) { |
| | 63252 | bfloat16x4_t __ret; |
| | 63253 | __ret = (bfloat16x4_t)(__p0); |
| | 63254 | return __ret; |
| | 63255 | } |
| | 63256 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_f64(float64x1_t __p0) { |
| | 63257 | bfloat16x4_t __ret; |
| | 63258 | __ret = (bfloat16x4_t)(__p0); |
| | 63259 | return __ret; |
| | 63260 | } |
| | 63261 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_f32(float32x2_t __p0) { |
| | 63262 | bfloat16x4_t __ret; |
| | 63263 | __ret = (bfloat16x4_t)(__p0); |
| | 63264 | return __ret; |
| | 63265 | } |
| | 63266 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_f16(float16x4_t __p0) { |
| | 63267 | bfloat16x4_t __ret; |
| | 63268 | __ret = (bfloat16x4_t)(__p0); |
| | 63269 | return __ret; |
| | 63270 | } |
| | 63271 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_s32(int32x2_t __p0) { |
| | 63272 | bfloat16x4_t __ret; |
| | 63273 | __ret = (bfloat16x4_t)(__p0); |
| | 63274 | return __ret; |
| | 63275 | } |
| | 63276 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_s64(int64x1_t __p0) { |
| | 63277 | bfloat16x4_t __ret; |
| | 63278 | __ret = (bfloat16x4_t)(__p0); |
| | 63279 | return __ret; |
| | 63280 | } |
| | 63281 | __ai __attribute__((target("bf16"))) bfloat16x4_t vreinterpret_bf16_s16(int16x4_t __p0) { |
| | 63282 | bfloat16x4_t __ret; |
| | 63283 | __ret = (bfloat16x4_t)(__p0); |
| 64045 | return __ret; | 63284 | return __ret; |
| 64046 | } | 63285 | } |
| | 63286 | #ifdef __LITTLE_ENDIAN__ |
| | 63287 | #define vdotq_laneq_u32(__p0_747, __p1_747, __p2_747, __p3_747) __extension__ ({ \ |
| | 63288 | uint32x4_t __ret_747; \ |
| | 63289 | uint32x4_t __s0_747 = __p0_747; \ |
| | 63290 | uint8x16_t __s1_747 = __p1_747; \ |
| | 63291 | uint8x16_t __s2_747 = __p2_747; \ |
| | 63292 | uint8x16_t __reint_747 = __s2_747; \ |
| | 63293 | uint32x4_t __reint1_747 = splatq_laneq_u32(*(uint32x4_t *) &__reint_747, __p3_747); \ |
| | 63294 | __ret_747 = vdotq_u32(__s0_747, __s1_747, *(uint8x16_t *) &__reint1_747); \ |
| | 63295 | __ret_747; \ |
| | 63296 | }) |
| | 63297 | #else |
| | 63298 | #define vdotq_laneq_u32(__p0_748, __p1_748, __p2_748, __p3_748) __extension__ ({ \ |
| | 63299 | uint32x4_t __ret_748; \ |
| | 63300 | uint32x4_t __s0_748 = __p0_748; \ |
| | 63301 | uint8x16_t __s1_748 = __p1_748; \ |
| | 63302 | uint8x16_t __s2_748 = __p2_748; \ |
| | 63303 | uint32x4_t __rev0_748; __rev0_748 = __builtin_shufflevector(__s0_748, __s0_748, 3, 2, 1, 0); \ |
| | 63304 | uint8x16_t __rev1_748; __rev1_748 = __builtin_shufflevector(__s1_748, __s1_748, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 63305 | uint8x16_t __rev2_748; __rev2_748 = __builtin_shufflevector(__s2_748, __s2_748, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 63306 | uint8x16_t __reint_748 = __rev2_748; \ |
| | 63307 | uint32x4_t __reint1_748 = __noswap_splatq_laneq_u32(*(uint32x4_t *) &__reint_748, __p3_748); \ |
| | 63308 | __ret_748 = __noswap_vdotq_u32(__rev0_748, __rev1_748, *(uint8x16_t *) &__reint1_748); \ |
| | 63309 | __ret_748 = __builtin_shufflevector(__ret_748, __ret_748, 3, 2, 1, 0); \ |
| | 63310 | __ret_748; \ |
| | 63311 | }) |
| 64047 | #endif | 63312 | #endif |
| 64048 | | 63313 | |
| 64049 | #ifdef __LITTLE_ENDIAN__ | 63314 | #ifdef __LITTLE_ENDIAN__ |
| 64050 | __ai uint8x16_t vsubhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { | 63315 | #define vdotq_laneq_s32(__p0_749, __p1_749, __p2_749, __p3_749) __extension__ ({ \ |
| 64051 | uint8x16_t __ret; | 63316 | int32x4_t __ret_749; \ |
| 64052 | __ret = vcombine_u8(__p0, vsubhn_u16(__p1, __p2)); | 63317 | int32x4_t __s0_749 = __p0_749; \ |
| 64053 | return __ret; | 63318 | int8x16_t __s1_749 = __p1_749; \ |
| 64054 | } | 63319 | int8x16_t __s2_749 = __p2_749; \ |
| | 63320 | int8x16_t __reint_749 = __s2_749; \ |
| | 63321 | int32x4_t __reint1_749 = splatq_laneq_s32(*(int32x4_t *) &__reint_749, __p3_749); \ |
| | 63322 | __ret_749 = vdotq_s32(__s0_749, __s1_749, *(int8x16_t *) &__reint1_749); \ |
| | 63323 | __ret_749; \ |
| | 63324 | }) |
| | 63325 | #else |
| | 63326 | #define vdotq_laneq_s32(__p0_750, __p1_750, __p2_750, __p3_750) __extension__ ({ \ |
| | 63327 | int32x4_t __ret_750; \ |
| | 63328 | int32x4_t __s0_750 = __p0_750; \ |
| | 63329 | int8x16_t __s1_750 = __p1_750; \ |
| | 63330 | int8x16_t __s2_750 = __p2_750; \ |
| | 63331 | int32x4_t __rev0_750; __rev0_750 = __builtin_shufflevector(__s0_750, __s0_750, 3, 2, 1, 0); \ |
| | 63332 | int8x16_t __rev1_750; __rev1_750 = __builtin_shufflevector(__s1_750, __s1_750, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 63333 | int8x16_t __rev2_750; __rev2_750 = __builtin_shufflevector(__s2_750, __s2_750, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 63334 | int8x16_t __reint_750 = __rev2_750; \ |
| | 63335 | int32x4_t __reint1_750 = __noswap_splatq_laneq_s32(*(int32x4_t *) &__reint_750, __p3_750); \ |
| | 63336 | __ret_750 = __noswap_vdotq_s32(__rev0_750, __rev1_750, *(int8x16_t *) &__reint1_750); \ |
| | 63337 | __ret_750 = __builtin_shufflevector(__ret_750, __ret_750, 3, 2, 1, 0); \ |
| | 63338 | __ret_750; \ |
| | 63339 | }) |
| | 63340 | #endif |
| | 63341 | |
| | 63342 | #ifdef __LITTLE_ENDIAN__ |
| | 63343 | #define vdot_laneq_u32(__p0_751, __p1_751, __p2_751, __p3_751) __extension__ ({ \ |
| | 63344 | uint32x2_t __ret_751; \ |
| | 63345 | uint32x2_t __s0_751 = __p0_751; \ |
| | 63346 | uint8x8_t __s1_751 = __p1_751; \ |
| | 63347 | uint8x16_t __s2_751 = __p2_751; \ |
| | 63348 | uint8x16_t __reint_751 = __s2_751; \ |
| | 63349 | uint32x2_t __reint1_751 = splat_laneq_u32(*(uint32x4_t *) &__reint_751, __p3_751); \ |
| | 63350 | __ret_751 = vdot_u32(__s0_751, __s1_751, *(uint8x8_t *) &__reint1_751); \ |
| | 63351 | __ret_751; \ |
| | 63352 | }) |
| 64055 | #else | 63353 | #else |
| 64056 | __ai uint8x16_t vsubhn_high_u16(uint8x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { | 63354 | #define vdot_laneq_u32(__p0_752, __p1_752, __p2_752, __p3_752) __extension__ ({ \ |
| 64057 | uint8x16_t __ret; | 63355 | uint32x2_t __ret_752; \ |
| 64058 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 63356 | uint32x2_t __s0_752 = __p0_752; \ |
| 64059 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 63357 | uint8x8_t __s1_752 = __p1_752; \ |
| 64060 | uint16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 63358 | uint8x16_t __s2_752 = __p2_752; \ |
| 64061 | __ret = __noswap_vcombine_u8(__rev0, __noswap_vsubhn_u16(__rev1, __rev2)); | 63359 | uint32x2_t __rev0_752; __rev0_752 = __builtin_shufflevector(__s0_752, __s0_752, 1, 0); \ |
| 64062 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 63360 | uint8x8_t __rev1_752; __rev1_752 = __builtin_shufflevector(__s1_752, __s1_752, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64063 | return __ret; | 63361 | uint8x16_t __rev2_752; __rev2_752 = __builtin_shufflevector(__s2_752, __s2_752, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64064 | } | 63362 | uint8x16_t __reint_752 = __rev2_752; \ |
| | 63363 | uint32x2_t __reint1_752 = __noswap_splat_laneq_u32(*(uint32x4_t *) &__reint_752, __p3_752); \ |
| | 63364 | __ret_752 = __noswap_vdot_u32(__rev0_752, __rev1_752, *(uint8x8_t *) &__reint1_752); \ |
| | 63365 | __ret_752 = __builtin_shufflevector(__ret_752, __ret_752, 1, 0); \ |
| | 63366 | __ret_752; \ |
| | 63367 | }) |
| 64065 | #endif | 63368 | #endif |
| 64066 | | 63369 | |
| 64067 | #ifdef __LITTLE_ENDIAN__ | 63370 | #ifdef __LITTLE_ENDIAN__ |
| 64068 | __ai int16x8_t vsubhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 63371 | #define vdot_laneq_s32(__p0_753, __p1_753, __p2_753, __p3_753) __extension__ ({ \ |
| 64069 | int16x8_t __ret; | 63372 | int32x2_t __ret_753; \ |
| 64070 | __ret = vcombine_s16(__p0, vsubhn_s32(__p1, __p2)); | 63373 | int32x2_t __s0_753 = __p0_753; \ |
| 64071 | return __ret; | 63374 | int8x8_t __s1_753 = __p1_753; \ |
| 64072 | } | 63375 | int8x16_t __s2_753 = __p2_753; \ |
| | 63376 | int8x16_t __reint_753 = __s2_753; \ |
| | 63377 | int32x2_t __reint1_753 = splat_laneq_s32(*(int32x4_t *) &__reint_753, __p3_753); \ |
| | 63378 | __ret_753 = vdot_s32(__s0_753, __s1_753, *(int8x8_t *) &__reint1_753); \ |
| | 63379 | __ret_753; \ |
| | 63380 | }) |
| 64073 | #else | 63381 | #else |
| 64074 | __ai int16x8_t vsubhn_high_s32(int16x4_t __p0, int32x4_t __p1, int32x4_t __p2) { | 63382 | #define vdot_laneq_s32(__p0_754, __p1_754, __p2_754, __p3_754) __extension__ ({ \ |
| 64075 | int16x8_t __ret; | 63383 | int32x2_t __ret_754; \ |
| 64076 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 63384 | int32x2_t __s0_754 = __p0_754; \ |
| 64077 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 63385 | int8x8_t __s1_754 = __p1_754; \ |
| 64078 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 63386 | int8x16_t __s2_754 = __p2_754; \ |
| 64079 | __ret = __noswap_vcombine_s16(__rev0, __noswap_vsubhn_s32(__rev1, __rev2)); | 63387 | int32x2_t __rev0_754; __rev0_754 = __builtin_shufflevector(__s0_754, __s0_754, 1, 0); \ |
| 64080 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 63388 | int8x8_t __rev1_754; __rev1_754 = __builtin_shufflevector(__s1_754, __s1_754, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64081 | return __ret; | 63389 | int8x16_t __rev2_754; __rev2_754 = __builtin_shufflevector(__s2_754, __s2_754, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64082 | } | 63390 | int8x16_t __reint_754 = __rev2_754; \ |
| | 63391 | int32x2_t __reint1_754 = __noswap_splat_laneq_s32(*(int32x4_t *) &__reint_754, __p3_754); \ |
| | 63392 | __ret_754 = __noswap_vdot_s32(__rev0_754, __rev1_754, *(int8x8_t *) &__reint1_754); \ |
| | 63393 | __ret_754 = __builtin_shufflevector(__ret_754, __ret_754, 1, 0); \ |
| | 63394 | __ret_754; \ |
| | 63395 | }) |
| 64083 | #endif | 63396 | #endif |
| 64084 | | 63397 | |
| 64085 | #ifdef __LITTLE_ENDIAN__ | 63398 | #ifdef __LITTLE_ENDIAN__ |
| 64086 | __ai int32x4_t vsubhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { | 63399 | __ai __attribute__((target("fp16fml"))) float32x4_t vfmlalq_high_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 64087 | int32x4_t __ret; | 63400 | float32x4_t __ret; |
| 64088 | __ret = vcombine_s32(__p0, vsubhn_s64(__p1, __p2)); | 63401 | __ret = (float32x4_t) __builtin_neon_vfmlalq_high_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 64089 | return __ret; | 63402 | return __ret; |
| 64090 | } | 63403 | } |
| 64091 | #else | 63404 | #else |
| 64092 | __ai int32x4_t vsubhn_high_s64(int32x2_t __p0, int64x2_t __p1, int64x2_t __p2) { | 63405 | __ai __attribute__((target("fp16fml"))) float32x4_t vfmlalq_high_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 64093 | int32x4_t __ret; | 63406 | float32x4_t __ret; |
| 64094 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 63407 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 64095 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 63408 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64096 | int64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); | 63409 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64097 | __ret = __noswap_vcombine_s32(__rev0, __noswap_vsubhn_s64(__rev1, __rev2)); | 63410 | __ret = (float32x4_t) __builtin_neon_vfmlalq_high_f16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); |
| 64098 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 63411 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 64099 | return __ret; | 63412 | return __ret; |
| 64100 | } | 63413 | } |
| | 63414 | __ai __attribute__((target("fp16fml"))) float32x4_t __noswap_vfmlalq_high_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| | 63415 | float32x4_t __ret; |
| | 63416 | __ret = (float32x4_t) __builtin_neon_vfmlalq_high_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| | 63417 | return __ret; |
| | 63418 | } |
| 64101 | #endif | 63419 | #endif |
| 64102 | | 63420 | |
| 64103 | #ifdef __LITTLE_ENDIAN__ | 63421 | #ifdef __LITTLE_ENDIAN__ |
| 64104 | __ai int8x16_t vsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 63422 | __ai __attribute__((target("fp16fml"))) float32x2_t vfmlal_high_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 64105 | int8x16_t __ret; | 63423 | float32x2_t __ret; |
| 64106 | __ret = vcombine_s8(__p0, vsubhn_s16(__p1, __p2)); | 63424 | __ret = (float32x2_t) __builtin_neon_vfmlal_high_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 64107 | return __ret; | 63425 | return __ret; |
| 64108 | } | 63426 | } |
| 64109 | #else | 63427 | #else |
| 64110 | __ai int8x16_t vsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | 63428 | __ai __attribute__((target("fp16fml"))) float32x2_t vfmlal_high_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 64111 | int8x16_t __ret; | 63429 | float32x2_t __ret; |
| 64112 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 63430 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 64113 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 63431 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 64114 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); | 63432 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 64115 | __ret = __noswap_vcombine_s8(__rev0, __noswap_vsubhn_s16(__rev1, __rev2)); | 63433 | __ret = (float32x2_t) __builtin_neon_vfmlal_high_f16((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); |
| 64116 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 63434 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 63435 | return __ret; |
| | 63436 | } |
| | 63437 | __ai __attribute__((target("fp16fml"))) float32x2_t __noswap_vfmlal_high_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| | 63438 | float32x2_t __ret; |
| | 63439 | __ret = (float32x2_t) __builtin_neon_vfmlal_high_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 64117 | return __ret; | 63440 | return __ret; |
| 64118 | } | 63441 | } |
| 64119 | #endif | 63442 | #endif |
| 64120 | | 63443 | |
| 64121 | #ifdef __LITTLE_ENDIAN__ | 63444 | #ifdef __LITTLE_ENDIAN__ |
| 64122 | __ai uint16x8_t vsubl_high_u8(uint8x16_t __p0, uint8x16_t __p1) { | 63445 | __ai __attribute__((target("fp16fml"))) float32x4_t vfmlalq_low_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 64123 | uint16x8_t __ret; | 63446 | float32x4_t __ret; |
| 64124 | __ret = vmovl_high_u8(__p0) - vmovl_high_u8(__p1); | 63447 | __ret = (float32x4_t) __builtin_neon_vfmlalq_low_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 64125 | return __ret; | 63448 | return __ret; |
| 64126 | } | 63449 | } |
| 64127 | #else | 63450 | #else |
| 64128 | __ai uint16x8_t vsubl_high_u8(uint8x16_t __p0, uint8x16_t __p1) { | 63451 | __ai __attribute__((target("fp16fml"))) float32x4_t vfmlalq_low_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 64129 | uint16x8_t __ret; | 63452 | float32x4_t __ret; |
| 64130 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 63453 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 64131 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 63454 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64132 | __ret = __noswap_vmovl_high_u8(__rev0) - __noswap_vmovl_high_u8(__rev1); | 63455 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64133 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 63456 | __ret = (float32x4_t) __builtin_neon_vfmlalq_low_f16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); |
| | 63457 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 63458 | return __ret; |
| | 63459 | } |
| | 63460 | __ai __attribute__((target("fp16fml"))) float32x4_t __noswap_vfmlalq_low_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| | 63461 | float32x4_t __ret; |
| | 63462 | __ret = (float32x4_t) __builtin_neon_vfmlalq_low_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 64134 | return __ret; | 63463 | return __ret; |
| 64135 | } | 63464 | } |
| 64136 | #endif | 63465 | #endif |
| 64137 | | 63466 | |
| 64138 | #ifdef __LITTLE_ENDIAN__ | 63467 | #ifdef __LITTLE_ENDIAN__ |
| 64139 | __ai uint64x2_t vsubl_high_u32(uint32x4_t __p0, uint32x4_t __p1) { | 63468 | __ai __attribute__((target("fp16fml"))) float32x2_t vfmlal_low_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 64140 | uint64x2_t __ret; | 63469 | float32x2_t __ret; |
| 64141 | __ret = vmovl_high_u32(__p0) - vmovl_high_u32(__p1); | 63470 | __ret = (float32x2_t) __builtin_neon_vfmlal_low_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 64142 | return __ret; | 63471 | return __ret; |
| 64143 | } | 63472 | } |
| 64144 | #else | 63473 | #else |
| 64145 | __ai uint64x2_t vsubl_high_u32(uint32x4_t __p0, uint32x4_t __p1) { | 63474 | __ai __attribute__((target("fp16fml"))) float32x2_t vfmlal_low_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 64146 | uint64x2_t __ret; | 63475 | float32x2_t __ret; |
| 64147 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 63476 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 64148 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 63477 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 64149 | __ret = __noswap_vmovl_high_u32(__rev0) - __noswap_vmovl_high_u32(__rev1); | 63478 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 63479 | __ret = (float32x2_t) __builtin_neon_vfmlal_low_f16((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); |
| 64150 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 63480 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 64151 | return __ret; | 63481 | return __ret; |
| 64152 | } | 63482 | } |
| | 63483 | __ai __attribute__((target("fp16fml"))) float32x2_t __noswap_vfmlal_low_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| | 63484 | float32x2_t __ret; |
| | 63485 | __ret = (float32x2_t) __builtin_neon_vfmlal_low_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| | 63486 | return __ret; |
| | 63487 | } |
| 64153 | #endif | 63488 | #endif |
| 64154 | | 63489 | |
| 64155 | #ifdef __LITTLE_ENDIAN__ | 63490 | #ifdef __LITTLE_ENDIAN__ |
| 64156 | __ai uint32x4_t vsubl_high_u16(uint16x8_t __p0, uint16x8_t __p1) { | 63491 | __ai __attribute__((target("fp16fml"))) float32x4_t vfmlslq_high_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 64157 | uint32x4_t __ret; | 63492 | float32x4_t __ret; |
| 64158 | __ret = vmovl_high_u16(__p0) - vmovl_high_u16(__p1); | 63493 | __ret = (float32x4_t) __builtin_neon_vfmlslq_high_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 64159 | return __ret; | 63494 | return __ret; |
| 64160 | } | 63495 | } |
| 64161 | #else | 63496 | #else |
| 64162 | __ai uint32x4_t vsubl_high_u16(uint16x8_t __p0, uint16x8_t __p1) { | 63497 | __ai __attribute__((target("fp16fml"))) float32x4_t vfmlslq_high_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 64163 | uint32x4_t __ret; | 63498 | float32x4_t __ret; |
| 64164 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 63499 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 64165 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 63500 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64166 | __ret = __noswap_vmovl_high_u16(__rev0) - __noswap_vmovl_high_u16(__rev1); | 63501 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 63502 | __ret = (float32x4_t) __builtin_neon_vfmlslq_high_f16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); |
| 64167 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 63503 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 64168 | return __ret; | 63504 | return __ret; |
| 64169 | } | 63505 | } |
| 64170 | #endif | 63506 | __ai __attribute__((target("fp16fml"))) float32x4_t __noswap_vfmlslq_high_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 64171 | | 63507 | float32x4_t __ret; |
| 64172 | #ifdef __LITTLE_ENDIAN__ | 63508 | __ret = (float32x4_t) __builtin_neon_vfmlslq_high_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 64173 | __ai int16x8_t vsubl_high_s8(int8x16_t __p0, int8x16_t __p1) { | | |
| 64174 | int16x8_t __ret; | | |
| 64175 | __ret = vmovl_high_s8(__p0) - vmovl_high_s8(__p1); | | |
| 64176 | return __ret; | | |
| 64177 | } | | |
| 64178 | #else | | |
| 64179 | __ai int16x8_t vsubl_high_s8(int8x16_t __p0, int8x16_t __p1) { | | |
| 64180 | int16x8_t __ret; | | |
| 64181 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 64182 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 64183 | __ret = __noswap_vmovl_high_s8(__rev0) - __noswap_vmovl_high_s8(__rev1); | | |
| 64184 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 64185 | return __ret; | 63509 | return __ret; |
| 64186 | } | 63510 | } |
| 64187 | #endif | 63511 | #endif |
| 64188 | | 63512 | |
| 64189 | #ifdef __LITTLE_ENDIAN__ | 63513 | #ifdef __LITTLE_ENDIAN__ |
| 64190 | __ai int64x2_t vsubl_high_s32(int32x4_t __p0, int32x4_t __p1) { | 63514 | __ai __attribute__((target("fp16fml"))) float32x2_t vfmlsl_high_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 64191 | int64x2_t __ret; | 63515 | float32x2_t __ret; |
| 64192 | __ret = vmovl_high_s32(__p0) - vmovl_high_s32(__p1); | 63516 | __ret = (float32x2_t) __builtin_neon_vfmlsl_high_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 64193 | return __ret; | 63517 | return __ret; |
| 64194 | } | 63518 | } |
| 64195 | #else | 63519 | #else |
| 64196 | __ai int64x2_t vsubl_high_s32(int32x4_t __p0, int32x4_t __p1) { | 63520 | __ai __attribute__((target("fp16fml"))) float32x2_t vfmlsl_high_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 64197 | int64x2_t __ret; | 63521 | float32x2_t __ret; |
| 64198 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 63522 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 64199 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 63523 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 64200 | __ret = __noswap_vmovl_high_s32(__rev0) - __noswap_vmovl_high_s32(__rev1); | 63524 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 63525 | __ret = (float32x2_t) __builtin_neon_vfmlsl_high_f16((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); |
| 64201 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 63526 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 64202 | return __ret; | 63527 | return __ret; |
| 64203 | } | 63528 | } |
| | 63529 | __ai __attribute__((target("fp16fml"))) float32x2_t __noswap_vfmlsl_high_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| | 63530 | float32x2_t __ret; |
| | 63531 | __ret = (float32x2_t) __builtin_neon_vfmlsl_high_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| | 63532 | return __ret; |
| | 63533 | } |
| 64204 | #endif | 63534 | #endif |
| 64205 | | 63535 | |
| 64206 | #ifdef __LITTLE_ENDIAN__ | 63536 | #ifdef __LITTLE_ENDIAN__ |
| 64207 | __ai int32x4_t vsubl_high_s16(int16x8_t __p0, int16x8_t __p1) { | 63537 | __ai __attribute__((target("fp16fml"))) float32x4_t vfmlslq_low_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 64208 | int32x4_t __ret; | 63538 | float32x4_t __ret; |
| 64209 | __ret = vmovl_high_s16(__p0) - vmovl_high_s16(__p1); | 63539 | __ret = (float32x4_t) __builtin_neon_vfmlslq_low_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 64210 | return __ret; | 63540 | return __ret; |
| 64211 | } | 63541 | } |
| 64212 | #else | 63542 | #else |
| 64213 | __ai int32x4_t vsubl_high_s16(int16x8_t __p0, int16x8_t __p1) { | 63543 | __ai __attribute__((target("fp16fml"))) float32x4_t vfmlslq_low_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 64214 | int32x4_t __ret; | 63544 | float32x4_t __ret; |
| 64215 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 63545 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 64216 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 63546 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64217 | __ret = __noswap_vmovl_high_s16(__rev0) - __noswap_vmovl_high_s16(__rev1); | 63547 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 63548 | __ret = (float32x4_t) __builtin_neon_vfmlslq_low_f16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 41); |
| 64218 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 63549 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 64219 | return __ret; | 63550 | return __ret; |
| 64220 | } | 63551 | } |
| | 63552 | __ai __attribute__((target("fp16fml"))) float32x4_t __noswap_vfmlslq_low_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| | 63553 | float32x4_t __ret; |
| | 63554 | __ret = (float32x4_t) __builtin_neon_vfmlslq_low_f16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| | 63555 | return __ret; |
| | 63556 | } |
| 64221 | #endif | 63557 | #endif |
| 64222 | | 63558 | |
| 64223 | #ifdef __LITTLE_ENDIAN__ | 63559 | #ifdef __LITTLE_ENDIAN__ |
| 64224 | __ai uint16x8_t vsubw_high_u8(uint16x8_t __p0, uint8x16_t __p1) { | 63560 | __ai __attribute__((target("fp16fml"))) float32x2_t vfmlsl_low_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 64225 | uint16x8_t __ret; | 63561 | float32x2_t __ret; |
| 64226 | __ret = __p0 - vmovl_high_u8(__p1); | 63562 | __ret = (float32x2_t) __builtin_neon_vfmlsl_low_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 64227 | return __ret; | 63563 | return __ret; |
| 64228 | } | 63564 | } |
| 64229 | #else | 63565 | #else |
| 64230 | __ai uint16x8_t vsubw_high_u8(uint16x8_t __p0, uint8x16_t __p1) { | 63566 | __ai __attribute__((target("fp16fml"))) float32x2_t vfmlsl_low_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 64231 | uint16x8_t __ret; | 63567 | float32x2_t __ret; |
| 64232 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 63568 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 64233 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 63569 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 64234 | __ret = __rev0 - __noswap_vmovl_high_u8(__rev1); | 63570 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 64235 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 63571 | __ret = (float32x2_t) __builtin_neon_vfmlsl_low_f16((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 9); |
| | 63572 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 63573 | return __ret; |
| | 63574 | } |
| | 63575 | __ai __attribute__((target("fp16fml"))) float32x2_t __noswap_vfmlsl_low_f16(float32x2_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| | 63576 | float32x2_t __ret; |
| | 63577 | __ret = (float32x2_t) __builtin_neon_vfmlsl_low_f16((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 64236 | return __ret; | 63578 | return __ret; |
| 64237 | } | 63579 | } |
| 64238 | #endif | 63580 | #endif |
| 64239 | | 63581 | |
| 64240 | #ifdef __LITTLE_ENDIAN__ | 63582 | #ifdef __LITTLE_ENDIAN__ |
| 64241 | __ai uint64x2_t vsubw_high_u32(uint64x2_t __p0, uint32x4_t __p1) { | 63583 | __ai __attribute__((target("fullfp16"))) float16x8_t vdivq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 64242 | uint64x2_t __ret; | 63584 | float16x8_t __ret; |
| 64243 | __ret = __p0 - vmovl_high_u32(__p1); | 63585 | __ret = __p0 / __p1; |
| 64244 | return __ret; | 63586 | return __ret; |
| 64245 | } | 63587 | } |
| 64246 | #else | 63588 | #else |
| 64247 | __ai uint64x2_t vsubw_high_u32(uint64x2_t __p0, uint32x4_t __p1) { | 63589 | __ai __attribute__((target("fullfp16"))) float16x8_t vdivq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 64248 | uint64x2_t __ret; | 63590 | float16x8_t __ret; |
| 64249 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 63591 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64250 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 63592 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64251 | __ret = __rev0 - __noswap_vmovl_high_u32(__rev1); | 63593 | __ret = __rev0 / __rev1; |
| 64252 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 63594 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64253 | return __ret; | 63595 | return __ret; |
| 64254 | } | 63596 | } |
| 64255 | #endif | 63597 | #endif |
| 64256 | | 63598 | |
| 64257 | #ifdef __LITTLE_ENDIAN__ | 63599 | #ifdef __LITTLE_ENDIAN__ |
| 64258 | __ai uint32x4_t vsubw_high_u16(uint32x4_t __p0, uint16x8_t __p1) { | 63600 | __ai __attribute__((target("fullfp16"))) float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { |
| 64259 | uint32x4_t __ret; | 63601 | float16x4_t __ret; |
| 64260 | __ret = __p0 - vmovl_high_u16(__p1); | 63602 | __ret = __p0 / __p1; |
| 64261 | return __ret; | 63603 | return __ret; |
| 64262 | } | 63604 | } |
| 64263 | #else | 63605 | #else |
| 64264 | __ai uint32x4_t vsubw_high_u16(uint32x4_t __p0, uint16x8_t __p1) { | 63606 | __ai __attribute__((target("fullfp16"))) float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { |
| 64265 | uint32x4_t __ret; | 63607 | float16x4_t __ret; |
| 64266 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 63608 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 64267 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 63609 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 64268 | __ret = __rev0 - __noswap_vmovl_high_u16(__rev1); | 63610 | __ret = __rev0 / __rev1; |
| 64269 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 63611 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 64270 | return __ret; | 63612 | return __ret; |
| 64271 | } | 63613 | } |
| 64272 | #endif | 63614 | #endif |
| 64273 | | 63615 | |
| 64274 | #ifdef __LITTLE_ENDIAN__ | 63616 | #ifdef __LITTLE_ENDIAN__ |
| 64275 | __ai int16x8_t vsubw_high_s8(int16x8_t __p0, int8x16_t __p1) { | 63617 | #define vduph_lane_f16(__p0, __p1) __extension__ ({ \ |
| 64276 | int16x8_t __ret; | 63618 | float16_t __ret; \ |
| 64277 | __ret = __p0 - vmovl_high_s8(__p1); | 63619 | float16x4_t __s0 = __p0; \ |
| 64278 | return __ret; | 63620 | __ret = (float16_t) __builtin_neon_vduph_lane_f16((float16x4_t)__s0, __p1); \ |
| 64279 | } | 63621 | __ret; \ |
| | 63622 | }) |
| 64280 | #else | 63623 | #else |
| 64281 | __ai int16x8_t vsubw_high_s8(int16x8_t __p0, int8x16_t __p1) { | 63624 | #define vduph_lane_f16(__p0, __p1) __extension__ ({ \ |
| 64282 | int16x8_t __ret; | 63625 | float16_t __ret; \ |
| 64283 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 63626 | float16x4_t __s0 = __p0; \ |
| 64284 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 63627 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 64285 | __ret = __rev0 - __noswap_vmovl_high_s8(__rev1); | 63628 | __ret = (float16_t) __builtin_neon_vduph_lane_f16((float16x4_t)__rev0, __p1); \ |
| 64286 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 63629 | __ret; \ |
| 64287 | return __ret; | 63630 | }) |
| 64288 | } | | |
| 64289 | #endif | 63631 | #endif |
| 64290 | | 63632 | |
| 64291 | #ifdef __LITTLE_ENDIAN__ | 63633 | #ifdef __LITTLE_ENDIAN__ |
| 64292 | __ai int64x2_t vsubw_high_s32(int64x2_t __p0, int32x4_t __p1) { | 63634 | #define vduph_laneq_f16(__p0, __p1) __extension__ ({ \ |
| 64293 | int64x2_t __ret; | 63635 | float16_t __ret; \ |
| 64294 | __ret = __p0 - vmovl_high_s32(__p1); | 63636 | float16x8_t __s0 = __p0; \ |
| 64295 | return __ret; | 63637 | __ret = (float16_t) __builtin_neon_vduph_laneq_f16((float16x8_t)__s0, __p1); \ |
| 64296 | } | 63638 | __ret; \ |
| | 63639 | }) |
| 64297 | #else | 63640 | #else |
| 64298 | __ai int64x2_t vsubw_high_s32(int64x2_t __p0, int32x4_t __p1) { | 63641 | #define vduph_laneq_f16(__p0, __p1) __extension__ ({ \ |
| 64299 | int64x2_t __ret; | 63642 | float16_t __ret; \ |
| 64300 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 63643 | float16x8_t __s0 = __p0; \ |
| 64301 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 63644 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64302 | __ret = __rev0 - __noswap_vmovl_high_s32(__rev1); | 63645 | __ret = (float16_t) __builtin_neon_vduph_laneq_f16((float16x8_t)__rev0, __p1); \ |
| 64303 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 63646 | __ret; \ |
| 64304 | return __ret; | 63647 | }) |
| 64305 | } | | |
| 64306 | #endif | 63648 | #endif |
| 64307 | | 63649 | |
| 64308 | #ifdef __LITTLE_ENDIAN__ | 63650 | #ifdef __LITTLE_ENDIAN__ |
| 64309 | __ai int32x4_t vsubw_high_s16(int32x4_t __p0, int16x8_t __p1) { | 63651 | #define vfmah_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 64310 | int32x4_t __ret; | 63652 | float16_t __ret; \ |
| 64311 | __ret = __p0 - vmovl_high_s16(__p1); | 63653 | float16_t __s0 = __p0; \ |
| 64312 | return __ret; | 63654 | float16_t __s1 = __p1; \ |
| 64313 | } | 63655 | float16x4_t __s2 = __p2; \ |
| | 63656 | __ret = (float16_t) __builtin_neon_vfmah_lane_f16(__s0, __s1, (float16x4_t)__s2, __p3); \ |
| | 63657 | __ret; \ |
| | 63658 | }) |
| 64314 | #else | 63659 | #else |
| 64315 | __ai int32x4_t vsubw_high_s16(int32x4_t __p0, int16x8_t __p1) { | 63660 | #define vfmah_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 64316 | int32x4_t __ret; | 63661 | float16_t __ret; \ |
| 64317 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 63662 | float16_t __s0 = __p0; \ |
| 64318 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 63663 | float16_t __s1 = __p1; \ |
| 64319 | __ret = __rev0 - __noswap_vmovl_high_s16(__rev1); | 63664 | float16x4_t __s2 = __p2; \ |
| 64320 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 63665 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| 64321 | return __ret; | 63666 | __ret = (float16_t) __builtin_neon_vfmah_lane_f16(__s0, __s1, (float16x4_t)__rev2, __p3); \ |
| 64322 | } | 63667 | __ret; \ |
| | 63668 | }) |
| | 63669 | #define __noswap_vfmah_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 63670 | float16_t __ret; \ |
| | 63671 | float16_t __s0 = __p0; \ |
| | 63672 | float16_t __s1 = __p1; \ |
| | 63673 | float16x4_t __s2 = __p2; \ |
| | 63674 | __ret = (float16_t) __builtin_neon_vfmah_lane_f16(__s0, __s1, (float16x4_t)__s2, __p3); \ |
| | 63675 | __ret; \ |
| | 63676 | }) |
| 64323 | #endif | 63677 | #endif |
| 64324 | | 63678 | |
| 64325 | #ifdef __LITTLE_ENDIAN__ | 63679 | #ifdef __LITTLE_ENDIAN__ |
| 64326 | #define vsudotq_laneq_s32(__p0_843, __p1_843, __p2_843, __p3_843) __extension__ ({ \ | 63680 | #define vfmaq_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 64327 | int32x4_t __ret_843; \ | 63681 | float16x8_t __ret; \ |
| 64328 | int32x4_t __s0_843 = __p0_843; \ | 63682 | float16x8_t __s0 = __p0; \ |
| 64329 | int8x16_t __s1_843 = __p1_843; \ | 63683 | float16x8_t __s1 = __p1; \ |
| 64330 | uint8x16_t __s2_843 = __p2_843; \ | 63684 | float16x4_t __s2 = __p2; \ |
| 64331 | uint8x16_t __reint_843 = __s2_843; \ | 63685 | __ret = (float16x8_t) __builtin_neon_vfmaq_lane_f16((int8x16_t)__s0, (int8x16_t)__s1, (int8x8_t)__s2, __p3, 40); \ |
| 64332 | __ret_843 = vusdotq_s32(__s0_843, (uint8x16_t)(splatq_laneq_s32(*(int32x4_t *) &__reint_843, __p3_843)), __s1_843); \ | 63686 | __ret; \ |
| 64333 | __ret_843; \ | | |
| 64334 | }) | 63687 | }) |
| 64335 | #else | 63688 | #else |
| 64336 | #define vsudotq_laneq_s32(__p0_844, __p1_844, __p2_844, __p3_844) __extension__ ({ \ | 63689 | #define vfmaq_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 64337 | int32x4_t __ret_844; \ | 63690 | float16x8_t __ret; \ |
| 64338 | int32x4_t __s0_844 = __p0_844; \ | 63691 | float16x8_t __s0 = __p0; \ |
| 64339 | int8x16_t __s1_844 = __p1_844; \ | 63692 | float16x8_t __s1 = __p1; \ |
| 64340 | uint8x16_t __s2_844 = __p2_844; \ | 63693 | float16x4_t __s2 = __p2; \ |
| 64341 | int32x4_t __rev0_844; __rev0_844 = __builtin_shufflevector(__s0_844, __s0_844, 3, 2, 1, 0); \ | 63694 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64342 | int8x16_t __rev1_844; __rev1_844 = __builtin_shufflevector(__s1_844, __s1_844, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 63695 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64343 | uint8x16_t __rev2_844; __rev2_844 = __builtin_shufflevector(__s2_844, __s2_844, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 63696 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| 64344 | uint8x16_t __reint_844 = __rev2_844; \ | 63697 | __ret = (float16x8_t) __builtin_neon_vfmaq_lane_f16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x8_t)__rev2, __p3, 40); \ |
| 64345 | __ret_844 = __noswap_vusdotq_s32(__rev0_844, (uint8x16_t)(__noswap_splatq_laneq_s32(*(int32x4_t *) &__reint_844, __p3_844)), __rev1_844); \ | 63698 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64346 | __ret_844 = __builtin_shufflevector(__ret_844, __ret_844, 3, 2, 1, 0); \ | 63699 | __ret; \ |
| 64347 | __ret_844; \ | 63700 | }) |
| | 63701 | #define __noswap_vfmaq_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 63702 | float16x8_t __ret; \ |
| | 63703 | float16x8_t __s0 = __p0; \ |
| | 63704 | float16x8_t __s1 = __p1; \ |
| | 63705 | float16x4_t __s2 = __p2; \ |
| | 63706 | __ret = (float16x8_t) __builtin_neon_vfmaq_lane_f16((int8x16_t)__s0, (int8x16_t)__s1, (int8x8_t)__s2, __p3, 40); \ |
| | 63707 | __ret; \ |
| 64348 | }) | 63708 | }) |
| 64349 | #endif | 63709 | #endif |
| 64350 | | 63710 | |
| 64351 | #ifdef __LITTLE_ENDIAN__ | 63711 | #ifdef __LITTLE_ENDIAN__ |
| 64352 | #define vsudot_laneq_s32(__p0_845, __p1_845, __p2_845, __p3_845) __extension__ ({ \ | 63712 | #define vfma_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 64353 | int32x2_t __ret_845; \ | 63713 | float16x4_t __ret; \ |
| 64354 | int32x2_t __s0_845 = __p0_845; \ | 63714 | float16x4_t __s0 = __p0; \ |
| 64355 | int8x8_t __s1_845 = __p1_845; \ | 63715 | float16x4_t __s1 = __p1; \ |
| 64356 | uint8x16_t __s2_845 = __p2_845; \ | 63716 | float16x4_t __s2 = __p2; \ |
| 64357 | uint8x16_t __reint_845 = __s2_845; \ | 63717 | __ret = (float16x4_t) __builtin_neon_vfma_lane_f16((int8x8_t)__s0, (int8x8_t)__s1, (int8x8_t)__s2, __p3, 8); \ |
| 64358 | __ret_845 = vusdot_s32(__s0_845, (uint8x8_t)(splat_laneq_s32(*(int32x4_t *) &__reint_845, __p3_845)), __s1_845); \ | 63718 | __ret; \ |
| 64359 | __ret_845; \ | | |
| 64360 | }) | 63719 | }) |
| 64361 | #else | 63720 | #else |
| 64362 | #define vsudot_laneq_s32(__p0_846, __p1_846, __p2_846, __p3_846) __extension__ ({ \ | 63721 | #define vfma_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 64363 | int32x2_t __ret_846; \ | 63722 | float16x4_t __ret; \ |
| 64364 | int32x2_t __s0_846 = __p0_846; \ | 63723 | float16x4_t __s0 = __p0; \ |
| 64365 | int8x8_t __s1_846 = __p1_846; \ | 63724 | float16x4_t __s1 = __p1; \ |
| 64366 | uint8x16_t __s2_846 = __p2_846; \ | 63725 | float16x4_t __s2 = __p2; \ |
| 64367 | int32x2_t __rev0_846; __rev0_846 = __builtin_shufflevector(__s0_846, __s0_846, 1, 0); \ | 63726 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 64368 | int8x8_t __rev1_846; __rev1_846 = __builtin_shufflevector(__s1_846, __s1_846, 7, 6, 5, 4, 3, 2, 1, 0); \ | 63727 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 64369 | uint8x16_t __rev2_846; __rev2_846 = __builtin_shufflevector(__s2_846, __s2_846, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 63728 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| 64370 | uint8x16_t __reint_846 = __rev2_846; \ | 63729 | __ret = (float16x4_t) __builtin_neon_vfma_lane_f16((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, __p3, 8); \ |
| 64371 | __ret_846 = __noswap_vusdot_s32(__rev0_846, (uint8x8_t)(__noswap_splat_laneq_s32(*(int32x4_t *) &__reint_846, __p3_846)), __rev1_846); \ | 63730 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 64372 | __ret_846 = __builtin_shufflevector(__ret_846, __ret_846, 1, 0); \ | 63731 | __ret; \ |
| 64373 | __ret_846; \ | 63732 | }) |
| | 63733 | #define __noswap_vfma_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 63734 | float16x4_t __ret; \ |
| | 63735 | float16x4_t __s0 = __p0; \ |
| | 63736 | float16x4_t __s1 = __p1; \ |
| | 63737 | float16x4_t __s2 = __p2; \ |
| | 63738 | __ret = (float16x4_t) __builtin_neon_vfma_lane_f16((int8x8_t)__s0, (int8x8_t)__s1, (int8x8_t)__s2, __p3, 8); \ |
| | 63739 | __ret; \ |
| 64374 | }) | 63740 | }) |
| 64375 | #endif | 63741 | #endif |
| 64376 | | 63742 | |
| 64377 | #ifdef __LITTLE_ENDIAN__ | 63743 | #ifdef __LITTLE_ENDIAN__ |
| 64378 | __ai poly8x8_t vtrn1_p8(poly8x8_t __p0, poly8x8_t __p1) { | 63744 | #define vfmah_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 64379 | poly8x8_t __ret; | 63745 | float16_t __ret; \ |
| 64380 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 2, 10, 4, 12, 6, 14); | 63746 | float16_t __s0 = __p0; \ |
| 64381 | return __ret; | 63747 | float16_t __s1 = __p1; \ |
| 64382 | } | 63748 | float16x8_t __s2 = __p2; \ |
| | 63749 | __ret = (float16_t) __builtin_neon_vfmah_laneq_f16(__s0, __s1, (float16x8_t)__s2, __p3); \ |
| | 63750 | __ret; \ |
| | 63751 | }) |
| 64383 | #else | 63752 | #else |
| 64384 | __ai poly8x8_t vtrn1_p8(poly8x8_t __p0, poly8x8_t __p1) { | 63753 | #define vfmah_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 64385 | poly8x8_t __ret; | 63754 | float16_t __ret; \ |
| 64386 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 63755 | float16_t __s0 = __p0; \ |
| 64387 | poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 63756 | float16_t __s1 = __p1; \ |
| 64388 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 2, 10, 4, 12, 6, 14); | 63757 | float16x8_t __s2 = __p2; \ |
| 64389 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 63758 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64390 | return __ret; | 63759 | __ret = (float16_t) __builtin_neon_vfmah_laneq_f16(__s0, __s1, (float16x8_t)__rev2, __p3); \ |
| 64391 | } | 63760 | __ret; \ |
| | 63761 | }) |
| | 63762 | #define __noswap_vfmah_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 63763 | float16_t __ret; \ |
| | 63764 | float16_t __s0 = __p0; \ |
| | 63765 | float16_t __s1 = __p1; \ |
| | 63766 | float16x8_t __s2 = __p2; \ |
| | 63767 | __ret = (float16_t) __builtin_neon_vfmah_laneq_f16(__s0, __s1, (float16x8_t)__s2, __p3); \ |
| | 63768 | __ret; \ |
| | 63769 | }) |
| 64392 | #endif | 63770 | #endif |
| 64393 | | 63771 | |
| 64394 | #ifdef __LITTLE_ENDIAN__ | 63772 | #ifdef __LITTLE_ENDIAN__ |
| 64395 | __ai poly16x4_t vtrn1_p16(poly16x4_t __p0, poly16x4_t __p1) { | 63773 | #define vfmaq_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 64396 | poly16x4_t __ret; | 63774 | float16x8_t __ret; \ |
| 64397 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 2, 6); | 63775 | float16x8_t __s0 = __p0; \ |
| 64398 | return __ret; | 63776 | float16x8_t __s1 = __p1; \ |
| 64399 | } | 63777 | float16x8_t __s2 = __p2; \ |
| | 63778 | __ret = (float16x8_t) __builtin_neon_vfmaq_laneq_f16((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 40); \ |
| | 63779 | __ret; \ |
| | 63780 | }) |
| 64400 | #else | 63781 | #else |
| 64401 | __ai poly16x4_t vtrn1_p16(poly16x4_t __p0, poly16x4_t __p1) { | 63782 | #define vfmaq_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 64402 | poly16x4_t __ret; | 63783 | float16x8_t __ret; \ |
| 64403 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 63784 | float16x8_t __s0 = __p0; \ |
| 64404 | poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 63785 | float16x8_t __s1 = __p1; \ |
| 64405 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 2, 6); | 63786 | float16x8_t __s2 = __p2; \ |
| 64406 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 63787 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64407 | return __ret; | 63788 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64408 | } | 63789 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 63790 | __ret = (float16x8_t) __builtin_neon_vfmaq_laneq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 40); \ |
| | 63791 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 63792 | __ret; \ |
| | 63793 | }) |
| | 63794 | #define __noswap_vfmaq_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 63795 | float16x8_t __ret; \ |
| | 63796 | float16x8_t __s0 = __p0; \ |
| | 63797 | float16x8_t __s1 = __p1; \ |
| | 63798 | float16x8_t __s2 = __p2; \ |
| | 63799 | __ret = (float16x8_t) __builtin_neon_vfmaq_laneq_f16((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 40); \ |
| | 63800 | __ret; \ |
| | 63801 | }) |
| 64409 | #endif | 63802 | #endif |
| 64410 | | 63803 | |
| 64411 | #ifdef __LITTLE_ENDIAN__ | 63804 | #ifdef __LITTLE_ENDIAN__ |
| 64412 | __ai poly8x16_t vtrn1q_p8(poly8x16_t __p0, poly8x16_t __p1) { | 63805 | #define vfma_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 64413 | poly8x16_t __ret; | 63806 | float16x4_t __ret; \ |
| 64414 | __ret = __builtin_shufflevector(__p0, __p1, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30); | 63807 | float16x4_t __s0 = __p0; \ |
| 64415 | return __ret; | 63808 | float16x4_t __s1 = __p1; \ |
| 64416 | } | 63809 | float16x8_t __s2 = __p2; \ |
| | 63810 | __ret = (float16x4_t) __builtin_neon_vfma_laneq_f16((int8x8_t)__s0, (int8x8_t)__s1, (int8x16_t)__s2, __p3, 8); \ |
| | 63811 | __ret; \ |
| | 63812 | }) |
| 64417 | #else | 63813 | #else |
| 64418 | __ai poly8x16_t vtrn1q_p8(poly8x16_t __p0, poly8x16_t __p1) { | 63814 | #define vfma_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 64419 | poly8x16_t __ret; | 63815 | float16x4_t __ret; \ |
| 64420 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 63816 | float16x4_t __s0 = __p0; \ |
| 64421 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 63817 | float16x4_t __s1 = __p1; \ |
| 64422 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30); | 63818 | float16x8_t __s2 = __p2; \ |
| 64423 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 63819 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 64424 | return __ret; | 63820 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 64425 | } | 63821 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 63822 | __ret = (float16x4_t) __builtin_neon_vfma_laneq_f16((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x16_t)__rev2, __p3, 8); \ |
| | 63823 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 63824 | __ret; \ |
| | 63825 | }) |
| | 63826 | #define __noswap_vfma_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 63827 | float16x4_t __ret; \ |
| | 63828 | float16x4_t __s0 = __p0; \ |
| | 63829 | float16x4_t __s1 = __p1; \ |
| | 63830 | float16x8_t __s2 = __p2; \ |
| | 63831 | __ret = (float16x4_t) __builtin_neon_vfma_laneq_f16((int8x8_t)__s0, (int8x8_t)__s1, (int8x16_t)__s2, __p3, 8); \ |
| | 63832 | __ret; \ |
| | 63833 | }) |
| 64426 | #endif | 63834 | #endif |
| 64427 | | 63835 | |
| 64428 | #ifdef __LITTLE_ENDIAN__ | 63836 | #ifdef __LITTLE_ENDIAN__ |
| 64429 | __ai poly64x2_t vtrn1q_p64(poly64x2_t __p0, poly64x2_t __p1) { | 63837 | #define vfmaq_n_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 64430 | poly64x2_t __ret; | 63838 | float16x8_t __ret; \ |
| 64431 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 63839 | float16x8_t __s0 = __p0; \ |
| 64432 | return __ret; | 63840 | float16x8_t __s1 = __p1; \ |
| 64433 | } | 63841 | float16_t __s2 = __p2; \ |
| | 63842 | __ret = vfmaq_f16(__s0, __s1, (float16x8_t) {__s2, __s2, __s2, __s2, __s2, __s2, __s2, __s2}); \ |
| | 63843 | __ret; \ |
| | 63844 | }) |
| 64434 | #else | 63845 | #else |
| 64435 | __ai poly64x2_t vtrn1q_p64(poly64x2_t __p0, poly64x2_t __p1) { | 63846 | #define vfmaq_n_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 64436 | poly64x2_t __ret; | 63847 | float16x8_t __ret; \ |
| 64437 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 63848 | float16x8_t __s0 = __p0; \ |
| 64438 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 63849 | float16x8_t __s1 = __p1; \ |
| 64439 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 63850 | float16_t __s2 = __p2; \ |
| 64440 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 63851 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64441 | return __ret; | 63852 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64442 | } | 63853 | __ret = __noswap_vfmaq_f16(__rev0, __rev1, (float16x8_t) {__s2, __s2, __s2, __s2, __s2, __s2, __s2, __s2}); \ |
| | 63854 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 63855 | __ret; \ |
| | 63856 | }) |
| | 63857 | #endif |
| | 63858 | |
| | 63859 | #ifdef __LITTLE_ENDIAN__ |
| | 63860 | #define vfma_n_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 63861 | float16x4_t __ret; \ |
| | 63862 | float16x4_t __s0 = __p0; \ |
| | 63863 | float16x4_t __s1 = __p1; \ |
| | 63864 | float16_t __s2 = __p2; \ |
| | 63865 | __ret = vfma_f16(__s0, __s1, (float16x4_t) {__s2, __s2, __s2, __s2}); \ |
| | 63866 | __ret; \ |
| | 63867 | }) |
| | 63868 | #else |
| | 63869 | #define vfma_n_f16(__p0, __p1, __p2) __extension__ ({ \ |
| | 63870 | float16x4_t __ret; \ |
| | 63871 | float16x4_t __s0 = __p0; \ |
| | 63872 | float16x4_t __s1 = __p1; \ |
| | 63873 | float16_t __s2 = __p2; \ |
| | 63874 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| | 63875 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| | 63876 | __ret = __noswap_vfma_f16(__rev0, __rev1, (float16x4_t) {__s2, __s2, __s2, __s2}); \ |
| | 63877 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 63878 | __ret; \ |
| | 63879 | }) |
| 64443 | #endif | 63880 | #endif |
| 64444 | | 63881 | |
| 64445 | #ifdef __LITTLE_ENDIAN__ | 63882 | #ifdef __LITTLE_ENDIAN__ |
| 64446 | __ai poly16x8_t vtrn1q_p16(poly16x8_t __p0, poly16x8_t __p1) { | 63883 | #define vfmsh_lane_f16(__p0_755, __p1_755, __p2_755, __p3_755) __extension__ ({ \ |
| 64447 | poly16x8_t __ret; | 63884 | float16_t __ret_755; \ |
| 64448 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 2, 10, 4, 12, 6, 14); | 63885 | float16_t __s0_755 = __p0_755; \ |
| 64449 | return __ret; | 63886 | float16_t __s1_755 = __p1_755; \ |
| 64450 | } | 63887 | float16x4_t __s2_755 = __p2_755; \ |
| | 63888 | __ret_755 = vfmah_lane_f16(__s0_755, -__s1_755, __s2_755, __p3_755); \ |
| | 63889 | __ret_755; \ |
| | 63890 | }) |
| 64451 | #else | 63891 | #else |
| 64452 | __ai poly16x8_t vtrn1q_p16(poly16x8_t __p0, poly16x8_t __p1) { | 63892 | #define vfmsh_lane_f16(__p0_756, __p1_756, __p2_756, __p3_756) __extension__ ({ \ |
| 64453 | poly16x8_t __ret; | 63893 | float16_t __ret_756; \ |
| 64454 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 63894 | float16_t __s0_756 = __p0_756; \ |
| 64455 | poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 63895 | float16_t __s1_756 = __p1_756; \ |
| 64456 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 2, 10, 4, 12, 6, 14); | 63896 | float16x4_t __s2_756 = __p2_756; \ |
| 64457 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 63897 | float16x4_t __rev2_756; __rev2_756 = __builtin_shufflevector(__s2_756, __s2_756, 3, 2, 1, 0); \ |
| 64458 | return __ret; | 63898 | __ret_756 = __noswap_vfmah_lane_f16(__s0_756, -__s1_756, __rev2_756, __p3_756); \ |
| 64459 | } | 63899 | __ret_756; \ |
| | 63900 | }) |
| 64460 | #endif | 63901 | #endif |
| 64461 | | 63902 | |
| 64462 | #ifdef __LITTLE_ENDIAN__ | 63903 | #ifdef __LITTLE_ENDIAN__ |
| 64463 | __ai uint8x16_t vtrn1q_u8(uint8x16_t __p0, uint8x16_t __p1) { | 63904 | #define vfmsq_lane_f16(__p0_757, __p1_757, __p2_757, __p3_757) __extension__ ({ \ |
| 64464 | uint8x16_t __ret; | 63905 | float16x8_t __ret_757; \ |
| 64465 | __ret = __builtin_shufflevector(__p0, __p1, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30); | 63906 | float16x8_t __s0_757 = __p0_757; \ |
| 64466 | return __ret; | 63907 | float16x8_t __s1_757 = __p1_757; \ |
| 64467 | } | 63908 | float16x4_t __s2_757 = __p2_757; \ |
| | 63909 | __ret_757 = vfmaq_lane_f16(__s0_757, -__s1_757, __s2_757, __p3_757); \ |
| | 63910 | __ret_757; \ |
| | 63911 | }) |
| 64468 | #else | 63912 | #else |
| 64469 | __ai uint8x16_t vtrn1q_u8(uint8x16_t __p0, uint8x16_t __p1) { | 63913 | #define vfmsq_lane_f16(__p0_758, __p1_758, __p2_758, __p3_758) __extension__ ({ \ |
| 64470 | uint8x16_t __ret; | 63914 | float16x8_t __ret_758; \ |
| 64471 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 63915 | float16x8_t __s0_758 = __p0_758; \ |
| 64472 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 63916 | float16x8_t __s1_758 = __p1_758; \ |
| 64473 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30); | 63917 | float16x4_t __s2_758 = __p2_758; \ |
| 64474 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 63918 | float16x8_t __rev0_758; __rev0_758 = __builtin_shufflevector(__s0_758, __s0_758, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64475 | return __ret; | 63919 | float16x8_t __rev1_758; __rev1_758 = __builtin_shufflevector(__s1_758, __s1_758, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64476 | } | 63920 | float16x4_t __rev2_758; __rev2_758 = __builtin_shufflevector(__s2_758, __s2_758, 3, 2, 1, 0); \ |
| | 63921 | __ret_758 = __noswap_vfmaq_lane_f16(__rev0_758, -__rev1_758, __rev2_758, __p3_758); \ |
| | 63922 | __ret_758 = __builtin_shufflevector(__ret_758, __ret_758, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 63923 | __ret_758; \ |
| | 63924 | }) |
| 64477 | #endif | 63925 | #endif |
| 64478 | | 63926 | |
| 64479 | #ifdef __LITTLE_ENDIAN__ | 63927 | #ifdef __LITTLE_ENDIAN__ |
| 64480 | __ai uint32x4_t vtrn1q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 63928 | #define vfms_lane_f16(__p0_759, __p1_759, __p2_759, __p3_759) __extension__ ({ \ |
| 64481 | uint32x4_t __ret; | 63929 | float16x4_t __ret_759; \ |
| 64482 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 2, 6); | 63930 | float16x4_t __s0_759 = __p0_759; \ |
| 64483 | return __ret; | 63931 | float16x4_t __s1_759 = __p1_759; \ |
| 64484 | } | 63932 | float16x4_t __s2_759 = __p2_759; \ |
| | 63933 | __ret_759 = vfma_lane_f16(__s0_759, -__s1_759, __s2_759, __p3_759); \ |
| | 63934 | __ret_759; \ |
| | 63935 | }) |
| 64485 | #else | 63936 | #else |
| 64486 | __ai uint32x4_t vtrn1q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 63937 | #define vfms_lane_f16(__p0_760, __p1_760, __p2_760, __p3_760) __extension__ ({ \ |
| 64487 | uint32x4_t __ret; | 63938 | float16x4_t __ret_760; \ |
| 64488 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 63939 | float16x4_t __s0_760 = __p0_760; \ |
| 64489 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 63940 | float16x4_t __s1_760 = __p1_760; \ |
| 64490 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 2, 6); | 63941 | float16x4_t __s2_760 = __p2_760; \ |
| 64491 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 63942 | float16x4_t __rev0_760; __rev0_760 = __builtin_shufflevector(__s0_760, __s0_760, 3, 2, 1, 0); \ |
| 64492 | return __ret; | 63943 | float16x4_t __rev1_760; __rev1_760 = __builtin_shufflevector(__s1_760, __s1_760, 3, 2, 1, 0); \ |
| 64493 | } | 63944 | float16x4_t __rev2_760; __rev2_760 = __builtin_shufflevector(__s2_760, __s2_760, 3, 2, 1, 0); \ |
| | 63945 | __ret_760 = __noswap_vfma_lane_f16(__rev0_760, -__rev1_760, __rev2_760, __p3_760); \ |
| | 63946 | __ret_760 = __builtin_shufflevector(__ret_760, __ret_760, 3, 2, 1, 0); \ |
| | 63947 | __ret_760; \ |
| | 63948 | }) |
| 64494 | #endif | 63949 | #endif |
| 64495 | | 63950 | |
| 64496 | #ifdef __LITTLE_ENDIAN__ | 63951 | #ifdef __LITTLE_ENDIAN__ |
| 64497 | __ai uint64x2_t vtrn1q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 63952 | #define vfmsh_laneq_f16(__p0_761, __p1_761, __p2_761, __p3_761) __extension__ ({ \ |
| 64498 | uint64x2_t __ret; | 63953 | float16_t __ret_761; \ |
| 64499 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 63954 | float16_t __s0_761 = __p0_761; \ |
| 64500 | return __ret; | 63955 | float16_t __s1_761 = __p1_761; \ |
| 64501 | } | 63956 | float16x8_t __s2_761 = __p2_761; \ |
| | 63957 | __ret_761 = vfmah_laneq_f16(__s0_761, -__s1_761, __s2_761, __p3_761); \ |
| | 63958 | __ret_761; \ |
| | 63959 | }) |
| 64502 | #else | 63960 | #else |
| 64503 | __ai uint64x2_t vtrn1q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 63961 | #define vfmsh_laneq_f16(__p0_762, __p1_762, __p2_762, __p3_762) __extension__ ({ \ |
| 64504 | uint64x2_t __ret; | 63962 | float16_t __ret_762; \ |
| 64505 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 63963 | float16_t __s0_762 = __p0_762; \ |
| 64506 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 63964 | float16_t __s1_762 = __p1_762; \ |
| 64507 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 63965 | float16x8_t __s2_762 = __p2_762; \ |
| 64508 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 63966 | float16x8_t __rev2_762; __rev2_762 = __builtin_shufflevector(__s2_762, __s2_762, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64509 | return __ret; | 63967 | __ret_762 = __noswap_vfmah_laneq_f16(__s0_762, -__s1_762, __rev2_762, __p3_762); \ |
| 64510 | } | 63968 | __ret_762; \ |
| | 63969 | }) |
| 64511 | #endif | 63970 | #endif |
| 64512 | | 63971 | |
| 64513 | #ifdef __LITTLE_ENDIAN__ | 63972 | #ifdef __LITTLE_ENDIAN__ |
| 64514 | __ai uint16x8_t vtrn1q_u16(uint16x8_t __p0, uint16x8_t __p1) { | 63973 | #define vfmsq_laneq_f16(__p0_763, __p1_763, __p2_763, __p3_763) __extension__ ({ \ |
| 64515 | uint16x8_t __ret; | 63974 | float16x8_t __ret_763; \ |
| 64516 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 2, 10, 4, 12, 6, 14); | 63975 | float16x8_t __s0_763 = __p0_763; \ |
| 64517 | return __ret; | 63976 | float16x8_t __s1_763 = __p1_763; \ |
| 64518 | } | 63977 | float16x8_t __s2_763 = __p2_763; \ |
| | 63978 | __ret_763 = vfmaq_laneq_f16(__s0_763, -__s1_763, __s2_763, __p3_763); \ |
| | 63979 | __ret_763; \ |
| | 63980 | }) |
| 64519 | #else | 63981 | #else |
| 64520 | __ai uint16x8_t vtrn1q_u16(uint16x8_t __p0, uint16x8_t __p1) { | 63982 | #define vfmsq_laneq_f16(__p0_764, __p1_764, __p2_764, __p3_764) __extension__ ({ \ |
| 64521 | uint16x8_t __ret; | 63983 | float16x8_t __ret_764; \ |
| 64522 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 63984 | float16x8_t __s0_764 = __p0_764; \ |
| 64523 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 63985 | float16x8_t __s1_764 = __p1_764; \ |
| 64524 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 2, 10, 4, 12, 6, 14); | 63986 | float16x8_t __s2_764 = __p2_764; \ |
| 64525 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 63987 | float16x8_t __rev0_764; __rev0_764 = __builtin_shufflevector(__s0_764, __s0_764, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64526 | return __ret; | 63988 | float16x8_t __rev1_764; __rev1_764 = __builtin_shufflevector(__s1_764, __s1_764, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64527 | } | 63989 | float16x8_t __rev2_764; __rev2_764 = __builtin_shufflevector(__s2_764, __s2_764, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 63990 | __ret_764 = __noswap_vfmaq_laneq_f16(__rev0_764, -__rev1_764, __rev2_764, __p3_764); \ |
| | 63991 | __ret_764 = __builtin_shufflevector(__ret_764, __ret_764, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 63992 | __ret_764; \ |
| | 63993 | }) |
| 64528 | #endif | 63994 | #endif |
| 64529 | | 63995 | |
| 64530 | #ifdef __LITTLE_ENDIAN__ | 63996 | #ifdef __LITTLE_ENDIAN__ |
| 64531 | __ai int8x16_t vtrn1q_s8(int8x16_t __p0, int8x16_t __p1) { | 63997 | #define vfms_laneq_f16(__p0_765, __p1_765, __p2_765, __p3_765) __extension__ ({ \ |
| 64532 | int8x16_t __ret; | 63998 | float16x4_t __ret_765; \ |
| 64533 | __ret = __builtin_shufflevector(__p0, __p1, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30); | 63999 | float16x4_t __s0_765 = __p0_765; \ |
| 64534 | return __ret; | 64000 | float16x4_t __s1_765 = __p1_765; \ |
| 64535 | } | 64001 | float16x8_t __s2_765 = __p2_765; \ |
| | 64002 | __ret_765 = vfma_laneq_f16(__s0_765, -__s1_765, __s2_765, __p3_765); \ |
| | 64003 | __ret_765; \ |
| | 64004 | }) |
| 64536 | #else | 64005 | #else |
| 64537 | __ai int8x16_t vtrn1q_s8(int8x16_t __p0, int8x16_t __p1) { | 64006 | #define vfms_laneq_f16(__p0_766, __p1_766, __p2_766, __p3_766) __extension__ ({ \ |
| 64538 | int8x16_t __ret; | 64007 | float16x4_t __ret_766; \ |
| 64539 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64008 | float16x4_t __s0_766 = __p0_766; \ |
| 64540 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64009 | float16x4_t __s1_766 = __p1_766; \ |
| 64541 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30); | 64010 | float16x8_t __s2_766 = __p2_766; \ |
| 64542 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64011 | float16x4_t __rev0_766; __rev0_766 = __builtin_shufflevector(__s0_766, __s0_766, 3, 2, 1, 0); \ |
| 64543 | return __ret; | 64012 | float16x4_t __rev1_766; __rev1_766 = __builtin_shufflevector(__s1_766, __s1_766, 3, 2, 1, 0); \ |
| 64544 | } | 64013 | float16x8_t __rev2_766; __rev2_766 = __builtin_shufflevector(__s2_766, __s2_766, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 64014 | __ret_766 = __noswap_vfma_laneq_f16(__rev0_766, -__rev1_766, __rev2_766, __p3_766); \ |
| | 64015 | __ret_766 = __builtin_shufflevector(__ret_766, __ret_766, 3, 2, 1, 0); \ |
| | 64016 | __ret_766; \ |
| | 64017 | }) |
| 64545 | #endif | 64018 | #endif |
| 64546 | | 64019 | |
| 64547 | #ifdef __LITTLE_ENDIAN__ | 64020 | #ifdef __LITTLE_ENDIAN__ |
| 64548 | __ai float64x2_t vtrn1q_f64(float64x2_t __p0, float64x2_t __p1) { | 64021 | #define vfmsq_n_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 64549 | float64x2_t __ret; | 64022 | float16x8_t __ret; \ |
| 64550 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 64023 | float16x8_t __s0 = __p0; \ |
| 64551 | return __ret; | 64024 | float16x8_t __s1 = __p1; \ |
| 64552 | } | 64025 | float16_t __s2 = __p2; \ |
| | 64026 | __ret = vfmaq_f16(__s0, -__s1, (float16x8_t) {__s2, __s2, __s2, __s2, __s2, __s2, __s2, __s2}); \ |
| | 64027 | __ret; \ |
| | 64028 | }) |
| 64553 | #else | 64029 | #else |
| 64554 | __ai float64x2_t vtrn1q_f64(float64x2_t __p0, float64x2_t __p1) { | 64030 | #define vfmsq_n_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 64555 | float64x2_t __ret; | 64031 | float16x8_t __ret; \ |
| 64556 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64032 | float16x8_t __s0 = __p0; \ |
| 64557 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64033 | float16x8_t __s1 = __p1; \ |
| 64558 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 64034 | float16_t __s2 = __p2; \ |
| 64559 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64035 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64560 | return __ret; | 64036 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64561 | } | 64037 | __ret = __noswap_vfmaq_f16(__rev0, -__rev1, (float16x8_t) {__s2, __s2, __s2, __s2, __s2, __s2, __s2, __s2}); \ |
| | 64038 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 64039 | __ret; \ |
| | 64040 | }) |
| 64562 | #endif | 64041 | #endif |
| 64563 | | 64042 | |
| 64564 | #ifdef __LITTLE_ENDIAN__ | 64043 | #ifdef __LITTLE_ENDIAN__ |
| 64565 | __ai float32x4_t vtrn1q_f32(float32x4_t __p0, float32x4_t __p1) { | 64044 | #define vfms_n_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 64566 | float32x4_t __ret; | 64045 | float16x4_t __ret; \ |
| 64567 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 2, 6); | 64046 | float16x4_t __s0 = __p0; \ |
| 64568 | return __ret; | 64047 | float16x4_t __s1 = __p1; \ |
| 64569 | } | 64048 | float16_t __s2 = __p2; \ |
| | 64049 | __ret = vfma_f16(__s0, -__s1, (float16x4_t) {__s2, __s2, __s2, __s2}); \ |
| | 64050 | __ret; \ |
| | 64051 | }) |
| 64570 | #else | 64052 | #else |
| 64571 | __ai float32x4_t vtrn1q_f32(float32x4_t __p0, float32x4_t __p1) { | 64053 | #define vfms_n_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 64572 | float32x4_t __ret; | 64054 | float16x4_t __ret; \ |
| 64573 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 64055 | float16x4_t __s0 = __p0; \ |
| 64574 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 64056 | float16x4_t __s1 = __p1; \ |
| 64575 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 2, 6); | 64057 | float16_t __s2 = __p2; \ |
| 64576 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 64058 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 64577 | return __ret; | 64059 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 64578 | } | 64060 | __ret = __noswap_vfma_f16(__rev0, -__rev1, (float16x4_t) {__s2, __s2, __s2, __s2}); \ |
| | 64061 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 64062 | __ret; \ |
| | 64063 | }) |
| 64579 | #endif | 64064 | #endif |
| 64580 | | 64065 | |
| 64581 | #ifdef __LITTLE_ENDIAN__ | 64066 | #ifdef __LITTLE_ENDIAN__ |
| 64582 | __ai int32x4_t vtrn1q_s32(int32x4_t __p0, int32x4_t __p1) { | 64067 | #define vmaxnmvq_f16(__p0) __extension__ ({ \ |
| 64583 | int32x4_t __ret; | 64068 | float16_t __ret; \ |
| 64584 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 2, 6); | 64069 | float16x8_t __s0 = __p0; \ |
| 64585 | return __ret; | 64070 | __ret = (float16_t) __builtin_neon_vmaxnmvq_f16((int8x16_t)__s0); \ |
| 64586 | } | 64071 | __ret; \ |
| | 64072 | }) |
| 64587 | #else | 64073 | #else |
| 64588 | __ai int32x4_t vtrn1q_s32(int32x4_t __p0, int32x4_t __p1) { | 64074 | #define vmaxnmvq_f16(__p0) __extension__ ({ \ |
| 64589 | int32x4_t __ret; | 64075 | float16_t __ret; \ |
| 64590 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 64076 | float16x8_t __s0 = __p0; \ |
| 64591 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 64077 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64592 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 2, 6); | 64078 | __ret = (float16_t) __builtin_neon_vmaxnmvq_f16((int8x16_t)__rev0); \ |
| 64593 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 64079 | __ret; \ |
| 64594 | return __ret; | 64080 | }) |
| 64595 | } | | |
| 64596 | #endif | 64081 | #endif |
| 64597 | | 64082 | |
| 64598 | #ifdef __LITTLE_ENDIAN__ | 64083 | #ifdef __LITTLE_ENDIAN__ |
| 64599 | __ai int64x2_t vtrn1q_s64(int64x2_t __p0, int64x2_t __p1) { | 64084 | #define vmaxnmv_f16(__p0) __extension__ ({ \ |
| 64600 | int64x2_t __ret; | 64085 | float16_t __ret; \ |
| 64601 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 64086 | float16x4_t __s0 = __p0; \ |
| 64602 | return __ret; | 64087 | __ret = (float16_t) __builtin_neon_vmaxnmv_f16((int8x8_t)__s0); \ |
| 64603 | } | 64088 | __ret; \ |
| | 64089 | }) |
| 64604 | #else | 64090 | #else |
| 64605 | __ai int64x2_t vtrn1q_s64(int64x2_t __p0, int64x2_t __p1) { | 64091 | #define vmaxnmv_f16(__p0) __extension__ ({ \ |
| 64606 | int64x2_t __ret; | 64092 | float16_t __ret; \ |
| 64607 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64093 | float16x4_t __s0 = __p0; \ |
| 64608 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64094 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 64609 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 64095 | __ret = (float16_t) __builtin_neon_vmaxnmv_f16((int8x8_t)__rev0); \ |
| 64610 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64096 | __ret; \ |
| 64611 | return __ret; | 64097 | }) |
| 64612 | } | | |
| 64613 | #endif | 64098 | #endif |
| 64614 | | 64099 | |
| 64615 | #ifdef __LITTLE_ENDIAN__ | 64100 | #ifdef __LITTLE_ENDIAN__ |
| 64616 | __ai int16x8_t vtrn1q_s16(int16x8_t __p0, int16x8_t __p1) { | 64101 | #define vmaxvq_f16(__p0) __extension__ ({ \ |
| 64617 | int16x8_t __ret; | 64102 | float16_t __ret; \ |
| 64618 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 2, 10, 4, 12, 6, 14); | 64103 | float16x8_t __s0 = __p0; \ |
| 64619 | return __ret; | 64104 | __ret = (float16_t) __builtin_neon_vmaxvq_f16((int8x16_t)__s0); \ |
| 64620 | } | 64105 | __ret; \ |
| | 64106 | }) |
| 64621 | #else | 64107 | #else |
| 64622 | __ai int16x8_t vtrn1q_s16(int16x8_t __p0, int16x8_t __p1) { | 64108 | #define vmaxvq_f16(__p0) __extension__ ({ \ |
| 64623 | int16x8_t __ret; | 64109 | float16_t __ret; \ |
| 64624 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 64110 | float16x8_t __s0 = __p0; \ |
| 64625 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 64111 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64626 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 2, 10, 4, 12, 6, 14); | 64112 | __ret = (float16_t) __builtin_neon_vmaxvq_f16((int8x16_t)__rev0); \ |
| 64627 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 64113 | __ret; \ |
| 64628 | return __ret; | 64114 | }) |
| 64629 | } | | |
| 64630 | #endif | 64115 | #endif |
| 64631 | | 64116 | |
| 64632 | #ifdef __LITTLE_ENDIAN__ | 64117 | #ifdef __LITTLE_ENDIAN__ |
| 64633 | __ai uint8x8_t vtrn1_u8(uint8x8_t __p0, uint8x8_t __p1) { | 64118 | #define vmaxv_f16(__p0) __extension__ ({ \ |
| 64634 | uint8x8_t __ret; | 64119 | float16_t __ret; \ |
| 64635 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 2, 10, 4, 12, 6, 14); | 64120 | float16x4_t __s0 = __p0; \ |
| 64636 | return __ret; | 64121 | __ret = (float16_t) __builtin_neon_vmaxv_f16((int8x8_t)__s0); \ |
| 64637 | } | 64122 | __ret; \ |
| | 64123 | }) |
| 64638 | #else | 64124 | #else |
| 64639 | __ai uint8x8_t vtrn1_u8(uint8x8_t __p0, uint8x8_t __p1) { | 64125 | #define vmaxv_f16(__p0) __extension__ ({ \ |
| 64640 | uint8x8_t __ret; | 64126 | float16_t __ret; \ |
| 64641 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 64127 | float16x4_t __s0 = __p0; \ |
| 64642 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 64128 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 64643 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 2, 10, 4, 12, 6, 14); | 64129 | __ret = (float16_t) __builtin_neon_vmaxv_f16((int8x8_t)__rev0); \ |
| 64644 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 64130 | __ret; \ |
| 64645 | return __ret; | 64131 | }) |
| 64646 | } | | |
| 64647 | #endif | 64132 | #endif |
| 64648 | | 64133 | |
| 64649 | #ifdef __LITTLE_ENDIAN__ | 64134 | #ifdef __LITTLE_ENDIAN__ |
| 64650 | __ai uint32x2_t vtrn1_u32(uint32x2_t __p0, uint32x2_t __p1) { | 64135 | #define vminnmvq_f16(__p0) __extension__ ({ \ |
| 64651 | uint32x2_t __ret; | 64136 | float16_t __ret; \ |
| 64652 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 64137 | float16x8_t __s0 = __p0; \ |
| 64653 | return __ret; | 64138 | __ret = (float16_t) __builtin_neon_vminnmvq_f16((int8x16_t)__s0); \ |
| 64654 | } | 64139 | __ret; \ |
| | 64140 | }) |
| 64655 | #else | 64141 | #else |
| 64656 | __ai uint32x2_t vtrn1_u32(uint32x2_t __p0, uint32x2_t __p1) { | 64142 | #define vminnmvq_f16(__p0) __extension__ ({ \ |
| 64657 | uint32x2_t __ret; | 64143 | float16_t __ret; \ |
| 64658 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64144 | float16x8_t __s0 = __p0; \ |
| 64659 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64145 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64660 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 64146 | __ret = (float16_t) __builtin_neon_vminnmvq_f16((int8x16_t)__rev0); \ |
| 64661 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64147 | __ret; \ |
| 64662 | return __ret; | 64148 | }) |
| 64663 | } | | |
| 64664 | #endif | 64149 | #endif |
| 64665 | | 64150 | |
| 64666 | #ifdef __LITTLE_ENDIAN__ | 64151 | #ifdef __LITTLE_ENDIAN__ |
| 64667 | __ai uint16x4_t vtrn1_u16(uint16x4_t __p0, uint16x4_t __p1) { | 64152 | #define vminnmv_f16(__p0) __extension__ ({ \ |
| 64668 | uint16x4_t __ret; | 64153 | float16_t __ret; \ |
| 64669 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 2, 6); | 64154 | float16x4_t __s0 = __p0; \ |
| 64670 | return __ret; | 64155 | __ret = (float16_t) __builtin_neon_vminnmv_f16((int8x8_t)__s0); \ |
| 64671 | } | 64156 | __ret; \ |
| | 64157 | }) |
| 64672 | #else | 64158 | #else |
| 64673 | __ai uint16x4_t vtrn1_u16(uint16x4_t __p0, uint16x4_t __p1) { | 64159 | #define vminnmv_f16(__p0) __extension__ ({ \ |
| 64674 | uint16x4_t __ret; | 64160 | float16_t __ret; \ |
| 64675 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 64161 | float16x4_t __s0 = __p0; \ |
| 64676 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 64162 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 64677 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 2, 6); | 64163 | __ret = (float16_t) __builtin_neon_vminnmv_f16((int8x8_t)__rev0); \ |
| 64678 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 64164 | __ret; \ |
| 64679 | return __ret; | 64165 | }) |
| 64680 | } | | |
| 64681 | #endif | 64166 | #endif |
| 64682 | | 64167 | |
| 64683 | #ifdef __LITTLE_ENDIAN__ | 64168 | #ifdef __LITTLE_ENDIAN__ |
| 64684 | __ai int8x8_t vtrn1_s8(int8x8_t __p0, int8x8_t __p1) { | 64169 | #define vminvq_f16(__p0) __extension__ ({ \ |
| 64685 | int8x8_t __ret; | 64170 | float16_t __ret; \ |
| 64686 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 2, 10, 4, 12, 6, 14); | 64171 | float16x8_t __s0 = __p0; \ |
| 64687 | return __ret; | 64172 | __ret = (float16_t) __builtin_neon_vminvq_f16((int8x16_t)__s0); \ |
| 64688 | } | 64173 | __ret; \ |
| | 64174 | }) |
| 64689 | #else | 64175 | #else |
| 64690 | __ai int8x8_t vtrn1_s8(int8x8_t __p0, int8x8_t __p1) { | 64176 | #define vminvq_f16(__p0) __extension__ ({ \ |
| 64691 | int8x8_t __ret; | 64177 | float16_t __ret; \ |
| 64692 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 64178 | float16x8_t __s0 = __p0; \ |
| 64693 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 64179 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64694 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 2, 10, 4, 12, 6, 14); | 64180 | __ret = (float16_t) __builtin_neon_vminvq_f16((int8x16_t)__rev0); \ |
| 64695 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 64181 | __ret; \ |
| 64696 | return __ret; | 64182 | }) |
| 64697 | } | | |
| 64698 | #endif | 64183 | #endif |
| 64699 | | 64184 | |
| 64700 | #ifdef __LITTLE_ENDIAN__ | 64185 | #ifdef __LITTLE_ENDIAN__ |
| 64701 | __ai float32x2_t vtrn1_f32(float32x2_t __p0, float32x2_t __p1) { | 64186 | #define vminv_f16(__p0) __extension__ ({ \ |
| 64702 | float32x2_t __ret; | 64187 | float16_t __ret; \ |
| 64703 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 64188 | float16x4_t __s0 = __p0; \ |
| 64704 | return __ret; | 64189 | __ret = (float16_t) __builtin_neon_vminv_f16((int8x8_t)__s0); \ |
| 64705 | } | 64190 | __ret; \ |
| | 64191 | }) |
| 64706 | #else | 64192 | #else |
| 64707 | __ai float32x2_t vtrn1_f32(float32x2_t __p0, float32x2_t __p1) { | 64193 | #define vminv_f16(__p0) __extension__ ({ \ |
| 64708 | float32x2_t __ret; | 64194 | float16_t __ret; \ |
| 64709 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64195 | float16x4_t __s0 = __p0; \ |
| 64710 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64196 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 64711 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 64197 | __ret = (float16_t) __builtin_neon_vminv_f16((int8x8_t)__rev0); \ |
| 64712 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64198 | __ret; \ |
| 64713 | return __ret; | 64199 | }) |
| 64714 | } | | |
| 64715 | #endif | 64200 | #endif |
| 64716 | | 64201 | |
| 64717 | #ifdef __LITTLE_ENDIAN__ | 64202 | #ifdef __LITTLE_ENDIAN__ |
| 64718 | __ai int32x2_t vtrn1_s32(int32x2_t __p0, int32x2_t __p1) { | 64203 | #define vmulq_laneq_f16(__p0_767, __p1_767, __p2_767) __extension__ ({ \ |
| 64719 | int32x2_t __ret; | 64204 | float16x8_t __ret_767; \ |
| 64720 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 64205 | float16x8_t __s0_767 = __p0_767; \ |
| 64721 | return __ret; | 64206 | float16x8_t __s1_767 = __p1_767; \ |
| 64722 | } | 64207 | __ret_767 = __s0_767 * splatq_laneq_f16(__s1_767, __p2_767); \ |
| | 64208 | __ret_767; \ |
| | 64209 | }) |
| 64723 | #else | 64210 | #else |
| 64724 | __ai int32x2_t vtrn1_s32(int32x2_t __p0, int32x2_t __p1) { | 64211 | #define vmulq_laneq_f16(__p0_768, __p1_768, __p2_768) __extension__ ({ \ |
| 64725 | int32x2_t __ret; | 64212 | float16x8_t __ret_768; \ |
| 64726 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64213 | float16x8_t __s0_768 = __p0_768; \ |
| 64727 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64214 | float16x8_t __s1_768 = __p1_768; \ |
| 64728 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 64215 | float16x8_t __rev0_768; __rev0_768 = __builtin_shufflevector(__s0_768, __s0_768, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64729 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64216 | float16x8_t __rev1_768; __rev1_768 = __builtin_shufflevector(__s1_768, __s1_768, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64730 | return __ret; | 64217 | __ret_768 = __rev0_768 * __noswap_splatq_laneq_f16(__rev1_768, __p2_768); \ |
| 64731 | } | 64218 | __ret_768 = __builtin_shufflevector(__ret_768, __ret_768, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 64219 | __ret_768; \ |
| | 64220 | }) |
| 64732 | #endif | 64221 | #endif |
| 64733 | | 64222 | |
| 64734 | #ifdef __LITTLE_ENDIAN__ | 64223 | #ifdef __LITTLE_ENDIAN__ |
| 64735 | __ai int16x4_t vtrn1_s16(int16x4_t __p0, int16x4_t __p1) { | 64224 | #define vmul_laneq_f16(__p0_769, __p1_769, __p2_769) __extension__ ({ \ |
| 64736 | int16x4_t __ret; | 64225 | float16x4_t __ret_769; \ |
| 64737 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 2, 6); | 64226 | float16x4_t __s0_769 = __p0_769; \ |
| 64738 | return __ret; | 64227 | float16x8_t __s1_769 = __p1_769; \ |
| 64739 | } | 64228 | __ret_769 = __s0_769 * splat_laneq_f16(__s1_769, __p2_769); \ |
| | 64229 | __ret_769; \ |
| | 64230 | }) |
| 64740 | #else | 64231 | #else |
| 64741 | __ai int16x4_t vtrn1_s16(int16x4_t __p0, int16x4_t __p1) { | 64232 | #define vmul_laneq_f16(__p0_770, __p1_770, __p2_770) __extension__ ({ \ |
| 64742 | int16x4_t __ret; | 64233 | float16x4_t __ret_770; \ |
| 64743 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 64234 | float16x4_t __s0_770 = __p0_770; \ |
| 64744 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 64235 | float16x8_t __s1_770 = __p1_770; \ |
| 64745 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 2, 6); | 64236 | float16x4_t __rev0_770; __rev0_770 = __builtin_shufflevector(__s0_770, __s0_770, 3, 2, 1, 0); \ |
| 64746 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 64237 | float16x8_t __rev1_770; __rev1_770 = __builtin_shufflevector(__s1_770, __s1_770, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64747 | return __ret; | 64238 | __ret_770 = __rev0_770 * __noswap_splat_laneq_f16(__rev1_770, __p2_770); \ |
| 64748 | } | 64239 | __ret_770 = __builtin_shufflevector(__ret_770, __ret_770, 3, 2, 1, 0); \ |
| | 64240 | __ret_770; \ |
| | 64241 | }) |
| 64749 | #endif | 64242 | #endif |
| 64750 | | 64243 | |
| 64751 | #ifdef __LITTLE_ENDIAN__ | 64244 | #ifdef __LITTLE_ENDIAN__ |
| 64752 | __ai poly8x8_t vtrn2_p8(poly8x8_t __p0, poly8x8_t __p1) { | 64245 | __ai __attribute__((target("fullfp16"))) float16x8_t vmulxq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 64753 | poly8x8_t __ret; | 64246 | float16x8_t __ret; |
| 64754 | __ret = __builtin_shufflevector(__p0, __p1, 1, 9, 3, 11, 5, 13, 7, 15); | 64247 | __ret = (float16x8_t) __builtin_neon_vmulxq_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 64755 | return __ret; | 64248 | return __ret; |
| 64756 | } | 64249 | } |
| 64757 | #else | 64250 | #else |
| 64758 | __ai poly8x8_t vtrn2_p8(poly8x8_t __p0, poly8x8_t __p1) { | 64251 | __ai __attribute__((target("fullfp16"))) float16x8_t vmulxq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 64759 | poly8x8_t __ret; | 64252 | float16x8_t __ret; |
| 64760 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 64253 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64761 | poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 64254 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64762 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 9, 3, 11, 5, 13, 7, 15); | 64255 | __ret = (float16x8_t) __builtin_neon_vmulxq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| 64763 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 64256 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64764 | return __ret; | 64257 | return __ret; |
| 64765 | } | 64258 | } |
| 64766 | #endif | 64259 | __ai __attribute__((target("fullfp16"))) float16x8_t __noswap_vmulxq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 64767 | | 64260 | float16x8_t __ret; |
| 64768 | #ifdef __LITTLE_ENDIAN__ | 64261 | __ret = (float16x8_t) __builtin_neon_vmulxq_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 64769 | __ai poly16x4_t vtrn2_p16(poly16x4_t __p0, poly16x4_t __p1) { | | |
| 64770 | poly16x4_t __ret; | | |
| 64771 | __ret = __builtin_shufflevector(__p0, __p1, 1, 5, 3, 7); | | |
| 64772 | return __ret; | | |
| 64773 | } | | |
| 64774 | #else | | |
| 64775 | __ai poly16x4_t vtrn2_p16(poly16x4_t __p0, poly16x4_t __p1) { | | |
| 64776 | poly16x4_t __ret; | | |
| 64777 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 64778 | poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 64779 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 5, 3, 7); | | |
| 64780 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 64781 | return __ret; | 64262 | return __ret; |
| 64782 | } | 64263 | } |
| 64783 | #endif | 64264 | #endif |
| 64784 | | 64265 | |
| 64785 | #ifdef __LITTLE_ENDIAN__ | 64266 | #ifdef __LITTLE_ENDIAN__ |
| 64786 | __ai poly8x16_t vtrn2q_p8(poly8x16_t __p0, poly8x16_t __p1) { | 64267 | __ai __attribute__((target("fullfp16"))) float16x4_t vmulx_f16(float16x4_t __p0, float16x4_t __p1) { |
| 64787 | poly8x16_t __ret; | 64268 | float16x4_t __ret; |
| 64788 | __ret = __builtin_shufflevector(__p0, __p1, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31); | 64269 | __ret = (float16x4_t) __builtin_neon_vmulx_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 64789 | return __ret; | 64270 | return __ret; |
| 64790 | } | 64271 | } |
| 64791 | #else | 64272 | #else |
| 64792 | __ai poly8x16_t vtrn2q_p8(poly8x16_t __p0, poly8x16_t __p1) { | 64273 | __ai __attribute__((target("fullfp16"))) float16x4_t vmulx_f16(float16x4_t __p0, float16x4_t __p1) { |
| 64793 | poly8x16_t __ret; | 64274 | float16x4_t __ret; |
| 64794 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64275 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 64795 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64276 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 64796 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31); | 64277 | __ret = (float16x4_t) __builtin_neon_vmulx_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| 64797 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64278 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 64798 | return __ret; | | |
| 64799 | } | | |
| 64800 | #endif | | |
| 64801 | | | |
| 64802 | #ifdef __LITTLE_ENDIAN__ | | |
| 64803 | __ai poly64x2_t vtrn2q_p64(poly64x2_t __p0, poly64x2_t __p1) { | | |
| 64804 | poly64x2_t __ret; | | |
| 64805 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | | |
| 64806 | return __ret; | 64279 | return __ret; |
| 64807 | } | 64280 | } |
| 64808 | #else | 64281 | __ai __attribute__((target("fullfp16"))) float16x4_t __noswap_vmulx_f16(float16x4_t __p0, float16x4_t __p1) { |
| 64809 | __ai poly64x2_t vtrn2q_p64(poly64x2_t __p0, poly64x2_t __p1) { | 64282 | float16x4_t __ret; |
| 64810 | poly64x2_t __ret; | 64283 | __ret = (float16x4_t) __builtin_neon_vmulx_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 64811 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 64812 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 64813 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | | |
| 64814 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 64815 | return __ret; | 64284 | return __ret; |
| 64816 | } | 64285 | } |
| 64817 | #endif | 64286 | #endif |
| 64818 | | 64287 | |
| 64819 | #ifdef __LITTLE_ENDIAN__ | 64288 | #ifdef __LITTLE_ENDIAN__ |
| 64820 | __ai poly16x8_t vtrn2q_p16(poly16x8_t __p0, poly16x8_t __p1) { | 64289 | #define vmulxh_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 64821 | poly16x8_t __ret; | 64290 | float16_t __ret; \ |
| 64822 | __ret = __builtin_shufflevector(__p0, __p1, 1, 9, 3, 11, 5, 13, 7, 15); | 64291 | float16_t __s0 = __p0; \ |
| 64823 | return __ret; | 64292 | float16x4_t __s1 = __p1; \ |
| 64824 | } | 64293 | __ret = (float16_t) __builtin_neon_vmulxh_lane_f16(__s0, (float16x4_t)__s1, __p2); \ |
| | 64294 | __ret; \ |
| | 64295 | }) |
| 64825 | #else | 64296 | #else |
| 64826 | __ai poly16x8_t vtrn2q_p16(poly16x8_t __p0, poly16x8_t __p1) { | 64297 | #define vmulxh_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 64827 | poly16x8_t __ret; | 64298 | float16_t __ret; \ |
| 64828 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 64299 | float16_t __s0 = __p0; \ |
| 64829 | poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 64300 | float16x4_t __s1 = __p1; \ |
| 64830 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 9, 3, 11, 5, 13, 7, 15); | 64301 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 64831 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 64302 | __ret = (float16_t) __builtin_neon_vmulxh_lane_f16(__s0, (float16x4_t)__rev1, __p2); \ |
| 64832 | return __ret; | 64303 | __ret; \ |
| 64833 | } | 64304 | }) |
| 64834 | #endif | 64305 | #endif |
| 64835 | | 64306 | |
| 64836 | #ifdef __LITTLE_ENDIAN__ | 64307 | #ifdef __LITTLE_ENDIAN__ |
| 64837 | __ai uint8x16_t vtrn2q_u8(uint8x16_t __p0, uint8x16_t __p1) { | 64308 | #define vmulxq_lane_f16(__p0_771, __p1_771, __p2_771) __extension__ ({ \ |
| 64838 | uint8x16_t __ret; | 64309 | float16x8_t __ret_771; \ |
| 64839 | __ret = __builtin_shufflevector(__p0, __p1, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31); | 64310 | float16x8_t __s0_771 = __p0_771; \ |
| 64840 | return __ret; | 64311 | float16x4_t __s1_771 = __p1_771; \ |
| 64841 | } | 64312 | __ret_771 = vmulxq_f16(__s0_771, splatq_lane_f16(__s1_771, __p2_771)); \ |
| | 64313 | __ret_771; \ |
| | 64314 | }) |
| | 64315 | #else |
| | 64316 | #define vmulxq_lane_f16(__p0_772, __p1_772, __p2_772) __extension__ ({ \ |
| | 64317 | float16x8_t __ret_772; \ |
| | 64318 | float16x8_t __s0_772 = __p0_772; \ |
| | 64319 | float16x4_t __s1_772 = __p1_772; \ |
| | 64320 | float16x8_t __rev0_772; __rev0_772 = __builtin_shufflevector(__s0_772, __s0_772, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 64321 | float16x4_t __rev1_772; __rev1_772 = __builtin_shufflevector(__s1_772, __s1_772, 3, 2, 1, 0); \ |
| | 64322 | __ret_772 = __noswap_vmulxq_f16(__rev0_772, __noswap_splatq_lane_f16(__rev1_772, __p2_772)); \ |
| | 64323 | __ret_772 = __builtin_shufflevector(__ret_772, __ret_772, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 64324 | __ret_772; \ |
| | 64325 | }) |
| | 64326 | #endif |
| | 64327 | |
| | 64328 | #ifdef __LITTLE_ENDIAN__ |
| | 64329 | #define vmulx_lane_f16(__p0_773, __p1_773, __p2_773) __extension__ ({ \ |
| | 64330 | float16x4_t __ret_773; \ |
| | 64331 | float16x4_t __s0_773 = __p0_773; \ |
| | 64332 | float16x4_t __s1_773 = __p1_773; \ |
| | 64333 | __ret_773 = vmulx_f16(__s0_773, splat_lane_f16(__s1_773, __p2_773)); \ |
| | 64334 | __ret_773; \ |
| | 64335 | }) |
| 64842 | #else | 64336 | #else |
| 64843 | __ai uint8x16_t vtrn2q_u8(uint8x16_t __p0, uint8x16_t __p1) { | 64337 | #define vmulx_lane_f16(__p0_774, __p1_774, __p2_774) __extension__ ({ \ |
| 64844 | uint8x16_t __ret; | 64338 | float16x4_t __ret_774; \ |
| 64845 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64339 | float16x4_t __s0_774 = __p0_774; \ |
| 64846 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64340 | float16x4_t __s1_774 = __p1_774; \ |
| 64847 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31); | 64341 | float16x4_t __rev0_774; __rev0_774 = __builtin_shufflevector(__s0_774, __s0_774, 3, 2, 1, 0); \ |
| 64848 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64342 | float16x4_t __rev1_774; __rev1_774 = __builtin_shufflevector(__s1_774, __s1_774, 3, 2, 1, 0); \ |
| 64849 | return __ret; | 64343 | __ret_774 = __noswap_vmulx_f16(__rev0_774, __noswap_splat_lane_f16(__rev1_774, __p2_774)); \ |
| 64850 | } | 64344 | __ret_774 = __builtin_shufflevector(__ret_774, __ret_774, 3, 2, 1, 0); \ |
| | 64345 | __ret_774; \ |
| | 64346 | }) |
| 64851 | #endif | 64347 | #endif |
| 64852 | | 64348 | |
| 64853 | #ifdef __LITTLE_ENDIAN__ | 64349 | #ifdef __LITTLE_ENDIAN__ |
| 64854 | __ai uint32x4_t vtrn2q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 64350 | #define vmulxh_laneq_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 64855 | uint32x4_t __ret; | 64351 | float16_t __ret; \ |
| 64856 | __ret = __builtin_shufflevector(__p0, __p1, 1, 5, 3, 7); | 64352 | float16_t __s0 = __p0; \ |
| 64857 | return __ret; | 64353 | float16x8_t __s1 = __p1; \ |
| 64858 | } | 64354 | __ret = (float16_t) __builtin_neon_vmulxh_laneq_f16(__s0, (float16x8_t)__s1, __p2); \ |
| | 64355 | __ret; \ |
| | 64356 | }) |
| 64859 | #else | 64357 | #else |
| 64860 | __ai uint32x4_t vtrn2q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 64358 | #define vmulxh_laneq_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 64861 | uint32x4_t __ret; | 64359 | float16_t __ret; \ |
| 64862 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 64360 | float16_t __s0 = __p0; \ |
| 64863 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 64361 | float16x8_t __s1 = __p1; \ |
| 64864 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 5, 3, 7); | 64362 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64865 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 64363 | __ret = (float16_t) __builtin_neon_vmulxh_laneq_f16(__s0, (float16x8_t)__rev1, __p2); \ |
| 64866 | return __ret; | 64364 | __ret; \ |
| 64867 | } | 64365 | }) |
| 64868 | #endif | 64366 | #endif |
| 64869 | | 64367 | |
| 64870 | #ifdef __LITTLE_ENDIAN__ | 64368 | #ifdef __LITTLE_ENDIAN__ |
| 64871 | __ai uint64x2_t vtrn2q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 64369 | #define vmulxq_laneq_f16(__p0_775, __p1_775, __p2_775) __extension__ ({ \ |
| 64872 | uint64x2_t __ret; | 64370 | float16x8_t __ret_775; \ |
| 64873 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 64371 | float16x8_t __s0_775 = __p0_775; \ |
| 64874 | return __ret; | 64372 | float16x8_t __s1_775 = __p1_775; \ |
| 64875 | } | 64373 | __ret_775 = vmulxq_f16(__s0_775, splatq_laneq_f16(__s1_775, __p2_775)); \ |
| | 64374 | __ret_775; \ |
| | 64375 | }) |
| 64876 | #else | 64376 | #else |
| 64877 | __ai uint64x2_t vtrn2q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 64377 | #define vmulxq_laneq_f16(__p0_776, __p1_776, __p2_776) __extension__ ({ \ |
| 64878 | uint64x2_t __ret; | 64378 | float16x8_t __ret_776; \ |
| 64879 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64379 | float16x8_t __s0_776 = __p0_776; \ |
| 64880 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64380 | float16x8_t __s1_776 = __p1_776; \ |
| 64881 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 64381 | float16x8_t __rev0_776; __rev0_776 = __builtin_shufflevector(__s0_776, __s0_776, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64882 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64382 | float16x8_t __rev1_776; __rev1_776 = __builtin_shufflevector(__s1_776, __s1_776, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64883 | return __ret; | 64383 | __ret_776 = __noswap_vmulxq_f16(__rev0_776, __noswap_splatq_laneq_f16(__rev1_776, __p2_776)); \ |
| 64884 | } | 64384 | __ret_776 = __builtin_shufflevector(__ret_776, __ret_776, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 64385 | __ret_776; \ |
| | 64386 | }) |
| 64885 | #endif | 64387 | #endif |
| 64886 | | 64388 | |
| 64887 | #ifdef __LITTLE_ENDIAN__ | 64389 | #ifdef __LITTLE_ENDIAN__ |
| 64888 | __ai uint16x8_t vtrn2q_u16(uint16x8_t __p0, uint16x8_t __p1) { | 64390 | #define vmulx_laneq_f16(__p0_777, __p1_777, __p2_777) __extension__ ({ \ |
| 64889 | uint16x8_t __ret; | 64391 | float16x4_t __ret_777; \ |
| 64890 | __ret = __builtin_shufflevector(__p0, __p1, 1, 9, 3, 11, 5, 13, 7, 15); | 64392 | float16x4_t __s0_777 = __p0_777; \ |
| 64891 | return __ret; | 64393 | float16x8_t __s1_777 = __p1_777; \ |
| 64892 | } | 64394 | __ret_777 = vmulx_f16(__s0_777, splat_laneq_f16(__s1_777, __p2_777)); \ |
| | 64395 | __ret_777; \ |
| | 64396 | }) |
| 64893 | #else | 64397 | #else |
| 64894 | __ai uint16x8_t vtrn2q_u16(uint16x8_t __p0, uint16x8_t __p1) { | 64398 | #define vmulx_laneq_f16(__p0_778, __p1_778, __p2_778) __extension__ ({ \ |
| 64895 | uint16x8_t __ret; | 64399 | float16x4_t __ret_778; \ |
| 64896 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 64400 | float16x4_t __s0_778 = __p0_778; \ |
| 64897 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 64401 | float16x8_t __s1_778 = __p1_778; \ |
| 64898 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 9, 3, 11, 5, 13, 7, 15); | 64402 | float16x4_t __rev0_778; __rev0_778 = __builtin_shufflevector(__s0_778, __s0_778, 3, 2, 1, 0); \ |
| 64899 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 64403 | float16x8_t __rev1_778; __rev1_778 = __builtin_shufflevector(__s1_778, __s1_778, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64900 | return __ret; | 64404 | __ret_778 = __noswap_vmulx_f16(__rev0_778, __noswap_splat_laneq_f16(__rev1_778, __p2_778)); \ |
| 64901 | } | 64405 | __ret_778 = __builtin_shufflevector(__ret_778, __ret_778, 3, 2, 1, 0); \ |
| | 64406 | __ret_778; \ |
| | 64407 | }) |
| 64902 | #endif | 64408 | #endif |
| 64903 | | 64409 | |
| 64904 | #ifdef __LITTLE_ENDIAN__ | 64410 | #ifdef __LITTLE_ENDIAN__ |
| 64905 | __ai int8x16_t vtrn2q_s8(int8x16_t __p0, int8x16_t __p1) { | 64411 | #define vmulxq_n_f16(__p0, __p1) __extension__ ({ \ |
| 64906 | int8x16_t __ret; | 64412 | float16x8_t __ret; \ |
| 64907 | __ret = __builtin_shufflevector(__p0, __p1, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31); | 64413 | float16x8_t __s0 = __p0; \ |
| 64908 | return __ret; | 64414 | float16_t __s1 = __p1; \ |
| 64909 | } | 64415 | __ret = vmulxq_f16(__s0, (float16x8_t) {__s1, __s1, __s1, __s1, __s1, __s1, __s1, __s1}); \ |
| | 64416 | __ret; \ |
| | 64417 | }) |
| 64910 | #else | 64418 | #else |
| 64911 | __ai int8x16_t vtrn2q_s8(int8x16_t __p0, int8x16_t __p1) { | 64419 | #define vmulxq_n_f16(__p0, __p1) __extension__ ({ \ |
| 64912 | int8x16_t __ret; | 64420 | float16x8_t __ret; \ |
| 64913 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64421 | float16x8_t __s0 = __p0; \ |
| 64914 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64422 | float16_t __s1 = __p1; \ |
| 64915 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31); | 64423 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64916 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64424 | __ret = __noswap_vmulxq_f16(__rev0, (float16x8_t) {__s1, __s1, __s1, __s1, __s1, __s1, __s1, __s1}); \ |
| 64917 | return __ret; | 64425 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64918 | } | 64426 | __ret; \ |
| | 64427 | }) |
| 64919 | #endif | 64428 | #endif |
| 64920 | | 64429 | |
| 64921 | #ifdef __LITTLE_ENDIAN__ | 64430 | #ifdef __LITTLE_ENDIAN__ |
| 64922 | __ai float64x2_t vtrn2q_f64(float64x2_t __p0, float64x2_t __p1) { | 64431 | #define vmulx_n_f16(__p0, __p1) __extension__ ({ \ |
| 64923 | float64x2_t __ret; | 64432 | float16x4_t __ret; \ |
| 64924 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 64433 | float16x4_t __s0 = __p0; \ |
| 64925 | return __ret; | 64434 | float16_t __s1 = __p1; \ |
| 64926 | } | 64435 | __ret = vmulx_f16(__s0, (float16x4_t) {__s1, __s1, __s1, __s1}); \ |
| | 64436 | __ret; \ |
| | 64437 | }) |
| 64927 | #else | 64438 | #else |
| 64928 | __ai float64x2_t vtrn2q_f64(float64x2_t __p0, float64x2_t __p1) { | 64439 | #define vmulx_n_f16(__p0, __p1) __extension__ ({ \ |
| 64929 | float64x2_t __ret; | 64440 | float16x4_t __ret; \ |
| 64930 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64441 | float16x4_t __s0 = __p0; \ |
| 64931 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64442 | float16_t __s1 = __p1; \ |
| 64932 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 64443 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 64933 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64444 | __ret = __noswap_vmulx_f16(__rev0, (float16x4_t) {__s1, __s1, __s1, __s1}); \ |
| 64934 | return __ret; | 64445 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 64935 | } | 64446 | __ret; \ |
| | 64447 | }) |
| 64936 | #endif | 64448 | #endif |
| 64937 | | 64449 | |
| 64938 | #ifdef __LITTLE_ENDIAN__ | 64450 | #ifdef __LITTLE_ENDIAN__ |
| 64939 | __ai float32x4_t vtrn2q_f32(float32x4_t __p0, float32x4_t __p1) { | 64451 | __ai __attribute__((target("fullfp16"))) float16x8_t vpaddq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 64940 | float32x4_t __ret; | 64452 | float16x8_t __ret; |
| 64941 | __ret = __builtin_shufflevector(__p0, __p1, 1, 5, 3, 7); | 64453 | __ret = (float16x8_t) __builtin_neon_vpaddq_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 64942 | return __ret; | 64454 | return __ret; |
| 64943 | } | 64455 | } |
| 64944 | #else | 64456 | #else |
| 64945 | __ai float32x4_t vtrn2q_f32(float32x4_t __p0, float32x4_t __p1) { | 64457 | __ai __attribute__((target("fullfp16"))) float16x8_t vpaddq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 64946 | float32x4_t __ret; | 64458 | float16x8_t __ret; |
| 64947 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 64459 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64948 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 64460 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64949 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 5, 3, 7); | 64461 | __ret = (float16x8_t) __builtin_neon_vpaddq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| 64950 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 64462 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64951 | return __ret; | 64463 | return __ret; |
| 64952 | } | 64464 | } |
| 64953 | #endif | 64465 | #endif |
| 64954 | | 64466 | |
| 64955 | #ifdef __LITTLE_ENDIAN__ | 64467 | #ifdef __LITTLE_ENDIAN__ |
| 64956 | __ai int32x4_t vtrn2q_s32(int32x4_t __p0, int32x4_t __p1) { | 64468 | __ai __attribute__((target("fullfp16"))) float16x8_t vpmaxq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 64957 | int32x4_t __ret; | 64469 | float16x8_t __ret; |
| 64958 | __ret = __builtin_shufflevector(__p0, __p1, 1, 5, 3, 7); | 64470 | __ret = (float16x8_t) __builtin_neon_vpmaxq_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 64959 | return __ret; | 64471 | return __ret; |
| 64960 | } | 64472 | } |
| 64961 | #else | 64473 | #else |
| 64962 | __ai int32x4_t vtrn2q_s32(int32x4_t __p0, int32x4_t __p1) { | 64474 | __ai __attribute__((target("fullfp16"))) float16x8_t vpmaxq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 64963 | int32x4_t __ret; | 64475 | float16x8_t __ret; |
| 64964 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 64476 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64965 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 64477 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64966 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 5, 3, 7); | 64478 | __ret = (float16x8_t) __builtin_neon_vpmaxq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| 64967 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 64479 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64968 | return __ret; | 64480 | return __ret; |
| 64969 | } | 64481 | } |
| 64970 | #endif | 64482 | #endif |
| 64971 | | 64483 | |
| 64972 | #ifdef __LITTLE_ENDIAN__ | 64484 | #ifdef __LITTLE_ENDIAN__ |
| 64973 | __ai int64x2_t vtrn2q_s64(int64x2_t __p0, int64x2_t __p1) { | 64485 | __ai __attribute__((target("fullfp16"))) float16x8_t vpmaxnmq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 64974 | int64x2_t __ret; | 64486 | float16x8_t __ret; |
| 64975 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 64487 | __ret = (float16x8_t) __builtin_neon_vpmaxnmq_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 64976 | return __ret; | 64488 | return __ret; |
| 64977 | } | 64489 | } |
| 64978 | #else | 64490 | #else |
| 64979 | __ai int64x2_t vtrn2q_s64(int64x2_t __p0, int64x2_t __p1) { | 64491 | __ai __attribute__((target("fullfp16"))) float16x8_t vpmaxnmq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 64980 | int64x2_t __ret; | 64492 | float16x8_t __ret; |
| 64981 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64493 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64982 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64494 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64983 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 64495 | __ret = (float16x8_t) __builtin_neon_vpmaxnmq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| 64984 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64496 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 64985 | return __ret; | 64497 | return __ret; |
| 64986 | } | 64498 | } |
| 64987 | #endif | 64499 | #endif |
| 64988 | | 64500 | |
| 64989 | #ifdef __LITTLE_ENDIAN__ | 64501 | #ifdef __LITTLE_ENDIAN__ |
| 64990 | __ai int16x8_t vtrn2q_s16(int16x8_t __p0, int16x8_t __p1) { | 64502 | __ai __attribute__((target("fullfp16"))) float16x4_t vpmaxnm_f16(float16x4_t __p0, float16x4_t __p1) { |
| 64991 | int16x8_t __ret; | 64503 | float16x4_t __ret; |
| 64992 | __ret = __builtin_shufflevector(__p0, __p1, 1, 9, 3, 11, 5, 13, 7, 15); | 64504 | __ret = (float16x4_t) __builtin_neon_vpmaxnm_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 64993 | return __ret; | 64505 | return __ret; |
| 64994 | } | 64506 | } |
| 64995 | #else | 64507 | #else |
| 64996 | __ai int16x8_t vtrn2q_s16(int16x8_t __p0, int16x8_t __p1) { | 64508 | __ai __attribute__((target("fullfp16"))) float16x4_t vpmaxnm_f16(float16x4_t __p0, float16x4_t __p1) { |
| 64997 | int16x8_t __ret; | 64509 | float16x4_t __ret; |
| 64998 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 64510 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 64999 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 64511 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65000 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 9, 3, 11, 5, 13, 7, 15); | 64512 | __ret = (float16x4_t) __builtin_neon_vpmaxnm_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| 65001 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 64513 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65002 | return __ret; | 64514 | return __ret; |
| 65003 | } | 64515 | } |
| 65004 | #endif | 64516 | #endif |
| 65005 | | 64517 | |
| 65006 | #ifdef __LITTLE_ENDIAN__ | 64518 | #ifdef __LITTLE_ENDIAN__ |
| 65007 | __ai uint8x8_t vtrn2_u8(uint8x8_t __p0, uint8x8_t __p1) { | 64519 | __ai __attribute__((target("fullfp16"))) float16x8_t vpminq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65008 | uint8x8_t __ret; | 64520 | float16x8_t __ret; |
| 65009 | __ret = __builtin_shufflevector(__p0, __p1, 1, 9, 3, 11, 5, 13, 7, 15); | 64521 | __ret = (float16x8_t) __builtin_neon_vpminq_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 65010 | return __ret; | 64522 | return __ret; |
| 65011 | } | 64523 | } |
| 65012 | #else | 64524 | #else |
| 65013 | __ai uint8x8_t vtrn2_u8(uint8x8_t __p0, uint8x8_t __p1) { | 64525 | __ai __attribute__((target("fullfp16"))) float16x8_t vpminq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65014 | uint8x8_t __ret; | 64526 | float16x8_t __ret; |
| 65015 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 64527 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65016 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 64528 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65017 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 9, 3, 11, 5, 13, 7, 15); | 64529 | __ret = (float16x8_t) __builtin_neon_vpminq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| 65018 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 64530 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65019 | return __ret; | 64531 | return __ret; |
| 65020 | } | 64532 | } |
| 65021 | #endif | 64533 | #endif |
| 65022 | | 64534 | |
| 65023 | #ifdef __LITTLE_ENDIAN__ | 64535 | #ifdef __LITTLE_ENDIAN__ |
| 65024 | __ai uint32x2_t vtrn2_u32(uint32x2_t __p0, uint32x2_t __p1) { | 64536 | __ai __attribute__((target("fullfp16"))) float16x8_t vpminnmq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65025 | uint32x2_t __ret; | 64537 | float16x8_t __ret; |
| 65026 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 64538 | __ret = (float16x8_t) __builtin_neon_vpminnmq_f16((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| 65027 | return __ret; | 64539 | return __ret; |
| 65028 | } | 64540 | } |
| 65029 | #else | 64541 | #else |
| 65030 | __ai uint32x2_t vtrn2_u32(uint32x2_t __p0, uint32x2_t __p1) { | 64542 | __ai __attribute__((target("fullfp16"))) float16x8_t vpminnmq_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65031 | uint32x2_t __ret; | 64543 | float16x8_t __ret; |
| 65032 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64544 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65033 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64545 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65034 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 64546 | __ret = (float16x8_t) __builtin_neon_vpminnmq_f16((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| 65035 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64547 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65036 | return __ret; | 64548 | return __ret; |
| 65037 | } | 64549 | } |
| 65038 | #endif | 64550 | #endif |
| 65039 | | 64551 | |
| 65040 | #ifdef __LITTLE_ENDIAN__ | 64552 | #ifdef __LITTLE_ENDIAN__ |
| 65041 | __ai uint16x4_t vtrn2_u16(uint16x4_t __p0, uint16x4_t __p1) { | 64553 | __ai __attribute__((target("fullfp16"))) float16x4_t vpminnm_f16(float16x4_t __p0, float16x4_t __p1) { |
| 65042 | uint16x4_t __ret; | 64554 | float16x4_t __ret; |
| 65043 | __ret = __builtin_shufflevector(__p0, __p1, 1, 5, 3, 7); | 64555 | __ret = (float16x4_t) __builtin_neon_vpminnm_f16((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| 65044 | return __ret; | 64556 | return __ret; |
| 65045 | } | 64557 | } |
| 65046 | #else | 64558 | #else |
| 65047 | __ai uint16x4_t vtrn2_u16(uint16x4_t __p0, uint16x4_t __p1) { | 64559 | __ai __attribute__((target("fullfp16"))) float16x4_t vpminnm_f16(float16x4_t __p0, float16x4_t __p1) { |
| 65048 | uint16x4_t __ret; | 64560 | float16x4_t __ret; |
| 65049 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 64561 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65050 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 64562 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65051 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 5, 3, 7); | 64563 | __ret = (float16x4_t) __builtin_neon_vpminnm_f16((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| 65052 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 64564 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65053 | return __ret; | 64565 | return __ret; |
| 65054 | } | 64566 | } |
| 65055 | #endif | 64567 | #endif |
| 65056 | | 64568 | |
| 65057 | #ifdef __LITTLE_ENDIAN__ | 64569 | #ifdef __LITTLE_ENDIAN__ |
| 65058 | __ai int8x8_t vtrn2_s8(int8x8_t __p0, int8x8_t __p1) { | 64570 | __ai __attribute__((target("fullfp16"))) float16x8_t vrndiq_f16(float16x8_t __p0) { |
| 65059 | int8x8_t __ret; | 64571 | float16x8_t __ret; |
| 65060 | __ret = __builtin_shufflevector(__p0, __p1, 1, 9, 3, 11, 5, 13, 7, 15); | 64572 | __ret = (float16x8_t) __builtin_neon_vrndiq_f16((int8x16_t)__p0, 40); |
| 65061 | return __ret; | 64573 | return __ret; |
| 65062 | } | 64574 | } |
| 65063 | #else | 64575 | #else |
| 65064 | __ai int8x8_t vtrn2_s8(int8x8_t __p0, int8x8_t __p1) { | 64576 | __ai __attribute__((target("fullfp16"))) float16x8_t vrndiq_f16(float16x8_t __p0) { |
| 65065 | int8x8_t __ret; | 64577 | float16x8_t __ret; |
| 65066 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 64578 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65067 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 64579 | __ret = (float16x8_t) __builtin_neon_vrndiq_f16((int8x16_t)__rev0, 40); |
| 65068 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 9, 3, 11, 5, 13, 7, 15); | | |
| 65069 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 64580 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65070 | return __ret; | 64581 | return __ret; |
| 65071 | } | 64582 | } |
| 65072 | #endif | 64583 | #endif |
| 65073 | | 64584 | |
| 65074 | #ifdef __LITTLE_ENDIAN__ | 64585 | #ifdef __LITTLE_ENDIAN__ |
| 65075 | __ai float32x2_t vtrn2_f32(float32x2_t __p0, float32x2_t __p1) { | 64586 | __ai __attribute__((target("fullfp16"))) float16x4_t vrndi_f16(float16x4_t __p0) { |
| 65076 | float32x2_t __ret; | 64587 | float16x4_t __ret; |
| 65077 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 64588 | __ret = (float16x4_t) __builtin_neon_vrndi_f16((int8x8_t)__p0, 8); |
| 65078 | return __ret; | 64589 | return __ret; |
| 65079 | } | 64590 | } |
| 65080 | #else | 64591 | #else |
| 65081 | __ai float32x2_t vtrn2_f32(float32x2_t __p0, float32x2_t __p1) { | 64592 | __ai __attribute__((target("fullfp16"))) float16x4_t vrndi_f16(float16x4_t __p0) { |
| 65082 | float32x2_t __ret; | 64593 | float16x4_t __ret; |
| 65083 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64594 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65084 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64595 | __ret = (float16x4_t) __builtin_neon_vrndi_f16((int8x8_t)__rev0, 8); |
| 65085 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 64596 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65086 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 65087 | return __ret; | 64597 | return __ret; |
| 65088 | } | 64598 | } |
| 65089 | #endif | 64599 | #endif |
| 65090 | | 64600 | |
| 65091 | #ifdef __LITTLE_ENDIAN__ | 64601 | #ifdef __LITTLE_ENDIAN__ |
| 65092 | __ai int32x2_t vtrn2_s32(int32x2_t __p0, int32x2_t __p1) { | 64602 | __ai __attribute__((target("fullfp16"))) float16x8_t vsqrtq_f16(float16x8_t __p0) { |
| 65093 | int32x2_t __ret; | 64603 | float16x8_t __ret; |
| 65094 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 64604 | __ret = (float16x8_t) __builtin_neon_vsqrtq_f16((int8x16_t)__p0, 40); |
| 65095 | return __ret; | 64605 | return __ret; |
| 65096 | } | 64606 | } |
| 65097 | #else | 64607 | #else |
| 65098 | __ai int32x2_t vtrn2_s32(int32x2_t __p0, int32x2_t __p1) { | 64608 | __ai __attribute__((target("fullfp16"))) float16x8_t vsqrtq_f16(float16x8_t __p0) { |
| 65099 | int32x2_t __ret; | 64609 | float16x8_t __ret; |
| 65100 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64610 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65101 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64611 | __ret = (float16x8_t) __builtin_neon_vsqrtq_f16((int8x16_t)__rev0, 40); |
| 65102 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 64612 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65103 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 65104 | return __ret; | 64613 | return __ret; |
| 65105 | } | 64614 | } |
| 65106 | #endif | 64615 | #endif |
| 65107 | | 64616 | |
| 65108 | #ifdef __LITTLE_ENDIAN__ | 64617 | #ifdef __LITTLE_ENDIAN__ |
| 65109 | __ai int16x4_t vtrn2_s16(int16x4_t __p0, int16x4_t __p1) { | 64618 | __ai __attribute__((target("fullfp16"))) float16x4_t vsqrt_f16(float16x4_t __p0) { |
| 65110 | int16x4_t __ret; | 64619 | float16x4_t __ret; |
| 65111 | __ret = __builtin_shufflevector(__p0, __p1, 1, 5, 3, 7); | 64620 | __ret = (float16x4_t) __builtin_neon_vsqrt_f16((int8x8_t)__p0, 8); |
| 65112 | return __ret; | 64621 | return __ret; |
| 65113 | } | 64622 | } |
| 65114 | #else | 64623 | #else |
| 65115 | __ai int16x4_t vtrn2_s16(int16x4_t __p0, int16x4_t __p1) { | 64624 | __ai __attribute__((target("fullfp16"))) float16x4_t vsqrt_f16(float16x4_t __p0) { |
| 65116 | int16x4_t __ret; | 64625 | float16x4_t __ret; |
| 65117 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 64626 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65118 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 64627 | __ret = (float16x4_t) __builtin_neon_vsqrt_f16((int8x8_t)__rev0, 8); |
| 65119 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 5, 3, 7); | | |
| 65120 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 64628 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65121 | return __ret; | 64629 | return __ret; |
| 65122 | } | 64630 | } |
| 65123 | #endif | 64631 | #endif |
| 65124 | | 64632 | |
| 65125 | __ai uint64x1_t vtst_p64(poly64x1_t __p0, poly64x1_t __p1) { | | |
| 65126 | uint64x1_t __ret; | | |
| 65127 | __ret = (uint64x1_t) __builtin_neon_vtst_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 65128 | return __ret; | | |
| 65129 | } | | |
| 65130 | #ifdef __LITTLE_ENDIAN__ | 64633 | #ifdef __LITTLE_ENDIAN__ |
| 65131 | __ai uint64x2_t vtstq_p64(poly64x2_t __p0, poly64x2_t __p1) { | 64634 | __ai __attribute__((target("fullfp16"))) float16x8_t vtrn1q_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65132 | uint64x2_t __ret; | 64635 | float16x8_t __ret; |
| 65133 | __ret = (uint64x2_t) __builtin_neon_vtstq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); | 64636 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 2, 10, 4, 12, 6, 14); |
| 65134 | return __ret; | 64637 | return __ret; |
| 65135 | } | 64638 | } |
| 65136 | #else | 64639 | #else |
| 65137 | __ai uint64x2_t vtstq_p64(poly64x2_t __p0, poly64x2_t __p1) { | 64640 | __ai __attribute__((target("fullfp16"))) float16x8_t vtrn1q_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65138 | uint64x2_t __ret; | 64641 | float16x8_t __ret; |
| 65139 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64642 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65140 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64643 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65141 | __ret = (uint64x2_t) __builtin_neon_vtstq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); | 64644 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 2, 10, 4, 12, 6, 14); |
| 65142 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64645 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65143 | return __ret; | 64646 | return __ret; |
| 65144 | } | 64647 | } |
| 65145 | #endif | 64648 | #endif |
| 65146 | | 64649 | |
| 65147 | #ifdef __LITTLE_ENDIAN__ | 64650 | #ifdef __LITTLE_ENDIAN__ |
| 65148 | __ai uint64x2_t vtstq_u64(uint64x2_t __p0, uint64x2_t __p1) { | 64651 | __ai __attribute__((target("fullfp16"))) float16x4_t vtrn1_f16(float16x4_t __p0, float16x4_t __p1) { |
| 65149 | uint64x2_t __ret; | 64652 | float16x4_t __ret; |
| 65150 | __ret = (uint64x2_t) __builtin_neon_vtstq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); | 64653 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 2, 6); |
| 65151 | return __ret; | 64654 | return __ret; |
| 65152 | } | 64655 | } |
| 65153 | #else | 64656 | #else |
| 65154 | __ai uint64x2_t vtstq_u64(uint64x2_t __p0, uint64x2_t __p1) { | 64657 | __ai __attribute__((target("fullfp16"))) float16x4_t vtrn1_f16(float16x4_t __p0, float16x4_t __p1) { |
| 65155 | uint64x2_t __ret; | 64658 | float16x4_t __ret; |
| 65156 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64659 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65157 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64660 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65158 | __ret = (uint64x2_t) __builtin_neon_vtstq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); | 64661 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 2, 6); |
| 65159 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64662 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65160 | return __ret; | 64663 | return __ret; |
| 65161 | } | 64664 | } |
| 65162 | #endif | 64665 | #endif |
| 65163 | | 64666 | |
| 65164 | #ifdef __LITTLE_ENDIAN__ | 64667 | #ifdef __LITTLE_ENDIAN__ |
| 65165 | __ai uint64x2_t vtstq_s64(int64x2_t __p0, int64x2_t __p1) { | 64668 | __ai __attribute__((target("fullfp16"))) float16x8_t vtrn2q_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65166 | uint64x2_t __ret; | 64669 | float16x8_t __ret; |
| 65167 | __ret = (uint64x2_t) __builtin_neon_vtstq_v((int8x16_t)__p0, (int8x16_t)__p1, 51); | 64670 | __ret = __builtin_shufflevector(__p0, __p1, 1, 9, 3, 11, 5, 13, 7, 15); |
| 65168 | return __ret; | 64671 | return __ret; |
| 65169 | } | 64672 | } |
| 65170 | #else | 64673 | #else |
| 65171 | __ai uint64x2_t vtstq_s64(int64x2_t __p0, int64x2_t __p1) { | 64674 | __ai __attribute__((target("fullfp16"))) float16x8_t vtrn2q_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65172 | uint64x2_t __ret; | 64675 | float16x8_t __ret; |
| 65173 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64676 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65174 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64677 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65175 | __ret = (uint64x2_t) __builtin_neon_vtstq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51); | 64678 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 9, 3, 11, 5, 13, 7, 15); |
| 65176 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64679 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65177 | return __ret; | 64680 | return __ret; |
| 65178 | } | 64681 | } |
| 65179 | #endif | 64682 | #endif |
| 65180 | | 64683 | |
| 65181 | __ai uint64x1_t vtst_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 65182 | uint64x1_t __ret; | | |
| 65183 | __ret = (uint64x1_t) __builtin_neon_vtst_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 65184 | return __ret; | | |
| 65185 | } | | |
| 65186 | __ai uint64x1_t vtst_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 65187 | uint64x1_t __ret; | | |
| 65188 | __ret = (uint64x1_t) __builtin_neon_vtst_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 65189 | return __ret; | | |
| 65190 | } | | |
| 65191 | __ai uint64_t vtstd_u64(uint64_t __p0, uint64_t __p1) { | | |
| 65192 | uint64_t __ret; | | |
| 65193 | __ret = (uint64_t) __builtin_neon_vtstd_u64(__p0, __p1); | | |
| 65194 | return __ret; | | |
| 65195 | } | | |
| 65196 | __ai uint64_t vtstd_s64(int64_t __p0, int64_t __p1) { | | |
| 65197 | uint64_t __ret; | | |
| 65198 | __ret = (uint64_t) __builtin_neon_vtstd_s64(__p0, __p1); | | |
| 65199 | return __ret; | | |
| 65200 | } | | |
| 65201 | __ai int8_t vuqaddb_s8(int8_t __p0, uint8_t __p1) { | | |
| 65202 | int8_t __ret; | | |
| 65203 | __ret = (int8_t) __builtin_neon_vuqaddb_s8(__p0, __p1); | | |
| 65204 | return __ret; | | |
| 65205 | } | | |
| 65206 | __ai int32_t vuqadds_s32(int32_t __p0, uint32_t __p1) { | | |
| 65207 | int32_t __ret; | | |
| 65208 | __ret = (int32_t) __builtin_neon_vuqadds_s32(__p0, __p1); | | |
| 65209 | return __ret; | | |
| 65210 | } | | |
| 65211 | __ai int64_t vuqaddd_s64(int64_t __p0, uint64_t __p1) { | | |
| 65212 | int64_t __ret; | | |
| 65213 | __ret = (int64_t) __builtin_neon_vuqaddd_s64(__p0, __p1); | | |
| 65214 | return __ret; | | |
| 65215 | } | | |
| 65216 | __ai int16_t vuqaddh_s16(int16_t __p0, uint16_t __p1) { | | |
| 65217 | int16_t __ret; | | |
| 65218 | __ret = (int16_t) __builtin_neon_vuqaddh_s16(__p0, __p1); | | |
| 65219 | return __ret; | | |
| 65220 | } | | |
| 65221 | #ifdef __LITTLE_ENDIAN__ | 64684 | #ifdef __LITTLE_ENDIAN__ |
| 65222 | __ai int8x16_t vuqaddq_s8(int8x16_t __p0, uint8x16_t __p1) { | 64685 | __ai __attribute__((target("fullfp16"))) float16x4_t vtrn2_f16(float16x4_t __p0, float16x4_t __p1) { |
| 65223 | int8x16_t __ret; | 64686 | float16x4_t __ret; |
| 65224 | __ret = (int8x16_t) __builtin_neon_vuqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 32); | 64687 | __ret = __builtin_shufflevector(__p0, __p1, 1, 5, 3, 7); |
| 65225 | return __ret; | 64688 | return __ret; |
| 65226 | } | 64689 | } |
| 65227 | #else | 64690 | #else |
| 65228 | __ai int8x16_t vuqaddq_s8(int8x16_t __p0, uint8x16_t __p1) { | 64691 | __ai __attribute__((target("fullfp16"))) float16x4_t vtrn2_f16(float16x4_t __p0, float16x4_t __p1) { |
| 65229 | int8x16_t __ret; | 64692 | float16x4_t __ret; |
| 65230 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64693 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65231 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64694 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65232 | __ret = (int8x16_t) __builtin_neon_vuqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 32); | 64695 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 5, 3, 7); |
| 65233 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64696 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65234 | return __ret; | 64697 | return __ret; |
| 65235 | } | 64698 | } |
| 65236 | #endif | 64699 | #endif |
| 65237 | | 64700 | |
| 65238 | #ifdef __LITTLE_ENDIAN__ | 64701 | #ifdef __LITTLE_ENDIAN__ |
| 65239 | __ai int32x4_t vuqaddq_s32(int32x4_t __p0, uint32x4_t __p1) { | 64702 | __ai __attribute__((target("fullfp16"))) float16x8_t vuzp1q_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65240 | int32x4_t __ret; | 64703 | float16x8_t __ret; |
| 65241 | __ret = (int32x4_t) __builtin_neon_vuqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 34); | 64704 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14); |
| 65242 | return __ret; | 64705 | return __ret; |
| 65243 | } | 64706 | } |
| 65244 | #else | 64707 | #else |
| 65245 | __ai int32x4_t vuqaddq_s32(int32x4_t __p0, uint32x4_t __p1) { | 64708 | __ai __attribute__((target("fullfp16"))) float16x8_t vuzp1q_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65246 | int32x4_t __ret; | 64709 | float16x8_t __ret; |
| 65247 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 64710 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65248 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 64711 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65249 | __ret = (int32x4_t) __builtin_neon_vuqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 34); | 64712 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14); |
| 65250 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 64713 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65251 | return __ret; | 64714 | return __ret; |
| 65252 | } | 64715 | } |
| 65253 | #endif | 64716 | #endif |
| 65254 | | 64717 | |
| 65255 | #ifdef __LITTLE_ENDIAN__ | 64718 | #ifdef __LITTLE_ENDIAN__ |
| 65256 | __ai int64x2_t vuqaddq_s64(int64x2_t __p0, uint64x2_t __p1) { | 64719 | __ai __attribute__((target("fullfp16"))) float16x4_t vuzp1_f16(float16x4_t __p0, float16x4_t __p1) { |
| 65257 | int64x2_t __ret; | 64720 | float16x4_t __ret; |
| 65258 | __ret = (int64x2_t) __builtin_neon_vuqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 35); | 64721 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6); |
| 65259 | return __ret; | 64722 | return __ret; |
| 65260 | } | 64723 | } |
| 65261 | #else | 64724 | #else |
| 65262 | __ai int64x2_t vuqaddq_s64(int64x2_t __p0, uint64x2_t __p1) { | 64725 | __ai __attribute__((target("fullfp16"))) float16x4_t vuzp1_f16(float16x4_t __p0, float16x4_t __p1) { |
| 65263 | int64x2_t __ret; | 64726 | float16x4_t __ret; |
| 65264 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64727 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65265 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64728 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65266 | __ret = (int64x2_t) __builtin_neon_vuqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 35); | 64729 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6); |
| 65267 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64730 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65268 | return __ret; | 64731 | return __ret; |
| 65269 | } | 64732 | } |
| 65270 | #endif | 64733 | #endif |
| 65271 | | 64734 | |
| 65272 | #ifdef __LITTLE_ENDIAN__ | 64735 | #ifdef __LITTLE_ENDIAN__ |
| 65273 | __ai int16x8_t vuqaddq_s16(int16x8_t __p0, uint16x8_t __p1) { | 64736 | __ai __attribute__((target("fullfp16"))) float16x8_t vuzp2q_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65274 | int16x8_t __ret; | 64737 | float16x8_t __ret; |
| 65275 | __ret = (int16x8_t) __builtin_neon_vuqaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 33); | 64738 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15); |
| 65276 | return __ret; | 64739 | return __ret; |
| 65277 | } | 64740 | } |
| 65278 | #else | 64741 | #else |
| 65279 | __ai int16x8_t vuqaddq_s16(int16x8_t __p0, uint16x8_t __p1) { | 64742 | __ai __attribute__((target("fullfp16"))) float16x8_t vuzp2q_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65280 | int16x8_t __ret; | 64743 | float16x8_t __ret; |
| 65281 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 64744 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65282 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 64745 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65283 | __ret = (int16x8_t) __builtin_neon_vuqaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 33); | 64746 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15); |
| 65284 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 64747 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65285 | return __ret; | 64748 | return __ret; |
| 65286 | } | 64749 | } |
| 65287 | #endif | 64750 | #endif |
| 65288 | | 64751 | |
| 65289 | #ifdef __LITTLE_ENDIAN__ | 64752 | #ifdef __LITTLE_ENDIAN__ |
| 65290 | __ai int8x8_t vuqadd_s8(int8x8_t __p0, uint8x8_t __p1) { | 64753 | __ai __attribute__((target("fullfp16"))) float16x4_t vuzp2_f16(float16x4_t __p0, float16x4_t __p1) { |
| 65291 | int8x8_t __ret; | 64754 | float16x4_t __ret; |
| 65292 | __ret = (int8x8_t) __builtin_neon_vuqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 0); | 64755 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7); |
| 65293 | return __ret; | 64756 | return __ret; |
| 65294 | } | 64757 | } |
| 65295 | #else | 64758 | #else |
| 65296 | __ai int8x8_t vuqadd_s8(int8x8_t __p0, uint8x8_t __p1) { | 64759 | __ai __attribute__((target("fullfp16"))) float16x4_t vuzp2_f16(float16x4_t __p0, float16x4_t __p1) { |
| 65297 | int8x8_t __ret; | 64760 | float16x4_t __ret; |
| 65298 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 64761 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65299 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 64762 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65300 | __ret = (int8x8_t) __builtin_neon_vuqadd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 0); | 64763 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7); |
| 65301 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 64764 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65302 | return __ret; | 64765 | return __ret; |
| 65303 | } | 64766 | } |
| 65304 | #endif | 64767 | #endif |
| 65305 | | 64768 | |
| 65306 | #ifdef __LITTLE_ENDIAN__ | 64769 | #ifdef __LITTLE_ENDIAN__ |
| 65307 | __ai int32x2_t vuqadd_s32(int32x2_t __p0, uint32x2_t __p1) { | 64770 | __ai __attribute__((target("fullfp16"))) float16x8_t vzip1q_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65308 | int32x2_t __ret; | 64771 | float16x8_t __ret; |
| 65309 | __ret = (int32x2_t) __builtin_neon_vuqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 2); | 64772 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 1, 9, 2, 10, 3, 11); |
| 65310 | return __ret; | 64773 | return __ret; |
| 65311 | } | 64774 | } |
| 65312 | #else | 64775 | #else |
| 65313 | __ai int32x2_t vuqadd_s32(int32x2_t __p0, uint32x2_t __p1) { | 64776 | __ai __attribute__((target("fullfp16"))) float16x8_t vzip1q_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65314 | int32x2_t __ret; | 64777 | float16x8_t __ret; |
| 65315 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64778 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65316 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64779 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65317 | __ret = (int32x2_t) __builtin_neon_vuqadd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 2); | 64780 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 1, 9, 2, 10, 3, 11); |
| 65318 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64781 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65319 | return __ret; | 64782 | return __ret; |
| 65320 | } | 64783 | } |
| 65321 | #endif | 64784 | #endif |
| 65322 | | 64785 | |
| 65323 | __ai int64x1_t vuqadd_s64(int64x1_t __p0, uint64x1_t __p1) { | | |
| 65324 | int64x1_t __ret; | | |
| 65325 | __ret = (int64x1_t) __builtin_neon_vuqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 3); | | |
| 65326 | return __ret; | | |
| 65327 | } | | |
| 65328 | #ifdef __LITTLE_ENDIAN__ | 64786 | #ifdef __LITTLE_ENDIAN__ |
| 65329 | __ai int16x4_t vuqadd_s16(int16x4_t __p0, uint16x4_t __p1) { | 64787 | __ai __attribute__((target("fullfp16"))) float16x4_t vzip1_f16(float16x4_t __p0, float16x4_t __p1) { |
| 65330 | int16x4_t __ret; | 64788 | float16x4_t __ret; |
| 65331 | __ret = (int16x4_t) __builtin_neon_vuqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 1); | 64789 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 1, 5); |
| 65332 | return __ret; | 64790 | return __ret; |
| 65333 | } | 64791 | } |
| 65334 | #else | 64792 | #else |
| 65335 | __ai int16x4_t vuqadd_s16(int16x4_t __p0, uint16x4_t __p1) { | 64793 | __ai __attribute__((target("fullfp16"))) float16x4_t vzip1_f16(float16x4_t __p0, float16x4_t __p1) { |
| 65336 | int16x4_t __ret; | 64794 | float16x4_t __ret; |
| 65337 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 64795 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65338 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 64796 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65339 | __ret = (int16x4_t) __builtin_neon_vuqadd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 1); | 64797 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 1, 5); |
| 65340 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 64798 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65341 | return __ret; | 64799 | return __ret; |
| 65342 | } | 64800 | } |
| 65343 | #endif | 64801 | #endif |
| 65344 | | 64802 | |
| 65345 | #ifdef __LITTLE_ENDIAN__ | 64803 | #ifdef __LITTLE_ENDIAN__ |
| 65346 | #define vusdotq_laneq_s32(__p0_847, __p1_847, __p2_847, __p3_847) __extension__ ({ \ | 64804 | __ai __attribute__((target("fullfp16"))) float16x8_t vzip2q_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65347 | int32x4_t __ret_847; \ | 64805 | float16x8_t __ret; |
| 65348 | int32x4_t __s0_847 = __p0_847; \ | 64806 | __ret = __builtin_shufflevector(__p0, __p1, 4, 12, 5, 13, 6, 14, 7, 15); |
| 65349 | uint8x16_t __s1_847 = __p1_847; \ | | |
| 65350 | int8x16_t __s2_847 = __p2_847; \ | | |
| 65351 | int8x16_t __reint_847 = __s2_847; \ | | |
| 65352 | __ret_847 = vusdotq_s32(__s0_847, __s1_847, (int8x16_t)(splatq_laneq_s32(*(int32x4_t *) &__reint_847, __p3_847))); \ | | |
| 65353 | __ret_847; \ | | |
| 65354 | }) | | |
| 65355 | #else | | |
| 65356 | #define vusdotq_laneq_s32(__p0_848, __p1_848, __p2_848, __p3_848) __extension__ ({ \ | | |
| 65357 | int32x4_t __ret_848; \ | | |
| 65358 | int32x4_t __s0_848 = __p0_848; \ | | |
| 65359 | uint8x16_t __s1_848 = __p1_848; \ | | |
| 65360 | int8x16_t __s2_848 = __p2_848; \ | | |
| 65361 | int32x4_t __rev0_848; __rev0_848 = __builtin_shufflevector(__s0_848, __s0_848, 3, 2, 1, 0); \ | | |
| 65362 | uint8x16_t __rev1_848; __rev1_848 = __builtin_shufflevector(__s1_848, __s1_848, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 65363 | int8x16_t __rev2_848; __rev2_848 = __builtin_shufflevector(__s2_848, __s2_848, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 65364 | int8x16_t __reint_848 = __rev2_848; \ | | |
| 65365 | __ret_848 = __noswap_vusdotq_s32(__rev0_848, __rev1_848, (int8x16_t)(__noswap_splatq_laneq_s32(*(int32x4_t *) &__reint_848, __p3_848))); \ | | |
| 65366 | __ret_848 = __builtin_shufflevector(__ret_848, __ret_848, 3, 2, 1, 0); \ | | |
| 65367 | __ret_848; \ | | |
| 65368 | }) | | |
| 65369 | #endif | | |
| 65370 | | | |
| 65371 | #ifdef __LITTLE_ENDIAN__ | | |
| 65372 | #define vusdot_laneq_s32(__p0_849, __p1_849, __p2_849, __p3_849) __extension__ ({ \ | | |
| 65373 | int32x2_t __ret_849; \ | | |
| 65374 | int32x2_t __s0_849 = __p0_849; \ | | |
| 65375 | uint8x8_t __s1_849 = __p1_849; \ | | |
| 65376 | int8x16_t __s2_849 = __p2_849; \ | | |
| 65377 | int8x16_t __reint_849 = __s2_849; \ | | |
| 65378 | __ret_849 = vusdot_s32(__s0_849, __s1_849, (int8x8_t)(splat_laneq_s32(*(int32x4_t *) &__reint_849, __p3_849))); \ | | |
| 65379 | __ret_849; \ | | |
| 65380 | }) | | |
| 65381 | #else | | |
| 65382 | #define vusdot_laneq_s32(__p0_850, __p1_850, __p2_850, __p3_850) __extension__ ({ \ | | |
| 65383 | int32x2_t __ret_850; \ | | |
| 65384 | int32x2_t __s0_850 = __p0_850; \ | | |
| 65385 | uint8x8_t __s1_850 = __p1_850; \ | | |
| 65386 | int8x16_t __s2_850 = __p2_850; \ | | |
| 65387 | int32x2_t __rev0_850; __rev0_850 = __builtin_shufflevector(__s0_850, __s0_850, 1, 0); \ | | |
| 65388 | uint8x8_t __rev1_850; __rev1_850 = __builtin_shufflevector(__s1_850, __s1_850, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 65389 | int8x16_t __rev2_850; __rev2_850 = __builtin_shufflevector(__s2_850, __s2_850, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 65390 | int8x16_t __reint_850 = __rev2_850; \ | | |
| 65391 | __ret_850 = __noswap_vusdot_s32(__rev0_850, __rev1_850, (int8x8_t)(__noswap_splat_laneq_s32(*(int32x4_t *) &__reint_850, __p3_850))); \ | | |
| 65392 | __ret_850 = __builtin_shufflevector(__ret_850, __ret_850, 1, 0); \ | | |
| 65393 | __ret_850; \ | | |
| 65394 | }) | | |
| 65395 | #endif | | |
| 65396 | | | |
| 65397 | #ifdef __LITTLE_ENDIAN__ | | |
| 65398 | __ai poly8x8_t vuzp1_p8(poly8x8_t __p0, poly8x8_t __p1) { | | |
| 65399 | poly8x8_t __ret; | | |
| 65400 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14); | | |
| 65401 | return __ret; | 64807 | return __ret; |
| 65402 | } | 64808 | } |
| 65403 | #else | 64809 | #else |
| 65404 | __ai poly8x8_t vuzp1_p8(poly8x8_t __p0, poly8x8_t __p1) { | 64810 | __ai __attribute__((target("fullfp16"))) float16x8_t vzip2q_f16(float16x8_t __p0, float16x8_t __p1) { |
| 65405 | poly8x8_t __ret; | 64811 | float16x8_t __ret; |
| 65406 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 64812 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65407 | poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 64813 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65408 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14); | 64814 | __ret = __builtin_shufflevector(__rev0, __rev1, 4, 12, 5, 13, 6, 14, 7, 15); |
| 65409 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 64815 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65410 | return __ret; | 64816 | return __ret; |
| 65411 | } | 64817 | } |
| 65412 | #endif | 64818 | #endif |
| 65413 | | 64819 | |
| 65414 | #ifdef __LITTLE_ENDIAN__ | 64820 | #ifdef __LITTLE_ENDIAN__ |
| 65415 | __ai poly16x4_t vuzp1_p16(poly16x4_t __p0, poly16x4_t __p1) { | 64821 | __ai __attribute__((target("fullfp16"))) float16x4_t vzip2_f16(float16x4_t __p0, float16x4_t __p1) { |
| 65416 | poly16x4_t __ret; | 64822 | float16x4_t __ret; |
| 65417 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6); | 64823 | __ret = __builtin_shufflevector(__p0, __p1, 2, 6, 3, 7); |
| 65418 | return __ret; | 64824 | return __ret; |
| 65419 | } | 64825 | } |
| 65420 | #else | 64826 | #else |
| 65421 | __ai poly16x4_t vuzp1_p16(poly16x4_t __p0, poly16x4_t __p1) { | 64827 | __ai __attribute__((target("fullfp16"))) float16x4_t vzip2_f16(float16x4_t __p0, float16x4_t __p1) { |
| 65422 | poly16x4_t __ret; | 64828 | float16x4_t __ret; |
| 65423 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 64829 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65424 | poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 64830 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65425 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6); | 64831 | __ret = __builtin_shufflevector(__rev0, __rev1, 2, 6, 3, 7); |
| 65426 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 64832 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65427 | return __ret; | 64833 | return __ret; |
| 65428 | } | 64834 | } |
| 65429 | #endif | 64835 | #endif |
| 65430 | | 64836 | |
| 65431 | #ifdef __LITTLE_ENDIAN__ | 64837 | #ifdef __LITTLE_ENDIAN__ |
| 65432 | __ai poly8x16_t vuzp1q_p8(poly8x16_t __p0, poly8x16_t __p1) { | 64838 | #define vsudotq_laneq_s32(__p0_779, __p1_779, __p2_779, __p3_779) __extension__ ({ \ |
| 65433 | poly8x16_t __ret; | 64839 | int32x4_t __ret_779; \ |
| 65434 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30); | 64840 | int32x4_t __s0_779 = __p0_779; \ |
| 65435 | return __ret; | 64841 | int8x16_t __s1_779 = __p1_779; \ |
| 65436 | } | 64842 | uint8x16_t __s2_779 = __p2_779; \ |
| | 64843 | uint8x16_t __reint_779 = __s2_779; \ |
| | 64844 | __ret_779 = vusdotq_s32(__s0_779, (uint8x16_t)(splatq_laneq_s32(*(int32x4_t *) &__reint_779, __p3_779)), __s1_779); \ |
| | 64845 | __ret_779; \ |
| | 64846 | }) |
| 65437 | #else | 64847 | #else |
| 65438 | __ai poly8x16_t vuzp1q_p8(poly8x16_t __p0, poly8x16_t __p1) { | 64848 | #define vsudotq_laneq_s32(__p0_780, __p1_780, __p2_780, __p3_780) __extension__ ({ \ |
| 65439 | poly8x16_t __ret; | 64849 | int32x4_t __ret_780; \ |
| 65440 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64850 | int32x4_t __s0_780 = __p0_780; \ |
| 65441 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64851 | int8x16_t __s1_780 = __p1_780; \ |
| 65442 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30); | 64852 | uint8x16_t __s2_780 = __p2_780; \ |
| 65443 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64853 | int32x4_t __rev0_780; __rev0_780 = __builtin_shufflevector(__s0_780, __s0_780, 3, 2, 1, 0); \ |
| 65444 | return __ret; | 64854 | int8x16_t __rev1_780; __rev1_780 = __builtin_shufflevector(__s1_780, __s1_780, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65445 | } | 64855 | uint8x16_t __rev2_780; __rev2_780 = __builtin_shufflevector(__s2_780, __s2_780, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 64856 | uint8x16_t __reint_780 = __rev2_780; \ |
| | 64857 | __ret_780 = __noswap_vusdotq_s32(__rev0_780, (uint8x16_t)(__noswap_splatq_laneq_s32(*(int32x4_t *) &__reint_780, __p3_780)), __rev1_780); \ |
| | 64858 | __ret_780 = __builtin_shufflevector(__ret_780, __ret_780, 3, 2, 1, 0); \ |
| | 64859 | __ret_780; \ |
| | 64860 | }) |
| 65446 | #endif | 64861 | #endif |
| 65447 | | 64862 | |
| 65448 | #ifdef __LITTLE_ENDIAN__ | 64863 | #ifdef __LITTLE_ENDIAN__ |
| 65449 | __ai poly64x2_t vuzp1q_p64(poly64x2_t __p0, poly64x2_t __p1) { | 64864 | #define vsudot_laneq_s32(__p0_781, __p1_781, __p2_781, __p3_781) __extension__ ({ \ |
| 65450 | poly64x2_t __ret; | 64865 | int32x2_t __ret_781; \ |
| 65451 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 64866 | int32x2_t __s0_781 = __p0_781; \ |
| 65452 | return __ret; | 64867 | int8x8_t __s1_781 = __p1_781; \ |
| 65453 | } | 64868 | uint8x16_t __s2_781 = __p2_781; \ |
| | 64869 | uint8x16_t __reint_781 = __s2_781; \ |
| | 64870 | __ret_781 = vusdot_s32(__s0_781, (uint8x8_t)(splat_laneq_s32(*(int32x4_t *) &__reint_781, __p3_781)), __s1_781); \ |
| | 64871 | __ret_781; \ |
| | 64872 | }) |
| 65454 | #else | 64873 | #else |
| 65455 | __ai poly64x2_t vuzp1q_p64(poly64x2_t __p0, poly64x2_t __p1) { | 64874 | #define vsudot_laneq_s32(__p0_782, __p1_782, __p2_782, __p3_782) __extension__ ({ \ |
| 65456 | poly64x2_t __ret; | 64875 | int32x2_t __ret_782; \ |
| 65457 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64876 | int32x2_t __s0_782 = __p0_782; \ |
| 65458 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64877 | int8x8_t __s1_782 = __p1_782; \ |
| 65459 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 64878 | uint8x16_t __s2_782 = __p2_782; \ |
| 65460 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64879 | int32x2_t __rev0_782; __rev0_782 = __builtin_shufflevector(__s0_782, __s0_782, 1, 0); \ |
| 65461 | return __ret; | 64880 | int8x8_t __rev1_782; __rev1_782 = __builtin_shufflevector(__s1_782, __s1_782, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65462 | } | 64881 | uint8x16_t __rev2_782; __rev2_782 = __builtin_shufflevector(__s2_782, __s2_782, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 64882 | uint8x16_t __reint_782 = __rev2_782; \ |
| | 64883 | __ret_782 = __noswap_vusdot_s32(__rev0_782, (uint8x8_t)(__noswap_splat_laneq_s32(*(int32x4_t *) &__reint_782, __p3_782)), __rev1_782); \ |
| | 64884 | __ret_782 = __builtin_shufflevector(__ret_782, __ret_782, 1, 0); \ |
| | 64885 | __ret_782; \ |
| | 64886 | }) |
| 65463 | #endif | 64887 | #endif |
| 65464 | | 64888 | |
| 65465 | #ifdef __LITTLE_ENDIAN__ | 64889 | #ifdef __LITTLE_ENDIAN__ |
| 65466 | __ai poly16x8_t vuzp1q_p16(poly16x8_t __p0, poly16x8_t __p1) { | 64890 | #define vusdotq_laneq_s32(__p0_783, __p1_783, __p2_783, __p3_783) __extension__ ({ \ |
| 65467 | poly16x8_t __ret; | 64891 | int32x4_t __ret_783; \ |
| 65468 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14); | 64892 | int32x4_t __s0_783 = __p0_783; \ |
| 65469 | return __ret; | 64893 | uint8x16_t __s1_783 = __p1_783; \ |
| 65470 | } | 64894 | int8x16_t __s2_783 = __p2_783; \ |
| | 64895 | int8x16_t __reint_783 = __s2_783; \ |
| | 64896 | __ret_783 = vusdotq_s32(__s0_783, __s1_783, (int8x16_t)(splatq_laneq_s32(*(int32x4_t *) &__reint_783, __p3_783))); \ |
| | 64897 | __ret_783; \ |
| | 64898 | }) |
| 65471 | #else | 64899 | #else |
| 65472 | __ai poly16x8_t vuzp1q_p16(poly16x8_t __p0, poly16x8_t __p1) { | 64900 | #define vusdotq_laneq_s32(__p0_784, __p1_784, __p2_784, __p3_784) __extension__ ({ \ |
| 65473 | poly16x8_t __ret; | 64901 | int32x4_t __ret_784; \ |
| 65474 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 64902 | int32x4_t __s0_784 = __p0_784; \ |
| 65475 | poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 64903 | uint8x16_t __s1_784 = __p1_784; \ |
| 65476 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14); | 64904 | int8x16_t __s2_784 = __p2_784; \ |
| 65477 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 64905 | int32x4_t __rev0_784; __rev0_784 = __builtin_shufflevector(__s0_784, __s0_784, 3, 2, 1, 0); \ |
| 65478 | return __ret; | 64906 | uint8x16_t __rev1_784; __rev1_784 = __builtin_shufflevector(__s1_784, __s1_784, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65479 | } | 64907 | int8x16_t __rev2_784; __rev2_784 = __builtin_shufflevector(__s2_784, __s2_784, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 64908 | int8x16_t __reint_784 = __rev2_784; \ |
| | 64909 | __ret_784 = __noswap_vusdotq_s32(__rev0_784, __rev1_784, (int8x16_t)(__noswap_splatq_laneq_s32(*(int32x4_t *) &__reint_784, __p3_784))); \ |
| | 64910 | __ret_784 = __builtin_shufflevector(__ret_784, __ret_784, 3, 2, 1, 0); \ |
| | 64911 | __ret_784; \ |
| | 64912 | }) |
| 65480 | #endif | 64913 | #endif |
| 65481 | | 64914 | |
| 65482 | #ifdef __LITTLE_ENDIAN__ | 64915 | #ifdef __LITTLE_ENDIAN__ |
| 65483 | __ai uint8x16_t vuzp1q_u8(uint8x16_t __p0, uint8x16_t __p1) { | 64916 | #define vusdot_laneq_s32(__p0_785, __p1_785, __p2_785, __p3_785) __extension__ ({ \ |
| | 64917 | int32x2_t __ret_785; \ |
| | 64918 | int32x2_t __s0_785 = __p0_785; \ |
| | 64919 | uint8x8_t __s1_785 = __p1_785; \ |
| | 64920 | int8x16_t __s2_785 = __p2_785; \ |
| | 64921 | int8x16_t __reint_785 = __s2_785; \ |
| | 64922 | __ret_785 = vusdot_s32(__s0_785, __s1_785, (int8x8_t)(splat_laneq_s32(*(int32x4_t *) &__reint_785, __p3_785))); \ |
| | 64923 | __ret_785; \ |
| | 64924 | }) |
| | 64925 | #else |
| | 64926 | #define vusdot_laneq_s32(__p0_786, __p1_786, __p2_786, __p3_786) __extension__ ({ \ |
| | 64927 | int32x2_t __ret_786; \ |
| | 64928 | int32x2_t __s0_786 = __p0_786; \ |
| | 64929 | uint8x8_t __s1_786 = __p1_786; \ |
| | 64930 | int8x16_t __s2_786 = __p2_786; \ |
| | 64931 | int32x2_t __rev0_786; __rev0_786 = __builtin_shufflevector(__s0_786, __s0_786, 1, 0); \ |
| | 64932 | uint8x8_t __rev1_786; __rev1_786 = __builtin_shufflevector(__s1_786, __s1_786, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 64933 | int8x16_t __rev2_786; __rev2_786 = __builtin_shufflevector(__s2_786, __s2_786, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 64934 | int8x16_t __reint_786 = __rev2_786; \ |
| | 64935 | __ret_786 = __noswap_vusdot_s32(__rev0_786, __rev1_786, (int8x8_t)(__noswap_splat_laneq_s32(*(int32x4_t *) &__reint_786, __p3_786))); \ |
| | 64936 | __ret_786 = __builtin_shufflevector(__ret_786, __ret_786, 1, 0); \ |
| | 64937 | __ret_786; \ |
| | 64938 | }) |
| | 64939 | #endif |
| | 64940 | |
| | 64941 | #ifdef __LITTLE_ENDIAN__ |
| | 64942 | __ai __attribute__((target("sha3"))) uint8x16_t vbcaxq_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) { |
| 65484 | uint8x16_t __ret; | 64943 | uint8x16_t __ret; |
| 65485 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30); | 64944 | __ret = (uint8x16_t) __builtin_neon_vbcaxq_u8((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 48); |
| 65486 | return __ret; | 64945 | return __ret; |
| 65487 | } | 64946 | } |
| 65488 | #else | 64947 | #else |
| 65489 | __ai uint8x16_t vuzp1q_u8(uint8x16_t __p0, uint8x16_t __p1) { | 64948 | __ai __attribute__((target("sha3"))) uint8x16_t vbcaxq_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) { |
| 65490 | uint8x16_t __ret; | 64949 | uint8x16_t __ret; |
| 65491 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64950 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65492 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64951 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65493 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30); | 64952 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 64953 | __ret = (uint8x16_t) __builtin_neon_vbcaxq_u8((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 48); |
| 65494 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 64954 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65495 | return __ret; | 64955 | return __ret; |
| 65496 | } | 64956 | } |
| 65497 | #endif | 64957 | #endif |
| 65498 | | 64958 | |
| 65499 | #ifdef __LITTLE_ENDIAN__ | 64959 | #ifdef __LITTLE_ENDIAN__ |
| 65500 | __ai uint32x4_t vuzp1q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 64960 | __ai __attribute__((target("sha3"))) uint32x4_t vbcaxq_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 65501 | uint32x4_t __ret; | 64961 | uint32x4_t __ret; |
| 65502 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6); | 64962 | __ret = (uint32x4_t) __builtin_neon_vbcaxq_u32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); |
| 65503 | return __ret; | 64963 | return __ret; |
| 65504 | } | 64964 | } |
| 65505 | #else | 64965 | #else |
| 65506 | __ai uint32x4_t vuzp1q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 64966 | __ai __attribute__((target("sha3"))) uint32x4_t vbcaxq_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 65507 | uint32x4_t __ret; | 64967 | uint32x4_t __ret; |
| 65508 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 64968 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65509 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 64969 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65510 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6); | 64970 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 64971 | __ret = (uint32x4_t) __builtin_neon_vbcaxq_u32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); |
| 65511 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 64972 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65512 | return __ret; | 64973 | return __ret; |
| 65513 | } | 64974 | } |
| 65514 | #endif | 64975 | #endif |
| 65515 | | 64976 | |
| 65516 | #ifdef __LITTLE_ENDIAN__ | 64977 | #ifdef __LITTLE_ENDIAN__ |
| 65517 | __ai uint64x2_t vuzp1q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 64978 | __ai __attribute__((target("sha3"))) uint64x2_t vbcaxq_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 65518 | uint64x2_t __ret; | 64979 | uint64x2_t __ret; |
| 65519 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 64980 | __ret = (uint64x2_t) __builtin_neon_vbcaxq_u64((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 51); |
| 65520 | return __ret; | 64981 | return __ret; |
| 65521 | } | 64982 | } |
| 65522 | #else | 64983 | #else |
| 65523 | __ai uint64x2_t vuzp1q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 64984 | __ai __attribute__((target("sha3"))) uint64x2_t vbcaxq_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 65524 | uint64x2_t __ret; | 64985 | uint64x2_t __ret; |
| 65525 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 64986 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 65526 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 64987 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 65527 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 64988 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 64989 | __ret = (uint64x2_t) __builtin_neon_vbcaxq_u64((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 51); |
| 65528 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 64990 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 65529 | return __ret; | 64991 | return __ret; |
| 65530 | } | 64992 | } |
| 65531 | #endif | 64993 | #endif |
| 65532 | | 64994 | |
| 65533 | #ifdef __LITTLE_ENDIAN__ | 64995 | #ifdef __LITTLE_ENDIAN__ |
| 65534 | __ai uint16x8_t vuzp1q_u16(uint16x8_t __p0, uint16x8_t __p1) { | 64996 | __ai __attribute__((target("sha3"))) uint16x8_t vbcaxq_u16(uint16x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { |
| 65535 | uint16x8_t __ret; | 64997 | uint16x8_t __ret; |
| 65536 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14); | 64998 | __ret = (uint16x8_t) __builtin_neon_vbcaxq_u16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 49); |
| 65537 | return __ret; | 64999 | return __ret; |
| 65538 | } | 65000 | } |
| 65539 | #else | 65001 | #else |
| 65540 | __ai uint16x8_t vuzp1q_u16(uint16x8_t __p0, uint16x8_t __p1) { | 65002 | __ai __attribute__((target("sha3"))) uint16x8_t vbcaxq_u16(uint16x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { |
| 65541 | uint16x8_t __ret; | 65003 | uint16x8_t __ret; |
| 65542 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 65004 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65543 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 65005 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65544 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14); | 65006 | uint16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 65007 | __ret = (uint16x8_t) __builtin_neon_vbcaxq_u16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 49); |
| 65545 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 65008 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65546 | return __ret; | 65009 | return __ret; |
| 65547 | } | 65010 | } |
| 65548 | #endif | 65011 | #endif |
| 65549 | | 65012 | |
| 65550 | #ifdef __LITTLE_ENDIAN__ | 65013 | #ifdef __LITTLE_ENDIAN__ |
| 65551 | __ai int8x16_t vuzp1q_s8(int8x16_t __p0, int8x16_t __p1) { | 65014 | __ai __attribute__((target("sha3"))) int8x16_t vbcaxq_s8(int8x16_t __p0, int8x16_t __p1, int8x16_t __p2) { |
| 65552 | int8x16_t __ret; | 65015 | int8x16_t __ret; |
| 65553 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30); | 65016 | __ret = (int8x16_t) __builtin_neon_vbcaxq_s8((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 32); |
| 65554 | return __ret; | 65017 | return __ret; |
| 65555 | } | 65018 | } |
| 65556 | #else | 65019 | #else |
| 65557 | __ai int8x16_t vuzp1q_s8(int8x16_t __p0, int8x16_t __p1) { | 65020 | __ai __attribute__((target("sha3"))) int8x16_t vbcaxq_s8(int8x16_t __p0, int8x16_t __p1, int8x16_t __p2) { |
| 65558 | int8x16_t __ret; | 65021 | int8x16_t __ret; |
| 65559 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65022 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65560 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65023 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65561 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30); | 65024 | int8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 65025 | __ret = (int8x16_t) __builtin_neon_vbcaxq_s8((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 32); |
| 65562 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65026 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65563 | return __ret; | 65027 | return __ret; |
| 65564 | } | 65028 | } |
| 65565 | #endif | 65029 | #endif |
| 65566 | | 65030 | |
| 65567 | #ifdef __LITTLE_ENDIAN__ | 65031 | #ifdef __LITTLE_ENDIAN__ |
| 65568 | __ai float64x2_t vuzp1q_f64(float64x2_t __p0, float64x2_t __p1) { | 65032 | __ai __attribute__((target("sha3"))) int32x4_t vbcaxq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 65569 | float64x2_t __ret; | | |
| 65570 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | | |
| 65571 | return __ret; | | |
| 65572 | } | | |
| 65573 | #else | | |
| 65574 | __ai float64x2_t vuzp1q_f64(float64x2_t __p0, float64x2_t __p1) { | | |
| 65575 | float64x2_t __ret; | | |
| 65576 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | | |
| 65577 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | | |
| 65578 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | | |
| 65579 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 65580 | return __ret; | | |
| 65581 | } | | |
| 65582 | #endif | | |
| 65583 | | | |
| 65584 | #ifdef __LITTLE_ENDIAN__ | | |
| 65585 | __ai float32x4_t vuzp1q_f32(float32x4_t __p0, float32x4_t __p1) { | | |
| 65586 | float32x4_t __ret; | | |
| 65587 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6); | | |
| 65588 | return __ret; | | |
| 65589 | } | | |
| 65590 | #else | | |
| 65591 | __ai float32x4_t vuzp1q_f32(float32x4_t __p0, float32x4_t __p1) { | | |
| 65592 | float32x4_t __ret; | | |
| 65593 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 65594 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 65595 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6); | | |
| 65596 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 65597 | return __ret; | | |
| 65598 | } | | |
| 65599 | #endif | | |
| 65600 | | | |
| 65601 | #ifdef __LITTLE_ENDIAN__ | | |
| 65602 | __ai int32x4_t vuzp1q_s32(int32x4_t __p0, int32x4_t __p1) { | | |
| 65603 | int32x4_t __ret; | 65033 | int32x4_t __ret; |
| 65604 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6); | 65034 | __ret = (int32x4_t) __builtin_neon_vbcaxq_s32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); |
| 65605 | return __ret; | 65035 | return __ret; |
| 65606 | } | 65036 | } |
| 65607 | #else | 65037 | #else |
| 65608 | __ai int32x4_t vuzp1q_s32(int32x4_t __p0, int32x4_t __p1) { | 65038 | __ai __attribute__((target("sha3"))) int32x4_t vbcaxq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 65609 | int32x4_t __ret; | 65039 | int32x4_t __ret; |
| 65610 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 65040 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65611 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 65041 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65612 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6); | 65042 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 65043 | __ret = (int32x4_t) __builtin_neon_vbcaxq_s32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); |
| 65613 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 65044 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65614 | return __ret; | 65045 | return __ret; |
| 65615 | } | 65046 | } |
| 65616 | #endif | 65047 | #endif |
| 65617 | | 65048 | |
| 65618 | #ifdef __LITTLE_ENDIAN__ | 65049 | #ifdef __LITTLE_ENDIAN__ |
| 65619 | __ai int64x2_t vuzp1q_s64(int64x2_t __p0, int64x2_t __p1) { | 65050 | __ai __attribute__((target("sha3"))) int64x2_t vbcaxq_s64(int64x2_t __p0, int64x2_t __p1, int64x2_t __p2) { |
| 65620 | int64x2_t __ret; | 65051 | int64x2_t __ret; |
| 65621 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 65052 | __ret = (int64x2_t) __builtin_neon_vbcaxq_s64((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 35); |
| 65622 | return __ret; | 65053 | return __ret; |
| 65623 | } | 65054 | } |
| 65624 | #else | 65055 | #else |
| 65625 | __ai int64x2_t vuzp1q_s64(int64x2_t __p0, int64x2_t __p1) { | 65056 | __ai __attribute__((target("sha3"))) int64x2_t vbcaxq_s64(int64x2_t __p0, int64x2_t __p1, int64x2_t __p2) { |
| 65626 | int64x2_t __ret; | 65057 | int64x2_t __ret; |
| 65627 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 65058 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 65628 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 65059 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 65629 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 65060 | int64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 65061 | __ret = (int64x2_t) __builtin_neon_vbcaxq_s64((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 35); |
| 65630 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 65062 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 65631 | return __ret; | 65063 | return __ret; |
| 65632 | } | 65064 | } |
| 65633 | #endif | 65065 | #endif |
| 65634 | | 65066 | |
| 65635 | #ifdef __LITTLE_ENDIAN__ | 65067 | #ifdef __LITTLE_ENDIAN__ |
| 65636 | __ai int16x8_t vuzp1q_s16(int16x8_t __p0, int16x8_t __p1) { | 65068 | __ai __attribute__((target("sha3"))) int16x8_t vbcaxq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 65637 | int16x8_t __ret; | 65069 | int16x8_t __ret; |
| 65638 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14); | 65070 | __ret = (int16x8_t) __builtin_neon_vbcaxq_s16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 33); |
| 65639 | return __ret; | 65071 | return __ret; |
| 65640 | } | 65072 | } |
| 65641 | #else | 65073 | #else |
| 65642 | __ai int16x8_t vuzp1q_s16(int16x8_t __p0, int16x8_t __p1) { | 65074 | __ai __attribute__((target("sha3"))) int16x8_t vbcaxq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 65643 | int16x8_t __ret; | 65075 | int16x8_t __ret; |
| 65644 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 65076 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65645 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 65077 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65646 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14); | 65078 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 65079 | __ret = (int16x8_t) __builtin_neon_vbcaxq_s16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 33); |
| 65647 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 65080 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65648 | return __ret; | 65081 | return __ret; |
| 65649 | } | 65082 | } |
| 65650 | #endif | 65083 | #endif |
| 65651 | | 65084 | |
| 65652 | #ifdef __LITTLE_ENDIAN__ | 65085 | #ifdef __LITTLE_ENDIAN__ |
| 65653 | __ai uint8x8_t vuzp1_u8(uint8x8_t __p0, uint8x8_t __p1) { | 65086 | __ai __attribute__((target("sha3"))) uint8x16_t veor3q_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) { |
| 65654 | uint8x8_t __ret; | 65087 | uint8x16_t __ret; |
| 65655 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14); | 65088 | __ret = (uint8x16_t) __builtin_neon_veor3q_u8((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 48); |
| 65656 | return __ret; | 65089 | return __ret; |
| 65657 | } | 65090 | } |
| 65658 | #else | 65091 | #else |
| 65659 | __ai uint8x8_t vuzp1_u8(uint8x8_t __p0, uint8x8_t __p1) { | 65092 | __ai __attribute__((target("sha3"))) uint8x16_t veor3q_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) { |
| 65660 | uint8x8_t __ret; | 65093 | uint8x16_t __ret; |
| 65661 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 65094 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65662 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 65095 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65663 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14); | 65096 | uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65664 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 65097 | __ret = (uint8x16_t) __builtin_neon_veor3q_u8((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 48); |
| | 65098 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65665 | return __ret; | 65099 | return __ret; |
| 65666 | } | 65100 | } |
| 65667 | #endif | 65101 | #endif |
| 65668 | | 65102 | |
| 65669 | #ifdef __LITTLE_ENDIAN__ | 65103 | #ifdef __LITTLE_ENDIAN__ |
| 65670 | __ai uint32x2_t vuzp1_u32(uint32x2_t __p0, uint32x2_t __p1) { | 65104 | __ai __attribute__((target("sha3"))) uint32x4_t veor3q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 65671 | uint32x2_t __ret; | 65105 | uint32x4_t __ret; |
| 65672 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 65106 | __ret = (uint32x4_t) __builtin_neon_veor3q_u32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); |
| 65673 | return __ret; | 65107 | return __ret; |
| 65674 | } | 65108 | } |
| 65675 | #else | 65109 | #else |
| 65676 | __ai uint32x2_t vuzp1_u32(uint32x2_t __p0, uint32x2_t __p1) { | 65110 | __ai __attribute__((target("sha3"))) uint32x4_t veor3q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 65677 | uint32x2_t __ret; | 65111 | uint32x4_t __ret; |
| 65678 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 65112 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65679 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 65113 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65680 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 65114 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 65681 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 65115 | __ret = (uint32x4_t) __builtin_neon_veor3q_u32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); |
| | 65116 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65682 | return __ret; | 65117 | return __ret; |
| 65683 | } | 65118 | } |
| 65684 | #endif | 65119 | #endif |
| 65685 | | 65120 | |
| 65686 | #ifdef __LITTLE_ENDIAN__ | 65121 | #ifdef __LITTLE_ENDIAN__ |
| 65687 | __ai uint16x4_t vuzp1_u16(uint16x4_t __p0, uint16x4_t __p1) { | 65122 | __ai __attribute__((target("sha3"))) uint64x2_t veor3q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 65688 | uint16x4_t __ret; | 65123 | uint64x2_t __ret; |
| 65689 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6); | 65124 | __ret = (uint64x2_t) __builtin_neon_veor3q_u64((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 51); |
| 65690 | return __ret; | 65125 | return __ret; |
| 65691 | } | 65126 | } |
| 65692 | #else | 65127 | #else |
| 65693 | __ai uint16x4_t vuzp1_u16(uint16x4_t __p0, uint16x4_t __p1) { | 65128 | __ai __attribute__((target("sha3"))) uint64x2_t veor3q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 65694 | uint16x4_t __ret; | 65129 | uint64x2_t __ret; |
| 65695 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 65130 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 65696 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 65131 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 65697 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6); | 65132 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 65698 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 65133 | __ret = (uint64x2_t) __builtin_neon_veor3q_u64((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 51); |
| | 65134 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 65699 | return __ret; | 65135 | return __ret; |
| 65700 | } | 65136 | } |
| 65701 | #endif | 65137 | #endif |
| 65702 | | 65138 | |
| 65703 | #ifdef __LITTLE_ENDIAN__ | 65139 | #ifdef __LITTLE_ENDIAN__ |
| 65704 | __ai int8x8_t vuzp1_s8(int8x8_t __p0, int8x8_t __p1) { | 65140 | __ai __attribute__((target("sha3"))) uint16x8_t veor3q_u16(uint16x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { |
| 65705 | int8x8_t __ret; | 65141 | uint16x8_t __ret; |
| 65706 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14); | 65142 | __ret = (uint16x8_t) __builtin_neon_veor3q_u16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 49); |
| 65707 | return __ret; | 65143 | return __ret; |
| 65708 | } | 65144 | } |
| 65709 | #else | 65145 | #else |
| 65710 | __ai int8x8_t vuzp1_s8(int8x8_t __p0, int8x8_t __p1) { | 65146 | __ai __attribute__((target("sha3"))) uint16x8_t veor3q_u16(uint16x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) { |
| 65711 | int8x8_t __ret; | 65147 | uint16x8_t __ret; |
| 65712 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 65148 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65713 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 65149 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65714 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14); | 65150 | uint16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 65151 | __ret = (uint16x8_t) __builtin_neon_veor3q_u16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 49); |
| 65715 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 65152 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65716 | return __ret; | 65153 | return __ret; |
| 65717 | } | 65154 | } |
| 65718 | #endif | 65155 | #endif |
| 65719 | | 65156 | |
| 65720 | #ifdef __LITTLE_ENDIAN__ | 65157 | #ifdef __LITTLE_ENDIAN__ |
| 65721 | __ai float32x2_t vuzp1_f32(float32x2_t __p0, float32x2_t __p1) { | 65158 | __ai __attribute__((target("sha3"))) int8x16_t veor3q_s8(int8x16_t __p0, int8x16_t __p1, int8x16_t __p2) { |
| 65722 | float32x2_t __ret; | 65159 | int8x16_t __ret; |
| 65723 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 65160 | __ret = (int8x16_t) __builtin_neon_veor3q_s8((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 32); |
| 65724 | return __ret; | 65161 | return __ret; |
| 65725 | } | 65162 | } |
| 65726 | #else | 65163 | #else |
| 65727 | __ai float32x2_t vuzp1_f32(float32x2_t __p0, float32x2_t __p1) { | 65164 | __ai __attribute__((target("sha3"))) int8x16_t veor3q_s8(int8x16_t __p0, int8x16_t __p1, int8x16_t __p2) { |
| 65728 | float32x2_t __ret; | 65165 | int8x16_t __ret; |
| 65729 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 65166 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65730 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 65167 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65731 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 65168 | int8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65732 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 65169 | __ret = (int8x16_t) __builtin_neon_veor3q_s8((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 32); |
| | 65170 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65733 | return __ret; | 65171 | return __ret; |
| 65734 | } | 65172 | } |
| 65735 | #endif | 65173 | #endif |
| 65736 | | 65174 | |
| 65737 | #ifdef __LITTLE_ENDIAN__ | 65175 | #ifdef __LITTLE_ENDIAN__ |
| 65738 | __ai int32x2_t vuzp1_s32(int32x2_t __p0, int32x2_t __p1) { | 65176 | __ai __attribute__((target("sha3"))) int32x4_t veor3q_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 65739 | int32x2_t __ret; | 65177 | int32x4_t __ret; |
| 65740 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 65178 | __ret = (int32x4_t) __builtin_neon_veor3q_s32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34); |
| 65741 | return __ret; | 65179 | return __ret; |
| 65742 | } | 65180 | } |
| 65743 | #else | 65181 | #else |
| 65744 | __ai int32x2_t vuzp1_s32(int32x2_t __p0, int32x2_t __p1) { | 65182 | __ai __attribute__((target("sha3"))) int32x4_t veor3q_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 65745 | int32x2_t __ret; | 65183 | int32x4_t __ret; |
| 65746 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 65184 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65747 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 65185 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65748 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 65186 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 65749 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 65187 | __ret = (int32x4_t) __builtin_neon_veor3q_s32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34); |
| | 65188 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65750 | return __ret; | 65189 | return __ret; |
| 65751 | } | 65190 | } |
| 65752 | #endif | 65191 | #endif |
| 65753 | | 65192 | |
| 65754 | #ifdef __LITTLE_ENDIAN__ | 65193 | #ifdef __LITTLE_ENDIAN__ |
| 65755 | __ai int16x4_t vuzp1_s16(int16x4_t __p0, int16x4_t __p1) { | 65194 | __ai __attribute__((target("sha3"))) int64x2_t veor3q_s64(int64x2_t __p0, int64x2_t __p1, int64x2_t __p2) { |
| 65756 | int16x4_t __ret; | 65195 | int64x2_t __ret; |
| 65757 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6); | 65196 | __ret = (int64x2_t) __builtin_neon_veor3q_s64((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 35); |
| 65758 | return __ret; | 65197 | return __ret; |
| 65759 | } | 65198 | } |
| 65760 | #else | 65199 | #else |
| 65761 | __ai int16x4_t vuzp1_s16(int16x4_t __p0, int16x4_t __p1) { | 65200 | __ai __attribute__((target("sha3"))) int64x2_t veor3q_s64(int64x2_t __p0, int64x2_t __p1, int64x2_t __p2) { |
| 65762 | int16x4_t __ret; | 65201 | int64x2_t __ret; |
| 65763 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 65202 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 65764 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 65203 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 65765 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6); | 65204 | int64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 65766 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 65205 | __ret = (int64x2_t) __builtin_neon_veor3q_s64((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 35); |
| | 65206 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 65767 | return __ret; | 65207 | return __ret; |
| 65768 | } | 65208 | } |
| 65769 | #endif | 65209 | #endif |
| 65770 | | 65210 | |
| 65771 | #ifdef __LITTLE_ENDIAN__ | 65211 | #ifdef __LITTLE_ENDIAN__ |
| 65772 | __ai poly8x8_t vuzp2_p8(poly8x8_t __p0, poly8x8_t __p1) { | 65212 | __ai __attribute__((target("sha3"))) int16x8_t veor3q_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 65773 | poly8x8_t __ret; | 65213 | int16x8_t __ret; |
| 65774 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15); | 65214 | __ret = (int16x8_t) __builtin_neon_veor3q_s16((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 33); |
| 65775 | return __ret; | 65215 | return __ret; |
| 65776 | } | 65216 | } |
| 65777 | #else | 65217 | #else |
| 65778 | __ai poly8x8_t vuzp2_p8(poly8x8_t __p0, poly8x8_t __p1) { | 65218 | __ai __attribute__((target("sha3"))) int16x8_t veor3q_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 65779 | poly8x8_t __ret; | 65219 | int16x8_t __ret; |
| 65780 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 65220 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65781 | poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 65221 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65782 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15); | 65222 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 65223 | __ret = (int16x8_t) __builtin_neon_veor3q_s16((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 33); |
| 65783 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 65224 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 65784 | return __ret; | 65225 | return __ret; |
| 65785 | } | 65226 | } |
| 65786 | #endif | 65227 | #endif |
| 65787 | | 65228 | |
| 65788 | #ifdef __LITTLE_ENDIAN__ | 65229 | #ifdef __LITTLE_ENDIAN__ |
| 65789 | __ai poly16x4_t vuzp2_p16(poly16x4_t __p0, poly16x4_t __p1) { | 65230 | __ai __attribute__((target("sha3"))) uint64x2_t vrax1q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 65790 | poly16x4_t __ret; | 65231 | uint64x2_t __ret; |
| 65791 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7); | 65232 | __ret = (uint64x2_t) __builtin_neon_vrax1q_u64((int8x16_t)__p0, (int8x16_t)__p1, 51); |
| 65792 | return __ret; | 65233 | return __ret; |
| 65793 | } | 65234 | } |
| 65794 | #else | 65235 | #else |
| 65795 | __ai poly16x4_t vuzp2_p16(poly16x4_t __p0, poly16x4_t __p1) { | 65236 | __ai __attribute__((target("sha3"))) uint64x2_t vrax1q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 65796 | poly16x4_t __ret; | 65237 | uint64x2_t __ret; |
| 65797 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 65238 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 65798 | poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 65239 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 65799 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7); | 65240 | __ret = (uint64x2_t) __builtin_neon_vrax1q_u64((int8x16_t)__rev0, (int8x16_t)__rev1, 51); |
| 65800 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 65241 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 65801 | return __ret; | 65242 | return __ret; |
| 65802 | } | 65243 | } |
| 65803 | #endif | 65244 | #endif |
| 65804 | | 65245 | |
| 65805 | #ifdef __LITTLE_ENDIAN__ | 65246 | #ifdef __LITTLE_ENDIAN__ |
| 65806 | __ai poly8x16_t vuzp2q_p8(poly8x16_t __p0, poly8x16_t __p1) { | 65247 | __ai __attribute__((target("sha3"))) uint64x2_t vsha512hq_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 65807 | poly8x16_t __ret; | 65248 | uint64x2_t __ret; |
| 65808 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31); | 65249 | __ret = (uint64x2_t) __builtin_neon_vsha512hq_u64((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 51); |
| 65809 | return __ret; | 65250 | return __ret; |
| 65810 | } | 65251 | } |
| 65811 | #else | 65252 | #else |
| 65812 | __ai poly8x16_t vuzp2q_p8(poly8x16_t __p0, poly8x16_t __p1) { | 65253 | __ai __attribute__((target("sha3"))) uint64x2_t vsha512hq_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 65813 | poly8x16_t __ret; | 65254 | uint64x2_t __ret; |
| 65814 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65255 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 65815 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65256 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 65816 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31); | 65257 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 65817 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65258 | __ret = (uint64x2_t) __builtin_neon_vsha512hq_u64((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 51); |
| | 65259 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 65818 | return __ret; | 65260 | return __ret; |
| 65819 | } | 65261 | } |
| 65820 | #endif | 65262 | #endif |
| 65821 | | 65263 | |
| 65822 | #ifdef __LITTLE_ENDIAN__ | 65264 | #ifdef __LITTLE_ENDIAN__ |
| 65823 | __ai poly64x2_t vuzp2q_p64(poly64x2_t __p0, poly64x2_t __p1) { | 65265 | __ai __attribute__((target("sha3"))) uint64x2_t vsha512h2q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 65824 | poly64x2_t __ret; | 65266 | uint64x2_t __ret; |
| 65825 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 65267 | __ret = (uint64x2_t) __builtin_neon_vsha512h2q_u64((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 51); |
| 65826 | return __ret; | 65268 | return __ret; |
| 65827 | } | 65269 | } |
| 65828 | #else | 65270 | #else |
| 65829 | __ai poly64x2_t vuzp2q_p64(poly64x2_t __p0, poly64x2_t __p1) { | 65271 | __ai __attribute__((target("sha3"))) uint64x2_t vsha512h2q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 65830 | poly64x2_t __ret; | 65272 | uint64x2_t __ret; |
| 65831 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 65273 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 65832 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 65274 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 65833 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 65275 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 65276 | __ret = (uint64x2_t) __builtin_neon_vsha512h2q_u64((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 51); |
| 65834 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 65277 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 65835 | return __ret; | 65278 | return __ret; |
| 65836 | } | 65279 | } |
| 65837 | #endif | 65280 | #endif |
| 65838 | | 65281 | |
| 65839 | #ifdef __LITTLE_ENDIAN__ | 65282 | #ifdef __LITTLE_ENDIAN__ |
| 65840 | __ai poly16x8_t vuzp2q_p16(poly16x8_t __p0, poly16x8_t __p1) { | 65283 | __ai __attribute__((target("sha3"))) uint64x2_t vsha512su0q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 65841 | poly16x8_t __ret; | 65284 | uint64x2_t __ret; |
| 65842 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15); | 65285 | __ret = (uint64x2_t) __builtin_neon_vsha512su0q_u64((int8x16_t)__p0, (int8x16_t)__p1, 51); |
| 65843 | return __ret; | 65286 | return __ret; |
| 65844 | } | 65287 | } |
| 65845 | #else | 65288 | #else |
| 65846 | __ai poly16x8_t vuzp2q_p16(poly16x8_t __p0, poly16x8_t __p1) { | 65289 | __ai __attribute__((target("sha3"))) uint64x2_t vsha512su0q_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 65847 | poly16x8_t __ret; | 65290 | uint64x2_t __ret; |
| 65848 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 65291 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 65849 | poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 65292 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 65850 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15); | 65293 | __ret = (uint64x2_t) __builtin_neon_vsha512su0q_u64((int8x16_t)__rev0, (int8x16_t)__rev1, 51); |
| 65851 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 65294 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 65852 | return __ret; | 65295 | return __ret; |
| 65853 | } | 65296 | } |
| 65854 | #endif | 65297 | #endif |
| 65855 | | 65298 | |
| 65856 | #ifdef __LITTLE_ENDIAN__ | 65299 | #ifdef __LITTLE_ENDIAN__ |
| 65857 | __ai uint8x16_t vuzp2q_u8(uint8x16_t __p0, uint8x16_t __p1) { | 65300 | __ai __attribute__((target("sha3"))) uint64x2_t vsha512su1q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 65858 | uint8x16_t __ret; | 65301 | uint64x2_t __ret; |
| 65859 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31); | 65302 | __ret = (uint64x2_t) __builtin_neon_vsha512su1q_u64((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 51); |
| 65860 | return __ret; | 65303 | return __ret; |
| 65861 | } | 65304 | } |
| 65862 | #else | 65305 | #else |
| 65863 | __ai uint8x16_t vuzp2q_u8(uint8x16_t __p0, uint8x16_t __p1) { | 65306 | __ai __attribute__((target("sha3"))) uint64x2_t vsha512su1q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) { |
| 65864 | uint8x16_t __ret; | 65307 | uint64x2_t __ret; |
| 65865 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65308 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 65866 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65309 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 65867 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31); | 65310 | uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 65868 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65311 | __ret = (uint64x2_t) __builtin_neon_vsha512su1q_u64((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 51); |
| | 65312 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 65869 | return __ret; | 65313 | return __ret; |
| 65870 | } | 65314 | } |
| 65871 | #endif | 65315 | #endif |
| 65872 | | 65316 | |
| 65873 | #ifdef __LITTLE_ENDIAN__ | 65317 | #ifdef __LITTLE_ENDIAN__ |
| 65874 | __ai uint32x4_t vuzp2q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 65318 | #define vxarq_u64(__p0, __p1, __p2) __extension__ ({ \ |
| | 65319 | uint64x2_t __ret; \ |
| | 65320 | uint64x2_t __s0 = __p0; \ |
| | 65321 | uint64x2_t __s1 = __p1; \ |
| | 65322 | __ret = (uint64x2_t) __builtin_neon_vxarq_u64((int8x16_t)__s0, (int8x16_t)__s1, __p2, 51); \ |
| | 65323 | __ret; \ |
| | 65324 | }) |
| | 65325 | #else |
| | 65326 | #define vxarq_u64(__p0, __p1, __p2) __extension__ ({ \ |
| | 65327 | uint64x2_t __ret; \ |
| | 65328 | uint64x2_t __s0 = __p0; \ |
| | 65329 | uint64x2_t __s1 = __p1; \ |
| | 65330 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| | 65331 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| | 65332 | __ret = (uint64x2_t) __builtin_neon_vxarq_u64((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 51); \ |
| | 65333 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| | 65334 | __ret; \ |
| | 65335 | }) |
| | 65336 | #endif |
| | 65337 | |
| | 65338 | #ifdef __LITTLE_ENDIAN__ |
| | 65339 | __ai __attribute__((target("sm4"))) uint32x4_t vsm3partw1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 65875 | uint32x4_t __ret; | 65340 | uint32x4_t __ret; |
| 65876 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7); | 65341 | __ret = (uint32x4_t) __builtin_neon_vsm3partw1q_u32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); |
| 65877 | return __ret; | 65342 | return __ret; |
| 65878 | } | 65343 | } |
| 65879 | #else | 65344 | #else |
| 65880 | __ai uint32x4_t vuzp2q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 65345 | __ai __attribute__((target("sm4"))) uint32x4_t vsm3partw1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 65881 | uint32x4_t __ret; | 65346 | uint32x4_t __ret; |
| 65882 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 65347 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65883 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 65348 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65884 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7); | 65349 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| | 65350 | __ret = (uint32x4_t) __builtin_neon_vsm3partw1q_u32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); |
| 65885 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 65351 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65886 | return __ret; | 65352 | return __ret; |
| 65887 | } | 65353 | } |
| 65888 | #endif | 65354 | #endif |
| 65889 | | 65355 | |
| 65890 | #ifdef __LITTLE_ENDIAN__ | 65356 | #ifdef __LITTLE_ENDIAN__ |
| 65891 | __ai uint64x2_t vuzp2q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 65357 | __ai __attribute__((target("sm4"))) uint32x4_t vsm3partw2q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 65892 | uint64x2_t __ret; | 65358 | uint32x4_t __ret; |
| 65893 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 65359 | __ret = (uint32x4_t) __builtin_neon_vsm3partw2q_u32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); |
| 65894 | return __ret; | 65360 | return __ret; |
| 65895 | } | 65361 | } |
| 65896 | #else | 65362 | #else |
| 65897 | __ai uint64x2_t vuzp2q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 65363 | __ai __attribute__((target("sm4"))) uint32x4_t vsm3partw2q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 65898 | uint64x2_t __ret; | 65364 | uint32x4_t __ret; |
| 65899 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 65365 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65900 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 65366 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65901 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 65367 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 65902 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 65368 | __ret = (uint32x4_t) __builtin_neon_vsm3partw2q_u32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); |
| | 65369 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65903 | return __ret; | 65370 | return __ret; |
| 65904 | } | 65371 | } |
| 65905 | #endif | 65372 | #endif |
| 65906 | | 65373 | |
| 65907 | #ifdef __LITTLE_ENDIAN__ | 65374 | #ifdef __LITTLE_ENDIAN__ |
| 65908 | __ai uint16x8_t vuzp2q_u16(uint16x8_t __p0, uint16x8_t __p1) { | 65375 | __ai __attribute__((target("sm4"))) uint32x4_t vsm3ss1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 65909 | uint16x8_t __ret; | 65376 | uint32x4_t __ret; |
| 65910 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15); | 65377 | __ret = (uint32x4_t) __builtin_neon_vsm3ss1q_u32((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50); |
| 65911 | return __ret; | 65378 | return __ret; |
| 65912 | } | 65379 | } |
| 65913 | #else | 65380 | #else |
| 65914 | __ai uint16x8_t vuzp2q_u16(uint16x8_t __p0, uint16x8_t __p1) { | 65381 | __ai __attribute__((target("sm4"))) uint32x4_t vsm3ss1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 65915 | uint16x8_t __ret; | 65382 | uint32x4_t __ret; |
| 65916 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 65383 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65917 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 65384 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65918 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15); | 65385 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 65919 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 65386 | __ret = (uint32x4_t) __builtin_neon_vsm3ss1q_u32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50); |
| | 65387 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65920 | return __ret; | 65388 | return __ret; |
| 65921 | } | 65389 | } |
| 65922 | #endif | 65390 | #endif |
| 65923 | | 65391 | |
| 65924 | #ifdef __LITTLE_ENDIAN__ | 65392 | #ifdef __LITTLE_ENDIAN__ |
| 65925 | __ai int8x16_t vuzp2q_s8(int8x16_t __p0, int8x16_t __p1) { | 65393 | #define vsm3tt1aq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 65926 | int8x16_t __ret; | 65394 | uint32x4_t __ret; \ |
| 65927 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31); | 65395 | uint32x4_t __s0 = __p0; \ |
| 65928 | return __ret; | 65396 | uint32x4_t __s1 = __p1; \ |
| 65929 | } | 65397 | uint32x4_t __s2 = __p2; \ |
| | 65398 | __ret = (uint32x4_t) __builtin_neon_vsm3tt1aq_u32((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 50); \ |
| | 65399 | __ret; \ |
| | 65400 | }) |
| 65930 | #else | 65401 | #else |
| 65931 | __ai int8x16_t vuzp2q_s8(int8x16_t __p0, int8x16_t __p1) { | 65402 | #define vsm3tt1aq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 65932 | int8x16_t __ret; | 65403 | uint32x4_t __ret; \ |
| 65933 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65404 | uint32x4_t __s0 = __p0; \ |
| 65934 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65405 | uint32x4_t __s1 = __p1; \ |
| 65935 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31); | 65406 | uint32x4_t __s2 = __p2; \ |
| 65936 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65407 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 65937 | return __ret; | 65408 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 65938 | } | 65409 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| | 65410 | __ret = (uint32x4_t) __builtin_neon_vsm3tt1aq_u32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 50); \ |
| | 65411 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 65412 | __ret; \ |
| | 65413 | }) |
| 65939 | #endif | 65414 | #endif |
| 65940 | | 65415 | |
| 65941 | #ifdef __LITTLE_ENDIAN__ | 65416 | #ifdef __LITTLE_ENDIAN__ |
| 65942 | __ai float64x2_t vuzp2q_f64(float64x2_t __p0, float64x2_t __p1) { | 65417 | #define vsm3tt1bq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 65943 | float64x2_t __ret; | 65418 | uint32x4_t __ret; \ |
| 65944 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 65419 | uint32x4_t __s0 = __p0; \ |
| 65945 | return __ret; | 65420 | uint32x4_t __s1 = __p1; \ |
| 65946 | } | 65421 | uint32x4_t __s2 = __p2; \ |
| | 65422 | __ret = (uint32x4_t) __builtin_neon_vsm3tt1bq_u32((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 50); \ |
| | 65423 | __ret; \ |
| | 65424 | }) |
| 65947 | #else | 65425 | #else |
| 65948 | __ai float64x2_t vuzp2q_f64(float64x2_t __p0, float64x2_t __p1) { | 65426 | #define vsm3tt1bq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 65949 | float64x2_t __ret; | 65427 | uint32x4_t __ret; \ |
| 65950 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 65428 | uint32x4_t __s0 = __p0; \ |
| 65951 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 65429 | uint32x4_t __s1 = __p1; \ |
| 65952 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 65430 | uint32x4_t __s2 = __p2; \ |
| 65953 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 65431 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 65954 | return __ret; | 65432 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 65955 | } | 65433 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| | 65434 | __ret = (uint32x4_t) __builtin_neon_vsm3tt1bq_u32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 50); \ |
| | 65435 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 65436 | __ret; \ |
| | 65437 | }) |
| 65956 | #endif | 65438 | #endif |
| 65957 | | 65439 | |
| 65958 | #ifdef __LITTLE_ENDIAN__ | 65440 | #ifdef __LITTLE_ENDIAN__ |
| 65959 | __ai float32x4_t vuzp2q_f32(float32x4_t __p0, float32x4_t __p1) { | 65441 | #define vsm3tt2aq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 65960 | float32x4_t __ret; | 65442 | uint32x4_t __ret; \ |
| 65961 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7); | 65443 | uint32x4_t __s0 = __p0; \ |
| 65962 | return __ret; | 65444 | uint32x4_t __s1 = __p1; \ |
| 65963 | } | 65445 | uint32x4_t __s2 = __p2; \ |
| | 65446 | __ret = (uint32x4_t) __builtin_neon_vsm3tt2aq_u32((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 50); \ |
| | 65447 | __ret; \ |
| | 65448 | }) |
| 65964 | #else | 65449 | #else |
| 65965 | __ai float32x4_t vuzp2q_f32(float32x4_t __p0, float32x4_t __p1) { | 65450 | #define vsm3tt2aq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 65966 | float32x4_t __ret; | 65451 | uint32x4_t __ret; \ |
| 65967 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 65452 | uint32x4_t __s0 = __p0; \ |
| 65968 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 65453 | uint32x4_t __s1 = __p1; \ |
| 65969 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7); | 65454 | uint32x4_t __s2 = __p2; \ |
| 65970 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 65455 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 65971 | return __ret; | 65456 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 65972 | } | 65457 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| | 65458 | __ret = (uint32x4_t) __builtin_neon_vsm3tt2aq_u32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 50); \ |
| | 65459 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 65460 | __ret; \ |
| | 65461 | }) |
| | 65462 | #endif |
| | 65463 | |
| | 65464 | #ifdef __LITTLE_ENDIAN__ |
| | 65465 | #define vsm3tt2bq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 65466 | uint32x4_t __ret; \ |
| | 65467 | uint32x4_t __s0 = __p0; \ |
| | 65468 | uint32x4_t __s1 = __p1; \ |
| | 65469 | uint32x4_t __s2 = __p2; \ |
| | 65470 | __ret = (uint32x4_t) __builtin_neon_vsm3tt2bq_u32((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 50); \ |
| | 65471 | __ret; \ |
| | 65472 | }) |
| | 65473 | #else |
| | 65474 | #define vsm3tt2bq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| | 65475 | uint32x4_t __ret; \ |
| | 65476 | uint32x4_t __s0 = __p0; \ |
| | 65477 | uint32x4_t __s1 = __p1; \ |
| | 65478 | uint32x4_t __s2 = __p2; \ |
| | 65479 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| | 65480 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| | 65481 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| | 65482 | __ret = (uint32x4_t) __builtin_neon_vsm3tt2bq_u32((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 50); \ |
| | 65483 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| | 65484 | __ret; \ |
| | 65485 | }) |
| 65973 | #endif | 65486 | #endif |
| 65974 | | 65487 | |
| 65975 | #ifdef __LITTLE_ENDIAN__ | 65488 | #ifdef __LITTLE_ENDIAN__ |
| 65976 | __ai int32x4_t vuzp2q_s32(int32x4_t __p0, int32x4_t __p1) { | 65489 | __ai __attribute__((target("sm4"))) uint32x4_t vsm4eq_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 65977 | int32x4_t __ret; | 65490 | uint32x4_t __ret; |
| 65978 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7); | 65491 | __ret = (uint32x4_t) __builtin_neon_vsm4eq_u32((int8x16_t)__p0, (int8x16_t)__p1, 50); |
| 65979 | return __ret; | 65492 | return __ret; |
| 65980 | } | 65493 | } |
| 65981 | #else | 65494 | #else |
| 65982 | __ai int32x4_t vuzp2q_s32(int32x4_t __p0, int32x4_t __p1) { | 65495 | __ai __attribute__((target("sm4"))) uint32x4_t vsm4eq_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 65983 | int32x4_t __ret; | 65496 | uint32x4_t __ret; |
| 65984 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 65497 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 65985 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 65498 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 65986 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7); | 65499 | __ret = (uint32x4_t) __builtin_neon_vsm4eq_u32((int8x16_t)__rev0, (int8x16_t)__rev1, 50); |
| 65987 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 65500 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 65988 | return __ret; | 65501 | return __ret; |
| 65989 | } | 65502 | } |
| 65990 | #endif | 65503 | #endif |
| 65991 | | 65504 | |
| 65992 | #ifdef __LITTLE_ENDIAN__ | 65505 | #ifdef __LITTLE_ENDIAN__ |
| 65993 | __ai int64x2_t vuzp2q_s64(int64x2_t __p0, int64x2_t __p1) { | 65506 | __ai __attribute__((target("sm4"))) uint32x4_t vsm4ekeyq_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 65994 | int64x2_t __ret; | 65507 | uint32x4_t __ret; |
| 65995 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 65508 | __ret = (uint32x4_t) __builtin_neon_vsm4ekeyq_u32((int8x16_t)__p0, (int8x16_t)__p1, 50); |
| 65996 | return __ret; | 65509 | return __ret; |
| 65997 | } | 65510 | } |
| 65998 | #else | 65511 | #else |
| 65999 | __ai int64x2_t vuzp2q_s64(int64x2_t __p0, int64x2_t __p1) { | 65512 | __ai __attribute__((target("sm4"))) uint32x4_t vsm4ekeyq_u32(uint32x4_t __p0, uint32x4_t __p1) { |
| 66000 | int64x2_t __ret; | 65513 | uint32x4_t __ret; |
| 66001 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 65514 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 66002 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 65515 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 66003 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 65516 | __ret = (uint32x4_t) __builtin_neon_vsm4ekeyq_u32((int8x16_t)__rev0, (int8x16_t)__rev1, 50); |
| 66004 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 65517 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 66005 | return __ret; | 65518 | return __ret; |
| 66006 | } | 65519 | } |
| 66007 | #endif | 65520 | #endif |
| 66008 | | 65521 | |
| 66009 | #ifdef __LITTLE_ENDIAN__ | 65522 | __ai __attribute__((target("v8.1a"))) int32_t vqrdmlahs_s32(int32_t __p0, int32_t __p1, int32_t __p2) { |
| 66010 | __ai int16x8_t vuzp2q_s16(int16x8_t __p0, int16x8_t __p1) { | 65523 | int32_t __ret; |
| 66011 | int16x8_t __ret; | 65524 | __ret = (int32_t) __builtin_neon_vqrdmlahs_s32(__p0, __p1, __p2); |
| 66012 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15); | | |
| 66013 | return __ret; | 65525 | return __ret; |
| 66014 | } | 65526 | } |
| 66015 | #else | 65527 | __ai __attribute__((target("v8.1a"))) int16_t vqrdmlahh_s16(int16_t __p0, int16_t __p1, int16_t __p2) { |
| 66016 | __ai int16x8_t vuzp2q_s16(int16x8_t __p0, int16x8_t __p1) { | 65528 | int16_t __ret; |
| 66017 | int16x8_t __ret; | 65529 | __ret = (int16_t) __builtin_neon_vqrdmlahh_s16(__p0, __p1, __p2); |
| 66018 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 66019 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 66020 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15); | | |
| 66021 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 66022 | return __ret; | 65530 | return __ret; |
| 66023 | } | 65531 | } |
| 66024 | #endif | | |
| 66025 | | | |
| 66026 | #ifdef __LITTLE_ENDIAN__ | 65532 | #ifdef __LITTLE_ENDIAN__ |
| 66027 | __ai uint8x8_t vuzp2_u8(uint8x8_t __p0, uint8x8_t __p1) { | 65533 | #define vqrdmlahs_lane_s32(__p0_787, __p1_787, __p2_787, __p3_787) __extension__ ({ \ |
| 66028 | uint8x8_t __ret; | 65534 | int32_t __ret_787; \ |
| 66029 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15); | 65535 | int32_t __s0_787 = __p0_787; \ |
| 66030 | return __ret; | 65536 | int32_t __s1_787 = __p1_787; \ |
| 66031 | } | 65537 | int32x2_t __s2_787 = __p2_787; \ |
| | 65538 | __ret_787 = vqrdmlahs_s32(__s0_787, __s1_787, vget_lane_s32(__s2_787, __p3_787)); \ |
| | 65539 | __ret_787; \ |
| | 65540 | }) |
| 66032 | #else | 65541 | #else |
| 66033 | __ai uint8x8_t vuzp2_u8(uint8x8_t __p0, uint8x8_t __p1) { | 65542 | #define vqrdmlahs_lane_s32(__p0_788, __p1_788, __p2_788, __p3_788) __extension__ ({ \ |
| 66034 | uint8x8_t __ret; | 65543 | int32_t __ret_788; \ |
| 66035 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 65544 | int32_t __s0_788 = __p0_788; \ |
| 66036 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 65545 | int32_t __s1_788 = __p1_788; \ |
| 66037 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15); | 65546 | int32x2_t __s2_788 = __p2_788; \ |
| 66038 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 65547 | int32x2_t __rev2_788; __rev2_788 = __builtin_shufflevector(__s2_788, __s2_788, 1, 0); \ |
| 66039 | return __ret; | 65548 | __ret_788 = vqrdmlahs_s32(__s0_788, __s1_788, __noswap_vget_lane_s32(__rev2_788, __p3_788)); \ |
| 66040 | } | 65549 | __ret_788; \ |
| | 65550 | }) |
| 66041 | #endif | 65551 | #endif |
| 66042 | | 65552 | |
| 66043 | #ifdef __LITTLE_ENDIAN__ | 65553 | #ifdef __LITTLE_ENDIAN__ |
| 66044 | __ai uint32x2_t vuzp2_u32(uint32x2_t __p0, uint32x2_t __p1) { | 65554 | #define vqrdmlahh_lane_s16(__p0_789, __p1_789, __p2_789, __p3_789) __extension__ ({ \ |
| 66045 | uint32x2_t __ret; | 65555 | int16_t __ret_789; \ |
| 66046 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 65556 | int16_t __s0_789 = __p0_789; \ |
| 66047 | return __ret; | 65557 | int16_t __s1_789 = __p1_789; \ |
| 66048 | } | 65558 | int16x4_t __s2_789 = __p2_789; \ |
| | 65559 | __ret_789 = vqrdmlahh_s16(__s0_789, __s1_789, vget_lane_s16(__s2_789, __p3_789)); \ |
| | 65560 | __ret_789; \ |
| | 65561 | }) |
| 66049 | #else | 65562 | #else |
| 66050 | __ai uint32x2_t vuzp2_u32(uint32x2_t __p0, uint32x2_t __p1) { | 65563 | #define vqrdmlahh_lane_s16(__p0_790, __p1_790, __p2_790, __p3_790) __extension__ ({ \ |
| 66051 | uint32x2_t __ret; | 65564 | int16_t __ret_790; \ |
| 66052 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 65565 | int16_t __s0_790 = __p0_790; \ |
| 66053 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 65566 | int16_t __s1_790 = __p1_790; \ |
| 66054 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 65567 | int16x4_t __s2_790 = __p2_790; \ |
| 66055 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 65568 | int16x4_t __rev2_790; __rev2_790 = __builtin_shufflevector(__s2_790, __s2_790, 3, 2, 1, 0); \ |
| 66056 | return __ret; | 65569 | __ret_790 = vqrdmlahh_s16(__s0_790, __s1_790, __noswap_vget_lane_s16(__rev2_790, __p3_790)); \ |
| 66057 | } | 65570 | __ret_790; \ |
| | 65571 | }) |
| 66058 | #endif | 65572 | #endif |
| 66059 | | 65573 | |
| 66060 | #ifdef __LITTLE_ENDIAN__ | 65574 | #ifdef __LITTLE_ENDIAN__ |
| 66061 | __ai uint16x4_t vuzp2_u16(uint16x4_t __p0, uint16x4_t __p1) { | 65575 | #define vqrdmlahs_laneq_s32(__p0_791, __p1_791, __p2_791, __p3_791) __extension__ ({ \ |
| 66062 | uint16x4_t __ret; | 65576 | int32_t __ret_791; \ |
| 66063 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7); | 65577 | int32_t __s0_791 = __p0_791; \ |
| 66064 | return __ret; | 65578 | int32_t __s1_791 = __p1_791; \ |
| 66065 | } | 65579 | int32x4_t __s2_791 = __p2_791; \ |
| | 65580 | __ret_791 = vqrdmlahs_s32(__s0_791, __s1_791, vgetq_lane_s32(__s2_791, __p3_791)); \ |
| | 65581 | __ret_791; \ |
| | 65582 | }) |
| 66066 | #else | 65583 | #else |
| 66067 | __ai uint16x4_t vuzp2_u16(uint16x4_t __p0, uint16x4_t __p1) { | 65584 | #define vqrdmlahs_laneq_s32(__p0_792, __p1_792, __p2_792, __p3_792) __extension__ ({ \ |
| 66068 | uint16x4_t __ret; | 65585 | int32_t __ret_792; \ |
| 66069 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 65586 | int32_t __s0_792 = __p0_792; \ |
| 66070 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 65587 | int32_t __s1_792 = __p1_792; \ |
| 66071 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7); | 65588 | int32x4_t __s2_792 = __p2_792; \ |
| 66072 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 65589 | int32x4_t __rev2_792; __rev2_792 = __builtin_shufflevector(__s2_792, __s2_792, 3, 2, 1, 0); \ |
| 66073 | return __ret; | 65590 | __ret_792 = vqrdmlahs_s32(__s0_792, __s1_792, __noswap_vgetq_lane_s32(__rev2_792, __p3_792)); \ |
| 66074 | } | 65591 | __ret_792; \ |
| | 65592 | }) |
| 66075 | #endif | 65593 | #endif |
| 66076 | | 65594 | |
| 66077 | #ifdef __LITTLE_ENDIAN__ | 65595 | #ifdef __LITTLE_ENDIAN__ |
| 66078 | __ai int8x8_t vuzp2_s8(int8x8_t __p0, int8x8_t __p1) { | 65596 | #define vqrdmlahh_laneq_s16(__p0_793, __p1_793, __p2_793, __p3_793) __extension__ ({ \ |
| 66079 | int8x8_t __ret; | 65597 | int16_t __ret_793; \ |
| 66080 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7, 9, 11, 13, 15); | 65598 | int16_t __s0_793 = __p0_793; \ |
| 66081 | return __ret; | 65599 | int16_t __s1_793 = __p1_793; \ |
| 66082 | } | 65600 | int16x8_t __s2_793 = __p2_793; \ |
| | 65601 | __ret_793 = vqrdmlahh_s16(__s0_793, __s1_793, vgetq_lane_s16(__s2_793, __p3_793)); \ |
| | 65602 | __ret_793; \ |
| | 65603 | }) |
| 66083 | #else | 65604 | #else |
| 66084 | __ai int8x8_t vuzp2_s8(int8x8_t __p0, int8x8_t __p1) { | 65605 | #define vqrdmlahh_laneq_s16(__p0_794, __p1_794, __p2_794, __p3_794) __extension__ ({ \ |
| 66085 | int8x8_t __ret; | 65606 | int16_t __ret_794; \ |
| 66086 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 65607 | int16_t __s0_794 = __p0_794; \ |
| 66087 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 65608 | int16_t __s1_794 = __p1_794; \ |
| 66088 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7, 9, 11, 13, 15); | 65609 | int16x8_t __s2_794 = __p2_794; \ |
| 66089 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 65610 | int16x8_t __rev2_794; __rev2_794 = __builtin_shufflevector(__s2_794, __s2_794, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66090 | return __ret; | 65611 | __ret_794 = vqrdmlahh_s16(__s0_794, __s1_794, __noswap_vgetq_lane_s16(__rev2_794, __p3_794)); \ |
| 66091 | } | 65612 | __ret_794; \ |
| | 65613 | }) |
| 66092 | #endif | 65614 | #endif |
| 66093 | | 65615 | |
| 66094 | #ifdef __LITTLE_ENDIAN__ | 65616 | #ifdef __LITTLE_ENDIAN__ |
| 66095 | __ai float32x2_t vuzp2_f32(float32x2_t __p0, float32x2_t __p1) { | 65617 | #define vqrdmlahq_laneq_s32(__p0_795, __p1_795, __p2_795, __p3_795) __extension__ ({ \ |
| 66096 | float32x2_t __ret; | 65618 | int32x4_t __ret_795; \ |
| 66097 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 65619 | int32x4_t __s0_795 = __p0_795; \ |
| 66098 | return __ret; | 65620 | int32x4_t __s1_795 = __p1_795; \ |
| 66099 | } | 65621 | int32x4_t __s2_795 = __p2_795; \ |
| | 65622 | __ret_795 = vqrdmlahq_s32(__s0_795, __s1_795, splatq_laneq_s32(__s2_795, __p3_795)); \ |
| | 65623 | __ret_795; \ |
| | 65624 | }) |
| 66100 | #else | 65625 | #else |
| 66101 | __ai float32x2_t vuzp2_f32(float32x2_t __p0, float32x2_t __p1) { | 65626 | #define vqrdmlahq_laneq_s32(__p0_796, __p1_796, __p2_796, __p3_796) __extension__ ({ \ |
| 66102 | float32x2_t __ret; | 65627 | int32x4_t __ret_796; \ |
| 66103 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 65628 | int32x4_t __s0_796 = __p0_796; \ |
| 66104 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 65629 | int32x4_t __s1_796 = __p1_796; \ |
| 66105 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 65630 | int32x4_t __s2_796 = __p2_796; \ |
| 66106 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 65631 | int32x4_t __rev0_796; __rev0_796 = __builtin_shufflevector(__s0_796, __s0_796, 3, 2, 1, 0); \ |
| 66107 | return __ret; | 65632 | int32x4_t __rev1_796; __rev1_796 = __builtin_shufflevector(__s1_796, __s1_796, 3, 2, 1, 0); \ |
| 66108 | } | 65633 | int32x4_t __rev2_796; __rev2_796 = __builtin_shufflevector(__s2_796, __s2_796, 3, 2, 1, 0); \ |
| | 65634 | __ret_796 = __noswap_vqrdmlahq_s32(__rev0_796, __rev1_796, __noswap_splatq_laneq_s32(__rev2_796, __p3_796)); \ |
| | 65635 | __ret_796 = __builtin_shufflevector(__ret_796, __ret_796, 3, 2, 1, 0); \ |
| | 65636 | __ret_796; \ |
| | 65637 | }) |
| 66109 | #endif | 65638 | #endif |
| 66110 | | 65639 | |
| 66111 | #ifdef __LITTLE_ENDIAN__ | 65640 | #ifdef __LITTLE_ENDIAN__ |
| 66112 | __ai int32x2_t vuzp2_s32(int32x2_t __p0, int32x2_t __p1) { | 65641 | #define vqrdmlahq_laneq_s16(__p0_797, __p1_797, __p2_797, __p3_797) __extension__ ({ \ |
| 66113 | int32x2_t __ret; | 65642 | int16x8_t __ret_797; \ |
| 66114 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 65643 | int16x8_t __s0_797 = __p0_797; \ |
| 66115 | return __ret; | 65644 | int16x8_t __s1_797 = __p1_797; \ |
| 66116 | } | 65645 | int16x8_t __s2_797 = __p2_797; \ |
| | 65646 | __ret_797 = vqrdmlahq_s16(__s0_797, __s1_797, splatq_laneq_s16(__s2_797, __p3_797)); \ |
| | 65647 | __ret_797; \ |
| | 65648 | }) |
| 66117 | #else | 65649 | #else |
| 66118 | __ai int32x2_t vuzp2_s32(int32x2_t __p0, int32x2_t __p1) { | 65650 | #define vqrdmlahq_laneq_s16(__p0_798, __p1_798, __p2_798, __p3_798) __extension__ ({ \ |
| 66119 | int32x2_t __ret; | 65651 | int16x8_t __ret_798; \ |
| 66120 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 65652 | int16x8_t __s0_798 = __p0_798; \ |
| 66121 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 65653 | int16x8_t __s1_798 = __p1_798; \ |
| 66122 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 65654 | int16x8_t __s2_798 = __p2_798; \ |
| 66123 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 65655 | int16x8_t __rev0_798; __rev0_798 = __builtin_shufflevector(__s0_798, __s0_798, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66124 | return __ret; | 65656 | int16x8_t __rev1_798; __rev1_798 = __builtin_shufflevector(__s1_798, __s1_798, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66125 | } | 65657 | int16x8_t __rev2_798; __rev2_798 = __builtin_shufflevector(__s2_798, __s2_798, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 65658 | __ret_798 = __noswap_vqrdmlahq_s16(__rev0_798, __rev1_798, __noswap_splatq_laneq_s16(__rev2_798, __p3_798)); \ |
| | 65659 | __ret_798 = __builtin_shufflevector(__ret_798, __ret_798, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 65660 | __ret_798; \ |
| | 65661 | }) |
| 66126 | #endif | 65662 | #endif |
| 66127 | | 65663 | |
| 66128 | #ifdef __LITTLE_ENDIAN__ | 65664 | #ifdef __LITTLE_ENDIAN__ |
| 66129 | __ai int16x4_t vuzp2_s16(int16x4_t __p0, int16x4_t __p1) { | 65665 | #define vqrdmlah_laneq_s32(__p0_799, __p1_799, __p2_799, __p3_799) __extension__ ({ \ |
| 66130 | int16x4_t __ret; | 65666 | int32x2_t __ret_799; \ |
| 66131 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3, 5, 7); | 65667 | int32x2_t __s0_799 = __p0_799; \ |
| 66132 | return __ret; | 65668 | int32x2_t __s1_799 = __p1_799; \ |
| 66133 | } | 65669 | int32x4_t __s2_799 = __p2_799; \ |
| | 65670 | __ret_799 = vqrdmlah_s32(__s0_799, __s1_799, splat_laneq_s32(__s2_799, __p3_799)); \ |
| | 65671 | __ret_799; \ |
| | 65672 | }) |
| 66134 | #else | 65673 | #else |
| 66135 | __ai int16x4_t vuzp2_s16(int16x4_t __p0, int16x4_t __p1) { | 65674 | #define vqrdmlah_laneq_s32(__p0_800, __p1_800, __p2_800, __p3_800) __extension__ ({ \ |
| 66136 | int16x4_t __ret; | 65675 | int32x2_t __ret_800; \ |
| 66137 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 65676 | int32x2_t __s0_800 = __p0_800; \ |
| 66138 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 65677 | int32x2_t __s1_800 = __p1_800; \ |
| 66139 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3, 5, 7); | 65678 | int32x4_t __s2_800 = __p2_800; \ |
| 66140 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 65679 | int32x2_t __rev0_800; __rev0_800 = __builtin_shufflevector(__s0_800, __s0_800, 1, 0); \ |
| 66141 | return __ret; | 65680 | int32x2_t __rev1_800; __rev1_800 = __builtin_shufflevector(__s1_800, __s1_800, 1, 0); \ |
| 66142 | } | 65681 | int32x4_t __rev2_800; __rev2_800 = __builtin_shufflevector(__s2_800, __s2_800, 3, 2, 1, 0); \ |
| | 65682 | __ret_800 = __noswap_vqrdmlah_s32(__rev0_800, __rev1_800, __noswap_splat_laneq_s32(__rev2_800, __p3_800)); \ |
| | 65683 | __ret_800 = __builtin_shufflevector(__ret_800, __ret_800, 1, 0); \ |
| | 65684 | __ret_800; \ |
| | 65685 | }) |
| 66143 | #endif | 65686 | #endif |
| 66144 | | 65687 | |
| 66145 | #ifdef __LITTLE_ENDIAN__ | 65688 | #ifdef __LITTLE_ENDIAN__ |
| 66146 | __ai poly8x8_t vzip1_p8(poly8x8_t __p0, poly8x8_t __p1) { | 65689 | #define vqrdmlah_laneq_s16(__p0_801, __p1_801, __p2_801, __p3_801) __extension__ ({ \ |
| 66147 | poly8x8_t __ret; | 65690 | int16x4_t __ret_801; \ |
| 66148 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 1, 9, 2, 10, 3, 11); | 65691 | int16x4_t __s0_801 = __p0_801; \ |
| 66149 | return __ret; | 65692 | int16x4_t __s1_801 = __p1_801; \ |
| 66150 | } | 65693 | int16x8_t __s2_801 = __p2_801; \ |
| | 65694 | __ret_801 = vqrdmlah_s16(__s0_801, __s1_801, splat_laneq_s16(__s2_801, __p3_801)); \ |
| | 65695 | __ret_801; \ |
| | 65696 | }) |
| 66151 | #else | 65697 | #else |
| 66152 | __ai poly8x8_t vzip1_p8(poly8x8_t __p0, poly8x8_t __p1) { | 65698 | #define vqrdmlah_laneq_s16(__p0_802, __p1_802, __p2_802, __p3_802) __extension__ ({ \ |
| 66153 | poly8x8_t __ret; | 65699 | int16x4_t __ret_802; \ |
| 66154 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 65700 | int16x4_t __s0_802 = __p0_802; \ |
| 66155 | poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 65701 | int16x4_t __s1_802 = __p1_802; \ |
| 66156 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 1, 9, 2, 10, 3, 11); | 65702 | int16x8_t __s2_802 = __p2_802; \ |
| 66157 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 65703 | int16x4_t __rev0_802; __rev0_802 = __builtin_shufflevector(__s0_802, __s0_802, 3, 2, 1, 0); \ |
| 66158 | return __ret; | 65704 | int16x4_t __rev1_802; __rev1_802 = __builtin_shufflevector(__s1_802, __s1_802, 3, 2, 1, 0); \ |
| 66159 | } | 65705 | int16x8_t __rev2_802; __rev2_802 = __builtin_shufflevector(__s2_802, __s2_802, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 65706 | __ret_802 = __noswap_vqrdmlah_s16(__rev0_802, __rev1_802, __noswap_splat_laneq_s16(__rev2_802, __p3_802)); \ |
| | 65707 | __ret_802 = __builtin_shufflevector(__ret_802, __ret_802, 3, 2, 1, 0); \ |
| | 65708 | __ret_802; \ |
| | 65709 | }) |
| 66160 | #endif | 65710 | #endif |
| 66161 | | 65711 | |
| 66162 | #ifdef __LITTLE_ENDIAN__ | 65712 | __ai __attribute__((target("v8.1a"))) int32_t vqrdmlshs_s32(int32_t __p0, int32_t __p1, int32_t __p2) { |
| 66163 | __ai poly16x4_t vzip1_p16(poly16x4_t __p0, poly16x4_t __p1) { | 65713 | int32_t __ret; |
| 66164 | poly16x4_t __ret; | 65714 | __ret = (int32_t) __builtin_neon_vqrdmlshs_s32(__p0, __p1, __p2); |
| 66165 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 1, 5); | | |
| 66166 | return __ret; | 65715 | return __ret; |
| 66167 | } | 65716 | } |
| 66168 | #else | 65717 | __ai __attribute__((target("v8.1a"))) int16_t vqrdmlshh_s16(int16_t __p0, int16_t __p1, int16_t __p2) { |
| 66169 | __ai poly16x4_t vzip1_p16(poly16x4_t __p0, poly16x4_t __p1) { | 65718 | int16_t __ret; |
| 66170 | poly16x4_t __ret; | 65719 | __ret = (int16_t) __builtin_neon_vqrdmlshh_s16(__p0, __p1, __p2); |
| 66171 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | | |
| 66172 | poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | | |
| 66173 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 1, 5); | | |
| 66174 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 66175 | return __ret; | 65720 | return __ret; |
| 66176 | } | 65721 | } |
| | 65722 | #ifdef __LITTLE_ENDIAN__ |
| | 65723 | #define vqrdmlshs_lane_s32(__p0_803, __p1_803, __p2_803, __p3_803) __extension__ ({ \ |
| | 65724 | int32_t __ret_803; \ |
| | 65725 | int32_t __s0_803 = __p0_803; \ |
| | 65726 | int32_t __s1_803 = __p1_803; \ |
| | 65727 | int32x2_t __s2_803 = __p2_803; \ |
| | 65728 | __ret_803 = vqrdmlshs_s32(__s0_803, __s1_803, vget_lane_s32(__s2_803, __p3_803)); \ |
| | 65729 | __ret_803; \ |
| | 65730 | }) |
| | 65731 | #else |
| | 65732 | #define vqrdmlshs_lane_s32(__p0_804, __p1_804, __p2_804, __p3_804) __extension__ ({ \ |
| | 65733 | int32_t __ret_804; \ |
| | 65734 | int32_t __s0_804 = __p0_804; \ |
| | 65735 | int32_t __s1_804 = __p1_804; \ |
| | 65736 | int32x2_t __s2_804 = __p2_804; \ |
| | 65737 | int32x2_t __rev2_804; __rev2_804 = __builtin_shufflevector(__s2_804, __s2_804, 1, 0); \ |
| | 65738 | __ret_804 = vqrdmlshs_s32(__s0_804, __s1_804, __noswap_vget_lane_s32(__rev2_804, __p3_804)); \ |
| | 65739 | __ret_804; \ |
| | 65740 | }) |
| 66177 | #endif | 65741 | #endif |
| 66178 | | 65742 | |
| 66179 | #ifdef __LITTLE_ENDIAN__ | 65743 | #ifdef __LITTLE_ENDIAN__ |
| 66180 | __ai poly8x16_t vzip1q_p8(poly8x16_t __p0, poly8x16_t __p1) { | 65744 | #define vqrdmlshh_lane_s16(__p0_805, __p1_805, __p2_805, __p3_805) __extension__ ({ \ |
| 66181 | poly8x16_t __ret; | 65745 | int16_t __ret_805; \ |
| 66182 | __ret = __builtin_shufflevector(__p0, __p1, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); | 65746 | int16_t __s0_805 = __p0_805; \ |
| 66183 | return __ret; | 65747 | int16_t __s1_805 = __p1_805; \ |
| 66184 | } | 65748 | int16x4_t __s2_805 = __p2_805; \ |
| | 65749 | __ret_805 = vqrdmlshh_s16(__s0_805, __s1_805, vget_lane_s16(__s2_805, __p3_805)); \ |
| | 65750 | __ret_805; \ |
| | 65751 | }) |
| 66185 | #else | 65752 | #else |
| 66186 | __ai poly8x16_t vzip1q_p8(poly8x16_t __p0, poly8x16_t __p1) { | 65753 | #define vqrdmlshh_lane_s16(__p0_806, __p1_806, __p2_806, __p3_806) __extension__ ({ \ |
| 66187 | poly8x16_t __ret; | 65754 | int16_t __ret_806; \ |
| 66188 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65755 | int16_t __s0_806 = __p0_806; \ |
| 66189 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65756 | int16_t __s1_806 = __p1_806; \ |
| 66190 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); | 65757 | int16x4_t __s2_806 = __p2_806; \ |
| 66191 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65758 | int16x4_t __rev2_806; __rev2_806 = __builtin_shufflevector(__s2_806, __s2_806, 3, 2, 1, 0); \ |
| 66192 | return __ret; | 65759 | __ret_806 = vqrdmlshh_s16(__s0_806, __s1_806, __noswap_vget_lane_s16(__rev2_806, __p3_806)); \ |
| 66193 | } | 65760 | __ret_806; \ |
| | 65761 | }) |
| 66194 | #endif | 65762 | #endif |
| 66195 | | 65763 | |
| 66196 | #ifdef __LITTLE_ENDIAN__ | 65764 | #ifdef __LITTLE_ENDIAN__ |
| 66197 | __ai poly64x2_t vzip1q_p64(poly64x2_t __p0, poly64x2_t __p1) { | 65765 | #define vqrdmlshs_laneq_s32(__p0_807, __p1_807, __p2_807, __p3_807) __extension__ ({ \ |
| 66198 | poly64x2_t __ret; | 65766 | int32_t __ret_807; \ |
| 66199 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 65767 | int32_t __s0_807 = __p0_807; \ |
| 66200 | return __ret; | 65768 | int32_t __s1_807 = __p1_807; \ |
| 66201 | } | 65769 | int32x4_t __s2_807 = __p2_807; \ |
| | 65770 | __ret_807 = vqrdmlshs_s32(__s0_807, __s1_807, vgetq_lane_s32(__s2_807, __p3_807)); \ |
| | 65771 | __ret_807; \ |
| | 65772 | }) |
| 66202 | #else | 65773 | #else |
| 66203 | __ai poly64x2_t vzip1q_p64(poly64x2_t __p0, poly64x2_t __p1) { | 65774 | #define vqrdmlshs_laneq_s32(__p0_808, __p1_808, __p2_808, __p3_808) __extension__ ({ \ |
| 66204 | poly64x2_t __ret; | 65775 | int32_t __ret_808; \ |
| 66205 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 65776 | int32_t __s0_808 = __p0_808; \ |
| 66206 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 65777 | int32_t __s1_808 = __p1_808; \ |
| 66207 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 65778 | int32x4_t __s2_808 = __p2_808; \ |
| 66208 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 65779 | int32x4_t __rev2_808; __rev2_808 = __builtin_shufflevector(__s2_808, __s2_808, 3, 2, 1, 0); \ |
| 66209 | return __ret; | 65780 | __ret_808 = vqrdmlshs_s32(__s0_808, __s1_808, __noswap_vgetq_lane_s32(__rev2_808, __p3_808)); \ |
| 66210 | } | 65781 | __ret_808; \ |
| | 65782 | }) |
| 66211 | #endif | 65783 | #endif |
| 66212 | | 65784 | |
| 66213 | #ifdef __LITTLE_ENDIAN__ | 65785 | #ifdef __LITTLE_ENDIAN__ |
| 66214 | __ai poly16x8_t vzip1q_p16(poly16x8_t __p0, poly16x8_t __p1) { | 65786 | #define vqrdmlshh_laneq_s16(__p0_809, __p1_809, __p2_809, __p3_809) __extension__ ({ \ |
| 66215 | poly16x8_t __ret; | 65787 | int16_t __ret_809; \ |
| 66216 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 1, 9, 2, 10, 3, 11); | 65788 | int16_t __s0_809 = __p0_809; \ |
| 66217 | return __ret; | 65789 | int16_t __s1_809 = __p1_809; \ |
| 66218 | } | 65790 | int16x8_t __s2_809 = __p2_809; \ |
| | 65791 | __ret_809 = vqrdmlshh_s16(__s0_809, __s1_809, vgetq_lane_s16(__s2_809, __p3_809)); \ |
| | 65792 | __ret_809; \ |
| | 65793 | }) |
| 66219 | #else | 65794 | #else |
| 66220 | __ai poly16x8_t vzip1q_p16(poly16x8_t __p0, poly16x8_t __p1) { | 65795 | #define vqrdmlshh_laneq_s16(__p0_810, __p1_810, __p2_810, __p3_810) __extension__ ({ \ |
| 66221 | poly16x8_t __ret; | 65796 | int16_t __ret_810; \ |
| 66222 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 65797 | int16_t __s0_810 = __p0_810; \ |
| 66223 | poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 65798 | int16_t __s1_810 = __p1_810; \ |
| 66224 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 1, 9, 2, 10, 3, 11); | 65799 | int16x8_t __s2_810 = __p2_810; \ |
| 66225 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 65800 | int16x8_t __rev2_810; __rev2_810 = __builtin_shufflevector(__s2_810, __s2_810, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66226 | return __ret; | 65801 | __ret_810 = vqrdmlshh_s16(__s0_810, __s1_810, __noswap_vgetq_lane_s16(__rev2_810, __p3_810)); \ |
| 66227 | } | 65802 | __ret_810; \ |
| | 65803 | }) |
| 66228 | #endif | 65804 | #endif |
| 66229 | | 65805 | |
| 66230 | #ifdef __LITTLE_ENDIAN__ | 65806 | #ifdef __LITTLE_ENDIAN__ |
| 66231 | __ai uint8x16_t vzip1q_u8(uint8x16_t __p0, uint8x16_t __p1) { | 65807 | #define vqrdmlshq_laneq_s32(__p0_811, __p1_811, __p2_811, __p3_811) __extension__ ({ \ |
| 66232 | uint8x16_t __ret; | 65808 | int32x4_t __ret_811; \ |
| 66233 | __ret = __builtin_shufflevector(__p0, __p1, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); | 65809 | int32x4_t __s0_811 = __p0_811; \ |
| 66234 | return __ret; | 65810 | int32x4_t __s1_811 = __p1_811; \ |
| 66235 | } | 65811 | int32x4_t __s2_811 = __p2_811; \ |
| | 65812 | __ret_811 = vqrdmlshq_s32(__s0_811, __s1_811, splatq_laneq_s32(__s2_811, __p3_811)); \ |
| | 65813 | __ret_811; \ |
| | 65814 | }) |
| 66236 | #else | 65815 | #else |
| 66237 | __ai uint8x16_t vzip1q_u8(uint8x16_t __p0, uint8x16_t __p1) { | 65816 | #define vqrdmlshq_laneq_s32(__p0_812, __p1_812, __p2_812, __p3_812) __extension__ ({ \ |
| 66238 | uint8x16_t __ret; | 65817 | int32x4_t __ret_812; \ |
| 66239 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65818 | int32x4_t __s0_812 = __p0_812; \ |
| 66240 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65819 | int32x4_t __s1_812 = __p1_812; \ |
| 66241 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); | 65820 | int32x4_t __s2_812 = __p2_812; \ |
| 66242 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65821 | int32x4_t __rev0_812; __rev0_812 = __builtin_shufflevector(__s0_812, __s0_812, 3, 2, 1, 0); \ |
| 66243 | return __ret; | 65822 | int32x4_t __rev1_812; __rev1_812 = __builtin_shufflevector(__s1_812, __s1_812, 3, 2, 1, 0); \ |
| 66244 | } | 65823 | int32x4_t __rev2_812; __rev2_812 = __builtin_shufflevector(__s2_812, __s2_812, 3, 2, 1, 0); \ |
| | 65824 | __ret_812 = __noswap_vqrdmlshq_s32(__rev0_812, __rev1_812, __noswap_splatq_laneq_s32(__rev2_812, __p3_812)); \ |
| | 65825 | __ret_812 = __builtin_shufflevector(__ret_812, __ret_812, 3, 2, 1, 0); \ |
| | 65826 | __ret_812; \ |
| | 65827 | }) |
| 66245 | #endif | 65828 | #endif |
| 66246 | | 65829 | |
| 66247 | #ifdef __LITTLE_ENDIAN__ | 65830 | #ifdef __LITTLE_ENDIAN__ |
| 66248 | __ai uint32x4_t vzip1q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 65831 | #define vqrdmlshq_laneq_s16(__p0_813, __p1_813, __p2_813, __p3_813) __extension__ ({ \ |
| 66249 | uint32x4_t __ret; | 65832 | int16x8_t __ret_813; \ |
| 66250 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 1, 5); | 65833 | int16x8_t __s0_813 = __p0_813; \ |
| 66251 | return __ret; | 65834 | int16x8_t __s1_813 = __p1_813; \ |
| 66252 | } | 65835 | int16x8_t __s2_813 = __p2_813; \ |
| | 65836 | __ret_813 = vqrdmlshq_s16(__s0_813, __s1_813, splatq_laneq_s16(__s2_813, __p3_813)); \ |
| | 65837 | __ret_813; \ |
| | 65838 | }) |
| 66253 | #else | 65839 | #else |
| 66254 | __ai uint32x4_t vzip1q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 65840 | #define vqrdmlshq_laneq_s16(__p0_814, __p1_814, __p2_814, __p3_814) __extension__ ({ \ |
| 66255 | uint32x4_t __ret; | 65841 | int16x8_t __ret_814; \ |
| 66256 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 65842 | int16x8_t __s0_814 = __p0_814; \ |
| 66257 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 65843 | int16x8_t __s1_814 = __p1_814; \ |
| 66258 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 1, 5); | 65844 | int16x8_t __s2_814 = __p2_814; \ |
| 66259 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 65845 | int16x8_t __rev0_814; __rev0_814 = __builtin_shufflevector(__s0_814, __s0_814, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66260 | return __ret; | 65846 | int16x8_t __rev1_814; __rev1_814 = __builtin_shufflevector(__s1_814, __s1_814, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66261 | } | 65847 | int16x8_t __rev2_814; __rev2_814 = __builtin_shufflevector(__s2_814, __s2_814, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 65848 | __ret_814 = __noswap_vqrdmlshq_s16(__rev0_814, __rev1_814, __noswap_splatq_laneq_s16(__rev2_814, __p3_814)); \ |
| | 65849 | __ret_814 = __builtin_shufflevector(__ret_814, __ret_814, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 65850 | __ret_814; \ |
| | 65851 | }) |
| 66262 | #endif | 65852 | #endif |
| 66263 | | 65853 | |
| 66264 | #ifdef __LITTLE_ENDIAN__ | 65854 | #ifdef __LITTLE_ENDIAN__ |
| 66265 | __ai uint64x2_t vzip1q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 65855 | #define vqrdmlsh_laneq_s32(__p0_815, __p1_815, __p2_815, __p3_815) __extension__ ({ \ |
| 66266 | uint64x2_t __ret; | 65856 | int32x2_t __ret_815; \ |
| 66267 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 65857 | int32x2_t __s0_815 = __p0_815; \ |
| 66268 | return __ret; | 65858 | int32x2_t __s1_815 = __p1_815; \ |
| 66269 | } | 65859 | int32x4_t __s2_815 = __p2_815; \ |
| | 65860 | __ret_815 = vqrdmlsh_s32(__s0_815, __s1_815, splat_laneq_s32(__s2_815, __p3_815)); \ |
| | 65861 | __ret_815; \ |
| | 65862 | }) |
| 66270 | #else | 65863 | #else |
| 66271 | __ai uint64x2_t vzip1q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 65864 | #define vqrdmlsh_laneq_s32(__p0_816, __p1_816, __p2_816, __p3_816) __extension__ ({ \ |
| 66272 | uint64x2_t __ret; | 65865 | int32x2_t __ret_816; \ |
| 66273 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 65866 | int32x2_t __s0_816 = __p0_816; \ |
| 66274 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 65867 | int32x2_t __s1_816 = __p1_816; \ |
| 66275 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 65868 | int32x4_t __s2_816 = __p2_816; \ |
| 66276 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 65869 | int32x2_t __rev0_816; __rev0_816 = __builtin_shufflevector(__s0_816, __s0_816, 1, 0); \ |
| 66277 | return __ret; | 65870 | int32x2_t __rev1_816; __rev1_816 = __builtin_shufflevector(__s1_816, __s1_816, 1, 0); \ |
| 66278 | } | 65871 | int32x4_t __rev2_816; __rev2_816 = __builtin_shufflevector(__s2_816, __s2_816, 3, 2, 1, 0); \ |
| | 65872 | __ret_816 = __noswap_vqrdmlsh_s32(__rev0_816, __rev1_816, __noswap_splat_laneq_s32(__rev2_816, __p3_816)); \ |
| | 65873 | __ret_816 = __builtin_shufflevector(__ret_816, __ret_816, 1, 0); \ |
| | 65874 | __ret_816; \ |
| | 65875 | }) |
| 66279 | #endif | 65876 | #endif |
| 66280 | | 65877 | |
| 66281 | #ifdef __LITTLE_ENDIAN__ | 65878 | #ifdef __LITTLE_ENDIAN__ |
| 66282 | __ai uint16x8_t vzip1q_u16(uint16x8_t __p0, uint16x8_t __p1) { | 65879 | #define vqrdmlsh_laneq_s16(__p0_817, __p1_817, __p2_817, __p3_817) __extension__ ({ \ |
| 66283 | uint16x8_t __ret; | 65880 | int16x4_t __ret_817; \ |
| 66284 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 1, 9, 2, 10, 3, 11); | 65881 | int16x4_t __s0_817 = __p0_817; \ |
| 66285 | return __ret; | 65882 | int16x4_t __s1_817 = __p1_817; \ |
| 66286 | } | 65883 | int16x8_t __s2_817 = __p2_817; \ |
| | 65884 | __ret_817 = vqrdmlsh_s16(__s0_817, __s1_817, splat_laneq_s16(__s2_817, __p3_817)); \ |
| | 65885 | __ret_817; \ |
| | 65886 | }) |
| 66287 | #else | 65887 | #else |
| 66288 | __ai uint16x8_t vzip1q_u16(uint16x8_t __p0, uint16x8_t __p1) { | 65888 | #define vqrdmlsh_laneq_s16(__p0_818, __p1_818, __p2_818, __p3_818) __extension__ ({ \ |
| 66289 | uint16x8_t __ret; | 65889 | int16x4_t __ret_818; \ |
| 66290 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 65890 | int16x4_t __s0_818 = __p0_818; \ |
| 66291 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 65891 | int16x4_t __s1_818 = __p1_818; \ |
| 66292 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 1, 9, 2, 10, 3, 11); | 65892 | int16x8_t __s2_818 = __p2_818; \ |
| 66293 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 65893 | int16x4_t __rev0_818; __rev0_818 = __builtin_shufflevector(__s0_818, __s0_818, 3, 2, 1, 0); \ |
| 66294 | return __ret; | 65894 | int16x4_t __rev1_818; __rev1_818 = __builtin_shufflevector(__s1_818, __s1_818, 3, 2, 1, 0); \ |
| 66295 | } | 65895 | int16x8_t __rev2_818; __rev2_818 = __builtin_shufflevector(__s2_818, __s2_818, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 65896 | __ret_818 = __noswap_vqrdmlsh_s16(__rev0_818, __rev1_818, __noswap_splat_laneq_s16(__rev2_818, __p3_818)); \ |
| | 65897 | __ret_818 = __builtin_shufflevector(__ret_818, __ret_818, 3, 2, 1, 0); \ |
| | 65898 | __ret_818; \ |
| | 65899 | }) |
| 66296 | #endif | 65900 | #endif |
| 66297 | | 65901 | |
| 66298 | #ifdef __LITTLE_ENDIAN__ | 65902 | #ifdef __LITTLE_ENDIAN__ |
| 66299 | __ai int8x16_t vzip1q_s8(int8x16_t __p0, int8x16_t __p1) { | 65903 | __ai __attribute__((target("v8.3a"))) float64x2_t vcaddq_rot270_f64(float64x2_t __p0, float64x2_t __p1) { |
| 66300 | int8x16_t __ret; | 65904 | float64x2_t __ret; |
| 66301 | __ret = __builtin_shufflevector(__p0, __p1, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); | 65905 | __ret = (float64x2_t) __builtin_neon_vcaddq_rot270_f64((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| 66302 | return __ret; | 65906 | return __ret; |
| 66303 | } | 65907 | } |
| 66304 | #else | 65908 | #else |
| 66305 | __ai int8x16_t vzip1q_s8(int8x16_t __p0, int8x16_t __p1) { | 65909 | __ai __attribute__((target("v8.3a"))) float64x2_t vcaddq_rot270_f64(float64x2_t __p0, float64x2_t __p1) { |
| 66306 | int8x16_t __ret; | 65910 | float64x2_t __ret; |
| 66307 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65911 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66308 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65912 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 66309 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); | 65913 | __ret = (float64x2_t) __builtin_neon_vcaddq_rot270_f64((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| 66310 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 65914 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66311 | return __ret; | 65915 | return __ret; |
| 66312 | } | 65916 | } |
| 66313 | #endif | 65917 | #endif |
| 66314 | | 65918 | |
| 66315 | #ifdef __LITTLE_ENDIAN__ | 65919 | #ifdef __LITTLE_ENDIAN__ |
| 66316 | __ai float64x2_t vzip1q_f64(float64x2_t __p0, float64x2_t __p1) { | 65920 | __ai __attribute__((target("v8.3a"))) float64x2_t vcaddq_rot90_f64(float64x2_t __p0, float64x2_t __p1) { |
| 66317 | float64x2_t __ret; | 65921 | float64x2_t __ret; |
| 66318 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 65922 | __ret = (float64x2_t) __builtin_neon_vcaddq_rot90_f64((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| 66319 | return __ret; | 65923 | return __ret; |
| 66320 | } | 65924 | } |
| 66321 | #else | 65925 | #else |
| 66322 | __ai float64x2_t vzip1q_f64(float64x2_t __p0, float64x2_t __p1) { | 65926 | __ai __attribute__((target("v8.3a"))) float64x2_t vcaddq_rot90_f64(float64x2_t __p0, float64x2_t __p1) { |
| 66323 | float64x2_t __ret; | 65927 | float64x2_t __ret; |
| 66324 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 65928 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66325 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 65929 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 66326 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 65930 | __ret = (float64x2_t) __builtin_neon_vcaddq_rot90_f64((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| 66327 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 65931 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66328 | return __ret; | 65932 | return __ret; |
| 66329 | } | 65933 | } |
| 66330 | #endif | 65934 | #endif |
| 66331 | | 65935 | |
| 66332 | #ifdef __LITTLE_ENDIAN__ | 65936 | #ifdef __LITTLE_ENDIAN__ |
| 66333 | __ai float32x4_t vzip1q_f32(float32x4_t __p0, float32x4_t __p1) { | 65937 | __ai __attribute__((target("v8.3a"))) float64x2_t vcmlaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 66334 | float32x4_t __ret; | 65938 | float64x2_t __ret; |
| 66335 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 1, 5); | 65939 | __ret = (float64x2_t) __builtin_neon_vcmlaq_f64((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); |
| 66336 | return __ret; | 65940 | return __ret; |
| 66337 | } | 65941 | } |
| 66338 | #else | 65942 | #else |
| 66339 | __ai float32x4_t vzip1q_f32(float32x4_t __p0, float32x4_t __p1) { | 65943 | __ai __attribute__((target("v8.3a"))) float64x2_t vcmlaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 66340 | float32x4_t __ret; | 65944 | float64x2_t __ret; |
| 66341 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 65945 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66342 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 65946 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 66343 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 1, 5); | 65947 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 66344 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 65948 | __ret = (float64x2_t) __builtin_neon_vcmlaq_f64((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 42); |
| | 65949 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 65950 | return __ret; |
| | 65951 | } |
| | 65952 | __ai __attribute__((target("v8.3a"))) float64x2_t __noswap_vcmlaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| | 65953 | float64x2_t __ret; |
| | 65954 | __ret = (float64x2_t) __builtin_neon_vcmlaq_f64((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); |
| 66345 | return __ret; | 65955 | return __ret; |
| 66346 | } | 65956 | } |
| 66347 | #endif | 65957 | #endif |
| 66348 | | 65958 | |
| 66349 | #ifdef __LITTLE_ENDIAN__ | 65959 | __ai __attribute__((target("v8.3a"))) float64x1_t vcmla_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| 66350 | __ai int32x4_t vzip1q_s32(int32x4_t __p0, int32x4_t __p1) { | 65960 | float64x1_t __ret; |
| 66351 | int32x4_t __ret; | 65961 | __ret = (float64x1_t) __builtin_neon_vcmla_f64((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); |
| 66352 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 1, 5); | | |
| 66353 | return __ret; | 65962 | return __ret; |
| 66354 | } | 65963 | } |
| | 65964 | #define vcmla_lane_f64(__p0_819, __p1_819, __p2_819, __p3_819) __extension__ ({ \ |
| | 65965 | float64x1_t __ret_819; \ |
| | 65966 | float64x1_t __s0_819 = __p0_819; \ |
| | 65967 | float64x1_t __s1_819 = __p1_819; \ |
| | 65968 | float64x1_t __s2_819 = __p2_819; \ |
| | 65969 | float64x1_t __reint_819 = __s2_819; \ |
| | 65970 | uint64x2_t __reint1_819 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_819, __p3_819), vgetq_lane_u64(*(uint64x2_t *) &__reint_819, __p3_819)}; \ |
| | 65971 | __ret_819 = vcmla_f64(__s0_819, __s1_819, *(float64x1_t *) &__reint1_819); \ |
| | 65972 | __ret_819; \ |
| | 65973 | }) |
| | 65974 | #ifdef __LITTLE_ENDIAN__ |
| | 65975 | #define vcmlaq_lane_f64(__p0_820, __p1_820, __p2_820, __p3_820) __extension__ ({ \ |
| | 65976 | float64x2_t __ret_820; \ |
| | 65977 | float64x2_t __s0_820 = __p0_820; \ |
| | 65978 | float64x2_t __s1_820 = __p1_820; \ |
| | 65979 | float64x1_t __s2_820 = __p2_820; \ |
| | 65980 | float64x1_t __reint_820 = __s2_820; \ |
| | 65981 | uint64x2_t __reint1_820 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_820, __p3_820), vgetq_lane_u64(*(uint64x2_t *) &__reint_820, __p3_820)}; \ |
| | 65982 | __ret_820 = vcmlaq_f64(__s0_820, __s1_820, *(float64x2_t *) &__reint1_820); \ |
| | 65983 | __ret_820; \ |
| | 65984 | }) |
| 66355 | #else | 65985 | #else |
| 66356 | __ai int32x4_t vzip1q_s32(int32x4_t __p0, int32x4_t __p1) { | 65986 | #define vcmlaq_lane_f64(__p0_821, __p1_821, __p2_821, __p3_821) __extension__ ({ \ |
| 66357 | int32x4_t __ret; | 65987 | float64x2_t __ret_821; \ |
| 66358 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 65988 | float64x2_t __s0_821 = __p0_821; \ |
| 66359 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 65989 | float64x2_t __s1_821 = __p1_821; \ |
| 66360 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 1, 5); | 65990 | float64x1_t __s2_821 = __p2_821; \ |
| 66361 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 65991 | float64x2_t __rev0_821; __rev0_821 = __builtin_shufflevector(__s0_821, __s0_821, 1, 0); \ |
| 66362 | return __ret; | 65992 | float64x2_t __rev1_821; __rev1_821 = __builtin_shufflevector(__s1_821, __s1_821, 1, 0); \ |
| 66363 | } | 65993 | float64x1_t __reint_821 = __s2_821; \ |
| | 65994 | uint64x2_t __reint1_821 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_821, __p3_821), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_821, __p3_821)}; \ |
| | 65995 | __ret_821 = __noswap_vcmlaq_f64(__rev0_821, __rev1_821, *(float64x2_t *) &__reint1_821); \ |
| | 65996 | __ret_821 = __builtin_shufflevector(__ret_821, __ret_821, 1, 0); \ |
| | 65997 | __ret_821; \ |
| | 65998 | }) |
| 66364 | #endif | 65999 | #endif |
| 66365 | | 66000 | |
| 66366 | #ifdef __LITTLE_ENDIAN__ | 66001 | #ifdef __LITTLE_ENDIAN__ |
| 66367 | __ai int64x2_t vzip1q_s64(int64x2_t __p0, int64x2_t __p1) { | 66002 | #define vcmla_laneq_f64(__p0_822, __p1_822, __p2_822, __p3_822) __extension__ ({ \ |
| 66368 | int64x2_t __ret; | 66003 | float64x1_t __ret_822; \ |
| 66369 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 66004 | float64x1_t __s0_822 = __p0_822; \ |
| 66370 | return __ret; | 66005 | float64x1_t __s1_822 = __p1_822; \ |
| 66371 | } | 66006 | float64x2_t __s2_822 = __p2_822; \ |
| | 66007 | float64x2_t __reint_822 = __s2_822; \ |
| | 66008 | uint64x2_t __reint1_822 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_822, __p3_822), vgetq_lane_u64(*(uint64x2_t *) &__reint_822, __p3_822)}; \ |
| | 66009 | __ret_822 = vcmla_f64(__s0_822, __s1_822, *(float64x1_t *) &__reint1_822); \ |
| | 66010 | __ret_822; \ |
| | 66011 | }) |
| 66372 | #else | 66012 | #else |
| 66373 | __ai int64x2_t vzip1q_s64(int64x2_t __p0, int64x2_t __p1) { | 66013 | #define vcmla_laneq_f64(__p0_823, __p1_823, __p2_823, __p3_823) __extension__ ({ \ |
| 66374 | int64x2_t __ret; | 66014 | float64x1_t __ret_823; \ |
| 66375 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 66015 | float64x1_t __s0_823 = __p0_823; \ |
| 66376 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 66016 | float64x1_t __s1_823 = __p1_823; \ |
| 66377 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 66017 | float64x2_t __s2_823 = __p2_823; \ |
| 66378 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 66018 | float64x2_t __rev2_823; __rev2_823 = __builtin_shufflevector(__s2_823, __s2_823, 1, 0); \ |
| 66379 | return __ret; | 66019 | float64x2_t __reint_823 = __rev2_823; \ |
| 66380 | } | 66020 | uint64x2_t __reint1_823 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_823, __p3_823), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_823, __p3_823)}; \ |
| | 66021 | __ret_823 = vcmla_f64(__s0_823, __s1_823, *(float64x1_t *) &__reint1_823); \ |
| | 66022 | __ret_823; \ |
| | 66023 | }) |
| 66381 | #endif | 66024 | #endif |
| 66382 | | 66025 | |
| 66383 | #ifdef __LITTLE_ENDIAN__ | 66026 | #ifdef __LITTLE_ENDIAN__ |
| 66384 | __ai int16x8_t vzip1q_s16(int16x8_t __p0, int16x8_t __p1) { | 66027 | #define vcmlaq_laneq_f64(__p0_824, __p1_824, __p2_824, __p3_824) __extension__ ({ \ |
| 66385 | int16x8_t __ret; | 66028 | float64x2_t __ret_824; \ |
| 66386 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 1, 9, 2, 10, 3, 11); | 66029 | float64x2_t __s0_824 = __p0_824; \ |
| 66387 | return __ret; | 66030 | float64x2_t __s1_824 = __p1_824; \ |
| 66388 | } | 66031 | float64x2_t __s2_824 = __p2_824; \ |
| | 66032 | float64x2_t __reint_824 = __s2_824; \ |
| | 66033 | uint64x2_t __reint1_824 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_824, __p3_824), vgetq_lane_u64(*(uint64x2_t *) &__reint_824, __p3_824)}; \ |
| | 66034 | __ret_824 = vcmlaq_f64(__s0_824, __s1_824, *(float64x2_t *) &__reint1_824); \ |
| | 66035 | __ret_824; \ |
| | 66036 | }) |
| 66389 | #else | 66037 | #else |
| 66390 | __ai int16x8_t vzip1q_s16(int16x8_t __p0, int16x8_t __p1) { | 66038 | #define vcmlaq_laneq_f64(__p0_825, __p1_825, __p2_825, __p3_825) __extension__ ({ \ |
| 66391 | int16x8_t __ret; | 66039 | float64x2_t __ret_825; \ |
| 66392 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 66040 | float64x2_t __s0_825 = __p0_825; \ |
| 66393 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 66041 | float64x2_t __s1_825 = __p1_825; \ |
| 66394 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 1, 9, 2, 10, 3, 11); | 66042 | float64x2_t __s2_825 = __p2_825; \ |
| 66395 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 66043 | float64x2_t __rev0_825; __rev0_825 = __builtin_shufflevector(__s0_825, __s0_825, 1, 0); \ |
| 66396 | return __ret; | 66044 | float64x2_t __rev1_825; __rev1_825 = __builtin_shufflevector(__s1_825, __s1_825, 1, 0); \ |
| 66397 | } | 66045 | float64x2_t __rev2_825; __rev2_825 = __builtin_shufflevector(__s2_825, __s2_825, 1, 0); \ |
| | 66046 | float64x2_t __reint_825 = __rev2_825; \ |
| | 66047 | uint64x2_t __reint1_825 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_825, __p3_825), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_825, __p3_825)}; \ |
| | 66048 | __ret_825 = __noswap_vcmlaq_f64(__rev0_825, __rev1_825, *(float64x2_t *) &__reint1_825); \ |
| | 66049 | __ret_825 = __builtin_shufflevector(__ret_825, __ret_825, 1, 0); \ |
| | 66050 | __ret_825; \ |
| | 66051 | }) |
| 66398 | #endif | 66052 | #endif |
| 66399 | | 66053 | |
| 66400 | #ifdef __LITTLE_ENDIAN__ | 66054 | #ifdef __LITTLE_ENDIAN__ |
| 66401 | __ai uint8x8_t vzip1_u8(uint8x8_t __p0, uint8x8_t __p1) { | 66055 | __ai __attribute__((target("v8.3a"))) float64x2_t vcmlaq_rot180_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 66402 | uint8x8_t __ret; | 66056 | float64x2_t __ret; |
| 66403 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 1, 9, 2, 10, 3, 11); | 66057 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot180_f64((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); |
| 66404 | return __ret; | 66058 | return __ret; |
| 66405 | } | 66059 | } |
| 66406 | #else | 66060 | #else |
| 66407 | __ai uint8x8_t vzip1_u8(uint8x8_t __p0, uint8x8_t __p1) { | 66061 | __ai __attribute__((target("v8.3a"))) float64x2_t vcmlaq_rot180_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 66408 | uint8x8_t __ret; | 66062 | float64x2_t __ret; |
| 66409 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 66063 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66410 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 66064 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 66411 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 1, 9, 2, 10, 3, 11); | 66065 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 66412 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 66066 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot180_f64((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 42); |
| | 66067 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 66068 | return __ret; |
| | 66069 | } |
| | 66070 | __ai __attribute__((target("v8.3a"))) float64x2_t __noswap_vcmlaq_rot180_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| | 66071 | float64x2_t __ret; |
| | 66072 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot180_f64((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); |
| 66413 | return __ret; | 66073 | return __ret; |
| 66414 | } | 66074 | } |
| 66415 | #endif | 66075 | #endif |
| 66416 | | 66076 | |
| 66417 | #ifdef __LITTLE_ENDIAN__ | 66077 | __ai __attribute__((target("v8.3a"))) float64x1_t vcmla_rot180_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| 66418 | __ai uint32x2_t vzip1_u32(uint32x2_t __p0, uint32x2_t __p1) { | 66078 | float64x1_t __ret; |
| 66419 | uint32x2_t __ret; | 66079 | __ret = (float64x1_t) __builtin_neon_vcmla_rot180_f64((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); |
| 66420 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | | |
| 66421 | return __ret; | 66080 | return __ret; |
| 66422 | } | 66081 | } |
| | 66082 | #define vcmla_rot180_lane_f64(__p0_826, __p1_826, __p2_826, __p3_826) __extension__ ({ \ |
| | 66083 | float64x1_t __ret_826; \ |
| | 66084 | float64x1_t __s0_826 = __p0_826; \ |
| | 66085 | float64x1_t __s1_826 = __p1_826; \ |
| | 66086 | float64x1_t __s2_826 = __p2_826; \ |
| | 66087 | float64x1_t __reint_826 = __s2_826; \ |
| | 66088 | uint64x2_t __reint1_826 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_826, __p3_826), vgetq_lane_u64(*(uint64x2_t *) &__reint_826, __p3_826)}; \ |
| | 66089 | __ret_826 = vcmla_rot180_f64(__s0_826, __s1_826, *(float64x1_t *) &__reint1_826); \ |
| | 66090 | __ret_826; \ |
| | 66091 | }) |
| | 66092 | #ifdef __LITTLE_ENDIAN__ |
| | 66093 | #define vcmlaq_rot180_lane_f64(__p0_827, __p1_827, __p2_827, __p3_827) __extension__ ({ \ |
| | 66094 | float64x2_t __ret_827; \ |
| | 66095 | float64x2_t __s0_827 = __p0_827; \ |
| | 66096 | float64x2_t __s1_827 = __p1_827; \ |
| | 66097 | float64x1_t __s2_827 = __p2_827; \ |
| | 66098 | float64x1_t __reint_827 = __s2_827; \ |
| | 66099 | uint64x2_t __reint1_827 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_827, __p3_827), vgetq_lane_u64(*(uint64x2_t *) &__reint_827, __p3_827)}; \ |
| | 66100 | __ret_827 = vcmlaq_rot180_f64(__s0_827, __s1_827, *(float64x2_t *) &__reint1_827); \ |
| | 66101 | __ret_827; \ |
| | 66102 | }) |
| 66423 | #else | 66103 | #else |
| 66424 | __ai uint32x2_t vzip1_u32(uint32x2_t __p0, uint32x2_t __p1) { | 66104 | #define vcmlaq_rot180_lane_f64(__p0_828, __p1_828, __p2_828, __p3_828) __extension__ ({ \ |
| 66425 | uint32x2_t __ret; | 66105 | float64x2_t __ret_828; \ |
| 66426 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 66106 | float64x2_t __s0_828 = __p0_828; \ |
| 66427 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 66107 | float64x2_t __s1_828 = __p1_828; \ |
| 66428 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 66108 | float64x1_t __s2_828 = __p2_828; \ |
| 66429 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 66109 | float64x2_t __rev0_828; __rev0_828 = __builtin_shufflevector(__s0_828, __s0_828, 1, 0); \ |
| 66430 | return __ret; | 66110 | float64x2_t __rev1_828; __rev1_828 = __builtin_shufflevector(__s1_828, __s1_828, 1, 0); \ |
| 66431 | } | 66111 | float64x1_t __reint_828 = __s2_828; \ |
| | 66112 | uint64x2_t __reint1_828 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_828, __p3_828), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_828, __p3_828)}; \ |
| | 66113 | __ret_828 = __noswap_vcmlaq_rot180_f64(__rev0_828, __rev1_828, *(float64x2_t *) &__reint1_828); \ |
| | 66114 | __ret_828 = __builtin_shufflevector(__ret_828, __ret_828, 1, 0); \ |
| | 66115 | __ret_828; \ |
| | 66116 | }) |
| 66432 | #endif | 66117 | #endif |
| 66433 | | 66118 | |
| 66434 | #ifdef __LITTLE_ENDIAN__ | 66119 | #ifdef __LITTLE_ENDIAN__ |
| 66435 | __ai uint16x4_t vzip1_u16(uint16x4_t __p0, uint16x4_t __p1) { | 66120 | #define vcmla_rot180_laneq_f64(__p0_829, __p1_829, __p2_829, __p3_829) __extension__ ({ \ |
| 66436 | uint16x4_t __ret; | 66121 | float64x1_t __ret_829; \ |
| 66437 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 1, 5); | 66122 | float64x1_t __s0_829 = __p0_829; \ |
| 66438 | return __ret; | 66123 | float64x1_t __s1_829 = __p1_829; \ |
| 66439 | } | 66124 | float64x2_t __s2_829 = __p2_829; \ |
| | 66125 | float64x2_t __reint_829 = __s2_829; \ |
| | 66126 | uint64x2_t __reint1_829 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_829, __p3_829), vgetq_lane_u64(*(uint64x2_t *) &__reint_829, __p3_829)}; \ |
| | 66127 | __ret_829 = vcmla_rot180_f64(__s0_829, __s1_829, *(float64x1_t *) &__reint1_829); \ |
| | 66128 | __ret_829; \ |
| | 66129 | }) |
| 66440 | #else | 66130 | #else |
| 66441 | __ai uint16x4_t vzip1_u16(uint16x4_t __p0, uint16x4_t __p1) { | 66131 | #define vcmla_rot180_laneq_f64(__p0_830, __p1_830, __p2_830, __p3_830) __extension__ ({ \ |
| 66442 | uint16x4_t __ret; | 66132 | float64x1_t __ret_830; \ |
| 66443 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 66133 | float64x1_t __s0_830 = __p0_830; \ |
| 66444 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 66134 | float64x1_t __s1_830 = __p1_830; \ |
| 66445 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 1, 5); | 66135 | float64x2_t __s2_830 = __p2_830; \ |
| 66446 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 66136 | float64x2_t __rev2_830; __rev2_830 = __builtin_shufflevector(__s2_830, __s2_830, 1, 0); \ |
| 66447 | return __ret; | 66137 | float64x2_t __reint_830 = __rev2_830; \ |
| 66448 | } | 66138 | uint64x2_t __reint1_830 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_830, __p3_830), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_830, __p3_830)}; \ |
| | 66139 | __ret_830 = vcmla_rot180_f64(__s0_830, __s1_830, *(float64x1_t *) &__reint1_830); \ |
| | 66140 | __ret_830; \ |
| | 66141 | }) |
| 66449 | #endif | 66142 | #endif |
| 66450 | | 66143 | |
| 66451 | #ifdef __LITTLE_ENDIAN__ | 66144 | #ifdef __LITTLE_ENDIAN__ |
| 66452 | __ai int8x8_t vzip1_s8(int8x8_t __p0, int8x8_t __p1) { | 66145 | #define vcmlaq_rot180_laneq_f64(__p0_831, __p1_831, __p2_831, __p3_831) __extension__ ({ \ |
| 66453 | int8x8_t __ret; | 66146 | float64x2_t __ret_831; \ |
| 66454 | __ret = __builtin_shufflevector(__p0, __p1, 0, 8, 1, 9, 2, 10, 3, 11); | 66147 | float64x2_t __s0_831 = __p0_831; \ |
| 66455 | return __ret; | 66148 | float64x2_t __s1_831 = __p1_831; \ |
| 66456 | } | 66149 | float64x2_t __s2_831 = __p2_831; \ |
| | 66150 | float64x2_t __reint_831 = __s2_831; \ |
| | 66151 | uint64x2_t __reint1_831 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_831, __p3_831), vgetq_lane_u64(*(uint64x2_t *) &__reint_831, __p3_831)}; \ |
| | 66152 | __ret_831 = vcmlaq_rot180_f64(__s0_831, __s1_831, *(float64x2_t *) &__reint1_831); \ |
| | 66153 | __ret_831; \ |
| | 66154 | }) |
| 66457 | #else | 66155 | #else |
| 66458 | __ai int8x8_t vzip1_s8(int8x8_t __p0, int8x8_t __p1) { | 66156 | #define vcmlaq_rot180_laneq_f64(__p0_832, __p1_832, __p2_832, __p3_832) __extension__ ({ \ |
| 66459 | int8x8_t __ret; | 66157 | float64x2_t __ret_832; \ |
| 66460 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 66158 | float64x2_t __s0_832 = __p0_832; \ |
| 66461 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 66159 | float64x2_t __s1_832 = __p1_832; \ |
| 66462 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 8, 1, 9, 2, 10, 3, 11); | 66160 | float64x2_t __s2_832 = __p2_832; \ |
| 66463 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 66161 | float64x2_t __rev0_832; __rev0_832 = __builtin_shufflevector(__s0_832, __s0_832, 1, 0); \ |
| 66464 | return __ret; | 66162 | float64x2_t __rev1_832; __rev1_832 = __builtin_shufflevector(__s1_832, __s1_832, 1, 0); \ |
| 66465 | } | 66163 | float64x2_t __rev2_832; __rev2_832 = __builtin_shufflevector(__s2_832, __s2_832, 1, 0); \ |
| | 66164 | float64x2_t __reint_832 = __rev2_832; \ |
| | 66165 | uint64x2_t __reint1_832 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_832, __p3_832), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_832, __p3_832)}; \ |
| | 66166 | __ret_832 = __noswap_vcmlaq_rot180_f64(__rev0_832, __rev1_832, *(float64x2_t *) &__reint1_832); \ |
| | 66167 | __ret_832 = __builtin_shufflevector(__ret_832, __ret_832, 1, 0); \ |
| | 66168 | __ret_832; \ |
| | 66169 | }) |
| 66466 | #endif | 66170 | #endif |
| 66467 | | 66171 | |
| 66468 | #ifdef __LITTLE_ENDIAN__ | 66172 | #ifdef __LITTLE_ENDIAN__ |
| 66469 | __ai float32x2_t vzip1_f32(float32x2_t __p0, float32x2_t __p1) { | 66173 | __ai __attribute__((target("v8.3a"))) float64x2_t vcmlaq_rot270_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 66470 | float32x2_t __ret; | 66174 | float64x2_t __ret; |
| 66471 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | 66175 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot270_f64((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); |
| 66472 | return __ret; | 66176 | return __ret; |
| 66473 | } | 66177 | } |
| 66474 | #else | 66178 | #else |
| 66475 | __ai float32x2_t vzip1_f32(float32x2_t __p0, float32x2_t __p1) { | 66179 | __ai __attribute__((target("v8.3a"))) float64x2_t vcmlaq_rot270_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 66476 | float32x2_t __ret; | 66180 | float64x2_t __ret; |
| 66477 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 66181 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66478 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 66182 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 66479 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 66183 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| | 66184 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot270_f64((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 42); |
| 66480 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 66185 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66481 | return __ret; | 66186 | return __ret; |
| 66482 | } | 66187 | } |
| | 66188 | __ai __attribute__((target("v8.3a"))) float64x2_t __noswap_vcmlaq_rot270_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| | 66189 | float64x2_t __ret; |
| | 66190 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot270_f64((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); |
| | 66191 | return __ret; |
| | 66192 | } |
| 66483 | #endif | 66193 | #endif |
| 66484 | | 66194 | |
| 66485 | #ifdef __LITTLE_ENDIAN__ | 66195 | __ai __attribute__((target("v8.3a"))) float64x1_t vcmla_rot270_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| 66486 | __ai int32x2_t vzip1_s32(int32x2_t __p0, int32x2_t __p1) { | 66196 | float64x1_t __ret; |
| 66487 | int32x2_t __ret; | 66197 | __ret = (float64x1_t) __builtin_neon_vcmla_rot270_f64((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); |
| 66488 | __ret = __builtin_shufflevector(__p0, __p1, 0, 2); | | |
| 66489 | return __ret; | 66198 | return __ret; |
| 66490 | } | 66199 | } |
| | 66200 | #define vcmla_rot270_lane_f64(__p0_833, __p1_833, __p2_833, __p3_833) __extension__ ({ \ |
| | 66201 | float64x1_t __ret_833; \ |
| | 66202 | float64x1_t __s0_833 = __p0_833; \ |
| | 66203 | float64x1_t __s1_833 = __p1_833; \ |
| | 66204 | float64x1_t __s2_833 = __p2_833; \ |
| | 66205 | float64x1_t __reint_833 = __s2_833; \ |
| | 66206 | uint64x2_t __reint1_833 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_833, __p3_833), vgetq_lane_u64(*(uint64x2_t *) &__reint_833, __p3_833)}; \ |
| | 66207 | __ret_833 = vcmla_rot270_f64(__s0_833, __s1_833, *(float64x1_t *) &__reint1_833); \ |
| | 66208 | __ret_833; \ |
| | 66209 | }) |
| | 66210 | #ifdef __LITTLE_ENDIAN__ |
| | 66211 | #define vcmlaq_rot270_lane_f64(__p0_834, __p1_834, __p2_834, __p3_834) __extension__ ({ \ |
| | 66212 | float64x2_t __ret_834; \ |
| | 66213 | float64x2_t __s0_834 = __p0_834; \ |
| | 66214 | float64x2_t __s1_834 = __p1_834; \ |
| | 66215 | float64x1_t __s2_834 = __p2_834; \ |
| | 66216 | float64x1_t __reint_834 = __s2_834; \ |
| | 66217 | uint64x2_t __reint1_834 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_834, __p3_834), vgetq_lane_u64(*(uint64x2_t *) &__reint_834, __p3_834)}; \ |
| | 66218 | __ret_834 = vcmlaq_rot270_f64(__s0_834, __s1_834, *(float64x2_t *) &__reint1_834); \ |
| | 66219 | __ret_834; \ |
| | 66220 | }) |
| 66491 | #else | 66221 | #else |
| 66492 | __ai int32x2_t vzip1_s32(int32x2_t __p0, int32x2_t __p1) { | 66222 | #define vcmlaq_rot270_lane_f64(__p0_835, __p1_835, __p2_835, __p3_835) __extension__ ({ \ |
| 66493 | int32x2_t __ret; | 66223 | float64x2_t __ret_835; \ |
| 66494 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 66224 | float64x2_t __s0_835 = __p0_835; \ |
| 66495 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 66225 | float64x2_t __s1_835 = __p1_835; \ |
| 66496 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 2); | 66226 | float64x1_t __s2_835 = __p2_835; \ |
| 66497 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 66227 | float64x2_t __rev0_835; __rev0_835 = __builtin_shufflevector(__s0_835, __s0_835, 1, 0); \ |
| 66498 | return __ret; | 66228 | float64x2_t __rev1_835; __rev1_835 = __builtin_shufflevector(__s1_835, __s1_835, 1, 0); \ |
| 66499 | } | 66229 | float64x1_t __reint_835 = __s2_835; \ |
| | 66230 | uint64x2_t __reint1_835 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_835, __p3_835), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_835, __p3_835)}; \ |
| | 66231 | __ret_835 = __noswap_vcmlaq_rot270_f64(__rev0_835, __rev1_835, *(float64x2_t *) &__reint1_835); \ |
| | 66232 | __ret_835 = __builtin_shufflevector(__ret_835, __ret_835, 1, 0); \ |
| | 66233 | __ret_835; \ |
| | 66234 | }) |
| 66500 | #endif | 66235 | #endif |
| 66501 | | 66236 | |
| 66502 | #ifdef __LITTLE_ENDIAN__ | 66237 | #ifdef __LITTLE_ENDIAN__ |
| 66503 | __ai int16x4_t vzip1_s16(int16x4_t __p0, int16x4_t __p1) { | 66238 | #define vcmla_rot270_laneq_f64(__p0_836, __p1_836, __p2_836, __p3_836) __extension__ ({ \ |
| 66504 | int16x4_t __ret; | 66239 | float64x1_t __ret_836; \ |
| 66505 | __ret = __builtin_shufflevector(__p0, __p1, 0, 4, 1, 5); | 66240 | float64x1_t __s0_836 = __p0_836; \ |
| 66506 | return __ret; | 66241 | float64x1_t __s1_836 = __p1_836; \ |
| 66507 | } | 66242 | float64x2_t __s2_836 = __p2_836; \ |
| | 66243 | float64x2_t __reint_836 = __s2_836; \ |
| | 66244 | uint64x2_t __reint1_836 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_836, __p3_836), vgetq_lane_u64(*(uint64x2_t *) &__reint_836, __p3_836)}; \ |
| | 66245 | __ret_836 = vcmla_rot270_f64(__s0_836, __s1_836, *(float64x1_t *) &__reint1_836); \ |
| | 66246 | __ret_836; \ |
| | 66247 | }) |
| 66508 | #else | 66248 | #else |
| 66509 | __ai int16x4_t vzip1_s16(int16x4_t __p0, int16x4_t __p1) { | 66249 | #define vcmla_rot270_laneq_f64(__p0_837, __p1_837, __p2_837, __p3_837) __extension__ ({ \ |
| 66510 | int16x4_t __ret; | 66250 | float64x1_t __ret_837; \ |
| 66511 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 66251 | float64x1_t __s0_837 = __p0_837; \ |
| 66512 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 66252 | float64x1_t __s1_837 = __p1_837; \ |
| 66513 | __ret = __builtin_shufflevector(__rev0, __rev1, 0, 4, 1, 5); | 66253 | float64x2_t __s2_837 = __p2_837; \ |
| 66514 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 66254 | float64x2_t __rev2_837; __rev2_837 = __builtin_shufflevector(__s2_837, __s2_837, 1, 0); \ |
| 66515 | return __ret; | 66255 | float64x2_t __reint_837 = __rev2_837; \ |
| 66516 | } | 66256 | uint64x2_t __reint1_837 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_837, __p3_837), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_837, __p3_837)}; \ |
| | 66257 | __ret_837 = vcmla_rot270_f64(__s0_837, __s1_837, *(float64x1_t *) &__reint1_837); \ |
| | 66258 | __ret_837; \ |
| | 66259 | }) |
| 66517 | #endif | 66260 | #endif |
| 66518 | | 66261 | |
| 66519 | #ifdef __LITTLE_ENDIAN__ | 66262 | #ifdef __LITTLE_ENDIAN__ |
| 66520 | __ai poly8x8_t vzip2_p8(poly8x8_t __p0, poly8x8_t __p1) { | 66263 | #define vcmlaq_rot270_laneq_f64(__p0_838, __p1_838, __p2_838, __p3_838) __extension__ ({ \ |
| 66521 | poly8x8_t __ret; | 66264 | float64x2_t __ret_838; \ |
| 66522 | __ret = __builtin_shufflevector(__p0, __p1, 4, 12, 5, 13, 6, 14, 7, 15); | 66265 | float64x2_t __s0_838 = __p0_838; \ |
| 66523 | return __ret; | 66266 | float64x2_t __s1_838 = __p1_838; \ |
| 66524 | } | 66267 | float64x2_t __s2_838 = __p2_838; \ |
| | 66268 | float64x2_t __reint_838 = __s2_838; \ |
| | 66269 | uint64x2_t __reint1_838 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_838, __p3_838), vgetq_lane_u64(*(uint64x2_t *) &__reint_838, __p3_838)}; \ |
| | 66270 | __ret_838 = vcmlaq_rot270_f64(__s0_838, __s1_838, *(float64x2_t *) &__reint1_838); \ |
| | 66271 | __ret_838; \ |
| | 66272 | }) |
| 66525 | #else | 66273 | #else |
| 66526 | __ai poly8x8_t vzip2_p8(poly8x8_t __p0, poly8x8_t __p1) { | 66274 | #define vcmlaq_rot270_laneq_f64(__p0_839, __p1_839, __p2_839, __p3_839) __extension__ ({ \ |
| 66527 | poly8x8_t __ret; | 66275 | float64x2_t __ret_839; \ |
| 66528 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 66276 | float64x2_t __s0_839 = __p0_839; \ |
| 66529 | poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 66277 | float64x2_t __s1_839 = __p1_839; \ |
| 66530 | __ret = __builtin_shufflevector(__rev0, __rev1, 4, 12, 5, 13, 6, 14, 7, 15); | 66278 | float64x2_t __s2_839 = __p2_839; \ |
| 66531 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 66279 | float64x2_t __rev0_839; __rev0_839 = __builtin_shufflevector(__s0_839, __s0_839, 1, 0); \ |
| 66532 | return __ret; | 66280 | float64x2_t __rev1_839; __rev1_839 = __builtin_shufflevector(__s1_839, __s1_839, 1, 0); \ |
| 66533 | } | 66281 | float64x2_t __rev2_839; __rev2_839 = __builtin_shufflevector(__s2_839, __s2_839, 1, 0); \ |
| | 66282 | float64x2_t __reint_839 = __rev2_839; \ |
| | 66283 | uint64x2_t __reint1_839 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_839, __p3_839), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_839, __p3_839)}; \ |
| | 66284 | __ret_839 = __noswap_vcmlaq_rot270_f64(__rev0_839, __rev1_839, *(float64x2_t *) &__reint1_839); \ |
| | 66285 | __ret_839 = __builtin_shufflevector(__ret_839, __ret_839, 1, 0); \ |
| | 66286 | __ret_839; \ |
| | 66287 | }) |
| 66534 | #endif | 66288 | #endif |
| 66535 | | 66289 | |
| 66536 | #ifdef __LITTLE_ENDIAN__ | 66290 | #ifdef __LITTLE_ENDIAN__ |
| 66537 | __ai poly16x4_t vzip2_p16(poly16x4_t __p0, poly16x4_t __p1) { | 66291 | __ai __attribute__((target("v8.3a"))) float64x2_t vcmlaq_rot90_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 66538 | poly16x4_t __ret; | 66292 | float64x2_t __ret; |
| 66539 | __ret = __builtin_shufflevector(__p0, __p1, 2, 6, 3, 7); | 66293 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot90_f64((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); |
| 66540 | return __ret; | 66294 | return __ret; |
| 66541 | } | 66295 | } |
| 66542 | #else | 66296 | #else |
| 66543 | __ai poly16x4_t vzip2_p16(poly16x4_t __p0, poly16x4_t __p1) { | 66297 | __ai __attribute__((target("v8.3a"))) float64x2_t vcmlaq_rot90_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 66544 | poly16x4_t __ret; | 66298 | float64x2_t __ret; |
| 66545 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 66299 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66546 | poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 66300 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 66547 | __ret = __builtin_shufflevector(__rev0, __rev1, 2, 6, 3, 7); | 66301 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0); |
| 66548 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 66302 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot90_f64((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 42); |
| | 66303 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 66304 | return __ret; |
| | 66305 | } |
| | 66306 | __ai __attribute__((target("v8.3a"))) float64x2_t __noswap_vcmlaq_rot90_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| | 66307 | float64x2_t __ret; |
| | 66308 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot90_f64((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); |
| 66549 | return __ret; | 66309 | return __ret; |
| 66550 | } | 66310 | } |
| 66551 | #endif | 66311 | #endif |
| 66552 | | 66312 | |
| 66553 | #ifdef __LITTLE_ENDIAN__ | 66313 | __ai __attribute__((target("v8.3a"))) float64x1_t vcmla_rot90_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| 66554 | __ai poly8x16_t vzip2q_p8(poly8x16_t __p0, poly8x16_t __p1) { | 66314 | float64x1_t __ret; |
| 66555 | poly8x16_t __ret; | 66315 | __ret = (float64x1_t) __builtin_neon_vcmla_rot90_f64((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); |
| 66556 | __ret = __builtin_shufflevector(__p0, __p1, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); | | |
| 66557 | return __ret; | 66316 | return __ret; |
| 66558 | } | 66317 | } |
| | 66318 | #define vcmla_rot90_lane_f64(__p0_840, __p1_840, __p2_840, __p3_840) __extension__ ({ \ |
| | 66319 | float64x1_t __ret_840; \ |
| | 66320 | float64x1_t __s0_840 = __p0_840; \ |
| | 66321 | float64x1_t __s1_840 = __p1_840; \ |
| | 66322 | float64x1_t __s2_840 = __p2_840; \ |
| | 66323 | float64x1_t __reint_840 = __s2_840; \ |
| | 66324 | uint64x2_t __reint1_840 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_840, __p3_840), vgetq_lane_u64(*(uint64x2_t *) &__reint_840, __p3_840)}; \ |
| | 66325 | __ret_840 = vcmla_rot90_f64(__s0_840, __s1_840, *(float64x1_t *) &__reint1_840); \ |
| | 66326 | __ret_840; \ |
| | 66327 | }) |
| | 66328 | #ifdef __LITTLE_ENDIAN__ |
| | 66329 | #define vcmlaq_rot90_lane_f64(__p0_841, __p1_841, __p2_841, __p3_841) __extension__ ({ \ |
| | 66330 | float64x2_t __ret_841; \ |
| | 66331 | float64x2_t __s0_841 = __p0_841; \ |
| | 66332 | float64x2_t __s1_841 = __p1_841; \ |
| | 66333 | float64x1_t __s2_841 = __p2_841; \ |
| | 66334 | float64x1_t __reint_841 = __s2_841; \ |
| | 66335 | uint64x2_t __reint1_841 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_841, __p3_841), vgetq_lane_u64(*(uint64x2_t *) &__reint_841, __p3_841)}; \ |
| | 66336 | __ret_841 = vcmlaq_rot90_f64(__s0_841, __s1_841, *(float64x2_t *) &__reint1_841); \ |
| | 66337 | __ret_841; \ |
| | 66338 | }) |
| 66559 | #else | 66339 | #else |
| 66560 | __ai poly8x16_t vzip2q_p8(poly8x16_t __p0, poly8x16_t __p1) { | 66340 | #define vcmlaq_rot90_lane_f64(__p0_842, __p1_842, __p2_842, __p3_842) __extension__ ({ \ |
| 66561 | poly8x16_t __ret; | 66341 | float64x2_t __ret_842; \ |
| 66562 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 66342 | float64x2_t __s0_842 = __p0_842; \ |
| 66563 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 66343 | float64x2_t __s1_842 = __p1_842; \ |
| 66564 | __ret = __builtin_shufflevector(__rev0, __rev1, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); | 66344 | float64x1_t __s2_842 = __p2_842; \ |
| 66565 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 66345 | float64x2_t __rev0_842; __rev0_842 = __builtin_shufflevector(__s0_842, __s0_842, 1, 0); \ |
| 66566 | return __ret; | 66346 | float64x2_t __rev1_842; __rev1_842 = __builtin_shufflevector(__s1_842, __s1_842, 1, 0); \ |
| 66567 | } | 66347 | float64x1_t __reint_842 = __s2_842; \ |
| | 66348 | uint64x2_t __reint1_842 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_842, __p3_842), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_842, __p3_842)}; \ |
| | 66349 | __ret_842 = __noswap_vcmlaq_rot90_f64(__rev0_842, __rev1_842, *(float64x2_t *) &__reint1_842); \ |
| | 66350 | __ret_842 = __builtin_shufflevector(__ret_842, __ret_842, 1, 0); \ |
| | 66351 | __ret_842; \ |
| | 66352 | }) |
| 66568 | #endif | 66353 | #endif |
| 66569 | | 66354 | |
| 66570 | #ifdef __LITTLE_ENDIAN__ | 66355 | #ifdef __LITTLE_ENDIAN__ |
| 66571 | __ai poly64x2_t vzip2q_p64(poly64x2_t __p0, poly64x2_t __p1) { | 66356 | #define vcmla_rot90_laneq_f64(__p0_843, __p1_843, __p2_843, __p3_843) __extension__ ({ \ |
| 66572 | poly64x2_t __ret; | 66357 | float64x1_t __ret_843; \ |
| 66573 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 66358 | float64x1_t __s0_843 = __p0_843; \ |
| 66574 | return __ret; | 66359 | float64x1_t __s1_843 = __p1_843; \ |
| 66575 | } | 66360 | float64x2_t __s2_843 = __p2_843; \ |
| | 66361 | float64x2_t __reint_843 = __s2_843; \ |
| | 66362 | uint64x2_t __reint1_843 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_843, __p3_843), vgetq_lane_u64(*(uint64x2_t *) &__reint_843, __p3_843)}; \ |
| | 66363 | __ret_843 = vcmla_rot90_f64(__s0_843, __s1_843, *(float64x1_t *) &__reint1_843); \ |
| | 66364 | __ret_843; \ |
| | 66365 | }) |
| 66576 | #else | 66366 | #else |
| 66577 | __ai poly64x2_t vzip2q_p64(poly64x2_t __p0, poly64x2_t __p1) { | 66367 | #define vcmla_rot90_laneq_f64(__p0_844, __p1_844, __p2_844, __p3_844) __extension__ ({ \ |
| 66578 | poly64x2_t __ret; | 66368 | float64x1_t __ret_844; \ |
| 66579 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 66369 | float64x1_t __s0_844 = __p0_844; \ |
| 66580 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 66370 | float64x1_t __s1_844 = __p1_844; \ |
| 66581 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 66371 | float64x2_t __s2_844 = __p2_844; \ |
| 66582 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 66372 | float64x2_t __rev2_844; __rev2_844 = __builtin_shufflevector(__s2_844, __s2_844, 1, 0); \ |
| 66583 | return __ret; | 66373 | float64x2_t __reint_844 = __rev2_844; \ |
| 66584 | } | 66374 | uint64x2_t __reint1_844 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_844, __p3_844), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_844, __p3_844)}; \ |
| | 66375 | __ret_844 = vcmla_rot90_f64(__s0_844, __s1_844, *(float64x1_t *) &__reint1_844); \ |
| | 66376 | __ret_844; \ |
| | 66377 | }) |
| 66585 | #endif | 66378 | #endif |
| 66586 | | 66379 | |
| 66587 | #ifdef __LITTLE_ENDIAN__ | 66380 | #ifdef __LITTLE_ENDIAN__ |
| 66588 | __ai poly16x8_t vzip2q_p16(poly16x8_t __p0, poly16x8_t __p1) { | 66381 | #define vcmlaq_rot90_laneq_f64(__p0_845, __p1_845, __p2_845, __p3_845) __extension__ ({ \ |
| 66589 | poly16x8_t __ret; | 66382 | float64x2_t __ret_845; \ |
| 66590 | __ret = __builtin_shufflevector(__p0, __p1, 4, 12, 5, 13, 6, 14, 7, 15); | 66383 | float64x2_t __s0_845 = __p0_845; \ |
| 66591 | return __ret; | 66384 | float64x2_t __s1_845 = __p1_845; \ |
| 66592 | } | 66385 | float64x2_t __s2_845 = __p2_845; \ |
| | 66386 | float64x2_t __reint_845 = __s2_845; \ |
| | 66387 | uint64x2_t __reint1_845 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_845, __p3_845), vgetq_lane_u64(*(uint64x2_t *) &__reint_845, __p3_845)}; \ |
| | 66388 | __ret_845 = vcmlaq_rot90_f64(__s0_845, __s1_845, *(float64x2_t *) &__reint1_845); \ |
| | 66389 | __ret_845; \ |
| | 66390 | }) |
| 66593 | #else | 66391 | #else |
| 66594 | __ai poly16x8_t vzip2q_p16(poly16x8_t __p0, poly16x8_t __p1) { | 66392 | #define vcmlaq_rot90_laneq_f64(__p0_846, __p1_846, __p2_846, __p3_846) __extension__ ({ \ |
| 66595 | poly16x8_t __ret; | 66393 | float64x2_t __ret_846; \ |
| 66596 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 66394 | float64x2_t __s0_846 = __p0_846; \ |
| 66597 | poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 66395 | float64x2_t __s1_846 = __p1_846; \ |
| 66598 | __ret = __builtin_shufflevector(__rev0, __rev1, 4, 12, 5, 13, 6, 14, 7, 15); | 66396 | float64x2_t __s2_846 = __p2_846; \ |
| 66599 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 66397 | float64x2_t __rev0_846; __rev0_846 = __builtin_shufflevector(__s0_846, __s0_846, 1, 0); \ |
| 66600 | return __ret; | 66398 | float64x2_t __rev1_846; __rev1_846 = __builtin_shufflevector(__s1_846, __s1_846, 1, 0); \ |
| 66601 | } | 66399 | float64x2_t __rev2_846; __rev2_846 = __builtin_shufflevector(__s2_846, __s2_846, 1, 0); \ |
| | 66400 | float64x2_t __reint_846 = __rev2_846; \ |
| | 66401 | uint64x2_t __reint1_846 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_846, __p3_846), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_846, __p3_846)}; \ |
| | 66402 | __ret_846 = __noswap_vcmlaq_rot90_f64(__rev0_846, __rev1_846, *(float64x2_t *) &__reint1_846); \ |
| | 66403 | __ret_846 = __builtin_shufflevector(__ret_846, __ret_846, 1, 0); \ |
| | 66404 | __ret_846; \ |
| | 66405 | }) |
| 66602 | #endif | 66406 | #endif |
| 66603 | | 66407 | |
| 66604 | #ifdef __LITTLE_ENDIAN__ | 66408 | #ifdef __LITTLE_ENDIAN__ |
| 66605 | __ai uint8x16_t vzip2q_u8(uint8x16_t __p0, uint8x16_t __p1) { | 66409 | __ai __attribute__((target("v8.5a"))) float32x4_t vrnd32xq_f32(float32x4_t __p0) { |
| 66606 | uint8x16_t __ret; | 66410 | float32x4_t __ret; |
| 66607 | __ret = __builtin_shufflevector(__p0, __p1, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); | 66411 | __ret = (float32x4_t) __builtin_neon_vrnd32xq_f32((int8x16_t)__p0, 41); |
| 66608 | return __ret; | 66412 | return __ret; |
| 66609 | } | 66413 | } |
| 66610 | #else | 66414 | #else |
| 66611 | __ai uint8x16_t vzip2q_u8(uint8x16_t __p0, uint8x16_t __p1) { | 66415 | __ai __attribute__((target("v8.5a"))) float32x4_t vrnd32xq_f32(float32x4_t __p0) { |
| 66612 | uint8x16_t __ret; | 66416 | float32x4_t __ret; |
| 66613 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 66417 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 66614 | uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 66418 | __ret = (float32x4_t) __builtin_neon_vrnd32xq_f32((int8x16_t)__rev0, 41); |
| 66615 | __ret = __builtin_shufflevector(__rev0, __rev1, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); | 66419 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 66616 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 66617 | return __ret; | 66420 | return __ret; |
| 66618 | } | 66421 | } |
| 66619 | #endif | 66422 | #endif |
| 66620 | | 66423 | |
| 66621 | #ifdef __LITTLE_ENDIAN__ | 66424 | #ifdef __LITTLE_ENDIAN__ |
| 66622 | __ai uint32x4_t vzip2q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 66425 | __ai __attribute__((target("v8.5a"))) float32x2_t vrnd32x_f32(float32x2_t __p0) { |
| 66623 | uint32x4_t __ret; | 66426 | float32x2_t __ret; |
| 66624 | __ret = __builtin_shufflevector(__p0, __p1, 2, 6, 3, 7); | 66427 | __ret = (float32x2_t) __builtin_neon_vrnd32x_f32((int8x8_t)__p0, 9); |
| 66625 | return __ret; | 66428 | return __ret; |
| 66626 | } | 66429 | } |
| 66627 | #else | 66430 | #else |
| 66628 | __ai uint32x4_t vzip2q_u32(uint32x4_t __p0, uint32x4_t __p1) { | 66431 | __ai __attribute__((target("v8.5a"))) float32x2_t vrnd32x_f32(float32x2_t __p0) { |
| 66629 | uint32x4_t __ret; | 66432 | float32x2_t __ret; |
| 66630 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 66433 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66631 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 66434 | __ret = (float32x2_t) __builtin_neon_vrnd32x_f32((int8x8_t)__rev0, 9); |
| 66632 | __ret = __builtin_shufflevector(__rev0, __rev1, 2, 6, 3, 7); | 66435 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66633 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 66634 | return __ret; | 66436 | return __ret; |
| 66635 | } | 66437 | } |
| 66636 | #endif | 66438 | #endif |
| 66637 | | 66439 | |
| 66638 | #ifdef __LITTLE_ENDIAN__ | 66440 | #ifdef __LITTLE_ENDIAN__ |
| 66639 | __ai uint64x2_t vzip2q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 66441 | __ai __attribute__((target("v8.5a"))) float32x4_t vrnd32zq_f32(float32x4_t __p0) { |
| 66640 | uint64x2_t __ret; | 66442 | float32x4_t __ret; |
| 66641 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 66443 | __ret = (float32x4_t) __builtin_neon_vrnd32zq_f32((int8x16_t)__p0, 41); |
| 66642 | return __ret; | 66444 | return __ret; |
| 66643 | } | 66445 | } |
| 66644 | #else | 66446 | #else |
| 66645 | __ai uint64x2_t vzip2q_u64(uint64x2_t __p0, uint64x2_t __p1) { | 66447 | __ai __attribute__((target("v8.5a"))) float32x4_t vrnd32zq_f32(float32x4_t __p0) { |
| 66646 | uint64x2_t __ret; | 66448 | float32x4_t __ret; |
| 66647 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 66449 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 66648 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 66450 | __ret = (float32x4_t) __builtin_neon_vrnd32zq_f32((int8x16_t)__rev0, 41); |
| 66649 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 66451 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 66650 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | | |
| 66651 | return __ret; | 66452 | return __ret; |
| 66652 | } | 66453 | } |
| 66653 | #endif | 66454 | #endif |
| 66654 | | 66455 | |
| 66655 | #ifdef __LITTLE_ENDIAN__ | 66456 | #ifdef __LITTLE_ENDIAN__ |
| 66656 | __ai uint16x8_t vzip2q_u16(uint16x8_t __p0, uint16x8_t __p1) { | 66457 | __ai __attribute__((target("v8.5a"))) float32x2_t vrnd32z_f32(float32x2_t __p0) { |
| 66657 | uint16x8_t __ret; | 66458 | float32x2_t __ret; |
| 66658 | __ret = __builtin_shufflevector(__p0, __p1, 4, 12, 5, 13, 6, 14, 7, 15); | 66459 | __ret = (float32x2_t) __builtin_neon_vrnd32z_f32((int8x8_t)__p0, 9); |
| 66659 | return __ret; | 66460 | return __ret; |
| 66660 | } | 66461 | } |
| 66661 | #else | 66462 | #else |
| 66662 | __ai uint16x8_t vzip2q_u16(uint16x8_t __p0, uint16x8_t __p1) { | 66463 | __ai __attribute__((target("v8.5a"))) float32x2_t vrnd32z_f32(float32x2_t __p0) { |
| 66663 | uint16x8_t __ret; | 66464 | float32x2_t __ret; |
| 66664 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 66465 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66665 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 66466 | __ret = (float32x2_t) __builtin_neon_vrnd32z_f32((int8x8_t)__rev0, 9); |
| 66666 | __ret = __builtin_shufflevector(__rev0, __rev1, 4, 12, 5, 13, 6, 14, 7, 15); | 66467 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66667 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 66668 | return __ret; | 66468 | return __ret; |
| 66669 | } | 66469 | } |
| 66670 | #endif | 66470 | #endif |
| 66671 | | 66471 | |
| 66672 | #ifdef __LITTLE_ENDIAN__ | 66472 | #ifdef __LITTLE_ENDIAN__ |
| 66673 | __ai int8x16_t vzip2q_s8(int8x16_t __p0, int8x16_t __p1) { | 66473 | __ai __attribute__((target("v8.5a"))) float32x4_t vrnd64xq_f32(float32x4_t __p0) { |
| 66674 | int8x16_t __ret; | 66474 | float32x4_t __ret; |
| 66675 | __ret = __builtin_shufflevector(__p0, __p1, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); | 66475 | __ret = (float32x4_t) __builtin_neon_vrnd64xq_f32((int8x16_t)__p0, 41); |
| 66676 | return __ret; | 66476 | return __ret; |
| 66677 | } | 66477 | } |
| 66678 | #else | 66478 | #else |
| 66679 | __ai int8x16_t vzip2q_s8(int8x16_t __p0, int8x16_t __p1) { | 66479 | __ai __attribute__((target("v8.5a"))) float32x4_t vrnd64xq_f32(float32x4_t __p0) { |
| 66680 | int8x16_t __ret; | 66480 | float32x4_t __ret; |
| 66681 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 66481 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 66682 | int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 66482 | __ret = (float32x4_t) __builtin_neon_vrnd64xq_f32((int8x16_t)__rev0, 41); |
| 66683 | __ret = __builtin_shufflevector(__rev0, __rev1, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); | 66483 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 66684 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 66685 | return __ret; | 66484 | return __ret; |
| 66686 | } | 66485 | } |
| 66687 | #endif | 66486 | #endif |
| 66688 | | 66487 | |
| 66689 | #ifdef __LITTLE_ENDIAN__ | 66488 | #ifdef __LITTLE_ENDIAN__ |
| 66690 | __ai float64x2_t vzip2q_f64(float64x2_t __p0, float64x2_t __p1) { | 66489 | __ai __attribute__((target("v8.5a"))) float32x2_t vrnd64x_f32(float32x2_t __p0) { |
| 66691 | float64x2_t __ret; | 66490 | float32x2_t __ret; |
| 66692 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 66491 | __ret = (float32x2_t) __builtin_neon_vrnd64x_f32((int8x8_t)__p0, 9); |
| 66693 | return __ret; | 66492 | return __ret; |
| 66694 | } | 66493 | } |
| 66695 | #else | 66494 | #else |
| 66696 | __ai float64x2_t vzip2q_f64(float64x2_t __p0, float64x2_t __p1) { | 66495 | __ai __attribute__((target("v8.5a"))) float32x2_t vrnd64x_f32(float32x2_t __p0) { |
| 66697 | float64x2_t __ret; | 66496 | float32x2_t __ret; |
| 66698 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 66497 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66699 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 66498 | __ret = (float32x2_t) __builtin_neon_vrnd64x_f32((int8x8_t)__rev0, 9); |
| 66700 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | | |
| 66701 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 66499 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66702 | return __ret; | 66500 | return __ret; |
| 66703 | } | 66501 | } |
| 66704 | #endif | 66502 | #endif |
| 66705 | | 66503 | |
| 66706 | #ifdef __LITTLE_ENDIAN__ | 66504 | #ifdef __LITTLE_ENDIAN__ |
| 66707 | __ai float32x4_t vzip2q_f32(float32x4_t __p0, float32x4_t __p1) { | 66505 | __ai __attribute__((target("v8.5a"))) float32x4_t vrnd64zq_f32(float32x4_t __p0) { |
| 66708 | float32x4_t __ret; | 66506 | float32x4_t __ret; |
| 66709 | __ret = __builtin_shufflevector(__p0, __p1, 2, 6, 3, 7); | 66507 | __ret = (float32x4_t) __builtin_neon_vrnd64zq_f32((int8x16_t)__p0, 41); |
| 66710 | return __ret; | 66508 | return __ret; |
| 66711 | } | 66509 | } |
| 66712 | #else | 66510 | #else |
| 66713 | __ai float32x4_t vzip2q_f32(float32x4_t __p0, float32x4_t __p1) { | 66511 | __ai __attribute__((target("v8.5a"))) float32x4_t vrnd64zq_f32(float32x4_t __p0) { |
| 66714 | float32x4_t __ret; | 66512 | float32x4_t __ret; |
| 66715 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 66513 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 66716 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 66514 | __ret = (float32x4_t) __builtin_neon_vrnd64zq_f32((int8x16_t)__rev0, 41); |
| 66717 | __ret = __builtin_shufflevector(__rev0, __rev1, 2, 6, 3, 7); | | |
| 66718 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 66515 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 66719 | return __ret; | 66516 | return __ret; |
| 66720 | } | 66517 | } |
| 66721 | #endif | 66518 | #endif |
| 66722 | | 66519 | |
| 66723 | #ifdef __LITTLE_ENDIAN__ | 66520 | #ifdef __LITTLE_ENDIAN__ |
| 66724 | __ai int32x4_t vzip2q_s32(int32x4_t __p0, int32x4_t __p1) { | 66521 | __ai __attribute__((target("v8.5a"))) float32x2_t vrnd64z_f32(float32x2_t __p0) { |
| 66725 | int32x4_t __ret; | 66522 | float32x2_t __ret; |
| 66726 | __ret = __builtin_shufflevector(__p0, __p1, 2, 6, 3, 7); | 66523 | __ret = (float32x2_t) __builtin_neon_vrnd64z_f32((int8x8_t)__p0, 9); |
| 66727 | return __ret; | 66524 | return __ret; |
| 66728 | } | 66525 | } |
| 66729 | #else | 66526 | #else |
| 66730 | __ai int32x4_t vzip2q_s32(int32x4_t __p0, int32x4_t __p1) { | 66527 | __ai __attribute__((target("v8.5a"))) float32x2_t vrnd64z_f32(float32x2_t __p0) { |
| 66731 | int32x4_t __ret; | 66528 | float32x2_t __ret; |
| 66732 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 66529 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66733 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 66530 | __ret = (float32x2_t) __builtin_neon_vrnd64z_f32((int8x8_t)__rev0, 9); |
| 66734 | __ret = __builtin_shufflevector(__rev0, __rev1, 2, 6, 3, 7); | 66531 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66735 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 66736 | return __ret; | 66532 | return __ret; |
| 66737 | } | 66533 | } |
| 66738 | #endif | 66534 | #endif |
| 66739 | | 66535 | |
| | 66536 | #endif |
| | 66537 | #if defined(__aarch64__) && defined(__ARM_FEATURE_DIRECTED_ROUNDING) |
| 66740 | #ifdef __LITTLE_ENDIAN__ | 66538 | #ifdef __LITTLE_ENDIAN__ |
| 66741 | __ai int64x2_t vzip2q_s64(int64x2_t __p0, int64x2_t __p1) { | 66539 | __ai float64x2_t vrndq_f64(float64x2_t __p0) { |
| 66742 | int64x2_t __ret; | 66540 | float64x2_t __ret; |
| 66743 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 66541 | __ret = (float64x2_t) __builtin_neon_vrndq_v((int8x16_t)__p0, 42); |
| 66744 | return __ret; | 66542 | return __ret; |
| 66745 | } | 66543 | } |
| 66746 | #else | 66544 | #else |
| 66747 | __ai int64x2_t vzip2q_s64(int64x2_t __p0, int64x2_t __p1) { | 66545 | __ai float64x2_t vrndq_f64(float64x2_t __p0) { |
| 66748 | int64x2_t __ret; | 66546 | float64x2_t __ret; |
| 66749 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 66547 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66750 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 66548 | __ret = (float64x2_t) __builtin_neon_vrndq_v((int8x16_t)__rev0, 42); |
| 66751 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | | |
| 66752 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 66549 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66753 | return __ret; | 66550 | return __ret; |
| 66754 | } | 66551 | } |
| 66755 | #endif | 66552 | #endif |
| 66756 | | 66553 | |
| | 66554 | __ai float64x1_t vrnd_f64(float64x1_t __p0) { |
| | 66555 | float64x1_t __ret; |
| | 66556 | __ret = (float64x1_t) __builtin_neon_vrnd_v((int8x8_t)__p0, 10); |
| | 66557 | return __ret; |
| | 66558 | } |
| 66757 | #ifdef __LITTLE_ENDIAN__ | 66559 | #ifdef __LITTLE_ENDIAN__ |
| 66758 | __ai int16x8_t vzip2q_s16(int16x8_t __p0, int16x8_t __p1) { | 66560 | __ai float64x2_t vrndaq_f64(float64x2_t __p0) { |
| 66759 | int16x8_t __ret; | 66561 | float64x2_t __ret; |
| 66760 | __ret = __builtin_shufflevector(__p0, __p1, 4, 12, 5, 13, 6, 14, 7, 15); | 66562 | __ret = (float64x2_t) __builtin_neon_vrndaq_v((int8x16_t)__p0, 42); |
| 66761 | return __ret; | 66563 | return __ret; |
| 66762 | } | 66564 | } |
| 66763 | #else | 66565 | #else |
| 66764 | __ai int16x8_t vzip2q_s16(int16x8_t __p0, int16x8_t __p1) { | 66566 | __ai float64x2_t vrndaq_f64(float64x2_t __p0) { |
| 66765 | int16x8_t __ret; | 66567 | float64x2_t __ret; |
| 66766 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 66568 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66767 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 66569 | __ret = (float64x2_t) __builtin_neon_vrndaq_v((int8x16_t)__rev0, 42); |
| 66768 | __ret = __builtin_shufflevector(__rev0, __rev1, 4, 12, 5, 13, 6, 14, 7, 15); | 66570 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66769 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 66770 | return __ret; | 66571 | return __ret; |
| 66771 | } | 66572 | } |
| 66772 | #endif | 66573 | #endif |
| 66773 | | 66574 | |
| | 66575 | __ai float64x1_t vrnda_f64(float64x1_t __p0) { |
| | 66576 | float64x1_t __ret; |
| | 66577 | __ret = (float64x1_t) __builtin_neon_vrnda_v((int8x8_t)__p0, 10); |
| | 66578 | return __ret; |
| | 66579 | } |
| 66774 | #ifdef __LITTLE_ENDIAN__ | 66580 | #ifdef __LITTLE_ENDIAN__ |
| 66775 | __ai uint8x8_t vzip2_u8(uint8x8_t __p0, uint8x8_t __p1) { | 66581 | __ai float64x2_t vrndiq_f64(float64x2_t __p0) { |
| 66776 | uint8x8_t __ret; | 66582 | float64x2_t __ret; |
| 66777 | __ret = __builtin_shufflevector(__p0, __p1, 4, 12, 5, 13, 6, 14, 7, 15); | 66583 | __ret = (float64x2_t) __builtin_neon_vrndiq_v((int8x16_t)__p0, 42); |
| 66778 | return __ret; | 66584 | return __ret; |
| 66779 | } | 66585 | } |
| 66780 | #else | 66586 | #else |
| 66781 | __ai uint8x8_t vzip2_u8(uint8x8_t __p0, uint8x8_t __p1) { | 66587 | __ai float64x2_t vrndiq_f64(float64x2_t __p0) { |
| 66782 | uint8x8_t __ret; | 66588 | float64x2_t __ret; |
| 66783 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 66589 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66784 | uint8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 66590 | __ret = (float64x2_t) __builtin_neon_vrndiq_v((int8x16_t)__rev0, 42); |
| 66785 | __ret = __builtin_shufflevector(__rev0, __rev1, 4, 12, 5, 13, 6, 14, 7, 15); | 66591 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66786 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 66787 | return __ret; | 66592 | return __ret; |
| 66788 | } | 66593 | } |
| 66789 | #endif | 66594 | #endif |
| 66790 | | 66595 | |
| | 66596 | __ai float64x1_t vrndi_f64(float64x1_t __p0) { |
| | 66597 | float64x1_t __ret; |
| | 66598 | __ret = (float64x1_t) __builtin_neon_vrndi_v((int8x8_t)__p0, 10); |
| | 66599 | return __ret; |
| | 66600 | } |
| 66791 | #ifdef __LITTLE_ENDIAN__ | 66601 | #ifdef __LITTLE_ENDIAN__ |
| 66792 | __ai uint32x2_t vzip2_u32(uint32x2_t __p0, uint32x2_t __p1) { | 66602 | __ai float64x2_t vrndmq_f64(float64x2_t __p0) { |
| 66793 | uint32x2_t __ret; | 66603 | float64x2_t __ret; |
| 66794 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 66604 | __ret = (float64x2_t) __builtin_neon_vrndmq_v((int8x16_t)__p0, 42); |
| 66795 | return __ret; | 66605 | return __ret; |
| 66796 | } | 66606 | } |
| 66797 | #else | 66607 | #else |
| 66798 | __ai uint32x2_t vzip2_u32(uint32x2_t __p0, uint32x2_t __p1) { | 66608 | __ai float64x2_t vrndmq_f64(float64x2_t __p0) { |
| 66799 | uint32x2_t __ret; | 66609 | float64x2_t __ret; |
| 66800 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 66610 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66801 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 66611 | __ret = (float64x2_t) __builtin_neon_vrndmq_v((int8x16_t)__rev0, 42); |
| 66802 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | | |
| 66803 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 66612 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66804 | return __ret; | 66613 | return __ret; |
| 66805 | } | 66614 | } |
| 66806 | #endif | 66615 | #endif |
| 66807 | | 66616 | |
| | 66617 | __ai float64x1_t vrndm_f64(float64x1_t __p0) { |
| | 66618 | float64x1_t __ret; |
| | 66619 | __ret = (float64x1_t) __builtin_neon_vrndm_v((int8x8_t)__p0, 10); |
| | 66620 | return __ret; |
| | 66621 | } |
| 66808 | #ifdef __LITTLE_ENDIAN__ | 66622 | #ifdef __LITTLE_ENDIAN__ |
| 66809 | __ai uint16x4_t vzip2_u16(uint16x4_t __p0, uint16x4_t __p1) { | 66623 | __ai float64x2_t vrndnq_f64(float64x2_t __p0) { |
| 66810 | uint16x4_t __ret; | 66624 | float64x2_t __ret; |
| 66811 | __ret = __builtin_shufflevector(__p0, __p1, 2, 6, 3, 7); | 66625 | __ret = (float64x2_t) __builtin_neon_vrndnq_v((int8x16_t)__p0, 42); |
| 66812 | return __ret; | 66626 | return __ret; |
| 66813 | } | 66627 | } |
| 66814 | #else | 66628 | #else |
| 66815 | __ai uint16x4_t vzip2_u16(uint16x4_t __p0, uint16x4_t __p1) { | 66629 | __ai float64x2_t vrndnq_f64(float64x2_t __p0) { |
| 66816 | uint16x4_t __ret; | 66630 | float64x2_t __ret; |
| 66817 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 66631 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66818 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 66632 | __ret = (float64x2_t) __builtin_neon_vrndnq_v((int8x16_t)__rev0, 42); |
| 66819 | __ret = __builtin_shufflevector(__rev0, __rev1, 2, 6, 3, 7); | 66633 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66820 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | | |
| 66821 | return __ret; | 66634 | return __ret; |
| 66822 | } | 66635 | } |
| 66823 | #endif | 66636 | #endif |
| 66824 | | 66637 | |
| | 66638 | __ai float64x1_t vrndn_f64(float64x1_t __p0) { |
| | 66639 | float64x1_t __ret; |
| | 66640 | __ret = (float64x1_t) __builtin_neon_vrndn_v((int8x8_t)__p0, 10); |
| | 66641 | return __ret; |
| | 66642 | } |
| 66825 | #ifdef __LITTLE_ENDIAN__ | 66643 | #ifdef __LITTLE_ENDIAN__ |
| 66826 | __ai int8x8_t vzip2_s8(int8x8_t __p0, int8x8_t __p1) { | 66644 | __ai float64x2_t vrndpq_f64(float64x2_t __p0) { |
| 66827 | int8x8_t __ret; | 66645 | float64x2_t __ret; |
| 66828 | __ret = __builtin_shufflevector(__p0, __p1, 4, 12, 5, 13, 6, 14, 7, 15); | 66646 | __ret = (float64x2_t) __builtin_neon_vrndpq_v((int8x16_t)__p0, 42); |
| 66829 | return __ret; | 66647 | return __ret; |
| 66830 | } | 66648 | } |
| 66831 | #else | 66649 | #else |
| 66832 | __ai int8x8_t vzip2_s8(int8x8_t __p0, int8x8_t __p1) { | 66650 | __ai float64x2_t vrndpq_f64(float64x2_t __p0) { |
| 66833 | int8x8_t __ret; | 66651 | float64x2_t __ret; |
| 66834 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 66652 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66835 | int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); | 66653 | __ret = (float64x2_t) __builtin_neon_vrndpq_v((int8x16_t)__rev0, 42); |
| 66836 | __ret = __builtin_shufflevector(__rev0, __rev1, 4, 12, 5, 13, 6, 14, 7, 15); | 66654 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66837 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | | |
| 66838 | return __ret; | 66655 | return __ret; |
| 66839 | } | 66656 | } |
| 66840 | #endif | 66657 | #endif |
| 66841 | | 66658 | |
| | 66659 | __ai float64x1_t vrndp_f64(float64x1_t __p0) { |
| | 66660 | float64x1_t __ret; |
| | 66661 | __ret = (float64x1_t) __builtin_neon_vrndp_v((int8x8_t)__p0, 10); |
| | 66662 | return __ret; |
| | 66663 | } |
| 66842 | #ifdef __LITTLE_ENDIAN__ | 66664 | #ifdef __LITTLE_ENDIAN__ |
| 66843 | __ai float32x2_t vzip2_f32(float32x2_t __p0, float32x2_t __p1) { | 66665 | __ai float64x2_t vrndxq_f64(float64x2_t __p0) { |
| 66844 | float32x2_t __ret; | 66666 | float64x2_t __ret; |
| 66845 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 66667 | __ret = (float64x2_t) __builtin_neon_vrndxq_v((int8x16_t)__p0, 42); |
| 66846 | return __ret; | 66668 | return __ret; |
| 66847 | } | 66669 | } |
| 66848 | #else | 66670 | #else |
| 66849 | __ai float32x2_t vzip2_f32(float32x2_t __p0, float32x2_t __p1) { | 66671 | __ai float64x2_t vrndxq_f64(float64x2_t __p0) { |
| 66850 | float32x2_t __ret; | 66672 | float64x2_t __ret; |
| 66851 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 66673 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66852 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 66674 | __ret = (float64x2_t) __builtin_neon_vrndxq_v((int8x16_t)__rev0, 42); |
| 66853 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | | |
| 66854 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 66675 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66855 | return __ret; | 66676 | return __ret; |
| 66856 | } | 66677 | } |
| 66857 | #endif | 66678 | #endif |
| 66858 | | 66679 | |
| | 66680 | __ai float64x1_t vrndx_f64(float64x1_t __p0) { |
| | 66681 | float64x1_t __ret; |
| | 66682 | __ret = (float64x1_t) __builtin_neon_vrndx_v((int8x8_t)__p0, 10); |
| | 66683 | return __ret; |
| | 66684 | } |
| | 66685 | #endif |
| | 66686 | #if defined(__aarch64__) && defined(__ARM_FEATURE_NUMERIC_MAXMIN) |
| 66859 | #ifdef __LITTLE_ENDIAN__ | 66687 | #ifdef __LITTLE_ENDIAN__ |
| 66860 | __ai int32x2_t vzip2_s32(int32x2_t __p0, int32x2_t __p1) { | 66688 | __ai float64x2_t vmaxnmq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 66861 | int32x2_t __ret; | 66689 | float64x2_t __ret; |
| 66862 | __ret = __builtin_shufflevector(__p0, __p1, 1, 3); | 66690 | __ret = (float64x2_t) __builtin_neon_vmaxnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| 66863 | return __ret; | 66691 | return __ret; |
| 66864 | } | 66692 | } |
| 66865 | #else | 66693 | #else |
| 66866 | __ai int32x2_t vzip2_s32(int32x2_t __p0, int32x2_t __p1) { | 66694 | __ai float64x2_t vmaxnmq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 66867 | int32x2_t __ret; | 66695 | float64x2_t __ret; |
| 66868 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 66696 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66869 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 66697 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 66870 | __ret = __builtin_shufflevector(__rev0, __rev1, 1, 3); | 66698 | __ret = (float64x2_t) __builtin_neon_vmaxnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| 66871 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 66699 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66872 | return __ret; | 66700 | return __ret; |
| 66873 | } | 66701 | } |
| 66874 | #endif | 66702 | #endif |
| 66875 | | 66703 | |
| | 66704 | __ai float64x1_t vmaxnm_f64(float64x1_t __p0, float64x1_t __p1) { |
| | 66705 | float64x1_t __ret; |
| | 66706 | __ret = (float64x1_t) __builtin_neon_vmaxnm_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| | 66707 | return __ret; |
| | 66708 | } |
| 66876 | #ifdef __LITTLE_ENDIAN__ | 66709 | #ifdef __LITTLE_ENDIAN__ |
| 66877 | __ai int16x4_t vzip2_s16(int16x4_t __p0, int16x4_t __p1) { | 66710 | __ai float64x2_t vminnmq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 66878 | int16x4_t __ret; | 66711 | float64x2_t __ret; |
| 66879 | __ret = __builtin_shufflevector(__p0, __p1, 2, 6, 3, 7); | 66712 | __ret = (float64x2_t) __builtin_neon_vminnmq_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| 66880 | return __ret; | 66713 | return __ret; |
| 66881 | } | 66714 | } |
| 66882 | #else | 66715 | #else |
| 66883 | __ai int16x4_t vzip2_s16(int16x4_t __p0, int16x4_t __p1) { | 66716 | __ai float64x2_t vminnmq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 66884 | int16x4_t __ret; | 66717 | float64x2_t __ret; |
| 66885 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 66718 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 66886 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 66719 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 66887 | __ret = __builtin_shufflevector(__rev0, __rev1, 2, 6, 3, 7); | 66720 | __ret = (float64x2_t) __builtin_neon_vminnmq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| 66888 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 66721 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 66889 | return __ret; | 66722 | return __ret; |
| 66890 | } | 66723 | } |
| 66891 | #endif | 66724 | #endif |
| 66892 | | 66725 | |
| | 66726 | __ai float64x1_t vminnm_f64(float64x1_t __p0, float64x1_t __p1) { |
| | 66727 | float64x1_t __ret; |
| | 66728 | __ret = (float64x1_t) __builtin_neon_vminnm_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| | 66729 | return __ret; |
| | 66730 | } |
| 66893 | #endif | 66731 | #endif |
| 66894 | #ifdef __LITTLE_ENDIAN__ | 66732 | #ifdef __LITTLE_ENDIAN__ |
| 66895 | __ai uint8x16_t vabaq_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) { | 66733 | __ai uint8x16_t vabaq_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) { |
| ... | @@ -67444,60 +67282,60 @@ __ai int32x4_t vaddw_s16(int32x4_t __p0, int16x4_t __p1) { | ... | @@ -67444,60 +67282,60 @@ __ai int32x4_t vaddw_s16(int32x4_t __p0, int16x4_t __p1) { |
| 67444 | #endif | 67282 | #endif |
| 67445 | | 67283 | |
| 67446 | #ifdef __LITTLE_ENDIAN__ | 67284 | #ifdef __LITTLE_ENDIAN__ |
| 67447 | #define vget_lane_f16(__p0_851, __p1_851) __extension__ ({ \ | 67285 | #define vget_lane_f16(__p0_847, __p1_847) __extension__ ({ \ |
| 67448 | float16_t __ret_851; \ | 67286 | float16_t __ret_847; \ |
| 67449 | float16x4_t __s0_851 = __p0_851; \ | 67287 | float16x4_t __s0_847 = __p0_847; \ |
| 67450 | float16x4_t __reint_851 = __s0_851; \ | 67288 | float16x4_t __reint_847 = __s0_847; \ |
| 67451 | int16_t __reint1_851 = vget_lane_s16(*(int16x4_t *) &__reint_851, __p1_851); \ | 67289 | int16_t __reint1_847 = vget_lane_s16(*(int16x4_t *) &__reint_847, __p1_847); \ |
| 67452 | __ret_851 = *(float16_t *) &__reint1_851; \ | 67290 | __ret_847 = *(float16_t *) &__reint1_847; \ |
| 67453 | __ret_851; \ | 67291 | __ret_847; \ |
| 67454 | }) | 67292 | }) |
| 67455 | #else | 67293 | #else |
| 67456 | #define vget_lane_f16(__p0_852, __p1_852) __extension__ ({ \ | 67294 | #define vget_lane_f16(__p0_848, __p1_848) __extension__ ({ \ |
| 67457 | float16_t __ret_852; \ | 67295 | float16_t __ret_848; \ |
| 67458 | float16x4_t __s0_852 = __p0_852; \ | 67296 | float16x4_t __s0_848 = __p0_848; \ |
| 67459 | float16x4_t __rev0_852; __rev0_852 = __builtin_shufflevector(__s0_852, __s0_852, 3, 2, 1, 0); \ | 67297 | float16x4_t __rev0_848; __rev0_848 = __builtin_shufflevector(__s0_848, __s0_848, 3, 2, 1, 0); \ |
| 67460 | float16x4_t __reint_852 = __rev0_852; \ | 67298 | float16x4_t __reint_848 = __rev0_848; \ |
| 67461 | int16_t __reint1_852 = __noswap_vget_lane_s16(*(int16x4_t *) &__reint_852, __p1_852); \ | 67299 | int16_t __reint1_848 = __noswap_vget_lane_s16(*(int16x4_t *) &__reint_848, __p1_848); \ |
| 67462 | __ret_852 = *(float16_t *) &__reint1_852; \ | 67300 | __ret_848 = *(float16_t *) &__reint1_848; \ |
| 67463 | __ret_852; \ | 67301 | __ret_848; \ |
| 67464 | }) | 67302 | }) |
| 67465 | #define __noswap_vget_lane_f16(__p0_853, __p1_853) __extension__ ({ \ | 67303 | #define __noswap_vget_lane_f16(__p0_849, __p1_849) __extension__ ({ \ |
| 67466 | float16_t __ret_853; \ | 67304 | float16_t __ret_849; \ |
| 67467 | float16x4_t __s0_853 = __p0_853; \ | 67305 | float16x4_t __s0_849 = __p0_849; \ |
| 67468 | float16x4_t __reint_853 = __s0_853; \ | 67306 | float16x4_t __reint_849 = __s0_849; \ |
| 67469 | int16_t __reint1_853 = __noswap_vget_lane_s16(*(int16x4_t *) &__reint_853, __p1_853); \ | 67307 | int16_t __reint1_849 = __noswap_vget_lane_s16(*(int16x4_t *) &__reint_849, __p1_849); \ |
| 67470 | __ret_853 = *(float16_t *) &__reint1_853; \ | 67308 | __ret_849 = *(float16_t *) &__reint1_849; \ |
| 67471 | __ret_853; \ | 67309 | __ret_849; \ |
| 67472 | }) | 67310 | }) |
| 67473 | #endif | 67311 | #endif |
| 67474 | | 67312 | |
| 67475 | #ifdef __LITTLE_ENDIAN__ | 67313 | #ifdef __LITTLE_ENDIAN__ |
| 67476 | #define vgetq_lane_f16(__p0_854, __p1_854) __extension__ ({ \ | 67314 | #define vgetq_lane_f16(__p0_850, __p1_850) __extension__ ({ \ |
| 67477 | float16_t __ret_854; \ | 67315 | float16_t __ret_850; \ |
| 67478 | float16x8_t __s0_854 = __p0_854; \ | 67316 | float16x8_t __s0_850 = __p0_850; \ |
| 67479 | float16x8_t __reint_854 = __s0_854; \ | 67317 | float16x8_t __reint_850 = __s0_850; \ |
| 67480 | int16_t __reint1_854 = vgetq_lane_s16(*(int16x8_t *) &__reint_854, __p1_854); \ | 67318 | int16_t __reint1_850 = vgetq_lane_s16(*(int16x8_t *) &__reint_850, __p1_850); \ |
| 67481 | __ret_854 = *(float16_t *) &__reint1_854; \ | 67319 | __ret_850 = *(float16_t *) &__reint1_850; \ |
| 67482 | __ret_854; \ | 67320 | __ret_850; \ |
| 67483 | }) | 67321 | }) |
| 67484 | #else | 67322 | #else |
| 67485 | #define vgetq_lane_f16(__p0_855, __p1_855) __extension__ ({ \ | 67323 | #define vgetq_lane_f16(__p0_851, __p1_851) __extension__ ({ \ |
| 67486 | float16_t __ret_855; \ | 67324 | float16_t __ret_851; \ |
| 67487 | float16x8_t __s0_855 = __p0_855; \ | 67325 | float16x8_t __s0_851 = __p0_851; \ |
| 67488 | float16x8_t __rev0_855; __rev0_855 = __builtin_shufflevector(__s0_855, __s0_855, 7, 6, 5, 4, 3, 2, 1, 0); \ | 67326 | float16x8_t __rev0_851; __rev0_851 = __builtin_shufflevector(__s0_851, __s0_851, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67489 | float16x8_t __reint_855 = __rev0_855; \ | 67327 | float16x8_t __reint_851 = __rev0_851; \ |
| 67490 | int16_t __reint1_855 = __noswap_vgetq_lane_s16(*(int16x8_t *) &__reint_855, __p1_855); \ | 67328 | int16_t __reint1_851 = __noswap_vgetq_lane_s16(*(int16x8_t *) &__reint_851, __p1_851); \ |
| 67491 | __ret_855 = *(float16_t *) &__reint1_855; \ | 67329 | __ret_851 = *(float16_t *) &__reint1_851; \ |
| 67492 | __ret_855; \ | 67330 | __ret_851; \ |
| 67493 | }) | 67331 | }) |
| 67494 | #define __noswap_vgetq_lane_f16(__p0_856, __p1_856) __extension__ ({ \ | 67332 | #define __noswap_vgetq_lane_f16(__p0_852, __p1_852) __extension__ ({ \ |
| 67495 | float16_t __ret_856; \ | 67333 | float16_t __ret_852; \ |
| 67496 | float16x8_t __s0_856 = __p0_856; \ | 67334 | float16x8_t __s0_852 = __p0_852; \ |
| 67497 | float16x8_t __reint_856 = __s0_856; \ | 67335 | float16x8_t __reint_852 = __s0_852; \ |
| 67498 | int16_t __reint1_856 = __noswap_vgetq_lane_s16(*(int16x8_t *) &__reint_856, __p1_856); \ | 67336 | int16_t __reint1_852 = __noswap_vgetq_lane_s16(*(int16x8_t *) &__reint_852, __p1_852); \ |
| 67499 | __ret_856 = *(float16_t *) &__reint1_856; \ | 67337 | __ret_852 = *(float16_t *) &__reint1_852; \ |
| 67500 | __ret_856; \ | 67338 | __ret_852; \ |
| 67501 | }) | 67339 | }) |
| 67502 | #endif | 67340 | #endif |
| 67503 | | 67341 | |
| ... | @@ -67640,98 +67478,98 @@ __ai int32x4_t __noswap_vmlal_s16(int32x4_t __p0, int16x4_t __p1, int16x4_t __p2 | ... | @@ -67640,98 +67478,98 @@ __ai int32x4_t __noswap_vmlal_s16(int32x4_t __p0, int16x4_t __p1, int16x4_t __p2 |
| 67640 | #endif | 67478 | #endif |
| 67641 | | 67479 | |
| 67642 | #ifdef __LITTLE_ENDIAN__ | 67480 | #ifdef __LITTLE_ENDIAN__ |
| 67643 | #define vmlal_lane_u32(__p0_857, __p1_857, __p2_857, __p3_857) __extension__ ({ \ | 67481 | #define vmlal_lane_u32(__p0_853, __p1_853, __p2_853, __p3_853) __extension__ ({ \ |
| 67644 | uint64x2_t __ret_857; \ | 67482 | uint64x2_t __ret_853; \ |
| 67645 | uint64x2_t __s0_857 = __p0_857; \ | 67483 | uint64x2_t __s0_853 = __p0_853; \ |
| 67646 | uint32x2_t __s1_857 = __p1_857; \ | 67484 | uint32x2_t __s1_853 = __p1_853; \ |
| 67647 | uint32x2_t __s2_857 = __p2_857; \ | 67485 | uint32x2_t __s2_853 = __p2_853; \ |
| 67648 | __ret_857 = __s0_857 + vmull_u32(__s1_857, splat_lane_u32(__s2_857, __p3_857)); \ | 67486 | __ret_853 = __s0_853 + vmull_u32(__s1_853, splat_lane_u32(__s2_853, __p3_853)); \ |
| 67649 | __ret_857; \ | 67487 | __ret_853; \ |
| 67650 | }) | 67488 | }) |
| 67651 | #else | 67489 | #else |
| 67652 | #define vmlal_lane_u32(__p0_858, __p1_858, __p2_858, __p3_858) __extension__ ({ \ | 67490 | #define vmlal_lane_u32(__p0_854, __p1_854, __p2_854, __p3_854) __extension__ ({ \ |
| 67653 | uint64x2_t __ret_858; \ | 67491 | uint64x2_t __ret_854; \ |
| 67654 | uint64x2_t __s0_858 = __p0_858; \ | 67492 | uint64x2_t __s0_854 = __p0_854; \ |
| 67655 | uint32x2_t __s1_858 = __p1_858; \ | 67493 | uint32x2_t __s1_854 = __p1_854; \ |
| 67656 | uint32x2_t __s2_858 = __p2_858; \ | 67494 | uint32x2_t __s2_854 = __p2_854; \ |
| 67657 | uint64x2_t __rev0_858; __rev0_858 = __builtin_shufflevector(__s0_858, __s0_858, 1, 0); \ | 67495 | uint64x2_t __rev0_854; __rev0_854 = __builtin_shufflevector(__s0_854, __s0_854, 1, 0); \ |
| 67658 | uint32x2_t __rev1_858; __rev1_858 = __builtin_shufflevector(__s1_858, __s1_858, 1, 0); \ | 67496 | uint32x2_t __rev1_854; __rev1_854 = __builtin_shufflevector(__s1_854, __s1_854, 1, 0); \ |
| 67659 | uint32x2_t __rev2_858; __rev2_858 = __builtin_shufflevector(__s2_858, __s2_858, 1, 0); \ | 67497 | uint32x2_t __rev2_854; __rev2_854 = __builtin_shufflevector(__s2_854, __s2_854, 1, 0); \ |
| 67660 | __ret_858 = __rev0_858 + __noswap_vmull_u32(__rev1_858, __noswap_splat_lane_u32(__rev2_858, __p3_858)); \ | 67498 | __ret_854 = __rev0_854 + __noswap_vmull_u32(__rev1_854, __noswap_splat_lane_u32(__rev2_854, __p3_854)); \ |
| 67661 | __ret_858 = __builtin_shufflevector(__ret_858, __ret_858, 1, 0); \ | 67499 | __ret_854 = __builtin_shufflevector(__ret_854, __ret_854, 1, 0); \ |
| 67662 | __ret_858; \ | 67500 | __ret_854; \ |
| 67663 | }) | 67501 | }) |
| 67664 | #endif | 67502 | #endif |
| 67665 | | 67503 | |
| 67666 | #ifdef __LITTLE_ENDIAN__ | 67504 | #ifdef __LITTLE_ENDIAN__ |
| 67667 | #define vmlal_lane_u16(__p0_859, __p1_859, __p2_859, __p3_859) __extension__ ({ \ | 67505 | #define vmlal_lane_u16(__p0_855, __p1_855, __p2_855, __p3_855) __extension__ ({ \ |
| 67668 | uint32x4_t __ret_859; \ | 67506 | uint32x4_t __ret_855; \ |
| 67669 | uint32x4_t __s0_859 = __p0_859; \ | 67507 | uint32x4_t __s0_855 = __p0_855; \ |
| 67670 | uint16x4_t __s1_859 = __p1_859; \ | 67508 | uint16x4_t __s1_855 = __p1_855; \ |
| 67671 | uint16x4_t __s2_859 = __p2_859; \ | 67509 | uint16x4_t __s2_855 = __p2_855; \ |
| 67672 | __ret_859 = __s0_859 + vmull_u16(__s1_859, splat_lane_u16(__s2_859, __p3_859)); \ | 67510 | __ret_855 = __s0_855 + vmull_u16(__s1_855, splat_lane_u16(__s2_855, __p3_855)); \ |
| 67673 | __ret_859; \ | 67511 | __ret_855; \ |
| 67674 | }) | 67512 | }) |
| 67675 | #else | 67513 | #else |
| 67676 | #define vmlal_lane_u16(__p0_860, __p1_860, __p2_860, __p3_860) __extension__ ({ \ | 67514 | #define vmlal_lane_u16(__p0_856, __p1_856, __p2_856, __p3_856) __extension__ ({ \ |
| 67677 | uint32x4_t __ret_860; \ | 67515 | uint32x4_t __ret_856; \ |
| 67678 | uint32x4_t __s0_860 = __p0_860; \ | 67516 | uint32x4_t __s0_856 = __p0_856; \ |
| 67679 | uint16x4_t __s1_860 = __p1_860; \ | 67517 | uint16x4_t __s1_856 = __p1_856; \ |
| 67680 | uint16x4_t __s2_860 = __p2_860; \ | 67518 | uint16x4_t __s2_856 = __p2_856; \ |
| 67681 | uint32x4_t __rev0_860; __rev0_860 = __builtin_shufflevector(__s0_860, __s0_860, 3, 2, 1, 0); \ | 67519 | uint32x4_t __rev0_856; __rev0_856 = __builtin_shufflevector(__s0_856, __s0_856, 3, 2, 1, 0); \ |
| 67682 | uint16x4_t __rev1_860; __rev1_860 = __builtin_shufflevector(__s1_860, __s1_860, 3, 2, 1, 0); \ | 67520 | uint16x4_t __rev1_856; __rev1_856 = __builtin_shufflevector(__s1_856, __s1_856, 3, 2, 1, 0); \ |
| 67683 | uint16x4_t __rev2_860; __rev2_860 = __builtin_shufflevector(__s2_860, __s2_860, 3, 2, 1, 0); \ | 67521 | uint16x4_t __rev2_856; __rev2_856 = __builtin_shufflevector(__s2_856, __s2_856, 3, 2, 1, 0); \ |
| 67684 | __ret_860 = __rev0_860 + __noswap_vmull_u16(__rev1_860, __noswap_splat_lane_u16(__rev2_860, __p3_860)); \ | 67522 | __ret_856 = __rev0_856 + __noswap_vmull_u16(__rev1_856, __noswap_splat_lane_u16(__rev2_856, __p3_856)); \ |
| 67685 | __ret_860 = __builtin_shufflevector(__ret_860, __ret_860, 3, 2, 1, 0); \ | 67523 | __ret_856 = __builtin_shufflevector(__ret_856, __ret_856, 3, 2, 1, 0); \ |
| 67686 | __ret_860; \ | 67524 | __ret_856; \ |
| 67687 | }) | 67525 | }) |
| 67688 | #endif | 67526 | #endif |
| 67689 | | 67527 | |
| 67690 | #ifdef __LITTLE_ENDIAN__ | 67528 | #ifdef __LITTLE_ENDIAN__ |
| 67691 | #define vmlal_lane_s32(__p0_861, __p1_861, __p2_861, __p3_861) __extension__ ({ \ | 67529 | #define vmlal_lane_s32(__p0_857, __p1_857, __p2_857, __p3_857) __extension__ ({ \ |
| 67692 | int64x2_t __ret_861; \ | 67530 | int64x2_t __ret_857; \ |
| 67693 | int64x2_t __s0_861 = __p0_861; \ | 67531 | int64x2_t __s0_857 = __p0_857; \ |
| 67694 | int32x2_t __s1_861 = __p1_861; \ | 67532 | int32x2_t __s1_857 = __p1_857; \ |
| 67695 | int32x2_t __s2_861 = __p2_861; \ | 67533 | int32x2_t __s2_857 = __p2_857; \ |
| 67696 | __ret_861 = __s0_861 + vmull_s32(__s1_861, splat_lane_s32(__s2_861, __p3_861)); \ | 67534 | __ret_857 = __s0_857 + vmull_s32(__s1_857, splat_lane_s32(__s2_857, __p3_857)); \ |
| 67697 | __ret_861; \ | 67535 | __ret_857; \ |
| 67698 | }) | 67536 | }) |
| 67699 | #else | 67537 | #else |
| 67700 | #define vmlal_lane_s32(__p0_862, __p1_862, __p2_862, __p3_862) __extension__ ({ \ | 67538 | #define vmlal_lane_s32(__p0_858, __p1_858, __p2_858, __p3_858) __extension__ ({ \ |
| 67701 | int64x2_t __ret_862; \ | 67539 | int64x2_t __ret_858; \ |
| 67702 | int64x2_t __s0_862 = __p0_862; \ | 67540 | int64x2_t __s0_858 = __p0_858; \ |
| 67703 | int32x2_t __s1_862 = __p1_862; \ | 67541 | int32x2_t __s1_858 = __p1_858; \ |
| 67704 | int32x2_t __s2_862 = __p2_862; \ | 67542 | int32x2_t __s2_858 = __p2_858; \ |
| 67705 | int64x2_t __rev0_862; __rev0_862 = __builtin_shufflevector(__s0_862, __s0_862, 1, 0); \ | 67543 | int64x2_t __rev0_858; __rev0_858 = __builtin_shufflevector(__s0_858, __s0_858, 1, 0); \ |
| 67706 | int32x2_t __rev1_862; __rev1_862 = __builtin_shufflevector(__s1_862, __s1_862, 1, 0); \ | 67544 | int32x2_t __rev1_858; __rev1_858 = __builtin_shufflevector(__s1_858, __s1_858, 1, 0); \ |
| 67707 | int32x2_t __rev2_862; __rev2_862 = __builtin_shufflevector(__s2_862, __s2_862, 1, 0); \ | 67545 | int32x2_t __rev2_858; __rev2_858 = __builtin_shufflevector(__s2_858, __s2_858, 1, 0); \ |
| 67708 | __ret_862 = __rev0_862 + __noswap_vmull_s32(__rev1_862, __noswap_splat_lane_s32(__rev2_862, __p3_862)); \ | 67546 | __ret_858 = __rev0_858 + __noswap_vmull_s32(__rev1_858, __noswap_splat_lane_s32(__rev2_858, __p3_858)); \ |
| 67709 | __ret_862 = __builtin_shufflevector(__ret_862, __ret_862, 1, 0); \ | 67547 | __ret_858 = __builtin_shufflevector(__ret_858, __ret_858, 1, 0); \ |
| 67710 | __ret_862; \ | 67548 | __ret_858; \ |
| 67711 | }) | 67549 | }) |
| 67712 | #endif | 67550 | #endif |
| 67713 | | 67551 | |
| 67714 | #ifdef __LITTLE_ENDIAN__ | 67552 | #ifdef __LITTLE_ENDIAN__ |
| 67715 | #define vmlal_lane_s16(__p0_863, __p1_863, __p2_863, __p3_863) __extension__ ({ \ | 67553 | #define vmlal_lane_s16(__p0_859, __p1_859, __p2_859, __p3_859) __extension__ ({ \ |
| 67716 | int32x4_t __ret_863; \ | 67554 | int32x4_t __ret_859; \ |
| 67717 | int32x4_t __s0_863 = __p0_863; \ | 67555 | int32x4_t __s0_859 = __p0_859; \ |
| 67718 | int16x4_t __s1_863 = __p1_863; \ | 67556 | int16x4_t __s1_859 = __p1_859; \ |
| 67719 | int16x4_t __s2_863 = __p2_863; \ | 67557 | int16x4_t __s2_859 = __p2_859; \ |
| 67720 | __ret_863 = __s0_863 + vmull_s16(__s1_863, splat_lane_s16(__s2_863, __p3_863)); \ | 67558 | __ret_859 = __s0_859 + vmull_s16(__s1_859, splat_lane_s16(__s2_859, __p3_859)); \ |
| 67721 | __ret_863; \ | 67559 | __ret_859; \ |
| 67722 | }) | 67560 | }) |
| 67723 | #else | 67561 | #else |
| 67724 | #define vmlal_lane_s16(__p0_864, __p1_864, __p2_864, __p3_864) __extension__ ({ \ | 67562 | #define vmlal_lane_s16(__p0_860, __p1_860, __p2_860, __p3_860) __extension__ ({ \ |
| 67725 | int32x4_t __ret_864; \ | 67563 | int32x4_t __ret_860; \ |
| 67726 | int32x4_t __s0_864 = __p0_864; \ | 67564 | int32x4_t __s0_860 = __p0_860; \ |
| 67727 | int16x4_t __s1_864 = __p1_864; \ | 67565 | int16x4_t __s1_860 = __p1_860; \ |
| 67728 | int16x4_t __s2_864 = __p2_864; \ | 67566 | int16x4_t __s2_860 = __p2_860; \ |
| 67729 | int32x4_t __rev0_864; __rev0_864 = __builtin_shufflevector(__s0_864, __s0_864, 3, 2, 1, 0); \ | 67567 | int32x4_t __rev0_860; __rev0_860 = __builtin_shufflevector(__s0_860, __s0_860, 3, 2, 1, 0); \ |
| 67730 | int16x4_t __rev1_864; __rev1_864 = __builtin_shufflevector(__s1_864, __s1_864, 3, 2, 1, 0); \ | 67568 | int16x4_t __rev1_860; __rev1_860 = __builtin_shufflevector(__s1_860, __s1_860, 3, 2, 1, 0); \ |
| 67731 | int16x4_t __rev2_864; __rev2_864 = __builtin_shufflevector(__s2_864, __s2_864, 3, 2, 1, 0); \ | 67569 | int16x4_t __rev2_860; __rev2_860 = __builtin_shufflevector(__s2_860, __s2_860, 3, 2, 1, 0); \ |
| 67732 | __ret_864 = __rev0_864 + __noswap_vmull_s16(__rev1_864, __noswap_splat_lane_s16(__rev2_864, __p3_864)); \ | 67570 | __ret_860 = __rev0_860 + __noswap_vmull_s16(__rev1_860, __noswap_splat_lane_s16(__rev2_860, __p3_860)); \ |
| 67733 | __ret_864 = __builtin_shufflevector(__ret_864, __ret_864, 3, 2, 1, 0); \ | 67571 | __ret_860 = __builtin_shufflevector(__ret_860, __ret_860, 3, 2, 1, 0); \ |
| 67734 | __ret_864; \ | 67572 | __ret_860; \ |
| 67735 | }) | 67573 | }) |
| 67736 | #endif | 67574 | #endif |
| 67737 | | 67575 | |
| ... | @@ -67962,98 +67800,98 @@ __ai int32x4_t __noswap_vmlsl_s16(int32x4_t __p0, int16x4_t __p1, int16x4_t __p2 | ... | @@ -67962,98 +67800,98 @@ __ai int32x4_t __noswap_vmlsl_s16(int32x4_t __p0, int16x4_t __p1, int16x4_t __p2 |
| 67962 | #endif | 67800 | #endif |
| 67963 | | 67801 | |
| 67964 | #ifdef __LITTLE_ENDIAN__ | 67802 | #ifdef __LITTLE_ENDIAN__ |
| 67965 | #define vmlsl_lane_u32(__p0_865, __p1_865, __p2_865, __p3_865) __extension__ ({ \ | 67803 | #define vmlsl_lane_u32(__p0_861, __p1_861, __p2_861, __p3_861) __extension__ ({ \ |
| 67966 | uint64x2_t __ret_865; \ | 67804 | uint64x2_t __ret_861; \ |
| 67967 | uint64x2_t __s0_865 = __p0_865; \ | 67805 | uint64x2_t __s0_861 = __p0_861; \ |
| 67968 | uint32x2_t __s1_865 = __p1_865; \ | 67806 | uint32x2_t __s1_861 = __p1_861; \ |
| 67969 | uint32x2_t __s2_865 = __p2_865; \ | 67807 | uint32x2_t __s2_861 = __p2_861; \ |
| 67970 | __ret_865 = __s0_865 - vmull_u32(__s1_865, splat_lane_u32(__s2_865, __p3_865)); \ | 67808 | __ret_861 = __s0_861 - vmull_u32(__s1_861, splat_lane_u32(__s2_861, __p3_861)); \ |
| 67971 | __ret_865; \ | 67809 | __ret_861; \ |
| 67972 | }) | 67810 | }) |
| 67973 | #else | 67811 | #else |
| 67974 | #define vmlsl_lane_u32(__p0_866, __p1_866, __p2_866, __p3_866) __extension__ ({ \ | 67812 | #define vmlsl_lane_u32(__p0_862, __p1_862, __p2_862, __p3_862) __extension__ ({ \ |
| 67975 | uint64x2_t __ret_866; \ | 67813 | uint64x2_t __ret_862; \ |
| 67976 | uint64x2_t __s0_866 = __p0_866; \ | 67814 | uint64x2_t __s0_862 = __p0_862; \ |
| 67977 | uint32x2_t __s1_866 = __p1_866; \ | 67815 | uint32x2_t __s1_862 = __p1_862; \ |
| 67978 | uint32x2_t __s2_866 = __p2_866; \ | 67816 | uint32x2_t __s2_862 = __p2_862; \ |
| 67979 | uint64x2_t __rev0_866; __rev0_866 = __builtin_shufflevector(__s0_866, __s0_866, 1, 0); \ | 67817 | uint64x2_t __rev0_862; __rev0_862 = __builtin_shufflevector(__s0_862, __s0_862, 1, 0); \ |
| 67980 | uint32x2_t __rev1_866; __rev1_866 = __builtin_shufflevector(__s1_866, __s1_866, 1, 0); \ | 67818 | uint32x2_t __rev1_862; __rev1_862 = __builtin_shufflevector(__s1_862, __s1_862, 1, 0); \ |
| 67981 | uint32x2_t __rev2_866; __rev2_866 = __builtin_shufflevector(__s2_866, __s2_866, 1, 0); \ | 67819 | uint32x2_t __rev2_862; __rev2_862 = __builtin_shufflevector(__s2_862, __s2_862, 1, 0); \ |
| 67982 | __ret_866 = __rev0_866 - __noswap_vmull_u32(__rev1_866, __noswap_splat_lane_u32(__rev2_866, __p3_866)); \ | 67820 | __ret_862 = __rev0_862 - __noswap_vmull_u32(__rev1_862, __noswap_splat_lane_u32(__rev2_862, __p3_862)); \ |
| 67983 | __ret_866 = __builtin_shufflevector(__ret_866, __ret_866, 1, 0); \ | 67821 | __ret_862 = __builtin_shufflevector(__ret_862, __ret_862, 1, 0); \ |
| 67984 | __ret_866; \ | 67822 | __ret_862; \ |
| 67985 | }) | 67823 | }) |
| 67986 | #endif | 67824 | #endif |
| 67987 | | 67825 | |
| 67988 | #ifdef __LITTLE_ENDIAN__ | 67826 | #ifdef __LITTLE_ENDIAN__ |
| 67989 | #define vmlsl_lane_u16(__p0_867, __p1_867, __p2_867, __p3_867) __extension__ ({ \ | 67827 | #define vmlsl_lane_u16(__p0_863, __p1_863, __p2_863, __p3_863) __extension__ ({ \ |
| 67990 | uint32x4_t __ret_867; \ | 67828 | uint32x4_t __ret_863; \ |
| 67991 | uint32x4_t __s0_867 = __p0_867; \ | 67829 | uint32x4_t __s0_863 = __p0_863; \ |
| 67992 | uint16x4_t __s1_867 = __p1_867; \ | 67830 | uint16x4_t __s1_863 = __p1_863; \ |
| 67993 | uint16x4_t __s2_867 = __p2_867; \ | 67831 | uint16x4_t __s2_863 = __p2_863; \ |
| 67994 | __ret_867 = __s0_867 - vmull_u16(__s1_867, splat_lane_u16(__s2_867, __p3_867)); \ | 67832 | __ret_863 = __s0_863 - vmull_u16(__s1_863, splat_lane_u16(__s2_863, __p3_863)); \ |
| 67995 | __ret_867; \ | 67833 | __ret_863; \ |
| 67996 | }) | 67834 | }) |
| 67997 | #else | 67835 | #else |
| 67998 | #define vmlsl_lane_u16(__p0_868, __p1_868, __p2_868, __p3_868) __extension__ ({ \ | 67836 | #define vmlsl_lane_u16(__p0_864, __p1_864, __p2_864, __p3_864) __extension__ ({ \ |
| 67999 | uint32x4_t __ret_868; \ | 67837 | uint32x4_t __ret_864; \ |
| 68000 | uint32x4_t __s0_868 = __p0_868; \ | 67838 | uint32x4_t __s0_864 = __p0_864; \ |
| 68001 | uint16x4_t __s1_868 = __p1_868; \ | 67839 | uint16x4_t __s1_864 = __p1_864; \ |
| 68002 | uint16x4_t __s2_868 = __p2_868; \ | 67840 | uint16x4_t __s2_864 = __p2_864; \ |
| 68003 | uint32x4_t __rev0_868; __rev0_868 = __builtin_shufflevector(__s0_868, __s0_868, 3, 2, 1, 0); \ | 67841 | uint32x4_t __rev0_864; __rev0_864 = __builtin_shufflevector(__s0_864, __s0_864, 3, 2, 1, 0); \ |
| 68004 | uint16x4_t __rev1_868; __rev1_868 = __builtin_shufflevector(__s1_868, __s1_868, 3, 2, 1, 0); \ | 67842 | uint16x4_t __rev1_864; __rev1_864 = __builtin_shufflevector(__s1_864, __s1_864, 3, 2, 1, 0); \ |
| 68005 | uint16x4_t __rev2_868; __rev2_868 = __builtin_shufflevector(__s2_868, __s2_868, 3, 2, 1, 0); \ | 67843 | uint16x4_t __rev2_864; __rev2_864 = __builtin_shufflevector(__s2_864, __s2_864, 3, 2, 1, 0); \ |
| 68006 | __ret_868 = __rev0_868 - __noswap_vmull_u16(__rev1_868, __noswap_splat_lane_u16(__rev2_868, __p3_868)); \ | 67844 | __ret_864 = __rev0_864 - __noswap_vmull_u16(__rev1_864, __noswap_splat_lane_u16(__rev2_864, __p3_864)); \ |
| 68007 | __ret_868 = __builtin_shufflevector(__ret_868, __ret_868, 3, 2, 1, 0); \ | 67845 | __ret_864 = __builtin_shufflevector(__ret_864, __ret_864, 3, 2, 1, 0); \ |
| 68008 | __ret_868; \ | 67846 | __ret_864; \ |
| 68009 | }) | 67847 | }) |
| 68010 | #endif | 67848 | #endif |
| 68011 | | 67849 | |
| 68012 | #ifdef __LITTLE_ENDIAN__ | 67850 | #ifdef __LITTLE_ENDIAN__ |
| 68013 | #define vmlsl_lane_s32(__p0_869, __p1_869, __p2_869, __p3_869) __extension__ ({ \ | 67851 | #define vmlsl_lane_s32(__p0_865, __p1_865, __p2_865, __p3_865) __extension__ ({ \ |
| 68014 | int64x2_t __ret_869; \ | 67852 | int64x2_t __ret_865; \ |
| 68015 | int64x2_t __s0_869 = __p0_869; \ | 67853 | int64x2_t __s0_865 = __p0_865; \ |
| 68016 | int32x2_t __s1_869 = __p1_869; \ | 67854 | int32x2_t __s1_865 = __p1_865; \ |
| 68017 | int32x2_t __s2_869 = __p2_869; \ | 67855 | int32x2_t __s2_865 = __p2_865; \ |
| 68018 | __ret_869 = __s0_869 - vmull_s32(__s1_869, splat_lane_s32(__s2_869, __p3_869)); \ | 67856 | __ret_865 = __s0_865 - vmull_s32(__s1_865, splat_lane_s32(__s2_865, __p3_865)); \ |
| 68019 | __ret_869; \ | 67857 | __ret_865; \ |
| 68020 | }) | 67858 | }) |
| 68021 | #else | 67859 | #else |
| 68022 | #define vmlsl_lane_s32(__p0_870, __p1_870, __p2_870, __p3_870) __extension__ ({ \ | 67860 | #define vmlsl_lane_s32(__p0_866, __p1_866, __p2_866, __p3_866) __extension__ ({ \ |
| 68023 | int64x2_t __ret_870; \ | 67861 | int64x2_t __ret_866; \ |
| 68024 | int64x2_t __s0_870 = __p0_870; \ | 67862 | int64x2_t __s0_866 = __p0_866; \ |
| 68025 | int32x2_t __s1_870 = __p1_870; \ | 67863 | int32x2_t __s1_866 = __p1_866; \ |
| 68026 | int32x2_t __s2_870 = __p2_870; \ | 67864 | int32x2_t __s2_866 = __p2_866; \ |
| 68027 | int64x2_t __rev0_870; __rev0_870 = __builtin_shufflevector(__s0_870, __s0_870, 1, 0); \ | 67865 | int64x2_t __rev0_866; __rev0_866 = __builtin_shufflevector(__s0_866, __s0_866, 1, 0); \ |
| 68028 | int32x2_t __rev1_870; __rev1_870 = __builtin_shufflevector(__s1_870, __s1_870, 1, 0); \ | 67866 | int32x2_t __rev1_866; __rev1_866 = __builtin_shufflevector(__s1_866, __s1_866, 1, 0); \ |
| 68029 | int32x2_t __rev2_870; __rev2_870 = __builtin_shufflevector(__s2_870, __s2_870, 1, 0); \ | 67867 | int32x2_t __rev2_866; __rev2_866 = __builtin_shufflevector(__s2_866, __s2_866, 1, 0); \ |
| 68030 | __ret_870 = __rev0_870 - __noswap_vmull_s32(__rev1_870, __noswap_splat_lane_s32(__rev2_870, __p3_870)); \ | 67868 | __ret_866 = __rev0_866 - __noswap_vmull_s32(__rev1_866, __noswap_splat_lane_s32(__rev2_866, __p3_866)); \ |
| 68031 | __ret_870 = __builtin_shufflevector(__ret_870, __ret_870, 1, 0); \ | 67869 | __ret_866 = __builtin_shufflevector(__ret_866, __ret_866, 1, 0); \ |
| 68032 | __ret_870; \ | 67870 | __ret_866; \ |
| 68033 | }) | 67871 | }) |
| 68034 | #endif | 67872 | #endif |
| 68035 | | 67873 | |
| 68036 | #ifdef __LITTLE_ENDIAN__ | 67874 | #ifdef __LITTLE_ENDIAN__ |
| 68037 | #define vmlsl_lane_s16(__p0_871, __p1_871, __p2_871, __p3_871) __extension__ ({ \ | 67875 | #define vmlsl_lane_s16(__p0_867, __p1_867, __p2_867, __p3_867) __extension__ ({ \ |
| 68038 | int32x4_t __ret_871; \ | 67876 | int32x4_t __ret_867; \ |
| 68039 | int32x4_t __s0_871 = __p0_871; \ | 67877 | int32x4_t __s0_867 = __p0_867; \ |
| 68040 | int16x4_t __s1_871 = __p1_871; \ | 67878 | int16x4_t __s1_867 = __p1_867; \ |
| 68041 | int16x4_t __s2_871 = __p2_871; \ | 67879 | int16x4_t __s2_867 = __p2_867; \ |
| 68042 | __ret_871 = __s0_871 - vmull_s16(__s1_871, splat_lane_s16(__s2_871, __p3_871)); \ | 67880 | __ret_867 = __s0_867 - vmull_s16(__s1_867, splat_lane_s16(__s2_867, __p3_867)); \ |
| 68043 | __ret_871; \ | 67881 | __ret_867; \ |
| 68044 | }) | 67882 | }) |
| 68045 | #else | 67883 | #else |
| 68046 | #define vmlsl_lane_s16(__p0_872, __p1_872, __p2_872, __p3_872) __extension__ ({ \ | 67884 | #define vmlsl_lane_s16(__p0_868, __p1_868, __p2_868, __p3_868) __extension__ ({ \ |
| 68047 | int32x4_t __ret_872; \ | 67885 | int32x4_t __ret_868; \ |
| 68048 | int32x4_t __s0_872 = __p0_872; \ | 67886 | int32x4_t __s0_868 = __p0_868; \ |
| 68049 | int16x4_t __s1_872 = __p1_872; \ | 67887 | int16x4_t __s1_868 = __p1_868; \ |
| 68050 | int16x4_t __s2_872 = __p2_872; \ | 67888 | int16x4_t __s2_868 = __p2_868; \ |
| 68051 | int32x4_t __rev0_872; __rev0_872 = __builtin_shufflevector(__s0_872, __s0_872, 3, 2, 1, 0); \ | 67889 | int32x4_t __rev0_868; __rev0_868 = __builtin_shufflevector(__s0_868, __s0_868, 3, 2, 1, 0); \ |
| 68052 | int16x4_t __rev1_872; __rev1_872 = __builtin_shufflevector(__s1_872, __s1_872, 3, 2, 1, 0); \ | 67890 | int16x4_t __rev1_868; __rev1_868 = __builtin_shufflevector(__s1_868, __s1_868, 3, 2, 1, 0); \ |
| 68053 | int16x4_t __rev2_872; __rev2_872 = __builtin_shufflevector(__s2_872, __s2_872, 3, 2, 1, 0); \ | 67891 | int16x4_t __rev2_868; __rev2_868 = __builtin_shufflevector(__s2_868, __s2_868, 3, 2, 1, 0); \ |
| 68054 | __ret_872 = __rev0_872 - __noswap_vmull_s16(__rev1_872, __noswap_splat_lane_s16(__rev2_872, __p3_872)); \ | 67892 | __ret_868 = __rev0_868 - __noswap_vmull_s16(__rev1_868, __noswap_splat_lane_s16(__rev2_868, __p3_868)); \ |
| 68055 | __ret_872 = __builtin_shufflevector(__ret_872, __ret_872, 3, 2, 1, 0); \ | 67893 | __ret_868 = __builtin_shufflevector(__ret_868, __ret_868, 3, 2, 1, 0); \ |
| 68056 | __ret_872; \ | 67894 | __ret_868; \ |
| 68057 | }) | 67895 | }) |
| 68058 | #endif | 67896 | #endif |
| 68059 | | 67897 | |
| ... | @@ -68146,69 +67984,116 @@ __ai int32x4_t __noswap_vmlsl_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2 | ... | @@ -68146,69 +67984,116 @@ __ai int32x4_t __noswap_vmlsl_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2 |
| 68146 | #endif | 67984 | #endif |
| 68147 | | 67985 | |
| 68148 | #ifdef __LITTLE_ENDIAN__ | 67986 | #ifdef __LITTLE_ENDIAN__ |
| 68149 | #define vset_lane_f16(__p0_873, __p1_873, __p2_873) __extension__ ({ \ | 67987 | #define vset_lane_f16(__p0_869, __p1_869, __p2_869) __extension__ ({ \ |
| 68150 | float16x4_t __ret_873; \ | 67988 | float16x4_t __ret_869; \ |
| 68151 | float16_t __s0_873 = __p0_873; \ | 67989 | float16_t __s0_869 = __p0_869; \ |
| 68152 | float16x4_t __s1_873 = __p1_873; \ | 67990 | float16x4_t __s1_869 = __p1_869; \ |
| 68153 | float16_t __reint_873 = __s0_873; \ | 67991 | float16_t __reint_869 = __s0_869; \ |
| 68154 | float16x4_t __reint1_873 = __s1_873; \ | 67992 | float16x4_t __reint1_869 = __s1_869; \ |
| 68155 | int16x4_t __reint2_873 = vset_lane_s16(*(int16_t *) &__reint_873, *(int16x4_t *) &__reint1_873, __p2_873); \ | 67993 | int16x4_t __reint2_869 = vset_lane_s16(*(int16_t *) &__reint_869, *(int16x4_t *) &__reint1_869, __p2_869); \ |
| 68156 | __ret_873 = *(float16x4_t *) &__reint2_873; \ | 67994 | __ret_869 = *(float16x4_t *) &__reint2_869; \ |
| | 67995 | __ret_869; \ |
| | 67996 | }) |
| | 67997 | #else |
| | 67998 | #define vset_lane_f16(__p0_870, __p1_870, __p2_870) __extension__ ({ \ |
| | 67999 | float16x4_t __ret_870; \ |
| | 68000 | float16_t __s0_870 = __p0_870; \ |
| | 68001 | float16x4_t __s1_870 = __p1_870; \ |
| | 68002 | float16x4_t __rev1_870; __rev1_870 = __builtin_shufflevector(__s1_870, __s1_870, 3, 2, 1, 0); \ |
| | 68003 | float16_t __reint_870 = __s0_870; \ |
| | 68004 | float16x4_t __reint1_870 = __rev1_870; \ |
| | 68005 | int16x4_t __reint2_870 = __noswap_vset_lane_s16(*(int16_t *) &__reint_870, *(int16x4_t *) &__reint1_870, __p2_870); \ |
| | 68006 | __ret_870 = *(float16x4_t *) &__reint2_870; \ |
| | 68007 | __ret_870 = __builtin_shufflevector(__ret_870, __ret_870, 3, 2, 1, 0); \ |
| | 68008 | __ret_870; \ |
| | 68009 | }) |
| | 68010 | #endif |
| | 68011 | |
| | 68012 | #ifdef __LITTLE_ENDIAN__ |
| | 68013 | #define vsetq_lane_f16(__p0_871, __p1_871, __p2_871) __extension__ ({ \ |
| | 68014 | float16x8_t __ret_871; \ |
| | 68015 | float16_t __s0_871 = __p0_871; \ |
| | 68016 | float16x8_t __s1_871 = __p1_871; \ |
| | 68017 | float16_t __reint_871 = __s0_871; \ |
| | 68018 | float16x8_t __reint1_871 = __s1_871; \ |
| | 68019 | int16x8_t __reint2_871 = vsetq_lane_s16(*(int16_t *) &__reint_871, *(int16x8_t *) &__reint1_871, __p2_871); \ |
| | 68020 | __ret_871 = *(float16x8_t *) &__reint2_871; \ |
| | 68021 | __ret_871; \ |
| | 68022 | }) |
| | 68023 | #else |
| | 68024 | #define vsetq_lane_f16(__p0_872, __p1_872, __p2_872) __extension__ ({ \ |
| | 68025 | float16x8_t __ret_872; \ |
| | 68026 | float16_t __s0_872 = __p0_872; \ |
| | 68027 | float16x8_t __s1_872 = __p1_872; \ |
| | 68028 | float16x8_t __rev1_872; __rev1_872 = __builtin_shufflevector(__s1_872, __s1_872, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 68029 | float16_t __reint_872 = __s0_872; \ |
| | 68030 | float16x8_t __reint1_872 = __rev1_872; \ |
| | 68031 | int16x8_t __reint2_872 = __noswap_vsetq_lane_s16(*(int16_t *) &__reint_872, *(int16x8_t *) &__reint1_872, __p2_872); \ |
| | 68032 | __ret_872 = *(float16x8_t *) &__reint2_872; \ |
| | 68033 | __ret_872 = __builtin_shufflevector(__ret_872, __ret_872, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 68034 | __ret_872; \ |
| | 68035 | }) |
| | 68036 | #endif |
| | 68037 | |
| | 68038 | #ifdef __LITTLE_ENDIAN__ |
| | 68039 | #define vbfmlalbq_lane_f32(__p0_873, __p1_873, __p2_873, __p3_873) __extension__ ({ \ |
| | 68040 | float32x4_t __ret_873; \ |
| | 68041 | float32x4_t __s0_873 = __p0_873; \ |
| | 68042 | bfloat16x8_t __s1_873 = __p1_873; \ |
| | 68043 | bfloat16x4_t __s2_873 = __p2_873; \ |
| | 68044 | __ret_873 = vbfmlalbq_f32(__s0_873, __s1_873, (bfloat16x8_t) {vget_lane_bf16(__s2_873, __p3_873), vget_lane_bf16(__s2_873, __p3_873), vget_lane_bf16(__s2_873, __p3_873), vget_lane_bf16(__s2_873, __p3_873), vget_lane_bf16(__s2_873, __p3_873), vget_lane_bf16(__s2_873, __p3_873), vget_lane_bf16(__s2_873, __p3_873), vget_lane_bf16(__s2_873, __p3_873)}); \ |
| 68157 | __ret_873; \ | 68045 | __ret_873; \ |
| 68158 | }) | 68046 | }) |
| 68159 | #else | 68047 | #else |
| 68160 | #define vset_lane_f16(__p0_874, __p1_874, __p2_874) __extension__ ({ \ | 68048 | #define vbfmlalbq_lane_f32(__p0_874, __p1_874, __p2_874, __p3_874) __extension__ ({ \ |
| 68161 | float16x4_t __ret_874; \ | 68049 | float32x4_t __ret_874; \ |
| 68162 | float16_t __s0_874 = __p0_874; \ | 68050 | float32x4_t __s0_874 = __p0_874; \ |
| 68163 | float16x4_t __s1_874 = __p1_874; \ | 68051 | bfloat16x8_t __s1_874 = __p1_874; \ |
| 68164 | float16x4_t __rev1_874; __rev1_874 = __builtin_shufflevector(__s1_874, __s1_874, 3, 2, 1, 0); \ | 68052 | bfloat16x4_t __s2_874 = __p2_874; \ |
| 68165 | float16_t __reint_874 = __s0_874; \ | 68053 | float32x4_t __rev0_874; __rev0_874 = __builtin_shufflevector(__s0_874, __s0_874, 3, 2, 1, 0); \ |
| 68166 | float16x4_t __reint1_874 = __rev1_874; \ | 68054 | bfloat16x8_t __rev1_874; __rev1_874 = __builtin_shufflevector(__s1_874, __s1_874, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 68167 | int16x4_t __reint2_874 = __noswap_vset_lane_s16(*(int16_t *) &__reint_874, *(int16x4_t *) &__reint1_874, __p2_874); \ | 68055 | bfloat16x4_t __rev2_874; __rev2_874 = __builtin_shufflevector(__s2_874, __s2_874, 3, 2, 1, 0); \ |
| 68168 | __ret_874 = *(float16x4_t *) &__reint2_874; \ | 68056 | __ret_874 = __noswap_vbfmlalbq_f32(__rev0_874, __rev1_874, (bfloat16x8_t) {__noswap_vget_lane_bf16(__rev2_874, __p3_874), __noswap_vget_lane_bf16(__rev2_874, __p3_874), __noswap_vget_lane_bf16(__rev2_874, __p3_874), __noswap_vget_lane_bf16(__rev2_874, __p3_874), __noswap_vget_lane_bf16(__rev2_874, __p3_874), __noswap_vget_lane_bf16(__rev2_874, __p3_874), __noswap_vget_lane_bf16(__rev2_874, __p3_874), __noswap_vget_lane_bf16(__rev2_874, __p3_874)}); \ |
| 68169 | __ret_874 = __builtin_shufflevector(__ret_874, __ret_874, 3, 2, 1, 0); \ | 68057 | __ret_874 = __builtin_shufflevector(__ret_874, __ret_874, 3, 2, 1, 0); \ |
| 68170 | __ret_874; \ | 68058 | __ret_874; \ |
| 68171 | }) | 68059 | }) |
| 68172 | #endif | 68060 | #endif |
| 68173 | | 68061 | |
| 68174 | #ifdef __LITTLE_ENDIAN__ | 68062 | #ifdef __LITTLE_ENDIAN__ |
| 68175 | #define vsetq_lane_f16(__p0_875, __p1_875, __p2_875) __extension__ ({ \ | 68063 | #define vbfmlalbq_laneq_f32(__p0_875, __p1_875, __p2_875, __p3_875) __extension__ ({ \ |
| 68176 | float16x8_t __ret_875; \ | 68064 | float32x4_t __ret_875; \ |
| 68177 | float16_t __s0_875 = __p0_875; \ | 68065 | float32x4_t __s0_875 = __p0_875; \ |
| 68178 | float16x8_t __s1_875 = __p1_875; \ | 68066 | bfloat16x8_t __s1_875 = __p1_875; \ |
| 68179 | float16_t __reint_875 = __s0_875; \ | 68067 | bfloat16x8_t __s2_875 = __p2_875; \ |
| 68180 | float16x8_t __reint1_875 = __s1_875; \ | 68068 | __ret_875 = vbfmlalbq_f32(__s0_875, __s1_875, (bfloat16x8_t) {vgetq_lane_bf16(__s2_875, __p3_875), vgetq_lane_bf16(__s2_875, __p3_875), vgetq_lane_bf16(__s2_875, __p3_875), vgetq_lane_bf16(__s2_875, __p3_875), vgetq_lane_bf16(__s2_875, __p3_875), vgetq_lane_bf16(__s2_875, __p3_875), vgetq_lane_bf16(__s2_875, __p3_875), vgetq_lane_bf16(__s2_875, __p3_875)}); \ |
| 68181 | int16x8_t __reint2_875 = vsetq_lane_s16(*(int16_t *) &__reint_875, *(int16x8_t *) &__reint1_875, __p2_875); \ | | |
| 68182 | __ret_875 = *(float16x8_t *) &__reint2_875; \ | | |
| 68183 | __ret_875; \ | 68069 | __ret_875; \ |
| 68184 | }) | 68070 | }) |
| 68185 | #else | 68071 | #else |
| 68186 | #define vsetq_lane_f16(__p0_876, __p1_876, __p2_876) __extension__ ({ \ | 68072 | #define vbfmlalbq_laneq_f32(__p0_876, __p1_876, __p2_876, __p3_876) __extension__ ({ \ |
| 68187 | float16x8_t __ret_876; \ | 68073 | float32x4_t __ret_876; \ |
| 68188 | float16_t __s0_876 = __p0_876; \ | 68074 | float32x4_t __s0_876 = __p0_876; \ |
| 68189 | float16x8_t __s1_876 = __p1_876; \ | 68075 | bfloat16x8_t __s1_876 = __p1_876; \ |
| 68190 | float16x8_t __rev1_876; __rev1_876 = __builtin_shufflevector(__s1_876, __s1_876, 7, 6, 5, 4, 3, 2, 1, 0); \ | 68076 | bfloat16x8_t __s2_876 = __p2_876; \ |
| 68191 | float16_t __reint_876 = __s0_876; \ | 68077 | float32x4_t __rev0_876; __rev0_876 = __builtin_shufflevector(__s0_876, __s0_876, 3, 2, 1, 0); \ |
| 68192 | float16x8_t __reint1_876 = __rev1_876; \ | 68078 | bfloat16x8_t __rev1_876; __rev1_876 = __builtin_shufflevector(__s1_876, __s1_876, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 68193 | int16x8_t __reint2_876 = __noswap_vsetq_lane_s16(*(int16_t *) &__reint_876, *(int16x8_t *) &__reint1_876, __p2_876); \ | 68079 | bfloat16x8_t __rev2_876; __rev2_876 = __builtin_shufflevector(__s2_876, __s2_876, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 68194 | __ret_876 = *(float16x8_t *) &__reint2_876; \ | 68080 | __ret_876 = __noswap_vbfmlalbq_f32(__rev0_876, __rev1_876, (bfloat16x8_t) {__noswap_vgetq_lane_bf16(__rev2_876, __p3_876), __noswap_vgetq_lane_bf16(__rev2_876, __p3_876), __noswap_vgetq_lane_bf16(__rev2_876, __p3_876), __noswap_vgetq_lane_bf16(__rev2_876, __p3_876), __noswap_vgetq_lane_bf16(__rev2_876, __p3_876), __noswap_vgetq_lane_bf16(__rev2_876, __p3_876), __noswap_vgetq_lane_bf16(__rev2_876, __p3_876), __noswap_vgetq_lane_bf16(__rev2_876, __p3_876)}); \ |
| 68195 | __ret_876 = __builtin_shufflevector(__ret_876, __ret_876, 7, 6, 5, 4, 3, 2, 1, 0); \ | 68081 | __ret_876 = __builtin_shufflevector(__ret_876, __ret_876, 3, 2, 1, 0); \ |
| 68196 | __ret_876; \ | 68082 | __ret_876; \ |
| 68197 | }) | 68083 | }) |
| 68198 | #endif | 68084 | #endif |
| 68199 | | 68085 | |
| 68200 | #if defined(__ARM_FEATURE_BF16_VECTOR_ARITHMETIC) | | |
| 68201 | #ifdef __LITTLE_ENDIAN__ | 68086 | #ifdef __LITTLE_ENDIAN__ |
| 68202 | #define vbfmlalbq_lane_f32(__p0_877, __p1_877, __p2_877, __p3_877) __extension__ ({ \ | 68087 | #define vbfmlaltq_lane_f32(__p0_877, __p1_877, __p2_877, __p3_877) __extension__ ({ \ |
| 68203 | float32x4_t __ret_877; \ | 68088 | float32x4_t __ret_877; \ |
| 68204 | float32x4_t __s0_877 = __p0_877; \ | 68089 | float32x4_t __s0_877 = __p0_877; \ |
| 68205 | bfloat16x8_t __s1_877 = __p1_877; \ | 68090 | bfloat16x8_t __s1_877 = __p1_877; \ |
| 68206 | bfloat16x4_t __s2_877 = __p2_877; \ | 68091 | bfloat16x4_t __s2_877 = __p2_877; \ |
| 68207 | __ret_877 = vbfmlalbq_f32(__s0_877, __s1_877, (bfloat16x8_t) {vget_lane_bf16(__s2_877, __p3_877), vget_lane_bf16(__s2_877, __p3_877), vget_lane_bf16(__s2_877, __p3_877), vget_lane_bf16(__s2_877, __p3_877), vget_lane_bf16(__s2_877, __p3_877), vget_lane_bf16(__s2_877, __p3_877), vget_lane_bf16(__s2_877, __p3_877), vget_lane_bf16(__s2_877, __p3_877)}); \ | 68092 | __ret_877 = vbfmlaltq_f32(__s0_877, __s1_877, (bfloat16x8_t) {vget_lane_bf16(__s2_877, __p3_877), vget_lane_bf16(__s2_877, __p3_877), vget_lane_bf16(__s2_877, __p3_877), vget_lane_bf16(__s2_877, __p3_877), vget_lane_bf16(__s2_877, __p3_877), vget_lane_bf16(__s2_877, __p3_877), vget_lane_bf16(__s2_877, __p3_877), vget_lane_bf16(__s2_877, __p3_877)}); \ |
| 68208 | __ret_877; \ | 68093 | __ret_877; \ |
| 68209 | }) | 68094 | }) |
| 68210 | #else | 68095 | #else |
| 68211 | #define vbfmlalbq_lane_f32(__p0_878, __p1_878, __p2_878, __p3_878) __extension__ ({ \ | 68096 | #define vbfmlaltq_lane_f32(__p0_878, __p1_878, __p2_878, __p3_878) __extension__ ({ \ |
| 68212 | float32x4_t __ret_878; \ | 68097 | float32x4_t __ret_878; \ |
| 68213 | float32x4_t __s0_878 = __p0_878; \ | 68098 | float32x4_t __s0_878 = __p0_878; \ |
| 68214 | bfloat16x8_t __s1_878 = __p1_878; \ | 68099 | bfloat16x8_t __s1_878 = __p1_878; \ |
| ... | @@ -68216,23 +68101,23 @@ int16x8_t __reint2_876 = __noswap_vsetq_lane_s16(*(int16_t *) &__reint_876, *(in | ... | @@ -68216,23 +68101,23 @@ int16x8_t __reint2_876 = __noswap_vsetq_lane_s16(*(int16_t *) &__reint_876, *(in |
| 68216 | float32x4_t __rev0_878; __rev0_878 = __builtin_shufflevector(__s0_878, __s0_878, 3, 2, 1, 0); \ | 68101 | float32x4_t __rev0_878; __rev0_878 = __builtin_shufflevector(__s0_878, __s0_878, 3, 2, 1, 0); \ |
| 68217 | bfloat16x8_t __rev1_878; __rev1_878 = __builtin_shufflevector(__s1_878, __s1_878, 7, 6, 5, 4, 3, 2, 1, 0); \ | 68102 | bfloat16x8_t __rev1_878; __rev1_878 = __builtin_shufflevector(__s1_878, __s1_878, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 68218 | bfloat16x4_t __rev2_878; __rev2_878 = __builtin_shufflevector(__s2_878, __s2_878, 3, 2, 1, 0); \ | 68103 | bfloat16x4_t __rev2_878; __rev2_878 = __builtin_shufflevector(__s2_878, __s2_878, 3, 2, 1, 0); \ |
| 68219 | __ret_878 = __noswap_vbfmlalbq_f32(__rev0_878, __rev1_878, (bfloat16x8_t) {__noswap_vget_lane_bf16(__rev2_878, __p3_878), __noswap_vget_lane_bf16(__rev2_878, __p3_878), __noswap_vget_lane_bf16(__rev2_878, __p3_878), __noswap_vget_lane_bf16(__rev2_878, __p3_878), __noswap_vget_lane_bf16(__rev2_878, __p3_878), __noswap_vget_lane_bf16(__rev2_878, __p3_878), __noswap_vget_lane_bf16(__rev2_878, __p3_878), __noswap_vget_lane_bf16(__rev2_878, __p3_878)}); \ | 68104 | __ret_878 = __noswap_vbfmlaltq_f32(__rev0_878, __rev1_878, (bfloat16x8_t) {__noswap_vget_lane_bf16(__rev2_878, __p3_878), __noswap_vget_lane_bf16(__rev2_878, __p3_878), __noswap_vget_lane_bf16(__rev2_878, __p3_878), __noswap_vget_lane_bf16(__rev2_878, __p3_878), __noswap_vget_lane_bf16(__rev2_878, __p3_878), __noswap_vget_lane_bf16(__rev2_878, __p3_878), __noswap_vget_lane_bf16(__rev2_878, __p3_878), __noswap_vget_lane_bf16(__rev2_878, __p3_878)}); \ |
| 68220 | __ret_878 = __builtin_shufflevector(__ret_878, __ret_878, 3, 2, 1, 0); \ | 68105 | __ret_878 = __builtin_shufflevector(__ret_878, __ret_878, 3, 2, 1, 0); \ |
| 68221 | __ret_878; \ | 68106 | __ret_878; \ |
| 68222 | }) | 68107 | }) |
| 68223 | #endif | 68108 | #endif |
| 68224 | | 68109 | |
| 68225 | #ifdef __LITTLE_ENDIAN__ | 68110 | #ifdef __LITTLE_ENDIAN__ |
| 68226 | #define vbfmlalbq_laneq_f32(__p0_879, __p1_879, __p2_879, __p3_879) __extension__ ({ \ | 68111 | #define vbfmlaltq_laneq_f32(__p0_879, __p1_879, __p2_879, __p3_879) __extension__ ({ \ |
| 68227 | float32x4_t __ret_879; \ | 68112 | float32x4_t __ret_879; \ |
| 68228 | float32x4_t __s0_879 = __p0_879; \ | 68113 | float32x4_t __s0_879 = __p0_879; \ |
| 68229 | bfloat16x8_t __s1_879 = __p1_879; \ | 68114 | bfloat16x8_t __s1_879 = __p1_879; \ |
| 68230 | bfloat16x8_t __s2_879 = __p2_879; \ | 68115 | bfloat16x8_t __s2_879 = __p2_879; \ |
| 68231 | __ret_879 = vbfmlalbq_f32(__s0_879, __s1_879, (bfloat16x8_t) {vgetq_lane_bf16(__s2_879, __p3_879), vgetq_lane_bf16(__s2_879, __p3_879), vgetq_lane_bf16(__s2_879, __p3_879), vgetq_lane_bf16(__s2_879, __p3_879), vgetq_lane_bf16(__s2_879, __p3_879), vgetq_lane_bf16(__s2_879, __p3_879), vgetq_lane_bf16(__s2_879, __p3_879), vgetq_lane_bf16(__s2_879, __p3_879)}); \ | 68116 | __ret_879 = vbfmlaltq_f32(__s0_879, __s1_879, (bfloat16x8_t) {vgetq_lane_bf16(__s2_879, __p3_879), vgetq_lane_bf16(__s2_879, __p3_879), vgetq_lane_bf16(__s2_879, __p3_879), vgetq_lane_bf16(__s2_879, __p3_879), vgetq_lane_bf16(__s2_879, __p3_879), vgetq_lane_bf16(__s2_879, __p3_879), vgetq_lane_bf16(__s2_879, __p3_879), vgetq_lane_bf16(__s2_879, __p3_879)}); \ |
| 68232 | __ret_879; \ | 68117 | __ret_879; \ |
| 68233 | }) | 68118 | }) |
| 68234 | #else | 68119 | #else |
| 68235 | #define vbfmlalbq_laneq_f32(__p0_880, __p1_880, __p2_880, __p3_880) __extension__ ({ \ | 68120 | #define vbfmlaltq_laneq_f32(__p0_880, __p1_880, __p2_880, __p3_880) __extension__ ({ \ |
| 68236 | float32x4_t __ret_880; \ | 68121 | float32x4_t __ret_880; \ |
| 68237 | float32x4_t __s0_880 = __p0_880; \ | 68122 | float32x4_t __s0_880 = __p0_880; \ |
| 68238 | bfloat16x8_t __s1_880 = __p1_880; \ | 68123 | bfloat16x8_t __s1_880 = __p1_880; \ |
| ... | @@ -68240,68 +68125,20 @@ int16x8_t __reint2_876 = __noswap_vsetq_lane_s16(*(int16_t *) &__reint_876, *(in | ... | @@ -68240,68 +68125,20 @@ int16x8_t __reint2_876 = __noswap_vsetq_lane_s16(*(int16_t *) &__reint_876, *(in |
| 68240 | float32x4_t __rev0_880; __rev0_880 = __builtin_shufflevector(__s0_880, __s0_880, 3, 2, 1, 0); \ | 68125 | float32x4_t __rev0_880; __rev0_880 = __builtin_shufflevector(__s0_880, __s0_880, 3, 2, 1, 0); \ |
| 68241 | bfloat16x8_t __rev1_880; __rev1_880 = __builtin_shufflevector(__s1_880, __s1_880, 7, 6, 5, 4, 3, 2, 1, 0); \ | 68126 | bfloat16x8_t __rev1_880; __rev1_880 = __builtin_shufflevector(__s1_880, __s1_880, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 68242 | bfloat16x8_t __rev2_880; __rev2_880 = __builtin_shufflevector(__s2_880, __s2_880, 7, 6, 5, 4, 3, 2, 1, 0); \ | 68127 | bfloat16x8_t __rev2_880; __rev2_880 = __builtin_shufflevector(__s2_880, __s2_880, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 68243 | __ret_880 = __noswap_vbfmlalbq_f32(__rev0_880, __rev1_880, (bfloat16x8_t) {__noswap_vgetq_lane_bf16(__rev2_880, __p3_880), __noswap_vgetq_lane_bf16(__rev2_880, __p3_880), __noswap_vgetq_lane_bf16(__rev2_880, __p3_880), __noswap_vgetq_lane_bf16(__rev2_880, __p3_880), __noswap_vgetq_lane_bf16(__rev2_880, __p3_880), __noswap_vgetq_lane_bf16(__rev2_880, __p3_880), __noswap_vgetq_lane_bf16(__rev2_880, __p3_880), __noswap_vgetq_lane_bf16(__rev2_880, __p3_880)}); \ | 68128 | __ret_880 = __noswap_vbfmlaltq_f32(__rev0_880, __rev1_880, (bfloat16x8_t) {__noswap_vgetq_lane_bf16(__rev2_880, __p3_880), __noswap_vgetq_lane_bf16(__rev2_880, __p3_880), __noswap_vgetq_lane_bf16(__rev2_880, __p3_880), __noswap_vgetq_lane_bf16(__rev2_880, __p3_880), __noswap_vgetq_lane_bf16(__rev2_880, __p3_880), __noswap_vgetq_lane_bf16(__rev2_880, __p3_880), __noswap_vgetq_lane_bf16(__rev2_880, __p3_880), __noswap_vgetq_lane_bf16(__rev2_880, __p3_880)}); \ |
| 68244 | __ret_880 = __builtin_shufflevector(__ret_880, __ret_880, 3, 2, 1, 0); \ | 68129 | __ret_880 = __builtin_shufflevector(__ret_880, __ret_880, 3, 2, 1, 0); \ |
| 68245 | __ret_880; \ | 68130 | __ret_880; \ |
| 68246 | }) | 68131 | }) |
| 68247 | #endif | 68132 | #endif |
| 68248 | | 68133 | |
| 68249 | #ifdef __LITTLE_ENDIAN__ | 68134 | #ifdef __LITTLE_ENDIAN__ |
| 68250 | #define vbfmlaltq_lane_f32(__p0_881, __p1_881, __p2_881, __p3_881) __extension__ ({ \ | 68135 | __ai __attribute__((target("bf16"))) float32x4_t vcvtq_high_f32_bf16(bfloat16x8_t __p0) { |
| 68251 | float32x4_t __ret_881; \ | | |
| 68252 | float32x4_t __s0_881 = __p0_881; \ | | |
| 68253 | bfloat16x8_t __s1_881 = __p1_881; \ | | |
| 68254 | bfloat16x4_t __s2_881 = __p2_881; \ | | |
| 68255 | __ret_881 = vbfmlaltq_f32(__s0_881, __s1_881, (bfloat16x8_t) {vget_lane_bf16(__s2_881, __p3_881), vget_lane_bf16(__s2_881, __p3_881), vget_lane_bf16(__s2_881, __p3_881), vget_lane_bf16(__s2_881, __p3_881), vget_lane_bf16(__s2_881, __p3_881), vget_lane_bf16(__s2_881, __p3_881), vget_lane_bf16(__s2_881, __p3_881), vget_lane_bf16(__s2_881, __p3_881)}); \ | | |
| 68256 | __ret_881; \ | | |
| 68257 | }) | | |
| 68258 | #else | | |
| 68259 | #define vbfmlaltq_lane_f32(__p0_882, __p1_882, __p2_882, __p3_882) __extension__ ({ \ | | |
| 68260 | float32x4_t __ret_882; \ | | |
| 68261 | float32x4_t __s0_882 = __p0_882; \ | | |
| 68262 | bfloat16x8_t __s1_882 = __p1_882; \ | | |
| 68263 | bfloat16x4_t __s2_882 = __p2_882; \ | | |
| 68264 | float32x4_t __rev0_882; __rev0_882 = __builtin_shufflevector(__s0_882, __s0_882, 3, 2, 1, 0); \ | | |
| 68265 | bfloat16x8_t __rev1_882; __rev1_882 = __builtin_shufflevector(__s1_882, __s1_882, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68266 | bfloat16x4_t __rev2_882; __rev2_882 = __builtin_shufflevector(__s2_882, __s2_882, 3, 2, 1, 0); \ | | |
| 68267 | __ret_882 = __noswap_vbfmlaltq_f32(__rev0_882, __rev1_882, (bfloat16x8_t) {__noswap_vget_lane_bf16(__rev2_882, __p3_882), __noswap_vget_lane_bf16(__rev2_882, __p3_882), __noswap_vget_lane_bf16(__rev2_882, __p3_882), __noswap_vget_lane_bf16(__rev2_882, __p3_882), __noswap_vget_lane_bf16(__rev2_882, __p3_882), __noswap_vget_lane_bf16(__rev2_882, __p3_882), __noswap_vget_lane_bf16(__rev2_882, __p3_882), __noswap_vget_lane_bf16(__rev2_882, __p3_882)}); \ | | |
| 68268 | __ret_882 = __builtin_shufflevector(__ret_882, __ret_882, 3, 2, 1, 0); \ | | |
| 68269 | __ret_882; \ | | |
| 68270 | }) | | |
| 68271 | #endif | | |
| 68272 | | | |
| 68273 | #ifdef __LITTLE_ENDIAN__ | | |
| 68274 | #define vbfmlaltq_laneq_f32(__p0_883, __p1_883, __p2_883, __p3_883) __extension__ ({ \ | | |
| 68275 | float32x4_t __ret_883; \ | | |
| 68276 | float32x4_t __s0_883 = __p0_883; \ | | |
| 68277 | bfloat16x8_t __s1_883 = __p1_883; \ | | |
| 68278 | bfloat16x8_t __s2_883 = __p2_883; \ | | |
| 68279 | __ret_883 = vbfmlaltq_f32(__s0_883, __s1_883, (bfloat16x8_t) {vgetq_lane_bf16(__s2_883, __p3_883), vgetq_lane_bf16(__s2_883, __p3_883), vgetq_lane_bf16(__s2_883, __p3_883), vgetq_lane_bf16(__s2_883, __p3_883), vgetq_lane_bf16(__s2_883, __p3_883), vgetq_lane_bf16(__s2_883, __p3_883), vgetq_lane_bf16(__s2_883, __p3_883), vgetq_lane_bf16(__s2_883, __p3_883)}); \ | | |
| 68280 | __ret_883; \ | | |
| 68281 | }) | | |
| 68282 | #else | | |
| 68283 | #define vbfmlaltq_laneq_f32(__p0_884, __p1_884, __p2_884, __p3_884) __extension__ ({ \ | | |
| 68284 | float32x4_t __ret_884; \ | | |
| 68285 | float32x4_t __s0_884 = __p0_884; \ | | |
| 68286 | bfloat16x8_t __s1_884 = __p1_884; \ | | |
| 68287 | bfloat16x8_t __s2_884 = __p2_884; \ | | |
| 68288 | float32x4_t __rev0_884; __rev0_884 = __builtin_shufflevector(__s0_884, __s0_884, 3, 2, 1, 0); \ | | |
| 68289 | bfloat16x8_t __rev1_884; __rev1_884 = __builtin_shufflevector(__s1_884, __s1_884, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68290 | bfloat16x8_t __rev2_884; __rev2_884 = __builtin_shufflevector(__s2_884, __s2_884, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68291 | __ret_884 = __noswap_vbfmlaltq_f32(__rev0_884, __rev1_884, (bfloat16x8_t) {__noswap_vgetq_lane_bf16(__rev2_884, __p3_884), __noswap_vgetq_lane_bf16(__rev2_884, __p3_884), __noswap_vgetq_lane_bf16(__rev2_884, __p3_884), __noswap_vgetq_lane_bf16(__rev2_884, __p3_884), __noswap_vgetq_lane_bf16(__rev2_884, __p3_884), __noswap_vgetq_lane_bf16(__rev2_884, __p3_884), __noswap_vgetq_lane_bf16(__rev2_884, __p3_884), __noswap_vgetq_lane_bf16(__rev2_884, __p3_884)}); \ | | |
| 68292 | __ret_884 = __builtin_shufflevector(__ret_884, __ret_884, 3, 2, 1, 0); \ | | |
| 68293 | __ret_884; \ | | |
| 68294 | }) | | |
| 68295 | #endif | | |
| 68296 | | | |
| 68297 | #ifdef __LITTLE_ENDIAN__ | | |
| 68298 | __ai float32x4_t vcvtq_high_f32_bf16(bfloat16x8_t __p0) { | | |
| 68299 | float32x4_t __ret; | 68136 | float32x4_t __ret; |
| 68300 | __ret = vcvt_f32_bf16(vget_high_bf16(__p0)); | 68137 | __ret = vcvt_f32_bf16(vget_high_bf16(__p0)); |
| 68301 | return __ret; | 68138 | return __ret; |
| 68302 | } | 68139 | } |
| 68303 | #else | 68140 | #else |
| 68304 | __ai float32x4_t vcvtq_high_f32_bf16(bfloat16x8_t __p0) { | 68141 | __ai __attribute__((target("bf16"))) float32x4_t vcvtq_high_f32_bf16(bfloat16x8_t __p0) { |
| 68305 | float32x4_t __ret; | 68142 | float32x4_t __ret; |
| 68306 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 68143 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 68307 | __ret = __noswap_vcvt_f32_bf16(__noswap_vget_high_bf16(__rev0)); | 68144 | __ret = __noswap_vcvt_f32_bf16(__noswap_vget_high_bf16(__rev0)); |
| ... | @@ -68311,13 +68148,13 @@ __ai float32x4_t vcvtq_high_f32_bf16(bfloat16x8_t __p0) { | ... | @@ -68311,13 +68148,13 @@ __ai float32x4_t vcvtq_high_f32_bf16(bfloat16x8_t __p0) { |
| 68311 | #endif | 68148 | #endif |
| 68312 | | 68149 | |
| 68313 | #ifdef __LITTLE_ENDIAN__ | 68150 | #ifdef __LITTLE_ENDIAN__ |
| 68314 | __ai float32x4_t vcvtq_low_f32_bf16(bfloat16x8_t __p0) { | 68151 | __ai __attribute__((target("bf16"))) float32x4_t vcvtq_low_f32_bf16(bfloat16x8_t __p0) { |
| 68315 | float32x4_t __ret; | 68152 | float32x4_t __ret; |
| 68316 | __ret = vcvt_f32_bf16(vget_low_bf16(__p0)); | 68153 | __ret = vcvt_f32_bf16(vget_low_bf16(__p0)); |
| 68317 | return __ret; | 68154 | return __ret; |
| 68318 | } | 68155 | } |
| 68319 | #else | 68156 | #else |
| 68320 | __ai float32x4_t vcvtq_low_f32_bf16(bfloat16x8_t __p0) { | 68157 | __ai __attribute__((target("bf16"))) float32x4_t vcvtq_low_f32_bf16(bfloat16x8_t __p0) { |
| 68321 | float32x4_t __ret; | 68158 | float32x4_t __ret; |
| 68322 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 68159 | bfloat16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 68323 | __ret = __noswap_vcvt_f32_bf16(__noswap_vget_low_bf16(__rev0)); | 68160 | __ret = __noswap_vcvt_f32_bf16(__noswap_vget_low_bf16(__rev0)); |
| ... | @@ -68326,487 +68163,58 @@ __ai float32x4_t vcvtq_low_f32_bf16(bfloat16x8_t __p0) { | ... | @@ -68326,487 +68163,58 @@ __ai float32x4_t vcvtq_low_f32_bf16(bfloat16x8_t __p0) { |
| 68326 | } | 68163 | } |
| 68327 | #endif | 68164 | #endif |
| 68328 | | 68165 | |
| 68329 | #endif | | |
| 68330 | #if defined(__ARM_FEATURE_FP16_FML) && defined(__aarch64__) | | |
| 68331 | #ifdef __LITTLE_ENDIAN__ | | |
| 68332 | #define vfmlalq_lane_high_f16(__p0_885, __p1_885, __p2_885, __p3_885) __extension__ ({ \ | | |
| 68333 | float32x4_t __ret_885; \ | | |
| 68334 | float32x4_t __s0_885 = __p0_885; \ | | |
| 68335 | float16x8_t __s1_885 = __p1_885; \ | | |
| 68336 | float16x4_t __s2_885 = __p2_885; \ | | |
| 68337 | __ret_885 = vfmlalq_high_f16(__s0_885, __s1_885, (float16x8_t) {vget_lane_f16(__s2_885, __p3_885), vget_lane_f16(__s2_885, __p3_885), vget_lane_f16(__s2_885, __p3_885), vget_lane_f16(__s2_885, __p3_885), vget_lane_f16(__s2_885, __p3_885), vget_lane_f16(__s2_885, __p3_885), vget_lane_f16(__s2_885, __p3_885), vget_lane_f16(__s2_885, __p3_885)}); \ | | |
| 68338 | __ret_885; \ | | |
| 68339 | }) | | |
| 68340 | #else | | |
| 68341 | #define vfmlalq_lane_high_f16(__p0_886, __p1_886, __p2_886, __p3_886) __extension__ ({ \ | | |
| 68342 | float32x4_t __ret_886; \ | | |
| 68343 | float32x4_t __s0_886 = __p0_886; \ | | |
| 68344 | float16x8_t __s1_886 = __p1_886; \ | | |
| 68345 | float16x4_t __s2_886 = __p2_886; \ | | |
| 68346 | float32x4_t __rev0_886; __rev0_886 = __builtin_shufflevector(__s0_886, __s0_886, 3, 2, 1, 0); \ | | |
| 68347 | float16x8_t __rev1_886; __rev1_886 = __builtin_shufflevector(__s1_886, __s1_886, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68348 | float16x4_t __rev2_886; __rev2_886 = __builtin_shufflevector(__s2_886, __s2_886, 3, 2, 1, 0); \ | | |
| 68349 | __ret_886 = __noswap_vfmlalq_high_f16(__rev0_886, __rev1_886, (float16x8_t) {__noswap_vget_lane_f16(__rev2_886, __p3_886), __noswap_vget_lane_f16(__rev2_886, __p3_886), __noswap_vget_lane_f16(__rev2_886, __p3_886), __noswap_vget_lane_f16(__rev2_886, __p3_886), __noswap_vget_lane_f16(__rev2_886, __p3_886), __noswap_vget_lane_f16(__rev2_886, __p3_886), __noswap_vget_lane_f16(__rev2_886, __p3_886), __noswap_vget_lane_f16(__rev2_886, __p3_886)}); \ | | |
| 68350 | __ret_886 = __builtin_shufflevector(__ret_886, __ret_886, 3, 2, 1, 0); \ | | |
| 68351 | __ret_886; \ | | |
| 68352 | }) | | |
| 68353 | #endif | | |
| 68354 | | | |
| 68355 | #ifdef __LITTLE_ENDIAN__ | | |
| 68356 | #define vfmlal_lane_high_f16(__p0_887, __p1_887, __p2_887, __p3_887) __extension__ ({ \ | | |
| 68357 | float32x2_t __ret_887; \ | | |
| 68358 | float32x2_t __s0_887 = __p0_887; \ | | |
| 68359 | float16x4_t __s1_887 = __p1_887; \ | | |
| 68360 | float16x4_t __s2_887 = __p2_887; \ | | |
| 68361 | __ret_887 = vfmlal_high_f16(__s0_887, __s1_887, (float16x4_t) {vget_lane_f16(__s2_887, __p3_887), vget_lane_f16(__s2_887, __p3_887), vget_lane_f16(__s2_887, __p3_887), vget_lane_f16(__s2_887, __p3_887)}); \ | | |
| 68362 | __ret_887; \ | | |
| 68363 | }) | | |
| 68364 | #else | | |
| 68365 | #define vfmlal_lane_high_f16(__p0_888, __p1_888, __p2_888, __p3_888) __extension__ ({ \ | | |
| 68366 | float32x2_t __ret_888; \ | | |
| 68367 | float32x2_t __s0_888 = __p0_888; \ | | |
| 68368 | float16x4_t __s1_888 = __p1_888; \ | | |
| 68369 | float16x4_t __s2_888 = __p2_888; \ | | |
| 68370 | float32x2_t __rev0_888; __rev0_888 = __builtin_shufflevector(__s0_888, __s0_888, 1, 0); \ | | |
| 68371 | float16x4_t __rev1_888; __rev1_888 = __builtin_shufflevector(__s1_888, __s1_888, 3, 2, 1, 0); \ | | |
| 68372 | float16x4_t __rev2_888; __rev2_888 = __builtin_shufflevector(__s2_888, __s2_888, 3, 2, 1, 0); \ | | |
| 68373 | __ret_888 = __noswap_vfmlal_high_f16(__rev0_888, __rev1_888, (float16x4_t) {__noswap_vget_lane_f16(__rev2_888, __p3_888), __noswap_vget_lane_f16(__rev2_888, __p3_888), __noswap_vget_lane_f16(__rev2_888, __p3_888), __noswap_vget_lane_f16(__rev2_888, __p3_888)}); \ | | |
| 68374 | __ret_888 = __builtin_shufflevector(__ret_888, __ret_888, 1, 0); \ | | |
| 68375 | __ret_888; \ | | |
| 68376 | }) | | |
| 68377 | #endif | | |
| 68378 | | | |
| 68379 | #ifdef __LITTLE_ENDIAN__ | | |
| 68380 | #define vfmlalq_lane_low_f16(__p0_889, __p1_889, __p2_889, __p3_889) __extension__ ({ \ | | |
| 68381 | float32x4_t __ret_889; \ | | |
| 68382 | float32x4_t __s0_889 = __p0_889; \ | | |
| 68383 | float16x8_t __s1_889 = __p1_889; \ | | |
| 68384 | float16x4_t __s2_889 = __p2_889; \ | | |
| 68385 | __ret_889 = vfmlalq_low_f16(__s0_889, __s1_889, (float16x8_t) {vget_lane_f16(__s2_889, __p3_889), vget_lane_f16(__s2_889, __p3_889), vget_lane_f16(__s2_889, __p3_889), vget_lane_f16(__s2_889, __p3_889), vget_lane_f16(__s2_889, __p3_889), vget_lane_f16(__s2_889, __p3_889), vget_lane_f16(__s2_889, __p3_889), vget_lane_f16(__s2_889, __p3_889)}); \ | | |
| 68386 | __ret_889; \ | | |
| 68387 | }) | | |
| 68388 | #else | | |
| 68389 | #define vfmlalq_lane_low_f16(__p0_890, __p1_890, __p2_890, __p3_890) __extension__ ({ \ | | |
| 68390 | float32x4_t __ret_890; \ | | |
| 68391 | float32x4_t __s0_890 = __p0_890; \ | | |
| 68392 | float16x8_t __s1_890 = __p1_890; \ | | |
| 68393 | float16x4_t __s2_890 = __p2_890; \ | | |
| 68394 | float32x4_t __rev0_890; __rev0_890 = __builtin_shufflevector(__s0_890, __s0_890, 3, 2, 1, 0); \ | | |
| 68395 | float16x8_t __rev1_890; __rev1_890 = __builtin_shufflevector(__s1_890, __s1_890, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68396 | float16x4_t __rev2_890; __rev2_890 = __builtin_shufflevector(__s2_890, __s2_890, 3, 2, 1, 0); \ | | |
| 68397 | __ret_890 = __noswap_vfmlalq_low_f16(__rev0_890, __rev1_890, (float16x8_t) {__noswap_vget_lane_f16(__rev2_890, __p3_890), __noswap_vget_lane_f16(__rev2_890, __p3_890), __noswap_vget_lane_f16(__rev2_890, __p3_890), __noswap_vget_lane_f16(__rev2_890, __p3_890), __noswap_vget_lane_f16(__rev2_890, __p3_890), __noswap_vget_lane_f16(__rev2_890, __p3_890), __noswap_vget_lane_f16(__rev2_890, __p3_890), __noswap_vget_lane_f16(__rev2_890, __p3_890)}); \ | | |
| 68398 | __ret_890 = __builtin_shufflevector(__ret_890, __ret_890, 3, 2, 1, 0); \ | | |
| 68399 | __ret_890; \ | | |
| 68400 | }) | | |
| 68401 | #endif | | |
| 68402 | | | |
| 68403 | #ifdef __LITTLE_ENDIAN__ | | |
| 68404 | #define vfmlal_lane_low_f16(__p0_891, __p1_891, __p2_891, __p3_891) __extension__ ({ \ | | |
| 68405 | float32x2_t __ret_891; \ | | |
| 68406 | float32x2_t __s0_891 = __p0_891; \ | | |
| 68407 | float16x4_t __s1_891 = __p1_891; \ | | |
| 68408 | float16x4_t __s2_891 = __p2_891; \ | | |
| 68409 | __ret_891 = vfmlal_low_f16(__s0_891, __s1_891, (float16x4_t) {vget_lane_f16(__s2_891, __p3_891), vget_lane_f16(__s2_891, __p3_891), vget_lane_f16(__s2_891, __p3_891), vget_lane_f16(__s2_891, __p3_891)}); \ | | |
| 68410 | __ret_891; \ | | |
| 68411 | }) | | |
| 68412 | #else | | |
| 68413 | #define vfmlal_lane_low_f16(__p0_892, __p1_892, __p2_892, __p3_892) __extension__ ({ \ | | |
| 68414 | float32x2_t __ret_892; \ | | |
| 68415 | float32x2_t __s0_892 = __p0_892; \ | | |
| 68416 | float16x4_t __s1_892 = __p1_892; \ | | |
| 68417 | float16x4_t __s2_892 = __p2_892; \ | | |
| 68418 | float32x2_t __rev0_892; __rev0_892 = __builtin_shufflevector(__s0_892, __s0_892, 1, 0); \ | | |
| 68419 | float16x4_t __rev1_892; __rev1_892 = __builtin_shufflevector(__s1_892, __s1_892, 3, 2, 1, 0); \ | | |
| 68420 | float16x4_t __rev2_892; __rev2_892 = __builtin_shufflevector(__s2_892, __s2_892, 3, 2, 1, 0); \ | | |
| 68421 | __ret_892 = __noswap_vfmlal_low_f16(__rev0_892, __rev1_892, (float16x4_t) {__noswap_vget_lane_f16(__rev2_892, __p3_892), __noswap_vget_lane_f16(__rev2_892, __p3_892), __noswap_vget_lane_f16(__rev2_892, __p3_892), __noswap_vget_lane_f16(__rev2_892, __p3_892)}); \ | | |
| 68422 | __ret_892 = __builtin_shufflevector(__ret_892, __ret_892, 1, 0); \ | | |
| 68423 | __ret_892; \ | | |
| 68424 | }) | | |
| 68425 | #endif | | |
| 68426 | | | |
| 68427 | #ifdef __LITTLE_ENDIAN__ | | |
| 68428 | #define vfmlalq_laneq_high_f16(__p0_893, __p1_893, __p2_893, __p3_893) __extension__ ({ \ | | |
| 68429 | float32x4_t __ret_893; \ | | |
| 68430 | float32x4_t __s0_893 = __p0_893; \ | | |
| 68431 | float16x8_t __s1_893 = __p1_893; \ | | |
| 68432 | float16x8_t __s2_893 = __p2_893; \ | | |
| 68433 | __ret_893 = vfmlalq_high_f16(__s0_893, __s1_893, (float16x8_t) {vgetq_lane_f16(__s2_893, __p3_893), vgetq_lane_f16(__s2_893, __p3_893), vgetq_lane_f16(__s2_893, __p3_893), vgetq_lane_f16(__s2_893, __p3_893), vgetq_lane_f16(__s2_893, __p3_893), vgetq_lane_f16(__s2_893, __p3_893), vgetq_lane_f16(__s2_893, __p3_893), vgetq_lane_f16(__s2_893, __p3_893)}); \ | | |
| 68434 | __ret_893; \ | | |
| 68435 | }) | | |
| 68436 | #else | | |
| 68437 | #define vfmlalq_laneq_high_f16(__p0_894, __p1_894, __p2_894, __p3_894) __extension__ ({ \ | | |
| 68438 | float32x4_t __ret_894; \ | | |
| 68439 | float32x4_t __s0_894 = __p0_894; \ | | |
| 68440 | float16x8_t __s1_894 = __p1_894; \ | | |
| 68441 | float16x8_t __s2_894 = __p2_894; \ | | |
| 68442 | float32x4_t __rev0_894; __rev0_894 = __builtin_shufflevector(__s0_894, __s0_894, 3, 2, 1, 0); \ | | |
| 68443 | float16x8_t __rev1_894; __rev1_894 = __builtin_shufflevector(__s1_894, __s1_894, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68444 | float16x8_t __rev2_894; __rev2_894 = __builtin_shufflevector(__s2_894, __s2_894, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68445 | __ret_894 = __noswap_vfmlalq_high_f16(__rev0_894, __rev1_894, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_894, __p3_894), __noswap_vgetq_lane_f16(__rev2_894, __p3_894), __noswap_vgetq_lane_f16(__rev2_894, __p3_894), __noswap_vgetq_lane_f16(__rev2_894, __p3_894), __noswap_vgetq_lane_f16(__rev2_894, __p3_894), __noswap_vgetq_lane_f16(__rev2_894, __p3_894), __noswap_vgetq_lane_f16(__rev2_894, __p3_894), __noswap_vgetq_lane_f16(__rev2_894, __p3_894)}); \ | | |
| 68446 | __ret_894 = __builtin_shufflevector(__ret_894, __ret_894, 3, 2, 1, 0); \ | | |
| 68447 | __ret_894; \ | | |
| 68448 | }) | | |
| 68449 | #endif | | |
| 68450 | | | |
| 68451 | #ifdef __LITTLE_ENDIAN__ | | |
| 68452 | #define vfmlal_laneq_high_f16(__p0_895, __p1_895, __p2_895, __p3_895) __extension__ ({ \ | | |
| 68453 | float32x2_t __ret_895; \ | | |
| 68454 | float32x2_t __s0_895 = __p0_895; \ | | |
| 68455 | float16x4_t __s1_895 = __p1_895; \ | | |
| 68456 | float16x8_t __s2_895 = __p2_895; \ | | |
| 68457 | __ret_895 = vfmlal_high_f16(__s0_895, __s1_895, (float16x4_t) {vgetq_lane_f16(__s2_895, __p3_895), vgetq_lane_f16(__s2_895, __p3_895), vgetq_lane_f16(__s2_895, __p3_895), vgetq_lane_f16(__s2_895, __p3_895)}); \ | | |
| 68458 | __ret_895; \ | | |
| 68459 | }) | | |
| 68460 | #else | | |
| 68461 | #define vfmlal_laneq_high_f16(__p0_896, __p1_896, __p2_896, __p3_896) __extension__ ({ \ | | |
| 68462 | float32x2_t __ret_896; \ | | |
| 68463 | float32x2_t __s0_896 = __p0_896; \ | | |
| 68464 | float16x4_t __s1_896 = __p1_896; \ | | |
| 68465 | float16x8_t __s2_896 = __p2_896; \ | | |
| 68466 | float32x2_t __rev0_896; __rev0_896 = __builtin_shufflevector(__s0_896, __s0_896, 1, 0); \ | | |
| 68467 | float16x4_t __rev1_896; __rev1_896 = __builtin_shufflevector(__s1_896, __s1_896, 3, 2, 1, 0); \ | | |
| 68468 | float16x8_t __rev2_896; __rev2_896 = __builtin_shufflevector(__s2_896, __s2_896, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68469 | __ret_896 = __noswap_vfmlal_high_f16(__rev0_896, __rev1_896, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_896, __p3_896), __noswap_vgetq_lane_f16(__rev2_896, __p3_896), __noswap_vgetq_lane_f16(__rev2_896, __p3_896), __noswap_vgetq_lane_f16(__rev2_896, __p3_896)}); \ | | |
| 68470 | __ret_896 = __builtin_shufflevector(__ret_896, __ret_896, 1, 0); \ | | |
| 68471 | __ret_896; \ | | |
| 68472 | }) | | |
| 68473 | #endif | | |
| 68474 | | | |
| 68475 | #ifdef __LITTLE_ENDIAN__ | | |
| 68476 | #define vfmlalq_laneq_low_f16(__p0_897, __p1_897, __p2_897, __p3_897) __extension__ ({ \ | | |
| 68477 | float32x4_t __ret_897; \ | | |
| 68478 | float32x4_t __s0_897 = __p0_897; \ | | |
| 68479 | float16x8_t __s1_897 = __p1_897; \ | | |
| 68480 | float16x8_t __s2_897 = __p2_897; \ | | |
| 68481 | __ret_897 = vfmlalq_low_f16(__s0_897, __s1_897, (float16x8_t) {vgetq_lane_f16(__s2_897, __p3_897), vgetq_lane_f16(__s2_897, __p3_897), vgetq_lane_f16(__s2_897, __p3_897), vgetq_lane_f16(__s2_897, __p3_897), vgetq_lane_f16(__s2_897, __p3_897), vgetq_lane_f16(__s2_897, __p3_897), vgetq_lane_f16(__s2_897, __p3_897), vgetq_lane_f16(__s2_897, __p3_897)}); \ | | |
| 68482 | __ret_897; \ | | |
| 68483 | }) | | |
| 68484 | #else | | |
| 68485 | #define vfmlalq_laneq_low_f16(__p0_898, __p1_898, __p2_898, __p3_898) __extension__ ({ \ | | |
| 68486 | float32x4_t __ret_898; \ | | |
| 68487 | float32x4_t __s0_898 = __p0_898; \ | | |
| 68488 | float16x8_t __s1_898 = __p1_898; \ | | |
| 68489 | float16x8_t __s2_898 = __p2_898; \ | | |
| 68490 | float32x4_t __rev0_898; __rev0_898 = __builtin_shufflevector(__s0_898, __s0_898, 3, 2, 1, 0); \ | | |
| 68491 | float16x8_t __rev1_898; __rev1_898 = __builtin_shufflevector(__s1_898, __s1_898, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68492 | float16x8_t __rev2_898; __rev2_898 = __builtin_shufflevector(__s2_898, __s2_898, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68493 | __ret_898 = __noswap_vfmlalq_low_f16(__rev0_898, __rev1_898, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_898, __p3_898), __noswap_vgetq_lane_f16(__rev2_898, __p3_898), __noswap_vgetq_lane_f16(__rev2_898, __p3_898), __noswap_vgetq_lane_f16(__rev2_898, __p3_898), __noswap_vgetq_lane_f16(__rev2_898, __p3_898), __noswap_vgetq_lane_f16(__rev2_898, __p3_898), __noswap_vgetq_lane_f16(__rev2_898, __p3_898), __noswap_vgetq_lane_f16(__rev2_898, __p3_898)}); \ | | |
| 68494 | __ret_898 = __builtin_shufflevector(__ret_898, __ret_898, 3, 2, 1, 0); \ | | |
| 68495 | __ret_898; \ | | |
| 68496 | }) | | |
| 68497 | #endif | | |
| 68498 | | | |
| 68499 | #ifdef __LITTLE_ENDIAN__ | | |
| 68500 | #define vfmlal_laneq_low_f16(__p0_899, __p1_899, __p2_899, __p3_899) __extension__ ({ \ | | |
| 68501 | float32x2_t __ret_899; \ | | |
| 68502 | float32x2_t __s0_899 = __p0_899; \ | | |
| 68503 | float16x4_t __s1_899 = __p1_899; \ | | |
| 68504 | float16x8_t __s2_899 = __p2_899; \ | | |
| 68505 | __ret_899 = vfmlal_low_f16(__s0_899, __s1_899, (float16x4_t) {vgetq_lane_f16(__s2_899, __p3_899), vgetq_lane_f16(__s2_899, __p3_899), vgetq_lane_f16(__s2_899, __p3_899), vgetq_lane_f16(__s2_899, __p3_899)}); \ | | |
| 68506 | __ret_899; \ | | |
| 68507 | }) | | |
| 68508 | #else | | |
| 68509 | #define vfmlal_laneq_low_f16(__p0_900, __p1_900, __p2_900, __p3_900) __extension__ ({ \ | | |
| 68510 | float32x2_t __ret_900; \ | | |
| 68511 | float32x2_t __s0_900 = __p0_900; \ | | |
| 68512 | float16x4_t __s1_900 = __p1_900; \ | | |
| 68513 | float16x8_t __s2_900 = __p2_900; \ | | |
| 68514 | float32x2_t __rev0_900; __rev0_900 = __builtin_shufflevector(__s0_900, __s0_900, 1, 0); \ | | |
| 68515 | float16x4_t __rev1_900; __rev1_900 = __builtin_shufflevector(__s1_900, __s1_900, 3, 2, 1, 0); \ | | |
| 68516 | float16x8_t __rev2_900; __rev2_900 = __builtin_shufflevector(__s2_900, __s2_900, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68517 | __ret_900 = __noswap_vfmlal_low_f16(__rev0_900, __rev1_900, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_900, __p3_900), __noswap_vgetq_lane_f16(__rev2_900, __p3_900), __noswap_vgetq_lane_f16(__rev2_900, __p3_900), __noswap_vgetq_lane_f16(__rev2_900, __p3_900)}); \ | | |
| 68518 | __ret_900 = __builtin_shufflevector(__ret_900, __ret_900, 1, 0); \ | | |
| 68519 | __ret_900; \ | | |
| 68520 | }) | | |
| 68521 | #endif | | |
| 68522 | | | |
| 68523 | #ifdef __LITTLE_ENDIAN__ | | |
| 68524 | #define vfmlslq_lane_high_f16(__p0_901, __p1_901, __p2_901, __p3_901) __extension__ ({ \ | | |
| 68525 | float32x4_t __ret_901; \ | | |
| 68526 | float32x4_t __s0_901 = __p0_901; \ | | |
| 68527 | float16x8_t __s1_901 = __p1_901; \ | | |
| 68528 | float16x4_t __s2_901 = __p2_901; \ | | |
| 68529 | __ret_901 = vfmlslq_high_f16(__s0_901, __s1_901, (float16x8_t) {vget_lane_f16(__s2_901, __p3_901), vget_lane_f16(__s2_901, __p3_901), vget_lane_f16(__s2_901, __p3_901), vget_lane_f16(__s2_901, __p3_901), vget_lane_f16(__s2_901, __p3_901), vget_lane_f16(__s2_901, __p3_901), vget_lane_f16(__s2_901, __p3_901), vget_lane_f16(__s2_901, __p3_901)}); \ | | |
| 68530 | __ret_901; \ | | |
| 68531 | }) | | |
| 68532 | #else | | |
| 68533 | #define vfmlslq_lane_high_f16(__p0_902, __p1_902, __p2_902, __p3_902) __extension__ ({ \ | | |
| 68534 | float32x4_t __ret_902; \ | | |
| 68535 | float32x4_t __s0_902 = __p0_902; \ | | |
| 68536 | float16x8_t __s1_902 = __p1_902; \ | | |
| 68537 | float16x4_t __s2_902 = __p2_902; \ | | |
| 68538 | float32x4_t __rev0_902; __rev0_902 = __builtin_shufflevector(__s0_902, __s0_902, 3, 2, 1, 0); \ | | |
| 68539 | float16x8_t __rev1_902; __rev1_902 = __builtin_shufflevector(__s1_902, __s1_902, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68540 | float16x4_t __rev2_902; __rev2_902 = __builtin_shufflevector(__s2_902, __s2_902, 3, 2, 1, 0); \ | | |
| 68541 | __ret_902 = __noswap_vfmlslq_high_f16(__rev0_902, __rev1_902, (float16x8_t) {__noswap_vget_lane_f16(__rev2_902, __p3_902), __noswap_vget_lane_f16(__rev2_902, __p3_902), __noswap_vget_lane_f16(__rev2_902, __p3_902), __noswap_vget_lane_f16(__rev2_902, __p3_902), __noswap_vget_lane_f16(__rev2_902, __p3_902), __noswap_vget_lane_f16(__rev2_902, __p3_902), __noswap_vget_lane_f16(__rev2_902, __p3_902), __noswap_vget_lane_f16(__rev2_902, __p3_902)}); \ | | |
| 68542 | __ret_902 = __builtin_shufflevector(__ret_902, __ret_902, 3, 2, 1, 0); \ | | |
| 68543 | __ret_902; \ | | |
| 68544 | }) | | |
| 68545 | #endif | | |
| 68546 | | | |
| 68547 | #ifdef __LITTLE_ENDIAN__ | | |
| 68548 | #define vfmlsl_lane_high_f16(__p0_903, __p1_903, __p2_903, __p3_903) __extension__ ({ \ | | |
| 68549 | float32x2_t __ret_903; \ | | |
| 68550 | float32x2_t __s0_903 = __p0_903; \ | | |
| 68551 | float16x4_t __s1_903 = __p1_903; \ | | |
| 68552 | float16x4_t __s2_903 = __p2_903; \ | | |
| 68553 | __ret_903 = vfmlsl_high_f16(__s0_903, __s1_903, (float16x4_t) {vget_lane_f16(__s2_903, __p3_903), vget_lane_f16(__s2_903, __p3_903), vget_lane_f16(__s2_903, __p3_903), vget_lane_f16(__s2_903, __p3_903)}); \ | | |
| 68554 | __ret_903; \ | | |
| 68555 | }) | | |
| 68556 | #else | | |
| 68557 | #define vfmlsl_lane_high_f16(__p0_904, __p1_904, __p2_904, __p3_904) __extension__ ({ \ | | |
| 68558 | float32x2_t __ret_904; \ | | |
| 68559 | float32x2_t __s0_904 = __p0_904; \ | | |
| 68560 | float16x4_t __s1_904 = __p1_904; \ | | |
| 68561 | float16x4_t __s2_904 = __p2_904; \ | | |
| 68562 | float32x2_t __rev0_904; __rev0_904 = __builtin_shufflevector(__s0_904, __s0_904, 1, 0); \ | | |
| 68563 | float16x4_t __rev1_904; __rev1_904 = __builtin_shufflevector(__s1_904, __s1_904, 3, 2, 1, 0); \ | | |
| 68564 | float16x4_t __rev2_904; __rev2_904 = __builtin_shufflevector(__s2_904, __s2_904, 3, 2, 1, 0); \ | | |
| 68565 | __ret_904 = __noswap_vfmlsl_high_f16(__rev0_904, __rev1_904, (float16x4_t) {__noswap_vget_lane_f16(__rev2_904, __p3_904), __noswap_vget_lane_f16(__rev2_904, __p3_904), __noswap_vget_lane_f16(__rev2_904, __p3_904), __noswap_vget_lane_f16(__rev2_904, __p3_904)}); \ | | |
| 68566 | __ret_904 = __builtin_shufflevector(__ret_904, __ret_904, 1, 0); \ | | |
| 68567 | __ret_904; \ | | |
| 68568 | }) | | |
| 68569 | #endif | | |
| 68570 | | | |
| 68571 | #ifdef __LITTLE_ENDIAN__ | | |
| 68572 | #define vfmlslq_lane_low_f16(__p0_905, __p1_905, __p2_905, __p3_905) __extension__ ({ \ | | |
| 68573 | float32x4_t __ret_905; \ | | |
| 68574 | float32x4_t __s0_905 = __p0_905; \ | | |
| 68575 | float16x8_t __s1_905 = __p1_905; \ | | |
| 68576 | float16x4_t __s2_905 = __p2_905; \ | | |
| 68577 | __ret_905 = vfmlslq_low_f16(__s0_905, __s1_905, (float16x8_t) {vget_lane_f16(__s2_905, __p3_905), vget_lane_f16(__s2_905, __p3_905), vget_lane_f16(__s2_905, __p3_905), vget_lane_f16(__s2_905, __p3_905), vget_lane_f16(__s2_905, __p3_905), vget_lane_f16(__s2_905, __p3_905), vget_lane_f16(__s2_905, __p3_905), vget_lane_f16(__s2_905, __p3_905)}); \ | | |
| 68578 | __ret_905; \ | | |
| 68579 | }) | | |
| 68580 | #else | | |
| 68581 | #define vfmlslq_lane_low_f16(__p0_906, __p1_906, __p2_906, __p3_906) __extension__ ({ \ | | |
| 68582 | float32x4_t __ret_906; \ | | |
| 68583 | float32x4_t __s0_906 = __p0_906; \ | | |
| 68584 | float16x8_t __s1_906 = __p1_906; \ | | |
| 68585 | float16x4_t __s2_906 = __p2_906; \ | | |
| 68586 | float32x4_t __rev0_906; __rev0_906 = __builtin_shufflevector(__s0_906, __s0_906, 3, 2, 1, 0); \ | | |
| 68587 | float16x8_t __rev1_906; __rev1_906 = __builtin_shufflevector(__s1_906, __s1_906, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68588 | float16x4_t __rev2_906; __rev2_906 = __builtin_shufflevector(__s2_906, __s2_906, 3, 2, 1, 0); \ | | |
| 68589 | __ret_906 = __noswap_vfmlslq_low_f16(__rev0_906, __rev1_906, (float16x8_t) {__noswap_vget_lane_f16(__rev2_906, __p3_906), __noswap_vget_lane_f16(__rev2_906, __p3_906), __noswap_vget_lane_f16(__rev2_906, __p3_906), __noswap_vget_lane_f16(__rev2_906, __p3_906), __noswap_vget_lane_f16(__rev2_906, __p3_906), __noswap_vget_lane_f16(__rev2_906, __p3_906), __noswap_vget_lane_f16(__rev2_906, __p3_906), __noswap_vget_lane_f16(__rev2_906, __p3_906)}); \ | | |
| 68590 | __ret_906 = __builtin_shufflevector(__ret_906, __ret_906, 3, 2, 1, 0); \ | | |
| 68591 | __ret_906; \ | | |
| 68592 | }) | | |
| 68593 | #endif | | |
| 68594 | | | |
| 68595 | #ifdef __LITTLE_ENDIAN__ | | |
| 68596 | #define vfmlsl_lane_low_f16(__p0_907, __p1_907, __p2_907, __p3_907) __extension__ ({ \ | | |
| 68597 | float32x2_t __ret_907; \ | | |
| 68598 | float32x2_t __s0_907 = __p0_907; \ | | |
| 68599 | float16x4_t __s1_907 = __p1_907; \ | | |
| 68600 | float16x4_t __s2_907 = __p2_907; \ | | |
| 68601 | __ret_907 = vfmlsl_low_f16(__s0_907, __s1_907, (float16x4_t) {vget_lane_f16(__s2_907, __p3_907), vget_lane_f16(__s2_907, __p3_907), vget_lane_f16(__s2_907, __p3_907), vget_lane_f16(__s2_907, __p3_907)}); \ | | |
| 68602 | __ret_907; \ | | |
| 68603 | }) | | |
| 68604 | #else | | |
| 68605 | #define vfmlsl_lane_low_f16(__p0_908, __p1_908, __p2_908, __p3_908) __extension__ ({ \ | | |
| 68606 | float32x2_t __ret_908; \ | | |
| 68607 | float32x2_t __s0_908 = __p0_908; \ | | |
| 68608 | float16x4_t __s1_908 = __p1_908; \ | | |
| 68609 | float16x4_t __s2_908 = __p2_908; \ | | |
| 68610 | float32x2_t __rev0_908; __rev0_908 = __builtin_shufflevector(__s0_908, __s0_908, 1, 0); \ | | |
| 68611 | float16x4_t __rev1_908; __rev1_908 = __builtin_shufflevector(__s1_908, __s1_908, 3, 2, 1, 0); \ | | |
| 68612 | float16x4_t __rev2_908; __rev2_908 = __builtin_shufflevector(__s2_908, __s2_908, 3, 2, 1, 0); \ | | |
| 68613 | __ret_908 = __noswap_vfmlsl_low_f16(__rev0_908, __rev1_908, (float16x4_t) {__noswap_vget_lane_f16(__rev2_908, __p3_908), __noswap_vget_lane_f16(__rev2_908, __p3_908), __noswap_vget_lane_f16(__rev2_908, __p3_908), __noswap_vget_lane_f16(__rev2_908, __p3_908)}); \ | | |
| 68614 | __ret_908 = __builtin_shufflevector(__ret_908, __ret_908, 1, 0); \ | | |
| 68615 | __ret_908; \ | | |
| 68616 | }) | | |
| 68617 | #endif | | |
| 68618 | | | |
| 68619 | #ifdef __LITTLE_ENDIAN__ | | |
| 68620 | #define vfmlslq_laneq_high_f16(__p0_909, __p1_909, __p2_909, __p3_909) __extension__ ({ \ | | |
| 68621 | float32x4_t __ret_909; \ | | |
| 68622 | float32x4_t __s0_909 = __p0_909; \ | | |
| 68623 | float16x8_t __s1_909 = __p1_909; \ | | |
| 68624 | float16x8_t __s2_909 = __p2_909; \ | | |
| 68625 | __ret_909 = vfmlslq_high_f16(__s0_909, __s1_909, (float16x8_t) {vgetq_lane_f16(__s2_909, __p3_909), vgetq_lane_f16(__s2_909, __p3_909), vgetq_lane_f16(__s2_909, __p3_909), vgetq_lane_f16(__s2_909, __p3_909), vgetq_lane_f16(__s2_909, __p3_909), vgetq_lane_f16(__s2_909, __p3_909), vgetq_lane_f16(__s2_909, __p3_909), vgetq_lane_f16(__s2_909, __p3_909)}); \ | | |
| 68626 | __ret_909; \ | | |
| 68627 | }) | | |
| 68628 | #else | | |
| 68629 | #define vfmlslq_laneq_high_f16(__p0_910, __p1_910, __p2_910, __p3_910) __extension__ ({ \ | | |
| 68630 | float32x4_t __ret_910; \ | | |
| 68631 | float32x4_t __s0_910 = __p0_910; \ | | |
| 68632 | float16x8_t __s1_910 = __p1_910; \ | | |
| 68633 | float16x8_t __s2_910 = __p2_910; \ | | |
| 68634 | float32x4_t __rev0_910; __rev0_910 = __builtin_shufflevector(__s0_910, __s0_910, 3, 2, 1, 0); \ | | |
| 68635 | float16x8_t __rev1_910; __rev1_910 = __builtin_shufflevector(__s1_910, __s1_910, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68636 | float16x8_t __rev2_910; __rev2_910 = __builtin_shufflevector(__s2_910, __s2_910, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68637 | __ret_910 = __noswap_vfmlslq_high_f16(__rev0_910, __rev1_910, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_910, __p3_910), __noswap_vgetq_lane_f16(__rev2_910, __p3_910), __noswap_vgetq_lane_f16(__rev2_910, __p3_910), __noswap_vgetq_lane_f16(__rev2_910, __p3_910), __noswap_vgetq_lane_f16(__rev2_910, __p3_910), __noswap_vgetq_lane_f16(__rev2_910, __p3_910), __noswap_vgetq_lane_f16(__rev2_910, __p3_910), __noswap_vgetq_lane_f16(__rev2_910, __p3_910)}); \ | | |
| 68638 | __ret_910 = __builtin_shufflevector(__ret_910, __ret_910, 3, 2, 1, 0); \ | | |
| 68639 | __ret_910; \ | | |
| 68640 | }) | | |
| 68641 | #endif | | |
| 68642 | | | |
| 68643 | #ifdef __LITTLE_ENDIAN__ | | |
| 68644 | #define vfmlsl_laneq_high_f16(__p0_911, __p1_911, __p2_911, __p3_911) __extension__ ({ \ | | |
| 68645 | float32x2_t __ret_911; \ | | |
| 68646 | float32x2_t __s0_911 = __p0_911; \ | | |
| 68647 | float16x4_t __s1_911 = __p1_911; \ | | |
| 68648 | float16x8_t __s2_911 = __p2_911; \ | | |
| 68649 | __ret_911 = vfmlsl_high_f16(__s0_911, __s1_911, (float16x4_t) {vgetq_lane_f16(__s2_911, __p3_911), vgetq_lane_f16(__s2_911, __p3_911), vgetq_lane_f16(__s2_911, __p3_911), vgetq_lane_f16(__s2_911, __p3_911)}); \ | | |
| 68650 | __ret_911; \ | | |
| 68651 | }) | | |
| 68652 | #else | | |
| 68653 | #define vfmlsl_laneq_high_f16(__p0_912, __p1_912, __p2_912, __p3_912) __extension__ ({ \ | | |
| 68654 | float32x2_t __ret_912; \ | | |
| 68655 | float32x2_t __s0_912 = __p0_912; \ | | |
| 68656 | float16x4_t __s1_912 = __p1_912; \ | | |
| 68657 | float16x8_t __s2_912 = __p2_912; \ | | |
| 68658 | float32x2_t __rev0_912; __rev0_912 = __builtin_shufflevector(__s0_912, __s0_912, 1, 0); \ | | |
| 68659 | float16x4_t __rev1_912; __rev1_912 = __builtin_shufflevector(__s1_912, __s1_912, 3, 2, 1, 0); \ | | |
| 68660 | float16x8_t __rev2_912; __rev2_912 = __builtin_shufflevector(__s2_912, __s2_912, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68661 | __ret_912 = __noswap_vfmlsl_high_f16(__rev0_912, __rev1_912, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_912, __p3_912), __noswap_vgetq_lane_f16(__rev2_912, __p3_912), __noswap_vgetq_lane_f16(__rev2_912, __p3_912), __noswap_vgetq_lane_f16(__rev2_912, __p3_912)}); \ | | |
| 68662 | __ret_912 = __builtin_shufflevector(__ret_912, __ret_912, 1, 0); \ | | |
| 68663 | __ret_912; \ | | |
| 68664 | }) | | |
| 68665 | #endif | | |
| 68666 | | | |
| 68667 | #ifdef __LITTLE_ENDIAN__ | | |
| 68668 | #define vfmlslq_laneq_low_f16(__p0_913, __p1_913, __p2_913, __p3_913) __extension__ ({ \ | | |
| 68669 | float32x4_t __ret_913; \ | | |
| 68670 | float32x4_t __s0_913 = __p0_913; \ | | |
| 68671 | float16x8_t __s1_913 = __p1_913; \ | | |
| 68672 | float16x8_t __s2_913 = __p2_913; \ | | |
| 68673 | __ret_913 = vfmlslq_low_f16(__s0_913, __s1_913, (float16x8_t) {vgetq_lane_f16(__s2_913, __p3_913), vgetq_lane_f16(__s2_913, __p3_913), vgetq_lane_f16(__s2_913, __p3_913), vgetq_lane_f16(__s2_913, __p3_913), vgetq_lane_f16(__s2_913, __p3_913), vgetq_lane_f16(__s2_913, __p3_913), vgetq_lane_f16(__s2_913, __p3_913), vgetq_lane_f16(__s2_913, __p3_913)}); \ | | |
| 68674 | __ret_913; \ | | |
| 68675 | }) | | |
| 68676 | #else | | |
| 68677 | #define vfmlslq_laneq_low_f16(__p0_914, __p1_914, __p2_914, __p3_914) __extension__ ({ \ | | |
| 68678 | float32x4_t __ret_914; \ | | |
| 68679 | float32x4_t __s0_914 = __p0_914; \ | | |
| 68680 | float16x8_t __s1_914 = __p1_914; \ | | |
| 68681 | float16x8_t __s2_914 = __p2_914; \ | | |
| 68682 | float32x4_t __rev0_914; __rev0_914 = __builtin_shufflevector(__s0_914, __s0_914, 3, 2, 1, 0); \ | | |
| 68683 | float16x8_t __rev1_914; __rev1_914 = __builtin_shufflevector(__s1_914, __s1_914, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68684 | float16x8_t __rev2_914; __rev2_914 = __builtin_shufflevector(__s2_914, __s2_914, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68685 | __ret_914 = __noswap_vfmlslq_low_f16(__rev0_914, __rev1_914, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_914, __p3_914), __noswap_vgetq_lane_f16(__rev2_914, __p3_914), __noswap_vgetq_lane_f16(__rev2_914, __p3_914), __noswap_vgetq_lane_f16(__rev2_914, __p3_914), __noswap_vgetq_lane_f16(__rev2_914, __p3_914), __noswap_vgetq_lane_f16(__rev2_914, __p3_914), __noswap_vgetq_lane_f16(__rev2_914, __p3_914), __noswap_vgetq_lane_f16(__rev2_914, __p3_914)}); \ | | |
| 68686 | __ret_914 = __builtin_shufflevector(__ret_914, __ret_914, 3, 2, 1, 0); \ | | |
| 68687 | __ret_914; \ | | |
| 68688 | }) | | |
| 68689 | #endif | | |
| 68690 | | | |
| 68691 | #ifdef __LITTLE_ENDIAN__ | 68166 | #ifdef __LITTLE_ENDIAN__ |
| 68692 | #define vfmlsl_laneq_low_f16(__p0_915, __p1_915, __p2_915, __p3_915) __extension__ ({ \ | 68167 | #define vsudotq_lane_s32(__p0_881, __p1_881, __p2_881, __p3_881) __extension__ ({ \ |
| 68693 | float32x2_t __ret_915; \ | 68168 | int32x4_t __ret_881; \ |
| 68694 | float32x2_t __s0_915 = __p0_915; \ | 68169 | int32x4_t __s0_881 = __p0_881; \ |
| 68695 | float16x4_t __s1_915 = __p1_915; \ | 68170 | int8x16_t __s1_881 = __p1_881; \ |
| 68696 | float16x8_t __s2_915 = __p2_915; \ | 68171 | uint8x8_t __s2_881 = __p2_881; \ |
| 68697 | __ret_915 = vfmlsl_low_f16(__s0_915, __s1_915, (float16x4_t) {vgetq_lane_f16(__s2_915, __p3_915), vgetq_lane_f16(__s2_915, __p3_915), vgetq_lane_f16(__s2_915, __p3_915), vgetq_lane_f16(__s2_915, __p3_915)}); \ | 68172 | uint8x8_t __reint_881 = __s2_881; \ |
| 68698 | __ret_915; \ | 68173 | __ret_881 = vusdotq_s32(__s0_881, (uint8x16_t)(splatq_lane_s32(*(int32x2_t *) &__reint_881, __p3_881)), __s1_881); \ |
| 68699 | }) | 68174 | __ret_881; \ |
| 68700 | #else | | |
| 68701 | #define vfmlsl_laneq_low_f16(__p0_916, __p1_916, __p2_916, __p3_916) __extension__ ({ \ | | |
| 68702 | float32x2_t __ret_916; \ | | |
| 68703 | float32x2_t __s0_916 = __p0_916; \ | | |
| 68704 | float16x4_t __s1_916 = __p1_916; \ | | |
| 68705 | float16x8_t __s2_916 = __p2_916; \ | | |
| 68706 | float32x2_t __rev0_916; __rev0_916 = __builtin_shufflevector(__s0_916, __s0_916, 1, 0); \ | | |
| 68707 | float16x4_t __rev1_916; __rev1_916 = __builtin_shufflevector(__s1_916, __s1_916, 3, 2, 1, 0); \ | | |
| 68708 | float16x8_t __rev2_916; __rev2_916 = __builtin_shufflevector(__s2_916, __s2_916, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68709 | __ret_916 = __noswap_vfmlsl_low_f16(__rev0_916, __rev1_916, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_916, __p3_916), __noswap_vgetq_lane_f16(__rev2_916, __p3_916), __noswap_vgetq_lane_f16(__rev2_916, __p3_916), __noswap_vgetq_lane_f16(__rev2_916, __p3_916)}); \ | | |
| 68710 | __ret_916 = __builtin_shufflevector(__ret_916, __ret_916, 1, 0); \ | | |
| 68711 | __ret_916; \ | | |
| 68712 | }) | | |
| 68713 | #endif | | |
| 68714 | | | |
| 68715 | #endif | | |
| 68716 | #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(__aarch64__) | | |
| 68717 | #ifdef __LITTLE_ENDIAN__ | | |
| 68718 | #define vmulh_lane_f16(__p0_917, __p1_917, __p2_917) __extension__ ({ \ | | |
| 68719 | float16_t __ret_917; \ | | |
| 68720 | float16_t __s0_917 = __p0_917; \ | | |
| 68721 | float16x4_t __s1_917 = __p1_917; \ | | |
| 68722 | __ret_917 = __s0_917 * vget_lane_f16(__s1_917, __p2_917); \ | | |
| 68723 | __ret_917; \ | | |
| 68724 | }) | | |
| 68725 | #else | | |
| 68726 | #define vmulh_lane_f16(__p0_918, __p1_918, __p2_918) __extension__ ({ \ | | |
| 68727 | float16_t __ret_918; \ | | |
| 68728 | float16_t __s0_918 = __p0_918; \ | | |
| 68729 | float16x4_t __s1_918 = __p1_918; \ | | |
| 68730 | float16x4_t __rev1_918; __rev1_918 = __builtin_shufflevector(__s1_918, __s1_918, 3, 2, 1, 0); \ | | |
| 68731 | __ret_918 = __s0_918 * __noswap_vget_lane_f16(__rev1_918, __p2_918); \ | | |
| 68732 | __ret_918; \ | | |
| 68733 | }) | | |
| 68734 | #endif | | |
| 68735 | | | |
| 68736 | #ifdef __LITTLE_ENDIAN__ | | |
| 68737 | #define vmulh_laneq_f16(__p0_919, __p1_919, __p2_919) __extension__ ({ \ | | |
| 68738 | float16_t __ret_919; \ | | |
| 68739 | float16_t __s0_919 = __p0_919; \ | | |
| 68740 | float16x8_t __s1_919 = __p1_919; \ | | |
| 68741 | __ret_919 = __s0_919 * vgetq_lane_f16(__s1_919, __p2_919); \ | | |
| 68742 | __ret_919; \ | | |
| 68743 | }) | | |
| 68744 | #else | | |
| 68745 | #define vmulh_laneq_f16(__p0_920, __p1_920, __p2_920) __extension__ ({ \ | | |
| 68746 | float16_t __ret_920; \ | | |
| 68747 | float16_t __s0_920 = __p0_920; \ | | |
| 68748 | float16x8_t __s1_920 = __p1_920; \ | | |
| 68749 | float16x8_t __rev1_920; __rev1_920 = __builtin_shufflevector(__s1_920, __s1_920, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 68750 | __ret_920 = __s0_920 * __noswap_vgetq_lane_f16(__rev1_920, __p2_920); \ | | |
| 68751 | __ret_920; \ | | |
| 68752 | }) | | |
| 68753 | #endif | | |
| 68754 | | | |
| 68755 | #endif | | |
| 68756 | #if defined(__ARM_FEATURE_MATMUL_INT8) | | |
| 68757 | #ifdef __LITTLE_ENDIAN__ | | |
| 68758 | #define vsudotq_lane_s32(__p0_921, __p1_921, __p2_921, __p3_921) __extension__ ({ \ | | |
| 68759 | int32x4_t __ret_921; \ | | |
| 68760 | int32x4_t __s0_921 = __p0_921; \ | | |
| 68761 | int8x16_t __s1_921 = __p1_921; \ | | |
| 68762 | uint8x8_t __s2_921 = __p2_921; \ | | |
| 68763 | uint8x8_t __reint_921 = __s2_921; \ | | |
| 68764 | __ret_921 = vusdotq_s32(__s0_921, (uint8x16_t)(splatq_lane_s32(*(int32x2_t *) &__reint_921, __p3_921)), __s1_921); \ | | |
| 68765 | __ret_921; \ | | |
| 68766 | }) | 68175 | }) |
| 68767 | #else | 68176 | #else |
| 68768 | #define vsudotq_lane_s32(__p0_922, __p1_922, __p2_922, __p3_922) __extension__ ({ \ | 68177 | #define vsudotq_lane_s32(__p0_882, __p1_882, __p2_882, __p3_882) __extension__ ({ \ |
| 68769 | int32x4_t __ret_922; \ | 68178 | int32x4_t __ret_882; \ |
| 68770 | int32x4_t __s0_922 = __p0_922; \ | 68179 | int32x4_t __s0_882 = __p0_882; \ |
| 68771 | int8x16_t __s1_922 = __p1_922; \ | 68180 | int8x16_t __s1_882 = __p1_882; \ |
| 68772 | uint8x8_t __s2_922 = __p2_922; \ | 68181 | uint8x8_t __s2_882 = __p2_882; \ |
| 68773 | int32x4_t __rev0_922; __rev0_922 = __builtin_shufflevector(__s0_922, __s0_922, 3, 2, 1, 0); \ | 68182 | int32x4_t __rev0_882; __rev0_882 = __builtin_shufflevector(__s0_882, __s0_882, 3, 2, 1, 0); \ |
| 68774 | int8x16_t __rev1_922; __rev1_922 = __builtin_shufflevector(__s1_922, __s1_922, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 68183 | int8x16_t __rev1_882; __rev1_882 = __builtin_shufflevector(__s1_882, __s1_882, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 68775 | uint8x8_t __rev2_922; __rev2_922 = __builtin_shufflevector(__s2_922, __s2_922, 7, 6, 5, 4, 3, 2, 1, 0); \ | 68184 | uint8x8_t __rev2_882; __rev2_882 = __builtin_shufflevector(__s2_882, __s2_882, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 68776 | uint8x8_t __reint_922 = __rev2_922; \ | 68185 | uint8x8_t __reint_882 = __rev2_882; \ |
| 68777 | __ret_922 = __noswap_vusdotq_s32(__rev0_922, (uint8x16_t)(__noswap_splatq_lane_s32(*(int32x2_t *) &__reint_922, __p3_922)), __rev1_922); \ | 68186 | __ret_882 = __noswap_vusdotq_s32(__rev0_882, (uint8x16_t)(__noswap_splatq_lane_s32(*(int32x2_t *) &__reint_882, __p3_882)), __rev1_882); \ |
| 68778 | __ret_922 = __builtin_shufflevector(__ret_922, __ret_922, 3, 2, 1, 0); \ | 68187 | __ret_882 = __builtin_shufflevector(__ret_882, __ret_882, 3, 2, 1, 0); \ |
| 68779 | __ret_922; \ | 68188 | __ret_882; \ |
| 68780 | }) | 68189 | }) |
| 68781 | #endif | 68190 | #endif |
| 68782 | | 68191 | |
| 68783 | #ifdef __LITTLE_ENDIAN__ | 68192 | #ifdef __LITTLE_ENDIAN__ |
| 68784 | #define vsudot_lane_s32(__p0_923, __p1_923, __p2_923, __p3_923) __extension__ ({ \ | 68193 | #define vsudot_lane_s32(__p0_883, __p1_883, __p2_883, __p3_883) __extension__ ({ \ |
| 68785 | int32x2_t __ret_923; \ | 68194 | int32x2_t __ret_883; \ |
| 68786 | int32x2_t __s0_923 = __p0_923; \ | 68195 | int32x2_t __s0_883 = __p0_883; \ |
| 68787 | int8x8_t __s1_923 = __p1_923; \ | 68196 | int8x8_t __s1_883 = __p1_883; \ |
| 68788 | uint8x8_t __s2_923 = __p2_923; \ | 68197 | uint8x8_t __s2_883 = __p2_883; \ |
| 68789 | uint8x8_t __reint_923 = __s2_923; \ | 68198 | uint8x8_t __reint_883 = __s2_883; \ |
| 68790 | __ret_923 = vusdot_s32(__s0_923, (uint8x8_t)(splat_lane_s32(*(int32x2_t *) &__reint_923, __p3_923)), __s1_923); \ | 68199 | __ret_883 = vusdot_s32(__s0_883, (uint8x8_t)(splat_lane_s32(*(int32x2_t *) &__reint_883, __p3_883)), __s1_883); \ |
| 68791 | __ret_923; \ | 68200 | __ret_883; \ |
| 68792 | }) | 68201 | }) |
| 68793 | #else | 68202 | #else |
| 68794 | #define vsudot_lane_s32(__p0_924, __p1_924, __p2_924, __p3_924) __extension__ ({ \ | 68203 | #define vsudot_lane_s32(__p0_884, __p1_884, __p2_884, __p3_884) __extension__ ({ \ |
| 68795 | int32x2_t __ret_924; \ | 68204 | int32x2_t __ret_884; \ |
| 68796 | int32x2_t __s0_924 = __p0_924; \ | 68205 | int32x2_t __s0_884 = __p0_884; \ |
| 68797 | int8x8_t __s1_924 = __p1_924; \ | 68206 | int8x8_t __s1_884 = __p1_884; \ |
| 68798 | uint8x8_t __s2_924 = __p2_924; \ | 68207 | uint8x8_t __s2_884 = __p2_884; \ |
| 68799 | int32x2_t __rev0_924; __rev0_924 = __builtin_shufflevector(__s0_924, __s0_924, 1, 0); \ | 68208 | int32x2_t __rev0_884; __rev0_884 = __builtin_shufflevector(__s0_884, __s0_884, 1, 0); \ |
| 68800 | int8x8_t __rev1_924; __rev1_924 = __builtin_shufflevector(__s1_924, __s1_924, 7, 6, 5, 4, 3, 2, 1, 0); \ | 68209 | int8x8_t __rev1_884; __rev1_884 = __builtin_shufflevector(__s1_884, __s1_884, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 68801 | uint8x8_t __rev2_924; __rev2_924 = __builtin_shufflevector(__s2_924, __s2_924, 7, 6, 5, 4, 3, 2, 1, 0); \ | 68210 | uint8x8_t __rev2_884; __rev2_884 = __builtin_shufflevector(__s2_884, __s2_884, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 68802 | uint8x8_t __reint_924 = __rev2_924; \ | 68211 | uint8x8_t __reint_884 = __rev2_884; \ |
| 68803 | __ret_924 = __noswap_vusdot_s32(__rev0_924, (uint8x8_t)(__noswap_splat_lane_s32(*(int32x2_t *) &__reint_924, __p3_924)), __rev1_924); \ | 68212 | __ret_884 = __noswap_vusdot_s32(__rev0_884, (uint8x8_t)(__noswap_splat_lane_s32(*(int32x2_t *) &__reint_884, __p3_884)), __rev1_884); \ |
| 68804 | __ret_924 = __builtin_shufflevector(__ret_924, __ret_924, 1, 0); \ | 68213 | __ret_884 = __builtin_shufflevector(__ret_884, __ret_884, 1, 0); \ |
| 68805 | __ret_924; \ | 68214 | __ret_884; \ |
| 68806 | }) | 68215 | }) |
| 68807 | #endif | 68216 | #endif |
| 68808 | | 68217 | |
| 68809 | #endif | | |
| 68810 | #if defined(__aarch64__) | 68218 | #if defined(__aarch64__) |
| 68811 | #ifdef __LITTLE_ENDIAN__ | 68219 | #ifdef __LITTLE_ENDIAN__ |
| 68812 | __ai uint16x8_t vabdl_high_u8(uint8x16_t __p0, uint8x16_t __p1) { | 68220 | __ai uint16x8_t vabdl_high_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| ... | @@ -69115,136 +68523,136 @@ __ai int32x4_t vaddw_high_s16(int32x4_t __p0, int16x8_t __p1) { | ... | @@ -69115,136 +68523,136 @@ __ai int32x4_t vaddw_high_s16(int32x4_t __p0, int16x8_t __p1) { |
| 69115 | #endif | 68523 | #endif |
| 69116 | | 68524 | |
| 69117 | #ifdef __LITTLE_ENDIAN__ | 68525 | #ifdef __LITTLE_ENDIAN__ |
| 69118 | #define vcopyq_lane_p64(__p0_925, __p1_925, __p2_925, __p3_925) __extension__ ({ \ | 68526 | #define vcopyq_lane_p64(__p0_885, __p1_885, __p2_885, __p3_885) __extension__ ({ \ |
| 69119 | poly64x2_t __ret_925; \ | 68527 | poly64x2_t __ret_885; \ |
| 69120 | poly64x2_t __s0_925 = __p0_925; \ | 68528 | poly64x2_t __s0_885 = __p0_885; \ |
| 69121 | poly64x1_t __s2_925 = __p2_925; \ | 68529 | poly64x1_t __s2_885 = __p2_885; \ |
| 69122 | __ret_925 = vsetq_lane_p64(vget_lane_p64(__s2_925, __p3_925), __s0_925, __p1_925); \ | 68530 | __ret_885 = vsetq_lane_p64(vget_lane_p64(__s2_885, __p3_885), __s0_885, __p1_885); \ |
| 69123 | __ret_925; \ | 68531 | __ret_885; \ |
| 69124 | }) | 68532 | }) |
| 69125 | #else | 68533 | #else |
| 69126 | #define vcopyq_lane_p64(__p0_926, __p1_926, __p2_926, __p3_926) __extension__ ({ \ | 68534 | #define vcopyq_lane_p64(__p0_886, __p1_886, __p2_886, __p3_886) __extension__ ({ \ |
| 69127 | poly64x2_t __ret_926; \ | 68535 | poly64x2_t __ret_886; \ |
| 69128 | poly64x2_t __s0_926 = __p0_926; \ | 68536 | poly64x2_t __s0_886 = __p0_886; \ |
| 69129 | poly64x1_t __s2_926 = __p2_926; \ | 68537 | poly64x1_t __s2_886 = __p2_886; \ |
| 69130 | poly64x2_t __rev0_926; __rev0_926 = __builtin_shufflevector(__s0_926, __s0_926, 1, 0); \ | 68538 | poly64x2_t __rev0_886; __rev0_886 = __builtin_shufflevector(__s0_886, __s0_886, 1, 0); \ |
| 69131 | __ret_926 = __noswap_vsetq_lane_p64(vget_lane_p64(__s2_926, __p3_926), __rev0_926, __p1_926); \ | 68539 | __ret_886 = __noswap_vsetq_lane_p64(vget_lane_p64(__s2_886, __p3_886), __rev0_886, __p1_886); \ |
| 69132 | __ret_926 = __builtin_shufflevector(__ret_926, __ret_926, 1, 0); \ | 68540 | __ret_886 = __builtin_shufflevector(__ret_886, __ret_886, 1, 0); \ |
| 69133 | __ret_926; \ | 68541 | __ret_886; \ |
| 69134 | }) | 68542 | }) |
| 69135 | #endif | 68543 | #endif |
| 69136 | | 68544 | |
| 69137 | #ifdef __LITTLE_ENDIAN__ | 68545 | #ifdef __LITTLE_ENDIAN__ |
| 69138 | #define vcopyq_lane_f64(__p0_927, __p1_927, __p2_927, __p3_927) __extension__ ({ \ | 68546 | #define vcopyq_lane_f64(__p0_887, __p1_887, __p2_887, __p3_887) __extension__ ({ \ |
| 69139 | float64x2_t __ret_927; \ | 68547 | float64x2_t __ret_887; \ |
| 69140 | float64x2_t __s0_927 = __p0_927; \ | 68548 | float64x2_t __s0_887 = __p0_887; \ |
| 69141 | float64x1_t __s2_927 = __p2_927; \ | 68549 | float64x1_t __s2_887 = __p2_887; \ |
| 69142 | __ret_927 = vsetq_lane_f64(vget_lane_f64(__s2_927, __p3_927), __s0_927, __p1_927); \ | 68550 | __ret_887 = vsetq_lane_f64(vget_lane_f64(__s2_887, __p3_887), __s0_887, __p1_887); \ |
| 69143 | __ret_927; \ | 68551 | __ret_887; \ |
| 69144 | }) | 68552 | }) |
| 69145 | #else | 68553 | #else |
| 69146 | #define vcopyq_lane_f64(__p0_928, __p1_928, __p2_928, __p3_928) __extension__ ({ \ | 68554 | #define vcopyq_lane_f64(__p0_888, __p1_888, __p2_888, __p3_888) __extension__ ({ \ |
| 69147 | float64x2_t __ret_928; \ | 68555 | float64x2_t __ret_888; \ |
| 69148 | float64x2_t __s0_928 = __p0_928; \ | 68556 | float64x2_t __s0_888 = __p0_888; \ |
| 69149 | float64x1_t __s2_928 = __p2_928; \ | 68557 | float64x1_t __s2_888 = __p2_888; \ |
| 69150 | float64x2_t __rev0_928; __rev0_928 = __builtin_shufflevector(__s0_928, __s0_928, 1, 0); \ | 68558 | float64x2_t __rev0_888; __rev0_888 = __builtin_shufflevector(__s0_888, __s0_888, 1, 0); \ |
| 69151 | __ret_928 = __noswap_vsetq_lane_f64(vget_lane_f64(__s2_928, __p3_928), __rev0_928, __p1_928); \ | 68559 | __ret_888 = __noswap_vsetq_lane_f64(vget_lane_f64(__s2_888, __p3_888), __rev0_888, __p1_888); \ |
| 69152 | __ret_928 = __builtin_shufflevector(__ret_928, __ret_928, 1, 0); \ | 68560 | __ret_888 = __builtin_shufflevector(__ret_888, __ret_888, 1, 0); \ |
| 69153 | __ret_928; \ | 68561 | __ret_888; \ |
| 69154 | }) | 68562 | }) |
| 69155 | #endif | 68563 | #endif |
| 69156 | | 68564 | |
| 69157 | #define vcopy_lane_p64(__p0_929, __p1_929, __p2_929, __p3_929) __extension__ ({ \ | 68565 | #define vcopy_lane_p64(__p0_889, __p1_889, __p2_889, __p3_889) __extension__ ({ \ |
| 69158 | poly64x1_t __ret_929; \ | 68566 | poly64x1_t __ret_889; \ |
| 69159 | poly64x1_t __s0_929 = __p0_929; \ | 68567 | poly64x1_t __s0_889 = __p0_889; \ |
| 69160 | poly64x1_t __s2_929 = __p2_929; \ | 68568 | poly64x1_t __s2_889 = __p2_889; \ |
| 69161 | __ret_929 = vset_lane_p64(vget_lane_p64(__s2_929, __p3_929), __s0_929, __p1_929); \ | 68569 | __ret_889 = vset_lane_p64(vget_lane_p64(__s2_889, __p3_889), __s0_889, __p1_889); \ |
| 69162 | __ret_929; \ | 68570 | __ret_889; \ |
| 69163 | }) | 68571 | }) |
| 69164 | #define vcopy_lane_f64(__p0_930, __p1_930, __p2_930, __p3_930) __extension__ ({ \ | 68572 | #define vcopy_lane_f64(__p0_890, __p1_890, __p2_890, __p3_890) __extension__ ({ \ |
| 69165 | float64x1_t __ret_930; \ | 68573 | float64x1_t __ret_890; \ |
| 69166 | float64x1_t __s0_930 = __p0_930; \ | 68574 | float64x1_t __s0_890 = __p0_890; \ |
| 69167 | float64x1_t __s2_930 = __p2_930; \ | 68575 | float64x1_t __s2_890 = __p2_890; \ |
| 69168 | __ret_930 = vset_lane_f64(vget_lane_f64(__s2_930, __p3_930), __s0_930, __p1_930); \ | 68576 | __ret_890 = vset_lane_f64(vget_lane_f64(__s2_890, __p3_890), __s0_890, __p1_890); \ |
| 69169 | __ret_930; \ | 68577 | __ret_890; \ |
| 69170 | }) | 68578 | }) |
| 69171 | #ifdef __LITTLE_ENDIAN__ | 68579 | #ifdef __LITTLE_ENDIAN__ |
| 69172 | #define vcopyq_laneq_p64(__p0_931, __p1_931, __p2_931, __p3_931) __extension__ ({ \ | 68580 | #define vcopyq_laneq_p64(__p0_891, __p1_891, __p2_891, __p3_891) __extension__ ({ \ |
| 69173 | poly64x2_t __ret_931; \ | 68581 | poly64x2_t __ret_891; \ |
| 69174 | poly64x2_t __s0_931 = __p0_931; \ | 68582 | poly64x2_t __s0_891 = __p0_891; \ |
| 69175 | poly64x2_t __s2_931 = __p2_931; \ | 68583 | poly64x2_t __s2_891 = __p2_891; \ |
| 69176 | __ret_931 = vsetq_lane_p64(vgetq_lane_p64(__s2_931, __p3_931), __s0_931, __p1_931); \ | 68584 | __ret_891 = vsetq_lane_p64(vgetq_lane_p64(__s2_891, __p3_891), __s0_891, __p1_891); \ |
| 69177 | __ret_931; \ | 68585 | __ret_891; \ |
| 69178 | }) | 68586 | }) |
| 69179 | #else | 68587 | #else |
| 69180 | #define vcopyq_laneq_p64(__p0_932, __p1_932, __p2_932, __p3_932) __extension__ ({ \ | 68588 | #define vcopyq_laneq_p64(__p0_892, __p1_892, __p2_892, __p3_892) __extension__ ({ \ |
| 69181 | poly64x2_t __ret_932; \ | 68589 | poly64x2_t __ret_892; \ |
| 69182 | poly64x2_t __s0_932 = __p0_932; \ | 68590 | poly64x2_t __s0_892 = __p0_892; \ |
| 69183 | poly64x2_t __s2_932 = __p2_932; \ | 68591 | poly64x2_t __s2_892 = __p2_892; \ |
| 69184 | poly64x2_t __rev0_932; __rev0_932 = __builtin_shufflevector(__s0_932, __s0_932, 1, 0); \ | 68592 | poly64x2_t __rev0_892; __rev0_892 = __builtin_shufflevector(__s0_892, __s0_892, 1, 0); \ |
| 69185 | poly64x2_t __rev2_932; __rev2_932 = __builtin_shufflevector(__s2_932, __s2_932, 1, 0); \ | 68593 | poly64x2_t __rev2_892; __rev2_892 = __builtin_shufflevector(__s2_892, __s2_892, 1, 0); \ |
| 69186 | __ret_932 = __noswap_vsetq_lane_p64(__noswap_vgetq_lane_p64(__rev2_932, __p3_932), __rev0_932, __p1_932); \ | 68594 | __ret_892 = __noswap_vsetq_lane_p64(__noswap_vgetq_lane_p64(__rev2_892, __p3_892), __rev0_892, __p1_892); \ |
| 69187 | __ret_932 = __builtin_shufflevector(__ret_932, __ret_932, 1, 0); \ | 68595 | __ret_892 = __builtin_shufflevector(__ret_892, __ret_892, 1, 0); \ |
| 69188 | __ret_932; \ | 68596 | __ret_892; \ |
| 69189 | }) | 68597 | }) |
| 69190 | #endif | 68598 | #endif |
| 69191 | | 68599 | |
| 69192 | #ifdef __LITTLE_ENDIAN__ | 68600 | #ifdef __LITTLE_ENDIAN__ |
| 69193 | #define vcopyq_laneq_f64(__p0_933, __p1_933, __p2_933, __p3_933) __extension__ ({ \ | 68601 | #define vcopyq_laneq_f64(__p0_893, __p1_893, __p2_893, __p3_893) __extension__ ({ \ |
| 69194 | float64x2_t __ret_933; \ | 68602 | float64x2_t __ret_893; \ |
| 69195 | float64x2_t __s0_933 = __p0_933; \ | 68603 | float64x2_t __s0_893 = __p0_893; \ |
| 69196 | float64x2_t __s2_933 = __p2_933; \ | 68604 | float64x2_t __s2_893 = __p2_893; \ |
| 69197 | __ret_933 = vsetq_lane_f64(vgetq_lane_f64(__s2_933, __p3_933), __s0_933, __p1_933); \ | 68605 | __ret_893 = vsetq_lane_f64(vgetq_lane_f64(__s2_893, __p3_893), __s0_893, __p1_893); \ |
| 69198 | __ret_933; \ | 68606 | __ret_893; \ |
| 69199 | }) | 68607 | }) |
| 69200 | #else | 68608 | #else |
| 69201 | #define vcopyq_laneq_f64(__p0_934, __p1_934, __p2_934, __p3_934) __extension__ ({ \ | 68609 | #define vcopyq_laneq_f64(__p0_894, __p1_894, __p2_894, __p3_894) __extension__ ({ \ |
| 69202 | float64x2_t __ret_934; \ | 68610 | float64x2_t __ret_894; \ |
| 69203 | float64x2_t __s0_934 = __p0_934; \ | 68611 | float64x2_t __s0_894 = __p0_894; \ |
| 69204 | float64x2_t __s2_934 = __p2_934; \ | 68612 | float64x2_t __s2_894 = __p2_894; \ |
| 69205 | float64x2_t __rev0_934; __rev0_934 = __builtin_shufflevector(__s0_934, __s0_934, 1, 0); \ | 68613 | float64x2_t __rev0_894; __rev0_894 = __builtin_shufflevector(__s0_894, __s0_894, 1, 0); \ |
| 69206 | float64x2_t __rev2_934; __rev2_934 = __builtin_shufflevector(__s2_934, __s2_934, 1, 0); \ | 68614 | float64x2_t __rev2_894; __rev2_894 = __builtin_shufflevector(__s2_894, __s2_894, 1, 0); \ |
| 69207 | __ret_934 = __noswap_vsetq_lane_f64(__noswap_vgetq_lane_f64(__rev2_934, __p3_934), __rev0_934, __p1_934); \ | 68615 | __ret_894 = __noswap_vsetq_lane_f64(__noswap_vgetq_lane_f64(__rev2_894, __p3_894), __rev0_894, __p1_894); \ |
| 69208 | __ret_934 = __builtin_shufflevector(__ret_934, __ret_934, 1, 0); \ | 68616 | __ret_894 = __builtin_shufflevector(__ret_894, __ret_894, 1, 0); \ |
| 69209 | __ret_934; \ | 68617 | __ret_894; \ |
| 69210 | }) | 68618 | }) |
| 69211 | #endif | 68619 | #endif |
| 69212 | | 68620 | |
| 69213 | #ifdef __LITTLE_ENDIAN__ | 68621 | #ifdef __LITTLE_ENDIAN__ |
| 69214 | #define vcopy_laneq_p64(__p0_935, __p1_935, __p2_935, __p3_935) __extension__ ({ \ | 68622 | #define vcopy_laneq_p64(__p0_895, __p1_895, __p2_895, __p3_895) __extension__ ({ \ |
| 69215 | poly64x1_t __ret_935; \ | 68623 | poly64x1_t __ret_895; \ |
| 69216 | poly64x1_t __s0_935 = __p0_935; \ | 68624 | poly64x1_t __s0_895 = __p0_895; \ |
| 69217 | poly64x2_t __s2_935 = __p2_935; \ | 68625 | poly64x2_t __s2_895 = __p2_895; \ |
| 69218 | __ret_935 = vset_lane_p64(vgetq_lane_p64(__s2_935, __p3_935), __s0_935, __p1_935); \ | 68626 | __ret_895 = vset_lane_p64(vgetq_lane_p64(__s2_895, __p3_895), __s0_895, __p1_895); \ |
| 69219 | __ret_935; \ | 68627 | __ret_895; \ |
| 69220 | }) | 68628 | }) |
| 69221 | #else | 68629 | #else |
| 69222 | #define vcopy_laneq_p64(__p0_936, __p1_936, __p2_936, __p3_936) __extension__ ({ \ | 68630 | #define vcopy_laneq_p64(__p0_896, __p1_896, __p2_896, __p3_896) __extension__ ({ \ |
| 69223 | poly64x1_t __ret_936; \ | 68631 | poly64x1_t __ret_896; \ |
| 69224 | poly64x1_t __s0_936 = __p0_936; \ | 68632 | poly64x1_t __s0_896 = __p0_896; \ |
| 69225 | poly64x2_t __s2_936 = __p2_936; \ | 68633 | poly64x2_t __s2_896 = __p2_896; \ |
| 69226 | poly64x2_t __rev2_936; __rev2_936 = __builtin_shufflevector(__s2_936, __s2_936, 1, 0); \ | 68634 | poly64x2_t __rev2_896; __rev2_896 = __builtin_shufflevector(__s2_896, __s2_896, 1, 0); \ |
| 69227 | __ret_936 = vset_lane_p64(__noswap_vgetq_lane_p64(__rev2_936, __p3_936), __s0_936, __p1_936); \ | 68635 | __ret_896 = vset_lane_p64(__noswap_vgetq_lane_p64(__rev2_896, __p3_896), __s0_896, __p1_896); \ |
| 69228 | __ret_936; \ | 68636 | __ret_896; \ |
| 69229 | }) | 68637 | }) |
| 69230 | #endif | 68638 | #endif |
| 69231 | | 68639 | |
| 69232 | #ifdef __LITTLE_ENDIAN__ | 68640 | #ifdef __LITTLE_ENDIAN__ |
| 69233 | #define vcopy_laneq_f64(__p0_937, __p1_937, __p2_937, __p3_937) __extension__ ({ \ | 68641 | #define vcopy_laneq_f64(__p0_897, __p1_897, __p2_897, __p3_897) __extension__ ({ \ |
| 69234 | float64x1_t __ret_937; \ | 68642 | float64x1_t __ret_897; \ |
| 69235 | float64x1_t __s0_937 = __p0_937; \ | 68643 | float64x1_t __s0_897 = __p0_897; \ |
| 69236 | float64x2_t __s2_937 = __p2_937; \ | 68644 | float64x2_t __s2_897 = __p2_897; \ |
| 69237 | __ret_937 = vset_lane_f64(vgetq_lane_f64(__s2_937, __p3_937), __s0_937, __p1_937); \ | 68645 | __ret_897 = vset_lane_f64(vgetq_lane_f64(__s2_897, __p3_897), __s0_897, __p1_897); \ |
| 69238 | __ret_937; \ | 68646 | __ret_897; \ |
| 69239 | }) | 68647 | }) |
| 69240 | #else | 68648 | #else |
| 69241 | #define vcopy_laneq_f64(__p0_938, __p1_938, __p2_938, __p3_938) __extension__ ({ \ | 68649 | #define vcopy_laneq_f64(__p0_898, __p1_898, __p2_898, __p3_898) __extension__ ({ \ |
| 69242 | float64x1_t __ret_938; \ | 68650 | float64x1_t __ret_898; \ |
| 69243 | float64x1_t __s0_938 = __p0_938; \ | 68651 | float64x1_t __s0_898 = __p0_898; \ |
| 69244 | float64x2_t __s2_938 = __p2_938; \ | 68652 | float64x2_t __s2_898 = __p2_898; \ |
| 69245 | float64x2_t __rev2_938; __rev2_938 = __builtin_shufflevector(__s2_938, __s2_938, 1, 0); \ | 68653 | float64x2_t __rev2_898; __rev2_898 = __builtin_shufflevector(__s2_898, __s2_898, 1, 0); \ |
| 69246 | __ret_938 = vset_lane_f64(__noswap_vgetq_lane_f64(__rev2_938, __p3_938), __s0_938, __p1_938); \ | 68654 | __ret_898 = vset_lane_f64(__noswap_vgetq_lane_f64(__rev2_898, __p3_898), __s0_898, __p1_898); \ |
| 69247 | __ret_938; \ | 68655 | __ret_898; \ |
| 69248 | }) | 68656 | }) |
| 69249 | #endif | 68657 | #endif |
| 69250 | | 68658 | |
| ... | @@ -69600,38 +69008,460 @@ __ai int32x4_t vmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) { | ... | @@ -69600,38 +69008,460 @@ __ai int32x4_t vmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) { |
| 69600 | } | 69008 | } |
| 69601 | #endif | 69009 | #endif |
| 69602 | | 69010 | |
| 69603 | #define vmulx_lane_f64(__p0_939, __p1_939, __p2_939) __extension__ ({ \ | 69011 | #define vmulx_lane_f64(__p0_899, __p1_899, __p2_899) __extension__ ({ \ |
| 69604 | float64x1_t __ret_939; \ | 69012 | float64x1_t __ret_899; \ |
| 69605 | float64x1_t __s0_939 = __p0_939; \ | 69013 | float64x1_t __s0_899 = __p0_899; \ |
| 69606 | float64x1_t __s1_939 = __p1_939; \ | 69014 | float64x1_t __s1_899 = __p1_899; \ |
| 69607 | float64_t __x_939 = vget_lane_f64(__s0_939, 0); \ | 69015 | float64_t __x_899 = vget_lane_f64(__s0_899, 0); \ |
| 69608 | float64_t __y_939 = vget_lane_f64(__s1_939, __p2_939); \ | 69016 | float64_t __y_899 = vget_lane_f64(__s1_899, __p2_899); \ |
| 69609 | float64_t __z_939 = vmulxd_f64(__x_939, __y_939); \ | 69017 | float64_t __z_899 = vmulxd_f64(__x_899, __y_899); \ |
| 69610 | __ret_939 = vset_lane_f64(__z_939, __s0_939, __p2_939); \ | 69018 | __ret_899 = vset_lane_f64(__z_899, __s0_899, __p2_899); \ |
| 69611 | __ret_939; \ | 69019 | __ret_899; \ |
| | 69020 | }) |
| | 69021 | #ifdef __LITTLE_ENDIAN__ |
| | 69022 | #define vmulx_laneq_f64(__p0_900, __p1_900, __p2_900) __extension__ ({ \ |
| | 69023 | float64x1_t __ret_900; \ |
| | 69024 | float64x1_t __s0_900 = __p0_900; \ |
| | 69025 | float64x2_t __s1_900 = __p1_900; \ |
| | 69026 | float64_t __x_900 = vget_lane_f64(__s0_900, 0); \ |
| | 69027 | float64_t __y_900 = vgetq_lane_f64(__s1_900, __p2_900); \ |
| | 69028 | float64_t __z_900 = vmulxd_f64(__x_900, __y_900); \ |
| | 69029 | __ret_900 = vset_lane_f64(__z_900, __s0_900, 0); \ |
| | 69030 | __ret_900; \ |
| | 69031 | }) |
| | 69032 | #else |
| | 69033 | #define vmulx_laneq_f64(__p0_901, __p1_901, __p2_901) __extension__ ({ \ |
| | 69034 | float64x1_t __ret_901; \ |
| | 69035 | float64x1_t __s0_901 = __p0_901; \ |
| | 69036 | float64x2_t __s1_901 = __p1_901; \ |
| | 69037 | float64x2_t __rev1_901; __rev1_901 = __builtin_shufflevector(__s1_901, __s1_901, 1, 0); \ |
| | 69038 | float64_t __x_901 = vget_lane_f64(__s0_901, 0); \ |
| | 69039 | float64_t __y_901 = __noswap_vgetq_lane_f64(__rev1_901, __p2_901); \ |
| | 69040 | float64_t __z_901 = vmulxd_f64(__x_901, __y_901); \ |
| | 69041 | __ret_901 = vset_lane_f64(__z_901, __s0_901, 0); \ |
| | 69042 | __ret_901; \ |
| | 69043 | }) |
| | 69044 | #endif |
| | 69045 | |
| | 69046 | #ifdef __LITTLE_ENDIAN__ |
| | 69047 | #define vfmlalq_lane_high_f16(__p0_902, __p1_902, __p2_902, __p3_902) __extension__ ({ \ |
| | 69048 | float32x4_t __ret_902; \ |
| | 69049 | float32x4_t __s0_902 = __p0_902; \ |
| | 69050 | float16x8_t __s1_902 = __p1_902; \ |
| | 69051 | float16x4_t __s2_902 = __p2_902; \ |
| | 69052 | __ret_902 = vfmlalq_high_f16(__s0_902, __s1_902, (float16x8_t) {vget_lane_f16(__s2_902, __p3_902), vget_lane_f16(__s2_902, __p3_902), vget_lane_f16(__s2_902, __p3_902), vget_lane_f16(__s2_902, __p3_902), vget_lane_f16(__s2_902, __p3_902), vget_lane_f16(__s2_902, __p3_902), vget_lane_f16(__s2_902, __p3_902), vget_lane_f16(__s2_902, __p3_902)}); \ |
| | 69053 | __ret_902; \ |
| | 69054 | }) |
| | 69055 | #else |
| | 69056 | #define vfmlalq_lane_high_f16(__p0_903, __p1_903, __p2_903, __p3_903) __extension__ ({ \ |
| | 69057 | float32x4_t __ret_903; \ |
| | 69058 | float32x4_t __s0_903 = __p0_903; \ |
| | 69059 | float16x8_t __s1_903 = __p1_903; \ |
| | 69060 | float16x4_t __s2_903 = __p2_903; \ |
| | 69061 | float32x4_t __rev0_903; __rev0_903 = __builtin_shufflevector(__s0_903, __s0_903, 3, 2, 1, 0); \ |
| | 69062 | float16x8_t __rev1_903; __rev1_903 = __builtin_shufflevector(__s1_903, __s1_903, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69063 | float16x4_t __rev2_903; __rev2_903 = __builtin_shufflevector(__s2_903, __s2_903, 3, 2, 1, 0); \ |
| | 69064 | __ret_903 = __noswap_vfmlalq_high_f16(__rev0_903, __rev1_903, (float16x8_t) {__noswap_vget_lane_f16(__rev2_903, __p3_903), __noswap_vget_lane_f16(__rev2_903, __p3_903), __noswap_vget_lane_f16(__rev2_903, __p3_903), __noswap_vget_lane_f16(__rev2_903, __p3_903), __noswap_vget_lane_f16(__rev2_903, __p3_903), __noswap_vget_lane_f16(__rev2_903, __p3_903), __noswap_vget_lane_f16(__rev2_903, __p3_903), __noswap_vget_lane_f16(__rev2_903, __p3_903)}); \ |
| | 69065 | __ret_903 = __builtin_shufflevector(__ret_903, __ret_903, 3, 2, 1, 0); \ |
| | 69066 | __ret_903; \ |
| | 69067 | }) |
| | 69068 | #endif |
| | 69069 | |
| | 69070 | #ifdef __LITTLE_ENDIAN__ |
| | 69071 | #define vfmlal_lane_high_f16(__p0_904, __p1_904, __p2_904, __p3_904) __extension__ ({ \ |
| | 69072 | float32x2_t __ret_904; \ |
| | 69073 | float32x2_t __s0_904 = __p0_904; \ |
| | 69074 | float16x4_t __s1_904 = __p1_904; \ |
| | 69075 | float16x4_t __s2_904 = __p2_904; \ |
| | 69076 | __ret_904 = vfmlal_high_f16(__s0_904, __s1_904, (float16x4_t) {vget_lane_f16(__s2_904, __p3_904), vget_lane_f16(__s2_904, __p3_904), vget_lane_f16(__s2_904, __p3_904), vget_lane_f16(__s2_904, __p3_904)}); \ |
| | 69077 | __ret_904; \ |
| | 69078 | }) |
| | 69079 | #else |
| | 69080 | #define vfmlal_lane_high_f16(__p0_905, __p1_905, __p2_905, __p3_905) __extension__ ({ \ |
| | 69081 | float32x2_t __ret_905; \ |
| | 69082 | float32x2_t __s0_905 = __p0_905; \ |
| | 69083 | float16x4_t __s1_905 = __p1_905; \ |
| | 69084 | float16x4_t __s2_905 = __p2_905; \ |
| | 69085 | float32x2_t __rev0_905; __rev0_905 = __builtin_shufflevector(__s0_905, __s0_905, 1, 0); \ |
| | 69086 | float16x4_t __rev1_905; __rev1_905 = __builtin_shufflevector(__s1_905, __s1_905, 3, 2, 1, 0); \ |
| | 69087 | float16x4_t __rev2_905; __rev2_905 = __builtin_shufflevector(__s2_905, __s2_905, 3, 2, 1, 0); \ |
| | 69088 | __ret_905 = __noswap_vfmlal_high_f16(__rev0_905, __rev1_905, (float16x4_t) {__noswap_vget_lane_f16(__rev2_905, __p3_905), __noswap_vget_lane_f16(__rev2_905, __p3_905), __noswap_vget_lane_f16(__rev2_905, __p3_905), __noswap_vget_lane_f16(__rev2_905, __p3_905)}); \ |
| | 69089 | __ret_905 = __builtin_shufflevector(__ret_905, __ret_905, 1, 0); \ |
| | 69090 | __ret_905; \ |
| | 69091 | }) |
| | 69092 | #endif |
| | 69093 | |
| | 69094 | #ifdef __LITTLE_ENDIAN__ |
| | 69095 | #define vfmlalq_lane_low_f16(__p0_906, __p1_906, __p2_906, __p3_906) __extension__ ({ \ |
| | 69096 | float32x4_t __ret_906; \ |
| | 69097 | float32x4_t __s0_906 = __p0_906; \ |
| | 69098 | float16x8_t __s1_906 = __p1_906; \ |
| | 69099 | float16x4_t __s2_906 = __p2_906; \ |
| | 69100 | __ret_906 = vfmlalq_low_f16(__s0_906, __s1_906, (float16x8_t) {vget_lane_f16(__s2_906, __p3_906), vget_lane_f16(__s2_906, __p3_906), vget_lane_f16(__s2_906, __p3_906), vget_lane_f16(__s2_906, __p3_906), vget_lane_f16(__s2_906, __p3_906), vget_lane_f16(__s2_906, __p3_906), vget_lane_f16(__s2_906, __p3_906), vget_lane_f16(__s2_906, __p3_906)}); \ |
| | 69101 | __ret_906; \ |
| | 69102 | }) |
| | 69103 | #else |
| | 69104 | #define vfmlalq_lane_low_f16(__p0_907, __p1_907, __p2_907, __p3_907) __extension__ ({ \ |
| | 69105 | float32x4_t __ret_907; \ |
| | 69106 | float32x4_t __s0_907 = __p0_907; \ |
| | 69107 | float16x8_t __s1_907 = __p1_907; \ |
| | 69108 | float16x4_t __s2_907 = __p2_907; \ |
| | 69109 | float32x4_t __rev0_907; __rev0_907 = __builtin_shufflevector(__s0_907, __s0_907, 3, 2, 1, 0); \ |
| | 69110 | float16x8_t __rev1_907; __rev1_907 = __builtin_shufflevector(__s1_907, __s1_907, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69111 | float16x4_t __rev2_907; __rev2_907 = __builtin_shufflevector(__s2_907, __s2_907, 3, 2, 1, 0); \ |
| | 69112 | __ret_907 = __noswap_vfmlalq_low_f16(__rev0_907, __rev1_907, (float16x8_t) {__noswap_vget_lane_f16(__rev2_907, __p3_907), __noswap_vget_lane_f16(__rev2_907, __p3_907), __noswap_vget_lane_f16(__rev2_907, __p3_907), __noswap_vget_lane_f16(__rev2_907, __p3_907), __noswap_vget_lane_f16(__rev2_907, __p3_907), __noswap_vget_lane_f16(__rev2_907, __p3_907), __noswap_vget_lane_f16(__rev2_907, __p3_907), __noswap_vget_lane_f16(__rev2_907, __p3_907)}); \ |
| | 69113 | __ret_907 = __builtin_shufflevector(__ret_907, __ret_907, 3, 2, 1, 0); \ |
| | 69114 | __ret_907; \ |
| | 69115 | }) |
| | 69116 | #endif |
| | 69117 | |
| | 69118 | #ifdef __LITTLE_ENDIAN__ |
| | 69119 | #define vfmlal_lane_low_f16(__p0_908, __p1_908, __p2_908, __p3_908) __extension__ ({ \ |
| | 69120 | float32x2_t __ret_908; \ |
| | 69121 | float32x2_t __s0_908 = __p0_908; \ |
| | 69122 | float16x4_t __s1_908 = __p1_908; \ |
| | 69123 | float16x4_t __s2_908 = __p2_908; \ |
| | 69124 | __ret_908 = vfmlal_low_f16(__s0_908, __s1_908, (float16x4_t) {vget_lane_f16(__s2_908, __p3_908), vget_lane_f16(__s2_908, __p3_908), vget_lane_f16(__s2_908, __p3_908), vget_lane_f16(__s2_908, __p3_908)}); \ |
| | 69125 | __ret_908; \ |
| | 69126 | }) |
| | 69127 | #else |
| | 69128 | #define vfmlal_lane_low_f16(__p0_909, __p1_909, __p2_909, __p3_909) __extension__ ({ \ |
| | 69129 | float32x2_t __ret_909; \ |
| | 69130 | float32x2_t __s0_909 = __p0_909; \ |
| | 69131 | float16x4_t __s1_909 = __p1_909; \ |
| | 69132 | float16x4_t __s2_909 = __p2_909; \ |
| | 69133 | float32x2_t __rev0_909; __rev0_909 = __builtin_shufflevector(__s0_909, __s0_909, 1, 0); \ |
| | 69134 | float16x4_t __rev1_909; __rev1_909 = __builtin_shufflevector(__s1_909, __s1_909, 3, 2, 1, 0); \ |
| | 69135 | float16x4_t __rev2_909; __rev2_909 = __builtin_shufflevector(__s2_909, __s2_909, 3, 2, 1, 0); \ |
| | 69136 | __ret_909 = __noswap_vfmlal_low_f16(__rev0_909, __rev1_909, (float16x4_t) {__noswap_vget_lane_f16(__rev2_909, __p3_909), __noswap_vget_lane_f16(__rev2_909, __p3_909), __noswap_vget_lane_f16(__rev2_909, __p3_909), __noswap_vget_lane_f16(__rev2_909, __p3_909)}); \ |
| | 69137 | __ret_909 = __builtin_shufflevector(__ret_909, __ret_909, 1, 0); \ |
| | 69138 | __ret_909; \ |
| | 69139 | }) |
| | 69140 | #endif |
| | 69141 | |
| | 69142 | #ifdef __LITTLE_ENDIAN__ |
| | 69143 | #define vfmlalq_laneq_high_f16(__p0_910, __p1_910, __p2_910, __p3_910) __extension__ ({ \ |
| | 69144 | float32x4_t __ret_910; \ |
| | 69145 | float32x4_t __s0_910 = __p0_910; \ |
| | 69146 | float16x8_t __s1_910 = __p1_910; \ |
| | 69147 | float16x8_t __s2_910 = __p2_910; \ |
| | 69148 | __ret_910 = vfmlalq_high_f16(__s0_910, __s1_910, (float16x8_t) {vgetq_lane_f16(__s2_910, __p3_910), vgetq_lane_f16(__s2_910, __p3_910), vgetq_lane_f16(__s2_910, __p3_910), vgetq_lane_f16(__s2_910, __p3_910), vgetq_lane_f16(__s2_910, __p3_910), vgetq_lane_f16(__s2_910, __p3_910), vgetq_lane_f16(__s2_910, __p3_910), vgetq_lane_f16(__s2_910, __p3_910)}); \ |
| | 69149 | __ret_910; \ |
| | 69150 | }) |
| | 69151 | #else |
| | 69152 | #define vfmlalq_laneq_high_f16(__p0_911, __p1_911, __p2_911, __p3_911) __extension__ ({ \ |
| | 69153 | float32x4_t __ret_911; \ |
| | 69154 | float32x4_t __s0_911 = __p0_911; \ |
| | 69155 | float16x8_t __s1_911 = __p1_911; \ |
| | 69156 | float16x8_t __s2_911 = __p2_911; \ |
| | 69157 | float32x4_t __rev0_911; __rev0_911 = __builtin_shufflevector(__s0_911, __s0_911, 3, 2, 1, 0); \ |
| | 69158 | float16x8_t __rev1_911; __rev1_911 = __builtin_shufflevector(__s1_911, __s1_911, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69159 | float16x8_t __rev2_911; __rev2_911 = __builtin_shufflevector(__s2_911, __s2_911, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69160 | __ret_911 = __noswap_vfmlalq_high_f16(__rev0_911, __rev1_911, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_911, __p3_911), __noswap_vgetq_lane_f16(__rev2_911, __p3_911), __noswap_vgetq_lane_f16(__rev2_911, __p3_911), __noswap_vgetq_lane_f16(__rev2_911, __p3_911), __noswap_vgetq_lane_f16(__rev2_911, __p3_911), __noswap_vgetq_lane_f16(__rev2_911, __p3_911), __noswap_vgetq_lane_f16(__rev2_911, __p3_911), __noswap_vgetq_lane_f16(__rev2_911, __p3_911)}); \ |
| | 69161 | __ret_911 = __builtin_shufflevector(__ret_911, __ret_911, 3, 2, 1, 0); \ |
| | 69162 | __ret_911; \ |
| 69612 | }) | 69163 | }) |
| | 69164 | #endif |
| | 69165 | |
| 69613 | #ifdef __LITTLE_ENDIAN__ | 69166 | #ifdef __LITTLE_ENDIAN__ |
| 69614 | #define vmulx_laneq_f64(__p0_940, __p1_940, __p2_940) __extension__ ({ \ | 69167 | #define vfmlal_laneq_high_f16(__p0_912, __p1_912, __p2_912, __p3_912) __extension__ ({ \ |
| 69615 | float64x1_t __ret_940; \ | 69168 | float32x2_t __ret_912; \ |
| 69616 | float64x1_t __s0_940 = __p0_940; \ | 69169 | float32x2_t __s0_912 = __p0_912; \ |
| 69617 | float64x2_t __s1_940 = __p1_940; \ | 69170 | float16x4_t __s1_912 = __p1_912; \ |
| 69618 | float64_t __x_940 = vget_lane_f64(__s0_940, 0); \ | 69171 | float16x8_t __s2_912 = __p2_912; \ |
| 69619 | float64_t __y_940 = vgetq_lane_f64(__s1_940, __p2_940); \ | 69172 | __ret_912 = vfmlal_high_f16(__s0_912, __s1_912, (float16x4_t) {vgetq_lane_f16(__s2_912, __p3_912), vgetq_lane_f16(__s2_912, __p3_912), vgetq_lane_f16(__s2_912, __p3_912), vgetq_lane_f16(__s2_912, __p3_912)}); \ |
| 69620 | float64_t __z_940 = vmulxd_f64(__x_940, __y_940); \ | 69173 | __ret_912; \ |
| 69621 | __ret_940 = vset_lane_f64(__z_940, __s0_940, 0); \ | | |
| 69622 | __ret_940; \ | | |
| 69623 | }) | 69174 | }) |
| 69624 | #else | 69175 | #else |
| 69625 | #define vmulx_laneq_f64(__p0_941, __p1_941, __p2_941) __extension__ ({ \ | 69176 | #define vfmlal_laneq_high_f16(__p0_913, __p1_913, __p2_913, __p3_913) __extension__ ({ \ |
| 69626 | float64x1_t __ret_941; \ | 69177 | float32x2_t __ret_913; \ |
| 69627 | float64x1_t __s0_941 = __p0_941; \ | 69178 | float32x2_t __s0_913 = __p0_913; \ |
| 69628 | float64x2_t __s1_941 = __p1_941; \ | 69179 | float16x4_t __s1_913 = __p1_913; \ |
| 69629 | float64x2_t __rev1_941; __rev1_941 = __builtin_shufflevector(__s1_941, __s1_941, 1, 0); \ | 69180 | float16x8_t __s2_913 = __p2_913; \ |
| 69630 | float64_t __x_941 = vget_lane_f64(__s0_941, 0); \ | 69181 | float32x2_t __rev0_913; __rev0_913 = __builtin_shufflevector(__s0_913, __s0_913, 1, 0); \ |
| 69631 | float64_t __y_941 = __noswap_vgetq_lane_f64(__rev1_941, __p2_941); \ | 69182 | float16x4_t __rev1_913; __rev1_913 = __builtin_shufflevector(__s1_913, __s1_913, 3, 2, 1, 0); \ |
| 69632 | float64_t __z_941 = vmulxd_f64(__x_941, __y_941); \ | 69183 | float16x8_t __rev2_913; __rev2_913 = __builtin_shufflevector(__s2_913, __s2_913, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 69633 | __ret_941 = vset_lane_f64(__z_941, __s0_941, 0); \ | 69184 | __ret_913 = __noswap_vfmlal_high_f16(__rev0_913, __rev1_913, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_913, __p3_913), __noswap_vgetq_lane_f16(__rev2_913, __p3_913), __noswap_vgetq_lane_f16(__rev2_913, __p3_913), __noswap_vgetq_lane_f16(__rev2_913, __p3_913)}); \ |
| 69634 | __ret_941; \ | 69185 | __ret_913 = __builtin_shufflevector(__ret_913, __ret_913, 1, 0); \ |
| | 69186 | __ret_913; \ |
| | 69187 | }) |
| | 69188 | #endif |
| | 69189 | |
| | 69190 | #ifdef __LITTLE_ENDIAN__ |
| | 69191 | #define vfmlalq_laneq_low_f16(__p0_914, __p1_914, __p2_914, __p3_914) __extension__ ({ \ |
| | 69192 | float32x4_t __ret_914; \ |
| | 69193 | float32x4_t __s0_914 = __p0_914; \ |
| | 69194 | float16x8_t __s1_914 = __p1_914; \ |
| | 69195 | float16x8_t __s2_914 = __p2_914; \ |
| | 69196 | __ret_914 = vfmlalq_low_f16(__s0_914, __s1_914, (float16x8_t) {vgetq_lane_f16(__s2_914, __p3_914), vgetq_lane_f16(__s2_914, __p3_914), vgetq_lane_f16(__s2_914, __p3_914), vgetq_lane_f16(__s2_914, __p3_914), vgetq_lane_f16(__s2_914, __p3_914), vgetq_lane_f16(__s2_914, __p3_914), vgetq_lane_f16(__s2_914, __p3_914), vgetq_lane_f16(__s2_914, __p3_914)}); \ |
| | 69197 | __ret_914; \ |
| | 69198 | }) |
| | 69199 | #else |
| | 69200 | #define vfmlalq_laneq_low_f16(__p0_915, __p1_915, __p2_915, __p3_915) __extension__ ({ \ |
| | 69201 | float32x4_t __ret_915; \ |
| | 69202 | float32x4_t __s0_915 = __p0_915; \ |
| | 69203 | float16x8_t __s1_915 = __p1_915; \ |
| | 69204 | float16x8_t __s2_915 = __p2_915; \ |
| | 69205 | float32x4_t __rev0_915; __rev0_915 = __builtin_shufflevector(__s0_915, __s0_915, 3, 2, 1, 0); \ |
| | 69206 | float16x8_t __rev1_915; __rev1_915 = __builtin_shufflevector(__s1_915, __s1_915, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69207 | float16x8_t __rev2_915; __rev2_915 = __builtin_shufflevector(__s2_915, __s2_915, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69208 | __ret_915 = __noswap_vfmlalq_low_f16(__rev0_915, __rev1_915, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_915, __p3_915), __noswap_vgetq_lane_f16(__rev2_915, __p3_915), __noswap_vgetq_lane_f16(__rev2_915, __p3_915), __noswap_vgetq_lane_f16(__rev2_915, __p3_915), __noswap_vgetq_lane_f16(__rev2_915, __p3_915), __noswap_vgetq_lane_f16(__rev2_915, __p3_915), __noswap_vgetq_lane_f16(__rev2_915, __p3_915), __noswap_vgetq_lane_f16(__rev2_915, __p3_915)}); \ |
| | 69209 | __ret_915 = __builtin_shufflevector(__ret_915, __ret_915, 3, 2, 1, 0); \ |
| | 69210 | __ret_915; \ |
| | 69211 | }) |
| | 69212 | #endif |
| | 69213 | |
| | 69214 | #ifdef __LITTLE_ENDIAN__ |
| | 69215 | #define vfmlal_laneq_low_f16(__p0_916, __p1_916, __p2_916, __p3_916) __extension__ ({ \ |
| | 69216 | float32x2_t __ret_916; \ |
| | 69217 | float32x2_t __s0_916 = __p0_916; \ |
| | 69218 | float16x4_t __s1_916 = __p1_916; \ |
| | 69219 | float16x8_t __s2_916 = __p2_916; \ |
| | 69220 | __ret_916 = vfmlal_low_f16(__s0_916, __s1_916, (float16x4_t) {vgetq_lane_f16(__s2_916, __p3_916), vgetq_lane_f16(__s2_916, __p3_916), vgetq_lane_f16(__s2_916, __p3_916), vgetq_lane_f16(__s2_916, __p3_916)}); \ |
| | 69221 | __ret_916; \ |
| | 69222 | }) |
| | 69223 | #else |
| | 69224 | #define vfmlal_laneq_low_f16(__p0_917, __p1_917, __p2_917, __p3_917) __extension__ ({ \ |
| | 69225 | float32x2_t __ret_917; \ |
| | 69226 | float32x2_t __s0_917 = __p0_917; \ |
| | 69227 | float16x4_t __s1_917 = __p1_917; \ |
| | 69228 | float16x8_t __s2_917 = __p2_917; \ |
| | 69229 | float32x2_t __rev0_917; __rev0_917 = __builtin_shufflevector(__s0_917, __s0_917, 1, 0); \ |
| | 69230 | float16x4_t __rev1_917; __rev1_917 = __builtin_shufflevector(__s1_917, __s1_917, 3, 2, 1, 0); \ |
| | 69231 | float16x8_t __rev2_917; __rev2_917 = __builtin_shufflevector(__s2_917, __s2_917, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69232 | __ret_917 = __noswap_vfmlal_low_f16(__rev0_917, __rev1_917, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_917, __p3_917), __noswap_vgetq_lane_f16(__rev2_917, __p3_917), __noswap_vgetq_lane_f16(__rev2_917, __p3_917), __noswap_vgetq_lane_f16(__rev2_917, __p3_917)}); \ |
| | 69233 | __ret_917 = __builtin_shufflevector(__ret_917, __ret_917, 1, 0); \ |
| | 69234 | __ret_917; \ |
| | 69235 | }) |
| | 69236 | #endif |
| | 69237 | |
| | 69238 | #ifdef __LITTLE_ENDIAN__ |
| | 69239 | #define vfmlslq_lane_high_f16(__p0_918, __p1_918, __p2_918, __p3_918) __extension__ ({ \ |
| | 69240 | float32x4_t __ret_918; \ |
| | 69241 | float32x4_t __s0_918 = __p0_918; \ |
| | 69242 | float16x8_t __s1_918 = __p1_918; \ |
| | 69243 | float16x4_t __s2_918 = __p2_918; \ |
| | 69244 | __ret_918 = vfmlslq_high_f16(__s0_918, __s1_918, (float16x8_t) {vget_lane_f16(__s2_918, __p3_918), vget_lane_f16(__s2_918, __p3_918), vget_lane_f16(__s2_918, __p3_918), vget_lane_f16(__s2_918, __p3_918), vget_lane_f16(__s2_918, __p3_918), vget_lane_f16(__s2_918, __p3_918), vget_lane_f16(__s2_918, __p3_918), vget_lane_f16(__s2_918, __p3_918)}); \ |
| | 69245 | __ret_918; \ |
| | 69246 | }) |
| | 69247 | #else |
| | 69248 | #define vfmlslq_lane_high_f16(__p0_919, __p1_919, __p2_919, __p3_919) __extension__ ({ \ |
| | 69249 | float32x4_t __ret_919; \ |
| | 69250 | float32x4_t __s0_919 = __p0_919; \ |
| | 69251 | float16x8_t __s1_919 = __p1_919; \ |
| | 69252 | float16x4_t __s2_919 = __p2_919; \ |
| | 69253 | float32x4_t __rev0_919; __rev0_919 = __builtin_shufflevector(__s0_919, __s0_919, 3, 2, 1, 0); \ |
| | 69254 | float16x8_t __rev1_919; __rev1_919 = __builtin_shufflevector(__s1_919, __s1_919, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69255 | float16x4_t __rev2_919; __rev2_919 = __builtin_shufflevector(__s2_919, __s2_919, 3, 2, 1, 0); \ |
| | 69256 | __ret_919 = __noswap_vfmlslq_high_f16(__rev0_919, __rev1_919, (float16x8_t) {__noswap_vget_lane_f16(__rev2_919, __p3_919), __noswap_vget_lane_f16(__rev2_919, __p3_919), __noswap_vget_lane_f16(__rev2_919, __p3_919), __noswap_vget_lane_f16(__rev2_919, __p3_919), __noswap_vget_lane_f16(__rev2_919, __p3_919), __noswap_vget_lane_f16(__rev2_919, __p3_919), __noswap_vget_lane_f16(__rev2_919, __p3_919), __noswap_vget_lane_f16(__rev2_919, __p3_919)}); \ |
| | 69257 | __ret_919 = __builtin_shufflevector(__ret_919, __ret_919, 3, 2, 1, 0); \ |
| | 69258 | __ret_919; \ |
| | 69259 | }) |
| | 69260 | #endif |
| | 69261 | |
| | 69262 | #ifdef __LITTLE_ENDIAN__ |
| | 69263 | #define vfmlsl_lane_high_f16(__p0_920, __p1_920, __p2_920, __p3_920) __extension__ ({ \ |
| | 69264 | float32x2_t __ret_920; \ |
| | 69265 | float32x2_t __s0_920 = __p0_920; \ |
| | 69266 | float16x4_t __s1_920 = __p1_920; \ |
| | 69267 | float16x4_t __s2_920 = __p2_920; \ |
| | 69268 | __ret_920 = vfmlsl_high_f16(__s0_920, __s1_920, (float16x4_t) {vget_lane_f16(__s2_920, __p3_920), vget_lane_f16(__s2_920, __p3_920), vget_lane_f16(__s2_920, __p3_920), vget_lane_f16(__s2_920, __p3_920)}); \ |
| | 69269 | __ret_920; \ |
| | 69270 | }) |
| | 69271 | #else |
| | 69272 | #define vfmlsl_lane_high_f16(__p0_921, __p1_921, __p2_921, __p3_921) __extension__ ({ \ |
| | 69273 | float32x2_t __ret_921; \ |
| | 69274 | float32x2_t __s0_921 = __p0_921; \ |
| | 69275 | float16x4_t __s1_921 = __p1_921; \ |
| | 69276 | float16x4_t __s2_921 = __p2_921; \ |
| | 69277 | float32x2_t __rev0_921; __rev0_921 = __builtin_shufflevector(__s0_921, __s0_921, 1, 0); \ |
| | 69278 | float16x4_t __rev1_921; __rev1_921 = __builtin_shufflevector(__s1_921, __s1_921, 3, 2, 1, 0); \ |
| | 69279 | float16x4_t __rev2_921; __rev2_921 = __builtin_shufflevector(__s2_921, __s2_921, 3, 2, 1, 0); \ |
| | 69280 | __ret_921 = __noswap_vfmlsl_high_f16(__rev0_921, __rev1_921, (float16x4_t) {__noswap_vget_lane_f16(__rev2_921, __p3_921), __noswap_vget_lane_f16(__rev2_921, __p3_921), __noswap_vget_lane_f16(__rev2_921, __p3_921), __noswap_vget_lane_f16(__rev2_921, __p3_921)}); \ |
| | 69281 | __ret_921 = __builtin_shufflevector(__ret_921, __ret_921, 1, 0); \ |
| | 69282 | __ret_921; \ |
| | 69283 | }) |
| | 69284 | #endif |
| | 69285 | |
| | 69286 | #ifdef __LITTLE_ENDIAN__ |
| | 69287 | #define vfmlslq_lane_low_f16(__p0_922, __p1_922, __p2_922, __p3_922) __extension__ ({ \ |
| | 69288 | float32x4_t __ret_922; \ |
| | 69289 | float32x4_t __s0_922 = __p0_922; \ |
| | 69290 | float16x8_t __s1_922 = __p1_922; \ |
| | 69291 | float16x4_t __s2_922 = __p2_922; \ |
| | 69292 | __ret_922 = vfmlslq_low_f16(__s0_922, __s1_922, (float16x8_t) {vget_lane_f16(__s2_922, __p3_922), vget_lane_f16(__s2_922, __p3_922), vget_lane_f16(__s2_922, __p3_922), vget_lane_f16(__s2_922, __p3_922), vget_lane_f16(__s2_922, __p3_922), vget_lane_f16(__s2_922, __p3_922), vget_lane_f16(__s2_922, __p3_922), vget_lane_f16(__s2_922, __p3_922)}); \ |
| | 69293 | __ret_922; \ |
| | 69294 | }) |
| | 69295 | #else |
| | 69296 | #define vfmlslq_lane_low_f16(__p0_923, __p1_923, __p2_923, __p3_923) __extension__ ({ \ |
| | 69297 | float32x4_t __ret_923; \ |
| | 69298 | float32x4_t __s0_923 = __p0_923; \ |
| | 69299 | float16x8_t __s1_923 = __p1_923; \ |
| | 69300 | float16x4_t __s2_923 = __p2_923; \ |
| | 69301 | float32x4_t __rev0_923; __rev0_923 = __builtin_shufflevector(__s0_923, __s0_923, 3, 2, 1, 0); \ |
| | 69302 | float16x8_t __rev1_923; __rev1_923 = __builtin_shufflevector(__s1_923, __s1_923, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69303 | float16x4_t __rev2_923; __rev2_923 = __builtin_shufflevector(__s2_923, __s2_923, 3, 2, 1, 0); \ |
| | 69304 | __ret_923 = __noswap_vfmlslq_low_f16(__rev0_923, __rev1_923, (float16x8_t) {__noswap_vget_lane_f16(__rev2_923, __p3_923), __noswap_vget_lane_f16(__rev2_923, __p3_923), __noswap_vget_lane_f16(__rev2_923, __p3_923), __noswap_vget_lane_f16(__rev2_923, __p3_923), __noswap_vget_lane_f16(__rev2_923, __p3_923), __noswap_vget_lane_f16(__rev2_923, __p3_923), __noswap_vget_lane_f16(__rev2_923, __p3_923), __noswap_vget_lane_f16(__rev2_923, __p3_923)}); \ |
| | 69305 | __ret_923 = __builtin_shufflevector(__ret_923, __ret_923, 3, 2, 1, 0); \ |
| | 69306 | __ret_923; \ |
| | 69307 | }) |
| | 69308 | #endif |
| | 69309 | |
| | 69310 | #ifdef __LITTLE_ENDIAN__ |
| | 69311 | #define vfmlsl_lane_low_f16(__p0_924, __p1_924, __p2_924, __p3_924) __extension__ ({ \ |
| | 69312 | float32x2_t __ret_924; \ |
| | 69313 | float32x2_t __s0_924 = __p0_924; \ |
| | 69314 | float16x4_t __s1_924 = __p1_924; \ |
| | 69315 | float16x4_t __s2_924 = __p2_924; \ |
| | 69316 | __ret_924 = vfmlsl_low_f16(__s0_924, __s1_924, (float16x4_t) {vget_lane_f16(__s2_924, __p3_924), vget_lane_f16(__s2_924, __p3_924), vget_lane_f16(__s2_924, __p3_924), vget_lane_f16(__s2_924, __p3_924)}); \ |
| | 69317 | __ret_924; \ |
| | 69318 | }) |
| | 69319 | #else |
| | 69320 | #define vfmlsl_lane_low_f16(__p0_925, __p1_925, __p2_925, __p3_925) __extension__ ({ \ |
| | 69321 | float32x2_t __ret_925; \ |
| | 69322 | float32x2_t __s0_925 = __p0_925; \ |
| | 69323 | float16x4_t __s1_925 = __p1_925; \ |
| | 69324 | float16x4_t __s2_925 = __p2_925; \ |
| | 69325 | float32x2_t __rev0_925; __rev0_925 = __builtin_shufflevector(__s0_925, __s0_925, 1, 0); \ |
| | 69326 | float16x4_t __rev1_925; __rev1_925 = __builtin_shufflevector(__s1_925, __s1_925, 3, 2, 1, 0); \ |
| | 69327 | float16x4_t __rev2_925; __rev2_925 = __builtin_shufflevector(__s2_925, __s2_925, 3, 2, 1, 0); \ |
| | 69328 | __ret_925 = __noswap_vfmlsl_low_f16(__rev0_925, __rev1_925, (float16x4_t) {__noswap_vget_lane_f16(__rev2_925, __p3_925), __noswap_vget_lane_f16(__rev2_925, __p3_925), __noswap_vget_lane_f16(__rev2_925, __p3_925), __noswap_vget_lane_f16(__rev2_925, __p3_925)}); \ |
| | 69329 | __ret_925 = __builtin_shufflevector(__ret_925, __ret_925, 1, 0); \ |
| | 69330 | __ret_925; \ |
| | 69331 | }) |
| | 69332 | #endif |
| | 69333 | |
| | 69334 | #ifdef __LITTLE_ENDIAN__ |
| | 69335 | #define vfmlslq_laneq_high_f16(__p0_926, __p1_926, __p2_926, __p3_926) __extension__ ({ \ |
| | 69336 | float32x4_t __ret_926; \ |
| | 69337 | float32x4_t __s0_926 = __p0_926; \ |
| | 69338 | float16x8_t __s1_926 = __p1_926; \ |
| | 69339 | float16x8_t __s2_926 = __p2_926; \ |
| | 69340 | __ret_926 = vfmlslq_high_f16(__s0_926, __s1_926, (float16x8_t) {vgetq_lane_f16(__s2_926, __p3_926), vgetq_lane_f16(__s2_926, __p3_926), vgetq_lane_f16(__s2_926, __p3_926), vgetq_lane_f16(__s2_926, __p3_926), vgetq_lane_f16(__s2_926, __p3_926), vgetq_lane_f16(__s2_926, __p3_926), vgetq_lane_f16(__s2_926, __p3_926), vgetq_lane_f16(__s2_926, __p3_926)}); \ |
| | 69341 | __ret_926; \ |
| | 69342 | }) |
| | 69343 | #else |
| | 69344 | #define vfmlslq_laneq_high_f16(__p0_927, __p1_927, __p2_927, __p3_927) __extension__ ({ \ |
| | 69345 | float32x4_t __ret_927; \ |
| | 69346 | float32x4_t __s0_927 = __p0_927; \ |
| | 69347 | float16x8_t __s1_927 = __p1_927; \ |
| | 69348 | float16x8_t __s2_927 = __p2_927; \ |
| | 69349 | float32x4_t __rev0_927; __rev0_927 = __builtin_shufflevector(__s0_927, __s0_927, 3, 2, 1, 0); \ |
| | 69350 | float16x8_t __rev1_927; __rev1_927 = __builtin_shufflevector(__s1_927, __s1_927, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69351 | float16x8_t __rev2_927; __rev2_927 = __builtin_shufflevector(__s2_927, __s2_927, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69352 | __ret_927 = __noswap_vfmlslq_high_f16(__rev0_927, __rev1_927, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_927, __p3_927), __noswap_vgetq_lane_f16(__rev2_927, __p3_927), __noswap_vgetq_lane_f16(__rev2_927, __p3_927), __noswap_vgetq_lane_f16(__rev2_927, __p3_927), __noswap_vgetq_lane_f16(__rev2_927, __p3_927), __noswap_vgetq_lane_f16(__rev2_927, __p3_927), __noswap_vgetq_lane_f16(__rev2_927, __p3_927), __noswap_vgetq_lane_f16(__rev2_927, __p3_927)}); \ |
| | 69353 | __ret_927 = __builtin_shufflevector(__ret_927, __ret_927, 3, 2, 1, 0); \ |
| | 69354 | __ret_927; \ |
| | 69355 | }) |
| | 69356 | #endif |
| | 69357 | |
| | 69358 | #ifdef __LITTLE_ENDIAN__ |
| | 69359 | #define vfmlsl_laneq_high_f16(__p0_928, __p1_928, __p2_928, __p3_928) __extension__ ({ \ |
| | 69360 | float32x2_t __ret_928; \ |
| | 69361 | float32x2_t __s0_928 = __p0_928; \ |
| | 69362 | float16x4_t __s1_928 = __p1_928; \ |
| | 69363 | float16x8_t __s2_928 = __p2_928; \ |
| | 69364 | __ret_928 = vfmlsl_high_f16(__s0_928, __s1_928, (float16x4_t) {vgetq_lane_f16(__s2_928, __p3_928), vgetq_lane_f16(__s2_928, __p3_928), vgetq_lane_f16(__s2_928, __p3_928), vgetq_lane_f16(__s2_928, __p3_928)}); \ |
| | 69365 | __ret_928; \ |
| | 69366 | }) |
| | 69367 | #else |
| | 69368 | #define vfmlsl_laneq_high_f16(__p0_929, __p1_929, __p2_929, __p3_929) __extension__ ({ \ |
| | 69369 | float32x2_t __ret_929; \ |
| | 69370 | float32x2_t __s0_929 = __p0_929; \ |
| | 69371 | float16x4_t __s1_929 = __p1_929; \ |
| | 69372 | float16x8_t __s2_929 = __p2_929; \ |
| | 69373 | float32x2_t __rev0_929; __rev0_929 = __builtin_shufflevector(__s0_929, __s0_929, 1, 0); \ |
| | 69374 | float16x4_t __rev1_929; __rev1_929 = __builtin_shufflevector(__s1_929, __s1_929, 3, 2, 1, 0); \ |
| | 69375 | float16x8_t __rev2_929; __rev2_929 = __builtin_shufflevector(__s2_929, __s2_929, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69376 | __ret_929 = __noswap_vfmlsl_high_f16(__rev0_929, __rev1_929, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_929, __p3_929), __noswap_vgetq_lane_f16(__rev2_929, __p3_929), __noswap_vgetq_lane_f16(__rev2_929, __p3_929), __noswap_vgetq_lane_f16(__rev2_929, __p3_929)}); \ |
| | 69377 | __ret_929 = __builtin_shufflevector(__ret_929, __ret_929, 1, 0); \ |
| | 69378 | __ret_929; \ |
| | 69379 | }) |
| | 69380 | #endif |
| | 69381 | |
| | 69382 | #ifdef __LITTLE_ENDIAN__ |
| | 69383 | #define vfmlslq_laneq_low_f16(__p0_930, __p1_930, __p2_930, __p3_930) __extension__ ({ \ |
| | 69384 | float32x4_t __ret_930; \ |
| | 69385 | float32x4_t __s0_930 = __p0_930; \ |
| | 69386 | float16x8_t __s1_930 = __p1_930; \ |
| | 69387 | float16x8_t __s2_930 = __p2_930; \ |
| | 69388 | __ret_930 = vfmlslq_low_f16(__s0_930, __s1_930, (float16x8_t) {vgetq_lane_f16(__s2_930, __p3_930), vgetq_lane_f16(__s2_930, __p3_930), vgetq_lane_f16(__s2_930, __p3_930), vgetq_lane_f16(__s2_930, __p3_930), vgetq_lane_f16(__s2_930, __p3_930), vgetq_lane_f16(__s2_930, __p3_930), vgetq_lane_f16(__s2_930, __p3_930), vgetq_lane_f16(__s2_930, __p3_930)}); \ |
| | 69389 | __ret_930; \ |
| | 69390 | }) |
| | 69391 | #else |
| | 69392 | #define vfmlslq_laneq_low_f16(__p0_931, __p1_931, __p2_931, __p3_931) __extension__ ({ \ |
| | 69393 | float32x4_t __ret_931; \ |
| | 69394 | float32x4_t __s0_931 = __p0_931; \ |
| | 69395 | float16x8_t __s1_931 = __p1_931; \ |
| | 69396 | float16x8_t __s2_931 = __p2_931; \ |
| | 69397 | float32x4_t __rev0_931; __rev0_931 = __builtin_shufflevector(__s0_931, __s0_931, 3, 2, 1, 0); \ |
| | 69398 | float16x8_t __rev1_931; __rev1_931 = __builtin_shufflevector(__s1_931, __s1_931, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69399 | float16x8_t __rev2_931; __rev2_931 = __builtin_shufflevector(__s2_931, __s2_931, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69400 | __ret_931 = __noswap_vfmlslq_low_f16(__rev0_931, __rev1_931, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_931, __p3_931), __noswap_vgetq_lane_f16(__rev2_931, __p3_931), __noswap_vgetq_lane_f16(__rev2_931, __p3_931), __noswap_vgetq_lane_f16(__rev2_931, __p3_931), __noswap_vgetq_lane_f16(__rev2_931, __p3_931), __noswap_vgetq_lane_f16(__rev2_931, __p3_931), __noswap_vgetq_lane_f16(__rev2_931, __p3_931), __noswap_vgetq_lane_f16(__rev2_931, __p3_931)}); \ |
| | 69401 | __ret_931 = __builtin_shufflevector(__ret_931, __ret_931, 3, 2, 1, 0); \ |
| | 69402 | __ret_931; \ |
| | 69403 | }) |
| | 69404 | #endif |
| | 69405 | |
| | 69406 | #ifdef __LITTLE_ENDIAN__ |
| | 69407 | #define vfmlsl_laneq_low_f16(__p0_932, __p1_932, __p2_932, __p3_932) __extension__ ({ \ |
| | 69408 | float32x2_t __ret_932; \ |
| | 69409 | float32x2_t __s0_932 = __p0_932; \ |
| | 69410 | float16x4_t __s1_932 = __p1_932; \ |
| | 69411 | float16x8_t __s2_932 = __p2_932; \ |
| | 69412 | __ret_932 = vfmlsl_low_f16(__s0_932, __s1_932, (float16x4_t) {vgetq_lane_f16(__s2_932, __p3_932), vgetq_lane_f16(__s2_932, __p3_932), vgetq_lane_f16(__s2_932, __p3_932), vgetq_lane_f16(__s2_932, __p3_932)}); \ |
| | 69413 | __ret_932; \ |
| | 69414 | }) |
| | 69415 | #else |
| | 69416 | #define vfmlsl_laneq_low_f16(__p0_933, __p1_933, __p2_933, __p3_933) __extension__ ({ \ |
| | 69417 | float32x2_t __ret_933; \ |
| | 69418 | float32x2_t __s0_933 = __p0_933; \ |
| | 69419 | float16x4_t __s1_933 = __p1_933; \ |
| | 69420 | float16x8_t __s2_933 = __p2_933; \ |
| | 69421 | float32x2_t __rev0_933; __rev0_933 = __builtin_shufflevector(__s0_933, __s0_933, 1, 0); \ |
| | 69422 | float16x4_t __rev1_933; __rev1_933 = __builtin_shufflevector(__s1_933, __s1_933, 3, 2, 1, 0); \ |
| | 69423 | float16x8_t __rev2_933; __rev2_933 = __builtin_shufflevector(__s2_933, __s2_933, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69424 | __ret_933 = __noswap_vfmlsl_low_f16(__rev0_933, __rev1_933, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_933, __p3_933), __noswap_vgetq_lane_f16(__rev2_933, __p3_933), __noswap_vgetq_lane_f16(__rev2_933, __p3_933), __noswap_vgetq_lane_f16(__rev2_933, __p3_933)}); \ |
| | 69425 | __ret_933 = __builtin_shufflevector(__ret_933, __ret_933, 1, 0); \ |
| | 69426 | __ret_933; \ |
| | 69427 | }) |
| | 69428 | #endif |
| | 69429 | |
| | 69430 | #ifdef __LITTLE_ENDIAN__ |
| | 69431 | #define vmulh_lane_f16(__p0_934, __p1_934, __p2_934) __extension__ ({ \ |
| | 69432 | float16_t __ret_934; \ |
| | 69433 | float16_t __s0_934 = __p0_934; \ |
| | 69434 | float16x4_t __s1_934 = __p1_934; \ |
| | 69435 | __ret_934 = __s0_934 * vget_lane_f16(__s1_934, __p2_934); \ |
| | 69436 | __ret_934; \ |
| | 69437 | }) |
| | 69438 | #else |
| | 69439 | #define vmulh_lane_f16(__p0_935, __p1_935, __p2_935) __extension__ ({ \ |
| | 69440 | float16_t __ret_935; \ |
| | 69441 | float16_t __s0_935 = __p0_935; \ |
| | 69442 | float16x4_t __s1_935 = __p1_935; \ |
| | 69443 | float16x4_t __rev1_935; __rev1_935 = __builtin_shufflevector(__s1_935, __s1_935, 3, 2, 1, 0); \ |
| | 69444 | __ret_935 = __s0_935 * __noswap_vget_lane_f16(__rev1_935, __p2_935); \ |
| | 69445 | __ret_935; \ |
| | 69446 | }) |
| | 69447 | #endif |
| | 69448 | |
| | 69449 | #ifdef __LITTLE_ENDIAN__ |
| | 69450 | #define vmulh_laneq_f16(__p0_936, __p1_936, __p2_936) __extension__ ({ \ |
| | 69451 | float16_t __ret_936; \ |
| | 69452 | float16_t __s0_936 = __p0_936; \ |
| | 69453 | float16x8_t __s1_936 = __p1_936; \ |
| | 69454 | __ret_936 = __s0_936 * vgetq_lane_f16(__s1_936, __p2_936); \ |
| | 69455 | __ret_936; \ |
| | 69456 | }) |
| | 69457 | #else |
| | 69458 | #define vmulh_laneq_f16(__p0_937, __p1_937, __p2_937) __extension__ ({ \ |
| | 69459 | float16_t __ret_937; \ |
| | 69460 | float16_t __s0_937 = __p0_937; \ |
| | 69461 | float16x8_t __s1_937 = __p1_937; \ |
| | 69462 | float16x8_t __rev1_937; __rev1_937 = __builtin_shufflevector(__s1_937, __s1_937, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 69463 | __ret_937 = __s0_937 * __noswap_vgetq_lane_f16(__rev1_937, __p2_937); \ |
| | 69464 | __ret_937; \ |
| 69635 | }) | 69465 | }) |
| 69636 | #endif | 69466 | #endif |
| 69637 | | 69467 | |