| ... | ... | @@ -30,7 +30,7 @@ const largest_atomic_size = switch (arch) { |
| 30 | 30 | // On SPARC systems that lacks CAS and/or swap instructions, the only |
| 31 | 31 | // available atomic operation is a test-and-set (`ldstub`), so we force |
| 32 | 32 | // every atomic memory access to go through the lock. |
| 33 | | .sparc => if (cpu.features.featureSetHas(.hasleoncasa)) @sizeOf(usize) else 0, |
| 33 | .sparc => if (std.Target.sparc.featureSetHas(builtin.cpu.features, .hasleoncasa)) @sizeOf(usize) else 0, |
| 34 | 34 | |
| 35 | 35 | // XXX: On x86/x86_64 we could check the presence of cmpxchg8b/cmpxchg16b |
| 36 | 36 | // and set this parameter accordingly. |