Commit 885d96735de0fb771403c06d258cac316b792de3 | zig

author	Jakub Konka <kubkon@jakubkonka.com> 2022-01-01 17:02:31+01:00
committer	GitHub <noreply@github.com> 2022-01-01 17:02:31+01:00
log	885d96735de0fb771403c06d258cac316b792de3
tree	e2dcea50fff56f8a2e3840a9e4c4914d071d01af
parent	557268a4480d88411dd6f0278afb767320ca66f8
parent	a722e1fc0bcbae55c6a143ece9f20db8a3212818
signature	Signed by PGP key 4AEE18F83AFDEB23

Merge pull request #10480 from joachimschmidt557/stage2-arm

stage2 ARM: zig test working

3 files changed, 162 insertions(+), 53 deletions(-)

src
- arch
  - arm
    CodeGen.zig
- codegen.zig
test
- stage2
  - arm.zig

src/arch/arm/CodeGen.zig+77-53

 @@ -1099,15 +1099,22 @@ fn airOptionalPayloadPtrSet(self: *Self, inst: Air.Inst.Index) !void {
 fn airUnwrapErrErr(self: *Self, inst: Air.Inst.Index) !void {
     const ty_op = self.air.instructions.items(.data)[inst].ty_op;
-    const result: MCValue = if (self.liveness.isUnused(inst)) .dead else return self.fail("TODO implement unwrap error union error for {}", .{self.target.cpu.arch});
+    const result: MCValue = if (self.liveness.isUnused(inst)) .dead else result: {
+        const error_union_ty = self.air.typeOf(ty_op.operand);
+        const payload_ty = error_union_ty.errorUnionPayload();
+        const mcv = try self.resolveInst(ty_op.operand);
+        if (!payload_ty.hasCodeGenBits()) break :result mcv;
+        return self.fail("TODO implement unwrap error union error for non-empty payloads", .{});
+    };
     return self.finishAir(inst, result, .{ ty_op.operand, .none, .none });
 }
 fn airUnwrapErrPayload(self: *Self, inst: Air.Inst.Index) !void {
     const ty_op = self.air.instructions.items(.data)[inst].ty_op;
     const result: MCValue = if (self.liveness.isUnused(inst)) .dead else result: {
-        const err_ty = self.air.typeOf(ty_op.operand);
+        const error_union_ty = self.air.typeOf(ty_op.operand);
-        const payload_ty = err_ty.errorUnionPayload();
+        const payload_ty = error_union_ty.errorUnionPayload();
         if (!payload_ty.hasCodeGenBits()) break :result MCValue.none;
         return self.fail("TODO implement unwrap error union payload for non-empty payloads", .{});
 @@ -2238,10 +2245,16 @@ fn airFence(self: *Self) !void {
 fn airCall(self: *Self, inst: Air.Inst.Index) !void {
     const pl_op = self.air.instructions.items(.data)[inst].pl_op;
-    const fn_ty = self.air.typeOf(pl_op.operand);
     const callee = pl_op.operand;
     const extra = self.air.extraData(Air.Call, pl_op.payload);
     const args = @bitCast([]const Air.Inst.Ref, self.air.extra[extra.end..][0..extra.data.args_len]);
+    const ty = self.air.typeOf(callee);
+    const fn_ty = switch (ty.zigTypeTag()) {
+        .Fn => ty,
+        .Pointer => ty.childType(),
+        else => unreachable,
+    };
     var info = try self.resolveCallingConventionValues(fn_ty);
     defer info.deinit(self);
 @@ -2310,39 +2323,42 @@ fn airCall(self: *Self, inst: Air.Inst.Index) !void {
                     unreachable;
                 try self.genSetReg(Type.initTag(.usize), .lr, .{ .memory = got_addr });
-                // TODO: add Instruction.supportedOn
-                // function for ARM
-                if (Target.arm.featureSetHas(self.target.cpu.features, .has_v5t)) {
-                    _ = try self.addInst(.{
-                        .tag = .blx,
-                        .cond = .al,
-                        .data = .{ .reg = .lr },
-                    });
-                } else {
-                    return self.fail("TODO fix blx emulatio for ARM <v5", .{});
-                    // _ = try self.addInst(.{
-                    //     .tag = .mov,
-                    //     .cond = .al,
-                    //     .data = .{ .rr_op = .{
-                    //         .rd = .lr,
-                    //         .rn = .r0,
-                    //         .op = Instruction.Operand.reg(.pc, Instruction.Operand.Shift.none),
-                    //     } },
-                    // });
-                    // _ = try self.addInst(.{
-                    //     .tag = .bx,
-                    //     .cond = .al,
-                    //     .data = .{ .reg = .lr },
-                    // });
-                }
             } else if (func_value.castTag(.extern_fn)) |_| {
                 return self.fail("TODO implement calling extern functions", .{});
             } else {
                 return self.fail("TODO implement calling bitcasted functions", .{});
             }
         } else {
-            return self.fail("TODO implement calling runtime known function pointer", .{});
+            assert(ty.zigTypeTag() == .Pointer);
+            const mcv = try self.resolveInst(callee);
+            try self.genSetReg(Type.initTag(.usize), .lr, mcv);
+        }
+        // TODO: add Instruction.supportedOn
+        // function for ARM
+        if (Target.arm.featureSetHas(self.target.cpu.features, .has_v5t)) {
+            _ = try self.addInst(.{
+                .tag = .blx,
+                .cond = .al,
+                .data = .{ .reg = .lr },
+            });
+        } else {
+            return self.fail("TODO fix blx emulation for ARM <v5", .{});
+            // _ = try self.addInst(.{
+            //     .tag = .mov,
+            //     .cond = .al,
+            //     .data = .{ .rr_op = .{
+            //         .rd = .lr,
+            //         .rn = .r0,
+            //         .op = Instruction.Operand.reg(.pc, Instruction.Operand.Shift.none),
+            //     } },
+            // });
+            // _ = try self.addInst(.{
+            //     .tag = .bx,
+            //     .cond = .al,
+            //     .data = .{ .reg = .lr },
+            // });
         }
     } else if (self.bin_file.cast(link.File.MachO)) |_| {
         unreachable; // unsupported architecture for MachO
 @@ -2402,19 +2418,26 @@ fn airRetLoad(self: *Self, inst: Air.Inst.Index) !void {
 fn airCmp(self: *Self, inst: Air.Inst.Index, op: math.CompareOperator) !void {
     const bin_op = self.air.instructions.items(.data)[inst].bin_op;
-    if (self.liveness.isUnused(inst))
+    const result: MCValue = if (self.liveness.isUnused(inst)) .dead else result: {
-        return self.finishAir(inst, .dead, .{ bin_op.lhs, bin_op.rhs, .none });
+        const lhs = try self.resolveInst(bin_op.lhs);
-    const ty = self.air.typeOf(bin_op.lhs);
+        const rhs = try self.resolveInst(bin_op.rhs);
-    assert(ty.eql(self.air.typeOf(bin_op.rhs)));
+        const lhs_ty = self.air.typeOf(bin_op.lhs);
-    if (ty.zigTypeTag() == .ErrorSet)
-        return self.fail("TODO implement cmp for errors", .{});
-    try self.spillCompareFlagsIfOccupied();
+        if (lhs_ty.abiSize(self.target.*) > 4) {
-    self.compare_flags_inst = inst;
+            return self.fail("TODO cmp for types with size > 4", .{});
+        }
+        const signedness: std.builtin.Signedness = blk: {
+            // by default we tell the operand type is unsigned (i.e. bools and enum values)
+            if (lhs_ty.zigTypeTag() != .Int) break :blk .unsigned;
+            // incase of an actual integer, we emit the correct signedness
+            break :blk lhs_ty.intInfo(self.target.*).signedness;
+        };
+        try self.spillCompareFlagsIfOccupied();
+        self.compare_flags_inst = inst;
-    const lhs = try self.resolveInst(bin_op.lhs);
-    const rhs = try self.resolveInst(bin_op.rhs);
-    const result: MCValue = result: {
         const lhs_is_register = lhs == .register;
         const rhs_is_register = rhs == .register;
         // lhs should always be a register
 @@ -2448,11 +2471,11 @@ fn airCmp(self: *Self, inst: Air.Inst.Index, op: math.CompareOperator) !void {
         // Move the operands to the newly allocated registers
         const branch = &self.branch_stack.items[self.branch_stack.items.len - 1];
         if (lhs_mcv == .register and !lhs_is_register) {
-            try self.genSetReg(ty, lhs_mcv.register, lhs);
+            try self.genSetReg(lhs_ty, lhs_mcv.register, lhs);
             branch.inst_table.putAssumeCapacity(Air.refToIndex(bin_op.lhs).?, lhs);
         }
         if (rhs_mcv == .register and !rhs_is_register) {
-            try self.genSetReg(ty, rhs_mcv.register, rhs);
+            try self.genSetReg(lhs_ty, rhs_mcv.register, rhs);
             branch.inst_table.putAssumeCapacity(Air.refToIndex(bin_op.rhs).?, rhs);
         }
 @@ -2460,9 +2483,9 @@ fn airCmp(self: *Self, inst: Air.Inst.Index, op: math.CompareOperator) !void {
         // The signedness of the integer does not matter for the cmp instruction
         try self.genArmBinOpCode(undefined, lhs_mcv, rhs_mcv, false, .cmp_eq, undefined);
-        break :result switch (ty.isSignedInt()) {
+        break :result switch (signedness) {
-            true => MCValue{ .compare_flags_signed = op },
+            .signed => MCValue{ .compare_flags_signed = op },
-            false => MCValue{ .compare_flags_unsigned = op },
+            .unsigned => MCValue{ .compare_flags_unsigned = op },
         };
     };
     return self.finishAir(inst, result, .{ bin_op.lhs, bin_op.rhs, .none });
 @@ -3157,17 +3180,18 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
                 // TODO optimize the register allocation
                 const regs = try self.register_manager.allocRegs(5, .{ null, null, null, null, null }, &.{});
                 const src_reg = regs[0];
-                const dst_reg = regs[2];
+                const dst_reg = regs[1];
                 const len_reg = regs[2];
                 const count_reg = regs[3];
                 const tmp_reg = regs[4];
-                // add src_reg, fp, #off
+                // sub src_reg, fp, #off
-                const src_offset_op: Instruction.Operand = if (Instruction.Operand.fromU32(off)) |x| x else {
+                const adj_src_offset = off + @intCast(u32, ty.abiSize(self.target.*));
+                const src_offset_op: Instruction.Operand = if (Instruction.Operand.fromU32(adj_src_offset)) |x| x else {
                     return self.fail("TODO load: set reg to stack offset with all possible offsets", .{});
                 };
                 _ = try self.addInst(.{
-                    .tag = .add,
+                    .tag = .sub,
                     .cond = .al,
                     .data = .{ .rr_op = .{
                         .rd = src_reg,
 @@ -3177,8 +3201,8 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
                 });
                 // sub dst_reg, fp, #stack_offset
-                const adj_stack_offset = stack_offset + @intCast(u32, ty.abiSize(self.target.*));
+                const adj_dst_offset = stack_offset + @intCast(u32, ty.abiSize(self.target.*));
-                const dst_offset_op: Instruction.Operand = if (Instruction.Operand.fromU32(adj_stack_offset)) |x| x else {
+                const dst_offset_op: Instruction.Operand = if (Instruction.Operand.fromU32(adj_dst_offset)) |x| x else {
                     return self.fail("TODO load: set reg to stack offset with all possible offsets", .{});
                 };
                 _ = try self.addInst(.{

src/codegen.zig+8

...	@@ -400,6 +400,14 @@ pub fn generateSymbol(	...	@@ -400,6 +400,14 @@ pub fn generateSymbol(
400		400
401	return Result{ .appended = {} };	401	return Result{ .appended = {} };
402	},	402	},
		403	.Optional => {
		404	// TODO generateSymbol for optionals
		405	const target = bin_file.options.target;
		406	const abi_size = try math.cast(usize, typed_value.ty.abiSize(target));
		407	try code.writer().writeByteNTimes(0xaa, abi_size);
		408
		409	return Result{ .appended = {} };
		410	},
403	else => \|t\| {	411	else => \|t\| {
404	return Result{	412	return Result{
405	.fail = try ErrorMsg.create(	413	.fail = try ErrorMsg.create(

test/stage2/arm.zig+77

...	@@ -636,6 +636,35 @@ pub fn addCases(ctx: *TestContext) !void {	...	@@ -636,6 +636,35 @@ pub fn addCases(ctx: *TestContext) !void {
636	,	636	,
637	"Hello, World!\n",	637	"Hello, World!\n",
638	);	638	);
		639
		640	case.addCompareOutput(
		641	\\pub fn main() void {
		642	\\ foo() catch \|err\| {
		643	\\ assert(err == error.Foo);
		644	\\ assert(err != error.Bar);
		645	\\ assert(err != error.Baz);
		646	\\ };
		647	\\ bar() catch \|err\| {
		648	\\ assert(err != error.Foo);
		649	\\ assert(err == error.Bar);
		650	\\ assert(err != error.Baz);
		651	\\ };
		652	\\}
		653	\\
		654	\\fn assert(ok: bool) void {
		655	\\ if (!ok) unreachable;
		656	\\}
		657	\\
		658	\\fn foo() anyerror!void {
		659	\\ return error.Foo;
		660	\\}
		661	\\
		662	\\fn bar() anyerror!void {
		663	\\ return error.Bar;
		664	\\}
		665	,
		666	"",
		667	);
639	}	668	}
640		669
641	{	670	{
...	@@ -704,4 +733,52 @@ pub fn addCases(ctx: *TestContext) !void {	...	@@ -704,4 +733,52 @@ pub fn addCases(ctx: *TestContext) !void {
704	"",	733	"",
705	);	734	);
706	}	735	}
		736
		737	{
		738	var case = ctx.exe("function pointers", linux_arm);
		739	case.addCompareOutput(
		740	\\const PrintFn = fn () void;
		741	\\
		742	\\pub fn main() void {
		743	\\ var printFn: PrintFn = stopSayingThat;
		744	\\ var i: u32 = 0;
		745	\\ while (i < 4) : (i += 1) printFn();
		746	\\
		747	\\ printFn = moveEveryZig;
		748	\\ printFn();
		749	\\}
		750	\\
		751	\\fn stopSayingThat() void {
		752	\\ asm volatile ("svc #0"
		753	\\ :
		754	\\ : [number] "{r7}" (4),
		755	\\ [arg1] "{r0}" (1),
		756	\\ [arg2] "{r1}" (@ptrToInt("Hello, my name is Inigo Montoya; you killed my father, prepare to die.\n")),
		757	\\ [arg3] "{r2}" ("Hello, my name is Inigo Montoya; you killed my father, prepare to die.\n".len),
		758	\\ : "memory"
		759	\\ );
		760	\\ return;
		761	\\}
		762	\\
		763	\\fn moveEveryZig() void {
		764	\\ asm volatile ("svc #0"
		765	\\ :
		766	\\ : [number] "{r7}" (4),
		767	\\ [arg1] "{r0}" (1),
		768	\\ [arg2] "{r1}" (@ptrToInt("All your codebase are belong to us\n")),
		769	\\ [arg3] "{r2}" ("All your codebase are belong to us\n".len),
		770	\\ : "memory"
		771	\\ );
		772	\\ return;
		773	\\}
		774	,
		775	\\Hello, my name is Inigo Montoya; you killed my father, prepare to die.
		776	\\Hello, my name is Inigo Montoya; you killed my father, prepare to die.
		777	\\Hello, my name is Inigo Montoya; you killed my father, prepare to die.
		778	\\Hello, my name is Inigo Montoya; you killed my father, prepare to die.
		779	\\All your codebase are belong to us
		780	\\
		781	,
		782	);
		783	}
707	}	784	}