authorgravatar for jacobly@ziglang.orgJacob Young <jacobly@ziglang.org> 2023-07-18 03:08:15-04:00
committergravatar for jacobly@ziglang.orgJacob Young <jacobly@ziglang.org> 2023-07-19 23:38:40-04:00
log9dd7a9eb0265f8be0fbfa4ea65b2b52f8bf29b0f
tree326d0b94db0c2e5a6fb0017181294ac923702fca
parent9c4d5e64b45001cd82c0db53d1a489f433024223

llvm: fix various crashes

3 files changed, 262 insertions(+), 87 deletions(-)

lib/std/target.zig+27-2
......@@ -1910,12 +1910,37 @@ pub const Target = struct {
19101910
19111911 pub fn stackAlignment(target: Target) u16 {
19121912 return switch (target.cpu.arch) {
1913 .amdgcn => 4,
19131914 .x86 => switch (target.os.tag) {
19141915 .windows => 4,
19151916 else => 16,
19161917 },
1917 .arm, .armeb, .mips, .mipsel => 8,
1918 .aarch64, .aarch64_be, .powerpc64, .powerpc64le, .riscv64, .x86_64, .wasm32, .wasm64 => 16,
1918 .arm,
1919 .armeb,
1920 .thumb,
1921 .thumbeb,
1922 .mips,
1923 .mipsel,
1924 .sparc,
1925 .sparcel,
1926 => 8,
1927 .aarch64,
1928 .aarch64_be,
1929 .aarch64_32,
1930 .bpfeb,
1931 .bpfel,
1932 .mips64,
1933 .mips64el,
1934 .powerpc64,
1935 .powerpc64le,
1936 .riscv32,
1937 .riscv64,
1938 .sparc64,
1939 .x86_64,
1940 .ve,
1941 .wasm32,
1942 .wasm64,
1943 => 16,
19191944 else => @divExact(target.ptrBitWidth(), 8),
19201945 };
19211946 }
src/codegen/llvm.zig+227-73
......@@ -341,34 +341,40 @@ const DataLayoutBuilder = struct {
341341 writer: anytype,
342342 ) @TypeOf(writer).Error!void {
343343 const is_aarch64_windows = self.target.cpu.arch == .aarch64 and self.target.os.tag == .windows;
344 try writer.print("{c}-m:{c}", .{
345 @as(u8, switch (self.target.cpu.arch.endian()) {
346 .Little => 'e',
347 .Big => 'E',
348 }),
349 @as(u8, if (self.target.cpu.arch.isMIPS())
350 'm' // Mips mangling: Private symbols get a $ prefix.
351 else switch (self.target.ofmt) {
352 .elf => 'e', // ELF mangling: Private symbols get a `.L` prefix.
353 //.goff => 'l', // GOFF mangling: Private symbols get a `@` prefix.
354 .macho => 'o', // Mach-O mangling: Private symbols get `L` prefix.
355 // Other symbols get a `_` prefix.
356 .coff => switch (self.target.os.tag) {
357 .windows => switch (self.target.cpu.arch) {
358 .x86 => 'x', // Windows x86 COFF mangling: Private symbols get the usual prefix.
359 // Regular C symbols get a `_` prefix. Functions with `__stdcall`, `__fastcall`,
360 // and `__vectorcall` have custom mangling that appends `@N` where N is the
361 // number of bytes used to pass parameters. C++ symbols starting with `?` are
362 // not mangled in any way.
363 else => 'w', // Windows COFF mangling: Similar to x, except that normal C
364 // symbols do not receive a `_` prefix.
344 try writer.writeByte(switch (self.target.cpu.arch.endian()) {
345 .Little => 'e',
346 .Big => 'E',
347 });
348 switch (self.target.cpu.arch) {
349 .amdgcn,
350 .nvptx,
351 .nvptx64,
352 => {},
353 .avr => try writer.writeAll("-P1"),
354 else => try writer.print("-m:{c}", .{@as(u8, switch (self.target.cpu.arch) {
355 .mips, .mipsel => 'm', // Mips mangling: Private symbols get a $ prefix.
356 else => switch (self.target.ofmt) {
357 .elf => 'e', // ELF mangling: Private symbols get a `.L` prefix.
358 //.goff => 'l', // GOFF mangling: Private symbols get a `@` prefix.
359 .macho => 'o', // Mach-O mangling: Private symbols get `L` prefix.
360 // Other symbols get a `_` prefix.
361 .coff => switch (self.target.os.tag) {
362 .windows => switch (self.target.cpu.arch) {
363 .x86 => 'x', // Windows x86 COFF mangling: Private symbols get the usual
364 // prefix. Regular C symbols get a `_` prefix. Functions with `__stdcall`,
365 //`__fastcall`, and `__vectorcall` have custom mangling that appends `@N`
366 // where N is the number of bytes used to pass parameters. C++ symbols
367 // starting with `?` are not mangled in any way.
368 else => 'w', // Windows COFF mangling: Similar to x, except that normal C
369 // symbols do not receive a `_` prefix.
370 },
371 else => 'e',
365372 },
373 //.xcoff => 'a', // XCOFF mangling: Private symbols get a `L..` prefix.
366374 else => 'e',
367375 },
368 //.xcoff => 'a', // XCOFF mangling: Private symbols get a `L..` prefix.
369 else => 'e',
370 }),
371 });
376 })}),
377 }
372378 var any_non_integral = false;
373379 const ptr_bit_width = self.target.ptrBitWidth();
374380 var default_info = struct { size: u16, abi: u16, pref: u16, idx: u16 }{
......@@ -399,66 +405,134 @@ const DataLayoutBuilder = struct {
399405 .pref = pref,
400406 .idx = idx,
401407 };
408 if (self.target.cpu.arch == .aarch64_32) continue;
402409 if (!info.force_in_data_layout and matches_default and
403 self.target.cpu.arch != .riscv64 and !is_aarch64_windows) continue;
410 self.target.cpu.arch != .riscv64 and !is_aarch64_windows and
411 self.target.cpu.arch != .bpfeb and self.target.cpu.arch != .bpfel) continue;
404412 try writer.writeAll("-p");
405413 if (info.llvm != .default) try writer.print("{d}", .{@intFromEnum(info.llvm)});
406414 try writer.print(":{d}:{d}", .{ size, abi });
407 if (pref != abi or idx != size) {
415 if (pref != abi or idx != size or self.target.cpu.arch == .hexagon) {
408416 try writer.print(":{d}", .{pref});
409417 if (idx != size) try writer.print(":{d}", .{idx});
410418 }
411419 }
412420 if (self.target.cpu.arch.isARM() or self.target.cpu.arch.isThumb())
413421 try writer.writeAll("-Fi8"); // for thumb interwork
414 try self.typeAlignment(.integer, 8, 8, 8, false, writer);
415 try self.typeAlignment(.integer, 16, 16, 16, false, writer);
416 try self.typeAlignment(.integer, 32, if (is_aarch64_windows) 0 else 32, 32, false, writer);
417 try self.typeAlignment(.integer, 64, 32, 64, false, writer);
418 try self.typeAlignment(.integer, 128, 32, 64, false, writer);
419 if (backendSupportsF16(self.target)) try self.typeAlignment(.float, 16, 16, 16, false, writer);
420 try self.typeAlignment(.float, 32, 32, 32, false, writer);
421 try self.typeAlignment(.float, 64, 64, 64, false, writer);
422 if (backendSupportsF80(self.target)) try self.typeAlignment(.float, 80, 0, 0, false, writer);
423 try self.typeAlignment(.float, 128, 128, 128, false, writer);
424 try self.typeAlignment(.vector, 64, 64, 64, false, writer);
425 try self.typeAlignment(.vector, 128, 128, 128, false, writer);
426 if (self.target.os.tag != .windows) try self.typeAlignment(.aggregate, 0, 0, 64, false, writer);
422 if (self.target.cpu.arch != .hexagon) {
423 if (self.target.cpu.arch == .s390x) try self.typeAlignment(.integer, 1, 8, 8, false, writer);
424 try self.typeAlignment(.integer, 8, 8, 8, false, writer);
425 try self.typeAlignment(.integer, 16, 16, 16, false, writer);
426 try self.typeAlignment(.integer, 32, if (is_aarch64_windows) 0 else 32, 32, false, writer);
427 try self.typeAlignment(.integer, 64, 32, 64, false, writer);
428 try self.typeAlignment(.integer, 128, 32, 64, false, writer);
429 if (backendSupportsF16(self.target)) try self.typeAlignment(.float, 16, 16, 16, false, writer);
430 try self.typeAlignment(.float, 32, 32, 32, false, writer);
431 try self.typeAlignment(.float, 64, 64, 64, false, writer);
432 if (backendSupportsF80(self.target)) try self.typeAlignment(.float, 80, 0, 0, false, writer);
433 try self.typeAlignment(.float, 128, 128, 128, false, writer);
434 }
435 switch (self.target.cpu.arch) {
436 .amdgcn => {
437 try self.typeAlignment(.vector, 16, 16, 16, false, writer);
438 try self.typeAlignment(.vector, 24, 32, 32, false, writer);
439 try self.typeAlignment(.vector, 32, 32, 32, false, writer);
440 try self.typeAlignment(.vector, 48, 64, 64, false, writer);
441 try self.typeAlignment(.vector, 96, 128, 128, false, writer);
442 try self.typeAlignment(.vector, 192, 256, 256, false, writer);
443 try self.typeAlignment(.vector, 256, 256, 256, false, writer);
444 try self.typeAlignment(.vector, 512, 512, 512, false, writer);
445 try self.typeAlignment(.vector, 1024, 1024, 1024, false, writer);
446 try self.typeAlignment(.vector, 2048, 2048, 2048, false, writer);
447 },
448 .ve => {},
449 else => {
450 try self.typeAlignment(.vector, 16, 32, 32, false, writer);
451 try self.typeAlignment(.vector, 32, 32, 32, false, writer);
452 try self.typeAlignment(.vector, 64, 64, 64, false, writer);
453 try self.typeAlignment(.vector, 128, 128, 128, true, writer);
454 },
455 }
456 if (self.target.os.tag != .windows and self.target.cpu.arch != .avr)
457 try self.typeAlignment(.aggregate, 0, 0, 64, false, writer);
427458 for (@as([]const u24, switch (self.target.cpu.arch) {
428 .aarch64_32,
459 .avr => &.{8},
460 .msp430 => &.{ 8, 16 },
429461 .arm,
430462 .armeb,
431463 .mips,
432464 .mipsel,
433465 .powerpc,
434466 .powerpcle,
467 .riscv32,
468 .sparc,
469 .sparcel,
435470 .thumb,
436471 .thumbeb,
437 .riscv32,
438472 => &.{32},
439473 .aarch64,
440474 .aarch64_be,
475 .aarch64_32,
476 .amdgcn,
477 .bpfeb,
478 .bpfel,
441479 .mips64,
442480 .mips64el,
443481 .powerpc64,
444482 .powerpc64le,
445483 .riscv64,
484 .s390x,
485 .sparc64,
486 .ve,
446487 .wasm32,
447488 .wasm64,
448489 => &.{ 32, 64 },
490 .hexagon => &.{ 16, 32 },
449491 .x86 => &.{ 8, 16, 32 },
492 .nvptx,
493 .nvptx64,
494 => &.{ 16, 32, 64 },
450495 .x86_64 => &.{ 8, 16, 32, 64 },
451496 else => &.{},
452497 }), 0..) |natural, index| switch (index) {
453498 0 => try writer.print("-n{d}", .{natural}),
454499 else => try writer.print(":{d}", .{natural}),
455500 };
456 if (self.target.os.tag == .windows) try self.typeAlignment(.aggregate, 0, 0, 64, false, writer);
501 if (self.target.cpu.arch == .hexagon) {
502 try self.typeAlignment(.integer, 64, 64, 64, true, writer);
503 try self.typeAlignment(.integer, 32, 32, 32, true, writer);
504 try self.typeAlignment(.integer, 16, 16, 16, true, writer);
505 try self.typeAlignment(.integer, 1, 8, 8, true, writer);
506 try self.typeAlignment(.float, 32, 32, 32, true, writer);
507 try self.typeAlignment(.float, 64, 64, 64, true, writer);
508 }
509 if (self.target.os.tag == .windows or self.target.cpu.arch == .avr)
510 try self.typeAlignment(.aggregate, 0, 0, 64, false, writer);
457511 const stack_abi = self.target.stackAlignment() * 8;
458 if (self.target.os.tag == .windows or stack_abi != ptr_bit_width)
512 if (self.target.os.tag == .windows or self.target.cpu.arch == .msp430 or
513 stack_abi != ptr_bit_width)
459514 try writer.print("-S{d}", .{stack_abi});
460 try self.typeAlignment(.vector, 256, 128, 128, true, writer);
461 try self.typeAlignment(.vector, 512, 128, 128, true, writer);
515 switch (self.target.cpu.arch) {
516 .hexagon, .ve => {
517 try self.typeAlignment(.vector, 32, 128, 128, true, writer);
518 try self.typeAlignment(.vector, 64, 128, 128, true, writer);
519 try self.typeAlignment(.vector, 128, 128, 128, true, writer);
520 },
521 else => {},
522 }
523 if (self.target.cpu.arch != .amdgcn) {
524 try self.typeAlignment(.vector, 256, 128, 128, true, writer);
525 try self.typeAlignment(.vector, 512, 128, 128, true, writer);
526 try self.typeAlignment(.vector, 1024, 128, 128, true, writer);
527 try self.typeAlignment(.vector, 2048, 128, 128, true, writer);
528 try self.typeAlignment(.vector, 4096, 128, 128, true, writer);
529 try self.typeAlignment(.vector, 8192, 128, 128, true, writer);
530 try self.typeAlignment(.vector, 16384, 128, 128, true, writer);
531 }
532 const alloca_addr_space = llvmAllocaAddressSpace(self.target);
533 if (alloca_addr_space != .default) try writer.print("-A{d}", .{@intFromEnum(alloca_addr_space)});
534 const global_addr_space = llvmDefaultGlobalAddressSpace(self.target);
535 if (global_addr_space != .default) try writer.print("-G{d}", .{@intFromEnum(global_addr_space)});
462536 if (any_non_integral) {
463537 try writer.writeAll("-ni");
464538 for (addr_space_info) |info| if (info.non_integral)
......@@ -472,11 +546,13 @@ const DataLayoutBuilder = struct {
472546 size: u24,
473547 default_abi: u24,
474548 default_pref: u24,
475 force_pref: bool,
549 default_force_pref: bool,
476550 writer: anytype,
477551 ) @TypeOf(writer).Error!void {
478552 var abi = default_abi;
479553 var pref = default_pref;
554 var force_abi = false;
555 var force_pref = default_force_pref;
480556 if (kind == .float and size == 80) {
481557 abi = 128;
482558 pref = 128;
......@@ -493,21 +569,45 @@ const DataLayoutBuilder = struct {
493569 }
494570 switch (kind) {
495571 .integer => {
572 if (self.target.ptrBitWidth() <= 16 and size >= 128) return;
496573 abi = @min(abi, self.target.maxIntAlignment() * 8);
497574 switch (self.target.os.tag) {
498575 .linux => switch (self.target.cpu.arch) {
499 .aarch64, .aarch64_be, .mips, .mipsel => pref = @max(pref, 32),
576 .aarch64,
577 .aarch64_be,
578 .aarch64_32,
579 .mips,
580 .mipsel,
581 => pref = @max(pref, 32),
500582 else => {},
501583 },
502584 else => {},
503585 }
504586 switch (self.target.cpu.arch) {
505 .aarch64, .aarch64_be, .riscv64 => switch (size) {
506 128 => {
507 abi = size;
508 pref = size;
509 },
510 else => {},
587 .aarch64,
588 .aarch64_be,
589 .aarch64_32,
590 .bpfeb,
591 .bpfel,
592 .nvptx,
593 .nvptx64,
594 .riscv64,
595 => if (size == 128) {
596 abi = size;
597 pref = size;
598 },
599 .hexagon => force_abi = true,
600 .mips64,
601 .mips64el,
602 => if (size <= 32) {
603 pref = 32;
604 },
605 .s390x => if (size <= 16) {
606 pref = 16;
607 },
608 .ve => if (size == 64) {
609 abi = size;
610 pref = size;
511611 },
512612 else => {},
513613 }
......@@ -517,18 +617,66 @@ const DataLayoutBuilder = struct {
517617 128 => abi = 64,
518618 else => {},
519619 }
520 } else if (self.target.cpu.arch.isPPC64()) {
620 } else if ((self.target.cpu.arch.isPPC64() and (size == 256 or size == 512)) or
621 (self.target.cpu.arch.isNvptx() and (size == 16 or size == 32)))
622 {
623 force_abi = true;
624 abi = size;
625 pref = size;
626 } else if (self.target.cpu.arch == .amdgcn and size <= 2048) {
627 force_abi = true;
628 } else if (self.target.cpu.arch == .hexagon and
629 ((size >= 32 and size <= 64) or (size >= 512 and size <= 2048)))
630 {
521631 abi = size;
522632 pref = size;
633 force_pref = true;
634 } else if (self.target.cpu.arch == .s390x and size == 128) {
635 abi = 64;
636 pref = 64;
637 force_pref = false;
638 } else if (self.target.cpu.arch == .ve and (size >= 64 and size <= 16384)) {
639 abi = 64;
640 pref = 64;
641 force_abi = true;
642 force_pref = true;
643 },
644 .float => switch (self.target.cpu.arch) {
645 .avr, .msp430, .sparc64 => if (size != 32 and size != 64) return,
646 .hexagon => if (size == 32 or size == 64) {
647 force_abi = true;
648 },
649 .aarch64_32 => if (size == 128) {
650 abi = size;
651 pref = size;
652 },
653 .ve => if (size == 64) {
654 abi = size;
655 pref = size;
656 },
657 else => {},
523658 },
524 .float => {},
525659 .aggregate => if (self.target.os.tag == .windows or
526660 self.target.cpu.arch.isARM() or self.target.cpu.arch.isThumb())
527661 {
528662 pref = @min(pref, self.target.ptrBitWidth());
663 } else if (self.target.cpu.arch == .hexagon) {
664 abi = 0;
665 pref = 0;
666 } else if (self.target.cpu.arch == .s390x) {
667 abi = 8;
668 pref = 16;
669 } else if (self.target.cpu.arch == .msp430) {
670 abi = 8;
671 pref = 8;
529672 },
530673 }
531 if (abi == default_abi and pref == default_pref) return;
674 if (kind != .vector and self.target.cpu.arch == .avr) {
675 force_abi = true;
676 abi = 8;
677 pref = 8;
678 }
679 if (!force_abi and abi == default_abi and pref == default_pref) return;
532680 try writer.print("-{c}", .{@tagName(kind)[0]});
533681 if (size != 0) try writer.print("{d}", .{size});
534682 try writer.print(":{d}", .{abi});
......@@ -5096,12 +5244,15 @@ pub const FuncGen = struct {
50965244 // In this case the function return type is honoring the calling convention by having
50975245 // a different LLVM type than the usual one. We solve this here at the callsite
50985246 // by using our canonical type, then loading it if necessary.
5099 const rp = try self.buildAlloca(llvm_ret_ty, .default);
5100 _ = try self.wip.store(.normal, call, rp, .default);
5247 const alignment = Builder.Alignment.fromByteUnits(
5248 o.target_data.abiAlignmentOfType(abi_ret_ty.toLlvm(&o.builder)),
5249 );
5250 const rp = try self.buildAlloca(llvm_ret_ty, alignment);
5251 _ = try self.wip.store(.normal, call, rp, alignment);
51015252 return if (isByRef(return_type, mod))
51025253 rp
51035254 else
5104 try self.wip.load(.normal, llvm_ret_ty, rp, .default, "");
5255 try self.wip.load(.normal, llvm_ret_ty, rp, alignment, "");
51055256 }
51065257
51075258 if (isByRef(return_type, mod)) {
......@@ -10923,23 +11074,26 @@ fn llvmAddrSpaceInfo(target: std.Target) []const AddrSpaceInfo {
1092311074 .{ .zig = .local, .llvm = Builder.AddrSpace.nvptx.local },
1092411075 },
1092511076 .amdgcn => &.{
10926 .{ .zig = .generic, .llvm = Builder.AddrSpace.amdgpu.flat },
10927 .{ .zig = .global, .llvm = Builder.AddrSpace.amdgpu.global },
10928 .{ .zig = .constant, .llvm = Builder.AddrSpace.amdgpu.constant },
10929 .{ .zig = .shared, .llvm = Builder.AddrSpace.amdgpu.local },
10930 .{ .zig = .local, .llvm = Builder.AddrSpace.amdgpu.private },
11077 .{ .zig = .generic, .llvm = Builder.AddrSpace.amdgpu.flat, .force_in_data_layout = true },
11078 .{ .zig = .global, .llvm = Builder.AddrSpace.amdgpu.global, .force_in_data_layout = true },
11079 .{ .zig = null, .llvm = Builder.AddrSpace.amdgpu.region, .size = 32, .abi = 32 },
11080 .{ .zig = .shared, .llvm = Builder.AddrSpace.amdgpu.local, .size = 32, .abi = 32 },
11081 .{ .zig = .constant, .llvm = Builder.AddrSpace.amdgpu.constant, .force_in_data_layout = true },
11082 .{ .zig = .local, .llvm = Builder.AddrSpace.amdgpu.private, .size = 32, .abi = 32 },
11083 .{ .zig = null, .llvm = Builder.AddrSpace.amdgpu.constant_32bit, .size = 32, .abi = 32 },
11084 .{ .zig = null, .llvm = Builder.AddrSpace.amdgpu.buffer_fat_pointer, .non_integral = true },
1093111085 },
1093211086 .avr => &.{
10933 .{ .zig = .generic, .llvm = .default },
10934 .{ .zig = .flash, .llvm = Builder.AddrSpace.avr.flash },
10935 .{ .zig = .flash1, .llvm = Builder.AddrSpace.avr.flash1 },
10936 .{ .zig = .flash2, .llvm = Builder.AddrSpace.avr.flash2 },
10937 .{ .zig = .flash3, .llvm = Builder.AddrSpace.avr.flash3 },
10938 .{ .zig = .flash4, .llvm = Builder.AddrSpace.avr.flash4 },
10939 .{ .zig = .flash5, .llvm = Builder.AddrSpace.avr.flash5 },
11087 .{ .zig = .generic, .llvm = .default, .abi = 8 },
11088 .{ .zig = .flash, .llvm = Builder.AddrSpace.avr.flash, .abi = 8 },
11089 .{ .zig = .flash1, .llvm = Builder.AddrSpace.avr.flash1, .abi = 8 },
11090 .{ .zig = .flash2, .llvm = Builder.AddrSpace.avr.flash2, .abi = 8 },
11091 .{ .zig = .flash3, .llvm = Builder.AddrSpace.avr.flash3, .abi = 8 },
11092 .{ .zig = .flash4, .llvm = Builder.AddrSpace.avr.flash4, .abi = 8 },
11093 .{ .zig = .flash5, .llvm = Builder.AddrSpace.avr.flash5, .abi = 8 },
1094011094 },
1094111095 .wasm32, .wasm64 => &.{
10942 .{ .zig = .generic, .llvm = .default },
11096 .{ .zig = .generic, .llvm = .default, .force_in_data_layout = true },
1094311097 .{ .zig = null, .llvm = Builder.AddrSpace.wasm.variable, .non_integral = true },
1094411098 .{ .zig = null, .llvm = Builder.AddrSpace.wasm.externref, .non_integral = true, .size = 8, .abi = 8 },
1094511099 .{ .zig = null, .llvm = Builder.AddrSpace.wasm.funcref, .non_integral = true, .size = 8, .abi = 8 },
src/codegen/llvm/Builder.zig+8-12
......@@ -2789,10 +2789,6 @@ pub const WipFunction = struct {
27892789 name: []const u8,
27902790 ) Allocator.Error!Value {
27912791 assert(ptr.typeOfWip(self).isPointer(self.builder));
2792 const final_scope = switch (ordering) {
2793 .none => .system,
2794 else => scope,
2795 };
27962792 try self.ensureUnusedExtraCapacity(1, Instruction.Load, 0);
27972793 const instruction = try self.addInst(name, .{
27982794 .tag = switch (ordering) {
......@@ -2808,7 +2804,10 @@ pub const WipFunction = struct {
28082804 .data = self.addExtraAssumeCapacity(Instruction.Load{
28092805 .type = ty,
28102806 .ptr = ptr,
2811 .info = .{ .scope = final_scope, .ordering = ordering, .alignment = alignment },
2807 .info = .{ .scope = switch (ordering) {
2808 .none => .system,
2809 else => scope,
2810 }, .ordering = ordering, .alignment = alignment },
28122811 }),
28132812 });
28142813 if (self.builder.useLibLlvm()) {
......@@ -2817,7 +2816,6 @@ pub const WipFunction = struct {
28172816 ptr.toLlvm(self),
28182817 instruction.llvmName(self),
28192818 );
2820 if (final_scope == .singlethread) llvm_instruction.setAtomicSingleThread(.True);
28212819 if (ordering != .none) llvm_instruction.setOrdering(@enumFromInt(@intFromEnum(ordering)));
28222820 if (alignment.toByteUnits()) |a| llvm_instruction.setAlignment(@intCast(a));
28232821 self.llvm.instructions.appendAssumeCapacity(llvm_instruction);
......@@ -2845,10 +2843,6 @@ pub const WipFunction = struct {
28452843 alignment: Alignment,
28462844 ) Allocator.Error!Instruction.Index {
28472845 assert(ptr.typeOfWip(self).isPointer(self.builder));
2848 const final_scope = switch (ordering) {
2849 .none => .system,
2850 else => scope,
2851 };
28522846 try self.ensureUnusedExtraCapacity(1, Instruction.Store, 0);
28532847 const instruction = try self.addInst(null, .{
28542848 .tag = switch (ordering) {
......@@ -2864,7 +2858,10 @@ pub const WipFunction = struct {
28642858 .data = self.addExtraAssumeCapacity(Instruction.Store{
28652859 .val = val,
28662860 .ptr = ptr,
2867 .info = .{ .scope = final_scope, .ordering = ordering, .alignment = alignment },
2861 .info = .{ .scope = switch (ordering) {
2862 .none => .system,
2863 else => scope,
2864 }, .ordering = ordering, .alignment = alignment },
28682865 }),
28692866 });
28702867 if (self.builder.useLibLlvm()) {
......@@ -2873,7 +2870,6 @@ pub const WipFunction = struct {
28732870 .normal => {},
28742871 .@"volatile" => llvm_instruction.setVolatile(.True),
28752872 }
2876 if (final_scope == .singlethread) llvm_instruction.setAtomicSingleThread(.True);
28772873 if (ordering != .none) llvm_instruction.setOrdering(@enumFromInt(@intFromEnum(ordering)));
28782874 if (alignment.toByteUnits()) |a| llvm_instruction.setAlignment(@intCast(a));
28792875 self.llvm.instructions.appendAssumeCapacity(llvm_instruction);