authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-08-23 01:44:45+02:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2024-09-19 18:20:21-07:00
loga4af54b4e5a64fef672ecf305f5f29fc0458f330
treedd6717f8ee3d564abf408f29368d012731d095f7
parent9f669df1b31d0379d3b9dcd14d415cfba9924319

update_cpu_features: Update for LLVM 19.

* Add `ProcessorAlias` support. * Bump output buffer size. * Include `i` extension in RISC-V baselines. * Update evaluation branch quota for RISC-V. * Retain some CPU features that LLVM removed. * Flatten more 'meta-features' used for CPU models. * Remove some superfluous dependencies.

1 files changed, 291 insertions(+), 31 deletions(-)

tools/update_cpu_features.zig+291-31
......@@ -56,15 +56,15 @@ const llvm_targets = [_]LlvmTarget{
5656 .llvm_name = "all",
5757 .omit = true,
5858 },
59 .{
60 .llvm_name = "v8a",
61 .extra_deps = &.{ "fp_armv8", "neon" },
62 },
6359 .{
6460 .llvm_name = "CONTEXTIDREL2",
6561 .zig_name = "contextidr_el2",
6662 .desc = "Enable RW operand Context ID Register (EL2)",
6763 },
64 .{
65 .llvm_name = "v8a",
66 .extra_deps = &.{"neon"},
67 },
6868 .{
6969 .llvm_name = "neoversee1",
7070 .flatten = true,
......@@ -77,6 +77,10 @@ const llvm_targets = [_]LlvmTarget{
7777 .llvm_name = "neoversen2",
7878 .flatten = true,
7979 },
80 .{
81 .llvm_name = "neoversen3",
82 .flatten = true,
83 },
8084 .{
8185 .llvm_name = "neoversev1",
8286 .flatten = true,
......@@ -85,32 +89,37 @@ const llvm_targets = [_]LlvmTarget{
8589 .llvm_name = "neoversev2",
8690 .flatten = true,
8791 },
92 .{
93 .llvm_name = "neoversev3",
94 .flatten = true,
95 },
96 .{
97 .llvm_name = "neoversev3AE",
98 .flatten = true,
99 },
88100 .{
89101 .llvm_name = "neoverse512tvb",
90102 .flatten = true,
91103 },
92104 .{
93 .llvm_name = "exynosm3",
105 .llvm_name = "oryon-1",
94106 .flatten = true,
95 .extra_deps = &.{"v8a"},
96107 },
97108 .{
98 .llvm_name = "exynosm4",
109 .llvm_name = "exynosm3",
99110 .flatten = true,
100111 },
101112 .{
102 .llvm_name = "v8.1a",
103 .extra_deps = &.{"v8a"},
113 .llvm_name = "exynosm4",
114 .flatten = true,
104115 },
105116 .{
106117 .llvm_name = "a35",
107118 .flatten = true,
108 .extra_deps = &.{"v8a"},
109119 },
110120 .{
111121 .llvm_name = "a53",
112122 .flatten = true,
113 .extra_deps = &.{"v8a"},
114123 },
115124 .{
116125 .llvm_name = "a55",
......@@ -119,34 +128,75 @@ const llvm_targets = [_]LlvmTarget{
119128 .{
120129 .llvm_name = "a57",
121130 .flatten = true,
122 .extra_deps = &.{"v8a"},
131 },
132 .{
133 .llvm_name = "a510",
134 .flatten = true,
135 },
136 .{
137 .llvm_name = "a520",
138 .flatten = true,
139 },
140 .{
141 .llvm_name = "a520ae",
142 .flatten = true,
123143 },
124144 .{
125145 .llvm_name = "a64fx",
126146 .flatten = true,
127147 },
148 .{
149 .llvm_name = "a65",
150 .flatten = true,
151 },
128152 .{
129153 .llvm_name = "a72",
130154 .flatten = true,
131 .extra_deps = &.{"v8a"},
132155 },
133156 .{
134157 .llvm_name = "a73",
135158 .flatten = true,
136 .extra_deps = &.{"v8a"},
137159 },
138160 .{
139161 .llvm_name = "a75",
140162 .flatten = true,
141163 },
164 .{
165 .llvm_name = "a76",
166 .flatten = true,
167 },
142168 .{
143169 .llvm_name = "a77",
144170 .flatten = true,
145171 },
172 .{
173 .llvm_name = "a78",
174 .flatten = true,
175 },
176 .{
177 .llvm_name = "a78ae",
178 .flatten = true,
179 },
180 .{
181 .llvm_name = "a78c",
182 .flatten = true,
183 },
184 .{
185 .llvm_name = "a710",
186 .flatten = true,
187 },
146188 .{
147189 .llvm_name = "a715",
148190 .flatten = true,
149191 },
192 .{
193 .llvm_name = "a720",
194 .flatten = true,
195 },
196 .{
197 .llvm_name = "a720ae",
198 .flatten = true,
199 },
150200 .{
151201 .llvm_name = "ampere1a",
152202 .flatten = true,
......@@ -191,14 +241,30 @@ const llvm_targets = [_]LlvmTarget{
191241 .llvm_name = "apple-a7-sysreg",
192242 .flatten = true,
193243 },
244 .{
245 .llvm_name = "apple-m4",
246 .flatten = true,
247 },
194248 .{
195249 .llvm_name = "carmel",
196250 .flatten = true,
197251 },
252 .{
253 .llvm_name = "cortex-a725",
254 .flatten = true,
255 },
198256 .{
199257 .llvm_name = "cortex-a78",
200258 .flatten = true,
201259 },
260 .{
261 .llvm_name = "cortex-r82",
262 .flatten = true,
263 },
264 .{
265 .llvm_name = "cortex-r82ae",
266 .flatten = true,
267 },
202268 .{
203269 .llvm_name = "cortex-x1",
204270 .flatten = true,
......@@ -215,15 +281,17 @@ const llvm_targets = [_]LlvmTarget{
215281 .llvm_name = "cortex-x4",
216282 .flatten = true,
217283 },
284 .{
285 .llvm_name = "cortex-x925",
286 .flatten = true,
287 },
218288 .{
219289 .llvm_name = "falkor",
220290 .flatten = true,
221 .extra_deps = &.{"v8a"},
222291 },
223292 .{
224293 .llvm_name = "kryo",
225294 .flatten = true,
226 .extra_deps = &.{"v8a"},
227295 },
228296 .{
229297 .llvm_name = "saphira",
......@@ -232,7 +300,6 @@ const llvm_targets = [_]LlvmTarget{
232300 .{
233301 .llvm_name = "thunderx",
234302 .flatten = true,
235 .extra_deps = &.{"v8a"},
236303 },
237304 .{
238305 .llvm_name = "thunderx2t99",
......@@ -245,17 +312,14 @@ const llvm_targets = [_]LlvmTarget{
245312 .{
246313 .llvm_name = "thunderxt81",
247314 .flatten = true,
248 .extra_deps = &.{"v8a"},
249315 },
250316 .{
251317 .llvm_name = "thunderxt83",
252318 .flatten = true,
253 .extra_deps = &.{"v8a"},
254319 },
255320 .{
256321 .llvm_name = "thunderxt88",
257322 .flatten = true,
258 .extra_deps = &.{"v8a"},
259323 },
260324 .{
261325 .llvm_name = "tsv110",
......@@ -308,8 +372,6 @@ const llvm_targets = [_]LlvmTarget{
308372 .llvm_name = null,
309373 .zig_name = "xgene1",
310374 .features = &.{
311 "fp_armv8",
312 "neon",
313375 "perfmon",
314376 "v8a",
315377 },
......@@ -320,13 +382,16 @@ const llvm_targets = [_]LlvmTarget{
320382 .features = &.{
321383 "crc",
322384 "crypto",
323 "fp_armv8",
324 "neon",
325385 "perfmon",
326386 "v8a",
327387 },
328388 },
329389 },
390 .omit_cpus = &.{
391 // Who thought this alias was a good idea? Upgrade your compiler and suddenly your
392 // programs SIGILL because this changed meaning. Brilliant.
393 "apple-latest",
394 },
330395 },
331396 .{
332397 .zig_name = "amdgpu",
......@@ -383,10 +448,18 @@ const llvm_targets = [_]LlvmTarget{
383448 },
384449 },
385450 .feature_overrides = &.{
451 .{
452 .llvm_name = "exynos",
453 .flatten = true,
454 },
386455 .{
387456 .llvm_name = "cortex-a78",
388457 .flatten = true,
389458 },
459 .{
460 .llvm_name = "cortex-a78ae",
461 .flatten = true,
462 },
390463 .{
391464 .llvm_name = "cortex-a710",
392465 .flatten = true,
......@@ -420,6 +493,14 @@ const llvm_targets = [_]LlvmTarget{
420493 .llvm_name = "cortex-x1c",
421494 .flatten = true,
422495 },
496 .{
497 .llvm_name = "r4",
498 .flatten = true,
499 },
500 .{
501 .llvm_name = "r52plus",
502 .flatten = true,
503 },
423504 .{
424505 .llvm_name = "r5",
425506 .flatten = true,
......@@ -432,6 +513,10 @@ const llvm_targets = [_]LlvmTarget{
432513 .llvm_name = "r7",
433514 .flatten = true,
434515 },
516 .{
517 .llvm_name = "m3",
518 .flatten = true,
519 },
435520 .{
436521 .llvm_name = "m7",
437522 .flatten = true,
......@@ -444,6 +529,10 @@ const llvm_targets = [_]LlvmTarget{
444529 .llvm_name = "kryo",
445530 .flatten = true,
446531 },
532 .{
533 .llvm_name = "swift",
534 .flatten = true,
535 },
447536 .{
448537 .llvm_name = "cortex-x1",
449538 .flatten = true,
......@@ -512,6 +601,10 @@ const llvm_targets = [_]LlvmTarget{
512601 .llvm_name = "a75",
513602 .flatten = true,
514603 },
604 .{
605 .llvm_name = "a76",
606 .flatten = true,
607 },
515608 .{
516609 .llvm_name = "a77",
517610 .flatten = true,
......@@ -903,6 +996,7 @@ const llvm_targets = [_]LlvmTarget{
903996 .zig_name = "riscv",
904997 .llvm_name = "RISCV",
905998 .td_name = "RISCV.td",
999 .branch_quota = 2000,
9061000 .feature_overrides = &.{
9071001 .{
9081002 .llvm_name = "sifive7",
......@@ -913,12 +1007,12 @@ const llvm_targets = [_]LlvmTarget{
9131007 .{
9141008 .llvm_name = null,
9151009 .zig_name = "baseline_rv32",
916 .features = &.{ "32bit", "a", "c", "d", "f", "m" },
1010 .features = &.{ "32bit", "a", "c", "d", "f", "i", "m" },
9171011 },
9181012 .{
9191013 .llvm_name = null,
9201014 .zig_name = "baseline_rv64",
921 .features = &.{ "64bit", "a", "c", "d", "f", "m" },
1015 .features = &.{ "64bit", "a", "c", "d", "f", "i", "m" },
9221016 },
9231017 },
9241018 },
......@@ -957,10 +1051,130 @@ const llvm_targets = [_]LlvmTarget{
9571051 .llvm_name = "64bit-mode",
9581052 .omit = true,
9591053 },
1054 .{
1055 .llvm_name = "amdfam10",
1056 .extra_deps = &.{"3dnowa"},
1057 },
1058 .{
1059 .llvm_name = "athlon",
1060 .extra_deps = &.{"3dnowa"},
1061 },
1062 .{
1063 .llvm_name = "athlon64",
1064 .extra_deps = &.{"3dnowa"},
1065 },
1066 .{
1067 .llvm_name = "athlon64-sse3",
1068 .extra_deps = &.{"3dnowa"},
1069 },
1070 .{
1071 .llvm_name = "athlon-4",
1072 .extra_deps = &.{"3dnowa"},
1073 },
1074 .{
1075 .llvm_name = "athlon-fx",
1076 .extra_deps = &.{"3dnowa"},
1077 },
1078 .{
1079 .llvm_name = "athlon-mp",
1080 .extra_deps = &.{"3dnowa"},
1081 },
1082 .{
1083 .llvm_name = "athlon-tbird",
1084 .extra_deps = &.{"3dnowa"},
1085 },
1086 .{
1087 .llvm_name = "athlon-xp",
1088 .extra_deps = &.{"3dnowa"},
1089 },
1090 .{
1091 .llvm_name = "barcelona",
1092 .extra_deps = &.{"3dnowa"},
1093 },
1094 .{
1095 .llvm_name = "c3",
1096 .extra_deps = &.{"3dnow"},
1097 },
1098 .{
1099 .llvm_name = "geode",
1100 .extra_deps = &.{"3dnowa"},
1101 },
1102 .{
1103 .llvm_name = "k6-2",
1104 .extra_deps = &.{"3dnow"},
1105 },
1106 .{
1107 .llvm_name = "k6-3",
1108 .extra_deps = &.{"3dnow"},
1109 },
1110 .{
1111 .llvm_name = "k8",
1112 .extra_deps = &.{"3dnowa"},
1113 },
1114 .{
1115 .llvm_name = "k8-sse3",
1116 .extra_deps = &.{"3dnowa"},
1117 },
1118 .{
1119 .llvm_name = "knl",
1120 .extra_deps = &.{
1121 "avx512er",
1122 "avx512pf",
1123 "prefetchwt1",
1124 },
1125 },
1126 .{
1127 .llvm_name = "knm",
1128 .extra_deps = &.{
1129 "avx512er",
1130 "avx512pf",
1131 "prefetchwt1",
1132 },
1133 },
9601134 .{
9611135 .llvm_name = "lakemont",
9621136 .extra_deps = &.{"soft_float"},
9631137 },
1138 .{
1139 .llvm_name = "opteron",
1140 .extra_deps = &.{"3dnowa"},
1141 },
1142 .{
1143 .llvm_name = "opteron-sse3",
1144 .extra_deps = &.{"3dnowa"},
1145 },
1146 .{
1147 .llvm_name = "winchip2",
1148 .extra_deps = &.{"3dnow"},
1149 },
1150 },
1151 // Features removed from LLVM
1152 .extra_features = &.{
1153 .{
1154 .zig_name = "3dnow",
1155 .desc = "Enable 3DNow! instructions",
1156 .deps = &.{"mmx"},
1157 },
1158 .{
1159 .zig_name = "3dnowa",
1160 .desc = "Enable 3DNow! Athlon instructions",
1161 .deps = &.{"3dnow"},
1162 },
1163 .{
1164 .zig_name = "avx512er",
1165 .desc = "Enable AVX-512 Exponential and Reciprocal Instructions",
1166 .deps = &.{"avx512f"},
1167 },
1168 .{
1169 .zig_name = "avx512pf",
1170 .desc = "Enable AVX-512 PreFetch Instructions",
1171 .deps = &.{"avx512f"},
1172 },
1173 .{
1174 .zig_name = "prefetchwt1",
1175 .desc = "Prefetch with Intent to Write and T1 Hint",
1176 .deps = &.{},
1177 },
9641178 },
9651179 .omit_cpus = &.{
9661180 // LLVM defines a bunch of dumb aliases with foreach loops in X86.td.
......@@ -1111,7 +1325,7 @@ fn processOneTarget(job: Job) anyerror!void {
11111325 const child_result = try std.process.Child.run(.{
11121326 .allocator = arena,
11131327 .argv = &child_args,
1114 .max_output_bytes = 400 * 1024 * 1024,
1328 .max_output_bytes = 500 * 1024 * 1024,
11151329 });
11161330 tblgen_progress.end();
11171331 if (child_result.stderr.len != 0) {
......@@ -1138,6 +1352,36 @@ fn processOneTarget(job: Job) anyerror!void {
11381352
11391353 const render_progress = progress_node.start("render zig code", 0);
11401354
1355 // So far LLVM has only had a few aliases for the same CPU.
1356 var cpu_aliases = std.StringHashMap(std.SegmentedList(struct {
1357 llvm: []const u8,
1358 zig: []const u8,
1359 }, 4)).init(arena);
1360
1361 {
1362 var it = root_map.iterator();
1363 while (it.next()) |kv| {
1364 if (kv.key_ptr.len == 0) continue;
1365 if (kv.key_ptr.*[0] == '!') continue;
1366 if (kv.value_ptr.* != .object) continue;
1367 if (hasSuperclass(&kv.value_ptr.object, "ProcessorAlias")) {
1368 // Note that `Name` is actually the alias, while `Alias` is the name that will have
1369 // a full `Processor` object defined.
1370 const llvm_alias = kv.value_ptr.object.get("Name").?.string;
1371 const llvm_name = kv.value_ptr.object.get("Alias").?.string;
1372
1373 const gop = try cpu_aliases.getOrPut(try llvmNameToZigName(arena, llvm_name));
1374
1375 if (!gop.found_existing) gop.value_ptr.* = .{};
1376
1377 try gop.value_ptr.append(arena, .{
1378 .llvm = llvm_alias,
1379 .zig = try llvmNameToZigName(arena, llvm_alias),
1380 });
1381 }
1382 }
1383 }
1384
11411385 var features_table = std.StringHashMap(Feature).init(arena);
11421386 var all_features = std.ArrayList(Feature).init(arena);
11431387 var all_cpus = std.ArrayList(Cpu).init(arena);
......@@ -1184,7 +1428,7 @@ fn processOneTarget(job: Job) anyerror!void {
11841428 const other_key = imply.object.get("def").?.string;
11851429 const other_obj = &root_map.getPtr(other_key).?.object;
11861430 const other_llvm_name = other_obj.get("Name").?.string;
1187 const other_zig_name = (try llvmNameToZigNameOmit(
1431 const other_zig_name = (try llvmFeatureNameToZigNameOmit(
11881432 arena,
11891433 llvm_target,
11901434 other_llvm_name,
......@@ -1241,7 +1485,7 @@ fn processOneTarget(job: Job) anyerror!void {
12411485 const feature_obj = &root_map.getPtr(feature_key).?.object;
12421486 const feature_llvm_name = feature_obj.get("Name").?.string;
12431487 if (feature_llvm_name.len == 0) continue;
1244 const feature_zig_name = (try llvmNameToZigNameOmit(
1488 const feature_zig_name = (try llvmFeatureNameToZigNameOmit(
12451489 arena,
12461490 llvm_target,
12471491 feature_llvm_name,
......@@ -1261,7 +1505,7 @@ fn processOneTarget(job: Job) anyerror!void {
12611505 const feature_obj = &root_map.getPtr(feature_key).?.object;
12621506 const feature_llvm_name = feature_obj.get("Name").?.string;
12631507 if (feature_llvm_name.len == 0) continue;
1264 const feature_zig_name = (try llvmNameToZigNameOmit(
1508 const feature_zig_name = (try llvmFeatureNameToZigNameOmit(
12651509 arena,
12661510 llvm_target,
12671511 feature_llvm_name,
......@@ -1287,6 +1531,22 @@ fn processOneTarget(job: Job) anyerror!void {
12871531 .zig_name = zig_name,
12881532 .features = deps.items,
12891533 });
1534
1535 if (cpu_aliases.get(zig_name)) |aliases| {
1536 var alias_it = aliases.constIterator(0);
1537
1538 alias_it: while (alias_it.next()) |alias| {
1539 for (llvm_target.omit_cpus) |omit_cpu_name| {
1540 if (mem.eql(u8, omit_cpu_name, alias.llvm)) continue :alias_it;
1541 }
1542
1543 try all_cpus.append(.{
1544 .llvm_name = alias.llvm,
1545 .zig_name = alias.zig,
1546 .features = deps.items,
1547 });
1548 }
1549 }
12901550 }
12911551 }
12921552 }
......@@ -1525,7 +1785,7 @@ fn llvmNameToZigName(arena: mem.Allocator, llvm_name: []const u8) ![]const u8 {
15251785 return duped;
15261786}
15271787
1528fn llvmNameToZigNameOmit(
1788fn llvmFeatureNameToZigNameOmit(
15291789 arena: mem.Allocator,
15301790 llvm_target: LlvmTarget,
15311791 llvm_name: []const u8,