| ... | ... | @@ -1,4 +1,20 @@ |
| 1 | 1 | // zig fmt: off |
| 2 | |
| 3 | /// Definitions of all of the x64 registers. The order is very, very important. |
| 4 | /// The registers are defined such that IDs go in descending order of 64-bit, |
| 5 | /// 32-bit, 16-bit, and then 8-bit, and each set contains exactly sixteen |
| 6 | /// registers. This results in some very, very useful properties: |
| 7 | /// |
| 8 | /// Any 64-bit register can be turned into its 32-bit form by adding 16, and |
| 9 | /// vice verse. This also works between 32-bit and 16-bit. With 8-bit, it works |
| 10 | /// for all except for sp, bp, si, and di, which don't *have* an eight-bit |
| 11 | /// form. |
| 12 | /// |
| 13 | /// If (register & 8) is set, the register is extended. |
| 14 | /// |
| 15 | /// The ID can be easily determined by figuring out what range the register is |
| 16 | /// in, and then subtracting the base. |
| 17 | /// |
| 2 | 18 | pub const Register = enum(u8) { |
| 3 | 19 | // 0 through 15, 64-bit registers. 8-15 are extended. |
| 4 | 20 | // id is just the int value. |