authorgravatar for jacobly@ziglang.orgJacob Young <jacobly@ziglang.org> 2023-06-24 23:04:58-04:00
committergravatar for jacobly@ziglang.orgJacob Young <jacobly@ziglang.org> 2023-06-25 19:14:03-04:00
logb18a72ec35978109186444506cd9791425af632b
tree3b685c35ccdc525a12dbc887685745821e79ea4c
parent054536f3430ecc96cb3520e82b07b2bee3337585

x86_64: fix crash emitting a packed undefined u128

2 files changed, 21 insertions(+), 16 deletions(-)

lib/std/mem.zig+3-4
...@@ -1832,7 +1832,6 @@ pub fn writeIntSlice(comptime T: type, buffer: []u8, value: T, endian: Endian) v...@@ -1832,7 +1832,6 @@ pub fn writeIntSlice(comptime T: type, buffer: []u8, value: T, endian: Endian) v
1832pub fn writeVarPackedInt(bytes: []u8, bit_offset: usize, bit_count: usize, value: anytype, endian: std.builtin.Endian) void {1832pub fn writeVarPackedInt(bytes: []u8, bit_offset: usize, bit_count: usize, value: anytype, endian: std.builtin.Endian) void {
1833 const T = @TypeOf(value);1833 const T = @TypeOf(value);
1834 const uN = std.meta.Int(.unsigned, @bitSizeOf(T));1834 const uN = std.meta.Int(.unsigned, @bitSizeOf(T));
1835 const Log2N = std.math.Log2Int(T);
18361835
1837 const bit_shift = @as(u3, @intCast(bit_offset % 8));1836 const bit_shift = @as(u3, @intCast(bit_offset % 8));
1838 const write_size = (bit_count + bit_shift + 7) / 8;1837 const write_size = (bit_count + bit_shift + 7) / 8;
...@@ -1861,9 +1860,9 @@ pub fn writeVarPackedInt(bytes: []u8, bit_offset: usize, bit_count: usize, value...@@ -1861,9 +1860,9 @@ pub fn writeVarPackedInt(bytes: []u8, bit_offset: usize, bit_count: usize, value
18611860
1862 // Write first byte, using a mask to protects bits preceding bit_offset1861 // Write first byte, using a mask to protects bits preceding bit_offset
1863 const head_mask = @as(u8, 0xff) >> bit_shift;1862 const head_mask = @as(u8, 0xff) >> bit_shift;
1864 write_bytes[@as(usize, @intCast(i))] &= ~(head_mask << bit_shift);1863 write_bytes[@intCast(i)] &= ~(head_mask << bit_shift);
1865 write_bytes[@as(usize, @intCast(i))] |= @as(u8, @intCast(@as(uN, @bitCast(remaining)) & head_mask)) << bit_shift;1864 write_bytes[@intCast(i)] |= @as(u8, @intCast(@as(uN, @bitCast(remaining)) & head_mask)) << bit_shift;
1866 remaining >>= @as(Log2N, @intCast(@as(u4, 8) - bit_shift));1865 remaining = math.shr(T, remaining, @as(u4, 8) - bit_shift);
1867 i += delta;1866 i += delta;
18681867
1869 // Write bytes[1..bytes.len - 1]1868 // Write bytes[1..bytes.len - 1]
src/arch/x86_64/CodeGen.zig+18-12
...@@ -4341,6 +4341,9 @@ fn airClz(self: *Self, inst: Air.Inst.Index) !void {...@@ -4341,6 +4341,9 @@ fn airClz(self: *Self, inst: Air.Inst.Index) !void {
4341 const result = result: {4341 const result = result: {
4342 const dst_ty = self.typeOfIndex(inst);4342 const dst_ty = self.typeOfIndex(inst);
4343 const src_ty = self.typeOf(ty_op.operand);4343 const src_ty = self.typeOf(ty_op.operand);
4344 if (src_ty.zigTypeTag(mod) == .Vector) return self.fail("TODO implement airClz for {}", .{
4345 src_ty.fmt(mod),
4346 });
43444347
4345 const src_mcv = try self.resolveInst(ty_op.operand);4348 const src_mcv = try self.resolveInst(ty_op.operand);
4346 const mat_src_mcv = switch (src_mcv) {4349 const mat_src_mcv = switch (src_mcv) {
...@@ -4691,7 +4694,9 @@ fn byteSwap(self: *Self, inst: Air.Inst.Index, src_ty: Type, src_mcv: MCValue, m...@@ -4691,7 +4694,9 @@ fn byteSwap(self: *Self, inst: Air.Inst.Index, src_ty: Type, src_mcv: MCValue, m
4691 defer if (src_lock) |lock| self.register_manager.unlockReg(lock);4694 defer if (src_lock) |lock| self.register_manager.unlockReg(lock);
46924695
4693 switch (src_bits) {4696 switch (src_bits) {
4694 else => unreachable,4697 else => return self.fail("TODO implement byteSwap for {}", .{
4698 src_ty.fmt(mod),
4699 }),
4695 8 => return if ((mem_ok or src_mcv.isRegister()) and4700 8 => return if ((mem_ok or src_mcv.isRegister()) and
4696 self.reuseOperand(inst, ty_op.operand, 0, src_mcv))4701 self.reuseOperand(inst, ty_op.operand, 0, src_mcv))
4697 src_mcv4702 src_mcv
...@@ -6093,16 +6098,16 @@ fn genShiftBinOp(...@@ -6093,16 +6098,16 @@ fn genShiftBinOp(
6093 rhs_ty: Type,6098 rhs_ty: Type,
6094) !MCValue {6099) !MCValue {
6095 const mod = self.bin_file.options.module.?;6100 const mod = self.bin_file.options.module.?;
6096 if (lhs_ty.zigTypeTag(mod) == .Vector) {6101 if (lhs_ty.zigTypeTag(mod) == .Vector) return self.fail("TODO implement genShiftBinOp for {}", .{
6097 return self.fail("TODO implement genShiftBinOp for {}", .{lhs_ty.fmtDebug()});6102 lhs_ty.fmt(mod),
6098 }6103 });
60996104
6100 assert(rhs_ty.abiSize(mod) == 1);6105 assert(rhs_ty.abiSize(mod) == 1);
61016106
6102 const lhs_abi_size = lhs_ty.abiSize(mod);6107 const lhs_abi_size = lhs_ty.abiSize(mod);
6103 if (lhs_abi_size > 16) {6108 if (lhs_abi_size > 16) return self.fail("TODO implement genShiftBinOp for {}", .{
6104 return self.fail("TODO implement genShiftBinOp for {}", .{lhs_ty.fmtDebug()});6109 lhs_ty.fmt(mod),
6105 }6110 });
61066111
6107 try self.register_manager.getReg(.rcx, null);6112 try self.register_manager.getReg(.rcx, null);
6108 const rcx_lock = self.register_manager.lockRegAssumeUnused(.rcx);6113 const rcx_lock = self.register_manager.lockRegAssumeUnused(.rcx);
...@@ -6158,11 +6163,12 @@ fn genMulDivBinOp(...@@ -6158,11 +6163,12 @@ fn genMulDivBinOp(
6158 rhs: MCValue,6163 rhs: MCValue,
6159) !MCValue {6164) !MCValue {
6160 const mod = self.bin_file.options.module.?;6165 const mod = self.bin_file.options.module.?;
6161 if (dst_ty.zigTypeTag(mod) == .Vector or dst_ty.zigTypeTag(mod) == .Float) {6166 if (dst_ty.zigTypeTag(mod) == .Vector or dst_ty.zigTypeTag(mod) == .Float) return self.fail(
6162 return self.fail("TODO implement genMulDivBinOp for {}", .{dst_ty.fmtDebug()});6167 "TODO implement genMulDivBinOp for {}",
6163 }6168 .{dst_ty.fmt(mod)},
6164 const dst_abi_size = @as(u32, @intCast(dst_ty.abiSize(mod)));6169 );
6165 const src_abi_size = @as(u32, @intCast(src_ty.abiSize(mod)));6170 const dst_abi_size: u32 = @intCast(dst_ty.abiSize(mod));
6171 const src_abi_size: u32 = @intCast(src_ty.abiSize(mod));
6166 if (switch (tag) {6172 if (switch (tag) {
6167 else => unreachable,6173 else => unreachable,
6168 .mul, .mul_wrap => dst_abi_size != src_abi_size and dst_abi_size != src_abi_size * 2,6174 .mul, .mul_wrap => dst_abi_size != src_abi_size and dst_abi_size != src_abi_size * 2,