| author |  Andrew Kelley <andrew@ziglang.org> 2019-08-16 16:52:45-04:00 |
| committer | Andrew Kelley <andrew@ziglang.org> 2019-08-16 16:52:45-04:00 |
| log | c39bb3ebc49096af45f3a69d4742e5f4d50cab62 |
| tree | 1e7cc87e0d474cf25310dae784f502e1c8e2b72f |
| parent | 6529658ad861bc47e9641081bb953ba54f21a1ae |
| signature | Commit is signed but in an unrecognized format. |
target: add missing switch case
1 files changed, 2 insertions(+), 0 deletions(-)
src
src/target.cpp+2
| ... | ... | @@ -686,6 +686,8 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) { |
| 686 | 686 | return "v8m_baseline"; |
| 687 | 687 | case ZigLLVM_ARMSubArch_v8m_mainline: |
| 688 | 688 | return "v8m_mainline"; |
| 689 | case ZigLLVM_ARMSubArch_v8_1m_mainline: | |
| 690 | return "v8_1m_mainline"; | |
| 689 | 691 | case ZigLLVM_ARMSubArch_v7: |
| 690 | 692 | return "v7"; |
| 691 | 693 | case ZigLLVM_ARMSubArch_v7em: |