| author | |
| committer | |
| log | c75226d03356f33df698d5e5a74173476bd47240 |
| tree | 956b6273033b14221d6cf039a93753aabdfff68a |
| parent | 5043369e14dd98885ed88ffb6926dec94058cd46 |
11 files changed, 3825 insertions(+), 85 deletions(-)
lib/std/target/aarch64.zig+39-13| ... | ... | @@ -19,6 +19,7 @@ pub const Feature = enum { |
| 19 | 19 | amvs, |
| 20 | 20 | arith_bcc_fusion, |
| 21 | 21 | arith_cbz_fusion, |
| 22 | ascend_store_address, | |
| 22 | 23 | balance_fp_ops, |
| 23 | 24 | bf16, |
| 24 | 25 | brbe, |
| ... | ... | @@ -61,6 +62,7 @@ pub const Feature = enum { |
| 61 | 62 | fptoint, |
| 62 | 63 | fullfp16, |
| 63 | 64 | fuse_address, |
| 65 | fuse_adrp_add, | |
| 64 | 66 | fuse_aes, |
| 65 | 67 | fuse_arith_logic, |
| 66 | 68 | fuse_crypto_eor, |
| ... | ... | @@ -73,6 +75,7 @@ pub const Feature = enum { |
| 73 | 75 | hcx, |
| 74 | 76 | i8mm, |
| 75 | 77 | jsconv, |
| 78 | ldapr, | |
| 76 | 79 | lor, |
| 77 | 80 | ls64, |
| 78 | 81 | lse, |
| ... | ... | @@ -139,7 +142,6 @@ pub const Feature = enum { |
| 139 | 142 | spe_eef, |
| 140 | 143 | specrestrict, |
| 141 | 144 | ssbs, |
| 142 | streaming_sve, | |
| 143 | 145 | strict_align, |
| 144 | 146 | sve, |
| 145 | 147 | sve2, |
| ... | ... | @@ -206,6 +208,7 @@ pub const all_features = blk: { |
| 206 | 208 | .description = "Cortex-A65 ARM processors", |
| 207 | 209 | .dependencies = featureSet(&[_]Feature{ |
| 208 | 210 | .fuse_address, |
| 211 | .fuse_adrp_add, | |
| 209 | 212 | .fuse_aes, |
| 210 | 213 | .fuse_literals, |
| 211 | 214 | }), |
| ... | ... | @@ -288,6 +291,11 @@ pub const all_features = blk: { |
| 288 | 291 | .description = "CPU fuses arithmetic + cbz/cbnz operations", |
| 289 | 292 | .dependencies = featureSet(&[_]Feature{}), |
| 290 | 293 | }; |
| 294 | result[@enumToInt(Feature.ascend_store_address)] = .{ | |
| 295 | .llvm_name = "ascend-store-address", | |
| 296 | .description = "Schedule vector stores by ascending address", | |
| 297 | .dependencies = featureSet(&[_]Feature{}), | |
| 298 | }; | |
| 291 | 299 | result[@enumToInt(Feature.balance_fp_ops)] = .{ |
| 292 | 300 | .llvm_name = "balance-fp-ops", |
| 293 | 301 | .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", |
| ... | ... | @@ -517,6 +525,11 @@ pub const all_features = blk: { |
| 517 | 525 | .description = "CPU fuses address generation and memory operations", |
| 518 | 526 | .dependencies = featureSet(&[_]Feature{}), |
| 519 | 527 | }; |
| 528 | result[@enumToInt(Feature.fuse_adrp_add)] = .{ | |
| 529 | .llvm_name = "fuse-adrp-add", | |
| 530 | .description = "CPU fuses adrp+add operations", | |
| 531 | .dependencies = featureSet(&[_]Feature{}), | |
| 532 | }; | |
| 520 | 533 | result[@enumToInt(Feature.fuse_aes)] = .{ |
| 521 | 534 | .llvm_name = "fuse-aes", |
| 522 | 535 | .description = "CPU fuses AES crypto operations", |
| ... | ... | @@ -579,6 +592,11 @@ pub const all_features = blk: { |
| 579 | 592 | .fp_armv8, |
| 580 | 593 | }), |
| 581 | 594 | }; |
| 595 | result[@enumToInt(Feature.ldapr)] = .{ | |
| 596 | .llvm_name = "ldapr", | |
| 597 | .description = "Use LDAPR to lower atomic loads; experimental until we have more testing/a formal correctness proof", | |
| 598 | .dependencies = featureSet(&[_]Feature{}), | |
| 599 | }; | |
| 582 | 600 | result[@enumToInt(Feature.lor)] = .{ |
| 583 | 601 | .llvm_name = "lor", |
| 584 | 602 | .description = "Enables ARM v8.1 Limited Ordering Regions extension", |
| ... | ... | @@ -891,7 +909,7 @@ pub const all_features = blk: { |
| 891 | 909 | .description = "Enable Scalable Matrix Extension (SME)", |
| 892 | 910 | .dependencies = featureSet(&[_]Feature{ |
| 893 | 911 | .bf16, |
| 894 | .streaming_sve, | |
| 912 | .use_scalar_inc_vl, | |
| 895 | 913 | }), |
| 896 | 914 | }; |
| 897 | 915 | result[@enumToInt(Feature.sme_f64)] = .{ |
| ... | ... | @@ -928,11 +946,6 @@ pub const all_features = blk: { |
| 928 | 946 | .description = "Enable Speculative Store Bypass Safe bit", |
| 929 | 947 | .dependencies = featureSet(&[_]Feature{}), |
| 930 | 948 | }; |
| 931 | result[@enumToInt(Feature.streaming_sve)] = .{ | |
| 932 | .llvm_name = "streaming-sve", | |
| 933 | .description = "Enable subset of SVE(2) instructions for Streaming SVE execution mode", | |
| 934 | .dependencies = featureSet(&[_]Feature{}), | |
| 935 | }; | |
| 936 | 949 | result[@enumToInt(Feature.strict_align)] = .{ |
| 937 | 950 | .llvm_name = "strict-align", |
| 938 | 951 | .description = "Disallow all unaligned memory access", |
| ... | ... | @@ -1178,6 +1191,7 @@ pub const all_features = blk: { |
| 1178 | 1191 | .rcpc_immo, |
| 1179 | 1192 | .rdm, |
| 1180 | 1193 | .sel2, |
| 1194 | .specrestrict, | |
| 1181 | 1195 | .tlb_rmi, |
| 1182 | 1196 | .tracev8_4, |
| 1183 | 1197 | .uaops, |
| ... | ... | @@ -1387,6 +1401,7 @@ pub const cpu = struct { |
| 1387 | 1401 | .fp16fml, |
| 1388 | 1402 | .fptoint, |
| 1389 | 1403 | .fuse_address, |
| 1404 | .fuse_adrp_add, | |
| 1390 | 1405 | .fuse_aes, |
| 1391 | 1406 | .fuse_arith_logic, |
| 1392 | 1407 | .fuse_crypto_eor, |
| ... | ... | @@ -1472,6 +1487,7 @@ pub const cpu = struct { |
| 1472 | 1487 | .fp16fml, |
| 1473 | 1488 | .fptoint, |
| 1474 | 1489 | .fuse_address, |
| 1490 | .fuse_adrp_add, | |
| 1475 | 1491 | .fuse_aes, |
| 1476 | 1492 | .fuse_arith_logic, |
| 1477 | 1493 | .fuse_crypto_eor, |
| ... | ... | @@ -1503,6 +1519,7 @@ pub const cpu = struct { |
| 1503 | 1519 | .fp16fml, |
| 1504 | 1520 | .fptoint, |
| 1505 | 1521 | .fuse_address, |
| 1522 | .fuse_adrp_add, | |
| 1506 | 1523 | .fuse_aes, |
| 1507 | 1524 | .fuse_arith_logic, |
| 1508 | 1525 | .fuse_crypto_eor, |
| ... | ... | @@ -1636,6 +1653,7 @@ pub const cpu = struct { |
| 1636 | 1653 | .crc, |
| 1637 | 1654 | .crypto, |
| 1638 | 1655 | .custom_cheap_as_move, |
| 1656 | .fuse_adrp_add, | |
| 1639 | 1657 | .fuse_aes, |
| 1640 | 1658 | .fuse_literals, |
| 1641 | 1659 | .perfmon, |
| ... | ... | @@ -1652,6 +1670,7 @@ pub const cpu = struct { |
| 1652 | 1670 | .crypto, |
| 1653 | 1671 | .dotprod, |
| 1654 | 1672 | .fullfp16, |
| 1673 | .perfmon, | |
| 1655 | 1674 | .rcpc, |
| 1656 | 1675 | .ssbs, |
| 1657 | 1676 | .v8_2a, |
| ... | ... | @@ -1665,6 +1684,7 @@ pub const cpu = struct { |
| 1665 | 1684 | .crypto, |
| 1666 | 1685 | .dotprod, |
| 1667 | 1686 | .fullfp16, |
| 1687 | .perfmon, | |
| 1668 | 1688 | .rcpc, |
| 1669 | 1689 | .ssbs, |
| 1670 | 1690 | .v8_2a, |
| ... | ... | @@ -1691,6 +1711,7 @@ pub const cpu = struct { |
| 1691 | 1711 | .features = featureSet(&[_]Feature{ |
| 1692 | 1712 | .crc, |
| 1693 | 1713 | .crypto, |
| 1714 | .fuse_adrp_add, | |
| 1694 | 1715 | .fuse_aes, |
| 1695 | 1716 | .fuse_literals, |
| 1696 | 1717 | .perfmon, |
| ... | ... | @@ -1729,6 +1750,7 @@ pub const cpu = struct { |
| 1729 | 1750 | .crypto, |
| 1730 | 1751 | .dotprod, |
| 1731 | 1752 | .fullfp16, |
| 1753 | .perfmon, | |
| 1732 | 1754 | .rcpc, |
| 1733 | 1755 | .ssbs, |
| 1734 | 1756 | .v8_2a, |
| ... | ... | @@ -1742,6 +1764,7 @@ pub const cpu = struct { |
| 1742 | 1764 | .crypto, |
| 1743 | 1765 | .dotprod, |
| 1744 | 1766 | .fullfp16, |
| 1767 | .perfmon, | |
| 1745 | 1768 | .rcpc, |
| 1746 | 1769 | .ssbs, |
| 1747 | 1770 | .v8_2a, |
| ... | ... | @@ -1756,6 +1779,7 @@ pub const cpu = struct { |
| 1756 | 1779 | .dotprod, |
| 1757 | 1780 | .fullfp16, |
| 1758 | 1781 | .fuse_aes, |
| 1782 | .perfmon, | |
| 1759 | 1783 | .rcpc, |
| 1760 | 1784 | .ssbs, |
| 1761 | 1785 | .v8_2a, |
| ... | ... | @@ -1802,7 +1826,6 @@ pub const cpu = struct { |
| 1802 | 1826 | .perfmon, |
| 1803 | 1827 | .predres, |
| 1804 | 1828 | .sb, |
| 1805 | .specrestrict, | |
| 1806 | 1829 | .ssbs, |
| 1807 | 1830 | .v8r, |
| 1808 | 1831 | }), |
| ... | ... | @@ -1924,22 +1947,20 @@ pub const cpu = struct { |
| 1924 | 1947 | .name = "exynos_m3", |
| 1925 | 1948 | .llvm_name = "exynos-m3", |
| 1926 | 1949 | .features = featureSet(&[_]Feature{ |
| 1927 | .arith_bcc_fusion, | |
| 1928 | .arith_cbz_fusion, | |
| 1929 | 1950 | .crc, |
| 1930 | 1951 | .crypto, |
| 1931 | 1952 | .exynos_cheap_as_move, |
| 1932 | 1953 | .force_32bit_jump_tables, |
| 1933 | 1954 | .fuse_address, |
| 1955 | .fuse_adrp_add, | |
| 1934 | 1956 | .fuse_aes, |
| 1935 | .fuse_arith_logic, | |
| 1936 | 1957 | .fuse_csel, |
| 1937 | 1958 | .fuse_literals, |
| 1938 | 1959 | .lsl_fast, |
| 1939 | 1960 | .perfmon, |
| 1961 | .predictable_select_expensive, | |
| 1940 | 1962 | .use_postra_scheduler, |
| 1941 | 1963 | .v8a, |
| 1942 | .zcz, | |
| 1943 | 1964 | }), |
| 1944 | 1965 | }; |
| 1945 | 1966 | pub const exynos_m4 = CpuModel{ |
| ... | ... | @@ -1954,6 +1975,7 @@ pub const cpu = struct { |
| 1954 | 1975 | .force_32bit_jump_tables, |
| 1955 | 1976 | .fullfp16, |
| 1956 | 1977 | .fuse_address, |
| 1978 | .fuse_adrp_add, | |
| 1957 | 1979 | .fuse_aes, |
| 1958 | 1980 | .fuse_arith_logic, |
| 1959 | 1981 | .fuse_csel, |
| ... | ... | @@ -1977,6 +1999,7 @@ pub const cpu = struct { |
| 1977 | 1999 | .force_32bit_jump_tables, |
| 1978 | 2000 | .fullfp16, |
| 1979 | 2001 | .fuse_address, |
| 2002 | .fuse_adrp_add, | |
| 1980 | 2003 | .fuse_aes, |
| 1981 | 2004 | .fuse_arith_logic, |
| 1982 | 2005 | .fuse_csel, |
| ... | ... | @@ -2010,9 +2033,9 @@ pub const cpu = struct { |
| 2010 | 2033 | .llvm_name = "generic", |
| 2011 | 2034 | .features = featureSet(&[_]Feature{ |
| 2012 | 2035 | .ete, |
| 2036 | .fuse_adrp_add, | |
| 2013 | 2037 | .fuse_aes, |
| 2014 | 2038 | .neon, |
| 2015 | .perfmon, | |
| 2016 | 2039 | .use_postra_scheduler, |
| 2017 | 2040 | }), |
| 2018 | 2041 | }; |
| ... | ... | @@ -2058,6 +2081,7 @@ pub const cpu = struct { |
| 2058 | 2081 | .dotprod, |
| 2059 | 2082 | .fullfp16, |
| 2060 | 2083 | .fuse_aes, |
| 2084 | .perfmon, | |
| 2061 | 2085 | .rcpc, |
| 2062 | 2086 | .ssbs, |
| 2063 | 2087 | .use_postra_scheduler, |
| ... | ... | @@ -2072,6 +2096,7 @@ pub const cpu = struct { |
| 2072 | 2096 | .dotprod, |
| 2073 | 2097 | .fullfp16, |
| 2074 | 2098 | .fuse_aes, |
| 2099 | .perfmon, | |
| 2075 | 2100 | .rcpc, |
| 2076 | 2101 | .spe, |
| 2077 | 2102 | .ssbs, |
| ... | ... | @@ -2089,6 +2114,7 @@ pub const cpu = struct { |
| 2089 | 2114 | .fuse_aes, |
| 2090 | 2115 | .i8mm, |
| 2091 | 2116 | .mte, |
| 2117 | .perfmon, | |
| 2092 | 2118 | .sve2_bitperm, |
| 2093 | 2119 | .use_postra_scheduler, |
| 2094 | 2120 | .v8_5a, |
lib/std/target/amdgpu.zig+291-17| ... | ... | @@ -10,7 +10,9 @@ pub const Feature = enum { |
| 10 | 10 | add_no_carry_insts, |
| 11 | 11 | aperture_regs, |
| 12 | 12 | architected_flat_scratch, |
| 13 | atomic_fadd_insts, | |
| 13 | atomic_fadd_no_rtn_insts, | |
| 14 | atomic_fadd_rtn_insts, | |
| 15 | atomic_pk_fadd_no_rtn_insts, | |
| 14 | 16 | auto_waitcnt_before_barrier, |
| 15 | 17 | ci_insts, |
| 16 | 18 | cumode, |
| ... | ... | @@ -22,12 +24,12 @@ pub const Feature = enum { |
| 22 | 24 | dot5_insts, |
| 23 | 25 | dot6_insts, |
| 24 | 26 | dot7_insts, |
| 27 | dot8_insts, | |
| 25 | 28 | dpp, |
| 26 | 29 | dpp8, |
| 27 | 30 | dpp_64bit, |
| 31 | ds128, | |
| 28 | 32 | ds_src2_insts, |
| 29 | enable_ds128, | |
| 30 | enable_prt_strict_null, | |
| 31 | 33 | extended_image_insts, |
| 32 | 34 | fast_denormal_f32, |
| 33 | 35 | fast_fmaf, |
| ... | ... | @@ -35,11 +37,13 @@ pub const Feature = enum { |
| 35 | 37 | flat_for_global, |
| 36 | 38 | flat_global_insts, |
| 37 | 39 | flat_inst_offsets, |
| 40 | flat_scratch, | |
| 38 | 41 | flat_scratch_insts, |
| 39 | 42 | flat_segment_offset_bug, |
| 40 | 43 | fma_mix_insts, |
| 41 | 44 | fmaf, |
| 42 | 45 | fp64, |
| 46 | fp8_insts, | |
| 43 | 47 | full_rate_64_ops, |
| 44 | 48 | g16, |
| 45 | 49 | gcn3_encoding, |
| ... | ... | @@ -49,13 +53,17 @@ pub const Feature = enum { |
| 49 | 53 | gfx10_a_encoding, |
| 50 | 54 | gfx10_b_encoding, |
| 51 | 55 | gfx10_insts, |
| 56 | gfx11, | |
| 57 | gfx11_insts, | |
| 52 | 58 | gfx7_gfx8_gfx9_insts, |
| 53 | 59 | gfx8_insts, |
| 54 | 60 | gfx9, |
| 55 | 61 | gfx90a_insts, |
| 62 | gfx940_insts, | |
| 56 | 63 | gfx9_insts, |
| 57 | 64 | half_rate_64_ops, |
| 58 | 65 | image_gather4_d16_bug, |
| 66 | image_insts, | |
| 59 | 67 | image_store_d16_bug, |
| 60 | 68 | inst_fwd_prefetch_bug, |
| 61 | 69 | int_clamp_insts, |
| ... | ... | @@ -90,6 +98,7 @@ pub const Feature = enum { |
| 90 | 98 | packed_tid, |
| 91 | 99 | pk_fmac_f16_inst, |
| 92 | 100 | promote_alloca, |
| 101 | prt_strict_null, | |
| 93 | 102 | r128_a16, |
| 94 | 103 | s_memrealtime, |
| 95 | 104 | s_memtime_inst, |
| ... | ... | @@ -113,12 +122,14 @@ pub const Feature = enum { |
| 113 | 122 | tgsplit, |
| 114 | 123 | trap_handler, |
| 115 | 124 | trig_reduced_range, |
| 125 | true16, | |
| 116 | 126 | unaligned_access_mode, |
| 117 | 127 | unaligned_buffer_access, |
| 118 | 128 | unaligned_ds_access, |
| 119 | 129 | unaligned_scratch_access, |
| 120 | 130 | unpacked_d16_vmem, |
| 121 | 131 | unsafe_ds_offset_folding, |
| 132 | user_sgpr_init16_bug, | |
| 122 | 133 | vcmpx_exec_war_hazard, |
| 123 | 134 | vcmpx_permlane_hazard, |
| 124 | 135 | vgpr_index_mode, |
| ... | ... | @@ -126,6 +137,7 @@ pub const Feature = enum { |
| 126 | 137 | volcanic_islands, |
| 127 | 138 | vop3_literal, |
| 128 | 139 | vop3p, |
| 140 | vopd, | |
| 129 | 141 | vscnt, |
| 130 | 142 | wavefrontsize16, |
| 131 | 143 | wavefrontsize32, |
| ... | ... | @@ -168,9 +180,23 @@ pub const all_features = blk: { |
| 168 | 180 | .description = "Flat Scratch register is a readonly SPI initialized architected register", |
| 169 | 181 | .dependencies = featureSet(&[_]Feature{}), |
| 170 | 182 | }; |
| 171 | result[@enumToInt(Feature.atomic_fadd_insts)] = .{ | |
| 172 | .llvm_name = "atomic-fadd-insts", | |
| 173 | .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", | |
| 183 | result[@enumToInt(Feature.atomic_fadd_no_rtn_insts)] = .{ | |
| 184 | .llvm_name = "atomic-fadd-no-rtn-insts", | |
| 185 | .description = "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that don't return original value", | |
| 186 | .dependencies = featureSet(&[_]Feature{ | |
| 187 | .flat_global_insts, | |
| 188 | }), | |
| 189 | }; | |
| 190 | result[@enumToInt(Feature.atomic_fadd_rtn_insts)] = .{ | |
| 191 | .llvm_name = "atomic-fadd-rtn-insts", | |
| 192 | .description = "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that return original value", | |
| 193 | .dependencies = featureSet(&[_]Feature{ | |
| 194 | .flat_global_insts, | |
| 195 | }), | |
| 196 | }; | |
| 197 | result[@enumToInt(Feature.atomic_pk_fadd_no_rtn_insts)] = .{ | |
| 198 | .llvm_name = "atomic-pk-fadd-no-rtn-insts", | |
| 199 | .description = "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that don't return original value", | |
| 174 | 200 | .dependencies = featureSet(&[_]Feature{ |
| 175 | 201 | .flat_global_insts, |
| 176 | 202 | }), |
| ... | ... | @@ -230,6 +256,11 @@ pub const all_features = blk: { |
| 230 | 256 | .description = "Has v_dot2_f32_f16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", |
| 231 | 257 | .dependencies = featureSet(&[_]Feature{}), |
| 232 | 258 | }; |
| 259 | result[@enumToInt(Feature.dot8_insts)] = .{ | |
| 260 | .llvm_name = "dot8-insts", | |
| 261 | .description = "Has v_dot2_f16_f16, v_dot2_bf16_bf16, v_dot2_f32_bf16, v_dot4_i32_iu8, v_dot8_i32_iu4 instructions", | |
| 262 | .dependencies = featureSet(&[_]Feature{}), | |
| 263 | }; | |
| 233 | 264 | result[@enumToInt(Feature.dpp)] = .{ |
| 234 | 265 | .llvm_name = "dpp", |
| 235 | 266 | .description = "Support DPP (Data Parallel Primitives) extension", |
| ... | ... | @@ -245,19 +276,14 @@ pub const all_features = blk: { |
| 245 | 276 | .description = "Support DPP (Data Parallel Primitives) extension", |
| 246 | 277 | .dependencies = featureSet(&[_]Feature{}), |
| 247 | 278 | }; |
| 248 | result[@enumToInt(Feature.ds_src2_insts)] = .{ | |
| 249 | .llvm_name = "ds-src2-insts", | |
| 250 | .description = "Has ds_*_src2 instructions", | |
| 251 | .dependencies = featureSet(&[_]Feature{}), | |
| 252 | }; | |
| 253 | result[@enumToInt(Feature.enable_ds128)] = .{ | |
| 279 | result[@enumToInt(Feature.ds128)] = .{ | |
| 254 | 280 | .llvm_name = "enable-ds128", |
| 255 | 281 | .description = "Use ds_{read|write}_b128", |
| 256 | 282 | .dependencies = featureSet(&[_]Feature{}), |
| 257 | 283 | }; |
| 258 | result[@enumToInt(Feature.enable_prt_strict_null)] = .{ | |
| 259 | .llvm_name = "enable-prt-strict-null", | |
| 260 | .description = "Enable zeroing of result registers for sparse texture fetches", | |
| 284 | result[@enumToInt(Feature.ds_src2_insts)] = .{ | |
| 285 | .llvm_name = "ds-src2-insts", | |
| 286 | .description = "Has ds_*_src2 instructions", | |
| 261 | 287 | .dependencies = featureSet(&[_]Feature{}), |
| 262 | 288 | }; |
| 263 | 289 | result[@enumToInt(Feature.extended_image_insts)] = .{ |
| ... | ... | @@ -295,6 +321,11 @@ pub const all_features = blk: { |
| 295 | 321 | .description = "Flat instructions have immediate offset addressing mode", |
| 296 | 322 | .dependencies = featureSet(&[_]Feature{}), |
| 297 | 323 | }; |
| 324 | result[@enumToInt(Feature.flat_scratch)] = .{ | |
| 325 | .llvm_name = "enable-flat-scratch", | |
| 326 | .description = "Use scratch_* flat memory instructions to access scratch", | |
| 327 | .dependencies = featureSet(&[_]Feature{}), | |
| 328 | }; | |
| 298 | 329 | result[@enumToInt(Feature.flat_scratch_insts)] = .{ |
| 299 | 330 | .llvm_name = "flat-scratch-insts", |
| 300 | 331 | .description = "Have scratch_* flat memory instructions", |
| ... | ... | @@ -320,6 +351,11 @@ pub const all_features = blk: { |
| 320 | 351 | .description = "Enable double precision operations", |
| 321 | 352 | .dependencies = featureSet(&[_]Feature{}), |
| 322 | 353 | }; |
| 354 | result[@enumToInt(Feature.fp8_insts)] = .{ | |
| 355 | .llvm_name = "fp8-insts", | |
| 356 | .description = "Has fp8 and bf8 instructions", | |
| 357 | .dependencies = featureSet(&[_]Feature{}), | |
| 358 | }; | |
| 323 | 359 | result[@enumToInt(Feature.full_rate_64_ops)] = .{ |
| 324 | 360 | .llvm_name = "full-rate-64-ops", |
| 325 | 361 | .description = "Most fp64 instructions are full rate", |
| ... | ... | @@ -364,6 +400,7 @@ pub const all_features = blk: { |
| 364 | 400 | .gfx10_insts, |
| 365 | 401 | .gfx8_insts, |
| 366 | 402 | .gfx9_insts, |
| 403 | .image_insts, | |
| 367 | 404 | .int_clamp_insts, |
| 368 | 405 | .inv_2pi_inline_imm, |
| 369 | 406 | .localmemorysize65536, |
| ... | ... | @@ -405,6 +442,56 @@ pub const all_features = blk: { |
| 405 | 442 | .description = "Additional instructions for GFX10+", |
| 406 | 443 | .dependencies = featureSet(&[_]Feature{}), |
| 407 | 444 | }; |
| 445 | result[@enumToInt(Feature.gfx11)] = .{ | |
| 446 | .llvm_name = "gfx11", | |
| 447 | .description = "GFX11 GPU generation", | |
| 448 | .dependencies = featureSet(&[_]Feature{ | |
| 449 | .@"16_bit_insts", | |
| 450 | .a16, | |
| 451 | .add_no_carry_insts, | |
| 452 | .aperture_regs, | |
| 453 | .ci_insts, | |
| 454 | .dpp, | |
| 455 | .dpp8, | |
| 456 | .extended_image_insts, | |
| 457 | .fast_denormal_f32, | |
| 458 | .fast_fmaf, | |
| 459 | .flat_address_space, | |
| 460 | .flat_global_insts, | |
| 461 | .flat_inst_offsets, | |
| 462 | .flat_scratch_insts, | |
| 463 | .fma_mix_insts, | |
| 464 | .fp64, | |
| 465 | .g16, | |
| 466 | .gfx10_3_insts, | |
| 467 | .gfx10_a_encoding, | |
| 468 | .gfx10_b_encoding, | |
| 469 | .gfx10_insts, | |
| 470 | .gfx11_insts, | |
| 471 | .gfx8_insts, | |
| 472 | .gfx9_insts, | |
| 473 | .int_clamp_insts, | |
| 474 | .inv_2pi_inline_imm, | |
| 475 | .localmemorysize65536, | |
| 476 | .mimg_r128, | |
| 477 | .movrel, | |
| 478 | .no_data_dep_hazard, | |
| 479 | .no_sdst_cmpx, | |
| 480 | .pk_fmac_f16_inst, | |
| 481 | .true16, | |
| 482 | .unaligned_buffer_access, | |
| 483 | .unaligned_ds_access, | |
| 484 | .vop3_literal, | |
| 485 | .vop3p, | |
| 486 | .vopd, | |
| 487 | .vscnt, | |
| 488 | }), | |
| 489 | }; | |
| 490 | result[@enumToInt(Feature.gfx11_insts)] = .{ | |
| 491 | .llvm_name = "gfx11-insts", | |
| 492 | .description = "Additional instructions for GFX11+", | |
| 493 | .dependencies = featureSet(&[_]Feature{}), | |
| 494 | }; | |
| 408 | 495 | result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{ |
| 409 | 496 | .llvm_name = "gfx7-gfx8-gfx9-insts", |
| 410 | 497 | .description = "Instructions shared in GFX7, GFX8, GFX9", |
| ... | ... | @@ -462,6 +549,11 @@ pub const all_features = blk: { |
| 462 | 549 | .description = "Additional instructions for GFX90A+", |
| 463 | 550 | .dependencies = featureSet(&[_]Feature{}), |
| 464 | 551 | }; |
| 552 | result[@enumToInt(Feature.gfx940_insts)] = .{ | |
| 553 | .llvm_name = "gfx940-insts", | |
| 554 | .description = "Additional instructions for GFX940+", | |
| 555 | .dependencies = featureSet(&[_]Feature{}), | |
| 556 | }; | |
| 465 | 557 | result[@enumToInt(Feature.gfx9_insts)] = .{ |
| 466 | 558 | .llvm_name = "gfx9-insts", |
| 467 | 559 | .description = "Additional instructions for GFX9+", |
| ... | ... | @@ -477,6 +569,11 @@ pub const all_features = blk: { |
| 477 | 569 | .description = "Image Gather4 D16 hardware bug", |
| 478 | 570 | .dependencies = featureSet(&[_]Feature{}), |
| 479 | 571 | }; |
| 572 | result[@enumToInt(Feature.image_insts)] = .{ | |
| 573 | .llvm_name = "image-insts", | |
| 574 | .description = "Support image instructions", | |
| 575 | .dependencies = featureSet(&[_]Feature{}), | |
| 576 | }; | |
| 480 | 577 | result[@enumToInt(Feature.image_store_d16_bug)] = .{ |
| 481 | 578 | .llvm_name = "image-store-d16-bug", |
| 482 | 579 | .description = "Image Store D16 hardware bug", |
| ... | ... | @@ -647,6 +744,11 @@ pub const all_features = blk: { |
| 647 | 744 | .description = "Enable promote alloca pass", |
| 648 | 745 | .dependencies = featureSet(&[_]Feature{}), |
| 649 | 746 | }; |
| 747 | result[@enumToInt(Feature.prt_strict_null)] = .{ | |
| 748 | .llvm_name = "enable-prt-strict-null", | |
| 749 | .description = "Enable zeroing of result registers for sparse texture fetches", | |
| 750 | .dependencies = featureSet(&[_]Feature{}), | |
| 751 | }; | |
| 650 | 752 | result[@enumToInt(Feature.r128_a16)] = .{ |
| 651 | 753 | .llvm_name = "r128-a16", |
| 652 | 754 | .description = "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128", |
| ... | ... | @@ -717,6 +819,7 @@ pub const all_features = blk: { |
| 717 | 819 | .flat_address_space, |
| 718 | 820 | .fp64, |
| 719 | 821 | .gfx7_gfx8_gfx9_insts, |
| 822 | .image_insts, | |
| 720 | 823 | .localmemorysize65536, |
| 721 | 824 | .mad_mac_f32_insts, |
| 722 | 825 | .mimg_r128, |
| ... | ... | @@ -754,6 +857,7 @@ pub const all_features = blk: { |
| 754 | 857 | .ds_src2_insts, |
| 755 | 858 | .extended_image_insts, |
| 756 | 859 | .fp64, |
| 860 | .image_insts, | |
| 757 | 861 | .ldsbankcount32, |
| 758 | 862 | .localmemorysize32768, |
| 759 | 863 | .mad_mac_f32_insts, |
| ... | ... | @@ -789,6 +893,11 @@ pub const all_features = blk: { |
| 789 | 893 | .description = "Requires use of fract on arguments to trig instructions", |
| 790 | 894 | .dependencies = featureSet(&[_]Feature{}), |
| 791 | 895 | }; |
| 896 | result[@enumToInt(Feature.true16)] = .{ | |
| 897 | .llvm_name = "true16", | |
| 898 | .description = "True 16-bit operand instructions", | |
| 899 | .dependencies = featureSet(&[_]Feature{}), | |
| 900 | }; | |
| 792 | 901 | result[@enumToInt(Feature.unaligned_access_mode)] = .{ |
| 793 | 902 | .llvm_name = "unaligned-access-mode", |
| 794 | 903 | .description = "Enable unaligned global, local and region loads and stores if the hardware supports it", |
| ... | ... | @@ -819,6 +928,11 @@ pub const all_features = blk: { |
| 819 | 928 | .description = "Force using DS instruction immediate offsets on SI", |
| 820 | 929 | .dependencies = featureSet(&[_]Feature{}), |
| 821 | 930 | }; |
| 931 | result[@enumToInt(Feature.user_sgpr_init16_bug)] = .{ | |
| 932 | .llvm_name = "user-sgpr-init16-bug", | |
| 933 | .description = "Bug requiring at least 16 user+system SGPRs to be enabled", | |
| 934 | .dependencies = featureSet(&[_]Feature{}), | |
| 935 | }; | |
| 822 | 936 | result[@enumToInt(Feature.vcmpx_exec_war_hazard)] = .{ |
| 823 | 937 | .llvm_name = "vcmpx-exec-war-hazard", |
| 824 | 938 | .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", |
| ... | ... | @@ -854,6 +968,7 @@ pub const all_features = blk: { |
| 854 | 968 | .gcn3_encoding, |
| 855 | 969 | .gfx7_gfx8_gfx9_insts, |
| 856 | 970 | .gfx8_insts, |
| 971 | .image_insts, | |
| 857 | 972 | .int_clamp_insts, |
| 858 | 973 | .inv_2pi_inline_imm, |
| 859 | 974 | .localmemorysize65536, |
| ... | ... | @@ -882,6 +997,11 @@ pub const all_features = blk: { |
| 882 | 997 | .description = "Has VOP3P packed instructions", |
| 883 | 998 | .dependencies = featureSet(&[_]Feature{}), |
| 884 | 999 | }; |
| 1000 | result[@enumToInt(Feature.vopd)] = .{ | |
| 1001 | .llvm_name = "vopd", | |
| 1002 | .description = "Has VOPD dual issue wave32 instructions", | |
| 1003 | .dependencies = featureSet(&[_]Feature{}), | |
| 1004 | }; | |
| 885 | 1005 | result[@enumToInt(Feature.vscnt)] = .{ |
| 886 | 1006 | .llvm_name = "vscnt", |
| 887 | 1007 | .description = "Has separate store vscnt counter", |
| ... | ... | @@ -1226,6 +1346,118 @@ pub const cpu = struct { |
| 1226 | 1346 | .wavefrontsize32, |
| 1227 | 1347 | }), |
| 1228 | 1348 | }; |
| 1349 | pub const gfx1036 = CpuModel{ | |
| 1350 | .name = "gfx1036", | |
| 1351 | .llvm_name = "gfx1036", | |
| 1352 | .features = featureSet(&[_]Feature{ | |
| 1353 | .dl_insts, | |
| 1354 | .dot1_insts, | |
| 1355 | .dot2_insts, | |
| 1356 | .dot5_insts, | |
| 1357 | .dot6_insts, | |
| 1358 | .dot7_insts, | |
| 1359 | .gfx10, | |
| 1360 | .gfx10_3_insts, | |
| 1361 | .gfx10_a_encoding, | |
| 1362 | .gfx10_b_encoding, | |
| 1363 | .ldsbankcount32, | |
| 1364 | .nsa_encoding, | |
| 1365 | .nsa_max_size_13, | |
| 1366 | .shader_cycles_register, | |
| 1367 | .wavefrontsize32, | |
| 1368 | }), | |
| 1369 | }; | |
| 1370 | pub const gfx1100 = CpuModel{ | |
| 1371 | .name = "gfx1100", | |
| 1372 | .llvm_name = "gfx1100", | |
| 1373 | .features = featureSet(&[_]Feature{ | |
| 1374 | .architected_flat_scratch, | |
| 1375 | .atomic_fadd_no_rtn_insts, | |
| 1376 | .atomic_fadd_rtn_insts, | |
| 1377 | .dl_insts, | |
| 1378 | .dot5_insts, | |
| 1379 | .dot7_insts, | |
| 1380 | .dot8_insts, | |
| 1381 | .gfx11, | |
| 1382 | .image_insts, | |
| 1383 | .ldsbankcount32, | |
| 1384 | .nsa_encoding, | |
| 1385 | .nsa_max_size_5, | |
| 1386 | .packed_tid, | |
| 1387 | .shader_cycles_register, | |
| 1388 | .user_sgpr_init16_bug, | |
| 1389 | .vcmpx_permlane_hazard, | |
| 1390 | .wavefrontsize32, | |
| 1391 | }), | |
| 1392 | }; | |
| 1393 | pub const gfx1101 = CpuModel{ | |
| 1394 | .name = "gfx1101", | |
| 1395 | .llvm_name = "gfx1101", | |
| 1396 | .features = featureSet(&[_]Feature{ | |
| 1397 | .architected_flat_scratch, | |
| 1398 | .atomic_fadd_no_rtn_insts, | |
| 1399 | .atomic_fadd_rtn_insts, | |
| 1400 | .dl_insts, | |
| 1401 | .dot5_insts, | |
| 1402 | .dot7_insts, | |
| 1403 | .dot8_insts, | |
| 1404 | .gfx11, | |
| 1405 | .image_insts, | |
| 1406 | .ldsbankcount32, | |
| 1407 | .nsa_encoding, | |
| 1408 | .nsa_max_size_5, | |
| 1409 | .packed_tid, | |
| 1410 | .shader_cycles_register, | |
| 1411 | .vcmpx_permlane_hazard, | |
| 1412 | .wavefrontsize32, | |
| 1413 | }), | |
| 1414 | }; | |
| 1415 | pub const gfx1102 = CpuModel{ | |
| 1416 | .name = "gfx1102", | |
| 1417 | .llvm_name = "gfx1102", | |
| 1418 | .features = featureSet(&[_]Feature{ | |
| 1419 | .architected_flat_scratch, | |
| 1420 | .atomic_fadd_no_rtn_insts, | |
| 1421 | .atomic_fadd_rtn_insts, | |
| 1422 | .dl_insts, | |
| 1423 | .dot5_insts, | |
| 1424 | .dot7_insts, | |
| 1425 | .dot8_insts, | |
| 1426 | .gfx11, | |
| 1427 | .image_insts, | |
| 1428 | .ldsbankcount32, | |
| 1429 | .nsa_encoding, | |
| 1430 | .nsa_max_size_5, | |
| 1431 | .packed_tid, | |
| 1432 | .shader_cycles_register, | |
| 1433 | .user_sgpr_init16_bug, | |
| 1434 | .vcmpx_permlane_hazard, | |
| 1435 | .wavefrontsize32, | |
| 1436 | }), | |
| 1437 | }; | |
| 1438 | pub const gfx1103 = CpuModel{ | |
| 1439 | .name = "gfx1103", | |
| 1440 | .llvm_name = "gfx1103", | |
| 1441 | .features = featureSet(&[_]Feature{ | |
| 1442 | .architected_flat_scratch, | |
| 1443 | .atomic_fadd_no_rtn_insts, | |
| 1444 | .atomic_fadd_rtn_insts, | |
| 1445 | .dl_insts, | |
| 1446 | .dot5_insts, | |
| 1447 | .dot7_insts, | |
| 1448 | .dot8_insts, | |
| 1449 | .gfx11, | |
| 1450 | .image_insts, | |
| 1451 | .ldsbankcount32, | |
| 1452 | .nsa_encoding, | |
| 1453 | .nsa_max_size_5, | |
| 1454 | .packed_tid, | |
| 1455 | .shader_cycles_register, | |
| 1456 | .user_sgpr_init16_bug, | |
| 1457 | .vcmpx_permlane_hazard, | |
| 1458 | .wavefrontsize32, | |
| 1459 | }), | |
| 1460 | }; | |
| 1229 | 1461 | pub const gfx600 = CpuModel{ |
| 1230 | 1462 | .name = "gfx600", |
| 1231 | 1463 | .llvm_name = "gfx600", |
| ... | ... | @@ -1360,6 +1592,7 @@ pub const cpu = struct { |
| 1360 | 1592 | .extended_image_insts, |
| 1361 | 1593 | .gfx9, |
| 1362 | 1594 | .image_gather4_d16_bug, |
| 1595 | .image_insts, | |
| 1363 | 1596 | .ldsbankcount32, |
| 1364 | 1597 | .mad_mac_f32_insts, |
| 1365 | 1598 | .mad_mix_insts, |
| ... | ... | @@ -1373,6 +1606,7 @@ pub const cpu = struct { |
| 1373 | 1606 | .extended_image_insts, |
| 1374 | 1607 | .gfx9, |
| 1375 | 1608 | .image_gather4_d16_bug, |
| 1609 | .image_insts, | |
| 1376 | 1610 | .ldsbankcount32, |
| 1377 | 1611 | .mad_mac_f32_insts, |
| 1378 | 1612 | .mad_mix_insts, |
| ... | ... | @@ -1387,6 +1621,7 @@ pub const cpu = struct { |
| 1387 | 1621 | .fma_mix_insts, |
| 1388 | 1622 | .gfx9, |
| 1389 | 1623 | .image_gather4_d16_bug, |
| 1624 | .image_insts, | |
| 1390 | 1625 | .ldsbankcount32, |
| 1391 | 1626 | .mad_mac_f32_insts, |
| 1392 | 1627 | }), |
| ... | ... | @@ -1405,6 +1640,7 @@ pub const cpu = struct { |
| 1405 | 1640 | .gfx9, |
| 1406 | 1641 | .half_rate_64_ops, |
| 1407 | 1642 | .image_gather4_d16_bug, |
| 1643 | .image_insts, | |
| 1408 | 1644 | .ldsbankcount32, |
| 1409 | 1645 | .mad_mac_f32_insts, |
| 1410 | 1646 | .sramecc_support, |
| ... | ... | @@ -1414,7 +1650,8 @@ pub const cpu = struct { |
| 1414 | 1650 | .name = "gfx908", |
| 1415 | 1651 | .llvm_name = "gfx908", |
| 1416 | 1652 | .features = featureSet(&[_]Feature{ |
| 1417 | .atomic_fadd_insts, | |
| 1653 | .atomic_fadd_no_rtn_insts, | |
| 1654 | .atomic_pk_fadd_no_rtn_insts, | |
| 1418 | 1655 | .dl_insts, |
| 1419 | 1656 | .dot1_insts, |
| 1420 | 1657 | .dot2_insts, |
| ... | ... | @@ -1429,6 +1666,7 @@ pub const cpu = struct { |
| 1429 | 1666 | .gfx9, |
| 1430 | 1667 | .half_rate_64_ops, |
| 1431 | 1668 | .image_gather4_d16_bug, |
| 1669 | .image_insts, | |
| 1432 | 1670 | .ldsbankcount32, |
| 1433 | 1671 | .mad_mac_f32_insts, |
| 1434 | 1672 | .mai_insts, |
| ... | ... | @@ -1445,6 +1683,7 @@ pub const cpu = struct { |
| 1445 | 1683 | .extended_image_insts, |
| 1446 | 1684 | .gfx9, |
| 1447 | 1685 | .image_gather4_d16_bug, |
| 1686 | .image_insts, | |
| 1448 | 1687 | .ldsbankcount32, |
| 1449 | 1688 | .mad_mac_f32_insts, |
| 1450 | 1689 | .mad_mix_insts, |
| ... | ... | @@ -1454,7 +1693,9 @@ pub const cpu = struct { |
| 1454 | 1693 | .name = "gfx90a", |
| 1455 | 1694 | .llvm_name = "gfx90a", |
| 1456 | 1695 | .features = featureSet(&[_]Feature{ |
| 1457 | .atomic_fadd_insts, | |
| 1696 | .atomic_fadd_no_rtn_insts, | |
| 1697 | .atomic_fadd_rtn_insts, | |
| 1698 | .atomic_pk_fadd_no_rtn_insts, | |
| 1458 | 1699 | .dl_insts, |
| 1459 | 1700 | .dot1_insts, |
| 1460 | 1701 | .dot2_insts, |
| ... | ... | @@ -1468,6 +1709,7 @@ pub const cpu = struct { |
| 1468 | 1709 | .full_rate_64_ops, |
| 1469 | 1710 | .gfx9, |
| 1470 | 1711 | .gfx90a_insts, |
| 1712 | .image_insts, | |
| 1471 | 1713 | .ldsbankcount32, |
| 1472 | 1714 | .mad_mac_f32_insts, |
| 1473 | 1715 | .mai_insts, |
| ... | ... | @@ -1485,11 +1727,43 @@ pub const cpu = struct { |
| 1485 | 1727 | .extended_image_insts, |
| 1486 | 1728 | .gfx9, |
| 1487 | 1729 | .image_gather4_d16_bug, |
| 1730 | .image_insts, | |
| 1488 | 1731 | .ldsbankcount32, |
| 1489 | 1732 | .mad_mac_f32_insts, |
| 1490 | 1733 | .mad_mix_insts, |
| 1491 | 1734 | }), |
| 1492 | 1735 | }; |
| 1736 | pub const gfx940 = CpuModel{ | |
| 1737 | .name = "gfx940", | |
| 1738 | .llvm_name = "gfx940", | |
| 1739 | .features = featureSet(&[_]Feature{ | |
| 1740 | .architected_flat_scratch, | |
| 1741 | .atomic_fadd_no_rtn_insts, | |
| 1742 | .atomic_fadd_rtn_insts, | |
| 1743 | .atomic_pk_fadd_no_rtn_insts, | |
| 1744 | .dl_insts, | |
| 1745 | .dot1_insts, | |
| 1746 | .dot2_insts, | |
| 1747 | .dot3_insts, | |
| 1748 | .dot4_insts, | |
| 1749 | .dot5_insts, | |
| 1750 | .dot6_insts, | |
| 1751 | .dot7_insts, | |
| 1752 | .dpp_64bit, | |
| 1753 | .fma_mix_insts, | |
| 1754 | .fp8_insts, | |
| 1755 | .full_rate_64_ops, | |
| 1756 | .gfx9, | |
| 1757 | .gfx90a_insts, | |
| 1758 | .gfx940_insts, | |
| 1759 | .ldsbankcount32, | |
| 1760 | .mai_insts, | |
| 1761 | .packed_fp32_ops, | |
| 1762 | .packed_tid, | |
| 1763 | .pk_fmac_f16_inst, | |
| 1764 | .sramecc_support, | |
| 1765 | }), | |
| 1766 | }; | |
| 1493 | 1767 | pub const hainan = CpuModel{ |
| 1494 | 1768 | .name = "hainan", |
| 1495 | 1769 | .llvm_name = "hainan", |
lib/std/target/arm.zig+46| ... | ... | @@ -8,9 +8,12 @@ pub const Feature = enum { |
| 8 | 8 | @"32bit", |
| 9 | 9 | @"8msecext", |
| 10 | 10 | a76, |
| 11 | aapcs_frame_chain, | |
| 12 | aapcs_frame_chain_leaf, | |
| 11 | 13 | aclass, |
| 12 | 14 | acquire_release, |
| 13 | 15 | aes, |
| 16 | atomics_32, | |
| 14 | 17 | avoid_movs_shop, |
| 15 | 18 | avoid_partial_cpsr, |
| 16 | 19 | bf16, |
| ... | ... | @@ -37,6 +40,7 @@ pub const Feature = enum { |
| 37 | 40 | expand_fp_mlx, |
| 38 | 41 | exynos, |
| 39 | 42 | fix_cmse_cve_2021_35465, |
| 43 | fix_cortex_a57_aes_1742098, | |
| 40 | 44 | fp16, |
| 41 | 45 | fp16fml, |
| 42 | 46 | fp64, |
| ... | ... | @@ -133,6 +137,7 @@ pub const Feature = enum { |
| 133 | 137 | thumb2, |
| 134 | 138 | thumb_mode, |
| 135 | 139 | trustzone, |
| 140 | use_mipipeliner, | |
| 136 | 141 | use_misched, |
| 137 | 142 | v2, |
| 138 | 143 | v2a, |
| ... | ... | @@ -218,6 +223,18 @@ pub const all_features = blk: { |
| 218 | 223 | .description = "Cortex-A76 ARM processors", |
| 219 | 224 | .dependencies = featureSet(&[_]Feature{}), |
| 220 | 225 | }; |
| 226 | result[@enumToInt(Feature.aapcs_frame_chain)] = .{ | |
| 227 | .llvm_name = "aapcs-frame-chain", | |
| 228 | .description = "Create an AAPCS compliant frame chain", | |
| 229 | .dependencies = featureSet(&[_]Feature{}), | |
| 230 | }; | |
| 231 | result[@enumToInt(Feature.aapcs_frame_chain_leaf)] = .{ | |
| 232 | .llvm_name = "aapcs-frame-chain-leaf", | |
| 233 | .description = "Create an AAPCS compliant frame chain for leaf functions", | |
| 234 | .dependencies = featureSet(&[_]Feature{ | |
| 235 | .aapcs_frame_chain, | |
| 236 | }), | |
| 237 | }; | |
| 221 | 238 | result[@enumToInt(Feature.aclass)] = .{ |
| 222 | 239 | .llvm_name = "aclass", |
| 223 | 240 | .description = "Is application profile ('A' series)", |
| ... | ... | @@ -235,6 +252,11 @@ pub const all_features = blk: { |
| 235 | 252 | .neon, |
| 236 | 253 | }), |
| 237 | 254 | }; |
| 255 | result[@enumToInt(Feature.atomics_32)] = .{ | |
| 256 | .llvm_name = "atomics-32", | |
| 257 | .description = "Assume that lock-free 32-bit atomics are available", | |
| 258 | .dependencies = featureSet(&[_]Feature{}), | |
| 259 | }; | |
| 238 | 260 | result[@enumToInt(Feature.avoid_movs_shop)] = .{ |
| 239 | 261 | .llvm_name = "avoid-movs-shop", |
| 240 | 262 | .description = "Avoid movs instructions with shifter operand", |
| ... | ... | @@ -408,6 +430,11 @@ pub const all_features = blk: { |
| 408 | 430 | .description = "Mitigate against the cve-2021-35465 security vulnurability", |
| 409 | 431 | .dependencies = featureSet(&[_]Feature{}), |
| 410 | 432 | }; |
| 433 | result[@enumToInt(Feature.fix_cortex_a57_aes_1742098)] = .{ | |
| 434 | .llvm_name = "fix-cortex-a57-aes-1742098", | |
| 435 | .description = "Work around Cortex-A57 Erratum 1742098 / Cortex-A72 Erratum 1655431 (AES)", | |
| 436 | .dependencies = featureSet(&[_]Feature{}), | |
| 437 | }; | |
| 411 | 438 | result[@enumToInt(Feature.fp16)] = .{ |
| 412 | 439 | .llvm_name = "fp16", |
| 413 | 440 | .description = "Enable half-precision floating point", |
| ... | ... | @@ -989,6 +1016,11 @@ pub const all_features = blk: { |
| 989 | 1016 | .description = "Enable support for TrustZone security extensions", |
| 990 | 1017 | .dependencies = featureSet(&[_]Feature{}), |
| 991 | 1018 | }; |
| 1019 | result[@enumToInt(Feature.use_mipipeliner)] = .{ | |
| 1020 | .llvm_name = "use-mipipeliner", | |
| 1021 | .description = "Use the MachinePipeliner", | |
| 1022 | .dependencies = featureSet(&[_]Feature{}), | |
| 1023 | }; | |
| 992 | 1024 | result[@enumToInt(Feature.use_misched)] = .{ |
| 993 | 1025 | .llvm_name = "use-misched", |
| 994 | 1026 | .description = "Use the MachineScheduler", |
| ... | ... | @@ -1911,6 +1943,7 @@ pub const cpu = struct { |
| 1911 | 1943 | .features = featureSet(&[_]Feature{ |
| 1912 | 1944 | .avoid_partial_cpsr, |
| 1913 | 1945 | .cheap_predicable_cpsr, |
| 1946 | .fix_cortex_a57_aes_1742098, | |
| 1914 | 1947 | .fpao, |
| 1915 | 1948 | .v8a, |
| 1916 | 1949 | }), |
| ... | ... | @@ -1946,6 +1979,7 @@ pub const cpu = struct { |
| 1946 | 1979 | .name = "cortex_a72", |
| 1947 | 1980 | .llvm_name = "cortex-a72", |
| 1948 | 1981 | .features = featureSet(&[_]Feature{ |
| 1982 | .fix_cortex_a57_aes_1742098, | |
| 1949 | 1983 | .v8a, |
| 1950 | 1984 | }), |
| 1951 | 1985 | }; |
| ... | ... | @@ -2151,10 +2185,22 @@ pub const cpu = struct { |
| 2151 | 2185 | .llvm_name = "cortex-m7", |
| 2152 | 2186 | .features = featureSet(&[_]Feature{ |
| 2153 | 2187 | .fp_armv8d16, |
| 2188 | .use_mipipeliner, | |
| 2154 | 2189 | .use_misched, |
| 2155 | 2190 | .v7em, |
| 2156 | 2191 | }), |
| 2157 | 2192 | }; |
| 2193 | pub const cortex_m85 = CpuModel{ | |
| 2194 | .name = "cortex_m85", | |
| 2195 | .llvm_name = "cortex-m85", | |
| 2196 | .features = featureSet(&[_]Feature{ | |
| 2197 | .fp_armv8d16, | |
| 2198 | .mve_fp, | |
| 2199 | .pacbti, | |
| 2200 | .use_misched, | |
| 2201 | .v8_1m_main, | |
| 2202 | }), | |
| 2203 | }; | |
| 2158 | 2204 | pub const cortex_r4 = CpuModel{ |
| 2159 | 2205 | .name = "cortex_r4", |
| 2160 | 2206 | .llvm_name = "cortex-r4", |
lib/std/target/avr.zig+151-33| ... | ... | @@ -38,6 +38,7 @@ pub const Feature = enum { |
| 38 | 38 | sram, |
| 39 | 39 | tinyencoding, |
| 40 | 40 | xmega, |
| 41 | xmega3, | |
| 41 | 42 | xmegau, |
| 42 | 43 | }; |
| 43 | 44 | |
| ... | ... | @@ -163,6 +164,7 @@ pub const all_features = blk: { |
| 163 | 164 | .dependencies = featureSet(&[_]Feature{ |
| 164 | 165 | .avr0, |
| 165 | 166 | .@"break", |
| 167 | .smallstack, | |
| 166 | 168 | .sram, |
| 167 | 169 | .tinyencoding, |
| 168 | 170 | }), |
| ... | ... | @@ -302,6 +304,22 @@ pub const all_features = blk: { |
| 302 | 304 | .sram, |
| 303 | 305 | }), |
| 304 | 306 | }; |
| 307 | result[@enumToInt(Feature.xmega3)] = .{ | |
| 308 | .llvm_name = "xmega3", | |
| 309 | .description = "The device is a part of the xmega3 family", | |
| 310 | .dependencies = featureSet(&[_]Feature{ | |
| 311 | .addsubiw, | |
| 312 | .avr0, | |
| 313 | .@"break", | |
| 314 | .ijmpcall, | |
| 315 | .jmpcall, | |
| 316 | .lpm, | |
| 317 | .lpmx, | |
| 318 | .movw, | |
| 319 | .mul, | |
| 320 | .sram, | |
| 321 | }), | |
| 322 | }; | |
| 305 | 323 | result[@enumToInt(Feature.xmegau)] = .{ |
| 306 | 324 | .llvm_name = "xmegau", |
| 307 | 325 | .description = "The device is a part of the xmegau family", |
| ... | ... | @@ -445,6 +463,7 @@ pub const cpu = struct { |
| 445 | 463 | .llvm_name = "at90s1200", |
| 446 | 464 | .features = featureSet(&[_]Feature{ |
| 447 | 465 | .avr0, |
| 466 | .smallstack, | |
| 448 | 467 | }), |
| 449 | 468 | }; |
| 450 | 469 | pub const at90s2313 = CpuModel{ |
| ... | ... | @@ -452,6 +471,7 @@ pub const cpu = struct { |
| 452 | 471 | .llvm_name = "at90s2313", |
| 453 | 472 | .features = featureSet(&[_]Feature{ |
| 454 | 473 | .avr2, |
| 474 | .smallstack, | |
| 455 | 475 | }), |
| 456 | 476 | }; |
| 457 | 477 | pub const at90s2323 = CpuModel{ |
| ... | ... | @@ -459,6 +479,7 @@ pub const cpu = struct { |
| 459 | 479 | .llvm_name = "at90s2323", |
| 460 | 480 | .features = featureSet(&[_]Feature{ |
| 461 | 481 | .avr2, |
| 482 | .smallstack, | |
| 462 | 483 | }), |
| 463 | 484 | }; |
| 464 | 485 | pub const at90s2333 = CpuModel{ |
| ... | ... | @@ -466,6 +487,7 @@ pub const cpu = struct { |
| 466 | 487 | .llvm_name = "at90s2333", |
| 467 | 488 | .features = featureSet(&[_]Feature{ |
| 468 | 489 | .avr2, |
| 490 | .smallstack, | |
| 469 | 491 | }), |
| 470 | 492 | }; |
| 471 | 493 | pub const at90s2343 = CpuModel{ |
| ... | ... | @@ -473,6 +495,7 @@ pub const cpu = struct { |
| 473 | 495 | .llvm_name = "at90s2343", |
| 474 | 496 | .features = featureSet(&[_]Feature{ |
| 475 | 497 | .avr2, |
| 498 | .smallstack, | |
| 476 | 499 | }), |
| 477 | 500 | }; |
| 478 | 501 | pub const at90s4414 = CpuModel{ |
| ... | ... | @@ -480,6 +503,7 @@ pub const cpu = struct { |
| 480 | 503 | .llvm_name = "at90s4414", |
| 481 | 504 | .features = featureSet(&[_]Feature{ |
| 482 | 505 | .avr2, |
| 506 | .smallstack, | |
| 483 | 507 | }), |
| 484 | 508 | }; |
| 485 | 509 | pub const at90s4433 = CpuModel{ |
| ... | ... | @@ -487,6 +511,7 @@ pub const cpu = struct { |
| 487 | 511 | .llvm_name = "at90s4433", |
| 488 | 512 | .features = featureSet(&[_]Feature{ |
| 489 | 513 | .avr2, |
| 514 | .smallstack, | |
| 490 | 515 | }), |
| 491 | 516 | }; |
| 492 | 517 | pub const at90s4434 = CpuModel{ |
| ... | ... | @@ -494,6 +519,7 @@ pub const cpu = struct { |
| 494 | 519 | .llvm_name = "at90s4434", |
| 495 | 520 | .features = featureSet(&[_]Feature{ |
| 496 | 521 | .avr2, |
| 522 | .smallstack, | |
| 497 | 523 | }), |
| 498 | 524 | }; |
| 499 | 525 | pub const at90s8515 = CpuModel{ |
| ... | ... | @@ -674,6 +700,13 @@ pub const cpu = struct { |
| 674 | 700 | .avr5, |
| 675 | 701 | }), |
| 676 | 702 | }; |
| 703 | pub const ata6616c = CpuModel{ | |
| 704 | .name = "ata6616c", | |
| 705 | .llvm_name = "ata6616c", | |
| 706 | .features = featureSet(&[_]Feature{ | |
| 707 | .avr25, | |
| 708 | }), | |
| 709 | }; | |
| 677 | 710 | pub const ata6617c = CpuModel{ |
| 678 | 711 | .name = "ata6617c", |
| 679 | 712 | .llvm_name = "ata6617c", |
| ... | ... | @@ -779,6 +812,20 @@ pub const cpu = struct { |
| 779 | 812 | .avr5, |
| 780 | 813 | }), |
| 781 | 814 | }; |
| 815 | pub const atmega1608 = CpuModel{ | |
| 816 | .name = "atmega1608", | |
| 817 | .llvm_name = "atmega1608", | |
| 818 | .features = featureSet(&[_]Feature{ | |
| 819 | .xmega3, | |
| 820 | }), | |
| 821 | }; | |
| 822 | pub const atmega1609 = CpuModel{ | |
| 823 | .name = "atmega1609", | |
| 824 | .llvm_name = "atmega1609", | |
| 825 | .features = featureSet(&[_]Feature{ | |
| 826 | .xmega3, | |
| 827 | }), | |
| 828 | }; | |
| 782 | 829 | pub const atmega161 = CpuModel{ |
| 783 | 830 | .name = "atmega161", |
| 784 | 831 | .llvm_name = "atmega161", |
| ... | ... | @@ -1011,6 +1058,20 @@ pub const cpu = struct { |
| 1011 | 1058 | .avr5, |
| 1012 | 1059 | }), |
| 1013 | 1060 | }; |
| 1061 | pub const atmega3208 = CpuModel{ | |
| 1062 | .name = "atmega3208", | |
| 1063 | .llvm_name = "atmega3208", | |
| 1064 | .features = featureSet(&[_]Feature{ | |
| 1065 | .xmega3, | |
| 1066 | }), | |
| 1067 | }; | |
| 1068 | pub const atmega3209 = CpuModel{ | |
| 1069 | .name = "atmega3209", | |
| 1070 | .llvm_name = "atmega3209", | |
| 1071 | .features = featureSet(&[_]Feature{ | |
| 1072 | .xmega3, | |
| 1073 | }), | |
| 1074 | }; | |
| 1014 | 1075 | pub const atmega323 = CpuModel{ |
| 1015 | 1076 | .name = "atmega323", |
| 1016 | 1077 | .llvm_name = "atmega323", |
| ... | ... | @@ -1249,6 +1310,20 @@ pub const cpu = struct { |
| 1249 | 1310 | .avr4, |
| 1250 | 1311 | }), |
| 1251 | 1312 | }; |
| 1313 | pub const atmega4808 = CpuModel{ | |
| 1314 | .name = "atmega4808", | |
| 1315 | .llvm_name = "atmega4808", | |
| 1316 | .features = featureSet(&[_]Feature{ | |
| 1317 | .xmega3, | |
| 1318 | }), | |
| 1319 | }; | |
| 1320 | pub const atmega4809 = CpuModel{ | |
| 1321 | .name = "atmega4809", | |
| 1322 | .llvm_name = "atmega4809", | |
| 1323 | .features = featureSet(&[_]Feature{ | |
| 1324 | .xmega3, | |
| 1325 | }), | |
| 1326 | }; | |
| 1252 | 1327 | pub const atmega48a = CpuModel{ |
| 1253 | 1328 | .name = "atmega48a", |
| 1254 | 1329 | .llvm_name = "atmega48a", |
| ... | ... | @@ -1463,6 +1538,20 @@ pub const cpu = struct { |
| 1463 | 1538 | .spm, |
| 1464 | 1539 | }), |
| 1465 | 1540 | }; |
| 1541 | pub const atmega808 = CpuModel{ | |
| 1542 | .name = "atmega808", | |
| 1543 | .llvm_name = "atmega808", | |
| 1544 | .features = featureSet(&[_]Feature{ | |
| 1545 | .xmega3, | |
| 1546 | }), | |
| 1547 | }; | |
| 1548 | pub const atmega809 = CpuModel{ | |
| 1549 | .name = "atmega809", | |
| 1550 | .llvm_name = "atmega809", | |
| 1551 | .features = featureSet(&[_]Feature{ | |
| 1552 | .xmega3, | |
| 1553 | }), | |
| 1554 | }; | |
| 1466 | 1555 | pub const atmega8515 = CpuModel{ |
| 1467 | 1556 | .name = "atmega8515", |
| 1468 | 1557 | .llvm_name = "atmega8515", |
| ... | ... | @@ -1571,6 +1660,7 @@ pub const cpu = struct { |
| 1571 | 1660 | .llvm_name = "attiny11", |
| 1572 | 1661 | .features = featureSet(&[_]Feature{ |
| 1573 | 1662 | .avr1, |
| 1663 | .smallstack, | |
| 1574 | 1664 | }), |
| 1575 | 1665 | }; |
| 1576 | 1666 | pub const attiny12 = CpuModel{ |
| ... | ... | @@ -1578,6 +1668,7 @@ pub const cpu = struct { |
| 1578 | 1668 | .llvm_name = "attiny12", |
| 1579 | 1669 | .features = featureSet(&[_]Feature{ |
| 1580 | 1670 | .avr1, |
| 1671 | .smallstack, | |
| 1581 | 1672 | }), |
| 1582 | 1673 | }; |
| 1583 | 1674 | pub const attiny13 = CpuModel{ |
| ... | ... | @@ -1585,6 +1676,7 @@ pub const cpu = struct { |
| 1585 | 1676 | .llvm_name = "attiny13", |
| 1586 | 1677 | .features = featureSet(&[_]Feature{ |
| 1587 | 1678 | .avr25, |
| 1679 | .smallstack, | |
| 1588 | 1680 | }), |
| 1589 | 1681 | }; |
| 1590 | 1682 | pub const attiny13a = CpuModel{ |
| ... | ... | @@ -1592,6 +1684,7 @@ pub const cpu = struct { |
| 1592 | 1684 | .llvm_name = "attiny13a", |
| 1593 | 1685 | .features = featureSet(&[_]Feature{ |
| 1594 | 1686 | .avr25, |
| 1687 | .smallstack, | |
| 1595 | 1688 | }), |
| 1596 | 1689 | }; |
| 1597 | 1690 | pub const attiny15 = CpuModel{ |
| ... | ... | @@ -1599,48 +1692,70 @@ pub const cpu = struct { |
| 1599 | 1692 | .llvm_name = "attiny15", |
| 1600 | 1693 | .features = featureSet(&[_]Feature{ |
| 1601 | 1694 | .avr1, |
| 1695 | .smallstack, | |
| 1602 | 1696 | }), |
| 1603 | 1697 | }; |
| 1604 | 1698 | pub const attiny1604 = CpuModel{ |
| 1605 | 1699 | .name = "attiny1604", |
| 1606 | 1700 | .llvm_name = "attiny1604", |
| 1607 | 1701 | .features = featureSet(&[_]Feature{ |
| 1608 | .xmega, | |
| 1702 | .xmega3, | |
| 1609 | 1703 | }), |
| 1610 | 1704 | }; |
| 1611 | 1705 | pub const attiny1606 = CpuModel{ |
| 1612 | 1706 | .name = "attiny1606", |
| 1613 | 1707 | .llvm_name = "attiny1606", |
| 1614 | 1708 | .features = featureSet(&[_]Feature{ |
| 1615 | .xmega, | |
| 1709 | .xmega3, | |
| 1616 | 1710 | }), |
| 1617 | 1711 | }; |
| 1618 | 1712 | pub const attiny1607 = CpuModel{ |
| 1619 | 1713 | .name = "attiny1607", |
| 1620 | 1714 | .llvm_name = "attiny1607", |
| 1621 | 1715 | .features = featureSet(&[_]Feature{ |
| 1622 | .xmega, | |
| 1716 | .xmega3, | |
| 1623 | 1717 | }), |
| 1624 | 1718 | }; |
| 1625 | 1719 | pub const attiny1614 = CpuModel{ |
| 1626 | 1720 | .name = "attiny1614", |
| 1627 | 1721 | .llvm_name = "attiny1614", |
| 1628 | 1722 | .features = featureSet(&[_]Feature{ |
| 1629 | .xmega, | |
| 1723 | .xmega3, | |
| 1630 | 1724 | }), |
| 1631 | 1725 | }; |
| 1632 | 1726 | pub const attiny1616 = CpuModel{ |
| 1633 | 1727 | .name = "attiny1616", |
| 1634 | 1728 | .llvm_name = "attiny1616", |
| 1635 | 1729 | .features = featureSet(&[_]Feature{ |
| 1636 | .xmega, | |
| 1730 | .xmega3, | |
| 1637 | 1731 | }), |
| 1638 | 1732 | }; |
| 1639 | 1733 | pub const attiny1617 = CpuModel{ |
| 1640 | 1734 | .name = "attiny1617", |
| 1641 | 1735 | .llvm_name = "attiny1617", |
| 1642 | 1736 | .features = featureSet(&[_]Feature{ |
| 1643 | .xmega, | |
| 1737 | .xmega3, | |
| 1738 | }), | |
| 1739 | }; | |
| 1740 | pub const attiny1624 = CpuModel{ | |
| 1741 | .name = "attiny1624", | |
| 1742 | .llvm_name = "attiny1624", | |
| 1743 | .features = featureSet(&[_]Feature{ | |
| 1744 | .xmega3, | |
| 1745 | }), | |
| 1746 | }; | |
| 1747 | pub const attiny1626 = CpuModel{ | |
| 1748 | .name = "attiny1626", | |
| 1749 | .llvm_name = "attiny1626", | |
| 1750 | .features = featureSet(&[_]Feature{ | |
| 1751 | .xmega3, | |
| 1752 | }), | |
| 1753 | }; | |
| 1754 | pub const attiny1627 = CpuModel{ | |
| 1755 | .name = "attiny1627", | |
| 1756 | .llvm_name = "attiny1627", | |
| 1757 | .features = featureSet(&[_]Feature{ | |
| 1758 | .xmega3, | |
| 1644 | 1759 | }), |
| 1645 | 1760 | }; |
| 1646 | 1761 | pub const attiny1634 = CpuModel{ |
| ... | ... | @@ -1668,28 +1783,28 @@ pub const cpu = struct { |
| 1668 | 1783 | .name = "attiny202", |
| 1669 | 1784 | .llvm_name = "attiny202", |
| 1670 | 1785 | .features = featureSet(&[_]Feature{ |
| 1671 | .xmega, | |
| 1786 | .xmega3, | |
| 1672 | 1787 | }), |
| 1673 | 1788 | }; |
| 1674 | 1789 | pub const attiny204 = CpuModel{ |
| 1675 | 1790 | .name = "attiny204", |
| 1676 | 1791 | .llvm_name = "attiny204", |
| 1677 | 1792 | .features = featureSet(&[_]Feature{ |
| 1678 | .xmega, | |
| 1793 | .xmega3, | |
| 1679 | 1794 | }), |
| 1680 | 1795 | }; |
| 1681 | 1796 | pub const attiny212 = CpuModel{ |
| 1682 | 1797 | .name = "attiny212", |
| 1683 | 1798 | .llvm_name = "attiny212", |
| 1684 | 1799 | .features = featureSet(&[_]Feature{ |
| 1685 | .xmega, | |
| 1800 | .xmega3, | |
| 1686 | 1801 | }), |
| 1687 | 1802 | }; |
| 1688 | 1803 | pub const attiny214 = CpuModel{ |
| 1689 | 1804 | .name = "attiny214", |
| 1690 | 1805 | .llvm_name = "attiny214", |
| 1691 | 1806 | .features = featureSet(&[_]Feature{ |
| 1692 | .xmega, | |
| 1807 | .xmega3, | |
| 1693 | 1808 | }), |
| 1694 | 1809 | }; |
| 1695 | 1810 | pub const attiny22 = CpuModel{ |
| ... | ... | @@ -1697,6 +1812,7 @@ pub const cpu = struct { |
| 1697 | 1812 | .llvm_name = "attiny22", |
| 1698 | 1813 | .features = featureSet(&[_]Feature{ |
| 1699 | 1814 | .avr2, |
| 1815 | .smallstack, | |
| 1700 | 1816 | }), |
| 1701 | 1817 | }; |
| 1702 | 1818 | pub const attiny2313 = CpuModel{ |
| ... | ... | @@ -1704,6 +1820,7 @@ pub const cpu = struct { |
| 1704 | 1820 | .llvm_name = "attiny2313", |
| 1705 | 1821 | .features = featureSet(&[_]Feature{ |
| 1706 | 1822 | .avr25, |
| 1823 | .smallstack, | |
| 1707 | 1824 | }), |
| 1708 | 1825 | }; |
| 1709 | 1826 | pub const attiny2313a = CpuModel{ |
| ... | ... | @@ -1711,6 +1828,7 @@ pub const cpu = struct { |
| 1711 | 1828 | .llvm_name = "attiny2313a", |
| 1712 | 1829 | .features = featureSet(&[_]Feature{ |
| 1713 | 1830 | .avr25, |
| 1831 | .smallstack, | |
| 1714 | 1832 | }), |
| 1715 | 1833 | }; |
| 1716 | 1834 | pub const attiny24 = CpuModel{ |
| ... | ... | @@ -1718,6 +1836,7 @@ pub const cpu = struct { |
| 1718 | 1836 | .llvm_name = "attiny24", |
| 1719 | 1837 | .features = featureSet(&[_]Feature{ |
| 1720 | 1838 | .avr25, |
| 1839 | .smallstack, | |
| 1721 | 1840 | }), |
| 1722 | 1841 | }; |
| 1723 | 1842 | pub const attiny24a = CpuModel{ |
| ... | ... | @@ -1725,6 +1844,7 @@ pub const cpu = struct { |
| 1725 | 1844 | .llvm_name = "attiny24a", |
| 1726 | 1845 | .features = featureSet(&[_]Feature{ |
| 1727 | 1846 | .avr25, |
| 1847 | .smallstack, | |
| 1728 | 1848 | }), |
| 1729 | 1849 | }; |
| 1730 | 1850 | pub const attiny25 = CpuModel{ |
| ... | ... | @@ -1732,6 +1852,7 @@ pub const cpu = struct { |
| 1732 | 1852 | .llvm_name = "attiny25", |
| 1733 | 1853 | .features = featureSet(&[_]Feature{ |
| 1734 | 1854 | .avr25, |
| 1855 | .smallstack, | |
| 1735 | 1856 | }), |
| 1736 | 1857 | }; |
| 1737 | 1858 | pub const attiny26 = CpuModel{ |
| ... | ... | @@ -1740,6 +1861,7 @@ pub const cpu = struct { |
| 1740 | 1861 | .features = featureSet(&[_]Feature{ |
| 1741 | 1862 | .avr2, |
| 1742 | 1863 | .lpmx, |
| 1864 | .smallstack, | |
| 1743 | 1865 | }), |
| 1744 | 1866 | }; |
| 1745 | 1867 | pub const attiny261 = CpuModel{ |
| ... | ... | @@ -1747,6 +1869,7 @@ pub const cpu = struct { |
| 1747 | 1869 | .llvm_name = "attiny261", |
| 1748 | 1870 | .features = featureSet(&[_]Feature{ |
| 1749 | 1871 | .avr25, |
| 1872 | .smallstack, | |
| 1750 | 1873 | }), |
| 1751 | 1874 | }; |
| 1752 | 1875 | pub const attiny261a = CpuModel{ |
| ... | ... | @@ -1754,6 +1877,7 @@ pub const cpu = struct { |
| 1754 | 1877 | .llvm_name = "attiny261a", |
| 1755 | 1878 | .features = featureSet(&[_]Feature{ |
| 1756 | 1879 | .avr25, |
| 1880 | .smallstack, | |
| 1757 | 1881 | }), |
| 1758 | 1882 | }; |
| 1759 | 1883 | pub const attiny28 = CpuModel{ |
| ... | ... | @@ -1761,20 +1885,21 @@ pub const cpu = struct { |
| 1761 | 1885 | .llvm_name = "attiny28", |
| 1762 | 1886 | .features = featureSet(&[_]Feature{ |
| 1763 | 1887 | .avr1, |
| 1888 | .smallstack, | |
| 1764 | 1889 | }), |
| 1765 | 1890 | }; |
| 1766 | 1891 | pub const attiny3216 = CpuModel{ |
| 1767 | 1892 | .name = "attiny3216", |
| 1768 | 1893 | .llvm_name = "attiny3216", |
| 1769 | 1894 | .features = featureSet(&[_]Feature{ |
| 1770 | .xmega, | |
| 1895 | .xmega3, | |
| 1771 | 1896 | }), |
| 1772 | 1897 | }; |
| 1773 | 1898 | pub const attiny3217 = CpuModel{ |
| 1774 | 1899 | .name = "attiny3217", |
| 1775 | 1900 | .llvm_name = "attiny3217", |
| 1776 | 1901 | .features = featureSet(&[_]Feature{ |
| 1777 | .xmega, | |
| 1902 | .xmega3, | |
| 1778 | 1903 | }), |
| 1779 | 1904 | }; |
| 1780 | 1905 | pub const attiny4 = CpuModel{ |
| ... | ... | @@ -1795,49 +1920,49 @@ pub const cpu = struct { |
| 1795 | 1920 | .name = "attiny402", |
| 1796 | 1921 | .llvm_name = "attiny402", |
| 1797 | 1922 | .features = featureSet(&[_]Feature{ |
| 1798 | .xmega, | |
| 1923 | .xmega3, | |
| 1799 | 1924 | }), |
| 1800 | 1925 | }; |
| 1801 | 1926 | pub const attiny404 = CpuModel{ |
| 1802 | 1927 | .name = "attiny404", |
| 1803 | 1928 | .llvm_name = "attiny404", |
| 1804 | 1929 | .features = featureSet(&[_]Feature{ |
| 1805 | .xmega, | |
| 1930 | .xmega3, | |
| 1806 | 1931 | }), |
| 1807 | 1932 | }; |
| 1808 | 1933 | pub const attiny406 = CpuModel{ |
| 1809 | 1934 | .name = "attiny406", |
| 1810 | 1935 | .llvm_name = "attiny406", |
| 1811 | 1936 | .features = featureSet(&[_]Feature{ |
| 1812 | .xmega, | |
| 1937 | .xmega3, | |
| 1813 | 1938 | }), |
| 1814 | 1939 | }; |
| 1815 | 1940 | pub const attiny412 = CpuModel{ |
| 1816 | 1941 | .name = "attiny412", |
| 1817 | 1942 | .llvm_name = "attiny412", |
| 1818 | 1943 | .features = featureSet(&[_]Feature{ |
| 1819 | .xmega, | |
| 1944 | .xmega3, | |
| 1820 | 1945 | }), |
| 1821 | 1946 | }; |
| 1822 | 1947 | pub const attiny414 = CpuModel{ |
| 1823 | 1948 | .name = "attiny414", |
| 1824 | 1949 | .llvm_name = "attiny414", |
| 1825 | 1950 | .features = featureSet(&[_]Feature{ |
| 1826 | .xmega, | |
| 1951 | .xmega3, | |
| 1827 | 1952 | }), |
| 1828 | 1953 | }; |
| 1829 | 1954 | pub const attiny416 = CpuModel{ |
| 1830 | 1955 | .name = "attiny416", |
| 1831 | 1956 | .llvm_name = "attiny416", |
| 1832 | 1957 | .features = featureSet(&[_]Feature{ |
| 1833 | .xmega, | |
| 1958 | .xmega3, | |
| 1834 | 1959 | }), |
| 1835 | 1960 | }; |
| 1836 | 1961 | pub const attiny417 = CpuModel{ |
| 1837 | 1962 | .name = "attiny417", |
| 1838 | 1963 | .llvm_name = "attiny417", |
| 1839 | 1964 | .features = featureSet(&[_]Feature{ |
| 1840 | .xmega, | |
| 1965 | .xmega3, | |
| 1841 | 1966 | }), |
| 1842 | 1967 | }; |
| 1843 | 1968 | pub const attiny4313 = CpuModel{ |
| ... | ... | @@ -1914,42 +2039,42 @@ pub const cpu = struct { |
| 1914 | 2039 | .name = "attiny804", |
| 1915 | 2040 | .llvm_name = "attiny804", |
| 1916 | 2041 | .features = featureSet(&[_]Feature{ |
| 1917 | .xmega, | |
| 2042 | .xmega3, | |
| 1918 | 2043 | }), |
| 1919 | 2044 | }; |
| 1920 | 2045 | pub const attiny806 = CpuModel{ |
| 1921 | 2046 | .name = "attiny806", |
| 1922 | 2047 | .llvm_name = "attiny806", |
| 1923 | 2048 | .features = featureSet(&[_]Feature{ |
| 1924 | .xmega, | |
| 2049 | .xmega3, | |
| 1925 | 2050 | }), |
| 1926 | 2051 | }; |
| 1927 | 2052 | pub const attiny807 = CpuModel{ |
| 1928 | 2053 | .name = "attiny807", |
| 1929 | 2054 | .llvm_name = "attiny807", |
| 1930 | 2055 | .features = featureSet(&[_]Feature{ |
| 1931 | .xmega, | |
| 2056 | .xmega3, | |
| 1932 | 2057 | }), |
| 1933 | 2058 | }; |
| 1934 | 2059 | pub const attiny814 = CpuModel{ |
| 1935 | 2060 | .name = "attiny814", |
| 1936 | 2061 | .llvm_name = "attiny814", |
| 1937 | 2062 | .features = featureSet(&[_]Feature{ |
| 1938 | .xmega, | |
| 2063 | .xmega3, | |
| 1939 | 2064 | }), |
| 1940 | 2065 | }; |
| 1941 | 2066 | pub const attiny816 = CpuModel{ |
| 1942 | 2067 | .name = "attiny816", |
| 1943 | 2068 | .llvm_name = "attiny816", |
| 1944 | 2069 | .features = featureSet(&[_]Feature{ |
| 1945 | .xmega, | |
| 2070 | .xmega3, | |
| 1946 | 2071 | }), |
| 1947 | 2072 | }; |
| 1948 | 2073 | pub const attiny817 = CpuModel{ |
| 1949 | 2074 | .name = "attiny817", |
| 1950 | 2075 | .llvm_name = "attiny817", |
| 1951 | 2076 | .features = featureSet(&[_]Feature{ |
| 1952 | .xmega, | |
| 2077 | .xmega3, | |
| 1953 | 2078 | }), |
| 1954 | 2079 | }; |
| 1955 | 2080 | pub const attiny828 = CpuModel{ |
| ... | ... | @@ -2246,13 +2371,6 @@ pub const cpu = struct { |
| 2246 | 2371 | .xmegau, |
| 2247 | 2372 | }), |
| 2248 | 2373 | }; |
| 2249 | pub const atxmega32x1 = CpuModel{ | |
| 2250 | .name = "atxmega32x1", | |
| 2251 | .llvm_name = "atxmega32x1", | |
| 2252 | .features = featureSet(&[_]Feature{ | |
| 2253 | .xmega, | |
| 2254 | }), | |
| 2255 | }; | |
| 2256 | 2374 | pub const atxmega384c3 = CpuModel{ |
| 2257 | 2375 | .name = "atxmega384c3", |
| 2258 | 2376 | .llvm_name = "atxmega384c3", |
| ... | ... | @@ -2439,7 +2557,7 @@ pub const cpu = struct { |
| 2439 | 2557 | .name = "avrxmega3", |
| 2440 | 2558 | .llvm_name = "avrxmega3", |
| 2441 | 2559 | .features = featureSet(&[_]Feature{ |
| 2442 | .xmega, | |
| 2560 | .xmega3, | |
| 2443 | 2561 | }), |
| 2444 | 2562 | }; |
| 2445 | 2563 | pub const avrxmega4 = CpuModel{ |
lib/std/target/csky.zig+3049| ... | ... | @@ -8,22 +8,66 @@ pub const Feature = enum { |
| 8 | 8 | @"10e60", |
| 9 | 9 | @"2e3", |
| 10 | 10 | @"3e3r1", |
| 11 | @"3e3r2", | |
| 11 | 12 | @"3e3r3", |
| 12 | 13 | @"3e7", |
| 13 | 14 | @"7e10", |
| 14 | 15 | btst16, |
| 16 | cache, | |
| 17 | ccrt, | |
| 18 | ck801, | |
| 19 | ck802, | |
| 20 | ck803, | |
| 21 | ck803s, | |
| 22 | ck804, | |
| 23 | ck805, | |
| 24 | ck807, | |
| 25 | ck810, | |
| 26 | ck810v, | |
| 27 | ck860, | |
| 28 | ck860v, | |
| 29 | constpool, | |
| 15 | 30 | doloop, |
| 31 | dsp1e2, | |
| 32 | dsp_silan, | |
| 33 | dspe60, | |
| 34 | dspv2, | |
| 16 | 35 | e1, |
| 17 | 36 | e2, |
| 37 | edsp, | |
| 18 | 38 | elrw, |
| 39 | fdivdu, | |
| 40 | float1e2, | |
| 41 | float1e3, | |
| 42 | float3e4, | |
| 43 | float7e60, | |
| 44 | floate1, | |
| 19 | 45 | fpuv2_df, |
| 20 | 46 | fpuv2_sf, |
| 21 | 47 | fpuv3_df, |
| 48 | fpuv3_hf, | |
| 49 | fpuv3_hi, | |
| 22 | 50 | fpuv3_sf, |
| 23 | 51 | hard_float, |
| 24 | 52 | hard_float_abi, |
| 53 | hard_tp, | |
| 54 | high_registers, | |
| 55 | hwdiv, | |
| 56 | istack, | |
| 25 | 57 | java, |
| 58 | mp, | |
| 26 | 59 | mp1e2, |
| 60 | multiple_stld, | |
| 61 | nvic, | |
| 62 | pushpop, | |
| 63 | smart, | |
| 64 | soft_tp, | |
| 65 | stack_size, | |
| 66 | trust, | |
| 67 | vdsp2e3, | |
| 68 | vdsp2e60f, | |
| 69 | vdspv1, | |
| 70 | vdspv2, | |
| 27 | 71 | }; |
| 28 | 72 | |
| 29 | 73 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; |
| ... | ... | @@ -54,6 +98,14 @@ pub const all_features = blk: { |
| 54 | 98 | .description = "Support CSKY 3e3r1 instructions", |
| 55 | 99 | .dependencies = featureSet(&[_]Feature{}), |
| 56 | 100 | }; |
| 101 | result[@enumToInt(Feature.@"3e3r2")] = .{ | |
| 102 | .llvm_name = "3e3r2", | |
| 103 | .description = "Support CSKY 3e3r2 instructions", | |
| 104 | .dependencies = featureSet(&[_]Feature{ | |
| 105 | .@"3e3r1", | |
| 106 | .doloop, | |
| 107 | }), | |
| 108 | }; | |
| 57 | 109 | result[@enumToInt(Feature.@"3e3r3")] = .{ |
| 58 | 110 | .llvm_name = "3e3r3", |
| 59 | 111 | .description = "Support CSKY 3e3r3 instructions", |
| ... | ... | @@ -80,11 +132,101 @@ pub const all_features = blk: { |
| 80 | 132 | .description = "Use the 16-bit btsti instruction", |
| 81 | 133 | .dependencies = featureSet(&[_]Feature{}), |
| 82 | 134 | }; |
| 135 | result[@enumToInt(Feature.cache)] = .{ | |
| 136 | .llvm_name = "cache", | |
| 137 | .description = "Enable cache", | |
| 138 | .dependencies = featureSet(&[_]Feature{}), | |
| 139 | }; | |
| 140 | result[@enumToInt(Feature.ccrt)] = .{ | |
| 141 | .llvm_name = "ccrt", | |
| 142 | .description = "Use CSKY compiler runtime", | |
| 143 | .dependencies = featureSet(&[_]Feature{}), | |
| 144 | }; | |
| 145 | result[@enumToInt(Feature.ck801)] = .{ | |
| 146 | .llvm_name = "ck801", | |
| 147 | .description = "CSKY ck801 processors", | |
| 148 | .dependencies = featureSet(&[_]Feature{}), | |
| 149 | }; | |
| 150 | result[@enumToInt(Feature.ck802)] = .{ | |
| 151 | .llvm_name = "ck802", | |
| 152 | .description = "CSKY ck802 processors", | |
| 153 | .dependencies = featureSet(&[_]Feature{}), | |
| 154 | }; | |
| 155 | result[@enumToInt(Feature.ck803)] = .{ | |
| 156 | .llvm_name = "ck803", | |
| 157 | .description = "CSKY ck803 processors", | |
| 158 | .dependencies = featureSet(&[_]Feature{}), | |
| 159 | }; | |
| 160 | result[@enumToInt(Feature.ck803s)] = .{ | |
| 161 | .llvm_name = "ck803s", | |
| 162 | .description = "CSKY ck803s processors", | |
| 163 | .dependencies = featureSet(&[_]Feature{}), | |
| 164 | }; | |
| 165 | result[@enumToInt(Feature.ck804)] = .{ | |
| 166 | .llvm_name = "ck804", | |
| 167 | .description = "CSKY ck804 processors", | |
| 168 | .dependencies = featureSet(&[_]Feature{}), | |
| 169 | }; | |
| 170 | result[@enumToInt(Feature.ck805)] = .{ | |
| 171 | .llvm_name = "ck805", | |
| 172 | .description = "CSKY ck805 processors", | |
| 173 | .dependencies = featureSet(&[_]Feature{}), | |
| 174 | }; | |
| 175 | result[@enumToInt(Feature.ck807)] = .{ | |
| 176 | .llvm_name = "ck807", | |
| 177 | .description = "CSKY ck807 processors", | |
| 178 | .dependencies = featureSet(&[_]Feature{}), | |
| 179 | }; | |
| 180 | result[@enumToInt(Feature.ck810)] = .{ | |
| 181 | .llvm_name = "ck810", | |
| 182 | .description = "CSKY ck810 processors", | |
| 183 | .dependencies = featureSet(&[_]Feature{}), | |
| 184 | }; | |
| 185 | result[@enumToInt(Feature.ck810v)] = .{ | |
| 186 | .llvm_name = "ck810v", | |
| 187 | .description = "CSKY ck810v processors", | |
| 188 | .dependencies = featureSet(&[_]Feature{}), | |
| 189 | }; | |
| 190 | result[@enumToInt(Feature.ck860)] = .{ | |
| 191 | .llvm_name = "ck860", | |
| 192 | .description = "CSKY ck860 processors", | |
| 193 | .dependencies = featureSet(&[_]Feature{}), | |
| 194 | }; | |
| 195 | result[@enumToInt(Feature.ck860v)] = .{ | |
| 196 | .llvm_name = "ck860v", | |
| 197 | .description = "CSKY ck860v processors", | |
| 198 | .dependencies = featureSet(&[_]Feature{}), | |
| 199 | }; | |
| 200 | result[@enumToInt(Feature.constpool)] = .{ | |
| 201 | .llvm_name = "constpool", | |
| 202 | .description = "Dump the constant pool by compiler", | |
| 203 | .dependencies = featureSet(&[_]Feature{}), | |
| 204 | }; | |
| 83 | 205 | result[@enumToInt(Feature.doloop)] = .{ |
| 84 | 206 | .llvm_name = "doloop", |
| 85 | 207 | .description = "Enable doloop instructions", |
| 86 | 208 | .dependencies = featureSet(&[_]Feature{}), |
| 87 | 209 | }; |
| 210 | result[@enumToInt(Feature.dsp1e2)] = .{ | |
| 211 | .llvm_name = "dsp1e2", | |
| 212 | .description = "Support CSKY dsp1e2 instructions", | |
| 213 | .dependencies = featureSet(&[_]Feature{}), | |
| 214 | }; | |
| 215 | result[@enumToInt(Feature.dsp_silan)] = .{ | |
| 216 | .llvm_name = "dsp_silan", | |
| 217 | .description = "Enable DSP Silan instrutions", | |
| 218 | .dependencies = featureSet(&[_]Feature{}), | |
| 219 | }; | |
| 220 | result[@enumToInt(Feature.dspe60)] = .{ | |
| 221 | .llvm_name = "dspe60", | |
| 222 | .description = "Support CSKY dspe60 instructions", | |
| 223 | .dependencies = featureSet(&[_]Feature{}), | |
| 224 | }; | |
| 225 | result[@enumToInt(Feature.dspv2)] = .{ | |
| 226 | .llvm_name = "dspv2", | |
| 227 | .description = "Enable DSP V2.0 instrutions", | |
| 228 | .dependencies = featureSet(&[_]Feature{}), | |
| 229 | }; | |
| 88 | 230 | result[@enumToInt(Feature.e1)] = .{ |
| 89 | 231 | .llvm_name = "e1", |
| 90 | 232 | .description = "Support CSKY e1 instructions", |
| ... | ... | @@ -99,11 +241,46 @@ pub const all_features = blk: { |
| 99 | 241 | .e1, |
| 100 | 242 | }), |
| 101 | 243 | }; |
| 244 | result[@enumToInt(Feature.edsp)] = .{ | |
| 245 | .llvm_name = "edsp", | |
| 246 | .description = "Enable DSP instrutions", | |
| 247 | .dependencies = featureSet(&[_]Feature{}), | |
| 248 | }; | |
| 102 | 249 | result[@enumToInt(Feature.elrw)] = .{ |
| 103 | 250 | .llvm_name = "elrw", |
| 104 | 251 | .description = "Use the extend LRW instruction", |
| 105 | 252 | .dependencies = featureSet(&[_]Feature{}), |
| 106 | 253 | }; |
| 254 | result[@enumToInt(Feature.fdivdu)] = .{ | |
| 255 | .llvm_name = "fdivdu", | |
| 256 | .description = "Enable float divide instructions", | |
| 257 | .dependencies = featureSet(&[_]Feature{}), | |
| 258 | }; | |
| 259 | result[@enumToInt(Feature.float1e2)] = .{ | |
| 260 | .llvm_name = "float1e2", | |
| 261 | .description = "Support CSKY float1e2 instructions", | |
| 262 | .dependencies = featureSet(&[_]Feature{}), | |
| 263 | }; | |
| 264 | result[@enumToInt(Feature.float1e3)] = .{ | |
| 265 | .llvm_name = "float1e3", | |
| 266 | .description = "Support CSKY float1e3 instructions", | |
| 267 | .dependencies = featureSet(&[_]Feature{}), | |
| 268 | }; | |
| 269 | result[@enumToInt(Feature.float3e4)] = .{ | |
| 270 | .llvm_name = "float3e4", | |
| 271 | .description = "Support CSKY float3e4 instructions", | |
| 272 | .dependencies = featureSet(&[_]Feature{}), | |
| 273 | }; | |
| 274 | result[@enumToInt(Feature.float7e60)] = .{ | |
| 275 | .llvm_name = "float7e60", | |
| 276 | .description = "Support CSKY float7e60 instructions", | |
| 277 | .dependencies = featureSet(&[_]Feature{}), | |
| 278 | }; | |
| 279 | result[@enumToInt(Feature.floate1)] = .{ | |
| 280 | .llvm_name = "floate1", | |
| 281 | .description = "Support CSKY floate1 instructions", | |
| 282 | .dependencies = featureSet(&[_]Feature{}), | |
| 283 | }; | |
| 107 | 284 | result[@enumToInt(Feature.fpuv2_df)] = .{ |
| 108 | 285 | .llvm_name = "fpuv2_df", |
| 109 | 286 | .description = "Enable FPUv2 double float instructions", |
| ... | ... | @@ -119,6 +296,16 @@ pub const all_features = blk: { |
| 119 | 296 | .description = "Enable FPUv3 double float instructions", |
| 120 | 297 | .dependencies = featureSet(&[_]Feature{}), |
| 121 | 298 | }; |
| 299 | result[@enumToInt(Feature.fpuv3_hf)] = .{ | |
| 300 | .llvm_name = "fpuv3_hf", | |
| 301 | .description = "Enable FPUv3 harf precision operate instructions", | |
| 302 | .dependencies = featureSet(&[_]Feature{}), | |
| 303 | }; | |
| 304 | result[@enumToInt(Feature.fpuv3_hi)] = .{ | |
| 305 | .llvm_name = "fpuv3_hi", | |
| 306 | .description = "Enable FPUv3 harf word converting instructions", | |
| 307 | .dependencies = featureSet(&[_]Feature{}), | |
| 308 | }; | |
| 122 | 309 | result[@enumToInt(Feature.fpuv3_sf)] = .{ |
| 123 | 310 | .llvm_name = "fpuv3_sf", |
| 124 | 311 | .description = "Enable FPUv3 single float instructions", |
| ... | ... | @@ -134,11 +321,38 @@ pub const all_features = blk: { |
| 134 | 321 | .description = "Use hard floating point ABI to pass args", |
| 135 | 322 | .dependencies = featureSet(&[_]Feature{}), |
| 136 | 323 | }; |
| 324 | result[@enumToInt(Feature.hard_tp)] = .{ | |
| 325 | .llvm_name = "hard-tp", | |
| 326 | .description = "Enable TLS Pointer register", | |
| 327 | .dependencies = featureSet(&[_]Feature{}), | |
| 328 | }; | |
| 329 | result[@enumToInt(Feature.high_registers)] = .{ | |
| 330 | .llvm_name = "high-registers", | |
| 331 | .description = "Enable r16-r31 registers", | |
| 332 | .dependencies = featureSet(&[_]Feature{}), | |
| 333 | }; | |
| 334 | result[@enumToInt(Feature.hwdiv)] = .{ | |
| 335 | .llvm_name = "hwdiv", | |
| 336 | .description = "Enable divide instrutions", | |
| 337 | .dependencies = featureSet(&[_]Feature{}), | |
| 338 | }; | |
| 339 | result[@enumToInt(Feature.istack)] = .{ | |
| 340 | .llvm_name = "istack", | |
| 341 | .description = "Enable interrput attribute", | |
| 342 | .dependencies = featureSet(&[_]Feature{}), | |
| 343 | }; | |
| 137 | 344 | result[@enumToInt(Feature.java)] = .{ |
| 138 | 345 | .llvm_name = "java", |
| 139 | 346 | .description = "Enable java instructions", |
| 140 | 347 | .dependencies = featureSet(&[_]Feature{}), |
| 141 | 348 | }; |
| 349 | result[@enumToInt(Feature.mp)] = .{ | |
| 350 | .llvm_name = "mp", | |
| 351 | .description = "Support CSKY mp instructions", | |
| 352 | .dependencies = featureSet(&[_]Feature{ | |
| 353 | .@"2e3", | |
| 354 | }), | |
| 355 | }; | |
| 142 | 356 | result[@enumToInt(Feature.mp1e2)] = .{ |
| 143 | 357 | .llvm_name = "mp1e2", |
| 144 | 358 | .description = "Support CSKY mp1e2 instructions", |
| ... | ... | @@ -146,6 +360,61 @@ pub const all_features = blk: { |
| 146 | 360 | .@"3e7", |
| 147 | 361 | }), |
| 148 | 362 | }; |
| 363 | result[@enumToInt(Feature.multiple_stld)] = .{ | |
| 364 | .llvm_name = "multiple_stld", | |
| 365 | .description = "Enable multiple load/store instrutions", | |
| 366 | .dependencies = featureSet(&[_]Feature{}), | |
| 367 | }; | |
| 368 | result[@enumToInt(Feature.nvic)] = .{ | |
| 369 | .llvm_name = "nvic", | |
| 370 | .description = "Enable NVIC", | |
| 371 | .dependencies = featureSet(&[_]Feature{}), | |
| 372 | }; | |
| 373 | result[@enumToInt(Feature.pushpop)] = .{ | |
| 374 | .llvm_name = "pushpop", | |
| 375 | .description = "Enable push/pop instrutions", | |
| 376 | .dependencies = featureSet(&[_]Feature{}), | |
| 377 | }; | |
| 378 | result[@enumToInt(Feature.smart)] = .{ | |
| 379 | .llvm_name = "smart", | |
| 380 | .description = "Let CPU work in Smart Mode", | |
| 381 | .dependencies = featureSet(&[_]Feature{}), | |
| 382 | }; | |
| 383 | result[@enumToInt(Feature.soft_tp)] = .{ | |
| 384 | .llvm_name = "soft-tp", | |
| 385 | .description = "Disable TLS Pointer register", | |
| 386 | .dependencies = featureSet(&[_]Feature{}), | |
| 387 | }; | |
| 388 | result[@enumToInt(Feature.stack_size)] = .{ | |
| 389 | .llvm_name = "stack-size", | |
| 390 | .description = "Output stack size information", | |
| 391 | .dependencies = featureSet(&[_]Feature{}), | |
| 392 | }; | |
| 393 | result[@enumToInt(Feature.trust)] = .{ | |
| 394 | .llvm_name = "trust", | |
| 395 | .description = "Enable trust instructions", | |
| 396 | .dependencies = featureSet(&[_]Feature{}), | |
| 397 | }; | |
| 398 | result[@enumToInt(Feature.vdsp2e3)] = .{ | |
| 399 | .llvm_name = "vdsp2e3", | |
| 400 | .description = "Support CSKY vdsp2e3 instructions", | |
| 401 | .dependencies = featureSet(&[_]Feature{}), | |
| 402 | }; | |
| 403 | result[@enumToInt(Feature.vdsp2e60f)] = .{ | |
| 404 | .llvm_name = "vdsp2e60f", | |
| 405 | .description = "Support CSKY vdsp2e60f instructions", | |
| 406 | .dependencies = featureSet(&[_]Feature{}), | |
| 407 | }; | |
| 408 | result[@enumToInt(Feature.vdspv1)] = .{ | |
| 409 | .llvm_name = "vdspv1", | |
| 410 | .description = "Enable 128bit vdsp-v1 instructions", | |
| 411 | .dependencies = featureSet(&[_]Feature{}), | |
| 412 | }; | |
| 413 | result[@enumToInt(Feature.vdspv2)] = .{ | |
| 414 | .llvm_name = "vdspv2", | |
| 415 | .description = "Enable vdsp-v2 instructions", | |
| 416 | .dependencies = featureSet(&[_]Feature{}), | |
| 417 | }; | |
| 149 | 418 | const ti = @typeInfo(Feature); |
| 150 | 419 | for (result) |*elem, i| { |
| 151 | 420 | elem.index = i; |
| ... | ... | @@ -155,9 +424,2789 @@ pub const all_features = blk: { |
| 155 | 424 | }; |
| 156 | 425 | |
| 157 | 426 | pub const cpu = struct { |
| 427 | pub const c807 = CpuModel{ | |
| 428 | .name = "c807", | |
| 429 | .llvm_name = "c807", | |
| 430 | .features = featureSet(&[_]Feature{ | |
| 431 | .cache, | |
| 432 | .ck807, | |
| 433 | .dsp1e2, | |
| 434 | .dspe60, | |
| 435 | .edsp, | |
| 436 | .hard_tp, | |
| 437 | .high_registers, | |
| 438 | .hwdiv, | |
| 439 | .mp, | |
| 440 | .mp1e2, | |
| 441 | .nvic, | |
| 442 | .trust, | |
| 443 | }), | |
| 444 | }; | |
| 445 | pub const c807f = CpuModel{ | |
| 446 | .name = "c807f", | |
| 447 | .llvm_name = "c807f", | |
| 448 | .features = featureSet(&[_]Feature{ | |
| 449 | .cache, | |
| 450 | .ck807, | |
| 451 | .dsp1e2, | |
| 452 | .dspe60, | |
| 453 | .edsp, | |
| 454 | .fdivdu, | |
| 455 | .float1e2, | |
| 456 | .float1e3, | |
| 457 | .float3e4, | |
| 458 | .floate1, | |
| 459 | .fpuv2_df, | |
| 460 | .fpuv2_sf, | |
| 461 | .hard_tp, | |
| 462 | .high_registers, | |
| 463 | .hwdiv, | |
| 464 | .mp, | |
| 465 | .mp1e2, | |
| 466 | .nvic, | |
| 467 | .trust, | |
| 468 | }), | |
| 469 | }; | |
| 470 | pub const c810 = CpuModel{ | |
| 471 | .name = "c810", | |
| 472 | .llvm_name = "c810", | |
| 473 | .features = featureSet(&[_]Feature{ | |
| 474 | .@"7e10", | |
| 475 | .cache, | |
| 476 | .ck810, | |
| 477 | .dsp1e2, | |
| 478 | .dspe60, | |
| 479 | .edsp, | |
| 480 | .fdivdu, | |
| 481 | .float1e2, | |
| 482 | .floate1, | |
| 483 | .fpuv2_df, | |
| 484 | .fpuv2_sf, | |
| 485 | .hard_tp, | |
| 486 | .high_registers, | |
| 487 | .hwdiv, | |
| 488 | .mp, | |
| 489 | .mp1e2, | |
| 490 | .nvic, | |
| 491 | .trust, | |
| 492 | }), | |
| 493 | }; | |
| 494 | pub const c810t = CpuModel{ | |
| 495 | .name = "c810t", | |
| 496 | .llvm_name = "c810t", | |
| 497 | .features = featureSet(&[_]Feature{ | |
| 498 | .@"7e10", | |
| 499 | .cache, | |
| 500 | .ck810, | |
| 501 | .dsp1e2, | |
| 502 | .dspe60, | |
| 503 | .edsp, | |
| 504 | .fdivdu, | |
| 505 | .float1e2, | |
| 506 | .floate1, | |
| 507 | .fpuv2_df, | |
| 508 | .fpuv2_sf, | |
| 509 | .hard_tp, | |
| 510 | .high_registers, | |
| 511 | .hwdiv, | |
| 512 | .mp, | |
| 513 | .mp1e2, | |
| 514 | .nvic, | |
| 515 | .trust, | |
| 516 | }), | |
| 517 | }; | |
| 518 | pub const c810tv = CpuModel{ | |
| 519 | .name = "c810tv", | |
| 520 | .llvm_name = "c810tv", | |
| 521 | .features = featureSet(&[_]Feature{ | |
| 522 | .@"7e10", | |
| 523 | .cache, | |
| 524 | .ck810, | |
| 525 | .ck810v, | |
| 526 | .dsp1e2, | |
| 527 | .dspe60, | |
| 528 | .edsp, | |
| 529 | .fdivdu, | |
| 530 | .float1e2, | |
| 531 | .floate1, | |
| 532 | .fpuv2_df, | |
| 533 | .fpuv2_sf, | |
| 534 | .hard_tp, | |
| 535 | .high_registers, | |
| 536 | .hwdiv, | |
| 537 | .mp, | |
| 538 | .mp1e2, | |
| 539 | .nvic, | |
| 540 | .trust, | |
| 541 | .vdspv1, | |
| 542 | }), | |
| 543 | }; | |
| 544 | pub const c810v = CpuModel{ | |
| 545 | .name = "c810v", | |
| 546 | .llvm_name = "c810v", | |
| 547 | .features = featureSet(&[_]Feature{ | |
| 548 | .@"7e10", | |
| 549 | .cache, | |
| 550 | .ck810, | |
| 551 | .ck810v, | |
| 552 | .dsp1e2, | |
| 553 | .dspe60, | |
| 554 | .edsp, | |
| 555 | .fdivdu, | |
| 556 | .float1e2, | |
| 557 | .floate1, | |
| 558 | .fpuv2_df, | |
| 559 | .fpuv2_sf, | |
| 560 | .hard_tp, | |
| 561 | .high_registers, | |
| 562 | .hwdiv, | |
| 563 | .mp, | |
| 564 | .mp1e2, | |
| 565 | .nvic, | |
| 566 | .trust, | |
| 567 | .vdspv1, | |
| 568 | }), | |
| 569 | }; | |
| 570 | pub const c860 = CpuModel{ | |
| 571 | .name = "c860", | |
| 572 | .llvm_name = "c860", | |
| 573 | .features = featureSet(&[_]Feature{ | |
| 574 | .@"10e60", | |
| 575 | .@"3e3r2", | |
| 576 | .@"3e3r3", | |
| 577 | .btst16, | |
| 578 | .cache, | |
| 579 | .ck860, | |
| 580 | .dspe60, | |
| 581 | .float7e60, | |
| 582 | .fpuv3_df, | |
| 583 | .fpuv3_hf, | |
| 584 | .fpuv3_hi, | |
| 585 | .fpuv3_sf, | |
| 586 | .hard_tp, | |
| 587 | .high_registers, | |
| 588 | .hwdiv, | |
| 589 | .mp, | |
| 590 | .mp1e2, | |
| 591 | .nvic, | |
| 592 | .trust, | |
| 593 | }), | |
| 594 | }; | |
| 595 | pub const c860v = CpuModel{ | |
| 596 | .name = "c860v", | |
| 597 | .llvm_name = "c860v", | |
| 598 | .features = featureSet(&[_]Feature{ | |
| 599 | .@"10e60", | |
| 600 | .@"3e3r2", | |
| 601 | .@"3e3r3", | |
| 602 | .btst16, | |
| 603 | .cache, | |
| 604 | .ck860, | |
| 605 | .ck860v, | |
| 606 | .dspe60, | |
| 607 | .float7e60, | |
| 608 | .fpuv3_df, | |
| 609 | .fpuv3_hf, | |
| 610 | .fpuv3_hi, | |
| 611 | .fpuv3_sf, | |
| 612 | .hard_tp, | |
| 613 | .high_registers, | |
| 614 | .hwdiv, | |
| 615 | .mp, | |
| 616 | .mp1e2, | |
| 617 | .nvic, | |
| 618 | .trust, | |
| 619 | .vdsp2e60f, | |
| 620 | .vdspv2, | |
| 621 | }), | |
| 622 | }; | |
| 623 | pub const ck801 = CpuModel{ | |
| 624 | .name = "ck801", | |
| 625 | .llvm_name = "ck801", | |
| 626 | .features = featureSet(&[_]Feature{ | |
| 627 | .btst16, | |
| 628 | .ck801, | |
| 629 | .e1, | |
| 630 | .trust, | |
| 631 | }), | |
| 632 | }; | |
| 633 | pub const ck801t = CpuModel{ | |
| 634 | .name = "ck801t", | |
| 635 | .llvm_name = "ck801t", | |
| 636 | .features = featureSet(&[_]Feature{ | |
| 637 | .btst16, | |
| 638 | .ck801, | |
| 639 | .e1, | |
| 640 | .trust, | |
| 641 | }), | |
| 642 | }; | |
| 643 | pub const ck802 = CpuModel{ | |
| 644 | .name = "ck802", | |
| 645 | .llvm_name = "ck802", | |
| 646 | .features = featureSet(&[_]Feature{ | |
| 647 | .btst16, | |
| 648 | .ck802, | |
| 649 | .e2, | |
| 650 | .nvic, | |
| 651 | .trust, | |
| 652 | }), | |
| 653 | }; | |
| 654 | pub const ck802j = CpuModel{ | |
| 655 | .name = "ck802j", | |
| 656 | .llvm_name = "ck802j", | |
| 657 | .features = featureSet(&[_]Feature{ | |
| 658 | .btst16, | |
| 659 | .ck802, | |
| 660 | .e2, | |
| 661 | .java, | |
| 662 | .nvic, | |
| 663 | .trust, | |
| 664 | }), | |
| 665 | }; | |
| 666 | pub const ck802t = CpuModel{ | |
| 667 | .name = "ck802t", | |
| 668 | .llvm_name = "ck802t", | |
| 669 | .features = featureSet(&[_]Feature{ | |
| 670 | .btst16, | |
| 671 | .ck802, | |
| 672 | .e2, | |
| 673 | .nvic, | |
| 674 | .trust, | |
| 675 | }), | |
| 676 | }; | |
| 677 | pub const ck803 = CpuModel{ | |
| 678 | .name = "ck803", | |
| 679 | .llvm_name = "ck803", | |
| 680 | .features = featureSet(&[_]Feature{ | |
| 681 | .btst16, | |
| 682 | .ck803, | |
| 683 | .hwdiv, | |
| 684 | .mp, | |
| 685 | .nvic, | |
| 686 | .trust, | |
| 687 | }), | |
| 688 | }; | |
| 689 | pub const ck803e = CpuModel{ | |
| 690 | .name = "ck803e", | |
| 691 | .llvm_name = "ck803e", | |
| 692 | .features = featureSet(&[_]Feature{ | |
| 693 | .btst16, | |
| 694 | .ck803, | |
| 695 | .dsp1e2, | |
| 696 | .dspe60, | |
| 697 | .edsp, | |
| 698 | .hwdiv, | |
| 699 | .mp, | |
| 700 | .nvic, | |
| 701 | .trust, | |
| 702 | }), | |
| 703 | }; | |
| 704 | pub const ck803ef = CpuModel{ | |
| 705 | .name = "ck803ef", | |
| 706 | .llvm_name = "ck803ef", | |
| 707 | .features = featureSet(&[_]Feature{ | |
| 708 | .btst16, | |
| 709 | .ck803, | |
| 710 | .dsp1e2, | |
| 711 | .dspe60, | |
| 712 | .edsp, | |
| 713 | .float1e3, | |
| 714 | .floate1, | |
| 715 | .fpuv2_sf, | |
| 716 | .hwdiv, | |
| 717 | .mp, | |
| 718 | .nvic, | |
| 719 | .trust, | |
| 720 | }), | |
| 721 | }; | |
| 722 | pub const ck803efh = CpuModel{ | |
| 723 | .name = "ck803efh", | |
| 724 | .llvm_name = "ck803efh", | |
| 725 | .features = featureSet(&[_]Feature{ | |
| 726 | .btst16, | |
| 727 | .ck803, | |
| 728 | .dsp1e2, | |
| 729 | .dspe60, | |
| 730 | .edsp, | |
| 731 | .float1e3, | |
| 732 | .floate1, | |
| 733 | .fpuv2_sf, | |
| 734 | .hwdiv, | |
| 735 | .mp, | |
| 736 | .nvic, | |
| 737 | .trust, | |
| 738 | }), | |
| 739 | }; | |
| 740 | pub const ck803efhr1 = CpuModel{ | |
| 741 | .name = "ck803efhr1", | |
| 742 | .llvm_name = "ck803efhr1", | |
| 743 | .features = featureSet(&[_]Feature{ | |
| 744 | .@"3e3r1", | |
| 745 | .btst16, | |
| 746 | .ck803, | |
| 747 | .dsp1e2, | |
| 748 | .dspe60, | |
| 749 | .dspv2, | |
| 750 | .edsp, | |
| 751 | .float1e3, | |
| 752 | .floate1, | |
| 753 | .fpuv2_sf, | |
| 754 | .high_registers, | |
| 755 | .hwdiv, | |
| 756 | .mp, | |
| 757 | .nvic, | |
| 758 | .trust, | |
| 759 | }), | |
| 760 | }; | |
| 761 | pub const ck803efhr2 = CpuModel{ | |
| 762 | .name = "ck803efhr2", | |
| 763 | .llvm_name = "ck803efhr2", | |
| 764 | .features = featureSet(&[_]Feature{ | |
| 765 | .@"3e3r2", | |
| 766 | .@"3e3r3", | |
| 767 | .btst16, | |
| 768 | .ck803, | |
| 769 | .dsp1e2, | |
| 770 | .dspe60, | |
| 771 | .dspv2, | |
| 772 | .edsp, | |
| 773 | .float1e3, | |
| 774 | .floate1, | |
| 775 | .fpuv2_sf, | |
| 776 | .high_registers, | |
| 777 | .hwdiv, | |
| 778 | .mp, | |
| 779 | .nvic, | |
| 780 | .trust, | |
| 781 | }), | |
| 782 | }; | |
| 783 | pub const ck803efhr3 = CpuModel{ | |
| 784 | .name = "ck803efhr3", | |
| 785 | .llvm_name = "ck803efhr3", | |
| 786 | .features = featureSet(&[_]Feature{ | |
| 787 | .@"3e3r2", | |
| 788 | .@"3e3r3", | |
| 789 | .btst16, | |
| 790 | .ck803, | |
| 791 | .dsp1e2, | |
| 792 | .dspe60, | |
| 793 | .dspv2, | |
| 794 | .edsp, | |
| 795 | .float1e3, | |
| 796 | .floate1, | |
| 797 | .fpuv2_sf, | |
| 798 | .high_registers, | |
| 799 | .hwdiv, | |
| 800 | .mp, | |
| 801 | .nvic, | |
| 802 | .trust, | |
| 803 | }), | |
| 804 | }; | |
| 805 | pub const ck803efht = CpuModel{ | |
| 806 | .name = "ck803efht", | |
| 807 | .llvm_name = "ck803efht", | |
| 808 | .features = featureSet(&[_]Feature{ | |
| 809 | .btst16, | |
| 810 | .ck803, | |
| 811 | .dsp1e2, | |
| 812 | .dspe60, | |
| 813 | .edsp, | |
| 814 | .float1e3, | |
| 815 | .floate1, | |
| 816 | .fpuv2_sf, | |
| 817 | .hwdiv, | |
| 818 | .mp, | |
| 819 | .nvic, | |
| 820 | .trust, | |
| 821 | }), | |
| 822 | }; | |
| 823 | pub const ck803efhtr1 = CpuModel{ | |
| 824 | .name = "ck803efhtr1", | |
| 825 | .llvm_name = "ck803efhtr1", | |
| 826 | .features = featureSet(&[_]Feature{ | |
| 827 | .@"3e3r1", | |
| 828 | .btst16, | |
| 829 | .ck803, | |
| 830 | .dsp1e2, | |
| 831 | .dspe60, | |
| 832 | .dspv2, | |
| 833 | .edsp, | |
| 834 | .float1e3, | |
| 835 | .floate1, | |
| 836 | .fpuv2_sf, | |
| 837 | .high_registers, | |
| 838 | .hwdiv, | |
| 839 | .mp, | |
| 840 | .nvic, | |
| 841 | .trust, | |
| 842 | }), | |
| 843 | }; | |
| 844 | pub const ck803efhtr2 = CpuModel{ | |
| 845 | .name = "ck803efhtr2", | |
| 846 | .llvm_name = "ck803efhtr2", | |
| 847 | .features = featureSet(&[_]Feature{ | |
| 848 | .@"3e3r2", | |
| 849 | .@"3e3r3", | |
| 850 | .btst16, | |
| 851 | .ck803, | |
| 852 | .dsp1e2, | |
| 853 | .dspe60, | |
| 854 | .dspv2, | |
| 855 | .edsp, | |
| 856 | .float1e3, | |
| 857 | .floate1, | |
| 858 | .fpuv2_sf, | |
| 859 | .high_registers, | |
| 860 | .hwdiv, | |
| 861 | .mp, | |
| 862 | .nvic, | |
| 863 | .trust, | |
| 864 | }), | |
| 865 | }; | |
| 866 | pub const ck803efhtr3 = CpuModel{ | |
| 867 | .name = "ck803efhtr3", | |
| 868 | .llvm_name = "ck803efhtr3", | |
| 869 | .features = featureSet(&[_]Feature{ | |
| 870 | .@"3e3r2", | |
| 871 | .@"3e3r3", | |
| 872 | .btst16, | |
| 873 | .ck803, | |
| 874 | .dsp1e2, | |
| 875 | .dspe60, | |
| 876 | .dspv2, | |
| 877 | .edsp, | |
| 878 | .float1e3, | |
| 879 | .floate1, | |
| 880 | .fpuv2_sf, | |
| 881 | .high_registers, | |
| 882 | .hwdiv, | |
| 883 | .mp, | |
| 884 | .nvic, | |
| 885 | .trust, | |
| 886 | }), | |
| 887 | }; | |
| 888 | pub const ck803efr1 = CpuModel{ | |
| 889 | .name = "ck803efr1", | |
| 890 | .llvm_name = "ck803efr1", | |
| 891 | .features = featureSet(&[_]Feature{ | |
| 892 | .@"3e3r1", | |
| 893 | .btst16, | |
| 894 | .ck803, | |
| 895 | .dsp1e2, | |
| 896 | .dspe60, | |
| 897 | .dspv2, | |
| 898 | .edsp, | |
| 899 | .float1e3, | |
| 900 | .floate1, | |
| 901 | .fpuv2_sf, | |
| 902 | .high_registers, | |
| 903 | .hwdiv, | |
| 904 | .mp, | |
| 905 | .nvic, | |
| 906 | .trust, | |
| 907 | }), | |
| 908 | }; | |
| 909 | pub const ck803efr2 = CpuModel{ | |
| 910 | .name = "ck803efr2", | |
| 911 | .llvm_name = "ck803efr2", | |
| 912 | .features = featureSet(&[_]Feature{ | |
| 913 | .@"3e3r2", | |
| 914 | .@"3e3r3", | |
| 915 | .btst16, | |
| 916 | .ck803, | |
| 917 | .dsp1e2, | |
| 918 | .dspe60, | |
| 919 | .dspv2, | |
| 920 | .edsp, | |
| 921 | .float1e3, | |
| 922 | .floate1, | |
| 923 | .fpuv2_sf, | |
| 924 | .high_registers, | |
| 925 | .hwdiv, | |
| 926 | .mp, | |
| 927 | .nvic, | |
| 928 | .trust, | |
| 929 | }), | |
| 930 | }; | |
| 931 | pub const ck803efr3 = CpuModel{ | |
| 932 | .name = "ck803efr3", | |
| 933 | .llvm_name = "ck803efr3", | |
| 934 | .features = featureSet(&[_]Feature{ | |
| 935 | .@"3e3r2", | |
| 936 | .@"3e3r3", | |
| 937 | .btst16, | |
| 938 | .ck803, | |
| 939 | .dsp1e2, | |
| 940 | .dspe60, | |
| 941 | .dspv2, | |
| 942 | .edsp, | |
| 943 | .float1e3, | |
| 944 | .floate1, | |
| 945 | .fpuv2_sf, | |
| 946 | .high_registers, | |
| 947 | .hwdiv, | |
| 948 | .mp, | |
| 949 | .nvic, | |
| 950 | .trust, | |
| 951 | }), | |
| 952 | }; | |
| 953 | pub const ck803eft = CpuModel{ | |
| 954 | .name = "ck803eft", | |
| 955 | .llvm_name = "ck803eft", | |
| 956 | .features = featureSet(&[_]Feature{ | |
| 957 | .btst16, | |
| 958 | .ck803, | |
| 959 | .dsp1e2, | |
| 960 | .dspe60, | |
| 961 | .edsp, | |
| 962 | .float1e3, | |
| 963 | .floate1, | |
| 964 | .fpuv2_sf, | |
| 965 | .hwdiv, | |
| 966 | .mp, | |
| 967 | .nvic, | |
| 968 | .trust, | |
| 969 | }), | |
| 970 | }; | |
| 971 | pub const ck803eftr1 = CpuModel{ | |
| 972 | .name = "ck803eftr1", | |
| 973 | .llvm_name = "ck803eftr1", | |
| 974 | .features = featureSet(&[_]Feature{ | |
| 975 | .@"3e3r1", | |
| 976 | .btst16, | |
| 977 | .ck803, | |
| 978 | .dsp1e2, | |
| 979 | .dspe60, | |
| 980 | .dspv2, | |
| 981 | .edsp, | |
| 982 | .float1e3, | |
| 983 | .floate1, | |
| 984 | .fpuv2_sf, | |
| 985 | .high_registers, | |
| 986 | .hwdiv, | |
| 987 | .mp, | |
| 988 | .nvic, | |
| 989 | .trust, | |
| 990 | }), | |
| 991 | }; | |
| 992 | pub const ck803eftr2 = CpuModel{ | |
| 993 | .name = "ck803eftr2", | |
| 994 | .llvm_name = "ck803eftr2", | |
| 995 | .features = featureSet(&[_]Feature{ | |
| 996 | .@"3e3r2", | |
| 997 | .@"3e3r3", | |
| 998 | .btst16, | |
| 999 | .ck803, | |
| 1000 | .dsp1e2, | |
| 1001 | .dspe60, | |
| 1002 | .dspv2, | |
| 1003 | .edsp, | |
| 1004 | .float1e3, | |
| 1005 | .floate1, | |
| 1006 | .fpuv2_sf, | |
| 1007 | .high_registers, | |
| 1008 | .hwdiv, | |
| 1009 | .mp, | |
| 1010 | .nvic, | |
| 1011 | .trust, | |
| 1012 | }), | |
| 1013 | }; | |
| 1014 | pub const ck803eftr3 = CpuModel{ | |
| 1015 | .name = "ck803eftr3", | |
| 1016 | .llvm_name = "ck803eftr3", | |
| 1017 | .features = featureSet(&[_]Feature{ | |
| 1018 | .@"3e3r2", | |
| 1019 | .@"3e3r3", | |
| 1020 | .btst16, | |
| 1021 | .ck803, | |
| 1022 | .dsp1e2, | |
| 1023 | .dspe60, | |
| 1024 | .dspv2, | |
| 1025 | .edsp, | |
| 1026 | .float1e3, | |
| 1027 | .floate1, | |
| 1028 | .fpuv2_sf, | |
| 1029 | .high_registers, | |
| 1030 | .hwdiv, | |
| 1031 | .mp, | |
| 1032 | .nvic, | |
| 1033 | .trust, | |
| 1034 | }), | |
| 1035 | }; | |
| 1036 | pub const ck803eh = CpuModel{ | |
| 1037 | .name = "ck803eh", | |
| 1038 | .llvm_name = "ck803eh", | |
| 1039 | .features = featureSet(&[_]Feature{ | |
| 1040 | .btst16, | |
| 1041 | .ck803, | |
| 1042 | .dsp1e2, | |
| 1043 | .dspe60, | |
| 1044 | .edsp, | |
| 1045 | .hwdiv, | |
| 1046 | .mp, | |
| 1047 | .nvic, | |
| 1048 | .trust, | |
| 1049 | }), | |
| 1050 | }; | |
| 1051 | pub const ck803ehr1 = CpuModel{ | |
| 1052 | .name = "ck803ehr1", | |
| 1053 | .llvm_name = "ck803ehr1", | |
| 1054 | .features = featureSet(&[_]Feature{ | |
| 1055 | .@"3e3r1", | |
| 1056 | .@"3e3r3", | |
| 1057 | .btst16, | |
| 1058 | .ck803, | |
| 1059 | .dsp1e2, | |
| 1060 | .dspe60, | |
| 1061 | .dspv2, | |
| 1062 | .edsp, | |
| 1063 | .high_registers, | |
| 1064 | .hwdiv, | |
| 1065 | .mp, | |
| 1066 | .nvic, | |
| 1067 | .trust, | |
| 1068 | }), | |
| 1069 | }; | |
| 1070 | pub const ck803ehr2 = CpuModel{ | |
| 1071 | .name = "ck803ehr2", | |
| 1072 | .llvm_name = "ck803ehr2", | |
| 1073 | .features = featureSet(&[_]Feature{ | |
| 1074 | .@"3e3r2", | |
| 1075 | .@"3e3r3", | |
| 1076 | .btst16, | |
| 1077 | .ck803, | |
| 1078 | .dsp1e2, | |
| 1079 | .dspe60, | |
| 1080 | .dspv2, | |
| 1081 | .edsp, | |
| 1082 | .high_registers, | |
| 1083 | .hwdiv, | |
| 1084 | .mp, | |
| 1085 | .nvic, | |
| 1086 | .trust, | |
| 1087 | }), | |
| 1088 | }; | |
| 1089 | pub const ck803ehr3 = CpuModel{ | |
| 1090 | .name = "ck803ehr3", | |
| 1091 | .llvm_name = "ck803ehr3", | |
| 1092 | .features = featureSet(&[_]Feature{ | |
| 1093 | .@"3e3r2", | |
| 1094 | .@"3e3r3", | |
| 1095 | .btst16, | |
| 1096 | .ck803, | |
| 1097 | .dsp1e2, | |
| 1098 | .dspe60, | |
| 1099 | .dspv2, | |
| 1100 | .edsp, | |
| 1101 | .high_registers, | |
| 1102 | .hwdiv, | |
| 1103 | .mp, | |
| 1104 | .nvic, | |
| 1105 | .trust, | |
| 1106 | }), | |
| 1107 | }; | |
| 1108 | pub const ck803eht = CpuModel{ | |
| 1109 | .name = "ck803eht", | |
| 1110 | .llvm_name = "ck803eht", | |
| 1111 | .features = featureSet(&[_]Feature{ | |
| 1112 | .btst16, | |
| 1113 | .ck803, | |
| 1114 | .dsp1e2, | |
| 1115 | .dspe60, | |
| 1116 | .edsp, | |
| 1117 | .hwdiv, | |
| 1118 | .mp, | |
| 1119 | .nvic, | |
| 1120 | .trust, | |
| 1121 | }), | |
| 1122 | }; | |
| 1123 | pub const ck803ehtr1 = CpuModel{ | |
| 1124 | .name = "ck803ehtr1", | |
| 1125 | .llvm_name = "ck803ehtr1", | |
| 1126 | .features = featureSet(&[_]Feature{ | |
| 1127 | .@"3e3r1", | |
| 1128 | .@"3e3r3", | |
| 1129 | .btst16, | |
| 1130 | .ck803, | |
| 1131 | .dsp1e2, | |
| 1132 | .dspe60, | |
| 1133 | .dspv2, | |
| 1134 | .edsp, | |
| 1135 | .high_registers, | |
| 1136 | .hwdiv, | |
| 1137 | .mp, | |
| 1138 | .nvic, | |
| 1139 | .trust, | |
| 1140 | }), | |
| 1141 | }; | |
| 1142 | pub const ck803ehtr2 = CpuModel{ | |
| 1143 | .name = "ck803ehtr2", | |
| 1144 | .llvm_name = "ck803ehtr2", | |
| 1145 | .features = featureSet(&[_]Feature{ | |
| 1146 | .@"3e3r2", | |
| 1147 | .@"3e3r3", | |
| 1148 | .btst16, | |
| 1149 | .ck803, | |
| 1150 | .dsp1e2, | |
| 1151 | .dspe60, | |
| 1152 | .dspv2, | |
| 1153 | .edsp, | |
| 1154 | .high_registers, | |
| 1155 | .hwdiv, | |
| 1156 | .mp, | |
| 1157 | .nvic, | |
| 1158 | .trust, | |
| 1159 | }), | |
| 1160 | }; | |
| 1161 | pub const ck803ehtr3 = CpuModel{ | |
| 1162 | .name = "ck803ehtr3", | |
| 1163 | .llvm_name = "ck803ehtr3", | |
| 1164 | .features = featureSet(&[_]Feature{ | |
| 1165 | .@"3e3r2", | |
| 1166 | .@"3e3r3", | |
| 1167 | .btst16, | |
| 1168 | .ck803, | |
| 1169 | .dsp1e2, | |
| 1170 | .dspe60, | |
| 1171 | .dspv2, | |
| 1172 | .edsp, | |
| 1173 | .high_registers, | |
| 1174 | .hwdiv, | |
| 1175 | .mp, | |
| 1176 | .nvic, | |
| 1177 | .trust, | |
| 1178 | }), | |
| 1179 | }; | |
| 1180 | pub const ck803er1 = CpuModel{ | |
| 1181 | .name = "ck803er1", | |
| 1182 | .llvm_name = "ck803er1", | |
| 1183 | .features = featureSet(&[_]Feature{ | |
| 1184 | .@"3e3r1", | |
| 1185 | .@"3e3r3", | |
| 1186 | .btst16, | |
| 1187 | .ck803, | |
| 1188 | .dsp1e2, | |
| 1189 | .dspe60, | |
| 1190 | .dspv2, | |
| 1191 | .edsp, | |
| 1192 | .high_registers, | |
| 1193 | .hwdiv, | |
| 1194 | .mp, | |
| 1195 | .nvic, | |
| 1196 | .trust, | |
| 1197 | }), | |
| 1198 | }; | |
| 1199 | pub const ck803er2 = CpuModel{ | |
| 1200 | .name = "ck803er2", | |
| 1201 | .llvm_name = "ck803er2", | |
| 1202 | .features = featureSet(&[_]Feature{ | |
| 1203 | .@"3e3r2", | |
| 1204 | .@"3e3r3", | |
| 1205 | .btst16, | |
| 1206 | .ck803, | |
| 1207 | .dsp1e2, | |
| 1208 | .dspe60, | |
| 1209 | .dspv2, | |
| 1210 | .edsp, | |
| 1211 | .high_registers, | |
| 1212 | .hwdiv, | |
| 1213 | .mp, | |
| 1214 | .nvic, | |
| 1215 | .trust, | |
| 1216 | }), | |
| 1217 | }; | |
| 1218 | pub const ck803er3 = CpuModel{ | |
| 1219 | .name = "ck803er3", | |
| 1220 | .llvm_name = "ck803er3", | |
| 1221 | .features = featureSet(&[_]Feature{ | |
| 1222 | .@"3e3r2", | |
| 1223 | .@"3e3r3", | |
| 1224 | .btst16, | |
| 1225 | .ck803, | |
| 1226 | .dsp1e2, | |
| 1227 | .dspe60, | |
| 1228 | .dspv2, | |
| 1229 | .edsp, | |
| 1230 | .high_registers, | |
| 1231 | .hwdiv, | |
| 1232 | .mp, | |
| 1233 | .nvic, | |
| 1234 | .trust, | |
| 1235 | }), | |
| 1236 | }; | |
| 1237 | pub const ck803et = CpuModel{ | |
| 1238 | .name = "ck803et", | |
| 1239 | .llvm_name = "ck803et", | |
| 1240 | .features = featureSet(&[_]Feature{ | |
| 1241 | .btst16, | |
| 1242 | .ck803, | |
| 1243 | .dsp1e2, | |
| 1244 | .dspe60, | |
| 1245 | .edsp, | |
| 1246 | .hwdiv, | |
| 1247 | .mp, | |
| 1248 | .nvic, | |
| 1249 | .trust, | |
| 1250 | }), | |
| 1251 | }; | |
| 1252 | pub const ck803etr1 = CpuModel{ | |
| 1253 | .name = "ck803etr1", | |
| 1254 | .llvm_name = "ck803etr1", | |
| 1255 | .features = featureSet(&[_]Feature{ | |
| 1256 | .@"3e3r1", | |
| 1257 | .@"3e3r3", | |
| 1258 | .btst16, | |
| 1259 | .ck803, | |
| 1260 | .dsp1e2, | |
| 1261 | .dspe60, | |
| 1262 | .dspv2, | |
| 1263 | .edsp, | |
| 1264 | .high_registers, | |
| 1265 | .hwdiv, | |
| 1266 | .mp, | |
| 1267 | .nvic, | |
| 1268 | .trust, | |
| 1269 | }), | |
| 1270 | }; | |
| 1271 | pub const ck803etr2 = CpuModel{ | |
| 1272 | .name = "ck803etr2", | |
| 1273 | .llvm_name = "ck803etr2", | |
| 1274 | .features = featureSet(&[_]Feature{ | |
| 1275 | .@"3e3r2", | |
| 1276 | .@"3e3r3", | |
| 1277 | .btst16, | |
| 1278 | .ck803, | |
| 1279 | .dsp1e2, | |
| 1280 | .dspe60, | |
| 1281 | .dspv2, | |
| 1282 | .edsp, | |
| 1283 | .high_registers, | |
| 1284 | .hwdiv, | |
| 1285 | .mp, | |
| 1286 | .nvic, | |
| 1287 | .trust, | |
| 1288 | }), | |
| 1289 | }; | |
| 1290 | pub const ck803etr3 = CpuModel{ | |
| 1291 | .name = "ck803etr3", | |
| 1292 | .llvm_name = "ck803etr3", | |
| 1293 | .features = featureSet(&[_]Feature{ | |
| 1294 | .@"3e3r2", | |
| 1295 | .@"3e3r3", | |
| 1296 | .btst16, | |
| 1297 | .ck803, | |
| 1298 | .dsp1e2, | |
| 1299 | .dspe60, | |
| 1300 | .dspv2, | |
| 1301 | .edsp, | |
| 1302 | .high_registers, | |
| 1303 | .hwdiv, | |
| 1304 | .mp, | |
| 1305 | .nvic, | |
| 1306 | .trust, | |
| 1307 | }), | |
| 1308 | }; | |
| 1309 | pub const ck803f = CpuModel{ | |
| 1310 | .name = "ck803f", | |
| 1311 | .llvm_name = "ck803f", | |
| 1312 | .features = featureSet(&[_]Feature{ | |
| 1313 | .btst16, | |
| 1314 | .ck803, | |
| 1315 | .float1e3, | |
| 1316 | .floate1, | |
| 1317 | .fpuv2_sf, | |
| 1318 | .hwdiv, | |
| 1319 | .mp, | |
| 1320 | .nvic, | |
| 1321 | .trust, | |
| 1322 | }), | |
| 1323 | }; | |
| 1324 | pub const ck803fh = CpuModel{ | |
| 1325 | .name = "ck803fh", | |
| 1326 | .llvm_name = "ck803fh", | |
| 1327 | .features = featureSet(&[_]Feature{ | |
| 1328 | .btst16, | |
| 1329 | .ck803, | |
| 1330 | .float1e3, | |
| 1331 | .floate1, | |
| 1332 | .fpuv2_sf, | |
| 1333 | .hwdiv, | |
| 1334 | .mp, | |
| 1335 | .nvic, | |
| 1336 | .trust, | |
| 1337 | }), | |
| 1338 | }; | |
| 1339 | pub const ck803fhr1 = CpuModel{ | |
| 1340 | .name = "ck803fhr1", | |
| 1341 | .llvm_name = "ck803fhr1", | |
| 1342 | .features = featureSet(&[_]Feature{ | |
| 1343 | .@"3e3r1", | |
| 1344 | .@"3e3r3", | |
| 1345 | .btst16, | |
| 1346 | .ck803, | |
| 1347 | .dspv2, | |
| 1348 | .float1e3, | |
| 1349 | .floate1, | |
| 1350 | .fpuv2_sf, | |
| 1351 | .hwdiv, | |
| 1352 | .mp, | |
| 1353 | .nvic, | |
| 1354 | .trust, | |
| 1355 | }), | |
| 1356 | }; | |
| 1357 | pub const ck803fhr2 = CpuModel{ | |
| 1358 | .name = "ck803fhr2", | |
| 1359 | .llvm_name = "ck803fhr2", | |
| 1360 | .features = featureSet(&[_]Feature{ | |
| 1361 | .@"3e3r2", | |
| 1362 | .@"3e3r3", | |
| 1363 | .btst16, | |
| 1364 | .ck803, | |
| 1365 | .dspv2, | |
| 1366 | .float1e3, | |
| 1367 | .floate1, | |
| 1368 | .fpuv2_sf, | |
| 1369 | .hwdiv, | |
| 1370 | .mp, | |
| 1371 | .nvic, | |
| 1372 | .trust, | |
| 1373 | }), | |
| 1374 | }; | |
| 1375 | pub const ck803fhr3 = CpuModel{ | |
| 1376 | .name = "ck803fhr3", | |
| 1377 | .llvm_name = "ck803fhr3", | |
| 1378 | .features = featureSet(&[_]Feature{ | |
| 1379 | .@"3e3r2", | |
| 1380 | .@"3e3r3", | |
| 1381 | .btst16, | |
| 1382 | .ck803, | |
| 1383 | .dspv2, | |
| 1384 | .float1e3, | |
| 1385 | .floate1, | |
| 1386 | .fpuv2_sf, | |
| 1387 | .hwdiv, | |
| 1388 | .mp, | |
| 1389 | .nvic, | |
| 1390 | .trust, | |
| 1391 | }), | |
| 1392 | }; | |
| 1393 | pub const ck803fr1 = CpuModel{ | |
| 1394 | .name = "ck803fr1", | |
| 1395 | .llvm_name = "ck803fr1", | |
| 1396 | .features = featureSet(&[_]Feature{ | |
| 1397 | .@"3e3r1", | |
| 1398 | .@"3e3r3", | |
| 1399 | .btst16, | |
| 1400 | .ck803, | |
| 1401 | .dspv2, | |
| 1402 | .float1e3, | |
| 1403 | .floate1, | |
| 1404 | .fpuv2_sf, | |
| 1405 | .hwdiv, | |
| 1406 | .mp, | |
| 1407 | .nvic, | |
| 1408 | .trust, | |
| 1409 | }), | |
| 1410 | }; | |
| 1411 | pub const ck803fr2 = CpuModel{ | |
| 1412 | .name = "ck803fr2", | |
| 1413 | .llvm_name = "ck803fr2", | |
| 1414 | .features = featureSet(&[_]Feature{ | |
| 1415 | .@"3e3r2", | |
| 1416 | .@"3e3r3", | |
| 1417 | .btst16, | |
| 1418 | .ck803, | |
| 1419 | .dspv2, | |
| 1420 | .float1e3, | |
| 1421 | .floate1, | |
| 1422 | .fpuv2_sf, | |
| 1423 | .hwdiv, | |
| 1424 | .mp, | |
| 1425 | .nvic, | |
| 1426 | .trust, | |
| 1427 | }), | |
| 1428 | }; | |
| 1429 | pub const ck803fr3 = CpuModel{ | |
| 1430 | .name = "ck803fr3", | |
| 1431 | .llvm_name = "ck803fr3", | |
| 1432 | .features = featureSet(&[_]Feature{ | |
| 1433 | .@"3e3r2", | |
| 1434 | .@"3e3r3", | |
| 1435 | .btst16, | |
| 1436 | .ck803, | |
| 1437 | .dspv2, | |
| 1438 | .float1e3, | |
| 1439 | .floate1, | |
| 1440 | .fpuv2_sf, | |
| 1441 | .hwdiv, | |
| 1442 | .mp, | |
| 1443 | .nvic, | |
| 1444 | .trust, | |
| 1445 | }), | |
| 1446 | }; | |
| 1447 | pub const ck803ft = CpuModel{ | |
| 1448 | .name = "ck803ft", | |
| 1449 | .llvm_name = "ck803ft", | |
| 1450 | .features = featureSet(&[_]Feature{ | |
| 1451 | .btst16, | |
| 1452 | .ck803, | |
| 1453 | .float1e3, | |
| 1454 | .floate1, | |
| 1455 | .fpuv2_sf, | |
| 1456 | .hwdiv, | |
| 1457 | .mp, | |
| 1458 | .nvic, | |
| 1459 | .trust, | |
| 1460 | }), | |
| 1461 | }; | |
| 1462 | pub const ck803ftr1 = CpuModel{ | |
| 1463 | .name = "ck803ftr1", | |
| 1464 | .llvm_name = "ck803ftr1", | |
| 1465 | .features = featureSet(&[_]Feature{ | |
| 1466 | .@"3e3r1", | |
| 1467 | .btst16, | |
| 1468 | .ck803, | |
| 1469 | .dspv2, | |
| 1470 | .float1e3, | |
| 1471 | .floate1, | |
| 1472 | .fpuv2_sf, | |
| 1473 | .hwdiv, | |
| 1474 | .mp, | |
| 1475 | .nvic, | |
| 1476 | .trust, | |
| 1477 | }), | |
| 1478 | }; | |
| 1479 | pub const ck803ftr2 = CpuModel{ | |
| 1480 | .name = "ck803ftr2", | |
| 1481 | .llvm_name = "ck803ftr2", | |
| 1482 | .features = featureSet(&[_]Feature{ | |
| 1483 | .@"3e3r2", | |
| 1484 | .@"3e3r3", | |
| 1485 | .btst16, | |
| 1486 | .ck803, | |
| 1487 | .dspv2, | |
| 1488 | .float1e3, | |
| 1489 | .floate1, | |
| 1490 | .fpuv2_sf, | |
| 1491 | .hwdiv, | |
| 1492 | .mp, | |
| 1493 | .nvic, | |
| 1494 | .trust, | |
| 1495 | }), | |
| 1496 | }; | |
| 1497 | pub const ck803ftr3 = CpuModel{ | |
| 1498 | .name = "ck803ftr3", | |
| 1499 | .llvm_name = "ck803ftr3", | |
| 1500 | .features = featureSet(&[_]Feature{ | |
| 1501 | .@"3e3r2", | |
| 1502 | .@"3e3r3", | |
| 1503 | .btst16, | |
| 1504 | .ck803, | |
| 1505 | .dspv2, | |
| 1506 | .float1e3, | |
| 1507 | .floate1, | |
| 1508 | .fpuv2_sf, | |
| 1509 | .hwdiv, | |
| 1510 | .mp, | |
| 1511 | .nvic, | |
| 1512 | .trust, | |
| 1513 | }), | |
| 1514 | }; | |
| 1515 | pub const ck803h = CpuModel{ | |
| 1516 | .name = "ck803h", | |
| 1517 | .llvm_name = "ck803h", | |
| 1518 | .features = featureSet(&[_]Feature{ | |
| 1519 | .btst16, | |
| 1520 | .ck803, | |
| 1521 | .hwdiv, | |
| 1522 | .mp, | |
| 1523 | .nvic, | |
| 1524 | .trust, | |
| 1525 | }), | |
| 1526 | }; | |
| 1527 | pub const ck803hr1 = CpuModel{ | |
| 1528 | .name = "ck803hr1", | |
| 1529 | .llvm_name = "ck803hr1", | |
| 1530 | .features = featureSet(&[_]Feature{ | |
| 1531 | .@"3e3r1", | |
| 1532 | .@"3e3r3", | |
| 1533 | .btst16, | |
| 1534 | .ck803, | |
| 1535 | .dspv2, | |
| 1536 | .hwdiv, | |
| 1537 | .mp, | |
| 1538 | .nvic, | |
| 1539 | .trust, | |
| 1540 | }), | |
| 1541 | }; | |
| 1542 | pub const ck803hr2 = CpuModel{ | |
| 1543 | .name = "ck803hr2", | |
| 1544 | .llvm_name = "ck803hr2", | |
| 1545 | .features = featureSet(&[_]Feature{ | |
| 1546 | .@"3e3r2", | |
| 1547 | .@"3e3r3", | |
| 1548 | .btst16, | |
| 1549 | .ck803, | |
| 1550 | .dspv2, | |
| 1551 | .hwdiv, | |
| 1552 | .mp, | |
| 1553 | .nvic, | |
| 1554 | .trust, | |
| 1555 | }), | |
| 1556 | }; | |
| 1557 | pub const ck803hr3 = CpuModel{ | |
| 1558 | .name = "ck803hr3", | |
| 1559 | .llvm_name = "ck803hr3", | |
| 1560 | .features = featureSet(&[_]Feature{ | |
| 1561 | .@"3e3r2", | |
| 1562 | .@"3e3r3", | |
| 1563 | .btst16, | |
| 1564 | .ck803, | |
| 1565 | .dspv2, | |
| 1566 | .hwdiv, | |
| 1567 | .mp, | |
| 1568 | .nvic, | |
| 1569 | .trust, | |
| 1570 | }), | |
| 1571 | }; | |
| 1572 | pub const ck803ht = CpuModel{ | |
| 1573 | .name = "ck803ht", | |
| 1574 | .llvm_name = "ck803ht", | |
| 1575 | .features = featureSet(&[_]Feature{ | |
| 1576 | .btst16, | |
| 1577 | .ck803, | |
| 1578 | .hwdiv, | |
| 1579 | .mp, | |
| 1580 | .nvic, | |
| 1581 | .trust, | |
| 1582 | }), | |
| 1583 | }; | |
| 1584 | pub const ck803htr1 = CpuModel{ | |
| 1585 | .name = "ck803htr1", | |
| 1586 | .llvm_name = "ck803htr1", | |
| 1587 | .features = featureSet(&[_]Feature{ | |
| 1588 | .@"3e3r1", | |
| 1589 | .@"3e3r3", | |
| 1590 | .btst16, | |
| 1591 | .ck803, | |
| 1592 | .dspv2, | |
| 1593 | .hwdiv, | |
| 1594 | .mp, | |
| 1595 | .nvic, | |
| 1596 | .trust, | |
| 1597 | }), | |
| 1598 | }; | |
| 1599 | pub const ck803htr2 = CpuModel{ | |
| 1600 | .name = "ck803htr2", | |
| 1601 | .llvm_name = "ck803htr2", | |
| 1602 | .features = featureSet(&[_]Feature{ | |
| 1603 | .@"3e3r2", | |
| 1604 | .@"3e3r3", | |
| 1605 | .btst16, | |
| 1606 | .ck803, | |
| 1607 | .dspv2, | |
| 1608 | .hwdiv, | |
| 1609 | .mp, | |
| 1610 | .nvic, | |
| 1611 | .trust, | |
| 1612 | }), | |
| 1613 | }; | |
| 1614 | pub const ck803htr3 = CpuModel{ | |
| 1615 | .name = "ck803htr3", | |
| 1616 | .llvm_name = "ck803htr3", | |
| 1617 | .features = featureSet(&[_]Feature{ | |
| 1618 | .@"3e3r2", | |
| 1619 | .@"3e3r3", | |
| 1620 | .btst16, | |
| 1621 | .ck803, | |
| 1622 | .dspv2, | |
| 1623 | .hwdiv, | |
| 1624 | .mp, | |
| 1625 | .nvic, | |
| 1626 | .trust, | |
| 1627 | }), | |
| 1628 | }; | |
| 1629 | pub const ck803r1 = CpuModel{ | |
| 1630 | .name = "ck803r1", | |
| 1631 | .llvm_name = "ck803r1", | |
| 1632 | .features = featureSet(&[_]Feature{ | |
| 1633 | .@"3e3r1", | |
| 1634 | .@"3e3r3", | |
| 1635 | .btst16, | |
| 1636 | .ck803, | |
| 1637 | .dspv2, | |
| 1638 | .hwdiv, | |
| 1639 | .mp, | |
| 1640 | .nvic, | |
| 1641 | .trust, | |
| 1642 | }), | |
| 1643 | }; | |
| 1644 | pub const ck803r2 = CpuModel{ | |
| 1645 | .name = "ck803r2", | |
| 1646 | .llvm_name = "ck803r2", | |
| 1647 | .features = featureSet(&[_]Feature{ | |
| 1648 | .@"3e3r2", | |
| 1649 | .@"3e3r3", | |
| 1650 | .btst16, | |
| 1651 | .ck803, | |
| 1652 | .dspv2, | |
| 1653 | .hwdiv, | |
| 1654 | .mp, | |
| 1655 | .nvic, | |
| 1656 | .trust, | |
| 1657 | }), | |
| 1658 | }; | |
| 1659 | pub const ck803r3 = CpuModel{ | |
| 1660 | .name = "ck803r3", | |
| 1661 | .llvm_name = "ck803r3", | |
| 1662 | .features = featureSet(&[_]Feature{ | |
| 1663 | .@"3e3r2", | |
| 1664 | .@"3e3r3", | |
| 1665 | .btst16, | |
| 1666 | .ck803, | |
| 1667 | .dspv2, | |
| 1668 | .hwdiv, | |
| 1669 | .mp, | |
| 1670 | .nvic, | |
| 1671 | .trust, | |
| 1672 | }), | |
| 1673 | }; | |
| 1674 | pub const ck803s = CpuModel{ | |
| 1675 | .name = "ck803s", | |
| 1676 | .llvm_name = "ck803s", | |
| 1677 | .features = featureSet(&[_]Feature{ | |
| 1678 | .@"3e3r1", | |
| 1679 | .btst16, | |
| 1680 | .ck803, | |
| 1681 | .ck803s, | |
| 1682 | .hwdiv, | |
| 1683 | .mp, | |
| 1684 | .nvic, | |
| 1685 | .trust, | |
| 1686 | }), | |
| 1687 | }; | |
| 1688 | pub const ck803se = CpuModel{ | |
| 1689 | .name = "ck803se", | |
| 1690 | .llvm_name = "ck803se", | |
| 1691 | .features = featureSet(&[_]Feature{ | |
| 1692 | .@"3e3r1", | |
| 1693 | .btst16, | |
| 1694 | .ck803, | |
| 1695 | .ck803s, | |
| 1696 | .dsp1e2, | |
| 1697 | .dspe60, | |
| 1698 | .edsp, | |
| 1699 | .hwdiv, | |
| 1700 | .mp, | |
| 1701 | .nvic, | |
| 1702 | .trust, | |
| 1703 | }), | |
| 1704 | }; | |
| 1705 | pub const ck803sef = CpuModel{ | |
| 1706 | .name = "ck803sef", | |
| 1707 | .llvm_name = "ck803sef", | |
| 1708 | .features = featureSet(&[_]Feature{ | |
| 1709 | .@"3e3r1", | |
| 1710 | .btst16, | |
| 1711 | .ck803, | |
| 1712 | .ck803s, | |
| 1713 | .dsp1e2, | |
| 1714 | .dspe60, | |
| 1715 | .edsp, | |
| 1716 | .float1e3, | |
| 1717 | .floate1, | |
| 1718 | .fpuv2_sf, | |
| 1719 | .hwdiv, | |
| 1720 | .mp, | |
| 1721 | .nvic, | |
| 1722 | .trust, | |
| 1723 | }), | |
| 1724 | }; | |
| 1725 | pub const ck803sefn = CpuModel{ | |
| 1726 | .name = "ck803sefn", | |
| 1727 | .llvm_name = "ck803sefn", | |
| 1728 | .features = featureSet(&[_]Feature{ | |
| 1729 | .@"3e3r1", | |
| 1730 | .btst16, | |
| 1731 | .ck803, | |
| 1732 | .ck803s, | |
| 1733 | .dsp1e2, | |
| 1734 | .dsp_silan, | |
| 1735 | .dspe60, | |
| 1736 | .edsp, | |
| 1737 | .float1e3, | |
| 1738 | .floate1, | |
| 1739 | .fpuv2_sf, | |
| 1740 | .hwdiv, | |
| 1741 | .mp, | |
| 1742 | .nvic, | |
| 1743 | .trust, | |
| 1744 | }), | |
| 1745 | }; | |
| 1746 | pub const ck803sefnt = CpuModel{ | |
| 1747 | .name = "ck803sefnt", | |
| 1748 | .llvm_name = "ck803sefnt", | |
| 1749 | .features = featureSet(&[_]Feature{ | |
| 1750 | .@"3e3r1", | |
| 1751 | .btst16, | |
| 1752 | .ck803, | |
| 1753 | .ck803s, | |
| 1754 | .dsp1e2, | |
| 1755 | .dsp_silan, | |
| 1756 | .dspe60, | |
| 1757 | .edsp, | |
| 1758 | .float1e3, | |
| 1759 | .floate1, | |
| 1760 | .fpuv2_sf, | |
| 1761 | .hwdiv, | |
| 1762 | .mp, | |
| 1763 | .nvic, | |
| 1764 | .trust, | |
| 1765 | }), | |
| 1766 | }; | |
| 1767 | pub const ck803seft = CpuModel{ | |
| 1768 | .name = "ck803seft", | |
| 1769 | .llvm_name = "ck803seft", | |
| 1770 | .features = featureSet(&[_]Feature{ | |
| 1771 | .@"3e3r1", | |
| 1772 | .btst16, | |
| 1773 | .ck803, | |
| 1774 | .ck803s, | |
| 1775 | .dsp1e2, | |
| 1776 | .dspe60, | |
| 1777 | .edsp, | |
| 1778 | .float1e3, | |
| 1779 | .floate1, | |
| 1780 | .fpuv2_sf, | |
| 1781 | .hwdiv, | |
| 1782 | .mp, | |
| 1783 | .nvic, | |
| 1784 | .trust, | |
| 1785 | }), | |
| 1786 | }; | |
| 1787 | pub const ck803sen = CpuModel{ | |
| 1788 | .name = "ck803sen", | |
| 1789 | .llvm_name = "ck803sen", | |
| 1790 | .features = featureSet(&[_]Feature{ | |
| 1791 | .@"3e3r1", | |
| 1792 | .btst16, | |
| 1793 | .ck803, | |
| 1794 | .ck803s, | |
| 1795 | .dsp1e2, | |
| 1796 | .dsp_silan, | |
| 1797 | .dspe60, | |
| 1798 | .edsp, | |
| 1799 | .hwdiv, | |
| 1800 | .mp, | |
| 1801 | .nvic, | |
| 1802 | .trust, | |
| 1803 | }), | |
| 1804 | }; | |
| 1805 | pub const ck803sf = CpuModel{ | |
| 1806 | .name = "ck803sf", | |
| 1807 | .llvm_name = "ck803sf", | |
| 1808 | .features = featureSet(&[_]Feature{ | |
| 1809 | .@"3e3r1", | |
| 1810 | .btst16, | |
| 1811 | .ck803, | |
| 1812 | .ck803s, | |
| 1813 | .float1e3, | |
| 1814 | .floate1, | |
| 1815 | .fpuv2_sf, | |
| 1816 | .hwdiv, | |
| 1817 | .mp, | |
| 1818 | .nvic, | |
| 1819 | .trust, | |
| 1820 | }), | |
| 1821 | }; | |
| 1822 | pub const ck803sfn = CpuModel{ | |
| 1823 | .name = "ck803sfn", | |
| 1824 | .llvm_name = "ck803sfn", | |
| 1825 | .features = featureSet(&[_]Feature{ | |
| 1826 | .@"3e3r1", | |
| 1827 | .btst16, | |
| 1828 | .ck803, | |
| 1829 | .ck803s, | |
| 1830 | .dsp_silan, | |
| 1831 | .float1e3, | |
| 1832 | .floate1, | |
| 1833 | .fpuv2_sf, | |
| 1834 | .hwdiv, | |
| 1835 | .mp, | |
| 1836 | .nvic, | |
| 1837 | .trust, | |
| 1838 | }), | |
| 1839 | }; | |
| 1840 | pub const ck803sn = CpuModel{ | |
| 1841 | .name = "ck803sn", | |
| 1842 | .llvm_name = "ck803sn", | |
| 1843 | .features = featureSet(&[_]Feature{ | |
| 1844 | .@"3e3r1", | |
| 1845 | .btst16, | |
| 1846 | .ck803, | |
| 1847 | .ck803s, | |
| 1848 | .dsp_silan, | |
| 1849 | .hwdiv, | |
| 1850 | .mp, | |
| 1851 | .nvic, | |
| 1852 | .trust, | |
| 1853 | }), | |
| 1854 | }; | |
| 1855 | pub const ck803snt = CpuModel{ | |
| 1856 | .name = "ck803snt", | |
| 1857 | .llvm_name = "ck803snt", | |
| 1858 | .features = featureSet(&[_]Feature{ | |
| 1859 | .@"3e3r1", | |
| 1860 | .btst16, | |
| 1861 | .ck803, | |
| 1862 | .ck803s, | |
| 1863 | .dsp_silan, | |
| 1864 | .hwdiv, | |
| 1865 | .mp, | |
| 1866 | .nvic, | |
| 1867 | .trust, | |
| 1868 | }), | |
| 1869 | }; | |
| 1870 | pub const ck803st = CpuModel{ | |
| 1871 | .name = "ck803st", | |
| 1872 | .llvm_name = "ck803st", | |
| 1873 | .features = featureSet(&[_]Feature{ | |
| 1874 | .@"3e3r1", | |
| 1875 | .btst16, | |
| 1876 | .ck803, | |
| 1877 | .ck803s, | |
| 1878 | .hwdiv, | |
| 1879 | .mp, | |
| 1880 | .nvic, | |
| 1881 | .trust, | |
| 1882 | }), | |
| 1883 | }; | |
| 1884 | pub const ck803t = CpuModel{ | |
| 1885 | .name = "ck803t", | |
| 1886 | .llvm_name = "ck803t", | |
| 1887 | .features = featureSet(&[_]Feature{ | |
| 1888 | .btst16, | |
| 1889 | .ck803, | |
| 1890 | .hwdiv, | |
| 1891 | .mp, | |
| 1892 | .nvic, | |
| 1893 | .trust, | |
| 1894 | }), | |
| 1895 | }; | |
| 1896 | pub const ck803tr1 = CpuModel{ | |
| 1897 | .name = "ck803tr1", | |
| 1898 | .llvm_name = "ck803tr1", | |
| 1899 | .features = featureSet(&[_]Feature{ | |
| 1900 | .@"3e3r1", | |
| 1901 | .@"3e3r3", | |
| 1902 | .btst16, | |
| 1903 | .ck803, | |
| 1904 | .dspv2, | |
| 1905 | .hwdiv, | |
| 1906 | .mp, | |
| 1907 | .nvic, | |
| 1908 | .trust, | |
| 1909 | }), | |
| 1910 | }; | |
| 1911 | pub const ck803tr2 = CpuModel{ | |
| 1912 | .name = "ck803tr2", | |
| 1913 | .llvm_name = "ck803tr2", | |
| 1914 | .features = featureSet(&[_]Feature{ | |
| 1915 | .@"3e3r2", | |
| 1916 | .@"3e3r3", | |
| 1917 | .btst16, | |
| 1918 | .ck803, | |
| 1919 | .dspv2, | |
| 1920 | .hwdiv, | |
| 1921 | .mp, | |
| 1922 | .nvic, | |
| 1923 | .trust, | |
| 1924 | }), | |
| 1925 | }; | |
| 1926 | pub const ck803tr3 = CpuModel{ | |
| 1927 | .name = "ck803tr3", | |
| 1928 | .llvm_name = "ck803tr3", | |
| 1929 | .features = featureSet(&[_]Feature{ | |
| 1930 | .@"3e3r2", | |
| 1931 | .@"3e3r3", | |
| 1932 | .btst16, | |
| 1933 | .ck803, | |
| 1934 | .dspv2, | |
| 1935 | .hwdiv, | |
| 1936 | .mp, | |
| 1937 | .nvic, | |
| 1938 | .trust, | |
| 1939 | }), | |
| 1940 | }; | |
| 1941 | pub const ck804 = CpuModel{ | |
| 1942 | .name = "ck804", | |
| 1943 | .llvm_name = "ck804", | |
| 1944 | .features = featureSet(&[_]Feature{ | |
| 1945 | .@"3e3r2", | |
| 1946 | .@"3e3r3", | |
| 1947 | .btst16, | |
| 1948 | .ck803, | |
| 1949 | .ck804, | |
| 1950 | .hwdiv, | |
| 1951 | .mp, | |
| 1952 | .nvic, | |
| 1953 | .trust, | |
| 1954 | }), | |
| 1955 | }; | |
| 1956 | pub const ck804e = CpuModel{ | |
| 1957 | .name = "ck804e", | |
| 1958 | .llvm_name = "ck804e", | |
| 1959 | .features = featureSet(&[_]Feature{ | |
| 1960 | .@"3e3r2", | |
| 1961 | .@"3e3r3", | |
| 1962 | .btst16, | |
| 1963 | .ck803, | |
| 1964 | .ck804, | |
| 1965 | .dspv2, | |
| 1966 | .high_registers, | |
| 1967 | .hwdiv, | |
| 1968 | .mp, | |
| 1969 | .nvic, | |
| 1970 | .trust, | |
| 1971 | }), | |
| 1972 | }; | |
| 1973 | pub const ck804ef = CpuModel{ | |
| 1974 | .name = "ck804ef", | |
| 1975 | .llvm_name = "ck804ef", | |
| 1976 | .features = featureSet(&[_]Feature{ | |
| 1977 | .@"3e3r2", | |
| 1978 | .@"3e3r3", | |
| 1979 | .btst16, | |
| 1980 | .ck803, | |
| 1981 | .ck804, | |
| 1982 | .dspv2, | |
| 1983 | .float1e3, | |
| 1984 | .floate1, | |
| 1985 | .fpuv2_sf, | |
| 1986 | .high_registers, | |
| 1987 | .hwdiv, | |
| 1988 | .mp, | |
| 1989 | .nvic, | |
| 1990 | .trust, | |
| 1991 | }), | |
| 1992 | }; | |
| 1993 | pub const ck804efh = CpuModel{ | |
| 1994 | .name = "ck804efh", | |
| 1995 | .llvm_name = "ck804efh", | |
| 1996 | .features = featureSet(&[_]Feature{ | |
| 1997 | .@"3e3r2", | |
| 1998 | .@"3e3r3", | |
| 1999 | .btst16, | |
| 2000 | .ck803, | |
| 2001 | .ck804, | |
| 2002 | .dspv2, | |
| 2003 | .float1e3, | |
| 2004 | .floate1, | |
| 2005 | .fpuv2_sf, | |
| 2006 | .high_registers, | |
| 2007 | .hwdiv, | |
| 2008 | .mp, | |
| 2009 | .nvic, | |
| 2010 | .trust, | |
| 2011 | }), | |
| 2012 | }; | |
| 2013 | pub const ck804efht = CpuModel{ | |
| 2014 | .name = "ck804efht", | |
| 2015 | .llvm_name = "ck804efht", | |
| 2016 | .features = featureSet(&[_]Feature{ | |
| 2017 | .@"3e3r2", | |
| 2018 | .@"3e3r3", | |
| 2019 | .btst16, | |
| 2020 | .ck803, | |
| 2021 | .ck804, | |
| 2022 | .dspv2, | |
| 2023 | .float1e3, | |
| 2024 | .floate1, | |
| 2025 | .fpuv2_sf, | |
| 2026 | .high_registers, | |
| 2027 | .hwdiv, | |
| 2028 | .mp, | |
| 2029 | .nvic, | |
| 2030 | .trust, | |
| 2031 | }), | |
| 2032 | }; | |
| 2033 | pub const ck804eft = CpuModel{ | |
| 2034 | .name = "ck804eft", | |
| 2035 | .llvm_name = "ck804eft", | |
| 2036 | .features = featureSet(&[_]Feature{ | |
| 2037 | .@"3e3r2", | |
| 2038 | .@"3e3r3", | |
| 2039 | .btst16, | |
| 2040 | .ck803, | |
| 2041 | .ck804, | |
| 2042 | .dspv2, | |
| 2043 | .float1e3, | |
| 2044 | .floate1, | |
| 2045 | .fpuv2_sf, | |
| 2046 | .high_registers, | |
| 2047 | .hwdiv, | |
| 2048 | .mp, | |
| 2049 | .nvic, | |
| 2050 | .trust, | |
| 2051 | }), | |
| 2052 | }; | |
| 2053 | pub const ck804eh = CpuModel{ | |
| 2054 | .name = "ck804eh", | |
| 2055 | .llvm_name = "ck804eh", | |
| 2056 | .features = featureSet(&[_]Feature{ | |
| 2057 | .@"3e3r2", | |
| 2058 | .@"3e3r3", | |
| 2059 | .btst16, | |
| 2060 | .ck803, | |
| 2061 | .ck804, | |
| 2062 | .dspv2, | |
| 2063 | .high_registers, | |
| 2064 | .hwdiv, | |
| 2065 | .mp, | |
| 2066 | .nvic, | |
| 2067 | .trust, | |
| 2068 | }), | |
| 2069 | }; | |
| 2070 | pub const ck804eht = CpuModel{ | |
| 2071 | .name = "ck804eht", | |
| 2072 | .llvm_name = "ck804eht", | |
| 2073 | .features = featureSet(&[_]Feature{ | |
| 2074 | .@"3e3r2", | |
| 2075 | .@"3e3r3", | |
| 2076 | .btst16, | |
| 2077 | .ck803, | |
| 2078 | .ck804, | |
| 2079 | .dspv2, | |
| 2080 | .high_registers, | |
| 2081 | .hwdiv, | |
| 2082 | .mp, | |
| 2083 | .nvic, | |
| 2084 | .trust, | |
| 2085 | }), | |
| 2086 | }; | |
| 2087 | pub const ck804et = CpuModel{ | |
| 2088 | .name = "ck804et", | |
| 2089 | .llvm_name = "ck804et", | |
| 2090 | .features = featureSet(&[_]Feature{ | |
| 2091 | .@"3e3r2", | |
| 2092 | .@"3e3r3", | |
| 2093 | .btst16, | |
| 2094 | .ck803, | |
| 2095 | .ck804, | |
| 2096 | .dspv2, | |
| 2097 | .high_registers, | |
| 2098 | .hwdiv, | |
| 2099 | .mp, | |
| 2100 | .nvic, | |
| 2101 | .trust, | |
| 2102 | }), | |
| 2103 | }; | |
| 2104 | pub const ck804f = CpuModel{ | |
| 2105 | .name = "ck804f", | |
| 2106 | .llvm_name = "ck804f", | |
| 2107 | .features = featureSet(&[_]Feature{ | |
| 2108 | .@"3e3r2", | |
| 2109 | .@"3e3r3", | |
| 2110 | .btst16, | |
| 2111 | .ck803, | |
| 2112 | .ck804, | |
| 2113 | .float1e3, | |
| 2114 | .floate1, | |
| 2115 | .fpuv2_sf, | |
| 2116 | .hwdiv, | |
| 2117 | .mp, | |
| 2118 | .nvic, | |
| 2119 | .trust, | |
| 2120 | }), | |
| 2121 | }; | |
| 2122 | pub const ck804fh = CpuModel{ | |
| 2123 | .name = "ck804fh", | |
| 2124 | .llvm_name = "ck804fh", | |
| 2125 | .features = featureSet(&[_]Feature{ | |
| 2126 | .@"3e3r2", | |
| 2127 | .@"3e3r3", | |
| 2128 | .btst16, | |
| 2129 | .ck803, | |
| 2130 | .ck804, | |
| 2131 | .float1e3, | |
| 2132 | .floate1, | |
| 2133 | .fpuv2_sf, | |
| 2134 | .hwdiv, | |
| 2135 | .mp, | |
| 2136 | .nvic, | |
| 2137 | .trust, | |
| 2138 | }), | |
| 2139 | }; | |
| 2140 | pub const ck804ft = CpuModel{ | |
| 2141 | .name = "ck804ft", | |
| 2142 | .llvm_name = "ck804ft", | |
| 2143 | .features = featureSet(&[_]Feature{ | |
| 2144 | .@"3e3r2", | |
| 2145 | .@"3e3r3", | |
| 2146 | .btst16, | |
| 2147 | .ck803, | |
| 2148 | .ck804, | |
| 2149 | .float1e3, | |
| 2150 | .floate1, | |
| 2151 | .fpuv2_sf, | |
| 2152 | .hwdiv, | |
| 2153 | .mp, | |
| 2154 | .nvic, | |
| 2155 | .trust, | |
| 2156 | }), | |
| 2157 | }; | |
| 2158 | pub const ck804h = CpuModel{ | |
| 2159 | .name = "ck804h", | |
| 2160 | .llvm_name = "ck804h", | |
| 2161 | .features = featureSet(&[_]Feature{ | |
| 2162 | .@"3e3r2", | |
| 2163 | .@"3e3r3", | |
| 2164 | .btst16, | |
| 2165 | .ck803, | |
| 2166 | .ck804, | |
| 2167 | .hwdiv, | |
| 2168 | .mp, | |
| 2169 | .nvic, | |
| 2170 | .trust, | |
| 2171 | }), | |
| 2172 | }; | |
| 2173 | pub const ck804ht = CpuModel{ | |
| 2174 | .name = "ck804ht", | |
| 2175 | .llvm_name = "ck804ht", | |
| 2176 | .features = featureSet(&[_]Feature{ | |
| 2177 | .@"3e3r2", | |
| 2178 | .@"3e3r3", | |
| 2179 | .btst16, | |
| 2180 | .ck803, | |
| 2181 | .ck804, | |
| 2182 | .hwdiv, | |
| 2183 | .mp, | |
| 2184 | .nvic, | |
| 2185 | .trust, | |
| 2186 | }), | |
| 2187 | }; | |
| 2188 | pub const ck804t = CpuModel{ | |
| 2189 | .name = "ck804t", | |
| 2190 | .llvm_name = "ck804t", | |
| 2191 | .features = featureSet(&[_]Feature{ | |
| 2192 | .@"3e3r2", | |
| 2193 | .@"3e3r3", | |
| 2194 | .btst16, | |
| 2195 | .ck803, | |
| 2196 | .ck804, | |
| 2197 | .hwdiv, | |
| 2198 | .mp, | |
| 2199 | .nvic, | |
| 2200 | .trust, | |
| 2201 | }), | |
| 2202 | }; | |
| 2203 | pub const ck805 = CpuModel{ | |
| 2204 | .name = "ck805", | |
| 2205 | .llvm_name = "ck805", | |
| 2206 | .features = featureSet(&[_]Feature{ | |
| 2207 | .@"3e3r2", | |
| 2208 | .@"3e3r3", | |
| 2209 | .btst16, | |
| 2210 | .ck803, | |
| 2211 | .ck805, | |
| 2212 | .high_registers, | |
| 2213 | .hwdiv, | |
| 2214 | .mp, | |
| 2215 | .nvic, | |
| 2216 | .trust, | |
| 2217 | .vdsp2e3, | |
| 2218 | .vdspv2, | |
| 2219 | }), | |
| 2220 | }; | |
| 2221 | pub const ck805e = CpuModel{ | |
| 2222 | .name = "ck805e", | |
| 2223 | .llvm_name = "ck805e", | |
| 2224 | .features = featureSet(&[_]Feature{ | |
| 2225 | .@"3e3r2", | |
| 2226 | .@"3e3r3", | |
| 2227 | .btst16, | |
| 2228 | .ck803, | |
| 2229 | .ck805, | |
| 2230 | .dspv2, | |
| 2231 | .high_registers, | |
| 2232 | .hwdiv, | |
| 2233 | .mp, | |
| 2234 | .nvic, | |
| 2235 | .trust, | |
| 2236 | .vdsp2e3, | |
| 2237 | .vdspv2, | |
| 2238 | }), | |
| 2239 | }; | |
| 2240 | pub const ck805ef = CpuModel{ | |
| 2241 | .name = "ck805ef", | |
| 2242 | .llvm_name = "ck805ef", | |
| 2243 | .features = featureSet(&[_]Feature{ | |
| 2244 | .@"3e3r2", | |
| 2245 | .@"3e3r3", | |
| 2246 | .btst16, | |
| 2247 | .ck803, | |
| 2248 | .ck805, | |
| 2249 | .dspv2, | |
| 2250 | .float1e3, | |
| 2251 | .floate1, | |
| 2252 | .fpuv2_sf, | |
| 2253 | .high_registers, | |
| 2254 | .hwdiv, | |
| 2255 | .mp, | |
| 2256 | .nvic, | |
| 2257 | .trust, | |
| 2258 | .vdsp2e3, | |
| 2259 | .vdspv2, | |
| 2260 | }), | |
| 2261 | }; | |
| 2262 | pub const ck805eft = CpuModel{ | |
| 2263 | .name = "ck805eft", | |
| 2264 | .llvm_name = "ck805eft", | |
| 2265 | .features = featureSet(&[_]Feature{ | |
| 2266 | .@"3e3r2", | |
| 2267 | .@"3e3r3", | |
| 2268 | .btst16, | |
| 2269 | .ck803, | |
| 2270 | .ck805, | |
| 2271 | .dspv2, | |
| 2272 | .float1e3, | |
| 2273 | .floate1, | |
| 2274 | .fpuv2_sf, | |
| 2275 | .high_registers, | |
| 2276 | .hwdiv, | |
| 2277 | .mp, | |
| 2278 | .nvic, | |
| 2279 | .trust, | |
| 2280 | .vdsp2e3, | |
| 2281 | .vdspv2, | |
| 2282 | }), | |
| 2283 | }; | |
| 2284 | pub const ck805et = CpuModel{ | |
| 2285 | .name = "ck805et", | |
| 2286 | .llvm_name = "ck805et", | |
| 2287 | .features = featureSet(&[_]Feature{ | |
| 2288 | .@"3e3r2", | |
| 2289 | .@"3e3r3", | |
| 2290 | .btst16, | |
| 2291 | .ck803, | |
| 2292 | .ck805, | |
| 2293 | .dspv2, | |
| 2294 | .high_registers, | |
| 2295 | .hwdiv, | |
| 2296 | .mp, | |
| 2297 | .nvic, | |
| 2298 | .trust, | |
| 2299 | .vdsp2e3, | |
| 2300 | .vdspv2, | |
| 2301 | }), | |
| 2302 | }; | |
| 2303 | pub const ck805f = CpuModel{ | |
| 2304 | .name = "ck805f", | |
| 2305 | .llvm_name = "ck805f", | |
| 2306 | .features = featureSet(&[_]Feature{ | |
| 2307 | .@"3e3r2", | |
| 2308 | .@"3e3r3", | |
| 2309 | .btst16, | |
| 2310 | .ck803, | |
| 2311 | .ck805, | |
| 2312 | .float1e3, | |
| 2313 | .floate1, | |
| 2314 | .fpuv2_sf, | |
| 2315 | .high_registers, | |
| 2316 | .hwdiv, | |
| 2317 | .mp, | |
| 2318 | .nvic, | |
| 2319 | .trust, | |
| 2320 | .vdsp2e3, | |
| 2321 | .vdspv2, | |
| 2322 | }), | |
| 2323 | }; | |
| 2324 | pub const ck805ft = CpuModel{ | |
| 2325 | .name = "ck805ft", | |
| 2326 | .llvm_name = "ck805ft", | |
| 2327 | .features = featureSet(&[_]Feature{ | |
| 2328 | .@"3e3r2", | |
| 2329 | .@"3e3r3", | |
| 2330 | .btst16, | |
| 2331 | .ck803, | |
| 2332 | .ck805, | |
| 2333 | .float1e3, | |
| 2334 | .floate1, | |
| 2335 | .fpuv2_sf, | |
| 2336 | .high_registers, | |
| 2337 | .hwdiv, | |
| 2338 | .mp, | |
| 2339 | .nvic, | |
| 2340 | .trust, | |
| 2341 | .vdsp2e3, | |
| 2342 | .vdspv2, | |
| 2343 | }), | |
| 2344 | }; | |
| 2345 | pub const ck805t = CpuModel{ | |
| 2346 | .name = "ck805t", | |
| 2347 | .llvm_name = "ck805t", | |
| 2348 | .features = featureSet(&[_]Feature{ | |
| 2349 | .@"3e3r2", | |
| 2350 | .@"3e3r3", | |
| 2351 | .btst16, | |
| 2352 | .ck803, | |
| 2353 | .ck805, | |
| 2354 | .high_registers, | |
| 2355 | .hwdiv, | |
| 2356 | .mp, | |
| 2357 | .nvic, | |
| 2358 | .trust, | |
| 2359 | .vdsp2e3, | |
| 2360 | .vdspv2, | |
| 2361 | }), | |
| 2362 | }; | |
| 2363 | pub const ck807 = CpuModel{ | |
| 2364 | .name = "ck807", | |
| 2365 | .llvm_name = "ck807", | |
| 2366 | .features = featureSet(&[_]Feature{ | |
| 2367 | .cache, | |
| 2368 | .ck807, | |
| 2369 | .dsp1e2, | |
| 2370 | .dspe60, | |
| 2371 | .edsp, | |
| 2372 | .hard_tp, | |
| 2373 | .high_registers, | |
| 2374 | .hwdiv, | |
| 2375 | .mp, | |
| 2376 | .mp1e2, | |
| 2377 | .nvic, | |
| 2378 | .trust, | |
| 2379 | }), | |
| 2380 | }; | |
| 2381 | pub const ck807e = CpuModel{ | |
| 2382 | .name = "ck807e", | |
| 2383 | .llvm_name = "ck807e", | |
| 2384 | .features = featureSet(&[_]Feature{ | |
| 2385 | .cache, | |
| 2386 | .ck807, | |
| 2387 | .dsp1e2, | |
| 2388 | .dspe60, | |
| 2389 | .edsp, | |
| 2390 | .hard_tp, | |
| 2391 | .high_registers, | |
| 2392 | .hwdiv, | |
| 2393 | .mp, | |
| 2394 | .mp1e2, | |
| 2395 | .nvic, | |
| 2396 | .trust, | |
| 2397 | }), | |
| 2398 | }; | |
| 2399 | pub const ck807ef = CpuModel{ | |
| 2400 | .name = "ck807ef", | |
| 2401 | .llvm_name = "ck807ef", | |
| 2402 | .features = featureSet(&[_]Feature{ | |
| 2403 | .cache, | |
| 2404 | .ck807, | |
| 2405 | .dsp1e2, | |
| 2406 | .dspe60, | |
| 2407 | .edsp, | |
| 2408 | .fdivdu, | |
| 2409 | .float1e2, | |
| 2410 | .float1e3, | |
| 2411 | .float3e4, | |
| 2412 | .floate1, | |
| 2413 | .fpuv2_df, | |
| 2414 | .fpuv2_sf, | |
| 2415 | .hard_tp, | |
| 2416 | .high_registers, | |
| 2417 | .hwdiv, | |
| 2418 | .mp, | |
| 2419 | .mp1e2, | |
| 2420 | .nvic, | |
| 2421 | .trust, | |
| 2422 | }), | |
| 2423 | }; | |
| 2424 | pub const ck807f = CpuModel{ | |
| 2425 | .name = "ck807f", | |
| 2426 | .llvm_name = "ck807f", | |
| 2427 | .features = featureSet(&[_]Feature{ | |
| 2428 | .cache, | |
| 2429 | .ck807, | |
| 2430 | .dsp1e2, | |
| 2431 | .dspe60, | |
| 2432 | .edsp, | |
| 2433 | .fdivdu, | |
| 2434 | .float1e2, | |
| 2435 | .float1e3, | |
| 2436 | .float3e4, | |
| 2437 | .floate1, | |
| 2438 | .fpuv2_df, | |
| 2439 | .fpuv2_sf, | |
| 2440 | .hard_tp, | |
| 2441 | .high_registers, | |
| 2442 | .hwdiv, | |
| 2443 | .mp, | |
| 2444 | .mp1e2, | |
| 2445 | .nvic, | |
| 2446 | .trust, | |
| 2447 | }), | |
| 2448 | }; | |
| 2449 | pub const ck810 = CpuModel{ | |
| 2450 | .name = "ck810", | |
| 2451 | .llvm_name = "ck810", | |
| 2452 | .features = featureSet(&[_]Feature{ | |
| 2453 | .@"7e10", | |
| 2454 | .cache, | |
| 2455 | .ck810, | |
| 2456 | .dsp1e2, | |
| 2457 | .dspe60, | |
| 2458 | .edsp, | |
| 2459 | .hard_tp, | |
| 2460 | .high_registers, | |
| 2461 | .hwdiv, | |
| 2462 | .mp, | |
| 2463 | .mp1e2, | |
| 2464 | .nvic, | |
| 2465 | .trust, | |
| 2466 | }), | |
| 2467 | }; | |
| 2468 | pub const ck810e = CpuModel{ | |
| 2469 | .name = "ck810e", | |
| 2470 | .llvm_name = "ck810e", | |
| 2471 | .features = featureSet(&[_]Feature{ | |
| 2472 | .@"7e10", | |
| 2473 | .cache, | |
| 2474 | .ck810, | |
| 2475 | .dsp1e2, | |
| 2476 | .dspe60, | |
| 2477 | .edsp, | |
| 2478 | .hard_tp, | |
| 2479 | .high_registers, | |
| 2480 | .hwdiv, | |
| 2481 | .mp, | |
| 2482 | .mp1e2, | |
| 2483 | .nvic, | |
| 2484 | .trust, | |
| 2485 | }), | |
| 2486 | }; | |
| 2487 | pub const ck810ef = CpuModel{ | |
| 2488 | .name = "ck810ef", | |
| 2489 | .llvm_name = "ck810ef", | |
| 2490 | .features = featureSet(&[_]Feature{ | |
| 2491 | .@"7e10", | |
| 2492 | .cache, | |
| 2493 | .ck810, | |
| 2494 | .dsp1e2, | |
| 2495 | .dspe60, | |
| 2496 | .edsp, | |
| 2497 | .fdivdu, | |
| 2498 | .float1e2, | |
| 2499 | .floate1, | |
| 2500 | .fpuv2_df, | |
| 2501 | .fpuv2_sf, | |
| 2502 | .hard_tp, | |
| 2503 | .high_registers, | |
| 2504 | .hwdiv, | |
| 2505 | .mp, | |
| 2506 | .mp1e2, | |
| 2507 | .nvic, | |
| 2508 | .trust, | |
| 2509 | }), | |
| 2510 | }; | |
| 2511 | pub const ck810eft = CpuModel{ | |
| 2512 | .name = "ck810eft", | |
| 2513 | .llvm_name = "ck810eft", | |
| 2514 | .features = featureSet(&[_]Feature{ | |
| 2515 | .@"7e10", | |
| 2516 | .cache, | |
| 2517 | .ck810, | |
| 2518 | .dsp1e2, | |
| 2519 | .dspe60, | |
| 2520 | .edsp, | |
| 2521 | .fdivdu, | |
| 2522 | .float1e2, | |
| 2523 | .floate1, | |
| 2524 | .fpuv2_df, | |
| 2525 | .fpuv2_sf, | |
| 2526 | .hard_tp, | |
| 2527 | .high_registers, | |
| 2528 | .hwdiv, | |
| 2529 | .mp, | |
| 2530 | .mp1e2, | |
| 2531 | .nvic, | |
| 2532 | .trust, | |
| 2533 | }), | |
| 2534 | }; | |
| 2535 | pub const ck810eftv = CpuModel{ | |
| 2536 | .name = "ck810eftv", | |
| 2537 | .llvm_name = "ck810eftv", | |
| 2538 | .features = featureSet(&[_]Feature{ | |
| 2539 | .@"7e10", | |
| 2540 | .cache, | |
| 2541 | .ck810, | |
| 2542 | .ck810v, | |
| 2543 | .dsp1e2, | |
| 2544 | .dspe60, | |
| 2545 | .edsp, | |
| 2546 | .fdivdu, | |
| 2547 | .float1e2, | |
| 2548 | .floate1, | |
| 2549 | .fpuv2_df, | |
| 2550 | .fpuv2_sf, | |
| 2551 | .hard_tp, | |
| 2552 | .high_registers, | |
| 2553 | .hwdiv, | |
| 2554 | .mp, | |
| 2555 | .mp1e2, | |
| 2556 | .nvic, | |
| 2557 | .trust, | |
| 2558 | .vdspv1, | |
| 2559 | }), | |
| 2560 | }; | |
| 2561 | pub const ck810efv = CpuModel{ | |
| 2562 | .name = "ck810efv", | |
| 2563 | .llvm_name = "ck810efv", | |
| 2564 | .features = featureSet(&[_]Feature{ | |
| 2565 | .@"7e10", | |
| 2566 | .cache, | |
| 2567 | .ck810, | |
| 2568 | .ck810v, | |
| 2569 | .dsp1e2, | |
| 2570 | .dspe60, | |
| 2571 | .edsp, | |
| 2572 | .fdivdu, | |
| 2573 | .float1e2, | |
| 2574 | .floate1, | |
| 2575 | .fpuv2_df, | |
| 2576 | .fpuv2_sf, | |
| 2577 | .hard_tp, | |
| 2578 | .high_registers, | |
| 2579 | .hwdiv, | |
| 2580 | .mp, | |
| 2581 | .mp1e2, | |
| 2582 | .nvic, | |
| 2583 | .trust, | |
| 2584 | .vdspv1, | |
| 2585 | }), | |
| 2586 | }; | |
| 2587 | pub const ck810et = CpuModel{ | |
| 2588 | .name = "ck810et", | |
| 2589 | .llvm_name = "ck810et", | |
| 2590 | .features = featureSet(&[_]Feature{ | |
| 2591 | .@"7e10", | |
| 2592 | .cache, | |
| 2593 | .ck810, | |
| 2594 | .dsp1e2, | |
| 2595 | .dspe60, | |
| 2596 | .edsp, | |
| 2597 | .hard_tp, | |
| 2598 | .high_registers, | |
| 2599 | .hwdiv, | |
| 2600 | .mp, | |
| 2601 | .mp1e2, | |
| 2602 | .nvic, | |
| 2603 | .trust, | |
| 2604 | }), | |
| 2605 | }; | |
| 2606 | pub const ck810etv = CpuModel{ | |
| 2607 | .name = "ck810etv", | |
| 2608 | .llvm_name = "ck810etv", | |
| 2609 | .features = featureSet(&[_]Feature{ | |
| 2610 | .@"7e10", | |
| 2611 | .cache, | |
| 2612 | .ck810, | |
| 2613 | .ck810v, | |
| 2614 | .dsp1e2, | |
| 2615 | .dspe60, | |
| 2616 | .edsp, | |
| 2617 | .hard_tp, | |
| 2618 | .high_registers, | |
| 2619 | .hwdiv, | |
| 2620 | .mp, | |
| 2621 | .mp1e2, | |
| 2622 | .nvic, | |
| 2623 | .trust, | |
| 2624 | .vdspv1, | |
| 2625 | }), | |
| 2626 | }; | |
| 2627 | pub const ck810ev = CpuModel{ | |
| 2628 | .name = "ck810ev", | |
| 2629 | .llvm_name = "ck810ev", | |
| 2630 | .features = featureSet(&[_]Feature{ | |
| 2631 | .@"7e10", | |
| 2632 | .cache, | |
| 2633 | .ck810, | |
| 2634 | .ck810v, | |
| 2635 | .dsp1e2, | |
| 2636 | .dspe60, | |
| 2637 | .edsp, | |
| 2638 | .hard_tp, | |
| 2639 | .high_registers, | |
| 2640 | .hwdiv, | |
| 2641 | .mp, | |
| 2642 | .mp1e2, | |
| 2643 | .nvic, | |
| 2644 | .trust, | |
| 2645 | .vdspv1, | |
| 2646 | }), | |
| 2647 | }; | |
| 2648 | pub const ck810f = CpuModel{ | |
| 2649 | .name = "ck810f", | |
| 2650 | .llvm_name = "ck810f", | |
| 2651 | .features = featureSet(&[_]Feature{ | |
| 2652 | .@"7e10", | |
| 2653 | .cache, | |
| 2654 | .ck810, | |
| 2655 | .dsp1e2, | |
| 2656 | .dspe60, | |
| 2657 | .edsp, | |
| 2658 | .fdivdu, | |
| 2659 | .float1e2, | |
| 2660 | .floate1, | |
| 2661 | .fpuv2_df, | |
| 2662 | .fpuv2_sf, | |
| 2663 | .hard_tp, | |
| 2664 | .high_registers, | |
| 2665 | .hwdiv, | |
| 2666 | .mp, | |
| 2667 | .mp1e2, | |
| 2668 | .nvic, | |
| 2669 | .trust, | |
| 2670 | }), | |
| 2671 | }; | |
| 2672 | pub const ck810ft = CpuModel{ | |
| 2673 | .name = "ck810ft", | |
| 2674 | .llvm_name = "ck810ft", | |
| 2675 | .features = featureSet(&[_]Feature{ | |
| 2676 | .@"7e10", | |
| 2677 | .cache, | |
| 2678 | .ck810, | |
| 2679 | .dsp1e2, | |
| 2680 | .dspe60, | |
| 2681 | .edsp, | |
| 2682 | .fdivdu, | |
| 2683 | .float1e2, | |
| 2684 | .floate1, | |
| 2685 | .fpuv2_df, | |
| 2686 | .fpuv2_sf, | |
| 2687 | .hard_tp, | |
| 2688 | .high_registers, | |
| 2689 | .hwdiv, | |
| 2690 | .mp, | |
| 2691 | .mp1e2, | |
| 2692 | .nvic, | |
| 2693 | .trust, | |
| 2694 | }), | |
| 2695 | }; | |
| 2696 | pub const ck810ftv = CpuModel{ | |
| 2697 | .name = "ck810ftv", | |
| 2698 | .llvm_name = "ck810ftv", | |
| 2699 | .features = featureSet(&[_]Feature{ | |
| 2700 | .@"7e10", | |
| 2701 | .cache, | |
| 2702 | .ck810, | |
| 2703 | .ck810v, | |
| 2704 | .dsp1e2, | |
| 2705 | .dspe60, | |
| 2706 | .edsp, | |
| 2707 | .fdivdu, | |
| 2708 | .float1e2, | |
| 2709 | .floate1, | |
| 2710 | .fpuv2_df, | |
| 2711 | .fpuv2_sf, | |
| 2712 | .hard_tp, | |
| 2713 | .high_registers, | |
| 2714 | .hwdiv, | |
| 2715 | .mp, | |
| 2716 | .mp1e2, | |
| 2717 | .nvic, | |
| 2718 | .trust, | |
| 2719 | .vdspv1, | |
| 2720 | }), | |
| 2721 | }; | |
| 2722 | pub const ck810fv = CpuModel{ | |
| 2723 | .name = "ck810fv", | |
| 2724 | .llvm_name = "ck810fv", | |
| 2725 | .features = featureSet(&[_]Feature{ | |
| 2726 | .@"7e10", | |
| 2727 | .cache, | |
| 2728 | .ck810, | |
| 2729 | .ck810v, | |
| 2730 | .dsp1e2, | |
| 2731 | .dspe60, | |
| 2732 | .edsp, | |
| 2733 | .fdivdu, | |
| 2734 | .float1e2, | |
| 2735 | .floate1, | |
| 2736 | .fpuv2_df, | |
| 2737 | .fpuv2_sf, | |
| 2738 | .hard_tp, | |
| 2739 | .high_registers, | |
| 2740 | .hwdiv, | |
| 2741 | .mp, | |
| 2742 | .mp1e2, | |
| 2743 | .nvic, | |
| 2744 | .trust, | |
| 2745 | .vdspv1, | |
| 2746 | }), | |
| 2747 | }; | |
| 2748 | pub const ck810t = CpuModel{ | |
| 2749 | .name = "ck810t", | |
| 2750 | .llvm_name = "ck810t", | |
| 2751 | .features = featureSet(&[_]Feature{ | |
| 2752 | .@"7e10", | |
| 2753 | .cache, | |
| 2754 | .ck810, | |
| 2755 | .dsp1e2, | |
| 2756 | .dspe60, | |
| 2757 | .edsp, | |
| 2758 | .hard_tp, | |
| 2759 | .high_registers, | |
| 2760 | .hwdiv, | |
| 2761 | .mp, | |
| 2762 | .mp1e2, | |
| 2763 | .nvic, | |
| 2764 | .trust, | |
| 2765 | }), | |
| 2766 | }; | |
| 2767 | pub const ck810tv = CpuModel{ | |
| 2768 | .name = "ck810tv", | |
| 2769 | .llvm_name = "ck810tv", | |
| 2770 | .features = featureSet(&[_]Feature{ | |
| 2771 | .@"7e10", | |
| 2772 | .cache, | |
| 2773 | .ck810, | |
| 2774 | .ck810v, | |
| 2775 | .dsp1e2, | |
| 2776 | .dspe60, | |
| 2777 | .edsp, | |
| 2778 | .hard_tp, | |
| 2779 | .high_registers, | |
| 2780 | .hwdiv, | |
| 2781 | .mp, | |
| 2782 | .mp1e2, | |
| 2783 | .nvic, | |
| 2784 | .trust, | |
| 2785 | .vdspv1, | |
| 2786 | }), | |
| 2787 | }; | |
| 2788 | pub const ck810v = CpuModel{ | |
| 2789 | .name = "ck810v", | |
| 2790 | .llvm_name = "ck810v", | |
| 2791 | .features = featureSet(&[_]Feature{ | |
| 2792 | .@"7e10", | |
| 2793 | .cache, | |
| 2794 | .ck810, | |
| 2795 | .ck810v, | |
| 2796 | .dsp1e2, | |
| 2797 | .dspe60, | |
| 2798 | .edsp, | |
| 2799 | .hard_tp, | |
| 2800 | .high_registers, | |
| 2801 | .hwdiv, | |
| 2802 | .mp, | |
| 2803 | .mp1e2, | |
| 2804 | .nvic, | |
| 2805 | .trust, | |
| 2806 | .vdspv1, | |
| 2807 | }), | |
| 2808 | }; | |
| 2809 | pub const ck860 = CpuModel{ | |
| 2810 | .name = "ck860", | |
| 2811 | .llvm_name = "ck860", | |
| 2812 | .features = featureSet(&[_]Feature{ | |
| 2813 | .@"10e60", | |
| 2814 | .@"3e3r2", | |
| 2815 | .@"3e3r3", | |
| 2816 | .btst16, | |
| 2817 | .cache, | |
| 2818 | .ck860, | |
| 2819 | .dspe60, | |
| 2820 | .hard_tp, | |
| 2821 | .high_registers, | |
| 2822 | .hwdiv, | |
| 2823 | .mp, | |
| 2824 | .mp1e2, | |
| 2825 | .nvic, | |
| 2826 | .trust, | |
| 2827 | }), | |
| 2828 | }; | |
| 2829 | pub const ck860f = CpuModel{ | |
| 2830 | .name = "ck860f", | |
| 2831 | .llvm_name = "ck860f", | |
| 2832 | .features = featureSet(&[_]Feature{ | |
| 2833 | .@"10e60", | |
| 2834 | .@"3e3r2", | |
| 2835 | .@"3e3r3", | |
| 2836 | .btst16, | |
| 2837 | .cache, | |
| 2838 | .ck860, | |
| 2839 | .dspe60, | |
| 2840 | .float7e60, | |
| 2841 | .fpuv3_df, | |
| 2842 | .fpuv3_hf, | |
| 2843 | .fpuv3_hi, | |
| 2844 | .fpuv3_sf, | |
| 2845 | .hard_tp, | |
| 2846 | .high_registers, | |
| 2847 | .hwdiv, | |
| 2848 | .mp, | |
| 2849 | .mp1e2, | |
| 2850 | .nvic, | |
| 2851 | .trust, | |
| 2852 | }), | |
| 2853 | }; | |
| 2854 | pub const ck860fv = CpuModel{ | |
| 2855 | .name = "ck860fv", | |
| 2856 | .llvm_name = "ck860fv", | |
| 2857 | .features = featureSet(&[_]Feature{ | |
| 2858 | .@"10e60", | |
| 2859 | .@"3e3r2", | |
| 2860 | .@"3e3r3", | |
| 2861 | .btst16, | |
| 2862 | .cache, | |
| 2863 | .ck860, | |
| 2864 | .ck860v, | |
| 2865 | .dspe60, | |
| 2866 | .float7e60, | |
| 2867 | .fpuv3_df, | |
| 2868 | .fpuv3_hf, | |
| 2869 | .fpuv3_hi, | |
| 2870 | .fpuv3_sf, | |
| 2871 | .hard_tp, | |
| 2872 | .high_registers, | |
| 2873 | .hwdiv, | |
| 2874 | .mp, | |
| 2875 | .mp1e2, | |
| 2876 | .nvic, | |
| 2877 | .trust, | |
| 2878 | .vdsp2e60f, | |
| 2879 | .vdspv2, | |
| 2880 | }), | |
| 2881 | }; | |
| 2882 | pub const ck860v = CpuModel{ | |
| 2883 | .name = "ck860v", | |
| 2884 | .llvm_name = "ck860v", | |
| 2885 | .features = featureSet(&[_]Feature{ | |
| 2886 | .@"10e60", | |
| 2887 | .@"3e3r2", | |
| 2888 | .@"3e3r3", | |
| 2889 | .btst16, | |
| 2890 | .cache, | |
| 2891 | .ck860, | |
| 2892 | .ck860v, | |
| 2893 | .dspe60, | |
| 2894 | .hard_tp, | |
| 2895 | .high_registers, | |
| 2896 | .hwdiv, | |
| 2897 | .mp, | |
| 2898 | .mp1e2, | |
| 2899 | .nvic, | |
| 2900 | .trust, | |
| 2901 | .vdsp2e60f, | |
| 2902 | .vdspv2, | |
| 2903 | }), | |
| 2904 | }; | |
| 2905 | pub const e801 = CpuModel{ | |
| 2906 | .name = "e801", | |
| 2907 | .llvm_name = "e801", | |
| 2908 | .features = featureSet(&[_]Feature{ | |
| 2909 | .btst16, | |
| 2910 | .ck801, | |
| 2911 | .e1, | |
| 2912 | .trust, | |
| 2913 | }), | |
| 2914 | }; | |
| 2915 | pub const e802 = CpuModel{ | |
| 2916 | .name = "e802", | |
| 2917 | .llvm_name = "e802", | |
| 2918 | .features = featureSet(&[_]Feature{ | |
| 2919 | .btst16, | |
| 2920 | .ck802, | |
| 2921 | .e2, | |
| 2922 | .nvic, | |
| 2923 | .trust, | |
| 2924 | }), | |
| 2925 | }; | |
| 2926 | pub const e802t = CpuModel{ | |
| 2927 | .name = "e802t", | |
| 2928 | .llvm_name = "e802t", | |
| 2929 | .features = featureSet(&[_]Feature{ | |
| 2930 | .btst16, | |
| 2931 | .ck802, | |
| 2932 | .e2, | |
| 2933 | .nvic, | |
| 2934 | .trust, | |
| 2935 | }), | |
| 2936 | }; | |
| 2937 | pub const e803 = CpuModel{ | |
| 2938 | .name = "e803", | |
| 2939 | .llvm_name = "e803", | |
| 2940 | .features = featureSet(&[_]Feature{ | |
| 2941 | .@"3e3r2", | |
| 2942 | .@"3e3r3", | |
| 2943 | .btst16, | |
| 2944 | .ck803, | |
| 2945 | .hwdiv, | |
| 2946 | .mp, | |
| 2947 | .nvic, | |
| 2948 | .trust, | |
| 2949 | }), | |
| 2950 | }; | |
| 2951 | pub const e803t = CpuModel{ | |
| 2952 | .name = "e803t", | |
| 2953 | .llvm_name = "e803t", | |
| 2954 | .features = featureSet(&[_]Feature{ | |
| 2955 | .@"3e3r2", | |
| 2956 | .@"3e3r3", | |
| 2957 | .btst16, | |
| 2958 | .ck803, | |
| 2959 | .hwdiv, | |
| 2960 | .mp, | |
| 2961 | .nvic, | |
| 2962 | .trust, | |
| 2963 | }), | |
| 2964 | }; | |
| 2965 | pub const e804d = CpuModel{ | |
| 2966 | .name = "e804d", | |
| 2967 | .llvm_name = "e804d", | |
| 2968 | .features = featureSet(&[_]Feature{ | |
| 2969 | .@"3e3r2", | |
| 2970 | .@"3e3r3", | |
| 2971 | .btst16, | |
| 2972 | .ck803, | |
| 2973 | .ck804, | |
| 2974 | .dspv2, | |
| 2975 | .high_registers, | |
| 2976 | .hwdiv, | |
| 2977 | .mp, | |
| 2978 | .nvic, | |
| 2979 | .trust, | |
| 2980 | }), | |
| 2981 | }; | |
| 2982 | pub const e804df = CpuModel{ | |
| 2983 | .name = "e804df", | |
| 2984 | .llvm_name = "e804df", | |
| 2985 | .features = featureSet(&[_]Feature{ | |
| 2986 | .@"3e3r2", | |
| 2987 | .@"3e3r3", | |
| 2988 | .btst16, | |
| 2989 | .ck803, | |
| 2990 | .ck804, | |
| 2991 | .dspv2, | |
| 2992 | .float1e3, | |
| 2993 | .floate1, | |
| 2994 | .fpuv2_sf, | |
| 2995 | .high_registers, | |
| 2996 | .hwdiv, | |
| 2997 | .mp, | |
| 2998 | .nvic, | |
| 2999 | .trust, | |
| 3000 | }), | |
| 3001 | }; | |
| 3002 | pub const e804dft = CpuModel{ | |
| 3003 | .name = "e804dft", | |
| 3004 | .llvm_name = "e804dft", | |
| 3005 | .features = featureSet(&[_]Feature{ | |
| 3006 | .@"3e3r2", | |
| 3007 | .@"3e3r3", | |
| 3008 | .btst16, | |
| 3009 | .ck803, | |
| 3010 | .ck804, | |
| 3011 | .dspv2, | |
| 3012 | .float1e3, | |
| 3013 | .floate1, | |
| 3014 | .fpuv2_sf, | |
| 3015 | .high_registers, | |
| 3016 | .hwdiv, | |
| 3017 | .mp, | |
| 3018 | .nvic, | |
| 3019 | .trust, | |
| 3020 | }), | |
| 3021 | }; | |
| 3022 | pub const e804dt = CpuModel{ | |
| 3023 | .name = "e804dt", | |
| 3024 | .llvm_name = "e804dt", | |
| 3025 | .features = featureSet(&[_]Feature{ | |
| 3026 | .@"3e3r2", | |
| 3027 | .@"3e3r3", | |
| 3028 | .btst16, | |
| 3029 | .ck803, | |
| 3030 | .ck804, | |
| 3031 | .dspv2, | |
| 3032 | .high_registers, | |
| 3033 | .hwdiv, | |
| 3034 | .mp, | |
| 3035 | .nvic, | |
| 3036 | .trust, | |
| 3037 | }), | |
| 3038 | }; | |
| 3039 | pub const e804f = CpuModel{ | |
| 3040 | .name = "e804f", | |
| 3041 | .llvm_name = "e804f", | |
| 3042 | .features = featureSet(&[_]Feature{ | |
| 3043 | .@"3e3r2", | |
| 3044 | .@"3e3r3", | |
| 3045 | .btst16, | |
| 3046 | .ck803, | |
| 3047 | .ck804, | |
| 3048 | .float1e3, | |
| 3049 | .floate1, | |
| 3050 | .fpuv2_sf, | |
| 3051 | .hwdiv, | |
| 3052 | .mp, | |
| 3053 | .nvic, | |
| 3054 | .trust, | |
| 3055 | }), | |
| 3056 | }; | |
| 3057 | pub const e804ft = CpuModel{ | |
| 3058 | .name = "e804ft", | |
| 3059 | .llvm_name = "e804ft", | |
| 3060 | .features = featureSet(&[_]Feature{ | |
| 3061 | .@"3e3r2", | |
| 3062 | .@"3e3r3", | |
| 3063 | .btst16, | |
| 3064 | .ck803, | |
| 3065 | .ck804, | |
| 3066 | .float1e3, | |
| 3067 | .floate1, | |
| 3068 | .fpuv2_sf, | |
| 3069 | .hwdiv, | |
| 3070 | .mp, | |
| 3071 | .nvic, | |
| 3072 | .trust, | |
| 3073 | }), | |
| 3074 | }; | |
| 158 | 3075 | pub const generic = CpuModel{ |
| 159 | 3076 | .name = "generic", |
| 160 | 3077 | .llvm_name = "generic", |
| 161 | 3078 | .features = featureSet(&[_]Feature{}), |
| 162 | 3079 | }; |
| 3080 | pub const @"i805" = CpuModel{ | |
| 3081 | .name = "i805", | |
| 3082 | .llvm_name = "i805", | |
| 3083 | .features = featureSet(&[_]Feature{ | |
| 3084 | .@"3e3r2", | |
| 3085 | .@"3e3r3", | |
| 3086 | .btst16, | |
| 3087 | .ck803, | |
| 3088 | .ck805, | |
| 3089 | .high_registers, | |
| 3090 | .hwdiv, | |
| 3091 | .mp, | |
| 3092 | .nvic, | |
| 3093 | .trust, | |
| 3094 | .vdsp2e3, | |
| 3095 | .vdspv2, | |
| 3096 | }), | |
| 3097 | }; | |
| 3098 | pub const i805f = CpuModel{ | |
| 3099 | .name = "i805f", | |
| 3100 | .llvm_name = "i805f", | |
| 3101 | .features = featureSet(&[_]Feature{ | |
| 3102 | .@"3e3r2", | |
| 3103 | .@"3e3r3", | |
| 3104 | .btst16, | |
| 3105 | .ck803, | |
| 3106 | .ck805, | |
| 3107 | .float1e3, | |
| 3108 | .floate1, | |
| 3109 | .fpuv2_sf, | |
| 3110 | .high_registers, | |
| 3111 | .hwdiv, | |
| 3112 | .mp, | |
| 3113 | .nvic, | |
| 3114 | .trust, | |
| 3115 | .vdsp2e3, | |
| 3116 | .vdspv2, | |
| 3117 | }), | |
| 3118 | }; | |
| 3119 | pub const r807 = CpuModel{ | |
| 3120 | .name = "r807", | |
| 3121 | .llvm_name = "r807", | |
| 3122 | .features = featureSet(&[_]Feature{ | |
| 3123 | .cache, | |
| 3124 | .ck807, | |
| 3125 | .dsp1e2, | |
| 3126 | .dspe60, | |
| 3127 | .edsp, | |
| 3128 | .hard_tp, | |
| 3129 | .high_registers, | |
| 3130 | .hwdiv, | |
| 3131 | .mp, | |
| 3132 | .mp1e2, | |
| 3133 | .nvic, | |
| 3134 | .trust, | |
| 3135 | }), | |
| 3136 | }; | |
| 3137 | pub const r807f = CpuModel{ | |
| 3138 | .name = "r807f", | |
| 3139 | .llvm_name = "r807f", | |
| 3140 | .features = featureSet(&[_]Feature{ | |
| 3141 | .cache, | |
| 3142 | .ck807, | |
| 3143 | .dsp1e2, | |
| 3144 | .dspe60, | |
| 3145 | .edsp, | |
| 3146 | .fdivdu, | |
| 3147 | .float1e2, | |
| 3148 | .float1e3, | |
| 3149 | .float3e4, | |
| 3150 | .floate1, | |
| 3151 | .fpuv2_df, | |
| 3152 | .fpuv2_sf, | |
| 3153 | .hard_tp, | |
| 3154 | .high_registers, | |
| 3155 | .hwdiv, | |
| 3156 | .mp, | |
| 3157 | .mp1e2, | |
| 3158 | .nvic, | |
| 3159 | .trust, | |
| 3160 | }), | |
| 3161 | }; | |
| 3162 | pub const s802 = CpuModel{ | |
| 3163 | .name = "s802", | |
| 3164 | .llvm_name = "s802", | |
| 3165 | .features = featureSet(&[_]Feature{ | |
| 3166 | .btst16, | |
| 3167 | .ck802, | |
| 3168 | .e2, | |
| 3169 | .nvic, | |
| 3170 | .trust, | |
| 3171 | }), | |
| 3172 | }; | |
| 3173 | pub const s802t = CpuModel{ | |
| 3174 | .name = "s802t", | |
| 3175 | .llvm_name = "s802t", | |
| 3176 | .features = featureSet(&[_]Feature{ | |
| 3177 | .btst16, | |
| 3178 | .ck802, | |
| 3179 | .e2, | |
| 3180 | .nvic, | |
| 3181 | .trust, | |
| 3182 | }), | |
| 3183 | }; | |
| 3184 | pub const s803 = CpuModel{ | |
| 3185 | .name = "s803", | |
| 3186 | .llvm_name = "s803", | |
| 3187 | .features = featureSet(&[_]Feature{ | |
| 3188 | .@"3e3r2", | |
| 3189 | .@"3e3r3", | |
| 3190 | .btst16, | |
| 3191 | .ck803, | |
| 3192 | .hwdiv, | |
| 3193 | .mp, | |
| 3194 | .nvic, | |
| 3195 | .trust, | |
| 3196 | }), | |
| 3197 | }; | |
| 3198 | pub const s803t = CpuModel{ | |
| 3199 | .name = "s803t", | |
| 3200 | .llvm_name = "s803t", | |
| 3201 | .features = featureSet(&[_]Feature{ | |
| 3202 | .@"3e3r2", | |
| 3203 | .@"3e3r3", | |
| 3204 | .btst16, | |
| 3205 | .ck803, | |
| 3206 | .hwdiv, | |
| 3207 | .mp, | |
| 3208 | .nvic, | |
| 3209 | .trust, | |
| 3210 | }), | |
| 3211 | }; | |
| 163 | 3212 | }; |
lib/std/target/powerpc.zig+15| ... | ... | @@ -46,6 +46,7 @@ pub const Feature = enum { |
| 46 | 46 | htm, |
| 47 | 47 | icbt, |
| 48 | 48 | invariant_function_descriptors, |
| 49 | isa_future_instructions, | |
| 49 | 50 | isa_v206_instructions, |
| 50 | 51 | isa_v207_instructions, |
| 51 | 52 | isa_v30_instructions, |
| ... | ... | @@ -354,6 +355,13 @@ pub const all_features = blk: { |
| 354 | 355 | .description = "Assume function descriptors are invariant", |
| 355 | 356 | .dependencies = featureSet(&[_]Feature{}), |
| 356 | 357 | }; |
| 358 | result[@enumToInt(Feature.isa_future_instructions)] = .{ | |
| 359 | .llvm_name = "isa-future-instructions", | |
| 360 | .description = "Enable instructions for Future ISA.", | |
| 361 | .dependencies = featureSet(&[_]Feature{ | |
| 362 | .isa_v31_instructions, | |
| 363 | }), | |
| 364 | }; | |
| 357 | 365 | result[@enumToInt(Feature.isa_v206_instructions)] = .{ |
| 358 | 366 | .llvm_name = "isa-v206-instructions", |
| 359 | 367 | .description = "Enable instructions in ISA 2.06.", |
| ... | ... | @@ -728,6 +736,7 @@ pub const cpu = struct { |
| 728 | 736 | .frsqrte, |
| 729 | 737 | .frsqrtes, |
| 730 | 738 | .fsqrt, |
| 739 | .isa_v206_instructions, | |
| 731 | 740 | .isel, |
| 732 | 741 | .ldbrx, |
| 733 | 742 | .lfiwax, |
| ... | ... | @@ -774,6 +783,7 @@ pub const cpu = struct { |
| 774 | 783 | .allow_unaligned_fp_access, |
| 775 | 784 | .bpermd, |
| 776 | 785 | .cmpb, |
| 786 | .crbits, | |
| 777 | 787 | .crypto, |
| 778 | 788 | .direct_move, |
| 779 | 789 | .extdiv, |
| ... | ... | @@ -793,6 +803,7 @@ pub const cpu = struct { |
| 793 | 803 | .fuse_store, |
| 794 | 804 | .htm, |
| 795 | 805 | .icbt, |
| 806 | .isa_future_instructions, | |
| 796 | 807 | .isa_v206_instructions, |
| 797 | 808 | .isel, |
| 798 | 809 | .ldbrx, |
| ... | ... | @@ -886,6 +897,7 @@ pub const cpu = struct { |
| 886 | 897 | .allow_unaligned_fp_access, |
| 887 | 898 | .bpermd, |
| 888 | 899 | .cmpb, |
| 900 | .crbits, | |
| 889 | 901 | .crypto, |
| 890 | 902 | .direct_move, |
| 891 | 903 | .extdiv, |
| ... | ... | @@ -925,6 +937,7 @@ pub const cpu = struct { |
| 925 | 937 | .allow_unaligned_fp_access, |
| 926 | 938 | .bpermd, |
| 927 | 939 | .cmpb, |
| 940 | .crbits, | |
| 928 | 941 | .crypto, |
| 929 | 942 | .direct_move, |
| 930 | 943 | .extdiv, |
| ... | ... | @@ -1096,6 +1109,7 @@ pub const cpu = struct { |
| 1096 | 1109 | .allow_unaligned_fp_access, |
| 1097 | 1110 | .bpermd, |
| 1098 | 1111 | .cmpb, |
| 1112 | .crbits, | |
| 1099 | 1113 | .crypto, |
| 1100 | 1114 | .direct_move, |
| 1101 | 1115 | .extdiv, |
| ... | ... | @@ -1135,6 +1149,7 @@ pub const cpu = struct { |
| 1135 | 1149 | .allow_unaligned_fp_access, |
| 1136 | 1150 | .bpermd, |
| 1137 | 1151 | .cmpb, |
| 1152 | .crbits, | |
| 1138 | 1153 | .crypto, |
| 1139 | 1154 | .direct_move, |
| 1140 | 1155 | .extdiv, |
lib/std/target/riscv.zig+69-1| ... | ... | @@ -16,8 +16,11 @@ pub const Feature = enum { |
| 16 | 16 | experimental_zbp, |
| 17 | 17 | experimental_zbr, |
| 18 | 18 | experimental_zbt, |
| 19 | experimental_zvfh, | |
| 19 | 20 | f, |
| 21 | lui_addi_fusion, | |
| 20 | 22 | m, |
| 23 | no_default_unroll, | |
| 21 | 24 | no_rvc_hints, |
| 22 | 25 | relax, |
| 23 | 26 | reserve_x1, |
| ... | ... | @@ -52,6 +55,7 @@ pub const Feature = enum { |
| 52 | 55 | reserve_x8, |
| 53 | 56 | reserve_x9, |
| 54 | 57 | save_restore, |
| 58 | unaligned_scalar_mem, | |
| 55 | 59 | v, |
| 56 | 60 | zba, |
| 57 | 61 | zbb, |
| ... | ... | @@ -66,6 +70,10 @@ pub const Feature = enum { |
| 66 | 70 | zfinx, |
| 67 | 71 | zhinx, |
| 68 | 72 | zhinxmin, |
| 73 | zicbom, | |
| 74 | zicbop, | |
| 75 | zicboz, | |
| 76 | zihintpause, | |
| 69 | 77 | zk, |
| 70 | 78 | zkn, |
| 71 | 79 | zknd, |
| ... | ... | @@ -76,6 +84,7 @@ pub const Feature = enum { |
| 76 | 84 | zksed, |
| 77 | 85 | zksh, |
| 78 | 86 | zkt, |
| 87 | zmmul, | |
| 79 | 88 | zve32f, |
| 80 | 89 | zve32x, |
| 81 | 90 | zve64d, |
| ... | ... | @@ -160,16 +169,33 @@ pub const all_features = blk: { |
| 160 | 169 | .description = "'Zbt' (Ternary 'Zb' Instructions)", |
| 161 | 170 | .dependencies = featureSet(&[_]Feature{}), |
| 162 | 171 | }; |
| 172 | result[@enumToInt(Feature.experimental_zvfh)] = .{ | |
| 173 | .llvm_name = "experimental-zvfh", | |
| 174 | .description = "'Zvfh' (Vector Half-Precision Floating-Point)", | |
| 175 | .dependencies = featureSet(&[_]Feature{ | |
| 176 | .zve32f, | |
| 177 | }), | |
| 178 | }; | |
| 163 | 179 | result[@enumToInt(Feature.f)] = .{ |
| 164 | 180 | .llvm_name = "f", |
| 165 | 181 | .description = "'F' (Single-Precision Floating-Point)", |
| 166 | 182 | .dependencies = featureSet(&[_]Feature{}), |
| 167 | 183 | }; |
| 184 | result[@enumToInt(Feature.lui_addi_fusion)] = .{ | |
| 185 | .llvm_name = "lui-addi-fusion", | |
| 186 | .description = "Enable LUI+ADDI macrofusion", | |
| 187 | .dependencies = featureSet(&[_]Feature{}), | |
| 188 | }; | |
| 168 | 189 | result[@enumToInt(Feature.m)] = .{ |
| 169 | 190 | .llvm_name = "m", |
| 170 | 191 | .description = "'M' (Integer Multiplication and Division)", |
| 171 | 192 | .dependencies = featureSet(&[_]Feature{}), |
| 172 | 193 | }; |
| 194 | result[@enumToInt(Feature.no_default_unroll)] = .{ | |
| 195 | .llvm_name = "no-default-unroll", | |
| 196 | .description = "Disable default unroll preference.", | |
| 197 | .dependencies = featureSet(&[_]Feature{}), | |
| 198 | }; | |
| 173 | 199 | result[@enumToInt(Feature.no_rvc_hints)] = .{ |
| 174 | 200 | .llvm_name = "no-rvc-hints", |
| 175 | 201 | .description = "Disable RVC Hint Instructions.", |
| ... | ... | @@ -340,11 +366,17 @@ pub const all_features = blk: { |
| 340 | 366 | .description = "Enable save/restore.", |
| 341 | 367 | .dependencies = featureSet(&[_]Feature{}), |
| 342 | 368 | }; |
| 369 | result[@enumToInt(Feature.unaligned_scalar_mem)] = .{ | |
| 370 | .llvm_name = "unaligned-scalar-mem", | |
| 371 | .description = "Has reasonably performant unaligned scalar loads and stores", | |
| 372 | .dependencies = featureSet(&[_]Feature{}), | |
| 373 | }; | |
| 343 | 374 | result[@enumToInt(Feature.v)] = .{ |
| 344 | 375 | .llvm_name = "v", |
| 345 | 376 | .description = "'V' (Vector Extension for Application Processors)", |
| 346 | 377 | .dependencies = featureSet(&[_]Feature{ |
| 347 | 378 | .d, |
| 379 | .zve64d, | |
| 348 | 380 | .zvl128b, |
| 349 | 381 | }), |
| 350 | 382 | }; |
| ... | ... | @@ -423,6 +455,26 @@ pub const all_features = blk: { |
| 423 | 455 | .zfinx, |
| 424 | 456 | }), |
| 425 | 457 | }; |
| 458 | result[@enumToInt(Feature.zicbom)] = .{ | |
| 459 | .llvm_name = "zicbom", | |
| 460 | .description = "'Zicbom' (Cache-Block Management Instructions)", | |
| 461 | .dependencies = featureSet(&[_]Feature{}), | |
| 462 | }; | |
| 463 | result[@enumToInt(Feature.zicbop)] = .{ | |
| 464 | .llvm_name = "zicbop", | |
| 465 | .description = "'Zicbop' (Cache-Block Prefetch Instructions)", | |
| 466 | .dependencies = featureSet(&[_]Feature{}), | |
| 467 | }; | |
| 468 | result[@enumToInt(Feature.zicboz)] = .{ | |
| 469 | .llvm_name = "zicboz", | |
| 470 | .description = "'Zicboz' (Cache-Block Zero Instructions)", | |
| 471 | .dependencies = featureSet(&[_]Feature{}), | |
| 472 | }; | |
| 473 | result[@enumToInt(Feature.zihintpause)] = .{ | |
| 474 | .llvm_name = "zihintpause", | |
| 475 | .description = "'zihintpause' (Pause Hint)", | |
| 476 | .dependencies = featureSet(&[_]Feature{}), | |
| 477 | }; | |
| 426 | 478 | result[@enumToInt(Feature.zk)] = .{ |
| 427 | 479 | .llvm_name = "zk", |
| 428 | 480 | .description = "'Zk' (Standard scalar cryptography extension)", |
| ... | ... | @@ -490,6 +542,11 @@ pub const all_features = blk: { |
| 490 | 542 | .description = "'Zkt' (Data Independent Execution Latency)", |
| 491 | 543 | .dependencies = featureSet(&[_]Feature{}), |
| 492 | 544 | }; |
| 545 | result[@enumToInt(Feature.zmmul)] = .{ | |
| 546 | .llvm_name = "zmmul", | |
| 547 | .description = "'Zmmul' (Integer Multiplication)", | |
| 548 | .dependencies = featureSet(&[_]Feature{}), | |
| 549 | }; | |
| 493 | 550 | result[@enumToInt(Feature.zve32f)] = .{ |
| 494 | 551 | .llvm_name = "zve32f", |
| 495 | 552 | .description = "'Zve32f' (Vector Extensions for Embedded Processors with maximal 32 EEW and F extension)", |
| ... | ... | @@ -632,6 +689,11 @@ pub const cpu = struct { |
| 632 | 689 | .m, |
| 633 | 690 | }), |
| 634 | 691 | }; |
| 692 | pub const generic = CpuModel{ | |
| 693 | .name = "generic", | |
| 694 | .llvm_name = "generic", | |
| 695 | .features = featureSet(&[_]Feature{}), | |
| 696 | }; | |
| 635 | 697 | pub const generic_rv32 = CpuModel{ |
| 636 | 698 | .name = "generic_rv32", |
| 637 | 699 | .llvm_name = "generic-rv32", |
| ... | ... | @@ -659,13 +721,16 @@ pub const cpu = struct { |
| 659 | 721 | pub const sifive_7_rv32 = CpuModel{ |
| 660 | 722 | .name = "sifive_7_rv32", |
| 661 | 723 | .llvm_name = "sifive-7-rv32", |
| 662 | .features = featureSet(&[_]Feature{}), | |
| 724 | .features = featureSet(&[_]Feature{ | |
| 725 | .no_default_unroll, | |
| 726 | }), | |
| 663 | 727 | }; |
| 664 | 728 | pub const sifive_7_rv64 = CpuModel{ |
| 665 | 729 | .name = "sifive_7_rv64", |
| 666 | 730 | .llvm_name = "sifive-7-rv64", |
| 667 | 731 | .features = featureSet(&[_]Feature{ |
| 668 | 732 | .@"64bit", |
| 733 | .no_default_unroll, | |
| 669 | 734 | }), |
| 670 | 735 | }; |
| 671 | 736 | pub const sifive_e20 = CpuModel{ |
| ... | ... | @@ -722,6 +787,7 @@ pub const cpu = struct { |
| 722 | 787 | .c, |
| 723 | 788 | .f, |
| 724 | 789 | .m, |
| 790 | .no_default_unroll, | |
| 725 | 791 | }), |
| 726 | 792 | }; |
| 727 | 793 | pub const sifive_s21 = CpuModel{ |
| ... | ... | @@ -764,6 +830,7 @@ pub const cpu = struct { |
| 764 | 830 | .c, |
| 765 | 831 | .d, |
| 766 | 832 | .m, |
| 833 | .no_default_unroll, | |
| 767 | 834 | }), |
| 768 | 835 | }; |
| 769 | 836 | pub const sifive_u54 = CpuModel{ |
| ... | ... | @@ -786,6 +853,7 @@ pub const cpu = struct { |
| 786 | 853 | .c, |
| 787 | 854 | .d, |
| 788 | 855 | .m, |
| 856 | .no_default_unroll, | |
| 789 | 857 | }), |
| 790 | 858 | }; |
| 791 | 859 | }; |
lib/std/target/s390x.zig+46| ... | ... | @@ -579,6 +579,52 @@ pub const cpu = struct { |
| 579 | 579 | .vector_packed_decimal_enhancement, |
| 580 | 580 | }), |
| 581 | 581 | }; |
| 582 | pub const z16 = CpuModel{ | |
| 583 | .name = "z16", | |
| 584 | .llvm_name = "z16", | |
| 585 | .features = featureSet(&[_]Feature{ | |
| 586 | .bear_enhancement, | |
| 587 | .deflate_conversion, | |
| 588 | .dfp_packed_conversion, | |
| 589 | .dfp_zoned_conversion, | |
| 590 | .distinct_ops, | |
| 591 | .enhanced_dat_2, | |
| 592 | .enhanced_sort, | |
| 593 | .execution_hint, | |
| 594 | .fast_serialization, | |
| 595 | .fp_extension, | |
| 596 | .guarded_storage, | |
| 597 | .high_word, | |
| 598 | .insert_reference_bits_multiple, | |
| 599 | .interlocked_access1, | |
| 600 | .load_and_trap, | |
| 601 | .load_and_zero_rightmost_byte, | |
| 602 | .load_store_on_cond, | |
| 603 | .load_store_on_cond_2, | |
| 604 | .message_security_assist_extension3, | |
| 605 | .message_security_assist_extension4, | |
| 606 | .message_security_assist_extension5, | |
| 607 | .message_security_assist_extension7, | |
| 608 | .message_security_assist_extension8, | |
| 609 | .message_security_assist_extension9, | |
| 610 | .miscellaneous_extensions, | |
| 611 | .miscellaneous_extensions_2, | |
| 612 | .miscellaneous_extensions_3, | |
| 613 | .nnp_assist, | |
| 614 | .population_count, | |
| 615 | .processor_activity_instrumentation, | |
| 616 | .processor_assist, | |
| 617 | .reset_dat_protection, | |
| 618 | .reset_reference_bits_multiple, | |
| 619 | .transactional_execution, | |
| 620 | .vector, | |
| 621 | .vector_enhancements_1, | |
| 622 | .vector_enhancements_2, | |
| 623 | .vector_packed_decimal, | |
| 624 | .vector_packed_decimal_enhancement, | |
| 625 | .vector_packed_decimal_enhancement_2, | |
| 626 | }), | |
| 627 | }; | |
| 582 | 628 | pub const z196 = CpuModel{ |
| 583 | 629 | .name = "z196", |
| 584 | 630 | .llvm_name = "z196", |
lib/std/target/wasm.zig+6| ... | ... | @@ -8,6 +8,7 @@ pub const Feature = enum { |
| 8 | 8 | atomics, |
| 9 | 9 | bulk_memory, |
| 10 | 10 | exception_handling, |
| 11 | extended_const, | |
| 11 | 12 | multivalue, |
| 12 | 13 | mutable_globals, |
| 13 | 14 | nontrapping_fptoint, |
| ... | ... | @@ -42,6 +43,11 @@ pub const all_features = blk: { |
| 42 | 43 | .description = "Enable Wasm exception handling", |
| 43 | 44 | .dependencies = featureSet(&[_]Feature{}), |
| 44 | 45 | }; |
| 46 | result[@enumToInt(Feature.extended_const)] = .{ | |
| 47 | .llvm_name = "extended-const", | |
| 48 | .description = "Enable extended const expressions", | |
| 49 | .dependencies = featureSet(&[_]Feature{}), | |
| 50 | }; | |
| 45 | 51 | result[@enumToInt(Feature.multivalue)] = .{ |
| 46 | 52 | .llvm_name = "multivalue", |
| 47 | 53 | .description = "Enable multivalue blocks, instructions, and functions", |
lib/std/target/x86.zig+95-18| ... | ... | @@ -48,8 +48,13 @@ pub const Feature = enum { |
| 48 | 48 | enqcmd, |
| 49 | 49 | ermsb, |
| 50 | 50 | f16c, |
| 51 | false_deps_getmant, | |
| 51 | 52 | false_deps_lzcnt_tzcnt, |
| 53 | false_deps_mulc, | |
| 54 | false_deps_mullq, | |
| 55 | false_deps_perm, | |
| 52 | 56 | false_deps_popcnt, |
| 57 | false_deps_range, | |
| 53 | 58 | fast_11bytenop, |
| 54 | 59 | fast_15bytenop, |
| 55 | 60 | fast_7bytenop, |
| ... | ... | @@ -71,6 +76,8 @@ pub const Feature = enum { |
| 71 | 76 | fsrm, |
| 72 | 77 | fxsr, |
| 73 | 78 | gfni, |
| 79 | harden_sls_ijmp, | |
| 80 | harden_sls_ret, | |
| 74 | 81 | hreset, |
| 75 | 82 | idivl_to_divb, |
| 76 | 83 | idivq_to_divl, |
| ... | ... | @@ -101,6 +108,7 @@ pub const Feature = enum { |
| 101 | 108 | prfchw, |
| 102 | 109 | ptwrite, |
| 103 | 110 | rdpid, |
| 111 | rdpru, | |
| 104 | 112 | rdrnd, |
| 105 | 113 | rdseed, |
| 106 | 114 | retpoline, |
| ... | ... | @@ -109,6 +117,7 @@ pub const Feature = enum { |
| 109 | 117 | retpoline_indirect_calls, |
| 110 | 118 | rtm, |
| 111 | 119 | sahf, |
| 120 | sbb_dep_breaking, | |
| 112 | 121 | serialize, |
| 113 | 122 | seses, |
| 114 | 123 | sgx, |
| ... | ... | @@ -136,7 +145,6 @@ pub const Feature = enum { |
| 136 | 145 | tbm, |
| 137 | 146 | tsxldtrk, |
| 138 | 147 | uintr, |
| 139 | use_aa, | |
| 140 | 148 | use_glm_div_sqrt_costs, |
| 141 | 149 | use_slm_arith_costs, |
| 142 | 150 | vaes, |
| ... | ... | @@ -376,7 +384,7 @@ pub const all_features = blk: { |
| 376 | 384 | }; |
| 377 | 385 | result[@enumToInt(Feature.cldemote)] = .{ |
| 378 | 386 | .llvm_name = "cldemote", |
| 379 | .description = "Enable Cache Demote", | |
| 387 | .description = "Enable Cache Line Demote", | |
| 380 | 388 | .dependencies = featureSet(&[_]Feature{}), |
| 381 | 389 | }; |
| 382 | 390 | result[@enumToInt(Feature.clflushopt)] = .{ |
| ... | ... | @@ -401,12 +409,12 @@ pub const all_features = blk: { |
| 401 | 409 | }; |
| 402 | 410 | result[@enumToInt(Feature.crc32)] = .{ |
| 403 | 411 | .llvm_name = "crc32", |
| 404 | .description = "Enable SSE 4.2 CRC32 instruction", | |
| 412 | .description = "Enable SSE 4.2 CRC32 instruction (used when SSE4.2 is supported but function is GPR only)", | |
| 405 | 413 | .dependencies = featureSet(&[_]Feature{}), |
| 406 | 414 | }; |
| 407 | 415 | result[@enumToInt(Feature.cx16)] = .{ |
| 408 | 416 | .llvm_name = "cx16", |
| 409 | .description = "64-bit with cmpxchg16b", | |
| 417 | .description = "64-bit with cmpxchg16b (this is true for most x86-64 chips, but not the first AMD chips)", | |
| 410 | 418 | .dependencies = featureSet(&[_]Feature{ |
| 411 | 419 | .cx8, |
| 412 | 420 | }), |
| ... | ... | @@ -433,16 +441,41 @@ pub const all_features = blk: { |
| 433 | 441 | .avx, |
| 434 | 442 | }), |
| 435 | 443 | }; |
| 444 | result[@enumToInt(Feature.false_deps_getmant)] = .{ | |
| 445 | .llvm_name = "false-deps-getmant", | |
| 446 | .description = "VGETMANTSS/SD/SH and VGETMANDPS/PD(memory version) has a false dependency on dest register", | |
| 447 | .dependencies = featureSet(&[_]Feature{}), | |
| 448 | }; | |
| 436 | 449 | result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{ |
| 437 | 450 | .llvm_name = "false-deps-lzcnt-tzcnt", |
| 438 | 451 | .description = "LZCNT/TZCNT have a false dependency on dest register", |
| 439 | 452 | .dependencies = featureSet(&[_]Feature{}), |
| 440 | 453 | }; |
| 454 | result[@enumToInt(Feature.false_deps_mulc)] = .{ | |
| 455 | .llvm_name = "false-deps-mulc", | |
| 456 | .description = "VF[C]MULCPH/SH has a false dependency on dest register", | |
| 457 | .dependencies = featureSet(&[_]Feature{}), | |
| 458 | }; | |
| 459 | result[@enumToInt(Feature.false_deps_mullq)] = .{ | |
| 460 | .llvm_name = "false-deps-mullq", | |
| 461 | .description = "VPMULLQ has a false dependency on dest register", | |
| 462 | .dependencies = featureSet(&[_]Feature{}), | |
| 463 | }; | |
| 464 | result[@enumToInt(Feature.false_deps_perm)] = .{ | |
| 465 | .llvm_name = "false-deps-perm", | |
| 466 | .description = "VPERMD/Q/PS/PD has a false dependency on dest register", | |
| 467 | .dependencies = featureSet(&[_]Feature{}), | |
| 468 | }; | |
| 441 | 469 | result[@enumToInt(Feature.false_deps_popcnt)] = .{ |
| 442 | 470 | .llvm_name = "false-deps-popcnt", |
| 443 | 471 | .description = "POPCNT has a false dependency on dest register", |
| 444 | 472 | .dependencies = featureSet(&[_]Feature{}), |
| 445 | 473 | }; |
| 474 | result[@enumToInt(Feature.false_deps_range)] = .{ | |
| 475 | .llvm_name = "false-deps-range", | |
| 476 | .description = "VRANGEPD/PS/SD/SS has a false dependency on dest register", | |
| 477 | .dependencies = featureSet(&[_]Feature{}), | |
| 478 | }; | |
| 446 | 479 | result[@enumToInt(Feature.fast_11bytenop)] = .{ |
| 447 | 480 | .llvm_name = "fast-11bytenop", |
| 448 | 481 | .description = "Target can quickly decode up to 11 byte NOPs", |
| ... | ... | @@ -465,7 +498,7 @@ pub const all_features = blk: { |
| 465 | 498 | }; |
| 466 | 499 | result[@enumToInt(Feature.fast_gather)] = .{ |
| 467 | 500 | .llvm_name = "fast-gather", |
| 468 | .description = "Indicates if gather is reasonably fast", | |
| 501 | .description = "Indicates if gather is reasonably fast (this is true for Skylake client and all AVX-512 CPUs)", | |
| 469 | 502 | .dependencies = featureSet(&[_]Feature{}), |
| 470 | 503 | }; |
| 471 | 504 | result[@enumToInt(Feature.fast_hops)] = .{ |
| ... | ... | @@ -555,6 +588,16 @@ pub const all_features = blk: { |
| 555 | 588 | .sse2, |
| 556 | 589 | }), |
| 557 | 590 | }; |
| 591 | result[@enumToInt(Feature.harden_sls_ijmp)] = .{ | |
| 592 | .llvm_name = "harden-sls-ijmp", | |
| 593 | .description = "Harden against straight line speculation across indirect JMP instructions.", | |
| 594 | .dependencies = featureSet(&[_]Feature{}), | |
| 595 | }; | |
| 596 | result[@enumToInt(Feature.harden_sls_ret)] = .{ | |
| 597 | .llvm_name = "harden-sls-ret", | |
| 598 | .description = "Harden against straight line speculation across RET instructions.", | |
| 599 | .dependencies = featureSet(&[_]Feature{}), | |
| 600 | }; | |
| 558 | 601 | result[@enumToInt(Feature.hreset)] = .{ |
| 559 | 602 | .llvm_name = "hreset", |
| 560 | 603 | .description = "Has hreset instruction", |
| ... | ... | @@ -584,7 +627,7 @@ pub const all_features = blk: { |
| 584 | 627 | }; |
| 585 | 628 | result[@enumToInt(Feature.lea_sp)] = .{ |
| 586 | 629 | .llvm_name = "lea-sp", |
| 587 | .description = "Use LEA for adjusting the stack pointer", | |
| 630 | .description = "Use LEA for adjusting the stack pointer (this is an optimization for Intel Atom processors)", | |
| 588 | 631 | .dependencies = featureSet(&[_]Feature{}), |
| 589 | 632 | }; |
| 590 | 633 | result[@enumToInt(Feature.lea_uses_ag)] = .{ |
| ... | ... | @@ -629,12 +672,12 @@ pub const all_features = blk: { |
| 629 | 672 | }; |
| 630 | 673 | result[@enumToInt(Feature.movdir64b)] = .{ |
| 631 | 674 | .llvm_name = "movdir64b", |
| 632 | .description = "Support movdir64b instruction", | |
| 675 | .description = "Support movdir64b instruction (direct store 64 bytes)", | |
| 633 | 676 | .dependencies = featureSet(&[_]Feature{}), |
| 634 | 677 | }; |
| 635 | 678 | result[@enumToInt(Feature.movdiri)] = .{ |
| 636 | 679 | .llvm_name = "movdiri", |
| 637 | .description = "Support movdiri instruction", | |
| 680 | .description = "Support movdiri instruction (direct store integer)", | |
| 638 | 681 | .dependencies = featureSet(&[_]Feature{}), |
| 639 | 682 | }; |
| 640 | 683 | result[@enumToInt(Feature.mwaitx)] = .{ |
| ... | ... | @@ -644,12 +687,12 @@ pub const all_features = blk: { |
| 644 | 687 | }; |
| 645 | 688 | result[@enumToInt(Feature.nopl)] = .{ |
| 646 | 689 | .llvm_name = "nopl", |
| 647 | .description = "Enable NOPL instruction", | |
| 690 | .description = "Enable NOPL instruction (generally pentium pro+)", | |
| 648 | 691 | .dependencies = featureSet(&[_]Feature{}), |
| 649 | 692 | }; |
| 650 | 693 | result[@enumToInt(Feature.pad_short_functions)] = .{ |
| 651 | 694 | .llvm_name = "pad-short-functions", |
| 652 | .description = "Pad short functions", | |
| 695 | .description = "Pad short functions (to prevent a stall when returning too early)", | |
| 653 | 696 | .dependencies = featureSet(&[_]Feature{}), |
| 654 | 697 | }; |
| 655 | 698 | result[@enumToInt(Feature.pclmul)] = .{ |
| ... | ... | @@ -709,6 +752,11 @@ pub const all_features = blk: { |
| 709 | 752 | .description = "Support RDPID instructions", |
| 710 | 753 | .dependencies = featureSet(&[_]Feature{}), |
| 711 | 754 | }; |
| 755 | result[@enumToInt(Feature.rdpru)] = .{ | |
| 756 | .llvm_name = "rdpru", | |
| 757 | .description = "Support RDPRU instructions", | |
| 758 | .dependencies = featureSet(&[_]Feature{}), | |
| 759 | }; | |
| 712 | 760 | result[@enumToInt(Feature.rdrnd)] = .{ |
| 713 | 761 | .llvm_name = "rdrnd", |
| 714 | 762 | .description = "Support RDRAND instruction", |
| ... | ... | @@ -754,6 +802,11 @@ pub const all_features = blk: { |
| 754 | 802 | .description = "Support LAHF and SAHF instructions in 64-bit mode", |
| 755 | 803 | .dependencies = featureSet(&[_]Feature{}), |
| 756 | 804 | }; |
| 805 | result[@enumToInt(Feature.sbb_dep_breaking)] = .{ | |
| 806 | .llvm_name = "sbb-dep-breaking", | |
| 807 | .description = "SBB with same register has no source dependency", | |
| 808 | .dependencies = featureSet(&[_]Feature{}), | |
| 809 | }; | |
| 757 | 810 | result[@enumToInt(Feature.serialize)] = .{ |
| 758 | 811 | .llvm_name = "serialize", |
| 759 | 812 | .description = "Has serialize instruction", |
| ... | ... | @@ -805,7 +858,7 @@ pub const all_features = blk: { |
| 805 | 858 | }; |
| 806 | 859 | result[@enumToInt(Feature.slow_pmulld)] = .{ |
| 807 | 860 | .llvm_name = "slow-pmulld", |
| 808 | .description = "PMULLD instruction is slow", | |
| 861 | .description = "PMULLD instruction is slow (compared to PMULLW/PMULHW and PMULUDQ)", | |
| 809 | 862 | .dependencies = featureSet(&[_]Feature{}), |
| 810 | 863 | }; |
| 811 | 864 | result[@enumToInt(Feature.slow_shld)] = .{ |
| ... | ... | @@ -875,7 +928,7 @@ pub const all_features = blk: { |
| 875 | 928 | }; |
| 876 | 929 | result[@enumToInt(Feature.sse_unaligned_mem)] = .{ |
| 877 | 930 | .llvm_name = "sse-unaligned-mem", |
| 878 | .description = "Allow unaligned memory operands with SSE instructions", | |
| 931 | .description = "Allow unaligned memory operands with SSE instructions (this may require setting a configuration bit in the processor)", | |
| 879 | 932 | .dependencies = featureSet(&[_]Feature{}), |
| 880 | 933 | }; |
| 881 | 934 | result[@enumToInt(Feature.ssse3)] = .{ |
| ... | ... | @@ -905,11 +958,6 @@ pub const all_features = blk: { |
| 905 | 958 | .description = "Has UINTR Instructions", |
| 906 | 959 | .dependencies = featureSet(&[_]Feature{}), |
| 907 | 960 | }; |
| 908 | result[@enumToInt(Feature.use_aa)] = .{ | |
| 909 | .llvm_name = "use-aa", | |
| 910 | .description = "Use alias analysis during codegen", | |
| 911 | .dependencies = featureSet(&[_]Feature{}), | |
| 912 | }; | |
| 913 | 961 | result[@enumToInt(Feature.use_glm_div_sqrt_costs)] = .{ |
| 914 | 962 | .llvm_name = "use-glm-div-sqrt-costs", |
| 915 | 963 | .description = "Use Goldmont specific floating point div/sqrt costs", |
| ... | ... | @@ -1021,6 +1069,7 @@ pub const cpu = struct { |
| 1021 | 1069 | .crc32, |
| 1022 | 1070 | .cx16, |
| 1023 | 1071 | .f16c, |
| 1072 | .false_deps_perm, | |
| 1024 | 1073 | .false_deps_popcnt, |
| 1025 | 1074 | .fast_15bytenop, |
| 1026 | 1075 | .fast_gather, |
| ... | ... | @@ -1082,6 +1131,7 @@ pub const cpu = struct { |
| 1082 | 1131 | .popcnt, |
| 1083 | 1132 | .prfchw, |
| 1084 | 1133 | .sahf, |
| 1134 | .sbb_dep_breaking, | |
| 1085 | 1135 | .slow_shld, |
| 1086 | 1136 | .sse4a, |
| 1087 | 1137 | .vzeroupper, |
| ... | ... | @@ -1113,6 +1163,7 @@ pub const cpu = struct { |
| 1113 | 1163 | .fast_scalar_shift_masks, |
| 1114 | 1164 | .fxsr, |
| 1115 | 1165 | .nopl, |
| 1166 | .sbb_dep_breaking, | |
| 1116 | 1167 | .slow_shld, |
| 1117 | 1168 | .slow_unaligned_mem_16, |
| 1118 | 1169 | .sse2, |
| ... | ... | @@ -1131,6 +1182,7 @@ pub const cpu = struct { |
| 1131 | 1182 | .fast_scalar_shift_masks, |
| 1132 | 1183 | .fxsr, |
| 1133 | 1184 | .nopl, |
| 1185 | .sbb_dep_breaking, | |
| 1134 | 1186 | .slow_shld, |
| 1135 | 1187 | .slow_unaligned_mem_16, |
| 1136 | 1188 | .sse3, |
| ... | ... | @@ -1165,6 +1217,7 @@ pub const cpu = struct { |
| 1165 | 1217 | .fast_scalar_shift_masks, |
| 1166 | 1218 | .fxsr, |
| 1167 | 1219 | .nopl, |
| 1220 | .sbb_dep_breaking, | |
| 1168 | 1221 | .slow_shld, |
| 1169 | 1222 | .slow_unaligned_mem_16, |
| 1170 | 1223 | .sse2, |
| ... | ... | @@ -1257,6 +1310,7 @@ pub const cpu = struct { |
| 1257 | 1310 | .popcnt, |
| 1258 | 1311 | .prfchw, |
| 1259 | 1312 | .sahf, |
| 1313 | .sbb_dep_breaking, | |
| 1260 | 1314 | .slow_shld, |
| 1261 | 1315 | .sse4a, |
| 1262 | 1316 | .vzeroupper, |
| ... | ... | @@ -1284,6 +1338,7 @@ pub const cpu = struct { |
| 1284 | 1338 | .popcnt, |
| 1285 | 1339 | .prfchw, |
| 1286 | 1340 | .sahf, |
| 1341 | .sbb_dep_breaking, | |
| 1287 | 1342 | .slow_shld, |
| 1288 | 1343 | .vzeroupper, |
| 1289 | 1344 | .x87, |
| ... | ... | @@ -1317,6 +1372,7 @@ pub const cpu = struct { |
| 1317 | 1372 | .popcnt, |
| 1318 | 1373 | .prfchw, |
| 1319 | 1374 | .sahf, |
| 1375 | .sbb_dep_breaking, | |
| 1320 | 1376 | .slow_shld, |
| 1321 | 1377 | .tbm, |
| 1322 | 1378 | .vzeroupper, |
| ... | ... | @@ -1352,6 +1408,7 @@ pub const cpu = struct { |
| 1352 | 1408 | .popcnt, |
| 1353 | 1409 | .prfchw, |
| 1354 | 1410 | .sahf, |
| 1411 | .sbb_dep_breaking, | |
| 1355 | 1412 | .slow_shld, |
| 1356 | 1413 | .tbm, |
| 1357 | 1414 | .vzeroupper, |
| ... | ... | @@ -1392,6 +1449,7 @@ pub const cpu = struct { |
| 1392 | 1449 | .prfchw, |
| 1393 | 1450 | .rdrnd, |
| 1394 | 1451 | .sahf, |
| 1452 | .sbb_dep_breaking, | |
| 1395 | 1453 | .slow_shld, |
| 1396 | 1454 | .tbm, |
| 1397 | 1455 | .vzeroupper, |
| ... | ... | @@ -1484,6 +1542,7 @@ pub const cpu = struct { |
| 1484 | 1542 | .popcnt, |
| 1485 | 1543 | .prfchw, |
| 1486 | 1544 | .sahf, |
| 1545 | .sbb_dep_breaking, | |
| 1487 | 1546 | .slow_shld, |
| 1488 | 1547 | .sse4a, |
| 1489 | 1548 | .ssse3, |
| ... | ... | @@ -1518,6 +1577,7 @@ pub const cpu = struct { |
| 1518 | 1577 | .popcnt, |
| 1519 | 1578 | .prfchw, |
| 1520 | 1579 | .sahf, |
| 1580 | .sbb_dep_breaking, | |
| 1521 | 1581 | .slow_shld, |
| 1522 | 1582 | .sse4a, |
| 1523 | 1583 | .x87, |
| ... | ... | @@ -1847,10 +1907,11 @@ pub const cpu = struct { |
| 1847 | 1907 | .features = featureSet(&[_]Feature{ |
| 1848 | 1908 | .@"64bit", |
| 1849 | 1909 | .cx8, |
| 1910 | .fast_15bytenop, | |
| 1911 | .fast_scalar_fsqrt, | |
| 1850 | 1912 | .idivq_to_divl, |
| 1851 | 1913 | .macrofusion, |
| 1852 | 1914 | .slow_3ops_lea, |
| 1853 | .slow_incdec, | |
| 1854 | 1915 | .vzeroupper, |
| 1855 | 1916 | .x87, |
| 1856 | 1917 | }), |
| ... | ... | @@ -2213,6 +2274,7 @@ pub const cpu = struct { |
| 2213 | 2274 | .fast_scalar_shift_masks, |
| 2214 | 2275 | .fxsr, |
| 2215 | 2276 | .nopl, |
| 2277 | .sbb_dep_breaking, | |
| 2216 | 2278 | .slow_shld, |
| 2217 | 2279 | .slow_unaligned_mem_16, |
| 2218 | 2280 | .sse2, |
| ... | ... | @@ -2231,6 +2293,7 @@ pub const cpu = struct { |
| 2231 | 2293 | .fast_scalar_shift_masks, |
| 2232 | 2294 | .fxsr, |
| 2233 | 2295 | .nopl, |
| 2296 | .sbb_dep_breaking, | |
| 2234 | 2297 | .slow_shld, |
| 2235 | 2298 | .slow_unaligned_mem_16, |
| 2236 | 2299 | .sse3, |
| ... | ... | @@ -2375,6 +2438,7 @@ pub const cpu = struct { |
| 2375 | 2438 | .fast_scalar_shift_masks, |
| 2376 | 2439 | .fxsr, |
| 2377 | 2440 | .nopl, |
| 2441 | .sbb_dep_breaking, | |
| 2378 | 2442 | .slow_shld, |
| 2379 | 2443 | .slow_unaligned_mem_16, |
| 2380 | 2444 | .sse2, |
| ... | ... | @@ -2393,6 +2457,7 @@ pub const cpu = struct { |
| 2393 | 2457 | .fast_scalar_shift_masks, |
| 2394 | 2458 | .fxsr, |
| 2395 | 2459 | .nopl, |
| 2460 | .sbb_dep_breaking, | |
| 2396 | 2461 | .slow_shld, |
| 2397 | 2462 | .slow_unaligned_mem_16, |
| 2398 | 2463 | .sse3, |
| ... | ... | @@ -2671,6 +2736,11 @@ pub const cpu = struct { |
| 2671 | 2736 | .cx16, |
| 2672 | 2737 | .enqcmd, |
| 2673 | 2738 | .ermsb, |
| 2739 | .false_deps_getmant, | |
| 2740 | .false_deps_mulc, | |
| 2741 | .false_deps_mullq, | |
| 2742 | .false_deps_perm, | |
| 2743 | .false_deps_range, | |
| 2674 | 2744 | .fast_15bytenop, |
| 2675 | 2745 | .fast_gather, |
| 2676 | 2746 | .fast_scalar_fsqrt, |
| ... | ... | @@ -3231,6 +3301,7 @@ pub const cpu = struct { |
| 3231 | 3301 | .fast_movbe, |
| 3232 | 3302 | .fast_scalar_fsqrt, |
| 3233 | 3303 | .fast_scalar_shift_masks, |
| 3304 | .fast_variable_perlane_shuffle, | |
| 3234 | 3305 | .fast_vector_fsqrt, |
| 3235 | 3306 | .fma, |
| 3236 | 3307 | .fsgsbase, |
| ... | ... | @@ -3246,6 +3317,7 @@ pub const cpu = struct { |
| 3246 | 3317 | .rdrnd, |
| 3247 | 3318 | .rdseed, |
| 3248 | 3319 | .sahf, |
| 3320 | .sbb_dep_breaking, | |
| 3249 | 3321 | .sha, |
| 3250 | 3322 | .slow_shld, |
| 3251 | 3323 | .sse4a, |
| ... | ... | @@ -3280,6 +3352,7 @@ pub const cpu = struct { |
| 3280 | 3352 | .fast_movbe, |
| 3281 | 3353 | .fast_scalar_fsqrt, |
| 3282 | 3354 | .fast_scalar_shift_masks, |
| 3355 | .fast_variable_perlane_shuffle, | |
| 3283 | 3356 | .fast_vector_fsqrt, |
| 3284 | 3357 | .fma, |
| 3285 | 3358 | .fsgsbase, |
| ... | ... | @@ -3293,9 +3366,11 @@ pub const cpu = struct { |
| 3293 | 3366 | .popcnt, |
| 3294 | 3367 | .prfchw, |
| 3295 | 3368 | .rdpid, |
| 3369 | .rdpru, | |
| 3296 | 3370 | .rdrnd, |
| 3297 | 3371 | .rdseed, |
| 3298 | 3372 | .sahf, |
| 3373 | .sbb_dep_breaking, | |
| 3299 | 3374 | .sha, |
| 3300 | 3375 | .slow_shld, |
| 3301 | 3376 | .sse4a, |
| ... | ... | @@ -3347,9 +3422,11 @@ pub const cpu = struct { |
| 3347 | 3422 | .popcnt, |
| 3348 | 3423 | .prfchw, |
| 3349 | 3424 | .rdpid, |
| 3425 | .rdpru, | |
| 3350 | 3426 | .rdrnd, |
| 3351 | 3427 | .rdseed, |
| 3352 | 3428 | .sahf, |
| 3429 | .sbb_dep_breaking, | |
| 3353 | 3430 | .sha, |
| 3354 | 3431 | .slow_shld, |
| 3355 | 3432 | .sse4a, |
tools/update_cpu_features.zig+18-3| ... | ... | @@ -50,6 +50,10 @@ const llvm_targets = [_]LlvmTarget{ |
| 50 | 50 | .td_name = "AArch64.td", |
| 51 | 51 | .branch_quota = 2000, |
| 52 | 52 | .feature_overrides = &.{ |
| 53 | .{ | |
| 54 | .llvm_name = "all", | |
| 55 | .omit = true, | |
| 56 | }, | |
| 53 | 57 | .{ |
| 54 | 58 | .llvm_name = "v8a", |
| 55 | 59 | .extra_deps = &.{ "fp_armv8", "neon" }, |
| ... | ... | @@ -81,13 +85,12 @@ const llvm_targets = [_]LlvmTarget{ |
| 81 | 85 | }, |
| 82 | 86 | .{ |
| 83 | 87 | .llvm_name = "exynosm3", |
| 84 | .zig_name = "exynos_m3", | |
| 85 | 88 | .flatten = true, |
| 86 | 89 | .extra_deps = &.{"v8a"}, |
| 87 | 90 | }, |
| 88 | 91 | .{ |
| 89 | 92 | .llvm_name = "exynosm4", |
| 90 | .zig_name = "exynos_m4", | |
| 93 | .flatten = true, | |
| 91 | 94 | }, |
| 92 | 95 | .{ |
| 93 | 96 | .llvm_name = "v8.1a", |
| ... | ... | @@ -300,6 +303,18 @@ const llvm_targets = [_]LlvmTarget{ |
| 300 | 303 | .llvm_name = "dumpcode", |
| 301 | 304 | .omit = true, |
| 302 | 305 | }, |
| 306 | .{ | |
| 307 | .llvm_name = "enable-ds128", | |
| 308 | .zig_name = "ds128", | |
| 309 | }, | |
| 310 | .{ | |
| 311 | .llvm_name = "enable-flat-scratch", | |
| 312 | .zig_name = "flat_scratch", | |
| 313 | }, | |
| 314 | .{ | |
| 315 | .llvm_name = "enable-prt-strict-null", | |
| 316 | .zig_name = "prt_strict_null", | |
| 317 | }, | |
| 303 | 318 | }, |
| 304 | 319 | }, |
| 305 | 320 | .{ |
| ... | ... | @@ -934,7 +949,7 @@ fn processOneTarget(job: Job) anyerror!void { |
| 934 | 949 | const child_result = try std.ChildProcess.exec(.{ |
| 935 | 950 | .allocator = arena, |
| 936 | 951 | .argv = &child_args, |
| 937 | .max_output_bytes = 200 * 1024 * 1024, | |
| 952 | .max_output_bytes = 400 * 1024 * 1024, | |
| 938 | 953 | }); |
| 939 | 954 | tblgen_progress.end(); |
| 940 | 955 | if (child_result.stderr.len != 0) { |