| author |  Alex Rønne Petersen <alex@alexrp.com> 2025-10-14 11:56:02+02:00 |
| committer | Alex Rønne Petersen <alex@alexrp.com> 2025-10-14 19:56:07+02:00 |
| log | c8b34bc8a342663d920e15a389820f02d9e911a3 |
| tree | 4d1a53cbb4b1dedd21f94018c7a8cb1ea23c9aee |
| parent | b34a13da38f60737477e62dd0acd1a7a6b6be0a0 |
libunwind: backport llvm/llvm-project#152942
https://github.com/llvm/llvm-project/pull/1529421 files changed, 5 insertions(+), 2 deletions(-)
lib- libunwind
lib/libunwind/src/UnwindRegistersRestore.S+5-2
| ... | @@ -1044,9 +1044,10 @@ DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind18Registers_mips_o326jumptoEv) | ... | @@ -1044,9 +1044,10 @@ DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind18Registers_mips_o326jumptoEv) |
| 1044 | lw $27, (4 * 27)($4) | 1044 | lw $27, (4 * 27)($4) |
| 1045 | lw $28, (4 * 28)($4) | 1045 | lw $28, (4 * 28)($4) |
| 1046 | lw $29, (4 * 29)($4) | 1046 | lw $29, (4 * 29)($4) |
| 1047 | lw $30, (4 * 30)($4) | ||
| 1048 | // load new pc into ra | 1047 | // load new pc into ra |
| 1049 | lw $31, (4 * 32)($4) | 1048 | lw $31, (4 * 32)($4) |
| 1049 | // MIPS 1 has load delay slot. Ensure lw $31 and jr are separated by an instruction. | ||
| 1050 | lw $30, (4 * 30)($4) | ||
| 1050 | // jump to ra, load a0 in the delay slot | 1051 | // jump to ra, load a0 in the delay slot |
| 1051 | jr $31 | 1052 | jr $31 |
| 1052 | lw $4, (4 * 4)($4) | 1053 | lw $4, (4 * 4)($4) |
| ... | @@ -1082,11 +1083,13 @@ DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind21Registers_mips_newabi6jumptoEv) | ... | @@ -1082,11 +1083,13 @@ DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind21Registers_mips_newabi6jumptoEv) |
| 1082 | ld $2, (8 * 2)($4) | 1083 | ld $2, (8 * 2)($4) |
| 1083 | ld $3, (8 * 3)($4) | 1084 | ld $3, (8 * 3)($4) |
| 1084 | // skip a0 for now | 1085 | // skip a0 for now |
| 1085 | .irp i,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 | 1086 | .irp i,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29 |
| 1086 | ld $\i, (8 * \i)($4) | 1087 | ld $\i, (8 * \i)($4) |
| 1087 | .endr | 1088 | .endr |
| 1088 | // load new pc into ra | 1089 | // load new pc into ra |
| 1089 | ld $31, (8 * 32)($4) | 1090 | ld $31, (8 * 32)($4) |
| 1091 | // MIPS 1 has load delay slot. Ensure lw $31 and jr are separated by an instruction. | ||
| 1092 | ld $30, (8 * 30)($4) | ||
| 1090 | // jump to ra, load a0 in the delay slot | 1093 | // jump to ra, load a0 in the delay slot |
| 1091 | jr $31 | 1094 | jr $31 |
| 1092 | ld $4, (8 * 4)($4) | 1095 | ld $4, (8 * 4)($4) |