| ... | ... | @@ -157,6 +157,17 @@ static void get_native_target(ZigTarget *target) { |
| 157 | 157 | } |
| 158 | 158 | } |
| 159 | 159 | |
| 160 | static const char* get_baseline_llvm_cpu_name(ZigLLVM_ArchType arch) { |
| 161 | return ""; |
| 162 | } |
| 163 | |
| 164 | static const char* get_baseline_llvm_cpu_features(ZigLLVM_ArchType arch) { |
| 165 | switch (arch) { |
| 166 | case ZigLLVM_riscv64: return "+a,+c,+d,+m"; |
| 167 | default: return ""; |
| 168 | } |
| 169 | } |
| 170 | |
| 160 | 171 | static Error target_parse_triple(struct ZigTarget *target, const char *zig_triple, const char *mcpu, |
| 161 | 172 | const char *dynamic_linker) |
| 162 | 173 | { |
| ... | ... | @@ -175,8 +186,8 @@ static Error target_parse_triple(struct ZigTarget *target, const char *zig_tripl |
| 175 | 186 | } else if (strcmp(mcpu, "baseline") == 0) { |
| 176 | 187 | target->is_native_os = false; |
| 177 | 188 | target->is_native_cpu = false; |
| 178 | | target->llvm_cpu_name = ""; |
| 179 | | target->llvm_cpu_features = ""; |
| 189 | target->llvm_cpu_name = get_baseline_llvm_cpu_name(target->arch); |
| 190 | target->llvm_cpu_features = get_baseline_llvm_cpu_features(target->arch); |
| 180 | 191 | } else { |
| 181 | 192 | const char *msg = "stage0 can't handle CPU/features in the target"; |
| 182 | 193 | stage2_panic(msg, strlen(msg)); |
| ... | ... | @@ -217,6 +228,9 @@ static Error target_parse_triple(struct ZigTarget *target, const char *zig_tripl |
| 217 | 228 | const char *msg = "stage0 can't handle CPU/features in the target"; |
| 218 | 229 | stage2_panic(msg, strlen(msg)); |
| 219 | 230 | } |
| 231 | |
| 232 | target->llvm_cpu_name = get_baseline_llvm_cpu_name(target->arch); |
| 233 | target->llvm_cpu_features = get_baseline_llvm_cpu_features(target->arch); |
| 220 | 234 | } |
| 221 | 235 | |
| 222 | 236 | return ErrorNone; |
Shupei Fan <dymarkfan@outlook.com> 2022-06-28 18:10:41+08:00
Andrew Kelley <andrew@ziglang.org> 2022-06-28 14:22:13-04:00