authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-07-27 03:52:19+02:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2024-07-28 19:44:52-07:00
logd1d95294fd657f771657ea671a6984b860347fb0
treed54c1098e7f0ec8c2b65ba7a6207bf4095c4b20e
parentc15755092821c5c27727ebf416689084eab5b73e

std.Target.Cpu.Arch: Remove the `aarch64_32` tag.

This is a misfeature that we inherited from LLVM: * https://reviews.llvm.org/D61259 * https://reviews.llvm.org/D61939 (`aarch64_32` and `arm64_32` are equivalent.) I truly have no idea why this triple passed review in LLVM. It is, to date, the *only* tag in the architecture component that is not, in fact, an architecture. In reality, it is just an ILP32 ABI for AArch64 (*not* AArch32). The triples that use `aarch64_32` look like `aarch64_32-apple-watchos`. Yes, that triple is exactly what you think; it has no ABI component. They really, seriously did this. Since only Apple could come up with silliness like this, it should come as no surprise that no one else uses `aarch64_32`. Later on, a GNU ILP32 ABI for AArch64 was developed, and support was added to LLVM: * https://reviews.llvm.org/D94143 * https://reviews.llvm.org/D104931 Here, sanity seems to have prevailed, and a triple using this ABI looks like `aarch64-linux-gnu_ilp32` as you would expect. As can be seen from the diffs in this commit, there was plenty of confusion throughout the Zig codebase about what exactly `aarch64_32` was. So let's just remove it. In its place, we'll use `aarch64-watchos-ilp32`, `aarch64-linux-gnuilp32`, and so on. We'll then translate these appropriately when talking to LLVM. Hence, this commit adds the `ilp32` ABI tag (we already have `gnuilp32`).

23 files changed, 45 insertions(+), 71 deletions(-)

lib/compiler/aro/aro/Attribute.zig+1-1
......@@ -892,7 +892,7 @@ pub fn applyFunctionAttributes(p: *Parser, ty: Type, attr_buf_start: usize) !Typ
892892 else => try p.errStr(.callconv_not_supported, tok, p.tok_ids[tok].lexeme().?),
893893 },
894894 .vectorcall => switch (p.comp.target.cpu.arch) {
895 .x86, .aarch64, .aarch64_be, .aarch64_32 => try p.attr_application_buf.append(p.gpa, attr),
895 .x86, .aarch64, .aarch64_be => try p.attr_application_buf.append(p.gpa, attr),
896896 else => try p.errStr(.callconv_not_supported, tok, p.tok_ids[tok].lexeme().?),
897897 },
898898 },
lib/compiler/aro/aro/Compilation.zig+1-1
......@@ -663,7 +663,7 @@ fn generateBuiltinTypes(comp: *Compilation) !void {
663663 .arm, .armeb, .thumb, .thumbeb => .{
664664 .specifier = if (os != .windows and os != .netbsd and os != .openbsd) .uint else .int,
665665 },
666 .aarch64, .aarch64_be, .aarch64_32 => .{
666 .aarch64, .aarch64_be => .{
667667 .specifier = if (!os.isDarwin() and os != .netbsd) .uint else .int,
668668 },
669669 .x86_64, .x86 => .{ .specifier = if (os == .windows) .ushort else .int },
lib/compiler/aro/aro/target.zig+3-7
......@@ -132,7 +132,7 @@ pub fn int64Type(target: std.Target) Type {
132132pub fn defaultFunctionAlignment(target: std.Target) u8 {
133133 return switch (target.cpu.arch) {
134134 .arm, .armeb => 4,
135 .aarch64, .aarch64_32, .aarch64_be => 4,
135 .aarch64, .aarch64_be => 4,
136136 .sparc, .sparcel, .sparc64 => 4,
137137 .riscv64 => 2,
138138 else => 1,
......@@ -322,7 +322,6 @@ pub const FPSemantics = enum {
322322 pub fn halfPrecisionType(target: std.Target) ?FPSemantics {
323323 switch (target.cpu.arch) {
324324 .aarch64,
325 .aarch64_32,
326325 .aarch64_be,
327326 .arm,
328327 .armeb,
......@@ -478,7 +477,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
478477 .kalimba,
479478 .lanai,
480479 .wasm32,
481 .aarch64_32,
482480 .spirv32,
483481 .loongarch32,
484482 .dxil,
......@@ -542,7 +540,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
542540 .x86_64,
543541 => {}, // Already 64 bit
544542
545 .aarch64_32 => copy.cpu.arch = .aarch64,
546543 .arm => copy.cpu.arch = .aarch64,
547544 .armeb => copy.cpu.arch = .aarch64_be,
548545 .loongarch32 => copy.cpu.arch = .loongarch64,
......@@ -574,9 +571,8 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
574571 const llvm_arch = switch (target.cpu.arch) {
575572 .arm => "arm",
576573 .armeb => "armeb",
577 .aarch64 => "aarch64",
574 .aarch64 => if (target.abi == .ilp32) "aarch64_32" else "aarch64",
578575 .aarch64_be => "aarch64_be",
579 .aarch64_32 => "aarch64_32",
580576 .arc => "arc",
581577 .avr => "avr",
582578 .bpfel => "bpfel",
......@@ -687,7 +683,7 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
687683 writer.writeByte('-') catch unreachable;
688684
689685 const llvm_abi = switch (target.abi) {
690 .none => "unknown",
686 .none, .ilp32 => "unknown",
691687 .gnu => "gnu",
692688 .gnuabin32 => "gnuabin32",
693689 .gnuabi64 => "gnuabi64",
lib/compiler_rt/clear_cache.zig+1-1
......@@ -25,7 +25,7 @@ fn clear_cache(start: usize, end: usize) callconv(.C) void {
2525 else => false,
2626 };
2727 const arm64 = switch (arch) {
28 .aarch64, .aarch64_be, .aarch64_32 => true,
28 .aarch64, .aarch64_be => true,
2929 else => false,
3030 };
3131 const mips = switch (arch) {
lib/compiler_rt/common.zig+1-1
......@@ -92,7 +92,7 @@ pub fn F16T(comptime OtherType: type) type {
9292 }
9393 else
9494 u16,
95 .aarch64, .aarch64_be, .aarch64_32 => f16,
95 .aarch64, .aarch64_be => f16,
9696 .riscv64 => if (builtin.zig_backend == .stage1) u16 else f16,
9797 .x86, .x86_64 => if (builtin.target.isDarwin()) switch (OtherType) {
9898 // Starting with LLVM 16, Darwin uses different abi for f16
lib/std/Target.zig+14-24
......@@ -197,7 +197,7 @@ pub const Os = struct {
197197 return switch (tag) {
198198 .linux => switch (arch) {
199199 .arm, .armeb, .thumb, .thumbeb => "arm",
200 .aarch64, .aarch64_be, .aarch64_32 => "aarch64",
200 .aarch64, .aarch64_be => "aarch64",
201201 .mips, .mipsel, .mips64, .mips64el => "mips",
202202 .powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",
203203 .riscv32, .riscv64 => "riscv",
......@@ -631,6 +631,7 @@ pub const Abi = enum {
631631 code16,
632632 eabi,
633633 eabihf,
634 ilp32,
634635 android,
635636 musl,
636637 musleabi,
......@@ -983,7 +984,6 @@ pub const Cpu = struct {
983984 armeb,
984985 aarch64,
985986 aarch64_be,
986 aarch64_32,
987987 arc,
988988 avr,
989989 bpfel,
......@@ -1031,6 +1031,7 @@ pub const Cpu = struct {
10311031 spu_2,
10321032
10331033 // LLVM tags deliberately omitted:
1034 // - aarch64_32
10341035 // - r600
10351036 // - le32
10361037 // - le64
......@@ -1058,7 +1059,7 @@ pub const Cpu = struct {
10581059
10591060 pub inline fn isAARCH64(arch: Arch) bool {
10601061 return switch (arch) {
1061 .aarch64, .aarch64_be, .aarch64_32 => true,
1062 .aarch64, .aarch64_be => true,
10621063 else => false,
10631064 };
10641065 }
......@@ -1172,7 +1173,6 @@ pub const Cpu = struct {
11721173 .kalimba => .CSR_KALIMBA,
11731174 .lanai => .LANAI,
11741175 .wasm32 => .NONE,
1175 .aarch64_32 => .AARCH64,
11761176 .aarch64 => .AARCH64,
11771177 .aarch64_be => .AARCH64,
11781178 .mips64 => .MIPS,
......@@ -1226,7 +1226,6 @@ pub const Cpu = struct {
12261226 .kalimba => .Unknown,
12271227 .lanai => .Unknown,
12281228 .wasm32 => .Unknown,
1229 .aarch64_32 => .ARM64,
12301229 .aarch64 => .ARM64,
12311230 .aarch64_be => .ARM64,
12321231 .mips64 => .Unknown,
......@@ -1258,7 +1257,6 @@ pub const Cpu = struct {
12581257 return switch (arch) {
12591258 .avr,
12601259 .arm,
1261 .aarch64_32,
12621260 .aarch64,
12631261 .amdgcn,
12641262 .bpfel,
......@@ -1333,7 +1331,7 @@ pub const Cpu = struct {
13331331 pub fn genericName(arch: Arch) [:0]const u8 {
13341332 return switch (arch) {
13351333 .arm, .armeb, .thumb, .thumbeb => "arm",
1336 .aarch64, .aarch64_be, .aarch64_32 => "aarch64",
1334 .aarch64, .aarch64_be => "aarch64",
13371335 .bpfel, .bpfeb => "bpf",
13381336 .loongarch32, .loongarch64 => "loongarch",
13391337 .mips, .mipsel, .mips64, .mips64el => "mips",
......@@ -1354,7 +1352,7 @@ pub const Cpu = struct {
13541352 pub fn allFeaturesList(arch: Arch) []const Cpu.Feature {
13551353 return switch (arch) {
13561354 .arm, .armeb, .thumb, .thumbeb => &arm.all_features,
1357 .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features,
1355 .aarch64, .aarch64_be => &aarch64.all_features,
13581356 .arc => &arc.all_features,
13591357 .avr => &avr.all_features,
13601358 .bpfel, .bpfeb => &bpf.all_features,
......@@ -1385,7 +1383,7 @@ pub const Cpu = struct {
13851383 return switch (arch) {
13861384 .arc => comptime allCpusFromDecls(arc.cpu),
13871385 .arm, .armeb, .thumb, .thumbeb => comptime allCpusFromDecls(arm.cpu),
1388 .aarch64, .aarch64_be, .aarch64_32 => comptime allCpusFromDecls(aarch64.cpu),
1386 .aarch64, .aarch64_be => comptime allCpusFromDecls(aarch64.cpu),
13891387 .avr => comptime allCpusFromDecls(avr.cpu),
13901388 .bpfel, .bpfeb => comptime allCpusFromDecls(bpf.cpu),
13911389 .csky => comptime allCpusFromDecls(csky.cpu),
......@@ -1471,7 +1469,7 @@ pub const Cpu = struct {
14711469 };
14721470 return switch (arch) {
14731471 .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic,
1474 .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic,
1472 .aarch64, .aarch64_be => &aarch64.cpu.generic,
14751473 .avr => &avr.cpu.avr2,
14761474 .bpfel, .bpfeb => &bpf.cpu.generic,
14771475 .hexagon => &hexagon.cpu.generic,
......@@ -1700,7 +1698,6 @@ pub const DynamicLinker = struct {
17001698
17011699 .aarch64 => init("/lib/ld-linux-aarch64.so.1"),
17021700 .aarch64_be => init("/lib/ld-linux-aarch64_be.so.1"),
1703 .aarch64_32 => init("/lib/ld-linux-aarch64_32.so.1"),
17041701
17051702 .arm,
17061703 .armeb,
......@@ -1835,7 +1832,7 @@ pub fn standardDynamicLinkerPath(target: Target) DynamicLinker {
18351832
18361833pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
18371834 switch (abi) {
1838 .gnux32, .muslx32, .gnuabin32, .gnuilp32 => return 32,
1835 .gnux32, .muslx32, .gnuabin32, .gnuilp32, .ilp32 => return 32,
18391836 .gnuabi64 => return 64,
18401837 else => {},
18411838 }
......@@ -1866,7 +1863,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
18661863 .kalimba,
18671864 .lanai,
18681865 .wasm32,
1869 .aarch64_32,
18701866 .spirv32,
18711867 .loongarch32,
18721868 .dxil,
......@@ -1923,7 +1919,6 @@ pub fn stackAlignment(target: Target) u16 {
19231919 => 8,
19241920 .aarch64,
19251921 .aarch64_be,
1926 .aarch64_32,
19271922 .bpfeb,
19281923 .bpfel,
19291924 .mips64,
......@@ -1954,7 +1949,6 @@ pub fn stackAlignment(target: Target) u16 {
19541949pub fn charSignedness(target: Target) std.builtin.Signedness {
19551950 switch (target.cpu.arch) {
19561951 .aarch64,
1957 .aarch64_32,
19581952 .aarch64_be,
19591953 .arm,
19601954 .armeb,
......@@ -2079,7 +2073,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
20792073 .riscv64,
20802074 .aarch64,
20812075 .aarch64_be,
2082 .aarch64_32,
20832076 .s390x,
20842077 .sparc,
20852078 .sparc64,
......@@ -2183,7 +2176,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
21832176 .riscv64,
21842177 .aarch64,
21852178 .aarch64_be,
2186 .aarch64_32,
21872179 .s390x,
21882180 .mips64,
21892181 .mips64el,
......@@ -2207,7 +2199,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
22072199 .long, .ulong => return 32,
22082200 .longlong, .ulonglong, .double => return 64,
22092201 .longdouble => switch (target.abi) {
2210 .gnu, .gnuilp32, .cygnus => return 80,
2202 .gnu, .gnuilp32, .ilp32, .cygnus => return 80,
22112203 else => return 64,
22122204 },
22132205 },
......@@ -2221,7 +2213,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
22212213 },
22222214 .longlong, .ulonglong, .double => return 64,
22232215 .longdouble => switch (target.abi) {
2224 .gnu, .gnuilp32, .cygnus => return 80,
2216 .gnu, .gnuilp32, .ilp32, .cygnus => return 80,
22252217 else => return 64,
22262218 },
22272219 },
......@@ -2240,7 +2232,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
22402232 .short, .ushort => return 16,
22412233 .int, .uint, .float => return 32,
22422234 .long, .ulong => switch (target.cpu.arch) {
2243 .x86, .arm, .aarch64_32 => return 32,
2235 .x86, .arm => return 32,
22442236 .x86_64 => switch (target.abi) {
22452237 .gnux32, .muslx32 => return 32,
22462238 else => return 64,
......@@ -2326,7 +2318,7 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
23262318 .windows, .uefi => switch (c_type) {
23272319 .longlong, .ulonglong, .double => return 8,
23282320 .longdouble => switch (target.abi) {
2329 .gnu, .gnuilp32, .cygnus => return 4,
2321 .gnu, .gnuilp32, .ilp32, .cygnus => return 4,
23302322 else => return 8,
23312323 },
23322324 else => {},
......@@ -2375,7 +2367,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
23752367 .xtensa,
23762368 => 4,
23772369
2378 .aarch64_32,
23792370 .amdgcn,
23802371 .bpfel,
23812372 .bpfeb,
......@@ -2453,7 +2444,7 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
24532444 .x86 => switch (target.os.tag) {
24542445 .windows, .uefi => switch (c_type) {
24552446 .longdouble => switch (target.abi) {
2456 .gnu, .gnuilp32, .cygnus => return 4,
2447 .gnu, .gnuilp32, .ilp32, .cygnus => return 4,
24572448 else => return 8,
24582449 },
24592450 else => {},
......@@ -2490,7 +2481,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
24902481 .avr,
24912482 .thumb,
24922483 .thumbeb,
2493 .aarch64_32,
24942484 .amdgcn,
24952485 .bpfel,
24962486 .bpfeb,
lib/std/Thread.zig+1-1
......@@ -1117,7 +1117,7 @@ const LinuxThreadImpl = struct {
11171117 [len] "r" (self.mapped.len),
11181118 : "memory"
11191119 ),
1120 .aarch64, .aarch64_be, .aarch64_32 => asm volatile (
1120 .aarch64, .aarch64_be => asm volatile (
11211121 \\ mov x8, #215
11221122 \\ mov x0, %[ptr]
11231123 \\ mov x1, %[len]
lib/std/atomic.zig+1-1
......@@ -388,7 +388,7 @@ pub inline fn spinLoopHint() void {
388388 // on common aarch64 CPUs.
389389 // https://bugs.java.com/bugdatabase/view_bug.do?bug_id=8258604
390390 // https://bugs.mysql.com/bug.php?id=100664
391 .aarch64, .aarch64_be, .aarch64_32 => asm volatile ("isb" ::: "memory"),
391 .aarch64, .aarch64_be => asm volatile ("isb" ::: "memory"),
392392
393393 // `yield` was introduced in v6k but is also available on v6m.
394394 // https://www.keil.com/support/man/docs/armasm/armasm_dom1361289926796.htm
lib/std/c.zig+1-1
......@@ -6829,7 +6829,7 @@ pub const padded_pthread_spin_t = switch (native_os) {
68296829
68306830pub const pthread_spin_t = switch (native_os) {
68316831 .netbsd => switch (builtin.cpu.arch) {
6832 .aarch64, .aarch64_be, .aarch64_32 => u8,
6832 .aarch64, .aarch64_be => u8,
68336833 .mips, .mipsel, .mips64, .mips64el => u32,
68346834 .powerpc, .powerpc64, .powerpc64le => i32,
68356835 .x86, .x86_64 => u8,
lib/std/zig/LibCDirs.zig+1
......@@ -246,6 +246,7 @@ fn libCGenericName(target: std.Target) [:0]const u8 {
246246 .code16,
247247 .eabi,
248248 .eabihf,
249 .ilp32,
249250 .android,
250251 .msvc,
251252 .itanium,
lib/std/zig/system/darwin/macos.zig+1-1
......@@ -406,7 +406,7 @@ pub fn detectNativeCpuAndFeatures() ?Target.Cpu {
406406
407407 const current_arch = builtin.cpu.arch;
408408 switch (current_arch) {
409 .aarch64, .aarch64_be, .aarch64_32 => {
409 .aarch64, .aarch64_be => {
410410 const model = switch (cpu_family) {
411411 .ARM_EVEREST_SAWTOOTH => &Target.aarch64.cpu.apple_a16,
412412 .ARM_BLIZZARD_AVALANCHE => &Target.aarch64.cpu.apple_a15,
lib/std/zig/system/linux.zig+2-2
......@@ -264,7 +264,7 @@ const ArmCpuinfoImpl = struct {
264264 if (self.core_no == 0) return null;
265265
266266 const is_64bit = switch (arch) {
267 .aarch64, .aarch64_be, .aarch64_32 => true,
267 .aarch64, .aarch64_be => true,
268268 else => false,
269269 };
270270
......@@ -391,7 +391,7 @@ pub fn detectNativeCpuAndFeatures() ?Target.Cpu {
391391 .arm, .armeb, .thumb, .thumbeb => {
392392 return ArmCpuinfoParser.parse(current_arch, f.reader()) catch null;
393393 },
394 .aarch64, .aarch64_be, .aarch64_32 => {
394 .aarch64, .aarch64_be => {
395395 const registers = [12]u64{
396396 getAArch64CpuFeature("MIDR_EL1"),
397397 getAArch64CpuFeature("ID_AA64PFR0_EL1"),
lib/std/zig/system/windows.zig+2-2
......@@ -209,7 +209,7 @@ fn genericCpuAndNativeFeatures(arch: Target.Cpu.Arch) Target.Cpu {
209209 };
210210
211211 switch (arch) {
212 .aarch64, .aarch64_be, .aarch64_32 => {
212 .aarch64, .aarch64_be => {
213213 const Feature = Target.aarch64.Feature;
214214
215215 // Override any features that are either present or absent
......@@ -229,7 +229,7 @@ fn genericCpuAndNativeFeatures(arch: Target.Cpu.Arch) Target.Cpu {
229229pub fn detectNativeCpuAndFeatures() ?Target.Cpu {
230230 const current_arch = builtin.cpu.arch;
231231 const cpu: ?Target.Cpu = switch (current_arch) {
232 .aarch64, .aarch64_be, .aarch64_32 => blk: {
232 .aarch64, .aarch64_be => blk: {
233233 var cores: [128]Target.Cpu = undefined;
234234 const core_count = getCpuCount();
235235
src/Sema.zig+2-2
......@@ -10036,11 +10036,11 @@ fn finishFunc(
1003610036 else => "x86",
1003710037 },
1003810038 .Vectorcall => switch (arch) {
10039 .x86, .aarch64, .aarch64_be, .aarch64_32 => null,
10039 .x86, .aarch64, .aarch64_be => null,
1004010040 else => "x86 and AArch64",
1004110041 },
1004210042 .APCS, .AAPCS, .AAPCSVFP => switch (arch) {
10043 .arm, .armeb, .aarch64, .aarch64_be, .aarch64_32, .thumb, .thumbeb => null,
10043 .arm, .armeb, .aarch64, .aarch64_be, .thumb, .thumbeb => null,
1004410044 else => "ARM",
1004510045 },
1004610046 .SysV, .Win64 => switch (arch) {
src/Type.zig-1
......@@ -1634,7 +1634,6 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {
16341634 .x86,
16351635 .aarch64,
16361636 .aarch64_be,
1637 .aarch64_32,
16381637 .riscv64,
16391638 .bpfel,
16401639 .bpfeb,
src/Zcu.zig-1
......@@ -3284,7 +3284,6 @@ pub fn atomicPtrAlignment(
32843284
32853285 .aarch64,
32863286 .aarch64_be,
3287 .aarch64_32,
32883287 => 128,
32893288
32903289 .x86_64 => if (std.Target.x86.featureSetHas(target.cpu.features, .cx16)) 128 else 64,
src/codegen/llvm.zig+6-11
......@@ -43,9 +43,8 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
4343 const llvm_arch = switch (target.cpu.arch) {
4444 .arm => "arm",
4545 .armeb => "armeb",
46 .aarch64 => "aarch64",
46 .aarch64 => if (target.abi == .ilp32) "aarch64_32" else "aarch64",
4747 .aarch64_be => "aarch64_be",
48 .aarch64_32 => "aarch64_32",
4948 .arc => "arc",
5049 .avr => "avr",
5150 .bpfel => "bpfel",
......@@ -157,7 +156,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
157156 try llvm_triple.append('-');
158157
159158 const llvm_abi = switch (target.abi) {
160 .none => "unknown",
159 .none, .ilp32 => "unknown",
161160 .gnu => "gnu",
162161 .gnuabin32 => "gnuabin32",
163162 .gnuabi64 => "gnuabi64",
......@@ -259,7 +258,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
259258 .armeb => .armeb,
260259 .aarch64 => .aarch64,
261260 .aarch64_be => .aarch64_be,
262 .aarch64_32 => .aarch64_32,
263261 .arc => .arc,
264262 .avr => .avr,
265263 .bpfel => .bpfel,
......@@ -393,7 +391,6 @@ const DataLayoutBuilder = struct {
393391 .pref = pref,
394392 .idx = idx,
395393 };
396 if (self.target.cpu.arch == .aarch64_32) continue;
397394 if (!info.force_in_data_layout and matches_default and
398395 self.target.cpu.arch != .riscv64 and
399396 self.target.cpu.arch != .loongarch64 and
......@@ -483,7 +480,6 @@ const DataLayoutBuilder = struct {
483480 => &.{32},
484481 .aarch64,
485482 .aarch64_be,
486 .aarch64_32,
487483 .amdgcn,
488484 .bpfeb,
489485 .bpfel,
......@@ -587,7 +583,6 @@ const DataLayoutBuilder = struct {
587583 switch (self.target.cpu.arch) {
588584 .aarch64,
589585 .aarch64_be,
590 .aarch64_32,
591586 => if (size == 128) {
592587 abi = size;
593588 pref = size;
......@@ -705,7 +700,7 @@ const DataLayoutBuilder = struct {
705700 force_pref = true;
706701 },
707702 .float => switch (self.target.cpu.arch) {
708 .aarch64_32, .amdgcn => if (size == 128) {
703 .amdgcn => if (size == 128) {
709704 abi = size;
710705 pref = size;
711706 },
......@@ -10860,7 +10855,7 @@ pub const FuncGen = struct {
1086010855 ,
1086110856 .constraints = "={rdx},{rax},0,~{cc},~{memory}",
1086210857 },
10863 .aarch64, .aarch64_32, .aarch64_be => .{
10858 .aarch64, .aarch64_be => .{
1086410859 .template =
1086510860 \\ror x12, x12, #3 ; ror x12, x12, #13
1086610861 \\ror x12, x12, #51 ; ror x12, x12, #61
......@@ -10932,7 +10927,7 @@ fn toLlvmCallConv(cc: std.builtin.CallingConvention, target: std.Target) Builder
1093210927 .Fastcall => .x86_fastcallcc,
1093310928 .Vectorcall => return switch (target.cpu.arch) {
1093410929 .x86, .x86_64 => .x86_vectorcallcc,
10935 .aarch64, .aarch64_be, .aarch64_32 => .aarch64_vector_pcs,
10930 .aarch64, .aarch64_be => .aarch64_vector_pcs,
1093610931 else => unreachable,
1093710932 },
1093810933 .Thiscall => .x86_thiscallcc,
......@@ -11929,7 +11924,7 @@ fn constraintAllowsRegister(constraint: []const u8) bool {
1192911924
1193011925pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
1193111926 switch (arch) {
11932 .aarch64, .aarch64_be, .aarch64_32 => {
11927 .aarch64, .aarch64_be => {
1193311928 llvm.LLVMInitializeAArch64Target();
1193411929 llvm.LLVMInitializeAArch64TargetInfo();
1193511930 llvm.LLVMInitializeAArch64TargetMC();
src/mingw.zig+2-2
......@@ -224,7 +224,7 @@ pub fn buildImportLib(comp: *Compilation, lib_name: []const u8) !void {
224224 const target_defines = switch (target.cpu.arch) {
225225 .x86 => "#define DEF_I386\n",
226226 .x86_64 => "#define DEF_X64\n",
227 .arm, .armeb, .thumb, .thumbeb, .aarch64_32 => "#define DEF_ARM32\n",
227 .arm, .armeb, .thumb, .thumbeb => "#define DEF_ARM32\n",
228228 .aarch64, .aarch64_be => "#define DEF_ARM64\n",
229229 else => unreachable,
230230 };
......@@ -323,7 +323,7 @@ fn findDef(
323323 const lib_path = switch (target.cpu.arch) {
324324 .x86 => "lib32",
325325 .x86_64 => "lib64",
326 .arm, .armeb, .thumb, .thumbeb, .aarch64_32 => "libarm32",
326 .arm, .armeb, .thumb, .thumbeb => "libarm32",
327327 .aarch64, .aarch64_be => "libarm64",
328328 else => unreachable,
329329 };
src/target.zig+2-6
......@@ -78,7 +78,6 @@ pub fn hasValgrindSupport(target: std.Target) bool {
7878 .x86,
7979 .x86_64,
8080 .aarch64,
81 .aarch64_32,
8281 .aarch64_be,
8382 => {
8483 return target.os.tag == .linux or target.os.tag == .solaris or target.os.tag == .illumos or
......@@ -115,7 +114,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
115114 .armeb,
116115 .aarch64,
117116 .aarch64_be,
118 .aarch64_32,
119117 .arc,
120118 .avr,
121119 .bpfel,
......@@ -268,7 +266,6 @@ pub fn hasRedZone(target: std.Target) bool {
268266 .x86,
269267 .aarch64,
270268 .aarch64_be,
271 .aarch64_32,
272269 => true,
273270
274271 else => false,
......@@ -412,7 +409,7 @@ pub fn llvmMachineAbi(target: std.Target) ?[:0]const u8 {
412409pub fn defaultFunctionAlignment(target: std.Target) Alignment {
413410 return switch (target.cpu.arch) {
414411 .arm, .armeb => .@"4",
415 .aarch64, .aarch64_32, .aarch64_be => .@"4",
412 .aarch64, .aarch64_be => .@"4",
416413 .sparc, .sparcel, .sparc64 => .@"4",
417414 .riscv64 => .@"2",
418415 else => .@"1",
......@@ -424,7 +421,6 @@ pub fn minFunctionAlignment(target: std.Target) Alignment {
424421 .arm,
425422 .armeb,
426423 .aarch64,
427 .aarch64_32,
428424 .aarch64_be,
429425 .riscv32,
430426 .riscv64,
......@@ -517,7 +513,7 @@ pub fn zigBackend(target: std.Target, use_llvm: bool) std.builtin.CompilerBacken
517513 .arm, .armeb, .thumb, .thumbeb => .stage2_arm,
518514 .x86_64 => .stage2_x86_64,
519515 .x86 => .stage2_x86,
520 .aarch64, .aarch64_be, .aarch64_32 => .stage2_aarch64,
516 .aarch64, .aarch64_be => .stage2_aarch64,
521517 .riscv64 => .stage2_riscv64,
522518 .sparc64 => .stage2_sparc64,
523519 .spirv64 => .stage2_spirv64,
test/behavior/align.zig-1
......@@ -175,7 +175,6 @@ test "alignment and size of structs with 128-bit fields" {
175175 .x86,
176176 .aarch64,
177177 .aarch64_be,
178 .aarch64_32,
179178 .riscv64,
180179 .bpfel,
181180 .bpfeb,
test/behavior/atomics.zig+1-1
......@@ -5,7 +5,7 @@ const expectEqual = std.testing.expectEqual;
55
66const supports_128_bit_atomics = switch (builtin.cpu.arch) {
77 // TODO: Ideally this could be sync'd with the logic in Sema.
8 .aarch64, .aarch64_be, .aarch64_32 => true,
8 .aarch64, .aarch64_be => true,
99 .x86_64 => std.Target.x86.featureSetHas(builtin.cpu.features, .cx16),
1010 else => false,
1111};
test/behavior/vector.zig-1
......@@ -742,7 +742,6 @@ test "vector shift operators" {
742742
743743 switch (builtin.target.cpu.arch) {
744744 .aarch64_be,
745 .aarch64_32,
746745 .armeb,
747746 .thumb,
748747 .thumbeb,
test/llvm_targets.zig+2-2
......@@ -3,9 +3,11 @@ const Cases = @import("src/Cases.zig");
33
44const targets = [_]std.Target.Query{
55 .{ .cpu_arch = .aarch64, .os_tag = .freestanding, .abi = .none },
6 .{ .cpu_arch = .aarch64, .os_tag = .freestanding, .abi = .ilp32 },
67 .{ .cpu_arch = .aarch64, .os_tag = .ios, .abi = .none },
78 .{ .cpu_arch = .aarch64, .os_tag = .ios, .abi = .simulator },
89 .{ .cpu_arch = .aarch64, .os_tag = .linux, .abi = .none },
10 .{ .cpu_arch = .aarch64, .os_tag = .linux, .abi = .gnuilp32 },
911 .{ .cpu_arch = .aarch64, .os_tag = .macos, .abi = .none },
1012 .{ .cpu_arch = .aarch64, .os_tag = .watchos, .abi = .none },
1113 .{ .cpu_arch = .aarch64, .os_tag = .watchos, .abi = .simulator },
......@@ -18,8 +20,6 @@ const targets = [_]std.Target.Query{
1820 .{ .cpu_arch = .aarch64, .os_tag = .windows, .abi = .msvc },
1921 .{ .cpu_arch = .aarch64_be, .os_tag = .freestanding, .abi = .none },
2022 .{ .cpu_arch = .aarch64_be, .os_tag = .linux, .abi = .none },
21 .{ .cpu_arch = .aarch64_32, .os_tag = .freestanding, .abi = .none },
22 .{ .cpu_arch = .aarch64_32, .os_tag = .linux, .abi = .none },
2323 .{ .cpu_arch = .amdgcn, .os_tag = .amdhsa, .abi = .none },
2424 .{ .cpu_arch = .amdgcn, .os_tag = .amdpal, .abi = .none },
2525 .{ .cpu_arch = .amdgcn, .os_tag = .linux, .abi = .none },