| ... | @@ -1533,8 +1533,108 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void { | ... | @@ -1533,8 +1533,108 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void { |
| 1533 | } | 1533 | } |
| 1534 | | 1534 | |
| 1535 | fn airShlWithOverflow(self: *Self, inst: Air.Inst.Index) !void { | 1535 | fn airShlWithOverflow(self: *Self, inst: Air.Inst.Index) !void { |
| 1536 | _ = inst; | 1536 | const ty_pl = self.air.instructions.items(.data)[inst].ty_pl; |
| 1537 | return self.fail("TODO implement airShlWithOverflow for {}", .{self.target.cpu.arch}); | 1537 | const bin_op = self.air.extraData(Air.Bin, ty_pl.payload).data; |
| | 1538 | |
| | 1539 | if (self.liveness.isUnused(inst)) { |
| | 1540 | return self.finishAir(inst, .dead, .{ bin_op.lhs, bin_op.rhs, .none }); |
| | 1541 | } |
| | 1542 | |
| | 1543 | const lhs_ty = self.air.typeOf(bin_op.lhs); |
| | 1544 | const abi_size = lhs_ty.abiSize(self.target.*); |
| | 1545 | const rhs_ty = self.air.typeOf(bin_op.rhs); |
| | 1546 | |
| | 1547 | const result: MCValue = result: { |
| | 1548 | switch (lhs_ty.zigTypeTag()) { |
| | 1549 | .Vector => return self.fail("TODO implement shl_with_overflow for Vector type", .{}), |
| | 1550 | .Int => { |
| | 1551 | if (abi_size > 8) { |
| | 1552 | return self.fail("TODO implement shl_with_overflow for Ints larger than 64bits", .{}); |
| | 1553 | } |
| | 1554 | |
| | 1555 | const int_info = lhs_ty.intInfo(self.target.*); |
| | 1556 | |
| | 1557 | if (math.isPowerOfTwo(int_info.bits) and int_info.bits >= 8) { |
| | 1558 | try self.spillCompareFlagsIfOccupied(); |
| | 1559 | self.compare_flags_inst = inst; |
| | 1560 | |
| | 1561 | try self.spillRegisters(1, .{.rcx}); |
| | 1562 | |
| | 1563 | const lhs = try self.resolveInst(bin_op.lhs); |
| | 1564 | const rhs = try self.resolveInst(bin_op.rhs); |
| | 1565 | |
| | 1566 | const partial = try self.genShiftBinOp(.shl, null, lhs, rhs, lhs_ty, rhs_ty); |
| | 1567 | break :result switch (int_info.signedness) { |
| | 1568 | .signed => MCValue{ .register_overflow_signed = partial.register }, |
| | 1569 | .unsigned => MCValue{ .register_overflow_unsigned = partial.register }, |
| | 1570 | }; |
| | 1571 | } |
| | 1572 | |
| | 1573 | return self.fail("TODO shl_with_overflow non-power-of-two", .{}); |
| | 1574 | |
| | 1575 | // try self.spillCompareFlagsIfOccupied(); |
| | 1576 | // self.compare_flags_inst = null; |
| | 1577 | |
| | 1578 | // const dst_reg: Register = dst_reg: { |
| | 1579 | // switch (int_info.signedness) { |
| | 1580 | // .signed => { |
| | 1581 | // const lhs = try self.resolveInst(bin_op.lhs); |
| | 1582 | // const rhs = try self.resolveInst(bin_op.rhs); |
| | 1583 | |
| | 1584 | // const rhs_lock: ?RegisterLock = switch (rhs) { |
| | 1585 | // .register => |reg| self.register_manager.lockRegAssumeUnused(reg), |
| | 1586 | // else => null, |
| | 1587 | // }; |
| | 1588 | // defer if (rhs_lock) |lock| self.register_manager.unlockReg(lock); |
| | 1589 | |
| | 1590 | // const dst_reg: Register = blk: { |
| | 1591 | // if (lhs.isRegister()) break :blk lhs.register; |
| | 1592 | // break :blk try self.copyToTmpRegister(ty, lhs); |
| | 1593 | // }; |
| | 1594 | // const dst_reg_lock = self.register_manager.lockRegAssumeUnused(dst_reg); |
| | 1595 | // defer self.register_manager.unlockReg(dst_reg_lock); |
| | 1596 | |
| | 1597 | // const rhs_mcv: MCValue = blk: { |
| | 1598 | // if (rhs.isRegister() or rhs.isMemory()) break :blk rhs; |
| | 1599 | // break :blk MCValue{ .register = try self.copyToTmpRegister(ty, rhs) }; |
| | 1600 | // }; |
| | 1601 | // const rhs_mcv_lock: ?RegisterLock = switch (rhs_mcv) { |
| | 1602 | // .register => |reg| self.register_manager.lockReg(reg), |
| | 1603 | // else => null, |
| | 1604 | // }; |
| | 1605 | // defer if (rhs_mcv_lock) |lock| self.register_manager.unlockReg(lock); |
| | 1606 | |
| | 1607 | // try self.genIntMulComplexOpMir(Type.isize, .{ .register = dst_reg }, rhs_mcv); |
| | 1608 | |
| | 1609 | // break :dst_reg dst_reg; |
| | 1610 | // }, |
| | 1611 | // .unsigned => { |
| | 1612 | // try self.spillRegisters(2, .{ .rax, .rdx }); |
| | 1613 | |
| | 1614 | // const lhs = try self.resolveInst(bin_op.lhs); |
| | 1615 | // const rhs = try self.resolveInst(bin_op.rhs); |
| | 1616 | |
| | 1617 | // const dst_mcv = try self.genMulDivBinOp(.mul, null, ty, lhs, rhs); |
| | 1618 | // break :dst_reg dst_mcv.register; |
| | 1619 | // }, |
| | 1620 | // } |
| | 1621 | // }; |
| | 1622 | |
| | 1623 | // const tuple_ty = self.air.typeOfIndex(inst); |
| | 1624 | // const tuple_size = @intCast(u32, tuple_ty.abiSize(self.target.*)); |
| | 1625 | // const tuple_align = tuple_ty.abiAlignment(self.target.*); |
| | 1626 | // const overflow_bit_offset = @intCast(i32, tuple_ty.structFieldOffset(1, self.target.*)); |
| | 1627 | // const stack_offset = @intCast(i32, try self.allocMem(inst, tuple_size, tuple_align)); |
| | 1628 | |
| | 1629 | // try self.genSetStackTruncatedOverflowCompare(ty, stack_offset, overflow_bit_offset, dst_reg); |
| | 1630 | |
| | 1631 | // break :result MCValue{ .stack_offset = stack_offset }; |
| | 1632 | }, |
| | 1633 | else => unreachable, |
| | 1634 | } |
| | 1635 | }; |
| | 1636 | |
| | 1637 | return self.finishAir(inst, result, .{ bin_op.lhs, bin_op.rhs, .none }); |
| 1538 | } | 1638 | } |
| 1539 | | 1639 | |
| 1540 | /// Generates signed or unsigned integer multiplication/division. | 1640 | /// Generates signed or unsigned integer multiplication/division. |