| author | |
| committer | |
| log | d65318847ff4f8eb9d6655b27bf769ea94c2c3d7 |
| tree | e048c9b992e0703ae1007a7bc634ea176da6b65b |
| parent | 821971106383e6e64e679c4402278399798c76eb |
Closes #16844
Reduces #168469 files changed, 18 insertions(+), 116 deletions(-)
lib/compiler_rt/subdf3.zig+7-3| ... | ... | @@ -1,4 +1,5 @@ |
| 1 | 1 | const common = @import("./common.zig"); |
| 2 | const addf3 = @import("./addf3.zig").addf3; | |
| 2 | 3 | |
| 3 | 4 | pub const panic = common.panic; |
| 4 | 5 | |
| ... | ... | @@ -11,11 +12,14 @@ comptime { |
| 11 | 12 | } |
| 12 | 13 | |
| 13 | 14 | fn __subdf3(a: f64, b: f64) callconv(.C) f64 { |
| 14 | const neg_b = @as(f64, @bitCast(@as(u64, @bitCast(b)) ^ (@as(u64, 1) << 63))); | |
| 15 | return a + neg_b; | |
| 15 | return sub(a, b); | |
| 16 | 16 | } |
| 17 | 17 | |
| 18 | 18 | fn __aeabi_dsub(a: f64, b: f64) callconv(.AAPCS) f64 { |
| 19 | return sub(a, b); | |
| 20 | } | |
| 21 | ||
| 22 | inline fn sub(a: f64, b: f64) f64 { | |
| 19 | 23 | const neg_b = @as(f64, @bitCast(@as(u64, @bitCast(b)) ^ (@as(u64, 1) << 63))); |
| 20 | return a + neg_b; | |
| 24 | return addf3(f64, a, neg_b); | |
| 21 | 25 | } |
lib/compiler_rt/subhf3.zig+2-1| ... | ... | @@ -1,4 +1,5 @@ |
| 1 | 1 | const common = @import("./common.zig"); |
| 2 | const addf3 = @import("./addf3.zig").addf3; | |
| 2 | 3 | |
| 3 | 4 | pub const panic = common.panic; |
| 4 | 5 | |
| ... | ... | @@ -8,5 +9,5 @@ comptime { |
| 8 | 9 | |
| 9 | 10 | fn __subhf3(a: f16, b: f16) callconv(.C) f16 { |
| 10 | 11 | const neg_b = @as(f16, @bitCast(@as(u16, @bitCast(b)) ^ (@as(u16, 1) << 15))); |
| 11 | return a + neg_b; | |
| 12 | return addf3(f16, a, neg_b); | |
| 12 | 13 | } |
lib/compiler_rt/subsf3.zig+7-3| ... | ... | @@ -1,4 +1,5 @@ |
| 1 | 1 | const common = @import("./common.zig"); |
| 2 | const addf3 = @import("./addf3.zig").addf3; | |
| 2 | 3 | |
| 3 | 4 | pub const panic = common.panic; |
| 4 | 5 | |
| ... | ... | @@ -11,11 +12,14 @@ comptime { |
| 11 | 12 | } |
| 12 | 13 | |
| 13 | 14 | fn __subsf3(a: f32, b: f32) callconv(.C) f32 { |
| 14 | const neg_b = @as(f32, @bitCast(@as(u32, @bitCast(b)) ^ (@as(u32, 1) << 31))); | |
| 15 | return a + neg_b; | |
| 15 | return sub(a, b); | |
| 16 | 16 | } |
| 17 | 17 | |
| 18 | 18 | fn __aeabi_fsub(a: f32, b: f32) callconv(.AAPCS) f32 { |
| 19 | return sub(a, b); | |
| 20 | } | |
| 21 | ||
| 22 | inline fn sub(a: f32, b: f32) f32 { | |
| 19 | 23 | const neg_b = @as(f32, @bitCast(@as(u32, @bitCast(b)) ^ (@as(u32, 1) << 31))); |
| 20 | return a + neg_b; | |
| 24 | return addf3(f32, a, neg_b); | |
| 21 | 25 | } |
lib/compiler_rt/subtf3.zig+2-1| ... | ... | @@ -1,4 +1,5 @@ |
| 1 | 1 | const common = @import("./common.zig"); |
| 2 | const addf3 = @import("./addf3.zig").addf3; | |
| 2 | 3 | |
| 3 | 4 | pub const panic = common.panic; |
| 4 | 5 | |
| ... | ... | @@ -21,5 +22,5 @@ fn _Qp_sub(c: *f128, a: *const f128, b: *const f128) callconv(.C) void { |
| 21 | 22 | |
| 22 | 23 | inline fn sub(a: f128, b: f128) f128 { |
| 23 | 24 | const neg_b = @as(f128, @bitCast(@as(u128, @bitCast(b)) ^ (@as(u128, 1) << 127))); |
| 24 | return a + neg_b; | |
| 25 | return addf3(f128, a, neg_b); | |
| 25 | 26 | } |
test/behavior/atomics.zig-5| ... | ... | @@ -243,11 +243,6 @@ test "atomicrmw with ints" { |
| 243 | 243 | if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO |
| 244 | 244 | if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; |
| 245 | 245 | |
| 246 | if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isMIPS()) { | |
| 247 | // https://github.com/ziglang/zig/issues/16846 | |
| 248 | return error.SkipZigTest; | |
| 249 | } | |
| 250 | ||
| 251 | 246 | try testAtomicRmwInts(); |
| 252 | 247 | try comptime testAtomicRmwInts(); |
| 253 | 248 | } |
test/behavior/floatop.zig-40| ... | ... | @@ -711,18 +711,6 @@ test "@floor f80" { |
| 711 | 711 | return error.SkipZigTest; |
| 712 | 712 | } |
| 713 | 713 | |
| 714 | if (builtin.zig_backend == .stage2_llvm and | |
| 715 | (builtin.cpu.arch == .powerpc64le or builtin.cpu.arch == .aarch64)) | |
| 716 | { | |
| 717 | // https://github.com/ziglang/zig/issues/16844 | |
| 718 | return error.SkipZigTest; | |
| 719 | } | |
| 720 | ||
| 721 | if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isMIPS()) { | |
| 722 | // https://github.com/ziglang/zig/issues/16846 | |
| 723 | return error.SkipZigTest; | |
| 724 | } | |
| 725 | ||
| 726 | 714 | try testFloorLegacy(f80, 12.0); |
| 727 | 715 | try comptime testFloorLegacy(f80, 12.0); |
| 728 | 716 | } |
| ... | ... | @@ -734,13 +722,6 @@ test "@floor f128" { |
| 734 | 722 | if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; |
| 735 | 723 | if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; |
| 736 | 724 | |
| 737 | if (builtin.zig_backend == .stage2_llvm and | |
| 738 | (builtin.cpu.arch == .powerpc64le or builtin.cpu.arch == .aarch64)) | |
| 739 | { | |
| 740 | // https://github.com/ziglang/zig/issues/16844 | |
| 741 | return error.SkipZigTest; | |
| 742 | } | |
| 743 | ||
| 744 | 725 | if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isARM()) { |
| 745 | 726 | // https://github.com/ziglang/zig/issues/16848 |
| 746 | 727 | return error.SkipZigTest; |
| ... | ... | @@ -831,13 +812,6 @@ test "@ceil f80" { |
| 831 | 812 | return error.SkipZigTest; |
| 832 | 813 | } |
| 833 | 814 | |
| 834 | if (builtin.zig_backend == .stage2_llvm and | |
| 835 | (builtin.cpu.arch == .powerpc64le or builtin.cpu.arch == .aarch64)) | |
| 836 | { | |
| 837 | // https://github.com/ziglang/zig/issues/16844 | |
| 838 | return error.SkipZigTest; | |
| 839 | } | |
| 840 | ||
| 841 | 815 | try testCeilLegacy(f80, 12.0); |
| 842 | 816 | try comptime testCeilLegacy(f80, 12.0); |
| 843 | 817 | } |
| ... | ... | @@ -849,13 +823,6 @@ test "@ceil f128" { |
| 849 | 823 | if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; |
| 850 | 824 | if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; |
| 851 | 825 | |
| 852 | if (builtin.zig_backend == .stage2_llvm and | |
| 853 | (builtin.cpu.arch == .powerpc64le or builtin.cpu.arch == .aarch64)) | |
| 854 | { | |
| 855 | // https://github.com/ziglang/zig/issues/16844 | |
| 856 | return error.SkipZigTest; | |
| 857 | } | |
| 858 | ||
| 859 | 826 | try testCeilLegacy(f128, 12.0); |
| 860 | 827 | try comptime testCeilLegacy(f128, 12.0); |
| 861 | 828 | } |
| ... | ... | @@ -962,13 +929,6 @@ test "@trunc f128" { |
| 962 | 929 | if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; |
| 963 | 930 | if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; |
| 964 | 931 | |
| 965 | if (builtin.zig_backend == .stage2_llvm and | |
| 966 | (builtin.cpu.arch == .powerpc64le or builtin.cpu.arch == .aarch64)) | |
| 967 | { | |
| 968 | // https://github.com/ziglang/zig/issues/16844 | |
| 969 | return error.SkipZigTest; | |
| 970 | } | |
| 971 | ||
| 972 | 932 | try testTruncLegacy(f128, 12.0); |
| 973 | 933 | try comptime testTruncLegacy(f128, 12.0); |
| 974 | 934 | } |
test/behavior/math.zig-28| ... | ... | @@ -1360,13 +1360,6 @@ test "float remainder division using @rem" { |
| 1360 | 1360 | if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; |
| 1361 | 1361 | if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO |
| 1362 | 1362 | |
| 1363 | if (builtin.zig_backend == .stage2_llvm and | |
| 1364 | (builtin.cpu.arch == .powerpc64le or builtin.cpu.arch == .aarch64)) | |
| 1365 | { | |
| 1366 | // https://github.com/ziglang/zig/issues/16844 | |
| 1367 | return error.SkipZigTest; | |
| 1368 | } | |
| 1369 | ||
| 1370 | 1363 | try comptime frem(f16); |
| 1371 | 1364 | try comptime frem(f32); |
| 1372 | 1365 | try comptime frem(f64); |
| ... | ... | @@ -1410,13 +1403,6 @@ test "float modulo division using @mod" { |
| 1410 | 1403 | if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO |
| 1411 | 1404 | if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; |
| 1412 | 1405 | |
| 1413 | if (builtin.zig_backend == .stage2_llvm and | |
| 1414 | (builtin.cpu.arch == .powerpc64le or builtin.cpu.arch == .aarch64)) | |
| 1415 | { | |
| 1416 | // https://github.com/ziglang/zig/issues/16844 | |
| 1417 | return error.SkipZigTest; | |
| 1418 | } | |
| 1419 | ||
| 1420 | 1406 | try comptime fmod(f16); |
| 1421 | 1407 | try comptime fmod(f32); |
| 1422 | 1408 | try comptime fmod(f64); |
| ... | ... | @@ -1480,13 +1466,6 @@ test "@round f80" { |
| 1480 | 1466 | if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; |
| 1481 | 1467 | if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; |
| 1482 | 1468 | |
| 1483 | if (builtin.zig_backend == .stage2_llvm and | |
| 1484 | (builtin.cpu.arch == .powerpc64le or builtin.cpu.arch == .aarch64)) | |
| 1485 | { | |
| 1486 | // https://github.com/ziglang/zig/issues/16844 | |
| 1487 | return error.SkipZigTest; | |
| 1488 | } | |
| 1489 | ||
| 1490 | 1469 | try testRound(f80, 12.0); |
| 1491 | 1470 | try comptime testRound(f80, 12.0); |
| 1492 | 1471 | } |
| ... | ... | @@ -1499,13 +1478,6 @@ test "@round f128" { |
| 1499 | 1478 | if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; |
| 1500 | 1479 | if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; |
| 1501 | 1480 | |
| 1502 | if (builtin.zig_backend == .stage2_llvm and | |
| 1503 | (builtin.cpu.arch == .powerpc64le or builtin.cpu.arch == .aarch64)) | |
| 1504 | { | |
| 1505 | // https://github.com/ziglang/zig/issues/16844 | |
| 1506 | return error.SkipZigTest; | |
| 1507 | } | |
| 1508 | ||
| 1509 | 1481 | try testRound(f128, 12.0); |
| 1510 | 1482 | try comptime testRound(f128, 12.0); |
| 1511 | 1483 | } |
test/behavior/muladd.zig-28| ... | ... | @@ -62,13 +62,6 @@ test "@mulAdd f80" { |
| 62 | 62 | return error.SkipZigTest; |
| 63 | 63 | } |
| 64 | 64 | |
| 65 | if (builtin.zig_backend == .stage2_llvm and | |
| 66 | (builtin.cpu.arch == .powerpc64le or builtin.cpu.arch == .aarch64)) | |
| 67 | { | |
| 68 | // https://github.com/ziglang/zig/issues/16844 | |
| 69 | return error.SkipZigTest; | |
| 70 | } | |
| 71 | ||
| 72 | 65 | try comptime testMulAdd80(); |
| 73 | 66 | try testMulAdd80(); |
| 74 | 67 | } |
| ... | ... | @@ -93,13 +86,6 @@ test "@mulAdd f128" { |
| 93 | 86 | return error.SkipZigTest; |
| 94 | 87 | } |
| 95 | 88 | |
| 96 | if (builtin.zig_backend == .stage2_llvm and | |
| 97 | (builtin.cpu.arch == .powerpc64le or builtin.cpu.arch == .aarch64)) | |
| 98 | { | |
| 99 | // https://github.com/ziglang/zig/issues/16844 | |
| 100 | return error.SkipZigTest; | |
| 101 | } | |
| 102 | ||
| 103 | 89 | try comptime testMulAdd128(); |
| 104 | 90 | try testMulAdd128(); |
| 105 | 91 | } |
| ... | ... | @@ -203,13 +189,6 @@ test "vector f80" { |
| 203 | 189 | if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; |
| 204 | 190 | if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; |
| 205 | 191 | |
| 206 | if (builtin.zig_backend == .stage2_llvm and | |
| 207 | (builtin.cpu.arch == .powerpc64le or builtin.cpu.arch == .aarch64)) | |
| 208 | { | |
| 209 | // https://github.com/ziglang/zig/issues/16844 | |
| 210 | return error.SkipZigTest; | |
| 211 | } | |
| 212 | ||
| 213 | 192 | try comptime vector80(); |
| 214 | 193 | try vector80(); |
| 215 | 194 | } |
| ... | ... | @@ -235,13 +214,6 @@ test "vector f128" { |
| 235 | 214 | if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; |
| 236 | 215 | if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; |
| 237 | 216 | |
| 238 | if (builtin.zig_backend == .stage2_llvm and | |
| 239 | (builtin.cpu.arch == .powerpc64le or builtin.cpu.arch == .aarch64)) | |
| 240 | { | |
| 241 | // https://github.com/ziglang/zig/issues/16844 | |
| 242 | return error.SkipZigTest; | |
| 243 | } | |
| 244 | ||
| 245 | 217 | try comptime vector128(); |
| 246 | 218 | try vector128(); |
| 247 | 219 | } |
test/behavior/vector.zig-7| ... | ... | @@ -104,13 +104,6 @@ test "vector float operators" { |
| 104 | 104 | if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; |
| 105 | 105 | if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; |
| 106 | 106 | |
| 107 | if (builtin.zig_backend == .stage2_llvm and | |
| 108 | (builtin.cpu.arch == .powerpc64le or builtin.cpu.arch == .aarch64)) | |
| 109 | { | |
| 110 | // https://github.com/ziglang/zig/issues/16844 | |
| 111 | return error.SkipZigTest; | |
| 112 | } | |
| 113 | ||
| 114 | 107 | inline for ([_]type{ f16, f32, f64, f80, f128 }) |T| { |
| 115 | 108 | const S = struct { |
| 116 | 109 | fn doTheTest() !void { |