| author |  Alex Rønne Petersen <alex@alexrp.com> 2024-08-06 22:34:20+02:00 |
| committer |  Andrew Kelley <andrew@ziglang.org> 2024-08-12 16:08:28-07:00 |
| log | d6f997259487fc01b1aa6d24bdc7b960c4aaec46 |
| tree | 8bc66b10c07bbc616f8a3016eac90a93b7b4a02a |
| parent | 6d23850108b5d3278f5b1cad395ff8da4fdfebeb |
all: Handle spirv in addition to spirv(32,64) where applicable.
Some of this is arbitrary since spirv (as opposed to spirv32/spirv64) refers to
the version with logical memory layout, i.e. no 'real' pointers. This change at
least matches what clang does.6 files changed, 19 insertions(+), 20 deletions(-)
lib/std/Target.zig+7-7
| ... | @@ -1163,7 +1163,7 @@ pub const Cpu = struct { | ... | @@ -1163,7 +1163,7 @@ pub const Cpu = struct { |
| 1163 | 1163 | ||
| 1164 | pub inline fn isSpirV(arch: Arch) bool { | 1164 | pub inline fn isSpirV(arch: Arch) bool { |
| 1165 | return switch (arch) { | 1165 | return switch (arch) { |
| 1166 | .spirv32, .spirv64 => true, | 1166 | .spirv, .spirv32, .spirv64 => true, |
| 1167 | else => false, | 1167 | else => false, |
| 1168 | }; | 1168 | }; |
| 1169 | } | 1169 | } |
| ... | @@ -1348,8 +1348,8 @@ pub const Cpu = struct { | ... | @@ -1348,8 +1348,8 @@ pub const Cpu = struct { |
| 1348 | 1348 | ||
| 1349 | /// Returns whether this architecture supports the address space | 1349 | /// Returns whether this architecture supports the address space |
| 1350 | pub fn supportsAddressSpace(arch: Arch, address_space: std.builtin.AddressSpace) bool { | 1350 | pub fn supportsAddressSpace(arch: Arch, address_space: std.builtin.AddressSpace) bool { |
| 1351 | const is_nvptx = arch == .nvptx or arch == .nvptx64; | 1351 | const is_nvptx = arch.isNvptx(); |
| 1352 | const is_spirv = arch == .spirv32 or arch == .spirv64; | 1352 | const is_spirv = arch.isSpirV(); |
| 1353 | const is_gpu = is_nvptx or is_spirv or arch == .amdgcn; | 1353 | const is_gpu = is_nvptx or is_spirv or arch == .amdgcn; |
| 1354 | return switch (address_space) { | 1354 | return switch (address_space) { |
| 1355 | .generic => true, | 1355 | .generic => true, |
| ... | @@ -1378,7 +1378,7 @@ pub const Cpu = struct { | ... | @@ -1378,7 +1378,7 @@ pub const Cpu = struct { |
| 1378 | .x86, .x86_64 => "x86", | 1378 | .x86, .x86_64 => "x86", |
| 1379 | .nvptx, .nvptx64 => "nvptx", | 1379 | .nvptx, .nvptx64 => "nvptx", |
| 1380 | .wasm32, .wasm64 => "wasm", | 1380 | .wasm32, .wasm64 => "wasm", |
| 1381 | .spirv32, .spirv64 => "spirv", | 1381 | .spirv, .spirv32, .spirv64 => "spirv", |
| 1382 | else => @tagName(arch), | 1382 | else => @tagName(arch), |
| 1383 | }; | 1383 | }; |
| 1384 | } | 1384 | } |
| ... | @@ -1401,7 +1401,7 @@ pub const Cpu = struct { | ... | @@ -1401,7 +1401,7 @@ pub const Cpu = struct { |
| 1401 | .amdgcn => &amdgpu.all_features, | 1401 | .amdgcn => &amdgpu.all_features, |
| 1402 | .riscv32, .riscv64 => &riscv.all_features, | 1402 | .riscv32, .riscv64 => &riscv.all_features, |
| 1403 | .sparc, .sparc64 => &sparc.all_features, | 1403 | .sparc, .sparc64 => &sparc.all_features, |
| 1404 | .spirv32, .spirv64 => &spirv.all_features, | 1404 | .spirv, .spirv32, .spirv64 => &spirv.all_features, |
| 1405 | .s390x => &s390x.all_features, | 1405 | .s390x => &s390x.all_features, |
| 1406 | .x86, .x86_64 => &x86.all_features, | 1406 | .x86, .x86_64 => &x86.all_features, |
| 1407 | .xtensa => &xtensa.all_features, | 1407 | .xtensa => &xtensa.all_features, |
| ... | @@ -1431,7 +1431,7 @@ pub const Cpu = struct { | ... | @@ -1431,7 +1431,7 @@ pub const Cpu = struct { |
| 1431 | .amdgcn => comptime allCpusFromDecls(amdgpu.cpu), | 1431 | .amdgcn => comptime allCpusFromDecls(amdgpu.cpu), |
| 1432 | .riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu), | 1432 | .riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu), |
| 1433 | .sparc, .sparc64 => comptime allCpusFromDecls(sparc.cpu), | 1433 | .sparc, .sparc64 => comptime allCpusFromDecls(sparc.cpu), |
| 1434 | .spirv32, .spirv64 => comptime allCpusFromDecls(spirv.cpu), | 1434 | .spirv, .spirv32, .spirv64 => comptime allCpusFromDecls(spirv.cpu), |
| 1435 | .s390x => comptime allCpusFromDecls(s390x.cpu), | 1435 | .s390x => comptime allCpusFromDecls(s390x.cpu), |
| 1436 | .x86, .x86_64 => comptime allCpusFromDecls(x86.cpu), | 1436 | .x86, .x86_64 => comptime allCpusFromDecls(x86.cpu), |
| 1437 | .xtensa => comptime allCpusFromDecls(xtensa.cpu), | 1437 | .xtensa => comptime allCpusFromDecls(xtensa.cpu), |
| ... | @@ -1521,7 +1521,7 @@ pub const Cpu = struct { | ... | @@ -1521,7 +1521,7 @@ pub const Cpu = struct { |
| 1521 | .amdgcn => &amdgpu.cpu.generic, | 1521 | .amdgcn => &amdgpu.cpu.generic, |
| 1522 | .riscv32 => &riscv.cpu.generic_rv32, | 1522 | .riscv32 => &riscv.cpu.generic_rv32, |
| 1523 | .riscv64 => &riscv.cpu.generic_rv64, | 1523 | .riscv64 => &riscv.cpu.generic_rv64, |
| 1524 | .spirv32, .spirv64 => &spirv.cpu.generic, | 1524 | .spirv, .spirv32, .spirv64 => &spirv.cpu.generic, |
| 1525 | .sparc => &sparc.cpu.generic, | 1525 | .sparc => &sparc.cpu.generic, |
| 1526 | .sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline | 1526 | .sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline |
| 1527 | .s390x => &s390x.cpu.generic, | 1527 | .s390x => &s390x.cpu.generic, |
src/Compilation.zig+2-2
| ... | @@ -6266,7 +6266,7 @@ fn canBuildLibCompilerRt(target: std.Target, use_llvm: bool) bool { | ... | @@ -6266,7 +6266,7 @@ fn canBuildLibCompilerRt(target: std.Target, use_llvm: bool) bool { |
| 6266 | else => {}, | 6266 | else => {}, |
| 6267 | } | 6267 | } |
| 6268 | switch (target.cpu.arch) { | 6268 | switch (target.cpu.arch) { |
| 6269 | .spirv32, .spirv64 => return false, | 6269 | .spirv, .spirv32, .spirv64 => return false, |
| 6270 | else => {}, | 6270 | else => {}, |
| 6271 | } | 6271 | } |
| 6272 | return switch (target_util.zigBackend(target, use_llvm)) { | 6272 | return switch (target_util.zigBackend(target, use_llvm)) { |
| ... | @@ -6284,7 +6284,7 @@ fn canBuildZigLibC(target: std.Target, use_llvm: bool) bool { | ... | @@ -6284,7 +6284,7 @@ fn canBuildZigLibC(target: std.Target, use_llvm: bool) bool { |
| 6284 | else => {}, | 6284 | else => {}, |
| 6285 | } | 6285 | } |
| 6286 | switch (target.cpu.arch) { | 6286 | switch (target.cpu.arch) { |
| 6287 | .spirv32, .spirv64 => return false, | 6287 | .spirv, .spirv32, .spirv64 => return false, |
| 6288 | else => {}, | 6288 | else => {}, |
| 6289 | } | 6289 | } |
| 6290 | return switch (target_util.zigBackend(target, use_llvm)) { | 6290 | return switch (target_util.zigBackend(target, use_llvm)) { |
src/Sema.zig+5-5
| ... | @@ -10038,11 +10038,11 @@ fn finishFunc( | ... | @@ -10038,11 +10038,11 @@ fn finishFunc( |
| 10038 | else => "x86_64", | 10038 | else => "x86_64", |
| 10039 | }, | 10039 | }, |
| 10040 | .Kernel => switch (arch) { | 10040 | .Kernel => switch (arch) { |
| 10041 | .nvptx, .nvptx64, .amdgcn, .spirv32, .spirv64 => null, | 10041 | .nvptx, .nvptx64, .amdgcn, .spirv, .spirv32, .spirv64 => null, |
| 10042 | else => "nvptx, amdgcn and SPIR-V", | 10042 | else => "nvptx, amdgcn and SPIR-V", |
| 10043 | }, | 10043 | }, |
| 10044 | .Fragment, .Vertex => switch (arch) { | 10044 | .Fragment, .Vertex => switch (arch) { |
| 10045 | .spirv32, .spirv64 => null, | 10045 | .spirv, .spirv32, .spirv64 => null, |
| 10046 | else => "SPIR-V", | 10046 | else => "SPIR-V", |
| 10047 | }, | 10047 | }, |
| 10048 | })) |allowed_platform| { | 10048 | })) |allowed_platform| { |
| ... | @@ -26703,7 +26703,7 @@ fn zirWorkItem( | ... | @@ -26703,7 +26703,7 @@ fn zirWorkItem( |
| 26703 | 26703 | ||
| 26704 | switch (target.cpu.arch) { | 26704 | switch (target.cpu.arch) { |
| 26705 | // TODO: Allow for other GPU targets. | 26705 | // TODO: Allow for other GPU targets. |
| 26706 | .amdgcn, .spirv64, .spirv32 => {}, | 26706 | .amdgcn, .spirv, .spirv64, .spirv32 => {}, |
| 26707 | else => { | 26707 | else => { |
| 26708 | return sema.fail(block, builtin_src, "builtin only available on GPU targets; targeted architecture is {s}", .{@tagName(target.cpu.arch)}); | 26708 | return sema.fail(block, builtin_src, "builtin only available on GPU targets; targeted architecture is {s}", .{@tagName(target.cpu.arch)}); |
| 26709 | }, | 26709 | }, |
| ... | @@ -37323,9 +37323,9 @@ pub fn analyzeAsAddressSpace( | ... | @@ -37323,9 +37323,9 @@ pub fn analyzeAsAddressSpace( |
| 37323 | const target = pt.zcu.getTarget(); | 37323 | const target = pt.zcu.getTarget(); |
| 37324 | const arch = target.cpu.arch; | 37324 | const arch = target.cpu.arch; |
| 37325 | 37325 | ||
| 37326 | const is_nv = arch == .nvptx or arch == .nvptx64; | 37326 | const is_nv = arch.isNvptx(); |
| 37327 | const is_amd = arch == .amdgcn; | 37327 | const is_amd = arch == .amdgcn; |
| 37328 | const is_spirv = arch == .spirv32 or arch == .spirv64; | 37328 | const is_spirv = arch.isSpirV(); |
| 37329 | const is_gpu = is_nv or is_amd or is_spirv; | 37329 | const is_gpu = is_nv or is_amd or is_spirv; |
| 37330 | 37330 | ||
| 37331 | const supported = switch (address_space) { | 37331 | const supported = switch (address_space) { |
src/Zcu.zig+1-2
| ... | @@ -2910,6 +2910,7 @@ pub fn atomicPtrAlignment( | ... | @@ -2910,6 +2910,7 @@ pub fn atomicPtrAlignment( |
| 2910 | .s390x, | 2910 | .s390x, |
| 2911 | .wasm64, | 2911 | .wasm64, |
| 2912 | .ve, | 2912 | .ve, |
| 2913 | .spirv, | ||
| 2913 | .spirv64, | 2914 | .spirv64, |
| 2914 | .loongarch64, | 2915 | .loongarch64, |
| 2915 | => 64, | 2916 | => 64, |
| ... | @@ -2919,8 +2920,6 @@ pub fn atomicPtrAlignment( | ... | @@ -2919,8 +2920,6 @@ pub fn atomicPtrAlignment( |
| 2919 | => 128, | 2920 | => 128, |
| 2920 | 2921 | ||
| 2921 | .x86_64 => if (std.Target.x86.featureSetHas(target.cpu.features, .cx16)) 128 else 64, | 2922 | .x86_64 => if (std.Target.x86.featureSetHas(target.cpu.features, .cx16)) 128 else 64, |
| 2922 | |||
| 2923 | .spirv => @panic("TODO what should this value be?"), | ||
| 2924 | }; | 2923 | }; |
| 2925 | 2924 | ||
| 2926 | if (ty.toIntern() == .bool_type) return .none; | 2925 | if (ty.toIntern() == .bool_type) return .none; |
src/link/SpirV.zig+1-1
| ... | @@ -80,7 +80,7 @@ pub fn createEmpty( | ... | @@ -80,7 +80,7 @@ pub fn createEmpty( |
| 80 | errdefer self.deinit(); | 80 | errdefer self.deinit(); |
| 81 | 81 | ||
| 82 | switch (target.cpu.arch) { | 82 | switch (target.cpu.arch) { |
| 83 | .spirv32, .spirv64 => {}, | 83 | .spirv, .spirv32, .spirv64 => {}, |
| 84 | else => unreachable, // Caught by Compilation.Config.resolve. | 84 | else => unreachable, // Caught by Compilation.Config.resolve. |
| 85 | } | 85 | } |
| 86 | 86 |
src/target.zig+3-3
| ... | @@ -196,7 +196,7 @@ pub fn supportsStackProtector(target: std.Target, backend: std.builtin.CompilerB | ... | @@ -196,7 +196,7 @@ pub fn supportsStackProtector(target: std.Target, backend: std.builtin.CompilerB |
| 196 | else => {}, | 196 | else => {}, |
| 197 | } | 197 | } |
| 198 | switch (target.cpu.arch) { | 198 | switch (target.cpu.arch) { |
| 199 | .spirv32, .spirv64 => return false, | 199 | .spirv, .spirv32, .spirv64 => return false, |
| 200 | else => {}, | 200 | else => {}, |
| 201 | } | 201 | } |
| 202 | return switch (backend) { | 202 | return switch (backend) { |
| ... | @@ -207,7 +207,7 @@ pub fn supportsStackProtector(target: std.Target, backend: std.builtin.CompilerB | ... | @@ -207,7 +207,7 @@ pub fn supportsStackProtector(target: std.Target, backend: std.builtin.CompilerB |
| 207 | 207 | ||
| 208 | pub fn clangSupportsStackProtector(target: std.Target) bool { | 208 | pub fn clangSupportsStackProtector(target: std.Target) bool { |
| 209 | return switch (target.cpu.arch) { | 209 | return switch (target.cpu.arch) { |
| 210 | .spirv32, .spirv64 => return false, | 210 | .spirv, .spirv32, .spirv64 => return false, |
| 211 | else => true, | 211 | else => true, |
| 212 | }; | 212 | }; |
| 213 | } | 213 | } |
| ... | @@ -220,7 +220,7 @@ pub fn supportsReturnAddress(target: std.Target) bool { | ... | @@ -220,7 +220,7 @@ pub fn supportsReturnAddress(target: std.Target) bool { |
| 220 | return switch (target.cpu.arch) { | 220 | return switch (target.cpu.arch) { |
| 221 | .wasm32, .wasm64 => target.os.tag == .emscripten, | 221 | .wasm32, .wasm64 => target.os.tag == .emscripten, |
| 222 | .bpfel, .bpfeb => false, | 222 | .bpfel, .bpfeb => false, |
| 223 | .spirv32, .spirv64 => false, | 223 | .spirv, .spirv32, .spirv64 => false, |
| 224 | else => true, | 224 | else => true, |
| 225 | }; | 225 | }; |
| 226 | } | 226 | } |