authorgravatar for michael.larouche@gmail.comMichaël Larouche <michael.larouche@gmail.com> 2020-01-11 17:10:00-05:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-01-17 14:25:22-05:00
logd9be6e5dc693fcbcb5f4c343a3d2b0b9fc786e25
tree794a0599b570c38ec2714f1d11d2f8c8addc5240
parentd53e8a5751c3d3a65db775598cc1db88c4d92ba9

Port clzsi2 from compiler_rt, required for using std.fmt.format on some ARM architecture.

3 files changed, 415 insertions(+), 1 deletions(-)

lib/std/special/compiler_rt.zig+5-1
...@@ -146,6 +146,8 @@ comptime {...@@ -146,6 +146,8 @@ comptime {
146 @export(@import("compiler_rt/negXf2.zig").__negsf2, .{ .name = "__negsf2", .linkage = linkage });146 @export(@import("compiler_rt/negXf2.zig").__negsf2, .{ .name = "__negsf2", .linkage = linkage });
147 @export(@import("compiler_rt/negXf2.zig").__negdf2, .{ .name = "__negdf2", .linkage = linkage });147 @export(@import("compiler_rt/negXf2.zig").__negdf2, .{ .name = "__negdf2", .linkage = linkage });
148148
149 @export(@import("compiler_rt/clzsi2.zig").__clzsi2, .{ .name = "__clzsi2", .linkage = linkage });
150
149 if (is_arm_arch and !is_arm_64 and !is_test) {151 if (is_arm_arch and !is_arm_64 and !is_test) {
150 @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr0, .{ .name = "__aeabi_unwind_cpp_pr0", .linkage = linkage });152 @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr0, .{ .name = "__aeabi_unwind_cpp_pr0", .linkage = linkage });
151 @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr1, .{ .name = "__aeabi_unwind_cpp_pr1", .linkage = linkage });153 @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr1, .{ .name = "__aeabi_unwind_cpp_pr1", .linkage = linkage });
...@@ -177,7 +179,9 @@ comptime {...@@ -177,7 +179,9 @@ comptime {
177 @export(@import("compiler_rt/arm.zig").__aeabi_memclr, .{ .name = "__aeabi_memclr4", .linkage = linkage });179 @export(@import("compiler_rt/arm.zig").__aeabi_memclr, .{ .name = "__aeabi_memclr4", .linkage = linkage });
178 @export(@import("compiler_rt/arm.zig").__aeabi_memclr, .{ .name = "__aeabi_memclr8", .linkage = linkage });180 @export(@import("compiler_rt/arm.zig").__aeabi_memclr, .{ .name = "__aeabi_memclr8", .linkage = linkage });
179181
180 @export(@import("compiler_rt/arm.zig").__aeabi_read_tp, .{ .name = "__aeabi_read_tp", .linkage = linkage });182 if (builtin.os == .linux) {
183 @export(@import("compiler_rt/arm.zig").__aeabi_read_tp, .{ .name = "__aeabi_read_tp", .linkage = linkage });
184 }
181185
182 @export(@import("compiler_rt/extendXfYf2.zig").__aeabi_f2d, .{ .name = "__aeabi_f2d", .linkage = linkage });186 @export(@import("compiler_rt/extendXfYf2.zig").__aeabi_f2d, .{ .name = "__aeabi_f2d", .linkage = linkage });
183 @export(@import("compiler_rt/floatsiXf.zig").__aeabi_i2d, .{ .name = "__aeabi_i2d", .linkage = linkage });187 @export(@import("compiler_rt/floatsiXf.zig").__aeabi_i2d, .{ .name = "__aeabi_i2d", .linkage = linkage });
lib/std/special/compiler_rt/clzsi2.zig created+118
...@@ -0,0 +1,118 @@
1// Ported from:
2//
3// https://github.com/llvm-mirror/compiler-rt/blob/f0745e8476f069296a7c71accedd061dce4cdf79/lib/builtins/clzsi2.c
4// https://github.com/llvm-mirror/compiler-rt/blob/f0745e8476f069296a7c71accedd061dce4cdf79/lib/builtins/arm/clzsi2.S
5const builtin = @import("builtin");
6
7// Precondition: a != 0
8fn __clzsi2_generic(a: i32) callconv(.C) i32 {
9 @setRuntimeSafety(builtin.is_test);
10
11 var x = @bitCast(u32, a);
12 var n: i32 = 32;
13
14 // Count first bit set using binary search, from Hacker's Delight
15 var y: u32 = 0;
16 inline for ([_]i32{ 16, 8, 4, 2, 1 }) |shift| {
17 y = x >> shift;
18 if (y != 0) {
19 n = n - shift;
20 x = y;
21 }
22 }
23
24 return n - @bitCast(i32, x);
25}
26
27fn __clzsi2_arm_clz(a: i32) callconv(.Naked) noreturn {
28 asm volatile (
29 \\ clz r0,r0
30 \\ bx lr
31 );
32 unreachable;
33}
34
35fn __clzsi2_arm32(a: i32) callconv(.Naked) noreturn {
36 asm volatile (
37 \\ // Assumption: n != 0
38 \\ // r0: n
39 \\ // r1: count of leading zeros in n + 1
40 \\ // r2: scratch register for shifted r0
41 \\ mov r1, #1
42 \\
43 \\ // Basic block:
44 \\ // if ((r0 >> SHIFT) == 0)
45 \\ // r1 += SHIFT;
46 \\ // else
47 \\ // r0 >>= SHIFT;
48 \\ // for descending powers of two as SHIFT.
49 \\ lsrs r2, r0, #16
50 \\ movne r0, r2
51 \\ addeq r1, #16
52 \\
53 \\ lsrs r2, r0, #8
54 \\ movne r0, r2
55 \\ addeq r1, #8
56 \\
57 \\ lsrs r2, r0, #4
58 \\ movne r0, r2
59 \\ addeq r1, #4
60 \\
61 \\ lsrs r2, r0, #2
62 \\ movne r0, r2
63 \\ addeq r1, #2
64 \\
65 \\ // The basic block invariants at this point are (r0 >> 2) == 0 and
66 \\ // r0 != 0. This means 1 <= r0 <= 3 and 0 <= (r0 >> 1) <= 1.
67 \\ //
68 \\ // r0 | (r0 >> 1) == 0 | (r0 >> 1) == 1 | -(r0 >> 1) | 1 - (r0 >> 1)f
69 \\ // ---+----------------+----------------+------------+--------------
70 \\ // 1 | 1 | 0 | 0 | 1
71 \\ // 2 | 0 | 1 | -1 | 0
72 \\ // 3 | 0 | 1 | -1 | 0
73 \\ //
74 \\ // The r1's initial value of 1 compensates for the 1 here.
75 \\ sub r0, r1, r0, lsr #1
76 \\ bx lr
77 );
78 unreachable;
79}
80
81const can_use_arm_clz = switch (builtin.arch) {
82 .arm, .armeb => |sub_arch| switch (sub_arch) {
83 .v4t => false,
84 .v6m => false,
85 else => true,
86 },
87 .thumb, .thumbeb => |sub_arch| switch (sub_arch) {
88 .v6,
89 .v6k,
90 .v5,
91 .v5te,
92 .v4t,
93 => false,
94 else => true,
95 },
96 else => false,
97};
98
99const is_arm32_no_thumb = switch (builtin.arch) {
100 builtin.Arch.arm,
101 builtin.Arch.armeb,
102 => true,
103 else => false,
104};
105
106pub const __clzsi2 = blk: {
107 if (comptime can_use_arm_clz) {
108 break :blk __clzsi2_arm_clz;
109 } else if (comptime is_arm32_no_thumb) {
110 break :blk __clzsi2_arm32;
111 } else {
112 break :blk __clzsi2_generic;
113 }
114};
115
116test "test clzsi2" {
117 _ = @import("clzsi2_test.zig");
118}
lib/std/special/compiler_rt/clzsi2_test.zig created+292
...@@ -0,0 +1,292 @@
1const clzsi2 = @import("clzsi2.zig");
2const testing = @import("std").testing;
3
4fn test__clzsi2(a: u32, expected: i32) void {
5 var nakedClzsi2 = clzsi2.__clzsi2;
6 var actualClzsi2 = @ptrCast(fn (a: i32) callconv(.C) i32, nakedClzsi2);
7 var x = @intCast(i32, a);
8 var result = actualClzsi2(x);
9 testing.expectEqual(expected, result);
10}
11
12test "clzsi2" {
13 test__clzsi2(0x00800000, 8);
14 test__clzsi2(0x01000000, 7);
15 test__clzsi2(0x02000000, 6);
16 test__clzsi2(0x03000000, 6);
17 test__clzsi2(0x04000000, 5);
18 test__clzsi2(0x05000000, 5);
19 test__clzsi2(0x06000000, 5);
20 test__clzsi2(0x07000000, 5);
21 test__clzsi2(0x08000000, 4);
22 test__clzsi2(0x09000000, 4);
23 test__clzsi2(0x0A000000, 4);
24 test__clzsi2(0x0B000000, 4);
25 test__clzsi2(0x0C000000, 4);
26 test__clzsi2(0x0D000000, 4);
27 test__clzsi2(0x0E000000, 4);
28 test__clzsi2(0x0F000000, 4);
29 test__clzsi2(0x10000000, 3);
30 test__clzsi2(0x11000000, 3);
31 test__clzsi2(0x12000000, 3);
32 test__clzsi2(0x13000000, 3);
33 test__clzsi2(0x14000000, 3);
34 test__clzsi2(0x15000000, 3);
35 test__clzsi2(0x16000000, 3);
36 test__clzsi2(0x17000000, 3);
37 test__clzsi2(0x18000000, 3);
38 test__clzsi2(0x19000000, 3);
39 test__clzsi2(0x1A000000, 3);
40 test__clzsi2(0x1B000000, 3);
41 test__clzsi2(0x1C000000, 3);
42 test__clzsi2(0x1D000000, 3);
43 test__clzsi2(0x1E000000, 3);
44 test__clzsi2(0x1F000000, 3);
45 test__clzsi2(0x20000000, 2);
46 test__clzsi2(0x21000000, 2);
47 test__clzsi2(0x22000000, 2);
48 test__clzsi2(0x23000000, 2);
49 test__clzsi2(0x24000000, 2);
50 test__clzsi2(0x25000000, 2);
51 test__clzsi2(0x26000000, 2);
52 test__clzsi2(0x27000000, 2);
53 test__clzsi2(0x28000000, 2);
54 test__clzsi2(0x29000000, 2);
55 test__clzsi2(0x2A000000, 2);
56 test__clzsi2(0x2B000000, 2);
57 test__clzsi2(0x2C000000, 2);
58 test__clzsi2(0x2D000000, 2);
59 test__clzsi2(0x2E000000, 2);
60 test__clzsi2(0x2F000000, 2);
61 test__clzsi2(0x30000000, 2);
62 test__clzsi2(0x31000000, 2);
63 test__clzsi2(0x32000000, 2);
64 test__clzsi2(0x33000000, 2);
65 test__clzsi2(0x34000000, 2);
66 test__clzsi2(0x35000000, 2);
67 test__clzsi2(0x36000000, 2);
68 test__clzsi2(0x37000000, 2);
69 test__clzsi2(0x38000000, 2);
70 test__clzsi2(0x39000000, 2);
71 test__clzsi2(0x3A000000, 2);
72 test__clzsi2(0x3B000000, 2);
73 test__clzsi2(0x3C000000, 2);
74 test__clzsi2(0x3D000000, 2);
75 test__clzsi2(0x3E000000, 2);
76 test__clzsi2(0x3F000000, 2);
77 test__clzsi2(0x40000000, 1);
78 test__clzsi2(0x41000000, 1);
79 test__clzsi2(0x42000000, 1);
80 test__clzsi2(0x43000000, 1);
81 test__clzsi2(0x44000000, 1);
82 test__clzsi2(0x45000000, 1);
83 test__clzsi2(0x46000000, 1);
84 test__clzsi2(0x47000000, 1);
85 test__clzsi2(0x48000000, 1);
86 test__clzsi2(0x49000000, 1);
87 test__clzsi2(0x4A000000, 1);
88 test__clzsi2(0x4B000000, 1);
89 test__clzsi2(0x4C000000, 1);
90 test__clzsi2(0x4D000000, 1);
91 test__clzsi2(0x4E000000, 1);
92 test__clzsi2(0x4F000000, 1);
93 test__clzsi2(0x50000000, 1);
94 test__clzsi2(0x51000000, 1);
95 test__clzsi2(0x52000000, 1);
96 test__clzsi2(0x53000000, 1);
97 test__clzsi2(0x54000000, 1);
98 test__clzsi2(0x55000000, 1);
99 test__clzsi2(0x56000000, 1);
100 test__clzsi2(0x57000000, 1);
101 test__clzsi2(0x58000000, 1);
102 test__clzsi2(0x59000000, 1);
103 test__clzsi2(0x5A000000, 1);
104 test__clzsi2(0x5B000000, 1);
105 test__clzsi2(0x5C000000, 1);
106 test__clzsi2(0x5D000000, 1);
107 test__clzsi2(0x5E000000, 1);
108 test__clzsi2(0x5F000000, 1);
109 test__clzsi2(0x60000000, 1);
110 test__clzsi2(0x61000000, 1);
111 test__clzsi2(0x62000000, 1);
112 test__clzsi2(0x63000000, 1);
113 test__clzsi2(0x64000000, 1);
114 test__clzsi2(0x65000000, 1);
115 test__clzsi2(0x66000000, 1);
116 test__clzsi2(0x67000000, 1);
117 test__clzsi2(0x68000000, 1);
118 test__clzsi2(0x69000000, 1);
119 test__clzsi2(0x6A000000, 1);
120 test__clzsi2(0x6B000000, 1);
121 test__clzsi2(0x6C000000, 1);
122 test__clzsi2(0x6D000000, 1);
123 test__clzsi2(0x6E000000, 1);
124 test__clzsi2(0x6F000000, 1);
125 test__clzsi2(0x70000000, 1);
126 test__clzsi2(0x71000000, 1);
127 test__clzsi2(0x72000000, 1);
128 test__clzsi2(0x73000000, 1);
129 test__clzsi2(0x74000000, 1);
130 test__clzsi2(0x75000000, 1);
131 test__clzsi2(0x76000000, 1);
132 test__clzsi2(0x77000000, 1);
133 test__clzsi2(0x78000000, 1);
134 test__clzsi2(0x79000000, 1);
135 test__clzsi2(0x7A000000, 1);
136 test__clzsi2(0x7B000000, 1);
137 test__clzsi2(0x7C000000, 1);
138 test__clzsi2(0x7D000000, 1);
139 test__clzsi2(0x7E000000, 1);
140 test__clzsi2(0x7F000000, 1);
141 test__clzsi2(0x80000000, 0);
142 test__clzsi2(0x81000000, 0);
143 test__clzsi2(0x82000000, 0);
144 test__clzsi2(0x83000000, 0);
145 test__clzsi2(0x84000000, 0);
146 test__clzsi2(0x85000000, 0);
147 test__clzsi2(0x86000000, 0);
148 test__clzsi2(0x87000000, 0);
149 test__clzsi2(0x88000000, 0);
150 test__clzsi2(0x89000000, 0);
151 test__clzsi2(0x8A000000, 0);
152 test__clzsi2(0x8B000000, 0);
153 test__clzsi2(0x8C000000, 0);
154 test__clzsi2(0x8D000000, 0);
155 test__clzsi2(0x8E000000, 0);
156 test__clzsi2(0x8F000000, 0);
157 test__clzsi2(0x90000000, 0);
158 test__clzsi2(0x91000000, 0);
159 test__clzsi2(0x92000000, 0);
160 test__clzsi2(0x93000000, 0);
161 test__clzsi2(0x94000000, 0);
162 test__clzsi2(0x95000000, 0);
163 test__clzsi2(0x96000000, 0);
164 test__clzsi2(0x97000000, 0);
165 test__clzsi2(0x98000000, 0);
166 test__clzsi2(0x99000000, 0);
167 test__clzsi2(0x9A000000, 0);
168 test__clzsi2(0x9B000000, 0);
169 test__clzsi2(0x9C000000, 0);
170 test__clzsi2(0x9D000000, 0);
171 test__clzsi2(0x9E000000, 0);
172 test__clzsi2(0x9F000000, 0);
173 test__clzsi2(0xA0000000, 0);
174 test__clzsi2(0xA1000000, 0);
175 test__clzsi2(0xA2000000, 0);
176 test__clzsi2(0xA3000000, 0);
177 test__clzsi2(0xA4000000, 0);
178 test__clzsi2(0xA5000000, 0);
179 test__clzsi2(0xA6000000, 0);
180 test__clzsi2(0xA7000000, 0);
181 test__clzsi2(0xA8000000, 0);
182 test__clzsi2(0xA9000000, 0);
183 test__clzsi2(0xAA000000, 0);
184 test__clzsi2(0xAB000000, 0);
185 test__clzsi2(0xAC000000, 0);
186 test__clzsi2(0xAD000000, 0);
187 test__clzsi2(0xAE000000, 0);
188 test__clzsi2(0xAF000000, 0);
189 test__clzsi2(0xB0000000, 0);
190 test__clzsi2(0xB1000000, 0);
191 test__clzsi2(0xB2000000, 0);
192 test__clzsi2(0xB3000000, 0);
193 test__clzsi2(0xB4000000, 0);
194 test__clzsi2(0xB5000000, 0);
195 test__clzsi2(0xB6000000, 0);
196 test__clzsi2(0xB7000000, 0);
197 test__clzsi2(0xB8000000, 0);
198 test__clzsi2(0xB9000000, 0);
199 test__clzsi2(0xBA000000, 0);
200 test__clzsi2(0xBB000000, 0);
201 test__clzsi2(0xBC000000, 0);
202 test__clzsi2(0xBD000000, 0);
203 test__clzsi2(0xBE000000, 0);
204 test__clzsi2(0xBF000000, 0);
205 test__clzsi2(0xC0000000, 0);
206 test__clzsi2(0xC1000000, 0);
207 test__clzsi2(0xC2000000, 0);
208 test__clzsi2(0xC3000000, 0);
209 test__clzsi2(0xC4000000, 0);
210 test__clzsi2(0xC5000000, 0);
211 test__clzsi2(0xC6000000, 0);
212 test__clzsi2(0xC7000000, 0);
213 test__clzsi2(0xC8000000, 0);
214 test__clzsi2(0xC9000000, 0);
215 test__clzsi2(0xCA000000, 0);
216 test__clzsi2(0xCB000000, 0);
217 test__clzsi2(0xCC000000, 0);
218 test__clzsi2(0xCD000000, 0);
219 test__clzsi2(0xCE000000, 0);
220 test__clzsi2(0xCF000000, 0);
221 test__clzsi2(0xD0000000, 0);
222 test__clzsi2(0xD1000000, 0);
223 test__clzsi2(0xD2000000, 0);
224 test__clzsi2(0xD3000000, 0);
225 test__clzsi2(0xD4000000, 0);
226 test__clzsi2(0xD5000000, 0);
227 test__clzsi2(0xD6000000, 0);
228 test__clzsi2(0xD7000000, 0);
229 test__clzsi2(0xD8000000, 0);
230 test__clzsi2(0xD9000000, 0);
231 test__clzsi2(0xDA000000, 0);
232 test__clzsi2(0xDB000000, 0);
233 test__clzsi2(0xDC000000, 0);
234 test__clzsi2(0xDD000000, 0);
235 test__clzsi2(0xDE000000, 0);
236 test__clzsi2(0xDF000000, 0);
237 test__clzsi2(0xE0000000, 0);
238 test__clzsi2(0xE1000000, 0);
239 test__clzsi2(0xE2000000, 0);
240 test__clzsi2(0xE3000000, 0);
241 test__clzsi2(0xE4000000, 0);
242 test__clzsi2(0xE5000000, 0);
243 test__clzsi2(0xE6000000, 0);
244 test__clzsi2(0xE7000000, 0);
245 test__clzsi2(0xE8000000, 0);
246 test__clzsi2(0xE9000000, 0);
247 test__clzsi2(0xEA000000, 0);
248 test__clzsi2(0xEB000000, 0);
249 test__clzsi2(0xEC000000, 0);
250 test__clzsi2(0xED000000, 0);
251 test__clzsi2(0xEE000000, 0);
252 test__clzsi2(0xEF000000, 0);
253 test__clzsi2(0xF0000000, 0);
254 test__clzsi2(0xF1000000, 0);
255 test__clzsi2(0xF2000000, 0);
256 test__clzsi2(0xF3000000, 0);
257 test__clzsi2(0xF4000000, 0);
258 test__clzsi2(0xF5000000, 0);
259 test__clzsi2(0xF6000000, 0);
260 test__clzsi2(0xF7000000, 0);
261 test__clzsi2(0xF8000000, 0);
262 test__clzsi2(0xF9000000, 0);
263 test__clzsi2(0xFA000000, 0);
264 test__clzsi2(0xFB000000, 0);
265 test__clzsi2(0xFC000000, 0);
266 test__clzsi2(0xFD000000, 0);
267 test__clzsi2(0xFE000000, 0);
268 test__clzsi2(0xFF000000, 0);
269 test__clzsi2(0x00000001, 31);
270 test__clzsi2(0x00000002, 30);
271 test__clzsi2(0x00000004, 29);
272 test__clzsi2(0x00000008, 28);
273 test__clzsi2(0x00000010, 27);
274 test__clzsi2(0x00000020, 26);
275 test__clzsi2(0x00000040, 25);
276 test__clzsi2(0x00000080, 24);
277 test__clzsi2(0x00000100, 23);
278 test__clzsi2(0x00000200, 22);
279 test__clzsi2(0x00000400, 21);
280 test__clzsi2(0x00000800, 20);
281 test__clzsi2(0x00001000, 19);
282 test__clzsi2(0x00002000, 18);
283 test__clzsi2(0x00004000, 17);
284 test__clzsi2(0x00008000, 16);
285 test__clzsi2(0x00010000, 15);
286 test__clzsi2(0x00020000, 14);
287 test__clzsi2(0x00040000, 13);
288 test__clzsi2(0x00080000, 12);
289 test__clzsi2(0x00100000, 11);
290 test__clzsi2(0x00200000, 10);
291 test__clzsi2(0x00400000, 9);
292}