authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-08-23 02:04:59+02:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2024-09-19 18:20:21-07:00
logda8b7fb0c01f3b71af99eee6fcff6b1a9d216f13
tree2e0c314c3f636e279b19455de39d5fd59db8f17a
parent662683cafd552404fb704e9d0a8caf1eaaf35af8

std.Target: Update CPU models/features for LLVM 19.

11 files changed, 2156 insertions(+), 584 deletions(-)

lib/std/Target/aarch64.zig+701-379
......@@ -5,15 +5,7 @@ const CpuFeature = std.Target.Cpu.Feature;
55const CpuModel = std.Target.Cpu.Model;
66
77pub const Feature = enum {
8 a510,
9 a520,
10 a65,
11 a710,
12 a720,
13 a76,
14 a78,
15 a78c,
16 addr_lsl_fast,
8 addr_lsl_slow_14,
179 aes,
1810 aggressive_fma,
1911 alternate_sextload_cvt_f32_pattern,
......@@ -46,7 +38,6 @@ pub const Feature = enum {
4638 cmp_bcc_fusion,
4739 complxnum,
4840 contextidr_el2,
49 cortex_r82,
5041 cpa,
5142 crc,
5243 crypto,
......@@ -77,7 +68,7 @@ pub const Feature = enum {
7768 fp8dot4,
7869 fp8fma,
7970 fp_armv8,
80 fpmr,
71 fpac,
8172 fptoint,
8273 fullfp16,
8374 fuse_address,
......@@ -131,6 +122,7 @@ pub const Feature = enum {
131122 rcpc3,
132123 rcpc_immo,
133124 rdm,
125 reserve_lr_for_ra,
134126 reserve_x1,
135127 reserve_x10,
136128 reserve_x11,
......@@ -150,7 +142,6 @@ pub const Feature = enum {
150142 reserve_x27,
151143 reserve_x28,
152144 reserve_x3,
153 reserve_x30,
154145 reserve_x4,
155146 reserve_x5,
156147 reserve_x6,
......@@ -168,6 +159,7 @@ pub const Feature = enum {
168159 sme,
169160 sme2,
170161 sme2p1,
162 sme_b16b16,
171163 sme_f16f16,
172164 sme_f64f64,
173165 sme_f8f16,
......@@ -193,6 +185,7 @@ pub const Feature = enum {
193185 sve2_sha3,
194186 sve2_sm4,
195187 sve2p1,
188 sve_b16b16,
196189 tagged_globals,
197190 the,
198191 tlb_rmi,
......@@ -206,6 +199,7 @@ pub const Feature = enum {
206199 trbe,
207200 uaops,
208201 use_experimental_zeroing_pseudos,
202 use_fixed_over_scalable_if_equal_cost,
209203 use_postra_scheduler,
210204 use_reciprocal_square_root,
211205 use_scalar_inc_vl,
......@@ -245,112 +239,14 @@ pub const all_features = blk: {
245239 const len = @typeInfo(Feature).@"enum".fields.len;
246240 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
247241 var result: [len]CpuFeature = undefined;
248 result[@intFromEnum(Feature.a510)] = .{
249 .llvm_name = "a510",
250 .description = "Cortex-A510 ARM processors",
251 .dependencies = featureSet(&[_]Feature{
252 .fuse_adrp_add,
253 .fuse_aes,
254 .use_postra_scheduler,
255 }),
256 };
257 result[@intFromEnum(Feature.a520)] = .{
258 .llvm_name = "a520",
259 .description = "Cortex-A520 ARM processors",
260 .dependencies = featureSet(&[_]Feature{
261 .fuse_adrp_add,
262 .fuse_aes,
263 .use_postra_scheduler,
264 }),
265 };
266 result[@intFromEnum(Feature.a65)] = .{
267 .llvm_name = "a65",
268 .description = "Cortex-A65 ARM processors",
269 .dependencies = featureSet(&[_]Feature{
270 .enable_select_opt,
271 .fuse_address,
272 .fuse_adrp_add,
273 .fuse_aes,
274 .fuse_literals,
275 .predictable_select_expensive,
276 }),
277 };
278 result[@intFromEnum(Feature.a710)] = .{
279 .llvm_name = "a710",
280 .description = "Cortex-A710 ARM processors",
281 .dependencies = featureSet(&[_]Feature{
282 .addr_lsl_fast,
283 .alu_lsl_fast,
284 .cmp_bcc_fusion,
285 .enable_select_opt,
286 .fuse_adrp_add,
287 .fuse_aes,
288 .predictable_select_expensive,
289 .use_postra_scheduler,
290 }),
291 };
292 result[@intFromEnum(Feature.a720)] = .{
293 .llvm_name = "a720",
294 .description = "Cortex-A720 ARM processors",
295 .dependencies = featureSet(&[_]Feature{
296 .addr_lsl_fast,
297 .alu_lsl_fast,
298 .cmp_bcc_fusion,
299 .enable_select_opt,
300 .fuse_adrp_add,
301 .fuse_aes,
302 .predictable_select_expensive,
303 .use_postra_scheduler,
304 }),
305 };
306 result[@intFromEnum(Feature.a76)] = .{
307 .llvm_name = "a76",
308 .description = "Cortex-A76 ARM processors",
309 .dependencies = featureSet(&[_]Feature{
310 .addr_lsl_fast,
311 .alu_lsl_fast,
312 .enable_select_opt,
313 .fuse_adrp_add,
314 .fuse_aes,
315 .predictable_select_expensive,
316 }),
317 };
318 result[@intFromEnum(Feature.a78)] = .{
319 .llvm_name = "a78",
320 .description = "Cortex-A78 ARM processors",
321 .dependencies = featureSet(&[_]Feature{
322 .addr_lsl_fast,
323 .alu_lsl_fast,
324 .cmp_bcc_fusion,
325 .enable_select_opt,
326 .fuse_adrp_add,
327 .fuse_aes,
328 .predictable_select_expensive,
329 .use_postra_scheduler,
330 }),
331 };
332 result[@intFromEnum(Feature.a78c)] = .{
333 .llvm_name = "a78c",
334 .description = "Cortex-A78C ARM processors",
335 .dependencies = featureSet(&[_]Feature{
336 .addr_lsl_fast,
337 .alu_lsl_fast,
338 .cmp_bcc_fusion,
339 .enable_select_opt,
340 .fuse_adrp_add,
341 .fuse_aes,
342 .predictable_select_expensive,
343 .use_postra_scheduler,
344 }),
345 };
346 result[@intFromEnum(Feature.addr_lsl_fast)] = .{
347 .llvm_name = "addr-lsl-fast",
348 .description = "Address operands with logical shift of up to 3 places are cheap",
242 result[@intFromEnum(Feature.addr_lsl_slow_14)] = .{
243 .llvm_name = "addr-lsl-slow-14",
244 .description = "Address operands with shift amount of 1 or 4 are slow",
349245 .dependencies = featureSet(&[_]Feature{}),
350246 };
351247 result[@intFromEnum(Feature.aes)] = .{
352248 .llvm_name = "aes",
353 .description = "Enable AES support (FEAT_AES, FEAT_PMULL)",
249 .description = "Enable AES support",
354250 .dependencies = featureSet(&[_]Feature{
355251 .neon,
356252 }),
......@@ -367,7 +263,7 @@ pub const all_features = blk: {
367263 };
368264 result[@intFromEnum(Feature.altnzcv)] = .{
369265 .llvm_name = "altnzcv",
370 .description = "Enable alternative NZCV format for floating point comparisons (FEAT_FlagM2)",
266 .description = "Enable alternative NZCV format for floating point comparisons",
371267 .dependencies = featureSet(&[_]Feature{}),
372268 };
373269 result[@intFromEnum(Feature.alu_lsl_fast)] = .{
......@@ -377,12 +273,12 @@ pub const all_features = blk: {
377273 };
378274 result[@intFromEnum(Feature.am)] = .{
379275 .llvm_name = "am",
380 .description = "Enable v8.4-A Activity Monitors extension (FEAT_AMUv1)",
276 .description = "Enable Armv8.4-A Activity Monitors extension",
381277 .dependencies = featureSet(&[_]Feature{}),
382278 };
383279 result[@intFromEnum(Feature.amvs)] = .{
384280 .llvm_name = "amvs",
385 .description = "Enable v8.6-A Activity Monitors Virtualization support (FEAT_AMUv1p1)",
281 .description = "Enable Armv8.6-A Activity Monitors Virtualization support",
386282 .dependencies = featureSet(&[_]Feature{
387283 .am,
388284 }),
......@@ -404,7 +300,7 @@ pub const all_features = blk: {
404300 };
405301 result[@intFromEnum(Feature.b16b16)] = .{
406302 .llvm_name = "b16b16",
407 .description = "Enable SVE2.1 or SME2.1 non-widening BFloat16 to BFloat16 instructions (FEAT_B16B16)",
303 .description = "Enable SVE2.1 or SME2.1 non-widening BFloat16 to BFloat16 instructions",
408304 .dependencies = featureSet(&[_]Feature{
409305 .bf16,
410306 }),
......@@ -416,17 +312,17 @@ pub const all_features = blk: {
416312 };
417313 result[@intFromEnum(Feature.bf16)] = .{
418314 .llvm_name = "bf16",
419 .description = "Enable BFloat16 Extension (FEAT_BF16)",
315 .description = "Enable BFloat16 Extension",
420316 .dependencies = featureSet(&[_]Feature{}),
421317 };
422318 result[@intFromEnum(Feature.brbe)] = .{
423319 .llvm_name = "brbe",
424 .description = "Enable Branch Record Buffer Extension (FEAT_BRBE)",
320 .description = "Enable Branch Record Buffer Extension",
425321 .dependencies = featureSet(&[_]Feature{}),
426322 };
427323 result[@intFromEnum(Feature.bti)] = .{
428324 .llvm_name = "bti",
429 .description = "Enable Branch Target Identification (FEAT_BTI)",
325 .description = "Enable Branch Target Identification",
430326 .dependencies = featureSet(&[_]Feature{}),
431327 };
432328 result[@intFromEnum(Feature.call_saved_x10)] = .{
......@@ -476,27 +372,27 @@ pub const all_features = blk: {
476372 };
477373 result[@intFromEnum(Feature.ccdp)] = .{
478374 .llvm_name = "ccdp",
479 .description = "Enable v8.5 Cache Clean to Point of Deep Persistence (FEAT_DPB2)",
375 .description = "Enable Armv8.5-A Cache Clean to Point of Deep Persistence",
480376 .dependencies = featureSet(&[_]Feature{}),
481377 };
482378 result[@intFromEnum(Feature.ccidx)] = .{
483379 .llvm_name = "ccidx",
484 .description = "Enable v8.3-A Extend of the CCSIDR number of sets (FEAT_CCIDX)",
380 .description = "Enable Armv8.3-A Extend of the CCSIDR number of sets",
485381 .dependencies = featureSet(&[_]Feature{}),
486382 };
487383 result[@intFromEnum(Feature.ccpp)] = .{
488384 .llvm_name = "ccpp",
489 .description = "Enable v8.2 data Cache Clean to Point of Persistence (FEAT_DPB)",
385 .description = "Enable Armv8.2-A data Cache Clean to Point of Persistence",
490386 .dependencies = featureSet(&[_]Feature{}),
491387 };
492388 result[@intFromEnum(Feature.chk)] = .{
493389 .llvm_name = "chk",
494 .description = "Enable Armv8.0-A Check Feature Status Extension (FEAT_CHK)",
390 .description = "Enable Armv8.0-A Check Feature Status Extension",
495391 .dependencies = featureSet(&[_]Feature{}),
496392 };
497393 result[@intFromEnum(Feature.clrbhb)] = .{
498394 .llvm_name = "clrbhb",
499 .description = "Enable Clear BHB instruction (FEAT_CLRBHB)",
395 .description = "Enable Clear BHB instruction",
500396 .dependencies = featureSet(&[_]Feature{}),
501397 };
502398 result[@intFromEnum(Feature.cmp_bcc_fusion)] = .{
......@@ -506,7 +402,7 @@ pub const all_features = blk: {
506402 };
507403 result[@intFromEnum(Feature.complxnum)] = .{
508404 .llvm_name = "complxnum",
509 .description = "Enable v8.3-A Floating-point complex number support (FEAT_FCMA)",
405 .description = "Enable Armv8.3-A Floating-point complex number support",
510406 .dependencies = featureSet(&[_]Feature{
511407 .neon,
512408 }),
......@@ -516,21 +412,14 @@ pub const all_features = blk: {
516412 .description = "Enable RW operand Context ID Register (EL2)",
517413 .dependencies = featureSet(&[_]Feature{}),
518414 };
519 result[@intFromEnum(Feature.cortex_r82)] = .{
520 .llvm_name = "cortex-r82",
521 .description = "Cortex-R82 ARM processors",
522 .dependencies = featureSet(&[_]Feature{
523 .use_postra_scheduler,
524 }),
525 };
526415 result[@intFromEnum(Feature.cpa)] = .{
527416 .llvm_name = "cpa",
528 .description = "Enable Armv9.5-A Checked Pointer Arithmetic (FEAT_CPA)",
417 .description = "Enable Armv9.5-A Checked Pointer Arithmetic",
529418 .dependencies = featureSet(&[_]Feature{}),
530419 };
531420 result[@intFromEnum(Feature.crc)] = .{
532421 .llvm_name = "crc",
533 .description = "Enable ARMv8 CRC-32 checksum instructions (FEAT_CRC32)",
422 .description = "Enable Armv8.0-A CRC-32 checksum instructions",
534423 .dependencies = featureSet(&[_]Feature{}),
535424 };
536425 result[@intFromEnum(Feature.crypto)] = .{
......@@ -543,12 +432,12 @@ pub const all_features = blk: {
543432 };
544433 result[@intFromEnum(Feature.cssc)] = .{
545434 .llvm_name = "cssc",
546 .description = "Enable Common Short Sequence Compression (CSSC) instructions (FEAT_CSSC)",
435 .description = "Enable Common Short Sequence Compression (CSSC) instructions",
547436 .dependencies = featureSet(&[_]Feature{}),
548437 };
549438 result[@intFromEnum(Feature.d128)] = .{
550439 .llvm_name = "d128",
551 .description = "Enable Armv9.4-A 128-bit Page Table Descriptors, System Registers and Instructions (FEAT_D128, FEAT_LVA3, FEAT_SYSREG128, FEAT_SYSINSTR128)",
440 .description = "Enable Armv9.4-A 128-bit Page Table Descriptors, System Registers and instructions",
552441 .dependencies = featureSet(&[_]Feature{
553442 .lse128,
554443 }),
......@@ -570,17 +459,19 @@ pub const all_features = blk: {
570459 };
571460 result[@intFromEnum(Feature.dit)] = .{
572461 .llvm_name = "dit",
573 .description = "Enable v8.4-A Data Independent Timing instructions (FEAT_DIT)",
462 .description = "Enable Armv8.4-A Data Independent Timing instructions",
574463 .dependencies = featureSet(&[_]Feature{}),
575464 };
576465 result[@intFromEnum(Feature.dotprod)] = .{
577466 .llvm_name = "dotprod",
578 .description = "Enable dot product support (FEAT_DotProd)",
579 .dependencies = featureSet(&[_]Feature{}),
467 .description = "Enable dot product support",
468 .dependencies = featureSet(&[_]Feature{
469 .neon,
470 }),
580471 };
581472 result[@intFromEnum(Feature.ecv)] = .{
582473 .llvm_name = "ecv",
583 .description = "Enable enhanced counter virtualization extension (FEAT_ECV)",
474 .description = "Enable enhanced counter virtualization extension",
584475 .dependencies = featureSet(&[_]Feature{}),
585476 };
586477 result[@intFromEnum(Feature.el2vmsa)] = .{
......@@ -600,7 +491,7 @@ pub const all_features = blk: {
600491 };
601492 result[@intFromEnum(Feature.ete)] = .{
602493 .llvm_name = "ete",
603 .description = "Enable Embedded Trace Extension (FEAT_ETE)",
494 .description = "Enable Embedded Trace Extension",
604495 .dependencies = featureSet(&[_]Feature{
605496 .trbe,
606497 }),
......@@ -612,26 +503,26 @@ pub const all_features = blk: {
612503 };
613504 result[@intFromEnum(Feature.f32mm)] = .{
614505 .llvm_name = "f32mm",
615 .description = "Enable Matrix Multiply FP32 Extension (FEAT_F32MM)",
506 .description = "Enable Matrix Multiply FP32 Extension",
616507 .dependencies = featureSet(&[_]Feature{
617508 .sve,
618509 }),
619510 };
620511 result[@intFromEnum(Feature.f64mm)] = .{
621512 .llvm_name = "f64mm",
622 .description = "Enable Matrix Multiply FP64 Extension (FEAT_F64MM)",
513 .description = "Enable Matrix Multiply FP64 Extension",
623514 .dependencies = featureSet(&[_]Feature{
624515 .sve,
625516 }),
626517 };
627518 result[@intFromEnum(Feature.faminmax)] = .{
628519 .llvm_name = "faminmax",
629 .description = "Enable FAMIN and FAMAX instructions (FEAT_FAMINMAX)",
520 .description = "Enable FAMIN and FAMAX instructions",
630521 .dependencies = featureSet(&[_]Feature{}),
631522 };
632523 result[@intFromEnum(Feature.fgt)] = .{
633524 .llvm_name = "fgt",
634 .description = "Enable fine grained virtualization traps extension (FEAT_FGT)",
525 .description = "Enable fine grained virtualization traps extension",
635526 .dependencies = featureSet(&[_]Feature{}),
636527 };
637528 result[@intFromEnum(Feature.fix_cortex_a53_835769)] = .{
......@@ -641,7 +532,7 @@ pub const all_features = blk: {
641532 };
642533 result[@intFromEnum(Feature.flagm)] = .{
643534 .llvm_name = "flagm",
644 .description = "Enable v8.4-A Flag Manipulation Instructions (FEAT_FlagM)",
535 .description = "Enable Armv8.4-A Flag Manipulation instructions",
645536 .dependencies = featureSet(&[_]Feature{}),
646537 };
647538 result[@intFromEnum(Feature.fmv)] = .{
......@@ -656,49 +547,59 @@ pub const all_features = blk: {
656547 };
657548 result[@intFromEnum(Feature.fp16fml)] = .{
658549 .llvm_name = "fp16fml",
659 .description = "Enable FP16 FML instructions (FEAT_FHM)",
550 .description = "Enable FP16 FML instructions",
660551 .dependencies = featureSet(&[_]Feature{
661552 .fullfp16,
662553 }),
663554 };
664555 result[@intFromEnum(Feature.fp8)] = .{
665556 .llvm_name = "fp8",
666 .description = "Enable FP8 instructions (FEAT_FP8)",
667 .dependencies = featureSet(&[_]Feature{}),
557 .description = "Enable FP8 instructions",
558 .dependencies = featureSet(&[_]Feature{
559 .bf16,
560 .faminmax,
561 .lut,
562 }),
668563 };
669564 result[@intFromEnum(Feature.fp8dot2)] = .{
670565 .llvm_name = "fp8dot2",
671 .description = "Enable fp8 2-way dot instructions (FEAT_FP8DOT2)",
672 .dependencies = featureSet(&[_]Feature{}),
566 .description = "Enable FP8 2-way dot instructions",
567 .dependencies = featureSet(&[_]Feature{
568 .fp8dot4,
569 }),
673570 };
674571 result[@intFromEnum(Feature.fp8dot4)] = .{
675572 .llvm_name = "fp8dot4",
676 .description = "Enable fp8 4-way dot instructions (FEAT_FP8DOT4)",
677 .dependencies = featureSet(&[_]Feature{}),
573 .description = "Enable FP8 4-way dot instructions",
574 .dependencies = featureSet(&[_]Feature{
575 .fp8fma,
576 }),
678577 };
679578 result[@intFromEnum(Feature.fp8fma)] = .{
680579 .llvm_name = "fp8fma",
681 .description = "Enable fp8 multiply-add instructions (FEAT_FP8FMA)",
682 .dependencies = featureSet(&[_]Feature{}),
580 .description = "Enable Armv9.5-A FP8 multiply-add instructions",
581 .dependencies = featureSet(&[_]Feature{
582 .fp8,
583 }),
683584 };
684585 result[@intFromEnum(Feature.fp_armv8)] = .{
685586 .llvm_name = "fp-armv8",
686 .description = "Enable ARMv8 FP (FEAT_FP)",
587 .description = "Enable Armv8.0-A Floating Point Extensions",
687588 .dependencies = featureSet(&[_]Feature{}),
688589 };
689 result[@intFromEnum(Feature.fpmr)] = .{
690 .llvm_name = "fpmr",
691 .description = "Enable FPMR Register (FEAT_FPMR)",
590 result[@intFromEnum(Feature.fpac)] = .{
591 .llvm_name = "fpac",
592 .description = "Enable v8.3-A Pointer Authentication Faulting enhancement",
692593 .dependencies = featureSet(&[_]Feature{}),
693594 };
694595 result[@intFromEnum(Feature.fptoint)] = .{
695596 .llvm_name = "fptoint",
696 .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int (FEAT_FRINTTS)",
597 .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
697598 .dependencies = featureSet(&[_]Feature{}),
698599 };
699600 result[@intFromEnum(Feature.fullfp16)] = .{
700601 .llvm_name = "fullfp16",
701 .description = "Full FP16 (FEAT_FP16)",
602 .description = "Enable half-precision floating-point data processing",
702603 .dependencies = featureSet(&[_]Feature{
703604 .fp_armv8,
704605 }),
......@@ -767,29 +668,29 @@ pub const all_features = blk: {
767668 };
768669 result[@intFromEnum(Feature.hbc)] = .{
769670 .llvm_name = "hbc",
770 .description = "Enable Armv8.8-A Hinted Conditional Branches Extension (FEAT_HBC)",
671 .description = "Enable Armv8.8-A Hinted Conditional Branches Extension",
771672 .dependencies = featureSet(&[_]Feature{}),
772673 };
773674 result[@intFromEnum(Feature.hcx)] = .{
774675 .llvm_name = "hcx",
775 .description = "Enable Armv8.7-A HCRX_EL2 system register (FEAT_HCX)",
676 .description = "Enable Armv8.7-A HCRX_EL2 system register",
776677 .dependencies = featureSet(&[_]Feature{}),
777678 };
778679 result[@intFromEnum(Feature.i8mm)] = .{
779680 .llvm_name = "i8mm",
780 .description = "Enable Matrix Multiply Int8 Extension (FEAT_I8MM)",
681 .description = "Enable Matrix Multiply Int8 Extension",
781682 .dependencies = featureSet(&[_]Feature{}),
782683 };
783684 result[@intFromEnum(Feature.ite)] = .{
784685 .llvm_name = "ite",
785 .description = "Enable Armv9.4-A Instrumentation Extension FEAT_ITE",
686 .description = "Enable Armv9.4-A Instrumentation Extension",
786687 .dependencies = featureSet(&[_]Feature{
787688 .ete,
788689 }),
789690 };
790691 result[@intFromEnum(Feature.jsconv)] = .{
791692 .llvm_name = "jsconv",
792 .description = "Enable v8.3-A JavaScript FP conversion instructions (FEAT_JSCVT)",
693 .description = "Enable Armv8.3-A JavaScript FP conversion instructions",
793694 .dependencies = featureSet(&[_]Feature{
794695 .fp_armv8,
795696 }),
......@@ -801,34 +702,34 @@ pub const all_features = blk: {
801702 };
802703 result[@intFromEnum(Feature.lor)] = .{
803704 .llvm_name = "lor",
804 .description = "Enables ARM v8.1 Limited Ordering Regions extension (FEAT_LOR)",
705 .description = "Enable Armv8.1-A Limited Ordering Regions extension",
805706 .dependencies = featureSet(&[_]Feature{}),
806707 };
807708 result[@intFromEnum(Feature.ls64)] = .{
808709 .llvm_name = "ls64",
809 .description = "Enable Armv8.7-A LD64B/ST64B Accelerator Extension (FEAT_LS64, FEAT_LS64_V, FEAT_LS64_ACCDATA)",
710 .description = "Enable Armv8.7-A LD64B/ST64B Accelerator Extension",
810711 .dependencies = featureSet(&[_]Feature{}),
811712 };
812713 result[@intFromEnum(Feature.lse)] = .{
813714 .llvm_name = "lse",
814 .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions (FEAT_LSE)",
715 .description = "Enable Armv8.1-A Large System Extension (LSE) atomic instructions",
815716 .dependencies = featureSet(&[_]Feature{}),
816717 };
817718 result[@intFromEnum(Feature.lse128)] = .{
818719 .llvm_name = "lse128",
819 .description = "Enable Armv9.4-A 128-bit Atomic Instructions (FEAT_LSE128)",
720 .description = "Enable Armv9.4-A 128-bit Atomic instructions",
820721 .dependencies = featureSet(&[_]Feature{
821722 .lse,
822723 }),
823724 };
824725 result[@intFromEnum(Feature.lse2)] = .{
825726 .llvm_name = "lse2",
826 .description = "Enable ARMv8.4 Large System Extension 2 (LSE2) atomicity rules (FEAT_LSE2)",
727 .description = "Enable Armv8.4-A Large System Extension 2 (LSE2) atomicity rules",
827728 .dependencies = featureSet(&[_]Feature{}),
828729 };
829730 result[@intFromEnum(Feature.lut)] = .{
830731 .llvm_name = "lut",
831 .description = "Enable Lookup Table instructions (FEAT_LUT)",
732 .description = "Enable Lookup Table instructions",
832733 .dependencies = featureSet(&[_]Feature{}),
833734 };
834735 result[@intFromEnum(Feature.mec)] = .{
......@@ -840,29 +741,29 @@ pub const all_features = blk: {
840741 };
841742 result[@intFromEnum(Feature.mops)] = .{
842743 .llvm_name = "mops",
843 .description = "Enable Armv8.8-A memcpy and memset acceleration instructions (FEAT_MOPS)",
744 .description = "Enable Armv8.8-A memcpy and memset acceleration instructions",
844745 .dependencies = featureSet(&[_]Feature{}),
845746 };
846747 result[@intFromEnum(Feature.mpam)] = .{
847748 .llvm_name = "mpam",
848 .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension (FEAT_MPAM)",
749 .description = "Enable Armv8.4-A Memory system Partitioning and Monitoring extension",
849750 .dependencies = featureSet(&[_]Feature{}),
850751 };
851752 result[@intFromEnum(Feature.mte)] = .{
852753 .llvm_name = "mte",
853 .description = "Enable Memory Tagging Extension (FEAT_MTE, FEAT_MTE2)",
754 .description = "Enable Memory Tagging Extension",
854755 .dependencies = featureSet(&[_]Feature{}),
855756 };
856757 result[@intFromEnum(Feature.neon)] = .{
857758 .llvm_name = "neon",
858 .description = "Enable Advanced SIMD instructions (FEAT_AdvSIMD)",
759 .description = "Enable Advanced SIMD instructions",
859760 .dependencies = featureSet(&[_]Feature{
860761 .fp_armv8,
861762 }),
862763 };
863764 result[@intFromEnum(Feature.nmi)] = .{
864765 .llvm_name = "nmi",
865 .description = "Enable Armv8.8-A Non-maskable Interrupts (FEAT_NMI, FEAT_GICv3_NMI)",
766 .description = "Enable Armv8.8-A Non-maskable Interrupts",
866767 .dependencies = featureSet(&[_]Feature{}),
867768 };
868769 result[@intFromEnum(Feature.no_bti_at_return_twice)] = .{
......@@ -887,7 +788,7 @@ pub const all_features = blk: {
887788 };
888789 result[@intFromEnum(Feature.nv)] = .{
889790 .llvm_name = "nv",
890 .description = "Enable v8.4-A Nested Virtualization Enhancement (FEAT_NV, FEAT_NV2)",
791 .description = "Enable Armv8.4-A Nested Virtualization Enchancement",
891792 .dependencies = featureSet(&[_]Feature{}),
892793 };
893794 result[@intFromEnum(Feature.outline_atomics)] = .{
......@@ -897,29 +798,29 @@ pub const all_features = blk: {
897798 };
898799 result[@intFromEnum(Feature.pan)] = .{
899800 .llvm_name = "pan",
900 .description = "Enables ARM v8.1 Privileged Access-Never extension (FEAT_PAN)",
801 .description = "Enable Armv8.1-A Privileged Access-Never extension",
901802 .dependencies = featureSet(&[_]Feature{}),
902803 };
903804 result[@intFromEnum(Feature.pan_rwv)] = .{
904805 .llvm_name = "pan-rwv",
905 .description = "Enable v8.2 PAN s1e1R and s1e1W Variants (FEAT_PAN2)",
806 .description = "Enable Armv8.2-A PAN s1e1R and s1e1W Variants",
906807 .dependencies = featureSet(&[_]Feature{
907808 .pan,
908809 }),
909810 };
910811 result[@intFromEnum(Feature.pauth)] = .{
911812 .llvm_name = "pauth",
912 .description = "Enable v8.3-A Pointer Authentication extension (FEAT_PAuth)",
813 .description = "Enable Armv8.3-A Pointer Authentication extension",
913814 .dependencies = featureSet(&[_]Feature{}),
914815 };
915816 result[@intFromEnum(Feature.pauth_lr)] = .{
916817 .llvm_name = "pauth-lr",
917 .description = "Enable Armv9.5-A PAC enhancements (FEAT_PAuth_LR)",
818 .description = "Enable Armv9.5-A PAC enhancements",
918819 .dependencies = featureSet(&[_]Feature{}),
919820 };
920821 result[@intFromEnum(Feature.perfmon)] = .{
921822 .llvm_name = "perfmon",
922 .description = "Enable Code Generation for ARMv8 PMUv3 Performance Monitors extension (FEAT_PMUv3)",
823 .description = "Enable Armv8.0-A PMUv3 Performance Monitors extension",
923824 .dependencies = featureSet(&[_]Feature{}),
924825 };
925826 result[@intFromEnum(Feature.predictable_select_expensive)] = .{
......@@ -929,7 +830,7 @@ pub const all_features = blk: {
929830 };
930831 result[@intFromEnum(Feature.predres)] = .{
931832 .llvm_name = "predres",
932 .description = "Enable v8.5a execution and data prediction invalidation instructions (FEAT_SPECRES)",
833 .description = "Enable Armv8.5-A execution and data prediction invalidation instructions",
933834 .dependencies = featureSet(&[_]Feature{}),
934835 };
935836 result[@intFromEnum(Feature.prfm_slc_target)] = .{
......@@ -939,43 +840,50 @@ pub const all_features = blk: {
939840 };
940841 result[@intFromEnum(Feature.rand)] = .{
941842 .llvm_name = "rand",
942 .description = "Enable Random Number generation instructions (FEAT_RNG)",
843 .description = "Enable Random Number generation instructions",
943844 .dependencies = featureSet(&[_]Feature{}),
944845 };
945846 result[@intFromEnum(Feature.ras)] = .{
946847 .llvm_name = "ras",
947 .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions (FEAT_RAS, FEAT_RASv1p1)",
848 .description = "Enable Armv8.0-A Reliability, Availability and Serviceability Extensions",
948849 .dependencies = featureSet(&[_]Feature{}),
949850 };
950851 result[@intFromEnum(Feature.rasv2)] = .{
951852 .llvm_name = "rasv2",
952 .description = "Enable ARMv8.9-A Reliability, Availability and Serviceability Extensions (FEAT_RASv2)",
853 .description = "Enable Armv8.9-A Reliability, Availability and Serviceability Extensions",
953854 .dependencies = featureSet(&[_]Feature{
954855 .ras,
955856 }),
956857 };
957858 result[@intFromEnum(Feature.rcpc)] = .{
958859 .llvm_name = "rcpc",
959 .description = "Enable support for RCPC extension (FEAT_LRCPC)",
860 .description = "Enable support for RCPC extension",
960861 .dependencies = featureSet(&[_]Feature{}),
961862 };
962863 result[@intFromEnum(Feature.rcpc3)] = .{
963864 .llvm_name = "rcpc3",
964 .description = "Enable Armv8.9-A RCPC instructions for A64 and Advanced SIMD and floating-point instruction set (FEAT_LRCPC3)",
865 .description = "Enable Armv8.9-A RCPC instructions for A64 and Advanced SIMD and floating-point instruction set",
965866 .dependencies = featureSet(&[_]Feature{
966867 .rcpc_immo,
967868 }),
968869 };
969870 result[@intFromEnum(Feature.rcpc_immo)] = .{
970871 .llvm_name = "rcpc-immo",
971 .description = "Enable v8.4-A RCPC instructions with Immediate Offsets (FEAT_LRCPC2)",
872 .description = "Enable Armv8.4-A RCPC instructions with Immediate Offsets",
972873 .dependencies = featureSet(&[_]Feature{
973874 .rcpc,
974875 }),
975876 };
976877 result[@intFromEnum(Feature.rdm)] = .{
977878 .llvm_name = "rdm",
978 .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions (FEAT_RDM)",
879 .description = "Enable Armv8.1-A Rounding Double Multiply Add/Subtract instructions",
880 .dependencies = featureSet(&[_]Feature{
881 .neon,
882 }),
883 };
884 result[@intFromEnum(Feature.reserve_lr_for_ra)] = .{
885 .llvm_name = "reserve-lr-for-ra",
886 .description = "Reserve LR for call use only",
979887 .dependencies = featureSet(&[_]Feature{}),
980888 };
981889 result[@intFromEnum(Feature.reserve_x1)] = .{
......@@ -1073,11 +981,6 @@ pub const all_features = blk: {
1073981 .description = "Reserve X3, making it unavailable as a GPR",
1074982 .dependencies = featureSet(&[_]Feature{}),
1075983 };
1076 result[@intFromEnum(Feature.reserve_x30)] = .{
1077 .llvm_name = "reserve-x30",
1078 .description = "Reserve X30, making it unavailable as a GPR",
1079 .dependencies = featureSet(&[_]Feature{}),
1080 };
1081984 result[@intFromEnum(Feature.reserve_x4)] = .{
1082985 .llvm_name = "reserve-x4",
1083986 .description = "Reserve X4, making it unavailable as a GPR",
......@@ -1105,29 +1008,29 @@ pub const all_features = blk: {
11051008 };
11061009 result[@intFromEnum(Feature.rme)] = .{
11071010 .llvm_name = "rme",
1108 .description = "Enable Realm Management Extension (FEAT_RME)",
1011 .description = "Enable Realm Management Extension",
11091012 .dependencies = featureSet(&[_]Feature{}),
11101013 };
11111014 result[@intFromEnum(Feature.sb)] = .{
11121015 .llvm_name = "sb",
1113 .description = "Enable v8.5 Speculation Barrier (FEAT_SB)",
1016 .description = "Enable Armv8.5-A Speculation Barrier",
11141017 .dependencies = featureSet(&[_]Feature{}),
11151018 };
11161019 result[@intFromEnum(Feature.sel2)] = .{
11171020 .llvm_name = "sel2",
1118 .description = "Enable v8.4-A Secure Exception Level 2 extension (FEAT_SEL2)",
1021 .description = "Enable Armv8.4-A Secure Exception Level 2 extension",
11191022 .dependencies = featureSet(&[_]Feature{}),
11201023 };
11211024 result[@intFromEnum(Feature.sha2)] = .{
11221025 .llvm_name = "sha2",
1123 .description = "Enable SHA1 and SHA256 support (FEAT_SHA1, FEAT_SHA256)",
1026 .description = "Enable SHA1 and SHA256 support",
11241027 .dependencies = featureSet(&[_]Feature{
11251028 .neon,
11261029 }),
11271030 };
11281031 result[@intFromEnum(Feature.sha3)] = .{
11291032 .llvm_name = "sha3",
1130 .description = "Enable SHA512 and SHA3 support (FEAT_SHA3, FEAT_SHA512)",
1033 .description = "Enable SHA512 and SHA3 support",
11311034 .dependencies = featureSet(&[_]Feature{
11321035 .sha2,
11331036 }),
......@@ -1149,14 +1052,14 @@ pub const all_features = blk: {
11491052 };
11501053 result[@intFromEnum(Feature.sm4)] = .{
11511054 .llvm_name = "sm4",
1152 .description = "Enable SM3 and SM4 support (FEAT_SM4, FEAT_SM3)",
1055 .description = "Enable SM3 and SM4 support",
11531056 .dependencies = featureSet(&[_]Feature{
11541057 .neon,
11551058 }),
11561059 };
11571060 result[@intFromEnum(Feature.sme)] = .{
11581061 .llvm_name = "sme",
1159 .description = "Enable Scalable Matrix Extension (SME) (FEAT_SME)",
1062 .description = "Enable Scalable Matrix Extension (SME)",
11601063 .dependencies = featureSet(&[_]Feature{
11611064 .bf16,
11621065 .use_scalar_inc_vl,
......@@ -1171,34 +1074,43 @@ pub const all_features = blk: {
11711074 };
11721075 result[@intFromEnum(Feature.sme2p1)] = .{
11731076 .llvm_name = "sme2p1",
1174 .description = "Enable Scalable Matrix Extension 2.1 (FEAT_SME2p1) instructions",
1077 .description = "Enable Scalable Matrix Extension 2.1 instructions",
1078 .dependencies = featureSet(&[_]Feature{
1079 .sme2,
1080 }),
1081 };
1082 result[@intFromEnum(Feature.sme_b16b16)] = .{
1083 .llvm_name = "sme-b16b16",
1084 .description = "Enable SME2.1 ZA-targeting non-widening BFloat16 instructions",
11751085 .dependencies = featureSet(&[_]Feature{
1086 .b16b16,
11761087 .sme2,
11771088 }),
11781089 };
11791090 result[@intFromEnum(Feature.sme_f16f16)] = .{
11801091 .llvm_name = "sme-f16f16",
1181 .description = "Enable SME2.1 non-widening Float16 instructions (FEAT_SME_F16F16)",
1182 .dependencies = featureSet(&[_]Feature{}),
1092 .description = "Enable SME non-widening Float16 instructions",
1093 .dependencies = featureSet(&[_]Feature{
1094 .sme2,
1095 }),
11831096 };
11841097 result[@intFromEnum(Feature.sme_f64f64)] = .{
11851098 .llvm_name = "sme-f64f64",
1186 .description = "Enable Scalable Matrix Extension (SME) F64F64 instructions (FEAT_SME_F64F64)",
1099 .description = "Enable Scalable Matrix Extension (SME) F64F64 instructions",
11871100 .dependencies = featureSet(&[_]Feature{
11881101 .sme,
11891102 }),
11901103 };
11911104 result[@intFromEnum(Feature.sme_f8f16)] = .{
11921105 .llvm_name = "sme-f8f16",
1193 .description = "Enable Scalable Matrix Extension (SME) F8F16 instructions(FEAT_SME_F8F16)",
1106 .description = "Enable Scalable Matrix Extension (SME) F8F16 instructions",
11941107 .dependencies = featureSet(&[_]Feature{
1195 .fp8,
1196 .sme2,
1108 .sme_f8f32,
11971109 }),
11981110 };
11991111 result[@intFromEnum(Feature.sme_f8f32)] = .{
12001112 .llvm_name = "sme-f8f32",
1201 .description = "Enable Scalable Matrix Extension (SME) F8F32 instructions (FEAT_SME_F8F32)",
1113 .description = "Enable Scalable Matrix Extension (SME) F8F32 instructions",
12021114 .dependencies = featureSet(&[_]Feature{
12031115 .fp8,
12041116 .sme2,
......@@ -1206,7 +1118,7 @@ pub const all_features = blk: {
12061118 };
12071119 result[@intFromEnum(Feature.sme_fa64)] = .{
12081120 .llvm_name = "sme-fa64",
1209 .description = "Enable the full A64 instruction set in streaming SVE mode (FEAT_SME_FA64)",
1121 .description = "Enable the full A64 instruction set in streaming SVE mode",
12101122 .dependencies = featureSet(&[_]Feature{
12111123 .sme,
12121124 .sve2,
......@@ -1214,61 +1126,62 @@ pub const all_features = blk: {
12141126 };
12151127 result[@intFromEnum(Feature.sme_i16i64)] = .{
12161128 .llvm_name = "sme-i16i64",
1217 .description = "Enable Scalable Matrix Extension (SME) I16I64 instructions (FEAT_SME_I16I64)",
1129 .description = "Enable Scalable Matrix Extension (SME) I16I64 instructions",
12181130 .dependencies = featureSet(&[_]Feature{
12191131 .sme,
12201132 }),
12211133 };
12221134 result[@intFromEnum(Feature.sme_lutv2)] = .{
12231135 .llvm_name = "sme-lutv2",
1224 .description = "Enable Scalable Matrix Extension (SME) LUTv2 instructions (FEAT_SME_LUTv2)",
1136 .description = "Enable Scalable Matrix Extension (SME) LUTv2 instructions",
12251137 .dependencies = featureSet(&[_]Feature{}),
12261138 };
12271139 result[@intFromEnum(Feature.spe)] = .{
12281140 .llvm_name = "spe",
1229 .description = "Enable Statistical Profiling extension (FEAT_SPE)",
1141 .description = "Enable Statistical Profiling extension",
12301142 .dependencies = featureSet(&[_]Feature{}),
12311143 };
12321144 result[@intFromEnum(Feature.spe_eef)] = .{
12331145 .llvm_name = "spe-eef",
1234 .description = "Enable extra register in the Statistical Profiling Extension (FEAT_SPEv1p2)",
1146 .description = "Enable extra register in the Statistical Profiling Extension",
12351147 .dependencies = featureSet(&[_]Feature{}),
12361148 };
12371149 result[@intFromEnum(Feature.specres2)] = .{
12381150 .llvm_name = "specres2",
1239 .description = "Enable Speculation Restriction Instruction (FEAT_SPECRES2)",
1151 .description = "Enable Speculation Restriction Instruction",
12401152 .dependencies = featureSet(&[_]Feature{
12411153 .predres,
12421154 }),
12431155 };
12441156 result[@intFromEnum(Feature.specrestrict)] = .{
12451157 .llvm_name = "specrestrict",
1246 .description = "Enable architectural speculation restriction (FEAT_CSV2_2)",
1158 .description = "Enable architectural speculation restriction",
12471159 .dependencies = featureSet(&[_]Feature{}),
12481160 };
12491161 result[@intFromEnum(Feature.ssbs)] = .{
12501162 .llvm_name = "ssbs",
1251 .description = "Enable Speculative Store Bypass Safe bit (FEAT_SSBS, FEAT_SSBS2)",
1163 .description = "Enable Speculative Store Bypass Safe bit",
12521164 .dependencies = featureSet(&[_]Feature{}),
12531165 };
12541166 result[@intFromEnum(Feature.ssve_fp8dot2)] = .{
12551167 .llvm_name = "ssve-fp8dot2",
1256 .description = "Enable SVE2 fp8 2-way dot product instructions (FEAT_SSVE_FP8DOT2)",
1168 .description = "Enable SVE2 FP8 2-way dot product instructions",
12571169 .dependencies = featureSet(&[_]Feature{
1258 .sme2,
1170 .ssve_fp8dot4,
12591171 }),
12601172 };
12611173 result[@intFromEnum(Feature.ssve_fp8dot4)] = .{
12621174 .llvm_name = "ssve-fp8dot4",
1263 .description = "Enable SVE2 fp8 4-way dot product instructions (FEAT_SSVE_FP8DOT4)",
1175 .description = "Enable SVE2 FP8 4-way dot product instructions",
12641176 .dependencies = featureSet(&[_]Feature{
1265 .sme2,
1177 .ssve_fp8fma,
12661178 }),
12671179 };
12681180 result[@intFromEnum(Feature.ssve_fp8fma)] = .{
12691181 .llvm_name = "ssve-fp8fma",
1270 .description = "Enable SVE2 fp8 multiply-add instructions (FEAT_SSVE_FP8FMA)",
1182 .description = "Enable SVE2 FP8 multiply-add instructions",
12711183 .dependencies = featureSet(&[_]Feature{
1184 .fp8,
12721185 .sme2,
12731186 }),
12741187 };
......@@ -1289,14 +1202,14 @@ pub const all_features = blk: {
12891202 };
12901203 result[@intFromEnum(Feature.sve)] = .{
12911204 .llvm_name = "sve",
1292 .description = "Enable Scalable Vector Extension (SVE) instructions (FEAT_SVE)",
1205 .description = "Enable Scalable Vector Extension (SVE) instructions",
12931206 .dependencies = featureSet(&[_]Feature{
12941207 .fullfp16,
12951208 }),
12961209 };
12971210 result[@intFromEnum(Feature.sve2)] = .{
12981211 .llvm_name = "sve2",
1299 .description = "Enable Scalable Vector Extension 2 (SVE2) instructions (FEAT_SVE2)",
1212 .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
13001213 .dependencies = featureSet(&[_]Feature{
13011214 .sve,
13021215 .use_scalar_inc_vl,
......@@ -1304,7 +1217,7 @@ pub const all_features = blk: {
13041217 };
13051218 result[@intFromEnum(Feature.sve2_aes)] = .{
13061219 .llvm_name = "sve2-aes",
1307 .description = "Enable AES SVE2 instructions (FEAT_SVE_AES, FEAT_SVE_PMULL128)",
1220 .description = "Enable AES SVE2 instructions",
13081221 .dependencies = featureSet(&[_]Feature{
13091222 .aes,
13101223 .sve2,
......@@ -1312,14 +1225,14 @@ pub const all_features = blk: {
13121225 };
13131226 result[@intFromEnum(Feature.sve2_bitperm)] = .{
13141227 .llvm_name = "sve2-bitperm",
1315 .description = "Enable bit permutation SVE2 instructions (FEAT_SVE_BitPerm)",
1228 .description = "Enable bit permutation SVE2 instructions",
13161229 .dependencies = featureSet(&[_]Feature{
13171230 .sve2,
13181231 }),
13191232 };
13201233 result[@intFromEnum(Feature.sve2_sha3)] = .{
13211234 .llvm_name = "sve2-sha3",
1322 .description = "Enable SHA3 SVE2 instructions (FEAT_SVE_SHA3)",
1235 .description = "Enable SHA3 SVE2 instructions",
13231236 .dependencies = featureSet(&[_]Feature{
13241237 .sha3,
13251238 .sve2,
......@@ -1327,7 +1240,7 @@ pub const all_features = blk: {
13271240 };
13281241 result[@intFromEnum(Feature.sve2_sm4)] = .{
13291242 .llvm_name = "sve2-sm4",
1330 .description = "Enable SM4 SVE2 instructions (FEAT_SVE_SM4)",
1243 .description = "Enable SM4 SVE2 instructions",
13311244 .dependencies = featureSet(&[_]Feature{
13321245 .sm4,
13331246 .sve2,
......@@ -1340,6 +1253,13 @@ pub const all_features = blk: {
13401253 .sve2,
13411254 }),
13421255 };
1256 result[@intFromEnum(Feature.sve_b16b16)] = .{
1257 .llvm_name = "sve-b16b16",
1258 .description = "Enable SVE2 non-widening and SME2 Z-targeting non-widening BFloat16 instructions",
1259 .dependencies = featureSet(&[_]Feature{
1260 .b16b16,
1261 }),
1262 };
13431263 result[@intFromEnum(Feature.tagged_globals)] = .{
13441264 .llvm_name = "tagged-globals",
13451265 .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
......@@ -1347,22 +1267,22 @@ pub const all_features = blk: {
13471267 };
13481268 result[@intFromEnum(Feature.the)] = .{
13491269 .llvm_name = "the",
1350 .description = "Enable Armv8.9-A Translation Hardening Extension (FEAT_THE)",
1270 .description = "Enable Armv8.9-A Translation Hardening Extension",
13511271 .dependencies = featureSet(&[_]Feature{}),
13521272 };
13531273 result[@intFromEnum(Feature.tlb_rmi)] = .{
13541274 .llvm_name = "tlb-rmi",
1355 .description = "Enable v8.4-A TLB Range and Maintenance Instructions (FEAT_TLBIOS, FEAT_TLBIRANGE)",
1275 .description = "Enable Armv8.4-A TLB Range and Maintenance instructions",
13561276 .dependencies = featureSet(&[_]Feature{}),
13571277 };
13581278 result[@intFromEnum(Feature.tlbiw)] = .{
13591279 .llvm_name = "tlbiw",
1360 .description = "Enable ARMv9.5-A TLBI VMALL for Dirty State (FEAT_TLBIW)",
1280 .description = "Enable Armv9.5-A TLBI VMALL for Dirty State",
13611281 .dependencies = featureSet(&[_]Feature{}),
13621282 };
13631283 result[@intFromEnum(Feature.tme)] = .{
13641284 .llvm_name = "tme",
1365 .description = "Enable Transactional Memory Extension (FEAT_TME)",
1285 .description = "Enable Transactional Memory Extension",
13661286 .dependencies = featureSet(&[_]Feature{}),
13671287 };
13681288 result[@intFromEnum(Feature.tpidr_el1)] = .{
......@@ -1387,17 +1307,17 @@ pub const all_features = blk: {
13871307 };
13881308 result[@intFromEnum(Feature.tracev8_4)] = .{
13891309 .llvm_name = "tracev8.4",
1390 .description = "Enable v8.4-A Trace extension (FEAT_TRF)",
1310 .description = "Enable Armv8.4-A Trace extension",
13911311 .dependencies = featureSet(&[_]Feature{}),
13921312 };
13931313 result[@intFromEnum(Feature.trbe)] = .{
13941314 .llvm_name = "trbe",
1395 .description = "Enable Trace Buffer Extension (FEAT_TRBE)",
1315 .description = "Enable Trace Buffer Extension",
13961316 .dependencies = featureSet(&[_]Feature{}),
13971317 };
13981318 result[@intFromEnum(Feature.uaops)] = .{
13991319 .llvm_name = "uaops",
1400 .description = "Enable v8.2 UAO PState (FEAT_UAO)",
1320 .description = "Enable Armv8.2-A UAO PState",
14011321 .dependencies = featureSet(&[_]Feature{}),
14021322 };
14031323 result[@intFromEnum(Feature.use_experimental_zeroing_pseudos)] = .{
......@@ -1405,6 +1325,11 @@ pub const all_features = blk: {
14051325 .description = "Hint to the compiler that the MOVPRFX instruction is merged with destructive operations",
14061326 .dependencies = featureSet(&[_]Feature{}),
14071327 };
1328 result[@intFromEnum(Feature.use_fixed_over_scalable_if_equal_cost)] = .{
1329 .llvm_name = "use-fixed-over-scalable-if-equal-cost",
1330 .description = "Prefer fixed width loop vectorization over scalable if the cost-model assigns equal costs",
1331 .dependencies = featureSet(&[_]Feature{}),
1332 };
14081333 result[@intFromEnum(Feature.use_postra_scheduler)] = .{
14091334 .llvm_name = "use-postra-scheduler",
14101335 .description = "Schedule again after register allocation",
......@@ -1422,7 +1347,7 @@ pub const all_features = blk: {
14221347 };
14231348 result[@intFromEnum(Feature.v8_1a)] = .{
14241349 .llvm_name = "v8.1a",
1425 .description = "Support ARM v8.1a instructions",
1350 .description = "Support ARM v8.1a architecture",
14261351 .dependencies = featureSet(&[_]Feature{
14271352 .crc,
14281353 .lor,
......@@ -1435,7 +1360,7 @@ pub const all_features = blk: {
14351360 };
14361361 result[@intFromEnum(Feature.v8_2a)] = .{
14371362 .llvm_name = "v8.2a",
1438 .description = "Support ARM v8.2a instructions",
1363 .description = "Support ARM v8.2a architecture",
14391364 .dependencies = featureSet(&[_]Feature{
14401365 .ccpp,
14411366 .pan_rwv,
......@@ -1446,9 +1371,8 @@ pub const all_features = blk: {
14461371 };
14471372 result[@intFromEnum(Feature.v8_3a)] = .{
14481373 .llvm_name = "v8.3a",
1449 .description = "Support ARM v8.3a instructions",
1374 .description = "Support ARM v8.3a architecture",
14501375 .dependencies = featureSet(&[_]Feature{
1451 .ccidx,
14521376 .complxnum,
14531377 .jsconv,
14541378 .pauth,
......@@ -1458,7 +1382,7 @@ pub const all_features = blk: {
14581382 };
14591383 result[@intFromEnum(Feature.v8_4a)] = .{
14601384 .llvm_name = "v8.4a",
1461 .description = "Support ARM v8.4a instructions",
1385 .description = "Support ARM v8.4a architecture",
14621386 .dependencies = featureSet(&[_]Feature{
14631387 .am,
14641388 .dit,
......@@ -1476,7 +1400,7 @@ pub const all_features = blk: {
14761400 };
14771401 result[@intFromEnum(Feature.v8_5a)] = .{
14781402 .llvm_name = "v8.5a",
1479 .description = "Support ARM v8.5a instructions",
1403 .description = "Support ARM v8.5a architecture",
14801404 .dependencies = featureSet(&[_]Feature{
14811405 .altnzcv,
14821406 .bti,
......@@ -1485,13 +1409,12 @@ pub const all_features = blk: {
14851409 .predres,
14861410 .sb,
14871411 .specrestrict,
1488 .ssbs,
14891412 .v8_4a,
14901413 }),
14911414 };
14921415 result[@intFromEnum(Feature.v8_6a)] = .{
14931416 .llvm_name = "v8.6a",
1494 .description = "Support ARM v8.6a instructions",
1417 .description = "Support ARM v8.6a architecture",
14951418 .dependencies = featureSet(&[_]Feature{
14961419 .amvs,
14971420 .bf16,
......@@ -1503,7 +1426,7 @@ pub const all_features = blk: {
15031426 };
15041427 result[@intFromEnum(Feature.v8_7a)] = .{
15051428 .llvm_name = "v8.7a",
1506 .description = "Support ARM v8.7a instructions",
1429 .description = "Support ARM v8.7a architecture",
15071430 .dependencies = featureSet(&[_]Feature{
15081431 .hcx,
15091432 .v8_6a,
......@@ -1513,7 +1436,7 @@ pub const all_features = blk: {
15131436 };
15141437 result[@intFromEnum(Feature.v8_8a)] = .{
15151438 .llvm_name = "v8.8a",
1516 .description = "Support ARM v8.8a instructions",
1439 .description = "Support ARM v8.8a architecture",
15171440 .dependencies = featureSet(&[_]Feature{
15181441 .hbc,
15191442 .mops,
......@@ -1523,7 +1446,7 @@ pub const all_features = blk: {
15231446 };
15241447 result[@intFromEnum(Feature.v8_9a)] = .{
15251448 .llvm_name = "v8.9a",
1526 .description = "Support ARM v8.9a instructions",
1449 .description = "Support ARM v8.9a architecture",
15271450 .dependencies = featureSet(&[_]Feature{
15281451 .chk,
15291452 .clrbhb,
......@@ -1536,7 +1459,7 @@ pub const all_features = blk: {
15361459 };
15371460 result[@intFromEnum(Feature.v8a)] = .{
15381461 .llvm_name = "v8a",
1539 .description = "Support ARM v8.0a instructions",
1462 .description = "Support ARM v8a architecture",
15401463 .dependencies = featureSet(&[_]Feature{
15411464 .el2vmsa,
15421465 .el3,
......@@ -1545,23 +1468,18 @@ pub const all_features = blk: {
15451468 };
15461469 result[@intFromEnum(Feature.v8r)] = .{
15471470 .llvm_name = "v8r",
1548 .description = "Support ARM v8r instructions",
1471 .description = "Support ARM v8r architecture",
15491472 .dependencies = featureSet(&[_]Feature{
1550 .ccidx,
15511473 .ccpp,
1552 .complxnum,
15531474 .contextidr_el2,
15541475 .crc,
15551476 .dit,
1556 .dotprod,
15571477 .flagm,
1558 .jsconv,
15591478 .lse,
15601479 .pan_rwv,
15611480 .pauth,
15621481 .ras,
15631482 .rcpc_immo,
1564 .rdm,
15651483 .sel2,
15661484 .specrestrict,
15671485 .tlb_rmi,
......@@ -1571,7 +1489,7 @@ pub const all_features = blk: {
15711489 };
15721490 result[@intFromEnum(Feature.v9_1a)] = .{
15731491 .llvm_name = "v9.1a",
1574 .description = "Support ARM v9.1a instructions",
1492 .description = "Support ARM v9.1a architecture",
15751493 .dependencies = featureSet(&[_]Feature{
15761494 .v8_6a,
15771495 .v9a,
......@@ -1579,7 +1497,7 @@ pub const all_features = blk: {
15791497 };
15801498 result[@intFromEnum(Feature.v9_2a)] = .{
15811499 .llvm_name = "v9.2a",
1582 .description = "Support ARM v9.2a instructions",
1500 .description = "Support ARM v9.2a architecture",
15831501 .dependencies = featureSet(&[_]Feature{
15841502 .v8_7a,
15851503 .v9_1a,
......@@ -1587,7 +1505,7 @@ pub const all_features = blk: {
15871505 };
15881506 result[@intFromEnum(Feature.v9_3a)] = .{
15891507 .llvm_name = "v9.3a",
1590 .description = "Support ARM v9.3a instructions",
1508 .description = "Support ARM v9.3a architecture",
15911509 .dependencies = featureSet(&[_]Feature{
15921510 .v8_8a,
15931511 .v9_2a,
......@@ -1595,7 +1513,7 @@ pub const all_features = blk: {
15951513 };
15961514 result[@intFromEnum(Feature.v9_4a)] = .{
15971515 .llvm_name = "v9.4a",
1598 .description = "Support ARM v9.4a instructions",
1516 .description = "Support ARM v9.4a architecture",
15991517 .dependencies = featureSet(&[_]Feature{
16001518 .v8_9a,
16011519 .v9_3a,
......@@ -1603,7 +1521,7 @@ pub const all_features = blk: {
16031521 };
16041522 result[@intFromEnum(Feature.v9_5a)] = .{
16051523 .llvm_name = "v9.5a",
1606 .description = "Support ARM v9.5a instructions",
1524 .description = "Support ARM v9.5a architecture",
16071525 .dependencies = featureSet(&[_]Feature{
16081526 .cpa,
16091527 .v9_4a,
......@@ -1611,28 +1529,26 @@ pub const all_features = blk: {
16111529 };
16121530 result[@intFromEnum(Feature.v9a)] = .{
16131531 .llvm_name = "v9a",
1614 .description = "Support ARM v9a instructions",
1532 .description = "Support ARM v9a architecture",
16151533 .dependencies = featureSet(&[_]Feature{
1616 .mec,
1617 .sve2,
16181534 .v8_5a,
16191535 }),
16201536 };
16211537 result[@intFromEnum(Feature.vh)] = .{
16221538 .llvm_name = "vh",
1623 .description = "Enables ARM v8.1 Virtual Host extension (FEAT_VHE)",
1539 .description = "Enable Armv8.1-A Virtual Host extension",
16241540 .dependencies = featureSet(&[_]Feature{
16251541 .contextidr_el2,
16261542 }),
16271543 };
16281544 result[@intFromEnum(Feature.wfxt)] = .{
16291545 .llvm_name = "wfxt",
1630 .description = "Enable Armv8.7-A WFET and WFIT instruction (FEAT_WFxT)",
1546 .description = "Enable Armv8.7-A WFET and WFIT instruction",
16311547 .dependencies = featureSet(&[_]Feature{}),
16321548 };
16331549 result[@intFromEnum(Feature.xs)] = .{
16341550 .llvm_name = "xs",
1635 .description = "Enable Armv8.7-A limited-TLB-maintenance instruction (FEAT_XS)",
1551 .description = "Enable Armv8.7-A limited-TLB-maintenance instruction",
16361552 .dependencies = featureSet(&[_]Feature{}),
16371553 };
16381554 result[@intFromEnum(Feature.zcm)] = .{
......@@ -1670,6 +1586,7 @@ pub const cpu = struct {
16701586 .name = "a64fx",
16711587 .llvm_name = "a64fx",
16721588 .features = featureSet(&[_]Feature{
1589 .aes,
16731590 .aggressive_fma,
16741591 .arith_bcc_fusion,
16751592 .complxnum,
......@@ -1686,19 +1603,22 @@ pub const cpu = struct {
16861603 .name = "ampere1",
16871604 .llvm_name = "ampere1",
16881605 .features = featureSet(&[_]Feature{
1689 .addr_lsl_fast,
16901606 .aes,
16911607 .aggressive_fma,
16921608 .alu_lsl_fast,
16931609 .arith_bcc_fusion,
1610 .ccidx,
16941611 .cmp_bcc_fusion,
1612 .fullfp16,
16951613 .fuse_address,
1614 .fuse_adrp_add,
16961615 .fuse_aes,
16971616 .fuse_literals,
16981617 .ldp_aligned_only,
16991618 .perfmon,
17001619 .rand,
17011620 .sha3,
1621 .ssbs,
17021622 .store_pair_suppress,
17031623 .stp_aligned_only,
17041624 .use_postra_scheduler,
......@@ -1709,13 +1629,16 @@ pub const cpu = struct {
17091629 .name = "ampere1a",
17101630 .llvm_name = "ampere1a",
17111631 .features = featureSet(&[_]Feature{
1712 .addr_lsl_fast,
17131632 .aes,
17141633 .aggressive_fma,
17151634 .alu_lsl_fast,
17161635 .arith_bcc_fusion,
1636 .ccidx,
17171637 .cmp_bcc_fusion,
1638 .fullfp16,
17181639 .fuse_address,
1640 .fuse_addsub_2reg_const1,
1641 .fuse_adrp_add,
17191642 .fuse_aes,
17201643 .fuse_literals,
17211644 .ldp_aligned_only,
......@@ -1724,6 +1647,7 @@ pub const cpu = struct {
17241647 .rand,
17251648 .sha3,
17261649 .sm4,
1650 .ssbs,
17271651 .store_pair_suppress,
17281652 .stp_aligned_only,
17291653 .use_postra_scheduler,
......@@ -1734,11 +1658,11 @@ pub const cpu = struct {
17341658 .name = "ampere1b",
17351659 .llvm_name = "ampere1b",
17361660 .features = featureSet(&[_]Feature{
1737 .addr_lsl_fast,
17381661 .aes,
17391662 .aggressive_fma,
17401663 .alu_lsl_fast,
17411664 .arith_bcc_fusion,
1665 .ccidx,
17421666 .cmp_bcc_fusion,
17431667 .cssc,
17441668 .enable_select_opt,
......@@ -1754,6 +1678,7 @@ pub const cpu = struct {
17541678 .rand,
17551679 .sha3,
17561680 .sm4,
1681 .ssbs,
17571682 .store_pair_suppress,
17581683 .stp_aligned_only,
17591684 .use_postra_scheduler,
......@@ -1764,11 +1689,11 @@ pub const cpu = struct {
17641689 .name = "apple_a10",
17651690 .llvm_name = "apple-a10",
17661691 .features = featureSet(&[_]Feature{
1692 .aes,
17671693 .alternate_sextload_cvt_f32_pattern,
17681694 .arith_bcc_fusion,
17691695 .arith_cbz_fusion,
17701696 .crc,
1771 .crypto,
17721697 .disable_latency_sched_heuristic,
17731698 .fuse_aes,
17741699 .fuse_crypto_eor,
......@@ -1776,6 +1701,7 @@ pub const cpu = struct {
17761701 .pan,
17771702 .perfmon,
17781703 .rdm,
1704 .sha2,
17791705 .store_pair_suppress,
17801706 .v8a,
17811707 .vh,
......@@ -1787,15 +1713,16 @@ pub const cpu = struct {
17871713 .name = "apple_a11",
17881714 .llvm_name = "apple-a11",
17891715 .features = featureSet(&[_]Feature{
1716 .aes,
17901717 .alternate_sextload_cvt_f32_pattern,
17911718 .arith_bcc_fusion,
17921719 .arith_cbz_fusion,
1793 .crypto,
17941720 .disable_latency_sched_heuristic,
17951721 .fullfp16,
17961722 .fuse_aes,
17971723 .fuse_crypto_eor,
17981724 .perfmon,
1725 .sha2,
17991726 .store_pair_suppress,
18001727 .v8_2a,
18011728 .zcm,
......@@ -1806,15 +1733,16 @@ pub const cpu = struct {
18061733 .name = "apple_a12",
18071734 .llvm_name = "apple-a12",
18081735 .features = featureSet(&[_]Feature{
1736 .aes,
18091737 .alternate_sextload_cvt_f32_pattern,
18101738 .arith_bcc_fusion,
18111739 .arith_cbz_fusion,
1812 .crypto,
18131740 .disable_latency_sched_heuristic,
18141741 .fullfp16,
18151742 .fuse_aes,
18161743 .fuse_crypto_eor,
18171744 .perfmon,
1745 .sha2,
18181746 .store_pair_suppress,
18191747 .v8_3a,
18201748 .zcm,
......@@ -1825,10 +1753,10 @@ pub const cpu = struct {
18251753 .name = "apple_a13",
18261754 .llvm_name = "apple-a13",
18271755 .features = featureSet(&[_]Feature{
1756 .aes,
18281757 .alternate_sextload_cvt_f32_pattern,
18291758 .arith_bcc_fusion,
18301759 .arith_cbz_fusion,
1831 .crypto,
18321760 .disable_latency_sched_heuristic,
18331761 .fp16fml,
18341762 .fuse_aes,
......@@ -1845,18 +1773,17 @@ pub const cpu = struct {
18451773 .name = "apple_a14",
18461774 .llvm_name = "apple-a14",
18471775 .features = featureSet(&[_]Feature{
1776 .aes,
18481777 .aggressive_fma,
18491778 .alternate_sextload_cvt_f32_pattern,
18501779 .altnzcv,
18511780 .arith_bcc_fusion,
18521781 .arith_cbz_fusion,
18531782 .ccdp,
1854 .crypto,
18551783 .disable_latency_sched_heuristic,
18561784 .fp16fml,
18571785 .fptoint,
18581786 .fuse_address,
1859 .fuse_adrp_add,
18601787 .fuse_aes,
18611788 .fuse_arith_logic,
18621789 .fuse_crypto_eor,
......@@ -1878,10 +1805,10 @@ pub const cpu = struct {
18781805 .name = "apple_a15",
18791806 .llvm_name = "apple-a15",
18801807 .features = featureSet(&[_]Feature{
1808 .aes,
18811809 .alternate_sextload_cvt_f32_pattern,
18821810 .arith_bcc_fusion,
18831811 .arith_cbz_fusion,
1884 .crypto,
18851812 .disable_latency_sched_heuristic,
18861813 .fp16fml,
18871814 .fuse_address,
......@@ -1892,6 +1819,7 @@ pub const cpu = struct {
18921819 .fuse_literals,
18931820 .perfmon,
18941821 .sha3,
1822 .ssbs,
18951823 .store_pair_suppress,
18961824 .v8_6a,
18971825 .zcm,
......@@ -1902,13 +1830,14 @@ pub const cpu = struct {
19021830 .name = "apple_a16",
19031831 .llvm_name = "apple-a16",
19041832 .features = featureSet(&[_]Feature{
1833 .aes,
19051834 .alternate_sextload_cvt_f32_pattern,
19061835 .arith_bcc_fusion,
19071836 .arith_cbz_fusion,
1908 .crypto,
19091837 .disable_latency_sched_heuristic,
19101838 .fp16fml,
19111839 .fuse_address,
1840 .fuse_adrp_add,
19121841 .fuse_aes,
19131842 .fuse_arith_logic,
19141843 .fuse_crypto_eor,
......@@ -1917,6 +1846,7 @@ pub const cpu = struct {
19171846 .hcx,
19181847 .perfmon,
19191848 .sha3,
1849 .ssbs,
19201850 .store_pair_suppress,
19211851 .v8_6a,
19221852 .zcm,
......@@ -1927,13 +1857,14 @@ pub const cpu = struct {
19271857 .name = "apple_a17",
19281858 .llvm_name = "apple-a17",
19291859 .features = featureSet(&[_]Feature{
1860 .aes,
19301861 .alternate_sextload_cvt_f32_pattern,
19311862 .arith_bcc_fusion,
19321863 .arith_cbz_fusion,
1933 .crypto,
19341864 .disable_latency_sched_heuristic,
19351865 .fp16fml,
19361866 .fuse_address,
1867 .fuse_adrp_add,
19371868 .fuse_aes,
19381869 .fuse_arith_logic,
19391870 .fuse_crypto_eor,
......@@ -1942,6 +1873,7 @@ pub const cpu = struct {
19421873 .hcx,
19431874 .perfmon,
19441875 .sha3,
1876 .ssbs,
19451877 .store_pair_suppress,
19461878 .v8_6a,
19471879 .zcm,
......@@ -1952,14 +1884,15 @@ pub const cpu = struct {
19521884 .name = "apple_a7",
19531885 .llvm_name = "apple-a7",
19541886 .features = featureSet(&[_]Feature{
1887 .aes,
19551888 .alternate_sextload_cvt_f32_pattern,
19561889 .arith_bcc_fusion,
19571890 .arith_cbz_fusion,
1958 .crypto,
19591891 .disable_latency_sched_heuristic,
19601892 .fuse_aes,
19611893 .fuse_crypto_eor,
19621894 .perfmon,
1895 .sha2,
19631896 .store_pair_suppress,
19641897 .v8a,
19651898 .zcm,
......@@ -1971,14 +1904,15 @@ pub const cpu = struct {
19711904 .name = "apple_a8",
19721905 .llvm_name = "apple-a8",
19731906 .features = featureSet(&[_]Feature{
1907 .aes,
19741908 .alternate_sextload_cvt_f32_pattern,
19751909 .arith_bcc_fusion,
19761910 .arith_cbz_fusion,
1977 .crypto,
19781911 .disable_latency_sched_heuristic,
19791912 .fuse_aes,
19801913 .fuse_crypto_eor,
19811914 .perfmon,
1915 .sha2,
19821916 .store_pair_suppress,
19831917 .v8a,
19841918 .zcm,
......@@ -1990,14 +1924,15 @@ pub const cpu = struct {
19901924 .name = "apple_a9",
19911925 .llvm_name = "apple-a9",
19921926 .features = featureSet(&[_]Feature{
1927 .aes,
19931928 .alternate_sextload_cvt_f32_pattern,
19941929 .arith_bcc_fusion,
19951930 .arith_cbz_fusion,
1996 .crypto,
19971931 .disable_latency_sched_heuristic,
19981932 .fuse_aes,
19991933 .fuse_crypto_eor,
20001934 .perfmon,
1935 .sha2,
20011936 .store_pair_suppress,
20021937 .v8a,
20031938 .zcm,
......@@ -2005,47 +1940,21 @@ pub const cpu = struct {
20051940 .zcz_fp_workaround,
20061941 }),
20071942 };
2008 pub const apple_latest = CpuModel{
2009 .name = "apple_latest",
2010 .llvm_name = "apple-latest",
2011 .features = featureSet(&[_]Feature{
2012 .alternate_sextload_cvt_f32_pattern,
2013 .arith_bcc_fusion,
2014 .arith_cbz_fusion,
2015 .crypto,
2016 .disable_latency_sched_heuristic,
2017 .fp16fml,
2018 .fuse_address,
2019 .fuse_aes,
2020 .fuse_arith_logic,
2021 .fuse_crypto_eor,
2022 .fuse_csel,
2023 .fuse_literals,
2024 .hcx,
2025 .perfmon,
2026 .sha3,
2027 .store_pair_suppress,
2028 .v8_6a,
2029 .zcm,
2030 .zcz,
2031 }),
2032 };
20331943 pub const apple_m1 = CpuModel{
20341944 .name = "apple_m1",
20351945 .llvm_name = "apple-m1",
20361946 .features = featureSet(&[_]Feature{
1947 .aes,
20371948 .aggressive_fma,
20381949 .alternate_sextload_cvt_f32_pattern,
20391950 .altnzcv,
20401951 .arith_bcc_fusion,
20411952 .arith_cbz_fusion,
20421953 .ccdp,
2043 .crypto,
20441954 .disable_latency_sched_heuristic,
20451955 .fp16fml,
20461956 .fptoint,
20471957 .fuse_address,
2048 .fuse_adrp_add,
20491958 .fuse_aes,
20501959 .fuse_arith_logic,
20511960 .fuse_crypto_eor,
......@@ -2067,10 +1976,10 @@ pub const cpu = struct {
20671976 .name = "apple_m2",
20681977 .llvm_name = "apple-m2",
20691978 .features = featureSet(&[_]Feature{
1979 .aes,
20701980 .alternate_sextload_cvt_f32_pattern,
20711981 .arith_bcc_fusion,
20721982 .arith_cbz_fusion,
2073 .crypto,
20741983 .disable_latency_sched_heuristic,
20751984 .fp16fml,
20761985 .fuse_address,
......@@ -2081,6 +1990,7 @@ pub const cpu = struct {
20811990 .fuse_literals,
20821991 .perfmon,
20831992 .sha3,
1993 .ssbs,
20841994 .store_pair_suppress,
20851995 .v8_6a,
20861996 .zcm,
......@@ -2091,13 +2001,14 @@ pub const cpu = struct {
20912001 .name = "apple_m3",
20922002 .llvm_name = "apple-m3",
20932003 .features = featureSet(&[_]Feature{
2004 .aes,
20942005 .alternate_sextload_cvt_f32_pattern,
20952006 .arith_bcc_fusion,
20962007 .arith_cbz_fusion,
2097 .crypto,
20982008 .disable_latency_sched_heuristic,
20992009 .fp16fml,
21002010 .fuse_address,
2011 .fuse_adrp_add,
21012012 .fuse_aes,
21022013 .fuse_arith_logic,
21032014 .fuse_crypto_eor,
......@@ -2106,25 +2017,53 @@ pub const cpu = struct {
21062017 .hcx,
21072018 .perfmon,
21082019 .sha3,
2020 .ssbs,
21092021 .store_pair_suppress,
21102022 .v8_6a,
21112023 .zcm,
21122024 .zcz,
21132025 }),
21142026 };
2027 pub const apple_m4 = CpuModel{
2028 .name = "apple_m4",
2029 .llvm_name = "apple-m4",
2030 .features = featureSet(&[_]Feature{
2031 .aes,
2032 .alternate_sextload_cvt_f32_pattern,
2033 .arith_bcc_fusion,
2034 .arith_cbz_fusion,
2035 .disable_latency_sched_heuristic,
2036 .fp16fml,
2037 .fuse_address,
2038 .fuse_aes,
2039 .fuse_arith_logic,
2040 .fuse_crypto_eor,
2041 .fuse_csel,
2042 .fuse_literals,
2043 .perfmon,
2044 .sha3,
2045 .sme2,
2046 .sme_f64f64,
2047 .sme_i16i64,
2048 .v9_2a,
2049 .zcm,
2050 .zcz,
2051 }),
2052 };
21152053 pub const apple_s4 = CpuModel{
21162054 .name = "apple_s4",
21172055 .llvm_name = "apple-s4",
21182056 .features = featureSet(&[_]Feature{
2057 .aes,
21192058 .alternate_sextload_cvt_f32_pattern,
21202059 .arith_bcc_fusion,
21212060 .arith_cbz_fusion,
2122 .crypto,
21232061 .disable_latency_sched_heuristic,
21242062 .fullfp16,
21252063 .fuse_aes,
21262064 .fuse_crypto_eor,
21272065 .perfmon,
2066 .sha2,
21282067 .store_pair_suppress,
21292068 .v8_3a,
21302069 .zcm,
......@@ -2135,15 +2074,16 @@ pub const cpu = struct {
21352074 .name = "apple_s5",
21362075 .llvm_name = "apple-s5",
21372076 .features = featureSet(&[_]Feature{
2077 .aes,
21382078 .alternate_sextload_cvt_f32_pattern,
21392079 .arith_bcc_fusion,
21402080 .arith_cbz_fusion,
2141 .crypto,
21422081 .disable_latency_sched_heuristic,
21432082 .fullfp16,
21442083 .fuse_aes,
21452084 .fuse_crypto_eor,
21462085 .perfmon,
2086 .sha2,
21472087 .store_pair_suppress,
21482088 .v8_3a,
21492089 .zcm,
......@@ -2154,18 +2094,42 @@ pub const cpu = struct {
21542094 .name = "carmel",
21552095 .llvm_name = "carmel",
21562096 .features = featureSet(&[_]Feature{
2157 .crypto,
2097 .aes,
21582098 .fullfp16,
2099 .sha2,
21592100 .v8_2a,
21602101 }),
21612102 };
2103 pub const cobalt_100 = CpuModel{
2104 .name = "cobalt_100",
2105 .llvm_name = "cobalt-100",
2106 .features = featureSet(&[_]Feature{
2107 .alu_lsl_fast,
2108 .bf16,
2109 .ccidx,
2110 .enable_select_opt,
2111 .ete,
2112 .fp16fml,
2113 .fuse_adrp_add,
2114 .fuse_aes,
2115 .i8mm,
2116 .mte,
2117 .perfmon,
2118 .predictable_select_expensive,
2119 .ssbs,
2120 .sve2_bitperm,
2121 .use_postra_scheduler,
2122 .v9a,
2123 }),
2124 };
21622125 pub const cortex_a34 = CpuModel{
21632126 .name = "cortex_a34",
21642127 .llvm_name = "cortex-a34",
21652128 .features = featureSet(&[_]Feature{
2129 .aes,
21662130 .crc,
2167 .crypto,
21682131 .perfmon,
2132 .sha2,
21692133 .v8a,
21702134 }),
21712135 };
......@@ -2173,9 +2137,10 @@ pub const cpu = struct {
21732137 .name = "cortex_a35",
21742138 .llvm_name = "cortex-a35",
21752139 .features = featureSet(&[_]Feature{
2140 .aes,
21762141 .crc,
2177 .crypto,
21782142 .perfmon,
2143 .sha2,
21792144 .v8a,
21802145 }),
21812146 };
......@@ -2183,14 +2148,18 @@ pub const cpu = struct {
21832148 .name = "cortex_a510",
21842149 .llvm_name = "cortex-a510",
21852150 .features = featureSet(&[_]Feature{
2186 .a510,
21872151 .bf16,
2152 .ccidx,
21882153 .ete,
21892154 .fp16fml,
2155 .fuse_adrp_add,
2156 .fuse_aes,
21902157 .i8mm,
21912158 .mte,
21922159 .perfmon,
2160 .ssbs,
21932161 .sve2_bitperm,
2162 .use_postra_scheduler,
21942163 .v9a,
21952164 }),
21962165 };
......@@ -2198,12 +2167,33 @@ pub const cpu = struct {
21982167 .name = "cortex_a520",
21992168 .llvm_name = "cortex-a520",
22002169 .features = featureSet(&[_]Feature{
2201 .a520,
2170 .ccidx,
22022171 .ete,
22032172 .fp16fml,
2173 .fuse_adrp_add,
2174 .fuse_aes,
22042175 .mte,
22052176 .perfmon,
2177 .ssbs,
22062178 .sve2_bitperm,
2179 .use_postra_scheduler,
2180 .v9_2a,
2181 }),
2182 };
2183 pub const cortex_a520ae = CpuModel{
2184 .name = "cortex_a520ae",
2185 .llvm_name = "cortex-a520ae",
2186 .features = featureSet(&[_]Feature{
2187 .ccidx,
2188 .ete,
2189 .fp16fml,
2190 .fuse_adrp_add,
2191 .fuse_aes,
2192 .mte,
2193 .perfmon,
2194 .ssbs,
2195 .sve2_bitperm,
2196 .use_postra_scheduler,
22072197 .v9_2a,
22082198 }),
22092199 };
......@@ -2211,12 +2201,13 @@ pub const cpu = struct {
22112201 .name = "cortex_a53",
22122202 .llvm_name = "cortex-a53",
22132203 .features = featureSet(&[_]Feature{
2204 .aes,
22142205 .balance_fp_ops,
22152206 .crc,
2216 .crypto,
22172207 .fuse_adrp_add,
22182208 .fuse_aes,
22192209 .perfmon,
2210 .sha2,
22202211 .use_postra_scheduler,
22212212 .v8a,
22222213 }),
......@@ -2225,7 +2216,7 @@ pub const cpu = struct {
22252216 .name = "cortex_a55",
22262217 .llvm_name = "cortex-a55",
22272218 .features = featureSet(&[_]Feature{
2228 .crypto,
2219 .aes,
22292220 .dotprod,
22302221 .fullfp16,
22312222 .fuse_address,
......@@ -2233,6 +2224,7 @@ pub const cpu = struct {
22332224 .fuse_aes,
22342225 .perfmon,
22352226 .rcpc,
2227 .sha2,
22362228 .use_postra_scheduler,
22372229 .v8_2a,
22382230 }),
......@@ -2241,15 +2233,17 @@ pub const cpu = struct {
22412233 .name = "cortex_a57",
22422234 .llvm_name = "cortex-a57",
22432235 .features = featureSet(&[_]Feature{
2236 .addr_lsl_slow_14,
2237 .aes,
22442238 .balance_fp_ops,
22452239 .crc,
2246 .crypto,
22472240 .enable_select_opt,
22482241 .fuse_adrp_add,
22492242 .fuse_aes,
22502243 .fuse_literals,
22512244 .perfmon,
22522245 .predictable_select_expensive,
2246 .sha2,
22532247 .use_postra_scheduler,
22542248 .v8a,
22552249 }),
......@@ -2258,12 +2252,18 @@ pub const cpu = struct {
22582252 .name = "cortex_a65",
22592253 .llvm_name = "cortex-a65",
22602254 .features = featureSet(&[_]Feature{
2261 .a65,
2262 .crypto,
2255 .aes,
22632256 .dotprod,
2257 .enable_select_opt,
22642258 .fullfp16,
2259 .fuse_address,
2260 .fuse_adrp_add,
2261 .fuse_aes,
2262 .fuse_literals,
22652263 .perfmon,
2264 .predictable_select_expensive,
22662265 .rcpc,
2266 .sha2,
22672267 .ssbs,
22682268 .v8_2a,
22692269 }),
......@@ -2272,12 +2272,18 @@ pub const cpu = struct {
22722272 .name = "cortex_a65ae",
22732273 .llvm_name = "cortex-a65ae",
22742274 .features = featureSet(&[_]Feature{
2275 .a65,
2276 .crypto,
2275 .aes,
22772276 .dotprod,
2277 .enable_select_opt,
22782278 .fullfp16,
2279 .fuse_address,
2280 .fuse_adrp_add,
2281 .fuse_aes,
2282 .fuse_literals,
22792283 .perfmon,
2284 .predictable_select_expensive,
22802285 .rcpc,
2286 .sha2,
22812287 .ssbs,
22822288 .v8_2a,
22832289 }),
......@@ -2286,14 +2292,22 @@ pub const cpu = struct {
22862292 .name = "cortex_a710",
22872293 .llvm_name = "cortex-a710",
22882294 .features = featureSet(&[_]Feature{
2289 .a710,
2295 .alu_lsl_fast,
22902296 .bf16,
2297 .ccidx,
2298 .cmp_bcc_fusion,
2299 .enable_select_opt,
22912300 .ete,
22922301 .fp16fml,
2302 .fuse_adrp_add,
2303 .fuse_aes,
22932304 .i8mm,
22942305 .mte,
22952306 .perfmon,
2307 .predictable_select_expensive,
2308 .ssbs,
22962309 .sve2_bitperm,
2310 .use_postra_scheduler,
22972311 .v9a,
22982312 }),
22992313 };
......@@ -2301,9 +2315,9 @@ pub const cpu = struct {
23012315 .name = "cortex_a715",
23022316 .llvm_name = "cortex-a715",
23032317 .features = featureSet(&[_]Feature{
2304 .addr_lsl_fast,
23052318 .alu_lsl_fast,
23062319 .bf16,
2320 .ccidx,
23072321 .cmp_bcc_fusion,
23082322 .enable_select_opt,
23092323 .ete,
......@@ -2315,6 +2329,7 @@ pub const cpu = struct {
23152329 .perfmon,
23162330 .predictable_select_expensive,
23172331 .spe,
2332 .ssbs,
23182333 .sve2_bitperm,
23192334 .use_postra_scheduler,
23202335 .v9a,
......@@ -2324,14 +2339,16 @@ pub const cpu = struct {
23242339 .name = "cortex_a72",
23252340 .llvm_name = "cortex-a72",
23262341 .features = featureSet(&[_]Feature{
2342 .addr_lsl_slow_14,
2343 .aes,
23272344 .crc,
2328 .crypto,
23292345 .enable_select_opt,
23302346 .fuse_adrp_add,
23312347 .fuse_aes,
23322348 .fuse_literals,
23332349 .perfmon,
23342350 .predictable_select_expensive,
2351 .sha2,
23352352 .v8a,
23362353 }),
23372354 };
......@@ -2339,14 +2356,68 @@ pub const cpu = struct {
23392356 .name = "cortex_a720",
23402357 .llvm_name = "cortex-a720",
23412358 .features = featureSet(&[_]Feature{
2342 .a720,
2359 .alu_lsl_fast,
2360 .ccidx,
2361 .cmp_bcc_fusion,
2362 .enable_select_opt,
2363 .ete,
2364 .fp16fml,
2365 .fuse_adrp_add,
2366 .fuse_aes,
2367 .mte,
2368 .perfmon,
2369 .predictable_select_expensive,
2370 .spe,
2371 .spe_eef,
2372 .ssbs,
2373 .sve2_bitperm,
2374 .use_postra_scheduler,
2375 .v9_2a,
2376 }),
2377 };
2378 pub const cortex_a720ae = CpuModel{
2379 .name = "cortex_a720ae",
2380 .llvm_name = "cortex-a720ae",
2381 .features = featureSet(&[_]Feature{
2382 .alu_lsl_fast,
2383 .ccidx,
2384 .cmp_bcc_fusion,
2385 .enable_select_opt,
2386 .ete,
2387 .fp16fml,
2388 .fuse_adrp_add,
2389 .fuse_aes,
2390 .mte,
2391 .perfmon,
2392 .predictable_select_expensive,
2393 .spe,
2394 .spe_eef,
2395 .ssbs,
2396 .sve2_bitperm,
2397 .use_postra_scheduler,
2398 .v9_2a,
2399 }),
2400 };
2401 pub const cortex_a725 = CpuModel{
2402 .name = "cortex_a725",
2403 .llvm_name = "cortex-a725",
2404 .features = featureSet(&[_]Feature{
2405 .alu_lsl_fast,
2406 .ccidx,
2407 .cmp_bcc_fusion,
2408 .enable_select_opt,
23432409 .ete,
23442410 .fp16fml,
2411 .fuse_adrp_add,
2412 .fuse_aes,
23452413 .mte,
23462414 .perfmon,
2415 .predictable_select_expensive,
23472416 .spe,
23482417 .spe_eef,
2418 .ssbs,
23492419 .sve2_bitperm,
2420 .use_postra_scheduler,
23502421 .v9_2a,
23512422 }),
23522423 };
......@@ -2354,13 +2425,15 @@ pub const cpu = struct {
23542425 .name = "cortex_a73",
23552426 .llvm_name = "cortex-a73",
23562427 .features = featureSet(&[_]Feature{
2428 .addr_lsl_slow_14,
2429 .aes,
23572430 .crc,
2358 .crypto,
23592431 .enable_select_opt,
23602432 .fuse_adrp_add,
23612433 .fuse_aes,
23622434 .perfmon,
23632435 .predictable_select_expensive,
2436 .sha2,
23642437 .v8a,
23652438 }),
23662439 };
......@@ -2368,7 +2441,8 @@ pub const cpu = struct {
23682441 .name = "cortex_a75",
23692442 .llvm_name = "cortex-a75",
23702443 .features = featureSet(&[_]Feature{
2371 .crypto,
2444 .addr_lsl_slow_14,
2445 .aes,
23722446 .dotprod,
23732447 .enable_select_opt,
23742448 .fullfp16,
......@@ -2377,6 +2451,7 @@ pub const cpu = struct {
23772451 .perfmon,
23782452 .predictable_select_expensive,
23792453 .rcpc,
2454 .sha2,
23802455 .v8_2a,
23812456 }),
23822457 };
......@@ -2384,12 +2459,18 @@ pub const cpu = struct {
23842459 .name = "cortex_a76",
23852460 .llvm_name = "cortex-a76",
23862461 .features = featureSet(&[_]Feature{
2387 .a76,
2388 .crypto,
2462 .addr_lsl_slow_14,
2463 .aes,
2464 .alu_lsl_fast,
23892465 .dotprod,
2466 .enable_select_opt,
23902467 .fullfp16,
2468 .fuse_adrp_add,
2469 .fuse_aes,
23912470 .perfmon,
2471 .predictable_select_expensive,
23922472 .rcpc,
2473 .sha2,
23932474 .ssbs,
23942475 .v8_2a,
23952476 }),
......@@ -2398,12 +2479,18 @@ pub const cpu = struct {
23982479 .name = "cortex_a76ae",
23992480 .llvm_name = "cortex-a76ae",
24002481 .features = featureSet(&[_]Feature{
2401 .a76,
2402 .crypto,
2482 .addr_lsl_slow_14,
2483 .aes,
2484 .alu_lsl_fast,
24032485 .dotprod,
2486 .enable_select_opt,
24042487 .fullfp16,
2488 .fuse_adrp_add,
2489 .fuse_aes,
24052490 .perfmon,
2491 .predictable_select_expensive,
24062492 .rcpc,
2493 .sha2,
24072494 .ssbs,
24082495 .v8_2a,
24092496 }),
......@@ -2412,10 +2499,10 @@ pub const cpu = struct {
24122499 .name = "cortex_a77",
24132500 .llvm_name = "cortex-a77",
24142501 .features = featureSet(&[_]Feature{
2415 .addr_lsl_fast,
2502 .addr_lsl_slow_14,
2503 .aes,
24162504 .alu_lsl_fast,
24172505 .cmp_bcc_fusion,
2418 .crypto,
24192506 .dotprod,
24202507 .enable_select_opt,
24212508 .fullfp16,
......@@ -2424,6 +2511,7 @@ pub const cpu = struct {
24242511 .perfmon,
24252512 .predictable_select_expensive,
24262513 .rcpc,
2514 .sha2,
24272515 .ssbs,
24282516 .v8_2a,
24292517 }),
......@@ -2432,14 +2520,45 @@ pub const cpu = struct {
24322520 .name = "cortex_a78",
24332521 .llvm_name = "cortex-a78",
24342522 .features = featureSet(&[_]Feature{
2435 .a78,
2436 .crypto,
2523 .addr_lsl_slow_14,
2524 .aes,
2525 .alu_lsl_fast,
2526 .cmp_bcc_fusion,
2527 .dotprod,
2528 .enable_select_opt,
2529 .fullfp16,
2530 .fuse_adrp_add,
2531 .fuse_aes,
2532 .perfmon,
2533 .predictable_select_expensive,
2534 .rcpc,
2535 .sha2,
2536 .spe,
2537 .ssbs,
2538 .use_postra_scheduler,
2539 .v8_2a,
2540 }),
2541 };
2542 pub const cortex_a78ae = CpuModel{
2543 .name = "cortex_a78ae",
2544 .llvm_name = "cortex-a78ae",
2545 .features = featureSet(&[_]Feature{
2546 .addr_lsl_slow_14,
2547 .aes,
2548 .alu_lsl_fast,
2549 .cmp_bcc_fusion,
24372550 .dotprod,
2551 .enable_select_opt,
24382552 .fullfp16,
2553 .fuse_adrp_add,
2554 .fuse_aes,
24392555 .perfmon,
2556 .predictable_select_expensive,
24402557 .rcpc,
2558 .sha2,
24412559 .spe,
24422560 .ssbs,
2561 .use_postra_scheduler,
24432562 .v8_2a,
24442563 }),
24452564 };
......@@ -2447,16 +2566,24 @@ pub const cpu = struct {
24472566 .name = "cortex_a78c",
24482567 .llvm_name = "cortex-a78c",
24492568 .features = featureSet(&[_]Feature{
2450 .a78c,
2451 .crypto,
2569 .addr_lsl_slow_14,
2570 .aes,
2571 .alu_lsl_fast,
2572 .cmp_bcc_fusion,
24522573 .dotprod,
2574 .enable_select_opt,
24532575 .flagm,
24542576 .fullfp16,
2577 .fuse_adrp_add,
2578 .fuse_aes,
24552579 .pauth,
24562580 .perfmon,
2581 .predictable_select_expensive,
24572582 .rcpc,
2583 .sha2,
24582584 .spe,
24592585 .ssbs,
2586 .use_postra_scheduler,
24602587 .v8_2a,
24612588 }),
24622589 };
......@@ -2464,12 +2591,35 @@ pub const cpu = struct {
24642591 .name = "cortex_r82",
24652592 .llvm_name = "cortex-r82",
24662593 .features = featureSet(&[_]Feature{
2467 .cortex_r82,
2594 .ccdp,
2595 .complxnum,
2596 .dotprod,
24682597 .fp16fml,
2598 .jsconv,
24692599 .perfmon,
24702600 .predres,
2601 .rdm,
24712602 .sb,
24722603 .ssbs,
2604 .use_postra_scheduler,
2605 .v8r,
2606 }),
2607 };
2608 pub const cortex_r82ae = CpuModel{
2609 .name = "cortex_r82ae",
2610 .llvm_name = "cortex-r82ae",
2611 .features = featureSet(&[_]Feature{
2612 .ccdp,
2613 .complxnum,
2614 .dotprod,
2615 .fp16fml,
2616 .jsconv,
2617 .perfmon,
2618 .predres,
2619 .rdm,
2620 .sb,
2621 .ssbs,
2622 .use_postra_scheduler,
24732623 .v8r,
24742624 }),
24752625 };
......@@ -2477,10 +2627,10 @@ pub const cpu = struct {
24772627 .name = "cortex_x1",
24782628 .llvm_name = "cortex-x1",
24792629 .features = featureSet(&[_]Feature{
2480 .addr_lsl_fast,
2630 .addr_lsl_slow_14,
2631 .aes,
24812632 .alu_lsl_fast,
24822633 .cmp_bcc_fusion,
2483 .crypto,
24842634 .dotprod,
24852635 .enable_select_opt,
24862636 .fullfp16,
......@@ -2489,6 +2639,7 @@ pub const cpu = struct {
24892639 .perfmon,
24902640 .predictable_select_expensive,
24912641 .rcpc,
2642 .sha2,
24922643 .spe,
24932644 .ssbs,
24942645 .use_postra_scheduler,
......@@ -2499,10 +2650,10 @@ pub const cpu = struct {
24992650 .name = "cortex_x1c",
25002651 .llvm_name = "cortex-x1c",
25012652 .features = featureSet(&[_]Feature{
2502 .addr_lsl_fast,
2653 .addr_lsl_slow_14,
2654 .aes,
25032655 .alu_lsl_fast,
25042656 .cmp_bcc_fusion,
2505 .crypto,
25062657 .dotprod,
25072658 .enable_select_opt,
25082659 .flagm,
......@@ -2514,6 +2665,7 @@ pub const cpu = struct {
25142665 .perfmon,
25152666 .predictable_select_expensive,
25162667 .rcpc_immo,
2668 .sha2,
25172669 .spe,
25182670 .ssbs,
25192671 .use_postra_scheduler,
......@@ -2524,9 +2676,9 @@ pub const cpu = struct {
25242676 .name = "cortex_x2",
25252677 .llvm_name = "cortex-x2",
25262678 .features = featureSet(&[_]Feature{
2527 .addr_lsl_fast,
25282679 .alu_lsl_fast,
25292680 .bf16,
2681 .ccidx,
25302682 .cmp_bcc_fusion,
25312683 .enable_select_opt,
25322684 .ete,
......@@ -2537,6 +2689,7 @@ pub const cpu = struct {
25372689 .mte,
25382690 .perfmon,
25392691 .predictable_select_expensive,
2692 .ssbs,
25402693 .sve2_bitperm,
25412694 .use_postra_scheduler,
25422695 .v9a,
......@@ -2546,9 +2699,9 @@ pub const cpu = struct {
25462699 .name = "cortex_x3",
25472700 .llvm_name = "cortex-x3",
25482701 .features = featureSet(&[_]Feature{
2549 .addr_lsl_fast,
25502702 .alu_lsl_fast,
25512703 .bf16,
2704 .ccidx,
25522705 .enable_select_opt,
25532706 .ete,
25542707 .fp16fml,
......@@ -2559,6 +2712,7 @@ pub const cpu = struct {
25592712 .perfmon,
25602713 .predictable_select_expensive,
25612714 .spe,
2715 .ssbs,
25622716 .sve2_bitperm,
25632717 .use_postra_scheduler,
25642718 .v9a,
......@@ -2568,8 +2722,30 @@ pub const cpu = struct {
25682722 .name = "cortex_x4",
25692723 .llvm_name = "cortex-x4",
25702724 .features = featureSet(&[_]Feature{
2571 .addr_lsl_fast,
25722725 .alu_lsl_fast,
2726 .ccidx,
2727 .enable_select_opt,
2728 .ete,
2729 .fp16fml,
2730 .fuse_adrp_add,
2731 .fuse_aes,
2732 .mte,
2733 .perfmon,
2734 .predictable_select_expensive,
2735 .spe,
2736 .spe_eef,
2737 .ssbs,
2738 .sve2_bitperm,
2739 .use_postra_scheduler,
2740 .v9_2a,
2741 }),
2742 };
2743 pub const cortex_x925 = CpuModel{
2744 .name = "cortex_x925",
2745 .llvm_name = "cortex-x925",
2746 .features = featureSet(&[_]Feature{
2747 .alu_lsl_fast,
2748 .ccidx,
25732749 .enable_select_opt,
25742750 .ete,
25752751 .fp16fml,
......@@ -2580,6 +2756,7 @@ pub const cpu = struct {
25802756 .predictable_select_expensive,
25812757 .spe,
25822758 .spe_eef,
2759 .ssbs,
25832760 .sve2_bitperm,
25842761 .use_postra_scheduler,
25852762 .v9_2a,
......@@ -2589,14 +2766,15 @@ pub const cpu = struct {
25892766 .name = "cyclone",
25902767 .llvm_name = "cyclone",
25912768 .features = featureSet(&[_]Feature{
2769 .aes,
25922770 .alternate_sextload_cvt_f32_pattern,
25932771 .arith_bcc_fusion,
25942772 .arith_cbz_fusion,
2595 .crypto,
25962773 .disable_latency_sched_heuristic,
25972774 .fuse_aes,
25982775 .fuse_crypto_eor,
25992776 .perfmon,
2777 .sha2,
26002778 .store_pair_suppress,
26012779 .v8a,
26022780 .zcm,
......@@ -2651,10 +2829,9 @@ pub const cpu = struct {
26512829 .name = "exynos_m3",
26522830 .llvm_name = "exynos-m3",
26532831 .features = featureSet(&[_]Feature{
2654 .addr_lsl_fast,
2832 .aes,
26552833 .alu_lsl_fast,
26562834 .crc,
2657 .crypto,
26582835 .exynos_cheap_as_move,
26592836 .force_32bit_jump_tables,
26602837 .fuse_address,
......@@ -2664,6 +2841,7 @@ pub const cpu = struct {
26642841 .fuse_literals,
26652842 .perfmon,
26662843 .predictable_select_expensive,
2844 .sha2,
26672845 .store_pair_suppress,
26682846 .use_postra_scheduler,
26692847 .v8a,
......@@ -2673,11 +2851,10 @@ pub const cpu = struct {
26732851 .name = "exynos_m4",
26742852 .llvm_name = "exynos-m4",
26752853 .features = featureSet(&[_]Feature{
2676 .addr_lsl_fast,
2854 .aes,
26772855 .alu_lsl_fast,
26782856 .arith_bcc_fusion,
26792857 .arith_cbz_fusion,
2680 .crypto,
26812858 .dotprod,
26822859 .exynos_cheap_as_move,
26832860 .force_32bit_jump_tables,
......@@ -2689,6 +2866,7 @@ pub const cpu = struct {
26892866 .fuse_csel,
26902867 .fuse_literals,
26912868 .perfmon,
2869 .sha2,
26922870 .store_pair_suppress,
26932871 .use_postra_scheduler,
26942872 .v8_2a,
......@@ -2699,11 +2877,10 @@ pub const cpu = struct {
26992877 .name = "exynos_m5",
27002878 .llvm_name = "exynos-m5",
27012879 .features = featureSet(&[_]Feature{
2702 .addr_lsl_fast,
2880 .aes,
27032881 .alu_lsl_fast,
27042882 .arith_bcc_fusion,
27052883 .arith_cbz_fusion,
2706 .crypto,
27072884 .dotprod,
27082885 .exynos_cheap_as_move,
27092886 .force_32bit_jump_tables,
......@@ -2715,6 +2892,7 @@ pub const cpu = struct {
27152892 .fuse_csel,
27162893 .fuse_literals,
27172894 .perfmon,
2895 .sha2,
27182896 .store_pair_suppress,
27192897 .use_postra_scheduler,
27202898 .v8_2a,
......@@ -2725,13 +2903,13 @@ pub const cpu = struct {
27252903 .name = "falkor",
27262904 .llvm_name = "falkor",
27272905 .features = featureSet(&[_]Feature{
2728 .addr_lsl_fast,
2906 .aes,
27292907 .alu_lsl_fast,
27302908 .crc,
2731 .crypto,
27322909 .perfmon,
27332910 .predictable_select_expensive,
27342911 .rdm,
2912 .sha2,
27352913 .slow_strqro_store,
27362914 .store_pair_suppress,
27372915 .use_postra_scheduler,
......@@ -2751,16 +2929,42 @@ pub const cpu = struct {
27512929 .use_postra_scheduler,
27522930 }),
27532931 };
2932 pub const grace = CpuModel{
2933 .name = "grace",
2934 .llvm_name = "grace",
2935 .features = featureSet(&[_]Feature{
2936 .alu_lsl_fast,
2937 .bf16,
2938 .ccidx,
2939 .cmp_bcc_fusion,
2940 .enable_select_opt,
2941 .ete,
2942 .fp16fml,
2943 .fuse_adrp_add,
2944 .fuse_aes,
2945 .i8mm,
2946 .mte,
2947 .perfmon,
2948 .predictable_select_expensive,
2949 .rand,
2950 .spe,
2951 .ssbs,
2952 .sve2_bitperm,
2953 .use_fixed_over_scalable_if_equal_cost,
2954 .use_postra_scheduler,
2955 .v9a,
2956 }),
2957 };
27542958 pub const kryo = CpuModel{
27552959 .name = "kryo",
27562960 .llvm_name = "kryo",
27572961 .features = featureSet(&[_]Feature{
2758 .addr_lsl_fast,
2962 .aes,
27592963 .alu_lsl_fast,
27602964 .crc,
2761 .crypto,
27622965 .perfmon,
27632966 .predictable_select_expensive,
2967 .sha2,
27642968 .store_pair_suppress,
27652969 .use_postra_scheduler,
27662970 .v8a,
......@@ -2771,11 +2975,11 @@ pub const cpu = struct {
27712975 .name = "neoverse_512tvb",
27722976 .llvm_name = "neoverse-512tvb",
27732977 .features = featureSet(&[_]Feature{
2774 .addr_lsl_fast,
2978 .aes,
27752979 .alu_lsl_fast,
27762980 .bf16,
27772981 .ccdp,
2778 .crypto,
2982 .ccidx,
27792983 .enable_select_opt,
27802984 .fp16fml,
27812985 .fuse_adrp_add,
......@@ -2784,6 +2988,8 @@ pub const cpu = struct {
27842988 .perfmon,
27852989 .predictable_select_expensive,
27862990 .rand,
2991 .sha3,
2992 .sm4,
27872993 .spe,
27882994 .ssbs,
27892995 .sve,
......@@ -2795,13 +3001,14 @@ pub const cpu = struct {
27953001 .name = "neoverse_e1",
27963002 .llvm_name = "neoverse-e1",
27973003 .features = featureSet(&[_]Feature{
2798 .crypto,
3004 .aes,
27993005 .dotprod,
28003006 .fullfp16,
28013007 .fuse_adrp_add,
28023008 .fuse_aes,
28033009 .perfmon,
28043010 .rcpc,
3011 .sha2,
28053012 .ssbs,
28063013 .use_postra_scheduler,
28073014 .v8_2a,
......@@ -2811,9 +3018,9 @@ pub const cpu = struct {
28113018 .name = "neoverse_n1",
28123019 .llvm_name = "neoverse-n1",
28133020 .features = featureSet(&[_]Feature{
2814 .addr_lsl_fast,
3021 .addr_lsl_slow_14,
3022 .aes,
28153023 .alu_lsl_fast,
2816 .crypto,
28173024 .dotprod,
28183025 .enable_select_opt,
28193026 .fullfp16,
......@@ -2822,6 +3029,7 @@ pub const cpu = struct {
28223029 .perfmon,
28233030 .predictable_select_expensive,
28243031 .rcpc,
3032 .sha2,
28253033 .spe,
28263034 .ssbs,
28273035 .use_postra_scheduler,
......@@ -2832,31 +3040,57 @@ pub const cpu = struct {
28323040 .name = "neoverse_n2",
28333041 .llvm_name = "neoverse-n2",
28343042 .features = featureSet(&[_]Feature{
2835 .addr_lsl_fast,
28363043 .alu_lsl_fast,
28373044 .bf16,
3045 .ccidx,
28383046 .enable_select_opt,
28393047 .ete,
3048 .fp16fml,
28403049 .fuse_adrp_add,
28413050 .fuse_aes,
28423051 .i8mm,
28433052 .mte,
28443053 .perfmon,
28453054 .predictable_select_expensive,
3055 .ssbs,
28463056 .sve2_bitperm,
28473057 .use_postra_scheduler,
28483058 .v9a,
28493059 }),
28503060 };
3061 pub const neoverse_n3 = CpuModel{
3062 .name = "neoverse_n3",
3063 .llvm_name = "neoverse-n3",
3064 .features = featureSet(&[_]Feature{
3065 .alu_lsl_fast,
3066 .ccidx,
3067 .enable_select_opt,
3068 .ete,
3069 .fp16fml,
3070 .fuse_adrp_add,
3071 .fuse_aes,
3072 .mte,
3073 .perfmon,
3074 .predictable_select_expensive,
3075 .rand,
3076 .spe,
3077 .spe_eef,
3078 .ssbs,
3079 .sve2_bitperm,
3080 .use_postra_scheduler,
3081 .v9_2a,
3082 }),
3083 };
28513084 pub const neoverse_v1 = CpuModel{
28523085 .name = "neoverse_v1",
28533086 .llvm_name = "neoverse-v1",
28543087 .features = featureSet(&[_]Feature{
2855 .addr_lsl_fast,
3088 .addr_lsl_slow_14,
3089 .aes,
28563090 .alu_lsl_fast,
28573091 .bf16,
28583092 .ccdp,
2859 .crypto,
3093 .ccidx,
28603094 .enable_select_opt,
28613095 .fp16fml,
28623096 .fuse_adrp_add,
......@@ -2866,6 +3100,8 @@ pub const cpu = struct {
28663100 .perfmon,
28673101 .predictable_select_expensive,
28683102 .rand,
3103 .sha3,
3104 .sm4,
28693105 .spe,
28703106 .ssbs,
28713107 .sve,
......@@ -2877,9 +3113,10 @@ pub const cpu = struct {
28773113 .name = "neoverse_v2",
28783114 .llvm_name = "neoverse-v2",
28793115 .features = featureSet(&[_]Feature{
2880 .addr_lsl_fast,
28813116 .alu_lsl_fast,
28823117 .bf16,
3118 .ccidx,
3119 .cmp_bcc_fusion,
28833120 .enable_select_opt,
28843121 .ete,
28853122 .fp16fml,
......@@ -2891,20 +3128,97 @@ pub const cpu = struct {
28913128 .predictable_select_expensive,
28923129 .rand,
28933130 .spe,
3131 .ssbs,
28943132 .sve2_bitperm,
3133 .use_fixed_over_scalable_if_equal_cost,
28953134 .use_postra_scheduler,
28963135 .v9a,
28973136 }),
28983137 };
3138 pub const neoverse_v3 = CpuModel{
3139 .name = "neoverse_v3",
3140 .llvm_name = "neoverse-v3",
3141 .features = featureSet(&[_]Feature{
3142 .alu_lsl_fast,
3143 .brbe,
3144 .ccidx,
3145 .enable_select_opt,
3146 .ete,
3147 .fp16fml,
3148 .fuse_adrp_add,
3149 .fuse_aes,
3150 .ls64,
3151 .mte,
3152 .perfmon,
3153 .predictable_select_expensive,
3154 .rand,
3155 .rme,
3156 .spe,
3157 .spe_eef,
3158 .ssbs,
3159 .sve2_bitperm,
3160 .use_postra_scheduler,
3161 .v9_2a,
3162 }),
3163 };
3164 pub const neoverse_v3ae = CpuModel{
3165 .name = "neoverse_v3ae",
3166 .llvm_name = "neoverse-v3ae",
3167 .features = featureSet(&[_]Feature{
3168 .alu_lsl_fast,
3169 .brbe,
3170 .ccidx,
3171 .enable_select_opt,
3172 .ete,
3173 .fp16fml,
3174 .fuse_adrp_add,
3175 .fuse_aes,
3176 .ls64,
3177 .mte,
3178 .perfmon,
3179 .predictable_select_expensive,
3180 .rand,
3181 .rme,
3182 .spe,
3183 .spe_eef,
3184 .ssbs,
3185 .sve2_bitperm,
3186 .use_postra_scheduler,
3187 .v9_2a,
3188 }),
3189 };
3190 pub const oryon_1 = CpuModel{
3191 .name = "oryon_1",
3192 .llvm_name = "oryon-1",
3193 .features = featureSet(&[_]Feature{
3194 .aes,
3195 .ccidx,
3196 .enable_select_opt,
3197 .fp16fml,
3198 .fuse_address,
3199 .fuse_adrp_add,
3200 .fuse_aes,
3201 .fuse_crypto_eor,
3202 .perfmon,
3203 .rand,
3204 .sha3,
3205 .sm4,
3206 .spe,
3207 .ssbs,
3208 .use_postra_scheduler,
3209 .v8_6a,
3210 }),
3211 };
28993212 pub const saphira = CpuModel{
29003213 .name = "saphira",
29013214 .llvm_name = "saphira",
29023215 .features = featureSet(&[_]Feature{
2903 .addr_lsl_fast,
3216 .aes,
29043217 .alu_lsl_fast,
2905 .crypto,
3218 .ccidx,
29063219 .perfmon,
29073220 .predictable_select_expensive,
3221 .sha2,
29083222 .spe,
29093223 .store_pair_suppress,
29103224 .use_postra_scheduler,
......@@ -2916,10 +3230,11 @@ pub const cpu = struct {
29163230 .name = "thunderx",
29173231 .llvm_name = "thunderx",
29183232 .features = featureSet(&[_]Feature{
3233 .aes,
29193234 .crc,
2920 .crypto,
29213235 .perfmon,
29223236 .predictable_select_expensive,
3237 .sha2,
29233238 .store_pair_suppress,
29243239 .use_postra_scheduler,
29253240 .v8a,
......@@ -2929,10 +3244,11 @@ pub const cpu = struct {
29293244 .name = "thunderx2t99",
29303245 .llvm_name = "thunderx2t99",
29313246 .features = featureSet(&[_]Feature{
3247 .aes,
29323248 .aggressive_fma,
29333249 .arith_bcc_fusion,
2934 .crypto,
29353250 .predictable_select_expensive,
3251 .sha2,
29363252 .store_pair_suppress,
29373253 .use_postra_scheduler,
29383254 .v8_1a,
......@@ -2942,12 +3258,14 @@ pub const cpu = struct {
29423258 .name = "thunderx3t110",
29433259 .llvm_name = "thunderx3t110",
29443260 .features = featureSet(&[_]Feature{
3261 .aes,
29453262 .aggressive_fma,
29463263 .arith_bcc_fusion,
29473264 .balance_fp_ops,
2948 .crypto,
3265 .ccidx,
29493266 .perfmon,
29503267 .predictable_select_expensive,
3268 .sha2,
29513269 .store_pair_suppress,
29523270 .strict_align,
29533271 .use_postra_scheduler,
......@@ -2958,10 +3276,11 @@ pub const cpu = struct {
29583276 .name = "thunderxt81",
29593277 .llvm_name = "thunderxt81",
29603278 .features = featureSet(&[_]Feature{
3279 .aes,
29613280 .crc,
2962 .crypto,
29633281 .perfmon,
29643282 .predictable_select_expensive,
3283 .sha2,
29653284 .store_pair_suppress,
29663285 .use_postra_scheduler,
29673286 .v8a,
......@@ -2971,10 +3290,11 @@ pub const cpu = struct {
29713290 .name = "thunderxt83",
29723291 .llvm_name = "thunderxt83",
29733292 .features = featureSet(&[_]Feature{
3293 .aes,
29743294 .crc,
2975 .crypto,
29763295 .perfmon,
29773296 .predictable_select_expensive,
3297 .sha2,
29783298 .store_pair_suppress,
29793299 .use_postra_scheduler,
29803300 .v8a,
......@@ -2984,10 +3304,11 @@ pub const cpu = struct {
29843304 .name = "thunderxt88",
29853305 .llvm_name = "thunderxt88",
29863306 .features = featureSet(&[_]Feature{
3307 .aes,
29873308 .crc,
2988 .crypto,
29893309 .perfmon,
29903310 .predictable_select_expensive,
3311 .sha2,
29913312 .store_pair_suppress,
29923313 .use_postra_scheduler,
29933314 .v8a,
......@@ -2997,13 +3318,14 @@ pub const cpu = struct {
29973318 .name = "tsv110",
29983319 .llvm_name = "tsv110",
29993320 .features = featureSet(&[_]Feature{
3321 .aes,
30003322 .complxnum,
3001 .crypto,
30023323 .dotprod,
30033324 .fp16fml,
30043325 .fuse_aes,
30053326 .jsconv,
30063327 .perfmon,
3328 .sha2,
30073329 .spe,
30083330 .store_pair_suppress,
30093331 .use_postra_scheduler,
lib/std/Target/amdgpu.zig+325-30
......@@ -8,16 +8,23 @@ pub const Feature = enum {
88 @"16_bit_insts",
99 a16,
1010 add_no_carry_insts,
11 agent_scope_fine_grained_remote_memory_atomics,
12 allocate1_5xvgprs,
1113 aperture_regs,
1214 architected_flat_scratch,
1315 architected_sgprs,
1416 atomic_buffer_global_pk_add_f16_insts,
1517 atomic_buffer_global_pk_add_f16_no_rtn_insts,
18 atomic_buffer_pk_add_bf16_inst,
1619 atomic_csub_no_rtn_insts,
1720 atomic_ds_pk_add_16_insts,
1821 atomic_fadd_no_rtn_insts,
1922 atomic_fadd_rtn_insts,
2023 atomic_flat_pk_add_16_insts,
24 atomic_fmin_fmax_flat_f32,
25 atomic_fmin_fmax_flat_f64,
26 atomic_fmin_fmax_global_f32,
27 atomic_fmin_fmax_global_f64,
2128 atomic_global_pk_add_bf16_inst,
2229 auto_waitcnt_before_barrier,
2330 back_off_barrier,
......@@ -27,6 +34,7 @@ pub const Feature = enum {
2734 default_component_zero,
2835 dl_insts,
2936 dot10_insts,
37 dot11_insts,
3038 dot1_insts,
3139 dot2_insts,
3240 dot3_insts,
......@@ -47,6 +55,7 @@ pub const Feature = enum {
4755 fast_fmaf,
4856 flat_address_space,
4957 flat_atomic_fadd_f32_inst,
58 flat_buffer_global_fadd_f64_inst,
5059 flat_for_global,
5160 flat_global_insts,
5261 flat_inst_offsets,
......@@ -71,7 +80,6 @@ pub const Feature = enum {
7180 gfx10_b_encoding,
7281 gfx10_insts,
7382 gfx11,
74 gfx11_full_vgprs,
7583 gfx11_insts,
7684 gfx12,
7785 gfx12_insts,
......@@ -101,9 +109,12 @@ pub const Feature = enum {
101109 mad_mac_f32_insts,
102110 mad_mix_insts,
103111 mai_insts,
112 max_hard_clause_length_32,
113 max_hard_clause_length_63,
104114 max_private_element_size_16,
105115 max_private_element_size_4,
106116 max_private_element_size_8,
117 memory_atomic_fadd_f32_denormal_support,
107118 mfma_inline_literal_bug,
108119 mimg_r128,
109120 movrel,
......@@ -120,11 +131,15 @@ pub const Feature = enum {
120131 packed_tid,
121132 partial_nsa_encoding,
122133 pk_fmac_f16_inst,
134 precise_memory,
135 priv_enabled_trap2_nop_bug,
123136 promote_alloca,
124137 prt_strict_null,
125138 pseudo_scalar_trans,
126139 r128_a16,
127140 real_true16,
141 required_export_priority,
142 requires_cov6,
128143 restricted_soffset,
129144 s_memrealtime,
130145 s_memtime_inst,
......@@ -201,6 +216,16 @@ pub const all_features = blk: {
201216 .description = "Have VALU add/sub instructions without carry out",
202217 .dependencies = featureSet(&[_]Feature{}),
203218 };
219 result[@intFromEnum(Feature.agent_scope_fine_grained_remote_memory_atomics)] = .{
220 .llvm_name = "agent-scope-fine-grained-remote-memory-atomics",
221 .description = "Agent (device) scoped atomic operations, excluding those directly supported by PCIe (i.e. integer atomic add, exchange, and compare-and-swap), are functional for allocations in host or peer device memory.",
222 .dependencies = featureSet(&[_]Feature{}),
223 };
224 result[@intFromEnum(Feature.allocate1_5xvgprs)] = .{
225 .llvm_name = "allocate1_5xvgprs",
226 .description = "Has 50% more physical VGPRs and 50% larger allocation granule",
227 .dependencies = featureSet(&[_]Feature{}),
228 };
204229 result[@intFromEnum(Feature.aperture_regs)] = .{
205230 .llvm_name = "aperture-regs",
206231 .description = "Has Memory Aperture Base and Size Registers",
......@@ -230,6 +255,11 @@ pub const all_features = blk: {
230255 .flat_global_insts,
231256 }),
232257 };
258 result[@intFromEnum(Feature.atomic_buffer_pk_add_bf16_inst)] = .{
259 .llvm_name = "atomic-buffer-pk-add-bf16-inst",
260 .description = "Has buffer_atomic_pk_add_bf16 instruction",
261 .dependencies = featureSet(&[_]Feature{}),
262 };
233263 result[@intFromEnum(Feature.atomic_csub_no_rtn_insts)] = .{
234264 .llvm_name = "atomic-csub-no-rtn-insts",
235265 .description = "Has buffer_atomic_csub and global_atomic_csub instructions that don't return original value",
......@@ -259,6 +289,26 @@ pub const all_features = blk: {
259289 .description = "Has flat_atomic_pk_add_f16 and flat_atomic_pk_add_bf16 instructions",
260290 .dependencies = featureSet(&[_]Feature{}),
261291 };
292 result[@intFromEnum(Feature.atomic_fmin_fmax_flat_f32)] = .{
293 .llvm_name = "atomic-fmin-fmax-flat-f32",
294 .description = "Has flat memory instructions for atomicrmw fmin/fmax for float",
295 .dependencies = featureSet(&[_]Feature{}),
296 };
297 result[@intFromEnum(Feature.atomic_fmin_fmax_flat_f64)] = .{
298 .llvm_name = "atomic-fmin-fmax-flat-f64",
299 .description = "Has flat memory instructions for atomicrmw fmin/fmax for double",
300 .dependencies = featureSet(&[_]Feature{}),
301 };
302 result[@intFromEnum(Feature.atomic_fmin_fmax_global_f32)] = .{
303 .llvm_name = "atomic-fmin-fmax-global-f32",
304 .description = "Has global/buffer instructions for atomicrmw fmin/fmax for float",
305 .dependencies = featureSet(&[_]Feature{}),
306 };
307 result[@intFromEnum(Feature.atomic_fmin_fmax_global_f64)] = .{
308 .llvm_name = "atomic-fmin-fmax-global-f64",
309 .description = "Has global/buffer instructions for atomicrmw fmin/fmax for float",
310 .dependencies = featureSet(&[_]Feature{}),
311 };
262312 result[@intFromEnum(Feature.atomic_global_pk_add_bf16_inst)] = .{
263313 .llvm_name = "atomic-global-pk-add-bf16-inst",
264314 .description = "Has global_atomic_pk_add_bf16 instruction",
......@@ -306,6 +356,11 @@ pub const all_features = blk: {
306356 .description = "Has v_dot2_f32_f16 instruction",
307357 .dependencies = featureSet(&[_]Feature{}),
308358 };
359 result[@intFromEnum(Feature.dot11_insts)] = .{
360 .llvm_name = "dot11-insts",
361 .description = "Has v_dot4_f32_fp8_fp8, v_dot4_f32_fp8_bf8, v_dot4_f32_bf8_fp8, v_dot4_f32_bf8_bf8 instructions",
362 .dependencies = featureSet(&[_]Feature{}),
363 };
309364 result[@intFromEnum(Feature.dot1_insts)] = .{
310365 .llvm_name = "dot1-insts",
311366 .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
......@@ -406,6 +461,11 @@ pub const all_features = blk: {
406461 .description = "Has flat_atomic_add_f32 instruction",
407462 .dependencies = featureSet(&[_]Feature{}),
408463 };
464 result[@intFromEnum(Feature.flat_buffer_global_fadd_f64_inst)] = .{
465 .llvm_name = "flat-buffer-global-fadd-f64-inst",
466 .description = "Has flat, buffer, and global instructions for f64 atomic fadd",
467 .dependencies = featureSet(&[_]Feature{}),
468 };
409469 result[@intFromEnum(Feature.flat_for_global)] = .{
410470 .llvm_name = "flat-for-global",
411471 .description = "Force to generate flat instruction for global",
......@@ -504,6 +564,10 @@ pub const all_features = blk: {
504564 .a16,
505565 .add_no_carry_insts,
506566 .aperture_regs,
567 .atomic_fmin_fmax_flat_f32,
568 .atomic_fmin_fmax_flat_f64,
569 .atomic_fmin_fmax_global_f32,
570 .atomic_fmin_fmax_global_f64,
507571 .ci_insts,
508572 .default_component_zero,
509573 .dpp,
......@@ -527,6 +591,7 @@ pub const all_features = blk: {
527591 .int_clamp_insts,
528592 .inv_2pi_inline_imm,
529593 .localmemorysize65536,
594 .max_hard_clause_length_63,
530595 .mimg_r128,
531596 .movrel,
532597 .no_data_dep_hazard,
......@@ -573,6 +638,8 @@ pub const all_features = blk: {
573638 .a16,
574639 .add_no_carry_insts,
575640 .aperture_regs,
641 .atomic_fmin_fmax_flat_f32,
642 .atomic_fmin_fmax_global_f32,
576643 .ci_insts,
577644 .default_component_zero,
578645 .dpp,
......@@ -599,6 +666,7 @@ pub const all_features = blk: {
599666 .int_clamp_insts,
600667 .inv_2pi_inline_imm,
601668 .localmemorysize65536,
669 .max_hard_clause_length_32,
602670 .mimg_r128,
603671 .movrel,
604672 .no_data_dep_hazard,
......@@ -613,11 +681,6 @@ pub const all_features = blk: {
613681 .vscnt,
614682 }),
615683 };
616 result[@intFromEnum(Feature.gfx11_full_vgprs)] = .{
617 .llvm_name = "gfx11-full-vgprs",
618 .description = "GFX11 with 50% more physical VGPRs and 50% larger allocation granule than GFX10",
619 .dependencies = featureSet(&[_]Feature{}),
620 };
621684 result[@intFromEnum(Feature.gfx11_insts)] = .{
622685 .llvm_name = "gfx11-insts",
623686 .description = "Additional instructions for GFX11+",
......@@ -630,7 +693,10 @@ pub const all_features = blk: {
630693 .@"16_bit_insts",
631694 .a16,
632695 .add_no_carry_insts,
696 .agent_scope_fine_grained_remote_memory_atomics,
633697 .aperture_regs,
698 .atomic_fmin_fmax_flat_f32,
699 .atomic_fmin_fmax_global_f32,
634700 .ci_insts,
635701 .default_component_broadcast,
636702 .dpp,
......@@ -655,6 +721,7 @@ pub const all_features = blk: {
655721 .int_clamp_insts,
656722 .inv_2pi_inline_imm,
657723 .localmemorysize65536,
724 .max_hard_clause_length_32,
658725 .mimg_r128,
659726 .movrel,
660727 .no_data_dep_hazard,
......@@ -844,6 +911,16 @@ pub const all_features = blk: {
844911 .description = "Has mAI instructions",
845912 .dependencies = featureSet(&[_]Feature{}),
846913 };
914 result[@intFromEnum(Feature.max_hard_clause_length_32)] = .{
915 .llvm_name = "max-hard-clause-length-32",
916 .description = "Maximum number of instructions in an explicit S_CLAUSE is 32",
917 .dependencies = featureSet(&[_]Feature{}),
918 };
919 result[@intFromEnum(Feature.max_hard_clause_length_63)] = .{
920 .llvm_name = "max-hard-clause-length-63",
921 .description = "Maximum number of instructions in an explicit S_CLAUSE is 63",
922 .dependencies = featureSet(&[_]Feature{}),
923 };
847924 result[@intFromEnum(Feature.max_private_element_size_16)] = .{
848925 .llvm_name = "max-private-element-size-16",
849926 .description = "Maximum private access size may be 16",
......@@ -859,6 +936,11 @@ pub const all_features = blk: {
859936 .description = "Maximum private access size may be 8",
860937 .dependencies = featureSet(&[_]Feature{}),
861938 };
939 result[@intFromEnum(Feature.memory_atomic_fadd_f32_denormal_support)] = .{
940 .llvm_name = "memory-atomic-fadd-f32-denormal-support",
941 .description = "global/flat/buffer atomic fadd for float supports denormal handling",
942 .dependencies = featureSet(&[_]Feature{}),
943 };
862944 result[@intFromEnum(Feature.mfma_inline_literal_bug)] = .{
863945 .llvm_name = "mfma-inline-literal-bug",
864946 .description = "MFMA cannot use inline literal as SrcC",
......@@ -939,6 +1021,16 @@ pub const all_features = blk: {
9391021 .description = "Has v_pk_fmac_f16 instruction",
9401022 .dependencies = featureSet(&[_]Feature{}),
9411023 };
1024 result[@intFromEnum(Feature.precise_memory)] = .{
1025 .llvm_name = "precise-memory",
1026 .description = "Enable precise memory mode",
1027 .dependencies = featureSet(&[_]Feature{}),
1028 };
1029 result[@intFromEnum(Feature.priv_enabled_trap2_nop_bug)] = .{
1030 .llvm_name = "priv-enabled-trap2-nop-bug",
1031 .description = "Hardware that runs with PRIV=1 interpreting 's_trap 2' as a nop bug",
1032 .dependencies = featureSet(&[_]Feature{}),
1033 };
9421034 result[@intFromEnum(Feature.promote_alloca)] = .{
9431035 .llvm_name = "promote-alloca",
9441036 .description = "Enable promote alloca pass",
......@@ -964,6 +1056,16 @@ pub const all_features = blk: {
9641056 .description = "Use true 16-bit registers",
9651057 .dependencies = featureSet(&[_]Feature{}),
9661058 };
1059 result[@intFromEnum(Feature.required_export_priority)] = .{
1060 .llvm_name = "required-export-priority",
1061 .description = "Export priority must be explicitly manipulated on GFX11.5",
1062 .dependencies = featureSet(&[_]Feature{}),
1063 };
1064 result[@intFromEnum(Feature.requires_cov6)] = .{
1065 .llvm_name = "requires-cov6",
1066 .description = "Target Requires Code Object V6",
1067 .dependencies = featureSet(&[_]Feature{}),
1068 };
9671069 result[@intFromEnum(Feature.restricted_soffset)] = .{
9681070 .llvm_name = "restricted-soffset",
9691071 .description = "Has restricted SOffset (immediate not supported).",
......@@ -1038,6 +1140,10 @@ pub const all_features = blk: {
10381140 .llvm_name = "sea-islands",
10391141 .description = "SEA_ISLANDS GPU generation",
10401142 .dependencies = featureSet(&[_]Feature{
1143 .atomic_fmin_fmax_flat_f32,
1144 .atomic_fmin_fmax_flat_f64,
1145 .atomic_fmin_fmax_global_f32,
1146 .atomic_fmin_fmax_global_f64,
10411147 .ci_insts,
10421148 .default_component_zero,
10431149 .ds_src2_insts,
......@@ -1087,6 +1193,8 @@ pub const all_features = blk: {
10871193 .llvm_name = "southern-islands",
10881194 .description = "SOUTHERN_ISLANDS GPU generation",
10891195 .dependencies = featureSet(&[_]Feature{
1196 .atomic_fmin_fmax_global_f32,
1197 .atomic_fmin_fmax_global_f64,
10901198 .default_component_zero,
10911199 .ds_src2_insts,
10921200 .extended_image_insts,
......@@ -1365,7 +1473,6 @@ pub const cpu = struct {
13651473 .vcmpx_exec_war_hazard,
13661474 .vcmpx_permlane_hazard,
13671475 .vmem_to_scalar_write_hazard,
1368 .wavefrontsize32,
13691476 .xnack_support,
13701477 }),
13711478 };
......@@ -1402,7 +1509,6 @@ pub const cpu = struct {
14021509 .vcmpx_exec_war_hazard,
14031510 .vcmpx_permlane_hazard,
14041511 .vmem_to_scalar_write_hazard,
1405 .wavefrontsize32,
14061512 .xnack_support,
14071513 }),
14081514 };
......@@ -1439,7 +1545,6 @@ pub const cpu = struct {
14391545 .vcmpx_exec_war_hazard,
14401546 .vcmpx_permlane_hazard,
14411547 .vmem_to_scalar_write_hazard,
1442 .wavefrontsize32,
14431548 .xnack_support,
14441549 }),
14451550 };
......@@ -1471,7 +1576,6 @@ pub const cpu = struct {
14711576 .vcmpx_exec_war_hazard,
14721577 .vcmpx_permlane_hazard,
14731578 .vmem_to_scalar_write_hazard,
1474 .wavefrontsize32,
14751579 .xnack_support,
14761580 }),
14771581 };
......@@ -1494,7 +1598,6 @@ pub const cpu = struct {
14941598 .ldsbankcount32,
14951599 .nsa_encoding,
14961600 .shader_cycles_register,
1497 .wavefrontsize32,
14981601 }),
14991602 };
15001603 pub const gfx1031 = CpuModel{
......@@ -1516,7 +1619,6 @@ pub const cpu = struct {
15161619 .ldsbankcount32,
15171620 .nsa_encoding,
15181621 .shader_cycles_register,
1519 .wavefrontsize32,
15201622 }),
15211623 };
15221624 pub const gfx1032 = CpuModel{
......@@ -1538,7 +1640,6 @@ pub const cpu = struct {
15381640 .ldsbankcount32,
15391641 .nsa_encoding,
15401642 .shader_cycles_register,
1541 .wavefrontsize32,
15421643 }),
15431644 };
15441645 pub const gfx1033 = CpuModel{
......@@ -1560,7 +1661,6 @@ pub const cpu = struct {
15601661 .ldsbankcount32,
15611662 .nsa_encoding,
15621663 .shader_cycles_register,
1563 .wavefrontsize32,
15641664 }),
15651665 };
15661666 pub const gfx1034 = CpuModel{
......@@ -1582,7 +1682,6 @@ pub const cpu = struct {
15821682 .ldsbankcount32,
15831683 .nsa_encoding,
15841684 .shader_cycles_register,
1585 .wavefrontsize32,
15861685 }),
15871686 };
15881687 pub const gfx1035 = CpuModel{
......@@ -1604,7 +1703,6 @@ pub const cpu = struct {
16041703 .ldsbankcount32,
16051704 .nsa_encoding,
16061705 .shader_cycles_register,
1607 .wavefrontsize32,
16081706 }),
16091707 };
16101708 pub const gfx1036 = CpuModel{
......@@ -1626,13 +1724,66 @@ pub const cpu = struct {
16261724 .ldsbankcount32,
16271725 .nsa_encoding,
16281726 .shader_cycles_register,
1629 .wavefrontsize32,
1727 }),
1728 };
1729 pub const gfx10_1_generic = CpuModel{
1730 .name = "gfx10_1_generic",
1731 .llvm_name = "gfx10-1-generic",
1732 .features = featureSet(&[_]Feature{
1733 .back_off_barrier,
1734 .dl_insts,
1735 .ds_src2_insts,
1736 .flat_segment_offset_bug,
1737 .get_wave_id_inst,
1738 .gfx10,
1739 .inst_fwd_prefetch_bug,
1740 .lds_branch_vmem_war_hazard,
1741 .lds_misaligned_bug,
1742 .ldsbankcount32,
1743 .mad_mac_f32_insts,
1744 .negative_unaligned_scratch_offset_bug,
1745 .nsa_clause_bug,
1746 .nsa_encoding,
1747 .nsa_to_vmem_bug,
1748 .offset_3f_bug,
1749 .requires_cov6,
1750 .scalar_atomics,
1751 .scalar_flat_scratch_insts,
1752 .scalar_stores,
1753 .smem_to_vector_write_hazard,
1754 .vcmpx_exec_war_hazard,
1755 .vcmpx_permlane_hazard,
1756 .vmem_to_scalar_write_hazard,
1757 .xnack_support,
1758 }),
1759 };
1760 pub const gfx10_3_generic = CpuModel{
1761 .name = "gfx10_3_generic",
1762 .llvm_name = "gfx10-3-generic",
1763 .features = featureSet(&[_]Feature{
1764 .back_off_barrier,
1765 .dl_insts,
1766 .dot10_insts,
1767 .dot1_insts,
1768 .dot2_insts,
1769 .dot5_insts,
1770 .dot6_insts,
1771 .dot7_insts,
1772 .gfx10,
1773 .gfx10_3_insts,
1774 .gfx10_a_encoding,
1775 .gfx10_b_encoding,
1776 .ldsbankcount32,
1777 .nsa_encoding,
1778 .requires_cov6,
1779 .shader_cycles_register,
16301780 }),
16311781 };
16321782 pub const gfx1100 = CpuModel{
16331783 .name = "gfx1100",
16341784 .llvm_name = "gfx1100",
16351785 .features = featureSet(&[_]Feature{
1786 .allocate1_5xvgprs,
16361787 .architected_flat_scratch,
16371788 .atomic_fadd_no_rtn_insts,
16381789 .atomic_fadd_rtn_insts,
......@@ -1644,25 +1795,26 @@ pub const cpu = struct {
16441795 .dot9_insts,
16451796 .flat_atomic_fadd_f32_inst,
16461797 .gfx11,
1647 .gfx11_full_vgprs,
16481798 .image_insts,
16491799 .ldsbankcount32,
16501800 .mad_intra_fwd_bug,
1801 .memory_atomic_fadd_f32_denormal_support,
16511802 .msaa_load_dst_sel_bug,
16521803 .nsa_encoding,
16531804 .packed_tid,
16541805 .partial_nsa_encoding,
1806 .priv_enabled_trap2_nop_bug,
16551807 .shader_cycles_register,
16561808 .user_sgpr_init16_bug,
16571809 .valu_trans_use_hazard,
16581810 .vcmpx_permlane_hazard,
1659 .wavefrontsize32,
16601811 }),
16611812 };
16621813 pub const gfx1101 = CpuModel{
16631814 .name = "gfx1101",
16641815 .llvm_name = "gfx1101",
16651816 .features = featureSet(&[_]Feature{
1817 .allocate1_5xvgprs,
16661818 .architected_flat_scratch,
16671819 .atomic_fadd_no_rtn_insts,
16681820 .atomic_fadd_rtn_insts,
......@@ -1674,18 +1826,18 @@ pub const cpu = struct {
16741826 .dot9_insts,
16751827 .flat_atomic_fadd_f32_inst,
16761828 .gfx11,
1677 .gfx11_full_vgprs,
16781829 .image_insts,
16791830 .ldsbankcount32,
16801831 .mad_intra_fwd_bug,
1832 .memory_atomic_fadd_f32_denormal_support,
16811833 .msaa_load_dst_sel_bug,
16821834 .nsa_encoding,
16831835 .packed_tid,
16841836 .partial_nsa_encoding,
1837 .priv_enabled_trap2_nop_bug,
16851838 .shader_cycles_register,
16861839 .valu_trans_use_hazard,
16871840 .vcmpx_permlane_hazard,
1688 .wavefrontsize32,
16891841 }),
16901842 };
16911843 pub const gfx1102 = CpuModel{
......@@ -1706,15 +1858,16 @@ pub const cpu = struct {
17061858 .image_insts,
17071859 .ldsbankcount32,
17081860 .mad_intra_fwd_bug,
1861 .memory_atomic_fadd_f32_denormal_support,
17091862 .msaa_load_dst_sel_bug,
17101863 .nsa_encoding,
17111864 .packed_tid,
17121865 .partial_nsa_encoding,
1866 .priv_enabled_trap2_nop_bug,
17131867 .shader_cycles_register,
17141868 .user_sgpr_init16_bug,
17151869 .valu_trans_use_hazard,
17161870 .vcmpx_permlane_hazard,
1717 .wavefrontsize32,
17181871 }),
17191872 };
17201873 pub const gfx1103 = CpuModel{
......@@ -1735,14 +1888,15 @@ pub const cpu = struct {
17351888 .image_insts,
17361889 .ldsbankcount32,
17371890 .mad_intra_fwd_bug,
1891 .memory_atomic_fadd_f32_denormal_support,
17381892 .msaa_load_dst_sel_bug,
17391893 .nsa_encoding,
17401894 .packed_tid,
17411895 .partial_nsa_encoding,
1896 .priv_enabled_trap2_nop_bug,
17421897 .shader_cycles_register,
17431898 .valu_trans_use_hazard,
17441899 .vcmpx_permlane_hazard,
1745 .wavefrontsize32,
17461900 }),
17471901 };
17481902 pub const gfx1150 = CpuModel{
......@@ -1763,21 +1917,22 @@ pub const cpu = struct {
17631917 .gfx11,
17641918 .image_insts,
17651919 .ldsbankcount32,
1766 .mad_intra_fwd_bug,
1920 .memory_atomic_fadd_f32_denormal_support,
17671921 .nsa_encoding,
17681922 .packed_tid,
17691923 .partial_nsa_encoding,
1924 .required_export_priority,
17701925 .salu_float,
17711926 .shader_cycles_register,
17721927 .vcmpx_permlane_hazard,
17731928 .vgpr_singleuse_hint,
1774 .wavefrontsize32,
17751929 }),
17761930 };
17771931 pub const gfx1151 = CpuModel{
17781932 .name = "gfx1151",
17791933 .llvm_name = "gfx1151",
17801934 .features = featureSet(&[_]Feature{
1935 .allocate1_5xvgprs,
17811936 .architected_flat_scratch,
17821937 .atomic_fadd_no_rtn_insts,
17831938 .atomic_fadd_rtn_insts,
......@@ -1790,27 +1945,89 @@ pub const cpu = struct {
17901945 .dpp_src1_sgpr,
17911946 .flat_atomic_fadd_f32_inst,
17921947 .gfx11,
1793 .gfx11_full_vgprs,
17941948 .image_insts,
17951949 .ldsbankcount32,
1796 .mad_intra_fwd_bug,
1950 .memory_atomic_fadd_f32_denormal_support,
1951 .nsa_encoding,
1952 .packed_tid,
1953 .partial_nsa_encoding,
1954 .required_export_priority,
1955 .salu_float,
1956 .shader_cycles_register,
1957 .vcmpx_permlane_hazard,
1958 .vgpr_singleuse_hint,
1959 }),
1960 };
1961 pub const gfx1152 = CpuModel{
1962 .name = "gfx1152",
1963 .llvm_name = "gfx1152",
1964 .features = featureSet(&[_]Feature{
1965 .architected_flat_scratch,
1966 .atomic_fadd_no_rtn_insts,
1967 .atomic_fadd_rtn_insts,
1968 .dl_insts,
1969 .dot10_insts,
1970 .dot5_insts,
1971 .dot7_insts,
1972 .dot8_insts,
1973 .dot9_insts,
1974 .dpp_src1_sgpr,
1975 .flat_atomic_fadd_f32_inst,
1976 .gfx11,
1977 .image_insts,
1978 .ldsbankcount32,
1979 .memory_atomic_fadd_f32_denormal_support,
17971980 .nsa_encoding,
17981981 .packed_tid,
17991982 .partial_nsa_encoding,
1983 .required_export_priority,
18001984 .salu_float,
18011985 .shader_cycles_register,
18021986 .vcmpx_permlane_hazard,
18031987 .vgpr_singleuse_hint,
1804 .wavefrontsize32,
1988 }),
1989 };
1990 pub const gfx11_generic = CpuModel{
1991 .name = "gfx11_generic",
1992 .llvm_name = "gfx11-generic",
1993 .features = featureSet(&[_]Feature{
1994 .architected_flat_scratch,
1995 .atomic_fadd_no_rtn_insts,
1996 .atomic_fadd_rtn_insts,
1997 .dl_insts,
1998 .dot10_insts,
1999 .dot5_insts,
2000 .dot7_insts,
2001 .dot8_insts,
2002 .dot9_insts,
2003 .flat_atomic_fadd_f32_inst,
2004 .gfx11,
2005 .image_insts,
2006 .ldsbankcount32,
2007 .mad_intra_fwd_bug,
2008 .memory_atomic_fadd_f32_denormal_support,
2009 .msaa_load_dst_sel_bug,
2010 .nsa_encoding,
2011 .packed_tid,
2012 .partial_nsa_encoding,
2013 .priv_enabled_trap2_nop_bug,
2014 .required_export_priority,
2015 .requires_cov6,
2016 .shader_cycles_register,
2017 .user_sgpr_init16_bug,
2018 .valu_trans_use_hazard,
2019 .vcmpx_permlane_hazard,
18052020 }),
18062021 };
18072022 pub const gfx1200 = CpuModel{
18082023 .name = "gfx1200",
18092024 .llvm_name = "gfx1200",
18102025 .features = featureSet(&[_]Feature{
2026 .allocate1_5xvgprs,
18112027 .architected_flat_scratch,
18122028 .architected_sgprs,
18132029 .atomic_buffer_global_pk_add_f16_insts,
2030 .atomic_buffer_pk_add_bf16_inst,
18142031 .atomic_ds_pk_add_16_insts,
18152032 .atomic_fadd_no_rtn_insts,
18162033 .atomic_fadd_rtn_insts,
......@@ -1818,6 +2035,7 @@ pub const cpu = struct {
18182035 .atomic_global_pk_add_bf16_inst,
18192036 .dl_insts,
18202037 .dot10_insts,
2038 .dot11_insts,
18212039 .dot7_insts,
18222040 .dot8_insts,
18232041 .dot9_insts,
......@@ -1828,6 +2046,7 @@ pub const cpu = struct {
18282046 .gfx12,
18292047 .image_insts,
18302048 .ldsbankcount32,
2049 .memory_atomic_fadd_f32_denormal_support,
18312050 .nsa_encoding,
18322051 .packed_tid,
18332052 .partial_nsa_encoding,
......@@ -1838,16 +2057,17 @@ pub const cpu = struct {
18382057 .shader_cycles_hi_lo_registers,
18392058 .vcmpx_permlane_hazard,
18402059 .vgpr_singleuse_hint,
1841 .wavefrontsize32,
18422060 }),
18432061 };
18442062 pub const gfx1201 = CpuModel{
18452063 .name = "gfx1201",
18462064 .llvm_name = "gfx1201",
18472065 .features = featureSet(&[_]Feature{
2066 .allocate1_5xvgprs,
18482067 .architected_flat_scratch,
18492068 .architected_sgprs,
18502069 .atomic_buffer_global_pk_add_f16_insts,
2070 .atomic_buffer_pk_add_bf16_inst,
18512071 .atomic_ds_pk_add_16_insts,
18522072 .atomic_fadd_no_rtn_insts,
18532073 .atomic_fadd_rtn_insts,
......@@ -1855,6 +2075,7 @@ pub const cpu = struct {
18552075 .atomic_global_pk_add_bf16_inst,
18562076 .dl_insts,
18572077 .dot10_insts,
2078 .dot11_insts,
18582079 .dot7_insts,
18592080 .dot8_insts,
18602081 .dot9_insts,
......@@ -1865,6 +2086,7 @@ pub const cpu = struct {
18652086 .gfx12,
18662087 .image_insts,
18672088 .ldsbankcount32,
2089 .memory_atomic_fadd_f32_denormal_support,
18682090 .nsa_encoding,
18692091 .packed_tid,
18702092 .partial_nsa_encoding,
......@@ -1875,7 +2097,47 @@ pub const cpu = struct {
18752097 .shader_cycles_hi_lo_registers,
18762098 .vcmpx_permlane_hazard,
18772099 .vgpr_singleuse_hint,
1878 .wavefrontsize32,
2100 }),
2101 };
2102 pub const gfx12_generic = CpuModel{
2103 .name = "gfx12_generic",
2104 .llvm_name = "gfx12-generic",
2105 .features = featureSet(&[_]Feature{
2106 .allocate1_5xvgprs,
2107 .architected_flat_scratch,
2108 .architected_sgprs,
2109 .atomic_buffer_global_pk_add_f16_insts,
2110 .atomic_buffer_pk_add_bf16_inst,
2111 .atomic_ds_pk_add_16_insts,
2112 .atomic_fadd_no_rtn_insts,
2113 .atomic_fadd_rtn_insts,
2114 .atomic_flat_pk_add_16_insts,
2115 .atomic_global_pk_add_bf16_inst,
2116 .dl_insts,
2117 .dot10_insts,
2118 .dot11_insts,
2119 .dot7_insts,
2120 .dot8_insts,
2121 .dot9_insts,
2122 .dpp_src1_sgpr,
2123 .extended_image_insts,
2124 .flat_atomic_fadd_f32_inst,
2125 .fp8_conversion_insts,
2126 .gfx12,
2127 .image_insts,
2128 .ldsbankcount32,
2129 .memory_atomic_fadd_f32_denormal_support,
2130 .nsa_encoding,
2131 .packed_tid,
2132 .partial_nsa_encoding,
2133 .pseudo_scalar_trans,
2134 .requires_cov6,
2135 .restricted_soffset,
2136 .salu_float,
2137 .scalar_dwordx3_loads,
2138 .shader_cycles_hi_lo_registers,
2139 .vcmpx_permlane_hazard,
2140 .vgpr_singleuse_hint,
18792141 }),
18802142 };
18812143 pub const gfx600 = CpuModel{
......@@ -2124,6 +2386,8 @@ pub const cpu = struct {
21242386 .atomic_buffer_global_pk_add_f16_insts,
21252387 .atomic_fadd_no_rtn_insts,
21262388 .atomic_fadd_rtn_insts,
2389 .atomic_fmin_fmax_flat_f64,
2390 .atomic_fmin_fmax_global_f64,
21272391 .back_off_barrier,
21282392 .dl_insts,
21292393 .dot10_insts,
......@@ -2135,6 +2399,7 @@ pub const cpu = struct {
21352399 .dot6_insts,
21362400 .dot7_insts,
21372401 .dpp_64bit,
2402 .flat_buffer_global_fadd_f64_inst,
21382403 .fma_mix_insts,
21392404 .fmacf64_inst,
21402405 .full_rate_64_ops,
......@@ -2170,12 +2435,15 @@ pub const cpu = struct {
21702435 .name = "gfx940",
21712436 .llvm_name = "gfx940",
21722437 .features = featureSet(&[_]Feature{
2438 .agent_scope_fine_grained_remote_memory_atomics,
21732439 .architected_flat_scratch,
21742440 .atomic_buffer_global_pk_add_f16_insts,
21752441 .atomic_ds_pk_add_16_insts,
21762442 .atomic_fadd_no_rtn_insts,
21772443 .atomic_fadd_rtn_insts,
21782444 .atomic_flat_pk_add_16_insts,
2445 .atomic_fmin_fmax_flat_f64,
2446 .atomic_fmin_fmax_global_f64,
21792447 .atomic_global_pk_add_bf16_inst,
21802448 .back_off_barrier,
21812449 .dl_insts,
......@@ -2189,6 +2457,7 @@ pub const cpu = struct {
21892457 .dot7_insts,
21902458 .dpp_64bit,
21912459 .flat_atomic_fadd_f32_inst,
2460 .flat_buffer_global_fadd_f64_inst,
21922461 .fma_mix_insts,
21932462 .fmacf64_inst,
21942463 .force_store_sc0_sc1,
......@@ -2201,6 +2470,7 @@ pub const cpu = struct {
22012470 .kernarg_preload,
22022471 .ldsbankcount32,
22032472 .mai_insts,
2473 .memory_atomic_fadd_f32_denormal_support,
22042474 .packed_fp32_ops,
22052475 .packed_tid,
22062476 .pk_fmac_f16_inst,
......@@ -2211,12 +2481,15 @@ pub const cpu = struct {
22112481 .name = "gfx941",
22122482 .llvm_name = "gfx941",
22132483 .features = featureSet(&[_]Feature{
2484 .agent_scope_fine_grained_remote_memory_atomics,
22142485 .architected_flat_scratch,
22152486 .atomic_buffer_global_pk_add_f16_insts,
22162487 .atomic_ds_pk_add_16_insts,
22172488 .atomic_fadd_no_rtn_insts,
22182489 .atomic_fadd_rtn_insts,
22192490 .atomic_flat_pk_add_16_insts,
2491 .atomic_fmin_fmax_flat_f64,
2492 .atomic_fmin_fmax_global_f64,
22202493 .atomic_global_pk_add_bf16_inst,
22212494 .back_off_barrier,
22222495 .dl_insts,
......@@ -2230,6 +2503,7 @@ pub const cpu = struct {
22302503 .dot7_insts,
22312504 .dpp_64bit,
22322505 .flat_atomic_fadd_f32_inst,
2506 .flat_buffer_global_fadd_f64_inst,
22332507 .fma_mix_insts,
22342508 .fmacf64_inst,
22352509 .force_store_sc0_sc1,
......@@ -2242,6 +2516,7 @@ pub const cpu = struct {
22422516 .kernarg_preload,
22432517 .ldsbankcount32,
22442518 .mai_insts,
2519 .memory_atomic_fadd_f32_denormal_support,
22452520 .packed_fp32_ops,
22462521 .packed_tid,
22472522 .pk_fmac_f16_inst,
......@@ -2252,12 +2527,15 @@ pub const cpu = struct {
22522527 .name = "gfx942",
22532528 .llvm_name = "gfx942",
22542529 .features = featureSet(&[_]Feature{
2530 .agent_scope_fine_grained_remote_memory_atomics,
22552531 .architected_flat_scratch,
22562532 .atomic_buffer_global_pk_add_f16_insts,
22572533 .atomic_ds_pk_add_16_insts,
22582534 .atomic_fadd_no_rtn_insts,
22592535 .atomic_fadd_rtn_insts,
22602536 .atomic_flat_pk_add_16_insts,
2537 .atomic_fmin_fmax_flat_f64,
2538 .atomic_fmin_fmax_global_f64,
22612539 .atomic_global_pk_add_bf16_inst,
22622540 .back_off_barrier,
22632541 .dl_insts,
......@@ -2271,6 +2549,7 @@ pub const cpu = struct {
22712549 .dot7_insts,
22722550 .dpp_64bit,
22732551 .flat_atomic_fadd_f32_inst,
2552 .flat_buffer_global_fadd_f64_inst,
22742553 .fma_mix_insts,
22752554 .fmacf64_inst,
22762555 .fp8_conversion_insts,
......@@ -2282,12 +2561,28 @@ pub const cpu = struct {
22822561 .kernarg_preload,
22832562 .ldsbankcount32,
22842563 .mai_insts,
2564 .memory_atomic_fadd_f32_denormal_support,
22852565 .packed_fp32_ops,
22862566 .packed_tid,
22872567 .pk_fmac_f16_inst,
22882568 .sramecc_support,
22892569 }),
22902570 };
2571 pub const gfx9_generic = CpuModel{
2572 .name = "gfx9_generic",
2573 .llvm_name = "gfx9-generic",
2574 .features = featureSet(&[_]Feature{
2575 .ds_src2_insts,
2576 .extended_image_insts,
2577 .gds,
2578 .gfx9,
2579 .image_gather4_d16_bug,
2580 .image_insts,
2581 .ldsbankcount32,
2582 .mad_mac_f32_insts,
2583 .requires_cov6,
2584 }),
2585 };
22912586 pub const hainan = CpuModel{
22922587 .name = "hainan",
22932588 .llvm_name = "hainan",
lib/std/Target/arm.zig+90-72
......@@ -7,9 +7,7 @@ const CpuModel = std.Target.Cpu.Model;
77pub const Feature = enum {
88 @"32bit",
99 @"8msecext",
10 a76,
1110 aapcs_frame_chain,
12 aapcs_frame_chain_leaf,
1311 aclass,
1412 acquire_release,
1513 aes,
......@@ -40,7 +38,6 @@ pub const Feature = enum {
4038 dsp,
4139 execute_only,
4240 expand_fp_mlx,
43 exynos,
4441 fix_cmse_cve_2021_35465,
4542 fix_cortex_a57_aes_1742098,
4643 fp16,
......@@ -96,7 +93,6 @@ pub const Feature = enum {
9693 lob,
9794 long_calls,
9895 loop_align,
99 m3,
10096 mclass,
10197 mp,
10298 muxed_units,
......@@ -120,7 +116,6 @@ pub const Feature = enum {
120116 prefer_ishst,
121117 prefer_vmovsr,
122118 prof_unpr,
123 r4,
124119 ras,
125120 rclass,
126121 read_tp_tpidrprw,
......@@ -140,7 +135,6 @@ pub const Feature = enum {
140135 soft_float,
141136 splat_vfp_neon,
142137 strict_align,
143 swift,
144138 thumb2,
145139 thumb_mode,
146140 trustzone,
......@@ -228,23 +222,11 @@ pub const all_features = blk: {
228222 .description = "Enable support for ARMv8-M Security Extensions",
229223 .dependencies = featureSet(&[_]Feature{}),
230224 };
231 result[@intFromEnum(Feature.a76)] = .{
232 .llvm_name = "a76",
233 .description = "Cortex-A76 ARM processors",
234 .dependencies = featureSet(&[_]Feature{}),
235 };
236225 result[@intFromEnum(Feature.aapcs_frame_chain)] = .{
237226 .llvm_name = "aapcs-frame-chain",
238227 .description = "Create an AAPCS compliant frame chain",
239228 .dependencies = featureSet(&[_]Feature{}),
240229 };
241 result[@intFromEnum(Feature.aapcs_frame_chain_leaf)] = .{
242 .llvm_name = "aapcs-frame-chain-leaf",
243 .description = "Create an AAPCS compliant frame chain for leaf functions",
244 .dependencies = featureSet(&[_]Feature{
245 .aapcs_frame_chain,
246 }),
247 };
248230 result[@intFromEnum(Feature.aclass)] = .{
249231 .llvm_name = "aclass",
250232 .description = "Is application profile ('A' series)",
......@@ -422,32 +404,9 @@ pub const all_features = blk: {
422404 .description = "Expand VFP/NEON MLA/MLS instructions",
423405 .dependencies = featureSet(&[_]Feature{}),
424406 };
425 result[@intFromEnum(Feature.exynos)] = .{
426 .llvm_name = "exynos",
427 .description = "Samsung Exynos processors",
428 .dependencies = featureSet(&[_]Feature{
429 .crc,
430 .crypto,
431 .expand_fp_mlx,
432 .fuse_aes,
433 .fuse_literals,
434 .hwdiv,
435 .hwdiv_arm,
436 .prof_unpr,
437 .ret_addr_stack,
438 .slow_fp_brcc,
439 .slow_vdup32,
440 .slow_vgetlni32,
441 .slowfpvfmx,
442 .slowfpvmlx,
443 .splat_vfp_neon,
444 .wide_stride_vfp,
445 .zcz,
446 }),
447 };
448407 result[@intFromEnum(Feature.fix_cmse_cve_2021_35465)] = .{
449408 .llvm_name = "fix-cmse-cve-2021-35465",
450 .description = "Mitigate against the cve-2021-35465 security vulnerability",
409 .description = "Mitigate against the cve-2021-35465 security vulnurability",
451410 .dependencies = featureSet(&[_]Feature{}),
452411 };
453412 result[@intFromEnum(Feature.fix_cortex_a57_aes_1742098)] = .{
......@@ -815,11 +774,6 @@ pub const all_features = blk: {
815774 .description = "Prefer 32-bit alignment for loops",
816775 .dependencies = featureSet(&[_]Feature{}),
817776 };
818 result[@intFromEnum(Feature.m3)] = .{
819 .llvm_name = "m3",
820 .description = "Cortex-M3 ARM processors",
821 .dependencies = featureSet(&[_]Feature{}),
822 };
823777 result[@intFromEnum(Feature.mclass)] = .{
824778 .llvm_name = "mclass",
825779 .description = "Is microcontroller profile ('M' series)",
......@@ -945,11 +899,6 @@ pub const all_features = blk: {
945899 .description = "Is profitable to unpredicate",
946900 .dependencies = featureSet(&[_]Feature{}),
947901 };
948 result[@intFromEnum(Feature.r4)] = .{
949 .llvm_name = "r4",
950 .description = "Cortex-R4 ARM processors",
951 .dependencies = featureSet(&[_]Feature{}),
952 };
953902 result[@intFromEnum(Feature.ras)] = .{
954903 .llvm_name = "ras",
955904 .description = "Enable Reliability, Availability and Serviceability extensions",
......@@ -1049,11 +998,6 @@ pub const all_features = blk: {
1049998 .description = "Disallow all unaligned memory access",
1050999 .dependencies = featureSet(&[_]Feature{}),
10511000 };
1052 result[@intFromEnum(Feature.swift)] = .{
1053 .llvm_name = "swift",
1054 .description = "Swift ARM processors",
1055 .dependencies = featureSet(&[_]Feature{}),
1056 };
10571001 result[@intFromEnum(Feature.thumb2)] = .{
10581002 .llvm_name = "thumb2",
10591003 .description = "Enable Thumb2 instructions",
......@@ -1508,10 +1452,9 @@ pub const all_features = blk: {
15081452 .db,
15091453 .dfb,
15101454 .dsp,
1511 .fp_armv8,
1455 .fp_armv8d16sp,
15121456 .has_v8,
15131457 .mp,
1514 .neon,
15151458 .rclass,
15161459 .virtualization,
15171460 }),
......@@ -2104,7 +2047,6 @@ pub const cpu = struct {
21042047 .name = "cortex_a76",
21052048 .llvm_name = "cortex-a76",
21062049 .features = featureSet(&[_]Feature{
2107 .a76,
21082050 .dotprod,
21092051 .fullfp16,
21102052 .v8_2a,
......@@ -2114,7 +2056,6 @@ pub const cpu = struct {
21142056 .name = "cortex_a76ae",
21152057 .llvm_name = "cortex-a76ae",
21162058 .features = featureSet(&[_]Feature{
2117 .a76,
21182059 .dotprod,
21192060 .fullfp16,
21202061 .v8_2a,
......@@ -2138,6 +2079,15 @@ pub const cpu = struct {
21382079 .v8_2a,
21392080 }),
21402081 };
2082 pub const cortex_a78ae = CpuModel{
2083 .name = "cortex_a78ae",
2084 .llvm_name = "cortex-a78ae",
2085 .features = featureSet(&[_]Feature{
2086 .dotprod,
2087 .fullfp16,
2088 .v8_2a,
2089 }),
2090 };
21412091 pub const cortex_a78c = CpuModel{
21422092 .name = "cortex_a78c",
21432093 .llvm_name = "cortex-a78c",
......@@ -2219,7 +2169,6 @@ pub const cpu = struct {
22192169 .llvm_name = "cortex-m3",
22202170 .features = featureSet(&[_]Feature{
22212171 .loop_align,
2222 .m3,
22232172 .no_branch_predictor,
22242173 .use_misched,
22252174 .v7m,
......@@ -2315,7 +2264,6 @@ pub const cpu = struct {
23152264 .llvm_name = "cortex-r4",
23162265 .features = featureSet(&[_]Feature{
23172266 .avoid_partial_cpsr,
2318 .r4,
23192267 .ret_addr_stack,
23202268 .v7r,
23212269 }),
......@@ -2325,7 +2273,6 @@ pub const cpu = struct {
23252273 .llvm_name = "cortex-r4f",
23262274 .features = featureSet(&[_]Feature{
23272275 .avoid_partial_cpsr,
2328 .r4,
23292276 .ret_addr_stack,
23302277 .slow_fp_brcc,
23312278 .slowfpvfmx,
......@@ -2352,7 +2299,20 @@ pub const cpu = struct {
23522299 .name = "cortex_r52",
23532300 .llvm_name = "cortex-r52",
23542301 .features = featureSet(&[_]Feature{
2302 .fp_armv8,
23552303 .fpao,
2304 .neon,
2305 .use_misched,
2306 .v8r,
2307 }),
2308 };
2309 pub const cortex_r52plus = CpuModel{
2310 .name = "cortex_r52plus",
2311 .llvm_name = "cortex-r52plus",
2312 .features = featureSet(&[_]Feature{
2313 .fp_armv8,
2314 .fpao,
2315 .neon,
23562316 .use_misched,
23572317 .v8r,
23582318 }),
......@@ -2418,7 +2378,6 @@ pub const cpu = struct {
24182378 .ret_addr_stack,
24192379 .slowfpvfmx,
24202380 .slowfpvmlx,
2421 .swift,
24222381 .use_misched,
24232382 .v8a,
24242383 .zcz,
......@@ -2435,24 +2394,60 @@ pub const cpu = struct {
24352394 .name = "exynos_m1",
24362395 .llvm_name = null,
24372396 .features = featureSet(&[_]Feature{
2438 .exynos,
2397 .expand_fp_mlx,
2398 .fuse_aes,
2399 .fuse_literals,
2400 .prof_unpr,
2401 .ret_addr_stack,
2402 .slow_fp_brcc,
2403 .slow_vdup32,
2404 .slow_vgetlni32,
2405 .slowfpvfmx,
2406 .slowfpvmlx,
2407 .splat_vfp_neon,
24392408 .v8a,
2409 .wide_stride_vfp,
2410 .zcz,
24402411 }),
24412412 };
24422413 pub const exynos_m2 = CpuModel{
24432414 .name = "exynos_m2",
24442415 .llvm_name = null,
24452416 .features = featureSet(&[_]Feature{
2446 .exynos,
2417 .expand_fp_mlx,
2418 .fuse_aes,
2419 .fuse_literals,
2420 .prof_unpr,
2421 .ret_addr_stack,
2422 .slow_fp_brcc,
2423 .slow_vdup32,
2424 .slow_vgetlni32,
2425 .slowfpvfmx,
2426 .slowfpvmlx,
2427 .splat_vfp_neon,
24472428 .v8a,
2429 .wide_stride_vfp,
2430 .zcz,
24482431 }),
24492432 };
24502433 pub const exynos_m3 = CpuModel{
24512434 .name = "exynos_m3",
24522435 .llvm_name = "exynos-m3",
24532436 .features = featureSet(&[_]Feature{
2454 .exynos,
2437 .expand_fp_mlx,
2438 .fuse_aes,
2439 .fuse_literals,
2440 .prof_unpr,
2441 .ret_addr_stack,
2442 .slow_fp_brcc,
2443 .slow_vdup32,
2444 .slow_vgetlni32,
2445 .slowfpvfmx,
2446 .slowfpvmlx,
2447 .splat_vfp_neon,
24552448 .v8a,
2449 .wide_stride_vfp,
2450 .zcz,
24562451 }),
24572452 };
24582453 pub const exynos_m4 = CpuModel{
......@@ -2460,9 +2455,21 @@ pub const cpu = struct {
24602455 .llvm_name = "exynos-m4",
24612456 .features = featureSet(&[_]Feature{
24622457 .dotprod,
2463 .exynos,
2458 .expand_fp_mlx,
24642459 .fullfp16,
2460 .fuse_aes,
2461 .fuse_literals,
2462 .prof_unpr,
2463 .ret_addr_stack,
2464 .slow_fp_brcc,
2465 .slow_vdup32,
2466 .slow_vgetlni32,
2467 .slowfpvfmx,
2468 .slowfpvmlx,
2469 .splat_vfp_neon,
24652470 .v8_2a,
2471 .wide_stride_vfp,
2472 .zcz,
24662473 }),
24672474 };
24682475 pub const exynos_m5 = CpuModel{
......@@ -2470,9 +2477,21 @@ pub const cpu = struct {
24702477 .llvm_name = "exynos-m5",
24712478 .features = featureSet(&[_]Feature{
24722479 .dotprod,
2473 .exynos,
2480 .expand_fp_mlx,
24742481 .fullfp16,
2482 .fuse_aes,
2483 .fuse_literals,
2484 .prof_unpr,
2485 .ret_addr_stack,
2486 .slow_fp_brcc,
2487 .slow_vdup32,
2488 .slow_vgetlni32,
2489 .slowfpvfmx,
2490 .slowfpvmlx,
2491 .splat_vfp_neon,
24752492 .v8_2a,
2493 .wide_stride_vfp,
2494 .zcz,
24762495 }),
24772496 };
24782497 pub const generic = CpuModel{
......@@ -2538,6 +2557,7 @@ pub const cpu = struct {
25382557 .llvm_name = "neoverse-n2",
25392558 .features = featureSet(&[_]Feature{
25402559 .bf16,
2560 .fp16fml,
25412561 .i8mm,
25422562 .v9a,
25432563 }),
......@@ -2564,7 +2584,6 @@ pub const cpu = struct {
25642584 .name = "sc300",
25652585 .llvm_name = "sc300",
25662586 .features = featureSet(&[_]Feature{
2567 .m3,
25682587 .no_branch_predictor,
25692588 .use_misched,
25702589 .v7m,
......@@ -2618,7 +2637,6 @@ pub const cpu = struct {
26182637 .slow_vgetlni32,
26192638 .slowfpvfmx,
26202639 .slowfpvmlx,
2621 .swift,
26222640 .use_misched,
26232641 .v7a,
26242642 .vfp4,
lib/std/Target/loongarch.zig+18-6
......@@ -7,7 +7,6 @@ const CpuModel = std.Target.Cpu.Model;
77pub const Feature = enum {
88 @"32bit",
99 @"64bit",
10 auto_vec,
1110 d,
1211 f,
1312 frecipe,
......@@ -18,6 +17,7 @@ pub const Feature = enum {
1817 lbt,
1918 lsx,
2019 lvz,
20 prefer_w_inst,
2121 relax,
2222 ual,
2323};
......@@ -41,11 +41,6 @@ pub const all_features = blk: {
4141 .description = "LA64 Basic Integer and Privilege Instruction Set",
4242 .dependencies = featureSet(&[_]Feature{}),
4343 };
44 result[@intFromEnum(Feature.auto_vec)] = .{
45 .llvm_name = "auto-vec",
46 .description = "Experimental auto vectorization",
47 .dependencies = featureSet(&[_]Feature{}),
48 };
4944 result[@intFromEnum(Feature.d)] = .{
5045 .llvm_name = "d",
5146 .description = "'D' (Double-Precision Floating-Point)",
......@@ -102,6 +97,11 @@ pub const all_features = blk: {
10297 .description = "'LVZ' (Loongson Virtualization Extension)",
10398 .dependencies = featureSet(&[_]Feature{}),
10499 };
100 result[@intFromEnum(Feature.prefer_w_inst)] = .{
101 .llvm_name = "prefer-w-inst",
102 .description = "Prefer instructions with W suffix",
103 .dependencies = featureSet(&[_]Feature{}),
104 };
105105 result[@intFromEnum(Feature.relax)] = .{
106106 .llvm_name = "relax",
107107 .description = "Enable Linker relaxation",
......@@ -152,6 +152,18 @@ pub const cpu = struct {
152152 .ual,
153153 }),
154154 };
155 pub const la664 = CpuModel{
156 .name = "la664",
157 .llvm_name = "la664",
158 .features = featureSet(&[_]Feature{
159 .@"64bit",
160 .frecipe,
161 .lasx,
162 .lbt,
163 .lvz,
164 .ual,
165 }),
166 };
155167 pub const loongarch64 = CpuModel{
156168 .name = "loongarch64",
157169 .llvm_name = "loongarch64",
lib/std/Target/mips.zig+6
......@@ -51,6 +51,7 @@ pub const Feature = enum {
5151 ptr64,
5252 single_float,
5353 soft_float,
54 strict_align,
5455 sym32,
5556 use_indirect_jump_hazard,
5657 use_tcc_in_div,
......@@ -356,6 +357,11 @@ pub const all_features = blk: {
356357 .description = "Does not support floating point instructions",
357358 .dependencies = featureSet(&[_]Feature{}),
358359 };
360 result[@intFromEnum(Feature.strict_align)] = .{
361 .llvm_name = "strict-align",
362 .description = "Disable unaligned load store for r6",
363 .dependencies = featureSet(&[_]Feature{}),
364 };
359365 result[@intFromEnum(Feature.sym32)] = .{
360366 .llvm_name = "sym32",
361367 .description = "Symbols are 32 bit on Mips64",
lib/std/Target/nvptx.zig+18
......@@ -13,6 +13,7 @@ pub const Feature = enum {
1313 ptx50,
1414 ptx60,
1515 ptx61,
16 ptx62,
1617 ptx63,
1718 ptx64,
1819 ptx65,
......@@ -29,6 +30,8 @@ pub const Feature = enum {
2930 ptx81,
3031 ptx82,
3132 ptx83,
33 ptx84,
34 ptx85,
3235 sm_20,
3336 sm_21,
3437 sm_30,
......@@ -101,6 +104,11 @@ pub const all_features = blk: {
101104 .description = "Use PTX version 61",
102105 .dependencies = featureSet(&[_]Feature{}),
103106 };
107 result[@intFromEnum(Feature.ptx62)] = .{
108 .llvm_name = "ptx62",
109 .description = "Use PTX version 62",
110 .dependencies = featureSet(&[_]Feature{}),
111 };
104112 result[@intFromEnum(Feature.ptx63)] = .{
105113 .llvm_name = "ptx63",
106114 .description = "Use PTX version 63",
......@@ -181,6 +189,16 @@ pub const all_features = blk: {
181189 .description = "Use PTX version 83",
182190 .dependencies = featureSet(&[_]Feature{}),
183191 };
192 result[@intFromEnum(Feature.ptx84)] = .{
193 .llvm_name = "ptx84",
194 .description = "Use PTX version 84",
195 .dependencies = featureSet(&[_]Feature{}),
196 };
197 result[@intFromEnum(Feature.ptx85)] = .{
198 .llvm_name = "ptx85",
199 .description = "Use PTX version 85",
200 .dependencies = featureSet(&[_]Feature{}),
201 };
184202 result[@intFromEnum(Feature.sm_20)] = .{
185203 .llvm_name = "sm_20",
186204 .description = "Target SM 20",
lib/std/Target/powerpc.zig+61-2
......@@ -8,6 +8,8 @@ pub const Feature = enum {
88 @"64bit",
99 @"64bitregs",
1010 aix,
11 aix_shared_lib_tls_model_opt,
12 aix_small_local_dynamic_tls,
1113 aix_small_local_exec_tls,
1214 allow_unaligned_fp_access,
1315 altivec,
......@@ -113,6 +115,16 @@ pub const all_features = blk: {
113115 .description = "AIX OS",
114116 .dependencies = featureSet(&[_]Feature{}),
115117 };
118 result[@intFromEnum(Feature.aix_shared_lib_tls_model_opt)] = .{
119 .llvm_name = "aix-shared-lib-tls-model-opt",
120 .description = "Tune TLS model at function level in shared library loaded with the main program (for 64-bit AIX only)",
121 .dependencies = featureSet(&[_]Feature{}),
122 };
123 result[@intFromEnum(Feature.aix_small_local_dynamic_tls)] = .{
124 .llvm_name = "aix-small-local-dynamic-tls",
125 .description = "Produce a faster local-dynamic TLS sequence for this function for 64-bit AIX",
126 .dependencies = featureSet(&[_]Feature{}),
127 };
116128 result[@intFromEnum(Feature.aix_small_local_exec_tls)] = .{
117129 .llvm_name = "aix-small-local-exec-tls",
118130 .description = "Produce a TOC-free local-exec TLS sequence for this function for 64-bit AIX",
......@@ -538,8 +550,7 @@ pub const all_features = blk: {
538550 .llvm_name = "prefix-instrs",
539551 .description = "Enable prefixed instructions",
540552 .dependencies = featureSet(&[_]Feature{
541 .power8_vector,
542 .power9_altivec,
553 .isa_v31_instructions,
543554 }),
544555 };
545556 result[@intFromEnum(Feature.privileged)] = .{
......@@ -990,6 +1001,54 @@ pub const cpu = struct {
9901001 .two_const_nr,
9911002 }),
9921003 };
1004 pub const pwr11 = CpuModel{
1005 .name = "pwr11",
1006 .llvm_name = "pwr11",
1007 .features = featureSet(&[_]Feature{
1008 .@"64bit",
1009 .allow_unaligned_fp_access,
1010 .bpermd,
1011 .cmpb,
1012 .crbits,
1013 .crypto,
1014 .direct_move,
1015 .extdiv,
1016 .fast_MFLR,
1017 .fcpsgn,
1018 .fpcvt,
1019 .fprnd,
1020 .fre,
1021 .fres,
1022 .frsqrte,
1023 .frsqrtes,
1024 .fsqrt,
1025 .fuse_add_logical,
1026 .fuse_arith_add,
1027 .fuse_logical,
1028 .fuse_logical_add,
1029 .fuse_sha3,
1030 .fuse_store,
1031 .htm,
1032 .icbt,
1033 .isa_v206_instructions,
1034 .isel,
1035 .ldbrx,
1036 .lfiwax,
1037 .mfocrf,
1038 .mma,
1039 .partword_atomics,
1040 .pcrelative_memops,
1041 .popcntd,
1042 .power10_vector,
1043 .ppc_postra_sched,
1044 .ppc_prera_sched,
1045 .predictable_select_expensive,
1046 .quadword_atomics,
1047 .recipprec,
1048 .stfiwx,
1049 .two_const_nr,
1050 }),
1051 };
9931052 pub const pwr3 = CpuModel{
9941053 .name = "pwr3",
9951054 .llvm_name = "pwr3",
lib/std/Target/riscv.zig+798-76
......@@ -9,32 +9,43 @@ pub const Feature = enum {
99 @"64bit",
1010 a,
1111 auipc_addi_fusion,
12 b,
1213 c,
1314 conditional_cmv_fusion,
1415 d,
1516 dlen_factor_2,
1617 e,
1718 experimental,
19 experimental_rva23s64,
20 experimental_rva23u64,
21 experimental_rvb23s64,
22 experimental_rvb23u64,
23 experimental_rvm23u32,
24 experimental_smmpm,
25 experimental_smnpm,
26 experimental_ssnpm,
27 experimental_sspm,
28 experimental_ssqosid,
29 experimental_supm,
1830 experimental_zacas,
19 experimental_zcmop,
20 experimental_zfbfmin,
31 experimental_zalasr,
2132 experimental_zicfilp,
2233 experimental_zicfiss,
23 experimental_zimop,
24 experimental_ztso,
25 experimental_zvfbfmin,
26 experimental_zvfbfwma,
2734 f,
28 fast_unaligned_access,
2935 forced_atomics,
36 forced_sw_shadow_stack,
3037 h,
3138 i,
3239 ld_add_fusion,
3340 lui_addi_fusion,
3441 m,
3542 no_default_unroll,
36 no_optimized_zero_stride_load,
3743 no_rvc_hints,
44 no_sink_splat_operands,
45 no_trailing_seq_cst_fence,
46 optimized_zero_stride_load,
47 predictable_select_expensive,
48 prefer_w_inst,
3849 relax,
3950 reserve_x1,
4051 reserve_x10,
......@@ -67,18 +78,47 @@ pub const Feature = enum {
6778 reserve_x7,
6879 reserve_x8,
6980 reserve_x9,
81 rva20s64,
82 rva20u64,
83 rva22s64,
84 rva22u64,
85 rvi20u32,
86 rvi20u64,
7087 save_restore,
71 seq_cst_trailing_fence,
88 shcounterenw,
89 shgatpa,
7290 shifted_zextw_fusion,
7391 short_forward_branch_opt,
92 shtvala,
93 shvsatpa,
94 shvstvala,
95 shvstvecd,
7496 smaia,
97 smcdeleg,
98 smcsrind,
7599 smepmp,
100 smstateen,
76101 ssaia,
102 ssccfg,
103 ssccptr,
104 sscofpmf,
105 sscounterenw,
106 sscsrind,
107 ssstateen,
108 ssstrict,
109 sstc,
110 sstvala,
111 sstvecd,
112 ssu64xl,
113 svade,
114 svadu,
115 svbare,
77116 svinval,
78117 svnapot,
79118 svpbmt,
80119 tagged_globals,
81120 unaligned_scalar_mem,
121 unaligned_vector_mem,
82122 use_postra_scheduler,
83123 v,
84124 ventana_veyron,
......@@ -89,11 +129,14 @@ pub const Feature = enum {
89129 xcvmac,
90130 xcvmem,
91131 xcvsimd,
132 xsfcease,
92133 xsfvcp,
93134 xsfvfnrclipxfqf,
94135 xsfvfwmaccqqq,
95136 xsfvqmaccdod,
96137 xsfvqmaccqoq,
138 xsifivecdiscarddlone,
139 xsifivecflushdlone,
97140 xtheadba,
98141 xtheadbb,
99142 xtheadbs,
......@@ -106,8 +149,13 @@ pub const Feature = enum {
106149 xtheadsync,
107150 xtheadvdot,
108151 xventanacondops,
152 xwchc,
109153 za128rs,
110154 za64rs,
155 zaamo,
156 zabha,
157 zalrsc,
158 zama16b,
111159 zawrs,
112160 zba,
113161 zbb,
......@@ -121,12 +169,14 @@ pub const Feature = enum {
121169 zcd,
122170 zce,
123171 zcf,
172 zcmop,
124173 zcmp,
125174 zcmt,
126175 zdinx,
127176 zexth_fusion,
128177 zextw_fusion,
129178 zfa,
179 zfbfmin,
130180 zfh,
131181 zfhmin,
132182 zfinx,
......@@ -147,6 +197,7 @@ pub const Feature = enum {
147197 zihintntl,
148198 zihintpause,
149199 zihpm,
200 zimop,
150201 zk,
151202 zkn,
152203 zknd,
......@@ -158,6 +209,7 @@ pub const Feature = enum {
158209 zksh,
159210 zkt,
160211 zmmul,
212 ztso,
161213 zvbb,
162214 zvbc,
163215 zve32f,
......@@ -165,6 +217,8 @@ pub const Feature = enum {
165217 zve64d,
166218 zve64f,
167219 zve64x,
220 zvfbfmin,
221 zvfbfwma,
168222 zvfh,
169223 zvfhmin,
170224 zvkb,
......@@ -201,6 +255,7 @@ pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny;
201255pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll;
202256
203257pub const all_features = blk: {
258 @setEvalBranchQuota(2000);
204259 const len = @typeInfo(Feature).@"enum".fields.len;
205260 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
206261 var result: [len]CpuFeature = undefined;
......@@ -224,6 +279,15 @@ pub const all_features = blk: {
224279 .description = "Enable AUIPC+ADDI macrofusion",
225280 .dependencies = featureSet(&[_]Feature{}),
226281 };
282 result[@intFromEnum(Feature.b)] = .{
283 .llvm_name = "b",
284 .description = "'B' (the collection of the Zba, Zbb, Zbs extensions)",
285 .dependencies = featureSet(&[_]Feature{
286 .zba,
287 .zbb,
288 .zbs,
289 }),
290 };
227291 result[@intFromEnum(Feature.c)] = .{
228292 .llvm_name = "c",
229293 .description = "'C' (Compressed Instructions)",
......@@ -256,61 +320,261 @@ pub const all_features = blk: {
256320 .description = "Experimental intrinsics",
257321 .dependencies = featureSet(&[_]Feature{}),
258322 };
259 result[@intFromEnum(Feature.experimental_zacas)] = .{
260 .llvm_name = "experimental-zacas",
261 .description = "'Zacas' (Atomic Compare-And-Swap Instructions)",
262 .dependencies = featureSet(&[_]Feature{}),
323 result[@intFromEnum(Feature.experimental_rva23s64)] = .{
324 .llvm_name = "experimental-rva23s64",
325 .description = "RISC-V experimental-rva23s64 profile",
326 .dependencies = featureSet(&[_]Feature{
327 .@"64bit",
328 .a,
329 .c,
330 .experimental_ssnpm,
331 .h,
332 .i,
333 .m,
334 .shcounterenw,
335 .shgatpa,
336 .shtvala,
337 .shvsatpa,
338 .shvstvala,
339 .shvstvecd,
340 .ssccptr,
341 .sscofpmf,
342 .sscounterenw,
343 .ssstateen,
344 .sstc,
345 .sstvala,
346 .sstvecd,
347 .ssu64xl,
348 .svade,
349 .svbare,
350 .svinval,
351 .svnapot,
352 .svpbmt,
353 .v,
354 .za64rs,
355 .zawrs,
356 .zba,
357 .zbb,
358 .zbs,
359 .zcb,
360 .zcmop,
361 .zfa,
362 .zfhmin,
363 .zic64b,
364 .zicbom,
365 .zicbop,
366 .zicboz,
367 .ziccamoa,
368 .ziccif,
369 .zicclsm,
370 .ziccrse,
371 .zicntr,
372 .zicond,
373 .zifencei,
374 .zihintntl,
375 .zihintpause,
376 .zihpm,
377 .zimop,
378 .zkt,
379 .zvbb,
380 .zvfhmin,
381 .zvkt,
382 }),
263383 };
264 result[@intFromEnum(Feature.experimental_zcmop)] = .{
265 .llvm_name = "experimental-zcmop",
266 .description = "'Zcmop' (Compressed May-Be-Operations)",
384 result[@intFromEnum(Feature.experimental_rva23u64)] = .{
385 .llvm_name = "experimental-rva23u64",
386 .description = "RISC-V experimental-rva23u64 profile",
267387 .dependencies = featureSet(&[_]Feature{
268 .zca,
388 .@"64bit",
389 .a,
390 .c,
391 .i,
392 .m,
393 .v,
394 .za64rs,
395 .zawrs,
396 .zba,
397 .zbb,
398 .zbs,
399 .zcb,
400 .zcmop,
401 .zfa,
402 .zfhmin,
403 .zic64b,
404 .zicbom,
405 .zicbop,
406 .zicboz,
407 .ziccamoa,
408 .ziccif,
409 .zicclsm,
410 .ziccrse,
411 .zicntr,
412 .zicond,
413 .zihintntl,
414 .zihintpause,
415 .zihpm,
416 .zimop,
417 .zkt,
418 .zvbb,
419 .zvfhmin,
420 .zvkt,
269421 }),
270422 };
271 result[@intFromEnum(Feature.experimental_zfbfmin)] = .{
272 .llvm_name = "experimental-zfbfmin",
273 .description = "'Zfbfmin' (Scalar BF16 Converts)",
423 result[@intFromEnum(Feature.experimental_rvb23s64)] = .{
424 .llvm_name = "experimental-rvb23s64",
425 .description = "RISC-V experimental-rvb23s64 profile",
274426 .dependencies = featureSet(&[_]Feature{
275 .f,
427 .@"64bit",
428 .a,
429 .c,
430 .d,
431 .i,
432 .m,
433 .ssccptr,
434 .sscofpmf,
435 .sscounterenw,
436 .sstc,
437 .sstvala,
438 .sstvecd,
439 .ssu64xl,
440 .svade,
441 .svbare,
442 .svinval,
443 .svnapot,
444 .svpbmt,
445 .za64rs,
446 .zawrs,
447 .zba,
448 .zbb,
449 .zbs,
450 .zcb,
451 .zcmop,
452 .zfa,
453 .zic64b,
454 .zicbom,
455 .zicbop,
456 .zicboz,
457 .ziccamoa,
458 .ziccif,
459 .zicclsm,
460 .ziccrse,
461 .zicntr,
462 .zicond,
463 .zifencei,
464 .zihintntl,
465 .zihintpause,
466 .zihpm,
467 .zimop,
468 .zkt,
276469 }),
277470 };
278 result[@intFromEnum(Feature.experimental_zicfilp)] = .{
279 .llvm_name = "experimental-zicfilp",
280 .description = "'Zicfilp' (Landing pad)",
281 .dependencies = featureSet(&[_]Feature{}),
471 result[@intFromEnum(Feature.experimental_rvb23u64)] = .{
472 .llvm_name = "experimental-rvb23u64",
473 .description = "RISC-V experimental-rvb23u64 profile",
474 .dependencies = featureSet(&[_]Feature{
475 .@"64bit",
476 .a,
477 .c,
478 .d,
479 .i,
480 .m,
481 .za64rs,
482 .zawrs,
483 .zba,
484 .zbb,
485 .zbs,
486 .zcb,
487 .zcmop,
488 .zfa,
489 .zic64b,
490 .zicbom,
491 .zicbop,
492 .zicboz,
493 .ziccamoa,
494 .ziccif,
495 .zicclsm,
496 .ziccrse,
497 .zicntr,
498 .zicond,
499 .zihintntl,
500 .zihintpause,
501 .zihpm,
502 .zimop,
503 .zkt,
504 }),
282505 };
283 result[@intFromEnum(Feature.experimental_zicfiss)] = .{
284 .llvm_name = "experimental-zicfiss",
285 .description = "'Zicfiss' (Shadow stack)",
506 result[@intFromEnum(Feature.experimental_rvm23u32)] = .{
507 .llvm_name = "experimental-rvm23u32",
508 .description = "RISC-V experimental-rvm23u32 profile",
286509 .dependencies = featureSet(&[_]Feature{
287 .experimental_zimop,
288 .zicsr,
510 .@"32bit",
511 .i,
512 .m,
513 .zba,
514 .zbb,
515 .zbs,
516 .zce,
517 .zcmop,
518 .zicbop,
519 .zicond,
520 .zihintntl,
521 .zihintpause,
522 .zimop,
289523 }),
290524 };
291 result[@intFromEnum(Feature.experimental_zimop)] = .{
292 .llvm_name = "experimental-zimop",
293 .description = "'Zimop' (May-Be-Operations)",
525 result[@intFromEnum(Feature.experimental_smmpm)] = .{
526 .llvm_name = "experimental-smmpm",
527 .description = "'Smmpm' (Machine-level Pointer Masking for M-mode)",
294528 .dependencies = featureSet(&[_]Feature{}),
295529 };
296 result[@intFromEnum(Feature.experimental_ztso)] = .{
297 .llvm_name = "experimental-ztso",
298 .description = "'Ztso' (Memory Model - Total Store Order)",
530 result[@intFromEnum(Feature.experimental_smnpm)] = .{
531 .llvm_name = "experimental-smnpm",
532 .description = "'Smnpm' (Machine-level Pointer Masking for next lower privilege mode)",
299533 .dependencies = featureSet(&[_]Feature{}),
300534 };
301 result[@intFromEnum(Feature.experimental_zvfbfmin)] = .{
302 .llvm_name = "experimental-zvfbfmin",
303 .description = "'Zvbfmin' (Vector BF16 Converts)",
535 result[@intFromEnum(Feature.experimental_ssnpm)] = .{
536 .llvm_name = "experimental-ssnpm",
537 .description = "'Ssnpm' (Supervisor-level Pointer Masking for next lower privilege mode)",
538 .dependencies = featureSet(&[_]Feature{}),
539 };
540 result[@intFromEnum(Feature.experimental_sspm)] = .{
541 .llvm_name = "experimental-sspm",
542 .description = "'Sspm' (Indicates Supervisor-mode Pointer Masking)",
543 .dependencies = featureSet(&[_]Feature{}),
544 };
545 result[@intFromEnum(Feature.experimental_ssqosid)] = .{
546 .llvm_name = "experimental-ssqosid",
547 .description = "'Ssqosid' (Quality-of-Service (QoS) Identifiers)",
548 .dependencies = featureSet(&[_]Feature{}),
549 };
550 result[@intFromEnum(Feature.experimental_supm)] = .{
551 .llvm_name = "experimental-supm",
552 .description = "'Supm' (Indicates User-mode Pointer Masking)",
553 .dependencies = featureSet(&[_]Feature{}),
554 };
555 result[@intFromEnum(Feature.experimental_zacas)] = .{
556 .llvm_name = "experimental-zacas",
557 .description = "'Zacas' (Atomic Compare-And-Swap Instructions)",
558 .dependencies = featureSet(&[_]Feature{}),
559 };
560 result[@intFromEnum(Feature.experimental_zalasr)] = .{
561 .llvm_name = "experimental-zalasr",
562 .description = "'Zalasr' (Load-Acquire and Store-Release Instructions)",
563 .dependencies = featureSet(&[_]Feature{}),
564 };
565 result[@intFromEnum(Feature.experimental_zicfilp)] = .{
566 .llvm_name = "experimental-zicfilp",
567 .description = "'Zicfilp' (Landing pad)",
304568 .dependencies = featureSet(&[_]Feature{
305 .zve32f,
569 .zicsr,
306570 }),
307571 };
308 result[@intFromEnum(Feature.experimental_zvfbfwma)] = .{
309 .llvm_name = "experimental-zvfbfwma",
310 .description = "'Zvfbfwma' (Vector BF16 widening mul-add)",
572 result[@intFromEnum(Feature.experimental_zicfiss)] = .{
573 .llvm_name = "experimental-zicfiss",
574 .description = "'Zicfiss' (Shadow stack)",
311575 .dependencies = featureSet(&[_]Feature{
312 .experimental_zfbfmin,
313 .experimental_zvfbfmin,
576 .zicsr,
577 .zimop,
314578 }),
315579 };
316580 result[@intFromEnum(Feature.f)] = .{
......@@ -320,16 +584,16 @@ pub const all_features = blk: {
320584 .zicsr,
321585 }),
322586 };
323 result[@intFromEnum(Feature.fast_unaligned_access)] = .{
324 .llvm_name = "fast-unaligned-access",
325 .description = "Has reasonably performant unaligned loads and stores (both scalar and vector)",
326 .dependencies = featureSet(&[_]Feature{}),
327 };
328587 result[@intFromEnum(Feature.forced_atomics)] = .{
329588 .llvm_name = "forced-atomics",
330589 .description = "Assume that lock-free native-width atomics are available",
331590 .dependencies = featureSet(&[_]Feature{}),
332591 };
592 result[@intFromEnum(Feature.forced_sw_shadow_stack)] = .{
593 .llvm_name = "forced-sw-shadow-stack",
594 .description = "Implement shadow stack with software.",
595 .dependencies = featureSet(&[_]Feature{}),
596 };
333597 result[@intFromEnum(Feature.h)] = .{
334598 .llvm_name = "h",
335599 .description = "'H' (Hypervisor)",
......@@ -353,23 +617,45 @@ pub const all_features = blk: {
353617 result[@intFromEnum(Feature.m)] = .{
354618 .llvm_name = "m",
355619 .description = "'M' (Integer Multiplication and Division)",
356 .dependencies = featureSet(&[_]Feature{}),
620 .dependencies = featureSet(&[_]Feature{
621 .zmmul,
622 }),
357623 };
358624 result[@intFromEnum(Feature.no_default_unroll)] = .{
359625 .llvm_name = "no-default-unroll",
360626 .description = "Disable default unroll preference.",
361627 .dependencies = featureSet(&[_]Feature{}),
362628 };
363 result[@intFromEnum(Feature.no_optimized_zero_stride_load)] = .{
364 .llvm_name = "no-optimized-zero-stride-load",
365 .description = "Hasn't optimized (perform fewer memory operations)zero-stride vector load",
366 .dependencies = featureSet(&[_]Feature{}),
367 };
368629 result[@intFromEnum(Feature.no_rvc_hints)] = .{
369630 .llvm_name = "no-rvc-hints",
370631 .description = "Disable RVC Hint Instructions.",
371632 .dependencies = featureSet(&[_]Feature{}),
372633 };
634 result[@intFromEnum(Feature.no_sink_splat_operands)] = .{
635 .llvm_name = "no-sink-splat-operands",
636 .description = "Disable sink splat operands to enable .vx, .vf,.wx, and .wf instructions",
637 .dependencies = featureSet(&[_]Feature{}),
638 };
639 result[@intFromEnum(Feature.no_trailing_seq_cst_fence)] = .{
640 .llvm_name = "no-trailing-seq-cst-fence",
641 .description = "Disable trailing fence for seq-cst store.",
642 .dependencies = featureSet(&[_]Feature{}),
643 };
644 result[@intFromEnum(Feature.optimized_zero_stride_load)] = .{
645 .llvm_name = "optimized-zero-stride-load",
646 .description = "Optimized (perform fewer memory operations)zero-stride vector load",
647 .dependencies = featureSet(&[_]Feature{}),
648 };
649 result[@intFromEnum(Feature.predictable_select_expensive)] = .{
650 .llvm_name = "predictable-select-expensive",
651 .description = "Prefer likely predicted branches over selects",
652 .dependencies = featureSet(&[_]Feature{}),
653 };
654 result[@intFromEnum(Feature.prefer_w_inst)] = .{
655 .llvm_name = "prefer-w-inst",
656 .description = "Prefer instructions with W suffix",
657 .dependencies = featureSet(&[_]Feature{}),
658 };
373659 result[@intFromEnum(Feature.relax)] = .{
374660 .llvm_name = "relax",
375661 .description = "Enable Linker relaxation.",
......@@ -530,14 +816,144 @@ pub const all_features = blk: {
530816 .description = "Reserve X9",
531817 .dependencies = featureSet(&[_]Feature{}),
532818 };
819 result[@intFromEnum(Feature.rva20s64)] = .{
820 .llvm_name = "rva20s64",
821 .description = "RISC-V rva20s64 profile",
822 .dependencies = featureSet(&[_]Feature{
823 .@"64bit",
824 .a,
825 .c,
826 .d,
827 .i,
828 .m,
829 .ssccptr,
830 .sstvala,
831 .sstvecd,
832 .svade,
833 .svbare,
834 .za128rs,
835 .ziccamoa,
836 .ziccif,
837 .zicclsm,
838 .ziccrse,
839 .zicntr,
840 .zifencei,
841 }),
842 };
843 result[@intFromEnum(Feature.rva20u64)] = .{
844 .llvm_name = "rva20u64",
845 .description = "RISC-V rva20u64 profile",
846 .dependencies = featureSet(&[_]Feature{
847 .@"64bit",
848 .a,
849 .c,
850 .d,
851 .i,
852 .m,
853 .za128rs,
854 .ziccamoa,
855 .ziccif,
856 .zicclsm,
857 .ziccrse,
858 .zicntr,
859 }),
860 };
861 result[@intFromEnum(Feature.rva22s64)] = .{
862 .llvm_name = "rva22s64",
863 .description = "RISC-V rva22s64 profile",
864 .dependencies = featureSet(&[_]Feature{
865 .@"64bit",
866 .a,
867 .c,
868 .d,
869 .i,
870 .m,
871 .ssccptr,
872 .sscounterenw,
873 .sstvala,
874 .sstvecd,
875 .svade,
876 .svbare,
877 .svinval,
878 .svpbmt,
879 .za64rs,
880 .zba,
881 .zbb,
882 .zbs,
883 .zfhmin,
884 .zic64b,
885 .zicbom,
886 .zicbop,
887 .zicboz,
888 .ziccamoa,
889 .ziccif,
890 .zicclsm,
891 .ziccrse,
892 .zicntr,
893 .zifencei,
894 .zihintpause,
895 .zihpm,
896 .zkt,
897 }),
898 };
899 result[@intFromEnum(Feature.rva22u64)] = .{
900 .llvm_name = "rva22u64",
901 .description = "RISC-V rva22u64 profile",
902 .dependencies = featureSet(&[_]Feature{
903 .@"64bit",
904 .a,
905 .c,
906 .d,
907 .i,
908 .m,
909 .za64rs,
910 .zba,
911 .zbb,
912 .zbs,
913 .zfhmin,
914 .zic64b,
915 .zicbom,
916 .zicbop,
917 .zicboz,
918 .ziccamoa,
919 .ziccif,
920 .zicclsm,
921 .ziccrse,
922 .zicntr,
923 .zihintpause,
924 .zihpm,
925 .zkt,
926 }),
927 };
928 result[@intFromEnum(Feature.rvi20u32)] = .{
929 .llvm_name = "rvi20u32",
930 .description = "RISC-V rvi20u32 profile",
931 .dependencies = featureSet(&[_]Feature{
932 .@"32bit",
933 .i,
934 }),
935 };
936 result[@intFromEnum(Feature.rvi20u64)] = .{
937 .llvm_name = "rvi20u64",
938 .description = "RISC-V rvi20u64 profile",
939 .dependencies = featureSet(&[_]Feature{
940 .@"64bit",
941 .i,
942 }),
943 };
533944 result[@intFromEnum(Feature.save_restore)] = .{
534945 .llvm_name = "save-restore",
535946 .description = "Enable save/restore.",
536947 .dependencies = featureSet(&[_]Feature{}),
537948 };
538 result[@intFromEnum(Feature.seq_cst_trailing_fence)] = .{
539 .llvm_name = "seq-cst-trailing-fence",
540 .description = "Enable trailing fence for seq-cst store.",
949 result[@intFromEnum(Feature.shcounterenw)] = .{
950 .llvm_name = "shcounterenw",
951 .description = "'Shcounterenw' (Support writeable hcounteren enable bit for any hpmcounter that is not read-only zero)",
952 .dependencies = featureSet(&[_]Feature{}),
953 };
954 result[@intFromEnum(Feature.shgatpa)] = .{
955 .llvm_name = "shgatpa",
956 .description = "'Sgatpa' (SvNNx4 mode supported for all modes supported by satp, as well as Bare)",
541957 .dependencies = featureSet(&[_]Feature{}),
542958 };
543959 result[@intFromEnum(Feature.shifted_zextw_fusion)] = .{
......@@ -550,21 +966,126 @@ pub const all_features = blk: {
550966 .description = "Enable short forward branch optimization",
551967 .dependencies = featureSet(&[_]Feature{}),
552968 };
969 result[@intFromEnum(Feature.shtvala)] = .{
970 .llvm_name = "shtvala",
971 .description = "'Shtvala' (htval provides all needed values)",
972 .dependencies = featureSet(&[_]Feature{}),
973 };
974 result[@intFromEnum(Feature.shvsatpa)] = .{
975 .llvm_name = "shvsatpa",
976 .description = "'Svsatpa' (vsatp supports all modes supported by satp)",
977 .dependencies = featureSet(&[_]Feature{}),
978 };
979 result[@intFromEnum(Feature.shvstvala)] = .{
980 .llvm_name = "shvstvala",
981 .description = "'Shvstvala' (vstval provides all needed values)",
982 .dependencies = featureSet(&[_]Feature{}),
983 };
984 result[@intFromEnum(Feature.shvstvecd)] = .{
985 .llvm_name = "shvstvecd",
986 .description = "'Shvstvecd' (vstvec supports Direct mode)",
987 .dependencies = featureSet(&[_]Feature{}),
988 };
553989 result[@intFromEnum(Feature.smaia)] = .{
554990 .llvm_name = "smaia",
555991 .description = "'Smaia' (Advanced Interrupt Architecture Machine Level)",
556992 .dependencies = featureSet(&[_]Feature{}),
557993 };
994 result[@intFromEnum(Feature.smcdeleg)] = .{
995 .llvm_name = "smcdeleg",
996 .description = "'Smcdeleg' (Counter Delegation Machine Level)",
997 .dependencies = featureSet(&[_]Feature{}),
998 };
999 result[@intFromEnum(Feature.smcsrind)] = .{
1000 .llvm_name = "smcsrind",
1001 .description = "'Smcsrind' (Indirect CSR Access Machine Level)",
1002 .dependencies = featureSet(&[_]Feature{}),
1003 };
5581004 result[@intFromEnum(Feature.smepmp)] = .{
5591005 .llvm_name = "smepmp",
5601006 .description = "'Smepmp' (Enhanced Physical Memory Protection)",
5611007 .dependencies = featureSet(&[_]Feature{}),
5621008 };
1009 result[@intFromEnum(Feature.smstateen)] = .{
1010 .llvm_name = "smstateen",
1011 .description = "'Smstateen' (Machine-mode view of the state-enable extension)",
1012 .dependencies = featureSet(&[_]Feature{}),
1013 };
5631014 result[@intFromEnum(Feature.ssaia)] = .{
5641015 .llvm_name = "ssaia",
5651016 .description = "'Ssaia' (Advanced Interrupt Architecture Supervisor Level)",
5661017 .dependencies = featureSet(&[_]Feature{}),
5671018 };
1019 result[@intFromEnum(Feature.ssccfg)] = .{
1020 .llvm_name = "ssccfg",
1021 .description = "'Ssccfg' (Counter Configuration Supervisor Level)",
1022 .dependencies = featureSet(&[_]Feature{}),
1023 };
1024 result[@intFromEnum(Feature.ssccptr)] = .{
1025 .llvm_name = "ssccptr",
1026 .description = "'Ssccptr' (Main memory supports page table reads)",
1027 .dependencies = featureSet(&[_]Feature{}),
1028 };
1029 result[@intFromEnum(Feature.sscofpmf)] = .{
1030 .llvm_name = "sscofpmf",
1031 .description = "'Sscofpmf' (Count Overflow and Mode-Based Filtering)",
1032 .dependencies = featureSet(&[_]Feature{}),
1033 };
1034 result[@intFromEnum(Feature.sscounterenw)] = .{
1035 .llvm_name = "sscounterenw",
1036 .description = "'Sscounterenw' (Support writeable scounteren enable bit for any hpmcounter that is not read-only zero)",
1037 .dependencies = featureSet(&[_]Feature{}),
1038 };
1039 result[@intFromEnum(Feature.sscsrind)] = .{
1040 .llvm_name = "sscsrind",
1041 .description = "'Sscsrind' (Indirect CSR Access Supervisor Level)",
1042 .dependencies = featureSet(&[_]Feature{}),
1043 };
1044 result[@intFromEnum(Feature.ssstateen)] = .{
1045 .llvm_name = "ssstateen",
1046 .description = "'Ssstateen' (Supervisor-mode view of the state-enable extension)",
1047 .dependencies = featureSet(&[_]Feature{}),
1048 };
1049 result[@intFromEnum(Feature.ssstrict)] = .{
1050 .llvm_name = "ssstrict",
1051 .description = "'Ssstrict' (No non-conforming extensions are present)",
1052 .dependencies = featureSet(&[_]Feature{}),
1053 };
1054 result[@intFromEnum(Feature.sstc)] = .{
1055 .llvm_name = "sstc",
1056 .description = "'Sstc' (Supervisor-mode timer interrupts)",
1057 .dependencies = featureSet(&[_]Feature{}),
1058 };
1059 result[@intFromEnum(Feature.sstvala)] = .{
1060 .llvm_name = "sstvala",
1061 .description = "'Sstvala' (stval provides all needed values)",
1062 .dependencies = featureSet(&[_]Feature{}),
1063 };
1064 result[@intFromEnum(Feature.sstvecd)] = .{
1065 .llvm_name = "sstvecd",
1066 .description = "'Sstvecd' (stvec supports Direct mode)",
1067 .dependencies = featureSet(&[_]Feature{}),
1068 };
1069 result[@intFromEnum(Feature.ssu64xl)] = .{
1070 .llvm_name = "ssu64xl",
1071 .description = "'Ssu64xl' (UXLEN=64 supported)",
1072 .dependencies = featureSet(&[_]Feature{}),
1073 };
1074 result[@intFromEnum(Feature.svade)] = .{
1075 .llvm_name = "svade",
1076 .description = "'Svade' (Raise exceptions on improper A/D bits)",
1077 .dependencies = featureSet(&[_]Feature{}),
1078 };
1079 result[@intFromEnum(Feature.svadu)] = .{
1080 .llvm_name = "svadu",
1081 .description = "'Svadu' (Hardware A/D updates)",
1082 .dependencies = featureSet(&[_]Feature{}),
1083 };
1084 result[@intFromEnum(Feature.svbare)] = .{
1085 .llvm_name = "svbare",
1086 .description = "'Svbare' $(satp mode Bare supported)",
1087 .dependencies = featureSet(&[_]Feature{}),
1088 };
5681089 result[@intFromEnum(Feature.svinval)] = .{
5691090 .llvm_name = "svinval",
5701091 .description = "'Svinval' (Fine-Grained Address-Translation Cache Invalidation)",
......@@ -590,6 +1111,11 @@ pub const all_features = blk: {
5901111 .description = "Has reasonably performant unaligned scalar loads and stores",
5911112 .dependencies = featureSet(&[_]Feature{}),
5921113 };
1114 result[@intFromEnum(Feature.unaligned_vector_mem)] = .{
1115 .llvm_name = "unaligned-vector-mem",
1116 .description = "Has reasonably performant unaligned vector loads and stores",
1117 .dependencies = featureSet(&[_]Feature{}),
1118 };
5931119 result[@intFromEnum(Feature.use_postra_scheduler)] = .{
5941120 .llvm_name = "use-postra-scheduler",
5951121 .description = "Schedule again after register allocation",
......@@ -643,6 +1169,11 @@ pub const all_features = blk: {
6431169 .description = "'XCVsimd' (CORE-V SIMD ALU)",
6441170 .dependencies = featureSet(&[_]Feature{}),
6451171 };
1172 result[@intFromEnum(Feature.xsfcease)] = .{
1173 .llvm_name = "xsfcease",
1174 .description = "'XSfcease' (SiFive sf.cease Instruction)",
1175 .dependencies = featureSet(&[_]Feature{}),
1176 };
6461177 result[@intFromEnum(Feature.xsfvcp)] = .{
6471178 .llvm_name = "xsfvcp",
6481179 .description = "'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions)",
......@@ -661,7 +1192,7 @@ pub const all_features = blk: {
6611192 .llvm_name = "xsfvfwmaccqqq",
6621193 .description = "'XSfvfwmaccqqq' (SiFive Matrix Multiply Accumulate Instruction and 4-by-4))",
6631194 .dependencies = featureSet(&[_]Feature{
664 .experimental_zvfbfmin,
1195 .zvfbfmin,
6651196 }),
6661197 };
6671198 result[@intFromEnum(Feature.xsfvqmaccdod)] = .{
......@@ -678,61 +1209,69 @@ pub const all_features = blk: {
6781209 .zve32x,
6791210 }),
6801211 };
1212 result[@intFromEnum(Feature.xsifivecdiscarddlone)] = .{
1213 .llvm_name = "xsifivecdiscarddlone",
1214 .description = "'XSiFivecdiscarddlone' (SiFive sf.cdiscard.d.l1 Instruction)",
1215 .dependencies = featureSet(&[_]Feature{}),
1216 };
1217 result[@intFromEnum(Feature.xsifivecflushdlone)] = .{
1218 .llvm_name = "xsifivecflushdlone",
1219 .description = "'XSiFivecflushdlone' (SiFive sf.cflush.d.l1 Instruction)",
1220 .dependencies = featureSet(&[_]Feature{}),
1221 };
6811222 result[@intFromEnum(Feature.xtheadba)] = .{
6821223 .llvm_name = "xtheadba",
683 .description = "'xtheadba' (T-Head address calculation instructions)",
1224 .description = "'XTHeadBa' (T-Head address calculation instructions)",
6841225 .dependencies = featureSet(&[_]Feature{}),
6851226 };
6861227 result[@intFromEnum(Feature.xtheadbb)] = .{
6871228 .llvm_name = "xtheadbb",
688 .description = "'xtheadbb' (T-Head basic bit-manipulation instructions)",
1229 .description = "'XTHeadBb' (T-Head basic bit-manipulation instructions)",
6891230 .dependencies = featureSet(&[_]Feature{}),
6901231 };
6911232 result[@intFromEnum(Feature.xtheadbs)] = .{
6921233 .llvm_name = "xtheadbs",
693 .description = "'xtheadbs' (T-Head single-bit instructions)",
1234 .description = "'XTHeadBs' (T-Head single-bit instructions)",
6941235 .dependencies = featureSet(&[_]Feature{}),
6951236 };
6961237 result[@intFromEnum(Feature.xtheadcmo)] = .{
6971238 .llvm_name = "xtheadcmo",
698 .description = "'xtheadcmo' (T-Head cache management instructions)",
1239 .description = "'XTHeadCmo' (T-Head cache management instructions)",
6991240 .dependencies = featureSet(&[_]Feature{}),
7001241 };
7011242 result[@intFromEnum(Feature.xtheadcondmov)] = .{
7021243 .llvm_name = "xtheadcondmov",
703 .description = "'xtheadcondmov' (T-Head conditional move instructions)",
1244 .description = "'XTHeadCondMov' (T-Head conditional move instructions)",
7041245 .dependencies = featureSet(&[_]Feature{}),
7051246 };
7061247 result[@intFromEnum(Feature.xtheadfmemidx)] = .{
7071248 .llvm_name = "xtheadfmemidx",
708 .description = "'xtheadfmemidx' (T-Head FP Indexed Memory Operations)",
709 .dependencies = featureSet(&[_]Feature{
710 .f,
711 }),
1249 .description = "'XTHeadFMemIdx' (T-Head FP Indexed Memory Operations)",
1250 .dependencies = featureSet(&[_]Feature{}),
7121251 };
7131252 result[@intFromEnum(Feature.xtheadmac)] = .{
7141253 .llvm_name = "xtheadmac",
715 .description = "'xtheadmac' (T-Head Multiply-Accumulate Instructions)",
1254 .description = "'XTHeadMac' (T-Head Multiply-Accumulate Instructions)",
7161255 .dependencies = featureSet(&[_]Feature{}),
7171256 };
7181257 result[@intFromEnum(Feature.xtheadmemidx)] = .{
7191258 .llvm_name = "xtheadmemidx",
720 .description = "'xtheadmemidx' (T-Head Indexed Memory Operations)",
1259 .description = "'XTHeadMemIdx' (T-Head Indexed Memory Operations)",
7211260 .dependencies = featureSet(&[_]Feature{}),
7221261 };
7231262 result[@intFromEnum(Feature.xtheadmempair)] = .{
7241263 .llvm_name = "xtheadmempair",
725 .description = "'xtheadmempair' (T-Head two-GPR Memory Operations)",
1264 .description = "'XTHeadMemPair' (T-Head two-GPR Memory Operations)",
7261265 .dependencies = featureSet(&[_]Feature{}),
7271266 };
7281267 result[@intFromEnum(Feature.xtheadsync)] = .{
7291268 .llvm_name = "xtheadsync",
730 .description = "'xtheadsync' (T-Head multicore synchronization instructions)",
1269 .description = "'XTHeadSync' (T-Head multicore synchronization instructions)",
7311270 .dependencies = featureSet(&[_]Feature{}),
7321271 };
7331272 result[@intFromEnum(Feature.xtheadvdot)] = .{
7341273 .llvm_name = "xtheadvdot",
735 .description = "'xtheadvdot' (T-Head Vector Extensions for Dot)",
1274 .description = "'XTHeadVdot' (T-Head Vector Extensions for Dot)",
7361275 .dependencies = featureSet(&[_]Feature{
7371276 .v,
7381277 }),
......@@ -742,6 +1281,11 @@ pub const all_features = blk: {
7421281 .description = "'XVentanaCondOps' (Ventana Conditional Ops)",
7431282 .dependencies = featureSet(&[_]Feature{}),
7441283 };
1284 result[@intFromEnum(Feature.xwchc)] = .{
1285 .llvm_name = "xwchc",
1286 .description = "'Xwchc' (WCH/QingKe additional compressed opcodes)",
1287 .dependencies = featureSet(&[_]Feature{}),
1288 };
7451289 result[@intFromEnum(Feature.za128rs)] = .{
7461290 .llvm_name = "za128rs",
7471291 .description = "'Za128rs' (Reservation Set Size of at Most 128 Bytes)",
......@@ -752,6 +1296,26 @@ pub const all_features = blk: {
7521296 .description = "'Za64rs' (Reservation Set Size of at Most 64 Bytes)",
7531297 .dependencies = featureSet(&[_]Feature{}),
7541298 };
1299 result[@intFromEnum(Feature.zaamo)] = .{
1300 .llvm_name = "zaamo",
1301 .description = "'Zaamo' (Atomic Memory Operations)",
1302 .dependencies = featureSet(&[_]Feature{}),
1303 };
1304 result[@intFromEnum(Feature.zabha)] = .{
1305 .llvm_name = "zabha",
1306 .description = "'Zabha' (Byte and Halfword Atomic Memory Operations)",
1307 .dependencies = featureSet(&[_]Feature{}),
1308 };
1309 result[@intFromEnum(Feature.zalrsc)] = .{
1310 .llvm_name = "zalrsc",
1311 .description = "'Zalrsc' (Load-Reserved/Store-Conditional)",
1312 .dependencies = featureSet(&[_]Feature{}),
1313 };
1314 result[@intFromEnum(Feature.zama16b)] = .{
1315 .llvm_name = "zama16b",
1316 .description = "'Zama16b' (Atomic 16-byte misaligned loads, stores and AMOs)",
1317 .dependencies = featureSet(&[_]Feature{}),
1318 };
7551319 result[@intFromEnum(Feature.zawrs)] = .{
7561320 .llvm_name = "zawrs",
7571321 .description = "'Zawrs' (Wait on Reservation Set)",
......@@ -808,6 +1372,7 @@ pub const all_features = blk: {
8081372 .llvm_name = "zcd",
8091373 .description = "'Zcd' (Compressed Double-Precision Floating-Point Instructions)",
8101374 .dependencies = featureSet(&[_]Feature{
1375 .d,
8111376 .zca,
8121377 }),
8131378 };
......@@ -823,6 +1388,14 @@ pub const all_features = blk: {
8231388 result[@intFromEnum(Feature.zcf)] = .{
8241389 .llvm_name = "zcf",
8251390 .description = "'Zcf' (Compressed Single-Precision Floating-Point Instructions)",
1391 .dependencies = featureSet(&[_]Feature{
1392 .f,
1393 .zca,
1394 }),
1395 };
1396 result[@intFromEnum(Feature.zcmop)] = .{
1397 .llvm_name = "zcmop",
1398 .description = "'Zcmop' (Compressed May-Be-Operations)",
8261399 .dependencies = featureSet(&[_]Feature{
8271400 .zca,
8281401 }),
......@@ -866,6 +1439,13 @@ pub const all_features = blk: {
8661439 .f,
8671440 }),
8681441 };
1442 result[@intFromEnum(Feature.zfbfmin)] = .{
1443 .llvm_name = "zfbfmin",
1444 .description = "'Zfbfmin' (Scalar BF16 Converts)",
1445 .dependencies = featureSet(&[_]Feature{
1446 .f,
1447 }),
1448 };
8691449 result[@intFromEnum(Feature.zfh)] = .{
8701450 .llvm_name = "zfh",
8711451 .description = "'Zfh' (Half-Precision Floating-Point)",
......@@ -980,6 +1560,11 @@ pub const all_features = blk: {
9801560 .zicsr,
9811561 }),
9821562 };
1563 result[@intFromEnum(Feature.zimop)] = .{
1564 .llvm_name = "zimop",
1565 .description = "'Zimop' (May-Be-Operations)",
1566 .dependencies = featureSet(&[_]Feature{}),
1567 };
9831568 result[@intFromEnum(Feature.zk)] = .{
9841569 .llvm_name = "zk",
9851570 .description = "'Zk' (Standard scalar cryptography extension)",
......@@ -1052,6 +1637,11 @@ pub const all_features = blk: {
10521637 .description = "'Zmmul' (Integer Multiplication)",
10531638 .dependencies = featureSet(&[_]Feature{}),
10541639 };
1640 result[@intFromEnum(Feature.ztso)] = .{
1641 .llvm_name = "ztso",
1642 .description = "'Ztso' (Memory Model - Total Store Order)",
1643 .dependencies = featureSet(&[_]Feature{}),
1644 };
10551645 result[@intFromEnum(Feature.zvbb)] = .{
10561646 .llvm_name = "zvbb",
10571647 .description = "'Zvbb' (Vector basic bit-manipulation instructions)",
......@@ -1104,6 +1694,21 @@ pub const all_features = blk: {
11041694 .zvl64b,
11051695 }),
11061696 };
1697 result[@intFromEnum(Feature.zvfbfmin)] = .{
1698 .llvm_name = "zvfbfmin",
1699 .description = "'Zvbfmin' (Vector BF16 Converts)",
1700 .dependencies = featureSet(&[_]Feature{
1701 .zve32f,
1702 }),
1703 };
1704 result[@intFromEnum(Feature.zvfbfwma)] = .{
1705 .llvm_name = "zvfbfwma",
1706 .description = "'Zvfbfwma' (Vector BF16 widening mul-add)",
1707 .dependencies = featureSet(&[_]Feature{
1708 .zfbfmin,
1709 .zvfbfmin,
1710 }),
1711 };
11071712 result[@intFromEnum(Feature.zvfh)] = .{
11081713 .llvm_name = "zvfh",
11091714 .description = "'Zvfh' (Vector Half-Precision Floating-Point)",
......@@ -1312,6 +1917,7 @@ pub const cpu = struct {
13121917 .a,
13131918 .c,
13141919 .d,
1920 .i,
13151921 .m,
13161922 }),
13171923 };
......@@ -1323,6 +1929,7 @@ pub const cpu = struct {
13231929 .a,
13241930 .c,
13251931 .d,
1932 .i,
13261933 .m,
13271934 }),
13281935 };
......@@ -1336,6 +1943,7 @@ pub const cpu = struct {
13361943 .llvm_name = "generic-rv32",
13371944 .features = featureSet(&[_]Feature{
13381945 .@"32bit",
1946 .i,
13391947 }),
13401948 };
13411949 pub const generic_rv64 = CpuModel{
......@@ -1343,6 +1951,7 @@ pub const cpu = struct {
13431951 .llvm_name = "generic-rv64",
13441952 .features = featureSet(&[_]Feature{
13451953 .@"64bit",
1954 .i,
13461955 }),
13471956 };
13481957 pub const rocket = CpuModel{
......@@ -1355,6 +1964,7 @@ pub const cpu = struct {
13551964 .llvm_name = "rocket-rv32",
13561965 .features = featureSet(&[_]Feature{
13571966 .@"32bit",
1967 .i,
13581968 .zicsr,
13591969 .zifencei,
13601970 }),
......@@ -1364,6 +1974,7 @@ pub const cpu = struct {
13641974 .llvm_name = "rocket-rv64",
13651975 .features = featureSet(&[_]Feature{
13661976 .@"64bit",
1977 .i,
13671978 .zicsr,
13681979 .zifencei,
13691980 }),
......@@ -1374,6 +1985,7 @@ pub const cpu = struct {
13741985 .features = featureSet(&[_]Feature{
13751986 .no_default_unroll,
13761987 .short_forward_branch_opt,
1988 .use_postra_scheduler,
13771989 }),
13781990 };
13791991 pub const sifive_e20 = CpuModel{
......@@ -1382,6 +1994,7 @@ pub const cpu = struct {
13821994 .features = featureSet(&[_]Feature{
13831995 .@"32bit",
13841996 .c,
1997 .i,
13851998 .m,
13861999 .zicsr,
13872000 .zifencei,
......@@ -1394,6 +2007,7 @@ pub const cpu = struct {
13942007 .@"32bit",
13952008 .a,
13962009 .c,
2010 .i,
13972011 .m,
13982012 .zicsr,
13992013 .zifencei,
......@@ -1407,6 +2021,7 @@ pub const cpu = struct {
14072021 .a,
14082022 .c,
14092023 .f,
2024 .i,
14102025 .m,
14112026 .zifencei,
14122027 }),
......@@ -1418,6 +2033,7 @@ pub const cpu = struct {
14182033 .@"32bit",
14192034 .a,
14202035 .c,
2036 .i,
14212037 .m,
14222038 .zicsr,
14232039 .zifencei,
......@@ -1431,6 +2047,7 @@ pub const cpu = struct {
14312047 .a,
14322048 .c,
14332049 .f,
2050 .i,
14342051 .m,
14352052 .zifencei,
14362053 }),
......@@ -1443,9 +2060,11 @@ pub const cpu = struct {
14432060 .a,
14442061 .c,
14452062 .f,
2063 .i,
14462064 .m,
14472065 .no_default_unroll,
14482066 .short_forward_branch_opt,
2067 .use_postra_scheduler,
14492068 .zifencei,
14502069 }),
14512070 };
......@@ -1459,10 +2078,13 @@ pub const cpu = struct {
14592078 .c,
14602079 .conditional_cmv_fusion,
14612080 .d,
1462 .fast_unaligned_access,
2081 .i,
14632082 .lui_addi_fusion,
14642083 .m,
14652084 .no_default_unroll,
2085 .unaligned_scalar_mem,
2086 .unaligned_vector_mem,
2087 .use_postra_scheduler,
14662088 .za64rs,
14672089 .zba,
14682090 .zbb,
......@@ -1491,10 +2113,14 @@ pub const cpu = struct {
14912113 .auipc_addi_fusion,
14922114 .c,
14932115 .conditional_cmv_fusion,
1494 .fast_unaligned_access,
2116 .i,
14952117 .lui_addi_fusion,
14962118 .m,
14972119 .no_default_unroll,
2120 .no_sink_splat_operands,
2121 .unaligned_scalar_mem,
2122 .unaligned_vector_mem,
2123 .use_postra_scheduler,
14982124 .v,
14992125 .za64rs,
15002126 .zba,
......@@ -1527,6 +2153,7 @@ pub const cpu = struct {
15272153 .@"64bit",
15282154 .a,
15292155 .c,
2156 .i,
15302157 .m,
15312158 .zicsr,
15322159 .zifencei,
......@@ -1539,6 +2166,7 @@ pub const cpu = struct {
15392166 .@"64bit",
15402167 .a,
15412168 .c,
2169 .i,
15422170 .m,
15432171 .zicsr,
15442172 .zifencei,
......@@ -1552,6 +2180,7 @@ pub const cpu = struct {
15522180 .a,
15532181 .c,
15542182 .d,
2183 .i,
15552184 .m,
15562185 .zifencei,
15572186 }),
......@@ -1564,9 +2193,11 @@ pub const cpu = struct {
15642193 .a,
15652194 .c,
15662195 .d,
2196 .i,
15672197 .m,
15682198 .no_default_unroll,
15692199 .short_forward_branch_opt,
2200 .use_postra_scheduler,
15702201 .zifencei,
15712202 .zihintpause,
15722203 }),
......@@ -1579,6 +2210,7 @@ pub const cpu = struct {
15792210 .a,
15802211 .c,
15812212 .d,
2213 .i,
15822214 .m,
15832215 .zifencei,
15842216 }),
......@@ -1591,9 +2223,11 @@ pub const cpu = struct {
15912223 .a,
15922224 .c,
15932225 .d,
2226 .i,
15942227 .m,
15952228 .no_default_unroll,
15962229 .short_forward_branch_opt,
2230 .use_postra_scheduler,
15972231 .zifencei,
15982232 }),
15992233 };
......@@ -1605,9 +2239,12 @@ pub const cpu = struct {
16052239 .a,
16062240 .c,
16072241 .dlen_factor_2,
2242 .i,
16082243 .m,
16092244 .no_default_unroll,
2245 .optimized_zero_stride_load,
16102246 .short_forward_branch_opt,
2247 .use_postra_scheduler,
16112248 .v,
16122249 .zba,
16132250 .zbb,
......@@ -1617,12 +2254,61 @@ pub const cpu = struct {
16172254 .zvl512b,
16182255 }),
16192256 };
2257 pub const spacemit_x60 = CpuModel{
2258 .name = "spacemit_x60",
2259 .llvm_name = "spacemit-x60",
2260 .features = featureSet(&[_]Feature{
2261 .@"64bit",
2262 .a,
2263 .c,
2264 .dlen_factor_2,
2265 .i,
2266 .m,
2267 .ssccptr,
2268 .sscofpmf,
2269 .sscounterenw,
2270 .sstc,
2271 .sstvala,
2272 .sstvecd,
2273 .svade,
2274 .svbare,
2275 .svinval,
2276 .svnapot,
2277 .svpbmt,
2278 .v,
2279 .za64rs,
2280 .zba,
2281 .zbb,
2282 .zbc,
2283 .zbkc,
2284 .zbs,
2285 .zfh,
2286 .zic64b,
2287 .zicbom,
2288 .zicbop,
2289 .zicboz,
2290 .ziccamoa,
2291 .ziccif,
2292 .zicclsm,
2293 .ziccrse,
2294 .zicntr,
2295 .zicond,
2296 .zifencei,
2297 .zihintpause,
2298 .zihpm,
2299 .zkt,
2300 .zvfh,
2301 .zvkt,
2302 .zvl256b,
2303 }),
2304 };
16202305 pub const syntacore_scr1_base = CpuModel{
16212306 .name = "syntacore_scr1_base",
16222307 .llvm_name = "syntacore-scr1-base",
16232308 .features = featureSet(&[_]Feature{
16242309 .@"32bit",
16252310 .c,
2311 .i,
16262312 .no_default_unroll,
16272313 .zicsr,
16282314 .zifencei,
......@@ -1634,8 +2320,38 @@ pub const cpu = struct {
16342320 .features = featureSet(&[_]Feature{
16352321 .@"32bit",
16362322 .c,
2323 .i,
2324 .m,
2325 .no_default_unroll,
2326 .zicsr,
2327 .zifencei,
2328 }),
2329 };
2330 pub const syntacore_scr3_rv32 = CpuModel{
2331 .name = "syntacore_scr3_rv32",
2332 .llvm_name = "syntacore-scr3-rv32",
2333 .features = featureSet(&[_]Feature{
2334 .@"32bit",
2335 .c,
2336 .i,
2337 .m,
2338 .no_default_unroll,
2339 .use_postra_scheduler,
2340 .zicsr,
2341 .zifencei,
2342 }),
2343 };
2344 pub const syntacore_scr3_rv64 = CpuModel{
2345 .name = "syntacore_scr3_rv64",
2346 .llvm_name = "syntacore-scr3-rv64",
2347 .features = featureSet(&[_]Feature{
2348 .@"64bit",
2349 .a,
2350 .c,
2351 .i,
16372352 .m,
16382353 .no_default_unroll,
2354 .use_postra_scheduler,
16392355 .zicsr,
16402356 .zifencei,
16412357 }),
......@@ -1649,6 +2365,7 @@ pub const cpu = struct {
16492365 .auipc_addi_fusion,
16502366 .c,
16512367 .d,
2368 .i,
16522369 .ld_add_fusion,
16532370 .lui_addi_fusion,
16542371 .m,
......@@ -1678,12 +2395,17 @@ pub const cpu = struct {
16782395 .a,
16792396 .c,
16802397 .d,
2398 .i,
16812399 .m,
2400 .no_default_unroll,
2401 .shifted_zextw_fusion,
16822402 .svinval,
16832403 .zba,
16842404 .zbb,
16852405 .zbc,
16862406 .zbs,
2407 .zexth_fusion,
2408 .zextw_fusion,
16872409 .zicbom,
16882410 .zicboz,
16892411 .zifencei,
lib/std/Target/s390x.zig+18
......@@ -40,7 +40,9 @@ pub const Feature = enum {
4040 reset_dat_protection,
4141 reset_reference_bits_multiple,
4242 soft_float,
43 test_pending_external_interruption,
4344 transactional_execution,
45 unaligned_symbols,
4446 vector,
4547 vector_enhancements_1,
4648 vector_enhancements_2,
......@@ -233,11 +235,21 @@ pub const all_features = blk: {
233235 .description = "Use software emulation for floating point",
234236 .dependencies = featureSet(&[_]Feature{}),
235237 };
238 result[@intFromEnum(Feature.test_pending_external_interruption)] = .{
239 .llvm_name = "test-pending-external-interruption",
240 .description = "Assume that the test-pending-external-interruption facility is installed",
241 .dependencies = featureSet(&[_]Feature{}),
242 };
236243 result[@intFromEnum(Feature.transactional_execution)] = .{
237244 .llvm_name = "transactional-execution",
238245 .description = "Assume that the transactional-execution facility is installed",
239246 .dependencies = featureSet(&[_]Feature{}),
240247 };
248 result[@intFromEnum(Feature.unaligned_symbols)] = .{
249 .llvm_name = "unaligned-symbols",
250 .description = "Don't apply the ABI minimum alignment to external symbols.",
251 .dependencies = featureSet(&[_]Feature{}),
252 };
241253 result[@intFromEnum(Feature.vector)] = .{
242254 .llvm_name = "vector",
243255 .description = "Assume that the vectory facility is installed",
......@@ -357,6 +369,7 @@ pub const cpu = struct {
357369 .population_count,
358370 .processor_assist,
359371 .reset_reference_bits_multiple,
372 .test_pending_external_interruption,
360373 .transactional_execution,
361374 .vector,
362375 .vector_enhancements_1,
......@@ -396,6 +409,7 @@ pub const cpu = struct {
396409 .population_count,
397410 .processor_assist,
398411 .reset_reference_bits_multiple,
412 .test_pending_external_interruption,
399413 .transactional_execution,
400414 .vector,
401415 .vector_enhancements_1,
......@@ -441,6 +455,7 @@ pub const cpu = struct {
441455 .processor_assist,
442456 .reset_dat_protection,
443457 .reset_reference_bits_multiple,
458 .test_pending_external_interruption,
444459 .transactional_execution,
445460 .vector,
446461 .vector_enhancements_1,
......@@ -538,6 +553,7 @@ pub const cpu = struct {
538553 .population_count,
539554 .processor_assist,
540555 .reset_reference_bits_multiple,
556 .test_pending_external_interruption,
541557 .transactional_execution,
542558 .vector,
543559 .vector_enhancements_1,
......@@ -577,6 +593,7 @@ pub const cpu = struct {
577593 .population_count,
578594 .processor_assist,
579595 .reset_reference_bits_multiple,
596 .test_pending_external_interruption,
580597 .transactional_execution,
581598 .vector,
582599 .vector_enhancements_1,
......@@ -622,6 +639,7 @@ pub const cpu = struct {
622639 .processor_assist,
623640 .reset_dat_protection,
624641 .reset_reference_bits_multiple,
642 .test_pending_external_interruption,
625643 .transactional_execution,
626644 .vector,
627645 .vector_enhancements_1,
lib/std/Target/wasm.zig+15
......@@ -9,6 +9,7 @@ pub const Feature = enum {
99 bulk_memory,
1010 exception_handling,
1111 extended_const,
12 half_precision,
1213 multimemory,
1314 multivalue,
1415 mutable_globals,
......@@ -49,6 +50,11 @@ pub const all_features = blk: {
4950 .description = "Enable extended const expressions",
5051 .dependencies = featureSet(&[_]Feature{}),
5152 };
53 result[@intFromEnum(Feature.half_precision)] = .{
54 .llvm_name = "half-precision",
55 .description = "Enable half precision instructions",
56 .dependencies = featureSet(&[_]Feature{}),
57 };
5258 result[@intFromEnum(Feature.multimemory)] = .{
5359 .llvm_name = "multimemory",
5460 .description = "Enable multiple memories",
......@@ -109,8 +115,15 @@ pub const cpu = struct {
109115 .features = featureSet(&[_]Feature{
110116 .atomics,
111117 .bulk_memory,
118 .exception_handling,
119 .extended_const,
120 .half_precision,
121 .multimemory,
122 .multivalue,
112123 .mutable_globals,
113124 .nontrapping_fptoint,
125 .reference_types,
126 .relaxed_simd,
114127 .sign_ext,
115128 .simd128,
116129 .tail_call,
......@@ -120,7 +133,9 @@ pub const cpu = struct {
120133 .name = "generic",
121134 .llvm_name = "generic",
122135 .features = featureSet(&[_]Feature{
136 .multivalue,
123137 .mutable_globals,
138 .reference_types,
124139 .sign_ext,
125140 }),
126141 };
lib/std/Target/x86.zig+106-19
......@@ -45,6 +45,7 @@ pub const Feature = enum {
4545 avxvnniint8,
4646 bmi,
4747 bmi2,
48 branch_hint,
4849 branchfusion,
4950 ccmp,
5051 cf,
......@@ -73,8 +74,10 @@ pub const Feature = enum {
7374 fast_15bytenop,
7475 fast_7bytenop,
7576 fast_bextr,
77 fast_dpwssd,
7678 fast_gather,
7779 fast_hops,
80 fast_imm16,
7881 fast_lzcnt,
7982 fast_movbe,
8083 fast_scalar_fsqrt,
......@@ -96,6 +99,7 @@ pub const Feature = enum {
9699 hreset,
97100 idivl_to_divb,
98101 idivq_to_divl,
102 inline_asm_use_gpr32,
99103 invpcid,
100104 kl,
101105 lea_sp,
......@@ -111,6 +115,7 @@ pub const Feature = enum {
111115 movdiri,
112116 mwaitx,
113117 ndd,
118 nf,
114119 no_bypass_delay,
115120 no_bypass_delay_blend,
116121 no_bypass_delay_mov,
......@@ -191,6 +196,7 @@ pub const Feature = enum {
191196 xsavec,
192197 xsaveopt,
193198 xsaves,
199 zu,
194200};
195201
196202pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
......@@ -213,14 +219,14 @@ pub const all_features = blk: {
213219 .dependencies = featureSet(&[_]Feature{}),
214220 };
215221 result[@intFromEnum(Feature.@"3dnow")] = .{
216 .llvm_name = "3dnow",
222 .llvm_name = null,
217223 .description = "Enable 3DNow! instructions",
218224 .dependencies = featureSet(&[_]Feature{
219225 .mmx,
220226 }),
221227 };
222228 result[@intFromEnum(Feature.@"3dnowa")] = .{
223 .llvm_name = "3dnowa",
229 .llvm_name = null,
224230 .description = "Enable 3DNow! Athlon instructions",
225231 .dependencies = featureSet(&[_]Feature{
226232 .@"3dnow",
......@@ -356,7 +362,7 @@ pub const all_features = blk: {
356362 }),
357363 };
358364 result[@intFromEnum(Feature.avx512er)] = .{
359 .llvm_name = "avx512er",
365 .llvm_name = null,
360366 .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
361367 .dependencies = featureSet(&[_]Feature{
362368 .avx512f,
......@@ -388,7 +394,7 @@ pub const all_features = blk: {
388394 }),
389395 };
390396 result[@intFromEnum(Feature.avx512pf)] = .{
391 .llvm_name = "avx512pf",
397 .llvm_name = null,
392398 .description = "Enable AVX-512 PreFetch Instructions",
393399 .dependencies = featureSet(&[_]Feature{
394400 .avx512f,
......@@ -481,6 +487,11 @@ pub const all_features = blk: {
481487 .description = "Support BMI2 instructions",
482488 .dependencies = featureSet(&[_]Feature{}),
483489 };
490 result[@intFromEnum(Feature.branch_hint)] = .{
491 .llvm_name = "branch-hint",
492 .description = "Target has branch hint feature",
493 .dependencies = featureSet(&[_]Feature{}),
494 };
484495 result[@intFromEnum(Feature.branchfusion)] = .{
485496 .llvm_name = "branchfusion",
486497 .description = "CMP/TEST can be fused with conditional branches",
......@@ -625,6 +636,11 @@ pub const all_features = blk: {
625636 .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
626637 .dependencies = featureSet(&[_]Feature{}),
627638 };
639 result[@intFromEnum(Feature.fast_dpwssd)] = .{
640 .llvm_name = "fast-dpwssd",
641 .description = "Prefer vpdpwssd instruction over vpmaddwd+vpaddd instruction sequence",
642 .dependencies = featureSet(&[_]Feature{}),
643 };
628644 result[@intFromEnum(Feature.fast_gather)] = .{
629645 .llvm_name = "fast-gather",
630646 .description = "Indicates if gather is reasonably fast (this is true for Skylake client and all AVX-512 CPUs)",
......@@ -635,6 +651,11 @@ pub const all_features = blk: {
635651 .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
636652 .dependencies = featureSet(&[_]Feature{}),
637653 };
654 result[@intFromEnum(Feature.fast_imm16)] = .{
655 .llvm_name = "fast-imm16",
656 .description = "Prefer a i16 instruction with i16 immediate over extension to i32",
657 .dependencies = featureSet(&[_]Feature{}),
658 };
638659 result[@intFromEnum(Feature.fast_lzcnt)] = .{
639660 .llvm_name = "fast-lzcnt",
640661 .description = "LZCNT instructions are as fast as most simple integer ops",
......@@ -747,6 +768,11 @@ pub const all_features = blk: {
747768 .description = "Use 32-bit divide for positive values less than 2^32",
748769 .dependencies = featureSet(&[_]Feature{}),
749770 };
771 result[@intFromEnum(Feature.inline_asm_use_gpr32)] = .{
772 .llvm_name = "inline-asm-use-gpr32",
773 .description = "Enable use of GPR32 in inline assembly for APX",
774 .dependencies = featureSet(&[_]Feature{}),
775 };
750776 result[@intFromEnum(Feature.invpcid)] = .{
751777 .llvm_name = "invpcid",
752778 .description = "Invalidate Process-Context Identifier",
......@@ -824,6 +850,11 @@ pub const all_features = blk: {
824850 .description = "Support non-destructive destination",
825851 .dependencies = featureSet(&[_]Feature{}),
826852 };
853 result[@intFromEnum(Feature.nf)] = .{
854 .llvm_name = "nf",
855 .description = "Support status flags update suppression",
856 .dependencies = featureSet(&[_]Feature{}),
857 };
827858 result[@intFromEnum(Feature.no_bypass_delay)] = .{
828859 .llvm_name = "no-bypass-delay",
829860 .description = "Has no bypass delay when using the 'wrong' domain",
......@@ -917,7 +948,7 @@ pub const all_features = blk: {
917948 .dependencies = featureSet(&[_]Feature{}),
918949 };
919950 result[@intFromEnum(Feature.prefetchwt1)] = .{
920 .llvm_name = "prefetchwt1",
951 .llvm_name = null,
921952 .description = "Prefetch with Intent to Write and T1 Hint",
922953 .dependencies = featureSet(&[_]Feature{}),
923954 };
......@@ -1269,6 +1300,11 @@ pub const all_features = blk: {
12691300 .xsave,
12701301 }),
12711302 };
1303 result[@intFromEnum(Feature.zu)] = .{
1304 .llvm_name = "zu",
1305 .description = "Support zero-upper SETcc/IMUL",
1306 .dependencies = featureSet(&[_]Feature{}),
1307 };
12721308 const ti = @typeInfo(Feature);
12731309 for (&result, 0..) |*elem, i| {
12741310 elem.index = i;
......@@ -1357,6 +1393,7 @@ pub const cpu = struct {
13571393 .cx16,
13581394 .fast_scalar_shift_masks,
13591395 .fxsr,
1396 .idivq_to_divl,
13601397 .lzcnt,
13611398 .nopl,
13621399 .popcnt,
......@@ -1531,6 +1568,7 @@ pub const cpu = struct {
15311568 .cmov,
15321569 .cx8,
15331570 .nopl,
1571 .prfchw,
15341572 .slow_shld,
15351573 .slow_unaligned_mem_16,
15361574 .vzeroupper,
......@@ -1548,6 +1586,7 @@ pub const cpu = struct {
15481586 .fast_scalar_shift_masks,
15491587 .fxsr,
15501588 .nopl,
1589 .prfchw,
15511590 .sbb_dep_breaking,
15521591 .slow_shld,
15531592 .slow_unaligned_mem_16,
......@@ -1567,6 +1606,7 @@ pub const cpu = struct {
15671606 .fast_scalar_shift_masks,
15681607 .fxsr,
15691608 .nopl,
1609 .prfchw,
15701610 .sbb_dep_breaking,
15711611 .slow_shld,
15721612 .slow_unaligned_mem_16,
......@@ -1584,6 +1624,7 @@ pub const cpu = struct {
15841624 .cx8,
15851625 .fxsr,
15861626 .nopl,
1627 .prfchw,
15871628 .slow_shld,
15881629 .slow_unaligned_mem_16,
15891630 .sse,
......@@ -1602,6 +1643,7 @@ pub const cpu = struct {
16021643 .fast_scalar_shift_masks,
16031644 .fxsr,
16041645 .nopl,
1646 .prfchw,
16051647 .sbb_dep_breaking,
16061648 .slow_shld,
16071649 .slow_unaligned_mem_16,
......@@ -1619,6 +1661,7 @@ pub const cpu = struct {
16191661 .cx8,
16201662 .fxsr,
16211663 .nopl,
1664 .prfchw,
16221665 .slow_shld,
16231666 .slow_unaligned_mem_16,
16241667 .sse,
......@@ -1634,6 +1677,7 @@ pub const cpu = struct {
16341677 .cmov,
16351678 .cx8,
16361679 .nopl,
1680 .prfchw,
16371681 .slow_shld,
16381682 .slow_unaligned_mem_16,
16391683 .vzeroupper,
......@@ -1649,6 +1693,7 @@ pub const cpu = struct {
16491693 .cx8,
16501694 .fxsr,
16511695 .nopl,
1696 .prfchw,
16521697 .slow_shld,
16531698 .slow_unaligned_mem_16,
16541699 .sse,
......@@ -1663,6 +1708,7 @@ pub const cpu = struct {
16631708 .@"64bit",
16641709 .cmov,
16651710 .cx16,
1711 .fast_imm16,
16661712 .fxsr,
16671713 .idivl_to_divb,
16681714 .idivq_to_divl,
......@@ -1693,6 +1739,7 @@ pub const cpu = struct {
16931739 .cx16,
16941740 .false_deps_popcnt,
16951741 .fast_7bytenop,
1742 .fast_imm16,
16961743 .fast_movbe,
16971744 .fsgsbase,
16981745 .fxsr,
......@@ -1731,6 +1778,7 @@ pub const cpu = struct {
17311778 .cx16,
17321779 .fast_scalar_shift_masks,
17331780 .fxsr,
1781 .idivq_to_divl,
17341782 .lzcnt,
17351783 .nopl,
17361784 .popcnt,
......@@ -1756,6 +1804,7 @@ pub const cpu = struct {
17561804 .fast_11bytenop,
17571805 .fast_scalar_shift_masks,
17581806 .fxsr,
1807 .idivq_to_divl,
17591808 .lwp,
17601809 .lzcnt,
17611810 .mmx,
......@@ -1790,6 +1839,7 @@ pub const cpu = struct {
17901839 .fast_scalar_shift_masks,
17911840 .fma,
17921841 .fxsr,
1842 .idivq_to_divl,
17931843 .lwp,
17941844 .lzcnt,
17951845 .mmx,
......@@ -1826,6 +1876,7 @@ pub const cpu = struct {
18261876 .fma,
18271877 .fsgsbase,
18281878 .fxsr,
1879 .idivq_to_divl,
18291880 .lwp,
18301881 .lzcnt,
18311882 .mmx,
......@@ -1864,6 +1915,7 @@ pub const cpu = struct {
18641915 .fma,
18651916 .fsgsbase,
18661917 .fxsr,
1918 .idivq_to_divl,
18671919 .lwp,
18681920 .lzcnt,
18691921 .mmx,
......@@ -1891,6 +1943,7 @@ pub const cpu = struct {
18911943 .@"64bit",
18921944 .cmov,
18931945 .cx16,
1946 .fast_imm16,
18941947 .fxsr,
18951948 .idivl_to_divb,
18961949 .idivq_to_divl,
......@@ -1963,9 +2016,11 @@ pub const cpu = struct {
19632016 .cmov,
19642017 .cx16,
19652018 .fast_15bytenop,
2019 .fast_imm16,
19662020 .fast_scalar_shift_masks,
19672021 .fast_vector_shift_masks,
19682022 .fxsr,
2023 .idivq_to_divl,
19692024 .lzcnt,
19702025 .mmx,
19712026 .nopl,
......@@ -1994,11 +2049,13 @@ pub const cpu = struct {
19942049 .fast_15bytenop,
19952050 .fast_bextr,
19962051 .fast_hops,
2052 .fast_imm16,
19972053 .fast_lzcnt,
19982054 .fast_movbe,
19992055 .fast_scalar_shift_masks,
20002056 .fast_vector_shift_masks,
20012057 .fxsr,
2058 .idivq_to_divl,
20022059 .lzcnt,
20032060 .mmx,
20042061 .movbe,
......@@ -2019,6 +2076,7 @@ pub const cpu = struct {
20192076 .llvm_name = "c3",
20202077 .features = featureSet(&[_]Feature{
20212078 .@"3dnow",
2079 .prfchw,
20222080 .slow_unaligned_mem_16,
20232081 .vzeroupper,
20242082 .x87,
......@@ -2324,6 +2382,7 @@ pub const cpu = struct {
23242382 .crc32,
23252383 .cx16,
23262384 .fxsr,
2385 .idivq_to_divl,
23272386 .macrofusion,
23282387 .mmx,
23292388 .no_bypass_delay_mov,
......@@ -2441,6 +2500,7 @@ pub const cpu = struct {
24412500 .features = featureSet(&[_]Feature{
24422501 .@"3dnowa",
24432502 .cx8,
2503 .prfchw,
24442504 .slow_unaligned_mem_16,
24452505 .vzeroupper,
24462506 .x87,
......@@ -2457,6 +2517,7 @@ pub const cpu = struct {
24572517 .crc32,
24582518 .cx16,
24592519 .false_deps_popcnt,
2520 .fast_imm16,
24602521 .fast_movbe,
24612522 .fsgsbase,
24622523 .fxsr,
......@@ -2493,6 +2554,7 @@ pub const cpu = struct {
24932554 .cmov,
24942555 .crc32,
24952556 .cx16,
2557 .fast_imm16,
24962558 .fast_movbe,
24972559 .fsgsbase,
24982560 .fxsr,
......@@ -2547,8 +2609,6 @@ pub const cpu = struct {
25472609 .fxsr,
25482610 .gfni,
25492611 .hreset,
2550 .idivl_to_divb,
2551 .idivq_to_divl,
25522612 .invpcid,
25532613 .lzcnt,
25542614 .macrofusion,
......@@ -2602,7 +2662,11 @@ pub const cpu = struct {
26022662 .cx16,
26032663 .enqcmd,
26042664 .f16c,
2605 .fast_movbe,
2665 .false_deps_popcnt,
2666 .fast_15bytenop,
2667 .fast_scalar_fsqrt,
2668 .fast_variable_perlane_shuffle,
2669 .fast_vector_fsqrt,
26062670 .fma,
26072671 .fsgsbase,
26082672 .fxsr,
......@@ -2610,11 +2674,11 @@ pub const cpu = struct {
26102674 .hreset,
26112675 .invpcid,
26122676 .lzcnt,
2677 .macrofusion,
26132678 .mmx,
26142679 .movbe,
26152680 .movdir64b,
26162681 .movdiri,
2617 .no_bypass_delay,
26182682 .nopl,
26192683 .pconfig,
26202684 .pku,
......@@ -2628,11 +2692,8 @@ pub const cpu = struct {
26282692 .serialize,
26292693 .sha,
26302694 .shstk,
2631 .slow_incdec,
2632 .slow_lea,
2633 .slow_two_mem_ops,
2695 .slow_3ops_lea,
26342696 .uintr,
2635 .use_glm_div_sqrt_costs,
26362697 .vaes,
26372698 .vpclmulqdq,
26382699 .vzeroupper,
......@@ -2666,6 +2727,7 @@ pub const cpu = struct {
26662727 .avxvnni,
26672728 .bmi,
26682729 .bmi2,
2730 .branch_hint,
26692731 .cldemote,
26702732 .clflushopt,
26712733 .clwb,
......@@ -2754,6 +2816,7 @@ pub const cpu = struct {
27542816 .avxvnni,
27552817 .bmi,
27562818 .bmi2,
2819 .branch_hint,
27572820 .cldemote,
27582821 .clflushopt,
27592822 .clwb,
......@@ -3080,6 +3143,7 @@ pub const cpu = struct {
30803143 .features = featureSet(&[_]Feature{
30813144 .@"3dnow",
30823145 .cx8,
3146 .prfchw,
30833147 .slow_unaligned_mem_16,
30843148 .vzeroupper,
30853149 .x87,
......@@ -3091,6 +3155,7 @@ pub const cpu = struct {
30913155 .features = featureSet(&[_]Feature{
30923156 .@"3dnow",
30933157 .cx8,
3158 .prfchw,
30943159 .slow_unaligned_mem_16,
30953160 .vzeroupper,
30963161 .x87,
......@@ -3107,6 +3172,7 @@ pub const cpu = struct {
31073172 .fast_scalar_shift_masks,
31083173 .fxsr,
31093174 .nopl,
3175 .prfchw,
31103176 .sbb_dep_breaking,
31113177 .slow_shld,
31123178 .slow_unaligned_mem_16,
......@@ -3126,6 +3192,7 @@ pub const cpu = struct {
31263192 .fast_scalar_shift_masks,
31273193 .fxsr,
31283194 .nopl,
3195 .prfchw,
31293196 .sbb_dep_breaking,
31303197 .slow_shld,
31313198 .slow_unaligned_mem_16,
......@@ -3151,6 +3218,7 @@ pub const cpu = struct {
31513218 .cx16,
31523219 .evex512,
31533220 .fast_gather,
3221 .fast_imm16,
31543222 .fast_movbe,
31553223 .fsgsbase,
31563224 .fxsr,
......@@ -3193,6 +3261,7 @@ pub const cpu = struct {
31933261 .cx16,
31943262 .evex512,
31953263 .fast_gather,
3264 .fast_imm16,
31963265 .fast_movbe,
31973266 .fsgsbase,
31983267 .fxsr,
......@@ -3384,6 +3453,7 @@ pub const cpu = struct {
33843453 .crc32,
33853454 .cx16,
33863455 .fxsr,
3456 .idivq_to_divl,
33873457 .macrofusion,
33883458 .mmx,
33893459 .no_bypass_delay_mov,
......@@ -3422,6 +3492,7 @@ pub const cpu = struct {
34223492 .fast_scalar_shift_masks,
34233493 .fxsr,
34243494 .nopl,
3495 .prfchw,
34253496 .sbb_dep_breaking,
34263497 .slow_shld,
34273498 .slow_unaligned_mem_16,
......@@ -3441,6 +3512,7 @@ pub const cpu = struct {
34413512 .fast_scalar_shift_masks,
34423513 .fxsr,
34433514 .nopl,
3515 .prfchw,
34443516 .sbb_dep_breaking,
34453517 .slow_shld,
34463518 .slow_unaligned_mem_16,
......@@ -3937,7 +4009,11 @@ pub const cpu = struct {
39374009 .cx16,
39384010 .enqcmd,
39394011 .f16c,
3940 .fast_movbe,
4012 .false_deps_popcnt,
4013 .fast_15bytenop,
4014 .fast_scalar_fsqrt,
4015 .fast_variable_perlane_shuffle,
4016 .fast_vector_fsqrt,
39414017 .fma,
39424018 .fsgsbase,
39434019 .fxsr,
......@@ -3945,11 +4021,11 @@ pub const cpu = struct {
39454021 .hreset,
39464022 .invpcid,
39474023 .lzcnt,
4024 .macrofusion,
39484025 .mmx,
39494026 .movbe,
39504027 .movdir64b,
39514028 .movdiri,
3952 .no_bypass_delay,
39534029 .nopl,
39544030 .pconfig,
39554031 .pku,
......@@ -3963,11 +4039,8 @@ pub const cpu = struct {
39634039 .serialize,
39644040 .sha,
39654041 .shstk,
3966 .slow_incdec,
3967 .slow_lea,
3968 .slow_two_mem_ops,
4042 .slow_3ops_lea,
39694043 .uintr,
3970 .use_glm_div_sqrt_costs,
39714044 .vaes,
39724045 .vpclmulqdq,
39734046 .vzeroupper,
......@@ -3989,6 +4062,7 @@ pub const cpu = struct {
39894062 .cx16,
39904063 .false_deps_popcnt,
39914064 .fast_7bytenop,
4065 .fast_imm16,
39924066 .fast_movbe,
39934067 .fxsr,
39944068 .idivq_to_divl,
......@@ -4191,6 +4265,7 @@ pub const cpu = struct {
41914265 .cx16,
41924266 .false_deps_popcnt,
41934267 .fast_7bytenop,
4268 .fast_imm16,
41944269 .fast_movbe,
41954270 .fxsr,
41964271 .idivq_to_divl,
......@@ -4293,6 +4368,7 @@ pub const cpu = struct {
42934368 .cmov,
42944369 .crc32,
42954370 .cx16,
4371 .fast_imm16,
42964372 .fast_movbe,
42974373 .fsgsbase,
42984374 .fxsr,
......@@ -4331,6 +4407,7 @@ pub const cpu = struct {
43314407 .crc32,
43324408 .cx16,
43334409 .fxsr,
4410 .idivq_to_divl,
43344411 .macrofusion,
43354412 .mmx,
43364413 .no_bypass_delay_mov,
......@@ -4348,6 +4425,7 @@ pub const cpu = struct {
43484425 .llvm_name = "winchip2",
43494426 .features = featureSet(&[_]Feature{
43504427 .@"3dnow",
4428 .prfchw,
43514429 .slow_unaligned_mem_16,
43524430 .vzeroupper,
43534431 .x87,
......@@ -4519,6 +4597,7 @@ pub const cpu = struct {
45194597 .f16c,
45204598 .fast_15bytenop,
45214599 .fast_bextr,
4600 .fast_imm16,
45224601 .fast_lzcnt,
45234602 .fast_movbe,
45244603 .fast_scalar_fsqrt,
......@@ -4528,6 +4607,7 @@ pub const cpu = struct {
45284607 .fma,
45294608 .fsgsbase,
45304609 .fxsr,
4610 .idivq_to_divl,
45314611 .lzcnt,
45324612 .mmx,
45334613 .movbe,
......@@ -4571,6 +4651,7 @@ pub const cpu = struct {
45714651 .f16c,
45724652 .fast_15bytenop,
45734653 .fast_bextr,
4654 .fast_imm16,
45744655 .fast_lzcnt,
45754656 .fast_movbe,
45764657 .fast_scalar_fsqrt,
......@@ -4580,6 +4661,7 @@ pub const cpu = struct {
45804661 .fma,
45814662 .fsgsbase,
45824663 .fxsr,
4664 .idivq_to_divl,
45834665 .lzcnt,
45844666 .mmx,
45854667 .movbe,
......@@ -4624,6 +4706,7 @@ pub const cpu = struct {
46244706 .f16c,
46254707 .fast_15bytenop,
46264708 .fast_bextr,
4709 .fast_imm16,
46274710 .fast_lzcnt,
46284711 .fast_movbe,
46294712 .fast_scalar_fsqrt,
......@@ -4634,6 +4717,7 @@ pub const cpu = struct {
46344717 .fsgsbase,
46354718 .fsrm,
46364719 .fxsr,
4720 .idivq_to_divl,
46374721 .invpcid,
46384722 .lzcnt,
46394723 .macrofusion,
......@@ -4692,6 +4776,8 @@ pub const cpu = struct {
46924776 .evex512,
46934777 .fast_15bytenop,
46944778 .fast_bextr,
4779 .fast_dpwssd,
4780 .fast_imm16,
46954781 .fast_lzcnt,
46964782 .fast_movbe,
46974783 .fast_scalar_fsqrt,
......@@ -4702,6 +4788,7 @@ pub const cpu = struct {
47024788 .fsrm,
47034789 .fxsr,
47044790 .gfni,
4791 .idivq_to_divl,
47054792 .invpcid,
47064793 .lzcnt,
47074794 .macrofusion,