authorgravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-09-15 22:02:40+02:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-09-18 10:00:04+02:00
logdc6480dba5ec4533f6a20292f93fe5c25a1a689f
treeed1911eb4dd676adef6022cc9d8947b48dafd660
parent618c7a3546bb5e73a4f7ff4bd38e53700f63c90c

macho: allow for add and ldr when resolving GOT_LOAD_* relocs

3 files changed, 11 insertions(+), 28 deletions(-)

src/arch/aarch64/Emit.zig+3-2
...@@ -845,7 +845,8 @@ fn mirLoadMemoryPie(emit: *Emit, inst: Mir.Inst.Index) !void {...@@ -845,7 +845,8 @@ fn mirLoadMemoryPie(emit: *Emit, inst: Mir.Inst.Index) !void {
845 try emit.writeInstruction(Instruction.adrp(reg.to64(), 0));845 try emit.writeInstruction(Instruction.adrp(reg.to64(), 0));
846846
847 switch (tag) {847 switch (tag) {
848 .load_memory_got => {848 .load_memory_got,
849 => {
849 // ldr reg, reg, offset850 // ldr reg, reg, offset
850 try emit.writeInstruction(Instruction.ldr(851 try emit.writeInstruction(Instruction.ldr(
851 reg,852 reg,
...@@ -871,8 +872,8 @@ fn mirLoadMemoryPie(emit: *Emit, inst: Mir.Inst.Index) !void {...@@ -871,8 +872,8 @@ fn mirLoadMemoryPie(emit: *Emit, inst: Mir.Inst.Index) !void {
871 Instruction.LoadStoreOffset.imm(0),872 Instruction.LoadStoreOffset.imm(0),
872 ));873 ));
873 },874 },
874 .load_memory_ptr_got,
875 .load_memory_ptr_direct,875 .load_memory_ptr_direct,
876 .load_memory_ptr_got,
876 => {877 => {
877 // add reg, reg, offset878 // add reg, reg, offset
878 try emit.writeInstruction(Instruction.add(reg, reg, 0, false));879 try emit.writeInstruction(Instruction.add(reg, reg, 0, false));
src/link/MachO.zig+1
...@@ -3434,6 +3434,7 @@ pub fn populateMissingMetadata(self: *MachO) !void {...@@ -3434,6 +3434,7 @@ pub fn populateMissingMetadata(self: *MachO) !void {
3434 }3434 }
34353435
3436 if (self.text_section_index == null) {3436 if (self.text_section_index == null) {
3437 // Sadly, segments need unique string identfiers for some reason.
3437 self.text_section_index = try self.allocateSection("__TEXT1", "__text", .{3438 self.text_section_index = try self.allocateSection("__TEXT1", "__text", .{
3438 .size = self.base.options.program_code_size_hint,3439 .size = self.base.options.program_code_size_hint,
3439 .alignment = switch (cpu_arch) {3440 .alignment = switch (cpu_arch) {
src/link/MachO/Relocation.zig+7-26
...@@ -135,7 +135,9 @@ fn resolveAarch64(...@@ -135,7 +135,9 @@ fn resolveAarch64(
135 inst.pc_relative_address.immlo = @truncate(u2, pages);135 inst.pc_relative_address.immlo = @truncate(u2, pages);
136 mem.writeIntLittle(u32, &buffer, inst.toU32());136 mem.writeIntLittle(u32, &buffer, inst.toU32());
137 },137 },
138 .ARM64_RELOC_PAGEOFF12 => {138 .ARM64_RELOC_PAGEOFF12,
139 .ARM64_RELOC_GOT_LOAD_PAGEOFF12,
140 => {
139 const narrowed = @truncate(u12, @intCast(u64, target_addr));141 const narrowed = @truncate(u12, @intCast(u64, target_addr));
140 if (isArithmeticOp(&buffer)) {142 if (isArithmeticOp(&buffer)) {
141 var inst = aarch64.Instruction{143 var inst = aarch64.Instruction{
...@@ -170,18 +172,6 @@ fn resolveAarch64(...@@ -170,18 +172,6 @@ fn resolveAarch64(
170 mem.writeIntLittle(u32, &buffer, inst.toU32());172 mem.writeIntLittle(u32, &buffer, inst.toU32());
171 }173 }
172 },174 },
173 .ARM64_RELOC_GOT_LOAD_PAGEOFF12 => {
174 const narrowed = @truncate(u12, @intCast(u64, target_addr));
175 var inst: aarch64.Instruction = .{
176 .load_store_register = mem.bytesToValue(meta.TagPayload(
177 aarch64.Instruction,
178 aarch64.Instruction.load_store_register,
179 ), &buffer),
180 };
181 const offset = @divExact(narrowed, 8);
182 inst.load_store_register.offset = offset;
183 mem.writeIntLittle(u32, &buffer, inst.toU32());
184 },
185 .ARM64_RELOC_TLVP_LOAD_PAGEOFF12 => {175 .ARM64_RELOC_TLVP_LOAD_PAGEOFF12 => {
186 const RegInfo = struct {176 const RegInfo = struct {
187 rd: u5,177 rd: u5,
...@@ -226,11 +216,8 @@ fn resolveAarch64(...@@ -226,11 +216,8 @@ fn resolveAarch64(
226 mem.writeIntLittle(u32, &buffer, inst.toU32());216 mem.writeIntLittle(u32, &buffer, inst.toU32());
227 },217 },
228 .ARM64_RELOC_POINTER_TO_GOT => {218 .ARM64_RELOC_POINTER_TO_GOT => {
229 const result = math.cast(219 const result = @intCast(i32, @intCast(i64, target_addr) - @intCast(i64, source_addr));
230 i32,220 mem.writeIntLittle(i32, &buffer, result);
231 @intCast(i64, target_addr) - @intCast(i64, source_addr),
232 ) orelse return error.Overflow;
233 mem.writeIntLittle(u32, &buffer, @bitCast(u32, result));
234 },221 },
235 .ARM64_RELOC_SUBTRACTOR => unreachable,222 .ARM64_RELOC_SUBTRACTOR => unreachable,
236 .ARM64_RELOC_ADDEND => unreachable,223 .ARM64_RELOC_ADDEND => unreachable,
...@@ -255,10 +242,7 @@ fn resolveX8664(...@@ -255,10 +242,7 @@ fn resolveX8664(
255 .X86_64_RELOC_GOT_LOAD,242 .X86_64_RELOC_GOT_LOAD,
256 .X86_64_RELOC_TLV,243 .X86_64_RELOC_TLV,
257 => {244 => {
258 const displacement = math.cast(245 const displacement = @intCast(i32, @intCast(i64, target_addr) - @intCast(i64, source_addr) - 4);
259 i32,
260 @intCast(i64, target_addr) - @intCast(i64, source_addr) - 4,
261 ) orelse return error.Overflow;
262 mem.writeIntLittle(u32, buffer[0..4], @bitCast(u32, displacement));246 mem.writeIntLittle(u32, buffer[0..4], @bitCast(u32, displacement));
263 break :blk buffer[0..4];247 break :blk buffer[0..4];
264 },248 },
...@@ -274,10 +258,7 @@ fn resolveX8664(...@@ -274,10 +258,7 @@ fn resolveX8664(
274 .X86_64_RELOC_SIGNED_4 => 4,258 .X86_64_RELOC_SIGNED_4 => 4,
275 else => unreachable,259 else => unreachable,
276 };260 };
277 const displacement = math.cast(261 const displacement = @intCast(i32, target_addr - @intCast(i64, source_addr + correction + 4));
278 i32,
279 target_addr - @intCast(i64, source_addr + correction + 4),
280 ) orelse return error.Overflow;
281 mem.writeIntLittle(u32, buffer[0..4], @bitCast(u32, displacement));262 mem.writeIntLittle(u32, buffer[0..4], @bitCast(u32, displacement));
282 break :blk buffer[0..4];263 break :blk buffer[0..4];
283 },264 },