| author |  Andrew Kelley <andrew@ziglang.org> 2021-04-23 15:12:38-04:00 |
| committer |  GitHub <noreply@github.com> 2021-04-23 15:12:38-04:00 |
| log | dfb34c315576525806a471ae0c4f94b76d362bf9 |
| tree | e53c6878730747cadb475d5ae4c31b6e38ce05f9 |
| parent | 41efdc73b9a57dfcc57474310c64724f58a95493 |
| parent | c5cc6b7082b132c6dd99df1c5bc8de817822bda4 |
| signature | Signed by PGP key 4AEE18F83AFDEB23 |
Merge pull request #8586 from LemonBoy/ppc32-touchups
A few more PPC32 touch-ups5 files changed, 28 insertions(+), 10 deletions(-)
lib
std
os
bits
linux
- linux.zig
special
- target.zig
test
lib/std/os/bits/linux/powerpc.zig+1-9
| ... | ... | @@ -557,18 +557,10 @@ pub const kernel_stat = extern struct { |
| 557 | 557 | size: off_t, |
| 558 | 558 | blksize: blksize_t, |
| 559 | 559 | blocks: blkcnt_t, |
| 560 | __atim32: timespec32, | |
| 561 | __mtim32: timespec32, | |
| 562 | __ctim32: timespec32, | |
| 563 | __unused: [2]u32, | |
| 564 | 560 | atim: timespec, |
| 565 | 561 | mtim: timespec, |
| 566 | 562 | ctim: timespec, |
| 567 | ||
| 568 | const timespec32 = extern struct { | |
| 569 | tv_sec: i32, | |
| 570 | tv_nsec: i32, | |
| 571 | }; | |
| 563 | __unused: [2]u32, | |
| 572 | 564 | |
| 573 | 565 | pub fn atime(self: @This()) timespec { |
| 574 | 566 | return self.atim; |
lib/std/os/linux.zig+1
| ... | ... | @@ -52,6 +52,7 @@ pub fn getauxval(index: usize) usize { |
| 52 | 52 | // Some architectures (and some syscalls) require 64bit parameters to be passed |
| 53 | 53 | // in a even-aligned register pair. |
| 54 | 54 | const require_aligned_register_pair = |
| 55 | std.Target.current.cpu.arch.isPPC() or | |
| 55 | 56 | std.Target.current.cpu.arch.isMIPS() or |
| 56 | 57 | std.Target.current.cpu.arch.isARM() or |
| 57 | 58 | std.Target.current.cpu.arch.isThumb(); |
lib/std/special/compiler_rt.zig+3-1
| ... | ... | @@ -113,9 +113,11 @@ comptime { |
| 113 | 113 | @export(@import("compiler_rt/extendXfYf2.zig").__extenddftf2, .{ .name = "__extenddftf2", .linkage = linkage }); |
| 114 | 114 | @export(@import("compiler_rt/extendXfYf2.zig").__extendsftf2, .{ .name = "__extendsftf2", .linkage = linkage }); |
| 115 | 115 | @export(@import("compiler_rt/extendXfYf2.zig").__extendhfsf2, .{ .name = "__extendhfsf2", .linkage = linkage }); |
| 116 | @export(@import("compiler_rt/extendXfYf2.zig").__extendhftf2, .{ .name = "__extendhftf2", .linkage = linkage }); | |
| 116 | 117 | |
| 117 | 118 | @export(@import("compiler_rt/truncXfYf2.zig").__truncsfhf2, .{ .name = "__truncsfhf2", .linkage = linkage }); |
| 118 | 119 | @export(@import("compiler_rt/truncXfYf2.zig").__truncdfhf2, .{ .name = "__truncdfhf2", .linkage = linkage }); |
| 120 | @export(@import("compiler_rt/truncXfYf2.zig").__trunctfhf2, .{ .name = "__trunctfhf2", .linkage = linkage }); | |
| 119 | 121 | @export(@import("compiler_rt/truncXfYf2.zig").__trunctfdf2, .{ .name = "__trunctfdf2", .linkage = linkage }); |
| 120 | 122 | @export(@import("compiler_rt/truncXfYf2.zig").__trunctfsf2, .{ .name = "__trunctfsf2", .linkage = linkage }); |
| 121 | 123 | |
| ... | ... | @@ -296,7 +298,7 @@ comptime { |
| 296 | 298 | @export(@import("compiler_rt/sparc.zig")._Qp_qtod, .{ .name = "_Qp_qtod", .linkage = linkage }); |
| 297 | 299 | } |
| 298 | 300 | |
| 299 | if (builtin.arch == .powerpc or builtin.arch.isPPC64()) { | |
| 301 | if ((builtin.arch == .powerpc or builtin.arch.isPPC64()) and !is_test) { | |
| 300 | 302 | @export(@import("compiler_rt/addXf3.zig").__addtf3, .{ .name = "__addkf3", .linkage = linkage }); |
| 301 | 303 | @export(@import("compiler_rt/addXf3.zig").__subtf3, .{ .name = "__subkf3", .linkage = linkage }); |
| 302 | 304 | @export(@import("compiler_rt/mulXf3.zig").__multf3, .{ .name = "__mulkf3", .linkage = linkage }); |
lib/std/target.zig+7
| ... | ... | @@ -800,6 +800,13 @@ pub const Target = struct { |
| 800 | 800 | }; |
| 801 | 801 | } |
| 802 | 802 | |
| 803 | pub fn isPPC(arch: Arch) bool { | |
| 804 | return switch (arch) { | |
| 805 | .powerpc, .powerpcle => true, | |
| 806 | else => false, | |
| 807 | }; | |
| 808 | } | |
| 809 | ||
| 803 | 810 | pub fn isPPC64(arch: Arch) bool { |
| 804 | 811 | return switch (arch) { |
| 805 | 812 | .powerpc64, .powerpc64le => true, |
test/tests.zig+16
| ... | ... | @@ -212,6 +212,22 @@ const test_targets = blk: { |
| 212 | 212 | // .link_libc = true, |
| 213 | 213 | //}, |
| 214 | 214 | |
| 215 | TestTarget{ | |
| 216 | .target = .{ | |
| 217 | .cpu_arch = .powerpc, | |
| 218 | .os_tag = .linux, | |
| 219 | .abi = .none, | |
| 220 | }, | |
| 221 | }, | |
| 222 | TestTarget{ | |
| 223 | .target = .{ | |
| 224 | .cpu_arch = .powerpc, | |
| 225 | .os_tag = .linux, | |
| 226 | .abi = .musl, | |
| 227 | }, | |
| 228 | .link_libc = true, | |
| 229 | }, | |
| 230 | ||
| 215 | 231 | TestTarget{ |
| 216 | 232 | .target = .{ |
| 217 | 233 | .cpu_arch = .riscv64, |