| ... | @@ -679,44 +679,42 @@ fn stage2TargetParse( | ... | @@ -679,44 +679,42 @@ fn stage2TargetParse( |
| 679 | mcpu_oz: ?[*:0]const u8, | 679 | mcpu_oz: ?[*:0]const u8, |
| 680 | dynamic_linker_oz: ?[*:0]const u8, | 680 | dynamic_linker_oz: ?[*:0]const u8, |
| 681 | ) !void { | 681 | ) !void { |
| 682 | const target: CrossTarget = if (zig_triple_oz) |zig_triple_z| blk: { | 682 | const zig_triple = if (zig_triple_oz) |zig_triple_z| mem.toSliceConst(u8, zig_triple_z) else "native"; |
| 683 | const zig_triple = mem.toSliceConst(u8, zig_triple_z); | 683 | const mcpu = if (mcpu_oz) |mcpu_z| mem.toSliceConst(u8, mcpu_z) else null; |
| 684 | const mcpu = if (mcpu_oz) |mcpu_z| mem.toSliceConst(u8, mcpu_z) else null; | 684 | const dynamic_linker = if (dynamic_linker_oz) |dl_z| mem.toSliceConst(u8, dl_z) else null; |
| 685 | const dynamic_linker = if (dynamic_linker_oz) |dl_z| mem.toSliceConst(u8, dl_z) else null; | 685 | var diags: CrossTarget.ParseOptions.Diagnostics = .{}; |
| 686 | var diags: CrossTarget.ParseOptions.Diagnostics = .{}; | 686 | const target: CrossTarget = CrossTarget.parse(.{ |
| 687 | break :blk CrossTarget.parse(.{ | 687 | .arch_os_abi = zig_triple, |
| 688 | .arch_os_abi = zig_triple, | 688 | .cpu_features = mcpu, |
| 689 | .cpu_features = mcpu, | 689 | .dynamic_linker = dynamic_linker, |
| 690 | .dynamic_linker = dynamic_linker, | 690 | .diagnostics = &diags, |
| 691 | .diagnostics = &diags, | 691 | }) catch |err| switch (err) { |
| 692 | }) catch |err| switch (err) { | 692 | error.UnknownCpuModel => { |
| 693 | error.UnknownCpuModel => { | 693 | std.debug.warn("Unknown CPU: '{}'\nAvailable CPUs for architecture '{}':\n", .{ |
| 694 | std.debug.warn("Unknown CPU: '{}'\nAvailable CPUs for architecture '{}':\n", .{ | 694 | diags.cpu_name.?, |
| 695 | diags.cpu_name.?, | 695 | @tagName(diags.arch.?), |
| 696 | @tagName(diags.arch.?), | 696 | }); |
| 697 | }); | 697 | for (diags.arch.?.allCpuModels()) |cpu| { |
| 698 | for (diags.arch.?.allCpuModels()) |cpu| { | 698 | std.debug.warn(" {}\n", .{cpu.name}); |
| 699 | std.debug.warn(" {}\n", .{cpu.name}); | 699 | } |
| 700 | } | 700 | process.exit(1); |
| 701 | process.exit(1); | 701 | }, |
| 702 | }, | 702 | error.UnknownCpuFeature => { |
| 703 | error.UnknownCpuFeature => { | 703 | std.debug.warn( |
| 704 | std.debug.warn( | 704 | \\Unknown CPU feature: '{}' |
| 705 | \\Unknown CPU feature: '{}' | 705 | \\Available CPU features for architecture '{}': |
| 706 | \\Available CPU features for architecture '{}': | 706 | \\ |
| 707 | \\ | 707 | , .{ |
| 708 | , .{ | 708 | diags.unknown_feature_name, |
| 709 | diags.unknown_feature_name, | 709 | @tagName(diags.arch.?), |
| 710 | @tagName(diags.arch.?), | 710 | }); |
| 711 | }); | 711 | for (diags.arch.?.allFeaturesList()) |feature| { |
| 712 | for (diags.arch.?.allFeaturesList()) |feature| { | 712 | std.debug.warn(" {}: {}\n", .{ feature.name, feature.description }); |
| 713 | std.debug.warn(" {}: {}\n", .{ feature.name, feature.description }); | 713 | } |
| 714 | } | 714 | process.exit(1); |
| 715 | process.exit(1); | 715 | }, |
| 716 | }, | 716 | else => |e| return e, |
| 717 | else => |e| return e, | 717 | }; |
| 718 | }; | | |
| 719 | } else .{}; | | |
| 720 | | 718 | |
| 721 | try stage1_target.fromTarget(target); | 719 | try stage1_target.fromTarget(target); |
| 722 | } | 720 | } |