authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-01-27 13:32:39-05:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-01-27 13:32:39-05:00
loge2778c03e07c23d60861b90474859b9d8a62bce8
treeacd9f43605fcbea6fe9d1edf4694081fc003f819
parent1a08c0d40b8c6e72532762281365a5105116dc00
parentd8965002593c111069862e7de06402ee77b2b614
signature Commit is signed but in an unrecognized format.

Merge branch 'master' into ir-clean-up-vars

100 files changed, 28526 insertions(+), 11063 deletions(-)

CMakeLists.txt+18-12
...@@ -608,25 +608,25 @@ else()...@@ -608,25 +608,25 @@ else()
608 set(LIBUSERLAND_RELEASE_MODE "true")608 set(LIBUSERLAND_RELEASE_MODE "true")
609endif()609endif()
610610
611set(BUILD_LIBUSERLAND_COMMAND zig0 build611set(BUILD_LIBUSERLAND_ARGS "build"
612 --override-lib-dir "${CMAKE_SOURCE_DIR}/lib"612 --override-lib-dir "${CMAKE_SOURCE_DIR}/lib"
613 "-Doutput-dir=${CMAKE_BINARY_DIR}"613 "-Doutput-dir=${CMAKE_BINARY_DIR}"
614 "-Drelease=${LIBUSERLAND_RELEASE_MODE}"614 "-Drelease=${LIBUSERLAND_RELEASE_MODE}"
615 "-Dlib-files-only"615 "-Dlib-files-only"
616 --prefix "${CMAKE_INSTALL_PREFIX}"616 --prefix "${CMAKE_INSTALL_PREFIX}"
617 libuserland617 libuserland
618)618)
619619
620# When using Visual Studio build system generator we default to libuserland install.620# When using Visual Studio build system generator we default to libuserland install.
621if(MSVC)621if(MSVC)
622 set(ZIG_SKIP_INSTALL_LIB_FILES off CACHE BOOL "Disable copying lib/ files to install prefix")622 set(ZIG_SKIP_INSTALL_LIB_FILES off CACHE BOOL "Disable copying lib/ files to install prefix")
623 if(NOT ZIG_SKIP_INSTALL_LIB_FILES)623 if(NOT ZIG_SKIP_INSTALL_LIB_FILES)
624 set(BUILD_LIBUSERLAND_COMMAND ${BUILD_LIBUSERLAND_COMMAND} install)624 set(BUILD_LIBUSERLAND_ARGS ${BUILD_LIBUSERLAND_ARGS} install)
625 endif()625 endif()
626endif()626endif()
627627
628add_custom_target(zig_build_libuserland ALL628add_custom_target(zig_build_libuserland ALL
629 COMMAND ${BUILD_LIBUSERLAND_COMMAND}629 COMMAND zig0 ${BUILD_LIBUSERLAND_ARGS}
630 DEPENDS zig0630 DEPENDS zig0
631 BYPRODUCTS "${LIBUSERLAND}"631 BYPRODUCTS "${LIBUSERLAND}"
632 WORKING_DIRECTORY "${CMAKE_SOURCE_DIR}"632 WORKING_DIRECTORY "${CMAKE_SOURCE_DIR}"
...@@ -647,6 +647,12 @@ add_dependencies(zig zig_build_libuserland)...@@ -647,6 +647,12 @@ add_dependencies(zig zig_build_libuserland)
647647
648install(TARGETS zig DESTINATION bin)648install(TARGETS zig DESTINATION bin)
649649
650# CODE has no effect with Visual Studio build system generator650# CODE has no effect with Visual Studio build system generator.
651install(CODE "message(\"-- Installing: /opt/zig/lib\")")651if(NOT MSVC)
652install(CODE "execute_process(COMMAND ${BUILD_LIBUSERLAND_COMMAND} install)")652 get_target_property(zig0_BINARY_DIR zig0 BINARY_DIR)
653 install(CODE "set(zig0_EXE \"${zig0_BINARY_DIR}/zig0\")")
654 install(CODE "set(INSTALL_LIBUSERLAND_ARGS \"${BUILD_LIBUSERLAND_ARGS}\" install)")
655 install(CODE "set(BUILD_LIBUSERLAND_ARGS \"${BUILD_LIBUSERLAND_ARGS}\")")
656 install(CODE "set(CMAKE_SOURCE_DIR \"${CMAKE_SOURCE_DIR}\")")
657 install(SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/cmake/install.cmake)
658endif()
CONTRIBUTING.md+20-15
...@@ -51,23 +51,28 @@ knowledge of Zig internals.**...@@ -51,23 +51,28 @@ knowledge of Zig internals.**
5151
52### Editing Source Code52### Editing Source Code
5353
54First, build the Stage 1 compiler as described in [the Building section](#building).54First, build the Stage 1 compiler as described in [Building from Source](README.md#Building-from-Source).
5555
56One modification you may want to make is adding `-DZIG_SKIP_INSTALL_LIB_FILES=ON`56Zig locates lib files relative to executable path by searching up the
57to the cmake line. If you use the build directory as a working directory to run57filesystem tree for a sub-path of `lib/zig/std/std.zig` or `lib/std/std.zig`.
58tests with, zig will find the lib files in the source directory, and they will not58Typically the former is an install and the latter a git working tree which
59be "installed" every time you run `make`. This will allow you to make modifications59contains the build directory.
60directly to the standard library, for example, and have them effective immediately.60
61Note that if you already ran `make` or `make install` with the default cmake61During development it is not necessary to perform installs when modifying
62settings, there will already be a `lib/` directory in your build directory. When62stage1 or userland sources and in fact it is faster and simpler to run,
63executed from the build directory, zig will find this instead of the source lib/63test and debug from a git working tree.
64directory. Remove the unwanted directory so that the desired one can be found.64
65- `make` is typically sufficient to build zig during development iterations.
66- `make install` performs a build __and__ install.
67- `msbuild -p:Configuration=Release INSTALL.vcxproj` on Windows performs a
68build and install. To avoid install, pass cmake option `-DZIG_SKIP_INSTALL_LIB_FILES=ON`.
6569
66To test changes, do the following from the build directory:70To test changes, do the following from the build directory:
6771
681. Run `make install` (on POSIX) or721. Run `make` (on POSIX) or
69 `msbuild -p:Configuration=Release INSTALL.vcxproj` (on Windows).73 `msbuild -p:Configuration=Release INSTALL.vcxproj` (on Windows).
702. `bin/zig build test` (on POSIX) or `bin\zig.exe build test` (on Windows).742. `$BUILD_DIR/zig build test` (on POSIX) or
75 `$BUILD_DIR/Release\zig.exe build test` (on Windows).
7176
72That runs the whole test suite, which does a lot of extra testing that you77That runs the whole test suite, which does a lot of extra testing that you
73likely won't always need, and can take upwards of 1 hour. This is what the78likely won't always need, and can take upwards of 1 hour. This is what the
...@@ -85,8 +90,8 @@ Another example is choosing a different set of things to test. For example,...@@ -85,8 +90,8 @@ Another example is choosing a different set of things to test. For example,
85not the other ones. Combining this suggestion with the previous one, you could90not the other ones. Combining this suggestion with the previous one, you could
86do this:91do this:
8792
88`bin/zig build test-std -Dskip-release` (on POSIX) or93`$BUILD_DIR/bin/zig build test-std -Dskip-release` (on POSIX) or
89`bin\zig.exe build test-std -Dskip-release` (on Windows).94`$BUILD_DIR/Release\zig.exe build test-std -Dskip-release` (on Windows).
9095
91This will run only the standard library tests, in debug mode only, for all96This will run only the standard library tests, in debug mode only, for all
92targets (it will cross-compile the tests for non-native targets but not run97targets (it will cross-compile the tests for non-native targets but not run
cmake/install.cmake created+37
...@@ -0,0 +1,37 @@
1message("-- Installing: ${CMAKE_INSTALL_PREFIX}/lib")
2
3if(NOT EXISTS ${zig0_EXE})
4 message("::")
5 message(":: ERROR: Executable not found")
6 message(":: (execute_process)")
7 message("::")
8 message(":: executable: ${zig0_EXE}")
9 message("::")
10 message(FATAL_ERROR)
11endif()
12
13execute_process(COMMAND ${zig0_EXE} ${INSTALL_LIBUSERLAND_ARGS}
14 WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}
15 RESULT_VARIABLE _result
16)
17if(_result)
18 message("::")
19 message(":: ERROR: ${_result}")
20 message(":: (execute_process)")
21
22 string(REPLACE ";" " " s_INSTALL_LIBUSERLAND_ARGS "${INSTALL_LIBUSERLAND_ARGS}")
23 message("::")
24 message(":: argv: ${zig0_EXE} ${s_INSTALL_LIBUSERLAND_ARGS} install")
25
26 set(_args ${zig0_EXE} ${INSTALL_LIBUSERLAND_ARGS})
27 list(LENGTH _args _len)
28 math(EXPR _len "${_len} - 1")
29 message("::")
30 foreach(_i RANGE 0 ${_len})
31 list(GET _args ${_i} _arg)
32 message(":: argv[${_i}]: ${_arg}")
33 endforeach()
34
35 message("::")
36 message(FATAL_ERROR)
37endif()
doc/langref.html.in+41
...@@ -2893,6 +2893,47 @@ test "switch using enum literals" {...@@ -2893,6 +2893,47 @@ test "switch using enum literals" {
2893}2893}
2894 {#code_end#}2894 {#code_end#}
2895 {#header_close#}2895 {#header_close#}
2896
2897 {#header_open|Non-exhaustive enum#}
2898 <p>
2899 A Non-exhaustive enum can be created by adding a trailing '_' field.
2900 It must specify a tag type and cannot consume every enumeration value.
2901 </p>
2902 <p>
2903 {#link|@intToEnum#} on a non-exhaustive enum cannot fail.
2904 </p>
2905 <p>
2906 A switch on a non-exhaustive enum can include a '_' prong as an alternative to an {#syntax#}else{#endsyntax#} prong
2907 with the difference being that it makes it a compile error if all the known tag names are not handled by the switch.
2908 </p>
2909 {#code_begin|test#}
2910const std = @import("std");
2911const assert = std.debug.assert;
2912
2913const Number = enum(u8) {
2914 One,
2915 Two,
2916 Three,
2917 _,
2918};
2919
2920test "switch on non-exhaustive enum" {
2921 const number = Number.One;
2922 const result = switch (number) {
2923 .One => true,
2924 .Two,
2925 .Three => false,
2926 _ => false,
2927 };
2928 assert(result);
2929 const is_one = switch (number) {
2930 .One => true,
2931 else => false,
2932 };
2933 assert(is_one);
2934}
2935 {#code_end#}
2936 {#header_close#}
2896 {#header_close#}2937 {#header_close#}
28972938
2898 {#header_open|union#}2939 {#header_open|union#}
lib/std/buffer.zig+3-3
...@@ -57,11 +57,11 @@ pub const Buffer = struct {...@@ -57,11 +57,11 @@ pub const Buffer = struct {
5757
58 /// The caller owns the returned memory. The Buffer becomes null and58 /// The caller owns the returned memory. The Buffer becomes null and
59 /// is safe to `deinit`.59 /// is safe to `deinit`.
60 pub fn toOwnedSlice(self: *Buffer) []u8 {60 pub fn toOwnedSlice(self: *Buffer) [:0]u8 {
61 const allocator = self.list.allocator;61 const allocator = self.list.allocator;
62 const result = allocator.shrink(self.list.items, self.len());62 const result = self.list.toOwnedSlice();
63 self.* = initNull(allocator);63 self.* = initNull(allocator);
64 return result;64 return result[0 .. result.len - 1 :0];
65 }65 }
6666
67 pub fn allocPrint(allocator: *Allocator, comptime format: []const u8, args: var) !Buffer {67 pub fn allocPrint(allocator: *Allocator, comptime format: []const u8, args: var) !Buffer {
lib/std/build.zig+43-2
...@@ -484,6 +484,7 @@ pub const Builder = struct {...@@ -484,6 +484,7 @@ pub const Builder = struct {
484 .arch = builtin.arch,484 .arch = builtin.arch,
485 .os = builtin.os,485 .os = builtin.os,
486 .abi = builtin.abi,486 .abi = builtin.abi,
487 .cpu_features = builtin.cpu_features,
487 },488 },
488 }).linuxTriple(self.allocator);489 }).linuxTriple(self.allocator);
489490
...@@ -1375,6 +1376,7 @@ pub const LibExeObjStep = struct {...@@ -1375,6 +1376,7 @@ pub const LibExeObjStep = struct {
1375 .arch = target_arch,1376 .arch = target_arch,
1376 .os = target_os,1377 .os = target_os,
1377 .abi = target_abi,1378 .abi = target_abi,
1379 .cpu_features = target_arch.getBaselineCpuFeatures(),
1378 },1380 },
1379 });1381 });
1380 }1382 }
...@@ -1687,7 +1689,9 @@ pub const LibExeObjStep = struct {...@@ -1687,7 +1689,9 @@ pub const LibExeObjStep = struct {
1687 }1689 }
16881690
1689 pub fn addAssemblyFile(self: *LibExeObjStep, path: []const u8) void {1691 pub fn addAssemblyFile(self: *LibExeObjStep, path: []const u8) void {
1690 self.link_objects.append(LinkObject{ .AssemblyFile = self.builder.dupe(path) }) catch unreachable;1692 self.link_objects.append(LinkObject{
1693 .AssemblyFile = .{ .path = self.builder.dupe(path) },
1694 }) catch unreachable;
1691 }1695 }
16921696
1693 pub fn addAssemblyFileFromWriteFileStep(self: *LibExeObjStep, wfs: *WriteFileStep, basename: []const u8) void {1697 pub fn addAssemblyFileFromWriteFileStep(self: *LibExeObjStep, wfs: *WriteFileStep, basename: []const u8) void {
...@@ -1968,9 +1972,46 @@ pub const LibExeObjStep = struct {...@@ -1968,9 +1972,46 @@ pub const LibExeObjStep = struct {
19681972
1969 switch (self.target) {1973 switch (self.target) {
1970 .Native => {},1974 .Native => {},
1971 .Cross => {1975 .Cross => |cross| {
1972 try zig_args.append("-target");1976 try zig_args.append("-target");
1973 try zig_args.append(self.target.zigTriple(builder.allocator) catch unreachable);1977 try zig_args.append(self.target.zigTriple(builder.allocator) catch unreachable);
1978
1979 const all_features = self.target.getArch().allFeaturesList();
1980 var populated_cpu_features = cross.cpu_features.cpu.features;
1981 populated_cpu_features.populateDependencies(all_features);
1982
1983 if (populated_cpu_features.eql(cross.cpu_features.features)) {
1984 // The CPU name alone is sufficient.
1985 // If it is the baseline CPU, no command line args are required.
1986 if (cross.cpu_features.cpu != self.target.getArch().getBaselineCpuFeatures().cpu) {
1987 try zig_args.append("-target-cpu");
1988 try zig_args.append(cross.cpu_features.cpu.name);
1989 }
1990 } else {
1991 try zig_args.append("-target-cpu");
1992 try zig_args.append(cross.cpu_features.cpu.name);
1993
1994 try zig_args.append("-target-feature");
1995 var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0);
1996 for (all_features) |feature, i_usize| {
1997 const i = @intCast(Target.Cpu.Feature.Set.Index, i_usize);
1998 const in_cpu_set = populated_cpu_features.isEnabled(i);
1999 const in_actual_set = cross.cpu_features.features.isEnabled(i);
2000 if (in_cpu_set and !in_actual_set) {
2001 try feature_str_buffer.appendByte('-');
2002 try feature_str_buffer.append(feature.name);
2003 try feature_str_buffer.appendByte(',');
2004 } else if (!in_cpu_set and in_actual_set) {
2005 try feature_str_buffer.appendByte('+');
2006 try feature_str_buffer.append(feature.name);
2007 try feature_str_buffer.appendByte(',');
2008 }
2009 }
2010 if (mem.endsWith(u8, feature_str_buffer.toSliceConst(), ",")) {
2011 feature_str_buffer.shrink(feature_str_buffer.len() - 1);
2012 }
2013 try zig_args.append(feature_str_buffer.toSliceConst());
2014 }
1974 },2015 },
1975 }2016 }
19762017
lib/std/builtin.zig+10
...@@ -1,5 +1,8 @@...@@ -1,5 +1,8 @@
1pub usingnamespace @import("builtin");1pub usingnamespace @import("builtin");
22
3/// Deprecated: use `std.Target.Os`.
4pub const Target = std.Target;
5
3/// Deprecated: use `std.Target.Os`.6/// Deprecated: use `std.Target.Os`.
4pub const Os = std.Target.Os;7pub const Os = std.Target.Os;
58
...@@ -15,6 +18,12 @@ pub const ObjectFormat = std.Target.ObjectFormat;...@@ -15,6 +18,12 @@ pub const ObjectFormat = std.Target.ObjectFormat;
15/// Deprecated: use `std.Target.SubSystem`.18/// Deprecated: use `std.Target.SubSystem`.
16pub const SubSystem = std.Target.SubSystem;19pub const SubSystem = std.Target.SubSystem;
1720
21/// Deprecated: use `std.Target.CpuFeatures`.
22pub const CpuFeatures = std.Target.CpuFeatures;
23
24/// Deprecated: use `std.Target.Cpu`.
25pub const Cpu = std.Target.Cpu;
26
18/// `explicit_subsystem` is missing when the subsystem is automatically detected,27/// `explicit_subsystem` is missing when the subsystem is automatically detected,
19/// so Zig standard library has the subsystem detection logic here. This should generally be28/// so Zig standard library has the subsystem detection logic here. This should generally be
20/// used rather than `explicit_subsystem`.29/// used rather than `explicit_subsystem`.
...@@ -254,6 +263,7 @@ pub const TypeInfo = union(enum) {...@@ -254,6 +263,7 @@ pub const TypeInfo = union(enum) {
254 tag_type: type,263 tag_type: type,
255 fields: []EnumField,264 fields: []EnumField,
256 decls: []Declaration,265 decls: []Declaration,
266 is_exhaustive: bool,
257 };267 };
258268
259 /// This data structure is used by the Zig language code generation and269 /// This data structure is used by the Zig language code generation and
lib/std/c.zig+3-3
...@@ -185,7 +185,7 @@ pub extern "c" fn getaddrinfo(...@@ -185,7 +185,7 @@ pub extern "c" fn getaddrinfo(
185 noalias service: [*:0]const u8,185 noalias service: [*:0]const u8,
186 noalias hints: *const addrinfo,186 noalias hints: *const addrinfo,
187 noalias res: **addrinfo,187 noalias res: **addrinfo,
188) c_int;188) EAI;
189189
190pub extern "c" fn freeaddrinfo(res: *addrinfo) void;190pub extern "c" fn freeaddrinfo(res: *addrinfo) void;
191191
...@@ -197,9 +197,9 @@ pub extern "c" fn getnameinfo(...@@ -197,9 +197,9 @@ pub extern "c" fn getnameinfo(
197 noalias serv: [*]u8,197 noalias serv: [*]u8,
198 servlen: socklen_t,198 servlen: socklen_t,
199 flags: u32,199 flags: u32,
200) c_int;200) EAI;
201201
202pub extern "c" fn gai_strerror(errcode: c_int) [*:0]const u8;202pub extern "c" fn gai_strerror(errcode: EAI) [*:0]const u8;
203203
204pub extern "c" fn poll(fds: [*]pollfd, nfds: nfds_t, timeout: c_int) c_int;204pub extern "c" fn poll(fds: [*]pollfd, nfds: nfds_t, timeout: c_int) c_int;
205205
lib/std/c/darwin.zig+36-28
...@@ -7,7 +7,10 @@ usingnamespace @import("../os/bits.zig");...@@ -7,7 +7,10 @@ usingnamespace @import("../os/bits.zig");
77
8extern "c" fn __error() *c_int;8extern "c" fn __error() *c_int;
9pub extern "c" fn _NSGetExecutablePath(buf: [*]u8, bufsize: *u32) c_int;9pub extern "c" fn _NSGetExecutablePath(buf: [*]u8, bufsize: *u32) c_int;
10pub extern "c" fn _dyld_image_count() u32;
10pub extern "c" fn _dyld_get_image_header(image_index: u32) ?*mach_header;11pub extern "c" fn _dyld_get_image_header(image_index: u32) ?*mach_header;
12pub extern "c" fn _dyld_get_image_vmaddr_slide(image_index: u32) usize;
13pub extern "c" fn _dyld_get_image_name(image_index: u32) [*:0]const u8;
1114
12pub extern "c" fn __getdirentries64(fd: c_int, buf_ptr: [*]u8, buf_len: usize, basep: *i64) isize;15pub extern "c" fn __getdirentries64(fd: c_int, buf_ptr: [*]u8, buf_len: usize, basep: *i64) isize;
1316
...@@ -70,47 +73,52 @@ pub const AI_NUMERICHOST = 0x00000004;...@@ -70,47 +73,52 @@ pub const AI_NUMERICHOST = 0x00000004;
70/// prevent service name resolution73/// prevent service name resolution
71pub const AI_NUMERICSERV = 0x00001000;74pub const AI_NUMERICSERV = 0x00001000;
7275
73/// address family for hostname not supported76pub const EAI = extern enum(c_int) {
74pub const EAI_ADDRFAMILY = 1;77 /// address family for hostname not supported
78 ADDRFAMILY = 1,
7579
76/// temporary failure in name resolution80 /// temporary failure in name resolution
77pub const EAI_AGAIN = 2;81 AGAIN = 2,
7882
79/// invalid value for ai_flags83 /// invalid value for ai_flags
80pub const EAI_BADFLAGS = 3;84 BADFLAGS = 3,
8185
82/// non-recoverable failure in name resolution86 /// non-recoverable failure in name resolution
83pub const EAI_FAIL = 4;87 FAIL = 4,
8488
85/// ai_family not supported89 /// ai_family not supported
86pub const EAI_FAMILY = 5;90 FAMILY = 5,
8791
88/// memory allocation failure92 /// memory allocation failure
89pub const EAI_MEMORY = 6;93 MEMORY = 6,
9094
91/// no address associated with hostname95 /// no address associated with hostname
92pub const EAI_NODATA = 7;96 NODATA = 7,
9397
94/// hostname nor servname provided, or not known98 /// hostname nor servname provided, or not known
95pub const EAI_NONAME = 8;99 NONAME = 8,
96100
97/// servname not supported for ai_socktype101 /// servname not supported for ai_socktype
98pub const EAI_SERVICE = 9;102 SERVICE = 9,
99103
100/// ai_socktype not supported104 /// ai_socktype not supported
101pub const EAI_SOCKTYPE = 10;105 SOCKTYPE = 10,
102106
103/// system error returned in errno107 /// system error returned in errno
104pub const EAI_SYSTEM = 11;108 SYSTEM = 11,
105109
106/// invalid value for hints110 /// invalid value for hints
107pub const EAI_BADHINTS = 12;111 BADHINTS = 12,
108112
109/// resolved protocol is unknown113 /// resolved protocol is unknown
110pub const EAI_PROTOCOL = 13;114 PROTOCOL = 13,
115
116 /// argument buffer overflow
117 OVERFLOW = 14,
118
119 _,
120};
111121
112/// argument buffer overflow
113pub const EAI_OVERFLOW = 14;
114pub const EAI_MAX = 15;122pub const EAI_MAX = 15;
115123
116pub const pthread_mutex_t = extern struct {124pub const pthread_mutex_t = extern struct {
lib/std/c/freebsd.zig+32-28
...@@ -23,47 +23,51 @@ pub const pthread_attr_t = extern struct {...@@ -23,47 +23,51 @@ pub const pthread_attr_t = extern struct {
23 __align: c_long,23 __align: c_long,
24};24};
2525
26/// address family for hostname not supported26pub const EAI = extern enum(c_int) {
27pub const EAI_ADDRFAMILY = 1;27 /// address family for hostname not supported
28 ADDRFAMILY = 1,
2829
29/// name could not be resolved at this time30 /// name could not be resolved at this time
30pub const EAI_AGAIN = 2;31 AGAIN = 2,
3132
32/// flags parameter had an invalid value33 /// flags parameter had an invalid value
33pub const EAI_BADFLAGS = 3;34 BADFLAGS = 3,
3435
35/// non-recoverable failure in name resolution36 /// non-recoverable failure in name resolution
36pub const EAI_FAIL = 4;37 FAIL = 4,
3738
38/// address family not recognized39 /// address family not recognized
39pub const EAI_FAMILY = 5;40 FAMILY = 5,
4041
41/// memory allocation failure42 /// memory allocation failure
42pub const EAI_MEMORY = 6;43 MEMORY = 6,
4344
44/// no address associated with hostname45 /// no address associated with hostname
45pub const EAI_NODATA = 7;46 NODATA = 7,
4647
47/// name does not resolve48 /// name does not resolve
48pub const EAI_NONAME = 8;49 NONAME = 8,
4950
50/// service not recognized for socket type51 /// service not recognized for socket type
51pub const EAI_SERVICE = 9;52 SERVICE = 9,
5253
53/// intended socket type was not recognized54 /// intended socket type was not recognized
54pub const EAI_SOCKTYPE = 10;55 SOCKTYPE = 10,
5556
56/// system error returned in errno57 /// system error returned in errno
57pub const EAI_SYSTEM = 11;58 SYSTEM = 11,
5859
59/// invalid value for hints60 /// invalid value for hints
60pub const EAI_BADHINTS = 12;61 BADHINTS = 12,
6162
62/// resolved protocol is unknown63 /// resolved protocol is unknown
63pub const EAI_PROTOCOL = 13;64 PROTOCOL = 13,
6465
65/// argument buffer overflow66 /// argument buffer overflow
66pub const EAI_OVERFLOW = 14;67 OVERFLOW = 14,
68
69 _,
70};
6771
68pub const EAI_MAX = 15;72pub const EAI_MAX = 15;
6973
lib/std/c/linux.zig+22-18
...@@ -32,25 +32,29 @@ pub const NI_NAMEREQD = 0x08;...@@ -32,25 +32,29 @@ pub const NI_NAMEREQD = 0x08;
32pub const NI_DGRAM = 0x10;32pub const NI_DGRAM = 0x10;
33pub const NI_NUMERICSCOPE = 0x100;33pub const NI_NUMERICSCOPE = 0x100;
3434
35pub const EAI_BADFLAGS = -1;35pub const EAI = extern enum(c_int) {
36pub const EAI_NONAME = -2;36 BADFLAGS = -1,
37pub const EAI_AGAIN = -3;37 NONAME = -2,
38pub const EAI_FAIL = -4;38 AGAIN = -3,
39pub const EAI_FAMILY = -6;39 FAIL = -4,
40pub const EAI_SOCKTYPE = -7;40 FAMILY = -6,
41pub const EAI_SERVICE = -8;41 SOCKTYPE = -7,
42pub const EAI_MEMORY = -10;42 SERVICE = -8,
43pub const EAI_SYSTEM = -11;43 MEMORY = -10,
44pub const EAI_OVERFLOW = -12;44 SYSTEM = -11,
45 OVERFLOW = -12,
4546
46pub const EAI_NODATA = -5;47 NODATA = -5,
47pub const EAI_ADDRFAMILY = -9;48 ADDRFAMILY = -9,
48pub const EAI_INPROGRESS = -100;49 INPROGRESS = -100,
49pub const EAI_CANCELED = -101;50 CANCELED = -101,
50pub const EAI_NOTCANCELED = -102;51 NOTCANCELED = -102,
51pub const EAI_ALLDONE = -103;52 ALLDONE = -103,
52pub const EAI_INTR = -104;53 INTR = -104,
53pub const EAI_IDN_ENCODE = -105;54 IDN_ENCODE = -105,
55
56 _,
57};
5458
55pub extern "c" fn getrandom(buf_ptr: [*]u8, buf_len: usize, flags: c_uint) isize;59pub extern "c" fn getrandom(buf_ptr: [*]u8, buf_len: usize, flags: c_uint) isize;
56pub extern "c" fn sched_getaffinity(pid: c_int, size: usize, set: *cpu_set_t) c_int;60pub extern "c" fn sched_getaffinity(pid: c_int, size: usize, set: *cpu_set_t) c_int;
lib/std/debug.zig+451-620
...@@ -81,10 +81,20 @@ pub fn getSelfDebugInfo() !*DebugInfo {...@@ -81,10 +81,20 @@ pub fn getSelfDebugInfo() !*DebugInfo {
81 }81 }
82}82}
8383
84fn wantTtyColor() bool {84pub fn detectTTYConfig() TTY.Config {
85 var bytes: [128]u8 = undefined;85 var bytes: [128]u8 = undefined;
86 const allocator = &std.heap.FixedBufferAllocator.init(bytes[0..]).allocator;86 const allocator = &std.heap.FixedBufferAllocator.init(bytes[0..]).allocator;
87 return if (process.getEnvVarOwned(allocator, "ZIG_DEBUG_COLOR")) |_| true else |_| stderr_file.isTty();87 if (process.getEnvVarOwned(allocator, "ZIG_DEBUG_COLOR")) |_| {
88 return .escape_codes;
89 } else |_| {
90 if (stderr_file.supportsAnsiEscapeCodes()) {
91 return .escape_codes;
92 } else if (builtin.os == .windows and stderr_file.isTty()) {
93 return .windows_api;
94 } else {
95 return .no_color;
96 }
97 }
88}98}
8999
90/// Tries to print the current stack trace to stderr, unbuffered, and ignores any error returned.100/// Tries to print the current stack trace to stderr, unbuffered, and ignores any error returned.
...@@ -99,7 +109,7 @@ pub fn dumpCurrentStackTrace(start_addr: ?usize) void {...@@ -99,7 +109,7 @@ pub fn dumpCurrentStackTrace(start_addr: ?usize) void {
99 stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;109 stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;
100 return;110 return;
101 };111 };
102 writeCurrentStackTrace(stderr, debug_info, wantTtyColor(), start_addr) catch |err| {112 writeCurrentStackTrace(stderr, debug_info, detectTTYConfig(), start_addr) catch |err| {
103 stderr.print("Unable to dump stack trace: {}\n", .{@errorName(err)}) catch return;113 stderr.print("Unable to dump stack trace: {}\n", .{@errorName(err)}) catch return;
104 return;114 return;
105 };115 };
...@@ -118,16 +128,16 @@ pub fn dumpStackTraceFromBase(bp: usize, ip: usize) void {...@@ -118,16 +128,16 @@ pub fn dumpStackTraceFromBase(bp: usize, ip: usize) void {
118 stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;128 stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;
119 return;129 return;
120 };130 };
121 const tty_color = wantTtyColor();131 const tty_config = detectTTYConfig();
122 printSourceAtAddress(debug_info, stderr, ip, tty_color) catch return;132 printSourceAtAddress(debug_info, stderr, ip, tty_config) catch return;
123 const first_return_address = @intToPtr(*const usize, bp + @sizeOf(usize)).*;133 const first_return_address = @intToPtr(*const usize, bp + @sizeOf(usize)).*;
124 printSourceAtAddress(debug_info, stderr, first_return_address - 1, tty_color) catch return;134 printSourceAtAddress(debug_info, stderr, first_return_address - 1, tty_config) catch return;
125 var it = StackIterator{135 var it = StackIterator{
126 .first_addr = null,136 .first_addr = null,
127 .fp = bp,137 .fp = bp,
128 };138 };
129 while (it.next()) |return_address| {139 while (it.next()) |return_address| {
130 printSourceAtAddress(debug_info, stderr, return_address - 1, tty_color) catch return;140 printSourceAtAddress(debug_info, stderr, return_address - 1, tty_config) catch return;
131 }141 }
132}142}
133143
...@@ -191,7 +201,7 @@ pub fn dumpStackTrace(stack_trace: builtin.StackTrace) void {...@@ -191,7 +201,7 @@ pub fn dumpStackTrace(stack_trace: builtin.StackTrace) void {
191 stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;201 stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;
192 return;202 return;
193 };203 };
194 writeStackTrace(stack_trace, stderr, getDebugInfoAllocator(), debug_info, wantTtyColor()) catch |err| {204 writeStackTrace(stack_trace, stderr, getDebugInfoAllocator(), debug_info, detectTTYConfig()) catch |err| {
195 stderr.print("Unable to dump stack trace: {}\n", .{@errorName(err)}) catch return;205 stderr.print("Unable to dump stack trace: {}\n", .{@errorName(err)}) catch return;
196 return;206 return;
197 };207 };
...@@ -264,7 +274,7 @@ pub fn writeStackTrace(...@@ -264,7 +274,7 @@ pub fn writeStackTrace(
264 out_stream: var,274 out_stream: var,
265 allocator: *mem.Allocator,275 allocator: *mem.Allocator,
266 debug_info: *DebugInfo,276 debug_info: *DebugInfo,
267 tty_color: bool,277 tty_config: TTY.Config,
268) !void {278) !void {
269 if (builtin.strip_debug_info) return error.MissingDebugInfo;279 if (builtin.strip_debug_info) return error.MissingDebugInfo;
270 var frame_index: usize = 0;280 var frame_index: usize = 0;
...@@ -275,7 +285,7 @@ pub fn writeStackTrace(...@@ -275,7 +285,7 @@ pub fn writeStackTrace(
275 frame_index = (frame_index + 1) % stack_trace.instruction_addresses.len;285 frame_index = (frame_index + 1) % stack_trace.instruction_addresses.len;
276 }) {286 }) {
277 const return_address = stack_trace.instruction_addresses[frame_index];287 const return_address = stack_trace.instruction_addresses[frame_index];
278 try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_color);288 try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_config);
279 }289 }
280}290}
281291
...@@ -319,20 +329,25 @@ pub const StackIterator = struct {...@@ -319,20 +329,25 @@ pub const StackIterator = struct {
319 }329 }
320};330};
321331
322pub fn writeCurrentStackTrace(out_stream: var, debug_info: *DebugInfo, tty_color: bool, start_addr: ?usize) !void {332pub fn writeCurrentStackTrace(
333 out_stream: var,
334 debug_info: *DebugInfo,
335 tty_config: TTY.Config,
336 start_addr: ?usize,
337) !void {
323 if (builtin.os == .windows) {338 if (builtin.os == .windows) {
324 return writeCurrentStackTraceWindows(out_stream, debug_info, tty_color, start_addr);339 return writeCurrentStackTraceWindows(out_stream, debug_info, tty_config, start_addr);
325 }340 }
326 var it = StackIterator.init(start_addr);341 var it = StackIterator.init(start_addr);
327 while (it.next()) |return_address| {342 while (it.next()) |return_address| {
328 try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_color);343 try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_config);
329 }344 }
330}345}
331346
332pub fn writeCurrentStackTraceWindows(347pub fn writeCurrentStackTraceWindows(
333 out_stream: var,348 out_stream: var,
334 debug_info: *DebugInfo,349 debug_info: *DebugInfo,
335 tty_color: bool,350 tty_config: TTY.Config,
336 start_addr: ?usize,351 start_addr: ?usize,
337) !void {352) !void {
338 var addr_buf: [1024]usize = undefined;353 var addr_buf: [1024]usize = undefined;
...@@ -345,23 +360,28 @@ pub fn writeCurrentStackTraceWindows(...@@ -345,23 +360,28 @@ pub fn writeCurrentStackTraceWindows(
345 return;360 return;
346 } else 0;361 } else 0;
347 for (addrs[start_i..]) |addr| {362 for (addrs[start_i..]) |addr| {
348 try printSourceAtAddress(debug_info, out_stream, addr, tty_color);363 try printSourceAtAddress(debug_info, out_stream, addr - 1, tty_config);
349 }364 }
350}365}
351366
352/// TODO once https://github.com/ziglang/zig/issues/3157 is fully implemented,367/// TODO once https://github.com/ziglang/zig/issues/3157 is fully implemented,
353/// make this `noasync fn` and remove the individual noasync calls.368/// make this `noasync fn` and remove the individual noasync calls.
354pub fn printSourceAtAddress(debug_info: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {369pub fn printSourceAtAddress(debug_info: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void {
355 if (builtin.os == .windows) {370 if (builtin.os == .windows) {
356 return noasync printSourceAtAddressWindows(debug_info, out_stream, address, tty_color);371 return noasync printSourceAtAddressWindows(debug_info, out_stream, address, tty_config);
357 }372 }
358 if (comptime std.Target.current.isDarwin()) {373 if (comptime std.Target.current.isDarwin()) {
359 return noasync printSourceAtAddressMacOs(debug_info, out_stream, address, tty_color);374 return noasync printSourceAtAddressMacOs(debug_info, out_stream, address, tty_config);
360 }375 }
361 return noasync printSourceAtAddressPosix(debug_info, out_stream, address, tty_color);376 return noasync printSourceAtAddressPosix(debug_info, out_stream, address, tty_config);
362}377}
363378
364fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_address: usize, tty_color: bool) !void {379fn printSourceAtAddressWindows(
380 di: *DebugInfo,
381 out_stream: var,
382 relocated_address: usize,
383 tty_config: TTY.Config,
384) !void {
365 const allocator = getDebugInfoAllocator();385 const allocator = getDebugInfoAllocator();
366 const base_address = process.getBaseAddress();386 const base_address = process.getBaseAddress();
367 const relative_address = relocated_address - base_address;387 const relative_address = relocated_address - base_address;
...@@ -379,16 +399,7 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres...@@ -379,16 +399,7 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres
379 }399 }
380 } else {400 } else {
381 // we have no information to add to the address401 // we have no information to add to the address
382 if (tty_color) {402 return printLineInfo(out_stream, null, relocated_address, "???", "???", tty_config, printLineFromFileAnyOs);
383 try out_stream.print("???:?:?: ", .{});
384 setTtyColor(TtyColor.Dim);
385 try out_stream.print("0x{x} in ??? (???)", .{relocated_address});
386 setTtyColor(TtyColor.Reset);
387 try out_stream.print("\n\n\n", .{});
388 } else {
389 try out_stream.print("???:?:?: 0x{x} in ??? (???)\n\n\n", .{relocated_address});
390 }
391 return;
392 };403 };
393404
394 const mod = &di.modules[mod_index];405 const mod = &di.modules[mod_index];
...@@ -401,7 +412,7 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres...@@ -401,7 +412,7 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres
401 if (prefix.RecordLen < 2)412 if (prefix.RecordLen < 2)
402 return error.InvalidDebugInfo;413 return error.InvalidDebugInfo;
403 switch (prefix.RecordKind) {414 switch (prefix.RecordKind) {
404 pdb.SymbolKind.S_LPROC32 => {415 .S_LPROC32, .S_GPROC32 => {
405 const proc_sym = @ptrCast(*pdb.ProcSym, &mod.symbols[symbol_i + @sizeOf(pdb.RecordPrefix)]);416 const proc_sym = @ptrCast(*pdb.ProcSym, &mod.symbols[symbol_i + @sizeOf(pdb.RecordPrefix)]);
406 const vaddr_start = coff_section.header.virtual_address + proc_sym.CodeOffset;417 const vaddr_start = coff_section.header.virtual_address + proc_sym.CodeOffset;
407 const vaddr_end = vaddr_start + proc_sym.CodeSize;418 const vaddr_end = vaddr_start + proc_sym.CodeSize;
...@@ -510,137 +521,86 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres...@@ -510,137 +521,86 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres
510 }521 }
511 };522 };
512523
513 if (tty_color) {524 try printLineInfo(
514 setTtyColor(TtyColor.White);525 out_stream,
515 if (opt_line_info) |li| {526 opt_line_info,
516 try out_stream.print("{}:{}:{}", .{ li.file_name, li.line, li.column });527 relocated_address,
517 } else {528 symbol_name,
518 try out_stream.print("???:?:?", .{});529 obj_basename,
519 }530 tty_config,
520 setTtyColor(TtyColor.Reset);531 printLineFromFileAnyOs,
521 try out_stream.print(": ", .{});532 );
522 setTtyColor(TtyColor.Dim);
523 try out_stream.print("0x{x} in {} ({})", .{ relocated_address, symbol_name, obj_basename });
524 setTtyColor(TtyColor.Reset);
525
526 if (opt_line_info) |line_info| {
527 try out_stream.print("\n", .{});
528 if (printLineFromFileAnyOs(out_stream, line_info)) {
529 if (line_info.column == 0) {
530 try out_stream.write("\n");
531 } else {
532 {
533 var col_i: usize = 1;
534 while (col_i < line_info.column) : (col_i += 1) {
535 try out_stream.writeByte(' ');
536 }
537 }
538 setTtyColor(TtyColor.Green);
539 try out_stream.write("^");
540 setTtyColor(TtyColor.Reset);
541 try out_stream.write("\n");
542 }
543 } else |err| switch (err) {
544 error.EndOfFile => {},
545 error.FileNotFound => {
546 setTtyColor(TtyColor.Dim);
547 try out_stream.write("file not found\n\n");
548 setTtyColor(TtyColor.White);
549 },
550 else => return err,
551 }
552 } else {
553 try out_stream.print("\n\n\n", .{});
554 }
555 } else {
556 if (opt_line_info) |li| {
557 try out_stream.print("{}:{}:{}: 0x{x} in {} ({})\n\n\n", .{
558 li.file_name,
559 li.line,
560 li.column,
561 relocated_address,
562 symbol_name,
563 obj_basename,
564 });
565 } else {
566 try out_stream.print("???:?:?: 0x{x} in {} ({})\n\n\n", .{
567 relocated_address,
568 symbol_name,
569 obj_basename,
570 });
571 }
572 }
573}533}
574534
575const TtyColor = enum {535pub const TTY = struct {
576 Red,536 pub const Color = enum {
577 Green,537 Red,
578 Cyan,538 Green,
579 White,539 Cyan,
580 Dim,540 White,
581 Bold,541 Dim,
582 Reset,542 Bold,
583};543 Reset,
544 };
584545
585/// TODO this is a special case hack right now. clean it up and maybe make it part of std.fmt546 pub const Config = enum {
586fn setTtyColor(tty_color: TtyColor) void {547 no_color,
587 if (stderr_file.supportsAnsiEscapeCodes()) {548 escape_codes,
588 switch (tty_color) {549 // TODO give this a payload of file handle
589 TtyColor.Red => {550 windows_api,
590 stderr_file.write(RED) catch return;551
591 },552 fn setColor(conf: Config, out_stream: var, color: Color) void {
592 TtyColor.Green => {553 switch (conf) {
593 stderr_file.write(GREEN) catch return;554 .no_color => return,
594 },555 .escape_codes => switch (color) {
595 TtyColor.Cyan => {556 .Red => out_stream.write(RED) catch return,
596 stderr_file.write(CYAN) catch return;557 .Green => out_stream.write(GREEN) catch return,
597 },558 .Cyan => out_stream.write(CYAN) catch return,
598 TtyColor.White, TtyColor.Bold => {559 .White, .Bold => out_stream.write(WHITE) catch return,
599 stderr_file.write(WHITE) catch return;560 .Dim => out_stream.write(DIM) catch return,
600 },561 .Reset => out_stream.write(RESET) catch return,
601 TtyColor.Dim => {562 },
602 stderr_file.write(DIM) catch return;563 .windows_api => if (builtin.os == .windows) {
603 },564 const S = struct {
604 TtyColor.Reset => {565 var attrs: windows.WORD = undefined;
605 stderr_file.write(RESET) catch return;566 var init_attrs = false;
606 },567 };
607 }568 if (!S.init_attrs) {
608 } else {569 S.init_attrs = true;
609 const S = struct {570 var info: windows.CONSOLE_SCREEN_BUFFER_INFO = undefined;
610 var attrs: windows.WORD = undefined;571 // TODO handle error
611 var init_attrs = false;572 _ = windows.kernel32.GetConsoleScreenBufferInfo(stderr_file.handle, &info);
612 };573 S.attrs = info.wAttributes;
613 if (!S.init_attrs) {574 }
614 S.init_attrs = true;
615 var info: windows.CONSOLE_SCREEN_BUFFER_INFO = undefined;
616 // TODO handle error
617 _ = windows.kernel32.GetConsoleScreenBufferInfo(stderr_file.handle, &info);
618 S.attrs = info.wAttributes;
619 }
620575
621 // TODO handle errors576 // TODO handle errors
622 switch (tty_color) {577 switch (color) {
623 TtyColor.Red => {578 .Red => {
624 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_INTENSITY) catch {};579 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_INTENSITY) catch {};
625 },580 },
626 TtyColor.Green => {581 .Green => {
627 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_INTENSITY) catch {};582 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_INTENSITY) catch {};
628 },583 },
629 TtyColor.Cyan => {584 .Cyan => {
630 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};585 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};
631 },586 },
632 TtyColor.White, TtyColor.Bold => {587 .White, .Bold => {
633 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};588 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};
634 },589 },
635 TtyColor.Dim => {590 .Dim => {
636 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_INTENSITY) catch {};591 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_INTENSITY) catch {};
637 },592 },
638 TtyColor.Reset => {593 .Reset => {
639 _ = windows.SetConsoleTextAttribute(stderr_file.handle, S.attrs) catch {};594 _ = windows.SetConsoleTextAttribute(stderr_file.handle, S.attrs) catch {};
640 },595 },
596 }
597 } else {
598 unreachable;
599 },
600 }
641 }601 }
642 }602 };
643}603};
644604
645fn populateModule(di: *DebugInfo, mod: *Module) !void {605fn populateModule(di: *DebugInfo, mod: *Module) !void {
646 if (mod.populated)606 if (mod.populated)
...@@ -706,17 +666,12 @@ fn machoSearchSymbols(symbols: []const MachoSymbol, address: usize) ?*const Mach...@@ -706,17 +666,12 @@ fn machoSearchSymbols(symbols: []const MachoSymbol, address: usize) ?*const Mach
706 return null;666 return null;
707}667}
708668
709fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {669fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void {
710 const base_addr = process.getBaseAddress();670 const base_addr = process.getBaseAddress();
711 const adjusted_addr = 0x100000000 + (address - base_addr);671 const adjusted_addr = 0x100000000 + (address - base_addr);
712672
713 const symbol = machoSearchSymbols(di.symbols, adjusted_addr) orelse {673 const symbol = machoSearchSymbols(di.symbols, adjusted_addr) orelse {
714 if (tty_color) {674 return printLineInfo(out_stream, null, address, "???", "???", tty_config, printLineFromFileAnyOs);
715 try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in ??? (???)" ++ RESET ++ "\n\n\n", .{address});
716 } else {
717 try out_stream.print("???:?:?: 0x{x} in ??? (???)\n\n\n", .{address});
718 }
719 return;
720 };675 };
721676
722 const symbol_name = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + symbol.nlist.n_strx));677 const symbol_name = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + symbol.nlist.n_strx));
...@@ -724,78 +679,70 @@ fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tt...@@ -724,78 +679,70 @@ fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tt
724 const ofile_path = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + ofile.n_strx));679 const ofile_path = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + ofile.n_strx));
725 break :blk fs.path.basename(ofile_path);680 break :blk fs.path.basename(ofile_path);
726 } else "???";681 } else "???";
727 if (getLineNumberInfoMacOs(di, symbol.*, adjusted_addr)) |line_info| {682
728 defer line_info.deinit();683 const line_info = getLineNumberInfoMacOs(di, symbol.*, adjusted_addr) catch |err| switch (err) {
729 try printLineInfo(684 error.MissingDebugInfo, error.InvalidDebugInfo => null,
730 out_stream,
731 line_info,
732 address,
733 symbol_name,
734 compile_unit_name,
735 tty_color,
736 printLineFromFileAnyOs,
737 );
738 } else |err| switch (err) {
739 error.MissingDebugInfo, error.InvalidDebugInfo => {
740 if (tty_color) {
741 try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in {} ({})" ++ RESET ++ "\n\n\n", .{
742 address, symbol_name, compile_unit_name,
743 });
744 } else {
745 try out_stream.print("???:?:?: 0x{x} in {} ({})\n\n\n", .{ address, symbol_name, compile_unit_name });
746 }
747 },
748 else => return err,685 else => return err,
749 }686 };
687 defer if (line_info) |li| li.deinit();
688
689 try printLineInfo(
690 out_stream,
691 line_info,
692 address,
693 symbol_name,
694 compile_unit_name,
695 tty_config,
696 printLineFromFileAnyOs,
697 );
750}698}
751699
752pub fn printSourceAtAddressPosix(debug_info: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {700pub fn printSourceAtAddressPosix(debug_info: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void {
753 return debug_info.printSourceAtAddress(out_stream, address, tty_color, printLineFromFileAnyOs);701 return debug_info.printSourceAtAddress(out_stream, address, tty_config, printLineFromFileAnyOs);
754}702}
755703
756fn printLineInfo(704fn printLineInfo(
757 out_stream: var,705 out_stream: var,
758 line_info: LineInfo,706 line_info: ?LineInfo,
759 address: usize,707 address: usize,
760 symbol_name: []const u8,708 symbol_name: []const u8,
761 compile_unit_name: []const u8,709 compile_unit_name: []const u8,
762 tty_color: bool,710 tty_config: TTY.Config,
763 comptime printLineFromFile: var,711 comptime printLineFromFile: var,
764) !void {712) !void {
765 if (tty_color) {713 tty_config.setColor(out_stream, .White);
766 try out_stream.print(WHITE ++ "{}:{}:{}" ++ RESET ++ ": " ++ DIM ++ "0x{x} in {} ({})" ++ RESET ++ "\n", .{714
767 line_info.file_name,715 if (line_info) |*li| {
768 line_info.line,716 try out_stream.print("{}:{}:{}", .{ li.file_name, li.line, li.column });
769 line_info.column,717 } else {
770 address,718 try out_stream.print("???:?:?", .{});
771 symbol_name,719 }
772 compile_unit_name,720
773 });721 tty_config.setColor(out_stream, .Reset);
774 if (printLineFromFile(out_stream, line_info)) {722 try out_stream.write(": ");
775 if (line_info.column == 0) {723 tty_config.setColor(out_stream, .Dim);
776 try out_stream.write("\n");724 try out_stream.print("0x{x} in {} ({})", .{ address, symbol_name, compile_unit_name });
777 } else {725 tty_config.setColor(out_stream, .Reset);
778 {726 try out_stream.write("\n");
779 var col_i: usize = 1;727
780 while (col_i < line_info.column) : (col_i += 1) {728 // Show the matching source code line if possible
781 try out_stream.writeByte(' ');729 if (line_info) |li| {
782 }730 if (noasync printLineFromFile(out_stream, li)) {
783 }731 if (li.column > 0) {
784 try out_stream.write(GREEN ++ "^" ++ RESET ++ "\n");732 // The caret already takes one char
733 const space_needed = @intCast(usize, li.column - 1);
734
735 try out_stream.writeByteNTimes(' ', space_needed);
736 tty_config.setColor(out_stream, .Green);
737 try out_stream.write("^");
738 tty_config.setColor(out_stream, .Reset);
785 }739 }
740 try out_stream.write("\n");
786 } else |err| switch (err) {741 } else |err| switch (err) {
787 error.EndOfFile, error.FileNotFound => {},742 error.EndOfFile, error.FileNotFound => {},
743 error.BadPathName => {},
788 else => return err,744 else => return err,
789 }745 }
790 } else {
791 try out_stream.print("{}:{}:{}: 0x{x} in {} ({})\n", .{
792 line_info.file_name,
793 line_info.line,
794 line_info.column,
795 address,
796 symbol_name,
797 compile_unit_name,
798 });
799 }746 }
800}747}
801748
...@@ -1016,59 +963,61 @@ pub fn openDwarfDebugInfo(di: *DwarfInfo, allocator: *mem.Allocator) !void {...@@ -1016,59 +963,61 @@ pub fn openDwarfDebugInfo(di: *DwarfInfo, allocator: *mem.Allocator) !void {
1016963
1017pub fn openElfDebugInfo(964pub fn openElfDebugInfo(
1018 allocator: *mem.Allocator,965 allocator: *mem.Allocator,
1019 elf_seekable_stream: *DwarfSeekableStream,966 data: []u8,
1020 elf_in_stream: *DwarfInStream,
1021) !DwarfInfo {967) !DwarfInfo {
1022 var efile = try elf.Elf.openStream(allocator, elf_seekable_stream, elf_in_stream);968 var seekable_stream = io.SliceSeekableInStream.init(data);
1023 errdefer efile.close();969 var efile = try elf.Elf.openStream(
970 allocator,
971 @ptrCast(*DwarfSeekableStream, &seekable_stream.seekable_stream),
972 @ptrCast(*DwarfInStream, &seekable_stream.stream),
973 );
974 defer efile.close();
975
976 const debug_info = (try efile.findSection(".debug_info")) orelse
977 return error.MissingDebugInfo;
978 const debug_abbrev = (try efile.findSection(".debug_abbrev")) orelse
979 return error.MissingDebugInfo;
980 const debug_str = (try efile.findSection(".debug_str")) orelse
981 return error.MissingDebugInfo;
982 const debug_line = (try efile.findSection(".debug_line")) orelse
983 return error.MissingDebugInfo;
984 const opt_debug_ranges = try efile.findSection(".debug_ranges");
1024985
1025 var di = DwarfInfo{986 var di = DwarfInfo{
1026 .dwarf_seekable_stream = elf_seekable_stream,
1027 .dwarf_in_stream = elf_in_stream,
1028 .endian = efile.endian,987 .endian = efile.endian,
1029 .debug_info = (try findDwarfSectionFromElf(&efile, ".debug_info")) orelse return error.MissingDebugInfo,988 .debug_info = (data[@intCast(usize, debug_info.offset)..@intCast(usize, debug_info.offset + debug_info.size)]),
1030 .debug_abbrev = (try findDwarfSectionFromElf(&efile, ".debug_abbrev")) orelse return error.MissingDebugInfo,989 .debug_abbrev = (data[@intCast(usize, debug_abbrev.offset)..@intCast(usize, debug_abbrev.offset + debug_abbrev.size)]),
1031 .debug_str = (try findDwarfSectionFromElf(&efile, ".debug_str")) orelse return error.MissingDebugInfo,990 .debug_str = (data[@intCast(usize, debug_str.offset)..@intCast(usize, debug_str.offset + debug_str.size)]),
1032 .debug_line = (try findDwarfSectionFromElf(&efile, ".debug_line")) orelse return error.MissingDebugInfo,991 .debug_line = (data[@intCast(usize, debug_line.offset)..@intCast(usize, debug_line.offset + debug_line.size)]),
1033 .debug_ranges = (try findDwarfSectionFromElf(&efile, ".debug_ranges")),992 .debug_ranges = if (opt_debug_ranges) |debug_ranges|
1034 .abbrev_table_list = undefined,993 data[@intCast(usize, debug_ranges.offset)..@intCast(usize, debug_ranges.offset + debug_ranges.size)]
1035 .compile_unit_list = undefined,994 else
1036 .func_list = undefined,995 null,
1037 };996 };
997
998 efile.close();
999
1038 try openDwarfDebugInfo(&di, allocator);1000 try openDwarfDebugInfo(&di, allocator);
1039 return di;1001 return di;
1040}1002}
10411003
1042fn openSelfDebugInfoPosix(allocator: *mem.Allocator) !DwarfInfo {1004fn openSelfDebugInfoPosix(allocator: *mem.Allocator) !DwarfInfo {
1043 const S = struct {1005 var exe_file = try fs.openSelfExe();
1044 var self_exe_file: File = undefined;1006 errdefer exe_file.close();
1045 var self_exe_mmap_seekable: io.SliceSeekableInStream = undefined;
1046 };
1047
1048 S.self_exe_file = try fs.openSelfExe();
1049 errdefer S.self_exe_file.close();
10501007
1051 const self_exe_len = math.cast(usize, try S.self_exe_file.getEndPos()) catch return error.DebugInfoTooLarge;1008 const exe_len = math.cast(usize, try exe_file.getEndPos()) catch
1052 const self_exe_mmap_len = mem.alignForward(self_exe_len, mem.page_size);1009 return error.DebugInfoTooLarge;
1053 const self_exe_mmap = try os.mmap(1010 const exe_mmap = try os.mmap(
1054 null,1011 null,
1055 self_exe_mmap_len,1012 exe_len,
1056 os.PROT_READ,1013 os.PROT_READ,
1057 os.MAP_SHARED,1014 os.MAP_SHARED,
1058 S.self_exe_file.handle,1015 exe_file.handle,
1059 0,1016 0,
1060 );1017 );
1061 errdefer os.munmap(self_exe_mmap);1018 errdefer os.munmap(exe_mmap);
10621019
1063 S.self_exe_mmap_seekable = io.SliceSeekableInStream.init(self_exe_mmap);1020 return openElfDebugInfo(allocator, exe_mmap);
1064
1065 return openElfDebugInfo(
1066 allocator,
1067 // TODO https://github.com/ziglang/zig/issues/764
1068 @ptrCast(*DwarfSeekableStream, &S.self_exe_mmap_seekable.seekable_stream),
1069 // TODO https://github.com/ziglang/zig/issues/764
1070 @ptrCast(*DwarfInStream, &S.self_exe_mmap_seekable.stream),
1071 );
1072}1021}
10731022
1074fn openSelfDebugInfoMacOs(allocator: *mem.Allocator) !DebugInfo {1023fn openSelfDebugInfoMacOs(allocator: *mem.Allocator) !DebugInfo {
...@@ -1195,83 +1144,56 @@ const MachoSymbol = struct {...@@ -1195,83 +1144,56 @@ const MachoSymbol = struct {
1195 }1144 }
1196};1145};
11971146
1198const MachOFile = struct {
1199 bytes: []align(@alignOf(macho.mach_header_64)) const u8,
1200 sect_debug_info: ?*const macho.section_64,
1201 sect_debug_line: ?*const macho.section_64,
1202};
1203
1204pub const DwarfSeekableStream = io.SeekableStream(anyerror, anyerror);1147pub const DwarfSeekableStream = io.SeekableStream(anyerror, anyerror);
1205pub const DwarfInStream = io.InStream(anyerror);1148pub const DwarfInStream = io.InStream(anyerror);
12061149
1207pub const DwarfInfo = struct {1150pub const DwarfInfo = struct {
1208 dwarf_seekable_stream: *DwarfSeekableStream,
1209 dwarf_in_stream: *DwarfInStream,
1210 endian: builtin.Endian,1151 endian: builtin.Endian,
1211 debug_info: Section,1152 // No memory is owned by the DwarfInfo
1212 debug_abbrev: Section,1153 debug_info: []u8,
1213 debug_str: Section,1154 debug_abbrev: []u8,
1214 debug_line: Section,1155 debug_str: []u8,
1215 debug_ranges: ?Section,1156 debug_line: []u8,
1216 abbrev_table_list: ArrayList(AbbrevTableHeader),1157 debug_ranges: ?[]u8,
1217 compile_unit_list: ArrayList(CompileUnit),1158 // Filled later by the initializer
1218 func_list: ArrayList(Func),1159 abbrev_table_list: ArrayList(AbbrevTableHeader) = undefined,
12191160 compile_unit_list: ArrayList(CompileUnit) = undefined,
1220 pub const Section = struct {1161 func_list: ArrayList(Func) = undefined,
1221 offset: u64,
1222 size: u64,
1223 };
12241162
1225 pub fn allocator(self: DwarfInfo) *mem.Allocator {1163 pub fn allocator(self: DwarfInfo) *mem.Allocator {
1226 return self.abbrev_table_list.allocator;1164 return self.abbrev_table_list.allocator;
1227 }1165 }
12281166
1229 pub fn readString(self: *DwarfInfo) ![]u8 {
1230 return readStringRaw(self.allocator(), self.dwarf_in_stream);
1231 }
1232
1233 /// This function works in freestanding mode.1167 /// This function works in freestanding mode.
1234 /// fn printLineFromFile(out_stream: var, line_info: LineInfo) !void1168 /// fn printLineFromFile(out_stream: var, line_info: LineInfo) !void
1235 pub fn printSourceAtAddress(1169 pub fn printSourceAtAddress(
1236 self: *DwarfInfo,1170 self: *DwarfInfo,
1237 out_stream: var,1171 out_stream: var,
1238 address: usize,1172 address: usize,
1239 tty_color: bool,1173 tty_config: TTY.Config,
1240 comptime printLineFromFile: var,1174 comptime printLineFromFile: var,
1241 ) !void {1175 ) !void {
1242 const compile_unit = self.findCompileUnit(address) catch {1176 const compile_unit = self.findCompileUnit(address) catch {
1243 if (tty_color) {1177 return printLineInfo(out_stream, null, address, "???", "???", tty_config, printLineFromFile);
1244 try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in ??? (???)" ++ RESET ++ "\n\n\n", .{address});
1245 } else {
1246 try out_stream.print("???:?:?: 0x{x} in ??? (???)\n\n\n", .{address});
1247 }
1248 return;
1249 };1178 };
1179
1250 const compile_unit_name = try compile_unit.die.getAttrString(self, DW.AT_name);1180 const compile_unit_name = try compile_unit.die.getAttrString(self, DW.AT_name);
1251 if (self.getLineNumberInfo(compile_unit.*, address)) |line_info| {1181 const symbol_name = self.getSymbolName(address) orelse "???";
1252 defer line_info.deinit();1182 const line_info = self.getLineNumberInfo(compile_unit.*, address) catch |err| switch (err) {
1253 const symbol_name = self.getSymbolName(address) orelse "???";1183 error.MissingDebugInfo, error.InvalidDebugInfo => null,
1254 try printLineInfo(
1255 out_stream,
1256 line_info,
1257 address,
1258 symbol_name,
1259 compile_unit_name,
1260 tty_color,
1261 printLineFromFile,
1262 );
1263 } else |err| switch (err) {
1264 error.MissingDebugInfo, error.InvalidDebugInfo => {
1265 if (tty_color) {
1266 try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in ??? ({})" ++ RESET ++ "\n\n\n", .{
1267 address, compile_unit_name,
1268 });
1269 } else {
1270 try out_stream.print("???:?:?: 0x{x} in ??? ({})\n\n\n", .{ address, compile_unit_name });
1271 }
1272 },
1273 else => return err,1184 else => return err,
1274 }1185 };
1186 defer if (line_info) |li| li.deinit();
1187
1188 try printLineInfo(
1189 out_stream,
1190 line_info,
1191 address,
1192 symbol_name,
1193 compile_unit_name,
1194 tty_config,
1195 printLineFromFile,
1196 );
1275 }1197 }
12761198
1277 fn getSymbolName(di: *DwarfInfo, address: u64) ?[]const u8 {1199 fn getSymbolName(di: *DwarfInfo, address: u64) ?[]const u8 {
...@@ -1287,35 +1209,38 @@ pub const DwarfInfo = struct {...@@ -1287,35 +1209,38 @@ pub const DwarfInfo = struct {
1287 }1209 }
12881210
1289 fn scanAllFunctions(di: *DwarfInfo) !void {1211 fn scanAllFunctions(di: *DwarfInfo) !void {
1290 const debug_info_end = di.debug_info.offset + di.debug_info.size;1212 var s = io.SliceSeekableInStream.init(di.debug_info);
1291 var this_unit_offset = di.debug_info.offset;1213 var this_unit_offset: u64 = 0;
12921214
1293 while (this_unit_offset < debug_info_end) {1215 while (true) {
1294 try di.dwarf_seekable_stream.seekTo(this_unit_offset);1216 s.seekable_stream.seekTo(this_unit_offset) catch |err| switch (err) {
1217 error.EndOfStream => return,
1218 else => return err,
1219 };
12951220
1296 var is_64: bool = undefined;1221 var is_64: bool = undefined;
1297 const unit_length = try readInitialLength(@TypeOf(di.dwarf_in_stream.readFn).ReturnType.ErrorSet, di.dwarf_in_stream, &is_64);1222 const unit_length = try readInitialLength(@TypeOf(s.stream.readFn).ReturnType.ErrorSet, &s.stream, &is_64);
1298 if (unit_length == 0) return;1223 if (unit_length == 0) return;
1299 const next_offset = unit_length + (if (is_64) @as(usize, 12) else @as(usize, 4));1224 const next_offset = unit_length + (if (is_64) @as(usize, 12) else @as(usize, 4));
13001225
1301 const version = try di.dwarf_in_stream.readInt(u16, di.endian);1226 const version = try s.stream.readInt(u16, di.endian);
1302 if (version < 2 or version > 5) return error.InvalidDebugInfo;1227 if (version < 2 or version > 5) return error.InvalidDebugInfo;
13031228
1304 const debug_abbrev_offset = if (is_64) try di.dwarf_in_stream.readInt(u64, di.endian) else try di.dwarf_in_stream.readInt(u32, di.endian);1229 const debug_abbrev_offset = if (is_64) try s.stream.readInt(u64, di.endian) else try s.stream.readInt(u32, di.endian);
13051230
1306 const address_size = try di.dwarf_in_stream.readByte();1231 const address_size = try s.stream.readByte();
1307 if (address_size != @sizeOf(usize)) return error.InvalidDebugInfo;1232 if (address_size != @sizeOf(usize)) return error.InvalidDebugInfo;
13081233
1309 const compile_unit_pos = try di.dwarf_seekable_stream.getPos();1234 const compile_unit_pos = try s.seekable_stream.getPos();
1310 const abbrev_table = try di.getAbbrevTable(debug_abbrev_offset);1235 const abbrev_table = try di.getAbbrevTable(debug_abbrev_offset);
13111236
1312 try di.dwarf_seekable_stream.seekTo(compile_unit_pos);1237 try s.seekable_stream.seekTo(compile_unit_pos);
13131238
1314 const next_unit_pos = this_unit_offset + next_offset;1239 const next_unit_pos = this_unit_offset + next_offset;
13151240
1316 while ((try di.dwarf_seekable_stream.getPos()) < next_unit_pos) {1241 while ((try s.seekable_stream.getPos()) < next_unit_pos) {
1317 const die_obj = (try di.parseDie(abbrev_table, is_64)) orelse continue;1242 const die_obj = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse continue;
1318 const after_die_offset = try di.dwarf_seekable_stream.getPos();1243 const after_die_offset = try s.seekable_stream.getPos();
13191244
1320 switch (die_obj.tag_id) {1245 switch (die_obj.tag_id) {
1321 DW.TAG_subprogram, DW.TAG_inlined_subroutine, DW.TAG_subroutine, DW.TAG_entry_point => {1246 DW.TAG_subprogram, DW.TAG_inlined_subroutine, DW.TAG_subroutine, DW.TAG_entry_point => {
...@@ -1331,14 +1256,14 @@ pub const DwarfInfo = struct {...@@ -1331,14 +1256,14 @@ pub const DwarfInfo = struct {
1331 // Follow the DIE it points to and repeat1256 // Follow the DIE it points to and repeat
1332 const ref_offset = try this_die_obj.getAttrRef(DW.AT_abstract_origin);1257 const ref_offset = try this_die_obj.getAttrRef(DW.AT_abstract_origin);
1333 if (ref_offset > next_offset) return error.InvalidDebugInfo;1258 if (ref_offset > next_offset) return error.InvalidDebugInfo;
1334 try di.dwarf_seekable_stream.seekTo(this_unit_offset + ref_offset);1259 try s.seekable_stream.seekTo(this_unit_offset + ref_offset);
1335 this_die_obj = (try di.parseDie(abbrev_table, is_64)) orelse return error.InvalidDebugInfo;1260 this_die_obj = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
1336 } else if (this_die_obj.getAttr(DW.AT_specification)) |ref| {1261 } else if (this_die_obj.getAttr(DW.AT_specification)) |ref| {
1337 // Follow the DIE it points to and repeat1262 // Follow the DIE it points to and repeat
1338 const ref_offset = try this_die_obj.getAttrRef(DW.AT_specification);1263 const ref_offset = try this_die_obj.getAttrRef(DW.AT_specification);
1339 if (ref_offset > next_offset) return error.InvalidDebugInfo;1264 if (ref_offset > next_offset) return error.InvalidDebugInfo;
1340 try di.dwarf_seekable_stream.seekTo(this_unit_offset + ref_offset);1265 try s.seekable_stream.seekTo(this_unit_offset + ref_offset);
1341 this_die_obj = (try di.parseDie(abbrev_table, is_64)) orelse return error.InvalidDebugInfo;1266 this_die_obj = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
1342 } else {1267 } else {
1343 break :x null;1268 break :x null;
1344 }1269 }
...@@ -1376,12 +1301,10 @@ pub const DwarfInfo = struct {...@@ -1376,12 +1301,10 @@ pub const DwarfInfo = struct {
1376 .pc_range = pc_range,1301 .pc_range = pc_range,
1377 });1302 });
1378 },1303 },
1379 else => {1304 else => {},
1380 continue;
1381 },
1382 }1305 }
13831306
1384 try di.dwarf_seekable_stream.seekTo(after_die_offset);1307 try s.seekable_stream.seekTo(after_die_offset);
1385 }1308 }
13861309
1387 this_unit_offset += next_offset;1310 this_unit_offset += next_offset;
...@@ -1389,32 +1312,35 @@ pub const DwarfInfo = struct {...@@ -1389,32 +1312,35 @@ pub const DwarfInfo = struct {
1389 }1312 }
13901313
1391 fn scanAllCompileUnits(di: *DwarfInfo) !void {1314 fn scanAllCompileUnits(di: *DwarfInfo) !void {
1392 const debug_info_end = di.debug_info.offset + di.debug_info.size;1315 var s = io.SliceSeekableInStream.init(di.debug_info);
1393 var this_unit_offset = di.debug_info.offset;1316 var this_unit_offset: u64 = 0;
13941317
1395 while (this_unit_offset < debug_info_end) {1318 while (true) {
1396 try di.dwarf_seekable_stream.seekTo(this_unit_offset);1319 s.seekable_stream.seekTo(this_unit_offset) catch |err| switch (err) {
1320 error.EndOfStream => return,
1321 else => return err,
1322 };
13971323
1398 var is_64: bool = undefined;1324 var is_64: bool = undefined;
1399 const unit_length = try readInitialLength(@TypeOf(di.dwarf_in_stream.readFn).ReturnType.ErrorSet, di.dwarf_in_stream, &is_64);1325 const unit_length = try readInitialLength(@TypeOf(s.stream.readFn).ReturnType.ErrorSet, &s.stream, &is_64);
1400 if (unit_length == 0) return;1326 if (unit_length == 0) return;
1401 const next_offset = unit_length + (if (is_64) @as(usize, 12) else @as(usize, 4));1327 const next_offset = unit_length + (if (is_64) @as(usize, 12) else @as(usize, 4));
14021328
1403 const version = try di.dwarf_in_stream.readInt(u16, di.endian);1329 const version = try s.stream.readInt(u16, di.endian);
1404 if (version < 2 or version > 5) return error.InvalidDebugInfo;1330 if (version < 2 or version > 5) return error.InvalidDebugInfo;
14051331
1406 const debug_abbrev_offset = if (is_64) try di.dwarf_in_stream.readInt(u64, di.endian) else try di.dwarf_in_stream.readInt(u32, di.endian);1332 const debug_abbrev_offset = if (is_64) try s.stream.readInt(u64, di.endian) else try s.stream.readInt(u32, di.endian);
14071333
1408 const address_size = try di.dwarf_in_stream.readByte();1334 const address_size = try s.stream.readByte();
1409 if (address_size != @sizeOf(usize)) return error.InvalidDebugInfo;1335 if (address_size != @sizeOf(usize)) return error.InvalidDebugInfo;
14101336
1411 const compile_unit_pos = try di.dwarf_seekable_stream.getPos();1337 const compile_unit_pos = try s.seekable_stream.getPos();
1412 const abbrev_table = try di.getAbbrevTable(debug_abbrev_offset);1338 const abbrev_table = try di.getAbbrevTable(debug_abbrev_offset);
14131339
1414 try di.dwarf_seekable_stream.seekTo(compile_unit_pos);1340 try s.seekable_stream.seekTo(compile_unit_pos);
14151341
1416 const compile_unit_die = try di.allocator().create(Die);1342 const compile_unit_die = try di.allocator().create(Die);
1417 compile_unit_die.* = (try di.parseDie(abbrev_table, is_64)) orelse return error.InvalidDebugInfo;1343 compile_unit_die.* = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
14181344
1419 if (compile_unit_die.tag_id != DW.TAG_compile_unit) return error.InvalidDebugInfo;1345 if (compile_unit_die.tag_id != DW.TAG_compile_unit) return error.InvalidDebugInfo;
14201346
...@@ -1458,28 +1384,38 @@ pub const DwarfInfo = struct {...@@ -1458,28 +1384,38 @@ pub const DwarfInfo = struct {
1458 if (compile_unit.pc_range) |range| {1384 if (compile_unit.pc_range) |range| {
1459 if (target_address >= range.start and target_address < range.end) return compile_unit;1385 if (target_address >= range.start and target_address < range.end) return compile_unit;
1460 }1386 }
1461 if (compile_unit.die.getAttrSecOffset(DW.AT_ranges)) |ranges_offset| {1387 if (di.debug_ranges) |debug_ranges| {
1462 var base_address: usize = 0;1388 if (compile_unit.die.getAttrSecOffset(DW.AT_ranges)) |ranges_offset| {
1463 if (di.debug_ranges) |debug_ranges| {1389 var s = io.SliceSeekableInStream.init(debug_ranges);
1464 try di.dwarf_seekable_stream.seekTo(debug_ranges.offset + ranges_offset);1390
1391 // All the addresses in the list are relative to the value
1392 // specified by DW_AT_low_pc or to some other value encoded
1393 // in the list itself
1394 var base_address = try compile_unit.die.getAttrAddr(DW.AT_low_pc);
1395
1396 try s.seekable_stream.seekTo(ranges_offset);
1397
1465 while (true) {1398 while (true) {
1466 const begin_addr = try di.dwarf_in_stream.readIntLittle(usize);1399 const begin_addr = try s.stream.readIntLittle(usize);
1467 const end_addr = try di.dwarf_in_stream.readIntLittle(usize);1400 const end_addr = try s.stream.readIntLittle(usize);
1468 if (begin_addr == 0 and end_addr == 0) {1401 if (begin_addr == 0 and end_addr == 0) {
1469 break;1402 break;
1470 }1403 }
1404 // This entry selects a new value for the base address
1471 if (begin_addr == maxInt(usize)) {1405 if (begin_addr == maxInt(usize)) {
1472 base_address = begin_addr;1406 base_address = end_addr;
1473 continue;1407 continue;
1474 }1408 }
1475 if (target_address >= begin_addr and target_address < end_addr) {1409 if (target_address >= base_address + begin_addr and target_address < base_address + end_addr) {
1476 return compile_unit;1410 return compile_unit;
1477 }1411 }
1478 }1412 }
1413
1414 return error.InvalidDebugInfo;
1415 } else |err| {
1416 if (err != error.MissingDebugInfo) return err;
1417 continue;
1479 }1418 }
1480 } else |err| {
1481 if (err != error.MissingDebugInfo) return err;
1482 continue;
1483 }1419 }
1484 }1420 }
1485 return error.MissingDebugInfo;1421 return error.MissingDebugInfo;
...@@ -1493,30 +1429,33 @@ pub const DwarfInfo = struct {...@@ -1493,30 +1429,33 @@ pub const DwarfInfo = struct {
1493 return &header.table;1429 return &header.table;
1494 }1430 }
1495 }1431 }
1496 try di.dwarf_seekable_stream.seekTo(di.debug_abbrev.offset + abbrev_offset);
1497 try di.abbrev_table_list.append(AbbrevTableHeader{1432 try di.abbrev_table_list.append(AbbrevTableHeader{
1498 .offset = abbrev_offset,1433 .offset = abbrev_offset,
1499 .table = try di.parseAbbrevTable(),1434 .table = try di.parseAbbrevTable(abbrev_offset),
1500 });1435 });
1501 return &di.abbrev_table_list.items[di.abbrev_table_list.len - 1].table;1436 return &di.abbrev_table_list.items[di.abbrev_table_list.len - 1].table;
1502 }1437 }
15031438
1504 fn parseAbbrevTable(di: *DwarfInfo) !AbbrevTable {1439 fn parseAbbrevTable(di: *DwarfInfo, offset: u64) !AbbrevTable {
1440 var s = io.SliceSeekableInStream.init(di.debug_abbrev);
1441
1442 try s.seekable_stream.seekTo(offset);
1505 var result = AbbrevTable.init(di.allocator());1443 var result = AbbrevTable.init(di.allocator());
1444 errdefer result.deinit();
1506 while (true) {1445 while (true) {
1507 const abbrev_code = try leb.readULEB128(u64, di.dwarf_in_stream);1446 const abbrev_code = try leb.readULEB128(u64, &s.stream);
1508 if (abbrev_code == 0) return result;1447 if (abbrev_code == 0) return result;
1509 try result.append(AbbrevTableEntry{1448 try result.append(AbbrevTableEntry{
1510 .abbrev_code = abbrev_code,1449 .abbrev_code = abbrev_code,
1511 .tag_id = try leb.readULEB128(u64, di.dwarf_in_stream),1450 .tag_id = try leb.readULEB128(u64, &s.stream),
1512 .has_children = (try di.dwarf_in_stream.readByte()) == DW.CHILDREN_yes,1451 .has_children = (try s.stream.readByte()) == DW.CHILDREN_yes,
1513 .attrs = ArrayList(AbbrevAttr).init(di.allocator()),1452 .attrs = ArrayList(AbbrevAttr).init(di.allocator()),
1514 });1453 });
1515 const attrs = &result.items[result.len - 1].attrs;1454 const attrs = &result.items[result.len - 1].attrs;
15161455
1517 while (true) {1456 while (true) {
1518 const attr_id = try leb.readULEB128(u64, di.dwarf_in_stream);1457 const attr_id = try leb.readULEB128(u64, &s.stream);
1519 const form_id = try leb.readULEB128(u64, di.dwarf_in_stream);1458 const form_id = try leb.readULEB128(u64, &s.stream);
1520 if (attr_id == 0 and form_id == 0) break;1459 if (attr_id == 0 and form_id == 0) break;
1521 try attrs.append(AbbrevAttr{1460 try attrs.append(AbbrevAttr{
1522 .attr_id = attr_id,1461 .attr_id = attr_id,
...@@ -1526,8 +1465,8 @@ pub const DwarfInfo = struct {...@@ -1526,8 +1465,8 @@ pub const DwarfInfo = struct {
1526 }1465 }
1527 }1466 }
15281467
1529 fn parseDie(di: *DwarfInfo, abbrev_table: *const AbbrevTable, is_64: bool) !?Die {1468 fn parseDie(di: *DwarfInfo, in_stream: var, abbrev_table: *const AbbrevTable, is_64: bool) !?Die {
1530 const abbrev_code = try leb.readULEB128(u64, di.dwarf_in_stream);1469 const abbrev_code = try leb.readULEB128(u64, in_stream);
1531 if (abbrev_code == 0) return null;1470 if (abbrev_code == 0) return null;
1532 const table_entry = getAbbrevTableEntry(abbrev_table, abbrev_code) orelse return error.InvalidDebugInfo;1471 const table_entry = getAbbrevTableEntry(abbrev_table, abbrev_code) orelse return error.InvalidDebugInfo;
15331472
...@@ -1540,63 +1479,63 @@ pub const DwarfInfo = struct {...@@ -1540,63 +1479,63 @@ pub const DwarfInfo = struct {
1540 for (table_entry.attrs.toSliceConst()) |attr, i| {1479 for (table_entry.attrs.toSliceConst()) |attr, i| {
1541 result.attrs.items[i] = Die.Attr{1480 result.attrs.items[i] = Die.Attr{
1542 .id = attr.attr_id,1481 .id = attr.attr_id,
1543 .value = try parseFormValue(di.allocator(), di.dwarf_in_stream, attr.form_id, is_64),1482 .value = try parseFormValue(di.allocator(), in_stream, attr.form_id, is_64),
1544 };1483 };
1545 }1484 }
1546 return result;1485 return result;
1547 }1486 }
15481487
1549 fn getLineNumberInfo(di: *DwarfInfo, compile_unit: CompileUnit, target_address: usize) !LineInfo {1488 fn getLineNumberInfo(di: *DwarfInfo, compile_unit: CompileUnit, target_address: usize) !LineInfo {
1489 var s = io.SliceSeekableInStream.init(di.debug_line);
1490
1550 const compile_unit_cwd = try compile_unit.die.getAttrString(di, DW.AT_comp_dir);1491 const compile_unit_cwd = try compile_unit.die.getAttrString(di, DW.AT_comp_dir);
1551 const line_info_offset = try compile_unit.die.getAttrSecOffset(DW.AT_stmt_list);1492 const line_info_offset = try compile_unit.die.getAttrSecOffset(DW.AT_stmt_list);
15521493
1553 assert(line_info_offset < di.debug_line.size);1494 try s.seekable_stream.seekTo(line_info_offset);
1554
1555 try di.dwarf_seekable_stream.seekTo(di.debug_line.offset + line_info_offset);
15561495
1557 var is_64: bool = undefined;1496 var is_64: bool = undefined;
1558 const unit_length = try readInitialLength(@TypeOf(di.dwarf_in_stream.readFn).ReturnType.ErrorSet, di.dwarf_in_stream, &is_64);1497 const unit_length = try readInitialLength(@TypeOf(s.stream.readFn).ReturnType.ErrorSet, &s.stream, &is_64);
1559 if (unit_length == 0) {1498 if (unit_length == 0) {
1560 return error.MissingDebugInfo;1499 return error.MissingDebugInfo;
1561 }1500 }
1562 const next_offset = unit_length + (if (is_64) @as(usize, 12) else @as(usize, 4));1501 const next_offset = unit_length + (if (is_64) @as(usize, 12) else @as(usize, 4));
15631502
1564 const version = try di.dwarf_in_stream.readInt(u16, di.endian);1503 const version = try s.stream.readInt(u16, di.endian);
1565 // TODO support 3 and 51504 // TODO support 3 and 5
1566 if (version != 2 and version != 4) return error.InvalidDebugInfo;1505 if (version != 2 and version != 4) return error.InvalidDebugInfo;
15671506
1568 const prologue_length = if (is_64) try di.dwarf_in_stream.readInt(u64, di.endian) else try di.dwarf_in_stream.readInt(u32, di.endian);1507 const prologue_length = if (is_64) try s.stream.readInt(u64, di.endian) else try s.stream.readInt(u32, di.endian);
1569 const prog_start_offset = (try di.dwarf_seekable_stream.getPos()) + prologue_length;1508 const prog_start_offset = (try s.seekable_stream.getPos()) + prologue_length;
15701509
1571 const minimum_instruction_length = try di.dwarf_in_stream.readByte();1510 const minimum_instruction_length = try s.stream.readByte();
1572 if (minimum_instruction_length == 0) return error.InvalidDebugInfo;1511 if (minimum_instruction_length == 0) return error.InvalidDebugInfo;
15731512
1574 if (version >= 4) {1513 if (version >= 4) {
1575 // maximum_operations_per_instruction1514 // maximum_operations_per_instruction
1576 _ = try di.dwarf_in_stream.readByte();1515 _ = try s.stream.readByte();
1577 }1516 }
15781517
1579 const default_is_stmt = (try di.dwarf_in_stream.readByte()) != 0;1518 const default_is_stmt = (try s.stream.readByte()) != 0;
1580 const line_base = try di.dwarf_in_stream.readByteSigned();1519 const line_base = try s.stream.readByteSigned();
15811520
1582 const line_range = try di.dwarf_in_stream.readByte();1521 const line_range = try s.stream.readByte();
1583 if (line_range == 0) return error.InvalidDebugInfo;1522 if (line_range == 0) return error.InvalidDebugInfo;
15841523
1585 const opcode_base = try di.dwarf_in_stream.readByte();1524 const opcode_base = try s.stream.readByte();
15861525
1587 const standard_opcode_lengths = try di.allocator().alloc(u8, opcode_base - 1);1526 const standard_opcode_lengths = try di.allocator().alloc(u8, opcode_base - 1);
15881527
1589 {1528 {
1590 var i: usize = 0;1529 var i: usize = 0;
1591 while (i < opcode_base - 1) : (i += 1) {1530 while (i < opcode_base - 1) : (i += 1) {
1592 standard_opcode_lengths[i] = try di.dwarf_in_stream.readByte();1531 standard_opcode_lengths[i] = try s.stream.readByte();
1593 }1532 }
1594 }1533 }
15951534
1596 var include_directories = ArrayList([]u8).init(di.allocator());1535 var include_directories = ArrayList([]u8).init(di.allocator());
1597 try include_directories.append(compile_unit_cwd);1536 try include_directories.append(compile_unit_cwd);
1598 while (true) {1537 while (true) {
1599 const dir = try di.readString();1538 const dir = try readStringRaw(di.allocator(), &s.stream);
1600 if (dir.len == 0) break;1539 if (dir.len == 0) break;
1601 try include_directories.append(dir);1540 try include_directories.append(dir);
1602 }1541 }
...@@ -1605,11 +1544,11 @@ pub const DwarfInfo = struct {...@@ -1605,11 +1544,11 @@ pub const DwarfInfo = struct {
1605 var prog = LineNumberProgram.init(default_is_stmt, include_directories.toSliceConst(), &file_entries, target_address);1544 var prog = LineNumberProgram.init(default_is_stmt, include_directories.toSliceConst(), &file_entries, target_address);
16061545
1607 while (true) {1546 while (true) {
1608 const file_name = try di.readString();1547 const file_name = try readStringRaw(di.allocator(), &s.stream);
1609 if (file_name.len == 0) break;1548 if (file_name.len == 0) break;
1610 const dir_index = try leb.readULEB128(usize, di.dwarf_in_stream);1549 const dir_index = try leb.readULEB128(usize, &s.stream);
1611 const mtime = try leb.readULEB128(usize, di.dwarf_in_stream);1550 const mtime = try leb.readULEB128(usize, &s.stream);
1612 const len_bytes = try leb.readULEB128(usize, di.dwarf_in_stream);1551 const len_bytes = try leb.readULEB128(usize, &s.stream);
1613 try file_entries.append(FileEntry{1552 try file_entries.append(FileEntry{
1614 .file_name = file_name,1553 .file_name = file_name,
1615 .dir_index = dir_index,1554 .dir_index = dir_index,
...@@ -1618,30 +1557,32 @@ pub const DwarfInfo = struct {...@@ -1618,30 +1557,32 @@ pub const DwarfInfo = struct {
1618 });1557 });
1619 }1558 }
16201559
1621 try di.dwarf_seekable_stream.seekTo(prog_start_offset);1560 try s.seekable_stream.seekTo(prog_start_offset);
16221561
1623 while (true) {1562 const next_unit_pos = line_info_offset + next_offset;
1624 const opcode = try di.dwarf_in_stream.readByte();1563
1564 while ((try s.seekable_stream.getPos()) < next_unit_pos) {
1565 const opcode = try s.stream.readByte();
16251566
1626 if (opcode == DW.LNS_extended_op) {1567 if (opcode == DW.LNS_extended_op) {
1627 const op_size = try leb.readULEB128(u64, di.dwarf_in_stream);1568 const op_size = try leb.readULEB128(u64, &s.stream);
1628 if (op_size < 1) return error.InvalidDebugInfo;1569 if (op_size < 1) return error.InvalidDebugInfo;
1629 var sub_op = try di.dwarf_in_stream.readByte();1570 var sub_op = try s.stream.readByte();
1630 switch (sub_op) {1571 switch (sub_op) {
1631 DW.LNE_end_sequence => {1572 DW.LNE_end_sequence => {
1632 prog.end_sequence = true;1573 prog.end_sequence = true;
1633 if (try prog.checkLineMatch()) |info| return info;1574 if (try prog.checkLineMatch()) |info| return info;
1634 return error.MissingDebugInfo;1575 prog.reset();
1635 },1576 },
1636 DW.LNE_set_address => {1577 DW.LNE_set_address => {
1637 const addr = try di.dwarf_in_stream.readInt(usize, di.endian);1578 const addr = try s.stream.readInt(usize, di.endian);
1638 prog.address = addr;1579 prog.address = addr;
1639 },1580 },
1640 DW.LNE_define_file => {1581 DW.LNE_define_file => {
1641 const file_name = try di.readString();1582 const file_name = try readStringRaw(di.allocator(), &s.stream);
1642 const dir_index = try leb.readULEB128(usize, di.dwarf_in_stream);1583 const dir_index = try leb.readULEB128(usize, &s.stream);
1643 const mtime = try leb.readULEB128(usize, di.dwarf_in_stream);1584 const mtime = try leb.readULEB128(usize, &s.stream);
1644 const len_bytes = try leb.readULEB128(usize, di.dwarf_in_stream);1585 const len_bytes = try leb.readULEB128(usize, &s.stream);
1645 try file_entries.append(FileEntry{1586 try file_entries.append(FileEntry{
1646 .file_name = file_name,1587 .file_name = file_name,
1647 .dir_index = dir_index,1588 .dir_index = dir_index,
...@@ -1651,7 +1592,7 @@ pub const DwarfInfo = struct {...@@ -1651,7 +1592,7 @@ pub const DwarfInfo = struct {
1651 },1592 },
1652 else => {1593 else => {
1653 const fwd_amt = math.cast(isize, op_size - 1) catch return error.InvalidDebugInfo;1594 const fwd_amt = math.cast(isize, op_size - 1) catch return error.InvalidDebugInfo;
1654 try di.dwarf_seekable_stream.seekBy(fwd_amt);1595 try s.seekable_stream.seekBy(fwd_amt);
1655 },1596 },
1656 }1597 }
1657 } else if (opcode >= opcode_base) {1598 } else if (opcode >= opcode_base) {
...@@ -1670,19 +1611,19 @@ pub const DwarfInfo = struct {...@@ -1670,19 +1611,19 @@ pub const DwarfInfo = struct {
1670 prog.basic_block = false;1611 prog.basic_block = false;
1671 },1612 },
1672 DW.LNS_advance_pc => {1613 DW.LNS_advance_pc => {
1673 const arg = try leb.readULEB128(usize, di.dwarf_in_stream);1614 const arg = try leb.readULEB128(usize, &s.stream);
1674 prog.address += arg * minimum_instruction_length;1615 prog.address += arg * minimum_instruction_length;
1675 },1616 },
1676 DW.LNS_advance_line => {1617 DW.LNS_advance_line => {
1677 const arg = try leb.readILEB128(i64, di.dwarf_in_stream);1618 const arg = try leb.readILEB128(i64, &s.stream);
1678 prog.line += arg;1619 prog.line += arg;
1679 },1620 },
1680 DW.LNS_set_file => {1621 DW.LNS_set_file => {
1681 const arg = try leb.readULEB128(usize, di.dwarf_in_stream);1622 const arg = try leb.readULEB128(usize, &s.stream);
1682 prog.file = arg;1623 prog.file = arg;
1683 },1624 },
1684 DW.LNS_set_column => {1625 DW.LNS_set_column => {
1685 const arg = try leb.readULEB128(u64, di.dwarf_in_stream);1626 const arg = try leb.readULEB128(u64, &s.stream);
1686 prog.column = arg;1627 prog.column = arg;
1687 },1628 },
1688 DW.LNS_negate_stmt => {1629 DW.LNS_negate_stmt => {
...@@ -1696,14 +1637,14 @@ pub const DwarfInfo = struct {...@@ -1696,14 +1637,14 @@ pub const DwarfInfo = struct {
1696 prog.address += inc_addr;1637 prog.address += inc_addr;
1697 },1638 },
1698 DW.LNS_fixed_advance_pc => {1639 DW.LNS_fixed_advance_pc => {
1699 const arg = try di.dwarf_in_stream.readInt(u16, di.endian);1640 const arg = try s.stream.readInt(u16, di.endian);
1700 prog.address += arg;1641 prog.address += arg;
1701 },1642 },
1702 DW.LNS_set_prologue_end => {},1643 DW.LNS_set_prologue_end => {},
1703 else => {1644 else => {
1704 if (opcode - 1 >= standard_opcode_lengths.len) return error.InvalidDebugInfo;1645 if (opcode - 1 >= standard_opcode_lengths.len) return error.InvalidDebugInfo;
1705 const len_bytes = standard_opcode_lengths[opcode - 1];1646 const len_bytes = standard_opcode_lengths[opcode - 1];
1706 try di.dwarf_seekable_stream.seekBy(len_bytes);1647 try s.seekable_stream.seekBy(len_bytes);
1707 },1648 },
1708 }1649 }
1709 }1650 }
...@@ -1713,9 +1654,17 @@ pub const DwarfInfo = struct {...@@ -1713,9 +1654,17 @@ pub const DwarfInfo = struct {
1713 }1654 }
17141655
1715 fn getString(di: *DwarfInfo, offset: u64) ![]u8 {1656 fn getString(di: *DwarfInfo, offset: u64) ![]u8 {
1716 const pos = di.debug_str.offset + offset;1657 if (offset > di.debug_str.len)
1717 try di.dwarf_seekable_stream.seekTo(pos);1658 return error.InvalidDebugInfo;
1718 return di.readString();1659 const casted_offset = math.cast(usize, offset) catch
1660 return error.InvalidDebugInfo;
1661
1662 // Valid strings always have a terminating zero byte
1663 if (mem.indexOfScalarPos(u8, di.debug_str, casted_offset, 0)) |last| {
1664 return di.debug_str[casted_offset..last];
1665 }
1666
1667 return error.InvalidDebugInfo;
1719 }1668 }
1720};1669};
17211670
...@@ -1727,7 +1676,7 @@ pub const DebugInfo = switch (builtin.os) {...@@ -1727,7 +1676,7 @@ pub const DebugInfo = switch (builtin.os) {
17271676
1728 const OFileTable = std.HashMap(1677 const OFileTable = std.HashMap(
1729 *macho.nlist_64,1678 *macho.nlist_64,
1730 MachOFile,1679 DwarfInfo,
1731 std.hash_map.getHashPtrAddrFn(*macho.nlist_64),1680 std.hash_map.getHashPtrAddrFn(*macho.nlist_64),
1732 std.hash_map.getTrivialEqlFn(*macho.nlist_64),1681 std.hash_map.getTrivialEqlFn(*macho.nlist_64),
1733 );1682 );
...@@ -1888,6 +1837,7 @@ const LineNumberProgram = struct {...@@ -1888,6 +1837,7 @@ const LineNumberProgram = struct {
1888 basic_block: bool,1837 basic_block: bool,
1889 end_sequence: bool,1838 end_sequence: bool,
18901839
1840 default_is_stmt: bool,
1891 target_address: usize,1841 target_address: usize,
1892 include_dirs: []const []const u8,1842 include_dirs: []const []const u8,
1893 file_entries: *ArrayList(FileEntry),1843 file_entries: *ArrayList(FileEntry),
...@@ -1900,6 +1850,25 @@ const LineNumberProgram = struct {...@@ -1900,6 +1850,25 @@ const LineNumberProgram = struct {
1900 prev_basic_block: bool,1850 prev_basic_block: bool,
1901 prev_end_sequence: bool,1851 prev_end_sequence: bool,
19021852
1853 // Reset the state machine following the DWARF specification
1854 pub fn reset(self: *LineNumberProgram) void {
1855 self.address = 0;
1856 self.file = 1;
1857 self.line = 1;
1858 self.column = 0;
1859 self.is_stmt = self.default_is_stmt;
1860 self.basic_block = false;
1861 self.end_sequence = false;
1862 // Invalidate all the remaining fields
1863 self.prev_address = 0;
1864 self.prev_file = undefined;
1865 self.prev_line = undefined;
1866 self.prev_column = undefined;
1867 self.prev_is_stmt = undefined;
1868 self.prev_basic_block = undefined;
1869 self.prev_end_sequence = undefined;
1870 }
1871
1903 pub fn init(is_stmt: bool, include_dirs: []const []const u8, file_entries: *ArrayList(FileEntry), target_address: usize) LineNumberProgram {1872 pub fn init(is_stmt: bool, include_dirs: []const []const u8, file_entries: *ArrayList(FileEntry), target_address: usize) LineNumberProgram {
1904 return LineNumberProgram{1873 return LineNumberProgram{
1905 .address = 0,1874 .address = 0,
...@@ -1911,6 +1880,7 @@ const LineNumberProgram = struct {...@@ -1911,6 +1880,7 @@ const LineNumberProgram = struct {
1911 .end_sequence = false,1880 .end_sequence = false,
1912 .include_dirs = include_dirs,1881 .include_dirs = include_dirs,
1913 .file_entries = file_entries,1882 .file_entries = file_entries,
1883 .default_is_stmt = is_stmt,
1914 .target_address = target_address,1884 .target_address = target_address,
1915 .prev_address = 0,1885 .prev_address = 0,
1916 .prev_file = undefined,1886 .prev_file = undefined,
...@@ -2100,24 +2070,32 @@ fn getAbbrevTableEntry(abbrev_table: *const AbbrevTable, abbrev_code: u64) ?*con...@@ -2100,24 +2070,32 @@ fn getAbbrevTableEntry(abbrev_table: *const AbbrevTable, abbrev_code: u64) ?*con
2100 return null;2070 return null;
2101}2071}
21022072
2103fn getLineNumberInfoMacOs(di: *DebugInfo, symbol: MachoSymbol, target_address: usize) !LineInfo {2073fn getLineNumberInfoMacOs(di: *DebugInfo, symbol: MachoSymbol, address: usize) !LineInfo {
2104 const ofile = symbol.ofile orelse return error.MissingDebugInfo;2074 const ofile = symbol.ofile orelse return error.MissingDebugInfo;
2105 const gop = try di.ofiles.getOrPut(ofile);2075 const gop = try di.ofiles.getOrPut(ofile);
2106 const mach_o_file = if (gop.found_existing) &gop.kv.value else blk: {2076 const dwarf_info = if (gop.found_existing) &gop.kv.value else blk: {
2107 errdefer _ = di.ofiles.remove(ofile);2077 errdefer _ = di.ofiles.remove(ofile);
2108 const ofile_path = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + ofile.n_strx));2078 const ofile_path = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + ofile.n_strx));
21092079
2110 gop.kv.value = MachOFile{2080 var exe_file = try std.fs.openFileAbsoluteC(ofile_path, .{});
2111 .bytes = try std.fs.cwd().readFileAllocAligned(2081 errdefer exe_file.close();
2112 di.ofiles.allocator,2082
2113 ofile_path,2083 const exe_len = math.cast(usize, try exe_file.getEndPos()) catch
2114 maxInt(usize),2084 return error.DebugInfoTooLarge;
2115 @alignOf(macho.mach_header_64),2085 const exe_mmap = try os.mmap(
2116 ),2086 null,
2117 .sect_debug_info = null,2087 exe_len,
2118 .sect_debug_line = null,2088 os.PROT_READ,
2119 };2089 os.MAP_SHARED,
2120 const hdr = @ptrCast(*const macho.mach_header_64, gop.kv.value.bytes.ptr);2090 exe_file.handle,
2091 0,
2092 );
2093 errdefer os.munmap(exe_mmap);
2094
2095 const hdr = @ptrCast(
2096 *const macho.mach_header_64,
2097 @alignCast(@alignOf(macho.mach_header_64), exe_mmap.ptr),
2098 );
2121 if (hdr.magic != std.macho.MH_MAGIC_64) return error.InvalidDebugInfo;2099 if (hdr.magic != std.macho.MH_MAGIC_64) return error.InvalidDebugInfo;
21222100
2123 const hdr_base = @ptrCast([*]const u8, hdr);2101 const hdr_base = @ptrCast([*]const u8, hdr);
...@@ -2126,181 +2104,75 @@ fn getLineNumberInfoMacOs(di: *DebugInfo, symbol: MachoSymbol, target_address: u...@@ -2126,181 +2104,75 @@ fn getLineNumberInfoMacOs(di: *DebugInfo, symbol: MachoSymbol, target_address: u
2126 const segcmd = while (ncmd != 0) : (ncmd -= 1) {2104 const segcmd = while (ncmd != 0) : (ncmd -= 1) {
2127 const lc = @ptrCast(*const std.macho.load_command, ptr);2105 const lc = @ptrCast(*const std.macho.load_command, ptr);
2128 switch (lc.cmd) {2106 switch (lc.cmd) {
2129 std.macho.LC_SEGMENT_64 => break @ptrCast(*const std.macho.segment_command_64, @alignCast(@alignOf(std.macho.segment_command_64), ptr)),2107 std.macho.LC_SEGMENT_64 => {
2108 break @ptrCast(
2109 *const std.macho.segment_command_64,
2110 @alignCast(@alignOf(std.macho.segment_command_64), ptr),
2111 );
2112 },
2130 else => {},2113 else => {},
2131 }2114 }
2132 ptr = @alignCast(@alignOf(std.macho.load_command), ptr + lc.cmdsize);2115 ptr = @alignCast(@alignOf(std.macho.load_command), ptr + lc.cmdsize);
2133 } else {2116 } else {
2134 return error.MissingDebugInfo;2117 return error.MissingDebugInfo;
2135 };2118 };
2119
2120 var opt_debug_line: ?*const macho.section_64 = null;
2121 var opt_debug_info: ?*const macho.section_64 = null;
2122 var opt_debug_abbrev: ?*const macho.section_64 = null;
2123 var opt_debug_str: ?*const macho.section_64 = null;
2124 var opt_debug_ranges: ?*const macho.section_64 = null;
2125
2136 const sections = @ptrCast([*]const macho.section_64, @alignCast(@alignOf(macho.section_64), ptr + @sizeOf(std.macho.segment_command_64)))[0..segcmd.nsects];2126 const sections = @ptrCast([*]const macho.section_64, @alignCast(@alignOf(macho.section_64), ptr + @sizeOf(std.macho.segment_command_64)))[0..segcmd.nsects];
2137 for (sections) |*sect| {2127 for (sections) |*sect| {
2138 if (sect.flags & macho.SECTION_TYPE == macho.S_REGULAR and2128 // The section name may not exceed 16 chars and a trailing null may
2139 (sect.flags & macho.SECTION_ATTRIBUTES) & macho.S_ATTR_DEBUG == macho.S_ATTR_DEBUG)2129 // not be present
2140 {2130 const name = if (mem.indexOfScalar(u8, sect.sectname[0..], 0)) |last|
2141 const sect_name = mem.toSliceConst(u8, @ptrCast([*:0]const u8, &sect.sectname));2131 sect.sectname[0..last]
2142 if (mem.eql(u8, sect_name, "__debug_line")) {2132 else
2143 gop.kv.value.sect_debug_line = sect;2133 sect.sectname[0..];
2144 } else if (mem.eql(u8, sect_name, "__debug_info")) {2134
2145 gop.kv.value.sect_debug_info = sect;2135 if (mem.eql(u8, name, "__debug_line")) {
2146 }2136 opt_debug_line = sect;
2137 } else if (mem.eql(u8, name, "__debug_info")) {
2138 opt_debug_info = sect;
2139 } else if (mem.eql(u8, name, "__debug_abbrev")) {
2140 opt_debug_abbrev = sect;
2141 } else if (mem.eql(u8, name, "__debug_str")) {
2142 opt_debug_str = sect;
2143 } else if (mem.eql(u8, name, "__debug_ranges")) {
2144 opt_debug_ranges = sect;
2147 }2145 }
2148 }2146 }
21492147
2150 break :blk &gop.kv.value;2148 var debug_line = opt_debug_line orelse
2151 };2149 return error.MissingDebugInfo;
21522150 var debug_info = opt_debug_info orelse
2153 const sect_debug_line = mach_o_file.sect_debug_line orelse return error.MissingDebugInfo;2151 return error.MissingDebugInfo;
2154 var ptr = mach_o_file.bytes.ptr + sect_debug_line.offset;2152 var debug_str = opt_debug_str orelse
21552153 return error.MissingDebugInfo;
2156 var is_64: bool = undefined;2154 var debug_abbrev = opt_debug_abbrev orelse
2157 const unit_length = try readInitialLengthMem(&ptr, &is_64);2155 return error.MissingDebugInfo;
2158 if (unit_length == 0) return error.MissingDebugInfo;
2159
2160 const version = readIntMem(&ptr, u16, builtin.Endian.Little);
2161 // TODO support 3 and 5
2162 if (version != 2 and version != 4) return error.InvalidDebugInfo;
2163
2164 const prologue_length = if (is_64)
2165 readIntMem(&ptr, u64, builtin.Endian.Little)
2166 else
2167 readIntMem(&ptr, u32, builtin.Endian.Little);
2168 const prog_start = ptr + prologue_length;
2169
2170 const minimum_instruction_length = readByteMem(&ptr);
2171 if (minimum_instruction_length == 0) return error.InvalidDebugInfo;
2172
2173 if (version >= 4) {
2174 // maximum_operations_per_instruction
2175 ptr += 1;
2176 }
2177
2178 const default_is_stmt = readByteMem(&ptr) != 0;
2179 const line_base = readByteSignedMem(&ptr);
2180
2181 const line_range = readByteMem(&ptr);
2182 if (line_range == 0) return error.InvalidDebugInfo;
2183
2184 const opcode_base = readByteMem(&ptr);
2185
2186 const standard_opcode_lengths = ptr[0 .. opcode_base - 1];
2187 ptr += opcode_base - 1;
2188
2189 var include_directories = ArrayList([]const u8).init(di.allocator());
2190 try include_directories.append("");
2191 while (true) {
2192 const dir = readStringMem(&ptr);
2193 if (dir.len == 0) break;
2194 try include_directories.append(dir);
2195 }
2196
2197 var file_entries = ArrayList(FileEntry).init(di.allocator());
2198 var prog = LineNumberProgram.init(default_is_stmt, include_directories.toSliceConst(), &file_entries, target_address);
21992156
2200 while (true) {2157 gop.kv.value = DwarfInfo{
2201 const file_name = readStringMem(&ptr);2158 .endian = .Little,
2202 if (file_name.len == 0) break;2159 .debug_info = exe_mmap[@intCast(usize, debug_info.offset)..@intCast(usize, debug_info.offset + debug_info.size)],
2203 const dir_index = try leb.readULEB128Mem(usize, &ptr);2160 .debug_abbrev = exe_mmap[@intCast(usize, debug_abbrev.offset)..@intCast(usize, debug_abbrev.offset + debug_abbrev.size)],
2204 const mtime = try leb.readULEB128Mem(usize, &ptr);2161 .debug_str = exe_mmap[@intCast(usize, debug_str.offset)..@intCast(usize, debug_str.offset + debug_str.size)],
2205 const len_bytes = try leb.readULEB128Mem(usize, &ptr);2162 .debug_line = exe_mmap[@intCast(usize, debug_line.offset)..@intCast(usize, debug_line.offset + debug_line.size)],
2206 try file_entries.append(FileEntry{2163 .debug_ranges = if (opt_debug_ranges) |debug_ranges|
2207 .file_name = file_name,2164 exe_mmap[@intCast(usize, debug_ranges.offset)..@intCast(usize, debug_ranges.offset + debug_ranges.size)]
2208 .dir_index = dir_index,2165 else
2209 .mtime = mtime,2166 null,
2210 .len_bytes = len_bytes,2167 };
2211 });2168 try openDwarfDebugInfo(&gop.kv.value, di.allocator());
2212 }
22132169
2214 ptr = prog_start;2170 break :blk &gop.kv.value;
2215 while (true) {2171 };
2216 const opcode = readByteMem(&ptr);
2217
2218 if (opcode == DW.LNS_extended_op) {
2219 const op_size = try leb.readULEB128Mem(u64, &ptr);
2220 if (op_size < 1) return error.InvalidDebugInfo;
2221 var sub_op = readByteMem(&ptr);
2222 switch (sub_op) {
2223 DW.LNE_end_sequence => {
2224 prog.end_sequence = true;
2225 if (try prog.checkLineMatch()) |info| return info;
2226 return error.MissingDebugInfo;
2227 },
2228 DW.LNE_set_address => {
2229 const addr = readIntMem(&ptr, usize, builtin.Endian.Little);
2230 prog.address = symbol.reloc + addr;
2231 },
2232 DW.LNE_define_file => {
2233 const file_name = readStringMem(&ptr);
2234 const dir_index = try leb.readULEB128Mem(usize, &ptr);
2235 const mtime = try leb.readULEB128Mem(usize, &ptr);
2236 const len_bytes = try leb.readULEB128Mem(usize, &ptr);
2237 try file_entries.append(FileEntry{
2238 .file_name = file_name,
2239 .dir_index = dir_index,
2240 .mtime = mtime,
2241 .len_bytes = len_bytes,
2242 });
2243 },
2244 else => {
2245 ptr += op_size - 1;
2246 },
2247 }
2248 } else if (opcode >= opcode_base) {
2249 // special opcodes
2250 const adjusted_opcode = opcode - opcode_base;
2251 const inc_addr = minimum_instruction_length * (adjusted_opcode / line_range);
2252 const inc_line = @as(i32, line_base) + @as(i32, adjusted_opcode % line_range);
2253 prog.line += inc_line;
2254 prog.address += inc_addr;
2255 if (try prog.checkLineMatch()) |info| return info;
2256 prog.basic_block = false;
2257 } else {
2258 switch (opcode) {
2259 DW.LNS_copy => {
2260 if (try prog.checkLineMatch()) |info| return info;
2261 prog.basic_block = false;
2262 },
2263 DW.LNS_advance_pc => {
2264 const arg = try leb.readULEB128Mem(usize, &ptr);
2265 prog.address += arg * minimum_instruction_length;
2266 },
2267 DW.LNS_advance_line => {
2268 const arg = try leb.readILEB128Mem(i64, &ptr);
2269 prog.line += arg;
2270 },
2271 DW.LNS_set_file => {
2272 const arg = try leb.readULEB128Mem(usize, &ptr);
2273 prog.file = arg;
2274 },
2275 DW.LNS_set_column => {
2276 const arg = try leb.readULEB128Mem(u64, &ptr);
2277 prog.column = arg;
2278 },
2279 DW.LNS_negate_stmt => {
2280 prog.is_stmt = !prog.is_stmt;
2281 },
2282 DW.LNS_set_basic_block => {
2283 prog.basic_block = true;
2284 },
2285 DW.LNS_const_add_pc => {
2286 const inc_addr = minimum_instruction_length * ((255 - opcode_base) / line_range);
2287 prog.address += inc_addr;
2288 },
2289 DW.LNS_fixed_advance_pc => {
2290 const arg = readIntMem(&ptr, u16, builtin.Endian.Little);
2291 prog.address += arg;
2292 },
2293 DW.LNS_set_prologue_end => {},
2294 else => {
2295 if (opcode - 1 >= standard_opcode_lengths.len) return error.InvalidDebugInfo;
2296 const len_bytes = standard_opcode_lengths[opcode - 1];
2297 ptr += len_bytes;
2298 },
2299 }
2300 }
2301 }
23022172
2303 return error.MissingDebugInfo;2173 const o_file_address = address - symbol.reloc;
2174 const compile_unit = try dwarf_info.findCompileUnit(o_file_address);
2175 return dwarf_info.getLineNumberInfo(compile_unit.*, o_file_address);
2304}2176}
23052177
2306const Func = struct {2178const Func = struct {
...@@ -2308,47 +2180,6 @@ const Func = struct {...@@ -2308,47 +2180,6 @@ const Func = struct {
2308 name: ?[]u8,2180 name: ?[]u8,
2309};2181};
23102182
2311fn readIntMem(ptr: *[*]const u8, comptime T: type, endian: builtin.Endian) T {
2312 // TODO https://github.com/ziglang/zig/issues/863
2313 const size = (T.bit_count + 7) / 8;
2314 const result = mem.readIntSlice(T, ptr.*[0..size], endian);
2315 ptr.* += size;
2316 return result;
2317}
2318
2319fn readByteMem(ptr: *[*]const u8) u8 {
2320 const result = ptr.*[0];
2321 ptr.* += 1;
2322 return result;
2323}
2324
2325fn readByteSignedMem(ptr: *[*]const u8) i8 {
2326 return @bitCast(i8, readByteMem(ptr));
2327}
2328
2329fn readInitialLengthMem(ptr: *[*]const u8, is_64: *bool) !u64 {
2330 // TODO this code can be improved with https://github.com/ziglang/zig/issues/863
2331 const first_32_bits = mem.readIntSliceLittle(u32, ptr.*[0..4]);
2332 is_64.* = (first_32_bits == 0xffffffff);
2333 if (is_64.*) {
2334 ptr.* += 4;
2335 const result = mem.readIntSliceLittle(u64, ptr.*[0..8]);
2336 ptr.* += 8;
2337 return result;
2338 } else {
2339 if (first_32_bits >= 0xfffffff0) return error.InvalidDebugInfo;
2340 ptr.* += 4;
2341 // TODO this cast should not be needed
2342 return @as(u64, first_32_bits);
2343 }
2344}
2345
2346fn readStringMem(ptr: *[*]const u8) [:0]const u8 {
2347 const result = mem.toSliceConst(u8, @ptrCast([*:0]const u8, ptr.*));
2348 ptr.* += result.len + 1;
2349 return result;
2350}
2351
2352fn readInitialLength(comptime E: type, in_stream: *io.InStream(E), is_64: *bool) !u64 {2183fn readInitialLength(comptime E: type, in_stream: *io.InStream(E), is_64: *bool) !u64 {
2353 const first_32_bits = try in_stream.readIntLittle(u32);2184 const first_32_bits = try in_stream.readIntLittle(u32);
2354 is_64.* = (first_32_bits == 0xffffffff);2185 is_64.* = (first_32_bits == 0xffffffff);
lib/std/dynamic_library.zig+1-1
...@@ -277,7 +277,7 @@ pub const WindowsDynLib = struct {...@@ -277,7 +277,7 @@ pub const WindowsDynLib = struct {
277 }277 }
278278
279 pub fn openC(path_c: [*:0]const u8) !WindowsDynLib {279 pub fn openC(path_c: [*:0]const u8) !WindowsDynLib {
280 const path_w = try windows.cStrToPrefixedFileW(path);280 const path_w = try windows.cStrToPrefixedFileW(path_c);
281 return openW(&path_w);281 return openW(&path_w);
282 }282 }
283283
lib/std/fmt.zig+16-6
...@@ -431,7 +431,7 @@ pub fn formatType(...@@ -431,7 +431,7 @@ pub fn formatType(
431 },431 },
432 else => return format(context, Errors, output, "{}@{x}", .{ @typeName(T.Child), @ptrToInt(value) }),432 else => return format(context, Errors, output, "{}@{x}", .{ @typeName(T.Child), @ptrToInt(value) }),
433 },433 },
434 .Many => {434 .Many, .C => {
435 if (ptr_info.child == u8) {435 if (ptr_info.child == u8) {
436 if (fmt.len > 0 and fmt[0] == 's') {436 if (fmt.len > 0 and fmt[0] == 's') {
437 const len = mem.len(u8, value);437 const len = mem.len(u8, value);
...@@ -449,9 +449,6 @@ pub fn formatType(...@@ -449,9 +449,6 @@ pub fn formatType(
449 }449 }
450 return format(context, Errors, output, "{}@{x}", .{ @typeName(ptr_info.child), @ptrToInt(value.ptr) });450 return format(context, Errors, output, "{}@{x}", .{ @typeName(ptr_info.child), @ptrToInt(value.ptr) });
451 },451 },
452 .C => {
453 return format(context, Errors, output, "{}@{x}", .{ @typeName(T.Child), @ptrToInt(value) });
454 },
455 },452 },
456 .Array => |info| {453 .Array => |info| {
457 const Slice = @Type(builtin.TypeInfo{454 const Slice = @Type(builtin.TypeInfo{
...@@ -1138,6 +1135,11 @@ fn countSize(size: *usize, bytes: []const u8) (error{}!void) {...@@ -1138,6 +1135,11 @@ fn countSize(size: *usize, bytes: []const u8) (error{}!void) {
1138 size.* += bytes.len;1135 size.* += bytes.len;
1139}1136}
11401137
1138pub fn allocPrint0(allocator: *mem.Allocator, comptime fmt: []const u8, args: var) AllocPrintError![:0]u8 {
1139 const result = try allocPrint(allocator, fmt ++ "\x00", args);
1140 return result[0 .. result.len - 1 :0];
1141}
1142
1141test "bufPrintInt" {1143test "bufPrintInt" {
1142 var buffer: [100]u8 = undefined;1144 var buffer: [100]u8 = undefined;
1143 const buf = buffer[0..];1145 const buf = buffer[0..];
...@@ -1285,8 +1287,16 @@ test "pointer" {...@@ -1285,8 +1287,16 @@ test "pointer" {
1285}1287}
12861288
1287test "cstr" {1289test "cstr" {
1288 try testFmt("cstr: Test C\n", "cstr: {s}\n", .{"Test C"});1290 try testFmt(
1289 try testFmt("cstr: Test C \n", "cstr: {s:10}\n", .{"Test C"});1291 "cstr: Test C\n",
1292 "cstr: {s}\n",
1293 .{@ptrCast([*c]const u8, "Test C")},
1294 );
1295 try testFmt(
1296 "cstr: Test C \n",
1297 "cstr: {s:10}\n",
1298 .{@ptrCast([*c]const u8, "Test C")},
1299 );
1290}1300}
12911301
1292test "filesize" {1302test "filesize" {
lib/std/fmt/parse_float.zig+4
...@@ -382,6 +382,10 @@ pub fn parseFloat(comptime T: type, s: []const u8) !T {...@@ -382,6 +382,10 @@ pub fn parseFloat(comptime T: type, s: []const u8) !T {
382}382}
383383
384test "fmt.parseFloat" {384test "fmt.parseFloat" {
385 if (std.Target.current.isWindows()) {
386 // TODO https://github.com/ziglang/zig/issues/508
387 return error.SkipZigTest;
388 }
385 const testing = std.testing;389 const testing = std.testing;
386 const expect = testing.expect;390 const expect = testing.expect;
387 const expectEqual = testing.expectEqual;391 const expectEqual = testing.expectEqual;
lib/std/hash/benchmark.zig+2-2
...@@ -47,11 +47,11 @@ const hashes = [_]Hash{...@@ -47,11 +47,11 @@ const hashes = [_]Hash{
47 .name = "adler32",47 .name = "adler32",
48 },48 },
49 Hash{49 Hash{
50 .ty = hash.crc.Crc32WithPoly(hash.crc.Polynomial.IEEE),50 .ty = hash.crc.Crc32WithPoly(.IEEE),
51 .name = "crc32-slicing-by-8",51 .name = "crc32-slicing-by-8",
52 },52 },
53 Hash{53 Hash{
54 .ty = hash.crc.Crc32SmallWithPoly(hash.crc.Polynomial.IEEE),54 .ty = hash.crc.Crc32SmallWithPoly(.IEEE),
55 .name = "crc32-half-byte-lookup",55 .name = "crc32-half-byte-lookup",
56 },56 },
57 Hash{57 Hash{
lib/std/hash/crc.zig+14-13
...@@ -9,17 +9,18 @@ const std = @import("../std.zig");...@@ -9,17 +9,18 @@ const std = @import("../std.zig");
9const debug = std.debug;9const debug = std.debug;
10const testing = std.testing;10const testing = std.testing;
1111
12pub const Polynomial = struct {12pub const Polynomial = enum(u32) {
13 pub const IEEE = 0xedb88320;13 IEEE = 0xedb88320,
14 pub const Castagnoli = 0x82f63b78;14 Castagnoli = 0x82f63b78,
15 pub const Koopman = 0xeb31d82e;15 Koopman = 0xeb31d82e,
16 _,
16};17};
1718
18// IEEE is by far the most common CRC and so is aliased by default.19// IEEE is by far the most common CRC and so is aliased by default.
19pub const Crc32 = Crc32WithPoly(Polynomial.IEEE);20pub const Crc32 = Crc32WithPoly(.IEEE);
2021
21// slicing-by-8 crc32 implementation.22// slicing-by-8 crc32 implementation.
22pub fn Crc32WithPoly(comptime poly: u32) type {23pub fn Crc32WithPoly(comptime poly: Polynomial) type {
23 return struct {24 return struct {
24 const Self = @This();25 const Self = @This();
25 const lookup_tables = comptime block: {26 const lookup_tables = comptime block: {
...@@ -31,7 +32,7 @@ pub fn Crc32WithPoly(comptime poly: u32) type {...@@ -31,7 +32,7 @@ pub fn Crc32WithPoly(comptime poly: u32) type {
31 var j: usize = 0;32 var j: usize = 0;
32 while (j < 8) : (j += 1) {33 while (j < 8) : (j += 1) {
33 if (crc & 1 == 1) {34 if (crc & 1 == 1) {
34 crc = (crc >> 1) ^ poly;35 crc = (crc >> 1) ^ @enumToInt(poly);
35 } else {36 } else {
36 crc = (crc >> 1);37 crc = (crc >> 1);
37 }38 }
...@@ -100,7 +101,7 @@ pub fn Crc32WithPoly(comptime poly: u32) type {...@@ -100,7 +101,7 @@ pub fn Crc32WithPoly(comptime poly: u32) type {
100}101}
101102
102test "crc32 ieee" {103test "crc32 ieee" {
103 const Crc32Ieee = Crc32WithPoly(Polynomial.IEEE);104 const Crc32Ieee = Crc32WithPoly(.IEEE);
104105
105 testing.expect(Crc32Ieee.hash("") == 0x00000000);106 testing.expect(Crc32Ieee.hash("") == 0x00000000);
106 testing.expect(Crc32Ieee.hash("a") == 0xe8b7be43);107 testing.expect(Crc32Ieee.hash("a") == 0xe8b7be43);
...@@ -108,7 +109,7 @@ test "crc32 ieee" {...@@ -108,7 +109,7 @@ test "crc32 ieee" {
108}109}
109110
110test "crc32 castagnoli" {111test "crc32 castagnoli" {
111 const Crc32Castagnoli = Crc32WithPoly(Polynomial.Castagnoli);112 const Crc32Castagnoli = Crc32WithPoly(.Castagnoli);
112113
113 testing.expect(Crc32Castagnoli.hash("") == 0x00000000);114 testing.expect(Crc32Castagnoli.hash("") == 0x00000000);
114 testing.expect(Crc32Castagnoli.hash("a") == 0xc1d04330);115 testing.expect(Crc32Castagnoli.hash("a") == 0xc1d04330);
...@@ -116,7 +117,7 @@ test "crc32 castagnoli" {...@@ -116,7 +117,7 @@ test "crc32 castagnoli" {
116}117}
117118
118// half-byte lookup table implementation.119// half-byte lookup table implementation.
119pub fn Crc32SmallWithPoly(comptime poly: u32) type {120pub fn Crc32SmallWithPoly(comptime poly: Polynomial) type {
120 return struct {121 return struct {
121 const Self = @This();122 const Self = @This();
122 const lookup_table = comptime block: {123 const lookup_table = comptime block: {
...@@ -127,7 +128,7 @@ pub fn Crc32SmallWithPoly(comptime poly: u32) type {...@@ -127,7 +128,7 @@ pub fn Crc32SmallWithPoly(comptime poly: u32) type {
127 var j: usize = 0;128 var j: usize = 0;
128 while (j < 8) : (j += 1) {129 while (j < 8) : (j += 1) {
129 if (crc & 1 == 1) {130 if (crc & 1 == 1) {
130 crc = (crc >> 1) ^ poly;131 crc = (crc >> 1) ^ @enumToInt(poly);
131 } else {132 } else {
132 crc = (crc >> 1);133 crc = (crc >> 1);
133 }134 }
...@@ -164,7 +165,7 @@ pub fn Crc32SmallWithPoly(comptime poly: u32) type {...@@ -164,7 +165,7 @@ pub fn Crc32SmallWithPoly(comptime poly: u32) type {
164}165}
165166
166test "small crc32 ieee" {167test "small crc32 ieee" {
167 const Crc32Ieee = Crc32SmallWithPoly(Polynomial.IEEE);168 const Crc32Ieee = Crc32SmallWithPoly(.IEEE);
168169
169 testing.expect(Crc32Ieee.hash("") == 0x00000000);170 testing.expect(Crc32Ieee.hash("") == 0x00000000);
170 testing.expect(Crc32Ieee.hash("a") == 0xe8b7be43);171 testing.expect(Crc32Ieee.hash("a") == 0xe8b7be43);
...@@ -172,7 +173,7 @@ test "small crc32 ieee" {...@@ -172,7 +173,7 @@ test "small crc32 ieee" {
172}173}
173174
174test "small crc32 castagnoli" {175test "small crc32 castagnoli" {
175 const Crc32Castagnoli = Crc32SmallWithPoly(Polynomial.Castagnoli);176 const Crc32Castagnoli = Crc32SmallWithPoly(.Castagnoli);
176177
177 testing.expect(Crc32Castagnoli.hash("") == 0x00000000);178 testing.expect(Crc32Castagnoli.hash("") == 0x00000000);
178 testing.expect(Crc32Castagnoli.hash("a") == 0xc1d04330);179 testing.expect(Crc32Castagnoli.hash("a") == 0xc1d04330);
lib/std/http/headers.zig+1-1
...@@ -172,7 +172,7 @@ pub const Headers = struct {...@@ -172,7 +172,7 @@ pub const Headers = struct {
172 var dex = HeaderIndexList.init(self.allocator);172 var dex = HeaderIndexList.init(self.allocator);
173 try dex.append(n - 1);173 try dex.append(n - 1);
174 errdefer dex.deinit();174 errdefer dex.deinit();
175 _ = try self.index.put(name, dex);175 _ = try self.index.put(name_dup, dex);
176 }176 }
177 self.data.appendAssumeCapacity(entry);177 self.data.appendAssumeCapacity(entry);
178 }178 }
lib/std/io/out_stream.zig+8-4
...@@ -45,10 +45,14 @@ pub fn OutStream(comptime WriteError: type) type {...@@ -45,10 +45,14 @@ pub fn OutStream(comptime WriteError: type) type {
45 }45 }
4646
47 pub fn writeByteNTimes(self: *Self, byte: u8, n: usize) Error!void {47 pub fn writeByteNTimes(self: *Self, byte: u8, n: usize) Error!void {
48 const slice = @as(*const [1]u8, &byte)[0..];48 var bytes: [256]u8 = undefined;
49 var i: usize = 0;49 mem.set(u8, bytes[0..], byte);
50 while (i < n) : (i += 1) {50
51 try self.writeFn(self, slice);51 var remaining: usize = n;
52 while (remaining > 0) {
53 const to_write = std.math.min(remaining, bytes.len);
54 try self.writeFn(self, bytes[0..to_write]);
55 remaining -= to_write;
52 }56 }
53 }57 }
5458
lib/std/io/test.zig+4
...@@ -547,6 +547,10 @@ fn testSerializerDeserializer(comptime endian: builtin.Endian, comptime packing:...@@ -547,6 +547,10 @@ fn testSerializerDeserializer(comptime endian: builtin.Endian, comptime packing:
547}547}
548548
549test "Serializer/Deserializer generic" {549test "Serializer/Deserializer generic" {
550 if (std.Target.current.isWindows()) {
551 // TODO https://github.com/ziglang/zig/issues/508
552 return error.SkipZigTest;
553 }
550 try testSerializerDeserializer(builtin.Endian.Big, .Byte);554 try testSerializerDeserializer(builtin.Endian.Big, .Byte);
551 try testSerializerDeserializer(builtin.Endian.Little, .Byte);555 try testSerializerDeserializer(builtin.Endian.Little, .Byte);
552 try testSerializerDeserializer(builtin.Endian.Big, .Bit);556 try testSerializerDeserializer(builtin.Endian.Big, .Bit);
lib/std/math/fabs.zig+4
...@@ -95,6 +95,10 @@ test "math.fabs64.special" {...@@ -95,6 +95,10 @@ test "math.fabs64.special" {
95}95}
9696
97test "math.fabs128.special" {97test "math.fabs128.special" {
98 if (std.Target.current.isWindows()) {
99 // TODO https://github.com/ziglang/zig/issues/508
100 return error.SkipZigTest;
101 }
98 expect(math.isPositiveInf(fabs(math.inf(f128))));102 expect(math.isPositiveInf(fabs(math.inf(f128))));
99 expect(math.isPositiveInf(fabs(-math.inf(f128))));103 expect(math.isPositiveInf(fabs(-math.inf(f128))));
100 expect(math.isNan(fabs(math.nan(f128))));104 expect(math.isNan(fabs(math.nan(f128))));
lib/std/math/isinf.zig+12
...@@ -74,6 +74,10 @@ pub fn isNegativeInf(x: var) bool {...@@ -74,6 +74,10 @@ pub fn isNegativeInf(x: var) bool {
74}74}
7575
76test "math.isInf" {76test "math.isInf" {
77 if (std.Target.current.isWindows()) {
78 // TODO https://github.com/ziglang/zig/issues/508
79 return error.SkipZigTest;
80 }
77 expect(!isInf(@as(f16, 0.0)));81 expect(!isInf(@as(f16, 0.0)));
78 expect(!isInf(@as(f16, -0.0)));82 expect(!isInf(@as(f16, -0.0)));
79 expect(!isInf(@as(f32, 0.0)));83 expect(!isInf(@as(f32, 0.0)));
...@@ -93,6 +97,10 @@ test "math.isInf" {...@@ -93,6 +97,10 @@ test "math.isInf" {
93}97}
9498
95test "math.isPositiveInf" {99test "math.isPositiveInf" {
100 if (std.Target.current.isWindows()) {
101 // TODO https://github.com/ziglang/zig/issues/508
102 return error.SkipZigTest;
103 }
96 expect(!isPositiveInf(@as(f16, 0.0)));104 expect(!isPositiveInf(@as(f16, 0.0)));
97 expect(!isPositiveInf(@as(f16, -0.0)));105 expect(!isPositiveInf(@as(f16, -0.0)));
98 expect(!isPositiveInf(@as(f32, 0.0)));106 expect(!isPositiveInf(@as(f32, 0.0)));
...@@ -112,6 +120,10 @@ test "math.isPositiveInf" {...@@ -112,6 +120,10 @@ test "math.isPositiveInf" {
112}120}
113121
114test "math.isNegativeInf" {122test "math.isNegativeInf" {
123 if (std.Target.current.isWindows()) {
124 // TODO https://github.com/ziglang/zig/issues/508
125 return error.SkipZigTest;
126 }
115 expect(!isNegativeInf(@as(f16, 0.0)));127 expect(!isNegativeInf(@as(f16, 0.0)));
116 expect(!isNegativeInf(@as(f16, -0.0)));128 expect(!isNegativeInf(@as(f16, -0.0)));
117 expect(!isNegativeInf(@as(f32, 0.0)));129 expect(!isNegativeInf(@as(f32, 0.0)));
lib/std/math/isnan.zig+4
...@@ -16,6 +16,10 @@ pub fn isSignalNan(x: var) bool {...@@ -16,6 +16,10 @@ pub fn isSignalNan(x: var) bool {
16}16}
1717
18test "math.isNan" {18test "math.isNan" {
19 if (std.Target.current.isWindows()) {
20 // TODO https://github.com/ziglang/zig/issues/508
21 return error.SkipZigTest;
22 }
19 expect(isNan(math.nan(f16)));23 expect(isNan(math.nan(f16)));
20 expect(isNan(math.nan(f32)));24 expect(isNan(math.nan(f32)));
21 expect(isNan(math.nan(f64)));25 expect(isNan(math.nan(f64)));
lib/std/mem.zig+3
...@@ -175,6 +175,7 @@ pub const Allocator = struct {...@@ -175,6 +175,7 @@ pub const Allocator = struct {
175175
176 const old_byte_slice = @sliceToBytes(old_mem);176 const old_byte_slice = @sliceToBytes(old_mem);
177 const byte_count = math.mul(usize, @sizeOf(T), new_n) catch return Error.OutOfMemory;177 const byte_count = math.mul(usize, @sizeOf(T), new_n) catch return Error.OutOfMemory;
178 // Note: can't set shrunk memory to undefined as memory shouldn't be modified on realloc failure
178 const byte_slice = try self.reallocFn(self, old_byte_slice, Slice.alignment, byte_count, new_alignment);179 const byte_slice = try self.reallocFn(self, old_byte_slice, Slice.alignment, byte_count, new_alignment);
179 assert(byte_slice.len == byte_count);180 assert(byte_slice.len == byte_count);
180 if (new_n > old_mem.len) {181 if (new_n > old_mem.len) {
...@@ -221,6 +222,7 @@ pub const Allocator = struct {...@@ -221,6 +222,7 @@ pub const Allocator = struct {
221 const byte_count = @sizeOf(T) * new_n;222 const byte_count = @sizeOf(T) * new_n;
222223
223 const old_byte_slice = @sliceToBytes(old_mem);224 const old_byte_slice = @sliceToBytes(old_mem);
225 @memset(old_byte_slice.ptr + byte_count, undefined, old_byte_slice.len - byte_count);
224 const byte_slice = self.shrinkFn(self, old_byte_slice, Slice.alignment, byte_count, new_alignment);226 const byte_slice = self.shrinkFn(self, old_byte_slice, Slice.alignment, byte_count, new_alignment);
225 assert(byte_slice.len == byte_count);227 assert(byte_slice.len == byte_count);
226 return @bytesToSlice(T, @alignCast(new_alignment, byte_slice));228 return @bytesToSlice(T, @alignCast(new_alignment, byte_slice));
...@@ -234,6 +236,7 @@ pub const Allocator = struct {...@@ -234,6 +236,7 @@ pub const Allocator = struct {
234 const bytes_len = bytes.len + @boolToInt(Slice.sentinel != null);236 const bytes_len = bytes.len + @boolToInt(Slice.sentinel != null);
235 if (bytes_len == 0) return;237 if (bytes_len == 0) return;
236 const non_const_ptr = @intToPtr([*]u8, @ptrToInt(bytes.ptr));238 const non_const_ptr = @intToPtr([*]u8, @ptrToInt(bytes.ptr));
239 @memset(non_const_ptr, undefined, bytes_len);
237 const shrink_result = self.shrinkFn(self, non_const_ptr[0..bytes_len], Slice.alignment, 0, 1);240 const shrink_result = self.shrinkFn(self, non_const_ptr[0..bytes_len], Slice.alignment, 0, 1);
238 assert(shrink_result.len == 0);241 assert(shrink_result.len == 0);
239 }242 }
lib/std/meta.zig+18
...@@ -556,3 +556,21 @@ pub fn refAllDecls(comptime T: type) void {...@@ -556,3 +556,21 @@ pub fn refAllDecls(comptime T: type) void {
556 if (!builtin.is_test) return;556 if (!builtin.is_test) return;
557 _ = declarations(T);557 _ = declarations(T);
558}558}
559
560/// Returns a slice of pointers to public declarations of a namespace.
561pub fn declList(comptime Namespace: type, comptime Decl: type) []const *const Decl {
562 const S = struct {
563 fn declNameLessThan(lhs: *const Decl, rhs: *const Decl) bool {
564 return mem.lessThan(u8, lhs.name, rhs.name);
565 }
566 };
567 comptime {
568 const decls = declarations(Namespace);
569 var array: [decls.len]*const Decl = undefined;
570 for (decls) |decl, i| {
571 array[i] = &@field(Namespace, decl.name);
572 }
573 std.sort.sort(*const Decl, &array, S.declNameLessThan);
574 return &array;
575 }
576}
lib/std/net.zig+12-12
...@@ -452,18 +452,18 @@ pub fn getAddressList(allocator: *mem.Allocator, name: []const u8, port: u16) !*...@@ -452,18 +452,18 @@ pub fn getAddressList(allocator: *mem.Allocator, name: []const u8, port: u16) !*
452 };452 };
453 var res: *os.addrinfo = undefined;453 var res: *os.addrinfo = undefined;
454 switch (os.system.getaddrinfo(name_c.ptr, @ptrCast([*:0]const u8, port_c.ptr), &hints, &res)) {454 switch (os.system.getaddrinfo(name_c.ptr, @ptrCast([*:0]const u8, port_c.ptr), &hints, &res)) {
455 0 => {},455 @intToEnum(os.system.EAI, 0) => {},
456 c.EAI_ADDRFAMILY => return error.HostLacksNetworkAddresses,456 .ADDRFAMILY => return error.HostLacksNetworkAddresses,
457 c.EAI_AGAIN => return error.TemporaryNameServerFailure,457 .AGAIN => return error.TemporaryNameServerFailure,
458 c.EAI_BADFLAGS => unreachable, // Invalid hints458 .BADFLAGS => unreachable, // Invalid hints
459 c.EAI_FAIL => return error.NameServerFailure,459 .FAIL => return error.NameServerFailure,
460 c.EAI_FAMILY => return error.AddressFamilyNotSupported,460 .FAMILY => return error.AddressFamilyNotSupported,
461 c.EAI_MEMORY => return error.OutOfMemory,461 .MEMORY => return error.OutOfMemory,
462 c.EAI_NODATA => return error.HostLacksNetworkAddresses,462 .NODATA => return error.HostLacksNetworkAddresses,
463 c.EAI_NONAME => return error.UnknownHostName,463 .NONAME => return error.UnknownHostName,
464 c.EAI_SERVICE => return error.ServiceUnavailable,464 .SERVICE => return error.ServiceUnavailable,
465 c.EAI_SOCKTYPE => unreachable, // Invalid socket type requested in hints465 .SOCKTYPE => unreachable, // Invalid socket type requested in hints
466 c.EAI_SYSTEM => switch (os.errno(-1)) {466 .SYSTEM => switch (os.errno(-1)) {
467 else => |e| return os.unexpectedErrno(e),467 else => |e| return os.unexpectedErrno(e),
468 },468 },
469 else => unreachable,469 else => unreachable,
lib/std/os/bits/linux.zig+1-1
...@@ -18,7 +18,7 @@ pub usingnamespace switch (builtin.arch) {...@@ -18,7 +18,7 @@ pub usingnamespace switch (builtin.arch) {
18 else => struct {},18 else => struct {},
19};19};
2020
21const is_mips = builtin.arch == .mipsel;21const is_mips = builtin.arch.isMIPS();
2222
23pub const pid_t = i32;23pub const pid_t = i32;
24pub const fd_t = i32;24pub const fd_t = i32;
lib/std/os/linux/tls.zig+1-1
...@@ -211,7 +211,7 @@ pub fn initTLS() ?*elf.Phdr {...@@ -211,7 +211,7 @@ pub fn initTLS() ?*elf.Phdr {
211211
212 if (tls_phdr) |phdr| {212 if (tls_phdr) |phdr| {
213 // If the cpu is arm-based, check if it supports the TLS register213 // If the cpu is arm-based, check if it supports the TLS register
214 if (builtin.arch == builtin.Arch.arm and at_hwcap & std.os.linux.HWCAP_TLS == 0) {214 if (builtin.arch == .arm and at_hwcap & std.os.linux.HWCAP_TLS == 0) {
215 // If the CPU does not support TLS via a coprocessor register,215 // If the CPU does not support TLS via a coprocessor register,
216 // a kernel helper function can be used instead on certain linux kernels.216 // a kernel helper function can be used instead on certain linux kernels.
217 // See linux/arch/arm/include/asm/tls.h and musl/src/thread/arm/__set_thread_area.c.217 // See linux/arch/arm/include/asm/tls.h and musl/src/thread/arm/__set_thread_area.c.
lib/std/special/compiler_rt.zig+54-71
...@@ -16,42 +16,42 @@ comptime {...@@ -16,42 +16,42 @@ comptime {
16 else => {},16 else => {},
17 }17 }
1818
19 @export(@import("compiler_rt/comparesf2.zig").__lesf2, .{ .name = "__lesf2", .linkage = linkage });19 @export(@import("compiler_rt/compareXf2.zig").__lesf2, .{ .name = "__lesf2", .linkage = linkage });
20 @export(@import("compiler_rt/comparedf2.zig").__ledf2, .{ .name = "__ledf2", .linkage = linkage });20 @export(@import("compiler_rt/compareXf2.zig").__ledf2, .{ .name = "__ledf2", .linkage = linkage });
21 @export(@import("compiler_rt/comparetf2.zig").__letf2, .{ .name = "__letf2", .linkage = linkage });21 @export(@import("compiler_rt/compareXf2.zig").__letf2, .{ .name = "__letf2", .linkage = linkage });
2222
23 @export(@import("compiler_rt/comparesf2.zig").__gesf2, .{ .name = "__gesf2", .linkage = linkage });23 @export(@import("compiler_rt/compareXf2.zig").__gesf2, .{ .name = "__gesf2", .linkage = linkage });
24 @export(@import("compiler_rt/comparedf2.zig").__gedf2, .{ .name = "__gedf2", .linkage = linkage });24 @export(@import("compiler_rt/compareXf2.zig").__gedf2, .{ .name = "__gedf2", .linkage = linkage });
25 @export(@import("compiler_rt/comparetf2.zig").__getf2, .{ .name = "__getf2", .linkage = linkage });25 @export(@import("compiler_rt/compareXf2.zig").__getf2, .{ .name = "__getf2", .linkage = linkage });
2626
27 if (!is_test) {27 if (!is_test) {
28 @export(@import("compiler_rt/comparesf2.zig").__lesf2, .{ .name = "__cmpsf2", .linkage = linkage });28 @export(@import("compiler_rt/compareXf2.zig").__lesf2, .{ .name = "__cmpsf2", .linkage = linkage });
29 @export(@import("compiler_rt/comparedf2.zig").__ledf2, .{ .name = "__cmpdf2", .linkage = linkage });29 @export(@import("compiler_rt/compareXf2.zig").__ledf2, .{ .name = "__cmpdf2", .linkage = linkage });
30 @export(@import("compiler_rt/comparetf2.zig").__letf2, .{ .name = "__cmptf2", .linkage = linkage });30 @export(@import("compiler_rt/compareXf2.zig").__letf2, .{ .name = "__cmptf2", .linkage = linkage });
3131
32 @export(@import("compiler_rt/comparesf2.zig").__eqsf2, .{ .name = "__eqsf2", .linkage = linkage });32 @export(@import("compiler_rt/compareXf2.zig").__eqsf2, .{ .name = "__eqsf2", .linkage = linkage });
33 @export(@import("compiler_rt/comparedf2.zig").__eqdf2, .{ .name = "__eqdf2", .linkage = linkage });33 @export(@import("compiler_rt/compareXf2.zig").__eqdf2, .{ .name = "__eqdf2", .linkage = linkage });
34 @export(@import("compiler_rt/comparetf2.zig").__letf2, .{ .name = "__eqtf2", .linkage = linkage });34 @export(@import("compiler_rt/compareXf2.zig").__letf2, .{ .name = "__eqtf2", .linkage = linkage });
3535
36 @export(@import("compiler_rt/comparesf2.zig").__ltsf2, .{ .name = "__ltsf2", .linkage = linkage });36 @export(@import("compiler_rt/compareXf2.zig").__ltsf2, .{ .name = "__ltsf2", .linkage = linkage });
37 @export(@import("compiler_rt/comparedf2.zig").__ltdf2, .{ .name = "__ltdf2", .linkage = linkage });37 @export(@import("compiler_rt/compareXf2.zig").__ltdf2, .{ .name = "__ltdf2", .linkage = linkage });
38 @export(@import("compiler_rt/comparetf2.zig").__letf2, .{ .name = "__lttf2", .linkage = linkage });38 @export(@import("compiler_rt/compareXf2.zig").__letf2, .{ .name = "__lttf2", .linkage = linkage });
3939
40 @export(@import("compiler_rt/comparesf2.zig").__nesf2, .{ .name = "__nesf2", .linkage = linkage });40 @export(@import("compiler_rt/compareXf2.zig").__nesf2, .{ .name = "__nesf2", .linkage = linkage });
41 @export(@import("compiler_rt/comparedf2.zig").__nedf2, .{ .name = "__nedf2", .linkage = linkage });41 @export(@import("compiler_rt/compareXf2.zig").__nedf2, .{ .name = "__nedf2", .linkage = linkage });
42 @export(@import("compiler_rt/comparetf2.zig").__letf2, .{ .name = "__netf2", .linkage = linkage });42 @export(@import("compiler_rt/compareXf2.zig").__letf2, .{ .name = "__netf2", .linkage = linkage });
4343
44 @export(@import("compiler_rt/comparesf2.zig").__gtsf2, .{ .name = "__gtsf2", .linkage = linkage });44 @export(@import("compiler_rt/compareXf2.zig").__gtsf2, .{ .name = "__gtsf2", .linkage = linkage });
45 @export(@import("compiler_rt/comparedf2.zig").__gtdf2, .{ .name = "__gtdf2", .linkage = linkage });45 @export(@import("compiler_rt/compareXf2.zig").__gtdf2, .{ .name = "__gtdf2", .linkage = linkage });
46 @export(@import("compiler_rt/comparetf2.zig").__getf2, .{ .name = "__gttf2", .linkage = linkage });46 @export(@import("compiler_rt/compareXf2.zig").__getf2, .{ .name = "__gttf2", .linkage = linkage });
4747
48 @export(@import("compiler_rt/extendXfYf2.zig").__extendhfsf2, .{ .name = "__gnu_h2f_ieee", .linkage = linkage });48 @export(@import("compiler_rt/extendXfYf2.zig").__extendhfsf2, .{ .name = "__gnu_h2f_ieee", .linkage = linkage });
49 @export(@import("compiler_rt/truncXfYf2.zig").__truncsfhf2, .{ .name = "__gnu_f2h_ieee", .linkage = linkage });49 @export(@import("compiler_rt/truncXfYf2.zig").__truncsfhf2, .{ .name = "__gnu_f2h_ieee", .linkage = linkage });
50 }50 }
5151
52 @export(@import("compiler_rt/comparesf2.zig").__unordsf2, .{ .name = "__unordsf2", .linkage = linkage });52 @export(@import("compiler_rt/compareXf2.zig").__unordsf2, .{ .name = "__unordsf2", .linkage = linkage });
53 @export(@import("compiler_rt/comparedf2.zig").__unorddf2, .{ .name = "__unorddf2", .linkage = linkage });53 @export(@import("compiler_rt/compareXf2.zig").__unorddf2, .{ .name = "__unorddf2", .linkage = linkage });
54 @export(@import("compiler_rt/comparetf2.zig").__unordtf2, .{ .name = "__unordtf2", .linkage = linkage });54 @export(@import("compiler_rt/compareXf2.zig").__unordtf2, .{ .name = "__unordtf2", .linkage = linkage });
5555
56 @export(@import("compiler_rt/addXf3.zig").__addsf3, .{ .name = "__addsf3", .linkage = linkage });56 @export(@import("compiler_rt/addXf3.zig").__addsf3, .{ .name = "__addsf3", .linkage = linkage });
57 @export(@import("compiler_rt/addXf3.zig").__adddf3, .{ .name = "__adddf3", .linkage = linkage });57 @export(@import("compiler_rt/addXf3.zig").__adddf3, .{ .name = "__adddf3", .linkage = linkage });
...@@ -130,6 +130,7 @@ comptime {...@@ -130,6 +130,7 @@ comptime {
130 @export(@import("compiler_rt/int.zig").__udivmoddi4, .{ .name = "__udivmoddi4", .linkage = linkage });130 @export(@import("compiler_rt/int.zig").__udivmoddi4, .{ .name = "__udivmoddi4", .linkage = linkage });
131 @export(@import("compiler_rt/popcountdi2.zig").__popcountdi2, .{ .name = "__popcountdi2", .linkage = linkage });131 @export(@import("compiler_rt/popcountdi2.zig").__popcountdi2, .{ .name = "__popcountdi2", .linkage = linkage });
132132
133 @export(@import("compiler_rt/int.zig").__mulsi3, .{ .name = "__mulsi3", .linkage = linkage });
133 @export(@import("compiler_rt/muldi3.zig").__muldi3, .{ .name = "__muldi3", .linkage = linkage });134 @export(@import("compiler_rt/muldi3.zig").__muldi3, .{ .name = "__muldi3", .linkage = linkage });
134 @export(@import("compiler_rt/int.zig").__divmoddi4, .{ .name = "__divmoddi4", .linkage = linkage });135 @export(@import("compiler_rt/int.zig").__divmoddi4, .{ .name = "__divmoddi4", .linkage = linkage });
135 @export(@import("compiler_rt/int.zig").__divsi3, .{ .name = "__divsi3", .linkage = linkage });136 @export(@import("compiler_rt/int.zig").__divsi3, .{ .name = "__divsi3", .linkage = linkage });
...@@ -146,7 +147,9 @@ comptime {...@@ -146,7 +147,9 @@ comptime {
146 @export(@import("compiler_rt/negXf2.zig").__negsf2, .{ .name = "__negsf2", .linkage = linkage });147 @export(@import("compiler_rt/negXf2.zig").__negsf2, .{ .name = "__negsf2", .linkage = linkage });
147 @export(@import("compiler_rt/negXf2.zig").__negdf2, .{ .name = "__negdf2", .linkage = linkage });148 @export(@import("compiler_rt/negXf2.zig").__negdf2, .{ .name = "__negdf2", .linkage = linkage });
148149
149 if (is_arm_arch and !is_arm_64 and !is_test) {150 @export(@import("compiler_rt/clzsi2.zig").__clzsi2, .{ .name = "__clzsi2", .linkage = linkage });
151
152 if (builtin.arch.isARM() and !is_test) {
150 @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr0, .{ .name = "__aeabi_unwind_cpp_pr0", .linkage = linkage });153 @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr0, .{ .name = "__aeabi_unwind_cpp_pr0", .linkage = linkage });
151 @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr1, .{ .name = "__aeabi_unwind_cpp_pr1", .linkage = linkage });154 @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr1, .{ .name = "__aeabi_unwind_cpp_pr1", .linkage = linkage });
152 @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr2, .{ .name = "__aeabi_unwind_cpp_pr2", .linkage = linkage });155 @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr2, .{ .name = "__aeabi_unwind_cpp_pr2", .linkage = linkage });
...@@ -177,7 +180,9 @@ comptime {...@@ -177,7 +180,9 @@ comptime {
177 @export(@import("compiler_rt/arm.zig").__aeabi_memclr, .{ .name = "__aeabi_memclr4", .linkage = linkage });180 @export(@import("compiler_rt/arm.zig").__aeabi_memclr, .{ .name = "__aeabi_memclr4", .linkage = linkage });
178 @export(@import("compiler_rt/arm.zig").__aeabi_memclr, .{ .name = "__aeabi_memclr8", .linkage = linkage });181 @export(@import("compiler_rt/arm.zig").__aeabi_memclr, .{ .name = "__aeabi_memclr8", .linkage = linkage });
179182
180 @export(@import("compiler_rt/arm.zig").__aeabi_read_tp, .{ .name = "__aeabi_read_tp", .linkage = linkage });183 if (builtin.os == .linux) {
184 @export(@import("compiler_rt/arm.zig").__aeabi_read_tp, .{ .name = "__aeabi_read_tp", .linkage = linkage });
185 }
181186
182 @export(@import("compiler_rt/extendXfYf2.zig").__aeabi_f2d, .{ .name = "__aeabi_f2d", .linkage = linkage });187 @export(@import("compiler_rt/extendXfYf2.zig").__aeabi_f2d, .{ .name = "__aeabi_f2d", .linkage = linkage });
183 @export(@import("compiler_rt/floatsiXf.zig").__aeabi_i2d, .{ .name = "__aeabi_i2d", .linkage = linkage });188 @export(@import("compiler_rt/floatsiXf.zig").__aeabi_i2d, .{ .name = "__aeabi_i2d", .linkage = linkage });
...@@ -222,20 +227,29 @@ comptime {...@@ -222,20 +227,29 @@ comptime {
222 @export(@import("compiler_rt/divsf3.zig").__aeabi_fdiv, .{ .name = "__aeabi_fdiv", .linkage = linkage });227 @export(@import("compiler_rt/divsf3.zig").__aeabi_fdiv, .{ .name = "__aeabi_fdiv", .linkage = linkage });
223 @export(@import("compiler_rt/divdf3.zig").__aeabi_ddiv, .{ .name = "__aeabi_ddiv", .linkage = linkage });228 @export(@import("compiler_rt/divdf3.zig").__aeabi_ddiv, .{ .name = "__aeabi_ddiv", .linkage = linkage });
224229
225 @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmpeq, .{ .name = "__aeabi_fcmpeq", .linkage = linkage });230 @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmpeq, .{ .name = "__aeabi_fcmpeq", .linkage = linkage });
226 @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmplt, .{ .name = "__aeabi_fcmplt", .linkage = linkage });231 @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmplt, .{ .name = "__aeabi_fcmplt", .linkage = linkage });
227 @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmple, .{ .name = "__aeabi_fcmple", .linkage = linkage });232 @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmple, .{ .name = "__aeabi_fcmple", .linkage = linkage });
228 @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmpge, .{ .name = "__aeabi_fcmpge", .linkage = linkage });233 @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmpge, .{ .name = "__aeabi_fcmpge", .linkage = linkage });
229 @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmpgt, .{ .name = "__aeabi_fcmpgt", .linkage = linkage });234 @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmpgt, .{ .name = "__aeabi_fcmpgt", .linkage = linkage });
230 @export(@import("compiler_rt/comparesf2.zig").__aeabi_fcmpun, .{ .name = "__aeabi_fcmpun", .linkage = linkage });235 @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmpun, .{ .name = "__aeabi_fcmpun", .linkage = linkage });
231236
232 @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmpeq, .{ .name = "__aeabi_dcmpeq", .linkage = linkage });237 @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmpeq, .{ .name = "__aeabi_dcmpeq", .linkage = linkage });
233 @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmplt, .{ .name = "__aeabi_dcmplt", .linkage = linkage });238 @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmplt, .{ .name = "__aeabi_dcmplt", .linkage = linkage });
234 @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmple, .{ .name = "__aeabi_dcmple", .linkage = linkage });239 @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmple, .{ .name = "__aeabi_dcmple", .linkage = linkage });
235 @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmpge, .{ .name = "__aeabi_dcmpge", .linkage = linkage });240 @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmpge, .{ .name = "__aeabi_dcmpge", .linkage = linkage });
236 @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmpgt, .{ .name = "__aeabi_dcmpgt", .linkage = linkage });241 @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmpgt, .{ .name = "__aeabi_dcmpgt", .linkage = linkage });
237 @export(@import("compiler_rt/comparedf2.zig").__aeabi_dcmpun, .{ .name = "__aeabi_dcmpun", .linkage = linkage });242 @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmpun, .{ .name = "__aeabi_dcmpun", .linkage = linkage });
243 }
244
245 if (builtin.arch == .i386 and builtin.abi == .msvc) {
246 // Don't let LLVM apply the stdcall name mangling on those MSVC builtins
247 @export(@import("compiler_rt/aulldiv.zig")._alldiv, .{ .name = "\x01__alldiv", .linkage = strong_linkage });
248 @export(@import("compiler_rt/aulldiv.zig")._aulldiv, .{ .name = "\x01__aulldiv", .linkage = strong_linkage });
249 @export(@import("compiler_rt/aullrem.zig")._allrem, .{ .name = "\x01__allrem", .linkage = strong_linkage });
250 @export(@import("compiler_rt/aullrem.zig")._aullrem, .{ .name = "\x01__aullrem", .linkage = strong_linkage });
238 }251 }
252
239 if (builtin.os == .windows) {253 if (builtin.os == .windows) {
240 // Default stack-probe functions emitted by LLVM254 // Default stack-probe functions emitted by LLVM
241 if (is_mingw) {255 if (is_mingw) {
...@@ -254,13 +268,6 @@ comptime {...@@ -254,13 +268,6 @@ comptime {
254268
255 switch (builtin.arch) {269 switch (builtin.arch) {
256 .i386 => {270 .i386 => {
257 // Don't let LLVM apply the stdcall name mangling on those MSVC
258 // builtin functions
259 @export(@import("compiler_rt/aulldiv.zig")._alldiv, .{ .name = "\x01__alldiv", .linkage = strong_linkage });
260 @export(@import("compiler_rt/aulldiv.zig")._aulldiv, .{ .name = "\x01__aulldiv", .linkage = strong_linkage });
261 @export(@import("compiler_rt/aullrem.zig")._allrem, .{ .name = "\x01__allrem", .linkage = strong_linkage });
262 @export(@import("compiler_rt/aullrem.zig")._aullrem, .{ .name = "\x01__aullrem", .linkage = strong_linkage });
263
264 @export(@import("compiler_rt/divti3.zig").__divti3, .{ .name = "__divti3", .linkage = linkage });271 @export(@import("compiler_rt/divti3.zig").__divti3, .{ .name = "__divti3", .linkage = linkage });
265 @export(@import("compiler_rt/modti3.zig").__modti3, .{ .name = "__modti3", .linkage = linkage });272 @export(@import("compiler_rt/modti3.zig").__modti3, .{ .name = "__modti3", .linkage = linkage });
266 @export(@import("compiler_rt/multi3.zig").__multi3, .{ .name = "__multi3", .linkage = linkage });273 @export(@import("compiler_rt/multi3.zig").__multi3, .{ .name = "__multi3", .linkage = linkage });
...@@ -295,16 +302,12 @@ comptime {...@@ -295,16 +302,12 @@ comptime {
295 @export(@import("compiler_rt/mulodi4.zig").__mulodi4, .{ .name = "__mulodi4", .linkage = linkage });302 @export(@import("compiler_rt/mulodi4.zig").__mulodi4, .{ .name = "__mulodi4", .linkage = linkage });
296}303}
297304
298const std = @import("std");
299const assert = std.debug.assert;
300const testing = std.testing;
301
302// Avoid dragging in the runtime safety mechanisms into this .o file,305// Avoid dragging in the runtime safety mechanisms into this .o file,
303// unless we're trying to test this file.306// unless we're trying to test this file.
304pub fn panic(msg: []const u8, error_return_trace: ?*builtin.StackTrace) noreturn {307pub fn panic(msg: []const u8, error_return_trace: ?*builtin.StackTrace) noreturn {
305 @setCold(true);308 @setCold(true);
306 if (is_test) {309 if (is_test) {
307 std.debug.panic("{}", .{msg});310 @import("std").debug.panic("{}", .{msg});
308 } else {311 } else {
309 unreachable;312 unreachable;
310 }313 }
...@@ -320,23 +323,3 @@ extern var __stack_chk_guard: usize = blk: {...@@ -320,23 +323,3 @@ extern var __stack_chk_guard: usize = blk: {
320 buf[@sizeOf(usize) - 2] = '\n';323 buf[@sizeOf(usize) - 2] = '\n';
321 break :blk @bitCast(usize, buf);324 break :blk @bitCast(usize, buf);
322};325};
323
324const is_arm_64 = switch (builtin.arch) {
325 builtin.Arch.aarch64,
326 builtin.Arch.aarch64_be,
327 => true,
328 else => false,
329};
330
331const is_arm_arch = switch (builtin.arch) {
332 builtin.Arch.arm,
333 builtin.Arch.armeb,
334 builtin.Arch.aarch64,
335 builtin.Arch.aarch64_be,
336 builtin.Arch.thumb,
337 builtin.Arch.thumbeb,
338 => true,
339 else => false,
340};
341
342const is_arm_32 = is_arm_arch and !is_arm_64;
lib/std/special/compiler_rt/addXf3_test.zig+8
...@@ -31,6 +31,10 @@ fn test__addtf3(a: f128, b: f128, expected_hi: u64, expected_lo: u64) void {...@@ -31,6 +31,10 @@ fn test__addtf3(a: f128, b: f128, expected_hi: u64, expected_lo: u64) void {
31}31}
3232
33test "addtf3" {33test "addtf3" {
34 if (@import("std").Target.current.isWindows()) {
35 // TODO https://github.com/ziglang/zig/issues/508
36 return error.SkipZigTest;
37 }
34 test__addtf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);38 test__addtf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
3539
36 // NaN + any = NaN40 // NaN + any = NaN
...@@ -71,6 +75,10 @@ fn test__subtf3(a: f128, b: f128, expected_hi: u64, expected_lo: u64) void {...@@ -71,6 +75,10 @@ fn test__subtf3(a: f128, b: f128, expected_hi: u64, expected_lo: u64) void {
71}75}
7276
73test "subtf3" {77test "subtf3" {
78 if (@import("std").Target.current.isWindows()) {
79 // TODO https://github.com/ziglang/zig/issues/508
80 return error.SkipZigTest;
81 }
74 // qNaN - any = qNaN82 // qNaN - any = qNaN
75 test__subtf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);83 test__subtf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
7684
lib/std/special/compiler_rt/arm/aeabi_dcmp.zig deleted-95
...@@ -1,95 +0,0 @@
1// Ported from:
2//
3// https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/arm/aeabi_dcmp.S
4
5const ConditionalOperator = enum {
6 Eq,
7 Lt,
8 Le,
9 Ge,
10 Gt,
11};
12
13pub fn __aeabi_dcmpeq() callconv(.Naked) noreturn {
14 @setRuntimeSafety(false);
15 @call(.{ .modifier = .always_inline }, aeabi_dcmp, .{.Eq});
16 unreachable;
17}
18
19pub fn __aeabi_dcmplt() callconv(.Naked) noreturn {
20 @setRuntimeSafety(false);
21 @call(.{ .modifier = .always_inline }, aeabi_dcmp, .{.Lt});
22 unreachable;
23}
24
25pub fn __aeabi_dcmple() callconv(.Naked) noreturn {
26 @setRuntimeSafety(false);
27 @call(.{ .modifier = .always_inline }, aeabi_dcmp, .{.Le});
28 unreachable;
29}
30
31pub fn __aeabi_dcmpge() callconv(.Naked) noreturn {
32 @setRuntimeSafety(false);
33 @call(.{ .modifier = .always_inline }, aeabi_dcmp, .{.Ge});
34 unreachable;
35}
36
37pub fn __aeabi_dcmpgt() callconv(.Naked) noreturn {
38 @setRuntimeSafety(false);
39 @call(.{ .modifier = .always_inline }, aeabi_dcmp, .{.Gt});
40 unreachable;
41}
42
43fn aeabi_dcmp(comptime cond: ConditionalOperator) void {
44 @setRuntimeSafety(false);
45 asm volatile (
46 \\ push { r4, lr }
47 );
48
49 switch (cond) {
50 .Eq => asm volatile (
51 \\ bl __eqdf2
52 \\ cmp r0, #0
53 \\ beq 1f
54 \\ movs r0, #0
55 \\ pop { r4, pc }
56 \\ 1:
57 ),
58 .Lt => asm volatile (
59 \\ bl __ltdf2
60 \\ cmp r0, #0
61 \\ blt 1f
62 \\ movs r0, #0
63 \\ pop { r4, pc }
64 \\ 1:
65 ),
66 .Le => asm volatile (
67 \\ bl __ledf2
68 \\ cmp r0, #0
69 \\ ble 1f
70 \\ movs r0, #0
71 \\ pop { r4, pc }
72 \\ 1:
73 ),
74 .Ge => asm volatile (
75 \\ bl __ltdf2
76 \\ cmp r0, #0
77 \\ bge 1f
78 \\ movs r0, #0
79 \\ pop { r4, pc }
80 \\ 1:
81 ),
82 .Gt => asm volatile (
83 \\ bl __gtdf2
84 \\ cmp r0, #0
85 \\ bgt 1f
86 \\ movs r0, #0
87 \\ pop { r4, pc }
88 \\ 1:
89 ),
90 }
91 asm volatile (
92 \\ movs r0, #1
93 \\ pop { r4, pc }
94 );
95}
lib/std/special/compiler_rt/arm/aeabi_fcmp.zig deleted-95
...@@ -1,95 +0,0 @@
1// Ported from:
2//
3// https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/arm/aeabi_fcmp.S
4
5const ConditionalOperator = enum {
6 Eq,
7 Lt,
8 Le,
9 Ge,
10 Gt,
11};
12
13pub fn __aeabi_fcmpeq() callconv(.Naked) noreturn {
14 @setRuntimeSafety(false);
15 @call(.{ .modifier = .always_inline }, aeabi_fcmp, .{.Eq});
16 unreachable;
17}
18
19pub fn __aeabi_fcmplt() callconv(.Naked) noreturn {
20 @setRuntimeSafety(false);
21 @call(.{ .modifier = .always_inline }, aeabi_fcmp, .{.Lt});
22 unreachable;
23}
24
25pub fn __aeabi_fcmple() callconv(.Naked) noreturn {
26 @setRuntimeSafety(false);
27 @call(.{ .modifier = .always_inline }, aeabi_fcmp, .{.Le});
28 unreachable;
29}
30
31pub fn __aeabi_fcmpge() callconv(.Naked) noreturn {
32 @setRuntimeSafety(false);
33 @call(.{ .modifier = .always_inline }, aeabi_fcmp, .{.Ge});
34 unreachable;
35}
36
37pub fn __aeabi_fcmpgt() callconv(.Naked) noreturn {
38 @setRuntimeSafety(false);
39 @call(.{ .modifier = .always_inline }, aeabi_fcmp, .{.Gt});
40 unreachable;
41}
42
43fn aeabi_fcmp(comptime cond: ConditionalOperator) void {
44 @setRuntimeSafety(false);
45 asm volatile (
46 \\ push { r4, lr }
47 );
48
49 switch (cond) {
50 .Eq => asm volatile (
51 \\ bl __eqsf2
52 \\ cmp r0, #0
53 \\ beq 1f
54 \\ movs r0, #0
55 \\ pop { r4, pc }
56 \\ 1:
57 ),
58 .Lt => asm volatile (
59 \\ bl __ltsf2
60 \\ cmp r0, #0
61 \\ blt 1f
62 \\ movs r0, #0
63 \\ pop { r4, pc }
64 \\ 1:
65 ),
66 .Le => asm volatile (
67 \\ bl __lesf2
68 \\ cmp r0, #0
69 \\ ble 1f
70 \\ movs r0, #0
71 \\ pop { r4, pc }
72 \\ 1:
73 ),
74 .Ge => asm volatile (
75 \\ bl __ltsf2
76 \\ cmp r0, #0
77 \\ bge 1f
78 \\ movs r0, #0
79 \\ pop { r4, pc }
80 \\ 1:
81 ),
82 .Gt => asm volatile (
83 \\ bl __gtsf2
84 \\ cmp r0, #0
85 \\ bgt 1f
86 \\ movs r0, #0
87 \\ pop { r4, pc }
88 \\ 1:
89 ),
90 }
91 asm volatile (
92 \\ movs r0, #1
93 \\ pop { r4, pc }
94 );
95}
lib/std/special/compiler_rt/clzsi2.zig created+116
...@@ -0,0 +1,116 @@
1const builtin = @import("builtin");
2
3fn __clzsi2_generic(a: i32) callconv(.C) i32 {
4 @setRuntimeSafety(builtin.is_test);
5
6 var x = @bitCast(u32, a);
7 var n: i32 = 32;
8
9 // Count first bit set using binary search, from Hacker's Delight
10 var y: u32 = 0;
11 inline for ([_]i32{ 16, 8, 4, 2, 1 }) |shift| {
12 y = x >> shift;
13 if (y != 0) {
14 n = n - shift;
15 x = y;
16 }
17 }
18
19 return n - @bitCast(i32, x);
20}
21
22fn __clzsi2_thumb1() callconv(.Naked) void {
23 @setRuntimeSafety(builtin.is_test);
24
25 // Similar to the generic version with the last two rounds replaced by a LUT
26 asm volatile (
27 \\ movs r1, #32
28 \\ lsrs r2, r0, #16
29 \\ beq 1f
30 \\ subs r1, #16
31 \\ movs r0, r2
32 \\ 1:
33 \\ lsrs r2, r0, #8
34 \\ beq 1f
35 \\ subs r1, #8
36 \\ movs r0, r2
37 \\ 1:
38 \\ lsrs r2, r0, #4
39 \\ beq 1f
40 \\ subs r1, #4
41 \\ movs r0, r2
42 \\ 1:
43 \\ ldr r3, =LUT
44 \\ ldrb r0, [r3, r0]
45 \\ subs r0, r1, r0
46 \\ bx lr
47 \\ .p2align 2
48 \\ LUT:
49 \\ .byte 4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0
50 );
51
52 unreachable;
53}
54
55fn __clzsi2_arm32() callconv(.Naked) void {
56 @setRuntimeSafety(builtin.is_test);
57
58 asm volatile (
59 \\ // Assumption: n != 0
60 \\ // r0: n
61 \\ // r1: count of leading zeros in n + 1
62 \\ // r2: scratch register for shifted r0
63 \\ mov r1, #1
64 \\
65 \\ // Basic block:
66 \\ // if ((r0 >> SHIFT) == 0)
67 \\ // r1 += SHIFT;
68 \\ // else
69 \\ // r0 >>= SHIFT;
70 \\ // for descending powers of two as SHIFT.
71 \\ lsrs r2, r0, #16
72 \\ movne r0, r2
73 \\ addeq r1, #16
74 \\
75 \\ lsrs r2, r0, #8
76 \\ movne r0, r2
77 \\ addeq r1, #8
78 \\
79 \\ lsrs r2, r0, #4
80 \\ movne r0, r2
81 \\ addeq r1, #4
82 \\
83 \\ lsrs r2, r0, #2
84 \\ movne r0, r2
85 \\ addeq r1, #2
86 \\
87 \\ // The basic block invariants at this point are (r0 >> 2) == 0 and
88 \\ // r0 != 0. This means 1 <= r0 <= 3 and 0 <= (r0 >> 1) <= 1.
89 \\ //
90 \\ // r0 | (r0 >> 1) == 0 | (r0 >> 1) == 1 | -(r0 >> 1) | 1 - (r0 >> 1)f
91 \\ // ---+----------------+----------------+------------+--------------
92 \\ // 1 | 1 | 0 | 0 | 1
93 \\ // 2 | 0 | 1 | -1 | 0
94 \\ // 3 | 0 | 1 | -1 | 0
95 \\ //
96 \\ // The r1's initial value of 1 compensates for the 1 here.
97 \\ sub r0, r1, r0, lsr #1
98 \\ bx lr
99 );
100
101 unreachable;
102}
103
104pub const __clzsi2 = blk: {
105 if (builtin.arch.isARM()) {
106 break :blk __clzsi2_arm32;
107 } else if (builtin.arch.isThumb()) {
108 break :blk __clzsi2_thumb1;
109 } else {
110 break :blk __clzsi2_generic;
111 }
112};
113
114test "test clzsi2" {
115 _ = @import("clzsi2_test.zig");
116}
lib/std/special/compiler_rt/clzsi2_test.zig created+292
...@@ -0,0 +1,292 @@
1const clzsi2 = @import("clzsi2.zig");
2const testing = @import("std").testing;
3
4fn test__clzsi2(a: u32, expected: i32) void {
5 var nakedClzsi2 = clzsi2.__clzsi2;
6 var actualClzsi2 = @ptrCast(fn (a: i32) callconv(.C) i32, nakedClzsi2);
7 var x = @intCast(i32, a);
8 var result = actualClzsi2(x);
9 testing.expectEqual(expected, result);
10}
11
12test "clzsi2" {
13 test__clzsi2(0x00800000, 8);
14 test__clzsi2(0x01000000, 7);
15 test__clzsi2(0x02000000, 6);
16 test__clzsi2(0x03000000, 6);
17 test__clzsi2(0x04000000, 5);
18 test__clzsi2(0x05000000, 5);
19 test__clzsi2(0x06000000, 5);
20 test__clzsi2(0x07000000, 5);
21 test__clzsi2(0x08000000, 4);
22 test__clzsi2(0x09000000, 4);
23 test__clzsi2(0x0A000000, 4);
24 test__clzsi2(0x0B000000, 4);
25 test__clzsi2(0x0C000000, 4);
26 test__clzsi2(0x0D000000, 4);
27 test__clzsi2(0x0E000000, 4);
28 test__clzsi2(0x0F000000, 4);
29 test__clzsi2(0x10000000, 3);
30 test__clzsi2(0x11000000, 3);
31 test__clzsi2(0x12000000, 3);
32 test__clzsi2(0x13000000, 3);
33 test__clzsi2(0x14000000, 3);
34 test__clzsi2(0x15000000, 3);
35 test__clzsi2(0x16000000, 3);
36 test__clzsi2(0x17000000, 3);
37 test__clzsi2(0x18000000, 3);
38 test__clzsi2(0x19000000, 3);
39 test__clzsi2(0x1A000000, 3);
40 test__clzsi2(0x1B000000, 3);
41 test__clzsi2(0x1C000000, 3);
42 test__clzsi2(0x1D000000, 3);
43 test__clzsi2(0x1E000000, 3);
44 test__clzsi2(0x1F000000, 3);
45 test__clzsi2(0x20000000, 2);
46 test__clzsi2(0x21000000, 2);
47 test__clzsi2(0x22000000, 2);
48 test__clzsi2(0x23000000, 2);
49 test__clzsi2(0x24000000, 2);
50 test__clzsi2(0x25000000, 2);
51 test__clzsi2(0x26000000, 2);
52 test__clzsi2(0x27000000, 2);
53 test__clzsi2(0x28000000, 2);
54 test__clzsi2(0x29000000, 2);
55 test__clzsi2(0x2A000000, 2);
56 test__clzsi2(0x2B000000, 2);
57 test__clzsi2(0x2C000000, 2);
58 test__clzsi2(0x2D000000, 2);
59 test__clzsi2(0x2E000000, 2);
60 test__clzsi2(0x2F000000, 2);
61 test__clzsi2(0x30000000, 2);
62 test__clzsi2(0x31000000, 2);
63 test__clzsi2(0x32000000, 2);
64 test__clzsi2(0x33000000, 2);
65 test__clzsi2(0x34000000, 2);
66 test__clzsi2(0x35000000, 2);
67 test__clzsi2(0x36000000, 2);
68 test__clzsi2(0x37000000, 2);
69 test__clzsi2(0x38000000, 2);
70 test__clzsi2(0x39000000, 2);
71 test__clzsi2(0x3A000000, 2);
72 test__clzsi2(0x3B000000, 2);
73 test__clzsi2(0x3C000000, 2);
74 test__clzsi2(0x3D000000, 2);
75 test__clzsi2(0x3E000000, 2);
76 test__clzsi2(0x3F000000, 2);
77 test__clzsi2(0x40000000, 1);
78 test__clzsi2(0x41000000, 1);
79 test__clzsi2(0x42000000, 1);
80 test__clzsi2(0x43000000, 1);
81 test__clzsi2(0x44000000, 1);
82 test__clzsi2(0x45000000, 1);
83 test__clzsi2(0x46000000, 1);
84 test__clzsi2(0x47000000, 1);
85 test__clzsi2(0x48000000, 1);
86 test__clzsi2(0x49000000, 1);
87 test__clzsi2(0x4A000000, 1);
88 test__clzsi2(0x4B000000, 1);
89 test__clzsi2(0x4C000000, 1);
90 test__clzsi2(0x4D000000, 1);
91 test__clzsi2(0x4E000000, 1);
92 test__clzsi2(0x4F000000, 1);
93 test__clzsi2(0x50000000, 1);
94 test__clzsi2(0x51000000, 1);
95 test__clzsi2(0x52000000, 1);
96 test__clzsi2(0x53000000, 1);
97 test__clzsi2(0x54000000, 1);
98 test__clzsi2(0x55000000, 1);
99 test__clzsi2(0x56000000, 1);
100 test__clzsi2(0x57000000, 1);
101 test__clzsi2(0x58000000, 1);
102 test__clzsi2(0x59000000, 1);
103 test__clzsi2(0x5A000000, 1);
104 test__clzsi2(0x5B000000, 1);
105 test__clzsi2(0x5C000000, 1);
106 test__clzsi2(0x5D000000, 1);
107 test__clzsi2(0x5E000000, 1);
108 test__clzsi2(0x5F000000, 1);
109 test__clzsi2(0x60000000, 1);
110 test__clzsi2(0x61000000, 1);
111 test__clzsi2(0x62000000, 1);
112 test__clzsi2(0x63000000, 1);
113 test__clzsi2(0x64000000, 1);
114 test__clzsi2(0x65000000, 1);
115 test__clzsi2(0x66000000, 1);
116 test__clzsi2(0x67000000, 1);
117 test__clzsi2(0x68000000, 1);
118 test__clzsi2(0x69000000, 1);
119 test__clzsi2(0x6A000000, 1);
120 test__clzsi2(0x6B000000, 1);
121 test__clzsi2(0x6C000000, 1);
122 test__clzsi2(0x6D000000, 1);
123 test__clzsi2(0x6E000000, 1);
124 test__clzsi2(0x6F000000, 1);
125 test__clzsi2(0x70000000, 1);
126 test__clzsi2(0x71000000, 1);
127 test__clzsi2(0x72000000, 1);
128 test__clzsi2(0x73000000, 1);
129 test__clzsi2(0x74000000, 1);
130 test__clzsi2(0x75000000, 1);
131 test__clzsi2(0x76000000, 1);
132 test__clzsi2(0x77000000, 1);
133 test__clzsi2(0x78000000, 1);
134 test__clzsi2(0x79000000, 1);
135 test__clzsi2(0x7A000000, 1);
136 test__clzsi2(0x7B000000, 1);
137 test__clzsi2(0x7C000000, 1);
138 test__clzsi2(0x7D000000, 1);
139 test__clzsi2(0x7E000000, 1);
140 test__clzsi2(0x7F000000, 1);
141 test__clzsi2(0x80000000, 0);
142 test__clzsi2(0x81000000, 0);
143 test__clzsi2(0x82000000, 0);
144 test__clzsi2(0x83000000, 0);
145 test__clzsi2(0x84000000, 0);
146 test__clzsi2(0x85000000, 0);
147 test__clzsi2(0x86000000, 0);
148 test__clzsi2(0x87000000, 0);
149 test__clzsi2(0x88000000, 0);
150 test__clzsi2(0x89000000, 0);
151 test__clzsi2(0x8A000000, 0);
152 test__clzsi2(0x8B000000, 0);
153 test__clzsi2(0x8C000000, 0);
154 test__clzsi2(0x8D000000, 0);
155 test__clzsi2(0x8E000000, 0);
156 test__clzsi2(0x8F000000, 0);
157 test__clzsi2(0x90000000, 0);
158 test__clzsi2(0x91000000, 0);
159 test__clzsi2(0x92000000, 0);
160 test__clzsi2(0x93000000, 0);
161 test__clzsi2(0x94000000, 0);
162 test__clzsi2(0x95000000, 0);
163 test__clzsi2(0x96000000, 0);
164 test__clzsi2(0x97000000, 0);
165 test__clzsi2(0x98000000, 0);
166 test__clzsi2(0x99000000, 0);
167 test__clzsi2(0x9A000000, 0);
168 test__clzsi2(0x9B000000, 0);
169 test__clzsi2(0x9C000000, 0);
170 test__clzsi2(0x9D000000, 0);
171 test__clzsi2(0x9E000000, 0);
172 test__clzsi2(0x9F000000, 0);
173 test__clzsi2(0xA0000000, 0);
174 test__clzsi2(0xA1000000, 0);
175 test__clzsi2(0xA2000000, 0);
176 test__clzsi2(0xA3000000, 0);
177 test__clzsi2(0xA4000000, 0);
178 test__clzsi2(0xA5000000, 0);
179 test__clzsi2(0xA6000000, 0);
180 test__clzsi2(0xA7000000, 0);
181 test__clzsi2(0xA8000000, 0);
182 test__clzsi2(0xA9000000, 0);
183 test__clzsi2(0xAA000000, 0);
184 test__clzsi2(0xAB000000, 0);
185 test__clzsi2(0xAC000000, 0);
186 test__clzsi2(0xAD000000, 0);
187 test__clzsi2(0xAE000000, 0);
188 test__clzsi2(0xAF000000, 0);
189 test__clzsi2(0xB0000000, 0);
190 test__clzsi2(0xB1000000, 0);
191 test__clzsi2(0xB2000000, 0);
192 test__clzsi2(0xB3000000, 0);
193 test__clzsi2(0xB4000000, 0);
194 test__clzsi2(0xB5000000, 0);
195 test__clzsi2(0xB6000000, 0);
196 test__clzsi2(0xB7000000, 0);
197 test__clzsi2(0xB8000000, 0);
198 test__clzsi2(0xB9000000, 0);
199 test__clzsi2(0xBA000000, 0);
200 test__clzsi2(0xBB000000, 0);
201 test__clzsi2(0xBC000000, 0);
202 test__clzsi2(0xBD000000, 0);
203 test__clzsi2(0xBE000000, 0);
204 test__clzsi2(0xBF000000, 0);
205 test__clzsi2(0xC0000000, 0);
206 test__clzsi2(0xC1000000, 0);
207 test__clzsi2(0xC2000000, 0);
208 test__clzsi2(0xC3000000, 0);
209 test__clzsi2(0xC4000000, 0);
210 test__clzsi2(0xC5000000, 0);
211 test__clzsi2(0xC6000000, 0);
212 test__clzsi2(0xC7000000, 0);
213 test__clzsi2(0xC8000000, 0);
214 test__clzsi2(0xC9000000, 0);
215 test__clzsi2(0xCA000000, 0);
216 test__clzsi2(0xCB000000, 0);
217 test__clzsi2(0xCC000000, 0);
218 test__clzsi2(0xCD000000, 0);
219 test__clzsi2(0xCE000000, 0);
220 test__clzsi2(0xCF000000, 0);
221 test__clzsi2(0xD0000000, 0);
222 test__clzsi2(0xD1000000, 0);
223 test__clzsi2(0xD2000000, 0);
224 test__clzsi2(0xD3000000, 0);
225 test__clzsi2(0xD4000000, 0);
226 test__clzsi2(0xD5000000, 0);
227 test__clzsi2(0xD6000000, 0);
228 test__clzsi2(0xD7000000, 0);
229 test__clzsi2(0xD8000000, 0);
230 test__clzsi2(0xD9000000, 0);
231 test__clzsi2(0xDA000000, 0);
232 test__clzsi2(0xDB000000, 0);
233 test__clzsi2(0xDC000000, 0);
234 test__clzsi2(0xDD000000, 0);
235 test__clzsi2(0xDE000000, 0);
236 test__clzsi2(0xDF000000, 0);
237 test__clzsi2(0xE0000000, 0);
238 test__clzsi2(0xE1000000, 0);
239 test__clzsi2(0xE2000000, 0);
240 test__clzsi2(0xE3000000, 0);
241 test__clzsi2(0xE4000000, 0);
242 test__clzsi2(0xE5000000, 0);
243 test__clzsi2(0xE6000000, 0);
244 test__clzsi2(0xE7000000, 0);
245 test__clzsi2(0xE8000000, 0);
246 test__clzsi2(0xE9000000, 0);
247 test__clzsi2(0xEA000000, 0);
248 test__clzsi2(0xEB000000, 0);
249 test__clzsi2(0xEC000000, 0);
250 test__clzsi2(0xED000000, 0);
251 test__clzsi2(0xEE000000, 0);
252 test__clzsi2(0xEF000000, 0);
253 test__clzsi2(0xF0000000, 0);
254 test__clzsi2(0xF1000000, 0);
255 test__clzsi2(0xF2000000, 0);
256 test__clzsi2(0xF3000000, 0);
257 test__clzsi2(0xF4000000, 0);
258 test__clzsi2(0xF5000000, 0);
259 test__clzsi2(0xF6000000, 0);
260 test__clzsi2(0xF7000000, 0);
261 test__clzsi2(0xF8000000, 0);
262 test__clzsi2(0xF9000000, 0);
263 test__clzsi2(0xFA000000, 0);
264 test__clzsi2(0xFB000000, 0);
265 test__clzsi2(0xFC000000, 0);
266 test__clzsi2(0xFD000000, 0);
267 test__clzsi2(0xFE000000, 0);
268 test__clzsi2(0xFF000000, 0);
269 test__clzsi2(0x00000001, 31);
270 test__clzsi2(0x00000002, 30);
271 test__clzsi2(0x00000004, 29);
272 test__clzsi2(0x00000008, 28);
273 test__clzsi2(0x00000010, 27);
274 test__clzsi2(0x00000020, 26);
275 test__clzsi2(0x00000040, 25);
276 test__clzsi2(0x00000080, 24);
277 test__clzsi2(0x00000100, 23);
278 test__clzsi2(0x00000200, 22);
279 test__clzsi2(0x00000400, 21);
280 test__clzsi2(0x00000800, 20);
281 test__clzsi2(0x00001000, 19);
282 test__clzsi2(0x00002000, 18);
283 test__clzsi2(0x00004000, 17);
284 test__clzsi2(0x00008000, 16);
285 test__clzsi2(0x00010000, 15);
286 test__clzsi2(0x00020000, 14);
287 test__clzsi2(0x00040000, 13);
288 test__clzsi2(0x00080000, 12);
289 test__clzsi2(0x00100000, 11);
290 test__clzsi2(0x00200000, 10);
291 test__clzsi2(0x00400000, 9);
292}
lib/std/special/compiler_rt/compareXf2.zig created+253
...@@ -0,0 +1,253 @@
1// Ported from:
2//
3// https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/comparesf2.c
4
5const std = @import("std");
6const builtin = @import("builtin");
7
8const LE = extern enum(i32) {
9 Less = -1,
10 Equal = 0,
11 Greater = 1,
12 Unordered = 1,
13};
14
15const GE = extern enum(i32) {
16 Less = -1,
17 Equal = 0,
18 Greater = 1,
19 Unordered = -1,
20};
21
22pub fn cmp(comptime T: type, comptime RT: type, a: T, b: T) RT {
23 @setRuntimeSafety(builtin.is_test);
24
25 const srep_t = @IntType(true, T.bit_count);
26 const rep_t = @IntType(false, T.bit_count);
27
28 const significandBits = std.math.floatMantissaBits(T);
29 const exponentBits = std.math.floatExponentBits(T);
30 const signBit = (@as(rep_t, 1) << (significandBits + exponentBits));
31 const absMask = signBit - 1;
32 const infRep = @bitCast(rep_t, std.math.inf(T));
33
34 const aInt = @bitCast(srep_t, a);
35 const bInt = @bitCast(srep_t, b);
36 const aAbs = @bitCast(rep_t, aInt) & absMask;
37 const bAbs = @bitCast(rep_t, bInt) & absMask;
38
39 // If either a or b is NaN, they are unordered.
40 if (aAbs > infRep or bAbs > infRep) return .Unordered;
41
42 // If a and b are both zeros, they are equal.
43 if ((aAbs | bAbs) == 0) return .Equal;
44
45 // If at least one of a and b is positive, we get the same result comparing
46 // a and b as signed integers as we would with a fp_ting-point compare.
47 if ((aInt & bInt) >= 0) {
48 if (aInt < bInt) {
49 return .Less;
50 } else if (aInt == bInt) {
51 return .Equal;
52 } else return .Greater;
53 }
54
55 // Otherwise, both are negative, so we need to flip the sense of the
56 // comparison to get the correct result. (This assumes a twos- or ones-
57 // complement integer representation; if integers are represented in a
58 // sign-magnitude representation, then this flip is incorrect).
59 else {
60 if (aInt > bInt) {
61 return .Less;
62 } else if (aInt == bInt) {
63 return .Equal;
64 } else return .Greater;
65 }
66}
67
68pub fn unordcmp(comptime T: type, a: T, b: T) i32 {
69 @setRuntimeSafety(builtin.is_test);
70
71 const rep_t = @IntType(false, T.bit_count);
72
73 const significandBits = std.math.floatMantissaBits(T);
74 const exponentBits = std.math.floatExponentBits(T);
75 const signBit = (@as(rep_t, 1) << (significandBits + exponentBits));
76 const absMask = signBit - 1;
77 const infRep = @bitCast(rep_t, std.math.inf(T));
78
79 const aAbs: rep_t = @bitCast(rep_t, a) & absMask;
80 const bAbs: rep_t = @bitCast(rep_t, b) & absMask;
81
82 return @boolToInt(aAbs > infRep or bAbs > infRep);
83}
84
85// Comparison between f32
86
87pub fn __lesf2(a: f32, b: f32) callconv(.C) i32 {
88 @setRuntimeSafety(builtin.is_test);
89 return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f32, LE, a, b }));
90}
91
92pub fn __gesf2(a: f32, b: f32) callconv(.C) i32 {
93 @setRuntimeSafety(builtin.is_test);
94 return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f32, GE, a, b }));
95}
96
97pub fn __eqsf2(a: f32, b: f32) callconv(.C) i32 {
98 return __lesf2(a, b);
99}
100
101pub fn __ltsf2(a: f32, b: f32) callconv(.C) i32 {
102 return __lesf2(a, b);
103}
104
105pub fn __nesf2(a: f32, b: f32) callconv(.C) i32 {
106 return __lesf2(a, b);
107}
108
109pub fn __gtsf2(a: f32, b: f32) callconv(.C) i32 {
110 return __gesf2(a, b);
111}
112
113// Comparison between f64
114
115pub fn __ledf2(a: f64, b: f64) callconv(.C) i32 {
116 @setRuntimeSafety(builtin.is_test);
117 return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f64, LE, a, b }));
118}
119
120pub fn __gedf2(a: f64, b: f64) callconv(.C) i32 {
121 @setRuntimeSafety(builtin.is_test);
122 return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f64, GE, a, b }));
123}
124
125pub fn __eqdf2(a: f64, b: f64) callconv(.C) i32 {
126 return __ledf2(a, b);
127}
128
129pub fn __ltdf2(a: f64, b: f64) callconv(.C) i32 {
130 return __ledf2(a, b);
131}
132
133pub fn __nedf2(a: f64, b: f64) callconv(.C) i32 {
134 return __ledf2(a, b);
135}
136
137pub fn __gtdf2(a: f64, b: f64) callconv(.C) i32 {
138 return __gedf2(a, b);
139}
140
141// Comparison between f128
142
143pub fn __letf2(a: f128, b: f128) callconv(.C) i32 {
144 @setRuntimeSafety(builtin.is_test);
145 return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f128, LE, a, b }));
146}
147
148pub fn __getf2(a: f128, b: f128) callconv(.C) i32 {
149 @setRuntimeSafety(builtin.is_test);
150 return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f128, GE, a, b }));
151}
152
153pub fn __eqtf2(a: f128, b: f128) callconv(.C) i32 {
154 return __letf2(a, b);
155}
156
157pub fn __lttf2(a: f128, b: f128) callconv(.C) i32 {
158 return __letf2(a, b);
159}
160
161pub fn __netf2(a: f128, b: f128) callconv(.C) i32 {
162 return __letf2(a, b);
163}
164
165pub fn __gttf2(a: f128, b: f128) callconv(.C) i32 {
166 return __getf2(a, b);
167}
168
169// Unordered comparison between f32/f64/f128
170
171pub fn __unordsf2(a: f32, b: f32) callconv(.C) i32 {
172 @setRuntimeSafety(builtin.is_test);
173 return @call(.{ .modifier = .always_inline }, unordcmp, .{ f32, a, b });
174}
175
176pub fn __unorddf2(a: f64, b: f64) callconv(.C) i32 {
177 @setRuntimeSafety(builtin.is_test);
178 return @call(.{ .modifier = .always_inline }, unordcmp, .{ f64, a, b });
179}
180
181pub fn __unordtf2(a: f128, b: f128) callconv(.C) i32 {
182 @setRuntimeSafety(builtin.is_test);
183 return @call(.{ .modifier = .always_inline }, unordcmp, .{ f128, a, b });
184}
185
186// ARM EABI intrinsics
187
188pub fn __aeabi_fcmpeq(a: f32, b: f32) callconv(.AAPCS) i32 {
189 @setRuntimeSafety(false);
190 return @boolToInt(@call(.{ .modifier = .always_inline }, __eqsf2, .{ a, b }) == 0);
191}
192
193pub fn __aeabi_fcmplt(a: f32, b: f32) callconv(.AAPCS) i32 {
194 @setRuntimeSafety(false);
195 return @boolToInt(@call(.{ .modifier = .always_inline }, __ltsf2, .{ a, b }) < 0);
196}
197
198pub fn __aeabi_fcmple(a: f32, b: f32) callconv(.AAPCS) i32 {
199 @setRuntimeSafety(false);
200 return @boolToInt(@call(.{ .modifier = .always_inline }, __lesf2, .{ a, b }) <= 0);
201}
202
203pub fn __aeabi_fcmpge(a: f32, b: f32) callconv(.AAPCS) i32 {
204 @setRuntimeSafety(false);
205 return @boolToInt(@call(.{ .modifier = .always_inline }, __gesf2, .{ a, b }) >= 0);
206}
207
208pub fn __aeabi_fcmpgt(a: f32, b: f32) callconv(.AAPCS) i32 {
209 @setRuntimeSafety(false);
210 return @boolToInt(@call(.{ .modifier = .always_inline }, __gtsf2, .{ a, b }) > 0);
211}
212
213pub fn __aeabi_fcmpun(a: f32, b: f32) callconv(.AAPCS) i32 {
214 @setRuntimeSafety(false);
215 return @call(.{ .modifier = .always_inline }, __unordsf2, .{ a, b });
216}
217
218pub fn __aeabi_dcmpeq(a: f64, b: f64) callconv(.AAPCS) i32 {
219 @setRuntimeSafety(false);
220 return @boolToInt(@call(.{ .modifier = .always_inline }, __eqdf2, .{ a, b }) == 0);
221}
222
223pub fn __aeabi_dcmplt(a: f64, b: f64) callconv(.AAPCS) i32 {
224 @setRuntimeSafety(false);
225 return @boolToInt(@call(.{ .modifier = .always_inline }, __ltdf2, .{ a, b }) < 0);
226}
227
228pub fn __aeabi_dcmple(a: f64, b: f64) callconv(.AAPCS) i32 {
229 @setRuntimeSafety(false);
230 return @boolToInt(@call(.{ .modifier = .always_inline }, __ledf2, .{ a, b }) <= 0);
231}
232
233pub fn __aeabi_dcmpge(a: f64, b: f64) callconv(.AAPCS) i32 {
234 @setRuntimeSafety(false);
235 return @boolToInt(@call(.{ .modifier = .always_inline }, __gedf2, .{ a, b }) >= 0);
236}
237
238pub fn __aeabi_dcmpgt(a: f64, b: f64) callconv(.AAPCS) i32 {
239 @setRuntimeSafety(false);
240 return @boolToInt(@call(.{ .modifier = .always_inline }, __gtdf2, .{ a, b }) > 0);
241}
242
243pub fn __aeabi_dcmpun(a: f64, b: f64) callconv(.AAPCS) i32 {
244 @setRuntimeSafety(false);
245 return @call(.{ .modifier = .always_inline }, __unorddf2, .{ a, b });
246}
247
248test "comparesf2" {
249 _ = @import("comparesf2_test.zig");
250}
251test "comparedf2" {
252 _ = @import("comparedf2_test.zig");
253}
lib/std/special/compiler_rt/comparedf2.zig deleted-127
...@@ -1,127 +0,0 @@
1// Ported from:
2//
3// https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/comparedf2.c
4
5const std = @import("std");
6const builtin = @import("builtin");
7const is_test = builtin.is_test;
8
9const fp_t = f64;
10const rep_t = u64;
11const srep_t = i64;
12
13const typeWidth = rep_t.bit_count;
14const significandBits = std.math.floatMantissaBits(fp_t);
15const exponentBits = std.math.floatExponentBits(fp_t);
16const signBit = (@as(rep_t, 1) << (significandBits + exponentBits));
17const absMask = signBit - 1;
18const implicitBit = @as(rep_t, 1) << significandBits;
19const significandMask = implicitBit - 1;
20const exponentMask = absMask ^ significandMask;
21const infRep = @bitCast(rep_t, std.math.inf(fp_t));
22
23// TODO https://github.com/ziglang/zig/issues/641
24// and then make the return types of some of these functions the enum instead of c_int
25const LE_LESS = @as(c_int, -1);
26const LE_EQUAL = @as(c_int, 0);
27const LE_GREATER = @as(c_int, 1);
28const LE_UNORDERED = @as(c_int, 1);
29
30pub fn __ledf2(a: fp_t, b: fp_t) callconv(.C) c_int {
31 @setRuntimeSafety(is_test);
32 const aInt: srep_t = @bitCast(srep_t, a);
33 const bInt: srep_t = @bitCast(srep_t, b);
34 const aAbs: rep_t = @bitCast(rep_t, aInt) & absMask;
35 const bAbs: rep_t = @bitCast(rep_t, bInt) & absMask;
36
37 // If either a or b is NaN, they are unordered.
38 if (aAbs > infRep or bAbs > infRep) return LE_UNORDERED;
39
40 // If a and b are both zeros, they are equal.
41 if ((aAbs | bAbs) == 0) return LE_EQUAL;
42
43 // If at least one of a and b is positive, we get the same result comparing
44 // a and b as signed integers as we would with a fp_ting-point compare.
45 if ((aInt & bInt) >= 0) {
46 if (aInt < bInt) {
47 return LE_LESS;
48 } else if (aInt == bInt) {
49 return LE_EQUAL;
50 } else return LE_GREATER;
51 }
52
53 // Otherwise, both are negative, so we need to flip the sense of the
54 // comparison to get the correct result. (This assumes a twos- or ones-
55 // complement integer representation; if integers are represented in a
56 // sign-magnitude representation, then this flip is incorrect).
57 else {
58 if (aInt > bInt) {
59 return LE_LESS;
60 } else if (aInt == bInt) {
61 return LE_EQUAL;
62 } else return LE_GREATER;
63 }
64}
65
66// TODO https://github.com/ziglang/zig/issues/641
67// and then make the return types of some of these functions the enum instead of c_int
68const GE_LESS = @as(c_int, -1);
69const GE_EQUAL = @as(c_int, 0);
70const GE_GREATER = @as(c_int, 1);
71const GE_UNORDERED = @as(c_int, -1); // Note: different from LE_UNORDERED
72
73pub fn __gedf2(a: fp_t, b: fp_t) callconv(.C) c_int {
74 @setRuntimeSafety(is_test);
75 const aInt: srep_t = @bitCast(srep_t, a);
76 const bInt: srep_t = @bitCast(srep_t, b);
77 const aAbs: rep_t = @bitCast(rep_t, aInt) & absMask;
78 const bAbs: rep_t = @bitCast(rep_t, bInt) & absMask;
79
80 if (aAbs > infRep or bAbs > infRep) return GE_UNORDERED;
81 if ((aAbs | bAbs) == 0) return GE_EQUAL;
82 if ((aInt & bInt) >= 0) {
83 if (aInt < bInt) {
84 return GE_LESS;
85 } else if (aInt == bInt) {
86 return GE_EQUAL;
87 } else return GE_GREATER;
88 } else {
89 if (aInt > bInt) {
90 return GE_LESS;
91 } else if (aInt == bInt) {
92 return GE_EQUAL;
93 } else return GE_GREATER;
94 }
95}
96
97pub fn __unorddf2(a: fp_t, b: fp_t) callconv(.C) c_int {
98 @setRuntimeSafety(is_test);
99 const aAbs: rep_t = @bitCast(rep_t, a) & absMask;
100 const bAbs: rep_t = @bitCast(rep_t, b) & absMask;
101 return @boolToInt(aAbs > infRep or bAbs > infRep);
102}
103
104pub fn __eqdf2(a: fp_t, b: fp_t) callconv(.C) c_int {
105 return __ledf2(a, b);
106}
107
108pub fn __ltdf2(a: fp_t, b: fp_t) callconv(.C) c_int {
109 return __ledf2(a, b);
110}
111
112pub fn __nedf2(a: fp_t, b: fp_t) callconv(.C) c_int {
113 return __ledf2(a, b);
114}
115
116pub fn __gtdf2(a: fp_t, b: fp_t) callconv(.C) c_int {
117 return __gedf2(a, b);
118}
119
120pub fn __aeabi_dcmpun(a: fp_t, b: fp_t) callconv(.AAPCS) c_int {
121 @setRuntimeSafety(false);
122 return @call(.{ .modifier = .always_inline }, __unorddf2, .{ a, b });
123}
124
125test "import comparedf2" {
126 _ = @import("comparedf2_test.zig");
127}
lib/std/special/compiler_rt/comparedf2_test.zig+1-1
...@@ -6,7 +6,7 @@ const std = @import("std");...@@ -6,7 +6,7 @@ const std = @import("std");
6const builtin = @import("builtin");6const builtin = @import("builtin");
7const is_test = builtin.is_test;7const is_test = builtin.is_test;
88
9const comparedf2 = @import("comparedf2.zig");9const comparedf2 = @import("compareXf2.zig");
1010
11const TestVector = struct {11const TestVector = struct {
12 a: f64,12 a: f64,
lib/std/special/compiler_rt/comparesf2.zig deleted-127
...@@ -1,127 +0,0 @@
1// Ported from:
2//
3// https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/comparesf2.c
4
5const std = @import("std");
6const builtin = @import("builtin");
7const is_test = builtin.is_test;
8
9const fp_t = f32;
10const rep_t = u32;
11const srep_t = i32;
12
13const typeWidth = rep_t.bit_count;
14const significandBits = std.math.floatMantissaBits(fp_t);
15const exponentBits = std.math.floatExponentBits(fp_t);
16const signBit = (@as(rep_t, 1) << (significandBits + exponentBits));
17const absMask = signBit - 1;
18const implicitBit = @as(rep_t, 1) << significandBits;
19const significandMask = implicitBit - 1;
20const exponentMask = absMask ^ significandMask;
21const infRep = @bitCast(rep_t, std.math.inf(fp_t));
22
23// TODO https://github.com/ziglang/zig/issues/641
24// and then make the return types of some of these functions the enum instead of c_int
25const LE_LESS = @as(c_int, -1);
26const LE_EQUAL = @as(c_int, 0);
27const LE_GREATER = @as(c_int, 1);
28const LE_UNORDERED = @as(c_int, 1);
29
30pub fn __lesf2(a: fp_t, b: fp_t) callconv(.C) c_int {
31 @setRuntimeSafety(is_test);
32 const aInt: srep_t = @bitCast(srep_t, a);
33 const bInt: srep_t = @bitCast(srep_t, b);
34 const aAbs: rep_t = @bitCast(rep_t, aInt) & absMask;
35 const bAbs: rep_t = @bitCast(rep_t, bInt) & absMask;
36
37 // If either a or b is NaN, they are unordered.
38 if (aAbs > infRep or bAbs > infRep) return LE_UNORDERED;
39
40 // If a and b are both zeros, they are equal.
41 if ((aAbs | bAbs) == 0) return LE_EQUAL;
42
43 // If at least one of a and b is positive, we get the same result comparing
44 // a and b as signed integers as we would with a fp_ting-point compare.
45 if ((aInt & bInt) >= 0) {
46 if (aInt < bInt) {
47 return LE_LESS;
48 } else if (aInt == bInt) {
49 return LE_EQUAL;
50 } else return LE_GREATER;
51 }
52
53 // Otherwise, both are negative, so we need to flip the sense of the
54 // comparison to get the correct result. (This assumes a twos- or ones-
55 // complement integer representation; if integers are represented in a
56 // sign-magnitude representation, then this flip is incorrect).
57 else {
58 if (aInt > bInt) {
59 return LE_LESS;
60 } else if (aInt == bInt) {
61 return LE_EQUAL;
62 } else return LE_GREATER;
63 }
64}
65
66// TODO https://github.com/ziglang/zig/issues/641
67// and then make the return types of some of these functions the enum instead of c_int
68const GE_LESS = @as(c_int, -1);
69const GE_EQUAL = @as(c_int, 0);
70const GE_GREATER = @as(c_int, 1);
71const GE_UNORDERED = @as(c_int, -1); // Note: different from LE_UNORDERED
72
73pub fn __gesf2(a: fp_t, b: fp_t) callconv(.C) c_int {
74 @setRuntimeSafety(is_test);
75 const aInt: srep_t = @bitCast(srep_t, a);
76 const bInt: srep_t = @bitCast(srep_t, b);
77 const aAbs: rep_t = @bitCast(rep_t, aInt) & absMask;
78 const bAbs: rep_t = @bitCast(rep_t, bInt) & absMask;
79
80 if (aAbs > infRep or bAbs > infRep) return GE_UNORDERED;
81 if ((aAbs | bAbs) == 0) return GE_EQUAL;
82 if ((aInt & bInt) >= 0) {
83 if (aInt < bInt) {
84 return GE_LESS;
85 } else if (aInt == bInt) {
86 return GE_EQUAL;
87 } else return GE_GREATER;
88 } else {
89 if (aInt > bInt) {
90 return GE_LESS;
91 } else if (aInt == bInt) {
92 return GE_EQUAL;
93 } else return GE_GREATER;
94 }
95}
96
97pub fn __unordsf2(a: fp_t, b: fp_t) callconv(.C) c_int {
98 @setRuntimeSafety(is_test);
99 const aAbs: rep_t = @bitCast(rep_t, a) & absMask;
100 const bAbs: rep_t = @bitCast(rep_t, b) & absMask;
101 return @boolToInt(aAbs > infRep or bAbs > infRep);
102}
103
104pub fn __eqsf2(a: fp_t, b: fp_t) callconv(.C) c_int {
105 return __lesf2(a, b);
106}
107
108pub fn __ltsf2(a: fp_t, b: fp_t) callconv(.C) c_int {
109 return __lesf2(a, b);
110}
111
112pub fn __nesf2(a: fp_t, b: fp_t) callconv(.C) c_int {
113 return __lesf2(a, b);
114}
115
116pub fn __gtsf2(a: fp_t, b: fp_t) callconv(.C) c_int {
117 return __gesf2(a, b);
118}
119
120pub fn __aeabi_fcmpun(a: fp_t, b: fp_t) callconv(.AAPCS) c_int {
121 @setRuntimeSafety(false);
122 return @call(.{ .modifier = .always_inline }, __unordsf2, .{ a, b });
123}
124
125test "import comparesf2" {
126 _ = @import("comparesf2_test.zig");
127}
lib/std/special/compiler_rt/comparesf2_test.zig+1-1
...@@ -6,7 +6,7 @@ const std = @import("std");...@@ -6,7 +6,7 @@ const std = @import("std");
6const builtin = @import("builtin");6const builtin = @import("builtin");
7const is_test = builtin.is_test;7const is_test = builtin.is_test;
88
9const comparesf2 = @import("comparesf2.zig");9const comparesf2 = @import("compareXf2.zig");
1010
11const TestVector = struct {11const TestVector = struct {
12 a: f32,12 a: f32,
lib/std/special/compiler_rt/comparetf2.zig deleted-99
...@@ -1,99 +0,0 @@
1// TODO https://github.com/ziglang/zig/issues/641
2// and then make the return types of some of these functions the enum instead of c_int
3const LE_LESS = @as(c_int, -1);
4const LE_EQUAL = @as(c_int, 0);
5const LE_GREATER = @as(c_int, 1);
6const LE_UNORDERED = @as(c_int, 1);
7
8const rep_t = u128;
9const srep_t = i128;
10
11const typeWidth = rep_t.bit_count;
12const significandBits = 112;
13const exponentBits = (typeWidth - significandBits - 1);
14const signBit = (@as(rep_t, 1) << (significandBits + exponentBits));
15const absMask = signBit - 1;
16const implicitBit = @as(rep_t, 1) << significandBits;
17const significandMask = implicitBit - 1;
18const exponentMask = absMask ^ significandMask;
19const infRep = exponentMask;
20
21const builtin = @import("builtin");
22const is_test = builtin.is_test;
23
24pub fn __letf2(a: f128, b: f128) callconv(.C) c_int {
25 @setRuntimeSafety(is_test);
26
27 const aInt = @bitCast(rep_t, a);
28 const bInt = @bitCast(rep_t, b);
29
30 const aAbs: rep_t = aInt & absMask;
31 const bAbs: rep_t = bInt & absMask;
32
33 // If either a or b is NaN, they are unordered.
34 if (aAbs > infRep or bAbs > infRep) return LE_UNORDERED;
35
36 // If a and b are both zeros, they are equal.
37 if ((aAbs | bAbs) == 0) return LE_EQUAL;
38
39 // If at least one of a and b is positive, we get the same result comparing
40 // a and b as signed integers as we would with a floating-point compare.
41 return if ((aInt & bInt) >= 0)
42 if (aInt < bInt)
43 LE_LESS
44 else if (aInt == bInt)
45 LE_EQUAL
46 else
47 LE_GREATER
48 else
49 // Otherwise, both are negative, so we need to flip the sense of the
50 // comparison to get the correct result. (This assumes a twos- or ones-
51 // complement integer representation; if integers are represented in a
52 // sign-magnitude representation, then this flip is incorrect).
53 if (aInt > bInt)
54 LE_LESS
55 else if (aInt == bInt)
56 LE_EQUAL
57 else
58 LE_GREATER;
59}
60
61// TODO https://github.com/ziglang/zig/issues/641
62// and then make the return types of some of these functions the enum instead of c_int
63const GE_LESS = @as(c_int, -1);
64const GE_EQUAL = @as(c_int, 0);
65const GE_GREATER = @as(c_int, 1);
66const GE_UNORDERED = @as(c_int, -1); // Note: different from LE_UNORDERED
67
68pub fn __getf2(a: f128, b: f128) callconv(.C) c_int {
69 @setRuntimeSafety(is_test);
70
71 const aInt = @bitCast(srep_t, a);
72 const bInt = @bitCast(srep_t, b);
73 const aAbs = @bitCast(rep_t, aInt) & absMask;
74 const bAbs = @bitCast(rep_t, bInt) & absMask;
75
76 if (aAbs > infRep or bAbs > infRep) return GE_UNORDERED;
77 if ((aAbs | bAbs) == 0) return GE_EQUAL;
78 return if ((aInt & bInt) >= 0)
79 if (aInt < bInt)
80 GE_LESS
81 else if (aInt == bInt)
82 GE_EQUAL
83 else
84 GE_GREATER
85 else if (aInt > bInt)
86 GE_LESS
87 else if (aInt == bInt)
88 GE_EQUAL
89 else
90 GE_GREATER;
91}
92
93pub fn __unordtf2(a: f128, b: f128) callconv(.C) c_int {
94 @setRuntimeSafety(is_test);
95
96 const aAbs = @bitCast(rep_t, a) & absMask;
97 const bAbs = @bitCast(rep_t, b) & absMask;
98 return @boolToInt(aAbs > infRep or bAbs > infRep);
99}
lib/std/special/compiler_rt/fixtfdi_test.zig+4
...@@ -11,6 +11,10 @@ fn test__fixtfdi(a: f128, expected: i64) void {...@@ -11,6 +11,10 @@ fn test__fixtfdi(a: f128, expected: i64) void {
11}11}
1212
13test "fixtfdi" {13test "fixtfdi" {
14 if (@import("std").Target.current.isWindows()) {
15 // TODO https://github.com/ziglang/zig/issues/508
16 return error.SkipZigTest;
17 }
14 //warn("\n", .{});18 //warn("\n", .{});
15 test__fixtfdi(-math.f128_max, math.minInt(i64));19 test__fixtfdi(-math.f128_max, math.minInt(i64));
1620
lib/std/special/compiler_rt/fixtfsi_test.zig+4
...@@ -11,6 +11,10 @@ fn test__fixtfsi(a: f128, expected: i32) void {...@@ -11,6 +11,10 @@ fn test__fixtfsi(a: f128, expected: i32) void {
11}11}
1212
13test "fixtfsi" {13test "fixtfsi" {
14 if (@import("std").Target.current.isWindows()) {
15 // TODO https://github.com/ziglang/zig/issues/508
16 return error.SkipZigTest;
17 }
14 //warn("\n", .{});18 //warn("\n", .{});
15 test__fixtfsi(-math.f128_max, math.minInt(i32));19 test__fixtfsi(-math.f128_max, math.minInt(i32));
1620
lib/std/special/compiler_rt/fixtfti_test.zig+4
...@@ -11,6 +11,10 @@ fn test__fixtfti(a: f128, expected: i128) void {...@@ -11,6 +11,10 @@ fn test__fixtfti(a: f128, expected: i128) void {
11}11}
1212
13test "fixtfti" {13test "fixtfti" {
14 if (@import("std").Target.current.isWindows()) {
15 // TODO https://github.com/ziglang/zig/issues/508
16 return error.SkipZigTest;
17 }
14 //warn("\n", .{});18 //warn("\n", .{});
15 test__fixtfti(-math.f128_max, math.minInt(i128));19 test__fixtfti(-math.f128_max, math.minInt(i128));
1620
lib/std/special/compiler_rt/fixunstfdi_test.zig+4
...@@ -7,6 +7,10 @@ fn test__fixunstfdi(a: f128, expected: u64) void {...@@ -7,6 +7,10 @@ fn test__fixunstfdi(a: f128, expected: u64) void {
7}7}
88
9test "fixunstfdi" {9test "fixunstfdi" {
10 if (@import("std").Target.current.isWindows()) {
11 // TODO https://github.com/ziglang/zig/issues/508
12 return error.SkipZigTest;
13 }
10 test__fixunstfdi(0.0, 0);14 test__fixunstfdi(0.0, 0);
1115
12 test__fixunstfdi(0.5, 0);16 test__fixunstfdi(0.5, 0);
lib/std/special/compiler_rt/fixunstfsi_test.zig+4
...@@ -9,6 +9,10 @@ fn test__fixunstfsi(a: f128, expected: u32) void {...@@ -9,6 +9,10 @@ fn test__fixunstfsi(a: f128, expected: u32) void {
9const inf128 = @bitCast(f128, @as(u128, 0x7fff0000000000000000000000000000));9const inf128 = @bitCast(f128, @as(u128, 0x7fff0000000000000000000000000000));
1010
11test "fixunstfsi" {11test "fixunstfsi" {
12 if (@import("std").Target.current.isWindows()) {
13 // TODO https://github.com/ziglang/zig/issues/508
14 return error.SkipZigTest;
15 }
12 test__fixunstfsi(inf128, 0xffffffff);16 test__fixunstfsi(inf128, 0xffffffff);
13 test__fixunstfsi(0, 0x0);17 test__fixunstfsi(0, 0x0);
14 test__fixunstfsi(0x1.23456789abcdefp+5, 0x24);18 test__fixunstfsi(0x1.23456789abcdefp+5, 0x24);
lib/std/special/compiler_rt/fixunstfti_test.zig+4
...@@ -9,6 +9,10 @@ fn test__fixunstfti(a: f128, expected: u128) void {...@@ -9,6 +9,10 @@ fn test__fixunstfti(a: f128, expected: u128) void {
9const inf128 = @bitCast(f128, @as(u128, 0x7fff0000000000000000000000000000));9const inf128 = @bitCast(f128, @as(u128, 0x7fff0000000000000000000000000000));
1010
11test "fixunstfti" {11test "fixunstfti" {
12 if (@import("std").Target.current.isWindows()) {
13 // TODO https://github.com/ziglang/zig/issues/508
14 return error.SkipZigTest;
15 }
12 test__fixunstfti(inf128, 0xffffffffffffffffffffffffffffffff);16 test__fixunstfti(inf128, 0xffffffffffffffffffffffffffffffff);
1317
14 test__fixunstfti(0.0, 0);18 test__fixunstfti(0.0, 0);
lib/std/special/compiler_rt/floattitf_test.zig+4
...@@ -7,6 +7,10 @@ fn test__floattitf(a: i128, expected: f128) void {...@@ -7,6 +7,10 @@ fn test__floattitf(a: i128, expected: f128) void {
7}7}
88
9test "floattitf" {9test "floattitf" {
10 if (@import("std").Target.current.isWindows()) {
11 // TODO https://github.com/ziglang/zig/issues/508
12 return error.SkipZigTest;
13 }
10 test__floattitf(0, 0.0);14 test__floattitf(0, 0.0);
1115
12 test__floattitf(1, 1.0);16 test__floattitf(1, 1.0);
lib/std/special/compiler_rt/floatuntitf_test.zig+4
...@@ -7,6 +7,10 @@ fn test__floatuntitf(a: u128, expected: f128) void {...@@ -7,6 +7,10 @@ fn test__floatuntitf(a: u128, expected: f128) void {
7}7}
88
9test "floatuntitf" {9test "floatuntitf" {
10 if (@import("std").Target.current.isWindows()) {
11 // TODO https://github.com/ziglang/zig/issues/508
12 return error.SkipZigTest;
13 }
10 test__floatuntitf(0, 0.0);14 test__floatuntitf(0, 0.0);
1115
12 test__floatuntitf(1, 1.0);16 test__floatuntitf(1, 1.0);
lib/std/special/compiler_rt/int.zig+60
...@@ -1,6 +1,8 @@...@@ -1,6 +1,8 @@
1// Builtin functions that operate on integer types1// Builtin functions that operate on integer types
2const builtin = @import("builtin");2const builtin = @import("builtin");
3const testing = @import("std").testing;3const testing = @import("std").testing;
4const maxInt = @import("std").math.maxInt;
5const minInt = @import("std").math.minInt;
46
5const udivmod = @import("udivmod.zig").udivmod;7const udivmod = @import("udivmod.zig").udivmod;
68
...@@ -578,3 +580,61 @@ fn test_one_umodsi3(a: u32, b: u32, expected_r: u32) void {...@@ -578,3 +580,61 @@ fn test_one_umodsi3(a: u32, b: u32, expected_r: u32) void {
578 const r: u32 = __umodsi3(a, b);580 const r: u32 = __umodsi3(a, b);
579 testing.expect(r == expected_r);581 testing.expect(r == expected_r);
580}582}
583
584pub fn __mulsi3(a: i32, b: i32) callconv(.C) i32 {
585 @setRuntimeSafety(builtin.is_test);
586
587 var ua = @bitCast(u32, a);
588 var ub = @bitCast(u32, b);
589 var r: u32 = 0;
590
591 while (ua > 0) {
592 if ((ua & 1) != 0) r +%= ub;
593 ua >>= 1;
594 ub <<= 1;
595 }
596
597 return @bitCast(i32, r);
598}
599
600fn test_one_mulsi3(a: i32, b: i32, result: i32) void {
601 testing.expectEqual(result, __mulsi3(a, b));
602}
603
604test "mulsi3" {
605 test_one_mulsi3(0, 0, 0);
606 test_one_mulsi3(0, 1, 0);
607 test_one_mulsi3(1, 0, 0);
608 test_one_mulsi3(0, 10, 0);
609 test_one_mulsi3(10, 0, 0);
610 test_one_mulsi3(0, maxInt(i32), 0);
611 test_one_mulsi3(maxInt(i32), 0, 0);
612 test_one_mulsi3(0, -1, 0);
613 test_one_mulsi3(-1, 0, 0);
614 test_one_mulsi3(0, -10, 0);
615 test_one_mulsi3(-10, 0, 0);
616 test_one_mulsi3(0, minInt(i32), 0);
617 test_one_mulsi3(minInt(i32), 0, 0);
618 test_one_mulsi3(1, 1, 1);
619 test_one_mulsi3(1, 10, 10);
620 test_one_mulsi3(10, 1, 10);
621 test_one_mulsi3(1, maxInt(i32), maxInt(i32));
622 test_one_mulsi3(maxInt(i32), 1, maxInt(i32));
623 test_one_mulsi3(1, -1, -1);
624 test_one_mulsi3(1, -10, -10);
625 test_one_mulsi3(-10, 1, -10);
626 test_one_mulsi3(1, minInt(i32), minInt(i32));
627 test_one_mulsi3(minInt(i32), 1, minInt(i32));
628 test_one_mulsi3(46340, 46340, 2147395600);
629 test_one_mulsi3(-46340, 46340, -2147395600);
630 test_one_mulsi3(46340, -46340, -2147395600);
631 test_one_mulsi3(-46340, -46340, 2147395600);
632 test_one_mulsi3(4194303, 8192, @truncate(i32, 34359730176));
633 test_one_mulsi3(-4194303, 8192, @truncate(i32, -34359730176));
634 test_one_mulsi3(4194303, -8192, @truncate(i32, -34359730176));
635 test_one_mulsi3(-4194303, -8192, @truncate(i32, 34359730176));
636 test_one_mulsi3(8192, 4194303, @truncate(i32, 34359730176));
637 test_one_mulsi3(-8192, 4194303, @truncate(i32, -34359730176));
638 test_one_mulsi3(8192, -4194303, @truncate(i32, -34359730176));
639 test_one_mulsi3(-8192, -4194303, @truncate(i32, 34359730176));
640}
lib/std/special/compiler_rt/mulXf3_test.zig+4
...@@ -44,6 +44,10 @@ fn makeNaN128(rand: u64) f128 {...@@ -44,6 +44,10 @@ fn makeNaN128(rand: u64) f128 {
44 return float_result;44 return float_result;
45}45}
46test "multf3" {46test "multf3" {
47 if (@import("std").Target.current.isWindows()) {
48 // TODO https://github.com/ziglang/zig/issues/508
49 return error.SkipZigTest;
50 }
47 // qNaN * any = qNaN51 // qNaN * any = qNaN
48 test__multf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);52 test__multf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
4953
lib/std/special/compiler_rt/truncXfYf2_test.zig+8
...@@ -151,6 +151,10 @@ fn test__trunctfsf2(a: f128, expected: u32) void {...@@ -151,6 +151,10 @@ fn test__trunctfsf2(a: f128, expected: u32) void {
151}151}
152152
153test "trunctfsf2" {153test "trunctfsf2" {
154 if (@import("std").Target.current.isWindows()) {
155 // TODO https://github.com/ziglang/zig/issues/508
156 return error.SkipZigTest;
157 }
154 // qnan158 // qnan
155 test__trunctfsf2(@bitCast(f128, @as(u128, 0x7fff800000000000 << 64)), 0x7fc00000);159 test__trunctfsf2(@bitCast(f128, @as(u128, 0x7fff800000000000 << 64)), 0x7fc00000);
156 // nan160 // nan
...@@ -186,6 +190,10 @@ fn test__trunctfdf2(a: f128, expected: u64) void {...@@ -186,6 +190,10 @@ fn test__trunctfdf2(a: f128, expected: u64) void {
186}190}
187191
188test "trunctfdf2" {192test "trunctfdf2" {
193 if (@import("std").Target.current.isWindows()) {
194 // TODO https://github.com/ziglang/zig/issues/508
195 return error.SkipZigTest;
196 }
189 // qnan197 // qnan
190 test__trunctfdf2(@bitCast(f128, @as(u128, 0x7fff800000000000 << 64)), 0x7ff8000000000000);198 test__trunctfdf2(@bitCast(f128, @as(u128, 0x7fff800000000000 << 64)), 0x7ff8000000000000);
191 // nan199 // nan
lib/std/start.zig+2-11
...@@ -8,16 +8,7 @@ const uefi = std.os.uefi;...@@ -8,16 +8,7 @@ const uefi = std.os.uefi;
88
9var starting_stack_ptr: [*]usize = undefined;9var starting_stack_ptr: [*]usize = undefined;
1010
11const is_wasm = switch (builtin.arch) {11const start_sym_name = if (builtin.arch.isMIPS()) "__start" else "_start";
12 .wasm32, .wasm64 => true,
13 else => false,
14};
15
16const is_mips = switch (builtin.arch) {
17 .mips, .mipsel, .mips64, .mips64el => true,
18 else => false,
19};
20const start_sym_name = if (is_mips) "__start" else "_start";
2112
22comptime {13comptime {
23 if (builtin.output_mode == .Lib and builtin.link_mode == .Dynamic) {14 if (builtin.output_mode == .Lib and builtin.link_mode == .Dynamic) {
...@@ -35,7 +26,7 @@ comptime {...@@ -35,7 +26,7 @@ comptime {
35 }26 }
36 } else if (builtin.os == .uefi) {27 } else if (builtin.os == .uefi) {
37 if (!@hasDecl(root, "EfiMain")) @export(EfiMain, .{ .name = "EfiMain" });28 if (!@hasDecl(root, "EfiMain")) @export(EfiMain, .{ .name = "EfiMain" });
38 } else if (is_wasm and builtin.os == .freestanding) {29 } else if (builtin.arch.isWasm() and builtin.os == .freestanding) {
39 if (!@hasDecl(root, start_sym_name)) @export(wasm_freestanding_start, .{ .name = start_sym_name });30 if (!@hasDecl(root, start_sym_name)) @export(wasm_freestanding_start, .{ .name = start_sym_name });
40 } else if (builtin.os != .other and builtin.os != .freestanding) {31 } else if (builtin.os != .other and builtin.os != .freestanding) {
41 if (!@hasDecl(root, start_sym_name)) @export(_start, .{ .name = start_sym_name });32 if (!@hasDecl(root, start_sym_name)) @export(_start, .{ .name = start_sym_name });
lib/std/target.zig+406-8
...@@ -49,6 +49,22 @@ pub const Target = union(enum) {...@@ -49,6 +49,22 @@ pub const Target = union(enum) {
49 other,49 other,
50 };50 };
5151
52 pub const aarch64 = @import("target/aarch64.zig");
53 pub const amdgpu = @import("target/amdgpu.zig");
54 pub const arm = @import("target/arm.zig");
55 pub const avr = @import("target/avr.zig");
56 pub const bpf = @import("target/bpf.zig");
57 pub const hexagon = @import("target/hexagon.zig");
58 pub const mips = @import("target/mips.zig");
59 pub const msp430 = @import("target/msp430.zig");
60 pub const nvptx = @import("target/nvptx.zig");
61 pub const powerpc = @import("target/powerpc.zig");
62 pub const riscv = @import("target/riscv.zig");
63 pub const sparc = @import("target/sparc.zig");
64 pub const systemz = @import("target/systemz.zig");
65 pub const wasm = @import("target/wasm.zig");
66 pub const x86 = @import("target/x86.zig");
67
52 pub const Arch = union(enum) {68 pub const Arch = union(enum) {
53 arm: Arm32,69 arm: Arm32,
54 armeb: Arm32,70 armeb: Arm32,
...@@ -107,12 +123,12 @@ pub const Target = union(enum) {...@@ -107,12 +123,12 @@ pub const Target = union(enum) {
107 v8_3a,123 v8_3a,
108 v8_2a,124 v8_2a,
109 v8_1a,125 v8_1a,
110 v8,126 v8a,
111 v8r,127 v8r,
112 v8m_baseline,128 v8m_baseline,
113 v8m_mainline,129 v8m_mainline,
114 v8_1m_mainline,130 v8_1m_mainline,
115 v7,131 v7a,
116 v7em,132 v7em,
117 v7m,133 v7m,
118 v7s,134 v7s,
...@@ -125,6 +141,16 @@ pub const Target = union(enum) {...@@ -125,6 +141,16 @@ pub const Target = union(enum) {
125 v5,141 v5,
126 v5te,142 v5te,
127 v4t,143 v4t,
144
145 pub fn version(version: Arm32) comptime_int {
146 return switch (version) {
147 .v8_5a, .v8_4a, .v8_3a, .v8_2a, .v8_1a, .v8a, .v8r, .v8m_baseline, .v8m_mainline, .v8_1m_mainline => 8,
148 .v7a, .v7em, .v7m, .v7s, .v7k, .v7ve => 7,
149 .v6, .v6m, .v6k, .v6t2 => 6,
150 .v5, .v5te => 5,
151 .v4t => 4,
152 };
153 }
128 };154 };
129 pub const Arm64 = enum {155 pub const Arm64 = enum {
130 v8_5a,156 v8_5a,
...@@ -132,10 +158,7 @@ pub const Target = union(enum) {...@@ -132,10 +158,7 @@ pub const Target = union(enum) {
132 v8_3a,158 v8_3a,
133 v8_2a,159 v8_2a,
134 v8_1a,160 v8_1a,
135 v8,161 v8a,
136 v8r,
137 v8m_baseline,
138 v8m_mainline,
139 };162 };
140 pub const Kalimba = enum {163 pub const Kalimba = enum {
141 v5,164 v5,
...@@ -146,6 +169,129 @@ pub const Target = union(enum) {...@@ -146,6 +169,129 @@ pub const Target = union(enum) {
146 r6,169 r6,
147 };170 };
148171
172 pub fn subArchName(arch: Arch) ?[]const u8 {
173 return switch (arch) {
174 .arm, .armeb, .thumb, .thumbeb => |arm32| @tagName(arm32),
175 .aarch64, .aarch64_be, .aarch64_32 => |arm64| @tagName(arm64),
176 .kalimba => |kalimba| @tagName(kalimba),
177 else => return null,
178 };
179 }
180
181 pub fn subArchFeature(arch: Arch) ?Cpu.Feature.Set.Index {
182 return switch (arch) {
183 .arm, .armeb, .thumb, .thumbeb => |arm32| switch (arm32) {
184 .v8_5a => @enumToInt(arm.Feature.armv8_5_a),
185 .v8_4a => @enumToInt(arm.Feature.armv8_4_a),
186 .v8_3a => @enumToInt(arm.Feature.armv8_3_a),
187 .v8_2a => @enumToInt(arm.Feature.armv8_2_a),
188 .v8_1a => @enumToInt(arm.Feature.armv8_1_a),
189 .v8a => @enumToInt(arm.Feature.armv8_a),
190 .v8r => @enumToInt(arm.Feature.armv8_r),
191 .v8m_baseline => @enumToInt(arm.Feature.armv8_m_base),
192 .v8m_mainline => @enumToInt(arm.Feature.armv8_m_main),
193 .v8_1m_mainline => @enumToInt(arm.Feature.armv8_1_m_main),
194 .v7a => @enumToInt(arm.Feature.armv7_a),
195 .v7em => @enumToInt(arm.Feature.armv7e_m),
196 .v7m => @enumToInt(arm.Feature.armv7_m),
197 .v7s => @enumToInt(arm.Feature.armv7s),
198 .v7k => @enumToInt(arm.Feature.armv7k),
199 .v7ve => @enumToInt(arm.Feature.armv7ve),
200 .v6 => @enumToInt(arm.Feature.armv6),
201 .v6m => @enumToInt(arm.Feature.armv6_m),
202 .v6k => @enumToInt(arm.Feature.armv6k),
203 .v6t2 => @enumToInt(arm.Feature.armv6t2),
204 .v5 => @enumToInt(arm.Feature.armv5t),
205 .v5te => @enumToInt(arm.Feature.armv5te),
206 .v4t => @enumToInt(arm.Feature.armv4t),
207 },
208 .aarch64, .aarch64_be, .aarch64_32 => |arm64| switch (arm64) {
209 .v8_5a => @enumToInt(aarch64.Feature.v8_5a),
210 .v8_4a => @enumToInt(aarch64.Feature.v8_4a),
211 .v8_3a => @enumToInt(aarch64.Feature.v8_3a),
212 .v8_2a => @enumToInt(aarch64.Feature.v8_2a),
213 .v8_1a => @enumToInt(aarch64.Feature.v8_1a),
214 .v8a => @enumToInt(aarch64.Feature.v8a),
215 },
216 else => return null,
217 };
218 }
219
220 pub fn isARM(arch: Arch) bool {
221 return switch (arch) {
222 .arm, .armeb => true,
223 else => false,
224 };
225 }
226
227 pub fn isThumb(arch: Arch) bool {
228 return switch (arch) {
229 .thumb, .thumbeb => true,
230 else => false,
231 };
232 }
233
234 pub fn isWasm(arch: Arch) bool {
235 return switch (arch) {
236 .wasm32, .wasm64 => true,
237 else => false,
238 };
239 }
240
241 pub fn isMIPS(arch: Arch) bool {
242 return switch (arch) {
243 .mips, .mipsel, .mips64, .mips64el => true,
244 else => false,
245 };
246 }
247
248 pub fn parseCpu(arch: Arch, cpu_name: []const u8) !*const Cpu {
249 for (arch.allCpus()) |cpu| {
250 if (mem.eql(u8, cpu_name, cpu.name)) {
251 return cpu;
252 }
253 }
254 return error.UnknownCpu;
255 }
256
257 /// Comma-separated list of features, with + or - in front of each feature. This
258 /// form represents a deviation from baseline CPU, which is provided as a parameter.
259 /// Extra commas are ignored.
260 pub fn parseCpuFeatureSet(arch: Arch, cpu: *const Cpu, features_text: []const u8) !Cpu.Feature.Set {
261 const all_features = arch.allFeaturesList();
262 var set = cpu.features;
263 var it = mem.tokenize(features_text, ",");
264 while (it.next()) |item_text| {
265 var feature_name: []const u8 = undefined;
266 var op: enum {
267 add,
268 sub,
269 } = undefined;
270 if (mem.startsWith(u8, item_text, "+")) {
271 op = .add;
272 feature_name = item_text[1..];
273 } else if (mem.startsWith(u8, item_text, "-")) {
274 op = .sub;
275 feature_name = item_text[1..];
276 } else {
277 return error.InvalidCpuFeatures;
278 }
279 for (all_features) |feature, index_usize| {
280 const index = @intCast(Cpu.Feature.Set.Index, index_usize);
281 if (mem.eql(u8, feature_name, feature.name)) {
282 switch (op) {
283 .add => set.addFeature(index),
284 .sub => set.removeFeature(index),
285 }
286 break;
287 }
288 } else {
289 return error.UnknownCpuFeature;
290 }
291 }
292 return set;
293 }
294
149 pub fn toElfMachine(arch: Arch) std.elf.EM {295 pub fn toElfMachine(arch: Arch) std.elf.EM {
150 return switch (arch) {296 return switch (arch) {
151 .avr => ._AVR,297 .avr => ._AVR,
...@@ -258,6 +404,109 @@ pub const Target = union(enum) {...@@ -258,6 +404,109 @@ pub const Target = union(enum) {
258 => .Big,404 => .Big,
259 };405 };
260 }406 }
407
408 /// Returns a name that matches the lib/std/target/* directory name.
409 pub fn genericName(arch: Arch) []const u8 {
410 return switch (arch) {
411 .arm, .armeb, .thumb, .thumbeb => "arm",
412 .aarch64, .aarch64_be, .aarch64_32 => "aarch64",
413 .avr => "avr",
414 .bpfel, .bpfeb => "bpf",
415 .hexagon => "hexagon",
416 .mips, .mipsel, .mips64, .mips64el => "mips",
417 .msp430 => "msp430",
418 .powerpc, .powerpc64, .powerpc64le => "powerpc",
419 .amdgcn => "amdgpu",
420 .riscv32, .riscv64 => "riscv",
421 .sparc, .sparcv9, .sparcel => "sparc",
422 .s390x => "systemz",
423 .i386, .x86_64 => "x86",
424 .nvptx, .nvptx64 => "nvptx",
425 .wasm32, .wasm64 => "wasm",
426 else => @tagName(arch),
427 };
428 }
429
430 /// All CPU features Zig is aware of, sorted lexicographically by name.
431 pub fn allFeaturesList(arch: Arch) []const Cpu.Feature {
432 return switch (arch) {
433 .arm, .armeb, .thumb, .thumbeb => &arm.all_features,
434 .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features,
435 .avr => &avr.all_features,
436 .bpfel, .bpfeb => &bpf.all_features,
437 .hexagon => &hexagon.all_features,
438 .mips, .mipsel, .mips64, .mips64el => &mips.all_features,
439 .msp430 => &msp430.all_features,
440 .powerpc, .powerpc64, .powerpc64le => &powerpc.all_features,
441 .amdgcn => &amdgpu.all_features,
442 .riscv32, .riscv64 => &riscv.all_features,
443 .sparc, .sparcv9, .sparcel => &sparc.all_features,
444 .s390x => &systemz.all_features,
445 .i386, .x86_64 => &x86.all_features,
446 .nvptx, .nvptx64 => &nvptx.all_features,
447 .wasm32, .wasm64 => &wasm.all_features,
448
449 else => &[0]Cpu.Feature{},
450 };
451 }
452
453 /// The "default" set of CPU features for cross-compiling. A conservative set
454 /// of features that is expected to be supported on most available hardware.
455 pub fn getBaselineCpuFeatures(arch: Arch) CpuFeatures {
456 const S = struct {
457 const generic_cpu = Cpu{
458 .name = "generic",
459 .llvm_name = null,
460 .features = Cpu.Feature.Set.empty,
461 };
462 };
463 const cpu = switch (arch) {
464 .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic,
465 .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic,
466 .avr => &avr.cpu.avr1,
467 .bpfel, .bpfeb => &bpf.cpu.generic,
468 .hexagon => &hexagon.cpu.generic,
469 .mips, .mipsel => &mips.cpu.mips32,
470 .mips64, .mips64el => &mips.cpu.mips64,
471 .msp430 => &msp430.cpu.generic,
472 .powerpc, .powerpc64, .powerpc64le => &powerpc.cpu.generic,
473 .amdgcn => &amdgpu.cpu.generic,
474 .riscv32 => &riscv.cpu.baseline_rv32,
475 .riscv64 => &riscv.cpu.baseline_rv64,
476 .sparc, .sparcv9, .sparcel => &sparc.cpu.generic,
477 .s390x => &systemz.cpu.generic,
478 .i386 => &x86.cpu.pentium4,
479 .x86_64 => &x86.cpu.x86_64,
480 .nvptx, .nvptx64 => &nvptx.cpu.sm_20,
481 .wasm32, .wasm64 => &wasm.cpu.generic,
482
483 else => &S.generic_cpu,
484 };
485 return CpuFeatures.initFromCpu(arch, cpu);
486 }
487
488 /// All CPUs Zig is aware of, sorted lexicographically by name.
489 pub fn allCpus(arch: Arch) []const *const Cpu {
490 return switch (arch) {
491 .arm, .armeb, .thumb, .thumbeb => arm.all_cpus,
492 .aarch64, .aarch64_be, .aarch64_32 => aarch64.all_cpus,
493 .avr => avr.all_cpus,
494 .bpfel, .bpfeb => bpf.all_cpus,
495 .hexagon => hexagon.all_cpus,
496 .mips, .mipsel, .mips64, .mips64el => mips.all_cpus,
497 .msp430 => msp430.all_cpus,
498 .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus,
499 .amdgcn => amdgpu.all_cpus,
500 .riscv32, .riscv64 => riscv.all_cpus,
501 .sparc, .sparcv9, .sparcel => sparc.all_cpus,
502 .s390x => systemz.all_cpus,
503 .i386, .x86_64 => x86.all_cpus,
504 .nvptx, .nvptx64 => nvptx.all_cpus,
505 .wasm32, .wasm64 => wasm.all_cpus,
506
507 else => &[0]*const Cpu{},
508 };
509 }
261 };510 };
262511
263 pub const Abi = enum {512 pub const Abi = enum {
...@@ -285,6 +534,109 @@ pub const Target = union(enum) {...@@ -285,6 +534,109 @@ pub const Target = union(enum) {
285 macabi,534 macabi,
286 };535 };
287536
537 pub const Cpu = struct {
538 name: []const u8,
539 llvm_name: ?[:0]const u8,
540 features: Feature.Set,
541
542 pub const Feature = struct {
543 /// The bit index into `Set`. Has a default value of `undefined` because the canonical
544 /// structures are populated via comptime logic.
545 index: Set.Index = undefined,
546
547 /// Has a default value of `undefined` because the canonical
548 /// structures are populated via comptime logic.
549 name: []const u8 = undefined,
550
551 /// If this corresponds to an LLVM-recognized feature, this will be populated;
552 /// otherwise null.
553 llvm_name: ?[:0]const u8,
554
555 /// Human-friendly UTF-8 text.
556 description: []const u8,
557
558 /// Sparse `Set` of features this depends on.
559 dependencies: Set,
560
561 /// A bit set of all the features.
562 pub const Set = struct {
563 ints: [usize_count]usize,
564
565 pub const needed_bit_count = 174;
566 pub const byte_count = (needed_bit_count + 7) / 8;
567 pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize);
568 pub const Index = std.math.Log2Int(@IntType(false, usize_count * @bitSizeOf(usize)));
569 pub const ShiftInt = std.math.Log2Int(usize);
570
571 pub const empty = Set{ .ints = [1]usize{0} ** usize_count };
572 pub fn empty_workaround() Set {
573 return Set{ .ints = [1]usize{0} ** usize_count };
574 }
575
576 pub fn isEnabled(set: Set, arch_feature_index: Index) bool {
577 const usize_index = arch_feature_index / @bitSizeOf(usize);
578 const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
579 return (set.ints[usize_index] & (@as(usize, 1) << bit_index)) != 0;
580 }
581
582 /// Adds the specified feature but not its dependencies.
583 pub fn addFeature(set: *Set, arch_feature_index: Index) void {
584 const usize_index = arch_feature_index / @bitSizeOf(usize);
585 const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
586 set.ints[usize_index] |= @as(usize, 1) << bit_index;
587 }
588
589 /// Removes the specified feature but not its dependents.
590 pub fn removeFeature(set: *Set, arch_feature_index: Index) void {
591 const usize_index = arch_feature_index / @bitSizeOf(usize);
592 const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
593 set.ints[usize_index] &= ~(@as(usize, 1) << bit_index);
594 }
595
596 pub fn populateDependencies(set: *Set, all_features_list: []const Cpu.Feature) void {
597 var old = set.ints;
598 while (true) {
599 for (all_features_list) |feature, index_usize| {
600 const index = @intCast(Index, index_usize);
601 if (set.isEnabled(index)) {
602 set.ints = @as(@Vector(usize_count, usize), set.ints) |
603 @as(@Vector(usize_count, usize), feature.dependencies.ints);
604 }
605 }
606 const nothing_changed = mem.eql(usize, &old, &set.ints);
607 if (nothing_changed) return;
608 old = set.ints;
609 }
610 }
611
612 pub fn asBytes(set: *const Set) *const [byte_count]u8 {
613 return @ptrCast(*const [byte_count]u8, &set.ints);
614 }
615
616 pub fn eql(set: Set, other: Set) bool {
617 return mem.eql(usize, &set.ints, &other.ints);
618 }
619 };
620
621 pub fn feature_set_fns(comptime F: type) type {
622 return struct {
623 /// Populates only the feature bits specified.
624 pub fn featureSet(features: []const F) Set {
625 var x = Set.empty_workaround(); // TODO remove empty_workaround
626 for (features) |feature| {
627 x.addFeature(@enumToInt(feature));
628 }
629 return x;
630 }
631
632 pub fn featureSetHas(set: Set, feature: F) bool {
633 return set.isEnabled(@enumToInt(feature));
634 }
635 };
636 }
637 };
638 };
639
288 pub const ObjectFormat = enum {640 pub const ObjectFormat = enum {
289 unknown,641 unknown,
290 coff,642 coff,
...@@ -308,6 +660,28 @@ pub const Target = union(enum) {...@@ -308,6 +660,28 @@ pub const Target = union(enum) {
308 arch: Arch,660 arch: Arch,
309 os: Os,661 os: Os,
310 abi: Abi,662 abi: Abi,
663 cpu_features: CpuFeatures,
664 };
665
666 pub const CpuFeatures = struct {
667 /// The CPU to target. It has a set of features
668 /// which are overridden with the `features` field.
669 cpu: *const Cpu,
670
671 /// Explicitly provide the entire CPU feature set.
672 features: Cpu.Feature.Set,
673
674 pub fn initFromCpu(arch: Arch, cpu: *const Cpu) CpuFeatures {
675 var features = cpu.features;
676 if (arch.subArchFeature()) |sub_arch_index| {
677 features.addFeature(sub_arch_index);
678 }
679 features.populateDependencies(arch.allFeaturesList());
680 return CpuFeatures{
681 .cpu = cpu,
682 .features = features,
683 };
684 }
311 };685 };
312686
313 pub const current = Target{687 pub const current = Target{
...@@ -315,11 +689,19 @@ pub const Target = union(enum) {...@@ -315,11 +689,19 @@ pub const Target = union(enum) {
315 .arch = builtin.arch,689 .arch = builtin.arch,
316 .os = builtin.os,690 .os = builtin.os,
317 .abi = builtin.abi,691 .abi = builtin.abi,
692 .cpu_features = builtin.cpu_features,
318 },693 },
319 };694 };
320695
321 pub const stack_align = 16;696 pub const stack_align = 16;
322697
698 pub fn getCpuFeatures(self: Target) CpuFeatures {
699 return switch (self) {
700 .Native => builtin.cpu_features,
701 .Cross => |cross| cross.cpu_features,
702 };
703 }
704
323 pub fn zigTriple(self: Target, allocator: *mem.Allocator) ![]u8 {705 pub fn zigTriple(self: Target, allocator: *mem.Allocator) ![]u8 {
324 return std.fmt.allocPrint(allocator, "{}{}-{}-{}", .{706 return std.fmt.allocPrint(allocator, "{}{}-{}-{}", .{
325 @tagName(self.getArch()),707 @tagName(self.getArch()),
...@@ -385,14 +767,18 @@ pub const Target = union(enum) {...@@ -385,14 +767,18 @@ pub const Target = union(enum) {
385 });767 });
386 }768 }
387769
770 /// TODO: Support CPU features here?
771 /// https://github.com/ziglang/zig/issues/4261
388 pub fn parse(text: []const u8) !Target {772 pub fn parse(text: []const u8) !Target {
389 var it = mem.separate(text, "-");773 var it = mem.separate(text, "-");
390 const arch_name = it.next() orelse return error.MissingArchitecture;774 const arch_name = it.next() orelse return error.MissingArchitecture;
391 const os_name = it.next() orelse return error.MissingOperatingSystem;775 const os_name = it.next() orelse return error.MissingOperatingSystem;
392 const abi_name = it.next();776 const abi_name = it.next();
777 const arch = try parseArchSub(arch_name);
393778
394 var cross = Cross{779 var cross = Cross{
395 .arch = try parseArchSub(arch_name),780 .arch = arch,
781 .cpu_features = arch.getBaselineCpuFeatures(),
396 .os = try parseOs(os_name),782 .os = try parseOs(os_name),
397 .abi = undefined,783 .abi = undefined,
398 };784 };
...@@ -458,7 +844,7 @@ pub const Target = union(enum) {...@@ -458,7 +844,7 @@ pub const Target = union(enum) {
458 pub fn parseArchSub(text: []const u8) ParseArchSubError!Arch {844 pub fn parseArchSub(text: []const u8) ParseArchSubError!Arch {
459 const info = @typeInfo(Arch);845 const info = @typeInfo(Arch);
460 inline for (info.Union.fields) |field| {846 inline for (info.Union.fields) |field| {
461 if (mem.eql(u8, text, field.name)) {847 if (mem.startsWith(u8, text, field.name)) {
462 if (field.field_type == void) {848 if (field.field_type == void) {
463 return @as(Arch, @field(Arch, field.name));849 return @as(Arch, @field(Arch, field.name));
464 } else {850 } else {
...@@ -778,3 +1164,15 @@ pub const Target = union(enum) {...@@ -778,3 +1164,15 @@ pub const Target = union(enum) {
778 return .unavailable;1164 return .unavailable;
779 }1165 }
780};1166};
1167
1168test "parseCpuFeatureSet" {
1169 const arch: Target.Arch = .x86_64;
1170 const baseline = arch.getBaselineCpuFeatures();
1171 const set = try arch.parseCpuFeatureSet(baseline.cpu, "-sse,-avx,-cx8");
1172 std.testing.expect(!Target.x86.featureSetHas(set, .sse));
1173 std.testing.expect(!Target.x86.featureSetHas(set, .avx));
1174 std.testing.expect(!Target.x86.featureSetHas(set, .cx8));
1175 // These are expected because they are part of the baseline
1176 std.testing.expect(Target.x86.featureSetHas(set, .cmov));
1177 std.testing.expect(Target.x86.featureSetHas(set, .fxsr));
1178}
lib/std/target/aarch64.zig created+1450
...@@ -0,0 +1,1450 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 a35,
6 a53,
7 a55,
8 a57,
9 a72,
10 a73,
11 a75,
12 a76,
13 aes,
14 aggressive_fma,
15 alternate_sextload_cvt_f32_pattern,
16 altnzcv,
17 am,
18 arith_bcc_fusion,
19 arith_cbz_fusion,
20 balance_fp_ops,
21 bti,
22 call_saved_x10,
23 call_saved_x11,
24 call_saved_x12,
25 call_saved_x13,
26 call_saved_x14,
27 call_saved_x15,
28 call_saved_x18,
29 call_saved_x8,
30 call_saved_x9,
31 ccdp,
32 ccidx,
33 ccpp,
34 complxnum,
35 crc,
36 crypto,
37 custom_cheap_as_move,
38 cyclone,
39 disable_latency_sched_heuristic,
40 dit,
41 dotprod,
42 exynos_cheap_as_move,
43 exynosm1,
44 exynosm2,
45 exynosm3,
46 exynosm4,
47 falkor,
48 fmi,
49 force_32bit_jump_tables,
50 fp_armv8,
51 fp16fml,
52 fptoint,
53 fullfp16,
54 fuse_address,
55 fuse_aes,
56 fuse_arith_logic,
57 fuse_crypto_eor,
58 fuse_csel,
59 fuse_literals,
60 jsconv,
61 kryo,
62 lor,
63 lse,
64 lsl_fast,
65 mpam,
66 mte,
67 neon,
68 no_neg_immediates,
69 nv,
70 pa,
71 pan,
72 pan_rwv,
73 perfmon,
74 predictable_select_expensive,
75 predres,
76 rand,
77 ras,
78 rasv8_4,
79 rcpc,
80 rcpc_immo,
81 rdm,
82 reserve_x1,
83 reserve_x10,
84 reserve_x11,
85 reserve_x12,
86 reserve_x13,
87 reserve_x14,
88 reserve_x15,
89 reserve_x18,
90 reserve_x2,
91 reserve_x20,
92 reserve_x21,
93 reserve_x22,
94 reserve_x23,
95 reserve_x24,
96 reserve_x25,
97 reserve_x26,
98 reserve_x27,
99 reserve_x28,
100 reserve_x3,
101 reserve_x4,
102 reserve_x5,
103 reserve_x6,
104 reserve_x7,
105 reserve_x9,
106 saphira,
107 sb,
108 sel2,
109 sha2,
110 sha3,
111 slow_misaligned_128store,
112 slow_paired_128,
113 slow_strqro_store,
114 sm4,
115 spe,
116 specrestrict,
117 ssbs,
118 strict_align,
119 sve,
120 sve2,
121 sve2_aes,
122 sve2_bitperm,
123 sve2_sha3,
124 sve2_sm4,
125 thunderx,
126 thunderx2t99,
127 thunderxt81,
128 thunderxt83,
129 thunderxt88,
130 tlb_rmi,
131 tpidr_el1,
132 tpidr_el2,
133 tpidr_el3,
134 tracev8_4,
135 tsv110,
136 uaops,
137 use_aa,
138 use_postra_scheduler,
139 use_reciprocal_square_root,
140 v8a,
141 v8_1a,
142 v8_2a,
143 v8_3a,
144 v8_4a,
145 v8_5a,
146 vh,
147 zcm,
148 zcz,
149 zcz_fp,
150 zcz_fp_workaround,
151 zcz_gp,
152};
153
154pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
155
156pub const all_features = blk: {
157 @setEvalBranchQuota(2000);
158 const len = @typeInfo(Feature).Enum.fields.len;
159 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
160 var result: [len]Cpu.Feature = undefined;
161 result[@enumToInt(Feature.a35)] = .{
162 .llvm_name = "a35",
163 .description = "Cortex-A35 ARM processors",
164 .dependencies = featureSet(&[_]Feature{
165 .crc,
166 .crypto,
167 .fp_armv8,
168 .neon,
169 .perfmon,
170 }),
171 };
172 result[@enumToInt(Feature.a53)] = .{
173 .llvm_name = "a53",
174 .description = "Cortex-A53 ARM processors",
175 .dependencies = featureSet(&[_]Feature{
176 .balance_fp_ops,
177 .crc,
178 .crypto,
179 .custom_cheap_as_move,
180 .fp_armv8,
181 .fuse_aes,
182 .neon,
183 .perfmon,
184 .use_aa,
185 .use_postra_scheduler,
186 }),
187 };
188 result[@enumToInt(Feature.a55)] = .{
189 .llvm_name = "a55",
190 .description = "Cortex-A55 ARM processors",
191 .dependencies = featureSet(&[_]Feature{
192 .crypto,
193 .dotprod,
194 .fp_armv8,
195 .fullfp16,
196 .fuse_aes,
197 .neon,
198 .perfmon,
199 .rcpc,
200 .v8_2a,
201 }),
202 };
203 result[@enumToInt(Feature.a57)] = .{
204 .llvm_name = "a57",
205 .description = "Cortex-A57 ARM processors",
206 .dependencies = featureSet(&[_]Feature{
207 .balance_fp_ops,
208 .crc,
209 .crypto,
210 .custom_cheap_as_move,
211 .fp_armv8,
212 .fuse_aes,
213 .fuse_literals,
214 .neon,
215 .perfmon,
216 .predictable_select_expensive,
217 .use_postra_scheduler,
218 }),
219 };
220 result[@enumToInt(Feature.a72)] = .{
221 .llvm_name = "a72",
222 .description = "Cortex-A72 ARM processors",
223 .dependencies = featureSet(&[_]Feature{
224 .crc,
225 .crypto,
226 .fp_armv8,
227 .fuse_aes,
228 .neon,
229 .perfmon,
230 }),
231 };
232 result[@enumToInt(Feature.a73)] = .{
233 .llvm_name = "a73",
234 .description = "Cortex-A73 ARM processors",
235 .dependencies = featureSet(&[_]Feature{
236 .crc,
237 .crypto,
238 .fp_armv8,
239 .fuse_aes,
240 .neon,
241 .perfmon,
242 }),
243 };
244 result[@enumToInt(Feature.a75)] = .{
245 .llvm_name = "a75",
246 .description = "Cortex-A75 ARM processors",
247 .dependencies = featureSet(&[_]Feature{
248 .crypto,
249 .dotprod,
250 .fp_armv8,
251 .fullfp16,
252 .fuse_aes,
253 .neon,
254 .perfmon,
255 .rcpc,
256 .v8_2a,
257 }),
258 };
259 result[@enumToInt(Feature.a76)] = .{
260 .llvm_name = "a76",
261 .description = "Cortex-A76 ARM processors",
262 .dependencies = featureSet(&[_]Feature{
263 .crypto,
264 .dotprod,
265 .fp_armv8,
266 .fullfp16,
267 .neon,
268 .rcpc,
269 .ssbs,
270 .v8_2a,
271 }),
272 };
273 result[@enumToInt(Feature.aes)] = .{
274 .llvm_name = "aes",
275 .description = "Enable AES support",
276 .dependencies = featureSet(&[_]Feature{
277 .neon,
278 }),
279 };
280 result[@enumToInt(Feature.aggressive_fma)] = .{
281 .llvm_name = "aggressive-fma",
282 .description = "Enable Aggressive FMA for floating-point.",
283 .dependencies = featureSet(&[_]Feature{}),
284 };
285 result[@enumToInt(Feature.alternate_sextload_cvt_f32_pattern)] = .{
286 .llvm_name = "alternate-sextload-cvt-f32-pattern",
287 .description = "Use alternative pattern for sextload convert to f32",
288 .dependencies = featureSet(&[_]Feature{}),
289 };
290 result[@enumToInt(Feature.altnzcv)] = .{
291 .llvm_name = "altnzcv",
292 .description = "Enable alternative NZCV format for floating point comparisons",
293 .dependencies = featureSet(&[_]Feature{}),
294 };
295 result[@enumToInt(Feature.am)] = .{
296 .llvm_name = "am",
297 .description = "Enable v8.4-A Activity Monitors extension",
298 .dependencies = featureSet(&[_]Feature{}),
299 };
300 result[@enumToInt(Feature.arith_bcc_fusion)] = .{
301 .llvm_name = "arith-bcc-fusion",
302 .description = "CPU fuses arithmetic+bcc operations",
303 .dependencies = featureSet(&[_]Feature{}),
304 };
305 result[@enumToInt(Feature.arith_cbz_fusion)] = .{
306 .llvm_name = "arith-cbz-fusion",
307 .description = "CPU fuses arithmetic + cbz/cbnz operations",
308 .dependencies = featureSet(&[_]Feature{}),
309 };
310 result[@enumToInt(Feature.balance_fp_ops)] = .{
311 .llvm_name = "balance-fp-ops",
312 .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
313 .dependencies = featureSet(&[_]Feature{}),
314 };
315 result[@enumToInt(Feature.bti)] = .{
316 .llvm_name = "bti",
317 .description = "Enable Branch Target Identification",
318 .dependencies = featureSet(&[_]Feature{}),
319 };
320 result[@enumToInt(Feature.call_saved_x10)] = .{
321 .llvm_name = "call-saved-x10",
322 .description = "Make X10 callee saved.",
323 .dependencies = featureSet(&[_]Feature{}),
324 };
325 result[@enumToInt(Feature.call_saved_x11)] = .{
326 .llvm_name = "call-saved-x11",
327 .description = "Make X11 callee saved.",
328 .dependencies = featureSet(&[_]Feature{}),
329 };
330 result[@enumToInt(Feature.call_saved_x12)] = .{
331 .llvm_name = "call-saved-x12",
332 .description = "Make X12 callee saved.",
333 .dependencies = featureSet(&[_]Feature{}),
334 };
335 result[@enumToInt(Feature.call_saved_x13)] = .{
336 .llvm_name = "call-saved-x13",
337 .description = "Make X13 callee saved.",
338 .dependencies = featureSet(&[_]Feature{}),
339 };
340 result[@enumToInt(Feature.call_saved_x14)] = .{
341 .llvm_name = "call-saved-x14",
342 .description = "Make X14 callee saved.",
343 .dependencies = featureSet(&[_]Feature{}),
344 };
345 result[@enumToInt(Feature.call_saved_x15)] = .{
346 .llvm_name = "call-saved-x15",
347 .description = "Make X15 callee saved.",
348 .dependencies = featureSet(&[_]Feature{}),
349 };
350 result[@enumToInt(Feature.call_saved_x18)] = .{
351 .llvm_name = "call-saved-x18",
352 .description = "Make X18 callee saved.",
353 .dependencies = featureSet(&[_]Feature{}),
354 };
355 result[@enumToInt(Feature.call_saved_x8)] = .{
356 .llvm_name = "call-saved-x8",
357 .description = "Make X8 callee saved.",
358 .dependencies = featureSet(&[_]Feature{}),
359 };
360 result[@enumToInt(Feature.call_saved_x9)] = .{
361 .llvm_name = "call-saved-x9",
362 .description = "Make X9 callee saved.",
363 .dependencies = featureSet(&[_]Feature{}),
364 };
365 result[@enumToInt(Feature.ccdp)] = .{
366 .llvm_name = "ccdp",
367 .description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
368 .dependencies = featureSet(&[_]Feature{}),
369 };
370 result[@enumToInt(Feature.ccidx)] = .{
371 .llvm_name = "ccidx",
372 .description = "Enable v8.3-A Extend of the CCSIDR number of sets",
373 .dependencies = featureSet(&[_]Feature{}),
374 };
375 result[@enumToInt(Feature.ccpp)] = .{
376 .llvm_name = "ccpp",
377 .description = "Enable v8.2 data Cache Clean to Point of Persistence",
378 .dependencies = featureSet(&[_]Feature{}),
379 };
380 result[@enumToInt(Feature.complxnum)] = .{
381 .llvm_name = "complxnum",
382 .description = "Enable v8.3-A Floating-point complex number support",
383 .dependencies = featureSet(&[_]Feature{
384 .neon,
385 }),
386 };
387 result[@enumToInt(Feature.crc)] = .{
388 .llvm_name = "crc",
389 .description = "Enable ARMv8 CRC-32 checksum instructions",
390 .dependencies = featureSet(&[_]Feature{}),
391 };
392 result[@enumToInt(Feature.crypto)] = .{
393 .llvm_name = "crypto",
394 .description = "Enable cryptographic instructions",
395 .dependencies = featureSet(&[_]Feature{
396 .aes,
397 .neon,
398 .sha2,
399 }),
400 };
401 result[@enumToInt(Feature.custom_cheap_as_move)] = .{
402 .llvm_name = "custom-cheap-as-move",
403 .description = "Use custom handling of cheap instructions",
404 .dependencies = featureSet(&[_]Feature{}),
405 };
406 result[@enumToInt(Feature.cyclone)] = .{
407 .llvm_name = "cyclone",
408 .description = "Cyclone",
409 .dependencies = featureSet(&[_]Feature{
410 .alternate_sextload_cvt_f32_pattern,
411 .arith_bcc_fusion,
412 .arith_cbz_fusion,
413 .crypto,
414 .disable_latency_sched_heuristic,
415 .fp_armv8,
416 .fuse_aes,
417 .fuse_crypto_eor,
418 .neon,
419 .perfmon,
420 .zcm,
421 .zcz,
422 .zcz_fp_workaround,
423 }),
424 };
425 result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{
426 .llvm_name = "disable-latency-sched-heuristic",
427 .description = "Disable latency scheduling heuristic",
428 .dependencies = featureSet(&[_]Feature{}),
429 };
430 result[@enumToInt(Feature.dit)] = .{
431 .llvm_name = "dit",
432 .description = "Enable v8.4-A Data Independent Timing instructions",
433 .dependencies = featureSet(&[_]Feature{}),
434 };
435 result[@enumToInt(Feature.dotprod)] = .{
436 .llvm_name = "dotprod",
437 .description = "Enable dot product support",
438 .dependencies = featureSet(&[_]Feature{}),
439 };
440 result[@enumToInt(Feature.exynos_cheap_as_move)] = .{
441 .llvm_name = "exynos-cheap-as-move",
442 .description = "Use Exynos specific handling of cheap instructions",
443 .dependencies = featureSet(&[_]Feature{
444 .custom_cheap_as_move,
445 }),
446 };
447 result[@enumToInt(Feature.exynosm1)] = .{
448 .llvm_name = "exynosm1",
449 .description = "Samsung Exynos-M1 processors",
450 .dependencies = featureSet(&[_]Feature{
451 .crc,
452 .crypto,
453 .exynos_cheap_as_move,
454 .force_32bit_jump_tables,
455 .fuse_aes,
456 .perfmon,
457 .slow_misaligned_128store,
458 .slow_paired_128,
459 .use_postra_scheduler,
460 .use_reciprocal_square_root,
461 .zcz_fp,
462 }),
463 };
464 result[@enumToInt(Feature.exynosm2)] = .{
465 .llvm_name = "exynosm2",
466 .description = "Samsung Exynos-M2 processors",
467 .dependencies = featureSet(&[_]Feature{
468 .crc,
469 .crypto,
470 .exynos_cheap_as_move,
471 .force_32bit_jump_tables,
472 .fuse_aes,
473 .perfmon,
474 .slow_misaligned_128store,
475 .slow_paired_128,
476 .use_postra_scheduler,
477 .zcz_fp,
478 }),
479 };
480 result[@enumToInt(Feature.exynosm3)] = .{
481 .llvm_name = "exynosm3",
482 .description = "Samsung Exynos-M3 processors",
483 .dependencies = featureSet(&[_]Feature{
484 .crc,
485 .crypto,
486 .exynos_cheap_as_move,
487 .force_32bit_jump_tables,
488 .fuse_address,
489 .fuse_aes,
490 .fuse_csel,
491 .fuse_literals,
492 .lsl_fast,
493 .perfmon,
494 .predictable_select_expensive,
495 .use_postra_scheduler,
496 .zcz_fp,
497 }),
498 };
499 result[@enumToInt(Feature.exynosm4)] = .{
500 .llvm_name = "exynosm4",
501 .description = "Samsung Exynos-M4 processors",
502 .dependencies = featureSet(&[_]Feature{
503 .arith_bcc_fusion,
504 .arith_cbz_fusion,
505 .crypto,
506 .dotprod,
507 .exynos_cheap_as_move,
508 .force_32bit_jump_tables,
509 .fullfp16,
510 .fuse_address,
511 .fuse_aes,
512 .fuse_arith_logic,
513 .fuse_csel,
514 .fuse_literals,
515 .lsl_fast,
516 .perfmon,
517 .use_postra_scheduler,
518 .v8_2a,
519 .zcz,
520 }),
521 };
522 result[@enumToInt(Feature.falkor)] = .{
523 .llvm_name = "falkor",
524 .description = "Qualcomm Falkor processors",
525 .dependencies = featureSet(&[_]Feature{
526 .crc,
527 .crypto,
528 .custom_cheap_as_move,
529 .fp_armv8,
530 .lsl_fast,
531 .neon,
532 .perfmon,
533 .predictable_select_expensive,
534 .rdm,
535 .slow_strqro_store,
536 .use_postra_scheduler,
537 .zcz,
538 }),
539 };
540 result[@enumToInt(Feature.fmi)] = .{
541 .llvm_name = "fmi",
542 .description = "Enable v8.4-A Flag Manipulation Instructions",
543 .dependencies = featureSet(&[_]Feature{}),
544 };
545 result[@enumToInt(Feature.force_32bit_jump_tables)] = .{
546 .llvm_name = "force-32bit-jump-tables",
547 .description = "Force jump table entries to be 32-bits wide except at MinSize",
548 .dependencies = featureSet(&[_]Feature{}),
549 };
550 result[@enumToInt(Feature.fp_armv8)] = .{
551 .llvm_name = "fp-armv8",
552 .description = "Enable ARMv8 FP",
553 .dependencies = featureSet(&[_]Feature{}),
554 };
555 result[@enumToInt(Feature.fp16fml)] = .{
556 .llvm_name = "fp16fml",
557 .description = "Enable FP16 FML instructions",
558 .dependencies = featureSet(&[_]Feature{
559 .fullfp16,
560 }),
561 };
562 result[@enumToInt(Feature.fptoint)] = .{
563 .llvm_name = "fptoint",
564 .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
565 .dependencies = featureSet(&[_]Feature{}),
566 };
567 result[@enumToInt(Feature.fullfp16)] = .{
568 .llvm_name = "fullfp16",
569 .description = "Full FP16",
570 .dependencies = featureSet(&[_]Feature{
571 .fp_armv8,
572 }),
573 };
574 result[@enumToInt(Feature.fuse_address)] = .{
575 .llvm_name = "fuse-address",
576 .description = "CPU fuses address generation and memory operations",
577 .dependencies = featureSet(&[_]Feature{}),
578 };
579 result[@enumToInt(Feature.fuse_aes)] = .{
580 .llvm_name = "fuse-aes",
581 .description = "CPU fuses AES crypto operations",
582 .dependencies = featureSet(&[_]Feature{}),
583 };
584 result[@enumToInt(Feature.fuse_arith_logic)] = .{
585 .llvm_name = "fuse-arith-logic",
586 .description = "CPU fuses arithmetic and logic operations",
587 .dependencies = featureSet(&[_]Feature{}),
588 };
589 result[@enumToInt(Feature.fuse_crypto_eor)] = .{
590 .llvm_name = "fuse-crypto-eor",
591 .description = "CPU fuses AES/PMULL and EOR operations",
592 .dependencies = featureSet(&[_]Feature{}),
593 };
594 result[@enumToInt(Feature.fuse_csel)] = .{
595 .llvm_name = "fuse-csel",
596 .description = "CPU fuses conditional select operations",
597 .dependencies = featureSet(&[_]Feature{}),
598 };
599 result[@enumToInt(Feature.fuse_literals)] = .{
600 .llvm_name = "fuse-literals",
601 .description = "CPU fuses literal generation operations",
602 .dependencies = featureSet(&[_]Feature{}),
603 };
604 result[@enumToInt(Feature.jsconv)] = .{
605 .llvm_name = "jsconv",
606 .description = "Enable v8.3-A JavaScript FP conversion enchancement",
607 .dependencies = featureSet(&[_]Feature{
608 .fp_armv8,
609 }),
610 };
611 result[@enumToInt(Feature.kryo)] = .{
612 .llvm_name = "kryo",
613 .description = "Qualcomm Kryo processors",
614 .dependencies = featureSet(&[_]Feature{
615 .crc,
616 .crypto,
617 .custom_cheap_as_move,
618 .fp_armv8,
619 .lsl_fast,
620 .neon,
621 .perfmon,
622 .predictable_select_expensive,
623 .use_postra_scheduler,
624 .zcz,
625 }),
626 };
627 result[@enumToInt(Feature.lor)] = .{
628 .llvm_name = "lor",
629 .description = "Enables ARM v8.1 Limited Ordering Regions extension",
630 .dependencies = featureSet(&[_]Feature{}),
631 };
632 result[@enumToInt(Feature.lse)] = .{
633 .llvm_name = "lse",
634 .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",
635 .dependencies = featureSet(&[_]Feature{}),
636 };
637 result[@enumToInt(Feature.lsl_fast)] = .{
638 .llvm_name = "lsl-fast",
639 .description = "CPU has a fastpath logical shift of up to 3 places",
640 .dependencies = featureSet(&[_]Feature{}),
641 };
642 result[@enumToInt(Feature.mpam)] = .{
643 .llvm_name = "mpam",
644 .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension",
645 .dependencies = featureSet(&[_]Feature{}),
646 };
647 result[@enumToInt(Feature.mte)] = .{
648 .llvm_name = "mte",
649 .description = "Enable Memory Tagging Extension",
650 .dependencies = featureSet(&[_]Feature{}),
651 };
652 result[@enumToInt(Feature.neon)] = .{
653 .llvm_name = "neon",
654 .description = "Enable Advanced SIMD instructions",
655 .dependencies = featureSet(&[_]Feature{
656 .fp_armv8,
657 }),
658 };
659 result[@enumToInt(Feature.no_neg_immediates)] = .{
660 .llvm_name = "no-neg-immediates",
661 .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
662 .dependencies = featureSet(&[_]Feature{}),
663 };
664 result[@enumToInt(Feature.nv)] = .{
665 .llvm_name = "nv",
666 .description = "Enable v8.4-A Nested Virtualization Enchancement",
667 .dependencies = featureSet(&[_]Feature{}),
668 };
669 result[@enumToInt(Feature.pa)] = .{
670 .llvm_name = "pa",
671 .description = "Enable v8.3-A Pointer Authentication enchancement",
672 .dependencies = featureSet(&[_]Feature{}),
673 };
674 result[@enumToInt(Feature.pan)] = .{
675 .llvm_name = "pan",
676 .description = "Enables ARM v8.1 Privileged Access-Never extension",
677 .dependencies = featureSet(&[_]Feature{}),
678 };
679 result[@enumToInt(Feature.pan_rwv)] = .{
680 .llvm_name = "pan-rwv",
681 .description = "Enable v8.2 PAN s1e1R and s1e1W Variants",
682 .dependencies = featureSet(&[_]Feature{
683 .pan,
684 }),
685 };
686 result[@enumToInt(Feature.perfmon)] = .{
687 .llvm_name = "perfmon",
688 .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
689 .dependencies = featureSet(&[_]Feature{}),
690 };
691 result[@enumToInt(Feature.predictable_select_expensive)] = .{
692 .llvm_name = "predictable-select-expensive",
693 .description = "Prefer likely predicted branches over selects",
694 .dependencies = featureSet(&[_]Feature{}),
695 };
696 result[@enumToInt(Feature.predres)] = .{
697 .llvm_name = "predres",
698 .description = "Enable v8.5a execution and data prediction invalidation instructions",
699 .dependencies = featureSet(&[_]Feature{}),
700 };
701 result[@enumToInt(Feature.rand)] = .{
702 .llvm_name = "rand",
703 .description = "Enable Random Number generation instructions",
704 .dependencies = featureSet(&[_]Feature{}),
705 };
706 result[@enumToInt(Feature.ras)] = .{
707 .llvm_name = "ras",
708 .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",
709 .dependencies = featureSet(&[_]Feature{}),
710 };
711 result[@enumToInt(Feature.rasv8_4)] = .{
712 .llvm_name = "rasv8_4",
713 .description = "Enable v8.4-A Reliability, Availability and Serviceability extension",
714 .dependencies = featureSet(&[_]Feature{
715 .ras,
716 }),
717 };
718 result[@enumToInt(Feature.rcpc)] = .{
719 .llvm_name = "rcpc",
720 .description = "Enable support for RCPC extension",
721 .dependencies = featureSet(&[_]Feature{}),
722 };
723 result[@enumToInt(Feature.rcpc_immo)] = .{
724 .llvm_name = "rcpc-immo",
725 .description = "Enable v8.4-A RCPC instructions with Immediate Offsets",
726 .dependencies = featureSet(&[_]Feature{
727 .rcpc,
728 }),
729 };
730 result[@enumToInt(Feature.rdm)] = .{
731 .llvm_name = "rdm",
732 .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions",
733 .dependencies = featureSet(&[_]Feature{}),
734 };
735 result[@enumToInt(Feature.reserve_x1)] = .{
736 .llvm_name = "reserve-x1",
737 .description = "Reserve X1, making it unavailable as a GPR",
738 .dependencies = featureSet(&[_]Feature{}),
739 };
740 result[@enumToInt(Feature.reserve_x10)] = .{
741 .llvm_name = "reserve-x10",
742 .description = "Reserve X10, making it unavailable as a GPR",
743 .dependencies = featureSet(&[_]Feature{}),
744 };
745 result[@enumToInt(Feature.reserve_x11)] = .{
746 .llvm_name = "reserve-x11",
747 .description = "Reserve X11, making it unavailable as a GPR",
748 .dependencies = featureSet(&[_]Feature{}),
749 };
750 result[@enumToInt(Feature.reserve_x12)] = .{
751 .llvm_name = "reserve-x12",
752 .description = "Reserve X12, making it unavailable as a GPR",
753 .dependencies = featureSet(&[_]Feature{}),
754 };
755 result[@enumToInt(Feature.reserve_x13)] = .{
756 .llvm_name = "reserve-x13",
757 .description = "Reserve X13, making it unavailable as a GPR",
758 .dependencies = featureSet(&[_]Feature{}),
759 };
760 result[@enumToInt(Feature.reserve_x14)] = .{
761 .llvm_name = "reserve-x14",
762 .description = "Reserve X14, making it unavailable as a GPR",
763 .dependencies = featureSet(&[_]Feature{}),
764 };
765 result[@enumToInt(Feature.reserve_x15)] = .{
766 .llvm_name = "reserve-x15",
767 .description = "Reserve X15, making it unavailable as a GPR",
768 .dependencies = featureSet(&[_]Feature{}),
769 };
770 result[@enumToInt(Feature.reserve_x18)] = .{
771 .llvm_name = "reserve-x18",
772 .description = "Reserve X18, making it unavailable as a GPR",
773 .dependencies = featureSet(&[_]Feature{}),
774 };
775 result[@enumToInt(Feature.reserve_x2)] = .{
776 .llvm_name = "reserve-x2",
777 .description = "Reserve X2, making it unavailable as a GPR",
778 .dependencies = featureSet(&[_]Feature{}),
779 };
780 result[@enumToInt(Feature.reserve_x20)] = .{
781 .llvm_name = "reserve-x20",
782 .description = "Reserve X20, making it unavailable as a GPR",
783 .dependencies = featureSet(&[_]Feature{}),
784 };
785 result[@enumToInt(Feature.reserve_x21)] = .{
786 .llvm_name = "reserve-x21",
787 .description = "Reserve X21, making it unavailable as a GPR",
788 .dependencies = featureSet(&[_]Feature{}),
789 };
790 result[@enumToInt(Feature.reserve_x22)] = .{
791 .llvm_name = "reserve-x22",
792 .description = "Reserve X22, making it unavailable as a GPR",
793 .dependencies = featureSet(&[_]Feature{}),
794 };
795 result[@enumToInt(Feature.reserve_x23)] = .{
796 .llvm_name = "reserve-x23",
797 .description = "Reserve X23, making it unavailable as a GPR",
798 .dependencies = featureSet(&[_]Feature{}),
799 };
800 result[@enumToInt(Feature.reserve_x24)] = .{
801 .llvm_name = "reserve-x24",
802 .description = "Reserve X24, making it unavailable as a GPR",
803 .dependencies = featureSet(&[_]Feature{}),
804 };
805 result[@enumToInt(Feature.reserve_x25)] = .{
806 .llvm_name = "reserve-x25",
807 .description = "Reserve X25, making it unavailable as a GPR",
808 .dependencies = featureSet(&[_]Feature{}),
809 };
810 result[@enumToInt(Feature.reserve_x26)] = .{
811 .llvm_name = "reserve-x26",
812 .description = "Reserve X26, making it unavailable as a GPR",
813 .dependencies = featureSet(&[_]Feature{}),
814 };
815 result[@enumToInt(Feature.reserve_x27)] = .{
816 .llvm_name = "reserve-x27",
817 .description = "Reserve X27, making it unavailable as a GPR",
818 .dependencies = featureSet(&[_]Feature{}),
819 };
820 result[@enumToInt(Feature.reserve_x28)] = .{
821 .llvm_name = "reserve-x28",
822 .description = "Reserve X28, making it unavailable as a GPR",
823 .dependencies = featureSet(&[_]Feature{}),
824 };
825 result[@enumToInt(Feature.reserve_x3)] = .{
826 .llvm_name = "reserve-x3",
827 .description = "Reserve X3, making it unavailable as a GPR",
828 .dependencies = featureSet(&[_]Feature{}),
829 };
830 result[@enumToInt(Feature.reserve_x4)] = .{
831 .llvm_name = "reserve-x4",
832 .description = "Reserve X4, making it unavailable as a GPR",
833 .dependencies = featureSet(&[_]Feature{}),
834 };
835 result[@enumToInt(Feature.reserve_x5)] = .{
836 .llvm_name = "reserve-x5",
837 .description = "Reserve X5, making it unavailable as a GPR",
838 .dependencies = featureSet(&[_]Feature{}),
839 };
840 result[@enumToInt(Feature.reserve_x6)] = .{
841 .llvm_name = "reserve-x6",
842 .description = "Reserve X6, making it unavailable as a GPR",
843 .dependencies = featureSet(&[_]Feature{}),
844 };
845 result[@enumToInt(Feature.reserve_x7)] = .{
846 .llvm_name = "reserve-x7",
847 .description = "Reserve X7, making it unavailable as a GPR",
848 .dependencies = featureSet(&[_]Feature{}),
849 };
850 result[@enumToInt(Feature.reserve_x9)] = .{
851 .llvm_name = "reserve-x9",
852 .description = "Reserve X9, making it unavailable as a GPR",
853 .dependencies = featureSet(&[_]Feature{}),
854 };
855 result[@enumToInt(Feature.saphira)] = .{
856 .llvm_name = "saphira",
857 .description = "Qualcomm Saphira processors",
858 .dependencies = featureSet(&[_]Feature{
859 .crypto,
860 .custom_cheap_as_move,
861 .fp_armv8,
862 .lsl_fast,
863 .neon,
864 .perfmon,
865 .predictable_select_expensive,
866 .spe,
867 .use_postra_scheduler,
868 .v8_4a,
869 .zcz,
870 }),
871 };
872 result[@enumToInt(Feature.sb)] = .{
873 .llvm_name = "sb",
874 .description = "Enable v8.5 Speculation Barrier",
875 .dependencies = featureSet(&[_]Feature{}),
876 };
877 result[@enumToInt(Feature.sel2)] = .{
878 .llvm_name = "sel2",
879 .description = "Enable v8.4-A Secure Exception Level 2 extension",
880 .dependencies = featureSet(&[_]Feature{}),
881 };
882 result[@enumToInt(Feature.sha2)] = .{
883 .llvm_name = "sha2",
884 .description = "Enable SHA1 and SHA256 support",
885 .dependencies = featureSet(&[_]Feature{
886 .neon,
887 }),
888 };
889 result[@enumToInt(Feature.sha3)] = .{
890 .llvm_name = "sha3",
891 .description = "Enable SHA512 and SHA3 support",
892 .dependencies = featureSet(&[_]Feature{
893 .neon,
894 .sha2,
895 }),
896 };
897 result[@enumToInt(Feature.slow_misaligned_128store)] = .{
898 .llvm_name = "slow-misaligned-128store",
899 .description = "Misaligned 128 bit stores are slow",
900 .dependencies = featureSet(&[_]Feature{}),
901 };
902 result[@enumToInt(Feature.slow_paired_128)] = .{
903 .llvm_name = "slow-paired-128",
904 .description = "Paired 128 bit loads and stores are slow",
905 .dependencies = featureSet(&[_]Feature{}),
906 };
907 result[@enumToInt(Feature.slow_strqro_store)] = .{
908 .llvm_name = "slow-strqro-store",
909 .description = "STR of Q register with register offset is slow",
910 .dependencies = featureSet(&[_]Feature{}),
911 };
912 result[@enumToInt(Feature.sm4)] = .{
913 .llvm_name = "sm4",
914 .description = "Enable SM3 and SM4 support",
915 .dependencies = featureSet(&[_]Feature{
916 .neon,
917 }),
918 };
919 result[@enumToInt(Feature.spe)] = .{
920 .llvm_name = "spe",
921 .description = "Enable Statistical Profiling extension",
922 .dependencies = featureSet(&[_]Feature{}),
923 };
924 result[@enumToInt(Feature.specrestrict)] = .{
925 .llvm_name = "specrestrict",
926 .description = "Enable architectural speculation restriction",
927 .dependencies = featureSet(&[_]Feature{}),
928 };
929 result[@enumToInt(Feature.ssbs)] = .{
930 .llvm_name = "ssbs",
931 .description = "Enable Speculative Store Bypass Safe bit",
932 .dependencies = featureSet(&[_]Feature{}),
933 };
934 result[@enumToInt(Feature.strict_align)] = .{
935 .llvm_name = "strict-align",
936 .description = "Disallow all unaligned memory access",
937 .dependencies = featureSet(&[_]Feature{}),
938 };
939 result[@enumToInt(Feature.sve)] = .{
940 .llvm_name = "sve",
941 .description = "Enable Scalable Vector Extension (SVE) instructions",
942 .dependencies = featureSet(&[_]Feature{}),
943 };
944 result[@enumToInt(Feature.sve2)] = .{
945 .llvm_name = "sve2",
946 .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
947 .dependencies = featureSet(&[_]Feature{
948 .sve,
949 }),
950 };
951 result[@enumToInt(Feature.sve2_aes)] = .{
952 .llvm_name = "sve2-aes",
953 .description = "Enable AES SVE2 instructions",
954 .dependencies = featureSet(&[_]Feature{
955 .aes,
956 .sve2,
957 }),
958 };
959 result[@enumToInt(Feature.sve2_bitperm)] = .{
960 .llvm_name = "sve2-bitperm",
961 .description = "Enable bit permutation SVE2 instructions",
962 .dependencies = featureSet(&[_]Feature{
963 .sve2,
964 }),
965 };
966 result[@enumToInt(Feature.sve2_sha3)] = .{
967 .llvm_name = "sve2-sha3",
968 .description = "Enable SHA3 SVE2 instructions",
969 .dependencies = featureSet(&[_]Feature{
970 .sha3,
971 .sve2,
972 }),
973 };
974 result[@enumToInt(Feature.sve2_sm4)] = .{
975 .llvm_name = "sve2-sm4",
976 .description = "Enable SM4 SVE2 instructions",
977 .dependencies = featureSet(&[_]Feature{
978 .sm4,
979 .sve2,
980 }),
981 };
982 result[@enumToInt(Feature.thunderx)] = .{
983 .llvm_name = "thunderx",
984 .description = "Cavium ThunderX processors",
985 .dependencies = featureSet(&[_]Feature{
986 .crc,
987 .crypto,
988 .fp_armv8,
989 .neon,
990 .perfmon,
991 .predictable_select_expensive,
992 .use_postra_scheduler,
993 }),
994 };
995 result[@enumToInt(Feature.thunderx2t99)] = .{
996 .llvm_name = "thunderx2t99",
997 .description = "Cavium ThunderX2 processors",
998 .dependencies = featureSet(&[_]Feature{
999 .aggressive_fma,
1000 .arith_bcc_fusion,
1001 .crc,
1002 .crypto,
1003 .fp_armv8,
1004 .lse,
1005 .neon,
1006 .predictable_select_expensive,
1007 .use_postra_scheduler,
1008 .v8_1a,
1009 }),
1010 };
1011 result[@enumToInt(Feature.thunderxt81)] = .{
1012 .llvm_name = "thunderxt81",
1013 .description = "Cavium ThunderX processors",
1014 .dependencies = featureSet(&[_]Feature{
1015 .crc,
1016 .crypto,
1017 .fp_armv8,
1018 .neon,
1019 .perfmon,
1020 .predictable_select_expensive,
1021 .use_postra_scheduler,
1022 }),
1023 };
1024 result[@enumToInt(Feature.thunderxt83)] = .{
1025 .llvm_name = "thunderxt83",
1026 .description = "Cavium ThunderX processors",
1027 .dependencies = featureSet(&[_]Feature{
1028 .crc,
1029 .crypto,
1030 .fp_armv8,
1031 .neon,
1032 .perfmon,
1033 .predictable_select_expensive,
1034 .use_postra_scheduler,
1035 }),
1036 };
1037 result[@enumToInt(Feature.thunderxt88)] = .{
1038 .llvm_name = "thunderxt88",
1039 .description = "Cavium ThunderX processors",
1040 .dependencies = featureSet(&[_]Feature{
1041 .crc,
1042 .crypto,
1043 .fp_armv8,
1044 .neon,
1045 .perfmon,
1046 .predictable_select_expensive,
1047 .use_postra_scheduler,
1048 }),
1049 };
1050 result[@enumToInt(Feature.tlb_rmi)] = .{
1051 .llvm_name = "tlb-rmi",
1052 .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
1053 .dependencies = featureSet(&[_]Feature{}),
1054 };
1055 result[@enumToInt(Feature.tpidr_el1)] = .{
1056 .llvm_name = "tpidr-el1",
1057 .description = "Permit use of TPIDR_EL1 for the TLS base",
1058 .dependencies = featureSet(&[_]Feature{}),
1059 };
1060 result[@enumToInt(Feature.tpidr_el2)] = .{
1061 .llvm_name = "tpidr-el2",
1062 .description = "Permit use of TPIDR_EL2 for the TLS base",
1063 .dependencies = featureSet(&[_]Feature{}),
1064 };
1065 result[@enumToInt(Feature.tpidr_el3)] = .{
1066 .llvm_name = "tpidr-el3",
1067 .description = "Permit use of TPIDR_EL3 for the TLS base",
1068 .dependencies = featureSet(&[_]Feature{}),
1069 };
1070 result[@enumToInt(Feature.tracev8_4)] = .{
1071 .llvm_name = "tracev8.4",
1072 .description = "Enable v8.4-A Trace extension",
1073 .dependencies = featureSet(&[_]Feature{}),
1074 };
1075 result[@enumToInt(Feature.tsv110)] = .{
1076 .llvm_name = "tsv110",
1077 .description = "HiSilicon TS-V110 processors",
1078 .dependencies = featureSet(&[_]Feature{
1079 .crypto,
1080 .custom_cheap_as_move,
1081 .dotprod,
1082 .fp_armv8,
1083 .fp16fml,
1084 .fullfp16,
1085 .fuse_aes,
1086 .neon,
1087 .perfmon,
1088 .spe,
1089 .use_postra_scheduler,
1090 .v8_2a,
1091 }),
1092 };
1093 result[@enumToInt(Feature.uaops)] = .{
1094 .llvm_name = "uaops",
1095 .description = "Enable v8.2 UAO PState",
1096 .dependencies = featureSet(&[_]Feature{}),
1097 };
1098 result[@enumToInt(Feature.use_aa)] = .{
1099 .llvm_name = "use-aa",
1100 .description = "Use alias analysis during codegen",
1101 .dependencies = featureSet(&[_]Feature{}),
1102 };
1103 result[@enumToInt(Feature.use_postra_scheduler)] = .{
1104 .llvm_name = "use-postra-scheduler",
1105 .description = "Schedule again after register allocation",
1106 .dependencies = featureSet(&[_]Feature{}),
1107 };
1108 result[@enumToInt(Feature.use_reciprocal_square_root)] = .{
1109 .llvm_name = "use-reciprocal-square-root",
1110 .description = "Use the reciprocal square root approximation",
1111 .dependencies = featureSet(&[_]Feature{}),
1112 };
1113 result[@enumToInt(Feature.v8a)] = .{
1114 .llvm_name = null,
1115 .description = "Support ARM v8a instructions",
1116 .dependencies = featureSet(&[_]Feature{
1117 .fp_armv8,
1118 .neon,
1119 }),
1120 };
1121 result[@enumToInt(Feature.v8_1a)] = .{
1122 .llvm_name = "v8.1a",
1123 .description = "Support ARM v8.1a instructions",
1124 .dependencies = featureSet(&[_]Feature{
1125 .crc,
1126 .lor,
1127 .lse,
1128 .pan,
1129 .rdm,
1130 .vh,
1131 .v8a,
1132 }),
1133 };
1134 result[@enumToInt(Feature.v8_2a)] = .{
1135 .llvm_name = "v8.2a",
1136 .description = "Support ARM v8.2a instructions",
1137 .dependencies = featureSet(&[_]Feature{
1138 .ccpp,
1139 .pan_rwv,
1140 .ras,
1141 .uaops,
1142 .v8_1a,
1143 }),
1144 };
1145 result[@enumToInt(Feature.v8_3a)] = .{
1146 .llvm_name = "v8.3a",
1147 .description = "Support ARM v8.3a instructions",
1148 .dependencies = featureSet(&[_]Feature{
1149 .ccidx,
1150 .complxnum,
1151 .jsconv,
1152 .pa,
1153 .rcpc,
1154 .v8_2a,
1155 }),
1156 };
1157 result[@enumToInt(Feature.v8_4a)] = .{
1158 .llvm_name = "v8.4a",
1159 .description = "Support ARM v8.4a instructions",
1160 .dependencies = featureSet(&[_]Feature{
1161 .am,
1162 .dit,
1163 .dotprod,
1164 .fmi,
1165 .mpam,
1166 .nv,
1167 .rasv8_4,
1168 .rcpc_immo,
1169 .sel2,
1170 .tlb_rmi,
1171 .tracev8_4,
1172 .v8_3a,
1173 }),
1174 };
1175 result[@enumToInt(Feature.v8_5a)] = .{
1176 .llvm_name = "v8.5a",
1177 .description = "Support ARM v8.5a instructions",
1178 .dependencies = featureSet(&[_]Feature{
1179 .altnzcv,
1180 .bti,
1181 .ccdp,
1182 .fptoint,
1183 .predres,
1184 .sb,
1185 .specrestrict,
1186 .ssbs,
1187 .v8_4a,
1188 }),
1189 };
1190 result[@enumToInt(Feature.vh)] = .{
1191 .llvm_name = "vh",
1192 .description = "Enables ARM v8.1 Virtual Host extension",
1193 .dependencies = featureSet(&[_]Feature{}),
1194 };
1195 result[@enumToInt(Feature.zcm)] = .{
1196 .llvm_name = "zcm",
1197 .description = "Has zero-cycle register moves",
1198 .dependencies = featureSet(&[_]Feature{}),
1199 };
1200 result[@enumToInt(Feature.zcz)] = .{
1201 .llvm_name = "zcz",
1202 .description = "Has zero-cycle zeroing instructions",
1203 .dependencies = featureSet(&[_]Feature{
1204 .zcz_fp,
1205 .zcz_gp,
1206 }),
1207 };
1208 result[@enumToInt(Feature.zcz_fp)] = .{
1209 .llvm_name = "zcz-fp",
1210 .description = "Has zero-cycle zeroing instructions for FP registers",
1211 .dependencies = featureSet(&[_]Feature{}),
1212 };
1213 result[@enumToInt(Feature.zcz_fp_workaround)] = .{
1214 .llvm_name = "zcz-fp-workaround",
1215 .description = "The zero-cycle floating-point zeroing instruction has a bug",
1216 .dependencies = featureSet(&[_]Feature{}),
1217 };
1218 result[@enumToInt(Feature.zcz_gp)] = .{
1219 .llvm_name = "zcz-gp",
1220 .description = "Has zero-cycle zeroing instructions for generic registers",
1221 .dependencies = featureSet(&[_]Feature{}),
1222 };
1223 const ti = @typeInfo(Feature);
1224 for (result) |*elem, i| {
1225 elem.index = i;
1226 elem.name = ti.Enum.fields[i].name;
1227 }
1228 break :blk result;
1229};
1230
1231pub const cpu = struct {
1232 pub const apple_latest = Cpu{
1233 .name = "apple_latest",
1234 .llvm_name = "apple-latest",
1235 .features = featureSet(&[_]Feature{
1236 .cyclone,
1237 }),
1238 };
1239 pub const cortex_a35 = Cpu{
1240 .name = "cortex_a35",
1241 .llvm_name = "cortex-a35",
1242 .features = featureSet(&[_]Feature{
1243 .a35,
1244 }),
1245 };
1246 pub const cortex_a53 = Cpu{
1247 .name = "cortex_a53",
1248 .llvm_name = "cortex-a53",
1249 .features = featureSet(&[_]Feature{
1250 .a53,
1251 }),
1252 };
1253 pub const cortex_a55 = Cpu{
1254 .name = "cortex_a55",
1255 .llvm_name = "cortex-a55",
1256 .features = featureSet(&[_]Feature{
1257 .a55,
1258 }),
1259 };
1260 pub const cortex_a57 = Cpu{
1261 .name = "cortex_a57",
1262 .llvm_name = "cortex-a57",
1263 .features = featureSet(&[_]Feature{
1264 .a57,
1265 }),
1266 };
1267 pub const cortex_a72 = Cpu{
1268 .name = "cortex_a72",
1269 .llvm_name = "cortex-a72",
1270 .features = featureSet(&[_]Feature{
1271 .a72,
1272 }),
1273 };
1274 pub const cortex_a73 = Cpu{
1275 .name = "cortex_a73",
1276 .llvm_name = "cortex-a73",
1277 .features = featureSet(&[_]Feature{
1278 .a73,
1279 }),
1280 };
1281 pub const cortex_a75 = Cpu{
1282 .name = "cortex_a75",
1283 .llvm_name = "cortex-a75",
1284 .features = featureSet(&[_]Feature{
1285 .a75,
1286 }),
1287 };
1288 pub const cortex_a76 = Cpu{
1289 .name = "cortex_a76",
1290 .llvm_name = "cortex-a76",
1291 .features = featureSet(&[_]Feature{
1292 .a76,
1293 }),
1294 };
1295 pub const cortex_a76ae = Cpu{
1296 .name = "cortex_a76ae",
1297 .llvm_name = "cortex-a76ae",
1298 .features = featureSet(&[_]Feature{
1299 .a76,
1300 }),
1301 };
1302 pub const cyclone = Cpu{
1303 .name = "cyclone",
1304 .llvm_name = "cyclone",
1305 .features = featureSet(&[_]Feature{
1306 .cyclone,
1307 }),
1308 };
1309 pub const exynos_m1 = Cpu{
1310 .name = "exynos_m1",
1311 .llvm_name = "exynos-m1",
1312 .features = featureSet(&[_]Feature{
1313 .exynosm1,
1314 }),
1315 };
1316 pub const exynos_m2 = Cpu{
1317 .name = "exynos_m2",
1318 .llvm_name = "exynos-m2",
1319 .features = featureSet(&[_]Feature{
1320 .exynosm2,
1321 }),
1322 };
1323 pub const exynos_m3 = Cpu{
1324 .name = "exynos_m3",
1325 .llvm_name = "exynos-m3",
1326 .features = featureSet(&[_]Feature{
1327 .exynosm3,
1328 }),
1329 };
1330 pub const exynos_m4 = Cpu{
1331 .name = "exynos_m4",
1332 .llvm_name = "exynos-m4",
1333 .features = featureSet(&[_]Feature{
1334 .exynosm4,
1335 }),
1336 };
1337 pub const exynos_m5 = Cpu{
1338 .name = "exynos_m5",
1339 .llvm_name = "exynos-m5",
1340 .features = featureSet(&[_]Feature{
1341 .exynosm4,
1342 }),
1343 };
1344 pub const falkor = Cpu{
1345 .name = "falkor",
1346 .llvm_name = "falkor",
1347 .features = featureSet(&[_]Feature{
1348 .falkor,
1349 }),
1350 };
1351 pub const generic = Cpu{
1352 .name = "generic",
1353 .llvm_name = "generic",
1354 .features = featureSet(&[_]Feature{
1355 .fp_armv8,
1356 .fuse_aes,
1357 .neon,
1358 .perfmon,
1359 .use_postra_scheduler,
1360 }),
1361 };
1362 pub const kryo = Cpu{
1363 .name = "kryo",
1364 .llvm_name = "kryo",
1365 .features = featureSet(&[_]Feature{
1366 .kryo,
1367 }),
1368 };
1369 pub const saphira = Cpu{
1370 .name = "saphira",
1371 .llvm_name = "saphira",
1372 .features = featureSet(&[_]Feature{
1373 .saphira,
1374 }),
1375 };
1376 pub const thunderx = Cpu{
1377 .name = "thunderx",
1378 .llvm_name = "thunderx",
1379 .features = featureSet(&[_]Feature{
1380 .thunderx,
1381 }),
1382 };
1383 pub const thunderx2t99 = Cpu{
1384 .name = "thunderx2t99",
1385 .llvm_name = "thunderx2t99",
1386 .features = featureSet(&[_]Feature{
1387 .thunderx2t99,
1388 }),
1389 };
1390 pub const thunderxt81 = Cpu{
1391 .name = "thunderxt81",
1392 .llvm_name = "thunderxt81",
1393 .features = featureSet(&[_]Feature{
1394 .thunderxt81,
1395 }),
1396 };
1397 pub const thunderxt83 = Cpu{
1398 .name = "thunderxt83",
1399 .llvm_name = "thunderxt83",
1400 .features = featureSet(&[_]Feature{
1401 .thunderxt83,
1402 }),
1403 };
1404 pub const thunderxt88 = Cpu{
1405 .name = "thunderxt88",
1406 .llvm_name = "thunderxt88",
1407 .features = featureSet(&[_]Feature{
1408 .thunderxt88,
1409 }),
1410 };
1411 pub const tsv110 = Cpu{
1412 .name = "tsv110",
1413 .llvm_name = "tsv110",
1414 .features = featureSet(&[_]Feature{
1415 .tsv110,
1416 }),
1417 };
1418};
1419
1420/// All aarch64 CPUs, sorted alphabetically by name.
1421/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
1422/// compiler has inefficient memory and CPU usage, affecting build times.
1423pub const all_cpus = &[_]*const Cpu{
1424 &cpu.apple_latest,
1425 &cpu.cortex_a35,
1426 &cpu.cortex_a53,
1427 &cpu.cortex_a55,
1428 &cpu.cortex_a57,
1429 &cpu.cortex_a72,
1430 &cpu.cortex_a73,
1431 &cpu.cortex_a75,
1432 &cpu.cortex_a76,
1433 &cpu.cortex_a76ae,
1434 &cpu.cyclone,
1435 &cpu.exynos_m1,
1436 &cpu.exynos_m2,
1437 &cpu.exynos_m3,
1438 &cpu.exynos_m4,
1439 &cpu.exynos_m5,
1440 &cpu.falkor,
1441 &cpu.generic,
1442 &cpu.kryo,
1443 &cpu.saphira,
1444 &cpu.thunderx,
1445 &cpu.thunderx2t99,
1446 &cpu.thunderxt81,
1447 &cpu.thunderxt83,
1448 &cpu.thunderxt88,
1449 &cpu.tsv110,
1450};
lib/std/target/amdgpu.zig created+1315
...@@ -0,0 +1,1315 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 @"16_bit_insts",
6 DumpCode,
7 add_no_carry_insts,
8 aperture_regs,
9 atomic_fadd_insts,
10 auto_waitcnt_before_barrier,
11 ci_insts,
12 code_object_v3,
13 cumode,
14 dl_insts,
15 dot1_insts,
16 dot2_insts,
17 dot3_insts,
18 dot4_insts,
19 dot5_insts,
20 dot6_insts,
21 dpp,
22 dpp8,
23 dumpcode,
24 enable_ds128,
25 enable_prt_strict_null,
26 fast_fmaf,
27 flat_address_space,
28 flat_for_global,
29 flat_global_insts,
30 flat_inst_offsets,
31 flat_scratch_insts,
32 flat_segment_offset_bug,
33 fma_mix_insts,
34 fmaf,
35 fp_exceptions,
36 fp16_denormals,
37 fp32_denormals,
38 fp64,
39 fp64_denormals,
40 fp64_fp16_denormals,
41 gcn3_encoding,
42 gfx10,
43 gfx10_insts,
44 gfx7_gfx8_gfx9_insts,
45 gfx8_insts,
46 gfx9,
47 gfx9_insts,
48 half_rate_64_ops,
49 inst_fwd_prefetch_bug,
50 int_clamp_insts,
51 inv_2pi_inline_imm,
52 lds_branch_vmem_war_hazard,
53 lds_misaligned_bug,
54 ldsbankcount16,
55 ldsbankcount32,
56 load_store_opt,
57 localmemorysize0,
58 localmemorysize32768,
59 localmemorysize65536,
60 mad_mix_insts,
61 mai_insts,
62 max_private_element_size_16,
63 max_private_element_size_4,
64 max_private_element_size_8,
65 mimg_r128,
66 movrel,
67 no_data_dep_hazard,
68 no_sdst_cmpx,
69 no_sram_ecc_support,
70 no_xnack_support,
71 nsa_encoding,
72 nsa_to_vmem_bug,
73 offset_3f_bug,
74 pk_fmac_f16_inst,
75 promote_alloca,
76 r128_a16,
77 register_banking,
78 s_memrealtime,
79 scalar_atomics,
80 scalar_flat_scratch_insts,
81 scalar_stores,
82 sdwa,
83 sdwa_mav,
84 sdwa_omod,
85 sdwa_out_mods_vopc,
86 sdwa_scalar,
87 sdwa_sdst,
88 sea_islands,
89 sgpr_init_bug,
90 si_scheduler,
91 smem_to_vector_write_hazard,
92 southern_islands,
93 sram_ecc,
94 trap_handler,
95 trig_reduced_range,
96 unaligned_buffer_access,
97 unaligned_scratch_access,
98 unpacked_d16_vmem,
99 unsafe_ds_offset_folding,
100 vcmpx_exec_war_hazard,
101 vcmpx_permlane_hazard,
102 vgpr_index_mode,
103 vmem_to_scalar_write_hazard,
104 volcanic_islands,
105 vop3_literal,
106 vop3p,
107 vscnt,
108 wavefrontsize16,
109 wavefrontsize32,
110 wavefrontsize64,
111 xnack,
112};
113
114pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
115
116pub const all_features = blk: {
117 const len = @typeInfo(Feature).Enum.fields.len;
118 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
119 var result: [len]Cpu.Feature = undefined;
120 result[@enumToInt(Feature.@"16_bit_insts")] = .{
121 .llvm_name = "16-bit-insts",
122 .description = "Has i16/f16 instructions",
123 .dependencies = featureSet(&[_]Feature{}),
124 };
125 result[@enumToInt(Feature.DumpCode)] = .{
126 .llvm_name = "DumpCode",
127 .description = "Dump MachineInstrs in the CodeEmitter",
128 .dependencies = featureSet(&[_]Feature{}),
129 };
130 result[@enumToInt(Feature.add_no_carry_insts)] = .{
131 .llvm_name = "add-no-carry-insts",
132 .description = "Have VALU add/sub instructions without carry out",
133 .dependencies = featureSet(&[_]Feature{}),
134 };
135 result[@enumToInt(Feature.aperture_regs)] = .{
136 .llvm_name = "aperture-regs",
137 .description = "Has Memory Aperture Base and Size Registers",
138 .dependencies = featureSet(&[_]Feature{}),
139 };
140 result[@enumToInt(Feature.atomic_fadd_insts)] = .{
141 .llvm_name = "atomic-fadd-insts",
142 .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
143 .dependencies = featureSet(&[_]Feature{}),
144 };
145 result[@enumToInt(Feature.auto_waitcnt_before_barrier)] = .{
146 .llvm_name = "auto-waitcnt-before-barrier",
147 .description = "Hardware automatically inserts waitcnt before barrier",
148 .dependencies = featureSet(&[_]Feature{}),
149 };
150 result[@enumToInt(Feature.ci_insts)] = .{
151 .llvm_name = "ci-insts",
152 .description = "Additional instructions for CI+",
153 .dependencies = featureSet(&[_]Feature{}),
154 };
155 result[@enumToInt(Feature.code_object_v3)] = .{
156 .llvm_name = "code-object-v3",
157 .description = "Generate code object version 3",
158 .dependencies = featureSet(&[_]Feature{}),
159 };
160 result[@enumToInt(Feature.cumode)] = .{
161 .llvm_name = "cumode",
162 .description = "Enable CU wavefront execution mode",
163 .dependencies = featureSet(&[_]Feature{}),
164 };
165 result[@enumToInt(Feature.dl_insts)] = .{
166 .llvm_name = "dl-insts",
167 .description = "Has v_fmac_f32 and v_xnor_b32 instructions",
168 .dependencies = featureSet(&[_]Feature{}),
169 };
170 result[@enumToInt(Feature.dot1_insts)] = .{
171 .llvm_name = "dot1-insts",
172 .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
173 .dependencies = featureSet(&[_]Feature{}),
174 };
175 result[@enumToInt(Feature.dot2_insts)] = .{
176 .llvm_name = "dot2-insts",
177 .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
178 .dependencies = featureSet(&[_]Feature{}),
179 };
180 result[@enumToInt(Feature.dot3_insts)] = .{
181 .llvm_name = "dot3-insts",
182 .description = "Has v_dot8c_i32_i4 instruction",
183 .dependencies = featureSet(&[_]Feature{}),
184 };
185 result[@enumToInt(Feature.dot4_insts)] = .{
186 .llvm_name = "dot4-insts",
187 .description = "Has v_dot2c_i32_i16 instruction",
188 .dependencies = featureSet(&[_]Feature{}),
189 };
190 result[@enumToInt(Feature.dot5_insts)] = .{
191 .llvm_name = "dot5-insts",
192 .description = "Has v_dot2c_f32_f16 instruction",
193 .dependencies = featureSet(&[_]Feature{}),
194 };
195 result[@enumToInt(Feature.dot6_insts)] = .{
196 .llvm_name = "dot6-insts",
197 .description = "Has v_dot4c_i32_i8 instruction",
198 .dependencies = featureSet(&[_]Feature{}),
199 };
200 result[@enumToInt(Feature.dpp)] = .{
201 .llvm_name = "dpp",
202 .description = "Support DPP (Data Parallel Primitives) extension",
203 .dependencies = featureSet(&[_]Feature{}),
204 };
205 result[@enumToInt(Feature.dpp8)] = .{
206 .llvm_name = "dpp8",
207 .description = "Support DPP8 (Data Parallel Primitives) extension",
208 .dependencies = featureSet(&[_]Feature{}),
209 };
210 result[@enumToInt(Feature.dumpcode)] = .{
211 .llvm_name = "dumpcode",
212 .description = "Dump MachineInstrs in the CodeEmitter",
213 .dependencies = featureSet(&[_]Feature{}),
214 };
215 result[@enumToInt(Feature.enable_ds128)] = .{
216 .llvm_name = "enable-ds128",
217 .description = "Use ds_read|write_b128",
218 .dependencies = featureSet(&[_]Feature{}),
219 };
220 result[@enumToInt(Feature.enable_prt_strict_null)] = .{
221 .llvm_name = "enable-prt-strict-null",
222 .description = "Enable zeroing of result registers for sparse texture fetches",
223 .dependencies = featureSet(&[_]Feature{}),
224 };
225 result[@enumToInt(Feature.fast_fmaf)] = .{
226 .llvm_name = "fast-fmaf",
227 .description = "Assuming f32 fma is at least as fast as mul + add",
228 .dependencies = featureSet(&[_]Feature{}),
229 };
230 result[@enumToInt(Feature.flat_address_space)] = .{
231 .llvm_name = "flat-address-space",
232 .description = "Support flat address space",
233 .dependencies = featureSet(&[_]Feature{}),
234 };
235 result[@enumToInt(Feature.flat_for_global)] = .{
236 .llvm_name = "flat-for-global",
237 .description = "Force to generate flat instruction for global",
238 .dependencies = featureSet(&[_]Feature{}),
239 };
240 result[@enumToInt(Feature.flat_global_insts)] = .{
241 .llvm_name = "flat-global-insts",
242 .description = "Have global_* flat memory instructions",
243 .dependencies = featureSet(&[_]Feature{}),
244 };
245 result[@enumToInt(Feature.flat_inst_offsets)] = .{
246 .llvm_name = "flat-inst-offsets",
247 .description = "Flat instructions have immediate offset addressing mode",
248 .dependencies = featureSet(&[_]Feature{}),
249 };
250 result[@enumToInt(Feature.flat_scratch_insts)] = .{
251 .llvm_name = "flat-scratch-insts",
252 .description = "Have scratch_* flat memory instructions",
253 .dependencies = featureSet(&[_]Feature{}),
254 };
255 result[@enumToInt(Feature.flat_segment_offset_bug)] = .{
256 .llvm_name = "flat-segment-offset-bug",
257 .description = "GFX10 bug, inst_offset ignored in flat segment",
258 .dependencies = featureSet(&[_]Feature{}),
259 };
260 result[@enumToInt(Feature.fma_mix_insts)] = .{
261 .llvm_name = "fma-mix-insts",
262 .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",
263 .dependencies = featureSet(&[_]Feature{}),
264 };
265 result[@enumToInt(Feature.fmaf)] = .{
266 .llvm_name = "fmaf",
267 .description = "Enable single precision FMA (not as fast as mul+add, but fused)",
268 .dependencies = featureSet(&[_]Feature{}),
269 };
270 result[@enumToInt(Feature.fp_exceptions)] = .{
271 .llvm_name = "fp-exceptions",
272 .description = "Enable floating point exceptions",
273 .dependencies = featureSet(&[_]Feature{}),
274 };
275 result[@enumToInt(Feature.fp16_denormals)] = .{
276 .llvm_name = "fp16-denormals",
277 .description = "Enable half precision denormal handling",
278 .dependencies = featureSet(&[_]Feature{
279 .fp64_fp16_denormals,
280 }),
281 };
282 result[@enumToInt(Feature.fp32_denormals)] = .{
283 .llvm_name = "fp32-denormals",
284 .description = "Enable single precision denormal handling",
285 .dependencies = featureSet(&[_]Feature{}),
286 };
287 result[@enumToInt(Feature.fp64)] = .{
288 .llvm_name = "fp64",
289 .description = "Enable double precision operations",
290 .dependencies = featureSet(&[_]Feature{}),
291 };
292 result[@enumToInt(Feature.fp64_denormals)] = .{
293 .llvm_name = "fp64-denormals",
294 .description = "Enable double and half precision denormal handling",
295 .dependencies = featureSet(&[_]Feature{
296 .fp64,
297 .fp64_fp16_denormals,
298 }),
299 };
300 result[@enumToInt(Feature.fp64_fp16_denormals)] = .{
301 .llvm_name = "fp64-fp16-denormals",
302 .description = "Enable double and half precision denormal handling",
303 .dependencies = featureSet(&[_]Feature{
304 .fp64,
305 }),
306 };
307 result[@enumToInt(Feature.gcn3_encoding)] = .{
308 .llvm_name = "gcn3-encoding",
309 .description = "Encoding format for VI",
310 .dependencies = featureSet(&[_]Feature{}),
311 };
312 result[@enumToInt(Feature.gfx10)] = .{
313 .llvm_name = "gfx10",
314 .description = "GFX10 GPU generation",
315 .dependencies = featureSet(&[_]Feature{
316 .@"16_bit_insts",
317 .add_no_carry_insts,
318 .aperture_regs,
319 .ci_insts,
320 .dpp,
321 .dpp8,
322 .fast_fmaf,
323 .flat_address_space,
324 .flat_global_insts,
325 .flat_inst_offsets,
326 .flat_scratch_insts,
327 .fma_mix_insts,
328 .fp64,
329 .gfx10_insts,
330 .gfx8_insts,
331 .gfx9_insts,
332 .int_clamp_insts,
333 .inv_2pi_inline_imm,
334 .localmemorysize65536,
335 .mimg_r128,
336 .movrel,
337 .no_data_dep_hazard,
338 .no_sdst_cmpx,
339 .no_sram_ecc_support,
340 .pk_fmac_f16_inst,
341 .register_banking,
342 .s_memrealtime,
343 .sdwa,
344 .sdwa_omod,
345 .sdwa_scalar,
346 .sdwa_sdst,
347 .vop3_literal,
348 .vop3p,
349 .vscnt,
350 }),
351 };
352 result[@enumToInt(Feature.gfx10_insts)] = .{
353 .llvm_name = "gfx10-insts",
354 .description = "Additional instructions for GFX10+",
355 .dependencies = featureSet(&[_]Feature{}),
356 };
357 result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{
358 .llvm_name = "gfx7-gfx8-gfx9-insts",
359 .description = "Instructions shared in GFX7, GFX8, GFX9",
360 .dependencies = featureSet(&[_]Feature{}),
361 };
362 result[@enumToInt(Feature.gfx8_insts)] = .{
363 .llvm_name = "gfx8-insts",
364 .description = "Additional instructions for GFX8+",
365 .dependencies = featureSet(&[_]Feature{}),
366 };
367 result[@enumToInt(Feature.gfx9)] = .{
368 .llvm_name = "gfx9",
369 .description = "GFX9 GPU generation",
370 .dependencies = featureSet(&[_]Feature{
371 .@"16_bit_insts",
372 .add_no_carry_insts,
373 .aperture_regs,
374 .ci_insts,
375 .dpp,
376 .fast_fmaf,
377 .flat_address_space,
378 .flat_global_insts,
379 .flat_inst_offsets,
380 .flat_scratch_insts,
381 .fp64,
382 .gcn3_encoding,
383 .gfx7_gfx8_gfx9_insts,
384 .gfx8_insts,
385 .gfx9_insts,
386 .int_clamp_insts,
387 .inv_2pi_inline_imm,
388 .localmemorysize65536,
389 .r128_a16,
390 .s_memrealtime,
391 .scalar_atomics,
392 .scalar_flat_scratch_insts,
393 .scalar_stores,
394 .sdwa,
395 .sdwa_omod,
396 .sdwa_scalar,
397 .sdwa_sdst,
398 .vgpr_index_mode,
399 .vop3p,
400 .wavefrontsize64,
401 }),
402 };
403 result[@enumToInt(Feature.gfx9_insts)] = .{
404 .llvm_name = "gfx9-insts",
405 .description = "Additional instructions for GFX9+",
406 .dependencies = featureSet(&[_]Feature{}),
407 };
408 result[@enumToInt(Feature.half_rate_64_ops)] = .{
409 .llvm_name = "half-rate-64-ops",
410 .description = "Most fp64 instructions are half rate instead of quarter",
411 .dependencies = featureSet(&[_]Feature{}),
412 };
413 result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{
414 .llvm_name = "inst-fwd-prefetch-bug",
415 .description = "S_INST_PREFETCH instruction causes shader to hang",
416 .dependencies = featureSet(&[_]Feature{}),
417 };
418 result[@enumToInt(Feature.int_clamp_insts)] = .{
419 .llvm_name = "int-clamp-insts",
420 .description = "Support clamp for integer destination",
421 .dependencies = featureSet(&[_]Feature{}),
422 };
423 result[@enumToInt(Feature.inv_2pi_inline_imm)] = .{
424 .llvm_name = "inv-2pi-inline-imm",
425 .description = "Has 1 / (2 * pi) as inline immediate",
426 .dependencies = featureSet(&[_]Feature{}),
427 };
428 result[@enumToInt(Feature.lds_branch_vmem_war_hazard)] = .{
429 .llvm_name = "lds-branch-vmem-war-hazard",
430 .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0",
431 .dependencies = featureSet(&[_]Feature{}),
432 };
433 result[@enumToInt(Feature.lds_misaligned_bug)] = .{
434 .llvm_name = "lds-misaligned-bug",
435 .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
436 .dependencies = featureSet(&[_]Feature{}),
437 };
438 result[@enumToInt(Feature.ldsbankcount16)] = .{
439 .llvm_name = "ldsbankcount16",
440 .description = "The number of LDS banks per compute unit.",
441 .dependencies = featureSet(&[_]Feature{}),
442 };
443 result[@enumToInt(Feature.ldsbankcount32)] = .{
444 .llvm_name = "ldsbankcount32",
445 .description = "The number of LDS banks per compute unit.",
446 .dependencies = featureSet(&[_]Feature{}),
447 };
448 result[@enumToInt(Feature.load_store_opt)] = .{
449 .llvm_name = "load-store-opt",
450 .description = "Enable SI load/store optimizer pass",
451 .dependencies = featureSet(&[_]Feature{}),
452 };
453 result[@enumToInt(Feature.localmemorysize0)] = .{
454 .llvm_name = "localmemorysize0",
455 .description = "The size of local memory in bytes",
456 .dependencies = featureSet(&[_]Feature{}),
457 };
458 result[@enumToInt(Feature.localmemorysize32768)] = .{
459 .llvm_name = "localmemorysize32768",
460 .description = "The size of local memory in bytes",
461 .dependencies = featureSet(&[_]Feature{}),
462 };
463 result[@enumToInt(Feature.localmemorysize65536)] = .{
464 .llvm_name = "localmemorysize65536",
465 .description = "The size of local memory in bytes",
466 .dependencies = featureSet(&[_]Feature{}),
467 };
468 result[@enumToInt(Feature.mad_mix_insts)] = .{
469 .llvm_name = "mad-mix-insts",
470 .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",
471 .dependencies = featureSet(&[_]Feature{}),
472 };
473 result[@enumToInt(Feature.mai_insts)] = .{
474 .llvm_name = "mai-insts",
475 .description = "Has mAI instructions",
476 .dependencies = featureSet(&[_]Feature{}),
477 };
478 result[@enumToInt(Feature.max_private_element_size_16)] = .{
479 .llvm_name = "max-private-element-size-16",
480 .description = "Maximum private access size may be 16",
481 .dependencies = featureSet(&[_]Feature{}),
482 };
483 result[@enumToInt(Feature.max_private_element_size_4)] = .{
484 .llvm_name = "max-private-element-size-4",
485 .description = "Maximum private access size may be 4",
486 .dependencies = featureSet(&[_]Feature{}),
487 };
488 result[@enumToInt(Feature.max_private_element_size_8)] = .{
489 .llvm_name = "max-private-element-size-8",
490 .description = "Maximum private access size may be 8",
491 .dependencies = featureSet(&[_]Feature{}),
492 };
493 result[@enumToInt(Feature.mimg_r128)] = .{
494 .llvm_name = "mimg-r128",
495 .description = "Support 128-bit texture resources",
496 .dependencies = featureSet(&[_]Feature{}),
497 };
498 result[@enumToInt(Feature.movrel)] = .{
499 .llvm_name = "movrel",
500 .description = "Has v_movrel*_b32 instructions",
501 .dependencies = featureSet(&[_]Feature{}),
502 };
503 result[@enumToInt(Feature.no_data_dep_hazard)] = .{
504 .llvm_name = "no-data-dep-hazard",
505 .description = "Does not need SW waitstates",
506 .dependencies = featureSet(&[_]Feature{}),
507 };
508 result[@enumToInt(Feature.no_sdst_cmpx)] = .{
509 .llvm_name = "no-sdst-cmpx",
510 .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
511 .dependencies = featureSet(&[_]Feature{}),
512 };
513 result[@enumToInt(Feature.no_sram_ecc_support)] = .{
514 .llvm_name = "no-sram-ecc-support",
515 .description = "Hardware does not support SRAM ECC",
516 .dependencies = featureSet(&[_]Feature{}),
517 };
518 result[@enumToInt(Feature.no_xnack_support)] = .{
519 .llvm_name = "no-xnack-support",
520 .description = "Hardware does not support XNACK",
521 .dependencies = featureSet(&[_]Feature{}),
522 };
523 result[@enumToInt(Feature.nsa_encoding)] = .{
524 .llvm_name = "nsa-encoding",
525 .description = "Support NSA encoding for image instructions",
526 .dependencies = featureSet(&[_]Feature{}),
527 };
528 result[@enumToInt(Feature.nsa_to_vmem_bug)] = .{
529 .llvm_name = "nsa-to-vmem-bug",
530 .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero",
531 .dependencies = featureSet(&[_]Feature{}),
532 };
533 result[@enumToInt(Feature.offset_3f_bug)] = .{
534 .llvm_name = "offset-3f-bug",
535 .description = "Branch offset of 3f hardware bug",
536 .dependencies = featureSet(&[_]Feature{}),
537 };
538 result[@enumToInt(Feature.pk_fmac_f16_inst)] = .{
539 .llvm_name = "pk-fmac-f16-inst",
540 .description = "Has v_pk_fmac_f16 instruction",
541 .dependencies = featureSet(&[_]Feature{}),
542 };
543 result[@enumToInt(Feature.promote_alloca)] = .{
544 .llvm_name = "promote-alloca",
545 .description = "Enable promote alloca pass",
546 .dependencies = featureSet(&[_]Feature{}),
547 };
548 result[@enumToInt(Feature.r128_a16)] = .{
549 .llvm_name = "r128-a16",
550 .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9",
551 .dependencies = featureSet(&[_]Feature{}),
552 };
553 result[@enumToInt(Feature.register_banking)] = .{
554 .llvm_name = "register-banking",
555 .description = "Has register banking",
556 .dependencies = featureSet(&[_]Feature{}),
557 };
558 result[@enumToInt(Feature.s_memrealtime)] = .{
559 .llvm_name = "s-memrealtime",
560 .description = "Has s_memrealtime instruction",
561 .dependencies = featureSet(&[_]Feature{}),
562 };
563 result[@enumToInt(Feature.scalar_atomics)] = .{
564 .llvm_name = "scalar-atomics",
565 .description = "Has atomic scalar memory instructions",
566 .dependencies = featureSet(&[_]Feature{}),
567 };
568 result[@enumToInt(Feature.scalar_flat_scratch_insts)] = .{
569 .llvm_name = "scalar-flat-scratch-insts",
570 .description = "Have s_scratch_* flat memory instructions",
571 .dependencies = featureSet(&[_]Feature{}),
572 };
573 result[@enumToInt(Feature.scalar_stores)] = .{
574 .llvm_name = "scalar-stores",
575 .description = "Has store scalar memory instructions",
576 .dependencies = featureSet(&[_]Feature{}),
577 };
578 result[@enumToInt(Feature.sdwa)] = .{
579 .llvm_name = "sdwa",
580 .description = "Support SDWA (Sub-DWORD Addressing) extension",
581 .dependencies = featureSet(&[_]Feature{}),
582 };
583 result[@enumToInt(Feature.sdwa_mav)] = .{
584 .llvm_name = "sdwa-mav",
585 .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension",
586 .dependencies = featureSet(&[_]Feature{}),
587 };
588 result[@enumToInt(Feature.sdwa_omod)] = .{
589 .llvm_name = "sdwa-omod",
590 .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension",
591 .dependencies = featureSet(&[_]Feature{}),
592 };
593 result[@enumToInt(Feature.sdwa_out_mods_vopc)] = .{
594 .llvm_name = "sdwa-out-mods-vopc",
595 .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension",
596 .dependencies = featureSet(&[_]Feature{}),
597 };
598 result[@enumToInt(Feature.sdwa_scalar)] = .{
599 .llvm_name = "sdwa-scalar",
600 .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension",
601 .dependencies = featureSet(&[_]Feature{}),
602 };
603 result[@enumToInt(Feature.sdwa_sdst)] = .{
604 .llvm_name = "sdwa-sdst",
605 .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension",
606 .dependencies = featureSet(&[_]Feature{}),
607 };
608 result[@enumToInt(Feature.sea_islands)] = .{
609 .llvm_name = "sea-islands",
610 .description = "SEA_ISLANDS GPU generation",
611 .dependencies = featureSet(&[_]Feature{
612 .ci_insts,
613 .flat_address_space,
614 .fp64,
615 .gfx7_gfx8_gfx9_insts,
616 .localmemorysize65536,
617 .mimg_r128,
618 .movrel,
619 .no_sram_ecc_support,
620 .trig_reduced_range,
621 .wavefrontsize64,
622 }),
623 };
624 result[@enumToInt(Feature.sgpr_init_bug)] = .{
625 .llvm_name = "sgpr-init-bug",
626 .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size",
627 .dependencies = featureSet(&[_]Feature{}),
628 };
629 result[@enumToInt(Feature.si_scheduler)] = .{
630 .llvm_name = "si-scheduler",
631 .description = "Enable SI Machine Scheduler",
632 .dependencies = featureSet(&[_]Feature{}),
633 };
634 result[@enumToInt(Feature.smem_to_vector_write_hazard)] = .{
635 .llvm_name = "smem-to-vector-write-hazard",
636 .description = "s_load_dword followed by v_cmp page faults",
637 .dependencies = featureSet(&[_]Feature{}),
638 };
639 result[@enumToInt(Feature.southern_islands)] = .{
640 .llvm_name = "southern-islands",
641 .description = "SOUTHERN_ISLANDS GPU generation",
642 .dependencies = featureSet(&[_]Feature{
643 .fp64,
644 .ldsbankcount32,
645 .localmemorysize32768,
646 .mimg_r128,
647 .movrel,
648 .no_sram_ecc_support,
649 .no_xnack_support,
650 .trig_reduced_range,
651 .wavefrontsize64,
652 }),
653 };
654 result[@enumToInt(Feature.sram_ecc)] = .{
655 .llvm_name = "sram-ecc",
656 .description = "Enable SRAM ECC",
657 .dependencies = featureSet(&[_]Feature{}),
658 };
659 result[@enumToInt(Feature.trap_handler)] = .{
660 .llvm_name = "trap-handler",
661 .description = "Trap handler support",
662 .dependencies = featureSet(&[_]Feature{}),
663 };
664 result[@enumToInt(Feature.trig_reduced_range)] = .{
665 .llvm_name = "trig-reduced-range",
666 .description = "Requires use of fract on arguments to trig instructions",
667 .dependencies = featureSet(&[_]Feature{}),
668 };
669 result[@enumToInt(Feature.unaligned_buffer_access)] = .{
670 .llvm_name = "unaligned-buffer-access",
671 .description = "Support unaligned global loads and stores",
672 .dependencies = featureSet(&[_]Feature{}),
673 };
674 result[@enumToInt(Feature.unaligned_scratch_access)] = .{
675 .llvm_name = "unaligned-scratch-access",
676 .description = "Support unaligned scratch loads and stores",
677 .dependencies = featureSet(&[_]Feature{}),
678 };
679 result[@enumToInt(Feature.unpacked_d16_vmem)] = .{
680 .llvm_name = "unpacked-d16-vmem",
681 .description = "Has unpacked d16 vmem instructions",
682 .dependencies = featureSet(&[_]Feature{}),
683 };
684 result[@enumToInt(Feature.unsafe_ds_offset_folding)] = .{
685 .llvm_name = "unsafe-ds-offset-folding",
686 .description = "Force using DS instruction immediate offsets on SI",
687 .dependencies = featureSet(&[_]Feature{}),
688 };
689 result[@enumToInt(Feature.vcmpx_exec_war_hazard)] = .{
690 .llvm_name = "vcmpx-exec-war-hazard",
691 .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",
692 .dependencies = featureSet(&[_]Feature{}),
693 };
694 result[@enumToInt(Feature.vcmpx_permlane_hazard)] = .{
695 .llvm_name = "vcmpx-permlane-hazard",
696 .description = "TODO: describe me",
697 .dependencies = featureSet(&[_]Feature{}),
698 };
699 result[@enumToInt(Feature.vgpr_index_mode)] = .{
700 .llvm_name = "vgpr-index-mode",
701 .description = "Has VGPR mode register indexing",
702 .dependencies = featureSet(&[_]Feature{}),
703 };
704 result[@enumToInt(Feature.vmem_to_scalar_write_hazard)] = .{
705 .llvm_name = "vmem-to-scalar-write-hazard",
706 .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",
707 .dependencies = featureSet(&[_]Feature{}),
708 };
709 result[@enumToInt(Feature.volcanic_islands)] = .{
710 .llvm_name = "volcanic-islands",
711 .description = "VOLCANIC_ISLANDS GPU generation",
712 .dependencies = featureSet(&[_]Feature{
713 .@"16_bit_insts",
714 .ci_insts,
715 .dpp,
716 .flat_address_space,
717 .fp64,
718 .gcn3_encoding,
719 .gfx7_gfx8_gfx9_insts,
720 .gfx8_insts,
721 .int_clamp_insts,
722 .inv_2pi_inline_imm,
723 .localmemorysize65536,
724 .mimg_r128,
725 .movrel,
726 .no_sram_ecc_support,
727 .s_memrealtime,
728 .scalar_stores,
729 .sdwa,
730 .sdwa_mav,
731 .sdwa_out_mods_vopc,
732 .trig_reduced_range,
733 .vgpr_index_mode,
734 .wavefrontsize64,
735 }),
736 };
737 result[@enumToInt(Feature.vop3_literal)] = .{
738 .llvm_name = "vop3-literal",
739 .description = "Can use one literal in VOP3",
740 .dependencies = featureSet(&[_]Feature{}),
741 };
742 result[@enumToInt(Feature.vop3p)] = .{
743 .llvm_name = "vop3p",
744 .description = "Has VOP3P packed instructions",
745 .dependencies = featureSet(&[_]Feature{}),
746 };
747 result[@enumToInt(Feature.vscnt)] = .{
748 .llvm_name = "vscnt",
749 .description = "Has separate store vscnt counter",
750 .dependencies = featureSet(&[_]Feature{}),
751 };
752 result[@enumToInt(Feature.wavefrontsize16)] = .{
753 .llvm_name = "wavefrontsize16",
754 .description = "The number of threads per wavefront",
755 .dependencies = featureSet(&[_]Feature{}),
756 };
757 result[@enumToInt(Feature.wavefrontsize32)] = .{
758 .llvm_name = "wavefrontsize32",
759 .description = "The number of threads per wavefront",
760 .dependencies = featureSet(&[_]Feature{}),
761 };
762 result[@enumToInt(Feature.wavefrontsize64)] = .{
763 .llvm_name = "wavefrontsize64",
764 .description = "The number of threads per wavefront",
765 .dependencies = featureSet(&[_]Feature{}),
766 };
767 result[@enumToInt(Feature.xnack)] = .{
768 .llvm_name = "xnack",
769 .description = "Enable XNACK support",
770 .dependencies = featureSet(&[_]Feature{}),
771 };
772 const ti = @typeInfo(Feature);
773 for (result) |*elem, i| {
774 elem.index = i;
775 elem.name = ti.Enum.fields[i].name;
776 }
777 break :blk result;
778};
779
780pub const cpu = struct {
781 pub const bonaire = Cpu{
782 .name = "bonaire",
783 .llvm_name = "bonaire",
784 .features = featureSet(&[_]Feature{
785 .code_object_v3,
786 .ldsbankcount32,
787 .no_xnack_support,
788 .sea_islands,
789 }),
790 };
791 pub const carrizo = Cpu{
792 .name = "carrizo",
793 .llvm_name = "carrizo",
794 .features = featureSet(&[_]Feature{
795 .code_object_v3,
796 .fast_fmaf,
797 .half_rate_64_ops,
798 .ldsbankcount32,
799 .unpacked_d16_vmem,
800 .volcanic_islands,
801 .xnack,
802 }),
803 };
804 pub const fiji = Cpu{
805 .name = "fiji",
806 .llvm_name = "fiji",
807 .features = featureSet(&[_]Feature{
808 .code_object_v3,
809 .ldsbankcount32,
810 .no_xnack_support,
811 .unpacked_d16_vmem,
812 .volcanic_islands,
813 }),
814 };
815 pub const generic = Cpu{
816 .name = "generic",
817 .llvm_name = "generic",
818 .features = featureSet(&[_]Feature{
819 .wavefrontsize64,
820 }),
821 };
822 pub const generic_hsa = Cpu{
823 .name = "generic_hsa",
824 .llvm_name = "generic-hsa",
825 .features = featureSet(&[_]Feature{
826 .flat_address_space,
827 .wavefrontsize64,
828 }),
829 };
830 pub const gfx1010 = Cpu{
831 .name = "gfx1010",
832 .llvm_name = "gfx1010",
833 .features = featureSet(&[_]Feature{
834 .code_object_v3,
835 .dl_insts,
836 .flat_segment_offset_bug,
837 .gfx10,
838 .inst_fwd_prefetch_bug,
839 .lds_branch_vmem_war_hazard,
840 .lds_misaligned_bug,
841 .ldsbankcount32,
842 .no_xnack_support,
843 .nsa_encoding,
844 .nsa_to_vmem_bug,
845 .offset_3f_bug,
846 .scalar_atomics,
847 .scalar_flat_scratch_insts,
848 .scalar_stores,
849 .smem_to_vector_write_hazard,
850 .vcmpx_exec_war_hazard,
851 .vcmpx_permlane_hazard,
852 .vmem_to_scalar_write_hazard,
853 .wavefrontsize32,
854 }),
855 };
856 pub const gfx1011 = Cpu{
857 .name = "gfx1011",
858 .llvm_name = "gfx1011",
859 .features = featureSet(&[_]Feature{
860 .code_object_v3,
861 .dl_insts,
862 .dot1_insts,
863 .dot2_insts,
864 .dot5_insts,
865 .dot6_insts,
866 .flat_segment_offset_bug,
867 .gfx10,
868 .inst_fwd_prefetch_bug,
869 .lds_branch_vmem_war_hazard,
870 .ldsbankcount32,
871 .no_xnack_support,
872 .nsa_encoding,
873 .nsa_to_vmem_bug,
874 .offset_3f_bug,
875 .scalar_atomics,
876 .scalar_flat_scratch_insts,
877 .scalar_stores,
878 .smem_to_vector_write_hazard,
879 .vcmpx_exec_war_hazard,
880 .vcmpx_permlane_hazard,
881 .vmem_to_scalar_write_hazard,
882 .wavefrontsize32,
883 }),
884 };
885 pub const gfx1012 = Cpu{
886 .name = "gfx1012",
887 .llvm_name = "gfx1012",
888 .features = featureSet(&[_]Feature{
889 .code_object_v3,
890 .dl_insts,
891 .dot1_insts,
892 .dot2_insts,
893 .dot5_insts,
894 .dot6_insts,
895 .flat_segment_offset_bug,
896 .gfx10,
897 .inst_fwd_prefetch_bug,
898 .lds_branch_vmem_war_hazard,
899 .lds_misaligned_bug,
900 .ldsbankcount32,
901 .no_xnack_support,
902 .nsa_encoding,
903 .nsa_to_vmem_bug,
904 .offset_3f_bug,
905 .scalar_atomics,
906 .scalar_flat_scratch_insts,
907 .scalar_stores,
908 .smem_to_vector_write_hazard,
909 .vcmpx_exec_war_hazard,
910 .vcmpx_permlane_hazard,
911 .vmem_to_scalar_write_hazard,
912 .wavefrontsize32,
913 }),
914 };
915 pub const gfx600 = Cpu{
916 .name = "gfx600",
917 .llvm_name = "gfx600",
918 .features = featureSet(&[_]Feature{
919 .code_object_v3,
920 .fast_fmaf,
921 .half_rate_64_ops,
922 .ldsbankcount32,
923 .no_xnack_support,
924 .southern_islands,
925 }),
926 };
927 pub const gfx601 = Cpu{
928 .name = "gfx601",
929 .llvm_name = "gfx601",
930 .features = featureSet(&[_]Feature{
931 .code_object_v3,
932 .ldsbankcount32,
933 .no_xnack_support,
934 .southern_islands,
935 }),
936 };
937 pub const gfx700 = Cpu{
938 .name = "gfx700",
939 .llvm_name = "gfx700",
940 .features = featureSet(&[_]Feature{
941 .code_object_v3,
942 .ldsbankcount32,
943 .no_xnack_support,
944 .sea_islands,
945 }),
946 };
947 pub const gfx701 = Cpu{
948 .name = "gfx701",
949 .llvm_name = "gfx701",
950 .features = featureSet(&[_]Feature{
951 .code_object_v3,
952 .fast_fmaf,
953 .half_rate_64_ops,
954 .ldsbankcount32,
955 .no_xnack_support,
956 .sea_islands,
957 }),
958 };
959 pub const gfx702 = Cpu{
960 .name = "gfx702",
961 .llvm_name = "gfx702",
962 .features = featureSet(&[_]Feature{
963 .code_object_v3,
964 .fast_fmaf,
965 .ldsbankcount16,
966 .no_xnack_support,
967 .sea_islands,
968 }),
969 };
970 pub const gfx703 = Cpu{
971 .name = "gfx703",
972 .llvm_name = "gfx703",
973 .features = featureSet(&[_]Feature{
974 .code_object_v3,
975 .ldsbankcount16,
976 .no_xnack_support,
977 .sea_islands,
978 }),
979 };
980 pub const gfx704 = Cpu{
981 .name = "gfx704",
982 .llvm_name = "gfx704",
983 .features = featureSet(&[_]Feature{
984 .code_object_v3,
985 .ldsbankcount32,
986 .no_xnack_support,
987 .sea_islands,
988 }),
989 };
990 pub const gfx801 = Cpu{
991 .name = "gfx801",
992 .llvm_name = "gfx801",
993 .features = featureSet(&[_]Feature{
994 .code_object_v3,
995 .fast_fmaf,
996 .half_rate_64_ops,
997 .ldsbankcount32,
998 .unpacked_d16_vmem,
999 .volcanic_islands,
1000 .xnack,
1001 }),
1002 };
1003 pub const gfx802 = Cpu{
1004 .name = "gfx802",
1005 .llvm_name = "gfx802",
1006 .features = featureSet(&[_]Feature{
1007 .code_object_v3,
1008 .ldsbankcount32,
1009 .no_xnack_support,
1010 .sgpr_init_bug,
1011 .unpacked_d16_vmem,
1012 .volcanic_islands,
1013 }),
1014 };
1015 pub const gfx803 = Cpu{
1016 .name = "gfx803",
1017 .llvm_name = "gfx803",
1018 .features = featureSet(&[_]Feature{
1019 .code_object_v3,
1020 .ldsbankcount32,
1021 .no_xnack_support,
1022 .unpacked_d16_vmem,
1023 .volcanic_islands,
1024 }),
1025 };
1026 pub const gfx810 = Cpu{
1027 .name = "gfx810",
1028 .llvm_name = "gfx810",
1029 .features = featureSet(&[_]Feature{
1030 .code_object_v3,
1031 .ldsbankcount16,
1032 .volcanic_islands,
1033 .xnack,
1034 }),
1035 };
1036 pub const gfx900 = Cpu{
1037 .name = "gfx900",
1038 .llvm_name = "gfx900",
1039 .features = featureSet(&[_]Feature{
1040 .code_object_v3,
1041 .gfx9,
1042 .ldsbankcount32,
1043 .mad_mix_insts,
1044 .no_sram_ecc_support,
1045 .no_xnack_support,
1046 }),
1047 };
1048 pub const gfx902 = Cpu{
1049 .name = "gfx902",
1050 .llvm_name = "gfx902",
1051 .features = featureSet(&[_]Feature{
1052 .code_object_v3,
1053 .gfx9,
1054 .ldsbankcount32,
1055 .mad_mix_insts,
1056 .no_sram_ecc_support,
1057 .xnack,
1058 }),
1059 };
1060 pub const gfx904 = Cpu{
1061 .name = "gfx904",
1062 .llvm_name = "gfx904",
1063 .features = featureSet(&[_]Feature{
1064 .code_object_v3,
1065 .fma_mix_insts,
1066 .gfx9,
1067 .ldsbankcount32,
1068 .no_sram_ecc_support,
1069 .no_xnack_support,
1070 }),
1071 };
1072 pub const gfx906 = Cpu{
1073 .name = "gfx906",
1074 .llvm_name = "gfx906",
1075 .features = featureSet(&[_]Feature{
1076 .code_object_v3,
1077 .dl_insts,
1078 .dot1_insts,
1079 .dot2_insts,
1080 .fma_mix_insts,
1081 .gfx9,
1082 .half_rate_64_ops,
1083 .ldsbankcount32,
1084 .no_xnack_support,
1085 }),
1086 };
1087 pub const gfx908 = Cpu{
1088 .name = "gfx908",
1089 .llvm_name = "gfx908",
1090 .features = featureSet(&[_]Feature{
1091 .atomic_fadd_insts,
1092 .code_object_v3,
1093 .dl_insts,
1094 .dot1_insts,
1095 .dot2_insts,
1096 .dot3_insts,
1097 .dot4_insts,
1098 .dot5_insts,
1099 .dot6_insts,
1100 .fma_mix_insts,
1101 .gfx9,
1102 .half_rate_64_ops,
1103 .ldsbankcount32,
1104 .mai_insts,
1105 .pk_fmac_f16_inst,
1106 .sram_ecc,
1107 }),
1108 };
1109 pub const gfx909 = Cpu{
1110 .name = "gfx909",
1111 .llvm_name = "gfx909",
1112 .features = featureSet(&[_]Feature{
1113 .code_object_v3,
1114 .gfx9,
1115 .ldsbankcount32,
1116 .mad_mix_insts,
1117 .xnack,
1118 }),
1119 };
1120 pub const hainan = Cpu{
1121 .name = "hainan",
1122 .llvm_name = "hainan",
1123 .features = featureSet(&[_]Feature{
1124 .code_object_v3,
1125 .ldsbankcount32,
1126 .no_xnack_support,
1127 .southern_islands,
1128 }),
1129 };
1130 pub const hawaii = Cpu{
1131 .name = "hawaii",
1132 .llvm_name = "hawaii",
1133 .features = featureSet(&[_]Feature{
1134 .code_object_v3,
1135 .fast_fmaf,
1136 .half_rate_64_ops,
1137 .ldsbankcount32,
1138 .no_xnack_support,
1139 .sea_islands,
1140 }),
1141 };
1142 pub const iceland = Cpu{
1143 .name = "iceland",
1144 .llvm_name = "iceland",
1145 .features = featureSet(&[_]Feature{
1146 .code_object_v3,
1147 .ldsbankcount32,
1148 .no_xnack_support,
1149 .sgpr_init_bug,
1150 .unpacked_d16_vmem,
1151 .volcanic_islands,
1152 }),
1153 };
1154 pub const kabini = Cpu{
1155 .name = "kabini",
1156 .llvm_name = "kabini",
1157 .features = featureSet(&[_]Feature{
1158 .code_object_v3,
1159 .ldsbankcount16,
1160 .no_xnack_support,
1161 .sea_islands,
1162 }),
1163 };
1164 pub const kaveri = Cpu{
1165 .name = "kaveri",
1166 .llvm_name = "kaveri",
1167 .features = featureSet(&[_]Feature{
1168 .code_object_v3,
1169 .ldsbankcount32,
1170 .no_xnack_support,
1171 .sea_islands,
1172 }),
1173 };
1174 pub const mullins = Cpu{
1175 .name = "mullins",
1176 .llvm_name = "mullins",
1177 .features = featureSet(&[_]Feature{
1178 .code_object_v3,
1179 .ldsbankcount16,
1180 .no_xnack_support,
1181 .sea_islands,
1182 }),
1183 };
1184 pub const oland = Cpu{
1185 .name = "oland",
1186 .llvm_name = "oland",
1187 .features = featureSet(&[_]Feature{
1188 .code_object_v3,
1189 .ldsbankcount32,
1190 .no_xnack_support,
1191 .southern_islands,
1192 }),
1193 };
1194 pub const pitcairn = Cpu{
1195 .name = "pitcairn",
1196 .llvm_name = "pitcairn",
1197 .features = featureSet(&[_]Feature{
1198 .code_object_v3,
1199 .ldsbankcount32,
1200 .no_xnack_support,
1201 .southern_islands,
1202 }),
1203 };
1204 pub const polaris10 = Cpu{
1205 .name = "polaris10",
1206 .llvm_name = "polaris10",
1207 .features = featureSet(&[_]Feature{
1208 .code_object_v3,
1209 .ldsbankcount32,
1210 .no_xnack_support,
1211 .unpacked_d16_vmem,
1212 .volcanic_islands,
1213 }),
1214 };
1215 pub const polaris11 = Cpu{
1216 .name = "polaris11",
1217 .llvm_name = "polaris11",
1218 .features = featureSet(&[_]Feature{
1219 .code_object_v3,
1220 .ldsbankcount32,
1221 .no_xnack_support,
1222 .unpacked_d16_vmem,
1223 .volcanic_islands,
1224 }),
1225 };
1226 pub const stoney = Cpu{
1227 .name = "stoney",
1228 .llvm_name = "stoney",
1229 .features = featureSet(&[_]Feature{
1230 .code_object_v3,
1231 .ldsbankcount16,
1232 .volcanic_islands,
1233 .xnack,
1234 }),
1235 };
1236 pub const tahiti = Cpu{
1237 .name = "tahiti",
1238 .llvm_name = "tahiti",
1239 .features = featureSet(&[_]Feature{
1240 .code_object_v3,
1241 .fast_fmaf,
1242 .half_rate_64_ops,
1243 .ldsbankcount32,
1244 .no_xnack_support,
1245 .southern_islands,
1246 }),
1247 };
1248 pub const tonga = Cpu{
1249 .name = "tonga",
1250 .llvm_name = "tonga",
1251 .features = featureSet(&[_]Feature{
1252 .code_object_v3,
1253 .ldsbankcount32,
1254 .no_xnack_support,
1255 .sgpr_init_bug,
1256 .unpacked_d16_vmem,
1257 .volcanic_islands,
1258 }),
1259 };
1260 pub const verde = Cpu{
1261 .name = "verde",
1262 .llvm_name = "verde",
1263 .features = featureSet(&[_]Feature{
1264 .code_object_v3,
1265 .ldsbankcount32,
1266 .no_xnack_support,
1267 .southern_islands,
1268 }),
1269 };
1270};
1271
1272/// All amdgpu CPUs, sorted alphabetically by name.
1273/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
1274/// compiler has inefficient memory and CPU usage, affecting build times.
1275pub const all_cpus = &[_]*const Cpu{
1276 &cpu.bonaire,
1277 &cpu.carrizo,
1278 &cpu.fiji,
1279 &cpu.generic,
1280 &cpu.generic_hsa,
1281 &cpu.gfx1010,
1282 &cpu.gfx1011,
1283 &cpu.gfx1012,
1284 &cpu.gfx600,
1285 &cpu.gfx601,
1286 &cpu.gfx700,
1287 &cpu.gfx701,
1288 &cpu.gfx702,
1289 &cpu.gfx703,
1290 &cpu.gfx704,
1291 &cpu.gfx801,
1292 &cpu.gfx802,
1293 &cpu.gfx803,
1294 &cpu.gfx810,
1295 &cpu.gfx900,
1296 &cpu.gfx902,
1297 &cpu.gfx904,
1298 &cpu.gfx906,
1299 &cpu.gfx908,
1300 &cpu.gfx909,
1301 &cpu.hainan,
1302 &cpu.hawaii,
1303 &cpu.iceland,
1304 &cpu.kabini,
1305 &cpu.kaveri,
1306 &cpu.mullins,
1307 &cpu.oland,
1308 &cpu.pitcairn,
1309 &cpu.polaris10,
1310 &cpu.polaris11,
1311 &cpu.stoney,
1312 &cpu.tahiti,
1313 &cpu.tonga,
1314 &cpu.verde,
1315};
lib/std/target/arm.zig created+2333
...@@ -0,0 +1,2333 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 @"32bit",
6 @"8msecext",
7 a12,
8 a15,
9 a17,
10 a32,
11 a35,
12 a5,
13 a53,
14 a55,
15 a57,
16 a7,
17 a72,
18 a73,
19 a75,
20 a76,
21 a8,
22 a9,
23 aclass,
24 acquire_release,
25 aes,
26 armv2,
27 armv2a,
28 armv3,
29 armv3m,
30 armv4,
31 armv4t,
32 armv5t,
33 armv5te,
34 armv5tej,
35 armv6,
36 armv6_m,
37 armv6j,
38 armv6k,
39 armv6kz,
40 armv6s_m,
41 armv6t2,
42 armv7_a,
43 armv7_m,
44 armv7_r,
45 armv7e_m,
46 armv7k,
47 armv7s,
48 armv7ve,
49 armv8_a,
50 armv8_m_base,
51 armv8_m_main,
52 armv8_r,
53 armv8_1_a,
54 armv8_1_m_main,
55 armv8_2_a,
56 armv8_3_a,
57 armv8_4_a,
58 armv8_5_a,
59 avoid_movs_shop,
60 avoid_partial_cpsr,
61 cheap_predicable_cpsr,
62 crc,
63 crypto,
64 d32,
65 db,
66 dfb,
67 disable_postra_scheduler,
68 dont_widen_vmovs,
69 dotprod,
70 dsp,
71 execute_only,
72 expand_fp_mlx,
73 exynos,
74 fp_armv8,
75 fp_armv8d16,
76 fp_armv8d16sp,
77 fp_armv8sp,
78 fp16,
79 fp16fml,
80 fp64,
81 fpao,
82 fpregs,
83 fpregs16,
84 fpregs64,
85 fullfp16,
86 fuse_aes,
87 fuse_literals,
88 hwdiv,
89 hwdiv_arm,
90 iwmmxt,
91 iwmmxt2,
92 krait,
93 kryo,
94 lob,
95 long_calls,
96 loop_align,
97 m3,
98 mclass,
99 mp,
100 muxed_units,
101 mve,
102 mve_fp,
103 nacl_trap,
104 neon,
105 neon_fpmovs,
106 neonfp,
107 no_branch_predictor,
108 no_movt,
109 no_neg_immediates,
110 noarm,
111 nonpipelined_vfp,
112 perfmon,
113 prefer_ishst,
114 prefer_vmovsr,
115 prof_unpr,
116 r4,
117 r5,
118 r52,
119 r7,
120 ras,
121 rclass,
122 read_tp_hard,
123 reserve_r9,
124 ret_addr_stack,
125 sb,
126 sha2,
127 slow_fp_brcc,
128 slow_load_D_subreg,
129 slow_odd_reg,
130 slow_vdup32,
131 slow_vgetlni32,
132 slowfpvmlx,
133 soft_float,
134 splat_vfp_neon,
135 strict_align,
136 swift,
137 thumb_mode,
138 thumb2,
139 trustzone,
140 use_aa,
141 use_misched,
142 v4t,
143 v5t,
144 v5te,
145 v6,
146 v6k,
147 v6m,
148 v6t2,
149 v7,
150 v7clrex,
151 v8,
152 v8_1a,
153 v8_1m_main,
154 v8_2a,
155 v8_3a,
156 v8_4a,
157 v8_5a,
158 v8m,
159 v8m_main,
160 vfp2,
161 vfp2d16,
162 vfp2d16sp,
163 vfp2sp,
164 vfp3,
165 vfp3d16,
166 vfp3d16sp,
167 vfp3sp,
168 vfp4,
169 vfp4d16,
170 vfp4d16sp,
171 vfp4sp,
172 virtualization,
173 vldn_align,
174 vmlx_forwarding,
175 vmlx_hazards,
176 wide_stride_vfp,
177 xscale,
178 zcz,
179};
180
181pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
182
183pub const all_features = blk: {
184 @setEvalBranchQuota(10000);
185 const len = @typeInfo(Feature).Enum.fields.len;
186 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
187 var result: [len]Cpu.Feature = undefined;
188 result[@enumToInt(Feature.@"32bit")] = .{
189 .llvm_name = "32bit",
190 .description = "Prefer 32-bit Thumb instrs",
191 .dependencies = featureSet(&[_]Feature{}),
192 };
193 result[@enumToInt(Feature.@"8msecext")] = .{
194 .llvm_name = "8msecext",
195 .description = "Enable support for ARMv8-M Security Extensions",
196 .dependencies = featureSet(&[_]Feature{}),
197 };
198 result[@enumToInt(Feature.a12)] = .{
199 .llvm_name = "a12",
200 .description = "Cortex-A12 ARM processors",
201 .dependencies = featureSet(&[_]Feature{}),
202 };
203 result[@enumToInt(Feature.a15)] = .{
204 .llvm_name = "a15",
205 .description = "Cortex-A15 ARM processors",
206 .dependencies = featureSet(&[_]Feature{}),
207 };
208 result[@enumToInt(Feature.a17)] = .{
209 .llvm_name = "a17",
210 .description = "Cortex-A17 ARM processors",
211 .dependencies = featureSet(&[_]Feature{}),
212 };
213 result[@enumToInt(Feature.a32)] = .{
214 .llvm_name = "a32",
215 .description = "Cortex-A32 ARM processors",
216 .dependencies = featureSet(&[_]Feature{}),
217 };
218 result[@enumToInt(Feature.a35)] = .{
219 .llvm_name = "a35",
220 .description = "Cortex-A35 ARM processors",
221 .dependencies = featureSet(&[_]Feature{}),
222 };
223 result[@enumToInt(Feature.a5)] = .{
224 .llvm_name = "a5",
225 .description = "Cortex-A5 ARM processors",
226 .dependencies = featureSet(&[_]Feature{}),
227 };
228 result[@enumToInt(Feature.a53)] = .{
229 .llvm_name = "a53",
230 .description = "Cortex-A53 ARM processors",
231 .dependencies = featureSet(&[_]Feature{}),
232 };
233 result[@enumToInt(Feature.a55)] = .{
234 .llvm_name = "a55",
235 .description = "Cortex-A55 ARM processors",
236 .dependencies = featureSet(&[_]Feature{}),
237 };
238 result[@enumToInt(Feature.a57)] = .{
239 .llvm_name = "a57",
240 .description = "Cortex-A57 ARM processors",
241 .dependencies = featureSet(&[_]Feature{}),
242 };
243 result[@enumToInt(Feature.a7)] = .{
244 .llvm_name = "a7",
245 .description = "Cortex-A7 ARM processors",
246 .dependencies = featureSet(&[_]Feature{}),
247 };
248 result[@enumToInt(Feature.a72)] = .{
249 .llvm_name = "a72",
250 .description = "Cortex-A72 ARM processors",
251 .dependencies = featureSet(&[_]Feature{}),
252 };
253 result[@enumToInt(Feature.a73)] = .{
254 .llvm_name = "a73",
255 .description = "Cortex-A73 ARM processors",
256 .dependencies = featureSet(&[_]Feature{}),
257 };
258 result[@enumToInt(Feature.a75)] = .{
259 .llvm_name = "a75",
260 .description = "Cortex-A75 ARM processors",
261 .dependencies = featureSet(&[_]Feature{}),
262 };
263 result[@enumToInt(Feature.a76)] = .{
264 .llvm_name = "a76",
265 .description = "Cortex-A76 ARM processors",
266 .dependencies = featureSet(&[_]Feature{}),
267 };
268 result[@enumToInt(Feature.a8)] = .{
269 .llvm_name = "a8",
270 .description = "Cortex-A8 ARM processors",
271 .dependencies = featureSet(&[_]Feature{}),
272 };
273 result[@enumToInt(Feature.a9)] = .{
274 .llvm_name = "a9",
275 .description = "Cortex-A9 ARM processors",
276 .dependencies = featureSet(&[_]Feature{}),
277 };
278 result[@enumToInt(Feature.aclass)] = .{
279 .llvm_name = "aclass",
280 .description = "Is application profile ('A' series)",
281 .dependencies = featureSet(&[_]Feature{}),
282 };
283 result[@enumToInt(Feature.acquire_release)] = .{
284 .llvm_name = "acquire-release",
285 .description = "Has v8 acquire/release (lda/ldaex etc) instructions",
286 .dependencies = featureSet(&[_]Feature{}),
287 };
288 result[@enumToInt(Feature.aes)] = .{
289 .llvm_name = "aes",
290 .description = "Enable AES support",
291 .dependencies = featureSet(&[_]Feature{
292 .neon,
293 }),
294 };
295 result[@enumToInt(Feature.armv2)] = .{
296 .llvm_name = "armv2",
297 .description = "ARMv2 architecture",
298 .dependencies = featureSet(&[_]Feature{}),
299 };
300 result[@enumToInt(Feature.armv2a)] = .{
301 .llvm_name = "armv2a",
302 .description = "ARMv2a architecture",
303 .dependencies = featureSet(&[_]Feature{}),
304 };
305 result[@enumToInt(Feature.armv3)] = .{
306 .llvm_name = "armv3",
307 .description = "ARMv3 architecture",
308 .dependencies = featureSet(&[_]Feature{}),
309 };
310 result[@enumToInt(Feature.armv3m)] = .{
311 .llvm_name = "armv3m",
312 .description = "ARMv3m architecture",
313 .dependencies = featureSet(&[_]Feature{}),
314 };
315 result[@enumToInt(Feature.armv4)] = .{
316 .llvm_name = "armv4",
317 .description = "ARMv4 architecture",
318 .dependencies = featureSet(&[_]Feature{}),
319 };
320 result[@enumToInt(Feature.armv4t)] = .{
321 .llvm_name = "armv4t",
322 .description = "ARMv4t architecture",
323 .dependencies = featureSet(&[_]Feature{
324 .v4t,
325 }),
326 };
327 result[@enumToInt(Feature.armv5t)] = .{
328 .llvm_name = "armv5t",
329 .description = "ARMv5t architecture",
330 .dependencies = featureSet(&[_]Feature{
331 .v5t,
332 }),
333 };
334 result[@enumToInt(Feature.armv5te)] = .{
335 .llvm_name = "armv5te",
336 .description = "ARMv5te architecture",
337 .dependencies = featureSet(&[_]Feature{
338 .v5te,
339 }),
340 };
341 result[@enumToInt(Feature.armv5tej)] = .{
342 .llvm_name = "armv5tej",
343 .description = "ARMv5tej architecture",
344 .dependencies = featureSet(&[_]Feature{
345 .v5te,
346 }),
347 };
348 result[@enumToInt(Feature.armv6)] = .{
349 .llvm_name = "armv6",
350 .description = "ARMv6 architecture",
351 .dependencies = featureSet(&[_]Feature{
352 .dsp,
353 .v6,
354 }),
355 };
356 result[@enumToInt(Feature.armv6_m)] = .{
357 .llvm_name = "armv6-m",
358 .description = "ARMv6m architecture",
359 .dependencies = featureSet(&[_]Feature{
360 .db,
361 .mclass,
362 .noarm,
363 .strict_align,
364 .thumb_mode,
365 .v6m,
366 }),
367 };
368 result[@enumToInt(Feature.armv6j)] = .{
369 .llvm_name = "armv6j",
370 .description = "ARMv7a architecture",
371 .dependencies = featureSet(&[_]Feature{
372 .armv6,
373 }),
374 };
375 result[@enumToInt(Feature.armv6k)] = .{
376 .llvm_name = "armv6k",
377 .description = "ARMv6k architecture",
378 .dependencies = featureSet(&[_]Feature{
379 .v6k,
380 }),
381 };
382 result[@enumToInt(Feature.armv6kz)] = .{
383 .llvm_name = "armv6kz",
384 .description = "ARMv6kz architecture",
385 .dependencies = featureSet(&[_]Feature{
386 .trustzone,
387 .v6k,
388 }),
389 };
390 result[@enumToInt(Feature.armv6s_m)] = .{
391 .llvm_name = "armv6s-m",
392 .description = "ARMv6sm architecture",
393 .dependencies = featureSet(&[_]Feature{
394 .db,
395 .mclass,
396 .noarm,
397 .strict_align,
398 .thumb_mode,
399 .v6m,
400 }),
401 };
402 result[@enumToInt(Feature.armv6t2)] = .{
403 .llvm_name = "armv6t2",
404 .description = "ARMv6t2 architecture",
405 .dependencies = featureSet(&[_]Feature{
406 .dsp,
407 .v6t2,
408 }),
409 };
410 result[@enumToInt(Feature.armv7_a)] = .{
411 .llvm_name = "armv7-a",
412 .description = "ARMv7a architecture",
413 .dependencies = featureSet(&[_]Feature{
414 .aclass,
415 .db,
416 .dsp,
417 .neon,
418 .v7,
419 }),
420 };
421 result[@enumToInt(Feature.armv7_m)] = .{
422 .llvm_name = "armv7-m",
423 .description = "ARMv7m architecture",
424 .dependencies = featureSet(&[_]Feature{
425 .db,
426 .hwdiv,
427 .mclass,
428 .noarm,
429 .thumb_mode,
430 .thumb2,
431 .v7,
432 }),
433 };
434 result[@enumToInt(Feature.armv7_r)] = .{
435 .llvm_name = "armv7-r",
436 .description = "ARMv7r architecture",
437 .dependencies = featureSet(&[_]Feature{
438 .db,
439 .dsp,
440 .hwdiv,
441 .rclass,
442 .v7,
443 }),
444 };
445 result[@enumToInt(Feature.armv7e_m)] = .{
446 .llvm_name = "armv7e-m",
447 .description = "ARMv7em architecture",
448 .dependencies = featureSet(&[_]Feature{
449 .db,
450 .dsp,
451 .hwdiv,
452 .mclass,
453 .noarm,
454 .thumb_mode,
455 .thumb2,
456 .v7,
457 }),
458 };
459 result[@enumToInt(Feature.armv7k)] = .{
460 .llvm_name = "armv7k",
461 .description = "ARMv7a architecture",
462 .dependencies = featureSet(&[_]Feature{
463 .armv7_a,
464 }),
465 };
466 result[@enumToInt(Feature.armv7s)] = .{
467 .llvm_name = "armv7s",
468 .description = "ARMv7a architecture",
469 .dependencies = featureSet(&[_]Feature{
470 .armv7_a,
471 }),
472 };
473 result[@enumToInt(Feature.armv7ve)] = .{
474 .llvm_name = "armv7ve",
475 .description = "ARMv7ve architecture",
476 .dependencies = featureSet(&[_]Feature{
477 .aclass,
478 .db,
479 .dsp,
480 .mp,
481 .neon,
482 .trustzone,
483 .v7,
484 .virtualization,
485 }),
486 };
487 result[@enumToInt(Feature.armv8_a)] = .{
488 .llvm_name = "armv8-a",
489 .description = "ARMv8a architecture",
490 .dependencies = featureSet(&[_]Feature{
491 .aclass,
492 .crc,
493 .crypto,
494 .db,
495 .dsp,
496 .fp_armv8,
497 .mp,
498 .neon,
499 .trustzone,
500 .v8,
501 .virtualization,
502 }),
503 };
504 result[@enumToInt(Feature.armv8_m_base)] = .{
505 .llvm_name = "armv8-m.base",
506 .description = "ARMv8mBaseline architecture",
507 .dependencies = featureSet(&[_]Feature{
508 .@"8msecext",
509 .acquire_release,
510 .db,
511 .hwdiv,
512 .mclass,
513 .noarm,
514 .strict_align,
515 .thumb_mode,
516 .v7clrex,
517 .v8m,
518 }),
519 };
520 result[@enumToInt(Feature.armv8_m_main)] = .{
521 .llvm_name = "armv8-m.main",
522 .description = "ARMv8mMainline architecture",
523 .dependencies = featureSet(&[_]Feature{
524 .@"8msecext",
525 .acquire_release,
526 .db,
527 .hwdiv,
528 .mclass,
529 .noarm,
530 .thumb_mode,
531 .v8m_main,
532 }),
533 };
534 result[@enumToInt(Feature.armv8_r)] = .{
535 .llvm_name = "armv8-r",
536 .description = "ARMv8r architecture",
537 .dependencies = featureSet(&[_]Feature{
538 .crc,
539 .db,
540 .dfb,
541 .dsp,
542 .fp_armv8,
543 .mp,
544 .neon,
545 .rclass,
546 .v8,
547 .virtualization,
548 }),
549 };
550 result[@enumToInt(Feature.armv8_1_a)] = .{
551 .llvm_name = "armv8.1-a",
552 .description = "ARMv81a architecture",
553 .dependencies = featureSet(&[_]Feature{
554 .aclass,
555 .crc,
556 .crypto,
557 .db,
558 .dsp,
559 .fp_armv8,
560 .mp,
561 .neon,
562 .trustzone,
563 .v8_1a,
564 .virtualization,
565 }),
566 };
567 result[@enumToInt(Feature.armv8_1_m_main)] = .{
568 .llvm_name = "armv8.1-m.main",
569 .description = "ARMv81mMainline architecture",
570 .dependencies = featureSet(&[_]Feature{
571 .@"8msecext",
572 .acquire_release,
573 .db,
574 .hwdiv,
575 .lob,
576 .mclass,
577 .noarm,
578 .ras,
579 .thumb_mode,
580 .v8_1m_main,
581 }),
582 };
583 result[@enumToInt(Feature.armv8_2_a)] = .{
584 .llvm_name = "armv8.2-a",
585 .description = "ARMv82a architecture",
586 .dependencies = featureSet(&[_]Feature{
587 .aclass,
588 .crc,
589 .crypto,
590 .db,
591 .dsp,
592 .fp_armv8,
593 .mp,
594 .neon,
595 .ras,
596 .trustzone,
597 .v8_2a,
598 .virtualization,
599 }),
600 };
601 result[@enumToInt(Feature.armv8_3_a)] = .{
602 .llvm_name = "armv8.3-a",
603 .description = "ARMv83a architecture",
604 .dependencies = featureSet(&[_]Feature{
605 .aclass,
606 .crc,
607 .crypto,
608 .db,
609 .dsp,
610 .fp_armv8,
611 .mp,
612 .neon,
613 .ras,
614 .trustzone,
615 .v8_3a,
616 .virtualization,
617 }),
618 };
619 result[@enumToInt(Feature.armv8_4_a)] = .{
620 .llvm_name = "armv8.4-a",
621 .description = "ARMv84a architecture",
622 .dependencies = featureSet(&[_]Feature{
623 .aclass,
624 .crc,
625 .crypto,
626 .db,
627 .dotprod,
628 .dsp,
629 .fp_armv8,
630 .mp,
631 .neon,
632 .ras,
633 .trustzone,
634 .v8_4a,
635 .virtualization,
636 }),
637 };
638 result[@enumToInt(Feature.armv8_5_a)] = .{
639 .llvm_name = "armv8.5-a",
640 .description = "ARMv85a architecture",
641 .dependencies = featureSet(&[_]Feature{
642 .aclass,
643 .crc,
644 .crypto,
645 .db,
646 .dotprod,
647 .dsp,
648 .fp_armv8,
649 .mp,
650 .neon,
651 .ras,
652 .trustzone,
653 .v8_5a,
654 .virtualization,
655 }),
656 };
657 result[@enumToInt(Feature.avoid_movs_shop)] = .{
658 .llvm_name = "avoid-movs-shop",
659 .description = "Avoid movs instructions with shifter operand",
660 .dependencies = featureSet(&[_]Feature{}),
661 };
662 result[@enumToInt(Feature.avoid_partial_cpsr)] = .{
663 .llvm_name = "avoid-partial-cpsr",
664 .description = "Avoid CPSR partial update for OOO execution",
665 .dependencies = featureSet(&[_]Feature{}),
666 };
667 result[@enumToInt(Feature.cheap_predicable_cpsr)] = .{
668 .llvm_name = "cheap-predicable-cpsr",
669 .description = "Disable +1 predication cost for instructions updating CPSR",
670 .dependencies = featureSet(&[_]Feature{}),
671 };
672 result[@enumToInt(Feature.crc)] = .{
673 .llvm_name = "crc",
674 .description = "Enable support for CRC instructions",
675 .dependencies = featureSet(&[_]Feature{}),
676 };
677 result[@enumToInt(Feature.crypto)] = .{
678 .llvm_name = "crypto",
679 .description = "Enable support for Cryptography extensions",
680 .dependencies = featureSet(&[_]Feature{
681 .aes,
682 .neon,
683 .sha2,
684 }),
685 };
686 result[@enumToInt(Feature.d32)] = .{
687 .llvm_name = "d32",
688 .description = "Extend FP to 32 double registers",
689 .dependencies = featureSet(&[_]Feature{}),
690 };
691 result[@enumToInt(Feature.db)] = .{
692 .llvm_name = "db",
693 .description = "Has data barrier (dmb/dsb) instructions",
694 .dependencies = featureSet(&[_]Feature{}),
695 };
696 result[@enumToInt(Feature.dfb)] = .{
697 .llvm_name = "dfb",
698 .description = "Has full data barrier (dfb) instruction",
699 .dependencies = featureSet(&[_]Feature{}),
700 };
701 result[@enumToInt(Feature.disable_postra_scheduler)] = .{
702 .llvm_name = "disable-postra-scheduler",
703 .description = "Don't schedule again after register allocation",
704 .dependencies = featureSet(&[_]Feature{}),
705 };
706 result[@enumToInt(Feature.dont_widen_vmovs)] = .{
707 .llvm_name = "dont-widen-vmovs",
708 .description = "Don't widen VMOVS to VMOVD",
709 .dependencies = featureSet(&[_]Feature{}),
710 };
711 result[@enumToInt(Feature.dotprod)] = .{
712 .llvm_name = "dotprod",
713 .description = "Enable support for dot product instructions",
714 .dependencies = featureSet(&[_]Feature{
715 .neon,
716 }),
717 };
718 result[@enumToInt(Feature.dsp)] = .{
719 .llvm_name = "dsp",
720 .description = "Supports DSP instructions in ARM and/or Thumb2",
721 .dependencies = featureSet(&[_]Feature{}),
722 };
723 result[@enumToInt(Feature.execute_only)] = .{
724 .llvm_name = "execute-only",
725 .description = "Enable the generation of execute only code.",
726 .dependencies = featureSet(&[_]Feature{}),
727 };
728 result[@enumToInt(Feature.expand_fp_mlx)] = .{
729 .llvm_name = "expand-fp-mlx",
730 .description = "Expand VFP/NEON MLA/MLS instructions",
731 .dependencies = featureSet(&[_]Feature{}),
732 };
733 result[@enumToInt(Feature.exynos)] = .{
734 .llvm_name = "exynos",
735 .description = "Samsung Exynos processors",
736 .dependencies = featureSet(&[_]Feature{
737 .crc,
738 .crypto,
739 .expand_fp_mlx,
740 .fuse_aes,
741 .fuse_literals,
742 .hwdiv,
743 .hwdiv_arm,
744 .prof_unpr,
745 .ret_addr_stack,
746 .slow_fp_brcc,
747 .slow_vdup32,
748 .slow_vgetlni32,
749 .slowfpvmlx,
750 .splat_vfp_neon,
751 .use_aa,
752 .wide_stride_vfp,
753 .zcz,
754 }),
755 };
756 result[@enumToInt(Feature.fp_armv8)] = .{
757 .llvm_name = "fp-armv8",
758 .description = "Enable ARMv8 FP",
759 .dependencies = featureSet(&[_]Feature{
760 .fp_armv8d16,
761 .fp_armv8sp,
762 .vfp4,
763 }),
764 };
765 result[@enumToInt(Feature.fp_armv8d16)] = .{
766 .llvm_name = "fp-armv8d16",
767 .description = "Enable ARMv8 FP with only 16 d-registers",
768 .dependencies = featureSet(&[_]Feature{
769 .fp_armv8d16sp,
770 .fp64,
771 .vfp4d16,
772 }),
773 };
774 result[@enumToInt(Feature.fp_armv8d16sp)] = .{
775 .llvm_name = "fp-armv8d16sp",
776 .description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
777 .dependencies = featureSet(&[_]Feature{
778 .vfp4d16sp,
779 }),
780 };
781 result[@enumToInt(Feature.fp_armv8sp)] = .{
782 .llvm_name = "fp-armv8sp",
783 .description = "Enable ARMv8 FP with no double precision",
784 .dependencies = featureSet(&[_]Feature{
785 .d32,
786 .fp_armv8d16sp,
787 .vfp4sp,
788 }),
789 };
790 result[@enumToInt(Feature.fp16)] = .{
791 .llvm_name = "fp16",
792 .description = "Enable half-precision floating point",
793 .dependencies = featureSet(&[_]Feature{}),
794 };
795 result[@enumToInt(Feature.fp16fml)] = .{
796 .llvm_name = "fp16fml",
797 .description = "Enable full half-precision floating point fml instructions",
798 .dependencies = featureSet(&[_]Feature{
799 .fullfp16,
800 }),
801 };
802 result[@enumToInt(Feature.fp64)] = .{
803 .llvm_name = "fp64",
804 .description = "Floating point unit supports double precision",
805 .dependencies = featureSet(&[_]Feature{
806 .fpregs64,
807 }),
808 };
809 result[@enumToInt(Feature.fpao)] = .{
810 .llvm_name = "fpao",
811 .description = "Enable fast computation of positive address offsets",
812 .dependencies = featureSet(&[_]Feature{}),
813 };
814 result[@enumToInt(Feature.fpregs)] = .{
815 .llvm_name = "fpregs",
816 .description = "Enable FP registers",
817 .dependencies = featureSet(&[_]Feature{}),
818 };
819 result[@enumToInt(Feature.fpregs16)] = .{
820 .llvm_name = "fpregs16",
821 .description = "Enable 16-bit FP registers",
822 .dependencies = featureSet(&[_]Feature{
823 .fpregs,
824 }),
825 };
826 result[@enumToInt(Feature.fpregs64)] = .{
827 .llvm_name = "fpregs64",
828 .description = "Enable 64-bit FP registers",
829 .dependencies = featureSet(&[_]Feature{
830 .fpregs,
831 }),
832 };
833 result[@enumToInt(Feature.fullfp16)] = .{
834 .llvm_name = "fullfp16",
835 .description = "Enable full half-precision floating point",
836 .dependencies = featureSet(&[_]Feature{
837 .fp_armv8d16sp,
838 .fpregs16,
839 }),
840 };
841 result[@enumToInt(Feature.fuse_aes)] = .{
842 .llvm_name = "fuse-aes",
843 .description = "CPU fuses AES crypto operations",
844 .dependencies = featureSet(&[_]Feature{}),
845 };
846 result[@enumToInt(Feature.fuse_literals)] = .{
847 .llvm_name = "fuse-literals",
848 .description = "CPU fuses literal generation operations",
849 .dependencies = featureSet(&[_]Feature{}),
850 };
851 result[@enumToInt(Feature.hwdiv)] = .{
852 .llvm_name = "hwdiv",
853 .description = "Enable divide instructions in Thumb",
854 .dependencies = featureSet(&[_]Feature{}),
855 };
856 result[@enumToInt(Feature.hwdiv_arm)] = .{
857 .llvm_name = "hwdiv-arm",
858 .description = "Enable divide instructions in ARM mode",
859 .dependencies = featureSet(&[_]Feature{}),
860 };
861 result[@enumToInt(Feature.iwmmxt)] = .{
862 .llvm_name = "iwmmxt",
863 .description = "ARMv5te architecture",
864 .dependencies = featureSet(&[_]Feature{
865 .armv5te,
866 }),
867 };
868 result[@enumToInt(Feature.iwmmxt2)] = .{
869 .llvm_name = "iwmmxt2",
870 .description = "ARMv5te architecture",
871 .dependencies = featureSet(&[_]Feature{
872 .armv5te,
873 }),
874 };
875 result[@enumToInt(Feature.krait)] = .{
876 .llvm_name = "krait",
877 .description = "Qualcomm Krait processors",
878 .dependencies = featureSet(&[_]Feature{}),
879 };
880 result[@enumToInt(Feature.kryo)] = .{
881 .llvm_name = "kryo",
882 .description = "Qualcomm Kryo processors",
883 .dependencies = featureSet(&[_]Feature{}),
884 };
885 result[@enumToInt(Feature.lob)] = .{
886 .llvm_name = "lob",
887 .description = "Enable Low Overhead Branch extensions",
888 .dependencies = featureSet(&[_]Feature{}),
889 };
890 result[@enumToInt(Feature.long_calls)] = .{
891 .llvm_name = "long-calls",
892 .description = "Generate calls via indirect call instructions",
893 .dependencies = featureSet(&[_]Feature{}),
894 };
895 result[@enumToInt(Feature.loop_align)] = .{
896 .llvm_name = "loop-align",
897 .description = "Prefer 32-bit alignment for loops",
898 .dependencies = featureSet(&[_]Feature{}),
899 };
900 result[@enumToInt(Feature.m3)] = .{
901 .llvm_name = "m3",
902 .description = "Cortex-M3 ARM processors",
903 .dependencies = featureSet(&[_]Feature{}),
904 };
905 result[@enumToInt(Feature.mclass)] = .{
906 .llvm_name = "mclass",
907 .description = "Is microcontroller profile ('M' series)",
908 .dependencies = featureSet(&[_]Feature{}),
909 };
910 result[@enumToInt(Feature.mp)] = .{
911 .llvm_name = "mp",
912 .description = "Supports Multiprocessing extension",
913 .dependencies = featureSet(&[_]Feature{}),
914 };
915 result[@enumToInt(Feature.muxed_units)] = .{
916 .llvm_name = "muxed-units",
917 .description = "Has muxed AGU and NEON/FPU",
918 .dependencies = featureSet(&[_]Feature{}),
919 };
920 result[@enumToInt(Feature.mve)] = .{
921 .llvm_name = "mve",
922 .description = "Support M-Class Vector Extension with integer ops",
923 .dependencies = featureSet(&[_]Feature{
924 .dsp,
925 .fpregs16,
926 .fpregs64,
927 .v8_1m_main,
928 }),
929 };
930 result[@enumToInt(Feature.mve_fp)] = .{
931 .llvm_name = "mve.fp",
932 .description = "Support M-Class Vector Extension with integer and floating ops",
933 .dependencies = featureSet(&[_]Feature{
934 .fp_armv8d16sp,
935 .fullfp16,
936 .mve,
937 }),
938 };
939 result[@enumToInt(Feature.nacl_trap)] = .{
940 .llvm_name = "nacl-trap",
941 .description = "NaCl trap",
942 .dependencies = featureSet(&[_]Feature{}),
943 };
944 result[@enumToInt(Feature.neon)] = .{
945 .llvm_name = "neon",
946 .description = "Enable NEON instructions",
947 .dependencies = featureSet(&[_]Feature{
948 .vfp3,
949 }),
950 };
951 result[@enumToInt(Feature.neon_fpmovs)] = .{
952 .llvm_name = "neon-fpmovs",
953 .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
954 .dependencies = featureSet(&[_]Feature{}),
955 };
956 result[@enumToInt(Feature.neonfp)] = .{
957 .llvm_name = "neonfp",
958 .description = "Use NEON for single precision FP",
959 .dependencies = featureSet(&[_]Feature{}),
960 };
961 result[@enumToInt(Feature.no_branch_predictor)] = .{
962 .llvm_name = "no-branch-predictor",
963 .description = "Has no branch predictor",
964 .dependencies = featureSet(&[_]Feature{}),
965 };
966 result[@enumToInt(Feature.no_movt)] = .{
967 .llvm_name = "no-movt",
968 .description = "Don't use movt/movw pairs for 32-bit imms",
969 .dependencies = featureSet(&[_]Feature{}),
970 };
971 result[@enumToInt(Feature.no_neg_immediates)] = .{
972 .llvm_name = "no-neg-immediates",
973 .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
974 .dependencies = featureSet(&[_]Feature{}),
975 };
976 result[@enumToInt(Feature.noarm)] = .{
977 .llvm_name = "noarm",
978 .description = "Does not support ARM mode execution",
979 .dependencies = featureSet(&[_]Feature{}),
980 };
981 result[@enumToInt(Feature.nonpipelined_vfp)] = .{
982 .llvm_name = "nonpipelined-vfp",
983 .description = "VFP instructions are not pipelined",
984 .dependencies = featureSet(&[_]Feature{}),
985 };
986 result[@enumToInt(Feature.perfmon)] = .{
987 .llvm_name = "perfmon",
988 .description = "Enable support for Performance Monitor extensions",
989 .dependencies = featureSet(&[_]Feature{}),
990 };
991 result[@enumToInt(Feature.prefer_ishst)] = .{
992 .llvm_name = "prefer-ishst",
993 .description = "Prefer ISHST barriers",
994 .dependencies = featureSet(&[_]Feature{}),
995 };
996 result[@enumToInt(Feature.prefer_vmovsr)] = .{
997 .llvm_name = "prefer-vmovsr",
998 .description = "Prefer VMOVSR",
999 .dependencies = featureSet(&[_]Feature{}),
1000 };
1001 result[@enumToInt(Feature.prof_unpr)] = .{
1002 .llvm_name = "prof-unpr",
1003 .description = "Is profitable to unpredicate",
1004 .dependencies = featureSet(&[_]Feature{}),
1005 };
1006 result[@enumToInt(Feature.r4)] = .{
1007 .llvm_name = "r4",
1008 .description = "Cortex-R4 ARM processors",
1009 .dependencies = featureSet(&[_]Feature{}),
1010 };
1011 result[@enumToInt(Feature.r5)] = .{
1012 .llvm_name = "r5",
1013 .description = "Cortex-R5 ARM processors",
1014 .dependencies = featureSet(&[_]Feature{}),
1015 };
1016 result[@enumToInt(Feature.r52)] = .{
1017 .llvm_name = "r52",
1018 .description = "Cortex-R52 ARM processors",
1019 .dependencies = featureSet(&[_]Feature{}),
1020 };
1021 result[@enumToInt(Feature.r7)] = .{
1022 .llvm_name = "r7",
1023 .description = "Cortex-R7 ARM processors",
1024 .dependencies = featureSet(&[_]Feature{}),
1025 };
1026 result[@enumToInt(Feature.ras)] = .{
1027 .llvm_name = "ras",
1028 .description = "Enable Reliability, Availability and Serviceability extensions",
1029 .dependencies = featureSet(&[_]Feature{}),
1030 };
1031 result[@enumToInt(Feature.rclass)] = .{
1032 .llvm_name = "rclass",
1033 .description = "Is realtime profile ('R' series)",
1034 .dependencies = featureSet(&[_]Feature{}),
1035 };
1036 result[@enumToInt(Feature.read_tp_hard)] = .{
1037 .llvm_name = "read-tp-hard",
1038 .description = "Reading thread pointer from register",
1039 .dependencies = featureSet(&[_]Feature{}),
1040 };
1041 result[@enumToInt(Feature.reserve_r9)] = .{
1042 .llvm_name = "reserve-r9",
1043 .description = "Reserve R9, making it unavailable as GPR",
1044 .dependencies = featureSet(&[_]Feature{}),
1045 };
1046 result[@enumToInt(Feature.ret_addr_stack)] = .{
1047 .llvm_name = "ret-addr-stack",
1048 .description = "Has return address stack",
1049 .dependencies = featureSet(&[_]Feature{}),
1050 };
1051 result[@enumToInt(Feature.sb)] = .{
1052 .llvm_name = "sb",
1053 .description = "Enable v8.5a Speculation Barrier",
1054 .dependencies = featureSet(&[_]Feature{}),
1055 };
1056 result[@enumToInt(Feature.sha2)] = .{
1057 .llvm_name = "sha2",
1058 .description = "Enable SHA1 and SHA256 support",
1059 .dependencies = featureSet(&[_]Feature{
1060 .neon,
1061 }),
1062 };
1063 result[@enumToInt(Feature.slow_fp_brcc)] = .{
1064 .llvm_name = "slow-fp-brcc",
1065 .description = "FP compare + branch is slow",
1066 .dependencies = featureSet(&[_]Feature{}),
1067 };
1068 result[@enumToInt(Feature.slow_load_D_subreg)] = .{
1069 .llvm_name = "slow-load-D-subreg",
1070 .description = "Loading into D subregs is slow",
1071 .dependencies = featureSet(&[_]Feature{}),
1072 };
1073 result[@enumToInt(Feature.slow_odd_reg)] = .{
1074 .llvm_name = "slow-odd-reg",
1075 .description = "VLDM/VSTM starting with an odd register is slow",
1076 .dependencies = featureSet(&[_]Feature{}),
1077 };
1078 result[@enumToInt(Feature.slow_vdup32)] = .{
1079 .llvm_name = "slow-vdup32",
1080 .description = "Has slow VDUP32 - prefer VMOV",
1081 .dependencies = featureSet(&[_]Feature{}),
1082 };
1083 result[@enumToInt(Feature.slow_vgetlni32)] = .{
1084 .llvm_name = "slow-vgetlni32",
1085 .description = "Has slow VGETLNi32 - prefer VMOV",
1086 .dependencies = featureSet(&[_]Feature{}),
1087 };
1088 result[@enumToInt(Feature.slowfpvmlx)] = .{
1089 .llvm_name = "slowfpvmlx",
1090 .description = "Disable VFP / NEON MAC instructions",
1091 .dependencies = featureSet(&[_]Feature{}),
1092 };
1093 result[@enumToInt(Feature.soft_float)] = .{
1094 .llvm_name = "soft-float",
1095 .description = "Use software floating point features.",
1096 .dependencies = featureSet(&[_]Feature{}),
1097 };
1098 result[@enumToInt(Feature.splat_vfp_neon)] = .{
1099 .llvm_name = "splat-vfp-neon",
1100 .description = "Splat register from VFP to NEON",
1101 .dependencies = featureSet(&[_]Feature{
1102 .dont_widen_vmovs,
1103 }),
1104 };
1105 result[@enumToInt(Feature.strict_align)] = .{
1106 .llvm_name = "strict-align",
1107 .description = "Disallow all unaligned memory access",
1108 .dependencies = featureSet(&[_]Feature{}),
1109 };
1110 result[@enumToInt(Feature.swift)] = .{
1111 .llvm_name = "swift",
1112 .description = "Swift ARM processors",
1113 .dependencies = featureSet(&[_]Feature{}),
1114 };
1115 result[@enumToInt(Feature.thumb_mode)] = .{
1116 .llvm_name = "thumb-mode",
1117 .description = "Thumb mode",
1118 .dependencies = featureSet(&[_]Feature{}),
1119 };
1120 result[@enumToInt(Feature.thumb2)] = .{
1121 .llvm_name = "thumb2",
1122 .description = "Enable Thumb2 instructions",
1123 .dependencies = featureSet(&[_]Feature{}),
1124 };
1125 result[@enumToInt(Feature.trustzone)] = .{
1126 .llvm_name = "trustzone",
1127 .description = "Enable support for TrustZone security extensions",
1128 .dependencies = featureSet(&[_]Feature{}),
1129 };
1130 result[@enumToInt(Feature.use_aa)] = .{
1131 .llvm_name = "use-aa",
1132 .description = "Use alias analysis during codegen",
1133 .dependencies = featureSet(&[_]Feature{}),
1134 };
1135 result[@enumToInt(Feature.use_misched)] = .{
1136 .llvm_name = "use-misched",
1137 .description = "Use the MachineScheduler",
1138 .dependencies = featureSet(&[_]Feature{}),
1139 };
1140 result[@enumToInt(Feature.v4t)] = .{
1141 .llvm_name = "v4t",
1142 .description = "Support ARM v4T instructions",
1143 .dependencies = featureSet(&[_]Feature{}),
1144 };
1145 result[@enumToInt(Feature.v5t)] = .{
1146 .llvm_name = "v5t",
1147 .description = "Support ARM v5T instructions",
1148 .dependencies = featureSet(&[_]Feature{
1149 .v4t,
1150 }),
1151 };
1152 result[@enumToInt(Feature.v5te)] = .{
1153 .llvm_name = "v5te",
1154 .description = "Support ARM v5TE, v5TEj, and v5TExp instructions",
1155 .dependencies = featureSet(&[_]Feature{
1156 .v5t,
1157 }),
1158 };
1159 result[@enumToInt(Feature.v6)] = .{
1160 .llvm_name = "v6",
1161 .description = "Support ARM v6 instructions",
1162 .dependencies = featureSet(&[_]Feature{
1163 .v5te,
1164 }),
1165 };
1166 result[@enumToInt(Feature.v6k)] = .{
1167 .llvm_name = "v6k",
1168 .description = "Support ARM v6k instructions",
1169 .dependencies = featureSet(&[_]Feature{
1170 .v6,
1171 }),
1172 };
1173 result[@enumToInt(Feature.v6m)] = .{
1174 .llvm_name = "v6m",
1175 .description = "Support ARM v6M instructions",
1176 .dependencies = featureSet(&[_]Feature{
1177 .v6,
1178 }),
1179 };
1180 result[@enumToInt(Feature.v6t2)] = .{
1181 .llvm_name = "v6t2",
1182 .description = "Support ARM v6t2 instructions",
1183 .dependencies = featureSet(&[_]Feature{
1184 .thumb2,
1185 .v6k,
1186 .v8m,
1187 }),
1188 };
1189 result[@enumToInt(Feature.v7)] = .{
1190 .llvm_name = "v7",
1191 .description = "Support ARM v7 instructions",
1192 .dependencies = featureSet(&[_]Feature{
1193 .perfmon,
1194 .v6t2,
1195 .v7clrex,
1196 }),
1197 };
1198 result[@enumToInt(Feature.v7clrex)] = .{
1199 .llvm_name = "v7clrex",
1200 .description = "Has v7 clrex instruction",
1201 .dependencies = featureSet(&[_]Feature{}),
1202 };
1203 result[@enumToInt(Feature.v8)] = .{
1204 .llvm_name = "v8",
1205 .description = "Support ARM v8 instructions",
1206 .dependencies = featureSet(&[_]Feature{
1207 .acquire_release,
1208 .v7,
1209 }),
1210 };
1211 result[@enumToInt(Feature.v8_1a)] = .{
1212 .llvm_name = "v8.1a",
1213 .description = "Support ARM v8.1a instructions",
1214 .dependencies = featureSet(&[_]Feature{
1215 .v8,
1216 }),
1217 };
1218 result[@enumToInt(Feature.v8_1m_main)] = .{
1219 .llvm_name = "v8.1m.main",
1220 .description = "Support ARM v8-1M Mainline instructions",
1221 .dependencies = featureSet(&[_]Feature{
1222 .v8m_main,
1223 }),
1224 };
1225 result[@enumToInt(Feature.v8_2a)] = .{
1226 .llvm_name = "v8.2a",
1227 .description = "Support ARM v8.2a instructions",
1228 .dependencies = featureSet(&[_]Feature{
1229 .v8_1a,
1230 }),
1231 };
1232 result[@enumToInt(Feature.v8_3a)] = .{
1233 .llvm_name = "v8.3a",
1234 .description = "Support ARM v8.3a instructions",
1235 .dependencies = featureSet(&[_]Feature{
1236 .v8_2a,
1237 }),
1238 };
1239 result[@enumToInt(Feature.v8_4a)] = .{
1240 .llvm_name = "v8.4a",
1241 .description = "Support ARM v8.4a instructions",
1242 .dependencies = featureSet(&[_]Feature{
1243 .dotprod,
1244 .v8_3a,
1245 }),
1246 };
1247 result[@enumToInt(Feature.v8_5a)] = .{
1248 .llvm_name = "v8.5a",
1249 .description = "Support ARM v8.5a instructions",
1250 .dependencies = featureSet(&[_]Feature{
1251 .sb,
1252 .v8_4a,
1253 }),
1254 };
1255 result[@enumToInt(Feature.v8m)] = .{
1256 .llvm_name = "v8m",
1257 .description = "Support ARM v8M Baseline instructions",
1258 .dependencies = featureSet(&[_]Feature{
1259 .v6m,
1260 }),
1261 };
1262 result[@enumToInt(Feature.v8m_main)] = .{
1263 .llvm_name = "v8m.main",
1264 .description = "Support ARM v8M Mainline instructions",
1265 .dependencies = featureSet(&[_]Feature{
1266 .v7,
1267 }),
1268 };
1269 result[@enumToInt(Feature.vfp2)] = .{
1270 .llvm_name = "vfp2",
1271 .description = "Enable VFP2 instructions",
1272 .dependencies = featureSet(&[_]Feature{
1273 .vfp2d16,
1274 .vfp2sp,
1275 }),
1276 };
1277 result[@enumToInt(Feature.vfp2d16)] = .{
1278 .llvm_name = "vfp2d16",
1279 .description = "Enable VFP2 instructions",
1280 .dependencies = featureSet(&[_]Feature{
1281 .fp64,
1282 .vfp2d16sp,
1283 }),
1284 };
1285 result[@enumToInt(Feature.vfp2d16sp)] = .{
1286 .llvm_name = "vfp2d16sp",
1287 .description = "Enable VFP2 instructions with no double precision",
1288 .dependencies = featureSet(&[_]Feature{
1289 .fpregs,
1290 }),
1291 };
1292 result[@enumToInt(Feature.vfp2sp)] = .{
1293 .llvm_name = "vfp2sp",
1294 .description = "Enable VFP2 instructions with no double precision",
1295 .dependencies = featureSet(&[_]Feature{
1296 .vfp2d16sp,
1297 }),
1298 };
1299 result[@enumToInt(Feature.vfp3)] = .{
1300 .llvm_name = "vfp3",
1301 .description = "Enable VFP3 instructions",
1302 .dependencies = featureSet(&[_]Feature{
1303 .vfp3d16,
1304 .vfp3sp,
1305 }),
1306 };
1307 result[@enumToInt(Feature.vfp3d16)] = .{
1308 .llvm_name = "vfp3d16",
1309 .description = "Enable VFP3 instructions with only 16 d-registers",
1310 .dependencies = featureSet(&[_]Feature{
1311 .fp64,
1312 .vfp2,
1313 .vfp3d16sp,
1314 }),
1315 };
1316 result[@enumToInt(Feature.vfp3d16sp)] = .{
1317 .llvm_name = "vfp3d16sp",
1318 .description = "Enable VFP3 instructions with only 16 d-registers and no double precision",
1319 .dependencies = featureSet(&[_]Feature{
1320 .vfp2sp,
1321 }),
1322 };
1323 result[@enumToInt(Feature.vfp3sp)] = .{
1324 .llvm_name = "vfp3sp",
1325 .description = "Enable VFP3 instructions with no double precision",
1326 .dependencies = featureSet(&[_]Feature{
1327 .d32,
1328 .vfp3d16sp,
1329 }),
1330 };
1331 result[@enumToInt(Feature.vfp4)] = .{
1332 .llvm_name = "vfp4",
1333 .description = "Enable VFP4 instructions",
1334 .dependencies = featureSet(&[_]Feature{
1335 .fp16,
1336 .vfp3,
1337 .vfp4d16,
1338 .vfp4sp,
1339 }),
1340 };
1341 result[@enumToInt(Feature.vfp4d16)] = .{
1342 .llvm_name = "vfp4d16",
1343 .description = "Enable VFP4 instructions with only 16 d-registers",
1344 .dependencies = featureSet(&[_]Feature{
1345 .fp16,
1346 .fp64,
1347 .vfp3d16,
1348 .vfp4d16sp,
1349 }),
1350 };
1351 result[@enumToInt(Feature.vfp4d16sp)] = .{
1352 .llvm_name = "vfp4d16sp",
1353 .description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
1354 .dependencies = featureSet(&[_]Feature{
1355 .fp16,
1356 .vfp3d16sp,
1357 }),
1358 };
1359 result[@enumToInt(Feature.vfp4sp)] = .{
1360 .llvm_name = "vfp4sp",
1361 .description = "Enable VFP4 instructions with no double precision",
1362 .dependencies = featureSet(&[_]Feature{
1363 .d32,
1364 .fp16,
1365 .vfp3sp,
1366 .vfp4d16sp,
1367 }),
1368 };
1369 result[@enumToInt(Feature.virtualization)] = .{
1370 .llvm_name = "virtualization",
1371 .description = "Supports Virtualization extension",
1372 .dependencies = featureSet(&[_]Feature{
1373 .hwdiv,
1374 .hwdiv_arm,
1375 }),
1376 };
1377 result[@enumToInt(Feature.vldn_align)] = .{
1378 .llvm_name = "vldn-align",
1379 .description = "Check for VLDn unaligned access",
1380 .dependencies = featureSet(&[_]Feature{}),
1381 };
1382 result[@enumToInt(Feature.vmlx_forwarding)] = .{
1383 .llvm_name = "vmlx-forwarding",
1384 .description = "Has multiplier accumulator forwarding",
1385 .dependencies = featureSet(&[_]Feature{}),
1386 };
1387 result[@enumToInt(Feature.vmlx_hazards)] = .{
1388 .llvm_name = "vmlx-hazards",
1389 .description = "Has VMLx hazards",
1390 .dependencies = featureSet(&[_]Feature{}),
1391 };
1392 result[@enumToInt(Feature.wide_stride_vfp)] = .{
1393 .llvm_name = "wide-stride-vfp",
1394 .description = "Use a wide stride when allocating VFP registers",
1395 .dependencies = featureSet(&[_]Feature{}),
1396 };
1397 result[@enumToInt(Feature.xscale)] = .{
1398 .llvm_name = "xscale",
1399 .description = "ARMv5te architecture",
1400 .dependencies = featureSet(&[_]Feature{
1401 .armv5te,
1402 }),
1403 };
1404 result[@enumToInt(Feature.zcz)] = .{
1405 .llvm_name = "zcz",
1406 .description = "Has zero-cycle zeroing instructions",
1407 .dependencies = featureSet(&[_]Feature{}),
1408 };
1409 const ti = @typeInfo(Feature);
1410 for (result) |*elem, i| {
1411 elem.index = i;
1412 elem.name = ti.Enum.fields[i].name;
1413 }
1414 break :blk result;
1415};
1416
1417pub const cpu = struct {
1418 pub const arm1020e = Cpu{
1419 .name = "arm1020e",
1420 .llvm_name = "arm1020e",
1421 .features = featureSet(&[_]Feature{
1422 .armv5te,
1423 }),
1424 };
1425 pub const arm1020t = Cpu{
1426 .name = "arm1020t",
1427 .llvm_name = "arm1020t",
1428 .features = featureSet(&[_]Feature{
1429 .armv5t,
1430 }),
1431 };
1432 pub const arm1022e = Cpu{
1433 .name = "arm1022e",
1434 .llvm_name = "arm1022e",
1435 .features = featureSet(&[_]Feature{
1436 .armv5te,
1437 }),
1438 };
1439 pub const arm10e = Cpu{
1440 .name = "arm10e",
1441 .llvm_name = "arm10e",
1442 .features = featureSet(&[_]Feature{
1443 .armv5te,
1444 }),
1445 };
1446 pub const arm10tdmi = Cpu{
1447 .name = "arm10tdmi",
1448 .llvm_name = "arm10tdmi",
1449 .features = featureSet(&[_]Feature{
1450 .armv5t,
1451 }),
1452 };
1453 pub const arm1136j_s = Cpu{
1454 .name = "arm1136j_s",
1455 .llvm_name = "arm1136j-s",
1456 .features = featureSet(&[_]Feature{
1457 .armv6,
1458 }),
1459 };
1460 pub const arm1136jf_s = Cpu{
1461 .name = "arm1136jf_s",
1462 .llvm_name = "arm1136jf-s",
1463 .features = featureSet(&[_]Feature{
1464 .armv6,
1465 .slowfpvmlx,
1466 .vfp2,
1467 }),
1468 };
1469 pub const arm1156t2_s = Cpu{
1470 .name = "arm1156t2_s",
1471 .llvm_name = "arm1156t2-s",
1472 .features = featureSet(&[_]Feature{
1473 .armv6t2,
1474 }),
1475 };
1476 pub const arm1156t2f_s = Cpu{
1477 .name = "arm1156t2f_s",
1478 .llvm_name = "arm1156t2f-s",
1479 .features = featureSet(&[_]Feature{
1480 .armv6t2,
1481 .slowfpvmlx,
1482 .vfp2,
1483 }),
1484 };
1485 pub const arm1176j_s = Cpu{
1486 .name = "arm1176j_s",
1487 .llvm_name = "arm1176j-s",
1488 .features = featureSet(&[_]Feature{
1489 .armv6kz,
1490 }),
1491 };
1492 pub const arm1176jz_s = Cpu{
1493 .name = "arm1176jz_s",
1494 .llvm_name = "arm1176jz-s",
1495 .features = featureSet(&[_]Feature{
1496 .armv6kz,
1497 }),
1498 };
1499 pub const arm1176jzf_s = Cpu{
1500 .name = "arm1176jzf_s",
1501 .llvm_name = "arm1176jzf-s",
1502 .features = featureSet(&[_]Feature{
1503 .armv6kz,
1504 .slowfpvmlx,
1505 .vfp2,
1506 }),
1507 };
1508 pub const arm710t = Cpu{
1509 .name = "arm710t",
1510 .llvm_name = "arm710t",
1511 .features = featureSet(&[_]Feature{
1512 .armv4t,
1513 }),
1514 };
1515 pub const arm720t = Cpu{
1516 .name = "arm720t",
1517 .llvm_name = "arm720t",
1518 .features = featureSet(&[_]Feature{
1519 .armv4t,
1520 }),
1521 };
1522 pub const arm7tdmi = Cpu{
1523 .name = "arm7tdmi",
1524 .llvm_name = "arm7tdmi",
1525 .features = featureSet(&[_]Feature{
1526 .armv4t,
1527 }),
1528 };
1529 pub const arm7tdmi_s = Cpu{
1530 .name = "arm7tdmi_s",
1531 .llvm_name = "arm7tdmi-s",
1532 .features = featureSet(&[_]Feature{
1533 .armv4t,
1534 }),
1535 };
1536 pub const arm8 = Cpu{
1537 .name = "arm8",
1538 .llvm_name = "arm8",
1539 .features = featureSet(&[_]Feature{
1540 .armv4,
1541 }),
1542 };
1543 pub const arm810 = Cpu{
1544 .name = "arm810",
1545 .llvm_name = "arm810",
1546 .features = featureSet(&[_]Feature{
1547 .armv4,
1548 }),
1549 };
1550 pub const arm9 = Cpu{
1551 .name = "arm9",
1552 .llvm_name = "arm9",
1553 .features = featureSet(&[_]Feature{
1554 .armv4t,
1555 }),
1556 };
1557 pub const arm920 = Cpu{
1558 .name = "arm920",
1559 .llvm_name = "arm920",
1560 .features = featureSet(&[_]Feature{
1561 .armv4t,
1562 }),
1563 };
1564 pub const arm920t = Cpu{
1565 .name = "arm920t",
1566 .llvm_name = "arm920t",
1567 .features = featureSet(&[_]Feature{
1568 .armv4t,
1569 }),
1570 };
1571 pub const arm922t = Cpu{
1572 .name = "arm922t",
1573 .llvm_name = "arm922t",
1574 .features = featureSet(&[_]Feature{
1575 .armv4t,
1576 }),
1577 };
1578 pub const arm926ej_s = Cpu{
1579 .name = "arm926ej_s",
1580 .llvm_name = "arm926ej-s",
1581 .features = featureSet(&[_]Feature{
1582 .armv5te,
1583 }),
1584 };
1585 pub const arm940t = Cpu{
1586 .name = "arm940t",
1587 .llvm_name = "arm940t",
1588 .features = featureSet(&[_]Feature{
1589 .armv4t,
1590 }),
1591 };
1592 pub const arm946e_s = Cpu{
1593 .name = "arm946e_s",
1594 .llvm_name = "arm946e-s",
1595 .features = featureSet(&[_]Feature{
1596 .armv5te,
1597 }),
1598 };
1599 pub const arm966e_s = Cpu{
1600 .name = "arm966e_s",
1601 .llvm_name = "arm966e-s",
1602 .features = featureSet(&[_]Feature{
1603 .armv5te,
1604 }),
1605 };
1606 pub const arm968e_s = Cpu{
1607 .name = "arm968e_s",
1608 .llvm_name = "arm968e-s",
1609 .features = featureSet(&[_]Feature{
1610 .armv5te,
1611 }),
1612 };
1613 pub const arm9e = Cpu{
1614 .name = "arm9e",
1615 .llvm_name = "arm9e",
1616 .features = featureSet(&[_]Feature{
1617 .armv5te,
1618 }),
1619 };
1620 pub const arm9tdmi = Cpu{
1621 .name = "arm9tdmi",
1622 .llvm_name = "arm9tdmi",
1623 .features = featureSet(&[_]Feature{
1624 .armv4t,
1625 }),
1626 };
1627 pub const cortex_a12 = Cpu{
1628 .name = "cortex_a12",
1629 .llvm_name = "cortex-a12",
1630 .features = featureSet(&[_]Feature{
1631 .a12,
1632 .armv7_a,
1633 .avoid_partial_cpsr,
1634 .mp,
1635 .ret_addr_stack,
1636 .trustzone,
1637 .vfp4,
1638 .virtualization,
1639 .vmlx_forwarding,
1640 }),
1641 };
1642 pub const cortex_a15 = Cpu{
1643 .name = "cortex_a15",
1644 .llvm_name = "cortex-a15",
1645 .features = featureSet(&[_]Feature{
1646 .a15,
1647 .armv7_a,
1648 .avoid_partial_cpsr,
1649 .dont_widen_vmovs,
1650 .mp,
1651 .muxed_units,
1652 .ret_addr_stack,
1653 .splat_vfp_neon,
1654 .trustzone,
1655 .vfp4,
1656 .virtualization,
1657 .vldn_align,
1658 }),
1659 };
1660 pub const cortex_a17 = Cpu{
1661 .name = "cortex_a17",
1662 .llvm_name = "cortex-a17",
1663 .features = featureSet(&[_]Feature{
1664 .a17,
1665 .armv7_a,
1666 .avoid_partial_cpsr,
1667 .mp,
1668 .ret_addr_stack,
1669 .trustzone,
1670 .vfp4,
1671 .virtualization,
1672 .vmlx_forwarding,
1673 }),
1674 };
1675 pub const cortex_a32 = Cpu{
1676 .name = "cortex_a32",
1677 .llvm_name = "cortex-a32",
1678 .features = featureSet(&[_]Feature{
1679 .armv8_a,
1680 .crc,
1681 .crypto,
1682 .hwdiv,
1683 .hwdiv_arm,
1684 }),
1685 };
1686 pub const cortex_a35 = Cpu{
1687 .name = "cortex_a35",
1688 .llvm_name = "cortex-a35",
1689 .features = featureSet(&[_]Feature{
1690 .a35,
1691 .armv8_a,
1692 .crc,
1693 .crypto,
1694 .hwdiv,
1695 .hwdiv_arm,
1696 }),
1697 };
1698 pub const cortex_a5 = Cpu{
1699 .name = "cortex_a5",
1700 .llvm_name = "cortex-a5",
1701 .features = featureSet(&[_]Feature{
1702 .a5,
1703 .armv7_a,
1704 .mp,
1705 .ret_addr_stack,
1706 .slow_fp_brcc,
1707 .slowfpvmlx,
1708 .trustzone,
1709 .vfp4,
1710 .vmlx_forwarding,
1711 }),
1712 };
1713 pub const cortex_a53 = Cpu{
1714 .name = "cortex_a53",
1715 .llvm_name = "cortex-a53",
1716 .features = featureSet(&[_]Feature{
1717 .a53,
1718 .armv8_a,
1719 .crc,
1720 .crypto,
1721 .fpao,
1722 .hwdiv,
1723 .hwdiv_arm,
1724 }),
1725 };
1726 pub const cortex_a55 = Cpu{
1727 .name = "cortex_a55",
1728 .llvm_name = "cortex-a55",
1729 .features = featureSet(&[_]Feature{
1730 .a55,
1731 .armv8_2_a,
1732 .dotprod,
1733 .hwdiv,
1734 .hwdiv_arm,
1735 }),
1736 };
1737 pub const cortex_a57 = Cpu{
1738 .name = "cortex_a57",
1739 .llvm_name = "cortex-a57",
1740 .features = featureSet(&[_]Feature{
1741 .a57,
1742 .armv8_a,
1743 .avoid_partial_cpsr,
1744 .cheap_predicable_cpsr,
1745 .crc,
1746 .crypto,
1747 .fpao,
1748 .hwdiv,
1749 .hwdiv_arm,
1750 }),
1751 };
1752 pub const cortex_a7 = Cpu{
1753 .name = "cortex_a7",
1754 .llvm_name = "cortex-a7",
1755 .features = featureSet(&[_]Feature{
1756 .a7,
1757 .armv7_a,
1758 .mp,
1759 .ret_addr_stack,
1760 .slow_fp_brcc,
1761 .slowfpvmlx,
1762 .trustzone,
1763 .vfp4,
1764 .virtualization,
1765 .vmlx_forwarding,
1766 .vmlx_hazards,
1767 }),
1768 };
1769 pub const cortex_a72 = Cpu{
1770 .name = "cortex_a72",
1771 .llvm_name = "cortex-a72",
1772 .features = featureSet(&[_]Feature{
1773 .a72,
1774 .armv8_a,
1775 .crc,
1776 .crypto,
1777 .hwdiv,
1778 .hwdiv_arm,
1779 }),
1780 };
1781 pub const cortex_a73 = Cpu{
1782 .name = "cortex_a73",
1783 .llvm_name = "cortex-a73",
1784 .features = featureSet(&[_]Feature{
1785 .a73,
1786 .armv8_a,
1787 .crc,
1788 .crypto,
1789 .hwdiv,
1790 .hwdiv_arm,
1791 }),
1792 };
1793 pub const cortex_a75 = Cpu{
1794 .name = "cortex_a75",
1795 .llvm_name = "cortex-a75",
1796 .features = featureSet(&[_]Feature{
1797 .a75,
1798 .armv8_2_a,
1799 .dotprod,
1800 .hwdiv,
1801 .hwdiv_arm,
1802 }),
1803 };
1804 pub const cortex_a76 = Cpu{
1805 .name = "cortex_a76",
1806 .llvm_name = "cortex-a76",
1807 .features = featureSet(&[_]Feature{
1808 .a76,
1809 .armv8_2_a,
1810 .crc,
1811 .crypto,
1812 .dotprod,
1813 .fullfp16,
1814 .hwdiv,
1815 .hwdiv_arm,
1816 }),
1817 };
1818 pub const cortex_a76ae = Cpu{
1819 .name = "cortex_a76ae",
1820 .llvm_name = "cortex-a76ae",
1821 .features = featureSet(&[_]Feature{
1822 .a76,
1823 .armv8_2_a,
1824 .crc,
1825 .crypto,
1826 .dotprod,
1827 .fullfp16,
1828 .hwdiv,
1829 .hwdiv_arm,
1830 }),
1831 };
1832 pub const cortex_a8 = Cpu{
1833 .name = "cortex_a8",
1834 .llvm_name = "cortex-a8",
1835 .features = featureSet(&[_]Feature{
1836 .a8,
1837 .armv7_a,
1838 .nonpipelined_vfp,
1839 .ret_addr_stack,
1840 .slow_fp_brcc,
1841 .slowfpvmlx,
1842 .trustzone,
1843 .vmlx_forwarding,
1844 .vmlx_hazards,
1845 }),
1846 };
1847 pub const cortex_a9 = Cpu{
1848 .name = "cortex_a9",
1849 .llvm_name = "cortex-a9",
1850 .features = featureSet(&[_]Feature{
1851 .a9,
1852 .armv7_a,
1853 .avoid_partial_cpsr,
1854 .expand_fp_mlx,
1855 .fp16,
1856 .mp,
1857 .muxed_units,
1858 .neon_fpmovs,
1859 .prefer_vmovsr,
1860 .ret_addr_stack,
1861 .trustzone,
1862 .vldn_align,
1863 .vmlx_forwarding,
1864 .vmlx_hazards,
1865 }),
1866 };
1867 pub const cortex_m0 = Cpu{
1868 .name = "cortex_m0",
1869 .llvm_name = "cortex-m0",
1870 .features = featureSet(&[_]Feature{
1871 .armv6_m,
1872 }),
1873 };
1874 pub const cortex_m0plus = Cpu{
1875 .name = "cortex_m0plus",
1876 .llvm_name = "cortex-m0plus",
1877 .features = featureSet(&[_]Feature{
1878 .armv6_m,
1879 }),
1880 };
1881 pub const cortex_m1 = Cpu{
1882 .name = "cortex_m1",
1883 .llvm_name = "cortex-m1",
1884 .features = featureSet(&[_]Feature{
1885 .armv6_m,
1886 }),
1887 };
1888 pub const cortex_m23 = Cpu{
1889 .name = "cortex_m23",
1890 .llvm_name = "cortex-m23",
1891 .features = featureSet(&[_]Feature{
1892 .armv8_m_base,
1893 .no_movt,
1894 }),
1895 };
1896 pub const cortex_m3 = Cpu{
1897 .name = "cortex_m3",
1898 .llvm_name = "cortex-m3",
1899 .features = featureSet(&[_]Feature{
1900 .armv7_m,
1901 .loop_align,
1902 .m3,
1903 .no_branch_predictor,
1904 .use_aa,
1905 .use_misched,
1906 }),
1907 };
1908 pub const cortex_m33 = Cpu{
1909 .name = "cortex_m33",
1910 .llvm_name = "cortex-m33",
1911 .features = featureSet(&[_]Feature{
1912 .armv8_m_main,
1913 .dsp,
1914 .fp_armv8d16sp,
1915 .loop_align,
1916 .no_branch_predictor,
1917 .slowfpvmlx,
1918 .use_aa,
1919 .use_misched,
1920 }),
1921 };
1922 pub const cortex_m35p = Cpu{
1923 .name = "cortex_m35p",
1924 .llvm_name = "cortex-m35p",
1925 .features = featureSet(&[_]Feature{
1926 .armv8_m_main,
1927 .dsp,
1928 .fp_armv8d16sp,
1929 .loop_align,
1930 .no_branch_predictor,
1931 .slowfpvmlx,
1932 .use_aa,
1933 .use_misched,
1934 }),
1935 };
1936 pub const cortex_m4 = Cpu{
1937 .name = "cortex_m4",
1938 .llvm_name = "cortex-m4",
1939 .features = featureSet(&[_]Feature{
1940 .armv7e_m,
1941 .loop_align,
1942 .no_branch_predictor,
1943 .slowfpvmlx,
1944 .use_aa,
1945 .use_misched,
1946 .vfp4d16sp,
1947 }),
1948 };
1949 pub const cortex_m7 = Cpu{
1950 .name = "cortex_m7",
1951 .llvm_name = "cortex-m7",
1952 .features = featureSet(&[_]Feature{
1953 .armv7e_m,
1954 .fp_armv8d16,
1955 }),
1956 };
1957 pub const cortex_r4 = Cpu{
1958 .name = "cortex_r4",
1959 .llvm_name = "cortex-r4",
1960 .features = featureSet(&[_]Feature{
1961 .armv7_r,
1962 .avoid_partial_cpsr,
1963 .r4,
1964 .ret_addr_stack,
1965 }),
1966 };
1967 pub const cortex_r4f = Cpu{
1968 .name = "cortex_r4f",
1969 .llvm_name = "cortex-r4f",
1970 .features = featureSet(&[_]Feature{
1971 .armv7_r,
1972 .avoid_partial_cpsr,
1973 .r4,
1974 .ret_addr_stack,
1975 .slow_fp_brcc,
1976 .slowfpvmlx,
1977 .vfp3d16,
1978 }),
1979 };
1980 pub const cortex_r5 = Cpu{
1981 .name = "cortex_r5",
1982 .llvm_name = "cortex-r5",
1983 .features = featureSet(&[_]Feature{
1984 .armv7_r,
1985 .avoid_partial_cpsr,
1986 .hwdiv_arm,
1987 .r5,
1988 .ret_addr_stack,
1989 .slow_fp_brcc,
1990 .slowfpvmlx,
1991 .vfp3d16,
1992 }),
1993 };
1994 pub const cortex_r52 = Cpu{
1995 .name = "cortex_r52",
1996 .llvm_name = "cortex-r52",
1997 .features = featureSet(&[_]Feature{
1998 .armv8_r,
1999 .fpao,
2000 .r52,
2001 .use_aa,
2002 .use_misched,
2003 }),
2004 };
2005 pub const cortex_r7 = Cpu{
2006 .name = "cortex_r7",
2007 .llvm_name = "cortex-r7",
2008 .features = featureSet(&[_]Feature{
2009 .armv7_r,
2010 .avoid_partial_cpsr,
2011 .fp16,
2012 .hwdiv_arm,
2013 .mp,
2014 .r7,
2015 .ret_addr_stack,
2016 .slow_fp_brcc,
2017 .slowfpvmlx,
2018 .vfp3d16,
2019 }),
2020 };
2021 pub const cortex_r8 = Cpu{
2022 .name = "cortex_r8",
2023 .llvm_name = "cortex-r8",
2024 .features = featureSet(&[_]Feature{
2025 .armv7_r,
2026 .avoid_partial_cpsr,
2027 .fp16,
2028 .hwdiv_arm,
2029 .mp,
2030 .ret_addr_stack,
2031 .slow_fp_brcc,
2032 .slowfpvmlx,
2033 .vfp3d16,
2034 }),
2035 };
2036 pub const cyclone = Cpu{
2037 .name = "cyclone",
2038 .llvm_name = "cyclone",
2039 .features = featureSet(&[_]Feature{
2040 .armv8_a,
2041 .avoid_movs_shop,
2042 .avoid_partial_cpsr,
2043 .crypto,
2044 .disable_postra_scheduler,
2045 .hwdiv,
2046 .hwdiv_arm,
2047 .mp,
2048 .neonfp,
2049 .ret_addr_stack,
2050 .slowfpvmlx,
2051 .swift,
2052 .use_misched,
2053 .vfp4,
2054 .zcz,
2055 }),
2056 };
2057 pub const ep9312 = Cpu{
2058 .name = "ep9312",
2059 .llvm_name = "ep9312",
2060 .features = featureSet(&[_]Feature{
2061 .armv4t,
2062 }),
2063 };
2064 pub const exynos_m1 = Cpu{
2065 .name = "exynos_m1",
2066 .llvm_name = "exynos-m1",
2067 .features = featureSet(&[_]Feature{
2068 .armv8_a,
2069 .exynos,
2070 }),
2071 };
2072 pub const exynos_m2 = Cpu{
2073 .name = "exynos_m2",
2074 .llvm_name = "exynos-m2",
2075 .features = featureSet(&[_]Feature{
2076 .armv8_a,
2077 .exynos,
2078 }),
2079 };
2080 pub const exynos_m3 = Cpu{
2081 .name = "exynos_m3",
2082 .llvm_name = "exynos-m3",
2083 .features = featureSet(&[_]Feature{
2084 .armv8_a,
2085 .exynos,
2086 }),
2087 };
2088 pub const exynos_m4 = Cpu{
2089 .name = "exynos_m4",
2090 .llvm_name = "exynos-m4",
2091 .features = featureSet(&[_]Feature{
2092 .armv8_2_a,
2093 .dotprod,
2094 .exynos,
2095 .fullfp16,
2096 }),
2097 };
2098 pub const exynos_m5 = Cpu{
2099 .name = "exynos_m5",
2100 .llvm_name = "exynos-m5",
2101 .features = featureSet(&[_]Feature{
2102 .armv8_2_a,
2103 .dotprod,
2104 .exynos,
2105 .fullfp16,
2106 }),
2107 };
2108 pub const generic = Cpu{
2109 .name = "generic",
2110 .llvm_name = "generic",
2111 .features = featureSet(&[_]Feature{}),
2112 };
2113 pub const iwmmxt = Cpu{
2114 .name = "iwmmxt",
2115 .llvm_name = "iwmmxt",
2116 .features = featureSet(&[_]Feature{
2117 .armv5te,
2118 }),
2119 };
2120 pub const krait = Cpu{
2121 .name = "krait",
2122 .llvm_name = "krait",
2123 .features = featureSet(&[_]Feature{
2124 .armv7_a,
2125 .avoid_partial_cpsr,
2126 .fp16,
2127 .hwdiv,
2128 .hwdiv_arm,
2129 .krait,
2130 .muxed_units,
2131 .ret_addr_stack,
2132 .vfp4,
2133 .vldn_align,
2134 .vmlx_forwarding,
2135 }),
2136 };
2137 pub const kryo = Cpu{
2138 .name = "kryo",
2139 .llvm_name = "kryo",
2140 .features = featureSet(&[_]Feature{
2141 .armv8_a,
2142 .crc,
2143 .crypto,
2144 .hwdiv,
2145 .hwdiv_arm,
2146 .kryo,
2147 }),
2148 };
2149 pub const mpcore = Cpu{
2150 .name = "mpcore",
2151 .llvm_name = "mpcore",
2152 .features = featureSet(&[_]Feature{
2153 .armv6k,
2154 .slowfpvmlx,
2155 .vfp2,
2156 }),
2157 };
2158 pub const mpcorenovfp = Cpu{
2159 .name = "mpcorenovfp",
2160 .llvm_name = "mpcorenovfp",
2161 .features = featureSet(&[_]Feature{
2162 .armv6k,
2163 }),
2164 };
2165 pub const sc000 = Cpu{
2166 .name = "sc000",
2167 .llvm_name = "sc000",
2168 .features = featureSet(&[_]Feature{
2169 .armv6_m,
2170 }),
2171 };
2172 pub const sc300 = Cpu{
2173 .name = "sc300",
2174 .llvm_name = "sc300",
2175 .features = featureSet(&[_]Feature{
2176 .armv7_m,
2177 .m3,
2178 .no_branch_predictor,
2179 .use_aa,
2180 .use_misched,
2181 }),
2182 };
2183 pub const strongarm = Cpu{
2184 .name = "strongarm",
2185 .llvm_name = "strongarm",
2186 .features = featureSet(&[_]Feature{
2187 .armv4,
2188 }),
2189 };
2190 pub const strongarm110 = Cpu{
2191 .name = "strongarm110",
2192 .llvm_name = "strongarm110",
2193 .features = featureSet(&[_]Feature{
2194 .armv4,
2195 }),
2196 };
2197 pub const strongarm1100 = Cpu{
2198 .name = "strongarm1100",
2199 .llvm_name = "strongarm1100",
2200 .features = featureSet(&[_]Feature{
2201 .armv4,
2202 }),
2203 };
2204 pub const strongarm1110 = Cpu{
2205 .name = "strongarm1110",
2206 .llvm_name = "strongarm1110",
2207 .features = featureSet(&[_]Feature{
2208 .armv4,
2209 }),
2210 };
2211 pub const swift = Cpu{
2212 .name = "swift",
2213 .llvm_name = "swift",
2214 .features = featureSet(&[_]Feature{
2215 .armv7_a,
2216 .avoid_movs_shop,
2217 .avoid_partial_cpsr,
2218 .disable_postra_scheduler,
2219 .hwdiv,
2220 .hwdiv_arm,
2221 .mp,
2222 .neonfp,
2223 .prefer_ishst,
2224 .prof_unpr,
2225 .ret_addr_stack,
2226 .slow_load_D_subreg,
2227 .slow_odd_reg,
2228 .slow_vdup32,
2229 .slow_vgetlni32,
2230 .slowfpvmlx,
2231 .swift,
2232 .use_misched,
2233 .vfp4,
2234 .vmlx_hazards,
2235 .wide_stride_vfp,
2236 }),
2237 };
2238 pub const xscale = Cpu{
2239 .name = "xscale",
2240 .llvm_name = "xscale",
2241 .features = featureSet(&[_]Feature{
2242 .armv5te,
2243 }),
2244 };
2245};
2246
2247/// All arm CPUs, sorted alphabetically by name.
2248/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
2249/// compiler has inefficient memory and CPU usage, affecting build times.
2250pub const all_cpus = &[_]*const Cpu{
2251 &cpu.arm1020e,
2252 &cpu.arm1020t,
2253 &cpu.arm1022e,
2254 &cpu.arm10e,
2255 &cpu.arm10tdmi,
2256 &cpu.arm1136j_s,
2257 &cpu.arm1136jf_s,
2258 &cpu.arm1156t2_s,
2259 &cpu.arm1156t2f_s,
2260 &cpu.arm1176j_s,
2261 &cpu.arm1176jz_s,
2262 &cpu.arm1176jzf_s,
2263 &cpu.arm710t,
2264 &cpu.arm720t,
2265 &cpu.arm7tdmi,
2266 &cpu.arm7tdmi_s,
2267 &cpu.arm8,
2268 &cpu.arm810,
2269 &cpu.arm9,
2270 &cpu.arm920,
2271 &cpu.arm920t,
2272 &cpu.arm922t,
2273 &cpu.arm926ej_s,
2274 &cpu.arm940t,
2275 &cpu.arm946e_s,
2276 &cpu.arm966e_s,
2277 &cpu.arm968e_s,
2278 &cpu.arm9e,
2279 &cpu.arm9tdmi,
2280 &cpu.cortex_a12,
2281 &cpu.cortex_a15,
2282 &cpu.cortex_a17,
2283 &cpu.cortex_a32,
2284 &cpu.cortex_a35,
2285 &cpu.cortex_a5,
2286 &cpu.cortex_a53,
2287 &cpu.cortex_a55,
2288 &cpu.cortex_a57,
2289 &cpu.cortex_a7,
2290 &cpu.cortex_a72,
2291 &cpu.cortex_a73,
2292 &cpu.cortex_a75,
2293 &cpu.cortex_a76,
2294 &cpu.cortex_a76ae,
2295 &cpu.cortex_a8,
2296 &cpu.cortex_a9,
2297 &cpu.cortex_m0,
2298 &cpu.cortex_m0plus,
2299 &cpu.cortex_m1,
2300 &cpu.cortex_m23,
2301 &cpu.cortex_m3,
2302 &cpu.cortex_m33,
2303 &cpu.cortex_m35p,
2304 &cpu.cortex_m4,
2305 &cpu.cortex_m7,
2306 &cpu.cortex_r4,
2307 &cpu.cortex_r4f,
2308 &cpu.cortex_r5,
2309 &cpu.cortex_r52,
2310 &cpu.cortex_r7,
2311 &cpu.cortex_r8,
2312 &cpu.cyclone,
2313 &cpu.ep9312,
2314 &cpu.exynos_m1,
2315 &cpu.exynos_m2,
2316 &cpu.exynos_m3,
2317 &cpu.exynos_m4,
2318 &cpu.exynos_m5,
2319 &cpu.generic,
2320 &cpu.iwmmxt,
2321 &cpu.krait,
2322 &cpu.kryo,
2323 &cpu.mpcore,
2324 &cpu.mpcorenovfp,
2325 &cpu.sc000,
2326 &cpu.sc300,
2327 &cpu.strongarm,
2328 &cpu.strongarm110,
2329 &cpu.strongarm1100,
2330 &cpu.strongarm1110,
2331 &cpu.swift,
2332 &cpu.xscale,
2333};
lib/std/target/avr.zig created+2380
...@@ -0,0 +1,2380 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 addsubiw,
6 avr0,
7 avr1,
8 avr2,
9 avr25,
10 avr3,
11 avr31,
12 avr35,
13 avr4,
14 avr5,
15 avr51,
16 avr6,
17 avrtiny,
18 @"break",
19 des,
20 eijmpcall,
21 elpm,
22 elpmx,
23 ijmpcall,
24 jmpcall,
25 lpm,
26 lpmx,
27 movw,
28 mul,
29 rmw,
30 smallstack,
31 special,
32 spm,
33 spmx,
34 sram,
35 tinyencoding,
36 xmega,
37 xmegau,
38};
39
40pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
41
42pub const all_features = blk: {
43 const len = @typeInfo(Feature).Enum.fields.len;
44 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
45 var result: [len]Cpu.Feature = undefined;
46 result[@enumToInt(Feature.addsubiw)] = .{
47 .llvm_name = "addsubiw",
48 .description = "Enable 16-bit register-immediate addition and subtraction instructions",
49 .dependencies = featureSet(&[_]Feature{}),
50 };
51 result[@enumToInt(Feature.avr0)] = .{
52 .llvm_name = "avr0",
53 .description = "The device is a part of the avr0 family",
54 .dependencies = featureSet(&[_]Feature{}),
55 };
56 result[@enumToInt(Feature.avr1)] = .{
57 .llvm_name = "avr1",
58 .description = "The device is a part of the avr1 family",
59 .dependencies = featureSet(&[_]Feature{
60 .avr0,
61 .lpm,
62 }),
63 };
64 result[@enumToInt(Feature.avr2)] = .{
65 .llvm_name = "avr2",
66 .description = "The device is a part of the avr2 family",
67 .dependencies = featureSet(&[_]Feature{
68 .addsubiw,
69 .avr1,
70 .ijmpcall,
71 .sram,
72 }),
73 };
74 result[@enumToInt(Feature.avr25)] = .{
75 .llvm_name = "avr25",
76 .description = "The device is a part of the avr25 family",
77 .dependencies = featureSet(&[_]Feature{
78 .avr2,
79 .@"break",
80 .lpmx,
81 .movw,
82 .spm,
83 }),
84 };
85 result[@enumToInt(Feature.avr3)] = .{
86 .llvm_name = "avr3",
87 .description = "The device is a part of the avr3 family",
88 .dependencies = featureSet(&[_]Feature{
89 .avr2,
90 .jmpcall,
91 }),
92 };
93 result[@enumToInt(Feature.avr31)] = .{
94 .llvm_name = "avr31",
95 .description = "The device is a part of the avr31 family",
96 .dependencies = featureSet(&[_]Feature{
97 .avr3,
98 .elpm,
99 }),
100 };
101 result[@enumToInt(Feature.avr35)] = .{
102 .llvm_name = "avr35",
103 .description = "The device is a part of the avr35 family",
104 .dependencies = featureSet(&[_]Feature{
105 .avr3,
106 .@"break",
107 .lpmx,
108 .movw,
109 .spm,
110 }),
111 };
112 result[@enumToInt(Feature.avr4)] = .{
113 .llvm_name = "avr4",
114 .description = "The device is a part of the avr4 family",
115 .dependencies = featureSet(&[_]Feature{
116 .avr2,
117 .@"break",
118 .lpmx,
119 .movw,
120 .mul,
121 .spm,
122 }),
123 };
124 result[@enumToInt(Feature.avr5)] = .{
125 .llvm_name = "avr5",
126 .description = "The device is a part of the avr5 family",
127 .dependencies = featureSet(&[_]Feature{
128 .avr3,
129 .@"break",
130 .lpmx,
131 .movw,
132 .mul,
133 .spm,
134 }),
135 };
136 result[@enumToInt(Feature.avr51)] = .{
137 .llvm_name = "avr51",
138 .description = "The device is a part of the avr51 family",
139 .dependencies = featureSet(&[_]Feature{
140 .avr5,
141 .elpm,
142 .elpmx,
143 }),
144 };
145 result[@enumToInt(Feature.avr6)] = .{
146 .llvm_name = "avr6",
147 .description = "The device is a part of the avr6 family",
148 .dependencies = featureSet(&[_]Feature{
149 .avr51,
150 }),
151 };
152 result[@enumToInt(Feature.avrtiny)] = .{
153 .llvm_name = "avrtiny",
154 .description = "The device is a part of the avrtiny family",
155 .dependencies = featureSet(&[_]Feature{
156 .avr0,
157 .@"break",
158 .sram,
159 .tinyencoding,
160 }),
161 };
162 result[@enumToInt(Feature.@"break")] = .{
163 .llvm_name = "break",
164 .description = "The device supports the `BREAK` debugging instruction",
165 .dependencies = featureSet(&[_]Feature{}),
166 };
167 result[@enumToInt(Feature.des)] = .{
168 .llvm_name = "des",
169 .description = "The device supports the `DES k` encryption instruction",
170 .dependencies = featureSet(&[_]Feature{}),
171 };
172 result[@enumToInt(Feature.eijmpcall)] = .{
173 .llvm_name = "eijmpcall",
174 .description = "The device supports the `EIJMP`/`EICALL` instructions",
175 .dependencies = featureSet(&[_]Feature{}),
176 };
177 result[@enumToInt(Feature.elpm)] = .{
178 .llvm_name = "elpm",
179 .description = "The device supports the ELPM instruction",
180 .dependencies = featureSet(&[_]Feature{}),
181 };
182 result[@enumToInt(Feature.elpmx)] = .{
183 .llvm_name = "elpmx",
184 .description = "The device supports the `ELPM Rd, Z[+]` instructions",
185 .dependencies = featureSet(&[_]Feature{}),
186 };
187 result[@enumToInt(Feature.ijmpcall)] = .{
188 .llvm_name = "ijmpcall",
189 .description = "The device supports `IJMP`/`ICALL`instructions",
190 .dependencies = featureSet(&[_]Feature{}),
191 };
192 result[@enumToInt(Feature.jmpcall)] = .{
193 .llvm_name = "jmpcall",
194 .description = "The device supports the `JMP` and `CALL` instructions",
195 .dependencies = featureSet(&[_]Feature{}),
196 };
197 result[@enumToInt(Feature.lpm)] = .{
198 .llvm_name = "lpm",
199 .description = "The device supports the `LPM` instruction",
200 .dependencies = featureSet(&[_]Feature{}),
201 };
202 result[@enumToInt(Feature.lpmx)] = .{
203 .llvm_name = "lpmx",
204 .description = "The device supports the `LPM Rd, Z[+]` instruction",
205 .dependencies = featureSet(&[_]Feature{}),
206 };
207 result[@enumToInt(Feature.movw)] = .{
208 .llvm_name = "movw",
209 .description = "The device supports the 16-bit MOVW instruction",
210 .dependencies = featureSet(&[_]Feature{}),
211 };
212 result[@enumToInt(Feature.mul)] = .{
213 .llvm_name = "mul",
214 .description = "The device supports the multiplication instructions",
215 .dependencies = featureSet(&[_]Feature{}),
216 };
217 result[@enumToInt(Feature.rmw)] = .{
218 .llvm_name = "rmw",
219 .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT",
220 .dependencies = featureSet(&[_]Feature{}),
221 };
222 result[@enumToInt(Feature.smallstack)] = .{
223 .llvm_name = "smallstack",
224 .description = "The device has an 8-bit stack pointer",
225 .dependencies = featureSet(&[_]Feature{}),
226 };
227 result[@enumToInt(Feature.special)] = .{
228 .llvm_name = "special",
229 .description = "Enable use of the entire instruction set - used for debugging",
230 .dependencies = featureSet(&[_]Feature{
231 .addsubiw,
232 .@"break",
233 .des,
234 .eijmpcall,
235 .elpm,
236 .elpmx,
237 .ijmpcall,
238 .jmpcall,
239 .lpm,
240 .lpmx,
241 .movw,
242 .mul,
243 .rmw,
244 .spm,
245 .spmx,
246 .sram,
247 }),
248 };
249 result[@enumToInt(Feature.spm)] = .{
250 .llvm_name = "spm",
251 .description = "The device supports the `SPM` instruction",
252 .dependencies = featureSet(&[_]Feature{}),
253 };
254 result[@enumToInt(Feature.spmx)] = .{
255 .llvm_name = "spmx",
256 .description = "The device supports the `SPM Z+` instruction",
257 .dependencies = featureSet(&[_]Feature{}),
258 };
259 result[@enumToInt(Feature.sram)] = .{
260 .llvm_name = "sram",
261 .description = "The device has random access memory",
262 .dependencies = featureSet(&[_]Feature{}),
263 };
264 result[@enumToInt(Feature.tinyencoding)] = .{
265 .llvm_name = "tinyencoding",
266 .description = "The device has Tiny core specific instruction encodings",
267 .dependencies = featureSet(&[_]Feature{}),
268 };
269 result[@enumToInt(Feature.xmega)] = .{
270 .llvm_name = "xmega",
271 .description = "The device is a part of the xmega family",
272 .dependencies = featureSet(&[_]Feature{
273 .avr51,
274 .des,
275 .eijmpcall,
276 .spmx,
277 }),
278 };
279 result[@enumToInt(Feature.xmegau)] = .{
280 .llvm_name = "xmegau",
281 .description = "The device is a part of the xmegau family",
282 .dependencies = featureSet(&[_]Feature{
283 .rmw,
284 .xmega,
285 }),
286 };
287 const ti = @typeInfo(Feature);
288 for (result) |*elem, i| {
289 elem.index = i;
290 elem.name = ti.Enum.fields[i].name;
291 }
292 break :blk result;
293};
294
295pub const cpu = struct {
296 pub const at43usb320 = Cpu{
297 .name = "at43usb320",
298 .llvm_name = "at43usb320",
299 .features = featureSet(&[_]Feature{
300 .avr31,
301 }),
302 };
303 pub const at43usb355 = Cpu{
304 .name = "at43usb355",
305 .llvm_name = "at43usb355",
306 .features = featureSet(&[_]Feature{
307 .avr3,
308 }),
309 };
310 pub const at76c711 = Cpu{
311 .name = "at76c711",
312 .llvm_name = "at76c711",
313 .features = featureSet(&[_]Feature{
314 .avr3,
315 }),
316 };
317 pub const at86rf401 = Cpu{
318 .name = "at86rf401",
319 .llvm_name = "at86rf401",
320 .features = featureSet(&[_]Feature{
321 .avr2,
322 .lpmx,
323 .movw,
324 }),
325 };
326 pub const at90c8534 = Cpu{
327 .name = "at90c8534",
328 .llvm_name = "at90c8534",
329 .features = featureSet(&[_]Feature{
330 .avr2,
331 }),
332 };
333 pub const at90can128 = Cpu{
334 .name = "at90can128",
335 .llvm_name = "at90can128",
336 .features = featureSet(&[_]Feature{
337 .avr51,
338 }),
339 };
340 pub const at90can32 = Cpu{
341 .name = "at90can32",
342 .llvm_name = "at90can32",
343 .features = featureSet(&[_]Feature{
344 .avr5,
345 }),
346 };
347 pub const at90can64 = Cpu{
348 .name = "at90can64",
349 .llvm_name = "at90can64",
350 .features = featureSet(&[_]Feature{
351 .avr5,
352 }),
353 };
354 pub const at90pwm1 = Cpu{
355 .name = "at90pwm1",
356 .llvm_name = "at90pwm1",
357 .features = featureSet(&[_]Feature{
358 .avr4,
359 }),
360 };
361 pub const at90pwm161 = Cpu{
362 .name = "at90pwm161",
363 .llvm_name = "at90pwm161",
364 .features = featureSet(&[_]Feature{
365 .avr5,
366 }),
367 };
368 pub const at90pwm2 = Cpu{
369 .name = "at90pwm2",
370 .llvm_name = "at90pwm2",
371 .features = featureSet(&[_]Feature{
372 .avr4,
373 }),
374 };
375 pub const at90pwm216 = Cpu{
376 .name = "at90pwm216",
377 .llvm_name = "at90pwm216",
378 .features = featureSet(&[_]Feature{
379 .avr5,
380 }),
381 };
382 pub const at90pwm2b = Cpu{
383 .name = "at90pwm2b",
384 .llvm_name = "at90pwm2b",
385 .features = featureSet(&[_]Feature{
386 .avr4,
387 }),
388 };
389 pub const at90pwm3 = Cpu{
390 .name = "at90pwm3",
391 .llvm_name = "at90pwm3",
392 .features = featureSet(&[_]Feature{
393 .avr4,
394 }),
395 };
396 pub const at90pwm316 = Cpu{
397 .name = "at90pwm316",
398 .llvm_name = "at90pwm316",
399 .features = featureSet(&[_]Feature{
400 .avr5,
401 }),
402 };
403 pub const at90pwm3b = Cpu{
404 .name = "at90pwm3b",
405 .llvm_name = "at90pwm3b",
406 .features = featureSet(&[_]Feature{
407 .avr4,
408 }),
409 };
410 pub const at90pwm81 = Cpu{
411 .name = "at90pwm81",
412 .llvm_name = "at90pwm81",
413 .features = featureSet(&[_]Feature{
414 .avr4,
415 }),
416 };
417 pub const at90s1200 = Cpu{
418 .name = "at90s1200",
419 .llvm_name = "at90s1200",
420 .features = featureSet(&[_]Feature{
421 .avr0,
422 }),
423 };
424 pub const at90s2313 = Cpu{
425 .name = "at90s2313",
426 .llvm_name = "at90s2313",
427 .features = featureSet(&[_]Feature{
428 .avr2,
429 }),
430 };
431 pub const at90s2323 = Cpu{
432 .name = "at90s2323",
433 .llvm_name = "at90s2323",
434 .features = featureSet(&[_]Feature{
435 .avr2,
436 }),
437 };
438 pub const at90s2333 = Cpu{
439 .name = "at90s2333",
440 .llvm_name = "at90s2333",
441 .features = featureSet(&[_]Feature{
442 .avr2,
443 }),
444 };
445 pub const at90s2343 = Cpu{
446 .name = "at90s2343",
447 .llvm_name = "at90s2343",
448 .features = featureSet(&[_]Feature{
449 .avr2,
450 }),
451 };
452 pub const at90s4414 = Cpu{
453 .name = "at90s4414",
454 .llvm_name = "at90s4414",
455 .features = featureSet(&[_]Feature{
456 .avr2,
457 }),
458 };
459 pub const at90s4433 = Cpu{
460 .name = "at90s4433",
461 .llvm_name = "at90s4433",
462 .features = featureSet(&[_]Feature{
463 .avr2,
464 }),
465 };
466 pub const at90s4434 = Cpu{
467 .name = "at90s4434",
468 .llvm_name = "at90s4434",
469 .features = featureSet(&[_]Feature{
470 .avr2,
471 }),
472 };
473 pub const at90s8515 = Cpu{
474 .name = "at90s8515",
475 .llvm_name = "at90s8515",
476 .features = featureSet(&[_]Feature{
477 .avr2,
478 }),
479 };
480 pub const at90s8535 = Cpu{
481 .name = "at90s8535",
482 .llvm_name = "at90s8535",
483 .features = featureSet(&[_]Feature{
484 .avr2,
485 }),
486 };
487 pub const at90scr100 = Cpu{
488 .name = "at90scr100",
489 .llvm_name = "at90scr100",
490 .features = featureSet(&[_]Feature{
491 .avr5,
492 }),
493 };
494 pub const at90usb1286 = Cpu{
495 .name = "at90usb1286",
496 .llvm_name = "at90usb1286",
497 .features = featureSet(&[_]Feature{
498 .avr51,
499 }),
500 };
501 pub const at90usb1287 = Cpu{
502 .name = "at90usb1287",
503 .llvm_name = "at90usb1287",
504 .features = featureSet(&[_]Feature{
505 .avr51,
506 }),
507 };
508 pub const at90usb162 = Cpu{
509 .name = "at90usb162",
510 .llvm_name = "at90usb162",
511 .features = featureSet(&[_]Feature{
512 .avr35,
513 }),
514 };
515 pub const at90usb646 = Cpu{
516 .name = "at90usb646",
517 .llvm_name = "at90usb646",
518 .features = featureSet(&[_]Feature{
519 .avr5,
520 }),
521 };
522 pub const at90usb647 = Cpu{
523 .name = "at90usb647",
524 .llvm_name = "at90usb647",
525 .features = featureSet(&[_]Feature{
526 .avr5,
527 }),
528 };
529 pub const at90usb82 = Cpu{
530 .name = "at90usb82",
531 .llvm_name = "at90usb82",
532 .features = featureSet(&[_]Feature{
533 .avr35,
534 }),
535 };
536 pub const at94k = Cpu{
537 .name = "at94k",
538 .llvm_name = "at94k",
539 .features = featureSet(&[_]Feature{
540 .avr3,
541 .lpmx,
542 .movw,
543 .mul,
544 }),
545 };
546 pub const ata5272 = Cpu{
547 .name = "ata5272",
548 .llvm_name = "ata5272",
549 .features = featureSet(&[_]Feature{
550 .avr25,
551 }),
552 };
553 pub const ata5505 = Cpu{
554 .name = "ata5505",
555 .llvm_name = "ata5505",
556 .features = featureSet(&[_]Feature{
557 .avr35,
558 }),
559 };
560 pub const ata5790 = Cpu{
561 .name = "ata5790",
562 .llvm_name = "ata5790",
563 .features = featureSet(&[_]Feature{
564 .avr5,
565 }),
566 };
567 pub const ata5795 = Cpu{
568 .name = "ata5795",
569 .llvm_name = "ata5795",
570 .features = featureSet(&[_]Feature{
571 .avr5,
572 }),
573 };
574 pub const ata6285 = Cpu{
575 .name = "ata6285",
576 .llvm_name = "ata6285",
577 .features = featureSet(&[_]Feature{
578 .avr4,
579 }),
580 };
581 pub const ata6286 = Cpu{
582 .name = "ata6286",
583 .llvm_name = "ata6286",
584 .features = featureSet(&[_]Feature{
585 .avr4,
586 }),
587 };
588 pub const ata6289 = Cpu{
589 .name = "ata6289",
590 .llvm_name = "ata6289",
591 .features = featureSet(&[_]Feature{
592 .avr4,
593 }),
594 };
595 pub const atmega103 = Cpu{
596 .name = "atmega103",
597 .llvm_name = "atmega103",
598 .features = featureSet(&[_]Feature{
599 .avr31,
600 }),
601 };
602 pub const atmega128 = Cpu{
603 .name = "atmega128",
604 .llvm_name = "atmega128",
605 .features = featureSet(&[_]Feature{
606 .avr51,
607 }),
608 };
609 pub const atmega1280 = Cpu{
610 .name = "atmega1280",
611 .llvm_name = "atmega1280",
612 .features = featureSet(&[_]Feature{
613 .avr51,
614 }),
615 };
616 pub const atmega1281 = Cpu{
617 .name = "atmega1281",
618 .llvm_name = "atmega1281",
619 .features = featureSet(&[_]Feature{
620 .avr51,
621 }),
622 };
623 pub const atmega1284 = Cpu{
624 .name = "atmega1284",
625 .llvm_name = "atmega1284",
626 .features = featureSet(&[_]Feature{
627 .avr51,
628 }),
629 };
630 pub const atmega1284p = Cpu{
631 .name = "atmega1284p",
632 .llvm_name = "atmega1284p",
633 .features = featureSet(&[_]Feature{
634 .avr51,
635 }),
636 };
637 pub const atmega1284rfr2 = Cpu{
638 .name = "atmega1284rfr2",
639 .llvm_name = "atmega1284rfr2",
640 .features = featureSet(&[_]Feature{
641 .avr51,
642 }),
643 };
644 pub const atmega128a = Cpu{
645 .name = "atmega128a",
646 .llvm_name = "atmega128a",
647 .features = featureSet(&[_]Feature{
648 .avr51,
649 }),
650 };
651 pub const atmega128rfa1 = Cpu{
652 .name = "atmega128rfa1",
653 .llvm_name = "atmega128rfa1",
654 .features = featureSet(&[_]Feature{
655 .avr51,
656 }),
657 };
658 pub const atmega128rfr2 = Cpu{
659 .name = "atmega128rfr2",
660 .llvm_name = "atmega128rfr2",
661 .features = featureSet(&[_]Feature{
662 .avr51,
663 }),
664 };
665 pub const atmega16 = Cpu{
666 .name = "atmega16",
667 .llvm_name = "atmega16",
668 .features = featureSet(&[_]Feature{
669 .avr5,
670 }),
671 };
672 pub const atmega161 = Cpu{
673 .name = "atmega161",
674 .llvm_name = "atmega161",
675 .features = featureSet(&[_]Feature{
676 .avr3,
677 .lpmx,
678 .movw,
679 .mul,
680 .spm,
681 }),
682 };
683 pub const atmega162 = Cpu{
684 .name = "atmega162",
685 .llvm_name = "atmega162",
686 .features = featureSet(&[_]Feature{
687 .avr5,
688 }),
689 };
690 pub const atmega163 = Cpu{
691 .name = "atmega163",
692 .llvm_name = "atmega163",
693 .features = featureSet(&[_]Feature{
694 .avr3,
695 .lpmx,
696 .movw,
697 .mul,
698 .spm,
699 }),
700 };
701 pub const atmega164a = Cpu{
702 .name = "atmega164a",
703 .llvm_name = "atmega164a",
704 .features = featureSet(&[_]Feature{
705 .avr5,
706 }),
707 };
708 pub const atmega164p = Cpu{
709 .name = "atmega164p",
710 .llvm_name = "atmega164p",
711 .features = featureSet(&[_]Feature{
712 .avr5,
713 }),
714 };
715 pub const atmega164pa = Cpu{
716 .name = "atmega164pa",
717 .llvm_name = "atmega164pa",
718 .features = featureSet(&[_]Feature{
719 .avr5,
720 }),
721 };
722 pub const atmega165 = Cpu{
723 .name = "atmega165",
724 .llvm_name = "atmega165",
725 .features = featureSet(&[_]Feature{
726 .avr5,
727 }),
728 };
729 pub const atmega165a = Cpu{
730 .name = "atmega165a",
731 .llvm_name = "atmega165a",
732 .features = featureSet(&[_]Feature{
733 .avr5,
734 }),
735 };
736 pub const atmega165p = Cpu{
737 .name = "atmega165p",
738 .llvm_name = "atmega165p",
739 .features = featureSet(&[_]Feature{
740 .avr5,
741 }),
742 };
743 pub const atmega165pa = Cpu{
744 .name = "atmega165pa",
745 .llvm_name = "atmega165pa",
746 .features = featureSet(&[_]Feature{
747 .avr5,
748 }),
749 };
750 pub const atmega168 = Cpu{
751 .name = "atmega168",
752 .llvm_name = "atmega168",
753 .features = featureSet(&[_]Feature{
754 .avr5,
755 }),
756 };
757 pub const atmega168a = Cpu{
758 .name = "atmega168a",
759 .llvm_name = "atmega168a",
760 .features = featureSet(&[_]Feature{
761 .avr5,
762 }),
763 };
764 pub const atmega168p = Cpu{
765 .name = "atmega168p",
766 .llvm_name = "atmega168p",
767 .features = featureSet(&[_]Feature{
768 .avr5,
769 }),
770 };
771 pub const atmega168pa = Cpu{
772 .name = "atmega168pa",
773 .llvm_name = "atmega168pa",
774 .features = featureSet(&[_]Feature{
775 .avr5,
776 }),
777 };
778 pub const atmega169 = Cpu{
779 .name = "atmega169",
780 .llvm_name = "atmega169",
781 .features = featureSet(&[_]Feature{
782 .avr5,
783 }),
784 };
785 pub const atmega169a = Cpu{
786 .name = "atmega169a",
787 .llvm_name = "atmega169a",
788 .features = featureSet(&[_]Feature{
789 .avr5,
790 }),
791 };
792 pub const atmega169p = Cpu{
793 .name = "atmega169p",
794 .llvm_name = "atmega169p",
795 .features = featureSet(&[_]Feature{
796 .avr5,
797 }),
798 };
799 pub const atmega169pa = Cpu{
800 .name = "atmega169pa",
801 .llvm_name = "atmega169pa",
802 .features = featureSet(&[_]Feature{
803 .avr5,
804 }),
805 };
806 pub const atmega16a = Cpu{
807 .name = "atmega16a",
808 .llvm_name = "atmega16a",
809 .features = featureSet(&[_]Feature{
810 .avr5,
811 }),
812 };
813 pub const atmega16hva = Cpu{
814 .name = "atmega16hva",
815 .llvm_name = "atmega16hva",
816 .features = featureSet(&[_]Feature{
817 .avr5,
818 }),
819 };
820 pub const atmega16hva2 = Cpu{
821 .name = "atmega16hva2",
822 .llvm_name = "atmega16hva2",
823 .features = featureSet(&[_]Feature{
824 .avr5,
825 }),
826 };
827 pub const atmega16hvb = Cpu{
828 .name = "atmega16hvb",
829 .llvm_name = "atmega16hvb",
830 .features = featureSet(&[_]Feature{
831 .avr5,
832 }),
833 };
834 pub const atmega16hvbrevb = Cpu{
835 .name = "atmega16hvbrevb",
836 .llvm_name = "atmega16hvbrevb",
837 .features = featureSet(&[_]Feature{
838 .avr5,
839 }),
840 };
841 pub const atmega16m1 = Cpu{
842 .name = "atmega16m1",
843 .llvm_name = "atmega16m1",
844 .features = featureSet(&[_]Feature{
845 .avr5,
846 }),
847 };
848 pub const atmega16u2 = Cpu{
849 .name = "atmega16u2",
850 .llvm_name = "atmega16u2",
851 .features = featureSet(&[_]Feature{
852 .avr35,
853 }),
854 };
855 pub const atmega16u4 = Cpu{
856 .name = "atmega16u4",
857 .llvm_name = "atmega16u4",
858 .features = featureSet(&[_]Feature{
859 .avr5,
860 }),
861 };
862 pub const atmega2560 = Cpu{
863 .name = "atmega2560",
864 .llvm_name = "atmega2560",
865 .features = featureSet(&[_]Feature{
866 .avr6,
867 }),
868 };
869 pub const atmega2561 = Cpu{
870 .name = "atmega2561",
871 .llvm_name = "atmega2561",
872 .features = featureSet(&[_]Feature{
873 .avr6,
874 }),
875 };
876 pub const atmega2564rfr2 = Cpu{
877 .name = "atmega2564rfr2",
878 .llvm_name = "atmega2564rfr2",
879 .features = featureSet(&[_]Feature{
880 .avr6,
881 }),
882 };
883 pub const atmega256rfr2 = Cpu{
884 .name = "atmega256rfr2",
885 .llvm_name = "atmega256rfr2",
886 .features = featureSet(&[_]Feature{
887 .avr6,
888 }),
889 };
890 pub const atmega32 = Cpu{
891 .name = "atmega32",
892 .llvm_name = "atmega32",
893 .features = featureSet(&[_]Feature{
894 .avr5,
895 }),
896 };
897 pub const atmega323 = Cpu{
898 .name = "atmega323",
899 .llvm_name = "atmega323",
900 .features = featureSet(&[_]Feature{
901 .avr5,
902 }),
903 };
904 pub const atmega324a = Cpu{
905 .name = "atmega324a",
906 .llvm_name = "atmega324a",
907 .features = featureSet(&[_]Feature{
908 .avr5,
909 }),
910 };
911 pub const atmega324p = Cpu{
912 .name = "atmega324p",
913 .llvm_name = "atmega324p",
914 .features = featureSet(&[_]Feature{
915 .avr5,
916 }),
917 };
918 pub const atmega324pa = Cpu{
919 .name = "atmega324pa",
920 .llvm_name = "atmega324pa",
921 .features = featureSet(&[_]Feature{
922 .avr5,
923 }),
924 };
925 pub const atmega325 = Cpu{
926 .name = "atmega325",
927 .llvm_name = "atmega325",
928 .features = featureSet(&[_]Feature{
929 .avr5,
930 }),
931 };
932 pub const atmega3250 = Cpu{
933 .name = "atmega3250",
934 .llvm_name = "atmega3250",
935 .features = featureSet(&[_]Feature{
936 .avr5,
937 }),
938 };
939 pub const atmega3250a = Cpu{
940 .name = "atmega3250a",
941 .llvm_name = "atmega3250a",
942 .features = featureSet(&[_]Feature{
943 .avr5,
944 }),
945 };
946 pub const atmega3250p = Cpu{
947 .name = "atmega3250p",
948 .llvm_name = "atmega3250p",
949 .features = featureSet(&[_]Feature{
950 .avr5,
951 }),
952 };
953 pub const atmega3250pa = Cpu{
954 .name = "atmega3250pa",
955 .llvm_name = "atmega3250pa",
956 .features = featureSet(&[_]Feature{
957 .avr5,
958 }),
959 };
960 pub const atmega325a = Cpu{
961 .name = "atmega325a",
962 .llvm_name = "atmega325a",
963 .features = featureSet(&[_]Feature{
964 .avr5,
965 }),
966 };
967 pub const atmega325p = Cpu{
968 .name = "atmega325p",
969 .llvm_name = "atmega325p",
970 .features = featureSet(&[_]Feature{
971 .avr5,
972 }),
973 };
974 pub const atmega325pa = Cpu{
975 .name = "atmega325pa",
976 .llvm_name = "atmega325pa",
977 .features = featureSet(&[_]Feature{
978 .avr5,
979 }),
980 };
981 pub const atmega328 = Cpu{
982 .name = "atmega328",
983 .llvm_name = "atmega328",
984 .features = featureSet(&[_]Feature{
985 .avr5,
986 }),
987 };
988 pub const atmega328p = Cpu{
989 .name = "atmega328p",
990 .llvm_name = "atmega328p",
991 .features = featureSet(&[_]Feature{
992 .avr5,
993 }),
994 };
995 pub const atmega329 = Cpu{
996 .name = "atmega329",
997 .llvm_name = "atmega329",
998 .features = featureSet(&[_]Feature{
999 .avr5,
1000 }),
1001 };
1002 pub const atmega3290 = Cpu{
1003 .name = "atmega3290",
1004 .llvm_name = "atmega3290",
1005 .features = featureSet(&[_]Feature{
1006 .avr5,
1007 }),
1008 };
1009 pub const atmega3290a = Cpu{
1010 .name = "atmega3290a",
1011 .llvm_name = "atmega3290a",
1012 .features = featureSet(&[_]Feature{
1013 .avr5,
1014 }),
1015 };
1016 pub const atmega3290p = Cpu{
1017 .name = "atmega3290p",
1018 .llvm_name = "atmega3290p",
1019 .features = featureSet(&[_]Feature{
1020 .avr5,
1021 }),
1022 };
1023 pub const atmega3290pa = Cpu{
1024 .name = "atmega3290pa",
1025 .llvm_name = "atmega3290pa",
1026 .features = featureSet(&[_]Feature{
1027 .avr5,
1028 }),
1029 };
1030 pub const atmega329a = Cpu{
1031 .name = "atmega329a",
1032 .llvm_name = "atmega329a",
1033 .features = featureSet(&[_]Feature{
1034 .avr5,
1035 }),
1036 };
1037 pub const atmega329p = Cpu{
1038 .name = "atmega329p",
1039 .llvm_name = "atmega329p",
1040 .features = featureSet(&[_]Feature{
1041 .avr5,
1042 }),
1043 };
1044 pub const atmega329pa = Cpu{
1045 .name = "atmega329pa",
1046 .llvm_name = "atmega329pa",
1047 .features = featureSet(&[_]Feature{
1048 .avr5,
1049 }),
1050 };
1051 pub const atmega32a = Cpu{
1052 .name = "atmega32a",
1053 .llvm_name = "atmega32a",
1054 .features = featureSet(&[_]Feature{
1055 .avr5,
1056 }),
1057 };
1058 pub const atmega32c1 = Cpu{
1059 .name = "atmega32c1",
1060 .llvm_name = "atmega32c1",
1061 .features = featureSet(&[_]Feature{
1062 .avr5,
1063 }),
1064 };
1065 pub const atmega32hvb = Cpu{
1066 .name = "atmega32hvb",
1067 .llvm_name = "atmega32hvb",
1068 .features = featureSet(&[_]Feature{
1069 .avr5,
1070 }),
1071 };
1072 pub const atmega32hvbrevb = Cpu{
1073 .name = "atmega32hvbrevb",
1074 .llvm_name = "atmega32hvbrevb",
1075 .features = featureSet(&[_]Feature{
1076 .avr5,
1077 }),
1078 };
1079 pub const atmega32m1 = Cpu{
1080 .name = "atmega32m1",
1081 .llvm_name = "atmega32m1",
1082 .features = featureSet(&[_]Feature{
1083 .avr5,
1084 }),
1085 };
1086 pub const atmega32u2 = Cpu{
1087 .name = "atmega32u2",
1088 .llvm_name = "atmega32u2",
1089 .features = featureSet(&[_]Feature{
1090 .avr35,
1091 }),
1092 };
1093 pub const atmega32u4 = Cpu{
1094 .name = "atmega32u4",
1095 .llvm_name = "atmega32u4",
1096 .features = featureSet(&[_]Feature{
1097 .avr5,
1098 }),
1099 };
1100 pub const atmega32u6 = Cpu{
1101 .name = "atmega32u6",
1102 .llvm_name = "atmega32u6",
1103 .features = featureSet(&[_]Feature{
1104 .avr5,
1105 }),
1106 };
1107 pub const atmega406 = Cpu{
1108 .name = "atmega406",
1109 .llvm_name = "atmega406",
1110 .features = featureSet(&[_]Feature{
1111 .avr5,
1112 }),
1113 };
1114 pub const atmega48 = Cpu{
1115 .name = "atmega48",
1116 .llvm_name = "atmega48",
1117 .features = featureSet(&[_]Feature{
1118 .avr4,
1119 }),
1120 };
1121 pub const atmega48a = Cpu{
1122 .name = "atmega48a",
1123 .llvm_name = "atmega48a",
1124 .features = featureSet(&[_]Feature{
1125 .avr4,
1126 }),
1127 };
1128 pub const atmega48p = Cpu{
1129 .name = "atmega48p",
1130 .llvm_name = "atmega48p",
1131 .features = featureSet(&[_]Feature{
1132 .avr4,
1133 }),
1134 };
1135 pub const atmega48pa = Cpu{
1136 .name = "atmega48pa",
1137 .llvm_name = "atmega48pa",
1138 .features = featureSet(&[_]Feature{
1139 .avr4,
1140 }),
1141 };
1142 pub const atmega64 = Cpu{
1143 .name = "atmega64",
1144 .llvm_name = "atmega64",
1145 .features = featureSet(&[_]Feature{
1146 .avr5,
1147 }),
1148 };
1149 pub const atmega640 = Cpu{
1150 .name = "atmega640",
1151 .llvm_name = "atmega640",
1152 .features = featureSet(&[_]Feature{
1153 .avr5,
1154 }),
1155 };
1156 pub const atmega644 = Cpu{
1157 .name = "atmega644",
1158 .llvm_name = "atmega644",
1159 .features = featureSet(&[_]Feature{
1160 .avr5,
1161 }),
1162 };
1163 pub const atmega644a = Cpu{
1164 .name = "atmega644a",
1165 .llvm_name = "atmega644a",
1166 .features = featureSet(&[_]Feature{
1167 .avr5,
1168 }),
1169 };
1170 pub const atmega644p = Cpu{
1171 .name = "atmega644p",
1172 .llvm_name = "atmega644p",
1173 .features = featureSet(&[_]Feature{
1174 .avr5,
1175 }),
1176 };
1177 pub const atmega644pa = Cpu{
1178 .name = "atmega644pa",
1179 .llvm_name = "atmega644pa",
1180 .features = featureSet(&[_]Feature{
1181 .avr5,
1182 }),
1183 };
1184 pub const atmega644rfr2 = Cpu{
1185 .name = "atmega644rfr2",
1186 .llvm_name = "atmega644rfr2",
1187 .features = featureSet(&[_]Feature{
1188 .avr5,
1189 }),
1190 };
1191 pub const atmega645 = Cpu{
1192 .name = "atmega645",
1193 .llvm_name = "atmega645",
1194 .features = featureSet(&[_]Feature{
1195 .avr5,
1196 }),
1197 };
1198 pub const atmega6450 = Cpu{
1199 .name = "atmega6450",
1200 .llvm_name = "atmega6450",
1201 .features = featureSet(&[_]Feature{
1202 .avr5,
1203 }),
1204 };
1205 pub const atmega6450a = Cpu{
1206 .name = "atmega6450a",
1207 .llvm_name = "atmega6450a",
1208 .features = featureSet(&[_]Feature{
1209 .avr5,
1210 }),
1211 };
1212 pub const atmega6450p = Cpu{
1213 .name = "atmega6450p",
1214 .llvm_name = "atmega6450p",
1215 .features = featureSet(&[_]Feature{
1216 .avr5,
1217 }),
1218 };
1219 pub const atmega645a = Cpu{
1220 .name = "atmega645a",
1221 .llvm_name = "atmega645a",
1222 .features = featureSet(&[_]Feature{
1223 .avr5,
1224 }),
1225 };
1226 pub const atmega645p = Cpu{
1227 .name = "atmega645p",
1228 .llvm_name = "atmega645p",
1229 .features = featureSet(&[_]Feature{
1230 .avr5,
1231 }),
1232 };
1233 pub const atmega649 = Cpu{
1234 .name = "atmega649",
1235 .llvm_name = "atmega649",
1236 .features = featureSet(&[_]Feature{
1237 .avr5,
1238 }),
1239 };
1240 pub const atmega6490 = Cpu{
1241 .name = "atmega6490",
1242 .llvm_name = "atmega6490",
1243 .features = featureSet(&[_]Feature{
1244 .avr5,
1245 }),
1246 };
1247 pub const atmega6490a = Cpu{
1248 .name = "atmega6490a",
1249 .llvm_name = "atmega6490a",
1250 .features = featureSet(&[_]Feature{
1251 .avr5,
1252 }),
1253 };
1254 pub const atmega6490p = Cpu{
1255 .name = "atmega6490p",
1256 .llvm_name = "atmega6490p",
1257 .features = featureSet(&[_]Feature{
1258 .avr5,
1259 }),
1260 };
1261 pub const atmega649a = Cpu{
1262 .name = "atmega649a",
1263 .llvm_name = "atmega649a",
1264 .features = featureSet(&[_]Feature{
1265 .avr5,
1266 }),
1267 };
1268 pub const atmega649p = Cpu{
1269 .name = "atmega649p",
1270 .llvm_name = "atmega649p",
1271 .features = featureSet(&[_]Feature{
1272 .avr5,
1273 }),
1274 };
1275 pub const atmega64a = Cpu{
1276 .name = "atmega64a",
1277 .llvm_name = "atmega64a",
1278 .features = featureSet(&[_]Feature{
1279 .avr5,
1280 }),
1281 };
1282 pub const atmega64c1 = Cpu{
1283 .name = "atmega64c1",
1284 .llvm_name = "atmega64c1",
1285 .features = featureSet(&[_]Feature{
1286 .avr5,
1287 }),
1288 };
1289 pub const atmega64hve = Cpu{
1290 .name = "atmega64hve",
1291 .llvm_name = "atmega64hve",
1292 .features = featureSet(&[_]Feature{
1293 .avr5,
1294 }),
1295 };
1296 pub const atmega64m1 = Cpu{
1297 .name = "atmega64m1",
1298 .llvm_name = "atmega64m1",
1299 .features = featureSet(&[_]Feature{
1300 .avr5,
1301 }),
1302 };
1303 pub const atmega64rfr2 = Cpu{
1304 .name = "atmega64rfr2",
1305 .llvm_name = "atmega64rfr2",
1306 .features = featureSet(&[_]Feature{
1307 .avr5,
1308 }),
1309 };
1310 pub const atmega8 = Cpu{
1311 .name = "atmega8",
1312 .llvm_name = "atmega8",
1313 .features = featureSet(&[_]Feature{
1314 .avr4,
1315 }),
1316 };
1317 pub const atmega8515 = Cpu{
1318 .name = "atmega8515",
1319 .llvm_name = "atmega8515",
1320 .features = featureSet(&[_]Feature{
1321 .avr2,
1322 .lpmx,
1323 .movw,
1324 .mul,
1325 .spm,
1326 }),
1327 };
1328 pub const atmega8535 = Cpu{
1329 .name = "atmega8535",
1330 .llvm_name = "atmega8535",
1331 .features = featureSet(&[_]Feature{
1332 .avr2,
1333 .lpmx,
1334 .movw,
1335 .mul,
1336 .spm,
1337 }),
1338 };
1339 pub const atmega88 = Cpu{
1340 .name = "atmega88",
1341 .llvm_name = "atmega88",
1342 .features = featureSet(&[_]Feature{
1343 .avr4,
1344 }),
1345 };
1346 pub const atmega88a = Cpu{
1347 .name = "atmega88a",
1348 .llvm_name = "atmega88a",
1349 .features = featureSet(&[_]Feature{
1350 .avr4,
1351 }),
1352 };
1353 pub const atmega88p = Cpu{
1354 .name = "atmega88p",
1355 .llvm_name = "atmega88p",
1356 .features = featureSet(&[_]Feature{
1357 .avr4,
1358 }),
1359 };
1360 pub const atmega88pa = Cpu{
1361 .name = "atmega88pa",
1362 .llvm_name = "atmega88pa",
1363 .features = featureSet(&[_]Feature{
1364 .avr4,
1365 }),
1366 };
1367 pub const atmega8a = Cpu{
1368 .name = "atmega8a",
1369 .llvm_name = "atmega8a",
1370 .features = featureSet(&[_]Feature{
1371 .avr4,
1372 }),
1373 };
1374 pub const atmega8hva = Cpu{
1375 .name = "atmega8hva",
1376 .llvm_name = "atmega8hva",
1377 .features = featureSet(&[_]Feature{
1378 .avr4,
1379 }),
1380 };
1381 pub const atmega8u2 = Cpu{
1382 .name = "atmega8u2",
1383 .llvm_name = "atmega8u2",
1384 .features = featureSet(&[_]Feature{
1385 .avr35,
1386 }),
1387 };
1388 pub const attiny10 = Cpu{
1389 .name = "attiny10",
1390 .llvm_name = "attiny10",
1391 .features = featureSet(&[_]Feature{
1392 .avrtiny,
1393 }),
1394 };
1395 pub const attiny102 = Cpu{
1396 .name = "attiny102",
1397 .llvm_name = "attiny102",
1398 .features = featureSet(&[_]Feature{
1399 .avrtiny,
1400 }),
1401 };
1402 pub const attiny104 = Cpu{
1403 .name = "attiny104",
1404 .llvm_name = "attiny104",
1405 .features = featureSet(&[_]Feature{
1406 .avrtiny,
1407 }),
1408 };
1409 pub const attiny11 = Cpu{
1410 .name = "attiny11",
1411 .llvm_name = "attiny11",
1412 .features = featureSet(&[_]Feature{
1413 .avr1,
1414 }),
1415 };
1416 pub const attiny12 = Cpu{
1417 .name = "attiny12",
1418 .llvm_name = "attiny12",
1419 .features = featureSet(&[_]Feature{
1420 .avr1,
1421 }),
1422 };
1423 pub const attiny13 = Cpu{
1424 .name = "attiny13",
1425 .llvm_name = "attiny13",
1426 .features = featureSet(&[_]Feature{
1427 .avr25,
1428 }),
1429 };
1430 pub const attiny13a = Cpu{
1431 .name = "attiny13a",
1432 .llvm_name = "attiny13a",
1433 .features = featureSet(&[_]Feature{
1434 .avr25,
1435 }),
1436 };
1437 pub const attiny15 = Cpu{
1438 .name = "attiny15",
1439 .llvm_name = "attiny15",
1440 .features = featureSet(&[_]Feature{
1441 .avr1,
1442 }),
1443 };
1444 pub const attiny1634 = Cpu{
1445 .name = "attiny1634",
1446 .llvm_name = "attiny1634",
1447 .features = featureSet(&[_]Feature{
1448 .avr35,
1449 }),
1450 };
1451 pub const attiny167 = Cpu{
1452 .name = "attiny167",
1453 .llvm_name = "attiny167",
1454 .features = featureSet(&[_]Feature{
1455 .avr35,
1456 }),
1457 };
1458 pub const attiny20 = Cpu{
1459 .name = "attiny20",
1460 .llvm_name = "attiny20",
1461 .features = featureSet(&[_]Feature{
1462 .avrtiny,
1463 }),
1464 };
1465 pub const attiny22 = Cpu{
1466 .name = "attiny22",
1467 .llvm_name = "attiny22",
1468 .features = featureSet(&[_]Feature{
1469 .avr2,
1470 }),
1471 };
1472 pub const attiny2313 = Cpu{
1473 .name = "attiny2313",
1474 .llvm_name = "attiny2313",
1475 .features = featureSet(&[_]Feature{
1476 .avr25,
1477 }),
1478 };
1479 pub const attiny2313a = Cpu{
1480 .name = "attiny2313a",
1481 .llvm_name = "attiny2313a",
1482 .features = featureSet(&[_]Feature{
1483 .avr25,
1484 }),
1485 };
1486 pub const attiny24 = Cpu{
1487 .name = "attiny24",
1488 .llvm_name = "attiny24",
1489 .features = featureSet(&[_]Feature{
1490 .avr25,
1491 }),
1492 };
1493 pub const attiny24a = Cpu{
1494 .name = "attiny24a",
1495 .llvm_name = "attiny24a",
1496 .features = featureSet(&[_]Feature{
1497 .avr25,
1498 }),
1499 };
1500 pub const attiny25 = Cpu{
1501 .name = "attiny25",
1502 .llvm_name = "attiny25",
1503 .features = featureSet(&[_]Feature{
1504 .avr25,
1505 }),
1506 };
1507 pub const attiny26 = Cpu{
1508 .name = "attiny26",
1509 .llvm_name = "attiny26",
1510 .features = featureSet(&[_]Feature{
1511 .avr2,
1512 .lpmx,
1513 }),
1514 };
1515 pub const attiny261 = Cpu{
1516 .name = "attiny261",
1517 .llvm_name = "attiny261",
1518 .features = featureSet(&[_]Feature{
1519 .avr25,
1520 }),
1521 };
1522 pub const attiny261a = Cpu{
1523 .name = "attiny261a",
1524 .llvm_name = "attiny261a",
1525 .features = featureSet(&[_]Feature{
1526 .avr25,
1527 }),
1528 };
1529 pub const attiny28 = Cpu{
1530 .name = "attiny28",
1531 .llvm_name = "attiny28",
1532 .features = featureSet(&[_]Feature{
1533 .avr1,
1534 }),
1535 };
1536 pub const attiny4 = Cpu{
1537 .name = "attiny4",
1538 .llvm_name = "attiny4",
1539 .features = featureSet(&[_]Feature{
1540 .avrtiny,
1541 }),
1542 };
1543 pub const attiny40 = Cpu{
1544 .name = "attiny40",
1545 .llvm_name = "attiny40",
1546 .features = featureSet(&[_]Feature{
1547 .avrtiny,
1548 }),
1549 };
1550 pub const attiny4313 = Cpu{
1551 .name = "attiny4313",
1552 .llvm_name = "attiny4313",
1553 .features = featureSet(&[_]Feature{
1554 .avr25,
1555 }),
1556 };
1557 pub const attiny43u = Cpu{
1558 .name = "attiny43u",
1559 .llvm_name = "attiny43u",
1560 .features = featureSet(&[_]Feature{
1561 .avr25,
1562 }),
1563 };
1564 pub const attiny44 = Cpu{
1565 .name = "attiny44",
1566 .llvm_name = "attiny44",
1567 .features = featureSet(&[_]Feature{
1568 .avr25,
1569 }),
1570 };
1571 pub const attiny44a = Cpu{
1572 .name = "attiny44a",
1573 .llvm_name = "attiny44a",
1574 .features = featureSet(&[_]Feature{
1575 .avr25,
1576 }),
1577 };
1578 pub const attiny45 = Cpu{
1579 .name = "attiny45",
1580 .llvm_name = "attiny45",
1581 .features = featureSet(&[_]Feature{
1582 .avr25,
1583 }),
1584 };
1585 pub const attiny461 = Cpu{
1586 .name = "attiny461",
1587 .llvm_name = "attiny461",
1588 .features = featureSet(&[_]Feature{
1589 .avr25,
1590 }),
1591 };
1592 pub const attiny461a = Cpu{
1593 .name = "attiny461a",
1594 .llvm_name = "attiny461a",
1595 .features = featureSet(&[_]Feature{
1596 .avr25,
1597 }),
1598 };
1599 pub const attiny48 = Cpu{
1600 .name = "attiny48",
1601 .llvm_name = "attiny48",
1602 .features = featureSet(&[_]Feature{
1603 .avr25,
1604 }),
1605 };
1606 pub const attiny5 = Cpu{
1607 .name = "attiny5",
1608 .llvm_name = "attiny5",
1609 .features = featureSet(&[_]Feature{
1610 .avrtiny,
1611 }),
1612 };
1613 pub const attiny828 = Cpu{
1614 .name = "attiny828",
1615 .llvm_name = "attiny828",
1616 .features = featureSet(&[_]Feature{
1617 .avr25,
1618 }),
1619 };
1620 pub const attiny84 = Cpu{
1621 .name = "attiny84",
1622 .llvm_name = "attiny84",
1623 .features = featureSet(&[_]Feature{
1624 .avr25,
1625 }),
1626 };
1627 pub const attiny84a = Cpu{
1628 .name = "attiny84a",
1629 .llvm_name = "attiny84a",
1630 .features = featureSet(&[_]Feature{
1631 .avr25,
1632 }),
1633 };
1634 pub const attiny85 = Cpu{
1635 .name = "attiny85",
1636 .llvm_name = "attiny85",
1637 .features = featureSet(&[_]Feature{
1638 .avr25,
1639 }),
1640 };
1641 pub const attiny861 = Cpu{
1642 .name = "attiny861",
1643 .llvm_name = "attiny861",
1644 .features = featureSet(&[_]Feature{
1645 .avr25,
1646 }),
1647 };
1648 pub const attiny861a = Cpu{
1649 .name = "attiny861a",
1650 .llvm_name = "attiny861a",
1651 .features = featureSet(&[_]Feature{
1652 .avr25,
1653 }),
1654 };
1655 pub const attiny87 = Cpu{
1656 .name = "attiny87",
1657 .llvm_name = "attiny87",
1658 .features = featureSet(&[_]Feature{
1659 .avr25,
1660 }),
1661 };
1662 pub const attiny88 = Cpu{
1663 .name = "attiny88",
1664 .llvm_name = "attiny88",
1665 .features = featureSet(&[_]Feature{
1666 .avr25,
1667 }),
1668 };
1669 pub const attiny9 = Cpu{
1670 .name = "attiny9",
1671 .llvm_name = "attiny9",
1672 .features = featureSet(&[_]Feature{
1673 .avrtiny,
1674 }),
1675 };
1676 pub const atxmega128a1 = Cpu{
1677 .name = "atxmega128a1",
1678 .llvm_name = "atxmega128a1",
1679 .features = featureSet(&[_]Feature{
1680 .xmega,
1681 }),
1682 };
1683 pub const atxmega128a1u = Cpu{
1684 .name = "atxmega128a1u",
1685 .llvm_name = "atxmega128a1u",
1686 .features = featureSet(&[_]Feature{
1687 .xmegau,
1688 }),
1689 };
1690 pub const atxmega128a3 = Cpu{
1691 .name = "atxmega128a3",
1692 .llvm_name = "atxmega128a3",
1693 .features = featureSet(&[_]Feature{
1694 .xmega,
1695 }),
1696 };
1697 pub const atxmega128a3u = Cpu{
1698 .name = "atxmega128a3u",
1699 .llvm_name = "atxmega128a3u",
1700 .features = featureSet(&[_]Feature{
1701 .xmegau,
1702 }),
1703 };
1704 pub const atxmega128a4u = Cpu{
1705 .name = "atxmega128a4u",
1706 .llvm_name = "atxmega128a4u",
1707 .features = featureSet(&[_]Feature{
1708 .xmegau,
1709 }),
1710 };
1711 pub const atxmega128b1 = Cpu{
1712 .name = "atxmega128b1",
1713 .llvm_name = "atxmega128b1",
1714 .features = featureSet(&[_]Feature{
1715 .xmegau,
1716 }),
1717 };
1718 pub const atxmega128b3 = Cpu{
1719 .name = "atxmega128b3",
1720 .llvm_name = "atxmega128b3",
1721 .features = featureSet(&[_]Feature{
1722 .xmegau,
1723 }),
1724 };
1725 pub const atxmega128c3 = Cpu{
1726 .name = "atxmega128c3",
1727 .llvm_name = "atxmega128c3",
1728 .features = featureSet(&[_]Feature{
1729 .xmegau,
1730 }),
1731 };
1732 pub const atxmega128d3 = Cpu{
1733 .name = "atxmega128d3",
1734 .llvm_name = "atxmega128d3",
1735 .features = featureSet(&[_]Feature{
1736 .xmega,
1737 }),
1738 };
1739 pub const atxmega128d4 = Cpu{
1740 .name = "atxmega128d4",
1741 .llvm_name = "atxmega128d4",
1742 .features = featureSet(&[_]Feature{
1743 .xmega,
1744 }),
1745 };
1746 pub const atxmega16a4 = Cpu{
1747 .name = "atxmega16a4",
1748 .llvm_name = "atxmega16a4",
1749 .features = featureSet(&[_]Feature{
1750 .xmega,
1751 }),
1752 };
1753 pub const atxmega16a4u = Cpu{
1754 .name = "atxmega16a4u",
1755 .llvm_name = "atxmega16a4u",
1756 .features = featureSet(&[_]Feature{
1757 .xmegau,
1758 }),
1759 };
1760 pub const atxmega16c4 = Cpu{
1761 .name = "atxmega16c4",
1762 .llvm_name = "atxmega16c4",
1763 .features = featureSet(&[_]Feature{
1764 .xmegau,
1765 }),
1766 };
1767 pub const atxmega16d4 = Cpu{
1768 .name = "atxmega16d4",
1769 .llvm_name = "atxmega16d4",
1770 .features = featureSet(&[_]Feature{
1771 .xmega,
1772 }),
1773 };
1774 pub const atxmega16e5 = Cpu{
1775 .name = "atxmega16e5",
1776 .llvm_name = "atxmega16e5",
1777 .features = featureSet(&[_]Feature{
1778 .xmega,
1779 }),
1780 };
1781 pub const atxmega192a3 = Cpu{
1782 .name = "atxmega192a3",
1783 .llvm_name = "atxmega192a3",
1784 .features = featureSet(&[_]Feature{
1785 .xmega,
1786 }),
1787 };
1788 pub const atxmega192a3u = Cpu{
1789 .name = "atxmega192a3u",
1790 .llvm_name = "atxmega192a3u",
1791 .features = featureSet(&[_]Feature{
1792 .xmegau,
1793 }),
1794 };
1795 pub const atxmega192c3 = Cpu{
1796 .name = "atxmega192c3",
1797 .llvm_name = "atxmega192c3",
1798 .features = featureSet(&[_]Feature{
1799 .xmegau,
1800 }),
1801 };
1802 pub const atxmega192d3 = Cpu{
1803 .name = "atxmega192d3",
1804 .llvm_name = "atxmega192d3",
1805 .features = featureSet(&[_]Feature{
1806 .xmega,
1807 }),
1808 };
1809 pub const atxmega256a3 = Cpu{
1810 .name = "atxmega256a3",
1811 .llvm_name = "atxmega256a3",
1812 .features = featureSet(&[_]Feature{
1813 .xmega,
1814 }),
1815 };
1816 pub const atxmega256a3b = Cpu{
1817 .name = "atxmega256a3b",
1818 .llvm_name = "atxmega256a3b",
1819 .features = featureSet(&[_]Feature{
1820 .xmega,
1821 }),
1822 };
1823 pub const atxmega256a3bu = Cpu{
1824 .name = "atxmega256a3bu",
1825 .llvm_name = "atxmega256a3bu",
1826 .features = featureSet(&[_]Feature{
1827 .xmegau,
1828 }),
1829 };
1830 pub const atxmega256a3u = Cpu{
1831 .name = "atxmega256a3u",
1832 .llvm_name = "atxmega256a3u",
1833 .features = featureSet(&[_]Feature{
1834 .xmegau,
1835 }),
1836 };
1837 pub const atxmega256c3 = Cpu{
1838 .name = "atxmega256c3",
1839 .llvm_name = "atxmega256c3",
1840 .features = featureSet(&[_]Feature{
1841 .xmegau,
1842 }),
1843 };
1844 pub const atxmega256d3 = Cpu{
1845 .name = "atxmega256d3",
1846 .llvm_name = "atxmega256d3",
1847 .features = featureSet(&[_]Feature{
1848 .xmega,
1849 }),
1850 };
1851 pub const atxmega32a4 = Cpu{
1852 .name = "atxmega32a4",
1853 .llvm_name = "atxmega32a4",
1854 .features = featureSet(&[_]Feature{
1855 .xmega,
1856 }),
1857 };
1858 pub const atxmega32a4u = Cpu{
1859 .name = "atxmega32a4u",
1860 .llvm_name = "atxmega32a4u",
1861 .features = featureSet(&[_]Feature{
1862 .xmegau,
1863 }),
1864 };
1865 pub const atxmega32c4 = Cpu{
1866 .name = "atxmega32c4",
1867 .llvm_name = "atxmega32c4",
1868 .features = featureSet(&[_]Feature{
1869 .xmegau,
1870 }),
1871 };
1872 pub const atxmega32d4 = Cpu{
1873 .name = "atxmega32d4",
1874 .llvm_name = "atxmega32d4",
1875 .features = featureSet(&[_]Feature{
1876 .xmega,
1877 }),
1878 };
1879 pub const atxmega32e5 = Cpu{
1880 .name = "atxmega32e5",
1881 .llvm_name = "atxmega32e5",
1882 .features = featureSet(&[_]Feature{
1883 .xmega,
1884 }),
1885 };
1886 pub const atxmega32x1 = Cpu{
1887 .name = "atxmega32x1",
1888 .llvm_name = "atxmega32x1",
1889 .features = featureSet(&[_]Feature{
1890 .xmega,
1891 }),
1892 };
1893 pub const atxmega384c3 = Cpu{
1894 .name = "atxmega384c3",
1895 .llvm_name = "atxmega384c3",
1896 .features = featureSet(&[_]Feature{
1897 .xmegau,
1898 }),
1899 };
1900 pub const atxmega384d3 = Cpu{
1901 .name = "atxmega384d3",
1902 .llvm_name = "atxmega384d3",
1903 .features = featureSet(&[_]Feature{
1904 .xmega,
1905 }),
1906 };
1907 pub const atxmega64a1 = Cpu{
1908 .name = "atxmega64a1",
1909 .llvm_name = "atxmega64a1",
1910 .features = featureSet(&[_]Feature{
1911 .xmega,
1912 }),
1913 };
1914 pub const atxmega64a1u = Cpu{
1915 .name = "atxmega64a1u",
1916 .llvm_name = "atxmega64a1u",
1917 .features = featureSet(&[_]Feature{
1918 .xmegau,
1919 }),
1920 };
1921 pub const atxmega64a3 = Cpu{
1922 .name = "atxmega64a3",
1923 .llvm_name = "atxmega64a3",
1924 .features = featureSet(&[_]Feature{
1925 .xmega,
1926 }),
1927 };
1928 pub const atxmega64a3u = Cpu{
1929 .name = "atxmega64a3u",
1930 .llvm_name = "atxmega64a3u",
1931 .features = featureSet(&[_]Feature{
1932 .xmegau,
1933 }),
1934 };
1935 pub const atxmega64a4u = Cpu{
1936 .name = "atxmega64a4u",
1937 .llvm_name = "atxmega64a4u",
1938 .features = featureSet(&[_]Feature{
1939 .xmegau,
1940 }),
1941 };
1942 pub const atxmega64b1 = Cpu{
1943 .name = "atxmega64b1",
1944 .llvm_name = "atxmega64b1",
1945 .features = featureSet(&[_]Feature{
1946 .xmegau,
1947 }),
1948 };
1949 pub const atxmega64b3 = Cpu{
1950 .name = "atxmega64b3",
1951 .llvm_name = "atxmega64b3",
1952 .features = featureSet(&[_]Feature{
1953 .xmegau,
1954 }),
1955 };
1956 pub const atxmega64c3 = Cpu{
1957 .name = "atxmega64c3",
1958 .llvm_name = "atxmega64c3",
1959 .features = featureSet(&[_]Feature{
1960 .xmegau,
1961 }),
1962 };
1963 pub const atxmega64d3 = Cpu{
1964 .name = "atxmega64d3",
1965 .llvm_name = "atxmega64d3",
1966 .features = featureSet(&[_]Feature{
1967 .xmega,
1968 }),
1969 };
1970 pub const atxmega64d4 = Cpu{
1971 .name = "atxmega64d4",
1972 .llvm_name = "atxmega64d4",
1973 .features = featureSet(&[_]Feature{
1974 .xmega,
1975 }),
1976 };
1977 pub const atxmega8e5 = Cpu{
1978 .name = "atxmega8e5",
1979 .llvm_name = "atxmega8e5",
1980 .features = featureSet(&[_]Feature{
1981 .xmega,
1982 }),
1983 };
1984 pub const avr1 = Cpu{
1985 .name = "avr1",
1986 .llvm_name = "avr1",
1987 .features = featureSet(&[_]Feature{
1988 .avr1,
1989 }),
1990 };
1991 pub const avr2 = Cpu{
1992 .name = "avr2",
1993 .llvm_name = "avr2",
1994 .features = featureSet(&[_]Feature{
1995 .avr2,
1996 }),
1997 };
1998 pub const avr25 = Cpu{
1999 .name = "avr25",
2000 .llvm_name = "avr25",
2001 .features = featureSet(&[_]Feature{
2002 .avr25,
2003 }),
2004 };
2005 pub const avr3 = Cpu{
2006 .name = "avr3",
2007 .llvm_name = "avr3",
2008 .features = featureSet(&[_]Feature{
2009 .avr3,
2010 }),
2011 };
2012 pub const avr31 = Cpu{
2013 .name = "avr31",
2014 .llvm_name = "avr31",
2015 .features = featureSet(&[_]Feature{
2016 .avr31,
2017 }),
2018 };
2019 pub const avr35 = Cpu{
2020 .name = "avr35",
2021 .llvm_name = "avr35",
2022 .features = featureSet(&[_]Feature{
2023 .avr35,
2024 }),
2025 };
2026 pub const avr4 = Cpu{
2027 .name = "avr4",
2028 .llvm_name = "avr4",
2029 .features = featureSet(&[_]Feature{
2030 .avr4,
2031 }),
2032 };
2033 pub const avr5 = Cpu{
2034 .name = "avr5",
2035 .llvm_name = "avr5",
2036 .features = featureSet(&[_]Feature{
2037 .avr5,
2038 }),
2039 };
2040 pub const avr51 = Cpu{
2041 .name = "avr51",
2042 .llvm_name = "avr51",
2043 .features = featureSet(&[_]Feature{
2044 .avr51,
2045 }),
2046 };
2047 pub const avr6 = Cpu{
2048 .name = "avr6",
2049 .llvm_name = "avr6",
2050 .features = featureSet(&[_]Feature{
2051 .avr6,
2052 }),
2053 };
2054 pub const avrtiny = Cpu{
2055 .name = "avrtiny",
2056 .llvm_name = "avrtiny",
2057 .features = featureSet(&[_]Feature{
2058 .avrtiny,
2059 }),
2060 };
2061 pub const avrxmega1 = Cpu{
2062 .name = "avrxmega1",
2063 .llvm_name = "avrxmega1",
2064 .features = featureSet(&[_]Feature{
2065 .xmega,
2066 }),
2067 };
2068 pub const avrxmega2 = Cpu{
2069 .name = "avrxmega2",
2070 .llvm_name = "avrxmega2",
2071 .features = featureSet(&[_]Feature{
2072 .xmega,
2073 }),
2074 };
2075 pub const avrxmega3 = Cpu{
2076 .name = "avrxmega3",
2077 .llvm_name = "avrxmega3",
2078 .features = featureSet(&[_]Feature{
2079 .xmega,
2080 }),
2081 };
2082 pub const avrxmega4 = Cpu{
2083 .name = "avrxmega4",
2084 .llvm_name = "avrxmega4",
2085 .features = featureSet(&[_]Feature{
2086 .xmega,
2087 }),
2088 };
2089 pub const avrxmega5 = Cpu{
2090 .name = "avrxmega5",
2091 .llvm_name = "avrxmega5",
2092 .features = featureSet(&[_]Feature{
2093 .xmega,
2094 }),
2095 };
2096 pub const avrxmega6 = Cpu{
2097 .name = "avrxmega6",
2098 .llvm_name = "avrxmega6",
2099 .features = featureSet(&[_]Feature{
2100 .xmega,
2101 }),
2102 };
2103 pub const avrxmega7 = Cpu{
2104 .name = "avrxmega7",
2105 .llvm_name = "avrxmega7",
2106 .features = featureSet(&[_]Feature{
2107 .xmega,
2108 }),
2109 };
2110 pub const m3000 = Cpu{
2111 .name = "m3000",
2112 .llvm_name = "m3000",
2113 .features = featureSet(&[_]Feature{
2114 .avr5,
2115 }),
2116 };
2117};
2118
2119/// All avr CPUs, sorted alphabetically by name.
2120/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
2121/// compiler has inefficient memory and CPU usage, affecting build times.
2122pub const all_cpus = &[_]*const Cpu{
2123 &cpu.at43usb320,
2124 &cpu.at43usb355,
2125 &cpu.at76c711,
2126 &cpu.at86rf401,
2127 &cpu.at90c8534,
2128 &cpu.at90can128,
2129 &cpu.at90can32,
2130 &cpu.at90can64,
2131 &cpu.at90pwm1,
2132 &cpu.at90pwm161,
2133 &cpu.at90pwm2,
2134 &cpu.at90pwm216,
2135 &cpu.at90pwm2b,
2136 &cpu.at90pwm3,
2137 &cpu.at90pwm316,
2138 &cpu.at90pwm3b,
2139 &cpu.at90pwm81,
2140 &cpu.at90s1200,
2141 &cpu.at90s2313,
2142 &cpu.at90s2323,
2143 &cpu.at90s2333,
2144 &cpu.at90s2343,
2145 &cpu.at90s4414,
2146 &cpu.at90s4433,
2147 &cpu.at90s4434,
2148 &cpu.at90s8515,
2149 &cpu.at90s8535,
2150 &cpu.at90scr100,
2151 &cpu.at90usb1286,
2152 &cpu.at90usb1287,
2153 &cpu.at90usb162,
2154 &cpu.at90usb646,
2155 &cpu.at90usb647,
2156 &cpu.at90usb82,
2157 &cpu.at94k,
2158 &cpu.ata5272,
2159 &cpu.ata5505,
2160 &cpu.ata5790,
2161 &cpu.ata5795,
2162 &cpu.ata6285,
2163 &cpu.ata6286,
2164 &cpu.ata6289,
2165 &cpu.atmega103,
2166 &cpu.atmega128,
2167 &cpu.atmega1280,
2168 &cpu.atmega1281,
2169 &cpu.atmega1284,
2170 &cpu.atmega1284p,
2171 &cpu.atmega1284rfr2,
2172 &cpu.atmega128a,
2173 &cpu.atmega128rfa1,
2174 &cpu.atmega128rfr2,
2175 &cpu.atmega16,
2176 &cpu.atmega161,
2177 &cpu.atmega162,
2178 &cpu.atmega163,
2179 &cpu.atmega164a,
2180 &cpu.atmega164p,
2181 &cpu.atmega164pa,
2182 &cpu.atmega165,
2183 &cpu.atmega165a,
2184 &cpu.atmega165p,
2185 &cpu.atmega165pa,
2186 &cpu.atmega168,
2187 &cpu.atmega168a,
2188 &cpu.atmega168p,
2189 &cpu.atmega168pa,
2190 &cpu.atmega169,
2191 &cpu.atmega169a,
2192 &cpu.atmega169p,
2193 &cpu.atmega169pa,
2194 &cpu.atmega16a,
2195 &cpu.atmega16hva,
2196 &cpu.atmega16hva2,
2197 &cpu.atmega16hvb,
2198 &cpu.atmega16hvbrevb,
2199 &cpu.atmega16m1,
2200 &cpu.atmega16u2,
2201 &cpu.atmega16u4,
2202 &cpu.atmega2560,
2203 &cpu.atmega2561,
2204 &cpu.atmega2564rfr2,
2205 &cpu.atmega256rfr2,
2206 &cpu.atmega32,
2207 &cpu.atmega323,
2208 &cpu.atmega324a,
2209 &cpu.atmega324p,
2210 &cpu.atmega324pa,
2211 &cpu.atmega325,
2212 &cpu.atmega3250,
2213 &cpu.atmega3250a,
2214 &cpu.atmega3250p,
2215 &cpu.atmega3250pa,
2216 &cpu.atmega325a,
2217 &cpu.atmega325p,
2218 &cpu.atmega325pa,
2219 &cpu.atmega328,
2220 &cpu.atmega328p,
2221 &cpu.atmega329,
2222 &cpu.atmega3290,
2223 &cpu.atmega3290a,
2224 &cpu.atmega3290p,
2225 &cpu.atmega3290pa,
2226 &cpu.atmega329a,
2227 &cpu.atmega329p,
2228 &cpu.atmega329pa,
2229 &cpu.atmega32a,
2230 &cpu.atmega32c1,
2231 &cpu.atmega32hvb,
2232 &cpu.atmega32hvbrevb,
2233 &cpu.atmega32m1,
2234 &cpu.atmega32u2,
2235 &cpu.atmega32u4,
2236 &cpu.atmega32u6,
2237 &cpu.atmega406,
2238 &cpu.atmega48,
2239 &cpu.atmega48a,
2240 &cpu.atmega48p,
2241 &cpu.atmega48pa,
2242 &cpu.atmega64,
2243 &cpu.atmega640,
2244 &cpu.atmega644,
2245 &cpu.atmega644a,
2246 &cpu.atmega644p,
2247 &cpu.atmega644pa,
2248 &cpu.atmega644rfr2,
2249 &cpu.atmega645,
2250 &cpu.atmega6450,
2251 &cpu.atmega6450a,
2252 &cpu.atmega6450p,
2253 &cpu.atmega645a,
2254 &cpu.atmega645p,
2255 &cpu.atmega649,
2256 &cpu.atmega6490,
2257 &cpu.atmega6490a,
2258 &cpu.atmega6490p,
2259 &cpu.atmega649a,
2260 &cpu.atmega649p,
2261 &cpu.atmega64a,
2262 &cpu.atmega64c1,
2263 &cpu.atmega64hve,
2264 &cpu.atmega64m1,
2265 &cpu.atmega64rfr2,
2266 &cpu.atmega8,
2267 &cpu.atmega8515,
2268 &cpu.atmega8535,
2269 &cpu.atmega88,
2270 &cpu.atmega88a,
2271 &cpu.atmega88p,
2272 &cpu.atmega88pa,
2273 &cpu.atmega8a,
2274 &cpu.atmega8hva,
2275 &cpu.atmega8u2,
2276 &cpu.attiny10,
2277 &cpu.attiny102,
2278 &cpu.attiny104,
2279 &cpu.attiny11,
2280 &cpu.attiny12,
2281 &cpu.attiny13,
2282 &cpu.attiny13a,
2283 &cpu.attiny15,
2284 &cpu.attiny1634,
2285 &cpu.attiny167,
2286 &cpu.attiny20,
2287 &cpu.attiny22,
2288 &cpu.attiny2313,
2289 &cpu.attiny2313a,
2290 &cpu.attiny24,
2291 &cpu.attiny24a,
2292 &cpu.attiny25,
2293 &cpu.attiny26,
2294 &cpu.attiny261,
2295 &cpu.attiny261a,
2296 &cpu.attiny28,
2297 &cpu.attiny4,
2298 &cpu.attiny40,
2299 &cpu.attiny4313,
2300 &cpu.attiny43u,
2301 &cpu.attiny44,
2302 &cpu.attiny44a,
2303 &cpu.attiny45,
2304 &cpu.attiny461,
2305 &cpu.attiny461a,
2306 &cpu.attiny48,
2307 &cpu.attiny5,
2308 &cpu.attiny828,
2309 &cpu.attiny84,
2310 &cpu.attiny84a,
2311 &cpu.attiny85,
2312 &cpu.attiny861,
2313 &cpu.attiny861a,
2314 &cpu.attiny87,
2315 &cpu.attiny88,
2316 &cpu.attiny9,
2317 &cpu.atxmega128a1,
2318 &cpu.atxmega128a1u,
2319 &cpu.atxmega128a3,
2320 &cpu.atxmega128a3u,
2321 &cpu.atxmega128a4u,
2322 &cpu.atxmega128b1,
2323 &cpu.atxmega128b3,
2324 &cpu.atxmega128c3,
2325 &cpu.atxmega128d3,
2326 &cpu.atxmega128d4,
2327 &cpu.atxmega16a4,
2328 &cpu.atxmega16a4u,
2329 &cpu.atxmega16c4,
2330 &cpu.atxmega16d4,
2331 &cpu.atxmega16e5,
2332 &cpu.atxmega192a3,
2333 &cpu.atxmega192a3u,
2334 &cpu.atxmega192c3,
2335 &cpu.atxmega192d3,
2336 &cpu.atxmega256a3,
2337 &cpu.atxmega256a3b,
2338 &cpu.atxmega256a3bu,
2339 &cpu.atxmega256a3u,
2340 &cpu.atxmega256c3,
2341 &cpu.atxmega256d3,
2342 &cpu.atxmega32a4,
2343 &cpu.atxmega32a4u,
2344 &cpu.atxmega32c4,
2345 &cpu.atxmega32d4,
2346 &cpu.atxmega32e5,
2347 &cpu.atxmega32x1,
2348 &cpu.atxmega384c3,
2349 &cpu.atxmega384d3,
2350 &cpu.atxmega64a1,
2351 &cpu.atxmega64a1u,
2352 &cpu.atxmega64a3,
2353 &cpu.atxmega64a3u,
2354 &cpu.atxmega64a4u,
2355 &cpu.atxmega64b1,
2356 &cpu.atxmega64b3,
2357 &cpu.atxmega64c3,
2358 &cpu.atxmega64d3,
2359 &cpu.atxmega64d4,
2360 &cpu.atxmega8e5,
2361 &cpu.avr1,
2362 &cpu.avr2,
2363 &cpu.avr25,
2364 &cpu.avr3,
2365 &cpu.avr31,
2366 &cpu.avr35,
2367 &cpu.avr4,
2368 &cpu.avr5,
2369 &cpu.avr51,
2370 &cpu.avr6,
2371 &cpu.avrtiny,
2372 &cpu.avrxmega1,
2373 &cpu.avrxmega2,
2374 &cpu.avrxmega3,
2375 &cpu.avrxmega4,
2376 &cpu.avrxmega5,
2377 &cpu.avrxmega6,
2378 &cpu.avrxmega7,
2379 &cpu.m3000,
2380};
lib/std/target/bpf.zig created+76
...@@ -0,0 +1,76 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 alu32,
6 dummy,
7 dwarfris,
8};
9
10pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
11
12pub const all_features = blk: {
13 const len = @typeInfo(Feature).Enum.fields.len;
14 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
15 var result: [len]Cpu.Feature = undefined;
16 result[@enumToInt(Feature.alu32)] = .{
17 .llvm_name = "alu32",
18 .description = "Enable ALU32 instructions",
19 .dependencies = featureSet(&[_]Feature{}),
20 };
21 result[@enumToInt(Feature.dummy)] = .{
22 .llvm_name = "dummy",
23 .description = "unused feature",
24 .dependencies = featureSet(&[_]Feature{}),
25 };
26 result[@enumToInt(Feature.dwarfris)] = .{
27 .llvm_name = "dwarfris",
28 .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections",
29 .dependencies = featureSet(&[_]Feature{}),
30 };
31 const ti = @typeInfo(Feature);
32 for (result) |*elem, i| {
33 elem.index = i;
34 elem.name = ti.Enum.fields[i].name;
35 }
36 break :blk result;
37};
38
39pub const cpu = struct {
40 pub const generic = Cpu{
41 .name = "generic",
42 .llvm_name = "generic",
43 .features = featureSet(&[_]Feature{}),
44 };
45 pub const probe = Cpu{
46 .name = "probe",
47 .llvm_name = "probe",
48 .features = featureSet(&[_]Feature{}),
49 };
50 pub const v1 = Cpu{
51 .name = "v1",
52 .llvm_name = "v1",
53 .features = featureSet(&[_]Feature{}),
54 };
55 pub const v2 = Cpu{
56 .name = "v2",
57 .llvm_name = "v2",
58 .features = featureSet(&[_]Feature{}),
59 };
60 pub const v3 = Cpu{
61 .name = "v3",
62 .llvm_name = "v3",
63 .features = featureSet(&[_]Feature{}),
64 };
65};
66
67/// All bpf CPUs, sorted alphabetically by name.
68/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
69/// compiler has inefficient memory and CPU usage, affecting build times.
70pub const all_cpus = &[_]*const Cpu{
71 &cpu.generic,
72 &cpu.probe,
73 &cpu.v1,
74 &cpu.v2,
75 &cpu.v3,
76};
lib/std/target/hexagon.zig created+312
...@@ -0,0 +1,312 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 duplex,
6 hvx,
7 hvx_length128b,
8 hvx_length64b,
9 hvxv60,
10 hvxv62,
11 hvxv65,
12 hvxv66,
13 long_calls,
14 mem_noshuf,
15 memops,
16 noreturn_stack_elim,
17 nvj,
18 nvs,
19 packets,
20 reserved_r19,
21 small_data,
22 v5,
23 v55,
24 v60,
25 v62,
26 v65,
27 v66,
28 zreg,
29};
30
31pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
32
33pub const all_features = blk: {
34 const len = @typeInfo(Feature).Enum.fields.len;
35 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
36 var result: [len]Cpu.Feature = undefined;
37 result[@enumToInt(Feature.duplex)] = .{
38 .llvm_name = "duplex",
39 .description = "Enable generation of duplex instruction",
40 .dependencies = featureSet(&[_]Feature{}),
41 };
42 result[@enumToInt(Feature.hvx)] = .{
43 .llvm_name = "hvx",
44 .description = "Hexagon HVX instructions",
45 .dependencies = featureSet(&[_]Feature{}),
46 };
47 result[@enumToInt(Feature.hvx_length128b)] = .{
48 .llvm_name = "hvx-length128b",
49 .description = "Hexagon HVX 128B instructions",
50 .dependencies = featureSet(&[_]Feature{
51 .hvx,
52 }),
53 };
54 result[@enumToInt(Feature.hvx_length64b)] = .{
55 .llvm_name = "hvx-length64b",
56 .description = "Hexagon HVX 64B instructions",
57 .dependencies = featureSet(&[_]Feature{
58 .hvx,
59 }),
60 };
61 result[@enumToInt(Feature.hvxv60)] = .{
62 .llvm_name = "hvxv60",
63 .description = "Hexagon HVX instructions",
64 .dependencies = featureSet(&[_]Feature{
65 .hvx,
66 }),
67 };
68 result[@enumToInt(Feature.hvxv62)] = .{
69 .llvm_name = "hvxv62",
70 .description = "Hexagon HVX instructions",
71 .dependencies = featureSet(&[_]Feature{
72 .hvx,
73 .hvxv60,
74 }),
75 };
76 result[@enumToInt(Feature.hvxv65)] = .{
77 .llvm_name = "hvxv65",
78 .description = "Hexagon HVX instructions",
79 .dependencies = featureSet(&[_]Feature{
80 .hvx,
81 .hvxv60,
82 .hvxv62,
83 }),
84 };
85 result[@enumToInt(Feature.hvxv66)] = .{
86 .llvm_name = "hvxv66",
87 .description = "Hexagon HVX instructions",
88 .dependencies = featureSet(&[_]Feature{
89 .hvx,
90 .hvxv60,
91 .hvxv62,
92 .hvxv65,
93 .zreg,
94 }),
95 };
96 result[@enumToInt(Feature.long_calls)] = .{
97 .llvm_name = "long-calls",
98 .description = "Use constant-extended calls",
99 .dependencies = featureSet(&[_]Feature{}),
100 };
101 result[@enumToInt(Feature.mem_noshuf)] = .{
102 .llvm_name = "mem_noshuf",
103 .description = "Supports mem_noshuf feature",
104 .dependencies = featureSet(&[_]Feature{}),
105 };
106 result[@enumToInt(Feature.memops)] = .{
107 .llvm_name = "memops",
108 .description = "Use memop instructions",
109 .dependencies = featureSet(&[_]Feature{}),
110 };
111 result[@enumToInt(Feature.noreturn_stack_elim)] = .{
112 .llvm_name = "noreturn-stack-elim",
113 .description = "Eliminate stack allocation in a noreturn function when possible",
114 .dependencies = featureSet(&[_]Feature{}),
115 };
116 result[@enumToInt(Feature.nvj)] = .{
117 .llvm_name = "nvj",
118 .description = "Support for new-value jumps",
119 .dependencies = featureSet(&[_]Feature{
120 .packets,
121 }),
122 };
123 result[@enumToInt(Feature.nvs)] = .{
124 .llvm_name = "nvs",
125 .description = "Support for new-value stores",
126 .dependencies = featureSet(&[_]Feature{
127 .packets,
128 }),
129 };
130 result[@enumToInt(Feature.packets)] = .{
131 .llvm_name = "packets",
132 .description = "Support for instruction packets",
133 .dependencies = featureSet(&[_]Feature{}),
134 };
135 result[@enumToInt(Feature.reserved_r19)] = .{
136 .llvm_name = "reserved-r19",
137 .description = "Reserve register R19",
138 .dependencies = featureSet(&[_]Feature{}),
139 };
140 result[@enumToInt(Feature.small_data)] = .{
141 .llvm_name = "small-data",
142 .description = "Allow GP-relative addressing of global variables",
143 .dependencies = featureSet(&[_]Feature{}),
144 };
145 result[@enumToInt(Feature.v5)] = .{
146 .llvm_name = "v5",
147 .description = "Enable Hexagon V5 architecture",
148 .dependencies = featureSet(&[_]Feature{}),
149 };
150 result[@enumToInt(Feature.v55)] = .{
151 .llvm_name = "v55",
152 .description = "Enable Hexagon V55 architecture",
153 .dependencies = featureSet(&[_]Feature{}),
154 };
155 result[@enumToInt(Feature.v60)] = .{
156 .llvm_name = "v60",
157 .description = "Enable Hexagon V60 architecture",
158 .dependencies = featureSet(&[_]Feature{}),
159 };
160 result[@enumToInt(Feature.v62)] = .{
161 .llvm_name = "v62",
162 .description = "Enable Hexagon V62 architecture",
163 .dependencies = featureSet(&[_]Feature{}),
164 };
165 result[@enumToInt(Feature.v65)] = .{
166 .llvm_name = "v65",
167 .description = "Enable Hexagon V65 architecture",
168 .dependencies = featureSet(&[_]Feature{}),
169 };
170 result[@enumToInt(Feature.v66)] = .{
171 .llvm_name = "v66",
172 .description = "Enable Hexagon V66 architecture",
173 .dependencies = featureSet(&[_]Feature{}),
174 };
175 result[@enumToInt(Feature.zreg)] = .{
176 .llvm_name = "zreg",
177 .description = "Hexagon ZReg extension instructions",
178 .dependencies = featureSet(&[_]Feature{}),
179 };
180 const ti = @typeInfo(Feature);
181 for (result) |*elem, i| {
182 elem.index = i;
183 elem.name = ti.Enum.fields[i].name;
184 }
185 break :blk result;
186};
187
188pub const cpu = struct {
189 pub const generic = Cpu{
190 .name = "generic",
191 .llvm_name = "generic",
192 .features = featureSet(&[_]Feature{
193 .duplex,
194 .memops,
195 .nvj,
196 .nvs,
197 .packets,
198 .small_data,
199 .v5,
200 .v55,
201 .v60,
202 }),
203 };
204 pub const hexagonv5 = Cpu{
205 .name = "hexagonv5",
206 .llvm_name = "hexagonv5",
207 .features = featureSet(&[_]Feature{
208 .duplex,
209 .memops,
210 .nvj,
211 .nvs,
212 .packets,
213 .small_data,
214 .v5,
215 }),
216 };
217 pub const hexagonv55 = Cpu{
218 .name = "hexagonv55",
219 .llvm_name = "hexagonv55",
220 .features = featureSet(&[_]Feature{
221 .duplex,
222 .memops,
223 .nvj,
224 .nvs,
225 .packets,
226 .small_data,
227 .v5,
228 .v55,
229 }),
230 };
231 pub const hexagonv60 = Cpu{
232 .name = "hexagonv60",
233 .llvm_name = "hexagonv60",
234 .features = featureSet(&[_]Feature{
235 .duplex,
236 .memops,
237 .nvj,
238 .nvs,
239 .packets,
240 .small_data,
241 .v5,
242 .v55,
243 .v60,
244 }),
245 };
246 pub const hexagonv62 = Cpu{
247 .name = "hexagonv62",
248 .llvm_name = "hexagonv62",
249 .features = featureSet(&[_]Feature{
250 .duplex,
251 .memops,
252 .nvj,
253 .nvs,
254 .packets,
255 .small_data,
256 .v5,
257 .v55,
258 .v60,
259 .v62,
260 }),
261 };
262 pub const hexagonv65 = Cpu{
263 .name = "hexagonv65",
264 .llvm_name = "hexagonv65",
265 .features = featureSet(&[_]Feature{
266 .duplex,
267 .mem_noshuf,
268 .memops,
269 .nvj,
270 .nvs,
271 .packets,
272 .small_data,
273 .v5,
274 .v55,
275 .v60,
276 .v62,
277 .v65,
278 }),
279 };
280 pub const hexagonv66 = Cpu{
281 .name = "hexagonv66",
282 .llvm_name = "hexagonv66",
283 .features = featureSet(&[_]Feature{
284 .duplex,
285 .mem_noshuf,
286 .memops,
287 .nvj,
288 .nvs,
289 .packets,
290 .small_data,
291 .v5,
292 .v55,
293 .v60,
294 .v62,
295 .v65,
296 .v66,
297 }),
298 };
299};
300
301/// All hexagon CPUs, sorted alphabetically by name.
302/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
303/// compiler has inefficient memory and CPU usage, affecting build times.
304pub const all_cpus = &[_]*const Cpu{
305 &cpu.generic,
306 &cpu.hexagonv5,
307 &cpu.hexagonv55,
308 &cpu.hexagonv60,
309 &cpu.hexagonv62,
310 &cpu.hexagonv65,
311 &cpu.hexagonv66,
312};
lib/std/target/mips.zig created+518
...@@ -0,0 +1,518 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 abs2008,
6 cnmips,
7 crc,
8 dsp,
9 dspr2,
10 dspr3,
11 eva,
12 fp64,
13 fpxx,
14 ginv,
15 gp64,
16 long_calls,
17 micromips,
18 mips1,
19 mips16,
20 mips2,
21 mips3,
22 mips32,
23 mips32r2,
24 mips32r3,
25 mips32r5,
26 mips32r6,
27 mips3_32,
28 mips3_32r2,
29 mips4,
30 mips4_32,
31 mips4_32r2,
32 mips5,
33 mips5_32r2,
34 mips64,
35 mips64r2,
36 mips64r3,
37 mips64r5,
38 mips64r6,
39 msa,
40 mt,
41 nan2008,
42 noabicalls,
43 nomadd4,
44 nooddspreg,
45 p5600,
46 ptr64,
47 single_float,
48 soft_float,
49 sym32,
50 use_indirect_jump_hazard,
51 use_tcc_in_div,
52 vfpu,
53 virt,
54};
55
56pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
57
58pub const all_features = blk: {
59 const len = @typeInfo(Feature).Enum.fields.len;
60 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
61 var result: [len]Cpu.Feature = undefined;
62 result[@enumToInt(Feature.abs2008)] = .{
63 .llvm_name = "abs2008",
64 .description = "Disable IEEE 754-2008 abs.fmt mode",
65 .dependencies = featureSet(&[_]Feature{}),
66 };
67 result[@enumToInt(Feature.cnmips)] = .{
68 .llvm_name = "cnmips",
69 .description = "Octeon cnMIPS Support",
70 .dependencies = featureSet(&[_]Feature{
71 .mips64r2,
72 }),
73 };
74 result[@enumToInt(Feature.crc)] = .{
75 .llvm_name = "crc",
76 .description = "Mips R6 CRC ASE",
77 .dependencies = featureSet(&[_]Feature{}),
78 };
79 result[@enumToInt(Feature.dsp)] = .{
80 .llvm_name = "dsp",
81 .description = "Mips DSP ASE",
82 .dependencies = featureSet(&[_]Feature{}),
83 };
84 result[@enumToInt(Feature.dspr2)] = .{
85 .llvm_name = "dspr2",
86 .description = "Mips DSP-R2 ASE",
87 .dependencies = featureSet(&[_]Feature{
88 .dsp,
89 }),
90 };
91 result[@enumToInt(Feature.dspr3)] = .{
92 .llvm_name = "dspr3",
93 .description = "Mips DSP-R3 ASE",
94 .dependencies = featureSet(&[_]Feature{
95 .dsp,
96 .dspr2,
97 }),
98 };
99 result[@enumToInt(Feature.eva)] = .{
100 .llvm_name = "eva",
101 .description = "Mips EVA ASE",
102 .dependencies = featureSet(&[_]Feature{}),
103 };
104 result[@enumToInt(Feature.fp64)] = .{
105 .llvm_name = "fp64",
106 .description = "Support 64-bit FP registers",
107 .dependencies = featureSet(&[_]Feature{}),
108 };
109 result[@enumToInt(Feature.fpxx)] = .{
110 .llvm_name = "fpxx",
111 .description = "Support for FPXX",
112 .dependencies = featureSet(&[_]Feature{}),
113 };
114 result[@enumToInt(Feature.ginv)] = .{
115 .llvm_name = "ginv",
116 .description = "Mips Global Invalidate ASE",
117 .dependencies = featureSet(&[_]Feature{}),
118 };
119 result[@enumToInt(Feature.gp64)] = .{
120 .llvm_name = "gp64",
121 .description = "General Purpose Registers are 64-bit wide",
122 .dependencies = featureSet(&[_]Feature{}),
123 };
124 result[@enumToInt(Feature.long_calls)] = .{
125 .llvm_name = "long-calls",
126 .description = "Disable use of the jal instruction",
127 .dependencies = featureSet(&[_]Feature{}),
128 };
129 result[@enumToInt(Feature.micromips)] = .{
130 .llvm_name = "micromips",
131 .description = "microMips mode",
132 .dependencies = featureSet(&[_]Feature{}),
133 };
134 result[@enumToInt(Feature.mips1)] = .{
135 .llvm_name = "mips1",
136 .description = "Mips I ISA Support [highly experimental]",
137 .dependencies = featureSet(&[_]Feature{}),
138 };
139 result[@enumToInt(Feature.mips16)] = .{
140 .llvm_name = "mips16",
141 .description = "Mips16 mode",
142 .dependencies = featureSet(&[_]Feature{}),
143 };
144 result[@enumToInt(Feature.mips2)] = .{
145 .llvm_name = "mips2",
146 .description = "Mips II ISA Support [highly experimental]",
147 .dependencies = featureSet(&[_]Feature{
148 .mips1,
149 }),
150 };
151 result[@enumToInt(Feature.mips3)] = .{
152 .llvm_name = "mips3",
153 .description = "MIPS III ISA Support [highly experimental]",
154 .dependencies = featureSet(&[_]Feature{
155 .fp64,
156 .gp64,
157 .mips2,
158 .mips3_32,
159 .mips3_32r2,
160 }),
161 };
162 result[@enumToInt(Feature.mips32)] = .{
163 .llvm_name = "mips32",
164 .description = "Mips32 ISA Support",
165 .dependencies = featureSet(&[_]Feature{
166 .mips2,
167 .mips3_32,
168 .mips4_32,
169 }),
170 };
171 result[@enumToInt(Feature.mips32r2)] = .{
172 .llvm_name = "mips32r2",
173 .description = "Mips32r2 ISA Support",
174 .dependencies = featureSet(&[_]Feature{
175 .mips32,
176 .mips3_32r2,
177 .mips4_32r2,
178 .mips5_32r2,
179 }),
180 };
181 result[@enumToInt(Feature.mips32r3)] = .{
182 .llvm_name = "mips32r3",
183 .description = "Mips32r3 ISA Support",
184 .dependencies = featureSet(&[_]Feature{
185 .mips32r2,
186 }),
187 };
188 result[@enumToInt(Feature.mips32r5)] = .{
189 .llvm_name = "mips32r5",
190 .description = "Mips32r5 ISA Support",
191 .dependencies = featureSet(&[_]Feature{
192 .mips32r3,
193 }),
194 };
195 result[@enumToInt(Feature.mips32r6)] = .{
196 .llvm_name = "mips32r6",
197 .description = "Mips32r6 ISA Support [experimental]",
198 .dependencies = featureSet(&[_]Feature{
199 .abs2008,
200 .fp64,
201 .mips32r5,
202 .nan2008,
203 }),
204 };
205 result[@enumToInt(Feature.mips3_32)] = .{
206 .llvm_name = "mips3_32",
207 .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]",
208 .dependencies = featureSet(&[_]Feature{}),
209 };
210 result[@enumToInt(Feature.mips3_32r2)] = .{
211 .llvm_name = "mips3_32r2",
212 .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
213 .dependencies = featureSet(&[_]Feature{}),
214 };
215 result[@enumToInt(Feature.mips4)] = .{
216 .llvm_name = "mips4",
217 .description = "MIPS IV ISA Support",
218 .dependencies = featureSet(&[_]Feature{
219 .mips3,
220 .mips4_32,
221 .mips4_32r2,
222 }),
223 };
224 result[@enumToInt(Feature.mips4_32)] = .{
225 .llvm_name = "mips4_32",
226 .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]",
227 .dependencies = featureSet(&[_]Feature{}),
228 };
229 result[@enumToInt(Feature.mips4_32r2)] = .{
230 .llvm_name = "mips4_32r2",
231 .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]",
232 .dependencies = featureSet(&[_]Feature{}),
233 };
234 result[@enumToInt(Feature.mips5)] = .{
235 .llvm_name = "mips5",
236 .description = "MIPS V ISA Support [highly experimental]",
237 .dependencies = featureSet(&[_]Feature{
238 .mips4,
239 .mips5_32r2,
240 }),
241 };
242 result[@enumToInt(Feature.mips5_32r2)] = .{
243 .llvm_name = "mips5_32r2",
244 .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]",
245 .dependencies = featureSet(&[_]Feature{}),
246 };
247 result[@enumToInt(Feature.mips64)] = .{
248 .llvm_name = "mips64",
249 .description = "Mips64 ISA Support",
250 .dependencies = featureSet(&[_]Feature{
251 .mips32,
252 .mips5,
253 }),
254 };
255 result[@enumToInt(Feature.mips64r2)] = .{
256 .llvm_name = "mips64r2",
257 .description = "Mips64r2 ISA Support",
258 .dependencies = featureSet(&[_]Feature{
259 .mips32r2,
260 .mips64,
261 }),
262 };
263 result[@enumToInt(Feature.mips64r3)] = .{
264 .llvm_name = "mips64r3",
265 .description = "Mips64r3 ISA Support",
266 .dependencies = featureSet(&[_]Feature{
267 .mips32r3,
268 .mips64r2,
269 }),
270 };
271 result[@enumToInt(Feature.mips64r5)] = .{
272 .llvm_name = "mips64r5",
273 .description = "Mips64r5 ISA Support",
274 .dependencies = featureSet(&[_]Feature{
275 .mips32r5,
276 .mips64r3,
277 }),
278 };
279 result[@enumToInt(Feature.mips64r6)] = .{
280 .llvm_name = "mips64r6",
281 .description = "Mips64r6 ISA Support [experimental]",
282 .dependencies = featureSet(&[_]Feature{
283 .abs2008,
284 .mips32r6,
285 .mips64r5,
286 .nan2008,
287 }),
288 };
289 result[@enumToInt(Feature.msa)] = .{
290 .llvm_name = "msa",
291 .description = "Mips MSA ASE",
292 .dependencies = featureSet(&[_]Feature{}),
293 };
294 result[@enumToInt(Feature.mt)] = .{
295 .llvm_name = "mt",
296 .description = "Mips MT ASE",
297 .dependencies = featureSet(&[_]Feature{}),
298 };
299 result[@enumToInt(Feature.nan2008)] = .{
300 .llvm_name = "nan2008",
301 .description = "IEEE 754-2008 NaN encoding",
302 .dependencies = featureSet(&[_]Feature{}),
303 };
304 result[@enumToInt(Feature.noabicalls)] = .{
305 .llvm_name = "noabicalls",
306 .description = "Disable SVR4-style position-independent code",
307 .dependencies = featureSet(&[_]Feature{}),
308 };
309 result[@enumToInt(Feature.nomadd4)] = .{
310 .llvm_name = "nomadd4",
311 .description = "Disable 4-operand madd.fmt and related instructions",
312 .dependencies = featureSet(&[_]Feature{}),
313 };
314 result[@enumToInt(Feature.nooddspreg)] = .{
315 .llvm_name = "nooddspreg",
316 .description = "Disable odd numbered single-precision registers",
317 .dependencies = featureSet(&[_]Feature{}),
318 };
319 result[@enumToInt(Feature.p5600)] = .{
320 .llvm_name = "p5600",
321 .description = "The P5600 Processor",
322 .dependencies = featureSet(&[_]Feature{
323 .mips32r5,
324 }),
325 };
326 result[@enumToInt(Feature.ptr64)] = .{
327 .llvm_name = "ptr64",
328 .description = "Pointers are 64-bit wide",
329 .dependencies = featureSet(&[_]Feature{}),
330 };
331 result[@enumToInt(Feature.single_float)] = .{
332 .llvm_name = "single-float",
333 .description = "Only supports single precision float",
334 .dependencies = featureSet(&[_]Feature{}),
335 };
336 result[@enumToInt(Feature.soft_float)] = .{
337 .llvm_name = "soft-float",
338 .description = "Does not support floating point instructions",
339 .dependencies = featureSet(&[_]Feature{}),
340 };
341 result[@enumToInt(Feature.sym32)] = .{
342 .llvm_name = "sym32",
343 .description = "Symbols are 32 bit on Mips64",
344 .dependencies = featureSet(&[_]Feature{}),
345 };
346 result[@enumToInt(Feature.use_indirect_jump_hazard)] = .{
347 .llvm_name = "use-indirect-jump-hazard",
348 .description = "Use indirect jump guards to prevent certain speculation based attacks",
349 .dependencies = featureSet(&[_]Feature{}),
350 };
351 result[@enumToInt(Feature.use_tcc_in_div)] = .{
352 .llvm_name = "use-tcc-in-div",
353 .description = "Force the assembler to use trapping",
354 .dependencies = featureSet(&[_]Feature{}),
355 };
356 result[@enumToInt(Feature.vfpu)] = .{
357 .llvm_name = "vfpu",
358 .description = "Enable vector FPU instructions",
359 .dependencies = featureSet(&[_]Feature{}),
360 };
361 result[@enumToInt(Feature.virt)] = .{
362 .llvm_name = "virt",
363 .description = "Mips Virtualization ASE",
364 .dependencies = featureSet(&[_]Feature{}),
365 };
366 const ti = @typeInfo(Feature);
367 for (result) |*elem, i| {
368 elem.index = i;
369 elem.name = ti.Enum.fields[i].name;
370 }
371 break :blk result;
372};
373
374pub const cpu = struct {
375 pub const mips1 = Cpu{
376 .name = "mips1",
377 .llvm_name = "mips1",
378 .features = featureSet(&[_]Feature{
379 .mips1,
380 }),
381 };
382 pub const mips2 = Cpu{
383 .name = "mips2",
384 .llvm_name = "mips2",
385 .features = featureSet(&[_]Feature{
386 .mips2,
387 }),
388 };
389 pub const mips3 = Cpu{
390 .name = "mips3",
391 .llvm_name = "mips3",
392 .features = featureSet(&[_]Feature{
393 .mips3,
394 }),
395 };
396 pub const mips32 = Cpu{
397 .name = "mips32",
398 .llvm_name = "mips32",
399 .features = featureSet(&[_]Feature{
400 .mips32,
401 }),
402 };
403 pub const mips32r2 = Cpu{
404 .name = "mips32r2",
405 .llvm_name = "mips32r2",
406 .features = featureSet(&[_]Feature{
407 .mips32r2,
408 }),
409 };
410 pub const mips32r3 = Cpu{
411 .name = "mips32r3",
412 .llvm_name = "mips32r3",
413 .features = featureSet(&[_]Feature{
414 .mips32r3,
415 }),
416 };
417 pub const mips32r5 = Cpu{
418 .name = "mips32r5",
419 .llvm_name = "mips32r5",
420 .features = featureSet(&[_]Feature{
421 .mips32r5,
422 }),
423 };
424 pub const mips32r6 = Cpu{
425 .name = "mips32r6",
426 .llvm_name = "mips32r6",
427 .features = featureSet(&[_]Feature{
428 .mips32r6,
429 }),
430 };
431 pub const mips4 = Cpu{
432 .name = "mips4",
433 .llvm_name = "mips4",
434 .features = featureSet(&[_]Feature{
435 .mips4,
436 }),
437 };
438 pub const mips5 = Cpu{
439 .name = "mips5",
440 .llvm_name = "mips5",
441 .features = featureSet(&[_]Feature{
442 .mips5,
443 }),
444 };
445 pub const mips64 = Cpu{
446 .name = "mips64",
447 .llvm_name = "mips64",
448 .features = featureSet(&[_]Feature{
449 .mips64,
450 }),
451 };
452 pub const mips64r2 = Cpu{
453 .name = "mips64r2",
454 .llvm_name = "mips64r2",
455 .features = featureSet(&[_]Feature{
456 .mips64r2,
457 }),
458 };
459 pub const mips64r3 = Cpu{
460 .name = "mips64r3",
461 .llvm_name = "mips64r3",
462 .features = featureSet(&[_]Feature{
463 .mips64r3,
464 }),
465 };
466 pub const mips64r5 = Cpu{
467 .name = "mips64r5",
468 .llvm_name = "mips64r5",
469 .features = featureSet(&[_]Feature{
470 .mips64r5,
471 }),
472 };
473 pub const mips64r6 = Cpu{
474 .name = "mips64r6",
475 .llvm_name = "mips64r6",
476 .features = featureSet(&[_]Feature{
477 .mips64r6,
478 }),
479 };
480 pub const octeon = Cpu{
481 .name = "octeon",
482 .llvm_name = "octeon",
483 .features = featureSet(&[_]Feature{
484 .cnmips,
485 .mips64r2,
486 }),
487 };
488 pub const p5600 = Cpu{
489 .name = "p5600",
490 .llvm_name = "p5600",
491 .features = featureSet(&[_]Feature{
492 .p5600,
493 }),
494 };
495};
496
497/// All mips CPUs, sorted alphabetically by name.
498/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
499/// compiler has inefficient memory and CPU usage, affecting build times.
500pub const all_cpus = &[_]*const Cpu{
501 &cpu.mips1,
502 &cpu.mips2,
503 &cpu.mips3,
504 &cpu.mips32,
505 &cpu.mips32r2,
506 &cpu.mips32r3,
507 &cpu.mips32r5,
508 &cpu.mips32r6,
509 &cpu.mips4,
510 &cpu.mips5,
511 &cpu.mips64,
512 &cpu.mips64r2,
513 &cpu.mips64r3,
514 &cpu.mips64r5,
515 &cpu.mips64r6,
516 &cpu.octeon,
517 &cpu.p5600,
518};
lib/std/target/msp430.zig created+72
...@@ -0,0 +1,72 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 ext,
6 hwmult16,
7 hwmult32,
8 hwmultf5,
9};
10
11pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
12
13pub const all_features = blk: {
14 const len = @typeInfo(Feature).Enum.fields.len;
15 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
16 var result: [len]Cpu.Feature = undefined;
17 result[@enumToInt(Feature.ext)] = .{
18 .llvm_name = "ext",
19 .description = "Enable MSP430-X extensions",
20 .dependencies = featureSet(&[_]Feature{}),
21 };
22 result[@enumToInt(Feature.hwmult16)] = .{
23 .llvm_name = "hwmult16",
24 .description = "Enable 16-bit hardware multiplier",
25 .dependencies = featureSet(&[_]Feature{}),
26 };
27 result[@enumToInt(Feature.hwmult32)] = .{
28 .llvm_name = "hwmult32",
29 .description = "Enable 32-bit hardware multiplier",
30 .dependencies = featureSet(&[_]Feature{}),
31 };
32 result[@enumToInt(Feature.hwmultf5)] = .{
33 .llvm_name = "hwmultf5",
34 .description = "Enable F5 series hardware multiplier",
35 .dependencies = featureSet(&[_]Feature{}),
36 };
37 const ti = @typeInfo(Feature);
38 for (result) |*elem, i| {
39 elem.index = i;
40 elem.name = ti.Enum.fields[i].name;
41 }
42 break :blk result;
43};
44
45pub const cpu = struct {
46 pub const generic = Cpu{
47 .name = "generic",
48 .llvm_name = "generic",
49 .features = featureSet(&[_]Feature{}),
50 };
51 pub const msp430 = Cpu{
52 .name = "msp430",
53 .llvm_name = "msp430",
54 .features = featureSet(&[_]Feature{}),
55 };
56 pub const msp430x = Cpu{
57 .name = "msp430x",
58 .llvm_name = "msp430x",
59 .features = featureSet(&[_]Feature{
60 .ext,
61 }),
62 };
63};
64
65/// All msp430 CPUs, sorted alphabetically by name.
66/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
67/// compiler has inefficient memory and CPU usage, affecting build times.
68pub const all_cpus = &[_]*const Cpu{
69 &cpu.generic,
70 &cpu.msp430,
71 &cpu.msp430x,
72};
lib/std/target/nvptx.zig created+309
...@@ -0,0 +1,309 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 ptx32,
6 ptx40,
7 ptx41,
8 ptx42,
9 ptx43,
10 ptx50,
11 ptx60,
12 ptx61,
13 ptx63,
14 ptx64,
15 sm_20,
16 sm_21,
17 sm_30,
18 sm_32,
19 sm_35,
20 sm_37,
21 sm_50,
22 sm_52,
23 sm_53,
24 sm_60,
25 sm_61,
26 sm_62,
27 sm_70,
28 sm_72,
29 sm_75,
30};
31
32pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
33
34pub const all_features = blk: {
35 const len = @typeInfo(Feature).Enum.fields.len;
36 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
37 var result: [len]Cpu.Feature = undefined;
38 result[@enumToInt(Feature.ptx32)] = .{
39 .llvm_name = "ptx32",
40 .description = "Use PTX version 3.2",
41 .dependencies = featureSet(&[_]Feature{}),
42 };
43 result[@enumToInt(Feature.ptx40)] = .{
44 .llvm_name = "ptx40",
45 .description = "Use PTX version 4.0",
46 .dependencies = featureSet(&[_]Feature{}),
47 };
48 result[@enumToInt(Feature.ptx41)] = .{
49 .llvm_name = "ptx41",
50 .description = "Use PTX version 4.1",
51 .dependencies = featureSet(&[_]Feature{}),
52 };
53 result[@enumToInt(Feature.ptx42)] = .{
54 .llvm_name = "ptx42",
55 .description = "Use PTX version 4.2",
56 .dependencies = featureSet(&[_]Feature{}),
57 };
58 result[@enumToInt(Feature.ptx43)] = .{
59 .llvm_name = "ptx43",
60 .description = "Use PTX version 4.3",
61 .dependencies = featureSet(&[_]Feature{}),
62 };
63 result[@enumToInt(Feature.ptx50)] = .{
64 .llvm_name = "ptx50",
65 .description = "Use PTX version 5.0",
66 .dependencies = featureSet(&[_]Feature{}),
67 };
68 result[@enumToInt(Feature.ptx60)] = .{
69 .llvm_name = "ptx60",
70 .description = "Use PTX version 6.0",
71 .dependencies = featureSet(&[_]Feature{}),
72 };
73 result[@enumToInt(Feature.ptx61)] = .{
74 .llvm_name = "ptx61",
75 .description = "Use PTX version 6.1",
76 .dependencies = featureSet(&[_]Feature{}),
77 };
78 result[@enumToInt(Feature.ptx63)] = .{
79 .llvm_name = "ptx63",
80 .description = "Use PTX version 6.3",
81 .dependencies = featureSet(&[_]Feature{}),
82 };
83 result[@enumToInt(Feature.ptx64)] = .{
84 .llvm_name = "ptx64",
85 .description = "Use PTX version 6.4",
86 .dependencies = featureSet(&[_]Feature{}),
87 };
88 result[@enumToInt(Feature.sm_20)] = .{
89 .llvm_name = "sm_20",
90 .description = "Target SM 2.0",
91 .dependencies = featureSet(&[_]Feature{}),
92 };
93 result[@enumToInt(Feature.sm_21)] = .{
94 .llvm_name = "sm_21",
95 .description = "Target SM 2.1",
96 .dependencies = featureSet(&[_]Feature{}),
97 };
98 result[@enumToInt(Feature.sm_30)] = .{
99 .llvm_name = "sm_30",
100 .description = "Target SM 3.0",
101 .dependencies = featureSet(&[_]Feature{}),
102 };
103 result[@enumToInt(Feature.sm_32)] = .{
104 .llvm_name = "sm_32",
105 .description = "Target SM 3.2",
106 .dependencies = featureSet(&[_]Feature{}),
107 };
108 result[@enumToInt(Feature.sm_35)] = .{
109 .llvm_name = "sm_35",
110 .description = "Target SM 3.5",
111 .dependencies = featureSet(&[_]Feature{}),
112 };
113 result[@enumToInt(Feature.sm_37)] = .{
114 .llvm_name = "sm_37",
115 .description = "Target SM 3.7",
116 .dependencies = featureSet(&[_]Feature{}),
117 };
118 result[@enumToInt(Feature.sm_50)] = .{
119 .llvm_name = "sm_50",
120 .description = "Target SM 5.0",
121 .dependencies = featureSet(&[_]Feature{}),
122 };
123 result[@enumToInt(Feature.sm_52)] = .{
124 .llvm_name = "sm_52",
125 .description = "Target SM 5.2",
126 .dependencies = featureSet(&[_]Feature{}),
127 };
128 result[@enumToInt(Feature.sm_53)] = .{
129 .llvm_name = "sm_53",
130 .description = "Target SM 5.3",
131 .dependencies = featureSet(&[_]Feature{}),
132 };
133 result[@enumToInt(Feature.sm_60)] = .{
134 .llvm_name = "sm_60",
135 .description = "Target SM 6.0",
136 .dependencies = featureSet(&[_]Feature{}),
137 };
138 result[@enumToInt(Feature.sm_61)] = .{
139 .llvm_name = "sm_61",
140 .description = "Target SM 6.1",
141 .dependencies = featureSet(&[_]Feature{}),
142 };
143 result[@enumToInt(Feature.sm_62)] = .{
144 .llvm_name = "sm_62",
145 .description = "Target SM 6.2",
146 .dependencies = featureSet(&[_]Feature{}),
147 };
148 result[@enumToInt(Feature.sm_70)] = .{
149 .llvm_name = "sm_70",
150 .description = "Target SM 7.0",
151 .dependencies = featureSet(&[_]Feature{}),
152 };
153 result[@enumToInt(Feature.sm_72)] = .{
154 .llvm_name = "sm_72",
155 .description = "Target SM 7.2",
156 .dependencies = featureSet(&[_]Feature{}),
157 };
158 result[@enumToInt(Feature.sm_75)] = .{
159 .llvm_name = "sm_75",
160 .description = "Target SM 7.5",
161 .dependencies = featureSet(&[_]Feature{}),
162 };
163 const ti = @typeInfo(Feature);
164 for (result) |*elem, i| {
165 elem.index = i;
166 elem.name = ti.Enum.fields[i].name;
167 }
168 break :blk result;
169};
170
171pub const cpu = struct {
172 pub const sm_20 = Cpu{
173 .name = "sm_20",
174 .llvm_name = "sm_20",
175 .features = featureSet(&[_]Feature{
176 .sm_20,
177 }),
178 };
179 pub const sm_21 = Cpu{
180 .name = "sm_21",
181 .llvm_name = "sm_21",
182 .features = featureSet(&[_]Feature{
183 .sm_21,
184 }),
185 };
186 pub const sm_30 = Cpu{
187 .name = "sm_30",
188 .llvm_name = "sm_30",
189 .features = featureSet(&[_]Feature{
190 .sm_30,
191 }),
192 };
193 pub const sm_32 = Cpu{
194 .name = "sm_32",
195 .llvm_name = "sm_32",
196 .features = featureSet(&[_]Feature{
197 .ptx40,
198 .sm_32,
199 }),
200 };
201 pub const sm_35 = Cpu{
202 .name = "sm_35",
203 .llvm_name = "sm_35",
204 .features = featureSet(&[_]Feature{
205 .sm_35,
206 }),
207 };
208 pub const sm_37 = Cpu{
209 .name = "sm_37",
210 .llvm_name = "sm_37",
211 .features = featureSet(&[_]Feature{
212 .ptx41,
213 .sm_37,
214 }),
215 };
216 pub const sm_50 = Cpu{
217 .name = "sm_50",
218 .llvm_name = "sm_50",
219 .features = featureSet(&[_]Feature{
220 .ptx40,
221 .sm_50,
222 }),
223 };
224 pub const sm_52 = Cpu{
225 .name = "sm_52",
226 .llvm_name = "sm_52",
227 .features = featureSet(&[_]Feature{
228 .ptx41,
229 .sm_52,
230 }),
231 };
232 pub const sm_53 = Cpu{
233 .name = "sm_53",
234 .llvm_name = "sm_53",
235 .features = featureSet(&[_]Feature{
236 .ptx42,
237 .sm_53,
238 }),
239 };
240 pub const sm_60 = Cpu{
241 .name = "sm_60",
242 .llvm_name = "sm_60",
243 .features = featureSet(&[_]Feature{
244 .ptx50,
245 .sm_60,
246 }),
247 };
248 pub const sm_61 = Cpu{
249 .name = "sm_61",
250 .llvm_name = "sm_61",
251 .features = featureSet(&[_]Feature{
252 .ptx50,
253 .sm_61,
254 }),
255 };
256 pub const sm_62 = Cpu{
257 .name = "sm_62",
258 .llvm_name = "sm_62",
259 .features = featureSet(&[_]Feature{
260 .ptx50,
261 .sm_62,
262 }),
263 };
264 pub const sm_70 = Cpu{
265 .name = "sm_70",
266 .llvm_name = "sm_70",
267 .features = featureSet(&[_]Feature{
268 .ptx60,
269 .sm_70,
270 }),
271 };
272 pub const sm_72 = Cpu{
273 .name = "sm_72",
274 .llvm_name = "sm_72",
275 .features = featureSet(&[_]Feature{
276 .ptx61,
277 .sm_72,
278 }),
279 };
280 pub const sm_75 = Cpu{
281 .name = "sm_75",
282 .llvm_name = "sm_75",
283 .features = featureSet(&[_]Feature{
284 .ptx63,
285 .sm_75,
286 }),
287 };
288};
289
290/// All nvptx CPUs, sorted alphabetically by name.
291/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
292/// compiler has inefficient memory and CPU usage, affecting build times.
293pub const all_cpus = &[_]*const Cpu{
294 &cpu.sm_20,
295 &cpu.sm_21,
296 &cpu.sm_30,
297 &cpu.sm_32,
298 &cpu.sm_35,
299 &cpu.sm_37,
300 &cpu.sm_50,
301 &cpu.sm_52,
302 &cpu.sm_53,
303 &cpu.sm_60,
304 &cpu.sm_61,
305 &cpu.sm_62,
306 &cpu.sm_70,
307 &cpu.sm_72,
308 &cpu.sm_75,
309};
lib/std/target/powerpc.zig created+938
...@@ -0,0 +1,938 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 @"64bit",
6 @"64bitregs",
7 altivec,
8 booke,
9 bpermd,
10 cmpb,
11 crbits,
12 crypto,
13 direct_move,
14 e500,
15 extdiv,
16 fcpsgn,
17 float128,
18 fpcvt,
19 fprnd,
20 fpu,
21 fre,
22 fres,
23 frsqrte,
24 frsqrtes,
25 fsqrt,
26 hard_float,
27 htm,
28 icbt,
29 invariant_function_descriptors,
30 isa_v30_instructions,
31 isel,
32 ldbrx,
33 lfiwax,
34 longcall,
35 mfocrf,
36 msync,
37 partword_atomics,
38 popcntd,
39 power8_altivec,
40 power8_vector,
41 power9_altivec,
42 power9_vector,
43 ppc_postra_sched,
44 ppc_prera_sched,
45 ppc4xx,
46 ppc6xx,
47 qpx,
48 recipprec,
49 secure_plt,
50 slow_popcntd,
51 spe,
52 stfiwx,
53 two_const_nr,
54 vectors_use_two_units,
55 vsx,
56};
57
58pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
59
60pub const all_features = blk: {
61 const len = @typeInfo(Feature).Enum.fields.len;
62 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
63 var result: [len]Cpu.Feature = undefined;
64 result[@enumToInt(Feature.@"64bit")] = .{
65 .llvm_name = "64bit",
66 .description = "Enable 64-bit instructions",
67 .dependencies = featureSet(&[_]Feature{}),
68 };
69 result[@enumToInt(Feature.@"64bitregs")] = .{
70 .llvm_name = "64bitregs",
71 .description = "Enable 64-bit registers usage for ppc32 [beta]",
72 .dependencies = featureSet(&[_]Feature{}),
73 };
74 result[@enumToInt(Feature.altivec)] = .{
75 .llvm_name = "altivec",
76 .description = "Enable Altivec instructions",
77 .dependencies = featureSet(&[_]Feature{
78 .fpu,
79 }),
80 };
81 result[@enumToInt(Feature.booke)] = .{
82 .llvm_name = "booke",
83 .description = "Enable Book E instructions",
84 .dependencies = featureSet(&[_]Feature{
85 .icbt,
86 }),
87 };
88 result[@enumToInt(Feature.bpermd)] = .{
89 .llvm_name = "bpermd",
90 .description = "Enable the bpermd instruction",
91 .dependencies = featureSet(&[_]Feature{}),
92 };
93 result[@enumToInt(Feature.cmpb)] = .{
94 .llvm_name = "cmpb",
95 .description = "Enable the cmpb instruction",
96 .dependencies = featureSet(&[_]Feature{}),
97 };
98 result[@enumToInt(Feature.crbits)] = .{
99 .llvm_name = "crbits",
100 .description = "Use condition-register bits individually",
101 .dependencies = featureSet(&[_]Feature{}),
102 };
103 result[@enumToInt(Feature.crypto)] = .{
104 .llvm_name = "crypto",
105 .description = "Enable POWER8 Crypto instructions",
106 .dependencies = featureSet(&[_]Feature{
107 .power8_altivec,
108 }),
109 };
110 result[@enumToInt(Feature.direct_move)] = .{
111 .llvm_name = "direct-move",
112 .description = "Enable Power8 direct move instructions",
113 .dependencies = featureSet(&[_]Feature{
114 .vsx,
115 }),
116 };
117 result[@enumToInt(Feature.e500)] = .{
118 .llvm_name = "e500",
119 .description = "Enable E500/E500mc instructions",
120 .dependencies = featureSet(&[_]Feature{}),
121 };
122 result[@enumToInt(Feature.extdiv)] = .{
123 .llvm_name = "extdiv",
124 .description = "Enable extended divide instructions",
125 .dependencies = featureSet(&[_]Feature{}),
126 };
127 result[@enumToInt(Feature.fcpsgn)] = .{
128 .llvm_name = "fcpsgn",
129 .description = "Enable the fcpsgn instruction",
130 .dependencies = featureSet(&[_]Feature{
131 .fpu,
132 }),
133 };
134 result[@enumToInt(Feature.float128)] = .{
135 .llvm_name = "float128",
136 .description = "Enable the __float128 data type for IEEE-754R Binary128.",
137 .dependencies = featureSet(&[_]Feature{
138 .vsx,
139 }),
140 };
141 result[@enumToInt(Feature.fpcvt)] = .{
142 .llvm_name = "fpcvt",
143 .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions",
144 .dependencies = featureSet(&[_]Feature{
145 .fpu,
146 }),
147 };
148 result[@enumToInt(Feature.fprnd)] = .{
149 .llvm_name = "fprnd",
150 .description = "Enable the fri[mnpz] instructions",
151 .dependencies = featureSet(&[_]Feature{
152 .fpu,
153 }),
154 };
155 result[@enumToInt(Feature.fpu)] = .{
156 .llvm_name = "fpu",
157 .description = "Enable classic FPU instructions",
158 .dependencies = featureSet(&[_]Feature{
159 .hard_float,
160 }),
161 };
162 result[@enumToInt(Feature.fre)] = .{
163 .llvm_name = "fre",
164 .description = "Enable the fre instruction",
165 .dependencies = featureSet(&[_]Feature{
166 .fpu,
167 }),
168 };
169 result[@enumToInt(Feature.fres)] = .{
170 .llvm_name = "fres",
171 .description = "Enable the fres instruction",
172 .dependencies = featureSet(&[_]Feature{
173 .fpu,
174 }),
175 };
176 result[@enumToInt(Feature.frsqrte)] = .{
177 .llvm_name = "frsqrte",
178 .description = "Enable the frsqrte instruction",
179 .dependencies = featureSet(&[_]Feature{
180 .fpu,
181 }),
182 };
183 result[@enumToInt(Feature.frsqrtes)] = .{
184 .llvm_name = "frsqrtes",
185 .description = "Enable the frsqrtes instruction",
186 .dependencies = featureSet(&[_]Feature{
187 .fpu,
188 }),
189 };
190 result[@enumToInt(Feature.fsqrt)] = .{
191 .llvm_name = "fsqrt",
192 .description = "Enable the fsqrt instruction",
193 .dependencies = featureSet(&[_]Feature{
194 .fpu,
195 }),
196 };
197 result[@enumToInt(Feature.hard_float)] = .{
198 .llvm_name = "hard-float",
199 .description = "Enable floating-point instructions",
200 .dependencies = featureSet(&[_]Feature{}),
201 };
202 result[@enumToInt(Feature.htm)] = .{
203 .llvm_name = "htm",
204 .description = "Enable Hardware Transactional Memory instructions",
205 .dependencies = featureSet(&[_]Feature{}),
206 };
207 result[@enumToInt(Feature.icbt)] = .{
208 .llvm_name = "icbt",
209 .description = "Enable icbt instruction",
210 .dependencies = featureSet(&[_]Feature{}),
211 };
212 result[@enumToInt(Feature.invariant_function_descriptors)] = .{
213 .llvm_name = "invariant-function-descriptors",
214 .description = "Assume function descriptors are invariant",
215 .dependencies = featureSet(&[_]Feature{}),
216 };
217 result[@enumToInt(Feature.isa_v30_instructions)] = .{
218 .llvm_name = "isa-v30-instructions",
219 .description = "Enable instructions added in ISA 3.0.",
220 .dependencies = featureSet(&[_]Feature{}),
221 };
222 result[@enumToInt(Feature.isel)] = .{
223 .llvm_name = "isel",
224 .description = "Enable the isel instruction",
225 .dependencies = featureSet(&[_]Feature{}),
226 };
227 result[@enumToInt(Feature.ldbrx)] = .{
228 .llvm_name = "ldbrx",
229 .description = "Enable the ldbrx instruction",
230 .dependencies = featureSet(&[_]Feature{}),
231 };
232 result[@enumToInt(Feature.lfiwax)] = .{
233 .llvm_name = "lfiwax",
234 .description = "Enable the lfiwax instruction",
235 .dependencies = featureSet(&[_]Feature{
236 .fpu,
237 }),
238 };
239 result[@enumToInt(Feature.longcall)] = .{
240 .llvm_name = "longcall",
241 .description = "Always use indirect calls",
242 .dependencies = featureSet(&[_]Feature{}),
243 };
244 result[@enumToInt(Feature.mfocrf)] = .{
245 .llvm_name = "mfocrf",
246 .description = "Enable the MFOCRF instruction",
247 .dependencies = featureSet(&[_]Feature{}),
248 };
249 result[@enumToInt(Feature.msync)] = .{
250 .llvm_name = "msync",
251 .description = "Has only the msync instruction instead of sync",
252 .dependencies = featureSet(&[_]Feature{
253 .booke,
254 }),
255 };
256 result[@enumToInt(Feature.partword_atomics)] = .{
257 .llvm_name = "partword-atomics",
258 .description = "Enable l[bh]arx and st[bh]cx.",
259 .dependencies = featureSet(&[_]Feature{}),
260 };
261 result[@enumToInt(Feature.popcntd)] = .{
262 .llvm_name = "popcntd",
263 .description = "Enable the popcnt[dw] instructions",
264 .dependencies = featureSet(&[_]Feature{}),
265 };
266 result[@enumToInt(Feature.power8_altivec)] = .{
267 .llvm_name = "power8-altivec",
268 .description = "Enable POWER8 Altivec instructions",
269 .dependencies = featureSet(&[_]Feature{
270 .altivec,
271 }),
272 };
273 result[@enumToInt(Feature.power8_vector)] = .{
274 .llvm_name = "power8-vector",
275 .description = "Enable POWER8 vector instructions",
276 .dependencies = featureSet(&[_]Feature{
277 .power8_altivec,
278 .vsx,
279 }),
280 };
281 result[@enumToInt(Feature.power9_altivec)] = .{
282 .llvm_name = "power9-altivec",
283 .description = "Enable POWER9 Altivec instructions",
284 .dependencies = featureSet(&[_]Feature{
285 .isa_v30_instructions,
286 .power8_altivec,
287 }),
288 };
289 result[@enumToInt(Feature.power9_vector)] = .{
290 .llvm_name = "power9-vector",
291 .description = "Enable POWER9 vector instructions",
292 .dependencies = featureSet(&[_]Feature{
293 .isa_v30_instructions,
294 .power8_vector,
295 .power9_altivec,
296 }),
297 };
298 result[@enumToInt(Feature.ppc_postra_sched)] = .{
299 .llvm_name = "ppc-postra-sched",
300 .description = "Use PowerPC post-RA scheduling strategy",
301 .dependencies = featureSet(&[_]Feature{}),
302 };
303 result[@enumToInt(Feature.ppc_prera_sched)] = .{
304 .llvm_name = "ppc-prera-sched",
305 .description = "Use PowerPC pre-RA scheduling strategy",
306 .dependencies = featureSet(&[_]Feature{}),
307 };
308 result[@enumToInt(Feature.ppc4xx)] = .{
309 .llvm_name = "ppc4xx",
310 .description = "Enable PPC 4xx instructions",
311 .dependencies = featureSet(&[_]Feature{}),
312 };
313 result[@enumToInt(Feature.ppc6xx)] = .{
314 .llvm_name = "ppc6xx",
315 .description = "Enable PPC 6xx instructions",
316 .dependencies = featureSet(&[_]Feature{}),
317 };
318 result[@enumToInt(Feature.qpx)] = .{
319 .llvm_name = "qpx",
320 .description = "Enable QPX instructions",
321 .dependencies = featureSet(&[_]Feature{
322 .fpu,
323 }),
324 };
325 result[@enumToInt(Feature.recipprec)] = .{
326 .llvm_name = "recipprec",
327 .description = "Assume higher precision reciprocal estimates",
328 .dependencies = featureSet(&[_]Feature{}),
329 };
330 result[@enumToInt(Feature.secure_plt)] = .{
331 .llvm_name = "secure-plt",
332 .description = "Enable secure plt mode",
333 .dependencies = featureSet(&[_]Feature{}),
334 };
335 result[@enumToInt(Feature.slow_popcntd)] = .{
336 .llvm_name = "slow-popcntd",
337 .description = "Has slow popcnt[dw] instructions",
338 .dependencies = featureSet(&[_]Feature{}),
339 };
340 result[@enumToInt(Feature.spe)] = .{
341 .llvm_name = "spe",
342 .description = "Enable SPE instructions",
343 .dependencies = featureSet(&[_]Feature{
344 .hard_float,
345 }),
346 };
347 result[@enumToInt(Feature.stfiwx)] = .{
348 .llvm_name = "stfiwx",
349 .description = "Enable the stfiwx instruction",
350 .dependencies = featureSet(&[_]Feature{
351 .fpu,
352 }),
353 };
354 result[@enumToInt(Feature.two_const_nr)] = .{
355 .llvm_name = "two-const-nr",
356 .description = "Requires two constant Newton-Raphson computation",
357 .dependencies = featureSet(&[_]Feature{}),
358 };
359 result[@enumToInt(Feature.vectors_use_two_units)] = .{
360 .llvm_name = "vectors-use-two-units",
361 .description = "Vectors use two units",
362 .dependencies = featureSet(&[_]Feature{}),
363 };
364 result[@enumToInt(Feature.vsx)] = .{
365 .llvm_name = "vsx",
366 .description = "Enable VSX instructions",
367 .dependencies = featureSet(&[_]Feature{
368 .altivec,
369 }),
370 };
371 const ti = @typeInfo(Feature);
372 for (result) |*elem, i| {
373 elem.index = i;
374 elem.name = ti.Enum.fields[i].name;
375 }
376 break :blk result;
377};
378
379pub const cpu = struct {
380 pub const @"440" = Cpu{
381 .name = "440",
382 .llvm_name = "440",
383 .features = featureSet(&[_]Feature{
384 .booke,
385 .fres,
386 .frsqrte,
387 .icbt,
388 .isel,
389 .msync,
390 }),
391 };
392 pub const @"450" = Cpu{
393 .name = "450",
394 .llvm_name = "450",
395 .features = featureSet(&[_]Feature{
396 .booke,
397 .fres,
398 .frsqrte,
399 .icbt,
400 .isel,
401 .msync,
402 }),
403 };
404 pub const @"601" = Cpu{
405 .name = "601",
406 .llvm_name = "601",
407 .features = featureSet(&[_]Feature{
408 .fpu,
409 }),
410 };
411 pub const @"602" = Cpu{
412 .name = "602",
413 .llvm_name = "602",
414 .features = featureSet(&[_]Feature{
415 .fpu,
416 }),
417 };
418 pub const @"603" = Cpu{
419 .name = "603",
420 .llvm_name = "603",
421 .features = featureSet(&[_]Feature{
422 .fres,
423 .frsqrte,
424 }),
425 };
426 pub const @"603e" = Cpu{
427 .name = "603e",
428 .llvm_name = "603e",
429 .features = featureSet(&[_]Feature{
430 .fres,
431 .frsqrte,
432 }),
433 };
434 pub const @"603ev" = Cpu{
435 .name = "603ev",
436 .llvm_name = "603ev",
437 .features = featureSet(&[_]Feature{
438 .fres,
439 .frsqrte,
440 }),
441 };
442 pub const @"604" = Cpu{
443 .name = "604",
444 .llvm_name = "604",
445 .features = featureSet(&[_]Feature{
446 .fres,
447 .frsqrte,
448 }),
449 };
450 pub const @"604e" = Cpu{
451 .name = "604e",
452 .llvm_name = "604e",
453 .features = featureSet(&[_]Feature{
454 .fres,
455 .frsqrte,
456 }),
457 };
458 pub const @"620" = Cpu{
459 .name = "620",
460 .llvm_name = "620",
461 .features = featureSet(&[_]Feature{
462 .fres,
463 .frsqrte,
464 }),
465 };
466 pub const @"7400" = Cpu{
467 .name = "7400",
468 .llvm_name = "7400",
469 .features = featureSet(&[_]Feature{
470 .altivec,
471 .fres,
472 .frsqrte,
473 }),
474 };
475 pub const @"7450" = Cpu{
476 .name = "7450",
477 .llvm_name = "7450",
478 .features = featureSet(&[_]Feature{
479 .altivec,
480 .fres,
481 .frsqrte,
482 }),
483 };
484 pub const @"750" = Cpu{
485 .name = "750",
486 .llvm_name = "750",
487 .features = featureSet(&[_]Feature{
488 .fres,
489 .frsqrte,
490 }),
491 };
492 pub const @"970" = Cpu{
493 .name = "970",
494 .llvm_name = "970",
495 .features = featureSet(&[_]Feature{
496 .@"64bit",
497 .altivec,
498 .fres,
499 .frsqrte,
500 .fsqrt,
501 .mfocrf,
502 .stfiwx,
503 }),
504 };
505 pub const a2 = Cpu{
506 .name = "a2",
507 .llvm_name = "a2",
508 .features = featureSet(&[_]Feature{
509 .@"64bit",
510 .booke,
511 .cmpb,
512 .fcpsgn,
513 .fpcvt,
514 .fprnd,
515 .fre,
516 .fres,
517 .frsqrte,
518 .frsqrtes,
519 .fsqrt,
520 .icbt,
521 .isel,
522 .ldbrx,
523 .lfiwax,
524 .mfocrf,
525 .recipprec,
526 .slow_popcntd,
527 .stfiwx,
528 }),
529 };
530 pub const a2q = Cpu{
531 .name = "a2q",
532 .llvm_name = "a2q",
533 .features = featureSet(&[_]Feature{
534 .@"64bit",
535 .booke,
536 .cmpb,
537 .fcpsgn,
538 .fpcvt,
539 .fprnd,
540 .fre,
541 .fres,
542 .frsqrte,
543 .frsqrtes,
544 .fsqrt,
545 .icbt,
546 .isel,
547 .ldbrx,
548 .lfiwax,
549 .mfocrf,
550 .qpx,
551 .recipprec,
552 .slow_popcntd,
553 .stfiwx,
554 }),
555 };
556 pub const e500 = Cpu{
557 .name = "e500",
558 .llvm_name = "e500",
559 .features = featureSet(&[_]Feature{
560 .booke,
561 .icbt,
562 .isel,
563 }),
564 };
565 pub const e500mc = Cpu{
566 .name = "e500mc",
567 .llvm_name = "e500mc",
568 .features = featureSet(&[_]Feature{
569 .booke,
570 .icbt,
571 .isel,
572 .stfiwx,
573 }),
574 };
575 pub const e5500 = Cpu{
576 .name = "e5500",
577 .llvm_name = "e5500",
578 .features = featureSet(&[_]Feature{
579 .@"64bit",
580 .booke,
581 .icbt,
582 .isel,
583 .mfocrf,
584 .stfiwx,
585 }),
586 };
587 pub const g3 = Cpu{
588 .name = "g3",
589 .llvm_name = "g3",
590 .features = featureSet(&[_]Feature{
591 .fres,
592 .frsqrte,
593 }),
594 };
595 pub const g4 = Cpu{
596 .name = "g4",
597 .llvm_name = "g4",
598 .features = featureSet(&[_]Feature{
599 .altivec,
600 .fres,
601 .frsqrte,
602 }),
603 };
604 pub const @"g4+" = Cpu{
605 .name = "g4+",
606 .llvm_name = "g4+",
607 .features = featureSet(&[_]Feature{
608 .altivec,
609 .fres,
610 .frsqrte,
611 }),
612 };
613 pub const g5 = Cpu{
614 .name = "g5",
615 .llvm_name = "g5",
616 .features = featureSet(&[_]Feature{
617 .@"64bit",
618 .altivec,
619 .fres,
620 .frsqrte,
621 .fsqrt,
622 .mfocrf,
623 .stfiwx,
624 }),
625 };
626 pub const generic = Cpu{
627 .name = "generic",
628 .llvm_name = "generic",
629 .features = featureSet(&[_]Feature{
630 .hard_float,
631 }),
632 };
633 pub const ppc = Cpu{
634 .name = "ppc",
635 .llvm_name = "ppc",
636 .features = featureSet(&[_]Feature{
637 .hard_float,
638 }),
639 };
640 pub const ppc32 = Cpu{
641 .name = "ppc32",
642 .llvm_name = "ppc32",
643 .features = featureSet(&[_]Feature{
644 .hard_float,
645 }),
646 };
647 pub const ppc64 = Cpu{
648 .name = "ppc64",
649 .llvm_name = "ppc64",
650 .features = featureSet(&[_]Feature{
651 .@"64bit",
652 .altivec,
653 .fres,
654 .frsqrte,
655 .fsqrt,
656 .mfocrf,
657 .stfiwx,
658 }),
659 };
660 pub const ppc64le = Cpu{
661 .name = "ppc64le",
662 .llvm_name = "ppc64le",
663 .features = featureSet(&[_]Feature{
664 .@"64bit",
665 .altivec,
666 .bpermd,
667 .cmpb,
668 .crypto,
669 .direct_move,
670 .extdiv,
671 .fcpsgn,
672 .fpcvt,
673 .fprnd,
674 .fre,
675 .fres,
676 .frsqrte,
677 .frsqrtes,
678 .fsqrt,
679 .htm,
680 .icbt,
681 .isel,
682 .ldbrx,
683 .lfiwax,
684 .mfocrf,
685 .partword_atomics,
686 .popcntd,
687 .power8_altivec,
688 .power8_vector,
689 .recipprec,
690 .stfiwx,
691 .two_const_nr,
692 .vsx,
693 }),
694 };
695 pub const pwr3 = Cpu{
696 .name = "pwr3",
697 .llvm_name = "pwr3",
698 .features = featureSet(&[_]Feature{
699 .@"64bit",
700 .altivec,
701 .fres,
702 .frsqrte,
703 .mfocrf,
704 .stfiwx,
705 }),
706 };
707 pub const pwr4 = Cpu{
708 .name = "pwr4",
709 .llvm_name = "pwr4",
710 .features = featureSet(&[_]Feature{
711 .@"64bit",
712 .altivec,
713 .fres,
714 .frsqrte,
715 .fsqrt,
716 .mfocrf,
717 .stfiwx,
718 }),
719 };
720 pub const pwr5 = Cpu{
721 .name = "pwr5",
722 .llvm_name = "pwr5",
723 .features = featureSet(&[_]Feature{
724 .@"64bit",
725 .altivec,
726 .fre,
727 .fres,
728 .frsqrte,
729 .frsqrtes,
730 .fsqrt,
731 .mfocrf,
732 .stfiwx,
733 }),
734 };
735 pub const pwr5x = Cpu{
736 .name = "pwr5x",
737 .llvm_name = "pwr5x",
738 .features = featureSet(&[_]Feature{
739 .@"64bit",
740 .altivec,
741 .fprnd,
742 .fre,
743 .fres,
744 .frsqrte,
745 .frsqrtes,
746 .fsqrt,
747 .mfocrf,
748 .stfiwx,
749 }),
750 };
751 pub const pwr6 = Cpu{
752 .name = "pwr6",
753 .llvm_name = "pwr6",
754 .features = featureSet(&[_]Feature{
755 .@"64bit",
756 .altivec,
757 .cmpb,
758 .fcpsgn,
759 .fprnd,
760 .fre,
761 .fres,
762 .frsqrte,
763 .frsqrtes,
764 .fsqrt,
765 .lfiwax,
766 .mfocrf,
767 .recipprec,
768 .stfiwx,
769 }),
770 };
771 pub const pwr6x = Cpu{
772 .name = "pwr6x",
773 .llvm_name = "pwr6x",
774 .features = featureSet(&[_]Feature{
775 .@"64bit",
776 .altivec,
777 .cmpb,
778 .fcpsgn,
779 .fprnd,
780 .fre,
781 .fres,
782 .frsqrte,
783 .frsqrtes,
784 .fsqrt,
785 .lfiwax,
786 .mfocrf,
787 .recipprec,
788 .stfiwx,
789 }),
790 };
791 pub const pwr7 = Cpu{
792 .name = "pwr7",
793 .llvm_name = "pwr7",
794 .features = featureSet(&[_]Feature{
795 .@"64bit",
796 .altivec,
797 .bpermd,
798 .cmpb,
799 .extdiv,
800 .fcpsgn,
801 .fpcvt,
802 .fprnd,
803 .fre,
804 .fres,
805 .frsqrte,
806 .frsqrtes,
807 .fsqrt,
808 .isel,
809 .ldbrx,
810 .lfiwax,
811 .mfocrf,
812 .popcntd,
813 .recipprec,
814 .stfiwx,
815 .two_const_nr,
816 .vsx,
817 }),
818 };
819 pub const pwr8 = Cpu{
820 .name = "pwr8",
821 .llvm_name = "pwr8",
822 .features = featureSet(&[_]Feature{
823 .@"64bit",
824 .altivec,
825 .bpermd,
826 .cmpb,
827 .crypto,
828 .direct_move,
829 .extdiv,
830 .fcpsgn,
831 .fpcvt,
832 .fprnd,
833 .fre,
834 .fres,
835 .frsqrte,
836 .frsqrtes,
837 .fsqrt,
838 .htm,
839 .icbt,
840 .isel,
841 .ldbrx,
842 .lfiwax,
843 .mfocrf,
844 .partword_atomics,
845 .popcntd,
846 .power8_altivec,
847 .power8_vector,
848 .recipprec,
849 .stfiwx,
850 .two_const_nr,
851 .vsx,
852 }),
853 };
854 pub const pwr9 = Cpu{
855 .name = "pwr9",
856 .llvm_name = "pwr9",
857 .features = featureSet(&[_]Feature{
858 .@"64bit",
859 .altivec,
860 .bpermd,
861 .cmpb,
862 .crypto,
863 .direct_move,
864 .extdiv,
865 .fcpsgn,
866 .fpcvt,
867 .fprnd,
868 .fre,
869 .fres,
870 .frsqrte,
871 .frsqrtes,
872 .fsqrt,
873 .htm,
874 .icbt,
875 .isa_v30_instructions,
876 .isel,
877 .ldbrx,
878 .lfiwax,
879 .mfocrf,
880 .partword_atomics,
881 .popcntd,
882 .power8_altivec,
883 .power8_vector,
884 .power9_altivec,
885 .power9_vector,
886 .ppc_postra_sched,
887 .ppc_prera_sched,
888 .recipprec,
889 .stfiwx,
890 .two_const_nr,
891 .vectors_use_two_units,
892 .vsx,
893 }),
894 };
895};
896
897/// All powerpc CPUs, sorted alphabetically by name.
898/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
899/// compiler has inefficient memory and CPU usage, affecting build times.
900pub const all_cpus = &[_]*const Cpu{
901 &cpu.@"440",
902 &cpu.@"450",
903 &cpu.@"601",
904 &cpu.@"602",
905 &cpu.@"603",
906 &cpu.@"603e",
907 &cpu.@"603ev",
908 &cpu.@"604",
909 &cpu.@"604e",
910 &cpu.@"620",
911 &cpu.@"7400",
912 &cpu.@"7450",
913 &cpu.@"750",
914 &cpu.@"970",
915 &cpu.a2,
916 &cpu.a2q,
917 &cpu.e500,
918 &cpu.e500mc,
919 &cpu.e5500,
920 &cpu.g3,
921 &cpu.g4,
922 &cpu.@"g4+",
923 &cpu.g5,
924 &cpu.generic,
925 &cpu.ppc,
926 &cpu.ppc32,
927 &cpu.ppc64,
928 &cpu.ppc64le,
929 &cpu.pwr3,
930 &cpu.pwr4,
931 &cpu.pwr5,
932 &cpu.pwr5x,
933 &cpu.pwr6,
934 &cpu.pwr6x,
935 &cpu.pwr7,
936 &cpu.pwr8,
937 &cpu.pwr9,
938};
lib/std/target/riscv.zig created+122
...@@ -0,0 +1,122 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 @"64bit",
6 a,
7 c,
8 d,
9 e,
10 f,
11 m,
12 relax,
13};
14
15pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
16
17pub const all_features = blk: {
18 const len = @typeInfo(Feature).Enum.fields.len;
19 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
20 var result: [len]Cpu.Feature = undefined;
21 result[@enumToInt(Feature.@"64bit")] = .{
22 .llvm_name = "64bit",
23 .description = "Implements RV64",
24 .dependencies = featureSet(&[_]Feature{}),
25 };
26 result[@enumToInt(Feature.a)] = .{
27 .llvm_name = "a",
28 .description = "'A' (Atomic Instructions)",
29 .dependencies = featureSet(&[_]Feature{}),
30 };
31 result[@enumToInt(Feature.c)] = .{
32 .llvm_name = "c",
33 .description = "'C' (Compressed Instructions)",
34 .dependencies = featureSet(&[_]Feature{}),
35 };
36 result[@enumToInt(Feature.d)] = .{
37 .llvm_name = "d",
38 .description = "'D' (Double-Precision Floating-Point)",
39 .dependencies = featureSet(&[_]Feature{
40 .f,
41 }),
42 };
43 result[@enumToInt(Feature.e)] = .{
44 .llvm_name = "e",
45 .description = "Implements RV32E (provides 16 rather than 32 GPRs)",
46 .dependencies = featureSet(&[_]Feature{}),
47 };
48 result[@enumToInt(Feature.f)] = .{
49 .llvm_name = "f",
50 .description = "'F' (Single-Precision Floating-Point)",
51 .dependencies = featureSet(&[_]Feature{}),
52 };
53 result[@enumToInt(Feature.m)] = .{
54 .llvm_name = "m",
55 .description = "'M' (Integer Multiplication and Division)",
56 .dependencies = featureSet(&[_]Feature{}),
57 };
58 result[@enumToInt(Feature.relax)] = .{
59 .llvm_name = "relax",
60 .description = "Enable Linker relaxation.",
61 .dependencies = featureSet(&[_]Feature{}),
62 };
63 const ti = @typeInfo(Feature);
64 for (result) |*elem, i| {
65 elem.index = i;
66 elem.name = ti.Enum.fields[i].name;
67 }
68 break :blk result;
69};
70
71pub const cpu = struct {
72 pub const baseline_rv32 = Cpu{
73 .name = "baseline_rv32",
74 .llvm_name = "generic-rv32",
75 .features = featureSet(&[_]Feature{
76 .a,
77 .c,
78 .d,
79 .f,
80 .m,
81 .relax,
82 }),
83 };
84
85 pub const baseline_rv64 = Cpu{
86 .name = "baseline_rv64",
87 .llvm_name = "generic-rv64",
88 .features = featureSet(&[_]Feature{
89 .@"64bit",
90 .a,
91 .c,
92 .d,
93 .f,
94 .m,
95 .relax,
96 }),
97 };
98
99 pub const generic_rv32 = Cpu{
100 .name = "generic_rv32",
101 .llvm_name = "generic-rv32",
102 .features = featureSet(&[_]Feature{}),
103 };
104
105 pub const generic_rv64 = Cpu{
106 .name = "generic_rv64",
107 .llvm_name = "generic-rv64",
108 .features = featureSet(&[_]Feature{
109 .@"64bit",
110 }),
111 };
112};
113
114/// All riscv CPUs, sorted alphabetically by name.
115/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
116/// compiler has inefficient memory and CPU usage, affecting build times.
117pub const all_cpus = &[_]*const Cpu{
118 &cpu.baseline_rv32,
119 &cpu.baseline_rv64,
120 &cpu.generic_rv32,
121 &cpu.generic_rv64,
122};
lib/std/target/sparc.zig created+495
...@@ -0,0 +1,495 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 deprecated_v8,
6 detectroundchange,
7 fixallfdivsqrt,
8 hard_quad_float,
9 hasleoncasa,
10 hasumacsmac,
11 insertnopload,
12 leon,
13 leoncyclecounter,
14 leonpwrpsr,
15 no_fmuls,
16 no_fsmuld,
17 popc,
18 soft_float,
19 soft_mul_div,
20 v9,
21 vis,
22 vis2,
23 vis3,
24};
25
26pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
27
28pub const all_features = blk: {
29 const len = @typeInfo(Feature).Enum.fields.len;
30 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
31 var result: [len]Cpu.Feature = undefined;
32 result[@enumToInt(Feature.deprecated_v8)] = .{
33 .llvm_name = "deprecated-v8",
34 .description = "Enable deprecated V8 instructions in V9 mode",
35 .dependencies = featureSet(&[_]Feature{}),
36 };
37 result[@enumToInt(Feature.detectroundchange)] = .{
38 .llvm_name = "detectroundchange",
39 .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode",
40 .dependencies = featureSet(&[_]Feature{}),
41 };
42 result[@enumToInt(Feature.fixallfdivsqrt)] = .{
43 .llvm_name = "fixallfdivsqrt",
44 .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store",
45 .dependencies = featureSet(&[_]Feature{}),
46 };
47 result[@enumToInt(Feature.hard_quad_float)] = .{
48 .llvm_name = "hard-quad-float",
49 .description = "Enable quad-word floating point instructions",
50 .dependencies = featureSet(&[_]Feature{}),
51 };
52 result[@enumToInt(Feature.hasleoncasa)] = .{
53 .llvm_name = "hasleoncasa",
54 .description = "Enable CASA instruction for LEON3 and LEON4 processors",
55 .dependencies = featureSet(&[_]Feature{}),
56 };
57 result[@enumToInt(Feature.hasumacsmac)] = .{
58 .llvm_name = "hasumacsmac",
59 .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors",
60 .dependencies = featureSet(&[_]Feature{}),
61 };
62 result[@enumToInt(Feature.insertnopload)] = .{
63 .llvm_name = "insertnopload",
64 .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction",
65 .dependencies = featureSet(&[_]Feature{}),
66 };
67 result[@enumToInt(Feature.leon)] = .{
68 .llvm_name = "leon",
69 .description = "Enable LEON extensions",
70 .dependencies = featureSet(&[_]Feature{}),
71 };
72 result[@enumToInt(Feature.leoncyclecounter)] = .{
73 .llvm_name = "leoncyclecounter",
74 .description = "Use the Leon cycle counter register",
75 .dependencies = featureSet(&[_]Feature{}),
76 };
77 result[@enumToInt(Feature.leonpwrpsr)] = .{
78 .llvm_name = "leonpwrpsr",
79 .description = "Enable the PWRPSR instruction",
80 .dependencies = featureSet(&[_]Feature{}),
81 };
82 result[@enumToInt(Feature.no_fmuls)] = .{
83 .llvm_name = "no-fmuls",
84 .description = "Disable the fmuls instruction.",
85 .dependencies = featureSet(&[_]Feature{}),
86 };
87 result[@enumToInt(Feature.no_fsmuld)] = .{
88 .llvm_name = "no-fsmuld",
89 .description = "Disable the fsmuld instruction.",
90 .dependencies = featureSet(&[_]Feature{}),
91 };
92 result[@enumToInt(Feature.popc)] = .{
93 .llvm_name = "popc",
94 .description = "Use the popc (population count) instruction",
95 .dependencies = featureSet(&[_]Feature{}),
96 };
97 result[@enumToInt(Feature.soft_float)] = .{
98 .llvm_name = "soft-float",
99 .description = "Use software emulation for floating point",
100 .dependencies = featureSet(&[_]Feature{}),
101 };
102 result[@enumToInt(Feature.soft_mul_div)] = .{
103 .llvm_name = "soft-mul-div",
104 .description = "Use software emulation for integer multiply and divide",
105 .dependencies = featureSet(&[_]Feature{}),
106 };
107 result[@enumToInt(Feature.v9)] = .{
108 .llvm_name = "v9",
109 .description = "Enable SPARC-V9 instructions",
110 .dependencies = featureSet(&[_]Feature{}),
111 };
112 result[@enumToInt(Feature.vis)] = .{
113 .llvm_name = "vis",
114 .description = "Enable UltraSPARC Visual Instruction Set extensions",
115 .dependencies = featureSet(&[_]Feature{}),
116 };
117 result[@enumToInt(Feature.vis2)] = .{
118 .llvm_name = "vis2",
119 .description = "Enable Visual Instruction Set extensions II",
120 .dependencies = featureSet(&[_]Feature{}),
121 };
122 result[@enumToInt(Feature.vis3)] = .{
123 .llvm_name = "vis3",
124 .description = "Enable Visual Instruction Set extensions III",
125 .dependencies = featureSet(&[_]Feature{}),
126 };
127 const ti = @typeInfo(Feature);
128 for (result) |*elem, i| {
129 elem.index = i;
130 elem.name = ti.Enum.fields[i].name;
131 }
132 break :blk result;
133};
134
135pub const cpu = struct {
136 pub const at697e = Cpu{
137 .name = "at697e",
138 .llvm_name = "at697e",
139 .features = featureSet(&[_]Feature{
140 .insertnopload,
141 .leon,
142 }),
143 };
144 pub const at697f = Cpu{
145 .name = "at697f",
146 .llvm_name = "at697f",
147 .features = featureSet(&[_]Feature{
148 .insertnopload,
149 .leon,
150 }),
151 };
152 pub const f934 = Cpu{
153 .name = "f934",
154 .llvm_name = "f934",
155 .features = featureSet(&[_]Feature{}),
156 };
157 pub const generic = Cpu{
158 .name = "generic",
159 .llvm_name = "generic",
160 .features = featureSet(&[_]Feature{}),
161 };
162 pub const gr712rc = Cpu{
163 .name = "gr712rc",
164 .llvm_name = "gr712rc",
165 .features = featureSet(&[_]Feature{
166 .hasleoncasa,
167 .leon,
168 }),
169 };
170 pub const gr740 = Cpu{
171 .name = "gr740",
172 .llvm_name = "gr740",
173 .features = featureSet(&[_]Feature{
174 .hasleoncasa,
175 .hasumacsmac,
176 .leon,
177 .leoncyclecounter,
178 .leonpwrpsr,
179 }),
180 };
181 pub const hypersparc = Cpu{
182 .name = "hypersparc",
183 .llvm_name = "hypersparc",
184 .features = featureSet(&[_]Feature{}),
185 };
186 pub const leon2 = Cpu{
187 .name = "leon2",
188 .llvm_name = "leon2",
189 .features = featureSet(&[_]Feature{
190 .leon,
191 }),
192 };
193 pub const leon3 = Cpu{
194 .name = "leon3",
195 .llvm_name = "leon3",
196 .features = featureSet(&[_]Feature{
197 .hasumacsmac,
198 .leon,
199 }),
200 };
201 pub const leon4 = Cpu{
202 .name = "leon4",
203 .llvm_name = "leon4",
204 .features = featureSet(&[_]Feature{
205 .hasleoncasa,
206 .hasumacsmac,
207 .leon,
208 }),
209 };
210 pub const ma2080 = Cpu{
211 .name = "ma2080",
212 .llvm_name = "ma2080",
213 .features = featureSet(&[_]Feature{
214 .hasleoncasa,
215 .leon,
216 }),
217 };
218 pub const ma2085 = Cpu{
219 .name = "ma2085",
220 .llvm_name = "ma2085",
221 .features = featureSet(&[_]Feature{
222 .hasleoncasa,
223 .leon,
224 }),
225 };
226 pub const ma2100 = Cpu{
227 .name = "ma2100",
228 .llvm_name = "ma2100",
229 .features = featureSet(&[_]Feature{
230 .hasleoncasa,
231 .leon,
232 }),
233 };
234 pub const ma2150 = Cpu{
235 .name = "ma2150",
236 .llvm_name = "ma2150",
237 .features = featureSet(&[_]Feature{
238 .hasleoncasa,
239 .leon,
240 }),
241 };
242 pub const ma2155 = Cpu{
243 .name = "ma2155",
244 .llvm_name = "ma2155",
245 .features = featureSet(&[_]Feature{
246 .hasleoncasa,
247 .leon,
248 }),
249 };
250 pub const ma2450 = Cpu{
251 .name = "ma2450",
252 .llvm_name = "ma2450",
253 .features = featureSet(&[_]Feature{
254 .hasleoncasa,
255 .leon,
256 }),
257 };
258 pub const ma2455 = Cpu{
259 .name = "ma2455",
260 .llvm_name = "ma2455",
261 .features = featureSet(&[_]Feature{
262 .hasleoncasa,
263 .leon,
264 }),
265 };
266 pub const ma2480 = Cpu{
267 .name = "ma2480",
268 .llvm_name = "ma2480",
269 .features = featureSet(&[_]Feature{
270 .hasleoncasa,
271 .leon,
272 }),
273 };
274 pub const ma2485 = Cpu{
275 .name = "ma2485",
276 .llvm_name = "ma2485",
277 .features = featureSet(&[_]Feature{
278 .hasleoncasa,
279 .leon,
280 }),
281 };
282 pub const ma2x5x = Cpu{
283 .name = "ma2x5x",
284 .llvm_name = "ma2x5x",
285 .features = featureSet(&[_]Feature{
286 .hasleoncasa,
287 .leon,
288 }),
289 };
290 pub const ma2x8x = Cpu{
291 .name = "ma2x8x",
292 .llvm_name = "ma2x8x",
293 .features = featureSet(&[_]Feature{
294 .hasleoncasa,
295 .leon,
296 }),
297 };
298 pub const myriad2 = Cpu{
299 .name = "myriad2",
300 .llvm_name = "myriad2",
301 .features = featureSet(&[_]Feature{
302 .hasleoncasa,
303 .leon,
304 }),
305 };
306 pub const myriad2_1 = Cpu{
307 .name = "myriad2_1",
308 .llvm_name = "myriad2.1",
309 .features = featureSet(&[_]Feature{
310 .hasleoncasa,
311 .leon,
312 }),
313 };
314 pub const myriad2_2 = Cpu{
315 .name = "myriad2_2",
316 .llvm_name = "myriad2.2",
317 .features = featureSet(&[_]Feature{
318 .hasleoncasa,
319 .leon,
320 }),
321 };
322 pub const myriad2_3 = Cpu{
323 .name = "myriad2_3",
324 .llvm_name = "myriad2.3",
325 .features = featureSet(&[_]Feature{
326 .hasleoncasa,
327 .leon,
328 }),
329 };
330 pub const niagara = Cpu{
331 .name = "niagara",
332 .llvm_name = "niagara",
333 .features = featureSet(&[_]Feature{
334 .deprecated_v8,
335 .v9,
336 .vis,
337 .vis2,
338 }),
339 };
340 pub const niagara2 = Cpu{
341 .name = "niagara2",
342 .llvm_name = "niagara2",
343 .features = featureSet(&[_]Feature{
344 .deprecated_v8,
345 .popc,
346 .v9,
347 .vis,
348 .vis2,
349 }),
350 };
351 pub const niagara3 = Cpu{
352 .name = "niagara3",
353 .llvm_name = "niagara3",
354 .features = featureSet(&[_]Feature{
355 .deprecated_v8,
356 .popc,
357 .v9,
358 .vis,
359 .vis2,
360 }),
361 };
362 pub const niagara4 = Cpu{
363 .name = "niagara4",
364 .llvm_name = "niagara4",
365 .features = featureSet(&[_]Feature{
366 .deprecated_v8,
367 .popc,
368 .v9,
369 .vis,
370 .vis2,
371 .vis3,
372 }),
373 };
374 pub const sparclet = Cpu{
375 .name = "sparclet",
376 .llvm_name = "sparclet",
377 .features = featureSet(&[_]Feature{}),
378 };
379 pub const sparclite = Cpu{
380 .name = "sparclite",
381 .llvm_name = "sparclite",
382 .features = featureSet(&[_]Feature{}),
383 };
384 pub const sparclite86x = Cpu{
385 .name = "sparclite86x",
386 .llvm_name = "sparclite86x",
387 .features = featureSet(&[_]Feature{}),
388 };
389 pub const supersparc = Cpu{
390 .name = "supersparc",
391 .llvm_name = "supersparc",
392 .features = featureSet(&[_]Feature{}),
393 };
394 pub const tsc701 = Cpu{
395 .name = "tsc701",
396 .llvm_name = "tsc701",
397 .features = featureSet(&[_]Feature{}),
398 };
399 pub const ultrasparc = Cpu{
400 .name = "ultrasparc",
401 .llvm_name = "ultrasparc",
402 .features = featureSet(&[_]Feature{
403 .deprecated_v8,
404 .v9,
405 .vis,
406 }),
407 };
408 pub const ultrasparc3 = Cpu{
409 .name = "ultrasparc3",
410 .llvm_name = "ultrasparc3",
411 .features = featureSet(&[_]Feature{
412 .deprecated_v8,
413 .v9,
414 .vis,
415 .vis2,
416 }),
417 };
418 pub const ut699 = Cpu{
419 .name = "ut699",
420 .llvm_name = "ut699",
421 .features = featureSet(&[_]Feature{
422 .fixallfdivsqrt,
423 .insertnopload,
424 .leon,
425 .no_fmuls,
426 .no_fsmuld,
427 }),
428 };
429 pub const v7 = Cpu{
430 .name = "v7",
431 .llvm_name = "v7",
432 .features = featureSet(&[_]Feature{
433 .no_fsmuld,
434 .soft_mul_div,
435 }),
436 };
437 pub const v8 = Cpu{
438 .name = "v8",
439 .llvm_name = "v8",
440 .features = featureSet(&[_]Feature{}),
441 };
442 pub const v9 = Cpu{
443 .name = "v9",
444 .llvm_name = "v9",
445 .features = featureSet(&[_]Feature{
446 .v9,
447 }),
448 };
449};
450
451/// All sparc CPUs, sorted alphabetically by name.
452/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
453/// compiler has inefficient memory and CPU usage, affecting build times.
454pub const all_cpus = &[_]*const Cpu{
455 &cpu.at697e,
456 &cpu.at697f,
457 &cpu.f934,
458 &cpu.generic,
459 &cpu.gr712rc,
460 &cpu.gr740,
461 &cpu.hypersparc,
462 &cpu.leon2,
463 &cpu.leon3,
464 &cpu.leon4,
465 &cpu.ma2080,
466 &cpu.ma2085,
467 &cpu.ma2100,
468 &cpu.ma2150,
469 &cpu.ma2155,
470 &cpu.ma2450,
471 &cpu.ma2455,
472 &cpu.ma2480,
473 &cpu.ma2485,
474 &cpu.ma2x5x,
475 &cpu.ma2x8x,
476 &cpu.myriad2,
477 &cpu.myriad2_1,
478 &cpu.myriad2_2,
479 &cpu.myriad2_3,
480 &cpu.niagara,
481 &cpu.niagara2,
482 &cpu.niagara3,
483 &cpu.niagara4,
484 &cpu.sparclet,
485 &cpu.sparclite,
486 &cpu.sparclite86x,
487 &cpu.supersparc,
488 &cpu.tsc701,
489 &cpu.ultrasparc,
490 &cpu.ultrasparc3,
491 &cpu.ut699,
492 &cpu.v7,
493 &cpu.v8,
494 &cpu.v9,
495};
lib/std/target/systemz.zig created+510
...@@ -0,0 +1,510 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 deflate_conversion,
6 dfp_packed_conversion,
7 dfp_zoned_conversion,
8 distinct_ops,
9 enhanced_dat_2,
10 enhanced_sort,
11 execution_hint,
12 fast_serialization,
13 fp_extension,
14 guarded_storage,
15 high_word,
16 insert_reference_bits_multiple,
17 interlocked_access1,
18 load_and_trap,
19 load_and_zero_rightmost_byte,
20 load_store_on_cond,
21 load_store_on_cond_2,
22 message_security_assist_extension3,
23 message_security_assist_extension4,
24 message_security_assist_extension5,
25 message_security_assist_extension7,
26 message_security_assist_extension8,
27 message_security_assist_extension9,
28 miscellaneous_extensions,
29 miscellaneous_extensions_2,
30 miscellaneous_extensions_3,
31 population_count,
32 processor_assist,
33 reset_reference_bits_multiple,
34 transactional_execution,
35 vector,
36 vector_enhancements_1,
37 vector_enhancements_2,
38 vector_packed_decimal,
39 vector_packed_decimal_enhancement,
40};
41
42pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
43
44pub const all_features = blk: {
45 const len = @typeInfo(Feature).Enum.fields.len;
46 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
47 var result: [len]Cpu.Feature = undefined;
48 result[@enumToInt(Feature.deflate_conversion)] = .{
49 .llvm_name = "deflate-conversion",
50 .description = "Assume that the deflate-conversion facility is installed",
51 .dependencies = featureSet(&[_]Feature{}),
52 };
53 result[@enumToInt(Feature.dfp_packed_conversion)] = .{
54 .llvm_name = "dfp-packed-conversion",
55 .description = "Assume that the DFP packed-conversion facility is installed",
56 .dependencies = featureSet(&[_]Feature{}),
57 };
58 result[@enumToInt(Feature.dfp_zoned_conversion)] = .{
59 .llvm_name = "dfp-zoned-conversion",
60 .description = "Assume that the DFP zoned-conversion facility is installed",
61 .dependencies = featureSet(&[_]Feature{}),
62 };
63 result[@enumToInt(Feature.distinct_ops)] = .{
64 .llvm_name = "distinct-ops",
65 .description = "Assume that the distinct-operands facility is installed",
66 .dependencies = featureSet(&[_]Feature{}),
67 };
68 result[@enumToInt(Feature.enhanced_dat_2)] = .{
69 .llvm_name = "enhanced-dat-2",
70 .description = "Assume that the enhanced-DAT facility 2 is installed",
71 .dependencies = featureSet(&[_]Feature{}),
72 };
73 result[@enumToInt(Feature.enhanced_sort)] = .{
74 .llvm_name = "enhanced-sort",
75 .description = "Assume that the enhanced-sort facility is installed",
76 .dependencies = featureSet(&[_]Feature{}),
77 };
78 result[@enumToInt(Feature.execution_hint)] = .{
79 .llvm_name = "execution-hint",
80 .description = "Assume that the execution-hint facility is installed",
81 .dependencies = featureSet(&[_]Feature{}),
82 };
83 result[@enumToInt(Feature.fast_serialization)] = .{
84 .llvm_name = "fast-serialization",
85 .description = "Assume that the fast-serialization facility is installed",
86 .dependencies = featureSet(&[_]Feature{}),
87 };
88 result[@enumToInt(Feature.fp_extension)] = .{
89 .llvm_name = "fp-extension",
90 .description = "Assume that the floating-point extension facility is installed",
91 .dependencies = featureSet(&[_]Feature{}),
92 };
93 result[@enumToInt(Feature.guarded_storage)] = .{
94 .llvm_name = "guarded-storage",
95 .description = "Assume that the guarded-storage facility is installed",
96 .dependencies = featureSet(&[_]Feature{}),
97 };
98 result[@enumToInt(Feature.high_word)] = .{
99 .llvm_name = "high-word",
100 .description = "Assume that the high-word facility is installed",
101 .dependencies = featureSet(&[_]Feature{}),
102 };
103 result[@enumToInt(Feature.insert_reference_bits_multiple)] = .{
104 .llvm_name = "insert-reference-bits-multiple",
105 .description = "Assume that the insert-reference-bits-multiple facility is installed",
106 .dependencies = featureSet(&[_]Feature{}),
107 };
108 result[@enumToInt(Feature.interlocked_access1)] = .{
109 .llvm_name = "interlocked-access1",
110 .description = "Assume that interlocked-access facility 1 is installed",
111 .dependencies = featureSet(&[_]Feature{}),
112 };
113 result[@enumToInt(Feature.load_and_trap)] = .{
114 .llvm_name = "load-and-trap",
115 .description = "Assume that the load-and-trap facility is installed",
116 .dependencies = featureSet(&[_]Feature{}),
117 };
118 result[@enumToInt(Feature.load_and_zero_rightmost_byte)] = .{
119 .llvm_name = "load-and-zero-rightmost-byte",
120 .description = "Assume that the load-and-zero-rightmost-byte facility is installed",
121 .dependencies = featureSet(&[_]Feature{}),
122 };
123 result[@enumToInt(Feature.load_store_on_cond)] = .{
124 .llvm_name = "load-store-on-cond",
125 .description = "Assume that the load/store-on-condition facility is installed",
126 .dependencies = featureSet(&[_]Feature{}),
127 };
128 result[@enumToInt(Feature.load_store_on_cond_2)] = .{
129 .llvm_name = "load-store-on-cond-2",
130 .description = "Assume that the load/store-on-condition facility 2 is installed",
131 .dependencies = featureSet(&[_]Feature{}),
132 };
133 result[@enumToInt(Feature.message_security_assist_extension3)] = .{
134 .llvm_name = "message-security-assist-extension3",
135 .description = "Assume that the message-security-assist extension facility 3 is installed",
136 .dependencies = featureSet(&[_]Feature{}),
137 };
138 result[@enumToInt(Feature.message_security_assist_extension4)] = .{
139 .llvm_name = "message-security-assist-extension4",
140 .description = "Assume that the message-security-assist extension facility 4 is installed",
141 .dependencies = featureSet(&[_]Feature{}),
142 };
143 result[@enumToInt(Feature.message_security_assist_extension5)] = .{
144 .llvm_name = "message-security-assist-extension5",
145 .description = "Assume that the message-security-assist extension facility 5 is installed",
146 .dependencies = featureSet(&[_]Feature{}),
147 };
148 result[@enumToInt(Feature.message_security_assist_extension7)] = .{
149 .llvm_name = "message-security-assist-extension7",
150 .description = "Assume that the message-security-assist extension facility 7 is installed",
151 .dependencies = featureSet(&[_]Feature{}),
152 };
153 result[@enumToInt(Feature.message_security_assist_extension8)] = .{
154 .llvm_name = "message-security-assist-extension8",
155 .description = "Assume that the message-security-assist extension facility 8 is installed",
156 .dependencies = featureSet(&[_]Feature{}),
157 };
158 result[@enumToInt(Feature.message_security_assist_extension9)] = .{
159 .llvm_name = "message-security-assist-extension9",
160 .description = "Assume that the message-security-assist extension facility 9 is installed",
161 .dependencies = featureSet(&[_]Feature{}),
162 };
163 result[@enumToInt(Feature.miscellaneous_extensions)] = .{
164 .llvm_name = "miscellaneous-extensions",
165 .description = "Assume that the miscellaneous-extensions facility is installed",
166 .dependencies = featureSet(&[_]Feature{}),
167 };
168 result[@enumToInt(Feature.miscellaneous_extensions_2)] = .{
169 .llvm_name = "miscellaneous-extensions-2",
170 .description = "Assume that the miscellaneous-extensions facility 2 is installed",
171 .dependencies = featureSet(&[_]Feature{}),
172 };
173 result[@enumToInt(Feature.miscellaneous_extensions_3)] = .{
174 .llvm_name = "miscellaneous-extensions-3",
175 .description = "Assume that the miscellaneous-extensions facility 3 is installed",
176 .dependencies = featureSet(&[_]Feature{}),
177 };
178 result[@enumToInt(Feature.population_count)] = .{
179 .llvm_name = "population-count",
180 .description = "Assume that the population-count facility is installed",
181 .dependencies = featureSet(&[_]Feature{}),
182 };
183 result[@enumToInt(Feature.processor_assist)] = .{
184 .llvm_name = "processor-assist",
185 .description = "Assume that the processor-assist facility is installed",
186 .dependencies = featureSet(&[_]Feature{}),
187 };
188 result[@enumToInt(Feature.reset_reference_bits_multiple)] = .{
189 .llvm_name = "reset-reference-bits-multiple",
190 .description = "Assume that the reset-reference-bits-multiple facility is installed",
191 .dependencies = featureSet(&[_]Feature{}),
192 };
193 result[@enumToInt(Feature.transactional_execution)] = .{
194 .llvm_name = "transactional-execution",
195 .description = "Assume that the transactional-execution facility is installed",
196 .dependencies = featureSet(&[_]Feature{}),
197 };
198 result[@enumToInt(Feature.vector)] = .{
199 .llvm_name = "vector",
200 .description = "Assume that the vectory facility is installed",
201 .dependencies = featureSet(&[_]Feature{}),
202 };
203 result[@enumToInt(Feature.vector_enhancements_1)] = .{
204 .llvm_name = "vector-enhancements-1",
205 .description = "Assume that the vector enhancements facility 1 is installed",
206 .dependencies = featureSet(&[_]Feature{}),
207 };
208 result[@enumToInt(Feature.vector_enhancements_2)] = .{
209 .llvm_name = "vector-enhancements-2",
210 .description = "Assume that the vector enhancements facility 2 is installed",
211 .dependencies = featureSet(&[_]Feature{}),
212 };
213 result[@enumToInt(Feature.vector_packed_decimal)] = .{
214 .llvm_name = "vector-packed-decimal",
215 .description = "Assume that the vector packed decimal facility is installed",
216 .dependencies = featureSet(&[_]Feature{}),
217 };
218 result[@enumToInt(Feature.vector_packed_decimal_enhancement)] = .{
219 .llvm_name = "vector-packed-decimal-enhancement",
220 .description = "Assume that the vector packed decimal enhancement facility is installed",
221 .dependencies = featureSet(&[_]Feature{}),
222 };
223 const ti = @typeInfo(Feature);
224 for (result) |*elem, i| {
225 elem.index = i;
226 elem.name = ti.Enum.fields[i].name;
227 }
228 break :blk result;
229};
230
231pub const cpu = struct {
232 pub const arch10 = Cpu{
233 .name = "arch10",
234 .llvm_name = "arch10",
235 .features = featureSet(&[_]Feature{
236 .dfp_zoned_conversion,
237 .distinct_ops,
238 .enhanced_dat_2,
239 .execution_hint,
240 .fast_serialization,
241 .fp_extension,
242 .high_word,
243 .interlocked_access1,
244 .load_and_trap,
245 .load_store_on_cond,
246 .message_security_assist_extension3,
247 .message_security_assist_extension4,
248 .miscellaneous_extensions,
249 .population_count,
250 .processor_assist,
251 .reset_reference_bits_multiple,
252 .transactional_execution,
253 }),
254 };
255 pub const arch11 = Cpu{
256 .name = "arch11",
257 .llvm_name = "arch11",
258 .features = featureSet(&[_]Feature{
259 .dfp_packed_conversion,
260 .dfp_zoned_conversion,
261 .distinct_ops,
262 .enhanced_dat_2,
263 .execution_hint,
264 .fast_serialization,
265 .fp_extension,
266 .high_word,
267 .interlocked_access1,
268 .load_and_trap,
269 .load_and_zero_rightmost_byte,
270 .load_store_on_cond,
271 .load_store_on_cond_2,
272 .message_security_assist_extension3,
273 .message_security_assist_extension4,
274 .message_security_assist_extension5,
275 .miscellaneous_extensions,
276 .population_count,
277 .processor_assist,
278 .reset_reference_bits_multiple,
279 .transactional_execution,
280 .vector,
281 }),
282 };
283 pub const arch12 = Cpu{
284 .name = "arch12",
285 .llvm_name = "arch12",
286 .features = featureSet(&[_]Feature{
287 .dfp_packed_conversion,
288 .dfp_zoned_conversion,
289 .distinct_ops,
290 .enhanced_dat_2,
291 .execution_hint,
292 .fast_serialization,
293 .fp_extension,
294 .guarded_storage,
295 .high_word,
296 .insert_reference_bits_multiple,
297 .interlocked_access1,
298 .load_and_trap,
299 .load_and_zero_rightmost_byte,
300 .load_store_on_cond,
301 .load_store_on_cond_2,
302 .message_security_assist_extension3,
303 .message_security_assist_extension4,
304 .message_security_assist_extension5,
305 .message_security_assist_extension7,
306 .message_security_assist_extension8,
307 .miscellaneous_extensions,
308 .miscellaneous_extensions_2,
309 .population_count,
310 .processor_assist,
311 .reset_reference_bits_multiple,
312 .transactional_execution,
313 .vector,
314 .vector_enhancements_1,
315 .vector_packed_decimal,
316 }),
317 };
318 pub const arch13 = Cpu{
319 .name = "arch13",
320 .llvm_name = "arch13",
321 .features = featureSet(&[_]Feature{
322 .deflate_conversion,
323 .dfp_packed_conversion,
324 .dfp_zoned_conversion,
325 .distinct_ops,
326 .enhanced_dat_2,
327 .enhanced_sort,
328 .execution_hint,
329 .fast_serialization,
330 .fp_extension,
331 .guarded_storage,
332 .high_word,
333 .insert_reference_bits_multiple,
334 .interlocked_access1,
335 .load_and_trap,
336 .load_and_zero_rightmost_byte,
337 .load_store_on_cond,
338 .load_store_on_cond_2,
339 .message_security_assist_extension3,
340 .message_security_assist_extension4,
341 .message_security_assist_extension5,
342 .message_security_assist_extension7,
343 .message_security_assist_extension8,
344 .message_security_assist_extension9,
345 .miscellaneous_extensions,
346 .miscellaneous_extensions_2,
347 .miscellaneous_extensions_3,
348 .population_count,
349 .processor_assist,
350 .reset_reference_bits_multiple,
351 .transactional_execution,
352 .vector,
353 .vector_enhancements_1,
354 .vector_enhancements_2,
355 .vector_packed_decimal,
356 .vector_packed_decimal_enhancement,
357 }),
358 };
359 pub const arch8 = Cpu{
360 .name = "arch8",
361 .llvm_name = "arch8",
362 .features = featureSet(&[_]Feature{}),
363 };
364 pub const arch9 = Cpu{
365 .name = "arch9",
366 .llvm_name = "arch9",
367 .features = featureSet(&[_]Feature{
368 .distinct_ops,
369 .fast_serialization,
370 .fp_extension,
371 .high_word,
372 .interlocked_access1,
373 .load_store_on_cond,
374 .message_security_assist_extension3,
375 .message_security_assist_extension4,
376 .population_count,
377 .reset_reference_bits_multiple,
378 }),
379 };
380 pub const generic = Cpu{
381 .name = "generic",
382 .llvm_name = "generic",
383 .features = featureSet(&[_]Feature{}),
384 };
385 pub const z10 = Cpu{
386 .name = "z10",
387 .llvm_name = "z10",
388 .features = featureSet(&[_]Feature{}),
389 };
390 pub const z13 = Cpu{
391 .name = "z13",
392 .llvm_name = "z13",
393 .features = featureSet(&[_]Feature{
394 .dfp_packed_conversion,
395 .dfp_zoned_conversion,
396 .distinct_ops,
397 .enhanced_dat_2,
398 .execution_hint,
399 .fast_serialization,
400 .fp_extension,
401 .high_word,
402 .interlocked_access1,
403 .load_and_trap,
404 .load_and_zero_rightmost_byte,
405 .load_store_on_cond,
406 .load_store_on_cond_2,
407 .message_security_assist_extension3,
408 .message_security_assist_extension4,
409 .message_security_assist_extension5,
410 .miscellaneous_extensions,
411 .population_count,
412 .processor_assist,
413 .reset_reference_bits_multiple,
414 .transactional_execution,
415 .vector,
416 }),
417 };
418 pub const z14 = Cpu{
419 .name = "z14",
420 .llvm_name = "z14",
421 .features = featureSet(&[_]Feature{
422 .dfp_packed_conversion,
423 .dfp_zoned_conversion,
424 .distinct_ops,
425 .enhanced_dat_2,
426 .execution_hint,
427 .fast_serialization,
428 .fp_extension,
429 .guarded_storage,
430 .high_word,
431 .insert_reference_bits_multiple,
432 .interlocked_access1,
433 .load_and_trap,
434 .load_and_zero_rightmost_byte,
435 .load_store_on_cond,
436 .load_store_on_cond_2,
437 .message_security_assist_extension3,
438 .message_security_assist_extension4,
439 .message_security_assist_extension5,
440 .message_security_assist_extension7,
441 .message_security_assist_extension8,
442 .miscellaneous_extensions,
443 .miscellaneous_extensions_2,
444 .population_count,
445 .processor_assist,
446 .reset_reference_bits_multiple,
447 .transactional_execution,
448 .vector,
449 .vector_enhancements_1,
450 .vector_packed_decimal,
451 }),
452 };
453 pub const z196 = Cpu{
454 .name = "z196",
455 .llvm_name = "z196",
456 .features = featureSet(&[_]Feature{
457 .distinct_ops,
458 .fast_serialization,
459 .fp_extension,
460 .high_word,
461 .interlocked_access1,
462 .load_store_on_cond,
463 .message_security_assist_extension3,
464 .message_security_assist_extension4,
465 .population_count,
466 .reset_reference_bits_multiple,
467 }),
468 };
469 pub const zEC12 = Cpu{
470 .name = "zEC12",
471 .llvm_name = "zEC12",
472 .features = featureSet(&[_]Feature{
473 .dfp_zoned_conversion,
474 .distinct_ops,
475 .enhanced_dat_2,
476 .execution_hint,
477 .fast_serialization,
478 .fp_extension,
479 .high_word,
480 .interlocked_access1,
481 .load_and_trap,
482 .load_store_on_cond,
483 .message_security_assist_extension3,
484 .message_security_assist_extension4,
485 .miscellaneous_extensions,
486 .population_count,
487 .processor_assist,
488 .reset_reference_bits_multiple,
489 .transactional_execution,
490 }),
491 };
492};
493
494/// All systemz CPUs, sorted alphabetically by name.
495/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
496/// compiler has inefficient memory and CPU usage, affecting build times.
497pub const all_cpus = &[_]*const Cpu{
498 &cpu.arch10,
499 &cpu.arch11,
500 &cpu.arch12,
501 &cpu.arch13,
502 &cpu.arch8,
503 &cpu.arch9,
504 &cpu.generic,
505 &cpu.z10,
506 &cpu.z13,
507 &cpu.z14,
508 &cpu.z196,
509 &cpu.zEC12,
510};
lib/std/target/wasm.zig created+114
...@@ -0,0 +1,114 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 atomics,
6 bulk_memory,
7 exception_handling,
8 multivalue,
9 mutable_globals,
10 nontrapping_fptoint,
11 sign_ext,
12 simd128,
13 tail_call,
14 unimplemented_simd128,
15};
16
17pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
18
19pub const all_features = blk: {
20 const len = @typeInfo(Feature).Enum.fields.len;
21 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
22 var result: [len]Cpu.Feature = undefined;
23 result[@enumToInt(Feature.atomics)] = .{
24 .llvm_name = "atomics",
25 .description = "Enable Atomics",
26 .dependencies = featureSet(&[_]Feature{}),
27 };
28 result[@enumToInt(Feature.bulk_memory)] = .{
29 .llvm_name = "bulk-memory",
30 .description = "Enable bulk memory operations",
31 .dependencies = featureSet(&[_]Feature{}),
32 };
33 result[@enumToInt(Feature.exception_handling)] = .{
34 .llvm_name = "exception-handling",
35 .description = "Enable Wasm exception handling",
36 .dependencies = featureSet(&[_]Feature{}),
37 };
38 result[@enumToInt(Feature.multivalue)] = .{
39 .llvm_name = "multivalue",
40 .description = "Enable multivalue blocks, instructions, and functions",
41 .dependencies = featureSet(&[_]Feature{}),
42 };
43 result[@enumToInt(Feature.mutable_globals)] = .{
44 .llvm_name = "mutable-globals",
45 .description = "Enable mutable globals",
46 .dependencies = featureSet(&[_]Feature{}),
47 };
48 result[@enumToInt(Feature.nontrapping_fptoint)] = .{
49 .llvm_name = "nontrapping-fptoint",
50 .description = "Enable non-trapping float-to-int conversion operators",
51 .dependencies = featureSet(&[_]Feature{}),
52 };
53 result[@enumToInt(Feature.sign_ext)] = .{
54 .llvm_name = "sign-ext",
55 .description = "Enable sign extension operators",
56 .dependencies = featureSet(&[_]Feature{}),
57 };
58 result[@enumToInt(Feature.simd128)] = .{
59 .llvm_name = "simd128",
60 .description = "Enable 128-bit SIMD",
61 .dependencies = featureSet(&[_]Feature{}),
62 };
63 result[@enumToInt(Feature.tail_call)] = .{
64 .llvm_name = "tail-call",
65 .description = "Enable tail call instructions",
66 .dependencies = featureSet(&[_]Feature{}),
67 };
68 result[@enumToInt(Feature.unimplemented_simd128)] = .{
69 .llvm_name = "unimplemented-simd128",
70 .description = "Enable 128-bit SIMD not yet implemented in engines",
71 .dependencies = featureSet(&[_]Feature{
72 .simd128,
73 }),
74 };
75 const ti = @typeInfo(Feature);
76 for (result) |*elem, i| {
77 elem.index = i;
78 elem.name = ti.Enum.fields[i].name;
79 }
80 break :blk result;
81};
82
83pub const cpu = struct {
84 pub const bleeding_edge = Cpu{
85 .name = "bleeding_edge",
86 .llvm_name = "bleeding-edge",
87 .features = featureSet(&[_]Feature{
88 .atomics,
89 .mutable_globals,
90 .nontrapping_fptoint,
91 .sign_ext,
92 .simd128,
93 }),
94 };
95 pub const generic = Cpu{
96 .name = "generic",
97 .llvm_name = "generic",
98 .features = featureSet(&[_]Feature{}),
99 };
100 pub const mvp = Cpu{
101 .name = "mvp",
102 .llvm_name = "mvp",
103 .features = featureSet(&[_]Feature{}),
104 };
105};
106
107/// All wasm CPUs, sorted alphabetically by name.
108/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
109/// compiler has inefficient memory and CPU usage, affecting build times.
110pub const all_cpus = &[_]*const Cpu{
111 &cpu.bleeding_edge,
112 &cpu.generic,
113 &cpu.mvp,
114};
lib/std/target/x86.zig created+2859
...@@ -0,0 +1,2859 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 @"3dnow",
6 @"3dnowa",
7 @"64bit",
8 adx,
9 aes,
10 avx,
11 avx2,
12 avx512bf16,
13 avx512bitalg,
14 avx512bw,
15 avx512cd,
16 avx512dq,
17 avx512er,
18 avx512f,
19 avx512ifma,
20 avx512pf,
21 avx512vbmi,
22 avx512vbmi2,
23 avx512vl,
24 avx512vnni,
25 avx512vp2intersect,
26 avx512vpopcntdq,
27 bmi,
28 bmi2,
29 branchfusion,
30 cldemote,
31 clflushopt,
32 clwb,
33 clzero,
34 cmov,
35 cx16,
36 cx8,
37 enqcmd,
38 ermsb,
39 f16c,
40 false_deps_lzcnt_tzcnt,
41 false_deps_popcnt,
42 fast_11bytenop,
43 fast_15bytenop,
44 fast_bextr,
45 fast_gather,
46 fast_hops,
47 fast_lzcnt,
48 fast_partial_ymm_or_zmm_write,
49 fast_scalar_fsqrt,
50 fast_scalar_shift_masks,
51 fast_shld_rotate,
52 fast_variable_shuffle,
53 fast_vector_fsqrt,
54 fast_vector_shift_masks,
55 fma,
56 fma4,
57 fsgsbase,
58 fxsr,
59 gfni,
60 idivl_to_divb,
61 idivq_to_divl,
62 invpcid,
63 lea_sp,
64 lea_uses_ag,
65 lwp,
66 lzcnt,
67 macrofusion,
68 merge_to_threeway_branch,
69 mmx,
70 movbe,
71 movdir64b,
72 movdiri,
73 mpx,
74 mwaitx,
75 nopl,
76 pad_short_functions,
77 pclmul,
78 pconfig,
79 pku,
80 popcnt,
81 prefer_256_bit,
82 prefetchwt1,
83 prfchw,
84 ptwrite,
85 rdpid,
86 rdrnd,
87 rdseed,
88 retpoline,
89 retpoline_external_thunk,
90 retpoline_indirect_branches,
91 retpoline_indirect_calls,
92 rtm,
93 sahf,
94 sgx,
95 sha,
96 shstk,
97 slow_3ops_lea,
98 slow_incdec,
99 slow_lea,
100 slow_pmaddwd,
101 slow_pmulld,
102 slow_shld,
103 slow_two_mem_ops,
104 slow_unaligned_mem_16,
105 slow_unaligned_mem_32,
106 soft_float,
107 sse,
108 sse_unaligned_mem,
109 sse2,
110 sse3,
111 sse4_1,
112 sse4_2,
113 sse4a,
114 ssse3,
115 tbm,
116 vaes,
117 vpclmulqdq,
118 waitpkg,
119 wbnoinvd,
120 x87,
121 xop,
122 xsave,
123 xsavec,
124 xsaveopt,
125 xsaves,
126};
127
128pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
129
130pub const all_features = blk: {
131 const len = @typeInfo(Feature).Enum.fields.len;
132 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
133 var result: [len]Cpu.Feature = undefined;
134 result[@enumToInt(Feature.@"3dnow")] = .{
135 .llvm_name = "3dnow",
136 .description = "Enable 3DNow! instructions",
137 .dependencies = featureSet(&[_]Feature{
138 .mmx,
139 }),
140 };
141 result[@enumToInt(Feature.@"3dnowa")] = .{
142 .llvm_name = "3dnowa",
143 .description = "Enable 3DNow! Athlon instructions",
144 .dependencies = featureSet(&[_]Feature{
145 .@"3dnow",
146 }),
147 };
148 result[@enumToInt(Feature.@"64bit")] = .{
149 .llvm_name = "64bit",
150 .description = "Support 64-bit instructions",
151 .dependencies = featureSet(&[_]Feature{}),
152 };
153 result[@enumToInt(Feature.adx)] = .{
154 .llvm_name = "adx",
155 .description = "Support ADX instructions",
156 .dependencies = featureSet(&[_]Feature{}),
157 };
158 result[@enumToInt(Feature.aes)] = .{
159 .llvm_name = "aes",
160 .description = "Enable AES instructions",
161 .dependencies = featureSet(&[_]Feature{
162 .sse2,
163 }),
164 };
165 result[@enumToInt(Feature.avx)] = .{
166 .llvm_name = "avx",
167 .description = "Enable AVX instructions",
168 .dependencies = featureSet(&[_]Feature{
169 .sse4_2,
170 }),
171 };
172 result[@enumToInt(Feature.avx2)] = .{
173 .llvm_name = "avx2",
174 .description = "Enable AVX2 instructions",
175 .dependencies = featureSet(&[_]Feature{
176 .avx,
177 }),
178 };
179 result[@enumToInt(Feature.avx512bf16)] = .{
180 .llvm_name = "avx512bf16",
181 .description = "Support bfloat16 floating point",
182 .dependencies = featureSet(&[_]Feature{
183 .avx512bw,
184 }),
185 };
186 result[@enumToInt(Feature.avx512bitalg)] = .{
187 .llvm_name = "avx512bitalg",
188 .description = "Enable AVX-512 Bit Algorithms",
189 .dependencies = featureSet(&[_]Feature{
190 .avx512bw,
191 }),
192 };
193 result[@enumToInt(Feature.avx512bw)] = .{
194 .llvm_name = "avx512bw",
195 .description = "Enable AVX-512 Byte and Word Instructions",
196 .dependencies = featureSet(&[_]Feature{
197 .avx512f,
198 }),
199 };
200 result[@enumToInt(Feature.avx512cd)] = .{
201 .llvm_name = "avx512cd",
202 .description = "Enable AVX-512 Conflict Detection Instructions",
203 .dependencies = featureSet(&[_]Feature{
204 .avx512f,
205 }),
206 };
207 result[@enumToInt(Feature.avx512dq)] = .{
208 .llvm_name = "avx512dq",
209 .description = "Enable AVX-512 Doubleword and Quadword Instructions",
210 .dependencies = featureSet(&[_]Feature{
211 .avx512f,
212 }),
213 };
214 result[@enumToInt(Feature.avx512er)] = .{
215 .llvm_name = "avx512er",
216 .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
217 .dependencies = featureSet(&[_]Feature{
218 .avx512f,
219 }),
220 };
221 result[@enumToInt(Feature.avx512f)] = .{
222 .llvm_name = "avx512f",
223 .description = "Enable AVX-512 instructions",
224 .dependencies = featureSet(&[_]Feature{
225 .avx2,
226 .f16c,
227 .fma,
228 }),
229 };
230 result[@enumToInt(Feature.avx512ifma)] = .{
231 .llvm_name = "avx512ifma",
232 .description = "Enable AVX-512 Integer Fused Multiple-Add",
233 .dependencies = featureSet(&[_]Feature{
234 .avx512f,
235 }),
236 };
237 result[@enumToInt(Feature.avx512pf)] = .{
238 .llvm_name = "avx512pf",
239 .description = "Enable AVX-512 PreFetch Instructions",
240 .dependencies = featureSet(&[_]Feature{
241 .avx512f,
242 }),
243 };
244 result[@enumToInt(Feature.avx512vbmi)] = .{
245 .llvm_name = "avx512vbmi",
246 .description = "Enable AVX-512 Vector Byte Manipulation Instructions",
247 .dependencies = featureSet(&[_]Feature{
248 .avx512bw,
249 }),
250 };
251 result[@enumToInt(Feature.avx512vbmi2)] = .{
252 .llvm_name = "avx512vbmi2",
253 .description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
254 .dependencies = featureSet(&[_]Feature{
255 .avx512bw,
256 }),
257 };
258 result[@enumToInt(Feature.avx512vl)] = .{
259 .llvm_name = "avx512vl",
260 .description = "Enable AVX-512 Vector Length eXtensions",
261 .dependencies = featureSet(&[_]Feature{
262 .avx512f,
263 }),
264 };
265 result[@enumToInt(Feature.avx512vnni)] = .{
266 .llvm_name = "avx512vnni",
267 .description = "Enable AVX-512 Vector Neural Network Instructions",
268 .dependencies = featureSet(&[_]Feature{
269 .avx512f,
270 }),
271 };
272 result[@enumToInt(Feature.avx512vp2intersect)] = .{
273 .llvm_name = "avx512vp2intersect",
274 .description = "Enable AVX-512 vp2intersect",
275 .dependencies = featureSet(&[_]Feature{
276 .avx512f,
277 }),
278 };
279 result[@enumToInt(Feature.avx512vpopcntdq)] = .{
280 .llvm_name = "avx512vpopcntdq",
281 .description = "Enable AVX-512 Population Count Instructions",
282 .dependencies = featureSet(&[_]Feature{
283 .avx512f,
284 }),
285 };
286 result[@enumToInt(Feature.bmi)] = .{
287 .llvm_name = "bmi",
288 .description = "Support BMI instructions",
289 .dependencies = featureSet(&[_]Feature{}),
290 };
291 result[@enumToInt(Feature.bmi2)] = .{
292 .llvm_name = "bmi2",
293 .description = "Support BMI2 instructions",
294 .dependencies = featureSet(&[_]Feature{}),
295 };
296 result[@enumToInt(Feature.branchfusion)] = .{
297 .llvm_name = "branchfusion",
298 .description = "CMP/TEST can be fused with conditional branches",
299 .dependencies = featureSet(&[_]Feature{}),
300 };
301 result[@enumToInt(Feature.cldemote)] = .{
302 .llvm_name = "cldemote",
303 .description = "Enable Cache Demote",
304 .dependencies = featureSet(&[_]Feature{}),
305 };
306 result[@enumToInt(Feature.clflushopt)] = .{
307 .llvm_name = "clflushopt",
308 .description = "Flush A Cache Line Optimized",
309 .dependencies = featureSet(&[_]Feature{}),
310 };
311 result[@enumToInt(Feature.clwb)] = .{
312 .llvm_name = "clwb",
313 .description = "Cache Line Write Back",
314 .dependencies = featureSet(&[_]Feature{}),
315 };
316 result[@enumToInt(Feature.clzero)] = .{
317 .llvm_name = "clzero",
318 .description = "Enable Cache Line Zero",
319 .dependencies = featureSet(&[_]Feature{}),
320 };
321 result[@enumToInt(Feature.cmov)] = .{
322 .llvm_name = "cmov",
323 .description = "Enable conditional move instructions",
324 .dependencies = featureSet(&[_]Feature{}),
325 };
326 result[@enumToInt(Feature.cx16)] = .{
327 .llvm_name = "cx16",
328 .description = "64-bit with cmpxchg16b",
329 .dependencies = featureSet(&[_]Feature{
330 .cx8,
331 }),
332 };
333 result[@enumToInt(Feature.cx8)] = .{
334 .llvm_name = "cx8",
335 .description = "Support CMPXCHG8B instructions",
336 .dependencies = featureSet(&[_]Feature{}),
337 };
338 result[@enumToInt(Feature.enqcmd)] = .{
339 .llvm_name = "enqcmd",
340 .description = "Has ENQCMD instructions",
341 .dependencies = featureSet(&[_]Feature{}),
342 };
343 result[@enumToInt(Feature.ermsb)] = .{
344 .llvm_name = "ermsb",
345 .description = "REP MOVS/STOS are fast",
346 .dependencies = featureSet(&[_]Feature{}),
347 };
348 result[@enumToInt(Feature.f16c)] = .{
349 .llvm_name = "f16c",
350 .description = "Support 16-bit floating point conversion instructions",
351 .dependencies = featureSet(&[_]Feature{
352 .avx,
353 }),
354 };
355 result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{
356 .llvm_name = "false-deps-lzcnt-tzcnt",
357 .description = "LZCNT/TZCNT have a false dependency on dest register",
358 .dependencies = featureSet(&[_]Feature{}),
359 };
360 result[@enumToInt(Feature.false_deps_popcnt)] = .{
361 .llvm_name = "false-deps-popcnt",
362 .description = "POPCNT has a false dependency on dest register",
363 .dependencies = featureSet(&[_]Feature{}),
364 };
365 result[@enumToInt(Feature.fast_11bytenop)] = .{
366 .llvm_name = "fast-11bytenop",
367 .description = "Target can quickly decode up to 11 byte NOPs",
368 .dependencies = featureSet(&[_]Feature{}),
369 };
370 result[@enumToInt(Feature.fast_15bytenop)] = .{
371 .llvm_name = "fast-15bytenop",
372 .description = "Target can quickly decode up to 15 byte NOPs",
373 .dependencies = featureSet(&[_]Feature{}),
374 };
375 result[@enumToInt(Feature.fast_bextr)] = .{
376 .llvm_name = "fast-bextr",
377 .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
378 .dependencies = featureSet(&[_]Feature{}),
379 };
380 result[@enumToInt(Feature.fast_gather)] = .{
381 .llvm_name = "fast-gather",
382 .description = "Indicates if gather is reasonably fast",
383 .dependencies = featureSet(&[_]Feature{}),
384 };
385 result[@enumToInt(Feature.fast_hops)] = .{
386 .llvm_name = "fast-hops",
387 .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
388 .dependencies = featureSet(&[_]Feature{
389 .sse3,
390 }),
391 };
392 result[@enumToInt(Feature.fast_lzcnt)] = .{
393 .llvm_name = "fast-lzcnt",
394 .description = "LZCNT instructions are as fast as most simple integer ops",
395 .dependencies = featureSet(&[_]Feature{}),
396 };
397 result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{
398 .llvm_name = "fast-partial-ymm-or-zmm-write",
399 .description = "Partial writes to YMM/ZMM registers are fast",
400 .dependencies = featureSet(&[_]Feature{}),
401 };
402 result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{
403 .llvm_name = "fast-scalar-fsqrt",
404 .description = "Scalar SQRT is fast (disable Newton-Raphson)",
405 .dependencies = featureSet(&[_]Feature{}),
406 };
407 result[@enumToInt(Feature.fast_scalar_shift_masks)] = .{
408 .llvm_name = "fast-scalar-shift-masks",
409 .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
410 .dependencies = featureSet(&[_]Feature{}),
411 };
412 result[@enumToInt(Feature.fast_shld_rotate)] = .{
413 .llvm_name = "fast-shld-rotate",
414 .description = "SHLD can be used as a faster rotate",
415 .dependencies = featureSet(&[_]Feature{}),
416 };
417 result[@enumToInt(Feature.fast_variable_shuffle)] = .{
418 .llvm_name = "fast-variable-shuffle",
419 .description = "Shuffles with variable masks are fast",
420 .dependencies = featureSet(&[_]Feature{}),
421 };
422 result[@enumToInt(Feature.fast_vector_fsqrt)] = .{
423 .llvm_name = "fast-vector-fsqrt",
424 .description = "Vector SQRT is fast (disable Newton-Raphson)",
425 .dependencies = featureSet(&[_]Feature{}),
426 };
427 result[@enumToInt(Feature.fast_vector_shift_masks)] = .{
428 .llvm_name = "fast-vector-shift-masks",
429 .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
430 .dependencies = featureSet(&[_]Feature{}),
431 };
432 result[@enumToInt(Feature.fma)] = .{
433 .llvm_name = "fma",
434 .description = "Enable three-operand fused multiple-add",
435 .dependencies = featureSet(&[_]Feature{
436 .avx,
437 }),
438 };
439 result[@enumToInt(Feature.fma4)] = .{
440 .llvm_name = "fma4",
441 .description = "Enable four-operand fused multiple-add",
442 .dependencies = featureSet(&[_]Feature{
443 .avx,
444 .sse4a,
445 }),
446 };
447 result[@enumToInt(Feature.fsgsbase)] = .{
448 .llvm_name = "fsgsbase",
449 .description = "Support FS/GS Base instructions",
450 .dependencies = featureSet(&[_]Feature{}),
451 };
452 result[@enumToInt(Feature.fxsr)] = .{
453 .llvm_name = "fxsr",
454 .description = "Support fxsave/fxrestore instructions",
455 .dependencies = featureSet(&[_]Feature{}),
456 };
457 result[@enumToInt(Feature.gfni)] = .{
458 .llvm_name = "gfni",
459 .description = "Enable Galois Field Arithmetic Instructions",
460 .dependencies = featureSet(&[_]Feature{
461 .sse2,
462 }),
463 };
464 result[@enumToInt(Feature.idivl_to_divb)] = .{
465 .llvm_name = "idivl-to-divb",
466 .description = "Use 8-bit divide for positive values less than 256",
467 .dependencies = featureSet(&[_]Feature{}),
468 };
469 result[@enumToInt(Feature.idivq_to_divl)] = .{
470 .llvm_name = "idivq-to-divl",
471 .description = "Use 32-bit divide for positive values less than 2^32",
472 .dependencies = featureSet(&[_]Feature{}),
473 };
474 result[@enumToInt(Feature.invpcid)] = .{
475 .llvm_name = "invpcid",
476 .description = "Invalidate Process-Context Identifier",
477 .dependencies = featureSet(&[_]Feature{}),
478 };
479 result[@enumToInt(Feature.lea_sp)] = .{
480 .llvm_name = "lea-sp",
481 .description = "Use LEA for adjusting the stack pointer",
482 .dependencies = featureSet(&[_]Feature{}),
483 };
484 result[@enumToInt(Feature.lea_uses_ag)] = .{
485 .llvm_name = "lea-uses-ag",
486 .description = "LEA instruction needs inputs at AG stage",
487 .dependencies = featureSet(&[_]Feature{}),
488 };
489 result[@enumToInt(Feature.lwp)] = .{
490 .llvm_name = "lwp",
491 .description = "Enable LWP instructions",
492 .dependencies = featureSet(&[_]Feature{}),
493 };
494 result[@enumToInt(Feature.lzcnt)] = .{
495 .llvm_name = "lzcnt",
496 .description = "Support LZCNT instruction",
497 .dependencies = featureSet(&[_]Feature{}),
498 };
499 result[@enumToInt(Feature.macrofusion)] = .{
500 .llvm_name = "macrofusion",
501 .description = "Various instructions can be fused with conditional branches",
502 .dependencies = featureSet(&[_]Feature{}),
503 };
504 result[@enumToInt(Feature.merge_to_threeway_branch)] = .{
505 .llvm_name = "merge-to-threeway-branch",
506 .description = "Merge branches to a three-way conditional branch",
507 .dependencies = featureSet(&[_]Feature{}),
508 };
509 result[@enumToInt(Feature.mmx)] = .{
510 .llvm_name = "mmx",
511 .description = "Enable MMX instructions",
512 .dependencies = featureSet(&[_]Feature{}),
513 };
514 result[@enumToInt(Feature.movbe)] = .{
515 .llvm_name = "movbe",
516 .description = "Support MOVBE instruction",
517 .dependencies = featureSet(&[_]Feature{}),
518 };
519 result[@enumToInt(Feature.movdir64b)] = .{
520 .llvm_name = "movdir64b",
521 .description = "Support movdir64b instruction",
522 .dependencies = featureSet(&[_]Feature{}),
523 };
524 result[@enumToInt(Feature.movdiri)] = .{
525 .llvm_name = "movdiri",
526 .description = "Support movdiri instruction",
527 .dependencies = featureSet(&[_]Feature{}),
528 };
529 result[@enumToInt(Feature.mpx)] = .{
530 .llvm_name = "mpx",
531 .description = "Support MPX instructions",
532 .dependencies = featureSet(&[_]Feature{}),
533 };
534 result[@enumToInt(Feature.mwaitx)] = .{
535 .llvm_name = "mwaitx",
536 .description = "Enable MONITORX/MWAITX timer functionality",
537 .dependencies = featureSet(&[_]Feature{}),
538 };
539 result[@enumToInt(Feature.nopl)] = .{
540 .llvm_name = "nopl",
541 .description = "Enable NOPL instruction",
542 .dependencies = featureSet(&[_]Feature{}),
543 };
544 result[@enumToInt(Feature.pad_short_functions)] = .{
545 .llvm_name = "pad-short-functions",
546 .description = "Pad short functions",
547 .dependencies = featureSet(&[_]Feature{}),
548 };
549 result[@enumToInt(Feature.pclmul)] = .{
550 .llvm_name = "pclmul",
551 .description = "Enable packed carry-less multiplication instructions",
552 .dependencies = featureSet(&[_]Feature{
553 .sse2,
554 }),
555 };
556 result[@enumToInt(Feature.pconfig)] = .{
557 .llvm_name = "pconfig",
558 .description = "platform configuration instruction",
559 .dependencies = featureSet(&[_]Feature{}),
560 };
561 result[@enumToInt(Feature.pku)] = .{
562 .llvm_name = "pku",
563 .description = "Enable protection keys",
564 .dependencies = featureSet(&[_]Feature{}),
565 };
566 result[@enumToInt(Feature.popcnt)] = .{
567 .llvm_name = "popcnt",
568 .description = "Support POPCNT instruction",
569 .dependencies = featureSet(&[_]Feature{}),
570 };
571 result[@enumToInt(Feature.prefer_256_bit)] = .{
572 .llvm_name = "prefer-256-bit",
573 .description = "Prefer 256-bit AVX instructions",
574 .dependencies = featureSet(&[_]Feature{}),
575 };
576 result[@enumToInt(Feature.prefetchwt1)] = .{
577 .llvm_name = "prefetchwt1",
578 .description = "Prefetch with Intent to Write and T1 Hint",
579 .dependencies = featureSet(&[_]Feature{}),
580 };
581 result[@enumToInt(Feature.prfchw)] = .{
582 .llvm_name = "prfchw",
583 .description = "Support PRFCHW instructions",
584 .dependencies = featureSet(&[_]Feature{}),
585 };
586 result[@enumToInt(Feature.ptwrite)] = .{
587 .llvm_name = "ptwrite",
588 .description = "Support ptwrite instruction",
589 .dependencies = featureSet(&[_]Feature{}),
590 };
591 result[@enumToInt(Feature.rdpid)] = .{
592 .llvm_name = "rdpid",
593 .description = "Support RDPID instructions",
594 .dependencies = featureSet(&[_]Feature{}),
595 };
596 result[@enumToInt(Feature.rdrnd)] = .{
597 .llvm_name = "rdrnd",
598 .description = "Support RDRAND instruction",
599 .dependencies = featureSet(&[_]Feature{}),
600 };
601 result[@enumToInt(Feature.rdseed)] = .{
602 .llvm_name = "rdseed",
603 .description = "Support RDSEED instruction",
604 .dependencies = featureSet(&[_]Feature{}),
605 };
606 result[@enumToInt(Feature.retpoline)] = .{
607 .llvm_name = "retpoline",
608 .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
609 .dependencies = featureSet(&[_]Feature{
610 .retpoline_indirect_branches,
611 .retpoline_indirect_calls,
612 }),
613 };
614 result[@enumToInt(Feature.retpoline_external_thunk)] = .{
615 .llvm_name = "retpoline-external-thunk",
616 .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
617 .dependencies = featureSet(&[_]Feature{
618 .retpoline_indirect_calls,
619 }),
620 };
621 result[@enumToInt(Feature.retpoline_indirect_branches)] = .{
622 .llvm_name = "retpoline-indirect-branches",
623 .description = "Remove speculation of indirect branches from the generated code",
624 .dependencies = featureSet(&[_]Feature{}),
625 };
626 result[@enumToInt(Feature.retpoline_indirect_calls)] = .{
627 .llvm_name = "retpoline-indirect-calls",
628 .description = "Remove speculation of indirect calls from the generated code",
629 .dependencies = featureSet(&[_]Feature{}),
630 };
631 result[@enumToInt(Feature.rtm)] = .{
632 .llvm_name = "rtm",
633 .description = "Support RTM instructions",
634 .dependencies = featureSet(&[_]Feature{}),
635 };
636 result[@enumToInt(Feature.sahf)] = .{
637 .llvm_name = "sahf",
638 .description = "Support LAHF and SAHF instructions",
639 .dependencies = featureSet(&[_]Feature{}),
640 };
641 result[@enumToInt(Feature.sgx)] = .{
642 .llvm_name = "sgx",
643 .description = "Enable Software Guard Extensions",
644 .dependencies = featureSet(&[_]Feature{}),
645 };
646 result[@enumToInt(Feature.sha)] = .{
647 .llvm_name = "sha",
648 .description = "Enable SHA instructions",
649 .dependencies = featureSet(&[_]Feature{
650 .sse2,
651 }),
652 };
653 result[@enumToInt(Feature.shstk)] = .{
654 .llvm_name = "shstk",
655 .description = "Support CET Shadow-Stack instructions",
656 .dependencies = featureSet(&[_]Feature{}),
657 };
658 result[@enumToInt(Feature.slow_3ops_lea)] = .{
659 .llvm_name = "slow-3ops-lea",
660 .description = "LEA instruction with 3 ops or certain registers is slow",
661 .dependencies = featureSet(&[_]Feature{}),
662 };
663 result[@enumToInt(Feature.slow_incdec)] = .{
664 .llvm_name = "slow-incdec",
665 .description = "INC and DEC instructions are slower than ADD and SUB",
666 .dependencies = featureSet(&[_]Feature{}),
667 };
668 result[@enumToInt(Feature.slow_lea)] = .{
669 .llvm_name = "slow-lea",
670 .description = "LEA instruction with certain arguments is slow",
671 .dependencies = featureSet(&[_]Feature{}),
672 };
673 result[@enumToInt(Feature.slow_pmaddwd)] = .{
674 .llvm_name = "slow-pmaddwd",
675 .description = "PMADDWD is slower than PMULLD",
676 .dependencies = featureSet(&[_]Feature{}),
677 };
678 result[@enumToInt(Feature.slow_pmulld)] = .{
679 .llvm_name = "slow-pmulld",
680 .description = "PMULLD instruction is slow",
681 .dependencies = featureSet(&[_]Feature{}),
682 };
683 result[@enumToInt(Feature.slow_shld)] = .{
684 .llvm_name = "slow-shld",
685 .description = "SHLD instruction is slow",
686 .dependencies = featureSet(&[_]Feature{}),
687 };
688 result[@enumToInt(Feature.slow_two_mem_ops)] = .{
689 .llvm_name = "slow-two-mem-ops",
690 .description = "Two memory operand instructions are slow",
691 .dependencies = featureSet(&[_]Feature{}),
692 };
693 result[@enumToInt(Feature.slow_unaligned_mem_16)] = .{
694 .llvm_name = "slow-unaligned-mem-16",
695 .description = "Slow unaligned 16-byte memory access",
696 .dependencies = featureSet(&[_]Feature{}),
697 };
698 result[@enumToInt(Feature.slow_unaligned_mem_32)] = .{
699 .llvm_name = "slow-unaligned-mem-32",
700 .description = "Slow unaligned 32-byte memory access",
701 .dependencies = featureSet(&[_]Feature{}),
702 };
703 result[@enumToInt(Feature.soft_float)] = .{
704 .llvm_name = "soft-float",
705 .description = "Use software floating point features",
706 .dependencies = featureSet(&[_]Feature{}),
707 };
708 result[@enumToInt(Feature.sse)] = .{
709 .llvm_name = "sse",
710 .description = "Enable SSE instructions",
711 .dependencies = featureSet(&[_]Feature{}),
712 };
713 result[@enumToInt(Feature.sse_unaligned_mem)] = .{
714 .llvm_name = "sse-unaligned-mem",
715 .description = "Allow unaligned memory operands with SSE instructions",
716 .dependencies = featureSet(&[_]Feature{}),
717 };
718 result[@enumToInt(Feature.sse2)] = .{
719 .llvm_name = "sse2",
720 .description = "Enable SSE2 instructions",
721 .dependencies = featureSet(&[_]Feature{
722 .sse,
723 }),
724 };
725 result[@enumToInt(Feature.sse3)] = .{
726 .llvm_name = "sse3",
727 .description = "Enable SSE3 instructions",
728 .dependencies = featureSet(&[_]Feature{
729 .sse2,
730 }),
731 };
732 result[@enumToInt(Feature.sse4_1)] = .{
733 .llvm_name = "sse4.1",
734 .description = "Enable SSE 4.1 instructions",
735 .dependencies = featureSet(&[_]Feature{
736 .ssse3,
737 }),
738 };
739 result[@enumToInt(Feature.sse4_2)] = .{
740 .llvm_name = "sse4.2",
741 .description = "Enable SSE 4.2 instructions",
742 .dependencies = featureSet(&[_]Feature{
743 .sse4_1,
744 }),
745 };
746 result[@enumToInt(Feature.sse4a)] = .{
747 .llvm_name = "sse4a",
748 .description = "Support SSE 4a instructions",
749 .dependencies = featureSet(&[_]Feature{
750 .sse3,
751 }),
752 };
753 result[@enumToInt(Feature.ssse3)] = .{
754 .llvm_name = "ssse3",
755 .description = "Enable SSSE3 instructions",
756 .dependencies = featureSet(&[_]Feature{
757 .sse3,
758 }),
759 };
760 result[@enumToInt(Feature.tbm)] = .{
761 .llvm_name = "tbm",
762 .description = "Enable TBM instructions",
763 .dependencies = featureSet(&[_]Feature{}),
764 };
765 result[@enumToInt(Feature.vaes)] = .{
766 .llvm_name = "vaes",
767 .description = "Promote selected AES instructions to AVX512/AVX registers",
768 .dependencies = featureSet(&[_]Feature{
769 .aes,
770 .avx,
771 }),
772 };
773 result[@enumToInt(Feature.vpclmulqdq)] = .{
774 .llvm_name = "vpclmulqdq",
775 .description = "Enable vpclmulqdq instructions",
776 .dependencies = featureSet(&[_]Feature{
777 .avx,
778 .pclmul,
779 }),
780 };
781 result[@enumToInt(Feature.waitpkg)] = .{
782 .llvm_name = "waitpkg",
783 .description = "Wait and pause enhancements",
784 .dependencies = featureSet(&[_]Feature{}),
785 };
786 result[@enumToInt(Feature.wbnoinvd)] = .{
787 .llvm_name = "wbnoinvd",
788 .description = "Write Back No Invalidate",
789 .dependencies = featureSet(&[_]Feature{}),
790 };
791 result[@enumToInt(Feature.x87)] = .{
792 .llvm_name = "x87",
793 .description = "Enable X87 float instructions",
794 .dependencies = featureSet(&[_]Feature{}),
795 };
796 result[@enumToInt(Feature.xop)] = .{
797 .llvm_name = "xop",
798 .description = "Enable XOP instructions",
799 .dependencies = featureSet(&[_]Feature{
800 .fma4,
801 }),
802 };
803 result[@enumToInt(Feature.xsave)] = .{
804 .llvm_name = "xsave",
805 .description = "Support xsave instructions",
806 .dependencies = featureSet(&[_]Feature{}),
807 };
808 result[@enumToInt(Feature.xsavec)] = .{
809 .llvm_name = "xsavec",
810 .description = "Support xsavec instructions",
811 .dependencies = featureSet(&[_]Feature{}),
812 };
813 result[@enumToInt(Feature.xsaveopt)] = .{
814 .llvm_name = "xsaveopt",
815 .description = "Support xsaveopt instructions",
816 .dependencies = featureSet(&[_]Feature{}),
817 };
818 result[@enumToInt(Feature.xsaves)] = .{
819 .llvm_name = "xsaves",
820 .description = "Support xsaves instructions",
821 .dependencies = featureSet(&[_]Feature{}),
822 };
823 const ti = @typeInfo(Feature);
824 for (result) |*elem, i| {
825 elem.index = i;
826 elem.name = ti.Enum.fields[i].name;
827 }
828 break :blk result;
829};
830
831pub const cpu = struct {
832 pub const amdfam10 = Cpu{
833 .name = "amdfam10",
834 .llvm_name = "amdfam10",
835 .features = featureSet(&[_]Feature{
836 .@"3dnowa",
837 .@"64bit",
838 .cmov,
839 .cx16,
840 .cx8,
841 .fast_scalar_shift_masks,
842 .fxsr,
843 .lzcnt,
844 .nopl,
845 .popcnt,
846 .sahf,
847 .slow_shld,
848 .sse4a,
849 .x87,
850 }),
851 };
852 pub const athlon = Cpu{
853 .name = "athlon",
854 .llvm_name = "athlon",
855 .features = featureSet(&[_]Feature{
856 .@"3dnowa",
857 .cmov,
858 .cx8,
859 .nopl,
860 .slow_shld,
861 .slow_unaligned_mem_16,
862 .x87,
863 }),
864 };
865 pub const athlon_4 = Cpu{
866 .name = "athlon_4",
867 .llvm_name = "athlon-4",
868 .features = featureSet(&[_]Feature{
869 .@"3dnowa",
870 .cmov,
871 .cx8,
872 .fxsr,
873 .nopl,
874 .slow_shld,
875 .slow_unaligned_mem_16,
876 .sse,
877 .x87,
878 }),
879 };
880 pub const athlon_fx = Cpu{
881 .name = "athlon_fx",
882 .llvm_name = "athlon-fx",
883 .features = featureSet(&[_]Feature{
884 .@"3dnowa",
885 .@"64bit",
886 .cmov,
887 .cx8,
888 .fast_scalar_shift_masks,
889 .fxsr,
890 .nopl,
891 .slow_shld,
892 .slow_unaligned_mem_16,
893 .sse2,
894 .x87,
895 }),
896 };
897 pub const athlon_mp = Cpu{
898 .name = "athlon_mp",
899 .llvm_name = "athlon-mp",
900 .features = featureSet(&[_]Feature{
901 .@"3dnowa",
902 .cmov,
903 .cx8,
904 .fxsr,
905 .nopl,
906 .slow_shld,
907 .slow_unaligned_mem_16,
908 .sse,
909 .x87,
910 }),
911 };
912 pub const athlon_tbird = Cpu{
913 .name = "athlon_tbird",
914 .llvm_name = "athlon-tbird",
915 .features = featureSet(&[_]Feature{
916 .@"3dnowa",
917 .cmov,
918 .cx8,
919 .nopl,
920 .slow_shld,
921 .slow_unaligned_mem_16,
922 .x87,
923 }),
924 };
925 pub const athlon_xp = Cpu{
926 .name = "athlon_xp",
927 .llvm_name = "athlon-xp",
928 .features = featureSet(&[_]Feature{
929 .@"3dnowa",
930 .cmov,
931 .cx8,
932 .fxsr,
933 .nopl,
934 .slow_shld,
935 .slow_unaligned_mem_16,
936 .sse,
937 .x87,
938 }),
939 };
940 pub const athlon64 = Cpu{
941 .name = "athlon64",
942 .llvm_name = "athlon64",
943 .features = featureSet(&[_]Feature{
944 .@"3dnowa",
945 .@"64bit",
946 .cmov,
947 .cx8,
948 .fast_scalar_shift_masks,
949 .fxsr,
950 .nopl,
951 .slow_shld,
952 .slow_unaligned_mem_16,
953 .sse2,
954 .x87,
955 }),
956 };
957 pub const athlon64_sse3 = Cpu{
958 .name = "athlon64_sse3",
959 .llvm_name = "athlon64-sse3",
960 .features = featureSet(&[_]Feature{
961 .@"3dnowa",
962 .@"64bit",
963 .cmov,
964 .cx16,
965 .cx8,
966 .fast_scalar_shift_masks,
967 .fxsr,
968 .nopl,
969 .slow_shld,
970 .slow_unaligned_mem_16,
971 .sse3,
972 .x87,
973 }),
974 };
975 pub const atom = Cpu{
976 .name = "atom",
977 .llvm_name = "atom",
978 .features = featureSet(&[_]Feature{
979 .@"64bit",
980 .cmov,
981 .cx16,
982 .cx8,
983 .fxsr,
984 .idivl_to_divb,
985 .idivq_to_divl,
986 .lea_sp,
987 .lea_uses_ag,
988 .mmx,
989 .movbe,
990 .nopl,
991 .pad_short_functions,
992 .sahf,
993 .slow_two_mem_ops,
994 .slow_unaligned_mem_16,
995 .ssse3,
996 .x87,
997 }),
998 };
999 pub const barcelona = Cpu{
1000 .name = "barcelona",
1001 .llvm_name = "barcelona",
1002 .features = featureSet(&[_]Feature{
1003 .@"3dnowa",
1004 .@"64bit",
1005 .cmov,
1006 .cx16,
1007 .cx8,
1008 .fast_scalar_shift_masks,
1009 .fxsr,
1010 .lzcnt,
1011 .nopl,
1012 .popcnt,
1013 .sahf,
1014 .slow_shld,
1015 .sse4a,
1016 .x87,
1017 }),
1018 };
1019 pub const bdver1 = Cpu{
1020 .name = "bdver1",
1021 .llvm_name = "bdver1",
1022 .features = featureSet(&[_]Feature{
1023 .@"64bit",
1024 .aes,
1025 .branchfusion,
1026 .cmov,
1027 .cx16,
1028 .cx8,
1029 .fast_11bytenop,
1030 .fast_scalar_shift_masks,
1031 .fxsr,
1032 .lwp,
1033 .lzcnt,
1034 .mmx,
1035 .nopl,
1036 .pclmul,
1037 .popcnt,
1038 .prfchw,
1039 .sahf,
1040 .slow_shld,
1041 .x87,
1042 .xop,
1043 .xsave,
1044 }),
1045 };
1046 pub const bdver2 = Cpu{
1047 .name = "bdver2",
1048 .llvm_name = "bdver2",
1049 .features = featureSet(&[_]Feature{
1050 .@"64bit",
1051 .aes,
1052 .bmi,
1053 .branchfusion,
1054 .cmov,
1055 .cx16,
1056 .cx8,
1057 .f16c,
1058 .fast_11bytenop,
1059 .fast_bextr,
1060 .fast_scalar_shift_masks,
1061 .fma,
1062 .fxsr,
1063 .lwp,
1064 .lzcnt,
1065 .mmx,
1066 .nopl,
1067 .pclmul,
1068 .popcnt,
1069 .prfchw,
1070 .sahf,
1071 .slow_shld,
1072 .tbm,
1073 .x87,
1074 .xop,
1075 .xsave,
1076 }),
1077 };
1078 pub const bdver3 = Cpu{
1079 .name = "bdver3",
1080 .llvm_name = "bdver3",
1081 .features = featureSet(&[_]Feature{
1082 .@"64bit",
1083 .aes,
1084 .bmi,
1085 .branchfusion,
1086 .cmov,
1087 .cx16,
1088 .cx8,
1089 .f16c,
1090 .fast_11bytenop,
1091 .fast_bextr,
1092 .fast_scalar_shift_masks,
1093 .fma,
1094 .fsgsbase,
1095 .fxsr,
1096 .lwp,
1097 .lzcnt,
1098 .mmx,
1099 .nopl,
1100 .pclmul,
1101 .popcnt,
1102 .prfchw,
1103 .sahf,
1104 .slow_shld,
1105 .tbm,
1106 .x87,
1107 .xop,
1108 .xsave,
1109 .xsaveopt,
1110 }),
1111 };
1112 pub const bdver4 = Cpu{
1113 .name = "bdver4",
1114 .llvm_name = "bdver4",
1115 .features = featureSet(&[_]Feature{
1116 .@"64bit",
1117 .aes,
1118 .avx2,
1119 .bmi,
1120 .bmi2,
1121 .branchfusion,
1122 .cmov,
1123 .cx16,
1124 .cx8,
1125 .f16c,
1126 .fast_11bytenop,
1127 .fast_bextr,
1128 .fast_scalar_shift_masks,
1129 .fma,
1130 .fsgsbase,
1131 .fxsr,
1132 .lwp,
1133 .lzcnt,
1134 .mmx,
1135 .mwaitx,
1136 .nopl,
1137 .pclmul,
1138 .popcnt,
1139 .prfchw,
1140 .sahf,
1141 .slow_shld,
1142 .tbm,
1143 .x87,
1144 .xop,
1145 .xsave,
1146 .xsaveopt,
1147 }),
1148 };
1149 pub const bonnell = Cpu{
1150 .name = "bonnell",
1151 .llvm_name = "bonnell",
1152 .features = featureSet(&[_]Feature{
1153 .@"64bit",
1154 .cmov,
1155 .cx16,
1156 .cx8,
1157 .fxsr,
1158 .idivl_to_divb,
1159 .idivq_to_divl,
1160 .lea_sp,
1161 .lea_uses_ag,
1162 .mmx,
1163 .movbe,
1164 .nopl,
1165 .pad_short_functions,
1166 .sahf,
1167 .slow_two_mem_ops,
1168 .slow_unaligned_mem_16,
1169 .ssse3,
1170 .x87,
1171 }),
1172 };
1173 pub const broadwell = Cpu{
1174 .name = "broadwell",
1175 .llvm_name = "broadwell",
1176 .features = featureSet(&[_]Feature{
1177 .@"64bit",
1178 .adx,
1179 .avx,
1180 .avx2,
1181 .bmi,
1182 .bmi2,
1183 .cmov,
1184 .cx16,
1185 .cx8,
1186 .ermsb,
1187 .f16c,
1188 .false_deps_lzcnt_tzcnt,
1189 .false_deps_popcnt,
1190 .fast_scalar_fsqrt,
1191 .fast_shld_rotate,
1192 .fast_variable_shuffle,
1193 .fma,
1194 .fsgsbase,
1195 .fxsr,
1196 .idivq_to_divl,
1197 .invpcid,
1198 .lzcnt,
1199 .macrofusion,
1200 .merge_to_threeway_branch,
1201 .mmx,
1202 .movbe,
1203 .nopl,
1204 .pclmul,
1205 .popcnt,
1206 .prfchw,
1207 .rdrnd,
1208 .rdseed,
1209 .sahf,
1210 .slow_3ops_lea,
1211 .sse4_2,
1212 .x87,
1213 .xsave,
1214 .xsaveopt,
1215 }),
1216 };
1217 pub const btver1 = Cpu{
1218 .name = "btver1",
1219 .llvm_name = "btver1",
1220 .features = featureSet(&[_]Feature{
1221 .@"64bit",
1222 .cmov,
1223 .cx16,
1224 .cx8,
1225 .fast_15bytenop,
1226 .fast_scalar_shift_masks,
1227 .fast_vector_shift_masks,
1228 .fxsr,
1229 .lzcnt,
1230 .mmx,
1231 .nopl,
1232 .popcnt,
1233 .prfchw,
1234 .sahf,
1235 .slow_shld,
1236 .sse4a,
1237 .ssse3,
1238 .x87,
1239 }),
1240 };
1241 pub const btver2 = Cpu{
1242 .name = "btver2",
1243 .llvm_name = "btver2",
1244 .features = featureSet(&[_]Feature{
1245 .@"64bit",
1246 .aes,
1247 .avx,
1248 .bmi,
1249 .cmov,
1250 .cx16,
1251 .cx8,
1252 .f16c,
1253 .fast_15bytenop,
1254 .fast_bextr,
1255 .fast_hops,
1256 .fast_lzcnt,
1257 .fast_partial_ymm_or_zmm_write,
1258 .fast_scalar_shift_masks,
1259 .fast_vector_shift_masks,
1260 .fxsr,
1261 .lzcnt,
1262 .mmx,
1263 .movbe,
1264 .nopl,
1265 .pclmul,
1266 .popcnt,
1267 .prfchw,
1268 .sahf,
1269 .slow_shld,
1270 .sse4a,
1271 .ssse3,
1272 .x87,
1273 .xsave,
1274 .xsaveopt,
1275 }),
1276 };
1277 pub const c3 = Cpu{
1278 .name = "c3",
1279 .llvm_name = "c3",
1280 .features = featureSet(&[_]Feature{
1281 .@"3dnow",
1282 .slow_unaligned_mem_16,
1283 .x87,
1284 }),
1285 };
1286 pub const c3_2 = Cpu{
1287 .name = "c3_2",
1288 .llvm_name = "c3-2",
1289 .features = featureSet(&[_]Feature{
1290 .cmov,
1291 .cx8,
1292 .fxsr,
1293 .mmx,
1294 .slow_unaligned_mem_16,
1295 .sse,
1296 .x87,
1297 }),
1298 };
1299 pub const cannonlake = Cpu{
1300 .name = "cannonlake",
1301 .llvm_name = "cannonlake",
1302 .features = featureSet(&[_]Feature{
1303 .@"64bit",
1304 .adx,
1305 .aes,
1306 .avx,
1307 .avx2,
1308 .avx512bw,
1309 .avx512cd,
1310 .avx512dq,
1311 .avx512f,
1312 .avx512ifma,
1313 .avx512vbmi,
1314 .avx512vl,
1315 .bmi,
1316 .bmi2,
1317 .clflushopt,
1318 .cmov,
1319 .cx16,
1320 .cx8,
1321 .ermsb,
1322 .f16c,
1323 .fast_gather,
1324 .fast_scalar_fsqrt,
1325 .fast_shld_rotate,
1326 .fast_variable_shuffle,
1327 .fast_vector_fsqrt,
1328 .fma,
1329 .fsgsbase,
1330 .fxsr,
1331 .idivq_to_divl,
1332 .invpcid,
1333 .lzcnt,
1334 .macrofusion,
1335 .merge_to_threeway_branch,
1336 .mmx,
1337 .movbe,
1338 .mpx,
1339 .nopl,
1340 .pclmul,
1341 .pku,
1342 .popcnt,
1343 .prfchw,
1344 .rdrnd,
1345 .rdseed,
1346 .sahf,
1347 .sgx,
1348 .sha,
1349 .slow_3ops_lea,
1350 .sse4_2,
1351 .x87,
1352 .xsave,
1353 .xsavec,
1354 .xsaveopt,
1355 .xsaves,
1356 }),
1357 };
1358 pub const cascadelake = Cpu{
1359 .name = "cascadelake",
1360 .llvm_name = "cascadelake",
1361 .features = featureSet(&[_]Feature{
1362 .@"64bit",
1363 .adx,
1364 .aes,
1365 .avx,
1366 .avx2,
1367 .avx512bw,
1368 .avx512cd,
1369 .avx512dq,
1370 .avx512f,
1371 .avx512vl,
1372 .avx512vnni,
1373 .bmi,
1374 .bmi2,
1375 .clflushopt,
1376 .clwb,
1377 .cmov,
1378 .cx16,
1379 .cx8,
1380 .ermsb,
1381 .f16c,
1382 .false_deps_popcnt,
1383 .fast_gather,
1384 .fast_scalar_fsqrt,
1385 .fast_shld_rotate,
1386 .fast_variable_shuffle,
1387 .fast_vector_fsqrt,
1388 .fma,
1389 .fsgsbase,
1390 .fxsr,
1391 .idivq_to_divl,
1392 .invpcid,
1393 .lzcnt,
1394 .macrofusion,
1395 .merge_to_threeway_branch,
1396 .mmx,
1397 .movbe,
1398 .mpx,
1399 .nopl,
1400 .pclmul,
1401 .pku,
1402 .popcnt,
1403 .prfchw,
1404 .rdrnd,
1405 .rdseed,
1406 .sahf,
1407 .slow_3ops_lea,
1408 .sse4_2,
1409 .x87,
1410 .xsave,
1411 .xsavec,
1412 .xsaveopt,
1413 .xsaves,
1414 }),
1415 };
1416 pub const cooperlake = Cpu{
1417 .name = "cooperlake",
1418 .llvm_name = "cooperlake",
1419 .features = featureSet(&[_]Feature{
1420 .@"64bit",
1421 .adx,
1422 .aes,
1423 .avx,
1424 .avx2,
1425 .avx512bf16,
1426 .avx512bw,
1427 .avx512cd,
1428 .avx512dq,
1429 .avx512f,
1430 .avx512vl,
1431 .avx512vnni,
1432 .bmi,
1433 .bmi2,
1434 .clflushopt,
1435 .clwb,
1436 .cmov,
1437 .cx16,
1438 .cx8,
1439 .ermsb,
1440 .f16c,
1441 .false_deps_popcnt,
1442 .fast_gather,
1443 .fast_scalar_fsqrt,
1444 .fast_shld_rotate,
1445 .fast_variable_shuffle,
1446 .fast_vector_fsqrt,
1447 .fma,
1448 .fsgsbase,
1449 .fxsr,
1450 .idivq_to_divl,
1451 .invpcid,
1452 .lzcnt,
1453 .macrofusion,
1454 .merge_to_threeway_branch,
1455 .mmx,
1456 .movbe,
1457 .mpx,
1458 .nopl,
1459 .pclmul,
1460 .pku,
1461 .popcnt,
1462 .prfchw,
1463 .rdrnd,
1464 .rdseed,
1465 .sahf,
1466 .slow_3ops_lea,
1467 .sse4_2,
1468 .x87,
1469 .xsave,
1470 .xsavec,
1471 .xsaveopt,
1472 .xsaves,
1473 }),
1474 };
1475 pub const core_avx_i = Cpu{
1476 .name = "core_avx_i",
1477 .llvm_name = "core-avx-i",
1478 .features = featureSet(&[_]Feature{
1479 .@"64bit",
1480 .avx,
1481 .cmov,
1482 .cx16,
1483 .cx8,
1484 .f16c,
1485 .false_deps_popcnt,
1486 .fast_scalar_fsqrt,
1487 .fast_shld_rotate,
1488 .fsgsbase,
1489 .fxsr,
1490 .idivq_to_divl,
1491 .macrofusion,
1492 .merge_to_threeway_branch,
1493 .mmx,
1494 .nopl,
1495 .pclmul,
1496 .popcnt,
1497 .rdrnd,
1498 .sahf,
1499 .slow_3ops_lea,
1500 .slow_unaligned_mem_32,
1501 .sse4_2,
1502 .x87,
1503 .xsave,
1504 .xsaveopt,
1505 }),
1506 };
1507 pub const core_avx2 = Cpu{
1508 .name = "core_avx2",
1509 .llvm_name = "core-avx2",
1510 .features = featureSet(&[_]Feature{
1511 .@"64bit",
1512 .avx,
1513 .avx2,
1514 .bmi,
1515 .bmi2,
1516 .cmov,
1517 .cx16,
1518 .cx8,
1519 .ermsb,
1520 .f16c,
1521 .false_deps_lzcnt_tzcnt,
1522 .false_deps_popcnt,
1523 .fast_scalar_fsqrt,
1524 .fast_shld_rotate,
1525 .fast_variable_shuffle,
1526 .fma,
1527 .fsgsbase,
1528 .fxsr,
1529 .idivq_to_divl,
1530 .invpcid,
1531 .lzcnt,
1532 .macrofusion,
1533 .merge_to_threeway_branch,
1534 .mmx,
1535 .movbe,
1536 .nopl,
1537 .pclmul,
1538 .popcnt,
1539 .rdrnd,
1540 .sahf,
1541 .slow_3ops_lea,
1542 .sse4_2,
1543 .x87,
1544 .xsave,
1545 .xsaveopt,
1546 }),
1547 };
1548 pub const core2 = Cpu{
1549 .name = "core2",
1550 .llvm_name = "core2",
1551 .features = featureSet(&[_]Feature{
1552 .@"64bit",
1553 .cmov,
1554 .cx16,
1555 .cx8,
1556 .fxsr,
1557 .macrofusion,
1558 .mmx,
1559 .nopl,
1560 .sahf,
1561 .slow_unaligned_mem_16,
1562 .ssse3,
1563 .x87,
1564 }),
1565 };
1566 pub const corei7 = Cpu{
1567 .name = "corei7",
1568 .llvm_name = "corei7",
1569 .features = featureSet(&[_]Feature{
1570 .@"64bit",
1571 .cmov,
1572 .cx16,
1573 .cx8,
1574 .fxsr,
1575 .macrofusion,
1576 .mmx,
1577 .nopl,
1578 .popcnt,
1579 .sahf,
1580 .sse4_2,
1581 .x87,
1582 }),
1583 };
1584 pub const corei7_avx = Cpu{
1585 .name = "corei7_avx",
1586 .llvm_name = "corei7-avx",
1587 .features = featureSet(&[_]Feature{
1588 .@"64bit",
1589 .avx,
1590 .cmov,
1591 .cx16,
1592 .cx8,
1593 .false_deps_popcnt,
1594 .fast_scalar_fsqrt,
1595 .fast_shld_rotate,
1596 .fxsr,
1597 .idivq_to_divl,
1598 .macrofusion,
1599 .merge_to_threeway_branch,
1600 .mmx,
1601 .nopl,
1602 .pclmul,
1603 .popcnt,
1604 .sahf,
1605 .slow_3ops_lea,
1606 .slow_unaligned_mem_32,
1607 .sse4_2,
1608 .x87,
1609 .xsave,
1610 .xsaveopt,
1611 }),
1612 };
1613 pub const generic = Cpu{
1614 .name = "generic",
1615 .llvm_name = "generic",
1616 .features = featureSet(&[_]Feature{
1617 .cx8,
1618 .slow_unaligned_mem_16,
1619 .x87,
1620 }),
1621 };
1622 pub const geode = Cpu{
1623 .name = "geode",
1624 .llvm_name = "geode",
1625 .features = featureSet(&[_]Feature{
1626 .@"3dnowa",
1627 .cx8,
1628 .slow_unaligned_mem_16,
1629 .x87,
1630 }),
1631 };
1632 pub const goldmont = Cpu{
1633 .name = "goldmont",
1634 .llvm_name = "goldmont",
1635 .features = featureSet(&[_]Feature{
1636 .@"64bit",
1637 .aes,
1638 .clflushopt,
1639 .cmov,
1640 .cx16,
1641 .cx8,
1642 .false_deps_popcnt,
1643 .fsgsbase,
1644 .fxsr,
1645 .mmx,
1646 .movbe,
1647 .mpx,
1648 .nopl,
1649 .pclmul,
1650 .popcnt,
1651 .prfchw,
1652 .rdrnd,
1653 .rdseed,
1654 .sahf,
1655 .sha,
1656 .slow_incdec,
1657 .slow_lea,
1658 .slow_two_mem_ops,
1659 .sse4_2,
1660 .ssse3,
1661 .x87,
1662 .xsave,
1663 .xsavec,
1664 .xsaveopt,
1665 .xsaves,
1666 }),
1667 };
1668 pub const goldmont_plus = Cpu{
1669 .name = "goldmont_plus",
1670 .llvm_name = "goldmont-plus",
1671 .features = featureSet(&[_]Feature{
1672 .@"64bit",
1673 .aes,
1674 .clflushopt,
1675 .cmov,
1676 .cx16,
1677 .cx8,
1678 .fsgsbase,
1679 .fxsr,
1680 .mmx,
1681 .movbe,
1682 .mpx,
1683 .nopl,
1684 .pclmul,
1685 .popcnt,
1686 .prfchw,
1687 .ptwrite,
1688 .rdpid,
1689 .rdrnd,
1690 .rdseed,
1691 .sahf,
1692 .sgx,
1693 .sha,
1694 .slow_incdec,
1695 .slow_lea,
1696 .slow_two_mem_ops,
1697 .sse4_2,
1698 .ssse3,
1699 .x87,
1700 .xsave,
1701 .xsavec,
1702 .xsaveopt,
1703 .xsaves,
1704 }),
1705 };
1706 pub const haswell = Cpu{
1707 .name = "haswell",
1708 .llvm_name = "haswell",
1709 .features = featureSet(&[_]Feature{
1710 .@"64bit",
1711 .avx,
1712 .avx2,
1713 .bmi,
1714 .bmi2,
1715 .cmov,
1716 .cx16,
1717 .cx8,
1718 .ermsb,
1719 .f16c,
1720 .false_deps_lzcnt_tzcnt,
1721 .false_deps_popcnt,
1722 .fast_scalar_fsqrt,
1723 .fast_shld_rotate,
1724 .fast_variable_shuffle,
1725 .fma,
1726 .fsgsbase,
1727 .fxsr,
1728 .idivq_to_divl,
1729 .invpcid,
1730 .lzcnt,
1731 .macrofusion,
1732 .merge_to_threeway_branch,
1733 .mmx,
1734 .movbe,
1735 .nopl,
1736 .pclmul,
1737 .popcnt,
1738 .rdrnd,
1739 .sahf,
1740 .slow_3ops_lea,
1741 .sse4_2,
1742 .x87,
1743 .xsave,
1744 .xsaveopt,
1745 }),
1746 };
1747 pub const _i386 = Cpu{
1748 .name = "_i386",
1749 .llvm_name = "i386",
1750 .features = featureSet(&[_]Feature{
1751 .slow_unaligned_mem_16,
1752 .x87,
1753 }),
1754 };
1755 pub const _i486 = Cpu{
1756 .name = "_i486",
1757 .llvm_name = "i486",
1758 .features = featureSet(&[_]Feature{
1759 .slow_unaligned_mem_16,
1760 .x87,
1761 }),
1762 };
1763 pub const _i586 = Cpu{
1764 .name = "_i586",
1765 .llvm_name = "i586",
1766 .features = featureSet(&[_]Feature{
1767 .cx8,
1768 .slow_unaligned_mem_16,
1769 .x87,
1770 }),
1771 };
1772 pub const _i686 = Cpu{
1773 .name = "_i686",
1774 .llvm_name = "i686",
1775 .features = featureSet(&[_]Feature{
1776 .cmov,
1777 .cx8,
1778 .slow_unaligned_mem_16,
1779 .x87,
1780 }),
1781 };
1782 pub const icelake_client = Cpu{
1783 .name = "icelake_client",
1784 .llvm_name = "icelake-client",
1785 .features = featureSet(&[_]Feature{
1786 .@"64bit",
1787 .adx,
1788 .aes,
1789 .avx,
1790 .avx2,
1791 .avx512bitalg,
1792 .avx512bw,
1793 .avx512cd,
1794 .avx512dq,
1795 .avx512f,
1796 .avx512ifma,
1797 .avx512vbmi,
1798 .avx512vbmi2,
1799 .avx512vl,
1800 .avx512vnni,
1801 .avx512vpopcntdq,
1802 .bmi,
1803 .bmi2,
1804 .clflushopt,
1805 .clwb,
1806 .cmov,
1807 .cx16,
1808 .cx8,
1809 .ermsb,
1810 .f16c,
1811 .fast_gather,
1812 .fast_scalar_fsqrt,
1813 .fast_shld_rotate,
1814 .fast_variable_shuffle,
1815 .fast_vector_fsqrt,
1816 .fma,
1817 .fsgsbase,
1818 .fxsr,
1819 .gfni,
1820 .idivq_to_divl,
1821 .invpcid,
1822 .lzcnt,
1823 .macrofusion,
1824 .merge_to_threeway_branch,
1825 .mmx,
1826 .movbe,
1827 .mpx,
1828 .nopl,
1829 .pclmul,
1830 .pku,
1831 .popcnt,
1832 .prfchw,
1833 .rdpid,
1834 .rdrnd,
1835 .rdseed,
1836 .sahf,
1837 .sgx,
1838 .sha,
1839 .slow_3ops_lea,
1840 .sse4_2,
1841 .vaes,
1842 .vpclmulqdq,
1843 .x87,
1844 .xsave,
1845 .xsavec,
1846 .xsaveopt,
1847 .xsaves,
1848 }),
1849 };
1850 pub const icelake_server = Cpu{
1851 .name = "icelake_server",
1852 .llvm_name = "icelake-server",
1853 .features = featureSet(&[_]Feature{
1854 .@"64bit",
1855 .adx,
1856 .aes,
1857 .avx,
1858 .avx2,
1859 .avx512bitalg,
1860 .avx512bw,
1861 .avx512cd,
1862 .avx512dq,
1863 .avx512f,
1864 .avx512ifma,
1865 .avx512vbmi,
1866 .avx512vbmi2,
1867 .avx512vl,
1868 .avx512vnni,
1869 .avx512vpopcntdq,
1870 .bmi,
1871 .bmi2,
1872 .clflushopt,
1873 .clwb,
1874 .cmov,
1875 .cx16,
1876 .cx8,
1877 .ermsb,
1878 .f16c,
1879 .fast_gather,
1880 .fast_scalar_fsqrt,
1881 .fast_shld_rotate,
1882 .fast_variable_shuffle,
1883 .fast_vector_fsqrt,
1884 .fma,
1885 .fsgsbase,
1886 .fxsr,
1887 .gfni,
1888 .idivq_to_divl,
1889 .invpcid,
1890 .lzcnt,
1891 .macrofusion,
1892 .merge_to_threeway_branch,
1893 .mmx,
1894 .movbe,
1895 .mpx,
1896 .nopl,
1897 .pclmul,
1898 .pconfig,
1899 .pku,
1900 .popcnt,
1901 .prfchw,
1902 .rdpid,
1903 .rdrnd,
1904 .rdseed,
1905 .sahf,
1906 .sgx,
1907 .sha,
1908 .slow_3ops_lea,
1909 .sse4_2,
1910 .vaes,
1911 .vpclmulqdq,
1912 .wbnoinvd,
1913 .x87,
1914 .xsave,
1915 .xsavec,
1916 .xsaveopt,
1917 .xsaves,
1918 }),
1919 };
1920 pub const ivybridge = Cpu{
1921 .name = "ivybridge",
1922 .llvm_name = "ivybridge",
1923 .features = featureSet(&[_]Feature{
1924 .@"64bit",
1925 .avx,
1926 .cmov,
1927 .cx16,
1928 .cx8,
1929 .f16c,
1930 .false_deps_popcnt,
1931 .fast_scalar_fsqrt,
1932 .fast_shld_rotate,
1933 .fsgsbase,
1934 .fxsr,
1935 .idivq_to_divl,
1936 .macrofusion,
1937 .merge_to_threeway_branch,
1938 .mmx,
1939 .nopl,
1940 .pclmul,
1941 .popcnt,
1942 .rdrnd,
1943 .sahf,
1944 .slow_3ops_lea,
1945 .slow_unaligned_mem_32,
1946 .sse4_2,
1947 .x87,
1948 .xsave,
1949 .xsaveopt,
1950 }),
1951 };
1952 pub const k6 = Cpu{
1953 .name = "k6",
1954 .llvm_name = "k6",
1955 .features = featureSet(&[_]Feature{
1956 .cx8,
1957 .mmx,
1958 .slow_unaligned_mem_16,
1959 .x87,
1960 }),
1961 };
1962 pub const k6_2 = Cpu{
1963 .name = "k6_2",
1964 .llvm_name = "k6-2",
1965 .features = featureSet(&[_]Feature{
1966 .@"3dnow",
1967 .cx8,
1968 .slow_unaligned_mem_16,
1969 .x87,
1970 }),
1971 };
1972 pub const k6_3 = Cpu{
1973 .name = "k6_3",
1974 .llvm_name = "k6-3",
1975 .features = featureSet(&[_]Feature{
1976 .@"3dnow",
1977 .cx8,
1978 .slow_unaligned_mem_16,
1979 .x87,
1980 }),
1981 };
1982 pub const k8 = Cpu{
1983 .name = "k8",
1984 .llvm_name = "k8",
1985 .features = featureSet(&[_]Feature{
1986 .@"3dnowa",
1987 .@"64bit",
1988 .cmov,
1989 .cx8,
1990 .fast_scalar_shift_masks,
1991 .fxsr,
1992 .nopl,
1993 .slow_shld,
1994 .slow_unaligned_mem_16,
1995 .sse2,
1996 .x87,
1997 }),
1998 };
1999 pub const k8_sse3 = Cpu{
2000 .name = "k8_sse3",
2001 .llvm_name = "k8-sse3",
2002 .features = featureSet(&[_]Feature{
2003 .@"3dnowa",
2004 .@"64bit",
2005 .cmov,
2006 .cx16,
2007 .cx8,
2008 .fast_scalar_shift_masks,
2009 .fxsr,
2010 .nopl,
2011 .slow_shld,
2012 .slow_unaligned_mem_16,
2013 .sse3,
2014 .x87,
2015 }),
2016 };
2017 pub const knl = Cpu{
2018 .name = "knl",
2019 .llvm_name = "knl",
2020 .features = featureSet(&[_]Feature{
2021 .@"64bit",
2022 .adx,
2023 .aes,
2024 .avx512cd,
2025 .avx512er,
2026 .avx512f,
2027 .avx512pf,
2028 .bmi,
2029 .bmi2,
2030 .cmov,
2031 .cx16,
2032 .cx8,
2033 .f16c,
2034 .fast_gather,
2035 .fast_partial_ymm_or_zmm_write,
2036 .fma,
2037 .fsgsbase,
2038 .fxsr,
2039 .idivq_to_divl,
2040 .lzcnt,
2041 .mmx,
2042 .movbe,
2043 .nopl,
2044 .pclmul,
2045 .popcnt,
2046 .prefetchwt1,
2047 .prfchw,
2048 .rdrnd,
2049 .rdseed,
2050 .sahf,
2051 .slow_3ops_lea,
2052 .slow_incdec,
2053 .slow_pmaddwd,
2054 .slow_two_mem_ops,
2055 .x87,
2056 .xsave,
2057 .xsaveopt,
2058 }),
2059 };
2060 pub const knm = Cpu{
2061 .name = "knm",
2062 .llvm_name = "knm",
2063 .features = featureSet(&[_]Feature{
2064 .@"64bit",
2065 .adx,
2066 .aes,
2067 .avx512cd,
2068 .avx512er,
2069 .avx512f,
2070 .avx512pf,
2071 .avx512vpopcntdq,
2072 .bmi,
2073 .bmi2,
2074 .cmov,
2075 .cx16,
2076 .cx8,
2077 .f16c,
2078 .fast_gather,
2079 .fast_partial_ymm_or_zmm_write,
2080 .fma,
2081 .fsgsbase,
2082 .fxsr,
2083 .idivq_to_divl,
2084 .lzcnt,
2085 .mmx,
2086 .movbe,
2087 .nopl,
2088 .pclmul,
2089 .popcnt,
2090 .prefetchwt1,
2091 .prfchw,
2092 .rdrnd,
2093 .rdseed,
2094 .sahf,
2095 .slow_3ops_lea,
2096 .slow_incdec,
2097 .slow_pmaddwd,
2098 .slow_two_mem_ops,
2099 .x87,
2100 .xsave,
2101 .xsaveopt,
2102 }),
2103 };
2104 pub const lakemont = Cpu{
2105 .name = "lakemont",
2106 .llvm_name = "lakemont",
2107 .features = featureSet(&[_]Feature{}),
2108 };
2109 pub const nehalem = Cpu{
2110 .name = "nehalem",
2111 .llvm_name = "nehalem",
2112 .features = featureSet(&[_]Feature{
2113 .@"64bit",
2114 .cmov,
2115 .cx16,
2116 .cx8,
2117 .fxsr,
2118 .macrofusion,
2119 .mmx,
2120 .nopl,
2121 .popcnt,
2122 .sahf,
2123 .sse4_2,
2124 .x87,
2125 }),
2126 };
2127 pub const nocona = Cpu{
2128 .name = "nocona",
2129 .llvm_name = "nocona",
2130 .features = featureSet(&[_]Feature{
2131 .@"64bit",
2132 .cmov,
2133 .cx16,
2134 .cx8,
2135 .fxsr,
2136 .mmx,
2137 .nopl,
2138 .slow_unaligned_mem_16,
2139 .sse3,
2140 .x87,
2141 }),
2142 };
2143 pub const opteron = Cpu{
2144 .name = "opteron",
2145 .llvm_name = "opteron",
2146 .features = featureSet(&[_]Feature{
2147 .@"3dnowa",
2148 .@"64bit",
2149 .cmov,
2150 .cx8,
2151 .fast_scalar_shift_masks,
2152 .fxsr,
2153 .nopl,
2154 .slow_shld,
2155 .slow_unaligned_mem_16,
2156 .sse2,
2157 .x87,
2158 }),
2159 };
2160 pub const opteron_sse3 = Cpu{
2161 .name = "opteron_sse3",
2162 .llvm_name = "opteron-sse3",
2163 .features = featureSet(&[_]Feature{
2164 .@"3dnowa",
2165 .@"64bit",
2166 .cmov,
2167 .cx16,
2168 .cx8,
2169 .fast_scalar_shift_masks,
2170 .fxsr,
2171 .nopl,
2172 .slow_shld,
2173 .slow_unaligned_mem_16,
2174 .sse3,
2175 .x87,
2176 }),
2177 };
2178 pub const penryn = Cpu{
2179 .name = "penryn",
2180 .llvm_name = "penryn",
2181 .features = featureSet(&[_]Feature{
2182 .@"64bit",
2183 .cmov,
2184 .cx16,
2185 .cx8,
2186 .fxsr,
2187 .macrofusion,
2188 .mmx,
2189 .nopl,
2190 .sahf,
2191 .slow_unaligned_mem_16,
2192 .sse4_1,
2193 .x87,
2194 }),
2195 };
2196 pub const pentium = Cpu{
2197 .name = "pentium",
2198 .llvm_name = "pentium",
2199 .features = featureSet(&[_]Feature{
2200 .cx8,
2201 .slow_unaligned_mem_16,
2202 .x87,
2203 }),
2204 };
2205 pub const pentium_m = Cpu{
2206 .name = "pentium_m",
2207 .llvm_name = "pentium-m",
2208 .features = featureSet(&[_]Feature{
2209 .cmov,
2210 .cx8,
2211 .fxsr,
2212 .mmx,
2213 .nopl,
2214 .slow_unaligned_mem_16,
2215 .sse2,
2216 .x87,
2217 }),
2218 };
2219 pub const pentium_mmx = Cpu{
2220 .name = "pentium_mmx",
2221 .llvm_name = "pentium-mmx",
2222 .features = featureSet(&[_]Feature{
2223 .cx8,
2224 .mmx,
2225 .slow_unaligned_mem_16,
2226 .x87,
2227 }),
2228 };
2229 pub const pentium2 = Cpu{
2230 .name = "pentium2",
2231 .llvm_name = "pentium2",
2232 .features = featureSet(&[_]Feature{
2233 .cmov,
2234 .cx8,
2235 .fxsr,
2236 .mmx,
2237 .nopl,
2238 .slow_unaligned_mem_16,
2239 .x87,
2240 }),
2241 };
2242 pub const pentium3 = Cpu{
2243 .name = "pentium3",
2244 .llvm_name = "pentium3",
2245 .features = featureSet(&[_]Feature{
2246 .cmov,
2247 .cx8,
2248 .fxsr,
2249 .mmx,
2250 .nopl,
2251 .slow_unaligned_mem_16,
2252 .sse,
2253 .x87,
2254 }),
2255 };
2256 pub const pentium3m = Cpu{
2257 .name = "pentium3m",
2258 .llvm_name = "pentium3m",
2259 .features = featureSet(&[_]Feature{
2260 .cmov,
2261 .cx8,
2262 .fxsr,
2263 .mmx,
2264 .nopl,
2265 .slow_unaligned_mem_16,
2266 .sse,
2267 .x87,
2268 }),
2269 };
2270 pub const pentium4 = Cpu{
2271 .name = "pentium4",
2272 .llvm_name = "pentium4",
2273 .features = featureSet(&[_]Feature{
2274 .cmov,
2275 .cx8,
2276 .fxsr,
2277 .mmx,
2278 .nopl,
2279 .slow_unaligned_mem_16,
2280 .sse2,
2281 .x87,
2282 }),
2283 };
2284 pub const pentium4m = Cpu{
2285 .name = "pentium4m",
2286 .llvm_name = "pentium4m",
2287 .features = featureSet(&[_]Feature{
2288 .cmov,
2289 .cx8,
2290 .fxsr,
2291 .mmx,
2292 .nopl,
2293 .slow_unaligned_mem_16,
2294 .sse2,
2295 .x87,
2296 }),
2297 };
2298 pub const pentiumpro = Cpu{
2299 .name = "pentiumpro",
2300 .llvm_name = "pentiumpro",
2301 .features = featureSet(&[_]Feature{
2302 .cmov,
2303 .cx8,
2304 .nopl,
2305 .slow_unaligned_mem_16,
2306 .x87,
2307 }),
2308 };
2309 pub const prescott = Cpu{
2310 .name = "prescott",
2311 .llvm_name = "prescott",
2312 .features = featureSet(&[_]Feature{
2313 .cmov,
2314 .cx8,
2315 .fxsr,
2316 .mmx,
2317 .nopl,
2318 .slow_unaligned_mem_16,
2319 .sse3,
2320 .x87,
2321 }),
2322 };
2323 pub const sandybridge = Cpu{
2324 .name = "sandybridge",
2325 .llvm_name = "sandybridge",
2326 .features = featureSet(&[_]Feature{
2327 .@"64bit",
2328 .avx,
2329 .cmov,
2330 .cx16,
2331 .cx8,
2332 .false_deps_popcnt,
2333 .fast_scalar_fsqrt,
2334 .fast_shld_rotate,
2335 .fxsr,
2336 .idivq_to_divl,
2337 .macrofusion,
2338 .merge_to_threeway_branch,
2339 .mmx,
2340 .nopl,
2341 .pclmul,
2342 .popcnt,
2343 .sahf,
2344 .slow_3ops_lea,
2345 .slow_unaligned_mem_32,
2346 .sse4_2,
2347 .x87,
2348 .xsave,
2349 .xsaveopt,
2350 }),
2351 };
2352 pub const silvermont = Cpu{
2353 .name = "silvermont",
2354 .llvm_name = "silvermont",
2355 .features = featureSet(&[_]Feature{
2356 .@"64bit",
2357 .cmov,
2358 .cx16,
2359 .cx8,
2360 .false_deps_popcnt,
2361 .fxsr,
2362 .idivq_to_divl,
2363 .mmx,
2364 .movbe,
2365 .nopl,
2366 .pclmul,
2367 .popcnt,
2368 .prfchw,
2369 .rdrnd,
2370 .sahf,
2371 .slow_incdec,
2372 .slow_lea,
2373 .slow_pmulld,
2374 .slow_two_mem_ops,
2375 .sse4_2,
2376 .ssse3,
2377 .x87,
2378 }),
2379 };
2380 pub const skx = Cpu{
2381 .name = "skx",
2382 .llvm_name = "skx",
2383 .features = featureSet(&[_]Feature{
2384 .@"64bit",
2385 .adx,
2386 .aes,
2387 .avx,
2388 .avx2,
2389 .avx512bw,
2390 .avx512cd,
2391 .avx512dq,
2392 .avx512f,
2393 .avx512vl,
2394 .bmi,
2395 .bmi2,
2396 .clflushopt,
2397 .clwb,
2398 .cmov,
2399 .cx16,
2400 .cx8,
2401 .ermsb,
2402 .f16c,
2403 .false_deps_popcnt,
2404 .fast_gather,
2405 .fast_scalar_fsqrt,
2406 .fast_shld_rotate,
2407 .fast_variable_shuffle,
2408 .fast_vector_fsqrt,
2409 .fma,
2410 .fsgsbase,
2411 .fxsr,
2412 .idivq_to_divl,
2413 .invpcid,
2414 .lzcnt,
2415 .macrofusion,
2416 .merge_to_threeway_branch,
2417 .mmx,
2418 .movbe,
2419 .mpx,
2420 .nopl,
2421 .pclmul,
2422 .pku,
2423 .popcnt,
2424 .prfchw,
2425 .rdrnd,
2426 .rdseed,
2427 .sahf,
2428 .slow_3ops_lea,
2429 .sse4_2,
2430 .x87,
2431 .xsave,
2432 .xsavec,
2433 .xsaveopt,
2434 .xsaves,
2435 }),
2436 };
2437 pub const skylake = Cpu{
2438 .name = "skylake",
2439 .llvm_name = "skylake",
2440 .features = featureSet(&[_]Feature{
2441 .@"64bit",
2442 .adx,
2443 .aes,
2444 .avx,
2445 .avx2,
2446 .bmi,
2447 .bmi2,
2448 .clflushopt,
2449 .cmov,
2450 .cx16,
2451 .cx8,
2452 .ermsb,
2453 .f16c,
2454 .false_deps_popcnt,
2455 .fast_gather,
2456 .fast_scalar_fsqrt,
2457 .fast_shld_rotate,
2458 .fast_variable_shuffle,
2459 .fast_vector_fsqrt,
2460 .fma,
2461 .fsgsbase,
2462 .fxsr,
2463 .idivq_to_divl,
2464 .invpcid,
2465 .lzcnt,
2466 .macrofusion,
2467 .merge_to_threeway_branch,
2468 .mmx,
2469 .movbe,
2470 .mpx,
2471 .nopl,
2472 .pclmul,
2473 .popcnt,
2474 .prfchw,
2475 .rdrnd,
2476 .rdseed,
2477 .sahf,
2478 .sgx,
2479 .slow_3ops_lea,
2480 .sse4_2,
2481 .x87,
2482 .xsave,
2483 .xsavec,
2484 .xsaveopt,
2485 .xsaves,
2486 }),
2487 };
2488 pub const skylake_avx512 = Cpu{
2489 .name = "skylake_avx512",
2490 .llvm_name = "skylake-avx512",
2491 .features = featureSet(&[_]Feature{
2492 .@"64bit",
2493 .adx,
2494 .aes,
2495 .avx,
2496 .avx2,
2497 .avx512bw,
2498 .avx512cd,
2499 .avx512dq,
2500 .avx512f,
2501 .avx512vl,
2502 .bmi,
2503 .bmi2,
2504 .clflushopt,
2505 .clwb,
2506 .cmov,
2507 .cx16,
2508 .cx8,
2509 .ermsb,
2510 .f16c,
2511 .false_deps_popcnt,
2512 .fast_gather,
2513 .fast_scalar_fsqrt,
2514 .fast_shld_rotate,
2515 .fast_variable_shuffle,
2516 .fast_vector_fsqrt,
2517 .fma,
2518 .fsgsbase,
2519 .fxsr,
2520 .idivq_to_divl,
2521 .invpcid,
2522 .lzcnt,
2523 .macrofusion,
2524 .merge_to_threeway_branch,
2525 .mmx,
2526 .movbe,
2527 .mpx,
2528 .nopl,
2529 .pclmul,
2530 .pku,
2531 .popcnt,
2532 .prfchw,
2533 .rdrnd,
2534 .rdseed,
2535 .sahf,
2536 .slow_3ops_lea,
2537 .sse4_2,
2538 .x87,
2539 .xsave,
2540 .xsavec,
2541 .xsaveopt,
2542 .xsaves,
2543 }),
2544 };
2545 pub const slm = Cpu{
2546 .name = "slm",
2547 .llvm_name = "slm",
2548 .features = featureSet(&[_]Feature{
2549 .@"64bit",
2550 .cmov,
2551 .cx16,
2552 .cx8,
2553 .false_deps_popcnt,
2554 .fxsr,
2555 .idivq_to_divl,
2556 .mmx,
2557 .movbe,
2558 .nopl,
2559 .pclmul,
2560 .popcnt,
2561 .prfchw,
2562 .rdrnd,
2563 .sahf,
2564 .slow_incdec,
2565 .slow_lea,
2566 .slow_pmulld,
2567 .slow_two_mem_ops,
2568 .sse4_2,
2569 .ssse3,
2570 .x87,
2571 }),
2572 };
2573 pub const tremont = Cpu{
2574 .name = "tremont",
2575 .llvm_name = "tremont",
2576 .features = featureSet(&[_]Feature{
2577 .@"64bit",
2578 .aes,
2579 .cldemote,
2580 .clflushopt,
2581 .cmov,
2582 .cx16,
2583 .cx8,
2584 .fsgsbase,
2585 .fxsr,
2586 .gfni,
2587 .mmx,
2588 .movbe,
2589 .movdir64b,
2590 .movdiri,
2591 .mpx,
2592 .nopl,
2593 .pclmul,
2594 .popcnt,
2595 .prfchw,
2596 .ptwrite,
2597 .rdpid,
2598 .rdrnd,
2599 .rdseed,
2600 .sahf,
2601 .sgx,
2602 .sha,
2603 .slow_incdec,
2604 .slow_lea,
2605 .slow_two_mem_ops,
2606 .sse4_2,
2607 .ssse3,
2608 .waitpkg,
2609 .x87,
2610 .xsave,
2611 .xsavec,
2612 .xsaveopt,
2613 .xsaves,
2614 }),
2615 };
2616 pub const westmere = Cpu{
2617 .name = "westmere",
2618 .llvm_name = "westmere",
2619 .features = featureSet(&[_]Feature{
2620 .@"64bit",
2621 .cmov,
2622 .cx16,
2623 .cx8,
2624 .fxsr,
2625 .macrofusion,
2626 .mmx,
2627 .nopl,
2628 .pclmul,
2629 .popcnt,
2630 .sahf,
2631 .sse4_2,
2632 .x87,
2633 }),
2634 };
2635 pub const winchip_c6 = Cpu{
2636 .name = "winchip_c6",
2637 .llvm_name = "winchip-c6",
2638 .features = featureSet(&[_]Feature{
2639 .mmx,
2640 .slow_unaligned_mem_16,
2641 .x87,
2642 }),
2643 };
2644 pub const winchip2 = Cpu{
2645 .name = "winchip2",
2646 .llvm_name = "winchip2",
2647 .features = featureSet(&[_]Feature{
2648 .@"3dnow",
2649 .slow_unaligned_mem_16,
2650 .x87,
2651 }),
2652 };
2653 pub const x86_64 = Cpu{
2654 .name = "x86_64",
2655 .llvm_name = "x86-64",
2656 .features = featureSet(&[_]Feature{
2657 .@"64bit",
2658 .cmov,
2659 .cx8,
2660 .fxsr,
2661 .macrofusion,
2662 .mmx,
2663 .nopl,
2664 .slow_3ops_lea,
2665 .slow_incdec,
2666 .sse2,
2667 .x87,
2668 }),
2669 };
2670 pub const yonah = Cpu{
2671 .name = "yonah",
2672 .llvm_name = "yonah",
2673 .features = featureSet(&[_]Feature{
2674 .cmov,
2675 .cx8,
2676 .fxsr,
2677 .mmx,
2678 .nopl,
2679 .slow_unaligned_mem_16,
2680 .sse3,
2681 .x87,
2682 }),
2683 };
2684 pub const znver1 = Cpu{
2685 .name = "znver1",
2686 .llvm_name = "znver1",
2687 .features = featureSet(&[_]Feature{
2688 .@"64bit",
2689 .adx,
2690 .aes,
2691 .avx2,
2692 .bmi,
2693 .bmi2,
2694 .branchfusion,
2695 .clflushopt,
2696 .clzero,
2697 .cmov,
2698 .cx16,
2699 .f16c,
2700 .fast_15bytenop,
2701 .fast_bextr,
2702 .fast_lzcnt,
2703 .fast_scalar_shift_masks,
2704 .fma,
2705 .fsgsbase,
2706 .fxsr,
2707 .lzcnt,
2708 .mmx,
2709 .movbe,
2710 .mwaitx,
2711 .nopl,
2712 .pclmul,
2713 .popcnt,
2714 .prfchw,
2715 .rdrnd,
2716 .rdseed,
2717 .sahf,
2718 .sha,
2719 .slow_shld,
2720 .sse4a,
2721 .x87,
2722 .xsave,
2723 .xsavec,
2724 .xsaveopt,
2725 .xsaves,
2726 }),
2727 };
2728 pub const znver2 = Cpu{
2729 .name = "znver2",
2730 .llvm_name = "znver2",
2731 .features = featureSet(&[_]Feature{
2732 .@"64bit",
2733 .adx,
2734 .aes,
2735 .avx2,
2736 .bmi,
2737 .bmi2,
2738 .branchfusion,
2739 .clflushopt,
2740 .clwb,
2741 .clzero,
2742 .cmov,
2743 .cx16,
2744 .f16c,
2745 .fast_15bytenop,
2746 .fast_bextr,
2747 .fast_lzcnt,
2748 .fast_scalar_shift_masks,
2749 .fma,
2750 .fsgsbase,
2751 .fxsr,
2752 .lzcnt,
2753 .mmx,
2754 .movbe,
2755 .mwaitx,
2756 .nopl,
2757 .pclmul,
2758 .popcnt,
2759 .prfchw,
2760 .rdpid,
2761 .rdrnd,
2762 .rdseed,
2763 .sahf,
2764 .sha,
2765 .slow_shld,
2766 .sse4a,
2767 .wbnoinvd,
2768 .x87,
2769 .xsave,
2770 .xsavec,
2771 .xsaveopt,
2772 .xsaves,
2773 }),
2774 };
2775};
2776
2777/// All x86 CPUs, sorted alphabetically by name.
2778/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
2779/// compiler has inefficient memory and CPU usage, affecting build times.
2780pub const all_cpus = &[_]*const Cpu{
2781 &cpu.amdfam10,
2782 &cpu.athlon,
2783 &cpu.athlon_4,
2784 &cpu.athlon_fx,
2785 &cpu.athlon_mp,
2786 &cpu.athlon_tbird,
2787 &cpu.athlon_xp,
2788 &cpu.athlon64,
2789 &cpu.athlon64_sse3,
2790 &cpu.atom,
2791 &cpu.barcelona,
2792 &cpu.bdver1,
2793 &cpu.bdver2,
2794 &cpu.bdver3,
2795 &cpu.bdver4,
2796 &cpu.bonnell,
2797 &cpu.broadwell,
2798 &cpu.btver1,
2799 &cpu.btver2,
2800 &cpu.c3,
2801 &cpu.c3_2,
2802 &cpu.cannonlake,
2803 &cpu.cascadelake,
2804 &cpu.cooperlake,
2805 &cpu.core_avx_i,
2806 &cpu.core_avx2,
2807 &cpu.core2,
2808 &cpu.corei7,
2809 &cpu.corei7_avx,
2810 &cpu.generic,
2811 &cpu.geode,
2812 &cpu.goldmont,
2813 &cpu.goldmont_plus,
2814 &cpu.haswell,
2815 &cpu._i386,
2816 &cpu._i486,
2817 &cpu._i586,
2818 &cpu._i686,
2819 &cpu.icelake_client,
2820 &cpu.icelake_server,
2821 &cpu.ivybridge,
2822 &cpu.k6,
2823 &cpu.k6_2,
2824 &cpu.k6_3,
2825 &cpu.k8,
2826 &cpu.k8_sse3,
2827 &cpu.knl,
2828 &cpu.knm,
2829 &cpu.lakemont,
2830 &cpu.nehalem,
2831 &cpu.nocona,
2832 &cpu.opteron,
2833 &cpu.opteron_sse3,
2834 &cpu.penryn,
2835 &cpu.pentium,
2836 &cpu.pentium_m,
2837 &cpu.pentium_mmx,
2838 &cpu.pentium2,
2839 &cpu.pentium3,
2840 &cpu.pentium3m,
2841 &cpu.pentium4,
2842 &cpu.pentium4m,
2843 &cpu.pentiumpro,
2844 &cpu.prescott,
2845 &cpu.sandybridge,
2846 &cpu.silvermont,
2847 &cpu.skx,
2848 &cpu.skylake,
2849 &cpu.skylake_avx512,
2850 &cpu.slm,
2851 &cpu.tremont,
2852 &cpu.westmere,
2853 &cpu.winchip_c6,
2854 &cpu.winchip2,
2855 &cpu.x86_64,
2856 &cpu.yonah,
2857 &cpu.znver1,
2858 &cpu.znver2,
2859};
src-self-hosted/clang.zig+2
...@@ -768,6 +768,7 @@ pub extern fn ZigClangFieldDecl_getCanonicalDecl(field_decl: ?*const struct_ZigC...@@ -768,6 +768,7 @@ pub extern fn ZigClangFieldDecl_getCanonicalDecl(field_decl: ?*const struct_ZigC
768pub extern fn ZigClangEnumDecl_getCanonicalDecl(self: ?*const struct_ZigClangEnumDecl) ?*const struct_ZigClangTagDecl;768pub extern fn ZigClangEnumDecl_getCanonicalDecl(self: ?*const struct_ZigClangEnumDecl) ?*const struct_ZigClangTagDecl;
769pub extern fn ZigClangTypedefNameDecl_getCanonicalDecl(self: ?*const struct_ZigClangTypedefNameDecl) ?*const struct_ZigClangTypedefNameDecl;769pub extern fn ZigClangTypedefNameDecl_getCanonicalDecl(self: ?*const struct_ZigClangTypedefNameDecl) ?*const struct_ZigClangTypedefNameDecl;
770pub extern fn ZigClangFunctionDecl_getCanonicalDecl(self: ?*const struct_ZigClangFunctionDecl) ?*const struct_ZigClangFunctionDecl;770pub extern fn ZigClangFunctionDecl_getCanonicalDecl(self: ?*const struct_ZigClangFunctionDecl) ?*const struct_ZigClangFunctionDecl;
771pub extern fn ZigClangParmVarDecl_getOriginalType(self: ?*const struct_ZigClangParmVarDecl) struct_ZigClangQualType;
771pub extern fn ZigClangVarDecl_getCanonicalDecl(self: ?*const struct_ZigClangVarDecl) ?*const struct_ZigClangVarDecl;772pub extern fn ZigClangVarDecl_getCanonicalDecl(self: ?*const struct_ZigClangVarDecl) ?*const struct_ZigClangVarDecl;
772pub extern fn ZigClangVarDecl_getSectionAttribute(self: *const ZigClangVarDecl, len: *usize) ?[*]const u8;773pub extern fn ZigClangVarDecl_getSectionAttribute(self: *const ZigClangVarDecl, len: *usize) ?[*]const u8;
773pub extern fn ZigClangFunctionDecl_getAlignedAttribute(self: *const ZigClangFunctionDecl, *const ZigClangASTContext) c_uint;774pub extern fn ZigClangFunctionDecl_getAlignedAttribute(self: *const ZigClangFunctionDecl, *const ZigClangASTContext) c_uint;
...@@ -809,6 +810,7 @@ pub extern fn ZigClangQualType_isRestrictQualified(self: struct_ZigClangQualType...@@ -809,6 +810,7 @@ pub extern fn ZigClangQualType_isRestrictQualified(self: struct_ZigClangQualType
809pub extern fn ZigClangType_getTypeClass(self: ?*const struct_ZigClangType) ZigClangTypeClass;810pub extern fn ZigClangType_getTypeClass(self: ?*const struct_ZigClangType) ZigClangTypeClass;
810pub extern fn ZigClangType_getPointeeType(self: ?*const struct_ZigClangType) struct_ZigClangQualType;811pub extern fn ZigClangType_getPointeeType(self: ?*const struct_ZigClangType) struct_ZigClangQualType;
811pub extern fn ZigClangType_isVoidType(self: ?*const struct_ZigClangType) bool;812pub extern fn ZigClangType_isVoidType(self: ?*const struct_ZigClangType) bool;
813pub extern fn ZigClangType_isConstantArrayType(self: ?*const struct_ZigClangType) bool;
812pub extern fn ZigClangType_isRecordType(self: ?*const struct_ZigClangType) bool;814pub extern fn ZigClangType_isRecordType(self: ?*const struct_ZigClangType) bool;
813pub extern fn ZigClangType_isArrayType(self: ?*const struct_ZigClangType) bool;815pub extern fn ZigClangType_isArrayType(self: ?*const struct_ZigClangType) bool;
814pub extern fn ZigClangType_isBooleanType(self: ?*const struct_ZigClangType) bool;816pub extern fn ZigClangType_isBooleanType(self: ?*const struct_ZigClangType) bool;
src-self-hosted/main.zig+3-43
...@@ -79,7 +79,9 @@ pub fn main() !void {...@@ -79,7 +79,9 @@ pub fn main() !void {
79 } else if (mem.eql(u8, cmd, "libc")) {79 } else if (mem.eql(u8, cmd, "libc")) {
80 return cmdLibC(allocator, cmd_args);80 return cmdLibC(allocator, cmd_args);
81 } else if (mem.eql(u8, cmd, "targets")) {81 } else if (mem.eql(u8, cmd, "targets")) {
82 return cmdTargets(allocator, cmd_args);82 // TODO figure out the current target rather than using the target that was specified when
83 // compiling the compiler
84 return @import("print_targets.zig").cmdTargets(allocator, cmd_args, stdout, Target.current);
83 } else if (mem.eql(u8, cmd, "version")) {85 } else if (mem.eql(u8, cmd, "version")) {
84 return cmdVersion(allocator, cmd_args);86 return cmdVersion(allocator, cmd_args);
85 } else if (mem.eql(u8, cmd, "zen")) {87 } else if (mem.eql(u8, cmd, "zen")) {
...@@ -789,48 +791,6 @@ async fn fmtPath(fmt: *Fmt, file_path_ref: []const u8, check_mode: bool) FmtErro...@@ -789,48 +791,6 @@ async fn fmtPath(fmt: *Fmt, file_path_ref: []const u8, check_mode: bool) FmtErro
789 }791 }
790}792}
791793
792// cmd:targets /////////////////////////////////////////////////////////////////////////////////////
793
794fn cmdTargets(allocator: *Allocator, args: []const []const u8) !void {
795 try stdout.write("Architectures:\n");
796 {
797 comptime var i: usize = 0;
798 inline while (i < @memberCount(builtin.Arch)) : (i += 1) {
799 comptime const arch_tag = @memberName(builtin.Arch, i);
800 // NOTE: Cannot use empty string, see #918.
801 comptime const native_str = if (comptime mem.eql(u8, arch_tag, @tagName(builtin.arch))) " (native)\n" else "\n";
802
803 try stdout.print(" {}{}", .{ arch_tag, native_str });
804 }
805 }
806 try stdout.write("\n");
807
808 try stdout.write("Operating Systems:\n");
809 {
810 comptime var i: usize = 0;
811 inline while (i < @memberCount(Target.Os)) : (i += 1) {
812 comptime const os_tag = @memberName(Target.Os, i);
813 // NOTE: Cannot use empty string, see #918.
814 comptime const native_str = if (comptime mem.eql(u8, os_tag, @tagName(builtin.os))) " (native)\n" else "\n";
815
816 try stdout.print(" {}{}", .{ os_tag, native_str });
817 }
818 }
819 try stdout.write("\n");
820
821 try stdout.write("C ABIs:\n");
822 {
823 comptime var i: usize = 0;
824 inline while (i < @memberCount(Target.Abi)) : (i += 1) {
825 comptime const abi_tag = @memberName(Target.Abi, i);
826 // NOTE: Cannot use empty string, see #918.
827 comptime const native_str = if (comptime mem.eql(u8, abi_tag, @tagName(builtin.abi))) " (native)\n" else "\n";
828
829 try stdout.print(" {}{}", .{ abi_tag, native_str });
830 }
831 }
832}
833
834fn cmdVersion(allocator: *Allocator, args: []const []const u8) !void {794fn cmdVersion(allocator: *Allocator, args: []const []const u8) !void {
835 try stdout.print("{}\n", .{std.mem.toSliceConst(u8, c.ZIG_VERSION_STRING)});795 try stdout.print("{}\n", .{std.mem.toSliceConst(u8, c.ZIG_VERSION_STRING)});
836}796}
src-self-hosted/print_targets.zig created+251
...@@ -0,0 +1,251 @@
1const std = @import("std");
2const fs = std.fs;
3const io = std.io;
4const mem = std.mem;
5const Allocator = mem.Allocator;
6const Target = std.Target;
7
8// TODO this is hard-coded until self-hosted gains this information canonically
9const available_libcs = [_][]const u8{
10 "aarch64_be-linux-gnu",
11 "aarch64_be-linux-musl",
12 "aarch64_be-windows-gnu",
13 "aarch64-linux-gnu",
14 "aarch64-linux-musl",
15 "aarch64-windows-gnu",
16 "armeb-linux-gnueabi",
17 "armeb-linux-gnueabihf",
18 "armeb-linux-musleabi",
19 "armeb-linux-musleabihf",
20 "armeb-windows-gnu",
21 "arm-linux-gnueabi",
22 "arm-linux-gnueabihf",
23 "arm-linux-musleabi",
24 "arm-linux-musleabihf",
25 "arm-windows-gnu",
26 "i386-linux-gnu",
27 "i386-linux-musl",
28 "i386-windows-gnu",
29 "mips64el-linux-gnuabi64",
30 "mips64el-linux-gnuabin32",
31 "mips64el-linux-musl",
32 "mips64-linux-gnuabi64",
33 "mips64-linux-gnuabin32",
34 "mips64-linux-musl",
35 "mipsel-linux-gnu",
36 "mipsel-linux-musl",
37 "mips-linux-gnu",
38 "mips-linux-musl",
39 "powerpc64le-linux-gnu",
40 "powerpc64le-linux-musl",
41 "powerpc64-linux-gnu",
42 "powerpc64-linux-musl",
43 "powerpc-linux-gnu",
44 "powerpc-linux-musl",
45 "riscv64-linux-gnu",
46 "riscv64-linux-musl",
47 "s390x-linux-gnu",
48 "s390x-linux-musl",
49 "sparc-linux-gnu",
50 "sparcv9-linux-gnu",
51 "wasm32-freestanding-musl",
52 "x86_64-linux-gnu (native)",
53 "x86_64-linux-gnux32",
54 "x86_64-linux-musl",
55 "x86_64-windows-gnu",
56};
57
58// TODO this is hard-coded until self-hosted gains this information canonically
59const available_glibcs = [_][]const u8{
60 "2.0",
61 "2.1",
62 "2.1.1",
63 "2.1.2",
64 "2.1.3",
65 "2.2",
66 "2.2.1",
67 "2.2.2",
68 "2.2.3",
69 "2.2.4",
70 "2.2.5",
71 "2.2.6",
72 "2.3",
73 "2.3.2",
74 "2.3.3",
75 "2.3.4",
76 "2.4",
77 "2.5",
78 "2.6",
79 "2.7",
80 "2.8",
81 "2.9",
82 "2.10",
83 "2.11",
84 "2.12",
85 "2.13",
86 "2.14",
87 "2.15",
88 "2.16",
89 "2.17",
90 "2.18",
91 "2.19",
92 "2.22",
93 "2.23",
94 "2.24",
95 "2.25",
96 "2.26",
97 "2.27",
98 "2.28",
99 "2.29",
100 "2.30",
101};
102
103pub fn cmdTargets(
104 allocator: *Allocator,
105 args: []const []const u8,
106 stdout: *io.OutStream(fs.File.WriteError),
107 native_target: Target,
108) !void {
109 const BOS = io.BufferedOutStream(fs.File.WriteError);
110 var bos = BOS.init(stdout);
111 var jws = std.json.WriteStream(BOS.Stream, 6).init(&bos.stream);
112
113 try jws.beginObject();
114
115 try jws.objectField("arch");
116 try jws.beginObject();
117 {
118 inline for (@typeInfo(Target.Arch).Union.fields) |field| {
119 try jws.objectField(field.name);
120 if (field.field_type == void) {
121 try jws.emitNull();
122 } else {
123 try jws.emitString(@typeName(field.field_type));
124 }
125 }
126 }
127 try jws.endObject();
128
129 try jws.objectField("subArch");
130 try jws.beginObject();
131 const sub_arch_list = [_]type{
132 Target.Arch.Arm32,
133 Target.Arch.Arm64,
134 Target.Arch.Kalimba,
135 Target.Arch.Mips,
136 };
137 inline for (sub_arch_list) |SubArch| {
138 try jws.objectField(@typeName(SubArch));
139 try jws.beginArray();
140 inline for (@typeInfo(SubArch).Enum.fields) |field| {
141 try jws.arrayElem();
142 try jws.emitString(field.name);
143 }
144 try jws.endArray();
145 }
146 try jws.endObject();
147
148 try jws.objectField("os");
149 try jws.beginArray();
150 inline for (@typeInfo(Target.Os).Enum.fields) |field| {
151 try jws.arrayElem();
152 try jws.emitString(field.name);
153 }
154 try jws.endArray();
155
156 try jws.objectField("abi");
157 try jws.beginArray();
158 inline for (@typeInfo(Target.Abi).Enum.fields) |field| {
159 try jws.arrayElem();
160 try jws.emitString(field.name);
161 }
162 try jws.endArray();
163
164 try jws.objectField("libc");
165 try jws.beginArray();
166 for (available_libcs) |libc| {
167 try jws.arrayElem();
168 try jws.emitString(libc);
169 }
170 try jws.endArray();
171
172 try jws.objectField("glibc");
173 try jws.beginArray();
174 for (available_glibcs) |glibc| {
175 try jws.arrayElem();
176 try jws.emitString(glibc);
177 }
178 try jws.endArray();
179
180 try jws.objectField("cpus");
181 try jws.beginObject();
182 inline for (@typeInfo(Target.Arch).Union.fields) |field| {
183 try jws.objectField(field.name);
184 try jws.beginObject();
185 const arch = @unionInit(Target.Arch, field.name, undefined);
186 for (arch.allCpus()) |cpu| {
187 try jws.objectField(cpu.name);
188 try jws.beginArray();
189 for (arch.allFeaturesList()) |feature, i| {
190 if (cpu.features.isEnabled(@intCast(u8, i))) {
191 try jws.arrayElem();
192 try jws.emitString(feature.name);
193 }
194 }
195 try jws.endArray();
196 }
197 try jws.endObject();
198 }
199 try jws.endObject();
200
201 try jws.objectField("cpuFeatures");
202 try jws.beginObject();
203 inline for (@typeInfo(Target.Arch).Union.fields) |field| {
204 try jws.objectField(field.name);
205 try jws.beginArray();
206 const arch = @unionInit(Target.Arch, field.name, undefined);
207 for (arch.allFeaturesList()) |feature| {
208 try jws.arrayElem();
209 try jws.emitString(feature.name);
210 }
211 try jws.endArray();
212 }
213 try jws.endObject();
214
215 try jws.objectField("native");
216 try jws.beginObject();
217 {
218 const triple = try native_target.zigTriple(allocator);
219 defer allocator.free(triple);
220 try jws.objectField("triple");
221 try jws.emitString(triple);
222 }
223 try jws.objectField("arch");
224 try jws.emitString(@tagName(native_target.getArch()));
225 try jws.objectField("os");
226 try jws.emitString(@tagName(native_target.getOs()));
227 try jws.objectField("abi");
228 try jws.emitString(@tagName(native_target.getAbi()));
229 try jws.objectField("cpuName");
230 const cpu_features = native_target.getCpuFeatures();
231 try jws.emitString(cpu_features.cpu.name);
232 {
233 try jws.objectField("cpuFeatures");
234 try jws.beginArray();
235 for (native_target.getArch().allFeaturesList()) |feature, i_usize| {
236 const index = @intCast(Target.Cpu.Feature.Set.Index, i_usize);
237 if (cpu_features.features.isEnabled(index)) {
238 try jws.arrayElem();
239 try jws.emitString(feature.name);
240 }
241 }
242 try jws.endArray();
243 }
244 // TODO implement native glibc version detection in self-hosted
245 try jws.endObject();
246
247 try jws.endObject();
248
249 try bos.stream.writeByte('\n');
250 return bos.flush();
251}
src-self-hosted/stage1.zig+304-1
...@@ -9,9 +9,11 @@ const process = std.process;...@@ -9,9 +9,11 @@ const process = std.process;
9const Allocator = mem.Allocator;9const Allocator = mem.Allocator;
10const ArrayList = std.ArrayList;10const ArrayList = std.ArrayList;
11const Buffer = std.Buffer;11const Buffer = std.Buffer;
12const Target = std.Target;
12const self_hosted_main = @import("main.zig");13const self_hosted_main = @import("main.zig");
13const errmsg = @import("errmsg.zig");14const errmsg = @import("errmsg.zig");
14const DepTokenizer = @import("dep_tokenizer.zig").Tokenizer;15const DepTokenizer = @import("dep_tokenizer.zig").Tokenizer;
16const assert = std.debug.assert;
1517
16var stderr_file: fs.File = undefined;18var stderr_file: fs.File = undefined;
17var stderr: *io.OutStream(fs.File.WriteError) = undefined;19var stderr: *io.OutStream(fs.File.WriteError) = undefined;
...@@ -63,6 +65,7 @@ const Error = extern enum {...@@ -63,6 +65,7 @@ const Error = extern enum {
63 CacheUnavailable,65 CacheUnavailable,
64 PathTooLong,66 PathTooLong,
65 CCompilerCannotFindFile,67 CCompilerCannotFindFile,
68 NoCCompilerInstalled,
66 ReadingDepFile,69 ReadingDepFile,
67 InvalidDepFile,70 InvalidDepFile,
68 MissingArchitecture,71 MissingArchitecture,
...@@ -80,6 +83,15 @@ const Error = extern enum {...@@ -80,6 +83,15 @@ const Error = extern enum {
80 OperationAborted,83 OperationAborted,
81 BrokenPipe,84 BrokenPipe,
82 NoSpaceLeft,85 NoSpaceLeft,
86 NotLazy,
87 IsAsync,
88 ImportOutsidePkgPath,
89 UnknownCpu,
90 UnknownSubArchitecture,
91 UnknownCpuFeature,
92 InvalidCpuFeatures,
93 InvalidLlvmCpuFeaturesFormat,
94 UnknownApplicationBinaryInterface,
83};95};
8496
85const FILE = std.c.FILE;97const FILE = std.c.FILE;
...@@ -149,7 +161,7 @@ fn fmtMain(argc: c_int, argv: [*]const [*:0]const u8) !void {...@@ -149,7 +161,7 @@ fn fmtMain(argc: c_int, argv: [*]const [*:0]const u8) !void {
149 const argc_usize = @intCast(usize, argc);161 const argc_usize = @intCast(usize, argc);
150 var arg_i: usize = 0;162 var arg_i: usize = 0;
151 while (arg_i < argc_usize) : (arg_i += 1) {163 while (arg_i < argc_usize) : (arg_i += 1) {
152 try args_list.append(std.mem.toSliceConst(u8, argv[arg_i]));164 try args_list.append(mem.toSliceConst(u8, argv[arg_i]));
153 }165 }
154166
155 stdout = &std.io.getStdOut().outStream().stream;167 stdout = &std.io.getStdOut().outStream().stream;
...@@ -527,3 +539,294 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz...@@ -527,3 +539,294 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz
527 node.activate();539 node.activate();
528 node.context.maybeRefresh();540 node.context.maybeRefresh();
529}541}
542
543fn cpuFeaturesFromLLVM(
544 arch: Target.Arch,
545 llvm_cpu_name_z: ?[*:0]const u8,
546 llvm_cpu_features_opt: ?[*:0]const u8,
547) !Target.CpuFeatures {
548 var result = arch.getBaselineCpuFeatures();
549
550 if (llvm_cpu_name_z) |cpu_name_z| {
551 const llvm_cpu_name = mem.toSliceConst(u8, cpu_name_z);
552
553 for (arch.allCpus()) |cpu| {
554 const this_llvm_name = cpu.llvm_name orelse continue;
555 if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) {
556 // Here we use the non-dependencies-populated set,
557 // so that subtracting features later in this function
558 // affect the prepopulated set.
559 result = Target.CpuFeatures{
560 .cpu = cpu,
561 .features = cpu.features,
562 };
563 break;
564 }
565 }
566 }
567
568 const all_features = arch.allFeaturesList();
569
570 if (llvm_cpu_features_opt) |llvm_cpu_features| {
571 var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ",");
572 while (it.next()) |decorated_llvm_feat| {
573 var op: enum {
574 add,
575 sub,
576 } = undefined;
577 var llvm_feat: []const u8 = undefined;
578 if (mem.startsWith(u8, decorated_llvm_feat, "+")) {
579 op = .add;
580 llvm_feat = decorated_llvm_feat[1..];
581 } else if (mem.startsWith(u8, decorated_llvm_feat, "-")) {
582 op = .sub;
583 llvm_feat = decorated_llvm_feat[1..];
584 } else {
585 return error.InvalidLlvmCpuFeaturesFormat;
586 }
587 for (all_features) |feature, index_usize| {
588 const this_llvm_name = feature.llvm_name orelse continue;
589 if (mem.eql(u8, llvm_feat, this_llvm_name)) {
590 const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize);
591 switch (op) {
592 .add => result.features.addFeature(index),
593 .sub => result.features.removeFeature(index),
594 }
595 break;
596 }
597 }
598 }
599 }
600
601 result.features.populateDependencies(all_features);
602 return result;
603}
604
605// ABI warning
606export fn stage2_cmd_targets(zig_triple: [*:0]const u8) c_int {
607 cmdTargets(zig_triple) catch |err| {
608 std.debug.warn("unable to list targets: {}\n", .{@errorName(err)});
609 return -1;
610 };
611 return 0;
612}
613
614fn cmdTargets(zig_triple: [*:0]const u8) !void {
615 var target = try Target.parse(mem.toSliceConst(u8, zig_triple));
616 target.Cross.cpu_features = blk: {
617 const llvm = @import("llvm.zig");
618 const llvm_cpu_name = llvm.GetHostCPUName();
619 const llvm_cpu_features = llvm.GetNativeFeatures();
620 break :blk try cpuFeaturesFromLLVM(target.Cross.arch, llvm_cpu_name, llvm_cpu_features);
621 };
622 return @import("print_targets.zig").cmdTargets(
623 std.heap.c_allocator,
624 &[0][]u8{},
625 &std.io.getStdOut().outStream().stream,
626 target,
627 );
628}
629
630const Stage2CpuFeatures = struct {
631 allocator: *mem.Allocator,
632 cpu_features: Target.CpuFeatures,
633
634 llvm_features_str: ?[*:0]const u8,
635
636 builtin_str: [:0]const u8,
637 cache_hash: [:0]const u8,
638
639 const Self = @This();
640
641 fn createFromNative(allocator: *mem.Allocator) !*Self {
642 const arch = Target.current.getArch();
643 const llvm = @import("llvm.zig");
644 const llvm_cpu_name = llvm.GetHostCPUName();
645 const llvm_cpu_features = llvm.GetNativeFeatures();
646 const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name, llvm_cpu_features);
647 return createFromCpuFeatures(allocator, arch, cpu_features);
648 }
649
650 fn createFromCpuFeatures(
651 allocator: *mem.Allocator,
652 arch: Target.Arch,
653 cpu_features: Target.CpuFeatures,
654 ) !*Self {
655 const self = try allocator.create(Self);
656 errdefer allocator.destroy(self);
657
658 const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{}", .{
659 cpu_features.cpu.name,
660 cpu_features.features.asBytes(),
661 });
662 errdefer allocator.free(cache_hash);
663
664 const generic_arch_name = arch.genericName();
665 var builtin_str_buffer = try std.Buffer.allocPrint(allocator,
666 \\CpuFeatures{{
667 \\ .cpu = &Target.{}.cpu.{},
668 \\ .features = Target.{}.featureSet(&[_]Target.{}.Feature{{
669 \\
670 , .{
671 generic_arch_name,
672 cpu_features.cpu.name,
673 generic_arch_name,
674 generic_arch_name,
675 });
676 defer builtin_str_buffer.deinit();
677
678 var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
679 defer llvm_features_buffer.deinit();
680
681 for (arch.allFeaturesList()) |feature, index_usize| {
682 const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize);
683 const is_enabled = cpu_features.features.isEnabled(index);
684
685 if (feature.llvm_name) |llvm_name| {
686 const plus_or_minus = "-+"[@boolToInt(is_enabled)];
687 try llvm_features_buffer.appendByte(plus_or_minus);
688 try llvm_features_buffer.append(llvm_name);
689 try llvm_features_buffer.append(",");
690 }
691
692 if (is_enabled) {
693 // TODO some kind of "zig identifier escape" function rather than
694 // unconditionally using @"" syntax
695 try builtin_str_buffer.append(" .@\"");
696 try builtin_str_buffer.append(feature.name);
697 try builtin_str_buffer.append("\",\n");
698 }
699 }
700
701 try builtin_str_buffer.append(
702 \\ }),
703 \\};
704 \\
705 );
706
707 assert(mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ","));
708 llvm_features_buffer.shrink(llvm_features_buffer.len() - 1);
709
710 self.* = Self{
711 .allocator = allocator,
712 .cpu_features = cpu_features,
713 .llvm_features_str = llvm_features_buffer.toOwnedSlice().ptr,
714 .builtin_str = builtin_str_buffer.toOwnedSlice(),
715 .cache_hash = cache_hash,
716 };
717 return self;
718 }
719
720 fn destroy(self: *Self) void {
721 self.allocator.free(self.cache_hash);
722 self.allocator.free(self.builtin_str);
723 // TODO if (self.llvm_features_str) |llvm_features_str| self.allocator.free(llvm_features_str);
724 self.allocator.destroy(self);
725 }
726};
727
728// ABI warning
729export fn stage2_cpu_features_parse(
730 result: **Stage2CpuFeatures,
731 zig_triple: ?[*:0]const u8,
732 cpu_name: ?[*:0]const u8,
733 cpu_features: ?[*:0]const u8,
734) Error {
735 result.* = stage2ParseCpuFeatures(zig_triple, cpu_name, cpu_features) catch |err| switch (err) {
736 error.OutOfMemory => return .OutOfMemory,
737 error.UnknownArchitecture => return .UnknownArchitecture,
738 error.UnknownSubArchitecture => return .UnknownSubArchitecture,
739 error.UnknownOperatingSystem => return .UnknownOperatingSystem,
740 error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface,
741 error.MissingOperatingSystem => return .MissingOperatingSystem,
742 error.MissingArchitecture => return .MissingArchitecture,
743 error.InvalidLlvmCpuFeaturesFormat => return .InvalidLlvmCpuFeaturesFormat,
744 error.InvalidCpuFeatures => return .InvalidCpuFeatures,
745 };
746 return .None;
747}
748
749fn stage2ParseCpuFeatures(
750 zig_triple_oz: ?[*:0]const u8,
751 cpu_name_oz: ?[*:0]const u8,
752 cpu_features_oz: ?[*:0]const u8,
753) !*Stage2CpuFeatures {
754 const zig_triple_z = zig_triple_oz orelse return Stage2CpuFeatures.createFromNative(std.heap.c_allocator);
755 const target = try Target.parse(mem.toSliceConst(u8, zig_triple_z));
756 const arch = target.Cross.arch;
757
758 const cpu = if (cpu_name_oz) |cpu_name_z| blk: {
759 const cpu_name = mem.toSliceConst(u8, cpu_name_z);
760 break :blk arch.parseCpu(cpu_name) catch |err| switch (err) {
761 error.UnknownCpu => {
762 std.debug.warn("Unknown CPU: '{}'\nAvailable CPUs for architecture '{}':\n", .{
763 cpu_name,
764 @tagName(arch),
765 });
766 for (arch.allCpus()) |cpu| {
767 std.debug.warn(" {}\n", .{cpu.name});
768 }
769 process.exit(1);
770 },
771 else => |e| return e,
772 };
773 } else target.Cross.cpu_features.cpu;
774
775 var set = if (cpu_features_oz) |cpu_features_z| blk: {
776 const cpu_features = mem.toSliceConst(u8, cpu_features_z);
777 break :blk arch.parseCpuFeatureSet(cpu, cpu_features) catch |err| switch (err) {
778 error.UnknownCpuFeature => {
779 std.debug.warn(
780 \\Unknown CPU features specified.
781 \\Available CPU features for architecture '{}':
782 \\
783 , .{@tagName(arch)});
784 for (arch.allFeaturesList()) |feature| {
785 std.debug.warn(" {}\n", .{feature.name});
786 }
787 process.exit(1);
788 },
789 else => |e| return e,
790 };
791 } else cpu.features;
792
793 if (arch.subArchFeature()) |index| {
794 set.addFeature(index);
795 }
796 set.populateDependencies(arch.allFeaturesList());
797
798 return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, .{
799 .cpu = cpu,
800 .features = set,
801 });
802}
803
804// ABI warning
805export fn stage2_cpu_features_get_cache_hash(
806 cpu_features: *const Stage2CpuFeatures,
807 ptr: *[*:0]const u8,
808 len: *usize,
809) void {
810 ptr.* = cpu_features.cache_hash.ptr;
811 len.* = cpu_features.cache_hash.len;
812}
813
814// ABI warning
815export fn stage2_cpu_features_get_builtin_str(
816 cpu_features: *const Stage2CpuFeatures,
817 ptr: *[*:0]const u8,
818 len: *usize,
819) void {
820 ptr.* = cpu_features.builtin_str.ptr;
821 len.* = cpu_features.builtin_str.len;
822}
823
824// ABI warning
825export fn stage2_cpu_features_get_llvm_cpu(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 {
826 return if (cpu_features.cpu_features.cpu.llvm_name) |s| s.ptr else null;
827}
828
829// ABI warning
830export fn stage2_cpu_features_get_llvm_features(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 {
831 return cpu_features.llvm_features_str;
832}
src-self-hosted/translate_c.zig+62-60
...@@ -289,8 +289,7 @@ pub fn translate(...@@ -289,8 +289,7 @@ pub fn translate(
289 tree.errors = ast.Tree.ErrorList.init(arena);289 tree.errors = ast.Tree.ErrorList.init(arena);
290290
291 tree.root_node = try arena.create(ast.Node.Root);291 tree.root_node = try arena.create(ast.Node.Root);
292 tree.root_node.* = ast.Node.Root{292 tree.root_node.* = .{
293 .base = ast.Node{ .id = ast.Node.Id.Root },
294 .decls = ast.Node.Root.DeclList.init(arena),293 .decls = ast.Node.Root.DeclList.init(arena),
295 // initialized with the eof token at the end294 // initialized with the eof token at the end
296 .eof_token = undefined,295 .eof_token = undefined,
...@@ -440,7 +439,6 @@ fn visitFnDecl(c: *Context, fn_decl: *const ZigClangFunctionDecl) Error!void {...@@ -440,7 +439,6 @@ fn visitFnDecl(c: *Context, fn_decl: *const ZigClangFunctionDecl) Error!void {
440 .PrivateExtern => return failDecl(c, fn_decl_loc, fn_name, "unsupported storage class: private extern", .{}),439 .PrivateExtern => return failDecl(c, fn_decl_loc, fn_name, "unsupported storage class: private extern", .{}),
441 .Auto => unreachable, // Not legal on functions440 .Auto => unreachable, // Not legal on functions
442 .Register => unreachable, // Not legal on functions441 .Register => unreachable, // Not legal on functions
443 else => unreachable,
444 },442 },
445 };443 };
446444
...@@ -487,6 +485,7 @@ fn visitFnDecl(c: *Context, fn_decl: *const ZigClangFunctionDecl) Error!void {...@@ -487,6 +485,7 @@ fn visitFnDecl(c: *Context, fn_decl: *const ZigClangFunctionDecl) Error!void {
487 block_scope.block_node = block_node;485 block_scope.block_node = block_node;
488486
489 var it = proto_node.params.iterator(0);487 var it = proto_node.params.iterator(0);
488 var param_id: c_uint = 0;
490 while (it.next()) |p| {489 while (it.next()) |p| {
491 const param = @fieldParentPtr(ast.Node.ParamDecl, "base", p.*);490 const param = @fieldParentPtr(ast.Node.ParamDecl, "base", p.*);
492 const param_name = if (param.name_token) |name_tok|491 const param_name = if (param.name_token) |name_tok|
...@@ -500,18 +499,27 @@ fn visitFnDecl(c: *Context, fn_decl: *const ZigClangFunctionDecl) Error!void {...@@ -500,18 +499,27 @@ fn visitFnDecl(c: *Context, fn_decl: *const ZigClangFunctionDecl) Error!void {
500499
501 const mangled_param_name = try block_scope.makeMangledName(c, param_name);500 const mangled_param_name = try block_scope.makeMangledName(c, param_name);
502501
502 const c_param = ZigClangFunctionDecl_getParamDecl(fn_decl, param_id);
503 const qual_type = ZigClangParmVarDecl_getOriginalType(c_param);
504 const is_const = ZigClangQualType_isConstQualified(qual_type);
505
503 const arg_name = blk: {506 const arg_name = blk: {
504 const bare_arg_name = try std.fmt.allocPrint(c.a(), "arg_{}", .{mangled_param_name});507 const param_prefix = if (is_const) "" else "arg_";
508 const bare_arg_name = try std.fmt.allocPrint(c.a(), "{}{}", .{param_prefix, mangled_param_name});
505 break :blk try block_scope.makeMangledName(c, bare_arg_name);509 break :blk try block_scope.makeMangledName(c, bare_arg_name);
506 };510 };
507511
508 const node = try transCreateNodeVarDecl(c, false, false, mangled_param_name);512 if (!is_const) {
509 node.eq_token = try appendToken(c, .Equal, "=");513 const node = try transCreateNodeVarDecl(c, false, false, mangled_param_name);
510 node.init_node = try transCreateNodeIdentifier(c, arg_name);514 node.eq_token = try appendToken(c, .Equal, "=");
511 node.semicolon_token = try appendToken(c, .Semicolon, ";");515 node.init_node = try transCreateNodeIdentifier(c, arg_name);
512 try block_node.statements.push(&node.base);516 node.semicolon_token = try appendToken(c, .Semicolon, ";");
513 param.name_token = try appendIdentifier(c, arg_name);517 try block_node.statements.push(&node.base);
514 _ = try appendToken(c, .Colon, ":");518 param.name_token = try appendIdentifier(c, arg_name);
519 _ = try appendToken(c, .Colon, ":");
520 }
521
522 param_id += 1;
515 }523 }
516524
517 transCompoundStmtInline(rp, &block_scope.base, @ptrCast(*const ZigClangCompoundStmt, body_stmt), block_node) catch |err| switch (err) {525 transCompoundStmtInline(rp, &block_scope.base, @ptrCast(*const ZigClangCompoundStmt, body_stmt), block_node) catch |err| switch (err) {
...@@ -877,25 +885,23 @@ fn transEnumDecl(c: *Context, enum_decl: *const ZigClangEnumDecl) Error!?*ast.No...@@ -877,25 +885,23 @@ fn transEnumDecl(c: *Context, enum_decl: *const ZigClangEnumDecl) Error!?*ast.No
877 // types, while that's not ISO-C compliant many compilers allow this and885 // types, while that's not ISO-C compliant many compilers allow this and
878 // default to the usual integer type used for all the enums.886 // default to the usual integer type used for all the enums.
879887
880 // TODO only emit this tag type if the enum tag type is not the default.888 // default to c_int since msvc and gcc default to different types
881 // I don't know what the default is, need to figure out how clang is deciding.889 _ = try appendToken(c, .LParen, "(");
882 // it appears to at least be different across gcc/msvc890 container_node.init_arg_expr = .{
883 if (int_type.ptr != null and891 .Type = if (int_type.ptr != null and
884 !isCBuiltinType(int_type, .UInt) and892 !isCBuiltinType(int_type, .UInt) and
885 !isCBuiltinType(int_type, .Int))893 !isCBuiltinType(int_type, .Int))
886 {894 transQualType(rp, int_type, enum_loc) catch |err| switch (err) {
887 _ = try appendToken(c, .LParen, "(");
888 container_node.init_arg_expr = .{
889 .Type = transQualType(rp, int_type, enum_loc) catch |err| switch (err) {
890 error.UnsupportedType => {895 error.UnsupportedType => {
891 try failDecl(c, enum_loc, name, "unable to translate enum tag type", .{});896 try failDecl(c, enum_loc, name, "unable to translate enum tag type", .{});
892 return null;897 return null;
893 },898 },
894 else => |e| return e,899 else => |e| return e,
895 },900 }
896 };901 else
897 _ = try appendToken(c, .RParen, ")");902 try transCreateNodeIdentifier(c, "c_int"),
898 }903 };
904 _ = try appendToken(c, .RParen, ")");
899905
900 container_node.lbrace_token = try appendToken(c, .LBrace, "{");906 container_node.lbrace_token = try appendToken(c, .LBrace, "{");
901907
...@@ -953,6 +959,19 @@ fn transEnumDecl(c: *Context, enum_decl: *const ZigClangEnumDecl) Error!?*ast.No...@@ -953,6 +959,19 @@ fn transEnumDecl(c: *Context, enum_decl: *const ZigClangEnumDecl) Error!?*ast.No
953 tld_node.semicolon_token = try appendToken(c, .Semicolon, ";");959 tld_node.semicolon_token = try appendToken(c, .Semicolon, ";");
954 try addTopLevelDecl(c, field_name, &tld_node.base);960 try addTopLevelDecl(c, field_name, &tld_node.base);
955 }961 }
962 // make non exhaustive
963 const field_node = try c.a().create(ast.Node.ContainerField);
964 field_node.* = .{
965 .doc_comments = null,
966 .comptime_token = null,
967 .name_token = try appendIdentifier(c, "_"),
968 .type_expr = null,
969 .value_expr = null,
970 .align_expr = null,
971 };
972
973 try container_node.fields_and_decls.push(&field_node.base);
974 _ = try appendToken(c, .Comma, ",");
956 container_node.rbrace_token = try appendToken(c, .RBrace, "}");975 container_node.rbrace_token = try appendToken(c, .RBrace, "}");
957976
958 break :blk &container_node.base;977 break :blk &container_node.base;
...@@ -1231,18 +1250,6 @@ fn transBinaryOperator(...@@ -1231,18 +1250,6 @@ fn transBinaryOperator(
1231 op_id = .BitOr;1250 op_id = .BitOr;
1232 op_token = try appendToken(rp.c, .Pipe, "|");1251 op_token = try appendToken(rp.c, .Pipe, "|");
1233 },1252 },
1234 .Assign,
1235 .MulAssign,
1236 .DivAssign,
1237 .RemAssign,
1238 .AddAssign,
1239 .SubAssign,
1240 .ShlAssign,
1241 .ShrAssign,
1242 .AndAssign,
1243 .XorAssign,
1244 .OrAssign,
1245 => unreachable,
1246 else => unreachable,1253 else => unreachable,
1247 }1254 }
12481255
...@@ -1678,7 +1685,6 @@ fn transStringLiteral(...@@ -1678,7 +1685,6 @@ fn transStringLiteral(
1678 "TODO: support string literal kind {}",1685 "TODO: support string literal kind {}",
1679 .{kind},1686 .{kind},
1680 ),1687 ),
1681 else => unreachable,
1682 }1688 }
1683}1689}
16841690
...@@ -1986,7 +1992,8 @@ fn transInitListExprArray(...@@ -1986,7 +1992,8 @@ fn transInitListExprArray(
1986 const arr_type = ZigClangType_getAsArrayTypeUnsafe(ty);1992 const arr_type = ZigClangType_getAsArrayTypeUnsafe(ty);
1987 const child_qt = ZigClangArrayType_getElementType(arr_type);1993 const child_qt = ZigClangArrayType_getElementType(arr_type);
1988 const init_count = ZigClangInitListExpr_getNumInits(expr);1994 const init_count = ZigClangInitListExpr_getNumInits(expr);
1989 const const_arr_ty = @ptrCast(*const ZigClangConstantArrayType, ty);1995 assert(ZigClangType_isConstantArrayType(@ptrCast(*const ZigClangType, arr_type)));
1996 const const_arr_ty = @ptrCast(*const ZigClangConstantArrayType, arr_type);
1990 const size_ap_int = ZigClangConstantArrayType_getSize(const_arr_ty);1997 const size_ap_int = ZigClangConstantArrayType_getSize(const_arr_ty);
1991 const all_count = ZigClangAPInt_getLimitedValue(size_ap_int, math.maxInt(usize));1998 const all_count = ZigClangAPInt_getLimitedValue(size_ap_int, math.maxInt(usize));
1992 const leftover_count = all_count - init_count;1999 const leftover_count = all_count - init_count;
...@@ -2206,6 +2213,19 @@ fn transDoWhileLoop(...@@ -2206,6 +2213,19 @@ fn transDoWhileLoop(
2206 .id = .Loop,2213 .id = .Loop,
2207 };2214 };
22082215
2216 // if (!cond) break;
2217 const if_node = try transCreateNodeIf(rp.c);
2218 var cond_scope = Scope{
2219 .parent = scope,
2220 .id = .Condition,
2221 };
2222 const prefix_op = try transCreateNodePrefixOp(rp.c, .BoolNot, .Bang, "!");
2223 prefix_op.rhs = try transBoolExpr(rp, &cond_scope, @ptrCast(*const ZigClangExpr, ZigClangDoStmt_getCond(stmt)), .used, .r_value, true);
2224 _ = try appendToken(rp.c, .RParen, ")");
2225 if_node.condition = &prefix_op.base;
2226 if_node.body = &(try transCreateNodeBreak(rp.c, null)).base;
2227 _ = try appendToken(rp.c, .Semicolon, ";");
2228
2209 const body_node = if (ZigClangStmt_getStmtClass(ZigClangDoStmt_getBody(stmt)) == .CompoundStmtClass) blk: {2229 const body_node = if (ZigClangStmt_getStmtClass(ZigClangDoStmt_getBody(stmt)) == .CompoundStmtClass) blk: {
2210 // there's already a block in C, so we'll append our condition to it.2230 // there's already a block in C, so we'll append our condition to it.
2211 // c: do {2231 // c: do {
...@@ -2217,10 +2237,7 @@ fn transDoWhileLoop(...@@ -2217,10 +2237,7 @@ fn transDoWhileLoop(
2217 // zig: b;2237 // zig: b;
2218 // zig: if (!cond) break;2238 // zig: if (!cond) break;
2219 // zig: }2239 // zig: }
2220 const body = (try transStmt(rp, &loop_scope, ZigClangDoStmt_getBody(stmt), .unused, .r_value)).cast(ast.Node.Block).?;2240 break :blk (try transStmt(rp, &loop_scope, ZigClangDoStmt_getBody(stmt), .unused, .r_value)).cast(ast.Node.Block).?;
2221 // if this is used as an expression in Zig it needs to be immediately followed by a semicolon
2222 _ = try appendToken(rp.c, .Semicolon, ";");
2223 break :blk body;
2224 } else blk: {2241 } else blk: {
2225 // the C statement is without a block, so we need to create a block to contain it.2242 // the C statement is without a block, so we need to create a block to contain it.
2226 // c: do2243 // c: do
...@@ -2236,19 +2253,6 @@ fn transDoWhileLoop(...@@ -2236,19 +2253,6 @@ fn transDoWhileLoop(
2236 break :blk block;2253 break :blk block;
2237 };2254 };
22382255
2239 // if (!cond) break;
2240 const if_node = try transCreateNodeIf(rp.c);
2241 var cond_scope = Scope{
2242 .parent = scope,
2243 .id = .Condition,
2244 };
2245 const prefix_op = try transCreateNodePrefixOp(rp.c, .BoolNot, .Bang, "!");
2246 prefix_op.rhs = try transBoolExpr(rp, &cond_scope, @ptrCast(*const ZigClangExpr, ZigClangDoStmt_getCond(stmt)), .used, .r_value, true);
2247 _ = try appendToken(rp.c, .RParen, ")");
2248 if_node.condition = &prefix_op.base;
2249 if_node.body = &(try transCreateNodeBreak(rp.c, null)).base;
2250 _ = try appendToken(rp.c, .Semicolon, ";");
2251
2252 try body_node.statements.push(&if_node.base);2256 try body_node.statements.push(&if_node.base);
2253 if (new)2257 if (new)
2254 body_node.rbrace = try appendToken(rp.c, .RBrace, "}");2258 body_node.rbrace = try appendToken(rp.c, .RBrace, "}");
...@@ -4783,8 +4787,7 @@ fn appendIdentifier(c: *Context, name: []const u8) !ast.TokenIndex {...@@ -4783,8 +4787,7 @@ fn appendIdentifier(c: *Context, name: []const u8) !ast.TokenIndex {
4783fn transCreateNodeIdentifier(c: *Context, name: []const u8) !*ast.Node {4787fn transCreateNodeIdentifier(c: *Context, name: []const u8) !*ast.Node {
4784 const token_index = try appendIdentifier(c, name);4788 const token_index = try appendIdentifier(c, name);
4785 const identifier = try c.a().create(ast.Node.Identifier);4789 const identifier = try c.a().create(ast.Node.Identifier);
4786 identifier.* = ast.Node.Identifier{4790 identifier.* = .{
4787 .base = ast.Node{ .id = ast.Node.Id.Identifier },
4788 .token = token_index,4791 .token = token_index,
4789 };4792 };
4790 return &identifier.base;4793 return &identifier.base;
...@@ -4923,8 +4926,7 @@ fn transMacroFnDefine(c: *Context, it: *ctok.TokenList.Iterator, name: []const u...@@ -4923,8 +4926,7 @@ fn transMacroFnDefine(c: *Context, it: *ctok.TokenList.Iterator, name: []const u
49234926
4924 const token_index = try appendToken(c, .Keyword_var, "var");4927 const token_index = try appendToken(c, .Keyword_var, "var");
4925 const identifier = try c.a().create(ast.Node.Identifier);4928 const identifier = try c.a().create(ast.Node.Identifier);
4926 identifier.* = ast.Node.Identifier{4929 identifier.* = .{
4927 .base = ast.Node{ .id = ast.Node.Id.Identifier },
4928 .token = token_index,4930 .token = token_index,
4929 };4931 };
49304932
src/all_types.hpp+1383-908
...@@ -33,12 +33,15 @@ struct BuiltinFnEntry;...@@ -33,12 +33,15 @@ struct BuiltinFnEntry;
33struct TypeStructField;33struct TypeStructField;
34struct CodeGen;34struct CodeGen;
35struct ZigValue;35struct ZigValue;
36struct IrInstruction;36struct IrInst;
37struct IrInstructionCast;37struct IrInstSrc;
38struct IrInstructionAllocaGen;38struct IrInstGen;
39struct IrInstructionCallGen;39struct IrInstGenCast;
40struct IrInstructionAwaitGen;40struct IrInstGenAlloca;
41struct IrBasicBlock;41struct IrInstGenCall;
42struct IrInstGenAwait;
43struct IrBasicBlockSrc;
44struct IrBasicBlockGen;
42struct ScopeDecls;45struct ScopeDecls;
43struct ZigWindowsSDK;46struct ZigWindowsSDK;
44struct Tld;47struct Tld;
...@@ -50,6 +53,7 @@ struct ResultLocPeerParent;...@@ -50,6 +53,7 @@ struct ResultLocPeerParent;
50struct ResultLocBitCast;53struct ResultLocBitCast;
51struct ResultLocCast;54struct ResultLocCast;
52struct ResultLocReturn;55struct ResultLocReturn;
56struct IrExecutableGen;
5357
54enum PtrLen {58enum PtrLen {
55 PtrLenUnknown,59 PtrLenUnknown,
...@@ -97,8 +101,8 @@ enum X64CABIClass {...@@ -97,8 +101,8 @@ enum X64CABIClass {
97 X64CABIClass_SSE,101 X64CABIClass_SSE,
98};102};
99103
100struct IrExecutable {104struct IrExecutableSrc {
101 ZigList<IrBasicBlock *> basic_block_list;105 ZigList<IrBasicBlockSrc *> basic_block_list;
102 Buf *name;106 Buf *name;
103 ZigFn *name_fn;107 ZigFn *name_fn;
104 size_t mem_slot_count;108 size_t mem_slot_count;
...@@ -108,8 +112,7 @@ struct IrExecutable {...@@ -108,8 +112,7 @@ struct IrExecutable {
108 ZigFn *fn_entry;112 ZigFn *fn_entry;
109 Buf *c_import_buf;113 Buf *c_import_buf;
110 AstNode *source_node;114 AstNode *source_node;
111 IrExecutable *parent_exec;115 IrExecutableGen *parent_exec;
112 IrExecutable *source_exec;
113 IrAnalyze *analysis;116 IrAnalyze *analysis;
114 Scope *begin_scope;117 Scope *begin_scope;
115 ErrorMsg *first_err_trace_msg;118 ErrorMsg *first_err_trace_msg;
...@@ -124,6 +127,32 @@ struct IrExecutable {...@@ -124,6 +127,32 @@ struct IrExecutable {
124 void src();127 void src();
125};128};
126129
130struct IrExecutableGen {
131 ZigList<IrBasicBlockGen *> basic_block_list;
132 Buf *name;
133 ZigFn *name_fn;
134 size_t mem_slot_count;
135 size_t next_debug_id;
136 size_t *backward_branch_count;
137 size_t *backward_branch_quota;
138 ZigFn *fn_entry;
139 Buf *c_import_buf;
140 AstNode *source_node;
141 IrExecutableGen *parent_exec;
142 IrExecutableSrc *source_exec;
143 Scope *begin_scope;
144 ErrorMsg *first_err_trace_msg;
145 ZigList<Tld *> tld_list;
146
147 bool is_inline;
148 bool is_generic_instantiation;
149 bool need_err_code_spill;
150
151 // This is a function for use in the debugger to print
152 // the source location.
153 void src();
154};
155
127enum OutType {156enum OutType {
128 OutTypeUnknown,157 OutTypeUnknown,
129 OutTypeExe,158 OutTypeExe,
...@@ -287,7 +316,7 @@ struct ConstErrValue {...@@ -287,7 +316,7 @@ struct ConstErrValue {
287316
288struct ConstBoundFnValue {317struct ConstBoundFnValue {
289 ZigFn *fn;318 ZigFn *fn;
290 IrInstruction *first_arg;319 IrInstGen *first_arg;
291};320};
292321
293struct ConstArgTuple {322struct ConstArgTuple {
...@@ -350,14 +379,14 @@ struct LazyValueAlignOf {...@@ -350,14 +379,14 @@ struct LazyValueAlignOf {
350 LazyValue base;379 LazyValue base;
351380
352 IrAnalyze *ira;381 IrAnalyze *ira;
353 IrInstruction *target_type;382 IrInstGen *target_type;
354};383};
355384
356struct LazyValueSizeOf {385struct LazyValueSizeOf {
357 LazyValue base;386 LazyValue base;
358387
359 IrAnalyze *ira;388 IrAnalyze *ira;
360 IrInstruction *target_type;389 IrInstGen *target_type;
361390
362 bool bit_size;391 bool bit_size;
363};392};
...@@ -366,9 +395,9 @@ struct LazyValueSliceType {...@@ -366,9 +395,9 @@ struct LazyValueSliceType {
366 LazyValue base;395 LazyValue base;
367396
368 IrAnalyze *ira;397 IrAnalyze *ira;
369 IrInstruction *sentinel; // can be null398 IrInstGen *sentinel; // can be null
370 IrInstruction *elem_type;399 IrInstGen *elem_type;
371 IrInstruction *align_inst; // can be null400 IrInstGen *align_inst; // can be null
372401
373 bool is_const;402 bool is_const;
374 bool is_volatile;403 bool is_volatile;
...@@ -379,8 +408,8 @@ struct LazyValueArrayType {...@@ -379,8 +408,8 @@ struct LazyValueArrayType {
379 LazyValue base;408 LazyValue base;
380409
381 IrAnalyze *ira;410 IrAnalyze *ira;
382 IrInstruction *sentinel; // can be null411 IrInstGen *sentinel; // can be null
383 IrInstruction *elem_type;412 IrInstGen *elem_type;
384 uint64_t length;413 uint64_t length;
385};414};
386415
...@@ -388,9 +417,9 @@ struct LazyValuePtrType {...@@ -388,9 +417,9 @@ struct LazyValuePtrType {
388 LazyValue base;417 LazyValue base;
389418
390 IrAnalyze *ira;419 IrAnalyze *ira;
391 IrInstruction *sentinel; // can be null420 IrInstGen *sentinel; // can be null
392 IrInstruction *elem_type;421 IrInstGen *elem_type;
393 IrInstruction *align_inst; // can be null422 IrInstGen *align_inst; // can be null
394423
395 PtrLen ptr_len;424 PtrLen ptr_len;
396 uint32_t bit_offset_in_host;425 uint32_t bit_offset_in_host;
...@@ -405,7 +434,7 @@ struct LazyValueOptType {...@@ -405,7 +434,7 @@ struct LazyValueOptType {
405 LazyValue base;434 LazyValue base;
406435
407 IrAnalyze *ira;436 IrAnalyze *ira;
408 IrInstruction *payload_type;437 IrInstGen *payload_type;
409};438};
410439
411struct LazyValueFnType {440struct LazyValueFnType {
...@@ -413,9 +442,9 @@ struct LazyValueFnType {...@@ -413,9 +442,9 @@ struct LazyValueFnType {
413442
414 IrAnalyze *ira;443 IrAnalyze *ira;
415 AstNode *proto_node;444 AstNode *proto_node;
416 IrInstruction **param_types;445 IrInstGen **param_types;
417 IrInstruction *align_inst; // can be null446 IrInstGen *align_inst; // can be null
418 IrInstruction *return_type;447 IrInstGen *return_type;
419448
420 CallingConvention cc;449 CallingConvention cc;
421 bool is_generic;450 bool is_generic;
...@@ -425,8 +454,8 @@ struct LazyValueErrUnionType {...@@ -425,8 +454,8 @@ struct LazyValueErrUnionType {
425 LazyValue base;454 LazyValue base;
426455
427 IrAnalyze *ira;456 IrAnalyze *ira;
428 IrInstruction *err_set_type;457 IrInstGen *err_set_type;
429 IrInstruction *payload_type;458 IrInstGen *payload_type;
430 Buf *type_name;459 Buf *type_name;
431};460};
432461
...@@ -1389,6 +1418,7 @@ struct ZigTypeEnum {...@@ -1389,6 +1418,7 @@ struct ZigTypeEnum {
1389 ContainerLayout layout;1418 ContainerLayout layout;
1390 ResolveStatus resolve_status;1419 ResolveStatus resolve_status;
13911420
1421 bool non_exhaustive;
1392 bool resolve_loop_flag;1422 bool resolve_loop_flag;
1393};1423};
13941424
...@@ -1605,19 +1635,19 @@ struct ZigFn {...@@ -1605,19 +1635,19 @@ struct ZigFn {
1605 // in the case of async functions this is the implicit return type according to the1635 // in the case of async functions this is the implicit return type according to the
1606 // zig source code, not according to zig ir1636 // zig source code, not according to zig ir
1607 ZigType *src_implicit_return_type;1637 ZigType *src_implicit_return_type;
1608 IrExecutable *ir_executable;1638 IrExecutableSrc *ir_executable;
1609 IrExecutable analyzed_executable;1639 IrExecutableGen analyzed_executable;
1610 size_t prealloc_bbc;1640 size_t prealloc_bbc;
1611 size_t prealloc_backward_branch_quota;1641 size_t prealloc_backward_branch_quota;
1612 AstNode **param_source_nodes;1642 AstNode **param_source_nodes;
1613 Buf **param_names;1643 Buf **param_names;
1614 IrInstruction *err_code_spill;1644 IrInstGen *err_code_spill;
1615 AstNode *assumed_non_async;1645 AstNode *assumed_non_async;
16161646
1617 AstNode *fn_no_inline_set_node;1647 AstNode *fn_no_inline_set_node;
1618 AstNode *fn_static_eval_set_node;1648 AstNode *fn_static_eval_set_node;
16191649
1620 ZigList<IrInstructionAllocaGen *> alloca_gen_list;1650 ZigList<IrInstGenAlloca *> alloca_gen_list;
1621 ZigList<ZigVar *> variable_list;1651 ZigList<ZigVar *> variable_list;
16221652
1623 Buf *section_name;1653 Buf *section_name;
...@@ -1629,8 +1659,8 @@ struct ZigFn {...@@ -1629,8 +1659,8 @@ struct ZigFn {
1629 AstNode *non_async_node;1659 AstNode *non_async_node;
16301660
1631 ZigList<GlobalExport> export_list;1661 ZigList<GlobalExport> export_list;
1632 ZigList<IrInstructionCallGen *> call_list;1662 ZigList<IrInstGenCall *> call_list;
1633 ZigList<IrInstructionAwaitGen *> await_list;1663 ZigList<IrInstGenAwait *> await_list;
16341664
1635 LLVMValueRef valgrind_client_request_array;1665 LLVMValueRef valgrind_client_request_array;
16361666
...@@ -2101,8 +2131,9 @@ struct CodeGen {...@@ -2101,8 +2131,9 @@ struct CodeGen {
2101 Buf *zig_c_headers_dir; // Cannot be overridden; derived from zig_lib_dir.2131 Buf *zig_c_headers_dir; // Cannot be overridden; derived from zig_lib_dir.
2102 Buf *zig_std_special_dir; // Cannot be overridden; derived from zig_lib_dir.2132 Buf *zig_std_special_dir; // Cannot be overridden; derived from zig_lib_dir.
21032133
2104 IrInstruction *invalid_instruction;2134 IrInstSrc *invalid_inst_src;
2105 IrInstruction *unreach_instruction;2135 IrInstGen *invalid_inst_gen;
2136 IrInstGen *unreach_instruction;
21062137
2107 ZigValue panic_msg_vals[PanicMsgIdCount];2138 ZigValue panic_msg_vals[PanicMsgIdCount];
21082139
...@@ -2147,6 +2178,7 @@ struct CodeGen {...@@ -2147,6 +2178,7 @@ struct CodeGen {
2147 bool verbose_llvm_ir;2178 bool verbose_llvm_ir;
2148 bool verbose_cimport;2179 bool verbose_cimport;
2149 bool verbose_cc;2180 bool verbose_cc;
2181 bool verbose_llvm_cpu_features;
2150 bool error_during_imports;2182 bool error_during_imports;
2151 bool generate_error_name_table;2183 bool generate_error_name_table;
2152 bool enable_cache; // mutually exclusive with output_dir2184 bool enable_cache; // mutually exclusive with output_dir
...@@ -2225,8 +2257,8 @@ struct ZigVar {...@@ -2225,8 +2257,8 @@ struct ZigVar {
2225 ZigValue *const_value;2257 ZigValue *const_value;
2226 ZigType *var_type;2258 ZigType *var_type;
2227 LLVMValueRef value_ref;2259 LLVMValueRef value_ref;
2228 IrInstruction *is_comptime;2260 IrInstSrc *is_comptime;
2229 IrInstruction *ptr_instruction;2261 IrInstGen *ptr_instruction;
2230 // which node is the declaration of the variable2262 // which node is the declaration of the variable
2231 AstNode *decl_node;2263 AstNode *decl_node;
2232 ZigLLVMDILocalVariable *di_loc_var;2264 ZigLLVMDILocalVariable *di_loc_var;
...@@ -2234,7 +2266,7 @@ struct ZigVar {...@@ -2234,7 +2266,7 @@ struct ZigVar {
2234 Scope *parent_scope;2266 Scope *parent_scope;
2235 Scope *child_scope;2267 Scope *child_scope;
2236 LLVMValueRef param_value_ref;2268 LLVMValueRef param_value_ref;
2237 IrExecutable *owner_exec;2269 IrExecutableSrc *owner_exec;
22382270
2239 Buf *section_name;2271 Buf *section_name;
22402272
...@@ -2325,11 +2357,11 @@ struct ScopeBlock {...@@ -2325,11 +2357,11 @@ struct ScopeBlock {
2325 Scope base;2357 Scope base;
23262358
2327 Buf *name;2359 Buf *name;
2328 IrBasicBlock *end_block;2360 IrBasicBlockSrc *end_block;
2329 IrInstruction *is_comptime;2361 IrInstSrc *is_comptime;
2330 ResultLocPeerParent *peer_parent;2362 ResultLocPeerParent *peer_parent;
2331 ZigList<IrInstruction *> *incoming_values;2363 ZigList<IrInstSrc *> *incoming_values;
2332 ZigList<IrBasicBlock *> *incoming_blocks;2364 ZigList<IrBasicBlockSrc *> *incoming_blocks;
23332365
2334 AstNode *safety_set_node;2366 AstNode *safety_set_node;
2335 AstNode *fast_math_set_node;2367 AstNode *fast_math_set_node;
...@@ -2380,11 +2412,11 @@ struct ScopeLoop {...@@ -2380,11 +2412,11 @@ struct ScopeLoop {
23802412
2381 LVal lval;2413 LVal lval;
2382 Buf *name;2414 Buf *name;
2383 IrBasicBlock *break_block;2415 IrBasicBlockSrc *break_block;
2384 IrBasicBlock *continue_block;2416 IrBasicBlockSrc *continue_block;
2385 IrInstruction *is_comptime;2417 IrInstSrc *is_comptime;
2386 ZigList<IrInstruction *> *incoming_values;2418 ZigList<IrInstSrc *> *incoming_values;
2387 ZigList<IrBasicBlock *> *incoming_blocks;2419 ZigList<IrBasicBlockSrc *> *incoming_blocks;
2388 ResultLocPeerParent *peer_parent;2420 ResultLocPeerParent *peer_parent;
2389 ScopeExpr *spill_scope;2421 ScopeExpr *spill_scope;
2390};2422};
...@@ -2395,7 +2427,7 @@ struct ScopeLoop {...@@ -2395,7 +2427,7 @@ struct ScopeLoop {
2395struct ScopeRuntime {2427struct ScopeRuntime {
2396 Scope base;2428 Scope base;
23972429
2398 IrInstruction *is_comptime;2430 IrInstSrc *is_comptime;
2399};2431};
24002432
2401// This scope is created for a suspend block in order to have labeled2433// This scope is created for a suspend block in order to have labeled
...@@ -2474,319 +2506,450 @@ enum AtomicRmwOp {...@@ -2474,319 +2506,450 @@ enum AtomicRmwOp {
2474// to another basic block.2506// to another basic block.
2475// Phi instructions must be first in a basic block.2507// Phi instructions must be first in a basic block.
2476// The last instruction in a basic block must be of type unreachable.2508// The last instruction in a basic block must be of type unreachable.
2477struct IrBasicBlock {2509struct IrBasicBlockSrc {
2478 ZigList<IrInstruction *> instruction_list;2510 ZigList<IrInstSrc *> instruction_list;
2479 IrBasicBlock *other;2511 IrBasicBlockGen *child;
2512 Scope *scope;
2513 const char *name_hint;
2514 IrInst *suspend_instruction_ref;
2515
2516 uint32_t ref_count;
2517 uint32_t index; // index into the basic block list
2518
2519 uint32_t debug_id;
2520 bool suspended;
2521 bool in_resume_stack;
2522};
2523
2524struct IrBasicBlockGen {
2525 ZigList<IrInstGen *> instruction_list;
2526 IrBasicBlockSrc *parent;
2480 Scope *scope;2527 Scope *scope;
2481 const char *name_hint;2528 const char *name_hint;
2482 size_t debug_id;2529 uint32_t index; // index into the basic block list
2483 size_t ref_count;2530 uint32_t ref_count;
2484 // index into the basic block list
2485 size_t index;
2486 LLVMBasicBlockRef llvm_block;2531 LLVMBasicBlockRef llvm_block;
2487 LLVMBasicBlockRef llvm_exit_block;2532 LLVMBasicBlockRef llvm_exit_block;
2488 // The instruction that referenced this basic block and caused us to2533 // The instruction that referenced this basic block and caused us to
2489 // analyze the basic block. If the same instruction wants us to emit2534 // analyze the basic block. If the same instruction wants us to emit
2490 // the same basic block, then we re-generate it instead of saving it.2535 // the same basic block, then we re-generate it instead of saving it.
2491 IrInstruction *ref_instruction;2536 IrInst *ref_instruction;
2492 // When this is non-null, a branch to this basic block is only allowed2537 // When this is non-null, a branch to this basic block is only allowed
2493 // if the branch is comptime. The instruction points to the reason2538 // if the branch is comptime. The instruction points to the reason
2494 // the basic block must be comptime.2539 // the basic block must be comptime.
2495 IrInstruction *must_be_comptime_source_instr;2540 IrInst *must_be_comptime_source_instr;
2496 IrInstruction *suspend_instruction_ref;2541
2542 uint32_t debug_id;
2497 bool already_appended;2543 bool already_appended;
2498 bool suspended;
2499 bool in_resume_stack;
2500};2544};
25012545
2502// These instructions are in transition to having "pass 1" instructions
2503// and "pass 2" instructions. The pass 1 instructions are suffixed with Src
2504// and pass 2 are suffixed with Gen.
2505// Once all instructions are separated in this way, they'll have different
2506// base types for better type safety.
2507// Src instructions are generated by ir_gen_* functions in ir.cpp from AST.2546// Src instructions are generated by ir_gen_* functions in ir.cpp from AST.
2508// ir_analyze_* functions consume Src instructions and produce Gen instructions.2547// ir_analyze_* functions consume Src instructions and produce Gen instructions.
2548// Src instructions do not have type information; Gen instructions do.
2549enum IrInstSrcId {
2550 IrInstSrcIdInvalid,
2551 IrInstSrcIdDeclVar,
2552 IrInstSrcIdBr,
2553 IrInstSrcIdCondBr,
2554 IrInstSrcIdSwitchBr,
2555 IrInstSrcIdSwitchVar,
2556 IrInstSrcIdSwitchElseVar,
2557 IrInstSrcIdSwitchTarget,
2558 IrInstSrcIdPhi,
2559 IrInstSrcIdUnOp,
2560 IrInstSrcIdBinOp,
2561 IrInstSrcIdMergeErrSets,
2562 IrInstSrcIdLoadPtr,
2563 IrInstSrcIdStorePtr,
2564 IrInstSrcIdFieldPtr,
2565 IrInstSrcIdElemPtr,
2566 IrInstSrcIdVarPtr,
2567 IrInstSrcIdCall,
2568 IrInstSrcIdCallArgs,
2569 IrInstSrcIdCallExtra,
2570 IrInstSrcIdConst,
2571 IrInstSrcIdReturn,
2572 IrInstSrcIdContainerInitList,
2573 IrInstSrcIdContainerInitFields,
2574 IrInstSrcIdUnreachable,
2575 IrInstSrcIdTypeOf,
2576 IrInstSrcIdSetCold,
2577 IrInstSrcIdSetRuntimeSafety,
2578 IrInstSrcIdSetFloatMode,
2579 IrInstSrcIdArrayType,
2580 IrInstSrcIdAnyFrameType,
2581 IrInstSrcIdSliceType,
2582 IrInstSrcIdAsm,
2583 IrInstSrcIdSizeOf,
2584 IrInstSrcIdTestNonNull,
2585 IrInstSrcIdOptionalUnwrapPtr,
2586 IrInstSrcIdClz,
2587 IrInstSrcIdCtz,
2588 IrInstSrcIdPopCount,
2589 IrInstSrcIdBswap,
2590 IrInstSrcIdBitReverse,
2591 IrInstSrcIdImport,
2592 IrInstSrcIdCImport,
2593 IrInstSrcIdCInclude,
2594 IrInstSrcIdCDefine,
2595 IrInstSrcIdCUndef,
2596 IrInstSrcIdRef,
2597 IrInstSrcIdCompileErr,
2598 IrInstSrcIdCompileLog,
2599 IrInstSrcIdErrName,
2600 IrInstSrcIdEmbedFile,
2601 IrInstSrcIdCmpxchg,
2602 IrInstSrcIdFence,
2603 IrInstSrcIdTruncate,
2604 IrInstSrcIdIntCast,
2605 IrInstSrcIdFloatCast,
2606 IrInstSrcIdIntToFloat,
2607 IrInstSrcIdFloatToInt,
2608 IrInstSrcIdBoolToInt,
2609 IrInstSrcIdIntType,
2610 IrInstSrcIdVectorType,
2611 IrInstSrcIdShuffleVector,
2612 IrInstSrcIdSplat,
2613 IrInstSrcIdBoolNot,
2614 IrInstSrcIdMemset,
2615 IrInstSrcIdMemcpy,
2616 IrInstSrcIdSlice,
2617 IrInstSrcIdMemberCount,
2618 IrInstSrcIdMemberType,
2619 IrInstSrcIdMemberName,
2620 IrInstSrcIdBreakpoint,
2621 IrInstSrcIdReturnAddress,
2622 IrInstSrcIdFrameAddress,
2623 IrInstSrcIdFrameHandle,
2624 IrInstSrcIdFrameType,
2625 IrInstSrcIdFrameSize,
2626 IrInstSrcIdAlignOf,
2627 IrInstSrcIdOverflowOp,
2628 IrInstSrcIdTestErr,
2629 IrInstSrcIdMulAdd,
2630 IrInstSrcIdFloatOp,
2631 IrInstSrcIdUnwrapErrCode,
2632 IrInstSrcIdUnwrapErrPayload,
2633 IrInstSrcIdFnProto,
2634 IrInstSrcIdTestComptime,
2635 IrInstSrcIdPtrCast,
2636 IrInstSrcIdBitCast,
2637 IrInstSrcIdIntToPtr,
2638 IrInstSrcIdPtrToInt,
2639 IrInstSrcIdIntToEnum,
2640 IrInstSrcIdEnumToInt,
2641 IrInstSrcIdIntToErr,
2642 IrInstSrcIdErrToInt,
2643 IrInstSrcIdCheckSwitchProngs,
2644 IrInstSrcIdCheckStatementIsVoid,
2645 IrInstSrcIdTypeName,
2646 IrInstSrcIdDeclRef,
2647 IrInstSrcIdPanic,
2648 IrInstSrcIdTagName,
2649 IrInstSrcIdTagType,
2650 IrInstSrcIdFieldParentPtr,
2651 IrInstSrcIdByteOffsetOf,
2652 IrInstSrcIdBitOffsetOf,
2653 IrInstSrcIdTypeInfo,
2654 IrInstSrcIdType,
2655 IrInstSrcIdHasField,
2656 IrInstSrcIdTypeId,
2657 IrInstSrcIdSetEvalBranchQuota,
2658 IrInstSrcIdPtrType,
2659 IrInstSrcIdAlignCast,
2660 IrInstSrcIdImplicitCast,
2661 IrInstSrcIdResolveResult,
2662 IrInstSrcIdResetResult,
2663 IrInstSrcIdOpaqueType,
2664 IrInstSrcIdSetAlignStack,
2665 IrInstSrcIdArgType,
2666 IrInstSrcIdExport,
2667 IrInstSrcIdErrorReturnTrace,
2668 IrInstSrcIdErrorUnion,
2669 IrInstSrcIdAtomicRmw,
2670 IrInstSrcIdAtomicLoad,
2671 IrInstSrcIdAtomicStore,
2672 IrInstSrcIdSaveErrRetAddr,
2673 IrInstSrcIdAddImplicitReturnType,
2674 IrInstSrcIdErrSetCast,
2675 IrInstSrcIdToBytes,
2676 IrInstSrcIdFromBytes,
2677 IrInstSrcIdCheckRuntimeScope,
2678 IrInstSrcIdHasDecl,
2679 IrInstSrcIdUndeclaredIdent,
2680 IrInstSrcIdAlloca,
2681 IrInstSrcIdEndExpr,
2682 IrInstSrcIdUnionInitNamedField,
2683 IrInstSrcIdSuspendBegin,
2684 IrInstSrcIdSuspendFinish,
2685 IrInstSrcIdAwait,
2686 IrInstSrcIdResume,
2687 IrInstSrcIdSpillBegin,
2688 IrInstSrcIdSpillEnd,
2689};
2690
2509// ir_render_* functions in codegen.cpp consume Gen instructions and produce LLVM IR.2691// ir_render_* functions in codegen.cpp consume Gen instructions and produce LLVM IR.
2510// Src instructions do not have type information; Gen instructions do.2692// Src instructions do not have type information; Gen instructions do.
2511enum IrInstructionId {2693enum IrInstGenId {
2512 IrInstructionIdInvalid,2694 IrInstGenIdInvalid,
2513 IrInstructionIdDeclVarSrc,2695 IrInstGenIdDeclVar,
2514 IrInstructionIdDeclVarGen,2696 IrInstGenIdBr,
2515 IrInstructionIdBr,2697 IrInstGenIdCondBr,
2516 IrInstructionIdCondBr,2698 IrInstGenIdSwitchBr,
2517 IrInstructionIdSwitchBr,2699 IrInstGenIdPhi,
2518 IrInstructionIdSwitchVar,2700 IrInstGenIdBinaryNot,
2519 IrInstructionIdSwitchElseVar,2701 IrInstGenIdNegation,
2520 IrInstructionIdSwitchTarget,2702 IrInstGenIdNegationWrapping,
2521 IrInstructionIdPhi,2703 IrInstGenIdBinOp,
2522 IrInstructionIdUnOp,2704 IrInstGenIdLoadPtr,
2523 IrInstructionIdBinOp,2705 IrInstGenIdStorePtr,
2524 IrInstructionIdMergeErrSets,2706 IrInstGenIdVectorStoreElem,
2525 IrInstructionIdLoadPtr,2707 IrInstGenIdStructFieldPtr,
2526 IrInstructionIdLoadPtrGen,2708 IrInstGenIdUnionFieldPtr,
2527 IrInstructionIdStorePtr,2709 IrInstGenIdElemPtr,
2528 IrInstructionIdVectorStoreElem,2710 IrInstGenIdVarPtr,
2529 IrInstructionIdFieldPtr,2711 IrInstGenIdReturnPtr,
2530 IrInstructionIdStructFieldPtr,2712 IrInstGenIdCall,
2531 IrInstructionIdUnionFieldPtr,2713 IrInstGenIdReturn,
2532 IrInstructionIdElemPtr,2714 IrInstGenIdCast,
2533 IrInstructionIdVarPtr,2715 IrInstGenIdResizeSlice,
2534 IrInstructionIdReturnPtr,2716 IrInstGenIdUnreachable,
2535 IrInstructionIdCallSrc,2717 IrInstGenIdAsm,
2536 IrInstructionIdCallSrcArgs,2718 IrInstGenIdTestNonNull,
2537 IrInstructionIdCallExtra,2719 IrInstGenIdOptionalUnwrapPtr,
2538 IrInstructionIdCallGen,2720 IrInstGenIdOptionalWrap,
2539 IrInstructionIdConst,2721 IrInstGenIdUnionTag,
2540 IrInstructionIdReturn,2722 IrInstGenIdClz,
2541 IrInstructionIdCast,2723 IrInstGenIdCtz,
2542 IrInstructionIdResizeSlice,2724 IrInstGenIdPopCount,
2543 IrInstructionIdContainerInitList,2725 IrInstGenIdBswap,
2544 IrInstructionIdContainerInitFields,2726 IrInstGenIdBitReverse,
2545 IrInstructionIdUnreachable,2727 IrInstGenIdRef,
2546 IrInstructionIdTypeOf,2728 IrInstGenIdErrName,
2547 IrInstructionIdSetCold,2729 IrInstGenIdCmpxchg,
2548 IrInstructionIdSetRuntimeSafety,2730 IrInstGenIdFence,
2549 IrInstructionIdSetFloatMode,2731 IrInstGenIdTruncate,
2550 IrInstructionIdArrayType,2732 IrInstGenIdShuffleVector,
2551 IrInstructionIdAnyFrameType,2733 IrInstGenIdSplat,
2552 IrInstructionIdSliceType,2734 IrInstGenIdBoolNot,
2553 IrInstructionIdAsmSrc,2735 IrInstGenIdMemset,
2554 IrInstructionIdAsmGen,2736 IrInstGenIdMemcpy,
2555 IrInstructionIdSizeOf,2737 IrInstGenIdSlice,
2556 IrInstructionIdTestNonNull,2738 IrInstGenIdBreakpoint,
2557 IrInstructionIdOptionalUnwrapPtr,2739 IrInstGenIdReturnAddress,
2558 IrInstructionIdOptionalWrap,2740 IrInstGenIdFrameAddress,
2559 IrInstructionIdUnionTag,2741 IrInstGenIdFrameHandle,
2560 IrInstructionIdClz,2742 IrInstGenIdFrameSize,
2561 IrInstructionIdCtz,2743 IrInstGenIdOverflowOp,
2562 IrInstructionIdPopCount,2744 IrInstGenIdTestErr,
2563 IrInstructionIdBswap,2745 IrInstGenIdMulAdd,
2564 IrInstructionIdBitReverse,2746 IrInstGenIdFloatOp,
2565 IrInstructionIdImport,2747 IrInstGenIdUnwrapErrCode,
2566 IrInstructionIdCImport,2748 IrInstGenIdUnwrapErrPayload,
2567 IrInstructionIdCInclude,2749 IrInstGenIdErrWrapCode,
2568 IrInstructionIdCDefine,2750 IrInstGenIdErrWrapPayload,
2569 IrInstructionIdCUndef,2751 IrInstGenIdPtrCast,
2570 IrInstructionIdRef,2752 IrInstGenIdBitCast,
2571 IrInstructionIdRefGen,2753 IrInstGenIdWidenOrShorten,
2572 IrInstructionIdCompileErr,2754 IrInstGenIdIntToPtr,
2573 IrInstructionIdCompileLog,2755 IrInstGenIdPtrToInt,
2574 IrInstructionIdErrName,2756 IrInstGenIdIntToEnum,
2575 IrInstructionIdEmbedFile,2757 IrInstGenIdIntToErr,
2576 IrInstructionIdCmpxchgSrc,2758 IrInstGenIdErrToInt,
2577 IrInstructionIdCmpxchgGen,2759 IrInstGenIdPanic,
2578 IrInstructionIdFence,2760 IrInstGenIdTagName,
2579 IrInstructionIdTruncate,2761 IrInstGenIdFieldParentPtr,
2580 IrInstructionIdIntCast,2762 IrInstGenIdAlignCast,
2581 IrInstructionIdFloatCast,2763 IrInstGenIdErrorReturnTrace,
2582 IrInstructionIdIntToFloat,2764 IrInstGenIdAtomicRmw,
2583 IrInstructionIdFloatToInt,2765 IrInstGenIdAtomicLoad,
2584 IrInstructionIdBoolToInt,2766 IrInstGenIdAtomicStore,
2585 IrInstructionIdIntType,2767 IrInstGenIdSaveErrRetAddr,
2586 IrInstructionIdVectorType,2768 IrInstGenIdVectorToArray,
2587 IrInstructionIdShuffleVector,2769 IrInstGenIdArrayToVector,
2588 IrInstructionIdSplatSrc,2770 IrInstGenIdAssertZero,
2589 IrInstructionIdSplatGen,2771 IrInstGenIdAssertNonNull,
2590 IrInstructionIdBoolNot,2772 IrInstGenIdPtrOfArrayToSlice,
2591 IrInstructionIdMemset,2773 IrInstGenIdSuspendBegin,
2592 IrInstructionIdMemcpy,2774 IrInstGenIdSuspendFinish,
2593 IrInstructionIdSliceSrc,2775 IrInstGenIdAwait,
2594 IrInstructionIdSliceGen,2776 IrInstGenIdResume,
2595 IrInstructionIdMemberCount,2777 IrInstGenIdSpillBegin,
2596 IrInstructionIdMemberType,2778 IrInstGenIdSpillEnd,
2597 IrInstructionIdMemberName,2779 IrInstGenIdVectorExtractElem,
2598 IrInstructionIdBreakpoint,2780 IrInstGenIdAlloca,
2599 IrInstructionIdReturnAddress,2781 IrInstGenIdConst,
2600 IrInstructionIdFrameAddress,2782};
2601 IrInstructionIdFrameHandle,2783
2602 IrInstructionIdFrameType,2784// Common fields between IrInstSrc and IrInstGen. This allows future passes
2603 IrInstructionIdFrameSizeSrc,2785// after pass2 to be added to zig.
2604 IrInstructionIdFrameSizeGen,2786struct IrInst {
2605 IrInstructionIdAlignOf,
2606 IrInstructionIdOverflowOp,
2607 IrInstructionIdTestErrSrc,
2608 IrInstructionIdTestErrGen,
2609 IrInstructionIdMulAdd,
2610 IrInstructionIdFloatOp,
2611 IrInstructionIdUnwrapErrCode,
2612 IrInstructionIdUnwrapErrPayload,
2613 IrInstructionIdErrWrapCode,
2614 IrInstructionIdErrWrapPayload,
2615 IrInstructionIdFnProto,
2616 IrInstructionIdTestComptime,
2617 IrInstructionIdPtrCastSrc,
2618 IrInstructionIdPtrCastGen,
2619 IrInstructionIdBitCastSrc,
2620 IrInstructionIdBitCastGen,
2621 IrInstructionIdWidenOrShorten,
2622 IrInstructionIdIntToPtr,
2623 IrInstructionIdPtrToInt,
2624 IrInstructionIdIntToEnum,
2625 IrInstructionIdEnumToInt,
2626 IrInstructionIdIntToErr,
2627 IrInstructionIdErrToInt,
2628 IrInstructionIdCheckSwitchProngs,
2629 IrInstructionIdCheckStatementIsVoid,
2630 IrInstructionIdTypeName,
2631 IrInstructionIdDeclRef,
2632 IrInstructionIdPanic,
2633 IrInstructionIdTagName,
2634 IrInstructionIdTagType,
2635 IrInstructionIdFieldParentPtr,
2636 IrInstructionIdByteOffsetOf,
2637 IrInstructionIdBitOffsetOf,
2638 IrInstructionIdTypeInfo,
2639 IrInstructionIdType,
2640 IrInstructionIdHasField,
2641 IrInstructionIdTypeId,
2642 IrInstructionIdSetEvalBranchQuota,
2643 IrInstructionIdPtrType,
2644 IrInstructionIdAlignCast,
2645 IrInstructionIdImplicitCast,
2646 IrInstructionIdResolveResult,
2647 IrInstructionIdResetResult,
2648 IrInstructionIdOpaqueType,
2649 IrInstructionIdSetAlignStack,
2650 IrInstructionIdArgType,
2651 IrInstructionIdExport,
2652 IrInstructionIdErrorReturnTrace,
2653 IrInstructionIdErrorUnion,
2654 IrInstructionIdAtomicRmw,
2655 IrInstructionIdAtomicLoad,
2656 IrInstructionIdAtomicStore,
2657 IrInstructionIdSaveErrRetAddr,
2658 IrInstructionIdAddImplicitReturnType,
2659 IrInstructionIdErrSetCast,
2660 IrInstructionIdToBytes,
2661 IrInstructionIdFromBytes,
2662 IrInstructionIdCheckRuntimeScope,
2663 IrInstructionIdVectorToArray,
2664 IrInstructionIdArrayToVector,
2665 IrInstructionIdAssertZero,
2666 IrInstructionIdAssertNonNull,
2667 IrInstructionIdHasDecl,
2668 IrInstructionIdUndeclaredIdent,
2669 IrInstructionIdAllocaSrc,
2670 IrInstructionIdAllocaGen,
2671 IrInstructionIdEndExpr,
2672 IrInstructionIdPtrOfArrayToSlice,
2673 IrInstructionIdUnionInitNamedField,
2674 IrInstructionIdSuspendBegin,
2675 IrInstructionIdSuspendFinish,
2676 IrInstructionIdAwaitSrc,
2677 IrInstructionIdAwaitGen,
2678 IrInstructionIdResume,
2679 IrInstructionIdSpillBegin,
2680 IrInstructionIdSpillEnd,
2681 IrInstructionIdVectorExtractElem,
2682};
2683
2684struct IrInstruction {
2685 Scope *scope;
2686 AstNode *source_node;
2687 LLVMValueRef llvm_value;
2688 ZigValue *value;
2689 uint32_t debug_id;
2690 // if ref_count is zero and the instruction has no side effects,2787 // if ref_count is zero and the instruction has no side effects,
2691 // the instruction can be omitted in codegen2788 // the instruction can be omitted in codegen
2692 uint32_t ref_count;2789 uint32_t ref_count;
2790 uint32_t debug_id;
2791
2792 Scope *scope;
2793 AstNode *source_node;
2794
2795 // for debugging purposes, these are useful to call to inspect the instruction
2796 void dump();
2797 void src();
2798};
2799
2800struct IrInstSrc {
2801 IrInst base;
2802
2803 IrInstSrcId id;
2804 // true if this instruction was generated by zig and not from user code
2805 // this matters for the "unreachable code" compile error
2806 bool is_gen;
2807 bool is_noreturn;
2808
2693 // When analyzing IR, instructions that point to this instruction in the "old ir"2809 // When analyzing IR, instructions that point to this instruction in the "old ir"
2694 // can find the instruction that corresponds to this value in the "new ir"2810 // can find the instruction that corresponds to this value in the "new ir"
2695 // with this child field.2811 // with this child field.
2696 IrInstruction *child;2812 IrInstGen *child;
2697 IrBasicBlock *owner_bb;2813 IrBasicBlockSrc *owner_bb;
2814
2815 // for debugging purposes, these are useful to call to inspect the instruction
2816 void dump();
2817 void src();
2818};
2819
2820struct IrInstGen {
2821 IrInst base;
2822
2823 IrInstGenId id;
2824
2825 LLVMValueRef llvm_value;
2826 ZigValue *value;
2827 IrBasicBlockGen *owner_bb;
2698 // Nearly any instruction can have to be stored as a local variable before suspending2828 // Nearly any instruction can have to be stored as a local variable before suspending
2699 // and then loaded after resuming, in case there is an expression with a suspend point2829 // and then loaded after resuming, in case there is an expression with a suspend point
2700 // in it, such as: x + await y2830 // in it, such as: x + await y
2701 IrInstruction *spill;2831 IrInstGen *spill;
2702 IrInstructionId id;
2703 // true if this instruction was generated by zig and not from user code
2704 bool is_gen;
27052832
2706 // for debugging purposes, these are useful to call to inspect the instruction2833 // for debugging purposes, these are useful to call to inspect the instruction
2707 void dump();2834 void dump();
2708 void src();2835 void src();
2709};2836};
27102837
2711struct IrInstructionDeclVarSrc {2838struct IrInstSrcDeclVar {
2712 IrInstruction base;2839 IrInstSrc base;
27132840
2714 ZigVar *var;2841 ZigVar *var;
2715 IrInstruction *var_type;2842 IrInstSrc *var_type;
2716 IrInstruction *align_value;2843 IrInstSrc *align_value;
2717 IrInstruction *ptr;2844 IrInstSrc *ptr;
2718};2845};
27192846
2720struct IrInstructionDeclVarGen {2847struct IrInstGenDeclVar {
2721 IrInstruction base;2848 IrInstGen base;
27222849
2723 ZigVar *var;2850 ZigVar *var;
2724 IrInstruction *var_ptr;2851 IrInstGen *var_ptr;
2725};2852};
27262853
2727struct IrInstructionCondBr {2854struct IrInstSrcCondBr {
2728 IrInstruction base;2855 IrInstSrc base;
27292856
2730 IrInstruction *condition;2857 IrInstSrc *condition;
2731 IrBasicBlock *then_block;2858 IrBasicBlockSrc *then_block;
2732 IrBasicBlock *else_block;2859 IrBasicBlockSrc *else_block;
2733 IrInstruction *is_comptime;2860 IrInstSrc *is_comptime;
2734 ResultLoc *result_loc;2861 ResultLoc *result_loc;
2735};2862};
27362863
2737struct IrInstructionBr {2864struct IrInstGenCondBr {
2738 IrInstruction base;2865 IrInstGen base;
2866
2867 IrInstGen *condition;
2868 IrBasicBlockGen *then_block;
2869 IrBasicBlockGen *else_block;
2870};
2871
2872struct IrInstSrcBr {
2873 IrInstSrc base;
2874
2875 IrBasicBlockSrc *dest_block;
2876 IrInstSrc *is_comptime;
2877};
2878
2879struct IrInstGenBr {
2880 IrInstGen base;
2881
2882 IrBasicBlockGen *dest_block;
2883};
2884
2885struct IrInstSrcSwitchBrCase {
2886 IrInstSrc *value;
2887 IrBasicBlockSrc *block;
2888};
2889
2890struct IrInstSrcSwitchBr {
2891 IrInstSrc base;
27392892
2740 IrBasicBlock *dest_block;2893 IrInstSrc *target_value;
2741 IrInstruction *is_comptime;2894 IrBasicBlockSrc *else_block;
2895 size_t case_count;
2896 IrInstSrcSwitchBrCase *cases;
2897 IrInstSrc *is_comptime;
2898 IrInstSrc *switch_prongs_void;
2742};2899};
27432900
2744struct IrInstructionSwitchBrCase {2901struct IrInstGenSwitchBrCase {
2745 IrInstruction *value;2902 IrInstGen *value;
2746 IrBasicBlock *block;2903 IrBasicBlockGen *block;
2747};2904};
27482905
2749struct IrInstructionSwitchBr {2906struct IrInstGenSwitchBr {
2750 IrInstruction base;2907 IrInstGen base;
27512908
2752 IrInstruction *target_value;2909 IrInstGen *target_value;
2753 IrBasicBlock *else_block;2910 IrBasicBlockGen *else_block;
2754 size_t case_count;2911 size_t case_count;
2755 IrInstructionSwitchBrCase *cases;2912 IrInstGenSwitchBrCase *cases;
2756 IrInstruction *is_comptime;
2757 IrInstruction *switch_prongs_void;
2758};2913};
27592914
2760struct IrInstructionSwitchVar {2915struct IrInstSrcSwitchVar {
2761 IrInstruction base;2916 IrInstSrc base;
27622917
2763 IrInstruction *target_value_ptr;2918 IrInstSrc *target_value_ptr;
2764 IrInstruction **prongs_ptr;2919 IrInstSrc **prongs_ptr;
2765 size_t prongs_len;2920 size_t prongs_len;
2766};2921};
27672922
2768struct IrInstructionSwitchElseVar {2923struct IrInstSrcSwitchElseVar {
2769 IrInstruction base;2924 IrInstSrc base;
27702925
2771 IrInstruction *target_value_ptr;2926 IrInstSrc *target_value_ptr;
2772 IrInstructionSwitchBr *switch_br;2927 IrInstSrcSwitchBr *switch_br;
2773};2928};
27742929
2775struct IrInstructionSwitchTarget {2930struct IrInstSrcSwitchTarget {
2776 IrInstruction base;2931 IrInstSrc base;
27772932
2778 IrInstruction *target_value_ptr;2933 IrInstSrc *target_value_ptr;
2779};2934};
27802935
2781struct IrInstructionPhi {2936struct IrInstSrcPhi {
2782 IrInstruction base;2937 IrInstSrc base;
27832938
2784 size_t incoming_count;2939 size_t incoming_count;
2785 IrBasicBlock **incoming_blocks;2940 IrBasicBlockSrc **incoming_blocks;
2786 IrInstruction **incoming_values;2941 IrInstSrc **incoming_values;
2787 ResultLocPeerParent *peer_parent;2942 ResultLocPeerParent *peer_parent;
2788};2943};
27892944
2945struct IrInstGenPhi {
2946 IrInstGen base;
2947
2948 size_t incoming_count;
2949 IrBasicBlockGen **incoming_blocks;
2950 IrInstGen **incoming_values;
2951};
2952
2790enum IrUnOp {2953enum IrUnOp {
2791 IrUnOpInvalid,2954 IrUnOpInvalid,
2792 IrUnOpBinNot,2955 IrUnOpBinNot,
...@@ -2796,15 +2959,30 @@ enum IrUnOp {...@@ -2796,15 +2959,30 @@ enum IrUnOp {
2796 IrUnOpOptional,2959 IrUnOpOptional,
2797};2960};
27982961
2799struct IrInstructionUnOp {2962struct IrInstSrcUnOp {
2800 IrInstruction base;2963 IrInstSrc base;
28012964
2802 IrUnOp op_id;2965 IrUnOp op_id;
2803 LVal lval;2966 LVal lval;
2804 IrInstruction *value;2967 IrInstSrc *value;
2805 ResultLoc *result_loc;2968 ResultLoc *result_loc;
2806};2969};
28072970
2971struct IrInstGenBinaryNot {
2972 IrInstGen base;
2973 IrInstGen *operand;
2974};
2975
2976struct IrInstGenNegation {
2977 IrInstGen base;
2978 IrInstGen *operand;
2979};
2980
2981struct IrInstGenNegationWrapping {
2982 IrInstGen base;
2983 IrInstGen *operand;
2984};
2985
2808enum IrBinOp {2986enum IrBinOp {
2809 IrBinOpInvalid,2987 IrBinOpInvalid,
2810 IrBinOpBoolOr,2988 IrBinOpBoolOr,
...@@ -2839,113 +3017,144 @@ enum IrBinOp {...@@ -2839,113 +3017,144 @@ enum IrBinOp {
2839 IrBinOpArrayMult,3017 IrBinOpArrayMult,
2840};3018};
28413019
2842struct IrInstructionBinOp {3020struct IrInstSrcBinOp {
2843 IrInstruction base;3021 IrInstSrc base;
3022
3023 IrInstSrc *op1;
3024 IrInstSrc *op2;
3025 IrBinOp op_id;
3026 bool safety_check_on;
3027};
3028
3029struct IrInstGenBinOp {
3030 IrInstGen base;
28443031
2845 IrInstruction *op1;3032 IrInstGen *op1;
2846 IrInstruction *op2;3033 IrInstGen *op2;
2847 IrBinOp op_id;3034 IrBinOp op_id;
2848 bool safety_check_on;3035 bool safety_check_on;
2849};3036};
28503037
2851struct IrInstructionMergeErrSets {3038struct IrInstSrcMergeErrSets {
2852 IrInstruction base;3039 IrInstSrc base;
28533040
2854 IrInstruction *op1;3041 IrInstSrc *op1;
2855 IrInstruction *op2;3042 IrInstSrc *op2;
2856 Buf *type_name;3043 Buf *type_name;
2857};3044};
28583045
2859struct IrInstructionLoadPtr {3046struct IrInstSrcLoadPtr {
2860 IrInstruction base;3047 IrInstSrc base;
28613048
2862 IrInstruction *ptr;3049 IrInstSrc *ptr;
2863};3050};
28643051
2865struct IrInstructionLoadPtrGen {3052struct IrInstGenLoadPtr {
2866 IrInstruction base;3053 IrInstGen base;
28673054
2868 IrInstruction *ptr;3055 IrInstGen *ptr;
2869 IrInstruction *result_loc;3056 IrInstGen *result_loc;
2870};3057};
28713058
2872struct IrInstructionStorePtr {3059struct IrInstSrcStorePtr {
2873 IrInstruction base;3060 IrInstSrc base;
3061
3062 IrInstSrc *ptr;
3063 IrInstSrc *value;
28743064
2875 bool allow_write_through_const;3065 bool allow_write_through_const;
2876 IrInstruction *ptr;
2877 IrInstruction *value;
2878};3066};
28793067
2880struct IrInstructionVectorStoreElem {3068struct IrInstGenStorePtr {
2881 IrInstruction base;3069 IrInstGen base;
28823070
2883 IrInstruction *vector_ptr;3071 IrInstGen *ptr;
2884 IrInstruction *index;3072 IrInstGen *value;
2885 IrInstruction *value;
2886};3073};
28873074
2888struct IrInstructionFieldPtr {3075struct IrInstGenVectorStoreElem {
2889 IrInstruction base;3076 IrInstGen base;
28903077
2891 bool initializing;3078 IrInstGen *vector_ptr;
2892 IrInstruction *container_ptr;3079 IrInstGen *index;
3080 IrInstGen *value;
3081};
3082
3083struct IrInstSrcFieldPtr {
3084 IrInstSrc base;
3085
3086 IrInstSrc *container_ptr;
2893 Buf *field_name_buffer;3087 Buf *field_name_buffer;
2894 IrInstruction *field_name_expr;3088 IrInstSrc *field_name_expr;
3089 bool initializing;
2895};3090};
28963091
2897struct IrInstructionStructFieldPtr {3092struct IrInstGenStructFieldPtr {
2898 IrInstruction base;3093 IrInstGen base;
28993094
2900 IrInstruction *struct_ptr;3095 IrInstGen *struct_ptr;
2901 TypeStructField *field;3096 TypeStructField *field;
2902 bool is_const;3097 bool is_const;
2903};3098};
29043099
2905struct IrInstructionUnionFieldPtr {3100struct IrInstGenUnionFieldPtr {
2906 IrInstruction base;3101 IrInstGen base;
29073102
3103 IrInstGen *union_ptr;
3104 TypeUnionField *field;
2908 bool safety_check_on;3105 bool safety_check_on;
2909 bool initializing;3106 bool initializing;
2910 IrInstruction *union_ptr;
2911 TypeUnionField *field;
2912};3107};
29133108
2914struct IrInstructionElemPtr {3109struct IrInstSrcElemPtr {
2915 IrInstruction base;3110 IrInstSrc base;
29163111
2917 IrInstruction *array_ptr;3112 IrInstSrc *array_ptr;
2918 IrInstruction *elem_index;3113 IrInstSrc *elem_index;
2919 AstNode *init_array_type_source_node;3114 AstNode *init_array_type_source_node;
2920 PtrLen ptr_len;3115 PtrLen ptr_len;
2921 bool safety_check_on;3116 bool safety_check_on;
2922};3117};
29233118
2924struct IrInstructionVarPtr {3119struct IrInstGenElemPtr {
2925 IrInstruction base;3120 IrInstGen base;
3121
3122 IrInstGen *array_ptr;
3123 IrInstGen *elem_index;
3124 bool safety_check_on;
3125};
3126
3127struct IrInstSrcVarPtr {
3128 IrInstSrc base;
29263129
2927 ZigVar *var;3130 ZigVar *var;
2928 ScopeFnDef *crossed_fndef_scope;3131 ScopeFnDef *crossed_fndef_scope;
2929};3132};
29303133
3134struct IrInstGenVarPtr {
3135 IrInstGen base;
3136
3137 ZigVar *var;
3138};
3139
2931// For functions that have a return type for which handle_is_ptr is true, a3140// For functions that have a return type for which handle_is_ptr is true, a
2932// result location pointer is the secret first parameter ("sret"). This3141// result location pointer is the secret first parameter ("sret"). This
2933// instruction returns that pointer.3142// instruction returns that pointer.
2934struct IrInstructionReturnPtr {3143struct IrInstGenReturnPtr {
2935 IrInstruction base;3144 IrInstGen base;
2936};3145};
29373146
2938struct IrInstructionCallSrc {3147struct IrInstSrcCall {
2939 IrInstruction base;3148 IrInstSrc base;
29403149
2941 IrInstruction *fn_ref;3150 IrInstSrc *fn_ref;
2942 ZigFn *fn_entry;3151 ZigFn *fn_entry;
2943 size_t arg_count;3152 size_t arg_count;
2944 IrInstruction **args;3153 IrInstSrc **args;
2945 IrInstruction *ret_ptr;3154 IrInstSrc *ret_ptr;
2946 ResultLoc *result_loc;3155 ResultLoc *result_loc;
29473156
2948 IrInstruction *new_stack;3157 IrInstSrc *new_stack;
29493158
2950 CallModifier modifier;3159 CallModifier modifier;
2951 bool is_async_call_builtin;3160 bool is_async_call_builtin;
...@@ -2953,12 +3162,12 @@ struct IrInstructionCallSrc {...@@ -2953,12 +3162,12 @@ struct IrInstructionCallSrc {
29533162
2954// This is a pass1 instruction, used by @call when the args node is3163// This is a pass1 instruction, used by @call when the args node is
2955// a tuple or struct literal.3164// a tuple or struct literal.
2956struct IrInstructionCallSrcArgs {3165struct IrInstSrcCallArgs {
2957 IrInstruction base;3166 IrInstSrc base;
29583167
2959 IrInstruction *options;3168 IrInstSrc *options;
2960 IrInstruction *fn_ref;3169 IrInstSrc *fn_ref;
2961 IrInstruction **args_ptr;3170 IrInstSrc **args_ptr;
2962 size_t args_len;3171 size_t args_len;
2963 ResultLoc *result_loc;3172 ResultLoc *result_loc;
2964};3173};
...@@ -2966,42 +3175,54 @@ struct IrInstructionCallSrcArgs {...@@ -2966,42 +3175,54 @@ struct IrInstructionCallSrcArgs {
2966// This is a pass1 instruction, used by @call, when the args node3175// This is a pass1 instruction, used by @call, when the args node
2967// is not a literal.3176// is not a literal.
2968// `args` is expected to be either a struct or a tuple.3177// `args` is expected to be either a struct or a tuple.
2969struct IrInstructionCallExtra {3178struct IrInstSrcCallExtra {
2970 IrInstruction base;3179 IrInstSrc base;
29713180
2972 IrInstruction *options;3181 IrInstSrc *options;
2973 IrInstruction *fn_ref;3182 IrInstSrc *fn_ref;
2974 IrInstruction *args;3183 IrInstSrc *args;
2975 ResultLoc *result_loc;3184 ResultLoc *result_loc;
2976};3185};
29773186
2978struct IrInstructionCallGen {3187struct IrInstGenCall {
2979 IrInstruction base;3188 IrInstGen base;
29803189
2981 IrInstruction *fn_ref;3190 IrInstGen *fn_ref;
2982 ZigFn *fn_entry;3191 ZigFn *fn_entry;
2983 size_t arg_count;3192 size_t arg_count;
2984 IrInstruction **args;3193 IrInstGen **args;
2985 IrInstruction *result_loc;3194 IrInstGen *result_loc;
2986 IrInstruction *frame_result_loc;3195 IrInstGen *frame_result_loc;
2987 IrInstruction *new_stack;3196 IrInstGen *new_stack;
29883197
2989 CallModifier modifier;3198 CallModifier modifier;
29903199
2991 bool is_async_call_builtin;3200 bool is_async_call_builtin;
2992};3201};
29933202
2994struct IrInstructionConst {3203struct IrInstSrcConst {
2995 IrInstruction base;3204 IrInstSrc base;
3205
3206 ZigValue *value;
3207};
3208
3209struct IrInstGenConst {
3210 IrInstGen base;
3211};
3212
3213struct IrInstSrcReturn {
3214 IrInstSrc base;
3215
3216 IrInstSrc *operand;
2996};3217};
29973218
2998// When an IrExecutable is not in a function, a return instruction means that3219// When an IrExecutable is not in a function, a return instruction means that
2999// the expression returns with that value, even though a return statement from3220// the expression returns with that value, even though a return statement from
3000// an AST perspective is invalid.3221// an AST perspective is invalid.
3001struct IrInstructionReturn {3222struct IrInstGenReturn {
3002 IrInstruction base;3223 IrInstGen base;
30033224
3004 IrInstruction *operand;3225 IrInstGen *operand;
3005};3226};
30063227
3007enum CastOp {3228enum CastOp {
...@@ -3016,89 +3237,92 @@ enum CastOp {...@@ -3016,89 +3237,92 @@ enum CastOp {
3016};3237};
30173238
3018// TODO get rid of this instruction, replace with instructions for each op code3239// TODO get rid of this instruction, replace with instructions for each op code
3019struct IrInstructionCast {3240struct IrInstGenCast {
3020 IrInstruction base;3241 IrInstGen base;
30213242
3022 IrInstruction *value;3243 IrInstGen *value;
3023 ZigType *dest_type;
3024 CastOp cast_op;3244 CastOp cast_op;
3025};3245};
30263246
3027struct IrInstructionResizeSlice {3247struct IrInstGenResizeSlice {
3028 IrInstruction base;3248 IrInstGen base;
30293249
3030 IrInstruction *operand;3250 IrInstGen *operand;
3031 IrInstruction *result_loc;3251 IrInstGen *result_loc;
3032};3252};
30333253
3034struct IrInstructionContainerInitList {3254struct IrInstSrcContainerInitList {
3035 IrInstruction base;3255 IrInstSrc base;
30363256
3037 IrInstruction *elem_type;3257 IrInstSrc *elem_type;
3038 size_t item_count;3258 size_t item_count;
3039 IrInstruction **elem_result_loc_list;3259 IrInstSrc **elem_result_loc_list;
3040 IrInstruction *result_loc;3260 IrInstSrc *result_loc;
3041 AstNode *init_array_type_source_node;3261 AstNode *init_array_type_source_node;
3042};3262};
30433263
3044struct IrInstructionContainerInitFieldsField {3264struct IrInstSrcContainerInitFieldsField {
3045 Buf *name;3265 Buf *name;
3046 AstNode *source_node;3266 AstNode *source_node;
3047 TypeStructField *type_struct_field;3267 TypeStructField *type_struct_field;
3048 IrInstruction *result_loc;3268 IrInstSrc *result_loc;
3049};3269};
30503270
3051struct IrInstructionContainerInitFields {3271struct IrInstSrcContainerInitFields {
3052 IrInstruction base;3272 IrInstSrc base;
30533273
3054 size_t field_count;3274 size_t field_count;
3055 IrInstructionContainerInitFieldsField *fields;3275 IrInstSrcContainerInitFieldsField *fields;
3056 IrInstruction *result_loc;3276 IrInstSrc *result_loc;
3277};
3278
3279struct IrInstSrcUnreachable {
3280 IrInstSrc base;
3057};3281};
30583282
3059struct IrInstructionUnreachable {3283struct IrInstGenUnreachable {
3060 IrInstruction base;3284 IrInstGen base;
3061};3285};
30623286
3063struct IrInstructionTypeOf {3287struct IrInstSrcTypeOf {
3064 IrInstruction base;3288 IrInstSrc base;
30653289
3066 IrInstruction *value;3290 IrInstSrc *value;
3067};3291};
30683292
3069struct IrInstructionSetCold {3293struct IrInstSrcSetCold {
3070 IrInstruction base;3294 IrInstSrc base;
30713295
3072 IrInstruction *is_cold;3296 IrInstSrc *is_cold;
3073};3297};
30743298
3075struct IrInstructionSetRuntimeSafety {3299struct IrInstSrcSetRuntimeSafety {
3076 IrInstruction base;3300 IrInstSrc base;
30773301
3078 IrInstruction *safety_on;3302 IrInstSrc *safety_on;
3079};3303};
30803304
3081struct IrInstructionSetFloatMode {3305struct IrInstSrcSetFloatMode {
3082 IrInstruction base;3306 IrInstSrc base;
30833307
3084 IrInstruction *scope_value;3308 IrInstSrc *scope_value;
3085 IrInstruction *mode_value;3309 IrInstSrc *mode_value;
3086};3310};
30873311
3088struct IrInstructionArrayType {3312struct IrInstSrcArrayType {
3089 IrInstruction base;3313 IrInstSrc base;
30903314
3091 IrInstruction *size;3315 IrInstSrc *size;
3092 IrInstruction *sentinel;3316 IrInstSrc *sentinel;
3093 IrInstruction *child_type;3317 IrInstSrc *child_type;
3094};3318};
30953319
3096struct IrInstructionPtrType {3320struct IrInstSrcPtrType {
3097 IrInstruction base;3321 IrInstSrc base;
30983322
3099 IrInstruction *sentinel;3323 IrInstSrc *sentinel;
3100 IrInstruction *align_value;3324 IrInstSrc *align_value;
3101 IrInstruction *child_type;3325 IrInstSrc *child_type;
3102 uint32_t bit_offset_start;3326 uint32_t bit_offset_start;
3103 uint32_t host_int_bytes;3327 uint32_t host_int_bytes;
3104 PtrLen ptr_len;3328 PtrLen ptr_len;
...@@ -3107,375 +3331,459 @@ struct IrInstructionPtrType {...@@ -3107,375 +3331,459 @@ struct IrInstructionPtrType {
3107 bool is_allow_zero;3331 bool is_allow_zero;
3108};3332};
31093333
3110struct IrInstructionAnyFrameType {3334struct IrInstSrcAnyFrameType {
3111 IrInstruction base;3335 IrInstSrc base;
31123336
3113 IrInstruction *payload_type;3337 IrInstSrc *payload_type;
3114};3338};
31153339
3116struct IrInstructionSliceType {3340struct IrInstSrcSliceType {
3117 IrInstruction base;3341 IrInstSrc base;
31183342
3119 IrInstruction *sentinel;3343 IrInstSrc *sentinel;
3120 IrInstruction *align_value;3344 IrInstSrc *align_value;
3121 IrInstruction *child_type;3345 IrInstSrc *child_type;
3122 bool is_const;3346 bool is_const;
3123 bool is_volatile;3347 bool is_volatile;
3124 bool is_allow_zero;3348 bool is_allow_zero;
3125};3349};
31263350
3127struct IrInstructionAsmSrc {3351struct IrInstSrcAsm {
3128 IrInstruction base;3352 IrInstSrc base;
31293353
3130 IrInstruction *asm_template;3354 IrInstSrc *asm_template;
3131 IrInstruction **input_list;3355 IrInstSrc **input_list;
3132 IrInstruction **output_types;3356 IrInstSrc **output_types;
3133 ZigVar **output_vars;3357 ZigVar **output_vars;
3134 size_t return_count;3358 size_t return_count;
3135 bool has_side_effects;3359 bool has_side_effects;
3136 bool is_global;3360 bool is_global;
3137};3361};
31383362
3139struct IrInstructionAsmGen {3363struct IrInstGenAsm {
3140 IrInstruction base;3364 IrInstGen base;
31413365
3142 Buf *asm_template;3366 Buf *asm_template;
3143 AsmToken *token_list;3367 AsmToken *token_list;
3144 size_t token_list_len;3368 size_t token_list_len;
3145 IrInstruction **input_list;3369 IrInstGen **input_list;
3146 IrInstruction **output_types;3370 IrInstGen **output_types;
3147 ZigVar **output_vars;3371 ZigVar **output_vars;
3148 size_t return_count;3372 size_t return_count;
3149 bool has_side_effects;3373 bool has_side_effects;
3150};3374};
31513375
3152struct IrInstructionSizeOf {3376struct IrInstSrcSizeOf {
3153 IrInstruction base;3377 IrInstSrc base;
31543378
3379 IrInstSrc *type_value;
3155 bool bit_size;3380 bool bit_size;
3156 IrInstruction *type_value;
3157};3381};
31583382
3159// returns true if nonnull, returns false if null3383// returns true if nonnull, returns false if null
3160// this is so that `zeroes` sets maybe values to null3384struct IrInstSrcTestNonNull {
3161struct IrInstructionTestNonNull {3385 IrInstSrc base;
3162 IrInstruction base;3386
3387 IrInstSrc *value;
3388};
3389
3390struct IrInstGenTestNonNull {
3391 IrInstGen base;
31633392
3164 IrInstruction *value;3393 IrInstGen *value;
3165};3394};
31663395
3167// Takes a pointer to an optional value, returns a pointer3396// Takes a pointer to an optional value, returns a pointer
3168// to the payload.3397// to the payload.
3169struct IrInstructionOptionalUnwrapPtr {3398struct IrInstSrcOptionalUnwrapPtr {
3170 IrInstruction base;3399 IrInstSrc base;
3400
3401 IrInstSrc *base_ptr;
3402 bool safety_check_on;
3403 bool initializing;
3404};
31713405
3406struct IrInstGenOptionalUnwrapPtr {
3407 IrInstGen base;
3408
3409 IrInstGen *base_ptr;
3172 bool safety_check_on;3410 bool safety_check_on;
3173 bool initializing;3411 bool initializing;
3174 IrInstruction *base_ptr;
3175};3412};
31763413
3177struct IrInstructionCtz {3414struct IrInstSrcCtz {
3178 IrInstruction base;3415 IrInstSrc base;
3416
3417 IrInstSrc *type;
3418 IrInstSrc *op;
3419};
3420
3421struct IrInstGenCtz {
3422 IrInstGen base;
3423
3424 IrInstGen *op;
3425};
3426
3427struct IrInstSrcClz {
3428 IrInstSrc base;
3429
3430 IrInstSrc *type;
3431 IrInstSrc *op;
3432};
3433
3434struct IrInstGenClz {
3435 IrInstGen base;
31793436
3180 IrInstruction *type;3437 IrInstGen *op;
3181 IrInstruction *op;
3182};3438};
31833439
3184struct IrInstructionClz {3440struct IrInstSrcPopCount {
3185 IrInstruction base;3441 IrInstSrc base;
31863442
3187 IrInstruction *type;3443 IrInstSrc *type;
3188 IrInstruction *op;3444 IrInstSrc *op;
3189};3445};
31903446
3191struct IrInstructionPopCount {3447struct IrInstGenPopCount {
3192 IrInstruction base;3448 IrInstGen base;
31933449
3194 IrInstruction *type;3450 IrInstGen *op;
3195 IrInstruction *op;
3196};3451};
31973452
3198struct IrInstructionUnionTag {3453struct IrInstGenUnionTag {
3199 IrInstruction base;3454 IrInstGen base;
32003455
3201 IrInstruction *value;3456 IrInstGen *value;
3202};3457};
32033458
3204struct IrInstructionImport {3459struct IrInstSrcImport {
3205 IrInstruction base;3460 IrInstSrc base;
32063461
3207 IrInstruction *name;3462 IrInstSrc *name;
3208};3463};
32093464
3210struct IrInstructionRef {3465struct IrInstSrcRef {
3211 IrInstruction base;3466 IrInstSrc base;
32123467
3213 IrInstruction *value;3468 IrInstSrc *value;
3214 bool is_const;3469 bool is_const;
3215 bool is_volatile;3470 bool is_volatile;
3216};3471};
32173472
3218struct IrInstructionRefGen {3473struct IrInstGenRef {
3219 IrInstruction base;3474 IrInstGen base;
32203475
3221 IrInstruction *operand;3476 IrInstGen *operand;
3222 IrInstruction *result_loc;3477 IrInstGen *result_loc;
3223};3478};
32243479
3225struct IrInstructionCompileErr {3480struct IrInstSrcCompileErr {
3226 IrInstruction base;3481 IrInstSrc base;
32273482
3228 IrInstruction *msg;3483 IrInstSrc *msg;
3229};3484};
32303485
3231struct IrInstructionCompileLog {3486struct IrInstSrcCompileLog {
3232 IrInstruction base;3487 IrInstSrc base;
32333488
3234 size_t msg_count;3489 size_t msg_count;
3235 IrInstruction **msg_list;3490 IrInstSrc **msg_list;
3236};3491};
32373492
3238struct IrInstructionErrName {3493struct IrInstSrcErrName {
3239 IrInstruction base;3494 IrInstSrc base;
32403495
3241 IrInstruction *value;3496 IrInstSrc *value;
3242};3497};
32433498
3244struct IrInstructionCImport {3499struct IrInstGenErrName {
3245 IrInstruction base;3500 IrInstGen base;
3501
3502 IrInstGen *value;
3503};
3504
3505struct IrInstSrcCImport {
3506 IrInstSrc base;
3246};3507};
32473508
3248struct IrInstructionCInclude {3509struct IrInstSrcCInclude {
3249 IrInstruction base;3510 IrInstSrc base;
32503511
3251 IrInstruction *name;3512 IrInstSrc *name;
3252};3513};
32533514
3254struct IrInstructionCDefine {3515struct IrInstSrcCDefine {
3255 IrInstruction base;3516 IrInstSrc base;
32563517
3257 IrInstruction *name;3518 IrInstSrc *name;
3258 IrInstruction *value;3519 IrInstSrc *value;
3259};3520};
32603521
3261struct IrInstructionCUndef {3522struct IrInstSrcCUndef {
3262 IrInstruction base;3523 IrInstSrc base;
32633524
3264 IrInstruction *name;3525 IrInstSrc *name;
3265};3526};
32663527
3267struct IrInstructionEmbedFile {3528struct IrInstSrcEmbedFile {
3268 IrInstruction base;3529 IrInstSrc base;
32693530
3270 IrInstruction *name;3531 IrInstSrc *name;
3271};3532};
32723533
3273struct IrInstructionCmpxchgSrc {3534struct IrInstSrcCmpxchg {
3274 IrInstruction base;3535 IrInstSrc base;
32753536
3276 bool is_weak;3537 bool is_weak;
3277 IrInstruction *type_value;3538 IrInstSrc *type_value;
3278 IrInstruction *ptr;3539 IrInstSrc *ptr;
3279 IrInstruction *cmp_value;3540 IrInstSrc *cmp_value;
3280 IrInstruction *new_value;3541 IrInstSrc *new_value;
3281 IrInstruction *success_order_value;3542 IrInstSrc *success_order_value;
3282 IrInstruction *failure_order_value;3543 IrInstSrc *failure_order_value;
3283 ResultLoc *result_loc;3544 ResultLoc *result_loc;
3284};3545};
32853546
3286struct IrInstructionCmpxchgGen {3547struct IrInstGenCmpxchg {
3287 IrInstruction base;3548 IrInstGen base;
32883549
3289 bool is_weak;
3290 AtomicOrder success_order;3550 AtomicOrder success_order;
3291 AtomicOrder failure_order;3551 AtomicOrder failure_order;
3292 IrInstruction *ptr;3552 IrInstGen *ptr;
3293 IrInstruction *cmp_value;3553 IrInstGen *cmp_value;
3294 IrInstruction *new_value;3554 IrInstGen *new_value;
3295 IrInstruction *result_loc;3555 IrInstGen *result_loc;
3556 bool is_weak;
3296};3557};
32973558
3298struct IrInstructionFence {3559struct IrInstSrcFence {
3299 IrInstruction base;3560 IrInstSrc base;
3561
3562 IrInstSrc *order;
3563};
33003564
3301 IrInstruction *order_value;3565struct IrInstGenFence {
3566 IrInstGen base;
33023567
3303 // if this instruction gets to runtime then we know these values:
3304 AtomicOrder order;3568 AtomicOrder order;
3305};3569};
33063570
3307struct IrInstructionTruncate {3571struct IrInstSrcTruncate {
3308 IrInstruction base;3572 IrInstSrc base;
3573
3574 IrInstSrc *dest_type;
3575 IrInstSrc *target;
3576};
3577
3578struct IrInstGenTruncate {
3579 IrInstGen base;
33093580
3310 IrInstruction *dest_type;3581 IrInstGen *target;
3311 IrInstruction *target;
3312};3582};
33133583
3314struct IrInstructionIntCast {3584struct IrInstSrcIntCast {
3315 IrInstruction base;3585 IrInstSrc base;
33163586
3317 IrInstruction *dest_type;3587 IrInstSrc *dest_type;
3318 IrInstruction *target;3588 IrInstSrc *target;
3319};3589};
33203590
3321struct IrInstructionFloatCast {3591struct IrInstSrcFloatCast {
3322 IrInstruction base;3592 IrInstSrc base;
33233593
3324 IrInstruction *dest_type;3594 IrInstSrc *dest_type;
3325 IrInstruction *target;3595 IrInstSrc *target;
3326};3596};
33273597
3328struct IrInstructionErrSetCast {3598struct IrInstSrcErrSetCast {
3329 IrInstruction base;3599 IrInstSrc base;
33303600
3331 IrInstruction *dest_type;3601 IrInstSrc *dest_type;
3332 IrInstruction *target;3602 IrInstSrc *target;
3333};3603};
33343604
3335struct IrInstructionToBytes {3605struct IrInstSrcToBytes {
3336 IrInstruction base;3606 IrInstSrc base;
33373607
3338 IrInstruction *target;3608 IrInstSrc *target;
3339 ResultLoc *result_loc;3609 ResultLoc *result_loc;
3340};3610};
33413611
3342struct IrInstructionFromBytes {3612struct IrInstSrcFromBytes {
3343 IrInstruction base;3613 IrInstSrc base;
33443614
3345 IrInstruction *dest_child_type;3615 IrInstSrc *dest_child_type;
3346 IrInstruction *target;3616 IrInstSrc *target;
3347 ResultLoc *result_loc;3617 ResultLoc *result_loc;
3348};3618};
33493619
3350struct IrInstructionIntToFloat {3620struct IrInstSrcIntToFloat {
3351 IrInstruction base;3621 IrInstSrc base;
33523622
3353 IrInstruction *dest_type;3623 IrInstSrc *dest_type;
3354 IrInstruction *target;3624 IrInstSrc *target;
3355};3625};
33563626
3357struct IrInstructionFloatToInt {3627struct IrInstSrcFloatToInt {
3358 IrInstruction base;3628 IrInstSrc base;
33593629
3360 IrInstruction *dest_type;3630 IrInstSrc *dest_type;
3361 IrInstruction *target;3631 IrInstSrc *target;
3362};3632};
33633633
3364struct IrInstructionBoolToInt {3634struct IrInstSrcBoolToInt {
3365 IrInstruction base;3635 IrInstSrc base;
33663636
3367 IrInstruction *target;3637 IrInstSrc *target;
3368};3638};
33693639
3370struct IrInstructionIntType {3640struct IrInstSrcIntType {
3371 IrInstruction base;3641 IrInstSrc base;
33723642
3373 IrInstruction *is_signed;3643 IrInstSrc *is_signed;
3374 IrInstruction *bit_count;3644 IrInstSrc *bit_count;
3375};3645};
33763646
3377struct IrInstructionVectorType {3647struct IrInstSrcVectorType {
3378 IrInstruction base;3648 IrInstSrc base;
33793649
3380 IrInstruction *len;3650 IrInstSrc *len;
3381 IrInstruction *elem_type;3651 IrInstSrc *elem_type;
3382};3652};
33833653
3384struct IrInstructionBoolNot {3654struct IrInstSrcBoolNot {
3385 IrInstruction base;3655 IrInstSrc base;
33863656
3387 IrInstruction *value;3657 IrInstSrc *value;
3388};3658};
33893659
3390struct IrInstructionMemset {3660struct IrInstGenBoolNot {
3391 IrInstruction base;3661 IrInstGen base;
33923662
3393 IrInstruction *dest_ptr;3663 IrInstGen *value;
3394 IrInstruction *byte;
3395 IrInstruction *count;
3396};3664};
33973665
3398struct IrInstructionMemcpy {3666struct IrInstSrcMemset {
3399 IrInstruction base;3667 IrInstSrc base;
34003668
3401 IrInstruction *dest_ptr;3669 IrInstSrc *dest_ptr;
3402 IrInstruction *src_ptr;3670 IrInstSrc *byte;
3403 IrInstruction *count;3671 IrInstSrc *count;
3404};3672};
34053673
3406struct IrInstructionSliceSrc {3674struct IrInstGenMemset {
3407 IrInstruction base;3675 IrInstGen base;
34083676
3409 bool safety_check_on;3677 IrInstGen *dest_ptr;
3410 IrInstruction *ptr;3678 IrInstGen *byte;
3411 IrInstruction *start;3679 IrInstGen *count;
3412 IrInstruction *end;3680};
3413 IrInstruction *sentinel;3681
3682struct IrInstSrcMemcpy {
3683 IrInstSrc base;
3684
3685 IrInstSrc *dest_ptr;
3686 IrInstSrc *src_ptr;
3687 IrInstSrc *count;
3688};
3689
3690struct IrInstGenMemcpy {
3691 IrInstGen base;
3692
3693 IrInstGen *dest_ptr;
3694 IrInstGen *src_ptr;
3695 IrInstGen *count;
3696};
3697
3698struct IrInstSrcSlice {
3699 IrInstSrc base;
3700
3701 IrInstSrc *ptr;
3702 IrInstSrc *start;
3703 IrInstSrc *end;
3704 IrInstSrc *sentinel;
3414 ResultLoc *result_loc;3705 ResultLoc *result_loc;
3706 bool safety_check_on;
3415};3707};
34163708
3417struct IrInstructionSliceGen {3709struct IrInstGenSlice {
3418 IrInstruction base;3710 IrInstGen base;
34193711
3712 IrInstGen *ptr;
3713 IrInstGen *start;
3714 IrInstGen *end;
3715 IrInstGen *result_loc;
3420 bool safety_check_on;3716 bool safety_check_on;
3421 IrInstruction *ptr;
3422 IrInstruction *start;
3423 IrInstruction *end;
3424 IrInstruction *result_loc;
3425};3717};
34263718
3427struct IrInstructionMemberCount {3719struct IrInstSrcMemberCount {
3428 IrInstruction base;3720 IrInstSrc base;
3721
3722 IrInstSrc *container;
3723};
3724
3725struct IrInstSrcMemberType {
3726 IrInstSrc base;
34293727
3430 IrInstruction *container;3728 IrInstSrc *container_type;
3729 IrInstSrc *member_index;
3431};3730};
34323731
3433struct IrInstructionMemberType {3732struct IrInstSrcMemberName {
3434 IrInstruction base;3733 IrInstSrc base;
3734
3735 IrInstSrc *container_type;
3736 IrInstSrc *member_index;
3737};
3738
3739struct IrInstSrcBreakpoint {
3740 IrInstSrc base;
3741};
34353742
3436 IrInstruction *container_type;3743struct IrInstGenBreakpoint {
3437 IrInstruction *member_index;3744 IrInstGen base;
3438};3745};
34393746
3440struct IrInstructionMemberName {3747struct IrInstSrcReturnAddress {
3441 IrInstruction base;3748 IrInstSrc base;
3749};
34423750
3443 IrInstruction *container_type;3751struct IrInstGenReturnAddress {
3444 IrInstruction *member_index;3752 IrInstGen base;
3445};3753};
34463754
3447struct IrInstructionBreakpoint {3755struct IrInstSrcFrameAddress {
3448 IrInstruction base;3756 IrInstSrc base;
3449};3757};
34503758
3451struct IrInstructionReturnAddress {3759struct IrInstGenFrameAddress {
3452 IrInstruction base;3760 IrInstGen base;
3453};3761};
34543762
3455struct IrInstructionFrameAddress {3763struct IrInstSrcFrameHandle {
3456 IrInstruction base;3764 IrInstSrc base;
3457};3765};
34583766
3459struct IrInstructionFrameHandle {3767struct IrInstGenFrameHandle {
3460 IrInstruction base;3768 IrInstGen base;
3461};3769};
34623770
3463struct IrInstructionFrameType {3771struct IrInstSrcFrameType {
3464 IrInstruction base;3772 IrInstSrc base;
34653773
3466 IrInstruction *fn;3774 IrInstSrc *fn;
3467};3775};
34683776
3469struct IrInstructionFrameSizeSrc {3777struct IrInstSrcFrameSize {
3470 IrInstruction base;3778 IrInstSrc base;
34713779
3472 IrInstruction *fn;3780 IrInstSrc *fn;
3473};3781};
34743782
3475struct IrInstructionFrameSizeGen {3783struct IrInstGenFrameSize {
3476 IrInstruction base;3784 IrInstGen base;
34773785
3478 IrInstruction *fn;3786 IrInstGen *fn;
3479};3787};
34803788
3481enum IrOverflowOp {3789enum IrOverflowOp {
...@@ -3485,559 +3793,713 @@ enum IrOverflowOp {...@@ -3485,559 +3793,713 @@ enum IrOverflowOp {
3485 IrOverflowOpShl,3793 IrOverflowOpShl,
3486};3794};
34873795
3488struct IrInstructionOverflowOp {3796struct IrInstSrcOverflowOp {
3489 IrInstruction base;3797 IrInstSrc base;
3798
3799 IrOverflowOp op;
3800 IrInstSrc *type_value;
3801 IrInstSrc *op1;
3802 IrInstSrc *op2;
3803 IrInstSrc *result_ptr;
3804};
3805
3806struct IrInstGenOverflowOp {
3807 IrInstGen base;
34903808
3491 IrOverflowOp op;3809 IrOverflowOp op;
3492 IrInstruction *type_value;3810 IrInstGen *op1;
3493 IrInstruction *op1;3811 IrInstGen *op2;
3494 IrInstruction *op2;3812 IrInstGen *result_ptr;
3495 IrInstruction *result_ptr;
34963813
3814 // TODO can this field be removed?
3497 ZigType *result_ptr_type;3815 ZigType *result_ptr_type;
3498};3816};
34993817
3500struct IrInstructionMulAdd {3818struct IrInstSrcMulAdd {
3501 IrInstruction base;3819 IrInstSrc base;
3820
3821 IrInstSrc *type_value;
3822 IrInstSrc *op1;
3823 IrInstSrc *op2;
3824 IrInstSrc *op3;
3825};
3826
3827struct IrInstGenMulAdd {
3828 IrInstGen base;
35023829
3503 IrInstruction *type_value;3830 IrInstGen *op1;
3504 IrInstruction *op1;3831 IrInstGen *op2;
3505 IrInstruction *op2;3832 IrInstGen *op3;
3506 IrInstruction *op3;
3507};3833};
35083834
3509struct IrInstructionAlignOf {3835struct IrInstSrcAlignOf {
3510 IrInstruction base;3836 IrInstSrc base;
35113837
3512 IrInstruction *type_value;3838 IrInstSrc *type_value;
3513};3839};
35143840
3515// returns true if error, returns false if not error3841// returns true if error, returns false if not error
3516struct IrInstructionTestErrSrc {3842struct IrInstSrcTestErr {
3517 IrInstruction base;3843 IrInstSrc base;
35183844
3845 IrInstSrc *base_ptr;
3519 bool resolve_err_set;3846 bool resolve_err_set;
3520 bool base_ptr_is_payload;3847 bool base_ptr_is_payload;
3521 IrInstruction *base_ptr;
3522};3848};
35233849
3524struct IrInstructionTestErrGen {3850struct IrInstGenTestErr {
3525 IrInstruction base;3851 IrInstGen base;
35263852
3527 IrInstruction *err_union;3853 IrInstGen *err_union;
3528};3854};
35293855
3530// Takes an error union pointer, returns a pointer to the error code.3856// Takes an error union pointer, returns a pointer to the error code.
3531struct IrInstructionUnwrapErrCode {3857struct IrInstSrcUnwrapErrCode {
3532 IrInstruction base;3858 IrInstSrc base;
35333859
3860 IrInstSrc *err_union_ptr;
3534 bool initializing;3861 bool initializing;
3535 IrInstruction *err_union_ptr;
3536};3862};
35373863
3538struct IrInstructionUnwrapErrPayload {3864struct IrInstGenUnwrapErrCode {
3539 IrInstruction base;3865 IrInstGen base;
35403866
3867 IrInstGen *err_union_ptr;
3868 bool initializing;
3869};
3870
3871struct IrInstSrcUnwrapErrPayload {
3872 IrInstSrc base;
3873
3874 IrInstSrc *value;
3875 bool safety_check_on;
3876 bool initializing;
3877};
3878
3879struct IrInstGenUnwrapErrPayload {
3880 IrInstGen base;
3881
3882 IrInstGen *value;
3541 bool safety_check_on;3883 bool safety_check_on;
3542 bool initializing;3884 bool initializing;
3543 IrInstruction *value;
3544};3885};
35453886
3546struct IrInstructionOptionalWrap {3887struct IrInstGenOptionalWrap {
3547 IrInstruction base;3888 IrInstGen base;
35483889
3549 IrInstruction *operand;3890 IrInstGen *operand;
3550 IrInstruction *result_loc;3891 IrInstGen *result_loc;
3551};3892};
35523893
3553struct IrInstructionErrWrapPayload {3894struct IrInstGenErrWrapPayload {
3554 IrInstruction base;3895 IrInstGen base;
35553896
3556 IrInstruction *operand;3897 IrInstGen *operand;
3557 IrInstruction *result_loc;3898 IrInstGen *result_loc;
3558};3899};
35593900
3560struct IrInstructionErrWrapCode {3901struct IrInstGenErrWrapCode {
3561 IrInstruction base;3902 IrInstGen base;
35623903
3563 IrInstruction *operand;3904 IrInstGen *operand;
3564 IrInstruction *result_loc;3905 IrInstGen *result_loc;
3565};3906};
35663907
3567struct IrInstructionFnProto {3908struct IrInstSrcFnProto {
3568 IrInstruction base;3909 IrInstSrc base;
35693910
3570 IrInstruction **param_types;3911 IrInstSrc **param_types;
3571 IrInstruction *align_value;3912 IrInstSrc *align_value;
3572 IrInstruction *callconv_value;3913 IrInstSrc *callconv_value;
3573 IrInstruction *return_type;3914 IrInstSrc *return_type;
3574 bool is_var_args;3915 bool is_var_args;
3575};3916};
35763917
3577// true if the target value is compile time known, false otherwise3918// true if the target value is compile time known, false otherwise
3578struct IrInstructionTestComptime {3919struct IrInstSrcTestComptime {
3579 IrInstruction base;3920 IrInstSrc base;
35803921
3581 IrInstruction *value;3922 IrInstSrc *value;
3582};3923};
35833924
3584struct IrInstructionPtrCastSrc {3925struct IrInstSrcPtrCast {
3585 IrInstruction base;3926 IrInstSrc base;
35863927
3587 IrInstruction *dest_type;3928 IrInstSrc *dest_type;
3588 IrInstruction *ptr;3929 IrInstSrc *ptr;
3589 bool safety_check_on;3930 bool safety_check_on;
3590};3931};
35913932
3592struct IrInstructionPtrCastGen {3933struct IrInstGenPtrCast {
3593 IrInstruction base;3934 IrInstGen base;
35943935
3595 IrInstruction *ptr;3936 IrInstGen *ptr;
3596 bool safety_check_on;3937 bool safety_check_on;
3597};3938};
35983939
3599struct IrInstructionImplicitCast {3940struct IrInstSrcImplicitCast {
3600 IrInstruction base;3941 IrInstSrc base;
36013942
3602 IrInstruction *operand;3943 IrInstSrc *operand;
3603 ResultLocCast *result_loc_cast;3944 ResultLocCast *result_loc_cast;
3604};3945};
36053946
3606struct IrInstructionBitCastSrc {3947struct IrInstSrcBitCast {
3607 IrInstruction base;3948 IrInstSrc base;
36083949
3609 IrInstruction *operand;3950 IrInstSrc *operand;
3610 ResultLocBitCast *result_loc_bit_cast;3951 ResultLocBitCast *result_loc_bit_cast;
3611};3952};
36123953
3613struct IrInstructionBitCastGen {3954struct IrInstGenBitCast {
3614 IrInstruction base;3955 IrInstGen base;
3956
3957 IrInstGen *operand;
3958};
3959
3960struct IrInstGenWidenOrShorten {
3961 IrInstGen base;
3962
3963 IrInstGen *target;
3964};
3965
3966struct IrInstSrcPtrToInt {
3967 IrInstSrc base;
3968
3969 IrInstSrc *target;
3970};
3971
3972struct IrInstGenPtrToInt {
3973 IrInstGen base;
3974
3975 IrInstGen *target;
3976};
3977
3978struct IrInstSrcIntToPtr {
3979 IrInstSrc base;
3980
3981 IrInstSrc *dest_type;
3982 IrInstSrc *target;
3983};
3984
3985struct IrInstGenIntToPtr {
3986 IrInstGen base;
36153987
3616 IrInstruction *operand;3988 IrInstGen *target;
3617};3989};
36183990
3619struct IrInstructionWidenOrShorten {3991struct IrInstSrcIntToEnum {
3620 IrInstruction base;3992 IrInstSrc base;
36213993
3622 IrInstruction *target;3994 IrInstSrc *dest_type;
3995 IrInstSrc *target;
3623};3996};
36243997
3625struct IrInstructionPtrToInt {3998struct IrInstGenIntToEnum {
3626 IrInstruction base;3999 IrInstGen base;
36274000
3628 IrInstruction *target;4001 IrInstGen *target;
3629};4002};
36304003
3631struct IrInstructionIntToPtr {4004struct IrInstSrcEnumToInt {
3632 IrInstruction base;4005 IrInstSrc base;
36334006
3634 IrInstruction *dest_type;4007 IrInstSrc *target;
3635 IrInstruction *target;
3636};4008};
36374009
3638struct IrInstructionIntToEnum {4010struct IrInstSrcIntToErr {
3639 IrInstruction base;4011 IrInstSrc base;
36404012
3641 IrInstruction *dest_type;4013 IrInstSrc *target;
3642 IrInstruction *target;
3643};4014};
36444015
3645struct IrInstructionEnumToInt {4016struct IrInstGenIntToErr {
3646 IrInstruction base;4017 IrInstGen base;
36474018
3648 IrInstruction *target;4019 IrInstGen *target;
3649};4020};
36504021
3651struct IrInstructionIntToErr {4022struct IrInstSrcErrToInt {
3652 IrInstruction base;4023 IrInstSrc base;
36534024
3654 IrInstruction *target;4025 IrInstSrc *target;
3655};4026};
36564027
3657struct IrInstructionErrToInt {4028struct IrInstGenErrToInt {
3658 IrInstruction base;4029 IrInstGen base;
36594030
3660 IrInstruction *target;4031 IrInstGen *target;
3661};4032};
36624033
3663struct IrInstructionCheckSwitchProngsRange {4034struct IrInstSrcCheckSwitchProngsRange {
3664 IrInstruction *start;4035 IrInstSrc *start;
3665 IrInstruction *end;4036 IrInstSrc *end;
3666};4037};
36674038
3668struct IrInstructionCheckSwitchProngs {4039struct IrInstSrcCheckSwitchProngs {
3669 IrInstruction base;4040 IrInstSrc base;
36704041
3671 IrInstruction *target_value;4042 IrInstSrc *target_value;
3672 IrInstructionCheckSwitchProngsRange *ranges;4043 IrInstSrcCheckSwitchProngsRange *ranges;
3673 size_t range_count;4044 size_t range_count;
3674 bool have_else_prong;4045 bool have_else_prong;
4046 bool have_underscore_prong;
3675};4047};
36764048
3677struct IrInstructionCheckStatementIsVoid {4049struct IrInstSrcCheckStatementIsVoid {
3678 IrInstruction base;4050 IrInstSrc base;
36794051
3680 IrInstruction *statement_value;4052 IrInstSrc *statement_value;
3681};4053};
36824054
3683struct IrInstructionTypeName {4055struct IrInstSrcTypeName {
3684 IrInstruction base;4056 IrInstSrc base;
36854057
3686 IrInstruction *type_value;4058 IrInstSrc *type_value;
3687};4059};
36884060
3689struct IrInstructionDeclRef {4061struct IrInstSrcDeclRef {
3690 IrInstruction base;4062 IrInstSrc base;
36914063
3692 LVal lval;4064 LVal lval;
3693 Tld *tld;4065 Tld *tld;
3694};4066};
36954067
3696struct IrInstructionPanic {4068struct IrInstSrcPanic {
3697 IrInstruction base;4069 IrInstSrc base;
4070
4071 IrInstSrc *msg;
4072};
4073
4074struct IrInstGenPanic {
4075 IrInstGen base;
4076
4077 IrInstGen *msg;
4078};
4079
4080struct IrInstSrcTagName {
4081 IrInstSrc base;
4082
4083 IrInstSrc *target;
4084};
4085
4086struct IrInstGenTagName {
4087 IrInstGen base;
36984088
3699 IrInstruction *msg;4089 IrInstGen *target;
3700};4090};
37014091
3702struct IrInstructionTagName {4092struct IrInstSrcTagType {
3703 IrInstruction base;4093 IrInstSrc base;
37044094
3705 IrInstruction *target;4095 IrInstSrc *target;
3706};4096};
37074097
3708struct IrInstructionTagType {4098struct IrInstSrcFieldParentPtr {
3709 IrInstruction base;4099 IrInstSrc base;
37104100
3711 IrInstruction *target;4101 IrInstSrc *type_value;
4102 IrInstSrc *field_name;
4103 IrInstSrc *field_ptr;
3712};4104};
37134105
3714struct IrInstructionFieldParentPtr {4106struct IrInstGenFieldParentPtr {
3715 IrInstruction base;4107 IrInstGen base;
37164108
3717 IrInstruction *type_value;4109 IrInstGen *field_ptr;
3718 IrInstruction *field_name;
3719 IrInstruction *field_ptr;
3720 TypeStructField *field;4110 TypeStructField *field;
3721};4111};
37224112
3723struct IrInstructionByteOffsetOf {4113struct IrInstSrcByteOffsetOf {
3724 IrInstruction base;4114 IrInstSrc base;
4115
4116 IrInstSrc *type_value;
4117 IrInstSrc *field_name;
4118};
4119
4120struct IrInstSrcBitOffsetOf {
4121 IrInstSrc base;
37254122
3726 IrInstruction *type_value;4123 IrInstSrc *type_value;
3727 IrInstruction *field_name;4124 IrInstSrc *field_name;
3728};4125};
37294126
3730struct IrInstructionBitOffsetOf {4127struct IrInstSrcTypeInfo {
3731 IrInstruction base;4128 IrInstSrc base;
37324129
3733 IrInstruction *type_value;4130 IrInstSrc *type_value;
3734 IrInstruction *field_name;
3735};4131};
37364132
3737struct IrInstructionTypeInfo {4133struct IrInstSrcType {
3738 IrInstruction base;4134 IrInstSrc base;
37394135
3740 IrInstruction *type_value;4136 IrInstSrc *type_info;
3741};4137};
37424138
3743struct IrInstructionType {4139struct IrInstSrcHasField {
3744 IrInstruction base;4140 IrInstSrc base;
37454141
3746 IrInstruction *type_info;4142 IrInstSrc *container_type;
4143 IrInstSrc *field_name;
3747};4144};
37484145
3749struct IrInstructionHasField {4146struct IrInstSrcTypeId {
3750 IrInstruction base;4147 IrInstSrc base;
37514148
3752 IrInstruction *container_type;4149 IrInstSrc *type_value;
3753 IrInstruction *field_name;
3754};4150};
37554151
3756struct IrInstructionTypeId {4152struct IrInstSrcSetEvalBranchQuota {
3757 IrInstruction base;4153 IrInstSrc base;
37584154
3759 IrInstruction *type_value;4155 IrInstSrc *new_quota;
3760};4156};
37614157
3762struct IrInstructionSetEvalBranchQuota {4158struct IrInstSrcAlignCast {
3763 IrInstruction base;4159 IrInstSrc base;
37644160
3765 IrInstruction *new_quota;4161 IrInstSrc *align_bytes;
4162 IrInstSrc *target;
3766};4163};
37674164
3768struct IrInstructionAlignCast {4165struct IrInstGenAlignCast {
3769 IrInstruction base;4166 IrInstGen base;
37704167
3771 IrInstruction *align_bytes;4168 IrInstGen *target;
3772 IrInstruction *target;
3773};4169};
37744170
3775struct IrInstructionOpaqueType {4171struct IrInstSrcOpaqueType {
3776 IrInstruction base;4172 IrInstSrc base;
3777};4173};
37784174
3779struct IrInstructionSetAlignStack {4175struct IrInstSrcSetAlignStack {
3780 IrInstruction base;4176 IrInstSrc base;
37814177
3782 IrInstruction *align_bytes;4178 IrInstSrc *align_bytes;
3783};4179};
37844180
3785struct IrInstructionArgType {4181struct IrInstSrcArgType {
3786 IrInstruction base;4182 IrInstSrc base;
37874183
3788 IrInstruction *fn_type;4184 IrInstSrc *fn_type;
3789 IrInstruction *arg_index;4185 IrInstSrc *arg_index;
3790 bool allow_var;4186 bool allow_var;
3791};4187};
37924188
3793struct IrInstructionExport {4189struct IrInstSrcExport {
3794 IrInstruction base;4190 IrInstSrc base;
4191
4192 IrInstSrc *target;
4193 IrInstSrc *options;
4194};
4195
4196enum IrInstErrorReturnTraceOptional {
4197 IrInstErrorReturnTraceNull,
4198 IrInstErrorReturnTraceNonNull,
4199};
4200
4201struct IrInstSrcErrorReturnTrace {
4202 IrInstSrc base;
37954203
3796 IrInstruction *target;4204 IrInstErrorReturnTraceOptional optional;
3797 IrInstruction *options;
3798};4205};
37994206
3800struct IrInstructionErrorReturnTrace {4207struct IrInstGenErrorReturnTrace {
3801 IrInstruction base;4208 IrInstGen base;
38024209
3803 enum Optional {4210 IrInstErrorReturnTraceOptional optional;
3804 Null,
3805 NonNull,
3806 } optional;
3807};4211};
38084212
3809struct IrInstructionErrorUnion {4213struct IrInstSrcErrorUnion {
3810 IrInstruction base;4214 IrInstSrc base;
38114215
3812 IrInstruction *err_set;4216 IrInstSrc *err_set;
3813 IrInstruction *payload;4217 IrInstSrc *payload;
3814 Buf *type_name;4218 Buf *type_name;
3815};4219};
38164220
3817struct IrInstructionAtomicRmw {4221struct IrInstSrcAtomicRmw {
3818 IrInstruction base;4222 IrInstSrc base;
4223
4224 IrInstSrc *operand_type;
4225 IrInstSrc *ptr;
4226 IrInstSrc *op;
4227 IrInstSrc *operand;
4228 IrInstSrc *ordering;
4229};
4230
4231struct IrInstGenAtomicRmw {
4232 IrInstGen base;
4233
4234 IrInstGen *ptr;
4235 IrInstGen *operand;
4236 AtomicRmwOp op;
4237 AtomicOrder ordering;
4238};
4239
4240struct IrInstSrcAtomicLoad {
4241 IrInstSrc base;
4242
4243 IrInstSrc *operand_type;
4244 IrInstSrc *ptr;
4245 IrInstSrc *ordering;
4246};
4247
4248struct IrInstGenAtomicLoad {
4249 IrInstGen base;
38194250
3820 IrInstruction *operand_type;4251 IrInstGen *ptr;
3821 IrInstruction *ptr;4252 AtomicOrder ordering;
3822 IrInstruction *op;
3823 AtomicRmwOp resolved_op;
3824 IrInstruction *operand;
3825 IrInstruction *ordering;
3826 AtomicOrder resolved_ordering;
3827};4253};
38284254
3829struct IrInstructionAtomicLoad {4255struct IrInstSrcAtomicStore {
3830 IrInstruction base;4256 IrInstSrc base;
38314257
3832 IrInstruction *operand_type;4258 IrInstSrc *operand_type;
3833 IrInstruction *ptr;4259 IrInstSrc *ptr;
3834 IrInstruction *ordering;4260 IrInstSrc *value;
3835 AtomicOrder resolved_ordering;4261 IrInstSrc *ordering;
3836};4262};
38374263
3838struct IrInstructionAtomicStore {4264struct IrInstGenAtomicStore {
3839 IrInstruction base;4265 IrInstGen base;
4266
4267 IrInstGen *ptr;
4268 IrInstGen *value;
4269 AtomicOrder ordering;
4270};
38404271
3841 IrInstruction *operand_type;4272struct IrInstSrcSaveErrRetAddr {
3842 IrInstruction *ptr;4273 IrInstSrc base;
3843 IrInstruction *value;
3844 IrInstruction *ordering;
3845 AtomicOrder resolved_ordering;
3846};4274};
38474275
3848struct IrInstructionSaveErrRetAddr {4276struct IrInstGenSaveErrRetAddr {
3849 IrInstruction base;4277 IrInstGen base;
3850};4278};
38514279
3852struct IrInstructionAddImplicitReturnType {4280struct IrInstSrcAddImplicitReturnType {
3853 IrInstruction base;4281 IrInstSrc base;
38544282
3855 IrInstruction *value;4283 IrInstSrc *value;
3856 ResultLocReturn *result_loc_ret;4284 ResultLocReturn *result_loc_ret;
3857};4285};
38584286
3859// For float ops which take a single argument4287// For float ops that take a single argument
3860struct IrInstructionFloatOp {4288struct IrInstSrcFloatOp {
3861 IrInstruction base;4289 IrInstSrc base;
4290
4291 IrInstSrc *operand;
4292 BuiltinFnId fn_id;
4293};
4294
4295struct IrInstGenFloatOp {
4296 IrInstGen base;
38624297
4298 IrInstGen *operand;
3863 BuiltinFnId fn_id;4299 BuiltinFnId fn_id;
3864 IrInstruction *operand;
3865};4300};
38664301
3867struct IrInstructionCheckRuntimeScope {4302struct IrInstSrcCheckRuntimeScope {
3868 IrInstruction base;4303 IrInstSrc base;
4304
4305 IrInstSrc *scope_is_comptime;
4306 IrInstSrc *is_comptime;
4307};
4308
4309struct IrInstSrcBswap {
4310 IrInstSrc base;
4311
4312 IrInstSrc *type;
4313 IrInstSrc *op;
4314};
4315
4316struct IrInstGenBswap {
4317 IrInstGen base;
4318
4319 IrInstGen *op;
4320};
4321
4322struct IrInstSrcBitReverse {
4323 IrInstSrc base;
38694324
3870 IrInstruction *scope_is_comptime;4325 IrInstSrc *type;
3871 IrInstruction *is_comptime;4326 IrInstSrc *op;
3872};4327};
38734328
3874struct IrInstructionBswap {4329struct IrInstGenBitReverse {
3875 IrInstruction base;4330 IrInstGen base;
38764331
3877 IrInstruction *type;4332 IrInstGen *op;
3878 IrInstruction *op;
3879};4333};
38804334
3881struct IrInstructionBitReverse {4335struct IrInstGenArrayToVector {
3882 IrInstruction base;4336 IrInstGen base;
38834337
3884 IrInstruction *type;4338 IrInstGen *array;
3885 IrInstruction *op;
3886};4339};
38874340
3888struct IrInstructionArrayToVector {4341struct IrInstGenVectorToArray {
3889 IrInstruction base;4342 IrInstGen base;
38904343
3891 IrInstruction *array;4344 IrInstGen *vector;
4345 IrInstGen *result_loc;
3892};4346};
38934347
3894struct IrInstructionVectorToArray {4348struct IrInstSrcShuffleVector {
3895 IrInstruction base;4349 IrInstSrc base;
38964350
3897 IrInstruction *vector;4351 IrInstSrc *scalar_type;
3898 IrInstruction *result_loc;4352 IrInstSrc *a;
4353 IrInstSrc *b;
4354 IrInstSrc *mask; // This is in zig-format, not llvm format
3899};4355};
39004356
3901struct IrInstructionShuffleVector {4357struct IrInstGenShuffleVector {
3902 IrInstruction base;4358 IrInstGen base;
39034359
3904 IrInstruction *scalar_type;4360 IrInstGen *a;
3905 IrInstruction *a;4361 IrInstGen *b;
3906 IrInstruction *b;4362 IrInstGen *mask; // This is in zig-format, not llvm format
3907 IrInstruction *mask; // This is in zig-format, not llvm format
3908};4363};
39094364
3910struct IrInstructionSplatSrc {4365struct IrInstSrcSplat {
3911 IrInstruction base;4366 IrInstSrc base;
39124367
3913 IrInstruction *len;4368 IrInstSrc *len;
3914 IrInstruction *scalar;4369 IrInstSrc *scalar;
3915};4370};
39164371
3917struct IrInstructionSplatGen {4372struct IrInstGenSplat {
3918 IrInstruction base;4373 IrInstGen base;
39194374
3920 IrInstruction *scalar;4375 IrInstGen *scalar;
3921};4376};
39224377
3923struct IrInstructionAssertZero {4378struct IrInstGenAssertZero {
3924 IrInstruction base;4379 IrInstGen base;
39254380
3926 IrInstruction *target;4381 IrInstGen *target;
3927};4382};
39284383
3929struct IrInstructionAssertNonNull {4384struct IrInstGenAssertNonNull {
3930 IrInstruction base;4385 IrInstGen base;
39314386
3932 IrInstruction *target;4387 IrInstGen *target;
3933};4388};
39344389
3935struct IrInstructionUnionInitNamedField {4390struct IrInstSrcUnionInitNamedField {
3936 IrInstruction base;4391 IrInstSrc base;
39374392
3938 IrInstruction *union_type;4393 IrInstSrc *union_type;
3939 IrInstruction *field_name;4394 IrInstSrc *field_name;
3940 IrInstruction *field_result_loc;4395 IrInstSrc *field_result_loc;
3941 IrInstruction *result_loc;4396 IrInstSrc *result_loc;
3942};4397};
39434398
3944struct IrInstructionHasDecl {4399struct IrInstSrcHasDecl {
3945 IrInstruction base;4400 IrInstSrc base;
39464401
3947 IrInstruction *container;4402 IrInstSrc *container;
3948 IrInstruction *name;4403 IrInstSrc *name;
3949};4404};
39504405
3951struct IrInstructionUndeclaredIdent {4406struct IrInstSrcUndeclaredIdent {
3952 IrInstruction base;4407 IrInstSrc base;
39534408
3954 Buf *name;4409 Buf *name;
3955};4410};
39564411
3957struct IrInstructionAllocaSrc {4412struct IrInstSrcAlloca {
3958 IrInstruction base;4413 IrInstSrc base;
39594414
3960 IrInstruction *align;4415 IrInstSrc *align;
3961 IrInstruction *is_comptime;4416 IrInstSrc *is_comptime;
3962 const char *name_hint;4417 const char *name_hint;
3963};4418};
39644419
3965struct IrInstructionAllocaGen {4420struct IrInstGenAlloca {
3966 IrInstruction base;4421 IrInstGen base;
39674422
3968 uint32_t align;4423 uint32_t align;
3969 const char *name_hint;4424 const char *name_hint;
3970 size_t field_index;4425 size_t field_index;
3971};4426};
39724427
3973struct IrInstructionEndExpr {4428struct IrInstSrcEndExpr {
3974 IrInstruction base;4429 IrInstSrc base;
39754430
3976 IrInstruction *value;4431 IrInstSrc *value;
3977 ResultLoc *result_loc;4432 ResultLoc *result_loc;
3978};4433};
39794434
3980// This one is for writing through the result pointer.4435// This one is for writing through the result pointer.
3981struct IrInstructionResolveResult {4436struct IrInstSrcResolveResult {
3982 IrInstruction base;4437 IrInstSrc base;
39834438
3984 ResultLoc *result_loc;4439 ResultLoc *result_loc;
3985 IrInstruction *ty;4440 IrInstSrc *ty;
3986};4441};
39874442
3988// This one is when you want to read the value of the result.4443struct IrInstSrcResetResult {
3989// You have to give the value in case it is comptime.4444 IrInstSrc base;
3990struct IrInstructionResultPtr {
3991 IrInstruction base;
39924445
3993 ResultLoc *result_loc;4446 ResultLoc *result_loc;
3994 IrInstruction *result;
3995};4447};
39964448
3997struct IrInstructionResetResult {4449struct IrInstGenPtrOfArrayToSlice {
3998 IrInstruction base;4450 IrInstGen base;
39994451
4000 ResultLoc *result_loc;4452 IrInstGen *operand;
4453 IrInstGen *result_loc;
4001};4454};
40024455
4003struct IrInstructionPtrOfArrayToSlice {4456struct IrInstSrcSuspendBegin {
4004 IrInstruction base;4457 IrInstSrc base;
4005
4006 IrInstruction *operand;
4007 IrInstruction *result_loc;
4008};4458};
40094459
4010struct IrInstructionSuspendBegin {4460struct IrInstGenSuspendBegin {
4011 IrInstruction base;4461 IrInstGen base;
40124462
4013 LLVMBasicBlockRef resume_bb;4463 LLVMBasicBlockRef resume_bb;
4014};4464};
40154465
4016struct IrInstructionSuspendFinish {4466struct IrInstSrcSuspendFinish {
4017 IrInstruction base;4467 IrInstSrc base;
4468
4469 IrInstSrcSuspendBegin *begin;
4470};
4471
4472struct IrInstGenSuspendFinish {
4473 IrInstGen base;
40184474
4019 IrInstructionSuspendBegin *begin;4475 IrInstGenSuspendBegin *begin;
4020};4476};
40214477
4022struct IrInstructionAwaitSrc {4478struct IrInstSrcAwait {
4023 IrInstruction base;4479 IrInstSrc base;
40244480
4025 IrInstruction *frame;4481 IrInstSrc *frame;
4026 ResultLoc *result_loc;4482 ResultLoc *result_loc;
4027};4483};
40284484
4029struct IrInstructionAwaitGen {4485struct IrInstGenAwait {
4030 IrInstruction base;4486 IrInstGen base;
40314487
4032 IrInstruction *frame;4488 IrInstGen *frame;
4033 IrInstruction *result_loc;4489 IrInstGen *result_loc;
4034 ZigFn *target_fn;4490 ZigFn *target_fn;
4035};4491};
40364492
4037struct IrInstructionResume {4493struct IrInstSrcResume {
4038 IrInstruction base;4494 IrInstSrc base;
4495
4496 IrInstSrc *frame;
4497};
4498
4499struct IrInstGenResume {
4500 IrInstGen base;
40394501
4040 IrInstruction *frame;4502 IrInstGen *frame;
4041};4503};
40424504
4043enum SpillId {4505enum SpillId {
...@@ -4045,24 +4507,37 @@ enum SpillId {...@@ -4045,24 +4507,37 @@ enum SpillId {
4045 SpillIdRetErrCode,4507 SpillIdRetErrCode,
4046};4508};
40474509
4048struct IrInstructionSpillBegin {4510struct IrInstSrcSpillBegin {
4049 IrInstruction base;4511 IrInstSrc base;
4512
4513 IrInstSrc *operand;
4514 SpillId spill_id;
4515};
4516
4517struct IrInstGenSpillBegin {
4518 IrInstGen base;
40504519
4051 SpillId spill_id;4520 SpillId spill_id;
4052 IrInstruction *operand;4521 IrInstGen *operand;
4522};
4523
4524struct IrInstSrcSpillEnd {
4525 IrInstSrc base;
4526
4527 IrInstSrcSpillBegin *begin;
4053};4528};
40544529
4055struct IrInstructionSpillEnd {4530struct IrInstGenSpillEnd {
4056 IrInstruction base;4531 IrInstGen base;
40574532
4058 IrInstructionSpillBegin *begin;4533 IrInstGenSpillBegin *begin;
4059};4534};
40604535
4061struct IrInstructionVectorExtractElem {4536struct IrInstGenVectorExtractElem {
4062 IrInstruction base;4537 IrInstGen base;
40634538
4064 IrInstruction *vector;4539 IrInstGen *vector;
4065 IrInstruction *index;4540 IrInstGen *index;
4066};4541};
40674542
4068enum ResultLocId {4543enum ResultLocId {
...@@ -4083,9 +4558,9 @@ struct ResultLoc {...@@ -4083,9 +4558,9 @@ struct ResultLoc {
4083 ResultLocId id;4558 ResultLocId id;
4084 bool written;4559 bool written;
4085 bool allow_write_through_const;4560 bool allow_write_through_const;
4086 IrInstruction *resolved_loc; // result ptr4561 IrInstGen *resolved_loc; // result ptr
4087 IrInstruction *source_instruction;4562 IrInstSrc *source_instruction;
4088 IrInstruction *gen_instruction; // value to store to the result loc4563 IrInstGen *gen_instruction; // value to store to the result loc
4089 ZigType *implicit_elem_type;4564 ZigType *implicit_elem_type;
4090};4565};
40914566
...@@ -4115,18 +4590,18 @@ struct ResultLocPeerParent {...@@ -4115,18 +4590,18 @@ struct ResultLocPeerParent {
41154590
4116 bool skipped;4591 bool skipped;
4117 bool done_resuming;4592 bool done_resuming;
4118 IrBasicBlock *end_bb;4593 IrBasicBlockSrc *end_bb;
4119 ResultLoc *parent;4594 ResultLoc *parent;
4120 ZigList<ResultLocPeer *> peers;4595 ZigList<ResultLocPeer *> peers;
4121 ZigType *resolved_type;4596 ZigType *resolved_type;
4122 IrInstruction *is_comptime;4597 IrInstSrc *is_comptime;
4123};4598};
41244599
4125struct ResultLocPeer {4600struct ResultLocPeer {
4126 ResultLoc base;4601 ResultLoc base;
41274602
4128 ResultLocPeerParent *parent;4603 ResultLocPeerParent *parent;
4129 IrBasicBlock *next_bb;4604 IrBasicBlockSrc *next_bb;
4130 IrSuspendPosition suspend_pos;4605 IrSuspendPosition suspend_pos;
4131};4606};
41324607
...@@ -4197,7 +4672,7 @@ struct FnWalkAttrs {...@@ -4197,7 +4672,7 @@ struct FnWalkAttrs {
4197struct FnWalkCall {4672struct FnWalkCall {
4198 ZigList<LLVMValueRef> *gen_param_values;4673 ZigList<LLVMValueRef> *gen_param_values;
4199 ZigList<ZigType *> *gen_param_types;4674 ZigList<ZigType *> *gen_param_types;
4200 IrInstructionCallGen *inst;4675 IrInstGenCall *inst;
4201 bool is_var_args;4676 bool is_var_args;
4202};4677};
42034678
src/analyze.cpp+128-71
...@@ -199,7 +199,7 @@ ScopeLoop *create_loop_scope(CodeGen *g, AstNode *node, Scope *parent) {...@@ -199,7 +199,7 @@ ScopeLoop *create_loop_scope(CodeGen *g, AstNode *node, Scope *parent) {
199 return scope;199 return scope;
200}200}
201201
202Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstruction *is_comptime) {202Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstSrc *is_comptime) {
203 ScopeRuntime *scope = allocate<ScopeRuntime>(1);203 ScopeRuntime *scope = allocate<ScopeRuntime>(1);
204 scope->is_comptime = is_comptime;204 scope->is_comptime = is_comptime;
205 init_scope(g, &scope->base, ScopeIdRuntime, node, parent);205 init_scope(g, &scope->base, ScopeIdRuntime, node, parent);
...@@ -1120,7 +1120,7 @@ ZigValue *analyze_const_value(CodeGen *g, Scope *scope, AstNode *node, ZigType *...@@ -1120,7 +1120,7 @@ ZigValue *analyze_const_value(CodeGen *g, Scope *scope, AstNode *node, ZigType *
1120 &backward_branch_count, &backward_branch_quota,1120 &backward_branch_count, &backward_branch_quota,
1121 nullptr, nullptr, node, type_name, nullptr, nullptr, undef)))1121 nullptr, nullptr, node, type_name, nullptr, nullptr, undef)))
1122 {1122 {
1123 return g->invalid_instruction->value;1123 return g->invalid_inst_gen->value;
1124 }1124 }
1125 destroy(result_ptr, "ZigValue");1125 destroy(result_ptr, "ZigValue");
1126 return result;1126 return result;
...@@ -2586,15 +2586,8 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {...@@ -2586,15 +2586,8 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
2586 return ErrorSemanticAnalyzeFail;2586 return ErrorSemanticAnalyzeFail;
2587 }2587 }
25882588
2589 enum_type->data.enumeration.src_field_count = field_count;
2590 enum_type->data.enumeration.fields = allocate<TypeEnumField>(field_count);
2591 enum_type->data.enumeration.fields_by_name.init(field_count);
2592
2593 Scope *scope = &enum_type->data.enumeration.decls_scope->base;2589 Scope *scope = &enum_type->data.enumeration.decls_scope->base;
25942590
2595 HashMap<BigInt, AstNode *, bigint_hash, bigint_eql> occupied_tag_values = {};
2596 occupied_tag_values.init(field_count);
2597
2598 ZigType *tag_int_type;2591 ZigType *tag_int_type;
2599 if (enum_type->data.enumeration.layout == ContainerLayoutExtern) {2592 if (enum_type->data.enumeration.layout == ContainerLayoutExtern) {
2600 tag_int_type = get_c_int_type(g, CIntTypeInt);2593 tag_int_type = get_c_int_type(g, CIntTypeInt);
...@@ -2629,13 +2622,14 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {...@@ -2629,13 +2622,14 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
2629 buf_ptr(&wanted_tag_int_type->name)));2622 buf_ptr(&wanted_tag_int_type->name)));
2630 add_error_note(g, msg, decl_node->data.container_decl.init_arg_expr,2623 add_error_note(g, msg, decl_node->data.container_decl.init_arg_expr,
2631 buf_sprintf("any integral type of size 8, 16, 32, 64 or 128 bit is valid"));2624 buf_sprintf("any integral type of size 8, 16, 32, 64 or 128 bit is valid"));
2632 return ErrorNone;2625 return ErrorSemanticAnalyzeFail;
2633 }2626 }
2634 }2627 }
2635 tag_int_type = wanted_tag_int_type;2628 tag_int_type = wanted_tag_int_type;
2636 }2629 }
2637 }2630 }
26382631
2632 enum_type->data.enumeration.non_exhaustive = false;
2639 enum_type->data.enumeration.tag_int_type = tag_int_type;2633 enum_type->data.enumeration.tag_int_type = tag_int_type;
2640 enum_type->size_in_bits = tag_int_type->size_in_bits;2634 enum_type->size_in_bits = tag_int_type->size_in_bits;
2641 enum_type->abi_size = tag_int_type->abi_size;2635 enum_type->abi_size = tag_int_type->abi_size;
...@@ -2644,6 +2638,31 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {...@@ -2644,6 +2638,31 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
2644 BigInt bi_one;2638 BigInt bi_one;
2645 bigint_init_unsigned(&bi_one, 1);2639 bigint_init_unsigned(&bi_one, 1);
26462640
2641 AstNode *last_field_node = decl_node->data.container_decl.fields.at(field_count - 1);
2642 if (buf_eql_str(last_field_node->data.struct_field.name, "_")) {
2643 field_count -= 1;
2644 if (field_count > 1 && log2_u64(field_count) == enum_type->size_in_bits) {
2645 add_node_error(g, last_field_node, buf_sprintf("non-exhaustive enum specifies every value"));
2646 enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
2647 }
2648 if (decl_node->data.container_decl.init_arg_expr == nullptr) {
2649 add_node_error(g, last_field_node, buf_sprintf("non-exhaustive enum must specify size"));
2650 enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
2651 }
2652 if (last_field_node->data.struct_field.value != nullptr) {
2653 add_node_error(g, last_field_node, buf_sprintf("value assigned to '_' field of non-exhaustive enum"));
2654 enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
2655 }
2656 enum_type->data.enumeration.non_exhaustive = true;
2657 }
2658
2659 enum_type->data.enumeration.src_field_count = field_count;
2660 enum_type->data.enumeration.fields = allocate<TypeEnumField>(field_count);
2661 enum_type->data.enumeration.fields_by_name.init(field_count);
2662
2663 HashMap<BigInt, AstNode *, bigint_hash, bigint_eql> occupied_tag_values = {};
2664 occupied_tag_values.init(field_count);
2665
2647 TypeEnumField *last_enum_field = nullptr;2666 TypeEnumField *last_enum_field = nullptr;
26482667
2649 for (uint32_t field_i = 0; field_i < field_count; field_i += 1) {2668 for (uint32_t field_i = 0; field_i < field_count; field_i += 1) {
...@@ -2665,6 +2684,11 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {...@@ -2665,6 +2684,11 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
2665 buf_sprintf("consider 'union(enum)' here"));2684 buf_sprintf("consider 'union(enum)' here"));
2666 }2685 }
26672686
2687 if (buf_eql_str(type_enum_field->name, "_")) {
2688 add_node_error(g, field_node, buf_sprintf("'_' field of non-exhaustive enum must be last"));
2689 enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
2690 }
2691
2668 auto field_entry = enum_type->data.enumeration.fields_by_name.put_unique(type_enum_field->name, type_enum_field);2692 auto field_entry = enum_type->data.enumeration.fields_by_name.put_unique(type_enum_field->name, type_enum_field);
2669 if (field_entry != nullptr) {2693 if (field_entry != nullptr) {
2670 ErrorMsg *msg = add_node_error(g, field_node,2694 ErrorMsg *msg = add_node_error(g, field_node,
...@@ -3343,7 +3367,7 @@ static void get_fully_qualified_decl_name(CodeGen *g, Buf *buf, Tld *tld, bool i...@@ -3343,7 +3367,7 @@ static void get_fully_qualified_decl_name(CodeGen *g, Buf *buf, Tld *tld, bool i
33433367
3344ZigFn *create_fn_raw(CodeGen *g, FnInline inline_value) {3368ZigFn *create_fn_raw(CodeGen *g, FnInline inline_value) {
3345 ZigFn *fn_entry = allocate<ZigFn>(1, "ZigFn");3369 ZigFn *fn_entry = allocate<ZigFn>(1, "ZigFn");
3346 fn_entry->ir_executable = allocate<IrExecutable>(1, "IrExecutablePass1");3370 fn_entry->ir_executable = allocate<IrExecutableSrc>(1, "IrExecutableSrc");
33473371
3348 fn_entry->prealloc_backward_branch_quota = default_backward_branch_quota;3372 fn_entry->prealloc_backward_branch_quota = default_backward_branch_quota;
33493373
...@@ -4089,7 +4113,7 @@ static void preview_use_decl(CodeGen *g, TldUsingNamespace *using_namespace, Sco...@@ -4089,7 +4113,7 @@ static void preview_use_decl(CodeGen *g, TldUsingNamespace *using_namespace, Sco
4089 if (type_is_invalid(result->type)) {4113 if (type_is_invalid(result->type)) {
4090 dest_decls_scope->any_imports_failed = true;4114 dest_decls_scope->any_imports_failed = true;
4091 using_namespace->base.resolution = TldResolutionInvalid;4115 using_namespace->base.resolution = TldResolutionInvalid;
4092 using_namespace->using_namespace_value = g->invalid_instruction->value;4116 using_namespace->using_namespace_value = g->invalid_inst_gen->value;
4093 return;4117 return;
4094 }4118 }
40954119
...@@ -4098,7 +4122,7 @@ static void preview_use_decl(CodeGen *g, TldUsingNamespace *using_namespace, Sco...@@ -4098,7 +4122,7 @@ static void preview_use_decl(CodeGen *g, TldUsingNamespace *using_namespace, Sco
4098 buf_sprintf("expected struct, enum, or union; found '%s'", buf_ptr(&result->data.x_type->name)));4122 buf_sprintf("expected struct, enum, or union; found '%s'", buf_ptr(&result->data.x_type->name)));
4099 dest_decls_scope->any_imports_failed = true;4123 dest_decls_scope->any_imports_failed = true;
4100 using_namespace->base.resolution = TldResolutionInvalid;4124 using_namespace->base.resolution = TldResolutionInvalid;
4101 using_namespace->using_namespace_value = g->invalid_instruction->value;4125 using_namespace->using_namespace_value = g->invalid_inst_gen->value;
4102 return;4126 return;
4103 }4127 }
4104}4128}
...@@ -4659,12 +4683,12 @@ static void analyze_fn_async(CodeGen *g, ZigFn *fn, bool resolve_frame) {...@@ -4659,12 +4683,12 @@ static void analyze_fn_async(CodeGen *g, ZigFn *fn, bool resolve_frame) {
4659 }4683 }
46604684
4661 for (size_t i = 0; i < fn->call_list.length; i += 1) {4685 for (size_t i = 0; i < fn->call_list.length; i += 1) {
4662 IrInstructionCallGen *call = fn->call_list.at(i);4686 IrInstGenCall *call = fn->call_list.at(i);
4663 if (call->fn_entry == nullptr) {4687 if (call->fn_entry == nullptr) {
4664 // TODO function pointer call here, could be anything4688 // TODO function pointer call here, could be anything
4665 continue;4689 continue;
4666 }4690 }
4667 switch (analyze_callee_async(g, fn, call->fn_entry, call->base.source_node, must_not_be_async,4691 switch (analyze_callee_async(g, fn, call->fn_entry, call->base.base.source_node, must_not_be_async,
4668 call->modifier))4692 call->modifier))
4669 {4693 {
4670 case ErrorSemanticAnalyzeFail:4694 case ErrorSemanticAnalyzeFail:
...@@ -4682,10 +4706,10 @@ static void analyze_fn_async(CodeGen *g, ZigFn *fn, bool resolve_frame) {...@@ -4682,10 +4706,10 @@ static void analyze_fn_async(CodeGen *g, ZigFn *fn, bool resolve_frame) {
4682 }4706 }
4683 }4707 }
4684 for (size_t i = 0; i < fn->await_list.length; i += 1) {4708 for (size_t i = 0; i < fn->await_list.length; i += 1) {
4685 IrInstructionAwaitGen *await = fn->await_list.at(i);4709 IrInstGenAwait *await = fn->await_list.at(i);
4686 // TODO If this is a noasync await, it doesn't count4710 // TODO If this is a noasync await, it doesn't count
4687 // https://github.com/ziglang/zig/issues/31574711 // https://github.com/ziglang/zig/issues/3157
4688 switch (analyze_callee_async(g, fn, await->target_fn, await->base.source_node, must_not_be_async,4712 switch (analyze_callee_async(g, fn, await->target_fn, await->base.base.source_node, must_not_be_async,
4689 CallModifierNone))4713 CallModifierNone))
4690 {4714 {
4691 case ErrorSemanticAnalyzeFail:4715 case ErrorSemanticAnalyzeFail:
...@@ -4782,7 +4806,7 @@ static void analyze_fn_ir(CodeGen *g, ZigFn *fn, AstNode *return_type_node) {...@@ -4782,7 +4806,7 @@ static void analyze_fn_ir(CodeGen *g, ZigFn *fn, AstNode *return_type_node) {
47824806
4783 if (g->verbose_ir) {4807 if (g->verbose_ir) {
4784 fprintf(stderr, "fn %s() { // (analyzed)\n", buf_ptr(&fn->symbol_name));4808 fprintf(stderr, "fn %s() { // (analyzed)\n", buf_ptr(&fn->symbol_name));
4785 ir_print(g, stderr, &fn->analyzed_executable, 4, IrPassGen);4809 ir_print_gen(g, stderr, &fn->analyzed_executable, 4);
4786 fprintf(stderr, "}\n");4810 fprintf(stderr, "}\n");
4787 }4811 }
4788 fn->anal_state = FnAnalStateComplete;4812 fn->anal_state = FnAnalStateComplete;
...@@ -4825,7 +4849,7 @@ static void analyze_fn_body(CodeGen *g, ZigFn *fn_table_entry) {...@@ -4825,7 +4849,7 @@ static void analyze_fn_body(CodeGen *g, ZigFn *fn_table_entry) {
4825 fprintf(stderr, "\n");4849 fprintf(stderr, "\n");
4826 ast_render(stderr, fn_table_entry->body_node, 4);4850 ast_render(stderr, fn_table_entry->body_node, 4);
4827 fprintf(stderr, "\nfn %s() { // (IR)\n", buf_ptr(&fn_table_entry->symbol_name));4851 fprintf(stderr, "\nfn %s() { // (IR)\n", buf_ptr(&fn_table_entry->symbol_name));
4828 ir_print(g, stderr, fn_table_entry->ir_executable, 4, IrPassSrc);4852 ir_print_src(g, stderr, fn_table_entry->ir_executable, 4);
4829 fprintf(stderr, "}\n");4853 fprintf(stderr, "}\n");
4830 }4854 }
48314855
...@@ -6189,13 +6213,13 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {...@@ -6189,13 +6213,13 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
6189 ZigType *fn_type = get_async_fn_type(g, fn->type_entry);6213 ZigType *fn_type = get_async_fn_type(g, fn->type_entry);
61906214
6191 if (fn->analyzed_executable.need_err_code_spill) {6215 if (fn->analyzed_executable.need_err_code_spill) {
6192 IrInstructionAllocaGen *alloca_gen = allocate<IrInstructionAllocaGen>(1);6216 IrInstGenAlloca *alloca_gen = allocate<IrInstGenAlloca>(1);
6193 alloca_gen->base.id = IrInstructionIdAllocaGen;6217 alloca_gen->base.id = IrInstGenIdAlloca;
6194 alloca_gen->base.source_node = fn->proto_node;6218 alloca_gen->base.base.source_node = fn->proto_node;
6195 alloca_gen->base.scope = fn->child_scope;6219 alloca_gen->base.base.scope = fn->child_scope;
6196 alloca_gen->base.value = allocate<ZigValue>(1, "ZigValue");6220 alloca_gen->base.value = allocate<ZigValue>(1, "ZigValue");
6197 alloca_gen->base.value->type = get_pointer_to_type(g, g->builtin_types.entry_global_error_set, false);6221 alloca_gen->base.value->type = get_pointer_to_type(g, g->builtin_types.entry_global_error_set, false);
6198 alloca_gen->base.ref_count = 1;6222 alloca_gen->base.base.ref_count = 1;
6199 alloca_gen->name_hint = "";6223 alloca_gen->name_hint = "";
6200 fn->alloca_gen_list.append(alloca_gen);6224 fn->alloca_gen_list.append(alloca_gen);
6201 fn->err_code_spill = &alloca_gen->base;6225 fn->err_code_spill = &alloca_gen->base;
...@@ -6203,18 +6227,18 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {...@@ -6203,18 +6227,18 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
62036227
6204 ZigType *largest_call_frame_type = nullptr;6228 ZigType *largest_call_frame_type = nullptr;
6205 // Later we'll change this to be largest_call_frame_type instead of void.6229 // Later we'll change this to be largest_call_frame_type instead of void.
6206 IrInstruction *all_calls_alloca = ir_create_alloca(g, &fn->fndef_scope->base, fn->body_node,6230 IrInstGen *all_calls_alloca = ir_create_alloca(g, &fn->fndef_scope->base, fn->body_node,
6207 fn, g->builtin_types.entry_void, "@async_call_frame");6231 fn, g->builtin_types.entry_void, "@async_call_frame");
62086232
6209 for (size_t i = 0; i < fn->call_list.length; i += 1) {6233 for (size_t i = 0; i < fn->call_list.length; i += 1) {
6210 IrInstructionCallGen *call = fn->call_list.at(i);6234 IrInstGenCall *call = fn->call_list.at(i);
6211 if (call->new_stack != nullptr) {6235 if (call->new_stack != nullptr) {
6212 // don't need to allocate a frame for this6236 // don't need to allocate a frame for this
6213 continue;6237 continue;
6214 }6238 }
6215 ZigFn *callee = call->fn_entry;6239 ZigFn *callee = call->fn_entry;
6216 if (callee == nullptr) {6240 if (callee == nullptr) {
6217 add_node_error(g, call->base.source_node,6241 add_node_error(g, call->base.base.source_node,
6218 buf_sprintf("function is not comptime-known; @asyncCall required"));6242 buf_sprintf("function is not comptime-known; @asyncCall required"));
6219 return ErrorSemanticAnalyzeFail;6243 return ErrorSemanticAnalyzeFail;
6220 }6244 }
...@@ -6224,14 +6248,14 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {...@@ -6224,14 +6248,14 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
6224 if (callee->anal_state == FnAnalStateProbing) {6248 if (callee->anal_state == FnAnalStateProbing) {
6225 ErrorMsg *msg = add_node_error(g, fn->proto_node,6249 ErrorMsg *msg = add_node_error(g, fn->proto_node,
6226 buf_sprintf("unable to determine async function frame of '%s'", buf_ptr(&fn->symbol_name)));6250 buf_sprintf("unable to determine async function frame of '%s'", buf_ptr(&fn->symbol_name)));
6227 g->trace_err = add_error_note(g, msg, call->base.source_node,6251 g->trace_err = add_error_note(g, msg, call->base.base.source_node,
6228 buf_sprintf("analysis of function '%s' depends on the frame", buf_ptr(&callee->symbol_name)));6252 buf_sprintf("analysis of function '%s' depends on the frame", buf_ptr(&callee->symbol_name)));
6229 return ErrorSemanticAnalyzeFail;6253 return ErrorSemanticAnalyzeFail;
6230 }6254 }
62316255
6232 ZigType *callee_frame_type = get_fn_frame_type(g, callee);6256 ZigType *callee_frame_type = get_fn_frame_type(g, callee);
6233 frame_type->data.frame.resolve_loop_type = callee_frame_type;6257 frame_type->data.frame.resolve_loop_type = callee_frame_type;
6234 frame_type->data.frame.resolve_loop_src_node = call->base.source_node;6258 frame_type->data.frame.resolve_loop_src_node = call->base.base.source_node;
62356259
6236 analyze_fn_body(g, callee);6260 analyze_fn_body(g, callee);
6237 if (callee->anal_state == FnAnalStateInvalid) {6261 if (callee->anal_state == FnAnalStateInvalid) {
...@@ -6247,7 +6271,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {...@@ -6247,7 +6271,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
6247 if (!fn_is_async(callee))6271 if (!fn_is_async(callee))
6248 continue;6272 continue;
62496273
6250 mark_suspension_point(call->base.scope);6274 mark_suspension_point(call->base.base.scope);
62516275
6252 if ((err = type_resolve(g, callee_frame_type, ResolveStatusSizeKnown))) {6276 if ((err = type_resolve(g, callee_frame_type, ResolveStatusSizeKnown))) {
6253 return err;6277 return err;
...@@ -6269,7 +6293,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {...@@ -6269,7 +6293,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
6269 // For example: foo() + await z6293 // For example: foo() + await z
6270 // The funtion call result of foo() must be spilled.6294 // The funtion call result of foo() must be spilled.
6271 for (size_t i = 0; i < fn->await_list.length; i += 1) {6295 for (size_t i = 0; i < fn->await_list.length; i += 1) {
6272 IrInstructionAwaitGen *await = fn->await_list.at(i);6296 IrInstGenAwait *await = fn->await_list.at(i);
6273 // TODO If this is a noasync await, it doesn't suspend6297 // TODO If this is a noasync await, it doesn't suspend
6274 // https://github.com/ziglang/zig/issues/31576298 // https://github.com/ziglang/zig/issues/3157
6275 if (await->base.value->special != ConstValSpecialRuntime) {6299 if (await->base.value->special != ConstValSpecialRuntime) {
...@@ -6291,52 +6315,51 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {...@@ -6291,52 +6315,51 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
6291 }6315 }
6292 // This await is a suspend point, but it might not need a spill.6316 // This await is a suspend point, but it might not need a spill.
6293 // We do need to mark the ExprScope as having a suspend point in it.6317 // We do need to mark the ExprScope as having a suspend point in it.
6294 mark_suspension_point(await->base.scope);6318 mark_suspension_point(await->base.base.scope);
62956319
6296 if (await->result_loc != nullptr) {6320 if (await->result_loc != nullptr) {
6297 // If there's a result location, that is the spill6321 // If there's a result location, that is the spill
6298 continue;6322 continue;
6299 }6323 }
6300 if (await->base.ref_count == 0)6324 if (await->base.base.ref_count == 0)
6301 continue;6325 continue;
6302 if (!type_has_bits(await->base.value->type))6326 if (!type_has_bits(await->base.value->type))
6303 continue;6327 continue;
6304 await->result_loc = ir_create_alloca(g, await->base.scope, await->base.source_node, fn,6328 await->result_loc = ir_create_alloca(g, await->base.base.scope, await->base.base.source_node, fn,
6305 await->base.value->type, "");6329 await->base.value->type, "");
6306 }6330 }
6307 for (size_t block_i = 0; block_i < fn->analyzed_executable.basic_block_list.length; block_i += 1) {6331 for (size_t block_i = 0; block_i < fn->analyzed_executable.basic_block_list.length; block_i += 1) {
6308 IrBasicBlock *block = fn->analyzed_executable.basic_block_list.at(block_i);6332 IrBasicBlockGen *block = fn->analyzed_executable.basic_block_list.at(block_i);
6309 for (size_t instr_i = 0; instr_i < block->instruction_list.length; instr_i += 1) {6333 for (size_t instr_i = 0; instr_i < block->instruction_list.length; instr_i += 1) {
6310 IrInstruction *instruction = block->instruction_list.at(instr_i);6334 IrInstGen *instruction = block->instruction_list.at(instr_i);
6311 if (instruction->id == IrInstructionIdSuspendFinish) {6335 if (instruction->id == IrInstGenIdSuspendFinish) {
6312 mark_suspension_point(instruction->scope);6336 mark_suspension_point(instruction->base.scope);
6313 }6337 }
6314 }6338 }
6315 }6339 }
6316 // Now that we've marked all the expr scopes that have to spill, we go over the instructions6340 // Now that we've marked all the expr scopes that have to spill, we go over the instructions
6317 // and spill the relevant ones.6341 // and spill the relevant ones.
6318 for (size_t block_i = 0; block_i < fn->analyzed_executable.basic_block_list.length; block_i += 1) {6342 for (size_t block_i = 0; block_i < fn->analyzed_executable.basic_block_list.length; block_i += 1) {
6319 IrBasicBlock *block = fn->analyzed_executable.basic_block_list.at(block_i);6343 IrBasicBlockGen *block = fn->analyzed_executable.basic_block_list.at(block_i);
6320 for (size_t instr_i = 0; instr_i < block->instruction_list.length; instr_i += 1) {6344 for (size_t instr_i = 0; instr_i < block->instruction_list.length; instr_i += 1) {
6321 IrInstruction *instruction = block->instruction_list.at(instr_i);6345 IrInstGen *instruction = block->instruction_list.at(instr_i);
6322 if (instruction->id == IrInstructionIdAwaitGen ||6346 if (instruction->id == IrInstGenIdAwait ||
6323 instruction->id == IrInstructionIdVarPtr ||6347 instruction->id == IrInstGenIdVarPtr ||
6324 instruction->id == IrInstructionIdDeclRef ||6348 instruction->id == IrInstGenIdAlloca)
6325 instruction->id == IrInstructionIdAllocaGen)
6326 {6349 {
6327 // This instruction does its own spilling specially, or otherwise doesn't need it.6350 // This instruction does its own spilling specially, or otherwise doesn't need it.
6328 continue;6351 continue;
6329 }6352 }
6330 if (instruction->value->special != ConstValSpecialRuntime)6353 if (instruction->value->special != ConstValSpecialRuntime)
6331 continue;6354 continue;
6332 if (instruction->ref_count == 0)6355 if (instruction->base.ref_count == 0)
6333 continue;6356 continue;
6334 if ((err = type_resolve(g, instruction->value->type, ResolveStatusZeroBitsKnown)))6357 if ((err = type_resolve(g, instruction->value->type, ResolveStatusZeroBitsKnown)))
6335 return ErrorSemanticAnalyzeFail;6358 return ErrorSemanticAnalyzeFail;
6336 if (!type_has_bits(instruction->value->type))6359 if (!type_has_bits(instruction->value->type))
6337 continue;6360 continue;
6338 if (scope_needs_spill(instruction->scope)) {6361 if (scope_needs_spill(instruction->base.scope)) {
6339 instruction->spill = ir_create_alloca(g, instruction->scope, instruction->source_node,6362 instruction->spill = ir_create_alloca(g, instruction->base.scope, instruction->base.source_node,
6340 fn, instruction->value->type, "");6363 fn, instruction->value->type, "");
6341 }6364 }
6342 }6365 }
...@@ -6387,14 +6410,14 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {...@@ -6387,14 +6410,14 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
6387 }6410 }
63886411
6389 for (size_t alloca_i = 0; alloca_i < fn->alloca_gen_list.length; alloca_i += 1) {6412 for (size_t alloca_i = 0; alloca_i < fn->alloca_gen_list.length; alloca_i += 1) {
6390 IrInstructionAllocaGen *instruction = fn->alloca_gen_list.at(alloca_i);6413 IrInstGenAlloca *instruction = fn->alloca_gen_list.at(alloca_i);
6391 instruction->field_index = SIZE_MAX;6414 instruction->field_index = SIZE_MAX;
6392 ZigType *ptr_type = instruction->base.value->type;6415 ZigType *ptr_type = instruction->base.value->type;
6393 assert(ptr_type->id == ZigTypeIdPointer);6416 assert(ptr_type->id == ZigTypeIdPointer);
6394 ZigType *child_type = ptr_type->data.pointer.child_type;6417 ZigType *child_type = ptr_type->data.pointer.child_type;
6395 if (!type_has_bits(child_type))6418 if (!type_has_bits(child_type))
6396 continue;6419 continue;
6397 if (instruction->base.ref_count == 0)6420 if (instruction->base.base.ref_count == 0)
6398 continue;6421 continue;
6399 if (instruction->base.value->special != ConstValSpecialRuntime) {6422 if (instruction->base.value->special != ConstValSpecialRuntime) {
6400 if (const_ptr_pointee(nullptr, g, instruction->base.value, nullptr)->special !=6423 if (const_ptr_pointee(nullptr, g, instruction->base.value, nullptr)->special !=
...@@ -6405,7 +6428,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {...@@ -6405,7 +6428,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
6405 }6428 }
64066429
6407 frame_type->data.frame.resolve_loop_type = child_type;6430 frame_type->data.frame.resolve_loop_type = child_type;
6408 frame_type->data.frame.resolve_loop_src_node = instruction->base.source_node;6431 frame_type->data.frame.resolve_loop_src_node = instruction->base.base.source_node;
6409 if ((err = type_resolve(g, child_type, ResolveStatusSizeKnown))) {6432 if ((err = type_resolve(g, child_type, ResolveStatusSizeKnown))) {
6410 return err;6433 return err;
6411 }6434 }
...@@ -6419,7 +6442,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {...@@ -6419,7 +6442,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
6419 instruction->field_index = fields.length;6442 instruction->field_index = fields.length;
64206443
6421 src_assert(child_type->id != ZigTypeIdPointer || child_type->data.pointer.inferred_struct_field == nullptr,6444 src_assert(child_type->id != ZigTypeIdPointer || child_type->data.pointer.inferred_struct_field == nullptr,
6422 instruction->base.source_node);6445 instruction->base.base.source_node);
6423 fields.append({name, child_type, instruction->align});6446 fields.append({name, child_type, instruction->align});
6424 }6447 }
64256448
...@@ -6552,8 +6575,10 @@ bool ir_get_var_is_comptime(ZigVar *var) {...@@ -6552,8 +6575,10 @@ bool ir_get_var_is_comptime(ZigVar *var) {
6552 // As an optimization, is_comptime values which are constant are allowed6575 // As an optimization, is_comptime values which are constant are allowed
6553 // to be omitted from analysis. In this case, there is no child instruction6576 // to be omitted from analysis. In this case, there is no child instruction
6554 // and we simply look at the unanalyzed const parent instruction.6577 // and we simply look at the unanalyzed const parent instruction.
6555 assert(var->is_comptime->value->type->id == ZigTypeIdBool);6578 assert(var->is_comptime->id == IrInstSrcIdConst);
6556 var->is_comptime_memoized_value = var->is_comptime->value->data.x_bool;6579 IrInstSrcConst *const_inst = reinterpret_cast<IrInstSrcConst *>(var->is_comptime);
6580 assert(const_inst->value->type->id == ZigTypeIdBool);
6581 var->is_comptime_memoized_value = const_inst->value->data.x_bool;
6557 var->is_comptime = nullptr;6582 var->is_comptime = nullptr;
6558 return var->is_comptime_memoized_value;6583 return var->is_comptime_memoized_value;
6559}6584}
...@@ -8315,7 +8340,7 @@ static void resolve_llvm_types_enum(CodeGen *g, ZigType *enum_type, ResolveStatu...@@ -8315,7 +8340,7 @@ static void resolve_llvm_types_enum(CodeGen *g, ZigType *enum_type, ResolveStatu
83158340
8316 uint32_t field_count = enum_type->data.enumeration.src_field_count;8341 uint32_t field_count = enum_type->data.enumeration.src_field_count;
83178342
8318 assert(enum_type->data.enumeration.fields);8343 assert(field_count == 0 || enum_type->data.enumeration.fields != nullptr);
8319 ZigLLVMDIEnumerator **di_enumerators = allocate<ZigLLVMDIEnumerator*>(field_count);8344 ZigLLVMDIEnumerator **di_enumerators = allocate<ZigLLVMDIEnumerator*>(field_count);
83208345
8321 for (uint32_t i = 0; i < field_count; i += 1) {8346 for (uint32_t i = 0; i < field_count; i += 1) {
...@@ -9196,21 +9221,6 @@ void src_assert(bool ok, AstNode *source_node) {...@@ -9196,21 +9221,6 @@ void src_assert(bool ok, AstNode *source_node) {
9196 stage2_panic(msg, strlen(msg));9221 stage2_panic(msg, strlen(msg));
9197}9222}
91989223
9199IrInstruction *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
9200 ZigType *var_type, const char *name_hint)
9201{
9202 IrInstructionAllocaGen *alloca_gen = allocate<IrInstructionAllocaGen>(1);
9203 alloca_gen->base.id = IrInstructionIdAllocaGen;
9204 alloca_gen->base.source_node = source_node;
9205 alloca_gen->base.scope = scope;
9206 alloca_gen->base.value = allocate<ZigValue>(1, "ZigValue");
9207 alloca_gen->base.value->type = get_pointer_to_type(g, var_type, false);
9208 alloca_gen->base.ref_count = 1;
9209 alloca_gen->name_hint = name_hint;
9210 fn->alloca_gen_list.append(alloca_gen);
9211 return &alloca_gen->base;
9212}
9213
9214Error analyze_import(CodeGen *g, ZigType *source_import, Buf *import_target_str,9224Error analyze_import(CodeGen *g, ZigType *source_import, Buf *import_target_str,
9215 ZigType **out_import, Buf **out_import_target_path, Buf *out_full_path)9225 ZigType **out_import, Buf **out_import_target_path, Buf *out_full_path)
9216{9226{
...@@ -9271,8 +9281,17 @@ Error analyze_import(CodeGen *g, ZigType *source_import, Buf *import_target_str,...@@ -9271,8 +9281,17 @@ Error analyze_import(CodeGen *g, ZigType *source_import, Buf *import_target_str,
9271}9281}
92729282
92739283
9274void IrExecutable::src() {9284void IrExecutableSrc::src() {
9275 IrExecutable *it;9285 if (this->source_node != nullptr) {
9286 this->source_node->src();
9287 }
9288 if (this->parent_exec != nullptr) {
9289 this->parent_exec->src();
9290 }
9291}
9292
9293void IrExecutableGen::src() {
9294 IrExecutableGen *it;
9276 for (it = this; it != nullptr && it->source_node != nullptr; it = it->parent_exec) {9295 for (it = this; it != nullptr && it->source_node != nullptr; it = it->parent_exec) {
9277 it->source_node->src();9296 it->source_node->src();
9278 }9297 }
...@@ -9523,3 +9542,41 @@ static void dump_value_indent(ZigValue *val, int indent) {...@@ -9523,3 +9542,41 @@ static void dump_value_indent(ZigValue *val, int indent) {
9523void ZigValue::dump() {9542void ZigValue::dump() {
9524 dump_value_indent(this, 0);9543 dump_value_indent(this, 0);
9525}9544}
9545
9546// float ops that take a single argument
9547//TODO Powi, Pow, minnum, maxnum, maximum, minimum, copysign, lround, llround, lrint, llrint
9548const char *float_op_to_name(BuiltinFnId op) {
9549 switch (op) {
9550 case BuiltinFnIdSqrt:
9551 return "sqrt";
9552 case BuiltinFnIdSin:
9553 return "sin";
9554 case BuiltinFnIdCos:
9555 return "cos";
9556 case BuiltinFnIdExp:
9557 return "exp";
9558 case BuiltinFnIdExp2:
9559 return "exp2";
9560 case BuiltinFnIdLog:
9561 return "log";
9562 case BuiltinFnIdLog10:
9563 return "log10";
9564 case BuiltinFnIdLog2:
9565 return "log2";
9566 case BuiltinFnIdFabs:
9567 return "fabs";
9568 case BuiltinFnIdFloor:
9569 return "floor";
9570 case BuiltinFnIdCeil:
9571 return "ceil";
9572 case BuiltinFnIdTrunc:
9573 return "trunc";
9574 case BuiltinFnIdNearbyInt:
9575 return "nearbyint";
9576 case BuiltinFnIdRound:
9577 return "round";
9578 default:
9579 zig_unreachable();
9580 }
9581}
9582
src/analyze.hpp+2-3
...@@ -120,7 +120,7 @@ ScopeLoop *create_loop_scope(CodeGen *g, AstNode *node, Scope *parent);...@@ -120,7 +120,7 @@ ScopeLoop *create_loop_scope(CodeGen *g, AstNode *node, Scope *parent);
120ScopeSuspend *create_suspend_scope(CodeGen *g, AstNode *node, Scope *parent);120ScopeSuspend *create_suspend_scope(CodeGen *g, AstNode *node, Scope *parent);
121ScopeFnDef *create_fndef_scope(CodeGen *g, AstNode *node, Scope *parent, ZigFn *fn_entry);121ScopeFnDef *create_fndef_scope(CodeGen *g, AstNode *node, Scope *parent, ZigFn *fn_entry);
122Scope *create_comptime_scope(CodeGen *g, AstNode *node, Scope *parent);122Scope *create_comptime_scope(CodeGen *g, AstNode *node, Scope *parent);
123Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstruction *is_comptime);123Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstSrc *is_comptime);
124Scope *create_typeof_scope(CodeGen *g, AstNode *node, Scope *parent);124Scope *create_typeof_scope(CodeGen *g, AstNode *node, Scope *parent);
125ScopeExpr *create_expr_scope(CodeGen *g, AstNode *node, Scope *parent);125ScopeExpr *create_expr_scope(CodeGen *g, AstNode *node, Scope *parent);
126126
...@@ -271,8 +271,6 @@ ZigType *resolve_struct_field_type(CodeGen *g, TypeStructField *struct_field);...@@ -271,8 +271,6 @@ ZigType *resolve_struct_field_type(CodeGen *g, TypeStructField *struct_field);
271271
272void add_async_error_notes(CodeGen *g, ErrorMsg *msg, ZigFn *fn);272void add_async_error_notes(CodeGen *g, ErrorMsg *msg, ZigFn *fn);
273273
274IrInstruction *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
275 ZigType *var_type, const char *name_hint);
276Error analyze_import(CodeGen *codegen, ZigType *source_import, Buf *import_target_str,274Error analyze_import(CodeGen *codegen, ZigType *source_import, Buf *import_target_str,
277 ZigType **out_import, Buf **out_import_target_path, Buf *out_full_path);275 ZigType **out_import, Buf **out_import_target_path, Buf *out_full_path);
278ZigValue *get_the_one_possible_value(CodeGen *g, ZigType *type_entry);276ZigValue *get_the_one_possible_value(CodeGen *g, ZigType *type_entry);
...@@ -281,4 +279,5 @@ void copy_const_val(ZigValue *dest, ZigValue *src);...@@ -281,4 +279,5 @@ void copy_const_val(ZigValue *dest, ZigValue *src);
281bool type_has_optional_repr(ZigType *ty);279bool type_has_optional_repr(ZigType *ty);
282bool is_opt_err_set(ZigType *ty);280bool is_opt_err_set(ZigType *ty);
283bool type_is_numeric(ZigType *ty);281bool type_is_numeric(ZigType *ty);
282const char *float_op_to_name(BuiltinFnId op);
284#endif283#endif
src/codegen.cpp+467-517
...@@ -31,11 +31,6 @@ enum ResumeId {...@@ -31,11 +31,6 @@ enum ResumeId {
31 ResumeIdCall,31 ResumeIdCall,
32};32};
3333
34// TODO https://github.com/ziglang/zig/issues/2883
35// Until then we have this same default as Clang.
36// This avoids https://github.com/ziglang/zig/issues/3275
37static const char *riscv_default_features = "+a,+c,+d,+f,+m,+relax";
38
39static void init_darwin_native(CodeGen *g) {34static void init_darwin_native(CodeGen *g) {
40 char *osx_target = getenv("MACOSX_DEPLOYMENT_TARGET");35 char *osx_target = getenv("MACOSX_DEPLOYMENT_TARGET");
41 char *ios_target = getenv("IPHONEOS_DEPLOYMENT_TARGET");36 char *ios_target = getenv("IPHONEOS_DEPLOYMENT_TARGET");
...@@ -192,7 +187,7 @@ static void generate_error_name_table(CodeGen *g);...@@ -192,7 +187,7 @@ static void generate_error_name_table(CodeGen *g);
192static bool value_is_all_undef(CodeGen *g, ZigValue *const_val);187static bool value_is_all_undef(CodeGen *g, ZigValue *const_val);
193static void gen_undef_init(CodeGen *g, uint32_t ptr_align_bytes, ZigType *value_type, LLVMValueRef ptr);188static void gen_undef_init(CodeGen *g, uint32_t ptr_align_bytes, ZigType *value_type, LLVMValueRef ptr);
194static LLVMValueRef build_alloca(CodeGen *g, ZigType *type_entry, const char *name, uint32_t alignment);189static LLVMValueRef build_alloca(CodeGen *g, ZigType *type_entry, const char *name, uint32_t alignment);
195static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_instr,190static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstGen *source_instr,
196 LLVMValueRef target_frame_ptr, ZigType *result_type, ZigType *ptr_result_type,191 LLVMValueRef target_frame_ptr, ZigType *result_type, ZigType *ptr_result_type,
197 LLVMValueRef result_loc, bool non_async);192 LLVMValueRef result_loc, bool non_async);
198static Error get_tmp_filename(CodeGen *g, Buf *out, Buf *suffix);193static Error get_tmp_filename(CodeGen *g, Buf *out, Buf *suffix);
...@@ -878,14 +873,14 @@ static LLVMValueRef get_handle_value(CodeGen *g, LLVMValueRef ptr, ZigType *type...@@ -878,14 +873,14 @@ static LLVMValueRef get_handle_value(CodeGen *g, LLVMValueRef ptr, ZigType *type
878 }873 }
879}874}
880875
881static void ir_assert(bool ok, IrInstruction *source_instruction) {876static void ir_assert(bool ok, IrInstGen *source_instruction) {
882 if (ok) return;877 if (ok) return;
883 src_assert(ok, source_instruction->source_node);878 src_assert(ok, source_instruction->base.source_node);
884}879}
885880
886static bool ir_want_fast_math(CodeGen *g, IrInstruction *instruction) {881static bool ir_want_fast_math(CodeGen *g, IrInstGen *instruction) {
887 // TODO memoize882 // TODO memoize
888 Scope *scope = instruction->scope;883 Scope *scope = instruction->base.scope;
889 while (scope) {884 while (scope) {
890 if (scope->id == ScopeIdBlock) {885 if (scope->id == ScopeIdBlock) {
891 ScopeBlock *block_scope = (ScopeBlock *)scope;886 ScopeBlock *block_scope = (ScopeBlock *)scope;
...@@ -920,8 +915,8 @@ static bool ir_want_runtime_safety_scope(CodeGen *g, Scope *scope) {...@@ -920,8 +915,8 @@ static bool ir_want_runtime_safety_scope(CodeGen *g, Scope *scope) {
920 g->build_mode != BuildModeSmallRelease);915 g->build_mode != BuildModeSmallRelease);
921}916}
922917
923static bool ir_want_runtime_safety(CodeGen *g, IrInstruction *instruction) {918static bool ir_want_runtime_safety(CodeGen *g, IrInstGen *instruction) {
924 return ir_want_runtime_safety_scope(g, instruction->scope);919 return ir_want_runtime_safety_scope(g, instruction->base.scope);
925}920}
926921
927static Buf *panic_msg_buf(PanicMsgId msg_id) {922static Buf *panic_msg_buf(PanicMsgId msg_id) {
...@@ -1047,8 +1042,8 @@ static void gen_assertion_scope(CodeGen *g, PanicMsgId msg_id, Scope *source_sco...@@ -1047,8 +1042,8 @@ static void gen_assertion_scope(CodeGen *g, PanicMsgId msg_id, Scope *source_sco
1047 }1042 }
1048}1043}
10491044
1050static void gen_assertion(CodeGen *g, PanicMsgId msg_id, IrInstruction *source_instruction) {1045static void gen_assertion(CodeGen *g, PanicMsgId msg_id, IrInstGen *source_instruction) {
1051 return gen_assertion_scope(g, msg_id, source_instruction->scope);1046 return gen_assertion_scope(g, msg_id, source_instruction->base.scope);
1052}1047}
10531048
1054static LLVMValueRef get_stacksave_fn_val(CodeGen *g) {1049static LLVMValueRef get_stacksave_fn_val(CodeGen *g) {
...@@ -1762,7 +1757,7 @@ static void gen_var_debug_decl(CodeGen *g, ZigVar *var) {...@@ -1762,7 +1757,7 @@ static void gen_var_debug_decl(CodeGen *g, ZigVar *var) {
1762 LLVMGetInsertBlock(g->builder));1757 LLVMGetInsertBlock(g->builder));
1763}1758}
17641759
1765static LLVMValueRef ir_llvm_value(CodeGen *g, IrInstruction *instruction) {1760static LLVMValueRef ir_llvm_value(CodeGen *g, IrInstGen *instruction) {
1766 Error err;1761 Error err;
17671762
1768 bool value_has_bits;1763 bool value_has_bits;
...@@ -1773,8 +1768,8 @@ static LLVMValueRef ir_llvm_value(CodeGen *g, IrInstruction *instruction) {...@@ -1773,8 +1768,8 @@ static LLVMValueRef ir_llvm_value(CodeGen *g, IrInstruction *instruction) {
1773 return nullptr;1768 return nullptr;
17741769
1775 if (!instruction->llvm_value) {1770 if (!instruction->llvm_value) {
1776 if (instruction->id == IrInstructionIdAwaitGen) {1771 if (instruction->id == IrInstGenIdAwait) {
1777 IrInstructionAwaitGen *await = reinterpret_cast<IrInstructionAwaitGen*>(instruction);1772 IrInstGenAwait *await = reinterpret_cast<IrInstGenAwait*>(instruction);
1778 if (await->result_loc != nullptr) {1773 if (await->result_loc != nullptr) {
1779 return get_handle_value(g, ir_llvm_value(g, await->result_loc),1774 return get_handle_value(g, ir_llvm_value(g, await->result_loc),
1780 await->result_loc->value->type->data.pointer.child_type, await->result_loc->value->type);1775 await->result_loc->value->type->data.pointer.child_type, await->result_loc->value->type);
...@@ -1857,9 +1852,9 @@ static bool iter_function_params_c_abi(CodeGen *g, ZigType *fn_type, FnWalk *fn_...@@ -1857,9 +1852,9 @@ static bool iter_function_params_c_abi(CodeGen *g, ZigType *fn_type, FnWalk *fn_
1857 case FnWalkIdCall: {1852 case FnWalkIdCall: {
1858 if (src_i >= fn_walk->data.call.inst->arg_count)1853 if (src_i >= fn_walk->data.call.inst->arg_count)
1859 return false;1854 return false;
1860 IrInstruction *arg = fn_walk->data.call.inst->args[src_i];1855 IrInstGen *arg = fn_walk->data.call.inst->args[src_i];
1861 ty = arg->value->type;1856 ty = arg->value->type;
1862 source_node = arg->source_node;1857 source_node = arg->base.source_node;
1863 val = ir_llvm_value(g, arg);1858 val = ir_llvm_value(g, arg);
1864 break;1859 break;
1865 }1860 }
...@@ -2092,10 +2087,10 @@ void walk_function_params(CodeGen *g, ZigType *fn_type, FnWalk *fn_walk) {...@@ -2092,10 +2087,10 @@ void walk_function_params(CodeGen *g, ZigType *fn_type, FnWalk *fn_walk) {
2092 return;2087 return;
2093 }2088 }
2094 if (fn_walk->id == FnWalkIdCall) {2089 if (fn_walk->id == FnWalkIdCall) {
2095 IrInstructionCallGen *instruction = fn_walk->data.call.inst;2090 IrInstGenCall *instruction = fn_walk->data.call.inst;
2096 bool is_var_args = fn_walk->data.call.is_var_args;2091 bool is_var_args = fn_walk->data.call.is_var_args;
2097 for (size_t call_i = 0; call_i < instruction->arg_count; call_i += 1) {2092 for (size_t call_i = 0; call_i < instruction->arg_count; call_i += 1) {
2098 IrInstruction *param_instruction = instruction->args[call_i];2093 IrInstGen *param_instruction = instruction->args[call_i];
2099 ZigType *param_type = param_instruction->value->type;2094 ZigType *param_type = param_instruction->value->type;
2100 if (is_var_args || type_has_bits(param_type)) {2095 if (is_var_args || type_has_bits(param_type)) {
2101 LLVMValueRef param_value = ir_llvm_value(g, param_instruction);2096 LLVMValueRef param_value = ir_llvm_value(g, param_instruction);
...@@ -2310,14 +2305,14 @@ static LLVMValueRef get_merge_err_ret_traces_fn_val(CodeGen *g) {...@@ -2310,14 +2305,14 @@ static LLVMValueRef get_merge_err_ret_traces_fn_val(CodeGen *g) {
2310 return fn_val;2305 return fn_val;
23112306
2312}2307}
2313static LLVMValueRef ir_render_save_err_ret_addr(CodeGen *g, IrExecutable *executable,2308static LLVMValueRef ir_render_save_err_ret_addr(CodeGen *g, IrExecutableGen *executable,
2314 IrInstructionSaveErrRetAddr *save_err_ret_addr_instruction)2309 IrInstGenSaveErrRetAddr *save_err_ret_addr_instruction)
2315{2310{
2316 assert(g->have_err_ret_tracing);2311 assert(g->have_err_ret_tracing);
23172312
2318 LLVMValueRef return_err_fn = get_return_err_fn(g);2313 LLVMValueRef return_err_fn = get_return_err_fn(g);
2319 bool is_llvm_alloca;2314 bool is_llvm_alloca;
2320 LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, save_err_ret_addr_instruction->base.scope,2315 LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, save_err_ret_addr_instruction->base.base.scope,
2321 &is_llvm_alloca);2316 &is_llvm_alloca);
2322 ZigLLVMBuildCall(g->builder, return_err_fn, &my_err_trace_val, 1,2317 ZigLLVMBuildCall(g->builder, return_err_fn, &my_err_trace_val, 1,
2323 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");2318 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
...@@ -2332,7 +2327,7 @@ static LLVMValueRef ir_render_save_err_ret_addr(CodeGen *g, IrExecutable *execut...@@ -2332,7 +2327,7 @@ static LLVMValueRef ir_render_save_err_ret_addr(CodeGen *g, IrExecutable *execut
2332 return nullptr;2327 return nullptr;
2333}2328}
23342329
2335static void gen_assert_resume_id(CodeGen *g, IrInstruction *source_instr, ResumeId resume_id, PanicMsgId msg_id,2330static void gen_assert_resume_id(CodeGen *g, IrInstGen *source_instr, ResumeId resume_id, PanicMsgId msg_id,
2336 LLVMBasicBlockRef end_bb)2331 LLVMBasicBlockRef end_bb)
2337{2332{
2338 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;2333 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
...@@ -2409,7 +2404,7 @@ static LLVMValueRef gen_maybe_atomic_op(CodeGen *g, LLVMAtomicRMWBinOp op, LLVMV...@@ -2409,7 +2404,7 @@ static LLVMValueRef gen_maybe_atomic_op(CodeGen *g, LLVMAtomicRMWBinOp op, LLVMV
2409 }2404 }
2410}2405}
24112406
2412static void gen_async_return(CodeGen *g, IrInstructionReturn *instruction) {2407static void gen_async_return(CodeGen *g, IrInstGenReturn *instruction) {
2413 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;2408 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
24142409
2415 ZigType *operand_type = (instruction->operand != nullptr) ? instruction->operand->value->type : nullptr;2410 ZigType *operand_type = (instruction->operand != nullptr) ? instruction->operand->value->type : nullptr;
...@@ -2488,7 +2483,7 @@ static void gen_async_return(CodeGen *g, IrInstructionReturn *instruction) {...@@ -2488,7 +2483,7 @@ static void gen_async_return(CodeGen *g, IrInstructionReturn *instruction) {
2488 frame_index_trace_arg(g, ret_type) + 1, "");2483 frame_index_trace_arg(g, ret_type) + 1, "");
2489 LLVMValueRef dest_trace_ptr = LLVMBuildLoad(g->builder, awaiter_trace_ptr_ptr, "");2484 LLVMValueRef dest_trace_ptr = LLVMBuildLoad(g->builder, awaiter_trace_ptr_ptr, "");
2490 bool is_llvm_alloca;2485 bool is_llvm_alloca;
2491 LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);2486 LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
2492 LLVMValueRef args[] = { dest_trace_ptr, my_err_trace_val };2487 LLVMValueRef args[] = { dest_trace_ptr, my_err_trace_val };
2493 ZigLLVMBuildCall(g->builder, get_merge_err_ret_traces_fn_val(g), args, 2,2488 ZigLLVMBuildCall(g->builder, get_merge_err_ret_traces_fn_val(g), args, 2,
2494 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");2489 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
...@@ -2503,7 +2498,7 @@ static void gen_async_return(CodeGen *g, IrInstructionReturn *instruction) {...@@ -2503,7 +2498,7 @@ static void gen_async_return(CodeGen *g, IrInstructionReturn *instruction) {
2503 LLVMBuildRetVoid(g->builder);2498 LLVMBuildRetVoid(g->builder);
2504}2499}
25052500
2506static LLVMValueRef ir_render_return(CodeGen *g, IrExecutable *executable, IrInstructionReturn *instruction) {2501static LLVMValueRef ir_render_return(CodeGen *g, IrExecutableGen *executable, IrInstGenReturn *instruction) {
2507 if (fn_is_async(g->cur_fn)) {2502 if (fn_is_async(g->cur_fn)) {
2508 gen_async_return(g, instruction);2503 gen_async_return(g, instruction);
2509 return nullptr;2504 return nullptr;
...@@ -2844,12 +2839,12 @@ static LLVMValueRef gen_rem(CodeGen *g, bool want_runtime_safety, bool want_fast...@@ -2844,12 +2839,12 @@ static LLVMValueRef gen_rem(CodeGen *g, bool want_runtime_safety, bool want_fast
28442839
2845}2840}
28462841
2847static LLVMValueRef ir_render_bin_op(CodeGen *g, IrExecutable *executable,2842static LLVMValueRef ir_render_bin_op(CodeGen *g, IrExecutableGen *executable,
2848 IrInstructionBinOp *bin_op_instruction)2843 IrInstGenBinOp *bin_op_instruction)
2849{2844{
2850 IrBinOp op_id = bin_op_instruction->op_id;2845 IrBinOp op_id = bin_op_instruction->op_id;
2851 IrInstruction *op1 = bin_op_instruction->op1;2846 IrInstGen *op1 = bin_op_instruction->op1;
2852 IrInstruction *op2 = bin_op_instruction->op2;2847 IrInstGen *op2 = bin_op_instruction->op2;
28532848
2854 ZigType *operand_type = op1->value->type;2849 ZigType *operand_type = op1->value->type;
2855 ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ? operand_type->data.vector.elem_type : operand_type;2850 ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ? operand_type->data.vector.elem_type : operand_type;
...@@ -3054,8 +3049,8 @@ static void add_error_range_check(CodeGen *g, ZigType *err_set_type, ZigType *in...@@ -3054,8 +3049,8 @@ static void add_error_range_check(CodeGen *g, ZigType *err_set_type, ZigType *in
3054 }3049 }
3055}3050}
30563051
3057static LLVMValueRef ir_render_resize_slice(CodeGen *g, IrExecutable *executable,3052static LLVMValueRef ir_render_resize_slice(CodeGen *g, IrExecutableGen *executable,
3058 IrInstructionResizeSlice *instruction)3053 IrInstGenResizeSlice *instruction)
3059{3054{
3060 ZigType *actual_type = instruction->operand->value->type;3055 ZigType *actual_type = instruction->operand->value->type;
3061 ZigType *wanted_type = instruction->base.value->type;3056 ZigType *wanted_type = instruction->base.value->type;
...@@ -3122,8 +3117,8 @@ static LLVMValueRef ir_render_resize_slice(CodeGen *g, IrExecutable *executable,...@@ -3122,8 +3117,8 @@ static LLVMValueRef ir_render_resize_slice(CodeGen *g, IrExecutable *executable,
3122 return result_loc;3117 return result_loc;
3123}3118}
31243119
3125static LLVMValueRef ir_render_cast(CodeGen *g, IrExecutable *executable,3120static LLVMValueRef ir_render_cast(CodeGen *g, IrExecutableGen *executable,
3126 IrInstructionCast *cast_instruction)3121 IrInstGenCast *cast_instruction)
3127{3122{
3128 ZigType *actual_type = cast_instruction->value->value->type;3123 ZigType *actual_type = cast_instruction->value->value->type;
3129 ZigType *wanted_type = cast_instruction->base.value->type;3124 ZigType *wanted_type = cast_instruction->base.value->type;
...@@ -3200,8 +3195,8 @@ static LLVMValueRef ir_render_cast(CodeGen *g, IrExecutable *executable,...@@ -3200,8 +3195,8 @@ static LLVMValueRef ir_render_cast(CodeGen *g, IrExecutable *executable,
3200 zig_unreachable();3195 zig_unreachable();
3201}3196}
32023197
3203static LLVMValueRef ir_render_ptr_of_array_to_slice(CodeGen *g, IrExecutable *executable,3198static LLVMValueRef ir_render_ptr_of_array_to_slice(CodeGen *g, IrExecutableGen *executable,
3204 IrInstructionPtrOfArrayToSlice *instruction)3199 IrInstGenPtrOfArrayToSlice *instruction)
3205{3200{
3206 ZigType *actual_type = instruction->operand->value->type;3201 ZigType *actual_type = instruction->operand->value->type;
3207 ZigType *slice_type = instruction->base.value->type;3202 ZigType *slice_type = instruction->base.value->type;
...@@ -3237,8 +3232,8 @@ static LLVMValueRef ir_render_ptr_of_array_to_slice(CodeGen *g, IrExecutable *ex...@@ -3237,8 +3232,8 @@ static LLVMValueRef ir_render_ptr_of_array_to_slice(CodeGen *g, IrExecutable *ex
3237 return result_loc;3232 return result_loc;
3238}3233}
32393234
3240static LLVMValueRef ir_render_ptr_cast(CodeGen *g, IrExecutable *executable,3235static LLVMValueRef ir_render_ptr_cast(CodeGen *g, IrExecutableGen *executable,
3241 IrInstructionPtrCastGen *instruction)3236 IrInstGenPtrCast *instruction)
3242{3237{
3243 ZigType *wanted_type = instruction->base.value->type;3238 ZigType *wanted_type = instruction->base.value->type;
3244 if (!type_has_bits(wanted_type)) {3239 if (!type_has_bits(wanted_type)) {
...@@ -3263,8 +3258,8 @@ static LLVMValueRef ir_render_ptr_cast(CodeGen *g, IrExecutable *executable,...@@ -3263,8 +3258,8 @@ static LLVMValueRef ir_render_ptr_cast(CodeGen *g, IrExecutable *executable,
3263 return result_ptr;3258 return result_ptr;
3264}3259}
32653260
3266static LLVMValueRef ir_render_bit_cast(CodeGen *g, IrExecutable *executable,3261static LLVMValueRef ir_render_bit_cast(CodeGen *g, IrExecutableGen *executable,
3267 IrInstructionBitCastGen *instruction)3262 IrInstGenBitCast *instruction)
3268{3263{
3269 ZigType *wanted_type = instruction->base.value->type;3264 ZigType *wanted_type = instruction->base.value->type;
3270 ZigType *actual_type = instruction->operand->value->type;3265 ZigType *actual_type = instruction->operand->value->type;
...@@ -3287,8 +3282,8 @@ static LLVMValueRef ir_render_bit_cast(CodeGen *g, IrExecutable *executable,...@@ -3287,8 +3282,8 @@ static LLVMValueRef ir_render_bit_cast(CodeGen *g, IrExecutable *executable,
3287 }3282 }
3288}3283}
32893284
3290static LLVMValueRef ir_render_widen_or_shorten(CodeGen *g, IrExecutable *executable,3285static LLVMValueRef ir_render_widen_or_shorten(CodeGen *g, IrExecutableGen *executable,
3291 IrInstructionWidenOrShorten *instruction)3286 IrInstGenWidenOrShorten *instruction)
3292{3287{
3293 ZigType *actual_type = instruction->target->value->type;3288 ZigType *actual_type = instruction->target->value->type;
3294 // TODO instead of this logic, use the Noop instruction to change the type from3289 // TODO instead of this logic, use the Noop instruction to change the type from
...@@ -3304,7 +3299,7 @@ static LLVMValueRef ir_render_widen_or_shorten(CodeGen *g, IrExecutable *executa...@@ -3304,7 +3299,7 @@ static LLVMValueRef ir_render_widen_or_shorten(CodeGen *g, IrExecutable *executa
3304 instruction->base.value->type, target_val);3299 instruction->base.value->type, target_val);
3305}3300}
33063301
3307static LLVMValueRef ir_render_int_to_ptr(CodeGen *g, IrExecutable *executable, IrInstructionIntToPtr *instruction) {3302static LLVMValueRef ir_render_int_to_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenIntToPtr *instruction) {
3308 ZigType *wanted_type = instruction->base.value->type;3303 ZigType *wanted_type = instruction->base.value->type;
3309 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);3304 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
33103305
...@@ -3342,13 +3337,13 @@ static LLVMValueRef ir_render_int_to_ptr(CodeGen *g, IrExecutable *executable, I...@@ -3342,13 +3337,13 @@ static LLVMValueRef ir_render_int_to_ptr(CodeGen *g, IrExecutable *executable, I
3342 return LLVMBuildIntToPtr(g->builder, target_val, get_llvm_type(g, wanted_type), "");3337 return LLVMBuildIntToPtr(g->builder, target_val, get_llvm_type(g, wanted_type), "");
3343}3338}
33443339
3345static LLVMValueRef ir_render_ptr_to_int(CodeGen *g, IrExecutable *executable, IrInstructionPtrToInt *instruction) {3340static LLVMValueRef ir_render_ptr_to_int(CodeGen *g, IrExecutableGen *executable, IrInstGenPtrToInt *instruction) {
3346 ZigType *wanted_type = instruction->base.value->type;3341 ZigType *wanted_type = instruction->base.value->type;
3347 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);3342 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
3348 return LLVMBuildPtrToInt(g->builder, target_val, get_llvm_type(g, wanted_type), "");3343 return LLVMBuildPtrToInt(g->builder, target_val, get_llvm_type(g, wanted_type), "");
3349}3344}
33503345
3351static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutable *executable, IrInstructionIntToEnum *instruction) {3346static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutableGen *executable, IrInstGenIntToEnum *instruction) {
3352 ZigType *wanted_type = instruction->base.value->type;3347 ZigType *wanted_type = instruction->base.value->type;
3353 assert(wanted_type->id == ZigTypeIdEnum);3348 assert(wanted_type->id == ZigTypeIdEnum);
3354 ZigType *tag_int_type = wanted_type->data.enumeration.tag_int_type;3349 ZigType *tag_int_type = wanted_type->data.enumeration.tag_int_type;
...@@ -3357,7 +3352,7 @@ static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutable *executable,...@@ -3357,7 +3352,7 @@ static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutable *executable,
3357 LLVMValueRef tag_int_value = gen_widen_or_shorten(g, ir_want_runtime_safety(g, &instruction->base),3352 LLVMValueRef tag_int_value = gen_widen_or_shorten(g, ir_want_runtime_safety(g, &instruction->base),
3358 instruction->target->value->type, tag_int_type, target_val);3353 instruction->target->value->type, tag_int_type, target_val);
33593354
3360 if (ir_want_runtime_safety(g, &instruction->base) && wanted_type->data.enumeration.layout != ContainerLayoutExtern) {3355 if (ir_want_runtime_safety(g, &instruction->base) && !wanted_type->data.enumeration.non_exhaustive) {
3361 LLVMBasicBlockRef bad_value_block = LLVMAppendBasicBlock(g->cur_fn_val, "BadValue");3356 LLVMBasicBlockRef bad_value_block = LLVMAppendBasicBlock(g->cur_fn_val, "BadValue");
3362 LLVMBasicBlockRef ok_value_block = LLVMAppendBasicBlock(g->cur_fn_val, "OkValue");3357 LLVMBasicBlockRef ok_value_block = LLVMAppendBasicBlock(g->cur_fn_val, "OkValue");
3363 size_t field_count = wanted_type->data.enumeration.src_field_count;3358 size_t field_count = wanted_type->data.enumeration.src_field_count;
...@@ -3375,7 +3370,7 @@ static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutable *executable,...@@ -3375,7 +3370,7 @@ static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutable *executable,
3375 return tag_int_value;3370 return tag_int_value;
3376}3371}
33773372
3378static LLVMValueRef ir_render_int_to_err(CodeGen *g, IrExecutable *executable, IrInstructionIntToErr *instruction) {3373static LLVMValueRef ir_render_int_to_err(CodeGen *g, IrExecutableGen *executable, IrInstGenIntToErr *instruction) {
3379 ZigType *wanted_type = instruction->base.value->type;3374 ZigType *wanted_type = instruction->base.value->type;
3380 assert(wanted_type->id == ZigTypeIdErrorSet);3375 assert(wanted_type->id == ZigTypeIdErrorSet);
33813376
...@@ -3392,7 +3387,7 @@ static LLVMValueRef ir_render_int_to_err(CodeGen *g, IrExecutable *executable, I...@@ -3392,7 +3387,7 @@ static LLVMValueRef ir_render_int_to_err(CodeGen *g, IrExecutable *executable, I
3392 return gen_widen_or_shorten(g, false, actual_type, g->err_tag_type, target_val);3387 return gen_widen_or_shorten(g, false, actual_type, g->err_tag_type, target_val);
3393}3388}
33943389
3395static LLVMValueRef ir_render_err_to_int(CodeGen *g, IrExecutable *executable, IrInstructionErrToInt *instruction) {3390static LLVMValueRef ir_render_err_to_int(CodeGen *g, IrExecutableGen *executable, IrInstGenErrToInt *instruction) {
3396 ZigType *wanted_type = instruction->base.value->type;3391 ZigType *wanted_type = instruction->base.value->type;
3397 assert(wanted_type->id == ZigTypeIdInt);3392 assert(wanted_type->id == ZigTypeIdInt);
3398 assert(!wanted_type->data.integral.is_signed);3393 assert(!wanted_type->data.integral.is_signed);
...@@ -3418,8 +3413,8 @@ static LLVMValueRef ir_render_err_to_int(CodeGen *g, IrExecutable *executable, I...@@ -3418,8 +3413,8 @@ static LLVMValueRef ir_render_err_to_int(CodeGen *g, IrExecutable *executable, I
3418 }3413 }
3419}3414}
34203415
3421static LLVMValueRef ir_render_unreachable(CodeGen *g, IrExecutable *executable,3416static LLVMValueRef ir_render_unreachable(CodeGen *g, IrExecutableGen *executable,
3422 IrInstructionUnreachable *unreachable_instruction)3417 IrInstGenUnreachable *unreachable_instruction)
3423{3418{
3424 if (ir_want_runtime_safety(g, &unreachable_instruction->base)) {3419 if (ir_want_runtime_safety(g, &unreachable_instruction->base)) {
3425 gen_safety_crash(g, PanicMsgIdUnreachable);3420 gen_safety_crash(g, PanicMsgIdUnreachable);
...@@ -3429,8 +3424,8 @@ static LLVMValueRef ir_render_unreachable(CodeGen *g, IrExecutable *executable,...@@ -3429,8 +3424,8 @@ static LLVMValueRef ir_render_unreachable(CodeGen *g, IrExecutable *executable,
3429 return nullptr;3424 return nullptr;
3430}3425}
34313426
3432static LLVMValueRef ir_render_cond_br(CodeGen *g, IrExecutable *executable,3427static LLVMValueRef ir_render_cond_br(CodeGen *g, IrExecutableGen *executable,
3433 IrInstructionCondBr *cond_br_instruction)3428 IrInstGenCondBr *cond_br_instruction)
3434{3429{
3435 LLVMBuildCondBr(g->builder,3430 LLVMBuildCondBr(g->builder,
3436 ir_llvm_value(g, cond_br_instruction->condition),3431 ir_llvm_value(g, cond_br_instruction->condition),
...@@ -3439,51 +3434,56 @@ static LLVMValueRef ir_render_cond_br(CodeGen *g, IrExecutable *executable,...@@ -3439,51 +3434,56 @@ static LLVMValueRef ir_render_cond_br(CodeGen *g, IrExecutable *executable,
3439 return nullptr;3434 return nullptr;
3440}3435}
34413436
3442static LLVMValueRef ir_render_br(CodeGen *g, IrExecutable *executable, IrInstructionBr *br_instruction) {3437static LLVMValueRef ir_render_br(CodeGen *g, IrExecutableGen *executable, IrInstGenBr *br_instruction) {
3443 LLVMBuildBr(g->builder, br_instruction->dest_block->llvm_block);3438 LLVMBuildBr(g->builder, br_instruction->dest_block->llvm_block);
3444 return nullptr;3439 return nullptr;
3445}3440}
34463441
3447static LLVMValueRef ir_render_un_op(CodeGen *g, IrExecutable *executable, IrInstructionUnOp *un_op_instruction) {3442static LLVMValueRef ir_render_binary_not(CodeGen *g, IrExecutableGen *executable,
3448 IrUnOp op_id = un_op_instruction->op_id;3443 IrInstGenBinaryNot *inst)
3449 LLVMValueRef expr = ir_llvm_value(g, un_op_instruction->value);3444{
3450 ZigType *operand_type = un_op_instruction->value->value->type;3445 LLVMValueRef operand = ir_llvm_value(g, inst->operand);
3451 ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ? operand_type->data.vector.elem_type : operand_type;3446 return LLVMBuildNot(g->builder, operand, "");
34523447}
3453 switch (op_id) {3448
3454 case IrUnOpInvalid:3449static LLVMValueRef ir_gen_negation(CodeGen *g, IrInstGen *inst, IrInstGen *operand, bool wrapping) {
3455 case IrUnOpOptional:3450 LLVMValueRef llvm_operand = ir_llvm_value(g, operand);
3456 case IrUnOpDereference:3451 ZigType *operand_type = operand->value->type;
3457 zig_unreachable();3452 ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ?
3458 case IrUnOpNegation:3453 operand_type->data.vector.elem_type : operand_type;
3459 case IrUnOpNegationWrap:3454
3460 {3455 if (scalar_type->id == ZigTypeIdFloat) {
3461 if (scalar_type->id == ZigTypeIdFloat) {3456 ZigLLVMSetFastMath(g->builder, ir_want_fast_math(g, inst));
3462 ZigLLVMSetFastMath(g->builder, ir_want_fast_math(g, &un_op_instruction->base));3457 return LLVMBuildFNeg(g->builder, llvm_operand, "");
3463 return LLVMBuildFNeg(g->builder, expr, "");3458 } else if (scalar_type->id == ZigTypeIdInt) {
3464 } else if (scalar_type->id == ZigTypeIdInt) {3459 if (wrapping) {
3465 if (op_id == IrUnOpNegationWrap) {3460 return LLVMBuildNeg(g->builder, llvm_operand, "");
3466 return LLVMBuildNeg(g->builder, expr, "");3461 } else if (ir_want_runtime_safety(g, inst)) {
3467 } else if (ir_want_runtime_safety(g, &un_op_instruction->base)) {3462 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(llvm_operand));
3468 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(expr));3463 return gen_overflow_op(g, operand_type, AddSubMulSub, zero, llvm_operand);
3469 return gen_overflow_op(g, operand_type, AddSubMulSub, zero, expr);3464 } else if (scalar_type->data.integral.is_signed) {
3470 } else if (scalar_type->data.integral.is_signed) {3465 return LLVMBuildNSWNeg(g->builder, llvm_operand, "");
3471 return LLVMBuildNSWNeg(g->builder, expr, "");3466 } else {
3472 } else {3467 return LLVMBuildNUWNeg(g->builder, llvm_operand, "");
3473 return LLVMBuildNUWNeg(g->builder, expr, "");3468 }
3474 }3469 } else {
3475 } else {3470 zig_unreachable();
3476 zig_unreachable();
3477 }
3478 }
3479 case IrUnOpBinNot:
3480 return LLVMBuildNot(g->builder, expr, "");
3481 }3471 }
3472}
34823473
3483 zig_unreachable();3474static LLVMValueRef ir_render_negation(CodeGen *g, IrExecutableGen *executable,
3475 IrInstGenNegation *inst)
3476{
3477 return ir_gen_negation(g, &inst->base, inst->operand, false);
3484}3478}
34853479
3486static LLVMValueRef ir_render_bool_not(CodeGen *g, IrExecutable *executable, IrInstructionBoolNot *instruction) {3480static LLVMValueRef ir_render_negation_wrapping(CodeGen *g, IrExecutableGen *executable,
3481 IrInstGenNegationWrapping *inst)
3482{
3483 return ir_gen_negation(g, &inst->base, inst->operand, true);
3484}
3485
3486static LLVMValueRef ir_render_bool_not(CodeGen *g, IrExecutableGen *executable, IrInstGenBoolNot *instruction) {
3487 LLVMValueRef value = ir_llvm_value(g, instruction->value);3487 LLVMValueRef value = ir_llvm_value(g, instruction->value);
3488 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(value));3488 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(value));
3489 return LLVMBuildICmp(g->builder, LLVMIntEQ, value, zero, "");3489 return LLVMBuildICmp(g->builder, LLVMIntEQ, value, zero, "");
...@@ -3497,14 +3497,14 @@ static void render_decl_var(CodeGen *g, ZigVar *var) {...@@ -3497,14 +3497,14 @@ static void render_decl_var(CodeGen *g, ZigVar *var) {
3497 gen_var_debug_decl(g, var);3497 gen_var_debug_decl(g, var);
3498}3498}
34993499
3500static LLVMValueRef ir_render_decl_var(CodeGen *g, IrExecutable *executable, IrInstructionDeclVarGen *instruction) {3500static LLVMValueRef ir_render_decl_var(CodeGen *g, IrExecutableGen *executable, IrInstGenDeclVar *instruction) {
3501 instruction->var->ptr_instruction = instruction->var_ptr;3501 instruction->var->ptr_instruction = instruction->var_ptr;
3502 render_decl_var(g, instruction->var);3502 render_decl_var(g, instruction->var);
3503 return nullptr;3503 return nullptr;
3504}3504}
35053505
3506static LLVMValueRef ir_render_load_ptr(CodeGen *g, IrExecutable *executable,3506static LLVMValueRef ir_render_load_ptr(CodeGen *g, IrExecutableGen *executable,
3507 IrInstructionLoadPtrGen *instruction)3507 IrInstGenLoadPtr *instruction)
3508{3508{
3509 ZigType *child_type = instruction->base.value->type;3509 ZigType *child_type = instruction->base.value->type;
3510 if (!type_has_bits(child_type))3510 if (!type_has_bits(child_type))
...@@ -3706,7 +3706,7 @@ static void gen_undef_init(CodeGen *g, uint32_t ptr_align_bytes, ZigType *value_...@@ -3706,7 +3706,7 @@ static void gen_undef_init(CodeGen *g, uint32_t ptr_align_bytes, ZigType *value_
3706 }3706 }
3707}3707}
37083708
3709static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutable *executable, IrInstructionStorePtr *instruction) {3709static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenStorePtr *instruction) {
3710 Error err;3710 Error err;
37113711
3712 ZigType *ptr_type = instruction->ptr->value->type;3712 ZigType *ptr_type = instruction->ptr->value->type;
...@@ -3716,7 +3716,7 @@ static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutable *executable, Ir...@@ -3716,7 +3716,7 @@ static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutable *executable, Ir
3716 codegen_report_errors_and_exit(g);3716 codegen_report_errors_and_exit(g);
3717 if (!ptr_type_has_bits)3717 if (!ptr_type_has_bits)
3718 return nullptr;3718 return nullptr;
3719 if (instruction->ptr->ref_count == 0) {3719 if (instruction->ptr->base.ref_count == 0) {
3720 // In this case, this StorePtr instruction should be elided. Something happened like this:3720 // In this case, this StorePtr instruction should be elided. Something happened like this:
3721 // var t = true;3721 // var t = true;
3722 // const x = if (t) Num.Two else unreachable;3722 // const x = if (t) Num.Two else unreachable;
...@@ -3738,8 +3738,8 @@ static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutable *executable, Ir...@@ -3738,8 +3738,8 @@ static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutable *executable, Ir
3738 return nullptr;3738 return nullptr;
3739}3739}
37403740
3741static LLVMValueRef ir_render_vector_store_elem(CodeGen *g, IrExecutable *executable,3741static LLVMValueRef ir_render_vector_store_elem(CodeGen *g, IrExecutableGen *executable,
3742 IrInstructionVectorStoreElem *instruction)3742 IrInstGenVectorStoreElem *instruction)
3743{3743{
3744 LLVMValueRef vector_ptr = ir_llvm_value(g, instruction->vector_ptr);3744 LLVMValueRef vector_ptr = ir_llvm_value(g, instruction->vector_ptr);
3745 LLVMValueRef index = ir_llvm_value(g, instruction->index);3745 LLVMValueRef index = ir_llvm_value(g, instruction->index);
...@@ -3751,7 +3751,7 @@ static LLVMValueRef ir_render_vector_store_elem(CodeGen *g, IrExecutable *execut...@@ -3751,7 +3751,7 @@ static LLVMValueRef ir_render_vector_store_elem(CodeGen *g, IrExecutable *execut
3751 return nullptr;3751 return nullptr;
3752}3752}
37533753
3754static LLVMValueRef ir_render_var_ptr(CodeGen *g, IrExecutable *executable, IrInstructionVarPtr *instruction) {3754static LLVMValueRef ir_render_var_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenVarPtr *instruction) {
3755 if (instruction->base.value->special != ConstValSpecialRuntime)3755 if (instruction->base.value->special != ConstValSpecialRuntime)
3756 return ir_llvm_value(g, &instruction->base);3756 return ir_llvm_value(g, &instruction->base);
3757 ZigVar *var = instruction->var;3757 ZigVar *var = instruction->var;
...@@ -3763,8 +3763,8 @@ static LLVMValueRef ir_render_var_ptr(CodeGen *g, IrExecutable *executable, IrIn...@@ -3763,8 +3763,8 @@ static LLVMValueRef ir_render_var_ptr(CodeGen *g, IrExecutable *executable, IrIn
3763 }3763 }
3764}3764}
37653765
3766static LLVMValueRef ir_render_return_ptr(CodeGen *g, IrExecutable *executable,3766static LLVMValueRef ir_render_return_ptr(CodeGen *g, IrExecutableGen *executable,
3767 IrInstructionReturnPtr *instruction)3767 IrInstGenReturnPtr *instruction)
3768{3768{
3769 if (!type_has_bits(instruction->base.value->type))3769 if (!type_has_bits(instruction->base.value->type))
3770 return nullptr;3770 return nullptr;
...@@ -3772,7 +3772,7 @@ static LLVMValueRef ir_render_return_ptr(CodeGen *g, IrExecutable *executable,...@@ -3772,7 +3772,7 @@ static LLVMValueRef ir_render_return_ptr(CodeGen *g, IrExecutable *executable,
3772 return g->cur_ret_ptr;3772 return g->cur_ret_ptr;
3773}3773}
37743774
3775static LLVMValueRef ir_render_elem_ptr(CodeGen *g, IrExecutable *executable, IrInstructionElemPtr *instruction) {3775static LLVMValueRef ir_render_elem_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenElemPtr *instruction) {
3776 LLVMValueRef array_ptr_ptr = ir_llvm_value(g, instruction->array_ptr);3776 LLVMValueRef array_ptr_ptr = ir_llvm_value(g, instruction->array_ptr);
3777 ZigType *array_ptr_type = instruction->array_ptr->value->type;3777 ZigType *array_ptr_type = instruction->array_ptr->value->type;
3778 assert(array_ptr_type->id == ZigTypeIdPointer);3778 assert(array_ptr_type->id == ZigTypeIdPointer);
...@@ -3948,7 +3948,7 @@ static void render_async_spills(CodeGen *g) {...@@ -3948,7 +3948,7 @@ static void render_async_spills(CodeGen *g) {
3948 ZigType *frame_type = g->cur_fn->frame_type->data.frame.locals_struct;3948 ZigType *frame_type = g->cur_fn->frame_type->data.frame.locals_struct;
39493949
3950 for (size_t alloca_i = 0; alloca_i < g->cur_fn->alloca_gen_list.length; alloca_i += 1) {3950 for (size_t alloca_i = 0; alloca_i < g->cur_fn->alloca_gen_list.length; alloca_i += 1) {
3951 IrInstructionAllocaGen *instruction = g->cur_fn->alloca_gen_list.at(alloca_i);3951 IrInstGenAlloca *instruction = g->cur_fn->alloca_gen_list.at(alloca_i);
3952 if (instruction->field_index == SIZE_MAX)3952 if (instruction->field_index == SIZE_MAX)
3953 continue;3953 continue;
39543954
...@@ -4015,7 +4015,7 @@ static void gen_init_stack_trace(CodeGen *g, LLVMValueRef trace_field_ptr, LLVMV...@@ -4015,7 +4015,7 @@ static void gen_init_stack_trace(CodeGen *g, LLVMValueRef trace_field_ptr, LLVMV
4015 LLVMBuildStore(g->builder, LLVMConstInt(usize_type_ref, stack_trace_ptr_count, false), addrs_len_ptr);4015 LLVMBuildStore(g->builder, LLVMConstInt(usize_type_ref, stack_trace_ptr_count, false), addrs_len_ptr);
4016}4016}
40174017
4018static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstructionCallGen *instruction) {4018static LLVMValueRef ir_render_call(CodeGen *g, IrExecutableGen *executable, IrInstGenCall *instruction) {
4019 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;4019 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
40204020
4021 LLVMValueRef fn_val;4021 LLVMValueRef fn_val;
...@@ -4150,7 +4150,7 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr...@@ -4150,7 +4150,7 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
4150 LLVMValueRef err_ret_trace_ptr_ptr = LLVMBuildStructGEP(g->builder, frame_result_loc,4150 LLVMValueRef err_ret_trace_ptr_ptr = LLVMBuildStructGEP(g->builder, frame_result_loc,
4151 frame_index_trace_arg(g, src_return_type) + 1, "");4151 frame_index_trace_arg(g, src_return_type) + 1, "");
4152 bool is_llvm_alloca;4152 bool is_llvm_alloca;
4153 LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope,4153 LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope,
4154 &is_llvm_alloca);4154 &is_llvm_alloca);
4155 LLVMBuildStore(g->builder, my_err_ret_trace_val, err_ret_trace_ptr_ptr);4155 LLVMBuildStore(g->builder, my_err_ret_trace_val, err_ret_trace_ptr_ptr);
4156 }4156 }
...@@ -4209,7 +4209,7 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr...@@ -4209,7 +4209,7 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
4209 gen_init_stack_trace(g, trace_field_ptr, addrs_field_ptr);4209 gen_init_stack_trace(g, trace_field_ptr, addrs_field_ptr);
42104210
4211 bool is_llvm_alloca;4211 bool is_llvm_alloca;
4212 gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca));4212 gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca));
4213 }4213 }
4214 }4214 }
4215 } else {4215 } else {
...@@ -4218,7 +4218,7 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr...@@ -4218,7 +4218,7 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
4218 }4218 }
4219 if (prefix_arg_err_ret_stack) {4219 if (prefix_arg_err_ret_stack) {
4220 bool is_llvm_alloca;4220 bool is_llvm_alloca;
4221 gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca));4221 gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca));
4222 }4222 }
4223 }4223 }
4224 FnWalk fn_walk = {};4224 FnWalk fn_walk = {};
...@@ -4328,13 +4328,13 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr...@@ -4328,13 +4328,13 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
43284328
4329 LLVMPositionBuilderAtEnd(g->builder, call_bb);4329 LLVMPositionBuilderAtEnd(g->builder, call_bb);
4330 gen_assert_resume_id(g, &instruction->base, ResumeIdReturn, PanicMsgIdResumedAnAwaitingFn, nullptr);4330 gen_assert_resume_id(g, &instruction->base, ResumeIdReturn, PanicMsgIdResumedAnAwaitingFn, nullptr);
4331 render_async_var_decls(g, instruction->base.scope);4331 render_async_var_decls(g, instruction->base.base.scope);
43324332
4333 if (!type_has_bits(src_return_type))4333 if (!type_has_bits(src_return_type))
4334 return nullptr;4334 return nullptr;
43354335
4336 if (result_loc != nullptr) {4336 if (result_loc != nullptr) {
4337 if (instruction->result_loc->id == IrInstructionIdReturnPtr) {4337 if (instruction->result_loc->id == IrInstGenIdReturnPtr) {
4338 instruction->base.spill = nullptr;4338 instruction->base.spill = nullptr;
4339 return g->cur_ret_ptr;4339 return g->cur_ret_ptr;
4340 } else {4340 } else {
...@@ -4394,8 +4394,8 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr...@@ -4394,8 +4394,8 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
4394 }4394 }
4395}4395}
43964396
4397static LLVMValueRef ir_render_struct_field_ptr(CodeGen *g, IrExecutable *executable,4397static LLVMValueRef ir_render_struct_field_ptr(CodeGen *g, IrExecutableGen *executable,
4398 IrInstructionStructFieldPtr *instruction)4398 IrInstGenStructFieldPtr *instruction)
4399{4399{
4400 Error err;4400 Error err;
44014401
...@@ -4445,8 +4445,8 @@ static LLVMValueRef ir_render_struct_field_ptr(CodeGen *g, IrExecutable *executa...@@ -4445,8 +4445,8 @@ static LLVMValueRef ir_render_struct_field_ptr(CodeGen *g, IrExecutable *executa
4445 return field_ptr_val;4445 return field_ptr_val;
4446}4446}
44474447
4448static LLVMValueRef ir_render_union_field_ptr(CodeGen *g, IrExecutable *executable,4448static LLVMValueRef ir_render_union_field_ptr(CodeGen *g, IrExecutableGen *executable,
4449 IrInstructionUnionFieldPtr *instruction)4449 IrInstGenUnionFieldPtr *instruction)
4450{4450{
4451 if (instruction->base.value->special != ConstValSpecialRuntime)4451 if (instruction->base.value->special != ConstValSpecialRuntime)
4452 return nullptr;4452 return nullptr;
...@@ -4545,8 +4545,8 @@ static size_t find_asm_index(CodeGen *g, AstNode *node, AsmToken *tok, Buf *src_...@@ -4545,8 +4545,8 @@ static size_t find_asm_index(CodeGen *g, AstNode *node, AsmToken *tok, Buf *src_
4545 return SIZE_MAX;4545 return SIZE_MAX;
4546}4546}
45474547
4548static LLVMValueRef ir_render_asm_gen(CodeGen *g, IrExecutable *executable, IrInstructionAsmGen *instruction) {4548static LLVMValueRef ir_render_asm_gen(CodeGen *g, IrExecutableGen *executable, IrInstGenAsm *instruction) {
4549 AstNode *asm_node = instruction->base.source_node;4549 AstNode *asm_node = instruction->base.base.source_node;
4550 assert(asm_node->type == NodeTypeAsmExpr);4550 assert(asm_node->type == NodeTypeAsmExpr);
4551 AstNodeAsmExpr *asm_expr = &asm_node->data.asm_expr;4551 AstNodeAsmExpr *asm_expr = &asm_node->data.asm_expr;
45524552
...@@ -4630,7 +4630,7 @@ static LLVMValueRef ir_render_asm_gen(CodeGen *g, IrExecutable *executable, IrIn...@@ -4630,7 +4630,7 @@ static LLVMValueRef ir_render_asm_gen(CodeGen *g, IrExecutable *executable, IrIn
4630 for (size_t i = 0; i < asm_expr->input_list.length; i += 1, total_index += 1, param_index += 1) {4630 for (size_t i = 0; i < asm_expr->input_list.length; i += 1, total_index += 1, param_index += 1) {
4631 AsmInput *asm_input = asm_expr->input_list.at(i);4631 AsmInput *asm_input = asm_expr->input_list.at(i);
4632 buf_replace(asm_input->constraint, ',', '|');4632 buf_replace(asm_input->constraint, ',', '|');
4633 IrInstruction *ir_input = instruction->input_list[i];4633 IrInstGen *ir_input = instruction->input_list[i];
4634 buf_append_buf(&constraint_buf, asm_input->constraint);4634 buf_append_buf(&constraint_buf, asm_input->constraint);
4635 if (total_index + 1 < total_constraint_count) {4635 if (total_index + 1 < total_constraint_count) {
4636 buf_append_char(&constraint_buf, ',');4636 buf_append_char(&constraint_buf, ',');
...@@ -4693,14 +4693,14 @@ static LLVMValueRef gen_non_null_bit(CodeGen *g, ZigType *maybe_type, LLVMValueR...@@ -4693,14 +4693,14 @@ static LLVMValueRef gen_non_null_bit(CodeGen *g, ZigType *maybe_type, LLVMValueR
4693 return gen_load_untyped(g, maybe_field_ptr, 0, false, "");4693 return gen_load_untyped(g, maybe_field_ptr, 0, false, "");
4694}4694}
46954695
4696static LLVMValueRef ir_render_test_non_null(CodeGen *g, IrExecutable *executable,4696static LLVMValueRef ir_render_test_non_null(CodeGen *g, IrExecutableGen *executable,
4697 IrInstructionTestNonNull *instruction)4697 IrInstGenTestNonNull *instruction)
4698{4698{
4699 return gen_non_null_bit(g, instruction->value->value->type, ir_llvm_value(g, instruction->value));4699 return gen_non_null_bit(g, instruction->value->value->type, ir_llvm_value(g, instruction->value));
4700}4700}
47014701
4702static LLVMValueRef ir_render_optional_unwrap_ptr(CodeGen *g, IrExecutable *executable,4702static LLVMValueRef ir_render_optional_unwrap_ptr(CodeGen *g, IrExecutableGen *executable,
4703 IrInstructionOptionalUnwrapPtr *instruction)4703 IrInstGenOptionalUnwrapPtr *instruction)
4704{4704{
4705 if (instruction->base.value->special != ConstValSpecialRuntime)4705 if (instruction->base.value->special != ConstValSpecialRuntime)
4706 return nullptr;4706 return nullptr;
...@@ -4802,7 +4802,7 @@ static LLVMValueRef get_int_builtin_fn(CodeGen *g, ZigType *expr_type, BuiltinFn...@@ -4802,7 +4802,7 @@ static LLVMValueRef get_int_builtin_fn(CodeGen *g, ZigType *expr_type, BuiltinFn
4802 return fn_val;4802 return fn_val;
4803}4803}
48044804
4805static LLVMValueRef ir_render_clz(CodeGen *g, IrExecutable *executable, IrInstructionClz *instruction) {4805static LLVMValueRef ir_render_clz(CodeGen *g, IrExecutableGen *executable, IrInstGenClz *instruction) {
4806 ZigType *int_type = instruction->op->value->type;4806 ZigType *int_type = instruction->op->value->type;
4807 LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdClz);4807 LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdClz);
4808 LLVMValueRef operand = ir_llvm_value(g, instruction->op);4808 LLVMValueRef operand = ir_llvm_value(g, instruction->op);
...@@ -4814,7 +4814,7 @@ static LLVMValueRef ir_render_clz(CodeGen *g, IrExecutable *executable, IrInstru...@@ -4814,7 +4814,7 @@ static LLVMValueRef ir_render_clz(CodeGen *g, IrExecutable *executable, IrInstru
4814 return gen_widen_or_shorten(g, false, int_type, instruction->base.value->type, wrong_size_int);4814 return gen_widen_or_shorten(g, false, int_type, instruction->base.value->type, wrong_size_int);
4815}4815}
48164816
4817static LLVMValueRef ir_render_ctz(CodeGen *g, IrExecutable *executable, IrInstructionCtz *instruction) {4817static LLVMValueRef ir_render_ctz(CodeGen *g, IrExecutableGen *executable, IrInstGenCtz *instruction) {
4818 ZigType *int_type = instruction->op->value->type;4818 ZigType *int_type = instruction->op->value->type;
4819 LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdCtz);4819 LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdCtz);
4820 LLVMValueRef operand = ir_llvm_value(g, instruction->op);4820 LLVMValueRef operand = ir_llvm_value(g, instruction->op);
...@@ -4826,7 +4826,7 @@ static LLVMValueRef ir_render_ctz(CodeGen *g, IrExecutable *executable, IrInstru...@@ -4826,7 +4826,7 @@ static LLVMValueRef ir_render_ctz(CodeGen *g, IrExecutable *executable, IrInstru
4826 return gen_widen_or_shorten(g, false, int_type, instruction->base.value->type, wrong_size_int);4826 return gen_widen_or_shorten(g, false, int_type, instruction->base.value->type, wrong_size_int);
4827}4827}
48284828
4829static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executable, IrInstructionShuffleVector *instruction) {4829static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutableGen *executable, IrInstGenShuffleVector *instruction) {
4830 uint64_t len_a = instruction->a->value->type->data.vector.len;4830 uint64_t len_a = instruction->a->value->type->data.vector.len;
4831 uint64_t len_mask = instruction->mask->value->type->data.vector.len;4831 uint64_t len_mask = instruction->mask->value->type->data.vector.len;
48324832
...@@ -4835,7 +4835,7 @@ static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executabl...@@ -4835,7 +4835,7 @@ static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executabl
4835 // when changing code, so Zig uses negative numbers to index the4835 // when changing code, so Zig uses negative numbers to index the
4836 // second vector. These start at -1 and go down, and are easiest to use4836 // second vector. These start at -1 and go down, and are easiest to use
4837 // with the ~ operator. Here we convert between the two formats.4837 // with the ~ operator. Here we convert between the two formats.
4838 IrInstruction *mask = instruction->mask;4838 IrInstGen *mask = instruction->mask;
4839 LLVMValueRef *values = allocate<LLVMValueRef>(len_mask);4839 LLVMValueRef *values = allocate<LLVMValueRef>(len_mask);
4840 for (uint64_t i = 0; i < len_mask; i++) {4840 for (uint64_t i = 0; i < len_mask; i++) {
4841 if (mask->value->data.x_array.data.s_none.elements[i].special == ConstValSpecialUndef) {4841 if (mask->value->data.x_array.data.s_none.elements[i].special == ConstValSpecialUndef) {
...@@ -4856,7 +4856,7 @@ static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executabl...@@ -4856,7 +4856,7 @@ static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executabl
4856 llvm_mask_value, "");4856 llvm_mask_value, "");
4857}4857}
48584858
4859static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutable *executable, IrInstructionSplatGen *instruction) {4859static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutableGen *executable, IrInstGenSplat *instruction) {
4860 ZigType *result_type = instruction->base.value->type;4860 ZigType *result_type = instruction->base.value->type;
4861 ir_assert(result_type->id == ZigTypeIdVector, &instruction->base);4861 ir_assert(result_type->id == ZigTypeIdVector, &instruction->base);
4862 uint32_t len = result_type->data.vector.len;4862 uint32_t len = result_type->data.vector.len;
...@@ -4868,7 +4868,7 @@ static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutable *executable, IrInst...@@ -4868,7 +4868,7 @@ static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutable *executable, IrInst
4868 return LLVMBuildShuffleVector(g->builder, op_vector, undef_vector, LLVMConstNull(mask_llvm_type), "");4868 return LLVMBuildShuffleVector(g->builder, op_vector, undef_vector, LLVMConstNull(mask_llvm_type), "");
4869}4869}
48704870
4871static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutable *executable, IrInstructionPopCount *instruction) {4871static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutableGen *executable, IrInstGenPopCount *instruction) {
4872 ZigType *int_type = instruction->op->value->type;4872 ZigType *int_type = instruction->op->value->type;
4873 LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdPopCount);4873 LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdPopCount);
4874 LLVMValueRef operand = ir_llvm_value(g, instruction->op);4874 LLVMValueRef operand = ir_llvm_value(g, instruction->op);
...@@ -4876,7 +4876,7 @@ static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutable *executable, Ir...@@ -4876,7 +4876,7 @@ static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutable *executable, Ir
4876 return gen_widen_or_shorten(g, false, int_type, instruction->base.value->type, wrong_size_int);4876 return gen_widen_or_shorten(g, false, int_type, instruction->base.value->type, wrong_size_int);
4877}4877}
48784878
4879static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutable *executable, IrInstructionSwitchBr *instruction) {4879static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutableGen *executable, IrInstGenSwitchBr *instruction) {
4880 ZigType *target_type = instruction->target_value->value->type;4880 ZigType *target_type = instruction->target_value->value->type;
4881 LLVMBasicBlockRef else_block = instruction->else_block->llvm_block;4881 LLVMBasicBlockRef else_block = instruction->else_block->llvm_block;
48824882
...@@ -4890,7 +4890,7 @@ static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutable *executable, Ir...@@ -4890,7 +4890,7 @@ static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutable *executable, Ir
4890 (unsigned)instruction->case_count);4890 (unsigned)instruction->case_count);
48914891
4892 for (size_t i = 0; i < instruction->case_count; i += 1) {4892 for (size_t i = 0; i < instruction->case_count; i += 1) {
4893 IrInstructionSwitchBrCase *this_case = &instruction->cases[i];4893 IrInstGenSwitchBrCase *this_case = &instruction->cases[i];
48944894
4895 LLVMValueRef case_value = ir_llvm_value(g, this_case->value);4895 LLVMValueRef case_value = ir_llvm_value(g, this_case->value);
4896 if (target_type->id == ZigTypeIdPointer) {4896 if (target_type->id == ZigTypeIdPointer) {
...@@ -4904,7 +4904,7 @@ static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutable *executable, Ir...@@ -4904,7 +4904,7 @@ static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutable *executable, Ir
4904 return nullptr;4904 return nullptr;
4905}4905}
49064906
4907static LLVMValueRef ir_render_phi(CodeGen *g, IrExecutable *executable, IrInstructionPhi *instruction) {4907static LLVMValueRef ir_render_phi(CodeGen *g, IrExecutableGen *executable, IrInstGenPhi *instruction) {
4908 if (!type_has_bits(instruction->base.value->type))4908 if (!type_has_bits(instruction->base.value->type))
4909 return nullptr;4909 return nullptr;
49104910
...@@ -4926,7 +4926,7 @@ static LLVMValueRef ir_render_phi(CodeGen *g, IrExecutable *executable, IrInstru...@@ -4926,7 +4926,7 @@ static LLVMValueRef ir_render_phi(CodeGen *g, IrExecutable *executable, IrInstru
4926 return phi;4926 return phi;
4927}4927}
49284928
4929static LLVMValueRef ir_render_ref(CodeGen *g, IrExecutable *executable, IrInstructionRefGen *instruction) {4929static LLVMValueRef ir_render_ref(CodeGen *g, IrExecutableGen *executable, IrInstGenRef *instruction) {
4930 if (!type_has_bits(instruction->base.value->type)) {4930 if (!type_has_bits(instruction->base.value->type)) {
4931 return nullptr;4931 return nullptr;
4932 }4932 }
...@@ -4940,7 +4940,7 @@ static LLVMValueRef ir_render_ref(CodeGen *g, IrExecutable *executable, IrInstru...@@ -4940,7 +4940,7 @@ static LLVMValueRef ir_render_ref(CodeGen *g, IrExecutable *executable, IrInstru
4940 }4940 }
4941}4941}
49424942
4943static LLVMValueRef ir_render_err_name(CodeGen *g, IrExecutable *executable, IrInstructionErrName *instruction) {4943static LLVMValueRef ir_render_err_name(CodeGen *g, IrExecutableGen *executable, IrInstGenErrName *instruction) {
4944 assert(g->generate_error_name_table);4944 assert(g->generate_error_name_table);
49454945
4946 if (g->errors_by_index.length == 1) {4946 if (g->errors_by_index.length == 1) {
...@@ -5061,11 +5061,16 @@ static LLVMValueRef get_enum_tag_name_function(CodeGen *g, ZigType *enum_type) {...@@ -5061,11 +5061,16 @@ static LLVMValueRef get_enum_tag_name_function(CodeGen *g, ZigType *enum_type) {
5061 return fn_val;5061 return fn_val;
5062}5062}
50635063
5064static LLVMValueRef ir_render_enum_tag_name(CodeGen *g, IrExecutable *executable,5064static LLVMValueRef ir_render_enum_tag_name(CodeGen *g, IrExecutableGen *executable,
5065 IrInstructionTagName *instruction)5065 IrInstGenTagName *instruction)
5066{5066{
5067 ZigType *enum_type = instruction->target->value->type;5067 ZigType *enum_type = instruction->target->value->type;
5068 assert(enum_type->id == ZigTypeIdEnum);5068 assert(enum_type->id == ZigTypeIdEnum);
5069 if (enum_type->data.enumeration.non_exhaustive) {
5070 add_node_error(g, instruction->base.base.source_node,
5071 buf_sprintf("TODO @tagName on non-exhaustive enum https://github.com/ziglang/zig/issues/3991"));
5072 codegen_report_errors_and_exit(g);
5073 }
50695074
5070 LLVMValueRef enum_name_function = get_enum_tag_name_function(g, enum_type);5075 LLVMValueRef enum_name_function = get_enum_tag_name_function(g, enum_type);
50715076
...@@ -5074,8 +5079,8 @@ static LLVMValueRef ir_render_enum_tag_name(CodeGen *g, IrExecutable *executable...@@ -5074,8 +5079,8 @@ static LLVMValueRef ir_render_enum_tag_name(CodeGen *g, IrExecutable *executable
5074 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");5079 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
5075}5080}
50765081
5077static LLVMValueRef ir_render_field_parent_ptr(CodeGen *g, IrExecutable *executable,5082static LLVMValueRef ir_render_field_parent_ptr(CodeGen *g, IrExecutableGen *executable,
5078 IrInstructionFieldParentPtr *instruction)5083 IrInstGenFieldParentPtr *instruction)
5079{5084{
5080 ZigType *container_ptr_type = instruction->base.value->type;5085 ZigType *container_ptr_type = instruction->base.value->type;
5081 assert(container_ptr_type->id == ZigTypeIdPointer);5086 assert(container_ptr_type->id == ZigTypeIdPointer);
...@@ -5101,7 +5106,7 @@ static LLVMValueRef ir_render_field_parent_ptr(CodeGen *g, IrExecutable *executa...@@ -5101,7 +5106,7 @@ static LLVMValueRef ir_render_field_parent_ptr(CodeGen *g, IrExecutable *executa
5101 }5106 }
5102}5107}
51035108
5104static LLVMValueRef ir_render_align_cast(CodeGen *g, IrExecutable *executable, IrInstructionAlignCast *instruction) {5109static LLVMValueRef ir_render_align_cast(CodeGen *g, IrExecutableGen *executable, IrInstGenAlignCast *instruction) {
5105 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);5110 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
5106 assert(target_val);5111 assert(target_val);
51075112
...@@ -5164,11 +5169,11 @@ static LLVMValueRef ir_render_align_cast(CodeGen *g, IrExecutable *executable, I...@@ -5164,11 +5169,11 @@ static LLVMValueRef ir_render_align_cast(CodeGen *g, IrExecutable *executable, I
5164 return target_val;5169 return target_val;
5165}5170}
51665171
5167static LLVMValueRef ir_render_error_return_trace(CodeGen *g, IrExecutable *executable,5172static LLVMValueRef ir_render_error_return_trace(CodeGen *g, IrExecutableGen *executable,
5168 IrInstructionErrorReturnTrace *instruction)5173 IrInstGenErrorReturnTrace *instruction)
5169{5174{
5170 bool is_llvm_alloca;5175 bool is_llvm_alloca;
5171 LLVMValueRef cur_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);5176 LLVMValueRef cur_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
5172 if (cur_err_ret_trace_val == nullptr) {5177 if (cur_err_ret_trace_val == nullptr) {
5173 return LLVMConstNull(get_llvm_type(g, ptr_to_stack_trace_type(g)));5178 return LLVMConstNull(get_llvm_type(g, ptr_to_stack_trace_type(g)));
5174 }5179 }
...@@ -5206,7 +5211,7 @@ static enum ZigLLVM_AtomicRMWBinOp to_ZigLLVMAtomicRMWBinOp(AtomicRmwOp op, bool...@@ -5206,7 +5211,7 @@ static enum ZigLLVM_AtomicRMWBinOp to_ZigLLVMAtomicRMWBinOp(AtomicRmwOp op, bool
5206 zig_unreachable();5211 zig_unreachable();
5207}5212}
52085213
5209static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutable *executable, IrInstructionCmpxchgGen *instruction) {5214static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutableGen *executable, IrInstGenCmpxchg *instruction) {
5210 LLVMValueRef ptr_val = ir_llvm_value(g, instruction->ptr);5215 LLVMValueRef ptr_val = ir_llvm_value(g, instruction->ptr);
5211 LLVMValueRef cmp_val = ir_llvm_value(g, instruction->cmp_value);5216 LLVMValueRef cmp_val = ir_llvm_value(g, instruction->cmp_value);
5212 LLVMValueRef new_val = ir_llvm_value(g, instruction->new_value);5217 LLVMValueRef new_val = ir_llvm_value(g, instruction->new_value);
...@@ -5247,13 +5252,13 @@ static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutable *executable, IrIn...@@ -5247,13 +5252,13 @@ static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutable *executable, IrIn
5247 return result_loc;5252 return result_loc;
5248}5253}
52495254
5250static LLVMValueRef ir_render_fence(CodeGen *g, IrExecutable *executable, IrInstructionFence *instruction) {5255static LLVMValueRef ir_render_fence(CodeGen *g, IrExecutableGen *executable, IrInstGenFence *instruction) {
5251 LLVMAtomicOrdering atomic_order = to_LLVMAtomicOrdering(instruction->order);5256 LLVMAtomicOrdering atomic_order = to_LLVMAtomicOrdering(instruction->order);
5252 LLVMBuildFence(g->builder, atomic_order, false, "");5257 LLVMBuildFence(g->builder, atomic_order, false, "");
5253 return nullptr;5258 return nullptr;
5254}5259}
52555260
5256static LLVMValueRef ir_render_truncate(CodeGen *g, IrExecutable *executable, IrInstructionTruncate *instruction) {5261static LLVMValueRef ir_render_truncate(CodeGen *g, IrExecutableGen *executable, IrInstGenTruncate *instruction) {
5257 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);5262 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
5258 ZigType *dest_type = instruction->base.value->type;5263 ZigType *dest_type = instruction->base.value->type;
5259 ZigType *src_type = instruction->target->value->type;5264 ZigType *src_type = instruction->target->value->type;
...@@ -5268,7 +5273,7 @@ static LLVMValueRef ir_render_truncate(CodeGen *g, IrExecutable *executable, IrI...@@ -5268,7 +5273,7 @@ static LLVMValueRef ir_render_truncate(CodeGen *g, IrExecutable *executable, IrI
5268 }5273 }
5269}5274}
52705275
5271static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutable *executable, IrInstructionMemset *instruction) {5276static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutableGen *executable, IrInstGenMemset *instruction) {
5272 LLVMValueRef dest_ptr = ir_llvm_value(g, instruction->dest_ptr);5277 LLVMValueRef dest_ptr = ir_llvm_value(g, instruction->dest_ptr);
5273 LLVMValueRef len_val = ir_llvm_value(g, instruction->count);5278 LLVMValueRef len_val = ir_llvm_value(g, instruction->count);
52745279
...@@ -5280,7 +5285,7 @@ static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutable *executable, IrIns...@@ -5280,7 +5285,7 @@ static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutable *executable, IrIns
52805285
5281 bool val_is_undef = value_is_all_undef(g, instruction->byte->value);5286 bool val_is_undef = value_is_all_undef(g, instruction->byte->value);
5282 LLVMValueRef fill_char;5287 LLVMValueRef fill_char;
5283 if (val_is_undef && ir_want_runtime_safety_scope(g, instruction->base.scope)) {5288 if (val_is_undef && ir_want_runtime_safety_scope(g, instruction->base.base.scope)) {
5284 fill_char = LLVMConstInt(LLVMInt8Type(), 0xaa, false);5289 fill_char = LLVMConstInt(LLVMInt8Type(), 0xaa, false);
5285 } else {5290 } else {
5286 fill_char = ir_llvm_value(g, instruction->byte);5291 fill_char = ir_llvm_value(g, instruction->byte);
...@@ -5294,7 +5299,7 @@ static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutable *executable, IrIns...@@ -5294,7 +5299,7 @@ static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutable *executable, IrIns
5294 return nullptr;5299 return nullptr;
5295}5300}
52965301
5297static LLVMValueRef ir_render_memcpy(CodeGen *g, IrExecutable *executable, IrInstructionMemcpy *instruction) {5302static LLVMValueRef ir_render_memcpy(CodeGen *g, IrExecutableGen *executable, IrInstGenMemcpy *instruction) {
5298 LLVMValueRef dest_ptr = ir_llvm_value(g, instruction->dest_ptr);5303 LLVMValueRef dest_ptr = ir_llvm_value(g, instruction->dest_ptr);
5299 LLVMValueRef src_ptr = ir_llvm_value(g, instruction->src_ptr);5304 LLVMValueRef src_ptr = ir_llvm_value(g, instruction->src_ptr);
5300 LLVMValueRef len_val = ir_llvm_value(g, instruction->count);5305 LLVMValueRef len_val = ir_llvm_value(g, instruction->count);
...@@ -5316,7 +5321,7 @@ static LLVMValueRef ir_render_memcpy(CodeGen *g, IrExecutable *executable, IrIns...@@ -5316,7 +5321,7 @@ static LLVMValueRef ir_render_memcpy(CodeGen *g, IrExecutable *executable, IrIns
5316 return nullptr;5321 return nullptr;
5317}5322}
53185323
5319static LLVMValueRef ir_render_slice(CodeGen *g, IrExecutable *executable, IrInstructionSliceGen *instruction) {5324static LLVMValueRef ir_render_slice(CodeGen *g, IrExecutableGen *executable, IrInstGenSlice *instruction) {
5320 LLVMValueRef array_ptr_ptr = ir_llvm_value(g, instruction->ptr);5325 LLVMValueRef array_ptr_ptr = ir_llvm_value(g, instruction->ptr);
5321 ZigType *array_ptr_type = instruction->ptr->value->type;5326 ZigType *array_ptr_type = instruction->ptr->value->type;
5322 assert(array_ptr_type->id == ZigTypeIdPointer);5327 assert(array_ptr_type->id == ZigTypeIdPointer);
...@@ -5478,13 +5483,13 @@ static LLVMValueRef get_trap_fn_val(CodeGen *g) {...@@ -5478,13 +5483,13 @@ static LLVMValueRef get_trap_fn_val(CodeGen *g) {
5478}5483}
54795484
54805485
5481static LLVMValueRef ir_render_breakpoint(CodeGen *g, IrExecutable *executable, IrInstructionBreakpoint *instruction) {5486static LLVMValueRef ir_render_breakpoint(CodeGen *g, IrExecutableGen *executable, IrInstGenBreakpoint *instruction) {
5482 LLVMBuildCall(g->builder, get_trap_fn_val(g), nullptr, 0, "");5487 LLVMBuildCall(g->builder, get_trap_fn_val(g), nullptr, 0, "");
5483 return nullptr;5488 return nullptr;
5484}5489}
54855490
5486static LLVMValueRef ir_render_return_address(CodeGen *g, IrExecutable *executable,5491static LLVMValueRef ir_render_return_address(CodeGen *g, IrExecutableGen *executable,
5487 IrInstructionReturnAddress *instruction)5492 IrInstGenReturnAddress *instruction)
5488{5493{
5489 LLVMValueRef zero = LLVMConstNull(g->builtin_types.entry_i32->llvm_type);5494 LLVMValueRef zero = LLVMConstNull(g->builtin_types.entry_i32->llvm_type);
5490 LLVMValueRef ptr_val = LLVMBuildCall(g->builder, get_return_address_fn_val(g), &zero, 1, "");5495 LLVMValueRef ptr_val = LLVMBuildCall(g->builder, get_return_address_fn_val(g), &zero, 1, "");
...@@ -5505,19 +5510,19 @@ static LLVMValueRef get_frame_address_fn_val(CodeGen *g) {...@@ -5505,19 +5510,19 @@ static LLVMValueRef get_frame_address_fn_val(CodeGen *g) {
5505 return g->frame_address_fn_val;5510 return g->frame_address_fn_val;
5506}5511}
55075512
5508static LLVMValueRef ir_render_frame_address(CodeGen *g, IrExecutable *executable,5513static LLVMValueRef ir_render_frame_address(CodeGen *g, IrExecutableGen *executable,
5509 IrInstructionFrameAddress *instruction)5514 IrInstGenFrameAddress *instruction)
5510{5515{
5511 LLVMValueRef zero = LLVMConstNull(g->builtin_types.entry_i32->llvm_type);5516 LLVMValueRef zero = LLVMConstNull(g->builtin_types.entry_i32->llvm_type);
5512 LLVMValueRef ptr_val = LLVMBuildCall(g->builder, get_frame_address_fn_val(g), &zero, 1, "");5517 LLVMValueRef ptr_val = LLVMBuildCall(g->builder, get_frame_address_fn_val(g), &zero, 1, "");
5513 return LLVMBuildPtrToInt(g->builder, ptr_val, g->builtin_types.entry_usize->llvm_type, "");5518 return LLVMBuildPtrToInt(g->builder, ptr_val, g->builtin_types.entry_usize->llvm_type, "");
5514}5519}
55155520
5516static LLVMValueRef ir_render_handle(CodeGen *g, IrExecutable *executable, IrInstructionFrameHandle *instruction) {5521static LLVMValueRef ir_render_handle(CodeGen *g, IrExecutableGen *executable, IrInstGenFrameHandle *instruction) {
5517 return g->cur_frame_ptr;5522 return g->cur_frame_ptr;
5518}5523}
55195524
5520static LLVMValueRef render_shl_with_overflow(CodeGen *g, IrInstructionOverflowOp *instruction) {5525static LLVMValueRef render_shl_with_overflow(CodeGen *g, IrInstGenOverflowOp *instruction) {
5521 ZigType *int_type = instruction->result_ptr_type;5526 ZigType *int_type = instruction->result_ptr_type;
5522 assert(int_type->id == ZigTypeIdInt);5527 assert(int_type->id == ZigTypeIdInt);
55235528
...@@ -5542,7 +5547,7 @@ static LLVMValueRef render_shl_with_overflow(CodeGen *g, IrInstructionOverflowOp...@@ -5542,7 +5547,7 @@ static LLVMValueRef render_shl_with_overflow(CodeGen *g, IrInstructionOverflowOp
5542 return overflow_bit;5547 return overflow_bit;
5543}5548}
55445549
5545static LLVMValueRef ir_render_overflow_op(CodeGen *g, IrExecutable *executable, IrInstructionOverflowOp *instruction) {5550static LLVMValueRef ir_render_overflow_op(CodeGen *g, IrExecutableGen *executable, IrInstGenOverflowOp *instruction) {
5546 AddSubMul add_sub_mul;5551 AddSubMul add_sub_mul;
5547 switch (instruction->op) {5552 switch (instruction->op) {
5548 case IrOverflowOpAdd:5553 case IrOverflowOpAdd:
...@@ -5580,7 +5585,7 @@ static LLVMValueRef ir_render_overflow_op(CodeGen *g, IrExecutable *executable,...@@ -5580,7 +5585,7 @@ static LLVMValueRef ir_render_overflow_op(CodeGen *g, IrExecutable *executable,
5580 return overflow_bit;5585 return overflow_bit;
5581}5586}
55825587
5583static LLVMValueRef ir_render_test_err(CodeGen *g, IrExecutable *executable, IrInstructionTestErrGen *instruction) {5588static LLVMValueRef ir_render_test_err(CodeGen *g, IrExecutableGen *executable, IrInstGenTestErr *instruction) {
5584 ZigType *err_union_type = instruction->err_union->value->type;5589 ZigType *err_union_type = instruction->err_union->value->type;
5585 ZigType *payload_type = err_union_type->data.error_union.payload_type;5590 ZigType *payload_type = err_union_type->data.error_union.payload_type;
5586 LLVMValueRef err_union_handle = ir_llvm_value(g, instruction->err_union);5591 LLVMValueRef err_union_handle = ir_llvm_value(g, instruction->err_union);
...@@ -5597,8 +5602,8 @@ static LLVMValueRef ir_render_test_err(CodeGen *g, IrExecutable *executable, IrI...@@ -5597,8 +5602,8 @@ static LLVMValueRef ir_render_test_err(CodeGen *g, IrExecutable *executable, IrI
5597 return LLVMBuildICmp(g->builder, LLVMIntNE, err_val, zero, "");5602 return LLVMBuildICmp(g->builder, LLVMIntNE, err_val, zero, "");
5598}5603}
55995604
5600static LLVMValueRef ir_render_unwrap_err_code(CodeGen *g, IrExecutable *executable,5605static LLVMValueRef ir_render_unwrap_err_code(CodeGen *g, IrExecutableGen *executable,
5601 IrInstructionUnwrapErrCode *instruction)5606 IrInstGenUnwrapErrCode *instruction)
5602{5607{
5603 if (instruction->base.value->special != ConstValSpecialRuntime)5608 if (instruction->base.value->special != ConstValSpecialRuntime)
5604 return nullptr;5609 return nullptr;
...@@ -5617,8 +5622,8 @@ static LLVMValueRef ir_render_unwrap_err_code(CodeGen *g, IrExecutable *executab...@@ -5617,8 +5622,8 @@ static LLVMValueRef ir_render_unwrap_err_code(CodeGen *g, IrExecutable *executab
5617 }5622 }
5618}5623}
56195624
5620static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutable *executable,5625static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutableGen *executable,
5621 IrInstructionUnwrapErrPayload *instruction)5626 IrInstGenUnwrapErrPayload *instruction)
5622{5627{
5623 Error err;5628 Error err;
56245629
...@@ -5661,7 +5666,7 @@ static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutable *execu...@@ -5661,7 +5666,7 @@ static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutable *execu
5661 LLVMBuildCondBr(g->builder, cond_val, ok_block, err_block);5666 LLVMBuildCondBr(g->builder, cond_val, ok_block, err_block);
56625667
5663 LLVMPositionBuilderAtEnd(g->builder, err_block);5668 LLVMPositionBuilderAtEnd(g->builder, err_block);
5664 gen_safety_crash_for_err(g, err_val, instruction->base.scope);5669 gen_safety_crash_for_err(g, err_val, instruction->base.base.scope);
56655670
5666 LLVMPositionBuilderAtEnd(g->builder, ok_block);5671 LLVMPositionBuilderAtEnd(g->builder, ok_block);
5667 }5672 }
...@@ -5678,7 +5683,7 @@ static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutable *execu...@@ -5678,7 +5683,7 @@ static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutable *execu
5678 }5683 }
5679}5684}
56805685
5681static LLVMValueRef ir_render_optional_wrap(CodeGen *g, IrExecutable *executable, IrInstructionOptionalWrap *instruction) {5686static LLVMValueRef ir_render_optional_wrap(CodeGen *g, IrExecutableGen *executable, IrInstGenOptionalWrap *instruction) {
5682 ZigType *wanted_type = instruction->base.value->type;5687 ZigType *wanted_type = instruction->base.value->type;
56835688
5684 assert(wanted_type->id == ZigTypeIdOptional);5689 assert(wanted_type->id == ZigTypeIdOptional);
...@@ -5714,7 +5719,7 @@ static LLVMValueRef ir_render_optional_wrap(CodeGen *g, IrExecutable *executable...@@ -5714,7 +5719,7 @@ static LLVMValueRef ir_render_optional_wrap(CodeGen *g, IrExecutable *executable
5714 return result_loc;5719 return result_loc;
5715}5720}
57165721
5717static LLVMValueRef ir_render_err_wrap_code(CodeGen *g, IrExecutable *executable, IrInstructionErrWrapCode *instruction) {5722static LLVMValueRef ir_render_err_wrap_code(CodeGen *g, IrExecutableGen *executable, IrInstGenErrWrapCode *instruction) {
5718 ZigType *wanted_type = instruction->base.value->type;5723 ZigType *wanted_type = instruction->base.value->type;
57195724
5720 assert(wanted_type->id == ZigTypeIdErrorUnion);5725 assert(wanted_type->id == ZigTypeIdErrorUnion);
...@@ -5734,7 +5739,7 @@ static LLVMValueRef ir_render_err_wrap_code(CodeGen *g, IrExecutable *executable...@@ -5734,7 +5739,7 @@ static LLVMValueRef ir_render_err_wrap_code(CodeGen *g, IrExecutable *executable
5734 return result_loc;5739 return result_loc;
5735}5740}
57365741
5737static LLVMValueRef ir_render_err_wrap_payload(CodeGen *g, IrExecutable *executable, IrInstructionErrWrapPayload *instruction) {5742static LLVMValueRef ir_render_err_wrap_payload(CodeGen *g, IrExecutableGen *executable, IrInstGenErrWrapPayload *instruction) {
5738 ZigType *wanted_type = instruction->base.value->type;5743 ZigType *wanted_type = instruction->base.value->type;
57395744
5740 assert(wanted_type->id == ZigTypeIdErrorUnion);5745 assert(wanted_type->id == ZigTypeIdErrorUnion);
...@@ -5765,7 +5770,7 @@ static LLVMValueRef ir_render_err_wrap_payload(CodeGen *g, IrExecutable *executa...@@ -5765,7 +5770,7 @@ static LLVMValueRef ir_render_err_wrap_payload(CodeGen *g, IrExecutable *executa
5765 return result_loc;5770 return result_loc;
5766}5771}
57675772
5768static LLVMValueRef ir_render_union_tag(CodeGen *g, IrExecutable *executable, IrInstructionUnionTag *instruction) {5773static LLVMValueRef ir_render_union_tag(CodeGen *g, IrExecutableGen *executable, IrInstGenUnionTag *instruction) {
5769 ZigType *union_type = instruction->value->value->type;5774 ZigType *union_type = instruction->value->value->type;
57705775
5771 ZigType *tag_type = union_type->data.unionation.tag_type;5776 ZigType *tag_type = union_type->data.unionation.tag_type;
...@@ -5783,15 +5788,15 @@ static LLVMValueRef ir_render_union_tag(CodeGen *g, IrExecutable *executable, Ir...@@ -5783,15 +5788,15 @@ static LLVMValueRef ir_render_union_tag(CodeGen *g, IrExecutable *executable, Ir
5783 return get_handle_value(g, tag_field_ptr, tag_type, ptr_type);5788 return get_handle_value(g, tag_field_ptr, tag_type, ptr_type);
5784}5789}
57855790
5786static LLVMValueRef ir_render_panic(CodeGen *g, IrExecutable *executable, IrInstructionPanic *instruction) {5791static LLVMValueRef ir_render_panic(CodeGen *g, IrExecutableGen *executable, IrInstGenPanic *instruction) {
5787 bool is_llvm_alloca;5792 bool is_llvm_alloca;
5788 LLVMValueRef err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);5793 LLVMValueRef err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
5789 gen_panic(g, ir_llvm_value(g, instruction->msg), err_ret_trace_val, is_llvm_alloca);5794 gen_panic(g, ir_llvm_value(g, instruction->msg), err_ret_trace_val, is_llvm_alloca);
5790 return nullptr;5795 return nullptr;
5791}5796}
57925797
5793static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutable *executable,5798static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutableGen *executable,
5794 IrInstructionAtomicRmw *instruction)5799 IrInstGenAtomicRmw *instruction)
5795{5800{
5796 bool is_signed;5801 bool is_signed;
5797 ZigType *operand_type = instruction->operand->value->type;5802 ZigType *operand_type = instruction->operand->value->type;
...@@ -5801,8 +5806,8 @@ static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutable *executable,...@@ -5801,8 +5806,8 @@ static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutable *executable,
5801 } else {5806 } else {
5802 is_signed = false;5807 is_signed = false;
5803 }5808 }
5804 enum ZigLLVM_AtomicRMWBinOp op = to_ZigLLVMAtomicRMWBinOp(instruction->resolved_op, is_signed, is_float);5809 enum ZigLLVM_AtomicRMWBinOp op = to_ZigLLVMAtomicRMWBinOp(instruction->op, is_signed, is_float);
5805 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->resolved_ordering);5810 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->ordering);
5806 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);5811 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
5807 LLVMValueRef operand = ir_llvm_value(g, instruction->operand);5812 LLVMValueRef operand = ir_llvm_value(g, instruction->operand);
58085813
...@@ -5819,20 +5824,20 @@ static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutable *executable,...@@ -5819,20 +5824,20 @@ static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutable *executable,
5819 return LLVMBuildIntToPtr(g->builder, uncasted_result, get_llvm_type(g, operand_type), "");5824 return LLVMBuildIntToPtr(g->builder, uncasted_result, get_llvm_type(g, operand_type), "");
5820}5825}
58215826
5822static LLVMValueRef ir_render_atomic_load(CodeGen *g, IrExecutable *executable,5827static LLVMValueRef ir_render_atomic_load(CodeGen *g, IrExecutableGen *executable,
5823 IrInstructionAtomicLoad *instruction)5828 IrInstGenAtomicLoad *instruction)
5824{5829{
5825 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->resolved_ordering);5830 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->ordering);
5826 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);5831 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
5827 LLVMValueRef load_inst = gen_load(g, ptr, instruction->ptr->value->type, "");5832 LLVMValueRef load_inst = gen_load(g, ptr, instruction->ptr->value->type, "");
5828 LLVMSetOrdering(load_inst, ordering);5833 LLVMSetOrdering(load_inst, ordering);
5829 return load_inst;5834 return load_inst;
5830}5835}
58315836
5832static LLVMValueRef ir_render_atomic_store(CodeGen *g, IrExecutable *executable,5837static LLVMValueRef ir_render_atomic_store(CodeGen *g, IrExecutableGen *executable,
5833 IrInstructionAtomicStore *instruction)5838 IrInstGenAtomicStore *instruction)
5834{5839{
5835 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->resolved_ordering);5840 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->ordering);
5836 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);5841 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
5837 LLVMValueRef value = ir_llvm_value(g, instruction->value);5842 LLVMValueRef value = ir_llvm_value(g, instruction->value);
5838 LLVMValueRef store_inst = gen_store(g, value, ptr, instruction->ptr->value->type);5843 LLVMValueRef store_inst = gen_store(g, value, ptr, instruction->ptr->value->type);
...@@ -5840,13 +5845,13 @@ static LLVMValueRef ir_render_atomic_store(CodeGen *g, IrExecutable *executable,...@@ -5840,13 +5845,13 @@ static LLVMValueRef ir_render_atomic_store(CodeGen *g, IrExecutable *executable,
5840 return nullptr;5845 return nullptr;
5841}5846}
58425847
5843static LLVMValueRef ir_render_float_op(CodeGen *g, IrExecutable *executable, IrInstructionFloatOp *instruction) {5848static LLVMValueRef ir_render_float_op(CodeGen *g, IrExecutableGen *executable, IrInstGenFloatOp *instruction) {
5844 LLVMValueRef operand = ir_llvm_value(g, instruction->operand);5849 LLVMValueRef operand = ir_llvm_value(g, instruction->operand);
5845 LLVMValueRef fn_val = get_float_fn(g, instruction->base.value->type, ZigLLVMFnIdFloatOp, instruction->fn_id);5850 LLVMValueRef fn_val = get_float_fn(g, instruction->base.value->type, ZigLLVMFnIdFloatOp, instruction->fn_id);
5846 return LLVMBuildCall(g->builder, fn_val, &operand, 1, "");5851 return LLVMBuildCall(g->builder, fn_val, &operand, 1, "");
5847}5852}
58485853
5849static LLVMValueRef ir_render_mul_add(CodeGen *g, IrExecutable *executable, IrInstructionMulAdd *instruction) {5854static LLVMValueRef ir_render_mul_add(CodeGen *g, IrExecutableGen *executable, IrInstGenMulAdd *instruction) {
5850 LLVMValueRef op1 = ir_llvm_value(g, instruction->op1);5855 LLVMValueRef op1 = ir_llvm_value(g, instruction->op1);
5851 LLVMValueRef op2 = ir_llvm_value(g, instruction->op2);5856 LLVMValueRef op2 = ir_llvm_value(g, instruction->op2);
5852 LLVMValueRef op3 = ir_llvm_value(g, instruction->op3);5857 LLVMValueRef op3 = ir_llvm_value(g, instruction->op3);
...@@ -5861,7 +5866,7 @@ static LLVMValueRef ir_render_mul_add(CodeGen *g, IrExecutable *executable, IrIn...@@ -5861,7 +5866,7 @@ static LLVMValueRef ir_render_mul_add(CodeGen *g, IrExecutable *executable, IrIn
5861 return LLVMBuildCall(g->builder, fn_val, args, 3, "");5866 return LLVMBuildCall(g->builder, fn_val, args, 3, "");
5862}5867}
58635868
5864static LLVMValueRef ir_render_bswap(CodeGen *g, IrExecutable *executable, IrInstructionBswap *instruction) {5869static LLVMValueRef ir_render_bswap(CodeGen *g, IrExecutableGen *executable, IrInstGenBswap *instruction) {
5865 LLVMValueRef op = ir_llvm_value(g, instruction->op);5870 LLVMValueRef op = ir_llvm_value(g, instruction->op);
5866 ZigType *expr_type = instruction->base.value->type;5871 ZigType *expr_type = instruction->base.value->type;
5867 bool is_vector = expr_type->id == ZigTypeIdVector;5872 bool is_vector = expr_type->id == ZigTypeIdVector;
...@@ -5895,7 +5900,7 @@ static LLVMValueRef ir_render_bswap(CodeGen *g, IrExecutable *executable, IrInst...@@ -5895,7 +5900,7 @@ static LLVMValueRef ir_render_bswap(CodeGen *g, IrExecutable *executable, IrInst
5895 return LLVMBuildTrunc(g->builder, shifted, get_llvm_type(g, expr_type), "");5900 return LLVMBuildTrunc(g->builder, shifted, get_llvm_type(g, expr_type), "");
5896}5901}
58975902
5898static LLVMValueRef ir_render_bit_reverse(CodeGen *g, IrExecutable *executable, IrInstructionBitReverse *instruction) {5903static LLVMValueRef ir_render_bit_reverse(CodeGen *g, IrExecutableGen *executable, IrInstGenBitReverse *instruction) {
5899 LLVMValueRef op = ir_llvm_value(g, instruction->op);5904 LLVMValueRef op = ir_llvm_value(g, instruction->op);
5900 ZigType *int_type = instruction->base.value->type;5905 ZigType *int_type = instruction->base.value->type;
5901 assert(int_type->id == ZigTypeIdInt);5906 assert(int_type->id == ZigTypeIdInt);
...@@ -5903,8 +5908,8 @@ static LLVMValueRef ir_render_bit_reverse(CodeGen *g, IrExecutable *executable,...@@ -5903,8 +5908,8 @@ static LLVMValueRef ir_render_bit_reverse(CodeGen *g, IrExecutable *executable,
5903 return LLVMBuildCall(g->builder, fn_val, &op, 1, "");5908 return LLVMBuildCall(g->builder, fn_val, &op, 1, "");
5904}5909}
59055910
5906static LLVMValueRef ir_render_vector_to_array(CodeGen *g, IrExecutable *executable,5911static LLVMValueRef ir_render_vector_to_array(CodeGen *g, IrExecutableGen *executable,
5907 IrInstructionVectorToArray *instruction)5912 IrInstGenVectorToArray *instruction)
5908{5913{
5909 ZigType *array_type = instruction->base.value->type;5914 ZigType *array_type = instruction->base.value->type;
5910 assert(array_type->id == ZigTypeIdArray);5915 assert(array_type->id == ZigTypeIdArray);
...@@ -5937,8 +5942,8 @@ static LLVMValueRef ir_render_vector_to_array(CodeGen *g, IrExecutable *executab...@@ -5937,8 +5942,8 @@ static LLVMValueRef ir_render_vector_to_array(CodeGen *g, IrExecutable *executab
5937 return result_loc;5942 return result_loc;
5938}5943}
59395944
5940static LLVMValueRef ir_render_array_to_vector(CodeGen *g, IrExecutable *executable,5945static LLVMValueRef ir_render_array_to_vector(CodeGen *g, IrExecutableGen *executable,
5941 IrInstructionArrayToVector *instruction)5946 IrInstGenArrayToVector *instruction)
5942{5947{
5943 ZigType *vector_type = instruction->base.value->type;5948 ZigType *vector_type = instruction->base.value->type;
5944 assert(vector_type->id == ZigTypeIdVector);5949 assert(vector_type->id == ZigTypeIdVector);
...@@ -5974,8 +5979,8 @@ static LLVMValueRef ir_render_array_to_vector(CodeGen *g, IrExecutable *executab...@@ -5974,8 +5979,8 @@ static LLVMValueRef ir_render_array_to_vector(CodeGen *g, IrExecutable *executab
5974 }5979 }
5975}5980}
59765981
5977static LLVMValueRef ir_render_assert_zero(CodeGen *g, IrExecutable *executable,5982static LLVMValueRef ir_render_assert_zero(CodeGen *g, IrExecutableGen *executable,
5978 IrInstructionAssertZero *instruction)5983 IrInstGenAssertZero *instruction)
5979{5984{
5980 LLVMValueRef target = ir_llvm_value(g, instruction->target);5985 LLVMValueRef target = ir_llvm_value(g, instruction->target);
5981 ZigType *int_type = instruction->target->value->type;5986 ZigType *int_type = instruction->target->value->type;
...@@ -5985,8 +5990,8 @@ static LLVMValueRef ir_render_assert_zero(CodeGen *g, IrExecutable *executable,...@@ -5985,8 +5990,8 @@ static LLVMValueRef ir_render_assert_zero(CodeGen *g, IrExecutable *executable,
5985 return nullptr;5990 return nullptr;
5986}5991}
59875992
5988static LLVMValueRef ir_render_assert_non_null(CodeGen *g, IrExecutable *executable,5993static LLVMValueRef ir_render_assert_non_null(CodeGen *g, IrExecutableGen *executable,
5989 IrInstructionAssertNonNull *instruction)5994 IrInstGenAssertNonNull *instruction)
5990{5995{
5991 LLVMValueRef target = ir_llvm_value(g, instruction->target);5996 LLVMValueRef target = ir_llvm_value(g, instruction->target);
5992 ZigType *target_type = instruction->target->value->type;5997 ZigType *target_type = instruction->target->value->type;
...@@ -6010,8 +6015,8 @@ static LLVMValueRef ir_render_assert_non_null(CodeGen *g, IrExecutable *executab...@@ -6010,8 +6015,8 @@ static LLVMValueRef ir_render_assert_non_null(CodeGen *g, IrExecutable *executab
6010 return nullptr;6015 return nullptr;
6011}6016}
60126017
6013static LLVMValueRef ir_render_suspend_begin(CodeGen *g, IrExecutable *executable,6018static LLVMValueRef ir_render_suspend_begin(CodeGen *g, IrExecutableGen *executable,
6014 IrInstructionSuspendBegin *instruction)6019 IrInstGenSuspendBegin *instruction)
6015{6020{
6016 if (fn_is_async(g->cur_fn)) {6021 if (fn_is_async(g->cur_fn)) {
6017 instruction->resume_bb = gen_suspend_begin(g, "SuspendResume");6022 instruction->resume_bb = gen_suspend_begin(g, "SuspendResume");
...@@ -6019,8 +6024,8 @@ static LLVMValueRef ir_render_suspend_begin(CodeGen *g, IrExecutable *executable...@@ -6019,8 +6024,8 @@ static LLVMValueRef ir_render_suspend_begin(CodeGen *g, IrExecutable *executable
6019 return nullptr;6024 return nullptr;
6020}6025}
60216026
6022static LLVMValueRef ir_render_suspend_finish(CodeGen *g, IrExecutable *executable,6027static LLVMValueRef ir_render_suspend_finish(CodeGen *g, IrExecutableGen *executable,
6023 IrInstructionSuspendFinish *instruction)6028 IrInstGenSuspendFinish *instruction)
6024{6029{
6025 LLVMBuildRetVoid(g->builder);6030 LLVMBuildRetVoid(g->builder);
60266031
...@@ -6028,11 +6033,11 @@ static LLVMValueRef ir_render_suspend_finish(CodeGen *g, IrExecutable *executabl...@@ -6028,11 +6033,11 @@ static LLVMValueRef ir_render_suspend_finish(CodeGen *g, IrExecutable *executabl
6028 if (ir_want_runtime_safety(g, &instruction->base)) {6033 if (ir_want_runtime_safety(g, &instruction->base)) {
6029 LLVMBuildStore(g->builder, g->cur_bad_not_suspended_index, g->cur_async_resume_index_ptr);6034 LLVMBuildStore(g->builder, g->cur_bad_not_suspended_index, g->cur_async_resume_index_ptr);
6030 }6035 }
6031 render_async_var_decls(g, instruction->base.scope);6036 render_async_var_decls(g, instruction->base.base.scope);
6032 return nullptr;6037 return nullptr;
6033}6038}
60346039
6035static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_instr,6040static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstGen *source_instr,
6036 LLVMValueRef target_frame_ptr, ZigType *result_type, ZigType *ptr_result_type,6041 LLVMValueRef target_frame_ptr, ZigType *result_type, ZigType *ptr_result_type,
6037 LLVMValueRef result_loc, bool non_async)6042 LLVMValueRef result_loc, bool non_async)
6038{6043{
...@@ -6058,7 +6063,7 @@ static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_ins...@@ -6058,7 +6063,7 @@ static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_ins
6058 frame_index_trace_arg(g, result_type), "");6063 frame_index_trace_arg(g, result_type), "");
6059 LLVMValueRef src_trace_ptr = LLVMBuildLoad(g->builder, their_trace_ptr_ptr, "");6064 LLVMValueRef src_trace_ptr = LLVMBuildLoad(g->builder, their_trace_ptr_ptr, "");
6060 bool is_llvm_alloca;6065 bool is_llvm_alloca;
6061 LLVMValueRef dest_trace_ptr = get_cur_err_ret_trace_val(g, source_instr->scope, &is_llvm_alloca);6066 LLVMValueRef dest_trace_ptr = get_cur_err_ret_trace_val(g, source_instr->base.scope, &is_llvm_alloca);
6062 LLVMValueRef args[] = { dest_trace_ptr, src_trace_ptr };6067 LLVMValueRef args[] = { dest_trace_ptr, src_trace_ptr };
6063 ZigLLVMBuildCall(g->builder, get_merge_err_ret_traces_fn_val(g), args, 2,6068 ZigLLVMBuildCall(g->builder, get_merge_err_ret_traces_fn_val(g), args, 2,
6064 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");6069 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
...@@ -6071,7 +6076,7 @@ static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_ins...@@ -6071,7 +6076,7 @@ static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_ins
6071 }6076 }
6072}6077}
60736078
6074static LLVMValueRef ir_render_await(CodeGen *g, IrExecutable *executable, IrInstructionAwaitGen *instruction) {6079static LLVMValueRef ir_render_await(CodeGen *g, IrExecutableGen *executable, IrInstGenAwait *instruction) {
6075 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;6080 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
6076 LLVMValueRef zero = LLVMConstNull(usize_type_ref);6081 LLVMValueRef zero = LLVMConstNull(usize_type_ref);
6077 LLVMValueRef target_frame_ptr = ir_llvm_value(g, instruction->frame);6082 LLVMValueRef target_frame_ptr = ir_llvm_value(g, instruction->frame);
...@@ -6108,7 +6113,7 @@ static LLVMValueRef ir_render_await(CodeGen *g, IrExecutable *executable, IrInst...@@ -6108,7 +6113,7 @@ static LLVMValueRef ir_render_await(CodeGen *g, IrExecutable *executable, IrInst
6108 // supply the error return trace pointer6113 // supply the error return trace pointer
6109 if (codegen_fn_has_err_ret_tracing_arg(g, result_type)) {6114 if (codegen_fn_has_err_ret_tracing_arg(g, result_type)) {
6110 bool is_llvm_alloca;6115 bool is_llvm_alloca;
6111 LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);6116 LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
6112 assert(my_err_ret_trace_val != nullptr);6117 assert(my_err_ret_trace_val != nullptr);
6113 LLVMValueRef err_ret_trace_ptr_ptr = LLVMBuildStructGEP(g->builder, target_frame_ptr,6118 LLVMValueRef err_ret_trace_ptr_ptr = LLVMBuildStructGEP(g->builder, target_frame_ptr,
6114 frame_index_trace_arg(g, result_type) + 1, "");6119 frame_index_trace_arg(g, result_type) + 1, "");
...@@ -6156,7 +6161,7 @@ static LLVMValueRef ir_render_await(CodeGen *g, IrExecutable *executable, IrInst...@@ -6156,7 +6161,7 @@ static LLVMValueRef ir_render_await(CodeGen *g, IrExecutable *executable, IrInst
6156 return nullptr;6161 return nullptr;
6157}6162}
61586163
6159static LLVMValueRef ir_render_resume(CodeGen *g, IrExecutable *executable, IrInstructionResume *instruction) {6164static LLVMValueRef ir_render_resume(CodeGen *g, IrExecutableGen *executable, IrInstGenResume *instruction) {
6160 LLVMValueRef frame = ir_llvm_value(g, instruction->frame);6165 LLVMValueRef frame = ir_llvm_value(g, instruction->frame);
6161 ZigType *frame_type = instruction->frame->value->type;6166 ZigType *frame_type = instruction->frame->value->type;
6162 assert(frame_type->id == ZigTypeIdAnyFrame);6167 assert(frame_type->id == ZigTypeIdAnyFrame);
...@@ -6165,15 +6170,15 @@ static LLVMValueRef ir_render_resume(CodeGen *g, IrExecutable *executable, IrIns...@@ -6165,15 +6170,15 @@ static LLVMValueRef ir_render_resume(CodeGen *g, IrExecutable *executable, IrIns
6165 return nullptr;6170 return nullptr;
6166}6171}
61676172
6168static LLVMValueRef ir_render_frame_size(CodeGen *g, IrExecutable *executable,6173static LLVMValueRef ir_render_frame_size(CodeGen *g, IrExecutableGen *executable,
6169 IrInstructionFrameSizeGen *instruction)6174 IrInstGenFrameSize *instruction)
6170{6175{
6171 LLVMValueRef fn_val = ir_llvm_value(g, instruction->fn);6176 LLVMValueRef fn_val = ir_llvm_value(g, instruction->fn);
6172 return gen_frame_size(g, fn_val);6177 return gen_frame_size(g, fn_val);
6173}6178}
61746179
6175static LLVMValueRef ir_render_spill_begin(CodeGen *g, IrExecutable *executable,6180static LLVMValueRef ir_render_spill_begin(CodeGen *g, IrExecutableGen *executable,
6176 IrInstructionSpillBegin *instruction)6181 IrInstGenSpillBegin *instruction)
6177{6182{
6178 if (!fn_is_async(g->cur_fn))6183 if (!fn_is_async(g->cur_fn))
6179 return nullptr;6184 return nullptr;
...@@ -6192,7 +6197,7 @@ static LLVMValueRef ir_render_spill_begin(CodeGen *g, IrExecutable *executable,...@@ -6192,7 +6197,7 @@ static LLVMValueRef ir_render_spill_begin(CodeGen *g, IrExecutable *executable,
6192 zig_unreachable();6197 zig_unreachable();
6193}6198}
61946199
6195static LLVMValueRef ir_render_spill_end(CodeGen *g, IrExecutable *executable, IrInstructionSpillEnd *instruction) {6200static LLVMValueRef ir_render_spill_end(CodeGen *g, IrExecutableGen *executable, IrInstGenSpillEnd *instruction) {
6196 if (!fn_is_async(g->cur_fn))6201 if (!fn_is_async(g->cur_fn))
6197 return ir_llvm_value(g, instruction->begin->operand);6202 return ir_llvm_value(g, instruction->begin->operand);
61986203
...@@ -6208,17 +6213,17 @@ static LLVMValueRef ir_render_spill_end(CodeGen *g, IrExecutable *executable, Ir...@@ -6208,17 +6213,17 @@ static LLVMValueRef ir_render_spill_end(CodeGen *g, IrExecutable *executable, Ir
6208 zig_unreachable();6213 zig_unreachable();
6209}6214}
62106215
6211static LLVMValueRef ir_render_vector_extract_elem(CodeGen *g, IrExecutable *executable,6216static LLVMValueRef ir_render_vector_extract_elem(CodeGen *g, IrExecutableGen *executable,
6212 IrInstructionVectorExtractElem *instruction)6217 IrInstGenVectorExtractElem *instruction)
6213{6218{
6214 LLVMValueRef vector = ir_llvm_value(g, instruction->vector);6219 LLVMValueRef vector = ir_llvm_value(g, instruction->vector);
6215 LLVMValueRef index = ir_llvm_value(g, instruction->index);6220 LLVMValueRef index = ir_llvm_value(g, instruction->index);
6216 return LLVMBuildExtractElement(g->builder, vector, index, "");6221 return LLVMBuildExtractElement(g->builder, vector, index, "");
6217}6222}
62186223
6219static void set_debug_location(CodeGen *g, IrInstruction *instruction) {6224static void set_debug_location(CodeGen *g, IrInstGen *instruction) {
6220 AstNode *source_node = instruction->source_node;6225 AstNode *source_node = instruction->base.source_node;
6221 Scope *scope = instruction->scope;6226 Scope *scope = instruction->base.scope;
62226227
6223 assert(source_node);6228 assert(source_node);
6224 assert(scope);6229 assert(scope);
...@@ -6227,263 +6232,183 @@ static void set_debug_location(CodeGen *g, IrInstruction *instruction) {...@@ -6227,263 +6232,183 @@ static void set_debug_location(CodeGen *g, IrInstruction *instruction) {
6227 (int)source_node->column + 1, get_di_scope(g, scope));6232 (int)source_node->column + 1, get_di_scope(g, scope));
6228}6233}
62296234
6230static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable, IrInstruction *instruction) {6235static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutableGen *executable, IrInstGen *instruction) {
6231 switch (instruction->id) {6236 switch (instruction->id) {
6232 case IrInstructionIdInvalid:6237 case IrInstGenIdInvalid:
6233 case IrInstructionIdConst:6238 case IrInstGenIdConst:
6234 case IrInstructionIdTypeOf:6239 case IrInstGenIdAlloca:
6235 case IrInstructionIdFieldPtr:
6236 case IrInstructionIdSetCold:
6237 case IrInstructionIdSetRuntimeSafety:
6238 case IrInstructionIdSetFloatMode:
6239 case IrInstructionIdArrayType:
6240 case IrInstructionIdAnyFrameType:
6241 case IrInstructionIdSliceType:
6242 case IrInstructionIdSizeOf:
6243 case IrInstructionIdSwitchTarget:
6244 case IrInstructionIdContainerInitFields:
6245 case IrInstructionIdCompileErr:
6246 case IrInstructionIdCompileLog:
6247 case IrInstructionIdImport:
6248 case IrInstructionIdCImport:
6249 case IrInstructionIdCInclude:
6250 case IrInstructionIdCDefine:
6251 case IrInstructionIdCUndef:
6252 case IrInstructionIdEmbedFile:
6253 case IrInstructionIdIntType:
6254 case IrInstructionIdVectorType:
6255 case IrInstructionIdMemberCount:
6256 case IrInstructionIdMemberType:
6257 case IrInstructionIdMemberName:
6258 case IrInstructionIdAlignOf:
6259 case IrInstructionIdFnProto:
6260 case IrInstructionIdTestComptime:
6261 case IrInstructionIdCheckSwitchProngs:
6262 case IrInstructionIdCheckStatementIsVoid:
6263 case IrInstructionIdTypeName:
6264 case IrInstructionIdDeclRef:
6265 case IrInstructionIdSwitchVar:
6266 case IrInstructionIdSwitchElseVar:
6267 case IrInstructionIdByteOffsetOf:
6268 case IrInstructionIdBitOffsetOf:
6269 case IrInstructionIdTypeInfo:
6270 case IrInstructionIdType:
6271 case IrInstructionIdHasField:
6272 case IrInstructionIdTypeId:
6273 case IrInstructionIdSetEvalBranchQuota:
6274 case IrInstructionIdPtrType:
6275 case IrInstructionIdOpaqueType:
6276 case IrInstructionIdSetAlignStack:
6277 case IrInstructionIdArgType:
6278 case IrInstructionIdTagType:
6279 case IrInstructionIdExport:
6280 case IrInstructionIdErrorUnion:
6281 case IrInstructionIdAddImplicitReturnType:
6282 case IrInstructionIdIntCast:
6283 case IrInstructionIdFloatCast:
6284 case IrInstructionIdIntToFloat:
6285 case IrInstructionIdFloatToInt:
6286 case IrInstructionIdBoolToInt:
6287 case IrInstructionIdErrSetCast:
6288 case IrInstructionIdFromBytes:
6289 case IrInstructionIdToBytes:
6290 case IrInstructionIdEnumToInt:
6291 case IrInstructionIdCheckRuntimeScope:
6292 case IrInstructionIdDeclVarSrc:
6293 case IrInstructionIdPtrCastSrc:
6294 case IrInstructionIdCmpxchgSrc:
6295 case IrInstructionIdLoadPtr:
6296 case IrInstructionIdHasDecl:
6297 case IrInstructionIdUndeclaredIdent:
6298 case IrInstructionIdCallExtra:
6299 case IrInstructionIdCallSrc:
6300 case IrInstructionIdCallSrcArgs:
6301 case IrInstructionIdAllocaSrc:
6302 case IrInstructionIdEndExpr:
6303 case IrInstructionIdImplicitCast:
6304 case IrInstructionIdResolveResult:
6305 case IrInstructionIdResetResult:
6306 case IrInstructionIdContainerInitList:
6307 case IrInstructionIdSliceSrc:
6308 case IrInstructionIdRef:
6309 case IrInstructionIdBitCastSrc:
6310 case IrInstructionIdTestErrSrc:
6311 case IrInstructionIdUnionInitNamedField:
6312 case IrInstructionIdFrameType:
6313 case IrInstructionIdFrameSizeSrc:
6314 case IrInstructionIdAllocaGen:
6315 case IrInstructionIdAwaitSrc:
6316 case IrInstructionIdSplatSrc:
6317 case IrInstructionIdMergeErrSets:
6318 case IrInstructionIdAsmSrc:
6319 zig_unreachable();6240 zig_unreachable();
63206241
6321 case IrInstructionIdDeclVarGen:6242 case IrInstGenIdDeclVar:
6322 return ir_render_decl_var(g, executable, (IrInstructionDeclVarGen *)instruction);6243 return ir_render_decl_var(g, executable, (IrInstGenDeclVar *)instruction);
6323 case IrInstructionIdReturn:6244 case IrInstGenIdReturn:
6324 return ir_render_return(g, executable, (IrInstructionReturn *)instruction);6245 return ir_render_return(g, executable, (IrInstGenReturn *)instruction);
6325 case IrInstructionIdBinOp:6246 case IrInstGenIdBinOp:
6326 return ir_render_bin_op(g, executable, (IrInstructionBinOp *)instruction);6247 return ir_render_bin_op(g, executable, (IrInstGenBinOp *)instruction);
6327 case IrInstructionIdCast:6248 case IrInstGenIdCast:
6328 return ir_render_cast(g, executable, (IrInstructionCast *)instruction);6249 return ir_render_cast(g, executable, (IrInstGenCast *)instruction);
6329 case IrInstructionIdUnreachable:6250 case IrInstGenIdUnreachable:
6330 return ir_render_unreachable(g, executable, (IrInstructionUnreachable *)instruction);6251 return ir_render_unreachable(g, executable, (IrInstGenUnreachable *)instruction);
6331 case IrInstructionIdCondBr:6252 case IrInstGenIdCondBr:
6332 return ir_render_cond_br(g, executable, (IrInstructionCondBr *)instruction);6253 return ir_render_cond_br(g, executable, (IrInstGenCondBr *)instruction);
6333 case IrInstructionIdBr:6254 case IrInstGenIdBr:
6334 return ir_render_br(g, executable, (IrInstructionBr *)instruction);6255 return ir_render_br(g, executable, (IrInstGenBr *)instruction);
6335 case IrInstructionIdUnOp:6256 case IrInstGenIdBinaryNot:
6336 return ir_render_un_op(g, executable, (IrInstructionUnOp *)instruction);6257 return ir_render_binary_not(g, executable, (IrInstGenBinaryNot *)instruction);
6337 case IrInstructionIdLoadPtrGen:6258 case IrInstGenIdNegation:
6338 return ir_render_load_ptr(g, executable, (IrInstructionLoadPtrGen *)instruction);6259 return ir_render_negation(g, executable, (IrInstGenNegation *)instruction);
6339 case IrInstructionIdStorePtr:6260 case IrInstGenIdNegationWrapping:
6340 return ir_render_store_ptr(g, executable, (IrInstructionStorePtr *)instruction);6261 return ir_render_negation_wrapping(g, executable, (IrInstGenNegationWrapping *)instruction);
6341 case IrInstructionIdVectorStoreElem:6262 case IrInstGenIdLoadPtr:
6342 return ir_render_vector_store_elem(g, executable, (IrInstructionVectorStoreElem *)instruction);6263 return ir_render_load_ptr(g, executable, (IrInstGenLoadPtr *)instruction);
6343 case IrInstructionIdVarPtr:6264 case IrInstGenIdStorePtr:
6344 return ir_render_var_ptr(g, executable, (IrInstructionVarPtr *)instruction);6265 return ir_render_store_ptr(g, executable, (IrInstGenStorePtr *)instruction);
6345 case IrInstructionIdReturnPtr:6266 case IrInstGenIdVectorStoreElem:
6346 return ir_render_return_ptr(g, executable, (IrInstructionReturnPtr *)instruction);6267 return ir_render_vector_store_elem(g, executable, (IrInstGenVectorStoreElem *)instruction);
6347 case IrInstructionIdElemPtr:6268 case IrInstGenIdVarPtr:
6348 return ir_render_elem_ptr(g, executable, (IrInstructionElemPtr *)instruction);6269 return ir_render_var_ptr(g, executable, (IrInstGenVarPtr *)instruction);
6349 case IrInstructionIdCallGen:6270 case IrInstGenIdReturnPtr:
6350 return ir_render_call(g, executable, (IrInstructionCallGen *)instruction);6271 return ir_render_return_ptr(g, executable, (IrInstGenReturnPtr *)instruction);
6351 case IrInstructionIdStructFieldPtr:6272 case IrInstGenIdElemPtr:
6352 return ir_render_struct_field_ptr(g, executable, (IrInstructionStructFieldPtr *)instruction);6273 return ir_render_elem_ptr(g, executable, (IrInstGenElemPtr *)instruction);
6353 case IrInstructionIdUnionFieldPtr:6274 case IrInstGenIdCall:
6354 return ir_render_union_field_ptr(g, executable, (IrInstructionUnionFieldPtr *)instruction);6275 return ir_render_call(g, executable, (IrInstGenCall *)instruction);
6355 case IrInstructionIdAsmGen:6276 case IrInstGenIdStructFieldPtr:
6356 return ir_render_asm_gen(g, executable, (IrInstructionAsmGen *)instruction);6277 return ir_render_struct_field_ptr(g, executable, (IrInstGenStructFieldPtr *)instruction);
6357 case IrInstructionIdTestNonNull:6278 case IrInstGenIdUnionFieldPtr:
6358 return ir_render_test_non_null(g, executable, (IrInstructionTestNonNull *)instruction);6279 return ir_render_union_field_ptr(g, executable, (IrInstGenUnionFieldPtr *)instruction);
6359 case IrInstructionIdOptionalUnwrapPtr:6280 case IrInstGenIdAsm:
6360 return ir_render_optional_unwrap_ptr(g, executable, (IrInstructionOptionalUnwrapPtr *)instruction);6281 return ir_render_asm_gen(g, executable, (IrInstGenAsm *)instruction);
6361 case IrInstructionIdClz:6282 case IrInstGenIdTestNonNull:
6362 return ir_render_clz(g, executable, (IrInstructionClz *)instruction);6283 return ir_render_test_non_null(g, executable, (IrInstGenTestNonNull *)instruction);
6363 case IrInstructionIdCtz:6284 case IrInstGenIdOptionalUnwrapPtr:
6364 return ir_render_ctz(g, executable, (IrInstructionCtz *)instruction);6285 return ir_render_optional_unwrap_ptr(g, executable, (IrInstGenOptionalUnwrapPtr *)instruction);
6365 case IrInstructionIdPopCount:6286 case IrInstGenIdClz:
6366 return ir_render_pop_count(g, executable, (IrInstructionPopCount *)instruction);6287 return ir_render_clz(g, executable, (IrInstGenClz *)instruction);
6367 case IrInstructionIdSwitchBr:6288 case IrInstGenIdCtz:
6368 return ir_render_switch_br(g, executable, (IrInstructionSwitchBr *)instruction);6289 return ir_render_ctz(g, executable, (IrInstGenCtz *)instruction);
6369 case IrInstructionIdBswap:6290 case IrInstGenIdPopCount:
6370 return ir_render_bswap(g, executable, (IrInstructionBswap *)instruction);6291 return ir_render_pop_count(g, executable, (IrInstGenPopCount *)instruction);
6371 case IrInstructionIdBitReverse:6292 case IrInstGenIdSwitchBr:
6372 return ir_render_bit_reverse(g, executable, (IrInstructionBitReverse *)instruction);6293 return ir_render_switch_br(g, executable, (IrInstGenSwitchBr *)instruction);
6373 case IrInstructionIdPhi:6294 case IrInstGenIdBswap:
6374 return ir_render_phi(g, executable, (IrInstructionPhi *)instruction);6295 return ir_render_bswap(g, executable, (IrInstGenBswap *)instruction);
6375 case IrInstructionIdRefGen:6296 case IrInstGenIdBitReverse:
6376 return ir_render_ref(g, executable, (IrInstructionRefGen *)instruction);6297 return ir_render_bit_reverse(g, executable, (IrInstGenBitReverse *)instruction);
6377 case IrInstructionIdErrName:6298 case IrInstGenIdPhi:
6378 return ir_render_err_name(g, executable, (IrInstructionErrName *)instruction);6299 return ir_render_phi(g, executable, (IrInstGenPhi *)instruction);
6379 case IrInstructionIdCmpxchgGen:6300 case IrInstGenIdRef:
6380 return ir_render_cmpxchg(g, executable, (IrInstructionCmpxchgGen *)instruction);6301 return ir_render_ref(g, executable, (IrInstGenRef *)instruction);
6381 case IrInstructionIdFence:6302 case IrInstGenIdErrName:
6382 return ir_render_fence(g, executable, (IrInstructionFence *)instruction);6303 return ir_render_err_name(g, executable, (IrInstGenErrName *)instruction);
6383 case IrInstructionIdTruncate:6304 case IrInstGenIdCmpxchg:
6384 return ir_render_truncate(g, executable, (IrInstructionTruncate *)instruction);6305 return ir_render_cmpxchg(g, executable, (IrInstGenCmpxchg *)instruction);
6385 case IrInstructionIdBoolNot:6306 case IrInstGenIdFence:
6386 return ir_render_bool_not(g, executable, (IrInstructionBoolNot *)instruction);6307 return ir_render_fence(g, executable, (IrInstGenFence *)instruction);
6387 case IrInstructionIdMemset:6308 case IrInstGenIdTruncate:
6388 return ir_render_memset(g, executable, (IrInstructionMemset *)instruction);6309 return ir_render_truncate(g, executable, (IrInstGenTruncate *)instruction);
6389 case IrInstructionIdMemcpy:6310 case IrInstGenIdBoolNot:
6390 return ir_render_memcpy(g, executable, (IrInstructionMemcpy *)instruction);6311 return ir_render_bool_not(g, executable, (IrInstGenBoolNot *)instruction);
6391 case IrInstructionIdSliceGen:6312 case IrInstGenIdMemset:
6392 return ir_render_slice(g, executable, (IrInstructionSliceGen *)instruction);6313 return ir_render_memset(g, executable, (IrInstGenMemset *)instruction);
6393 case IrInstructionIdBreakpoint:6314 case IrInstGenIdMemcpy:
6394 return ir_render_breakpoint(g, executable, (IrInstructionBreakpoint *)instruction);6315 return ir_render_memcpy(g, executable, (IrInstGenMemcpy *)instruction);
6395 case IrInstructionIdReturnAddress:6316 case IrInstGenIdSlice:
6396 return ir_render_return_address(g, executable, (IrInstructionReturnAddress *)instruction);6317 return ir_render_slice(g, executable, (IrInstGenSlice *)instruction);
6397 case IrInstructionIdFrameAddress:6318 case IrInstGenIdBreakpoint:
6398 return ir_render_frame_address(g, executable, (IrInstructionFrameAddress *)instruction);6319 return ir_render_breakpoint(g, executable, (IrInstGenBreakpoint *)instruction);
6399 case IrInstructionIdFrameHandle:6320 case IrInstGenIdReturnAddress:
6400 return ir_render_handle(g, executable, (IrInstructionFrameHandle *)instruction);6321 return ir_render_return_address(g, executable, (IrInstGenReturnAddress *)instruction);
6401 case IrInstructionIdOverflowOp:6322 case IrInstGenIdFrameAddress:
6402 return ir_render_overflow_op(g, executable, (IrInstructionOverflowOp *)instruction);6323 return ir_render_frame_address(g, executable, (IrInstGenFrameAddress *)instruction);
6403 case IrInstructionIdTestErrGen:6324 case IrInstGenIdFrameHandle:
6404 return ir_render_test_err(g, executable, (IrInstructionTestErrGen *)instruction);6325 return ir_render_handle(g, executable, (IrInstGenFrameHandle *)instruction);
6405 case IrInstructionIdUnwrapErrCode:6326 case IrInstGenIdOverflowOp:
6406 return ir_render_unwrap_err_code(g, executable, (IrInstructionUnwrapErrCode *)instruction);6327 return ir_render_overflow_op(g, executable, (IrInstGenOverflowOp *)instruction);
6407 case IrInstructionIdUnwrapErrPayload:6328 case IrInstGenIdTestErr:
6408 return ir_render_unwrap_err_payload(g, executable, (IrInstructionUnwrapErrPayload *)instruction);6329 return ir_render_test_err(g, executable, (IrInstGenTestErr *)instruction);
6409 case IrInstructionIdOptionalWrap:6330 case IrInstGenIdUnwrapErrCode:
6410 return ir_render_optional_wrap(g, executable, (IrInstructionOptionalWrap *)instruction);6331 return ir_render_unwrap_err_code(g, executable, (IrInstGenUnwrapErrCode *)instruction);
6411 case IrInstructionIdErrWrapCode:6332 case IrInstGenIdUnwrapErrPayload:
6412 return ir_render_err_wrap_code(g, executable, (IrInstructionErrWrapCode *)instruction);6333 return ir_render_unwrap_err_payload(g, executable, (IrInstGenUnwrapErrPayload *)instruction);
6413 case IrInstructionIdErrWrapPayload:6334 case IrInstGenIdOptionalWrap:
6414 return ir_render_err_wrap_payload(g, executable, (IrInstructionErrWrapPayload *)instruction);6335 return ir_render_optional_wrap(g, executable, (IrInstGenOptionalWrap *)instruction);
6415 case IrInstructionIdUnionTag:6336 case IrInstGenIdErrWrapCode:
6416 return ir_render_union_tag(g, executable, (IrInstructionUnionTag *)instruction);6337 return ir_render_err_wrap_code(g, executable, (IrInstGenErrWrapCode *)instruction);
6417 case IrInstructionIdPtrCastGen:6338 case IrInstGenIdErrWrapPayload:
6418 return ir_render_ptr_cast(g, executable, (IrInstructionPtrCastGen *)instruction);6339 return ir_render_err_wrap_payload(g, executable, (IrInstGenErrWrapPayload *)instruction);
6419 case IrInstructionIdBitCastGen:6340 case IrInstGenIdUnionTag:
6420 return ir_render_bit_cast(g, executable, (IrInstructionBitCastGen *)instruction);6341 return ir_render_union_tag(g, executable, (IrInstGenUnionTag *)instruction);
6421 case IrInstructionIdWidenOrShorten:6342 case IrInstGenIdPtrCast:
6422 return ir_render_widen_or_shorten(g, executable, (IrInstructionWidenOrShorten *)instruction);6343 return ir_render_ptr_cast(g, executable, (IrInstGenPtrCast *)instruction);
6423 case IrInstructionIdPtrToInt:6344 case IrInstGenIdBitCast:
6424 return ir_render_ptr_to_int(g, executable, (IrInstructionPtrToInt *)instruction);6345 return ir_render_bit_cast(g, executable, (IrInstGenBitCast *)instruction);
6425 case IrInstructionIdIntToPtr:6346 case IrInstGenIdWidenOrShorten:
6426 return ir_render_int_to_ptr(g, executable, (IrInstructionIntToPtr *)instruction);6347 return ir_render_widen_or_shorten(g, executable, (IrInstGenWidenOrShorten *)instruction);
6427 case IrInstructionIdIntToEnum:6348 case IrInstGenIdPtrToInt:
6428 return ir_render_int_to_enum(g, executable, (IrInstructionIntToEnum *)instruction);6349 return ir_render_ptr_to_int(g, executable, (IrInstGenPtrToInt *)instruction);
6429 case IrInstructionIdIntToErr:6350 case IrInstGenIdIntToPtr:
6430 return ir_render_int_to_err(g, executable, (IrInstructionIntToErr *)instruction);6351 return ir_render_int_to_ptr(g, executable, (IrInstGenIntToPtr *)instruction);
6431 case IrInstructionIdErrToInt:6352 case IrInstGenIdIntToEnum:
6432 return ir_render_err_to_int(g, executable, (IrInstructionErrToInt *)instruction);6353 return ir_render_int_to_enum(g, executable, (IrInstGenIntToEnum *)instruction);
6433 case IrInstructionIdPanic:6354 case IrInstGenIdIntToErr:
6434 return ir_render_panic(g, executable, (IrInstructionPanic *)instruction);6355 return ir_render_int_to_err(g, executable, (IrInstGenIntToErr *)instruction);
6435 case IrInstructionIdTagName:6356 case IrInstGenIdErrToInt:
6436 return ir_render_enum_tag_name(g, executable, (IrInstructionTagName *)instruction);6357 return ir_render_err_to_int(g, executable, (IrInstGenErrToInt *)instruction);
6437 case IrInstructionIdFieldParentPtr:6358 case IrInstGenIdPanic:
6438 return ir_render_field_parent_ptr(g, executable, (IrInstructionFieldParentPtr *)instruction);6359 return ir_render_panic(g, executable, (IrInstGenPanic *)instruction);
6439 case IrInstructionIdAlignCast:6360 case IrInstGenIdTagName:
6440 return ir_render_align_cast(g, executable, (IrInstructionAlignCast *)instruction);6361 return ir_render_enum_tag_name(g, executable, (IrInstGenTagName *)instruction);
6441 case IrInstructionIdErrorReturnTrace:6362 case IrInstGenIdFieldParentPtr:
6442 return ir_render_error_return_trace(g, executable, (IrInstructionErrorReturnTrace *)instruction);6363 return ir_render_field_parent_ptr(g, executable, (IrInstGenFieldParentPtr *)instruction);
6443 case IrInstructionIdAtomicRmw:6364 case IrInstGenIdAlignCast:
6444 return ir_render_atomic_rmw(g, executable, (IrInstructionAtomicRmw *)instruction);6365 return ir_render_align_cast(g, executable, (IrInstGenAlignCast *)instruction);
6445 case IrInstructionIdAtomicLoad:6366 case IrInstGenIdErrorReturnTrace:
6446 return ir_render_atomic_load(g, executable, (IrInstructionAtomicLoad *)instruction);6367 return ir_render_error_return_trace(g, executable, (IrInstGenErrorReturnTrace *)instruction);
6447 case IrInstructionIdAtomicStore:6368 case IrInstGenIdAtomicRmw:
6448 return ir_render_atomic_store(g, executable, (IrInstructionAtomicStore *)instruction);6369 return ir_render_atomic_rmw(g, executable, (IrInstGenAtomicRmw *)instruction);
6449 case IrInstructionIdSaveErrRetAddr:6370 case IrInstGenIdAtomicLoad:
6450 return ir_render_save_err_ret_addr(g, executable, (IrInstructionSaveErrRetAddr *)instruction);6371 return ir_render_atomic_load(g, executable, (IrInstGenAtomicLoad *)instruction);
6451 case IrInstructionIdFloatOp:6372 case IrInstGenIdAtomicStore:
6452 return ir_render_float_op(g, executable, (IrInstructionFloatOp *)instruction);6373 return ir_render_atomic_store(g, executable, (IrInstGenAtomicStore *)instruction);
6453 case IrInstructionIdMulAdd:6374 case IrInstGenIdSaveErrRetAddr:
6454 return ir_render_mul_add(g, executable, (IrInstructionMulAdd *)instruction);6375 return ir_render_save_err_ret_addr(g, executable, (IrInstGenSaveErrRetAddr *)instruction);
6455 case IrInstructionIdArrayToVector:6376 case IrInstGenIdFloatOp:
6456 return ir_render_array_to_vector(g, executable, (IrInstructionArrayToVector *)instruction);6377 return ir_render_float_op(g, executable, (IrInstGenFloatOp *)instruction);
6457 case IrInstructionIdVectorToArray:6378 case IrInstGenIdMulAdd:
6458 return ir_render_vector_to_array(g, executable, (IrInstructionVectorToArray *)instruction);6379 return ir_render_mul_add(g, executable, (IrInstGenMulAdd *)instruction);
6459 case IrInstructionIdAssertZero:6380 case IrInstGenIdArrayToVector:
6460 return ir_render_assert_zero(g, executable, (IrInstructionAssertZero *)instruction);6381 return ir_render_array_to_vector(g, executable, (IrInstGenArrayToVector *)instruction);
6461 case IrInstructionIdAssertNonNull:6382 case IrInstGenIdVectorToArray:
6462 return ir_render_assert_non_null(g, executable, (IrInstructionAssertNonNull *)instruction);6383 return ir_render_vector_to_array(g, executable, (IrInstGenVectorToArray *)instruction);
6463 case IrInstructionIdResizeSlice:6384 case IrInstGenIdAssertZero:
6464 return ir_render_resize_slice(g, executable, (IrInstructionResizeSlice *)instruction);6385 return ir_render_assert_zero(g, executable, (IrInstGenAssertZero *)instruction);
6465 case IrInstructionIdPtrOfArrayToSlice:6386 case IrInstGenIdAssertNonNull:
6466 return ir_render_ptr_of_array_to_slice(g, executable, (IrInstructionPtrOfArrayToSlice *)instruction);6387 return ir_render_assert_non_null(g, executable, (IrInstGenAssertNonNull *)instruction);
6467 case IrInstructionIdSuspendBegin:6388 case IrInstGenIdResizeSlice:
6468 return ir_render_suspend_begin(g, executable, (IrInstructionSuspendBegin *)instruction);6389 return ir_render_resize_slice(g, executable, (IrInstGenResizeSlice *)instruction);
6469 case IrInstructionIdSuspendFinish:6390 case IrInstGenIdPtrOfArrayToSlice:
6470 return ir_render_suspend_finish(g, executable, (IrInstructionSuspendFinish *)instruction);6391 return ir_render_ptr_of_array_to_slice(g, executable, (IrInstGenPtrOfArrayToSlice *)instruction);
6471 case IrInstructionIdResume:6392 case IrInstGenIdSuspendBegin:
6472 return ir_render_resume(g, executable, (IrInstructionResume *)instruction);6393 return ir_render_suspend_begin(g, executable, (IrInstGenSuspendBegin *)instruction);
6473 case IrInstructionIdFrameSizeGen:6394 case IrInstGenIdSuspendFinish:
6474 return ir_render_frame_size(g, executable, (IrInstructionFrameSizeGen *)instruction);6395 return ir_render_suspend_finish(g, executable, (IrInstGenSuspendFinish *)instruction);
6475 case IrInstructionIdAwaitGen:6396 case IrInstGenIdResume:
6476 return ir_render_await(g, executable, (IrInstructionAwaitGen *)instruction);6397 return ir_render_resume(g, executable, (IrInstGenResume *)instruction);
6477 case IrInstructionIdSpillBegin:6398 case IrInstGenIdFrameSize:
6478 return ir_render_spill_begin(g, executable, (IrInstructionSpillBegin *)instruction);6399 return ir_render_frame_size(g, executable, (IrInstGenFrameSize *)instruction);
6479 case IrInstructionIdSpillEnd:6400 case IrInstGenIdAwait:
6480 return ir_render_spill_end(g, executable, (IrInstructionSpillEnd *)instruction);6401 return ir_render_await(g, executable, (IrInstGenAwait *)instruction);
6481 case IrInstructionIdShuffleVector:6402 case IrInstGenIdSpillBegin:
6482 return ir_render_shuffle_vector(g, executable, (IrInstructionShuffleVector *) instruction);6403 return ir_render_spill_begin(g, executable, (IrInstGenSpillBegin *)instruction);
6483 case IrInstructionIdSplatGen:6404 case IrInstGenIdSpillEnd:
6484 return ir_render_splat(g, executable, (IrInstructionSplatGen *) instruction);6405 return ir_render_spill_end(g, executable, (IrInstGenSpillEnd *)instruction);
6485 case IrInstructionIdVectorExtractElem:6406 case IrInstGenIdShuffleVector:
6486 return ir_render_vector_extract_elem(g, executable, (IrInstructionVectorExtractElem *) instruction);6407 return ir_render_shuffle_vector(g, executable, (IrInstGenShuffleVector *) instruction);
6408 case IrInstGenIdSplat:
6409 return ir_render_splat(g, executable, (IrInstGenSplat *) instruction);
6410 case IrInstGenIdVectorExtractElem:
6411 return ir_render_vector_extract_elem(g, executable, (IrInstGenVectorExtractElem *) instruction);
6487 }6412 }
6488 zig_unreachable();6413 zig_unreachable();
6489}6414}
...@@ -6491,21 +6416,21 @@ static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable,...@@ -6491,21 +6416,21 @@ static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable,
6491static void ir_render(CodeGen *g, ZigFn *fn_entry) {6416static void ir_render(CodeGen *g, ZigFn *fn_entry) {
6492 assert(fn_entry);6417 assert(fn_entry);
64936418
6494 IrExecutable *executable = &fn_entry->analyzed_executable;6419 IrExecutableGen *executable = &fn_entry->analyzed_executable;
6495 assert(executable->basic_block_list.length > 0);6420 assert(executable->basic_block_list.length > 0);
64966421
6497 for (size_t block_i = 0; block_i < executable->basic_block_list.length; block_i += 1) {6422 for (size_t block_i = 0; block_i < executable->basic_block_list.length; block_i += 1) {
6498 IrBasicBlock *current_block = executable->basic_block_list.at(block_i);6423 IrBasicBlockGen *current_block = executable->basic_block_list.at(block_i);
6499 if (get_scope_typeof(current_block->scope) != nullptr) {6424 if (get_scope_typeof(current_block->scope) != nullptr) {
6500 LLVMBuildBr(g->builder, current_block->llvm_block);6425 LLVMBuildBr(g->builder, current_block->llvm_block);
6501 }6426 }
6502 assert(current_block->llvm_block);6427 assert(current_block->llvm_block);
6503 LLVMPositionBuilderAtEnd(g->builder, current_block->llvm_block);6428 LLVMPositionBuilderAtEnd(g->builder, current_block->llvm_block);
6504 for (size_t instr_i = 0; instr_i < current_block->instruction_list.length; instr_i += 1) {6429 for (size_t instr_i = 0; instr_i < current_block->instruction_list.length; instr_i += 1) {
6505 IrInstruction *instruction = current_block->instruction_list.at(instr_i);6430 IrInstGen *instruction = current_block->instruction_list.at(instr_i);
6506 if (instruction->ref_count == 0 && !ir_has_side_effects(instruction))6431 if (instruction->base.ref_count == 0 && !ir_inst_gen_has_side_effects(instruction))
6507 continue;6432 continue;
6508 if (get_scope_typeof(instruction->scope) != nullptr)6433 if (get_scope_typeof(instruction->base.scope) != nullptr)
6509 continue;6434 continue;
65106435
6511 if (!g->strip_debug_symbols) {6436 if (!g->strip_debug_symbols) {
...@@ -7397,7 +7322,7 @@ static void generate_error_name_table(CodeGen *g) {...@@ -7397,7 +7322,7 @@ static void generate_error_name_table(CodeGen *g) {
7397}7322}
73987323
7399static void build_all_basic_blocks(CodeGen *g, ZigFn *fn) {7324static void build_all_basic_blocks(CodeGen *g, ZigFn *fn) {
7400 IrExecutable *executable = &fn->analyzed_executable;7325 IrExecutableGen *executable = &fn->analyzed_executable;
7401 assert(executable->basic_block_list.length > 0);7326 assert(executable->basic_block_list.length > 0);
7402 LLVMValueRef fn_val = fn_llvm_value(g, fn);7327 LLVMValueRef fn_val = fn_llvm_value(g, fn);
7403 LLVMBasicBlockRef first_bb = nullptr;7328 LLVMBasicBlockRef first_bb = nullptr;
...@@ -7406,7 +7331,7 @@ static void build_all_basic_blocks(CodeGen *g, ZigFn *fn) {...@@ -7406,7 +7331,7 @@ static void build_all_basic_blocks(CodeGen *g, ZigFn *fn) {
7406 g->cur_preamble_llvm_block = first_bb;7331 g->cur_preamble_llvm_block = first_bb;
7407 }7332 }
7408 for (size_t block_i = 0; block_i < executable->basic_block_list.length; block_i += 1) {7333 for (size_t block_i = 0; block_i < executable->basic_block_list.length; block_i += 1) {
7409 IrBasicBlock *bb = executable->basic_block_list.at(block_i);7334 IrBasicBlockGen *bb = executable->basic_block_list.at(block_i);
7410 bb->llvm_block = LLVMAppendBasicBlock(fn_val, bb->name_hint);7335 bb->llvm_block = LLVMAppendBasicBlock(fn_val, bb->name_hint);
7411 }7336 }
7412 if (first_bb == nullptr) {7337 if (first_bb == nullptr) {
...@@ -7639,10 +7564,10 @@ static void do_code_gen(CodeGen *g) {...@@ -7639,10 +7564,10 @@ static void do_code_gen(CodeGen *g) {
7639 if (!is_async) {7564 if (!is_async) {
7640 // allocate async frames for noasync calls & awaits to async functions7565 // allocate async frames for noasync calls & awaits to async functions
7641 ZigType *largest_call_frame_type = nullptr;7566 ZigType *largest_call_frame_type = nullptr;
7642 IrInstruction *all_calls_alloca = ir_create_alloca(g, &fn_table_entry->fndef_scope->base,7567 IrInstGen *all_calls_alloca = ir_create_alloca(g, &fn_table_entry->fndef_scope->base,
7643 fn_table_entry->body_node, fn_table_entry, g->builtin_types.entry_void, "@async_call_frame");7568 fn_table_entry->body_node, fn_table_entry, g->builtin_types.entry_void, "@async_call_frame");
7644 for (size_t i = 0; i < fn_table_entry->call_list.length; i += 1) {7569 for (size_t i = 0; i < fn_table_entry->call_list.length; i += 1) {
7645 IrInstructionCallGen *call = fn_table_entry->call_list.at(i);7570 IrInstGenCall *call = fn_table_entry->call_list.at(i);
7646 if (call->fn_entry == nullptr)7571 if (call->fn_entry == nullptr)
7647 continue;7572 continue;
7648 if (!fn_is_async(call->fn_entry))7573 if (!fn_is_async(call->fn_entry))
...@@ -7664,7 +7589,7 @@ static void do_code_gen(CodeGen *g) {...@@ -7664,7 +7589,7 @@ static void do_code_gen(CodeGen *g) {
7664 }7589 }
7665 // allocate temporary stack data7590 // allocate temporary stack data
7666 for (size_t alloca_i = 0; alloca_i < fn_table_entry->alloca_gen_list.length; alloca_i += 1) {7591 for (size_t alloca_i = 0; alloca_i < fn_table_entry->alloca_gen_list.length; alloca_i += 1) {
7667 IrInstructionAllocaGen *instruction = fn_table_entry->alloca_gen_list.at(alloca_i);7592 IrInstGenAlloca *instruction = fn_table_entry->alloca_gen_list.at(alloca_i);
7668 ZigType *ptr_type = instruction->base.value->type;7593 ZigType *ptr_type = instruction->base.value->type;
7669 assert(ptr_type->id == ZigTypeIdPointer);7594 assert(ptr_type->id == ZigTypeIdPointer);
7670 ZigType *child_type = ptr_type->data.pointer.child_type;7595 ZigType *child_type = ptr_type->data.pointer.child_type;
...@@ -7672,7 +7597,7 @@ static void do_code_gen(CodeGen *g) {...@@ -7672,7 +7597,7 @@ static void do_code_gen(CodeGen *g) {
7672 zig_unreachable();7597 zig_unreachable();
7673 if (!type_has_bits(child_type))7598 if (!type_has_bits(child_type))
7674 continue;7599 continue;
7675 if (instruction->base.ref_count == 0)7600 if (instruction->base.base.ref_count == 0)
7676 continue;7601 continue;
7677 if (instruction->base.value->special != ConstValSpecialRuntime) {7602 if (instruction->base.value->special != ConstValSpecialRuntime) {
7678 if (const_ptr_pointee(nullptr, g, instruction->base.value, nullptr)->special !=7603 if (const_ptr_pointee(nullptr, g, instruction->base.value, nullptr)->special !=
...@@ -7789,7 +7714,7 @@ static void do_code_gen(CodeGen *g) {...@@ -7789,7 +7714,7 @@ static void do_code_gen(CodeGen *g) {
7789 ZigLLVMSetCurrentDebugLocation(g->builder, (int)source_node->line + 1,7714 ZigLLVMSetCurrentDebugLocation(g->builder, (int)source_node->line + 1,
7790 (int)source_node->column + 1, get_di_scope(g, fn_table_entry->child_scope));7715 (int)source_node->column + 1, get_di_scope(g, fn_table_entry->child_scope));
7791 }7716 }
7792 IrExecutable *executable = &fn_table_entry->analyzed_executable;7717 IrExecutableGen *executable = &fn_table_entry->analyzed_executable;
7793 LLVMBasicBlockRef bad_resume_block = LLVMAppendBasicBlock(g->cur_fn_val, "BadResume");7718 LLVMBasicBlockRef bad_resume_block = LLVMAppendBasicBlock(g->cur_fn_val, "BadResume");
7794 LLVMPositionBuilderAtEnd(g->builder, bad_resume_block);7719 LLVMPositionBuilderAtEnd(g->builder, bad_resume_block);
7795 gen_assertion_scope(g, PanicMsgIdBadResume, fn_table_entry->child_scope);7720 gen_assertion_scope(g, PanicMsgIdBadResume, fn_table_entry->child_scope);
...@@ -7816,7 +7741,7 @@ static void do_code_gen(CodeGen *g) {...@@ -7816,7 +7741,7 @@ static void do_code_gen(CodeGen *g) {
7816 g->cur_async_switch_instr = switch_instr;7741 g->cur_async_switch_instr = switch_instr;
78177742
7818 LLVMValueRef zero = LLVMConstNull(usize_type_ref);7743 LLVMValueRef zero = LLVMConstNull(usize_type_ref);
7819 IrBasicBlock *entry_block = executable->basic_block_list.at(0);7744 IrBasicBlockGen *entry_block = executable->basic_block_list.at(0);
7820 LLVMAddCase(switch_instr, zero, entry_block->llvm_block);7745 LLVMAddCase(switch_instr, zero, entry_block->llvm_block);
7821 g->cur_resume_block_count += 1;7746 g->cur_resume_block_count += 1;
78227747
...@@ -7848,7 +7773,7 @@ static void do_code_gen(CodeGen *g) {...@@ -7848,7 +7773,7 @@ static void do_code_gen(CodeGen *g) {
78487773
7849 gen_init_stack_trace(g, trace_field_ptr, addrs_field_ptr);7774 gen_init_stack_trace(g, trace_field_ptr, addrs_field_ptr);
7850 }7775 }
7851 render_async_var_decls(g, entry_block->instruction_list.at(0)->scope);7776 render_async_var_decls(g, entry_block->instruction_list.at(0)->base.scope);
7852 } else {7777 } else {
7853 // create debug variable declarations for parameters7778 // create debug variable declarations for parameters
7854 // rely on the first variables in the variable_list being parameters.7779 // rely on the first variables in the variable_list being parameters.
...@@ -7937,6 +7862,12 @@ static void zig_llvm_emit_output(CodeGen *g) {...@@ -7937,6 +7862,12 @@ static void zig_llvm_emit_output(CodeGen *g) {
7937 default:7862 default:
7938 zig_unreachable();7863 zig_unreachable();
7939 }7864 }
7865 LLVMDisposeModule(g->module);
7866 g->module = nullptr;
7867 LLVMDisposeTargetData(g->target_data_ref);
7868 g->target_data_ref = nullptr;
7869 LLVMDisposeTargetMachine(g->target_machine);
7870 g->target_machine = nullptr;
7940}7871}
79417872
7942struct CIntTypeInfo {7873struct CIntTypeInfo {
...@@ -8574,6 +8505,17 @@ Buf *codegen_generate_builtin_source(CodeGen *g) {...@@ -8574,6 +8505,17 @@ Buf *codegen_generate_builtin_source(CodeGen *g) {
8574 buf_appendf(contents, "pub const os = Os.%s;\n", cur_os);8505 buf_appendf(contents, "pub const os = Os.%s;\n", cur_os);
8575 buf_appendf(contents, "pub const arch = %s;\n", cur_arch);8506 buf_appendf(contents, "pub const arch = %s;\n", cur_arch);
8576 buf_appendf(contents, "pub const abi = Abi.%s;\n", cur_abi);8507 buf_appendf(contents, "pub const abi = Abi.%s;\n", cur_abi);
8508 {
8509 buf_append_str(contents, "pub const cpu_features: CpuFeatures = ");
8510 if (g->zig_target->cpu_features != nullptr) {
8511 const char *ptr;
8512 size_t len;
8513 stage2_cpu_features_get_builtin_str(g->zig_target->cpu_features, &ptr, &len);
8514 buf_append_mem(contents, ptr, len);
8515 } else {
8516 buf_append_str(contents, "arch.getBaselineCpuFeatures();\n");
8517 }
8518 }
8577 if (g->libc_link_lib != nullptr && g->zig_target->glibc_version != nullptr) {8519 if (g->libc_link_lib != nullptr && g->zig_target->glibc_version != nullptr) {
8578 buf_appendf(contents,8520 buf_appendf(contents,
8579 "pub const glibc_version: ?Version = Version{.major = %d, .minor = %d, .patch = %d};\n",8521 "pub const glibc_version: ?Version = Version{.major = %d, .minor = %d, .patch = %d};\n",
...@@ -8641,6 +8583,12 @@ static Error define_builtin_compile_vars(CodeGen *g) {...@@ -8641,6 +8583,12 @@ static Error define_builtin_compile_vars(CodeGen *g) {
8641 cache_int(&cache_hash, g->zig_target->vendor);8583 cache_int(&cache_hash, g->zig_target->vendor);
8642 cache_int(&cache_hash, g->zig_target->os);8584 cache_int(&cache_hash, g->zig_target->os);
8643 cache_int(&cache_hash, g->zig_target->abi);8585 cache_int(&cache_hash, g->zig_target->abi);
8586 if (g->zig_target->cpu_features != nullptr) {
8587 const char *ptr;
8588 size_t len;
8589 stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len);
8590 cache_str(&cache_hash, ptr);
8591 }
8644 if (g->zig_target->glibc_version != nullptr) {8592 if (g->zig_target->glibc_version != nullptr) {
8645 cache_int(&cache_hash, g->zig_target->glibc_version->major);8593 cache_int(&cache_hash, g->zig_target->glibc_version->major);
8646 cache_int(&cache_hash, g->zig_target->glibc_version->minor);8594 cache_int(&cache_hash, g->zig_target->glibc_version->minor);
...@@ -8765,37 +8713,25 @@ static void init(CodeGen *g) {...@@ -8765,37 +8713,25 @@ static void init(CodeGen *g) {
8765 reloc_mode = LLVMRelocStatic;8713 reloc_mode = LLVMRelocStatic;
8766 }8714 }
87678715
8768 const char *target_specific_cpu_args;8716 const char *target_specific_cpu_args = "";
8769 const char *target_specific_features;8717 const char *target_specific_features = "";
8718
8770 if (g->zig_target->is_native) {8719 if (g->zig_target->is_native) {
8771 // LLVM creates invalid binaries on Windows sometimes.8720 target_specific_cpu_args = ZigLLVMGetHostCPUName();
8772 // See https://github.com/ziglang/zig/issues/5088721 target_specific_features = ZigLLVMGetNativeFeatures();
8773 // As a workaround we do not use target native features on Windows.
8774 if (g->zig_target->os == OsWindows || g->zig_target->os == OsUefi) {
8775 target_specific_cpu_args = "";
8776 target_specific_features = "";
8777 } else {
8778 target_specific_cpu_args = ZigLLVMGetHostCPUName();
8779 target_specific_features = ZigLLVMGetNativeFeatures();
8780 }
8781 } else if (target_is_riscv(g->zig_target)) {
8782 // TODO https://github.com/ziglang/zig/issues/2883
8783 // Be aware of https://github.com/ziglang/zig/issues/3275
8784 target_specific_cpu_args = "";
8785 target_specific_features = riscv_default_features;
8786 } else if (g->zig_target->arch == ZigLLVM_x86) {
8787 // This is because we're really targeting i686 rather than i386.
8788 // It's pretty much impossible to use many of the language features
8789 // such as fp16 if you stick use the x87 only. This is also what clang
8790 // uses as base cpu.
8791 // TODO https://github.com/ziglang/zig/issues/2883
8792 target_specific_cpu_args = "pentium4";
8793 target_specific_features = (g->zig_target->os == OsFreestanding) ? "-sse": "";
8794 } else {
8795 target_specific_cpu_args = "";
8796 target_specific_features = "";
8797 }8722 }
87988723
8724 // Override CPU and features if defined by user.
8725 if (g->zig_target->cpu_features != nullptr) {
8726 target_specific_cpu_args = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features);
8727 target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
8728 }
8729 if (g->verbose_llvm_cpu_features) {
8730 fprintf(stderr, "name=%s triple=%s\n", buf_ptr(g->root_out_name), buf_ptr(&g->llvm_triple_str));
8731 fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args);
8732 fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features);
8733 }
8734
8799 g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str),8735 g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str),
8800 target_specific_cpu_args, target_specific_features, opt_level, reloc_mode,8736 target_specific_cpu_args, target_specific_features, opt_level, reloc_mode,
8801 LLVMCodeModelDefault, g->function_sections);8737 LLVMCodeModelDefault, g->function_sections);
...@@ -8842,15 +8778,17 @@ static void init(CodeGen *g) {...@@ -8842,15 +8778,17 @@ static void init(CodeGen *g) {
8842 define_builtin_types(g);8778 define_builtin_types(g);
8843 define_intern_values(g);8779 define_intern_values(g);
88448780
8845 IrInstruction *sentinel_instructions = allocate<IrInstruction>(2);8781 IrInstGen *sentinel_instructions = allocate<IrInstGen>(2);
8846 g->invalid_instruction = &sentinel_instructions[0];8782 g->invalid_inst_gen = &sentinel_instructions[0];
8847 g->invalid_instruction->value = allocate<ZigValue>(1, "ZigValue");8783 g->invalid_inst_gen->value = allocate<ZigValue>(1, "ZigValue");
8848 g->invalid_instruction->value->type = g->builtin_types.entry_invalid;8784 g->invalid_inst_gen->value->type = g->builtin_types.entry_invalid;
88498785
8850 g->unreach_instruction = &sentinel_instructions[1];8786 g->unreach_instruction = &sentinel_instructions[1];
8851 g->unreach_instruction->value = allocate<ZigValue>(1, "ZigValue");8787 g->unreach_instruction->value = allocate<ZigValue>(1, "ZigValue");
8852 g->unreach_instruction->value->type = g->builtin_types.entry_unreachable;8788 g->unreach_instruction->value->type = g->builtin_types.entry_unreachable;
88538789
8790 g->invalid_inst_src = allocate<IrInstSrc>(1);
8791
8854 define_builtin_fns(g);8792 define_builtin_fns(g);
8855 Error err;8793 Error err;
8856 if ((err = define_builtin_compile_vars(g))) {8794 if ((err = define_builtin_compile_vars(g))) {
...@@ -8992,7 +8930,10 @@ static void detect_libc(CodeGen *g) {...@@ -8992,7 +8930,10 @@ static void detect_libc(CodeGen *g) {
8992 "See `zig libc --help` for more details.\n", err_str(err));8930 "See `zig libc --help` for more details.\n", err_str(err));
8993 exit(1);8931 exit(1);
8994 }8932 }
8995 if ((err = os_make_path(g->cache_dir))) {8933 Buf libc_txt_dir = BUF_INIT;
8934 os_path_dirname(libc_txt, &libc_txt_dir);
8935 buf_deinit(&libc_txt_dir);
8936 if ((err = os_make_path(&libc_txt_dir))) {
8996 fprintf(stderr, "Unable to create %s directory: %s\n",8937 fprintf(stderr, "Unable to create %s directory: %s\n",
8997 buf_ptr(g->cache_dir), err_str(err));8938 buf_ptr(g->cache_dir), err_str(err));
8998 exit(1);8939 exit(1);
...@@ -9121,21 +9062,22 @@ void add_cc_args(CodeGen *g, ZigList<const char *> &args, const char *out_dep_pa...@@ -9121,21 +9062,22 @@ void add_cc_args(CodeGen *g, ZigList<const char *> &args, const char *out_dep_pa
9121 args.append("-target");9062 args.append("-target");
9122 args.append(buf_ptr(&g->llvm_triple_str));9063 args.append(buf_ptr(&g->llvm_triple_str));
91239064
9124 if (target_is_musl(g->zig_target) && target_is_riscv(g->zig_target)) {9065 const char *llvm_cpu = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features);
9125 // Musl depends on atomic instructions, which are disabled by default in Clang/LLVM's9066 if (llvm_cpu != nullptr) {
9126 // cross compilation CPU info for RISCV.
9127 // TODO: https://github.com/ziglang/zig/issues/2883
9128 args.append("-Xclang");9067 args.append("-Xclang");
9129 args.append("-target-feature");9068 args.append("-target-cpu");
9130 args.append("-Xclang");9069 args.append("-Xclang");
9131 args.append(riscv_default_features);9070 args.append(llvm_cpu);
9132 } else if (g->zig_target->os == OsFreestanding && g->zig_target->arch == ZigLLVM_x86) {9071 }
9072 const char *llvm_target_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
9073 if (llvm_target_features != nullptr) {
9133 args.append("-Xclang");9074 args.append("-Xclang");
9134 args.append("-target-feature");9075 args.append("-target-feature");
9135 args.append("-Xclang");9076 args.append("-Xclang");
9136 args.append("-sse");9077 args.append(llvm_target_features);
9137 }9078 }
9138 }9079 }
9080
9139 if (g->zig_target->os == OsFreestanding) {9081 if (g->zig_target->os == OsFreestanding) {
9140 args.append("-ffreestanding");9082 args.append("-ffreestanding");
9141 }9083 }
...@@ -9783,6 +9725,7 @@ static void prepend_c_type_to_decl_list(CodeGen *g, GenH *gen_h, ZigType *type_e...@@ -9783,6 +9725,7 @@ static void prepend_c_type_to_decl_list(CodeGen *g, GenH *gen_h, ZigType *type_e
9783 zig_unreachable();9725 zig_unreachable();
9784 case ZigTypeIdVoid:9726 case ZigTypeIdVoid:
9785 case ZigTypeIdUnreachable:9727 case ZigTypeIdUnreachable:
9728 return;
9786 case ZigTypeIdBool:9729 case ZigTypeIdBool:
9787 g->c_want_stdbool = true;9730 g->c_want_stdbool = true;
9788 return;9731 return;
...@@ -10329,6 +10272,12 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) {...@@ -10329,6 +10272,12 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) {
10329 cache_int(ch, g->zig_target->vendor);10272 cache_int(ch, g->zig_target->vendor);
10330 cache_int(ch, g->zig_target->os);10273 cache_int(ch, g->zig_target->os);
10331 cache_int(ch, g->zig_target->abi);10274 cache_int(ch, g->zig_target->abi);
10275 if (g->zig_target->cpu_features != nullptr) {
10276 const char *ptr;
10277 size_t len;
10278 stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len);
10279 cache_str(ch, ptr);
10280 }
10332 if (g->zig_target->glibc_version != nullptr) {10281 if (g->zig_target->glibc_version != nullptr) {
10333 cache_int(ch, g->zig_target->glibc_version->major);10282 cache_int(ch, g->zig_target->glibc_version->major);
10334 cache_int(ch, g->zig_target->glibc_version->minor);10283 cache_int(ch, g->zig_target->glibc_version->minor);
...@@ -10669,6 +10618,7 @@ CodeGen *create_child_codegen(CodeGen *parent_gen, Buf *root_src_path, OutType o...@@ -10669,6 +10618,7 @@ CodeGen *create_child_codegen(CodeGen *parent_gen, Buf *root_src_path, OutType o
10669 child_gen->verbose_llvm_ir = parent_gen->verbose_llvm_ir;10618 child_gen->verbose_llvm_ir = parent_gen->verbose_llvm_ir;
10670 child_gen->verbose_cimport = parent_gen->verbose_cimport;10619 child_gen->verbose_cimport = parent_gen->verbose_cimport;
10671 child_gen->verbose_cc = parent_gen->verbose_cc;10620 child_gen->verbose_cc = parent_gen->verbose_cc;
10621 child_gen->verbose_llvm_cpu_features = parent_gen->verbose_llvm_cpu_features;
10672 child_gen->llvm_argv = parent_gen->llvm_argv;10622 child_gen->llvm_argv = parent_gen->llvm_argv;
10673 child_gen->dynamic_linker_path = parent_gen->dynamic_linker_path;10623 child_gen->dynamic_linker_path = parent_gen->dynamic_linker_path;
1067410624
src/error.cpp+6
...@@ -58,6 +58,12 @@ const char *err_str(Error err) {...@@ -58,6 +58,12 @@ const char *err_str(Error err) {
58 case ErrorNotLazy: return "not lazy";58 case ErrorNotLazy: return "not lazy";
59 case ErrorIsAsync: return "is async";59 case ErrorIsAsync: return "is async";
60 case ErrorImportOutsidePkgPath: return "import of file outside package path";60 case ErrorImportOutsidePkgPath: return "import of file outside package path";
61 case ErrorUnknownCpu: return "unknown CPU";
62 case ErrorUnknownSubArchitecture: return "unknown sub-architecture";
63 case ErrorUnknownCpuFeature: return "unknown CPU feature";
64 case ErrorInvalidCpuFeatures: return "invalid CPU features";
65 case ErrorInvalidLlvmCpuFeaturesFormat: return "invalid LLVM CPU features format";
66 case ErrorUnknownApplicationBinaryInterface: return "unknown application binary interface";
61 }67 }
62 return "(invalid error)";68 return "(invalid error)";
63}69}
src/ir.cpp+7344-6405
...@@ -17,27 +17,33 @@...@@ -17,27 +17,33 @@
1717
18#include <errno.h>18#include <errno.h>
1919
20struct IrBuilder {20struct IrBuilderSrc {
21 CodeGen *codegen;21 CodeGen *codegen;
22 IrExecutable *exec;22 IrExecutableSrc *exec;
23 IrBasicBlock *current_basic_block;23 IrBasicBlockSrc *current_basic_block;
24 AstNode *main_block_node;24 AstNode *main_block_node;
25};25};
2626
27struct IrBuilderGen {
28 CodeGen *codegen;
29 IrExecutableGen *exec;
30 IrBasicBlockGen *current_basic_block;
31};
32
27struct IrAnalyze {33struct IrAnalyze {
28 CodeGen *codegen;34 CodeGen *codegen;
29 IrBuilder old_irb;35 IrBuilderSrc old_irb;
30 IrBuilder new_irb;36 IrBuilderGen new_irb;
31 size_t old_bb_index;37 size_t old_bb_index;
32 size_t instruction_index;38 size_t instruction_index;
33 ZigType *explicit_return_type;39 ZigType *explicit_return_type;
34 AstNode *explicit_return_type_source_node;40 AstNode *explicit_return_type_source_node;
35 ZigList<IrInstruction *> src_implicit_return_type_list;41 ZigList<IrInstGen *> src_implicit_return_type_list;
36 ZigList<IrSuspendPosition> resume_stack;42 ZigList<IrSuspendPosition> resume_stack;
37 IrBasicBlock *const_predecessor_bb;43 IrBasicBlockSrc *const_predecessor_bb;
38 size_t ref_count;44 size_t ref_count;
39 size_t break_debug_id; // for debugging purposes45 size_t break_debug_id; // for debugging purposes
40 IrInstruction *return_ptr;46 IrInstGen *return_ptr;
4147
42 // For the purpose of using in a debugger48 // For the purpose of using in a debugger
43 void dump();49 void dump();
...@@ -202,412 +208,537 @@ struct DbgIrBreakPoint {...@@ -202,412 +208,537 @@ struct DbgIrBreakPoint {
202DbgIrBreakPoint dbg_ir_breakpoints_buf[20];208DbgIrBreakPoint dbg_ir_breakpoints_buf[20];
203size_t dbg_ir_breakpoints_count = 0;209size_t dbg_ir_breakpoints_count = 0;
204210
205static IrInstruction *ir_gen_node(IrBuilder *irb, AstNode *node, Scope *scope);211static IrInstSrc *ir_gen_node(IrBuilderSrc *irb, AstNode *node, Scope *scope);
206static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *scope, LVal lval,212static IrInstSrc *ir_gen_node_extra(IrBuilderSrc *irb, AstNode *node, Scope *scope, LVal lval,
207 ResultLoc *result_loc);213 ResultLoc *result_loc);
208static IrInstruction *ir_implicit_cast(IrAnalyze *ira, IrInstruction *value, ZigType *expected_type);214static IrInstGen *ir_implicit_cast(IrAnalyze *ira, IrInstGen *value, ZigType *expected_type);
209static IrInstruction *ir_implicit_cast2(IrAnalyze *ira, IrInstruction *value_source_instr,215static IrInstGen *ir_implicit_cast2(IrAnalyze *ira, IrInst *value_source_instr,
210 IrInstruction *value, ZigType *expected_type);216 IrInstGen *value, ZigType *expected_type);
211static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruction, IrInstruction *ptr,217static IrInstGen *ir_get_deref(IrAnalyze *ira, IrInst *source_instr, IrInstGen *ptr,
212 ResultLoc *result_loc);218 ResultLoc *result_loc);
213static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutable *exec, AstNode *source_node, Buf *msg);219static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutableSrc *exec, AstNode *source_node, Buf *msg);
214static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,220static IrInstGen *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,
215 IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type, bool initializing);221 IrInst* source_instr, IrInstGen *container_ptr, ZigType *container_type, bool initializing);
216static void ir_assert(bool ok, IrInstruction *source_instruction);222static void ir_assert(bool ok, IrInst* source_instruction);
217static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction, ZigVar *var);223static void ir_assert_gen(bool ok, IrInstGen *source_instruction);
218static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstruction *op);224static IrInstGen *ir_get_var_ptr(IrAnalyze *ira, IrInst *source_instr, ZigVar *var);
219static IrInstruction *ir_lval_wrap(IrBuilder *irb, Scope *scope, IrInstruction *value, LVal lval, ResultLoc *result_loc);225static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op);
220static IrInstruction *ir_expr_wrap(IrBuilder *irb, Scope *scope, IrInstruction *inst, ResultLoc *result_loc);226static IrInstSrc *ir_lval_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *value, LVal lval, ResultLoc *result_loc);
227static IrInstSrc *ir_expr_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *inst, ResultLoc *result_loc);
221static ZigType *adjust_ptr_align(CodeGen *g, ZigType *ptr_type, uint32_t new_align);228static ZigType *adjust_ptr_align(CodeGen *g, ZigType *ptr_type, uint32_t new_align);
222static ZigType *adjust_slice_align(CodeGen *g, ZigType *slice_type, uint32_t new_align);229static ZigType *adjust_slice_align(CodeGen *g, ZigType *slice_type, uint32_t new_align);
223static Error buf_read_value_bytes(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node, uint8_t *buf, ZigValue *val);230static Error buf_read_value_bytes(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node, uint8_t *buf, ZigValue *val);
224static void buf_write_value_bytes(CodeGen *codegen, uint8_t *buf, ZigValue *val);231static void buf_write_value_bytes(CodeGen *codegen, uint8_t *buf, ZigValue *val);
225static Error ir_read_const_ptr(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node,232static Error ir_read_const_ptr(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node,
226 ZigValue *out_val, ZigValue *ptr_val);233 ZigValue *out_val, ZigValue *ptr_val);
227static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *ptr,234static IrInstGen *ir_analyze_ptr_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *ptr,
228 ZigType *dest_type, IrInstruction *dest_type_src, bool safety_check_on);235 ZigType *dest_type, IrInst *dest_type_src, bool safety_check_on);
229static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstruction *value, UndefAllowed undef_allowed);236static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstGen *value, UndefAllowed undef_allowed);
230static Error resolve_ptr_align(IrAnalyze *ira, ZigType *ty, uint32_t *result_align);237static Error resolve_ptr_align(IrAnalyze *ira, ZigType *ty, uint32_t *result_align);
231static IrInstruction *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,238static IrInstGen *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
232 ZigType *ptr_type);239 ZigType *ptr_type);
233static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,240static IrInstGen *ir_analyze_bit_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
234 ZigType *dest_type);241 ZigType *dest_type);
235static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspend_source_instr,242static IrInstGen *ir_resolve_result_raw(IrAnalyze *ira, IrInst *suspend_source_instr,
236 ResultLoc *result_loc, ZigType *value_type, IrInstruction *value, bool force_runtime,243 ResultLoc *result_loc, ZigType *value_type, IrInstGen *value, bool force_runtime, bool allow_discard);
237 bool allow_discard);244static IrInstGen *ir_resolve_result(IrAnalyze *ira, IrInst *suspend_source_instr,
238static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_source_instr,245 ResultLoc *result_loc, ZigType *value_type, IrInstGen *value, bool force_runtime, bool allow_discard);
239 ResultLoc *result_loc, ZigType *value_type, IrInstruction *value, bool force_runtime,246static IrInstGen *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInst* source_instr,
240 bool allow_discard);247 IrInstGen *base_ptr, bool safety_check_on, bool initializing);
241static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstruction *source_instr,248static IrInstGen *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInst* source_instr,
242 IrInstruction *base_ptr, bool safety_check_on, bool initializing);249 IrInstGen *base_ptr, bool safety_check_on, bool initializing);
243static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruction *source_instr,250static IrInstGen *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInst* source_instr,
244 IrInstruction *base_ptr, bool safety_check_on, bool initializing);251 IrInstGen *base_ptr, bool initializing);
245static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *source_instr,252static IrInstGen *ir_analyze_store_ptr(IrAnalyze *ira, IrInst* source_instr,
246 IrInstruction *base_ptr, bool initializing);253 IrInstGen *ptr, IrInstGen *uncasted_value, bool allow_write_through_const);
247static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source_instr,254static IrInstSrc *ir_gen_union_init_expr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
248 IrInstruction *ptr, IrInstruction *uncasted_value, bool allow_write_through_const);255 IrInstSrc *union_type, IrInstSrc *field_name, AstNode *expr_node,
249static IrInstruction *ir_gen_union_init_expr(IrBuilder *irb, Scope *scope, AstNode *source_node,
250 IrInstruction *union_type, IrInstruction *field_name, AstNode *expr_node,
251 LVal lval, ResultLoc *parent_result_loc);256 LVal lval, ResultLoc *parent_result_loc);
252static void ir_reset_result(ResultLoc *result_loc);257static void ir_reset_result(ResultLoc *result_loc);
253static Buf *get_anon_type_name(CodeGen *codegen, IrExecutable *exec, const char *kind_name,258static Buf *get_anon_type_name(CodeGen *codegen, IrExecutableSrc *exec, const char *kind_name,
254 Scope *scope, AstNode *source_node, Buf *out_bare_name);259 Scope *scope, AstNode *source_node, Buf *out_bare_name);
255static ResultLocCast *ir_build_cast_result_loc(IrBuilder *irb, IrInstruction *dest_type,260static ResultLocCast *ir_build_cast_result_loc(IrBuilderSrc *irb, IrInstSrc *dest_type,
256 ResultLoc *parent_result_loc);261 ResultLoc *parent_result_loc);
257static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction *source_instr,262static IrInstGen *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInst* source_instr,
258 TypeStructField *field, IrInstruction *struct_ptr, ZigType *struct_type, bool initializing);263 TypeStructField *field, IrInstGen *struct_ptr, ZigType *struct_type, bool initializing);
259static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,264static IrInstGen *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,
260 IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type);265 IrInst* source_instr, IrInstGen *container_ptr, ZigType *container_type);
261static ResultLoc *no_result_loc(void);266static ResultLoc *no_result_loc(void);
262static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *source_inst, IrInstruction *value);267static IrInstGen *ir_analyze_test_non_null(IrAnalyze *ira, IrInst *source_inst, IrInstGen *value);
268static IrInstGen *ir_error_dependency_loop(IrAnalyze *ira, IrInst *source_instr);
269
270static void destroy_instruction_src(IrInstSrc *inst) {
271#ifdef ZIG_ENABLE_MEM_PROFILE
272 const char *name = ir_inst_src_type_str(inst->id);
273#else
274 const char *name = nullptr;
275#endif
276 switch (inst->id) {
277 case IrInstSrcIdInvalid:
278 zig_unreachable();
279 case IrInstSrcIdReturn:
280 return destroy(reinterpret_cast<IrInstSrcReturn *>(inst), name);
281 case IrInstSrcIdConst:
282 return destroy(reinterpret_cast<IrInstSrcConst *>(inst), name);
283 case IrInstSrcIdBinOp:
284 return destroy(reinterpret_cast<IrInstSrcBinOp *>(inst), name);
285 case IrInstSrcIdMergeErrSets:
286 return destroy(reinterpret_cast<IrInstSrcMergeErrSets *>(inst), name);
287 case IrInstSrcIdDeclVar:
288 return destroy(reinterpret_cast<IrInstSrcDeclVar *>(inst), name);
289 case IrInstSrcIdCall:
290 return destroy(reinterpret_cast<IrInstSrcCall *>(inst), name);
291 case IrInstSrcIdCallExtra:
292 return destroy(reinterpret_cast<IrInstSrcCallExtra *>(inst), name);
293 case IrInstSrcIdUnOp:
294 return destroy(reinterpret_cast<IrInstSrcUnOp *>(inst), name);
295 case IrInstSrcIdCondBr:
296 return destroy(reinterpret_cast<IrInstSrcCondBr *>(inst), name);
297 case IrInstSrcIdBr:
298 return destroy(reinterpret_cast<IrInstSrcBr *>(inst), name);
299 case IrInstSrcIdPhi:
300 return destroy(reinterpret_cast<IrInstSrcPhi *>(inst), name);
301 case IrInstSrcIdContainerInitList:
302 return destroy(reinterpret_cast<IrInstSrcContainerInitList *>(inst), name);
303 case IrInstSrcIdContainerInitFields:
304 return destroy(reinterpret_cast<IrInstSrcContainerInitFields *>(inst), name);
305 case IrInstSrcIdUnreachable:
306 return destroy(reinterpret_cast<IrInstSrcUnreachable *>(inst), name);
307 case IrInstSrcIdElemPtr:
308 return destroy(reinterpret_cast<IrInstSrcElemPtr *>(inst), name);
309 case IrInstSrcIdVarPtr:
310 return destroy(reinterpret_cast<IrInstSrcVarPtr *>(inst), name);
311 case IrInstSrcIdLoadPtr:
312 return destroy(reinterpret_cast<IrInstSrcLoadPtr *>(inst), name);
313 case IrInstSrcIdStorePtr:
314 return destroy(reinterpret_cast<IrInstSrcStorePtr *>(inst), name);
315 case IrInstSrcIdTypeOf:
316 return destroy(reinterpret_cast<IrInstSrcTypeOf *>(inst), name);
317 case IrInstSrcIdFieldPtr:
318 return destroy(reinterpret_cast<IrInstSrcFieldPtr *>(inst), name);
319 case IrInstSrcIdSetCold:
320 return destroy(reinterpret_cast<IrInstSrcSetCold *>(inst), name);
321 case IrInstSrcIdSetRuntimeSafety:
322 return destroy(reinterpret_cast<IrInstSrcSetRuntimeSafety *>(inst), name);
323 case IrInstSrcIdSetFloatMode:
324 return destroy(reinterpret_cast<IrInstSrcSetFloatMode *>(inst), name);
325 case IrInstSrcIdArrayType:
326 return destroy(reinterpret_cast<IrInstSrcArrayType *>(inst), name);
327 case IrInstSrcIdSliceType:
328 return destroy(reinterpret_cast<IrInstSrcSliceType *>(inst), name);
329 case IrInstSrcIdAnyFrameType:
330 return destroy(reinterpret_cast<IrInstSrcAnyFrameType *>(inst), name);
331 case IrInstSrcIdAsm:
332 return destroy(reinterpret_cast<IrInstSrcAsm *>(inst), name);
333 case IrInstSrcIdSizeOf:
334 return destroy(reinterpret_cast<IrInstSrcSizeOf *>(inst), name);
335 case IrInstSrcIdTestNonNull:
336 return destroy(reinterpret_cast<IrInstSrcTestNonNull *>(inst), name);
337 case IrInstSrcIdOptionalUnwrapPtr:
338 return destroy(reinterpret_cast<IrInstSrcOptionalUnwrapPtr *>(inst), name);
339 case IrInstSrcIdPopCount:
340 return destroy(reinterpret_cast<IrInstSrcPopCount *>(inst), name);
341 case IrInstSrcIdClz:
342 return destroy(reinterpret_cast<IrInstSrcClz *>(inst), name);
343 case IrInstSrcIdCtz:
344 return destroy(reinterpret_cast<IrInstSrcCtz *>(inst), name);
345 case IrInstSrcIdBswap:
346 return destroy(reinterpret_cast<IrInstSrcBswap *>(inst), name);
347 case IrInstSrcIdBitReverse:
348 return destroy(reinterpret_cast<IrInstSrcBitReverse *>(inst), name);
349 case IrInstSrcIdSwitchBr:
350 return destroy(reinterpret_cast<IrInstSrcSwitchBr *>(inst), name);
351 case IrInstSrcIdSwitchVar:
352 return destroy(reinterpret_cast<IrInstSrcSwitchVar *>(inst), name);
353 case IrInstSrcIdSwitchElseVar:
354 return destroy(reinterpret_cast<IrInstSrcSwitchElseVar *>(inst), name);
355 case IrInstSrcIdSwitchTarget:
356 return destroy(reinterpret_cast<IrInstSrcSwitchTarget *>(inst), name);
357 case IrInstSrcIdImport:
358 return destroy(reinterpret_cast<IrInstSrcImport *>(inst), name);
359 case IrInstSrcIdRef:
360 return destroy(reinterpret_cast<IrInstSrcRef *>(inst), name);
361 case IrInstSrcIdCompileErr:
362 return destroy(reinterpret_cast<IrInstSrcCompileErr *>(inst), name);
363 case IrInstSrcIdCompileLog:
364 return destroy(reinterpret_cast<IrInstSrcCompileLog *>(inst), name);
365 case IrInstSrcIdErrName:
366 return destroy(reinterpret_cast<IrInstSrcErrName *>(inst), name);
367 case IrInstSrcIdCImport:
368 return destroy(reinterpret_cast<IrInstSrcCImport *>(inst), name);
369 case IrInstSrcIdCInclude:
370 return destroy(reinterpret_cast<IrInstSrcCInclude *>(inst), name);
371 case IrInstSrcIdCDefine:
372 return destroy(reinterpret_cast<IrInstSrcCDefine *>(inst), name);
373 case IrInstSrcIdCUndef:
374 return destroy(reinterpret_cast<IrInstSrcCUndef *>(inst), name);
375 case IrInstSrcIdEmbedFile:
376 return destroy(reinterpret_cast<IrInstSrcEmbedFile *>(inst), name);
377 case IrInstSrcIdCmpxchg:
378 return destroy(reinterpret_cast<IrInstSrcCmpxchg *>(inst), name);
379 case IrInstSrcIdFence:
380 return destroy(reinterpret_cast<IrInstSrcFence *>(inst), name);
381 case IrInstSrcIdTruncate:
382 return destroy(reinterpret_cast<IrInstSrcTruncate *>(inst), name);
383 case IrInstSrcIdIntCast:
384 return destroy(reinterpret_cast<IrInstSrcIntCast *>(inst), name);
385 case IrInstSrcIdFloatCast:
386 return destroy(reinterpret_cast<IrInstSrcFloatCast *>(inst), name);
387 case IrInstSrcIdErrSetCast:
388 return destroy(reinterpret_cast<IrInstSrcErrSetCast *>(inst), name);
389 case IrInstSrcIdFromBytes:
390 return destroy(reinterpret_cast<IrInstSrcFromBytes *>(inst), name);
391 case IrInstSrcIdToBytes:
392 return destroy(reinterpret_cast<IrInstSrcToBytes *>(inst), name);
393 case IrInstSrcIdIntToFloat:
394 return destroy(reinterpret_cast<IrInstSrcIntToFloat *>(inst), name);
395 case IrInstSrcIdFloatToInt:
396 return destroy(reinterpret_cast<IrInstSrcFloatToInt *>(inst), name);
397 case IrInstSrcIdBoolToInt:
398 return destroy(reinterpret_cast<IrInstSrcBoolToInt *>(inst), name);
399 case IrInstSrcIdIntType:
400 return destroy(reinterpret_cast<IrInstSrcIntType *>(inst), name);
401 case IrInstSrcIdVectorType:
402 return destroy(reinterpret_cast<IrInstSrcVectorType *>(inst), name);
403 case IrInstSrcIdShuffleVector:
404 return destroy(reinterpret_cast<IrInstSrcShuffleVector *>(inst), name);
405 case IrInstSrcIdSplat:
406 return destroy(reinterpret_cast<IrInstSrcSplat *>(inst), name);
407 case IrInstSrcIdBoolNot:
408 return destroy(reinterpret_cast<IrInstSrcBoolNot *>(inst), name);
409 case IrInstSrcIdMemset:
410 return destroy(reinterpret_cast<IrInstSrcMemset *>(inst), name);
411 case IrInstSrcIdMemcpy:
412 return destroy(reinterpret_cast<IrInstSrcMemcpy *>(inst), name);
413 case IrInstSrcIdSlice:
414 return destroy(reinterpret_cast<IrInstSrcSlice *>(inst), name);
415 case IrInstSrcIdMemberCount:
416 return destroy(reinterpret_cast<IrInstSrcMemberCount *>(inst), name);
417 case IrInstSrcIdMemberType:
418 return destroy(reinterpret_cast<IrInstSrcMemberType *>(inst), name);
419 case IrInstSrcIdMemberName:
420 return destroy(reinterpret_cast<IrInstSrcMemberName *>(inst), name);
421 case IrInstSrcIdBreakpoint:
422 return destroy(reinterpret_cast<IrInstSrcBreakpoint *>(inst), name);
423 case IrInstSrcIdReturnAddress:
424 return destroy(reinterpret_cast<IrInstSrcReturnAddress *>(inst), name);
425 case IrInstSrcIdFrameAddress:
426 return destroy(reinterpret_cast<IrInstSrcFrameAddress *>(inst), name);
427 case IrInstSrcIdFrameHandle:
428 return destroy(reinterpret_cast<IrInstSrcFrameHandle *>(inst), name);
429 case IrInstSrcIdFrameType:
430 return destroy(reinterpret_cast<IrInstSrcFrameType *>(inst), name);
431 case IrInstSrcIdFrameSize:
432 return destroy(reinterpret_cast<IrInstSrcFrameSize *>(inst), name);
433 case IrInstSrcIdAlignOf:
434 return destroy(reinterpret_cast<IrInstSrcAlignOf *>(inst), name);
435 case IrInstSrcIdOverflowOp:
436 return destroy(reinterpret_cast<IrInstSrcOverflowOp *>(inst), name);
437 case IrInstSrcIdTestErr:
438 return destroy(reinterpret_cast<IrInstSrcTestErr *>(inst), name);
439 case IrInstSrcIdUnwrapErrCode:
440 return destroy(reinterpret_cast<IrInstSrcUnwrapErrCode *>(inst), name);
441 case IrInstSrcIdUnwrapErrPayload:
442 return destroy(reinterpret_cast<IrInstSrcUnwrapErrPayload *>(inst), name);
443 case IrInstSrcIdFnProto:
444 return destroy(reinterpret_cast<IrInstSrcFnProto *>(inst), name);
445 case IrInstSrcIdTestComptime:
446 return destroy(reinterpret_cast<IrInstSrcTestComptime *>(inst), name);
447 case IrInstSrcIdPtrCast:
448 return destroy(reinterpret_cast<IrInstSrcPtrCast *>(inst), name);
449 case IrInstSrcIdBitCast:
450 return destroy(reinterpret_cast<IrInstSrcBitCast *>(inst), name);
451 case IrInstSrcIdPtrToInt:
452 return destroy(reinterpret_cast<IrInstSrcPtrToInt *>(inst), name);
453 case IrInstSrcIdIntToPtr:
454 return destroy(reinterpret_cast<IrInstSrcIntToPtr *>(inst), name);
455 case IrInstSrcIdIntToEnum:
456 return destroy(reinterpret_cast<IrInstSrcIntToEnum *>(inst), name);
457 case IrInstSrcIdIntToErr:
458 return destroy(reinterpret_cast<IrInstSrcIntToErr *>(inst), name);
459 case IrInstSrcIdErrToInt:
460 return destroy(reinterpret_cast<IrInstSrcErrToInt *>(inst), name);
461 case IrInstSrcIdCheckSwitchProngs:
462 return destroy(reinterpret_cast<IrInstSrcCheckSwitchProngs *>(inst), name);
463 case IrInstSrcIdCheckStatementIsVoid:
464 return destroy(reinterpret_cast<IrInstSrcCheckStatementIsVoid *>(inst), name);
465 case IrInstSrcIdTypeName:
466 return destroy(reinterpret_cast<IrInstSrcTypeName *>(inst), name);
467 case IrInstSrcIdTagName:
468 return destroy(reinterpret_cast<IrInstSrcTagName *>(inst), name);
469 case IrInstSrcIdPtrType:
470 return destroy(reinterpret_cast<IrInstSrcPtrType *>(inst), name);
471 case IrInstSrcIdDeclRef:
472 return destroy(reinterpret_cast<IrInstSrcDeclRef *>(inst), name);
473 case IrInstSrcIdPanic:
474 return destroy(reinterpret_cast<IrInstSrcPanic *>(inst), name);
475 case IrInstSrcIdFieldParentPtr:
476 return destroy(reinterpret_cast<IrInstSrcFieldParentPtr *>(inst), name);
477 case IrInstSrcIdByteOffsetOf:
478 return destroy(reinterpret_cast<IrInstSrcByteOffsetOf *>(inst), name);
479 case IrInstSrcIdBitOffsetOf:
480 return destroy(reinterpret_cast<IrInstSrcBitOffsetOf *>(inst), name);
481 case IrInstSrcIdTypeInfo:
482 return destroy(reinterpret_cast<IrInstSrcTypeInfo *>(inst), name);
483 case IrInstSrcIdType:
484 return destroy(reinterpret_cast<IrInstSrcType *>(inst), name);
485 case IrInstSrcIdHasField:
486 return destroy(reinterpret_cast<IrInstSrcHasField *>(inst), name);
487 case IrInstSrcIdTypeId:
488 return destroy(reinterpret_cast<IrInstSrcTypeId *>(inst), name);
489 case IrInstSrcIdSetEvalBranchQuota:
490 return destroy(reinterpret_cast<IrInstSrcSetEvalBranchQuota *>(inst), name);
491 case IrInstSrcIdAlignCast:
492 return destroy(reinterpret_cast<IrInstSrcAlignCast *>(inst), name);
493 case IrInstSrcIdImplicitCast:
494 return destroy(reinterpret_cast<IrInstSrcImplicitCast *>(inst), name);
495 case IrInstSrcIdResolveResult:
496 return destroy(reinterpret_cast<IrInstSrcResolveResult *>(inst), name);
497 case IrInstSrcIdResetResult:
498 return destroy(reinterpret_cast<IrInstSrcResetResult *>(inst), name);
499 case IrInstSrcIdOpaqueType:
500 return destroy(reinterpret_cast<IrInstSrcOpaqueType *>(inst), name);
501 case IrInstSrcIdSetAlignStack:
502 return destroy(reinterpret_cast<IrInstSrcSetAlignStack *>(inst), name);
503 case IrInstSrcIdArgType:
504 return destroy(reinterpret_cast<IrInstSrcArgType *>(inst), name);
505 case IrInstSrcIdTagType:
506 return destroy(reinterpret_cast<IrInstSrcTagType *>(inst), name);
507 case IrInstSrcIdExport:
508 return destroy(reinterpret_cast<IrInstSrcExport *>(inst), name);
509 case IrInstSrcIdErrorReturnTrace:
510 return destroy(reinterpret_cast<IrInstSrcErrorReturnTrace *>(inst), name);
511 case IrInstSrcIdErrorUnion:
512 return destroy(reinterpret_cast<IrInstSrcErrorUnion *>(inst), name);
513 case IrInstSrcIdAtomicRmw:
514 return destroy(reinterpret_cast<IrInstSrcAtomicRmw *>(inst), name);
515 case IrInstSrcIdSaveErrRetAddr:
516 return destroy(reinterpret_cast<IrInstSrcSaveErrRetAddr *>(inst), name);
517 case IrInstSrcIdAddImplicitReturnType:
518 return destroy(reinterpret_cast<IrInstSrcAddImplicitReturnType *>(inst), name);
519 case IrInstSrcIdFloatOp:
520 return destroy(reinterpret_cast<IrInstSrcFloatOp *>(inst), name);
521 case IrInstSrcIdMulAdd:
522 return destroy(reinterpret_cast<IrInstSrcMulAdd *>(inst), name);
523 case IrInstSrcIdAtomicLoad:
524 return destroy(reinterpret_cast<IrInstSrcAtomicLoad *>(inst), name);
525 case IrInstSrcIdAtomicStore:
526 return destroy(reinterpret_cast<IrInstSrcAtomicStore *>(inst), name);
527 case IrInstSrcIdEnumToInt:
528 return destroy(reinterpret_cast<IrInstSrcEnumToInt *>(inst), name);
529 case IrInstSrcIdCheckRuntimeScope:
530 return destroy(reinterpret_cast<IrInstSrcCheckRuntimeScope *>(inst), name);
531 case IrInstSrcIdHasDecl:
532 return destroy(reinterpret_cast<IrInstSrcHasDecl *>(inst), name);
533 case IrInstSrcIdUndeclaredIdent:
534 return destroy(reinterpret_cast<IrInstSrcUndeclaredIdent *>(inst), name);
535 case IrInstSrcIdAlloca:
536 return destroy(reinterpret_cast<IrInstSrcAlloca *>(inst), name);
537 case IrInstSrcIdEndExpr:
538 return destroy(reinterpret_cast<IrInstSrcEndExpr *>(inst), name);
539 case IrInstSrcIdUnionInitNamedField:
540 return destroy(reinterpret_cast<IrInstSrcUnionInitNamedField *>(inst), name);
541 case IrInstSrcIdSuspendBegin:
542 return destroy(reinterpret_cast<IrInstSrcSuspendBegin *>(inst), name);
543 case IrInstSrcIdSuspendFinish:
544 return destroy(reinterpret_cast<IrInstSrcSuspendFinish *>(inst), name);
545 case IrInstSrcIdResume:
546 return destroy(reinterpret_cast<IrInstSrcResume *>(inst), name);
547 case IrInstSrcIdAwait:
548 return destroy(reinterpret_cast<IrInstSrcAwait *>(inst), name);
549 case IrInstSrcIdSpillBegin:
550 return destroy(reinterpret_cast<IrInstSrcSpillBegin *>(inst), name);
551 case IrInstSrcIdSpillEnd:
552 return destroy(reinterpret_cast<IrInstSrcSpillEnd *>(inst), name);
553 case IrInstSrcIdCallArgs:
554 return destroy(reinterpret_cast<IrInstSrcCallArgs *>(inst), name);
555 }
556 zig_unreachable();
557}
263558
264static void destroy_instruction(IrInstruction *inst) {559void destroy_instruction_gen(IrInstGen *inst) {
265#ifdef ZIG_ENABLE_MEM_PROFILE560#ifdef ZIG_ENABLE_MEM_PROFILE
266 const char *name = ir_instruction_type_str(inst->id);561 const char *name = ir_inst_gen_type_str(inst->id);
267#else562#else
268 const char *name = nullptr;563 const char *name = nullptr;
269#endif564#endif
270 switch (inst->id) {565 switch (inst->id) {
271 case IrInstructionIdInvalid:566 case IrInstGenIdInvalid:
272 zig_unreachable();567 zig_unreachable();
273 case IrInstructionIdReturn:568 case IrInstGenIdReturn:
274 return destroy(reinterpret_cast<IrInstructionReturn *>(inst), name);569 return destroy(reinterpret_cast<IrInstGenReturn *>(inst), name);
275 case IrInstructionIdConst:570 case IrInstGenIdConst:
276 return destroy(reinterpret_cast<IrInstructionConst *>(inst), name);571 return destroy(reinterpret_cast<IrInstGenConst *>(inst), name);
277 case IrInstructionIdBinOp:572 case IrInstGenIdBinOp:
278 return destroy(reinterpret_cast<IrInstructionBinOp *>(inst), name);573 return destroy(reinterpret_cast<IrInstGenBinOp *>(inst), name);
279 case IrInstructionIdMergeErrSets:574 case IrInstGenIdCast:
280 return destroy(reinterpret_cast<IrInstructionMergeErrSets *>(inst), name);575 return destroy(reinterpret_cast<IrInstGenCast *>(inst), name);
281 case IrInstructionIdDeclVarSrc:576 case IrInstGenIdCall:
282 return destroy(reinterpret_cast<IrInstructionDeclVarSrc *>(inst), name);577 return destroy(reinterpret_cast<IrInstGenCall *>(inst), name);
283 case IrInstructionIdCast:578 case IrInstGenIdCondBr:
284 return destroy(reinterpret_cast<IrInstructionCast *>(inst), name);579 return destroy(reinterpret_cast<IrInstGenCondBr *>(inst), name);
285 case IrInstructionIdCallSrc:580 case IrInstGenIdBr:
286 return destroy(reinterpret_cast<IrInstructionCallSrc *>(inst), name);581 return destroy(reinterpret_cast<IrInstGenBr *>(inst), name);
287 case IrInstructionIdCallSrcArgs:582 case IrInstGenIdPhi:
288 return destroy(reinterpret_cast<IrInstructionCallSrcArgs *>(inst), name);583 return destroy(reinterpret_cast<IrInstGenPhi *>(inst), name);
289 case IrInstructionIdCallExtra:584 case IrInstGenIdUnreachable:
290 return destroy(reinterpret_cast<IrInstructionCallExtra *>(inst), name);585 return destroy(reinterpret_cast<IrInstGenUnreachable *>(inst), name);
291 case IrInstructionIdCallGen:586 case IrInstGenIdElemPtr:
292 return destroy(reinterpret_cast<IrInstructionCallGen *>(inst), name);587 return destroy(reinterpret_cast<IrInstGenElemPtr *>(inst), name);
293 case IrInstructionIdUnOp:588 case IrInstGenIdVarPtr:
294 return destroy(reinterpret_cast<IrInstructionUnOp *>(inst), name);589 return destroy(reinterpret_cast<IrInstGenVarPtr *>(inst), name);
295 case IrInstructionIdCondBr:590 case IrInstGenIdReturnPtr:
296 return destroy(reinterpret_cast<IrInstructionCondBr *>(inst), name);591 return destroy(reinterpret_cast<IrInstGenReturnPtr *>(inst), name);
297 case IrInstructionIdBr:592 case IrInstGenIdLoadPtr:
298 return destroy(reinterpret_cast<IrInstructionBr *>(inst), name);593 return destroy(reinterpret_cast<IrInstGenLoadPtr *>(inst), name);
299 case IrInstructionIdPhi:594 case IrInstGenIdStorePtr:
300 return destroy(reinterpret_cast<IrInstructionPhi *>(inst), name);595 return destroy(reinterpret_cast<IrInstGenStorePtr *>(inst), name);
301 case IrInstructionIdContainerInitList:596 case IrInstGenIdVectorStoreElem:
302 return destroy(reinterpret_cast<IrInstructionContainerInitList *>(inst), name);597 return destroy(reinterpret_cast<IrInstGenVectorStoreElem *>(inst), name);
303 case IrInstructionIdContainerInitFields:598 case IrInstGenIdStructFieldPtr:
304 return destroy(reinterpret_cast<IrInstructionContainerInitFields *>(inst), name);599 return destroy(reinterpret_cast<IrInstGenStructFieldPtr *>(inst), name);
305 case IrInstructionIdUnreachable:600 case IrInstGenIdUnionFieldPtr:
306 return destroy(reinterpret_cast<IrInstructionUnreachable *>(inst), name);601 return destroy(reinterpret_cast<IrInstGenUnionFieldPtr *>(inst), name);
307 case IrInstructionIdElemPtr:602 case IrInstGenIdAsm:
308 return destroy(reinterpret_cast<IrInstructionElemPtr *>(inst), name);603 return destroy(reinterpret_cast<IrInstGenAsm *>(inst), name);
309 case IrInstructionIdVarPtr:604 case IrInstGenIdTestNonNull:
310 return destroy(reinterpret_cast<IrInstructionVarPtr *>(inst), name);605 return destroy(reinterpret_cast<IrInstGenTestNonNull *>(inst), name);
311 case IrInstructionIdReturnPtr:606 case IrInstGenIdOptionalUnwrapPtr:
312 return destroy(reinterpret_cast<IrInstructionReturnPtr *>(inst), name);607 return destroy(reinterpret_cast<IrInstGenOptionalUnwrapPtr *>(inst), name);
313 case IrInstructionIdLoadPtr:608 case IrInstGenIdPopCount:
314 return destroy(reinterpret_cast<IrInstructionLoadPtr *>(inst), name);609 return destroy(reinterpret_cast<IrInstGenPopCount *>(inst), name);
315 case IrInstructionIdLoadPtrGen:610 case IrInstGenIdClz:
316 return destroy(reinterpret_cast<IrInstructionLoadPtrGen *>(inst), name);611 return destroy(reinterpret_cast<IrInstGenClz *>(inst), name);
317 case IrInstructionIdStorePtr:612 case IrInstGenIdCtz:
318 return destroy(reinterpret_cast<IrInstructionStorePtr *>(inst), name);613 return destroy(reinterpret_cast<IrInstGenCtz *>(inst), name);
319 case IrInstructionIdVectorStoreElem:614 case IrInstGenIdBswap:
320 return destroy(reinterpret_cast<IrInstructionVectorStoreElem *>(inst), name);615 return destroy(reinterpret_cast<IrInstGenBswap *>(inst), name);
321 case IrInstructionIdTypeOf:616 case IrInstGenIdBitReverse:
322 return destroy(reinterpret_cast<IrInstructionTypeOf *>(inst), name);617 return destroy(reinterpret_cast<IrInstGenBitReverse *>(inst), name);
323 case IrInstructionIdFieldPtr:618 case IrInstGenIdSwitchBr:
324 return destroy(reinterpret_cast<IrInstructionFieldPtr *>(inst), name);619 return destroy(reinterpret_cast<IrInstGenSwitchBr *>(inst), name);
325 case IrInstructionIdStructFieldPtr:620 case IrInstGenIdUnionTag:
326 return destroy(reinterpret_cast<IrInstructionStructFieldPtr *>(inst), name);621 return destroy(reinterpret_cast<IrInstGenUnionTag *>(inst), name);
327 case IrInstructionIdUnionFieldPtr:622 case IrInstGenIdRef:
328 return destroy(reinterpret_cast<IrInstructionUnionFieldPtr *>(inst), name);623 return destroy(reinterpret_cast<IrInstGenRef *>(inst), name);
329 case IrInstructionIdSetCold:624 case IrInstGenIdErrName:
330 return destroy(reinterpret_cast<IrInstructionSetCold *>(inst), name);625 return destroy(reinterpret_cast<IrInstGenErrName *>(inst), name);
331 case IrInstructionIdSetRuntimeSafety:626 case IrInstGenIdCmpxchg:
332 return destroy(reinterpret_cast<IrInstructionSetRuntimeSafety *>(inst), name);627 return destroy(reinterpret_cast<IrInstGenCmpxchg *>(inst), name);
333 case IrInstructionIdSetFloatMode:628 case IrInstGenIdFence:
334 return destroy(reinterpret_cast<IrInstructionSetFloatMode *>(inst), name);629 return destroy(reinterpret_cast<IrInstGenFence *>(inst), name);
335 case IrInstructionIdArrayType:630 case IrInstGenIdTruncate:
336 return destroy(reinterpret_cast<IrInstructionArrayType *>(inst), name);631 return destroy(reinterpret_cast<IrInstGenTruncate *>(inst), name);
337 case IrInstructionIdSliceType:632 case IrInstGenIdShuffleVector:
338 return destroy(reinterpret_cast<IrInstructionSliceType *>(inst), name);633 return destroy(reinterpret_cast<IrInstGenShuffleVector *>(inst), name);
339 case IrInstructionIdAnyFrameType:634 case IrInstGenIdSplat:
340 return destroy(reinterpret_cast<IrInstructionAnyFrameType *>(inst), name);635 return destroy(reinterpret_cast<IrInstGenSplat *>(inst), name);
341 case IrInstructionIdAsmSrc:636 case IrInstGenIdBoolNot:
342 return destroy(reinterpret_cast<IrInstructionAsmSrc *>(inst), name);637 return destroy(reinterpret_cast<IrInstGenBoolNot *>(inst), name);
343 case IrInstructionIdAsmGen:638 case IrInstGenIdMemset:
344 return destroy(reinterpret_cast<IrInstructionAsmGen *>(inst), name);639 return destroy(reinterpret_cast<IrInstGenMemset *>(inst), name);
345 case IrInstructionIdSizeOf:640 case IrInstGenIdMemcpy:
346 return destroy(reinterpret_cast<IrInstructionSizeOf *>(inst), name);641 return destroy(reinterpret_cast<IrInstGenMemcpy *>(inst), name);
347 case IrInstructionIdTestNonNull:642 case IrInstGenIdSlice:
348 return destroy(reinterpret_cast<IrInstructionTestNonNull *>(inst), name);643 return destroy(reinterpret_cast<IrInstGenSlice *>(inst), name);
349 case IrInstructionIdOptionalUnwrapPtr:644 case IrInstGenIdBreakpoint:
350 return destroy(reinterpret_cast<IrInstructionOptionalUnwrapPtr *>(inst), name);645 return destroy(reinterpret_cast<IrInstGenBreakpoint *>(inst), name);
351 case IrInstructionIdPopCount:646 case IrInstGenIdReturnAddress:
352 return destroy(reinterpret_cast<IrInstructionPopCount *>(inst), name);647 return destroy(reinterpret_cast<IrInstGenReturnAddress *>(inst), name);
353 case IrInstructionIdClz:648 case IrInstGenIdFrameAddress:
354 return destroy(reinterpret_cast<IrInstructionClz *>(inst), name);649 return destroy(reinterpret_cast<IrInstGenFrameAddress *>(inst), name);
355 case IrInstructionIdCtz:650 case IrInstGenIdFrameHandle:
356 return destroy(reinterpret_cast<IrInstructionCtz *>(inst), name);651 return destroy(reinterpret_cast<IrInstGenFrameHandle *>(inst), name);
357 case IrInstructionIdBswap:652 case IrInstGenIdFrameSize:
358 return destroy(reinterpret_cast<IrInstructionBswap *>(inst), name);653 return destroy(reinterpret_cast<IrInstGenFrameSize *>(inst), name);
359 case IrInstructionIdBitReverse:654 case IrInstGenIdOverflowOp:
360 return destroy(reinterpret_cast<IrInstructionBitReverse *>(inst), name);655 return destroy(reinterpret_cast<IrInstGenOverflowOp *>(inst), name);
361 case IrInstructionIdSwitchBr:656 case IrInstGenIdTestErr:
362 return destroy(reinterpret_cast<IrInstructionSwitchBr *>(inst), name);657 return destroy(reinterpret_cast<IrInstGenTestErr *>(inst), name);
363 case IrInstructionIdSwitchVar:658 case IrInstGenIdUnwrapErrCode:
364 return destroy(reinterpret_cast<IrInstructionSwitchVar *>(inst), name);659 return destroy(reinterpret_cast<IrInstGenUnwrapErrCode *>(inst), name);
365 case IrInstructionIdSwitchElseVar:660 case IrInstGenIdUnwrapErrPayload:
366 return destroy(reinterpret_cast<IrInstructionSwitchElseVar *>(inst), name);661 return destroy(reinterpret_cast<IrInstGenUnwrapErrPayload *>(inst), name);
367 case IrInstructionIdSwitchTarget:662 case IrInstGenIdOptionalWrap:
368 return destroy(reinterpret_cast<IrInstructionSwitchTarget *>(inst), name);663 return destroy(reinterpret_cast<IrInstGenOptionalWrap *>(inst), name);
369 case IrInstructionIdUnionTag:664 case IrInstGenIdErrWrapCode:
370 return destroy(reinterpret_cast<IrInstructionUnionTag *>(inst), name);665 return destroy(reinterpret_cast<IrInstGenErrWrapCode *>(inst), name);
371 case IrInstructionIdImport:666 case IrInstGenIdErrWrapPayload:
372 return destroy(reinterpret_cast<IrInstructionImport *>(inst), name);667 return destroy(reinterpret_cast<IrInstGenErrWrapPayload *>(inst), name);
373 case IrInstructionIdRef:668 case IrInstGenIdPtrCast:
374 return destroy(reinterpret_cast<IrInstructionRef *>(inst), name);669 return destroy(reinterpret_cast<IrInstGenPtrCast *>(inst), name);
375 case IrInstructionIdRefGen:670 case IrInstGenIdBitCast:
376 return destroy(reinterpret_cast<IrInstructionRefGen *>(inst), name);671 return destroy(reinterpret_cast<IrInstGenBitCast *>(inst), name);
377 case IrInstructionIdCompileErr:672 case IrInstGenIdWidenOrShorten:
378 return destroy(reinterpret_cast<IrInstructionCompileErr *>(inst), name);673 return destroy(reinterpret_cast<IrInstGenWidenOrShorten *>(inst), name);
379 case IrInstructionIdCompileLog:674 case IrInstGenIdPtrToInt:
380 return destroy(reinterpret_cast<IrInstructionCompileLog *>(inst), name);675 return destroy(reinterpret_cast<IrInstGenPtrToInt *>(inst), name);
381 case IrInstructionIdErrName:676 case IrInstGenIdIntToPtr:
382 return destroy(reinterpret_cast<IrInstructionErrName *>(inst), name);677 return destroy(reinterpret_cast<IrInstGenIntToPtr *>(inst), name);
383 case IrInstructionIdCImport:678 case IrInstGenIdIntToEnum:
384 return destroy(reinterpret_cast<IrInstructionCImport *>(inst), name);679 return destroy(reinterpret_cast<IrInstGenIntToEnum *>(inst), name);
385 case IrInstructionIdCInclude:680 case IrInstGenIdIntToErr:
386 return destroy(reinterpret_cast<IrInstructionCInclude *>(inst), name);681 return destroy(reinterpret_cast<IrInstGenIntToErr *>(inst), name);
387 case IrInstructionIdCDefine:682 case IrInstGenIdErrToInt:
388 return destroy(reinterpret_cast<IrInstructionCDefine *>(inst), name);683 return destroy(reinterpret_cast<IrInstGenErrToInt *>(inst), name);
389 case IrInstructionIdCUndef:684 case IrInstGenIdTagName:
390 return destroy(reinterpret_cast<IrInstructionCUndef *>(inst), name);685 return destroy(reinterpret_cast<IrInstGenTagName *>(inst), name);
391 case IrInstructionIdEmbedFile:686 case IrInstGenIdPanic:
392 return destroy(reinterpret_cast<IrInstructionEmbedFile *>(inst), name);687 return destroy(reinterpret_cast<IrInstGenPanic *>(inst), name);
393 case IrInstructionIdCmpxchgSrc:688 case IrInstGenIdFieldParentPtr:
394 return destroy(reinterpret_cast<IrInstructionCmpxchgSrc *>(inst), name);689 return destroy(reinterpret_cast<IrInstGenFieldParentPtr *>(inst), name);
395 case IrInstructionIdCmpxchgGen:690 case IrInstGenIdAlignCast:
396 return destroy(reinterpret_cast<IrInstructionCmpxchgGen *>(inst), name);691 return destroy(reinterpret_cast<IrInstGenAlignCast *>(inst), name);
397 case IrInstructionIdFence:692 case IrInstGenIdErrorReturnTrace:
398 return destroy(reinterpret_cast<IrInstructionFence *>(inst), name);693 return destroy(reinterpret_cast<IrInstGenErrorReturnTrace *>(inst), name);
399 case IrInstructionIdTruncate:694 case IrInstGenIdAtomicRmw:
400 return destroy(reinterpret_cast<IrInstructionTruncate *>(inst), name);695 return destroy(reinterpret_cast<IrInstGenAtomicRmw *>(inst), name);
401 case IrInstructionIdIntCast:696 case IrInstGenIdSaveErrRetAddr:
402 return destroy(reinterpret_cast<IrInstructionIntCast *>(inst), name);697 return destroy(reinterpret_cast<IrInstGenSaveErrRetAddr *>(inst), name);
403 case IrInstructionIdFloatCast:698 case IrInstGenIdFloatOp:
404 return destroy(reinterpret_cast<IrInstructionFloatCast *>(inst), name);699 return destroy(reinterpret_cast<IrInstGenFloatOp *>(inst), name);
405 case IrInstructionIdErrSetCast:700 case IrInstGenIdMulAdd:
406 return destroy(reinterpret_cast<IrInstructionErrSetCast *>(inst), name);701 return destroy(reinterpret_cast<IrInstGenMulAdd *>(inst), name);
407 case IrInstructionIdFromBytes:702 case IrInstGenIdAtomicLoad:
408 return destroy(reinterpret_cast<IrInstructionFromBytes *>(inst), name);703 return destroy(reinterpret_cast<IrInstGenAtomicLoad *>(inst), name);
409 case IrInstructionIdToBytes:704 case IrInstGenIdAtomicStore:
410 return destroy(reinterpret_cast<IrInstructionToBytes *>(inst), name);705 return destroy(reinterpret_cast<IrInstGenAtomicStore *>(inst), name);
411 case IrInstructionIdIntToFloat:706 case IrInstGenIdDeclVar:
412 return destroy(reinterpret_cast<IrInstructionIntToFloat *>(inst), name);707 return destroy(reinterpret_cast<IrInstGenDeclVar *>(inst), name);
413 case IrInstructionIdFloatToInt:708 case IrInstGenIdArrayToVector:
414 return destroy(reinterpret_cast<IrInstructionFloatToInt *>(inst), name);709 return destroy(reinterpret_cast<IrInstGenArrayToVector *>(inst), name);
415 case IrInstructionIdBoolToInt:710 case IrInstGenIdVectorToArray:
416 return destroy(reinterpret_cast<IrInstructionBoolToInt *>(inst), name);711 return destroy(reinterpret_cast<IrInstGenVectorToArray *>(inst), name);
417 case IrInstructionIdIntType:712 case IrInstGenIdPtrOfArrayToSlice:
418 return destroy(reinterpret_cast<IrInstructionIntType *>(inst), name);713 return destroy(reinterpret_cast<IrInstGenPtrOfArrayToSlice *>(inst), name);
419 case IrInstructionIdVectorType:714 case IrInstGenIdAssertZero:
420 return destroy(reinterpret_cast<IrInstructionVectorType *>(inst), name);715 return destroy(reinterpret_cast<IrInstGenAssertZero *>(inst), name);
421 case IrInstructionIdShuffleVector:716 case IrInstGenIdAssertNonNull:
422 return destroy(reinterpret_cast<IrInstructionShuffleVector *>(inst), name);717 return destroy(reinterpret_cast<IrInstGenAssertNonNull *>(inst), name);
423 case IrInstructionIdSplatSrc:718 case IrInstGenIdResizeSlice:
424 return destroy(reinterpret_cast<IrInstructionSplatSrc *>(inst), name);719 return destroy(reinterpret_cast<IrInstGenResizeSlice *>(inst), name);
425 case IrInstructionIdSplatGen:720 case IrInstGenIdAlloca:
426 return destroy(reinterpret_cast<IrInstructionSplatGen *>(inst), name);721 return destroy(reinterpret_cast<IrInstGenAlloca *>(inst), name);
427 case IrInstructionIdBoolNot:722 case IrInstGenIdSuspendBegin:
428 return destroy(reinterpret_cast<IrInstructionBoolNot *>(inst), name);723 return destroy(reinterpret_cast<IrInstGenSuspendBegin *>(inst), name);
429 case IrInstructionIdMemset:724 case IrInstGenIdSuspendFinish:
430 return destroy(reinterpret_cast<IrInstructionMemset *>(inst), name);725 return destroy(reinterpret_cast<IrInstGenSuspendFinish *>(inst), name);
431 case IrInstructionIdMemcpy:726 case IrInstGenIdResume:
432 return destroy(reinterpret_cast<IrInstructionMemcpy *>(inst), name);727 return destroy(reinterpret_cast<IrInstGenResume *>(inst), name);
433 case IrInstructionIdSliceSrc:728 case IrInstGenIdAwait:
434 return destroy(reinterpret_cast<IrInstructionSliceSrc *>(inst), name);729 return destroy(reinterpret_cast<IrInstGenAwait *>(inst), name);
435 case IrInstructionIdSliceGen:730 case IrInstGenIdSpillBegin:
436 return destroy(reinterpret_cast<IrInstructionSliceGen *>(inst), name);731 return destroy(reinterpret_cast<IrInstGenSpillBegin *>(inst), name);
437 case IrInstructionIdMemberCount:732 case IrInstGenIdSpillEnd:
438 return destroy(reinterpret_cast<IrInstructionMemberCount *>(inst), name);733 return destroy(reinterpret_cast<IrInstGenSpillEnd *>(inst), name);
439 case IrInstructionIdMemberType:734 case IrInstGenIdVectorExtractElem:
440 return destroy(reinterpret_cast<IrInstructionMemberType *>(inst), name);735 return destroy(reinterpret_cast<IrInstGenVectorExtractElem *>(inst), name);
441 case IrInstructionIdMemberName:736 case IrInstGenIdBinaryNot:
442 return destroy(reinterpret_cast<IrInstructionMemberName *>(inst), name);737 return destroy(reinterpret_cast<IrInstGenBinaryNot *>(inst), name);
443 case IrInstructionIdBreakpoint:738 case IrInstGenIdNegation:
444 return destroy(reinterpret_cast<IrInstructionBreakpoint *>(inst), name);739 return destroy(reinterpret_cast<IrInstGenNegation *>(inst), name);
445 case IrInstructionIdReturnAddress:740 case IrInstGenIdNegationWrapping:
446 return destroy(reinterpret_cast<IrInstructionReturnAddress *>(inst), name);741 return destroy(reinterpret_cast<IrInstGenNegationWrapping *>(inst), name);
447 case IrInstructionIdFrameAddress:
448 return destroy(reinterpret_cast<IrInstructionFrameAddress *>(inst), name);
449 case IrInstructionIdFrameHandle:
450 return destroy(reinterpret_cast<IrInstructionFrameHandle *>(inst), name);
451 case IrInstructionIdFrameType:
452 return destroy(reinterpret_cast<IrInstructionFrameType *>(inst), name);
453 case IrInstructionIdFrameSizeSrc:
454 return destroy(reinterpret_cast<IrInstructionFrameSizeSrc *>(inst), name);
455 case IrInstructionIdFrameSizeGen:
456 return destroy(reinterpret_cast<IrInstructionFrameSizeGen *>(inst), name);
457 case IrInstructionIdAlignOf:
458 return destroy(reinterpret_cast<IrInstructionAlignOf *>(inst), name);
459 case IrInstructionIdOverflowOp:
460 return destroy(reinterpret_cast<IrInstructionOverflowOp *>(inst), name);
461 case IrInstructionIdTestErrSrc:
462 return destroy(reinterpret_cast<IrInstructionTestErrSrc *>(inst), name);
463 case IrInstructionIdTestErrGen:
464 return destroy(reinterpret_cast<IrInstructionTestErrGen *>(inst), name);
465 case IrInstructionIdUnwrapErrCode:
466 return destroy(reinterpret_cast<IrInstructionUnwrapErrCode *>(inst), name);
467 case IrInstructionIdUnwrapErrPayload:
468 return destroy(reinterpret_cast<IrInstructionUnwrapErrPayload *>(inst), name);
469 case IrInstructionIdOptionalWrap:
470 return destroy(reinterpret_cast<IrInstructionOptionalWrap *>(inst), name);
471 case IrInstructionIdErrWrapCode:
472 return destroy(reinterpret_cast<IrInstructionErrWrapCode *>(inst), name);
473 case IrInstructionIdErrWrapPayload:
474 return destroy(reinterpret_cast<IrInstructionErrWrapPayload *>(inst), name);
475 case IrInstructionIdFnProto:
476 return destroy(reinterpret_cast<IrInstructionFnProto *>(inst), name);
477 case IrInstructionIdTestComptime:
478 return destroy(reinterpret_cast<IrInstructionTestComptime *>(inst), name);
479 case IrInstructionIdPtrCastSrc:
480 return destroy(reinterpret_cast<IrInstructionPtrCastSrc *>(inst), name);
481 case IrInstructionIdPtrCastGen:
482 return destroy(reinterpret_cast<IrInstructionPtrCastGen *>(inst), name);
483 case IrInstructionIdBitCastSrc:
484 return destroy(reinterpret_cast<IrInstructionBitCastSrc *>(inst), name);
485 case IrInstructionIdBitCastGen:
486 return destroy(reinterpret_cast<IrInstructionBitCastGen *>(inst), name);
487 case IrInstructionIdWidenOrShorten:
488 return destroy(reinterpret_cast<IrInstructionWidenOrShorten *>(inst), name);
489 case IrInstructionIdPtrToInt:
490 return destroy(reinterpret_cast<IrInstructionPtrToInt *>(inst), name);
491 case IrInstructionIdIntToPtr:
492 return destroy(reinterpret_cast<IrInstructionIntToPtr *>(inst), name);
493 case IrInstructionIdIntToEnum:
494 return destroy(reinterpret_cast<IrInstructionIntToEnum *>(inst), name);
495 case IrInstructionIdIntToErr:
496 return destroy(reinterpret_cast<IrInstructionIntToErr *>(inst), name);
497 case IrInstructionIdErrToInt:
498 return destroy(reinterpret_cast<IrInstructionErrToInt *>(inst), name);
499 case IrInstructionIdCheckSwitchProngs:
500 return destroy(reinterpret_cast<IrInstructionCheckSwitchProngs *>(inst), name);
501 case IrInstructionIdCheckStatementIsVoid:
502 return destroy(reinterpret_cast<IrInstructionCheckStatementIsVoid *>(inst), name);
503 case IrInstructionIdTypeName:
504 return destroy(reinterpret_cast<IrInstructionTypeName *>(inst), name);
505 case IrInstructionIdTagName:
506 return destroy(reinterpret_cast<IrInstructionTagName *>(inst), name);
507 case IrInstructionIdPtrType:
508 return destroy(reinterpret_cast<IrInstructionPtrType *>(inst), name);
509 case IrInstructionIdDeclRef:
510 return destroy(reinterpret_cast<IrInstructionDeclRef *>(inst), name);
511 case IrInstructionIdPanic:
512 return destroy(reinterpret_cast<IrInstructionPanic *>(inst), name);
513 case IrInstructionIdFieldParentPtr:
514 return destroy(reinterpret_cast<IrInstructionFieldParentPtr *>(inst), name);
515 case IrInstructionIdByteOffsetOf:
516 return destroy(reinterpret_cast<IrInstructionByteOffsetOf *>(inst), name);
517 case IrInstructionIdBitOffsetOf:
518 return destroy(reinterpret_cast<IrInstructionBitOffsetOf *>(inst), name);
519 case IrInstructionIdTypeInfo:
520 return destroy(reinterpret_cast<IrInstructionTypeInfo *>(inst), name);
521 case IrInstructionIdType:
522 return destroy(reinterpret_cast<IrInstructionType *>(inst), name);
523 case IrInstructionIdHasField:
524 return destroy(reinterpret_cast<IrInstructionHasField *>(inst), name);
525 case IrInstructionIdTypeId:
526 return destroy(reinterpret_cast<IrInstructionTypeId *>(inst), name);
527 case IrInstructionIdSetEvalBranchQuota:
528 return destroy(reinterpret_cast<IrInstructionSetEvalBranchQuota *>(inst), name);
529 case IrInstructionIdAlignCast:
530 return destroy(reinterpret_cast<IrInstructionAlignCast *>(inst), name);
531 case IrInstructionIdImplicitCast:
532 return destroy(reinterpret_cast<IrInstructionImplicitCast *>(inst), name);
533 case IrInstructionIdResolveResult:
534 return destroy(reinterpret_cast<IrInstructionResolveResult *>(inst), name);
535 case IrInstructionIdResetResult:
536 return destroy(reinterpret_cast<IrInstructionResetResult *>(inst), name);
537 case IrInstructionIdOpaqueType:
538 return destroy(reinterpret_cast<IrInstructionOpaqueType *>(inst), name);
539 case IrInstructionIdSetAlignStack:
540 return destroy(reinterpret_cast<IrInstructionSetAlignStack *>(inst), name);
541 case IrInstructionIdArgType:
542 return destroy(reinterpret_cast<IrInstructionArgType *>(inst), name);
543 case IrInstructionIdTagType:
544 return destroy(reinterpret_cast<IrInstructionTagType *>(inst), name);
545 case IrInstructionIdExport:
546 return destroy(reinterpret_cast<IrInstructionExport *>(inst), name);
547 case IrInstructionIdErrorReturnTrace:
548 return destroy(reinterpret_cast<IrInstructionErrorReturnTrace *>(inst), name);
549 case IrInstructionIdErrorUnion:
550 return destroy(reinterpret_cast<IrInstructionErrorUnion *>(inst), name);
551 case IrInstructionIdAtomicRmw:
552 return destroy(reinterpret_cast<IrInstructionAtomicRmw *>(inst), name);
553 case IrInstructionIdSaveErrRetAddr:
554 return destroy(reinterpret_cast<IrInstructionSaveErrRetAddr *>(inst), name);
555 case IrInstructionIdAddImplicitReturnType:
556 return destroy(reinterpret_cast<IrInstructionAddImplicitReturnType *>(inst), name);
557 case IrInstructionIdFloatOp:
558 return destroy(reinterpret_cast<IrInstructionFloatOp *>(inst), name);
559 case IrInstructionIdMulAdd:
560 return destroy(reinterpret_cast<IrInstructionMulAdd *>(inst), name);
561 case IrInstructionIdAtomicLoad:
562 return destroy(reinterpret_cast<IrInstructionAtomicLoad *>(inst), name);
563 case IrInstructionIdAtomicStore:
564 return destroy(reinterpret_cast<IrInstructionAtomicStore *>(inst), name);
565 case IrInstructionIdEnumToInt:
566 return destroy(reinterpret_cast<IrInstructionEnumToInt *>(inst), name);
567 case IrInstructionIdCheckRuntimeScope:
568 return destroy(reinterpret_cast<IrInstructionCheckRuntimeScope *>(inst), name);
569 case IrInstructionIdDeclVarGen:
570 return destroy(reinterpret_cast<IrInstructionDeclVarGen *>(inst), name);
571 case IrInstructionIdArrayToVector:
572 return destroy(reinterpret_cast<IrInstructionArrayToVector *>(inst), name);
573 case IrInstructionIdVectorToArray:
574 return destroy(reinterpret_cast<IrInstructionVectorToArray *>(inst), name);
575 case IrInstructionIdPtrOfArrayToSlice:
576 return destroy(reinterpret_cast<IrInstructionPtrOfArrayToSlice *>(inst), name);
577 case IrInstructionIdAssertZero:
578 return destroy(reinterpret_cast<IrInstructionAssertZero *>(inst), name);
579 case IrInstructionIdAssertNonNull:
580 return destroy(reinterpret_cast<IrInstructionAssertNonNull *>(inst), name);
581 case IrInstructionIdResizeSlice:
582 return destroy(reinterpret_cast<IrInstructionResizeSlice *>(inst), name);
583 case IrInstructionIdHasDecl:
584 return destroy(reinterpret_cast<IrInstructionHasDecl *>(inst), name);
585 case IrInstructionIdUndeclaredIdent:
586 return destroy(reinterpret_cast<IrInstructionUndeclaredIdent *>(inst), name);
587 case IrInstructionIdAllocaSrc:
588 return destroy(reinterpret_cast<IrInstructionAllocaSrc *>(inst), name);
589 case IrInstructionIdAllocaGen:
590 return destroy(reinterpret_cast<IrInstructionAllocaGen *>(inst), name);
591 case IrInstructionIdEndExpr:
592 return destroy(reinterpret_cast<IrInstructionEndExpr *>(inst), name);
593 case IrInstructionIdUnionInitNamedField:
594 return destroy(reinterpret_cast<IrInstructionUnionInitNamedField *>(inst), name);
595 case IrInstructionIdSuspendBegin:
596 return destroy(reinterpret_cast<IrInstructionSuspendBegin *>(inst), name);
597 case IrInstructionIdSuspendFinish:
598 return destroy(reinterpret_cast<IrInstructionSuspendFinish *>(inst), name);
599 case IrInstructionIdResume:
600 return destroy(reinterpret_cast<IrInstructionResume *>(inst), name);
601 case IrInstructionIdAwaitSrc:
602 return destroy(reinterpret_cast<IrInstructionAwaitSrc *>(inst), name);
603 case IrInstructionIdAwaitGen:
604 return destroy(reinterpret_cast<IrInstructionAwaitGen *>(inst), name);
605 case IrInstructionIdSpillBegin:
606 return destroy(reinterpret_cast<IrInstructionSpillBegin *>(inst), name);
607 case IrInstructionIdSpillEnd:
608 return destroy(reinterpret_cast<IrInstructionSpillEnd *>(inst), name);
609 case IrInstructionIdVectorExtractElem:
610 return destroy(reinterpret_cast<IrInstructionVectorExtractElem *>(inst), name);
611 }742 }
612 zig_unreachable();743 zig_unreachable();
613}744}
...@@ -623,17 +754,17 @@ static void ira_deref(IrAnalyze *ira) {...@@ -623,17 +754,17 @@ static void ira_deref(IrAnalyze *ira) {
623 assert(ira->ref_count != 0);754 assert(ira->ref_count != 0);
624755
625 for (size_t bb_i = 0; bb_i < ira->old_irb.exec->basic_block_list.length; bb_i += 1) {756 for (size_t bb_i = 0; bb_i < ira->old_irb.exec->basic_block_list.length; bb_i += 1) {
626 IrBasicBlock *pass1_bb = ira->old_irb.exec->basic_block_list.items[bb_i];757 IrBasicBlockSrc *pass1_bb = ira->old_irb.exec->basic_block_list.items[bb_i];
627 for (size_t inst_i = 0; inst_i < pass1_bb->instruction_list.length; inst_i += 1) {758 for (size_t inst_i = 0; inst_i < pass1_bb->instruction_list.length; inst_i += 1) {
628 IrInstruction *pass1_inst = pass1_bb->instruction_list.items[inst_i];759 IrInstSrc *pass1_inst = pass1_bb->instruction_list.items[inst_i];
629 destroy_instruction(pass1_inst);760 destroy_instruction_src(pass1_inst);
630 }761 }
631 destroy(pass1_bb, "IrBasicBlock");762 destroy(pass1_bb, "IrBasicBlockSrc");
632 }763 }
633 ira->old_irb.exec->basic_block_list.deinit();764 ira->old_irb.exec->basic_block_list.deinit();
634 ira->old_irb.exec->tld_list.deinit();765 ira->old_irb.exec->tld_list.deinit();
635 // cannot destroy here because of var->owner_exec766 // cannot destroy here because of var->owner_exec
636 //destroy(ira->old_irb.exec, "IrExecutablePass1");767 //destroy(ira->old_irb.exec, "IrExecutableSrc");
637 ira->src_implicit_return_type_list.deinit();768 ira->src_implicit_return_type_list.deinit();
638 ira->resume_stack.deinit();769 ira->resume_stack.deinit();
639 destroy(ira, "IrAnalyze");770 destroy(ira, "IrAnalyze");
...@@ -780,7 +911,7 @@ static bool types_have_same_zig_comptime_repr(CodeGen *codegen, ZigType *expecte...@@ -780,7 +911,7 @@ static bool types_have_same_zig_comptime_repr(CodeGen *codegen, ZigType *expecte
780 zig_unreachable();911 zig_unreachable();
781}912}
782913
783static bool ir_should_inline(IrExecutable *exec, Scope *scope) {914static bool ir_should_inline(IrExecutableSrc *exec, Scope *scope) {
784 if (exec->is_inline)915 if (exec->is_inline)
785 return true;916 return true;
786917
...@@ -796,23 +927,35 @@ static bool ir_should_inline(IrExecutable *exec, Scope *scope) {...@@ -796,23 +927,35 @@ static bool ir_should_inline(IrExecutable *exec, Scope *scope) {
796 return false;927 return false;
797}928}
798929
799static void ir_instruction_append(IrBasicBlock *basic_block, IrInstruction *instruction) {930static void ir_instruction_append(IrBasicBlockSrc *basic_block, IrInstSrc *instruction) {
931 assert(basic_block);
932 assert(instruction);
933 basic_block->instruction_list.append(instruction);
934}
935
936static void ir_inst_gen_append(IrBasicBlockGen *basic_block, IrInstGen *instruction) {
800 assert(basic_block);937 assert(basic_block);
801 assert(instruction);938 assert(instruction);
802 basic_block->instruction_list.append(instruction);939 basic_block->instruction_list.append(instruction);
803}940}
804941
805static size_t exec_next_debug_id(IrExecutable *exec) {942static size_t exec_next_debug_id(IrExecutableSrc *exec) {
943 size_t result = exec->next_debug_id;
944 exec->next_debug_id += 1;
945 return result;
946}
947
948static size_t exec_next_debug_id_gen(IrExecutableGen *exec) {
806 size_t result = exec->next_debug_id;949 size_t result = exec->next_debug_id;
807 exec->next_debug_id += 1;950 exec->next_debug_id += 1;
808 return result;951 return result;
809}952}
810953
811static ZigFn *exec_fn_entry(IrExecutable *exec) {954static ZigFn *exec_fn_entry(IrExecutableSrc *exec) {
812 return exec->fn_entry;955 return exec->fn_entry;
813}956}
814957
815static Buf *exec_c_import_buf(IrExecutable *exec) {958static Buf *exec_c_import_buf(IrExecutableSrc *exec) {
816 return exec->c_import_buf;959 return exec->c_import_buf;
817}960}
818961
...@@ -820,28 +963,42 @@ static bool value_is_comptime(ZigValue *const_val) {...@@ -820,28 +963,42 @@ static bool value_is_comptime(ZigValue *const_val) {
820 return const_val->special != ConstValSpecialRuntime;963 return const_val->special != ConstValSpecialRuntime;
821}964}
822965
823static bool instr_is_comptime(IrInstruction *instruction) {966static bool instr_is_comptime(IrInstGen *instruction) {
824 return value_is_comptime(instruction->value);967 return value_is_comptime(instruction->value);
825}968}
826969
827static bool instr_is_unreachable(IrInstruction *instruction) {970static bool instr_is_unreachable(IrInstSrc *instruction) {
828 return instruction->value->type && instruction->value->type->id == ZigTypeIdUnreachable;971 return instruction->is_noreturn;
829}972}
830973
831static void ir_link_new_bb(IrBasicBlock *new_bb, IrBasicBlock *old_bb) {974static void ir_link_new_bb(IrBasicBlockGen *new_bb, IrBasicBlockSrc *old_bb) {
832 new_bb->other = old_bb;975 new_bb->parent = old_bb;
833 old_bb->other = new_bb;976 old_bb->child = new_bb;
834}977}
835978
836static void ir_ref_bb(IrBasicBlock *bb) {979static void ir_ref_bb(IrBasicBlockSrc *bb) {
837 bb->ref_count += 1;980 bb->ref_count += 1;
838}981}
839982
840static void ir_ref_instruction(IrInstruction *instruction, IrBasicBlock *cur_bb) {983static void ir_ref_bb_gen(IrBasicBlockGen *bb) {
841 assert(instruction->id != IrInstructionIdInvalid);984 bb->ref_count += 1;
842 instruction->ref_count += 1;985}
843 if (instruction->owner_bb != cur_bb && !instr_is_comptime(instruction))986
987static void ir_ref_instruction(IrInstSrc *instruction, IrBasicBlockSrc *cur_bb) {
988 assert(instruction->id != IrInstSrcIdInvalid);
989 instruction->base.ref_count += 1;
990 if (instruction->owner_bb != cur_bb && !instr_is_unreachable(instruction)
991 && instruction->id != IrInstSrcIdConst)
992 {
844 ir_ref_bb(instruction->owner_bb);993 ir_ref_bb(instruction->owner_bb);
994 }
995}
996
997static void ir_ref_inst_gen(IrInstGen *instruction, IrBasicBlockGen *cur_bb) {
998 assert(instruction->id != IrInstGenIdInvalid);
999 instruction->base.ref_count += 1;
1000 if (instruction->owner_bb != cur_bb && !instr_is_comptime(instruction))
1001 ir_ref_bb_gen(instruction->owner_bb);
845}1002}
8461003
847static void ir_ref_var(ZigVar *var) {1004static void ir_ref_var(ZigVar *var) {
...@@ -890,962 +1047,1259 @@ ZigType *ir_analyze_type_expr(IrAnalyze *ira, Scope *scope, AstNode *node) {...@@ -890,962 +1047,1259 @@ ZigType *ir_analyze_type_expr(IrAnalyze *ira, Scope *scope, AstNode *node) {
890 return res_type;1047 return res_type;
891}1048}
8921049
893static IrBasicBlock *ir_create_basic_block(IrBuilder *irb, Scope *scope, const char *name_hint) {1050static IrBasicBlockSrc *ir_create_basic_block(IrBuilderSrc *irb, Scope *scope, const char *name_hint) {
894 IrBasicBlock *result = allocate<IrBasicBlock>(1, "IrBasicBlock");1051 IrBasicBlockSrc *result = allocate<IrBasicBlockSrc>(1, "IrBasicBlockSrc");
895 result->scope = scope;1052 result->scope = scope;
896 result->name_hint = name_hint;1053 result->name_hint = name_hint;
897 result->debug_id = exec_next_debug_id(irb->exec);1054 result->debug_id = exec_next_debug_id(irb->exec);
898 result->index = SIZE_MAX; // set later1055 result->index = UINT32_MAX; // set later
899 return result;1056 return result;
900}1057}
9011058
902static IrBasicBlock *ir_build_bb_from(IrBuilder *irb, IrBasicBlock *other_bb) {1059static IrBasicBlockGen *ir_create_basic_block_gen(IrAnalyze *ira, Scope *scope, const char *name_hint) {
903 IrBasicBlock *new_bb = ir_create_basic_block(irb, other_bb->scope, other_bb->name_hint);1060 IrBasicBlockGen *result = allocate<IrBasicBlockGen>(1, "IrBasicBlockGen");
1061 result->scope = scope;
1062 result->name_hint = name_hint;
1063 result->debug_id = exec_next_debug_id_gen(ira->new_irb.exec);
1064 result->index = UINT32_MAX; // set later
1065 return result;
1066}
1067
1068static IrBasicBlockGen *ir_build_bb_from(IrAnalyze *ira, IrBasicBlockSrc *other_bb) {
1069 IrBasicBlockGen *new_bb = ir_create_basic_block_gen(ira, other_bb->scope, other_bb->name_hint);
904 ir_link_new_bb(new_bb, other_bb);1070 ir_link_new_bb(new_bb, other_bb);
905 return new_bb;1071 return new_bb;
906}1072}
9071073
908static constexpr IrInstructionId ir_instruction_id(IrInstructionDeclVarSrc *) {1074static constexpr IrInstSrcId ir_inst_id(IrInstSrcDeclVar *) {
909 return IrInstructionIdDeclVarSrc;1075 return IrInstSrcIdDeclVar;
1076}
1077
1078static constexpr IrInstSrcId ir_inst_id(IrInstSrcBr *) {
1079 return IrInstSrcIdBr;
1080}
1081
1082static constexpr IrInstSrcId ir_inst_id(IrInstSrcCondBr *) {
1083 return IrInstSrcIdCondBr;
1084}
1085
1086static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchBr *) {
1087 return IrInstSrcIdSwitchBr;
1088}
1089
1090static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchVar *) {
1091 return IrInstSrcIdSwitchVar;
1092}
1093
1094static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchElseVar *) {
1095 return IrInstSrcIdSwitchElseVar;
1096}
1097
1098static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchTarget *) {
1099 return IrInstSrcIdSwitchTarget;
1100}
1101
1102static constexpr IrInstSrcId ir_inst_id(IrInstSrcPhi *) {
1103 return IrInstSrcIdPhi;
1104}
1105
1106static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnOp *) {
1107 return IrInstSrcIdUnOp;
1108}
1109
1110static constexpr IrInstSrcId ir_inst_id(IrInstSrcBinOp *) {
1111 return IrInstSrcIdBinOp;
1112}
1113
1114static constexpr IrInstSrcId ir_inst_id(IrInstSrcMergeErrSets *) {
1115 return IrInstSrcIdMergeErrSets;
1116}
1117
1118static constexpr IrInstSrcId ir_inst_id(IrInstSrcLoadPtr *) {
1119 return IrInstSrcIdLoadPtr;
1120}
1121
1122static constexpr IrInstSrcId ir_inst_id(IrInstSrcStorePtr *) {
1123 return IrInstSrcIdStorePtr;
1124}
1125
1126static constexpr IrInstSrcId ir_inst_id(IrInstSrcFieldPtr *) {
1127 return IrInstSrcIdFieldPtr;
1128}
1129
1130static constexpr IrInstSrcId ir_inst_id(IrInstSrcElemPtr *) {
1131 return IrInstSrcIdElemPtr;
1132}
1133
1134static constexpr IrInstSrcId ir_inst_id(IrInstSrcVarPtr *) {
1135 return IrInstSrcIdVarPtr;
1136}
1137
1138static constexpr IrInstSrcId ir_inst_id(IrInstSrcCall *) {
1139 return IrInstSrcIdCall;
1140}
1141
1142static constexpr IrInstSrcId ir_inst_id(IrInstSrcCallArgs *) {
1143 return IrInstSrcIdCallArgs;
1144}
1145
1146static constexpr IrInstSrcId ir_inst_id(IrInstSrcCallExtra *) {
1147 return IrInstSrcIdCallExtra;
1148}
1149
1150static constexpr IrInstSrcId ir_inst_id(IrInstSrcConst *) {
1151 return IrInstSrcIdConst;
1152}
1153
1154static constexpr IrInstSrcId ir_inst_id(IrInstSrcReturn *) {
1155 return IrInstSrcIdReturn;
1156}
1157
1158static constexpr IrInstSrcId ir_inst_id(IrInstSrcContainerInitList *) {
1159 return IrInstSrcIdContainerInitList;
1160}
1161
1162static constexpr IrInstSrcId ir_inst_id(IrInstSrcContainerInitFields *) {
1163 return IrInstSrcIdContainerInitFields;
1164}
1165
1166static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnreachable *) {
1167 return IrInstSrcIdUnreachable;
1168}
1169
1170static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeOf *) {
1171 return IrInstSrcIdTypeOf;
1172}
1173
1174static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetCold *) {
1175 return IrInstSrcIdSetCold;
1176}
1177
1178static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetRuntimeSafety *) {
1179 return IrInstSrcIdSetRuntimeSafety;
1180}
1181
1182static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetFloatMode *) {
1183 return IrInstSrcIdSetFloatMode;
1184}
1185
1186static constexpr IrInstSrcId ir_inst_id(IrInstSrcArrayType *) {
1187 return IrInstSrcIdArrayType;
1188}
1189
1190static constexpr IrInstSrcId ir_inst_id(IrInstSrcAnyFrameType *) {
1191 return IrInstSrcIdAnyFrameType;
1192}
1193
1194static constexpr IrInstSrcId ir_inst_id(IrInstSrcSliceType *) {
1195 return IrInstSrcIdSliceType;
1196}
1197
1198static constexpr IrInstSrcId ir_inst_id(IrInstSrcAsm *) {
1199 return IrInstSrcIdAsm;
1200}
1201
1202static constexpr IrInstSrcId ir_inst_id(IrInstSrcSizeOf *) {
1203 return IrInstSrcIdSizeOf;
1204}
1205
1206static constexpr IrInstSrcId ir_inst_id(IrInstSrcTestNonNull *) {
1207 return IrInstSrcIdTestNonNull;
1208}
1209
1210static constexpr IrInstSrcId ir_inst_id(IrInstSrcOptionalUnwrapPtr *) {
1211 return IrInstSrcIdOptionalUnwrapPtr;
1212}
1213
1214static constexpr IrInstSrcId ir_inst_id(IrInstSrcClz *) {
1215 return IrInstSrcIdClz;
1216}
1217
1218static constexpr IrInstSrcId ir_inst_id(IrInstSrcCtz *) {
1219 return IrInstSrcIdCtz;
1220}
1221
1222static constexpr IrInstSrcId ir_inst_id(IrInstSrcPopCount *) {
1223 return IrInstSrcIdPopCount;
1224}
1225
1226static constexpr IrInstSrcId ir_inst_id(IrInstSrcBswap *) {
1227 return IrInstSrcIdBswap;
1228}
1229
1230static constexpr IrInstSrcId ir_inst_id(IrInstSrcBitReverse *) {
1231 return IrInstSrcIdBitReverse;
1232}
1233
1234static constexpr IrInstSrcId ir_inst_id(IrInstSrcImport *) {
1235 return IrInstSrcIdImport;
1236}
1237
1238static constexpr IrInstSrcId ir_inst_id(IrInstSrcCImport *) {
1239 return IrInstSrcIdCImport;
1240}
1241
1242static constexpr IrInstSrcId ir_inst_id(IrInstSrcCInclude *) {
1243 return IrInstSrcIdCInclude;
1244}
1245
1246static constexpr IrInstSrcId ir_inst_id(IrInstSrcCDefine *) {
1247 return IrInstSrcIdCDefine;
1248}
1249
1250static constexpr IrInstSrcId ir_inst_id(IrInstSrcCUndef *) {
1251 return IrInstSrcIdCUndef;
1252}
1253
1254static constexpr IrInstSrcId ir_inst_id(IrInstSrcRef *) {
1255 return IrInstSrcIdRef;
1256}
1257
1258static constexpr IrInstSrcId ir_inst_id(IrInstSrcCompileErr *) {
1259 return IrInstSrcIdCompileErr;
1260}
1261
1262static constexpr IrInstSrcId ir_inst_id(IrInstSrcCompileLog *) {
1263 return IrInstSrcIdCompileLog;
1264}
1265
1266static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrName *) {
1267 return IrInstSrcIdErrName;
1268}
1269
1270static constexpr IrInstSrcId ir_inst_id(IrInstSrcEmbedFile *) {
1271 return IrInstSrcIdEmbedFile;
1272}
1273
1274static constexpr IrInstSrcId ir_inst_id(IrInstSrcCmpxchg *) {
1275 return IrInstSrcIdCmpxchg;
1276}
1277
1278static constexpr IrInstSrcId ir_inst_id(IrInstSrcFence *) {
1279 return IrInstSrcIdFence;
1280}
1281
1282static constexpr IrInstSrcId ir_inst_id(IrInstSrcTruncate *) {
1283 return IrInstSrcIdTruncate;
1284}
1285
1286static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntCast *) {
1287 return IrInstSrcIdIntCast;
1288}
1289
1290static constexpr IrInstSrcId ir_inst_id(IrInstSrcFloatCast *) {
1291 return IrInstSrcIdFloatCast;
1292}
1293
1294static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToFloat *) {
1295 return IrInstSrcIdIntToFloat;
1296}
1297
1298static constexpr IrInstSrcId ir_inst_id(IrInstSrcFloatToInt *) {
1299 return IrInstSrcIdFloatToInt;
1300}
1301
1302static constexpr IrInstSrcId ir_inst_id(IrInstSrcBoolToInt *) {
1303 return IrInstSrcIdBoolToInt;
910}1304}
9111305
912static constexpr IrInstructionId ir_instruction_id(IrInstructionDeclVarGen *) {1306static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntType *) {
913 return IrInstructionIdDeclVarGen;1307 return IrInstSrcIdIntType;
914}1308}
9151309
916static constexpr IrInstructionId ir_instruction_id(IrInstructionCondBr *) {1310static constexpr IrInstSrcId ir_inst_id(IrInstSrcVectorType *) {
917 return IrInstructionIdCondBr;1311 return IrInstSrcIdVectorType;
918}1312}
9191313
920static constexpr IrInstructionId ir_instruction_id(IrInstructionBr *) {1314static constexpr IrInstSrcId ir_inst_id(IrInstSrcShuffleVector *) {
921 return IrInstructionIdBr;1315 return IrInstSrcIdShuffleVector;
922}1316}
9231317
924static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchBr *) {1318static constexpr IrInstSrcId ir_inst_id(IrInstSrcSplat *) {
925 return IrInstructionIdSwitchBr;1319 return IrInstSrcIdSplat;
926}1320}
9271321
928static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchVar *) {1322static constexpr IrInstSrcId ir_inst_id(IrInstSrcBoolNot *) {
929 return IrInstructionIdSwitchVar;1323 return IrInstSrcIdBoolNot;
930}1324}
9311325
932static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchElseVar *) {1326static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemset *) {
933 return IrInstructionIdSwitchElseVar;1327 return IrInstSrcIdMemset;
934}1328}
9351329
936static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchTarget *) {1330static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemcpy *) {
937 return IrInstructionIdSwitchTarget;1331 return IrInstSrcIdMemcpy;
938}1332}
9391333
940static constexpr IrInstructionId ir_instruction_id(IrInstructionPhi *) {1334static constexpr IrInstSrcId ir_inst_id(IrInstSrcSlice *) {
941 return IrInstructionIdPhi;1335 return IrInstSrcIdSlice;
942}1336}
9431337
944static constexpr IrInstructionId ir_instruction_id(IrInstructionUnOp *) {1338static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemberCount *) {
945 return IrInstructionIdUnOp;1339 return IrInstSrcIdMemberCount;
946}1340}
9471341
948static constexpr IrInstructionId ir_instruction_id(IrInstructionBinOp *) {1342static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemberType *) {
949 return IrInstructionIdBinOp;1343 return IrInstSrcIdMemberType;
950}1344}
9511345
952static constexpr IrInstructionId ir_instruction_id(IrInstructionMergeErrSets *) {1346static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemberName *) {
953 return IrInstructionIdMergeErrSets;1347 return IrInstSrcIdMemberName;
954}1348}
9551349
956static constexpr IrInstructionId ir_instruction_id(IrInstructionExport *) {1350static constexpr IrInstSrcId ir_inst_id(IrInstSrcBreakpoint *) {
957 return IrInstructionIdExport;1351 return IrInstSrcIdBreakpoint;
958}1352}
9591353
960static constexpr IrInstructionId ir_instruction_id(IrInstructionLoadPtr *) {1354static constexpr IrInstSrcId ir_inst_id(IrInstSrcReturnAddress *) {
961 return IrInstructionIdLoadPtr;1355 return IrInstSrcIdReturnAddress;
962}1356}
9631357
964static constexpr IrInstructionId ir_instruction_id(IrInstructionLoadPtrGen *) {1358static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameAddress *) {
965 return IrInstructionIdLoadPtrGen;1359 return IrInstSrcIdFrameAddress;
966}1360}
9671361
968static constexpr IrInstructionId ir_instruction_id(IrInstructionStorePtr *) {1362static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameHandle *) {
969 return IrInstructionIdStorePtr;1363 return IrInstSrcIdFrameHandle;
970}1364}
9711365
972static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorStoreElem *) {1366static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameType *) {
973 return IrInstructionIdVectorStoreElem;1367 return IrInstSrcIdFrameType;
974}1368}
9751369
976static constexpr IrInstructionId ir_instruction_id(IrInstructionFieldPtr *) {1370static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameSize *) {
977 return IrInstructionIdFieldPtr;1371 return IrInstSrcIdFrameSize;
978}1372}
9791373
980static constexpr IrInstructionId ir_instruction_id(IrInstructionStructFieldPtr *) {1374static constexpr IrInstSrcId ir_inst_id(IrInstSrcAlignOf *) {
981 return IrInstructionIdStructFieldPtr;1375 return IrInstSrcIdAlignOf;
982}1376}
9831377
984static constexpr IrInstructionId ir_instruction_id(IrInstructionUnionFieldPtr *) {1378static constexpr IrInstSrcId ir_inst_id(IrInstSrcOverflowOp *) {
985 return IrInstructionIdUnionFieldPtr;1379 return IrInstSrcIdOverflowOp;
986}1380}
9871381
988static constexpr IrInstructionId ir_instruction_id(IrInstructionElemPtr *) {1382static constexpr IrInstSrcId ir_inst_id(IrInstSrcTestErr *) {
989 return IrInstructionIdElemPtr;1383 return IrInstSrcIdTestErr;
990}1384}
9911385
992static constexpr IrInstructionId ir_instruction_id(IrInstructionVarPtr *) {1386static constexpr IrInstSrcId ir_inst_id(IrInstSrcMulAdd *) {
993 return IrInstructionIdVarPtr;1387 return IrInstSrcIdMulAdd;
994}1388}
9951389
996static constexpr IrInstructionId ir_instruction_id(IrInstructionReturnPtr *) {1390static constexpr IrInstSrcId ir_inst_id(IrInstSrcFloatOp *) {
997 return IrInstructionIdReturnPtr;1391 return IrInstSrcIdFloatOp;
998}1392}
9991393
1000static constexpr IrInstructionId ir_instruction_id(IrInstructionCallSrc *) {1394static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnwrapErrCode *) {
1001 return IrInstructionIdCallSrc;1395 return IrInstSrcIdUnwrapErrCode;
1002}1396}
10031397
1004static constexpr IrInstructionId ir_instruction_id(IrInstructionCallSrcArgs *) {1398static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnwrapErrPayload *) {
1005 return IrInstructionIdCallSrcArgs;1399 return IrInstSrcIdUnwrapErrPayload;
1006}1400}
10071401
1008static constexpr IrInstructionId ir_instruction_id(IrInstructionCallExtra *) {1402static constexpr IrInstSrcId ir_inst_id(IrInstSrcFnProto *) {
1009 return IrInstructionIdCallExtra;1403 return IrInstSrcIdFnProto;
1010}1404}
10111405
1012static constexpr IrInstructionId ir_instruction_id(IrInstructionCallGen *) {1406static constexpr IrInstSrcId ir_inst_id(IrInstSrcTestComptime *) {
1013 return IrInstructionIdCallGen;1407 return IrInstSrcIdTestComptime;
1014}1408}
10151409
1016static constexpr IrInstructionId ir_instruction_id(IrInstructionConst *) {1410static constexpr IrInstSrcId ir_inst_id(IrInstSrcPtrCast *) {
1017 return IrInstructionIdConst;1411 return IrInstSrcIdPtrCast;
1018}1412}
10191413
1020static constexpr IrInstructionId ir_instruction_id(IrInstructionReturn *) {1414static constexpr IrInstSrcId ir_inst_id(IrInstSrcBitCast *) {
1021 return IrInstructionIdReturn;1415 return IrInstSrcIdBitCast;
1022}1416}
10231417
1024static constexpr IrInstructionId ir_instruction_id(IrInstructionCast *) {1418static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToPtr *) {
1025 return IrInstructionIdCast;1419 return IrInstSrcIdIntToPtr;
1026}1420}
10271421
1028static constexpr IrInstructionId ir_instruction_id(IrInstructionResizeSlice *) {1422static constexpr IrInstSrcId ir_inst_id(IrInstSrcPtrToInt *) {
1029 return IrInstructionIdResizeSlice;1423 return IrInstSrcIdPtrToInt;
1030}1424}
10311425
1032static constexpr IrInstructionId ir_instruction_id(IrInstructionContainerInitList *) {1426static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToEnum *) {
1033 return IrInstructionIdContainerInitList;1427 return IrInstSrcIdIntToEnum;
1034}1428}
10351429
1036static constexpr IrInstructionId ir_instruction_id(IrInstructionContainerInitFields *) {1430static constexpr IrInstSrcId ir_inst_id(IrInstSrcEnumToInt *) {
1037 return IrInstructionIdContainerInitFields;1431 return IrInstSrcIdEnumToInt;
1038}1432}
10391433
1040static constexpr IrInstructionId ir_instruction_id(IrInstructionUnreachable *) {1434static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToErr *) {
1041 return IrInstructionIdUnreachable;1435 return IrInstSrcIdIntToErr;
1042}1436}
10431437
1044static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeOf *) {1438static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrToInt *) {
1045 return IrInstructionIdTypeOf;1439 return IrInstSrcIdErrToInt;
1046}1440}
10471441
1048static constexpr IrInstructionId ir_instruction_id(IrInstructionSetCold *) {1442static constexpr IrInstSrcId ir_inst_id(IrInstSrcCheckSwitchProngs *) {
1049 return IrInstructionIdSetCold;1443 return IrInstSrcIdCheckSwitchProngs;
1050}1444}
10511445
1052static constexpr IrInstructionId ir_instruction_id(IrInstructionSetRuntimeSafety *) {1446static constexpr IrInstSrcId ir_inst_id(IrInstSrcCheckStatementIsVoid *) {
1053 return IrInstructionIdSetRuntimeSafety;1447 return IrInstSrcIdCheckStatementIsVoid;
1054}1448}
10551449
1056static constexpr IrInstructionId ir_instruction_id(IrInstructionSetFloatMode *) {1450static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeName *) {
1057 return IrInstructionIdSetFloatMode;1451 return IrInstSrcIdTypeName;
1058}1452}
10591453
1060static constexpr IrInstructionId ir_instruction_id(IrInstructionArrayType *) {1454static constexpr IrInstSrcId ir_inst_id(IrInstSrcDeclRef *) {
1061 return IrInstructionIdArrayType;1455 return IrInstSrcIdDeclRef;
1062}1456}
10631457
1064static constexpr IrInstructionId ir_instruction_id(IrInstructionAnyFrameType *) {1458static constexpr IrInstSrcId ir_inst_id(IrInstSrcPanic *) {
1065 return IrInstructionIdAnyFrameType;1459 return IrInstSrcIdPanic;
1066}1460}
10671461
1068static constexpr IrInstructionId ir_instruction_id(IrInstructionSliceType *) {1462static constexpr IrInstSrcId ir_inst_id(IrInstSrcTagName *) {
1069 return IrInstructionIdSliceType;1463 return IrInstSrcIdTagName;
1070}1464}
10711465
1072static constexpr IrInstructionId ir_instruction_id(IrInstructionAsmSrc *) {1466static constexpr IrInstSrcId ir_inst_id(IrInstSrcTagType *) {
1073 return IrInstructionIdAsmSrc;1467 return IrInstSrcIdTagType;
1074}1468}
10751469
1076static constexpr IrInstructionId ir_instruction_id(IrInstructionAsmGen *) {1470static constexpr IrInstSrcId ir_inst_id(IrInstSrcFieldParentPtr *) {
1077 return IrInstructionIdAsmGen;1471 return IrInstSrcIdFieldParentPtr;
1078}1472}
10791473
1080static constexpr IrInstructionId ir_instruction_id(IrInstructionSizeOf *) {1474static constexpr IrInstSrcId ir_inst_id(IrInstSrcByteOffsetOf *) {
1081 return IrInstructionIdSizeOf;1475 return IrInstSrcIdByteOffsetOf;
1082}1476}
10831477
1084static constexpr IrInstructionId ir_instruction_id(IrInstructionTestNonNull *) {1478static constexpr IrInstSrcId ir_inst_id(IrInstSrcBitOffsetOf *) {
1085 return IrInstructionIdTestNonNull;1479 return IrInstSrcIdBitOffsetOf;
1086}1480}
10871481
1088static constexpr IrInstructionId ir_instruction_id(IrInstructionOptionalUnwrapPtr *) {1482static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeInfo *) {
1089 return IrInstructionIdOptionalUnwrapPtr;1483 return IrInstSrcIdTypeInfo;
1090}1484}
10911485
1092static constexpr IrInstructionId ir_instruction_id(IrInstructionClz *) {1486static constexpr IrInstSrcId ir_inst_id(IrInstSrcType *) {
1093 return IrInstructionIdClz;1487 return IrInstSrcIdType;
1094}1488}
10951489
1096static constexpr IrInstructionId ir_instruction_id(IrInstructionCtz *) {1490static constexpr IrInstSrcId ir_inst_id(IrInstSrcHasField *) {
1097 return IrInstructionIdCtz;1491 return IrInstSrcIdHasField;
1098}1492}
10991493
1100static constexpr IrInstructionId ir_instruction_id(IrInstructionPopCount *) {1494static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeId *) {
1101 return IrInstructionIdPopCount;1495 return IrInstSrcIdTypeId;
1102}1496}
11031497
1104static constexpr IrInstructionId ir_instruction_id(IrInstructionBswap *) {1498static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetEvalBranchQuota *) {
1105 return IrInstructionIdBswap;1499 return IrInstSrcIdSetEvalBranchQuota;
1106}1500}
11071501
1108static constexpr IrInstructionId ir_instruction_id(IrInstructionBitReverse *) {1502static constexpr IrInstSrcId ir_inst_id(IrInstSrcPtrType *) {
1109 return IrInstructionIdBitReverse;1503 return IrInstSrcIdPtrType;
1110}1504}
11111505
1112static constexpr IrInstructionId ir_instruction_id(IrInstructionUnionTag *) {1506static constexpr IrInstSrcId ir_inst_id(IrInstSrcAlignCast *) {
1113 return IrInstructionIdUnionTag;1507 return IrInstSrcIdAlignCast;
1114}1508}
11151509
1116static constexpr IrInstructionId ir_instruction_id(IrInstructionImport *) {1510static constexpr IrInstSrcId ir_inst_id(IrInstSrcImplicitCast *) {
1117 return IrInstructionIdImport;1511 return IrInstSrcIdImplicitCast;
1118}1512}
11191513
1120static constexpr IrInstructionId ir_instruction_id(IrInstructionCImport *) {1514static constexpr IrInstSrcId ir_inst_id(IrInstSrcResolveResult *) {
1121 return IrInstructionIdCImport;1515 return IrInstSrcIdResolveResult;
1122}1516}
11231517
1124static constexpr IrInstructionId ir_instruction_id(IrInstructionCInclude *) {1518static constexpr IrInstSrcId ir_inst_id(IrInstSrcResetResult *) {
1125 return IrInstructionIdCInclude;1519 return IrInstSrcIdResetResult;
1126}1520}
11271521
1128static constexpr IrInstructionId ir_instruction_id(IrInstructionCDefine *) {1522static constexpr IrInstSrcId ir_inst_id(IrInstSrcOpaqueType *) {
1129 return IrInstructionIdCDefine;1523 return IrInstSrcIdOpaqueType;
1130}1524}
11311525
1132static constexpr IrInstructionId ir_instruction_id(IrInstructionCUndef *) {1526static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetAlignStack *) {
1133 return IrInstructionIdCUndef;1527 return IrInstSrcIdSetAlignStack;
1134}1528}
11351529
1136static constexpr IrInstructionId ir_instruction_id(IrInstructionRef *) {1530static constexpr IrInstSrcId ir_inst_id(IrInstSrcArgType *) {
1137 return IrInstructionIdRef;1531 return IrInstSrcIdArgType;
1138}1532}
11391533
1140static constexpr IrInstructionId ir_instruction_id(IrInstructionRefGen *) {1534static constexpr IrInstSrcId ir_inst_id(IrInstSrcExport *) {
1141 return IrInstructionIdRefGen;1535 return IrInstSrcIdExport;
1142}1536}
11431537
1144static constexpr IrInstructionId ir_instruction_id(IrInstructionCompileErr *) {1538static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrorReturnTrace *) {
1145 return IrInstructionIdCompileErr;1539 return IrInstSrcIdErrorReturnTrace;
1146}1540}
11471541
1148static constexpr IrInstructionId ir_instruction_id(IrInstructionCompileLog *) {1542static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrorUnion *) {
1149 return IrInstructionIdCompileLog;1543 return IrInstSrcIdErrorUnion;
1150}1544}
11511545
1152static constexpr IrInstructionId ir_instruction_id(IrInstructionErrName *) {1546static constexpr IrInstSrcId ir_inst_id(IrInstSrcAtomicRmw *) {
1153 return IrInstructionIdErrName;1547 return IrInstSrcIdAtomicRmw;
1154}1548}
11551549
1156static constexpr IrInstructionId ir_instruction_id(IrInstructionEmbedFile *) {1550static constexpr IrInstSrcId ir_inst_id(IrInstSrcAtomicLoad *) {
1157 return IrInstructionIdEmbedFile;1551 return IrInstSrcIdAtomicLoad;
1158}1552}
11591553
1160static constexpr IrInstructionId ir_instruction_id(IrInstructionCmpxchgSrc *) {1554static constexpr IrInstSrcId ir_inst_id(IrInstSrcAtomicStore *) {
1161 return IrInstructionIdCmpxchgSrc;1555 return IrInstSrcIdAtomicStore;
1162}1556}
11631557
1164static constexpr IrInstructionId ir_instruction_id(IrInstructionCmpxchgGen *) {1558static constexpr IrInstSrcId ir_inst_id(IrInstSrcSaveErrRetAddr *) {
1165 return IrInstructionIdCmpxchgGen;1559 return IrInstSrcIdSaveErrRetAddr;
1166}1560}
11671561
1168static constexpr IrInstructionId ir_instruction_id(IrInstructionFence *) {1562static constexpr IrInstSrcId ir_inst_id(IrInstSrcAddImplicitReturnType *) {
1169 return IrInstructionIdFence;1563 return IrInstSrcIdAddImplicitReturnType;
1170}1564}
11711565
1172static constexpr IrInstructionId ir_instruction_id(IrInstructionTruncate *) {1566static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrSetCast *) {
1173 return IrInstructionIdTruncate;1567 return IrInstSrcIdErrSetCast;
1174}1568}
11751569
1176static constexpr IrInstructionId ir_instruction_id(IrInstructionIntCast *) {1570static constexpr IrInstSrcId ir_inst_id(IrInstSrcToBytes *) {
1177 return IrInstructionIdIntCast;1571 return IrInstSrcIdToBytes;
1178}1572}
11791573
1180static constexpr IrInstructionId ir_instruction_id(IrInstructionFloatCast *) {1574static constexpr IrInstSrcId ir_inst_id(IrInstSrcFromBytes *) {
1181 return IrInstructionIdFloatCast;1575 return IrInstSrcIdFromBytes;
1182}1576}
11831577
1184static constexpr IrInstructionId ir_instruction_id(IrInstructionErrSetCast *) {1578static constexpr IrInstSrcId ir_inst_id(IrInstSrcCheckRuntimeScope *) {
1185 return IrInstructionIdErrSetCast;1579 return IrInstSrcIdCheckRuntimeScope;
1186}1580}
11871581
1188static constexpr IrInstructionId ir_instruction_id(IrInstructionToBytes *) {1582static constexpr IrInstSrcId ir_inst_id(IrInstSrcHasDecl *) {
1189 return IrInstructionIdToBytes;1583 return IrInstSrcIdHasDecl;
1190}1584}
11911585
1192static constexpr IrInstructionId ir_instruction_id(IrInstructionFromBytes *) {1586static constexpr IrInstSrcId ir_inst_id(IrInstSrcUndeclaredIdent *) {
1193 return IrInstructionIdFromBytes;1587 return IrInstSrcIdUndeclaredIdent;
1194}1588}
11951589
1196static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToFloat *) {1590static constexpr IrInstSrcId ir_inst_id(IrInstSrcAlloca *) {
1197 return IrInstructionIdIntToFloat;1591 return IrInstSrcIdAlloca;
1198}1592}
11991593
1200static constexpr IrInstructionId ir_instruction_id(IrInstructionFloatToInt *) {1594static constexpr IrInstSrcId ir_inst_id(IrInstSrcEndExpr *) {
1201 return IrInstructionIdFloatToInt;1595 return IrInstSrcIdEndExpr;
1202}1596}
12031597
1204static constexpr IrInstructionId ir_instruction_id(IrInstructionBoolToInt *) {1598static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnionInitNamedField *) {
1205 return IrInstructionIdBoolToInt;1599 return IrInstSrcIdUnionInitNamedField;
1206}1600}
12071601
1208static constexpr IrInstructionId ir_instruction_id(IrInstructionIntType *) {1602static constexpr IrInstSrcId ir_inst_id(IrInstSrcSuspendBegin *) {
1209 return IrInstructionIdIntType;1603 return IrInstSrcIdSuspendBegin;
1210}1604}
12111605
1212static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorType *) {1606static constexpr IrInstSrcId ir_inst_id(IrInstSrcSuspendFinish *) {
1213 return IrInstructionIdVectorType;1607 return IrInstSrcIdSuspendFinish;
1214}1608}
12151609
1216static constexpr IrInstructionId ir_instruction_id(IrInstructionShuffleVector *) {1610static constexpr IrInstSrcId ir_inst_id(IrInstSrcAwait *) {
1217 return IrInstructionIdShuffleVector;1611 return IrInstSrcIdAwait;
1218}1612}
12191613
1220static constexpr IrInstructionId ir_instruction_id(IrInstructionSplatSrc *) {1614static constexpr IrInstSrcId ir_inst_id(IrInstSrcResume *) {
1221 return IrInstructionIdSplatSrc;1615 return IrInstSrcIdResume;
1222}1616}
12231617
1224static constexpr IrInstructionId ir_instruction_id(IrInstructionSplatGen *) {1618static constexpr IrInstSrcId ir_inst_id(IrInstSrcSpillBegin *) {
1225 return IrInstructionIdSplatGen;1619 return IrInstSrcIdSpillBegin;
1226}1620}
12271621
1228static constexpr IrInstructionId ir_instruction_id(IrInstructionBoolNot *) {1622static constexpr IrInstSrcId ir_inst_id(IrInstSrcSpillEnd *) {
1229 return IrInstructionIdBoolNot;1623 return IrInstSrcIdSpillEnd;
1230}1624}
12311625
1232static constexpr IrInstructionId ir_instruction_id(IrInstructionMemset *) {1626
1233 return IrInstructionIdMemset;1627static constexpr IrInstGenId ir_inst_id(IrInstGenDeclVar *) {
1628 return IrInstGenIdDeclVar;
1234}1629}
12351630
1236static constexpr IrInstructionId ir_instruction_id(IrInstructionMemcpy *) {1631static constexpr IrInstGenId ir_inst_id(IrInstGenBr *) {
1237 return IrInstructionIdMemcpy;1632 return IrInstGenIdBr;
1238}1633}
12391634
1240static constexpr IrInstructionId ir_instruction_id(IrInstructionSliceSrc *) {1635static constexpr IrInstGenId ir_inst_id(IrInstGenCondBr *) {
1241 return IrInstructionIdSliceSrc;1636 return IrInstGenIdCondBr;
1242}1637}
12431638
1244static constexpr IrInstructionId ir_instruction_id(IrInstructionSliceGen *) {1639static constexpr IrInstGenId ir_inst_id(IrInstGenSwitchBr *) {
1245 return IrInstructionIdSliceGen;1640 return IrInstGenIdSwitchBr;
1246}1641}
12471642
1248static constexpr IrInstructionId ir_instruction_id(IrInstructionMemberCount *) {1643static constexpr IrInstGenId ir_inst_id(IrInstGenPhi *) {
1249 return IrInstructionIdMemberCount;1644 return IrInstGenIdPhi;
1250}1645}
12511646
1252static constexpr IrInstructionId ir_instruction_id(IrInstructionMemberType *) {1647static constexpr IrInstGenId ir_inst_id(IrInstGenBinaryNot *) {
1253 return IrInstructionIdMemberType;1648 return IrInstGenIdBinaryNot;
1254}1649}
12551650
1256static constexpr IrInstructionId ir_instruction_id(IrInstructionMemberName *) {1651static constexpr IrInstGenId ir_inst_id(IrInstGenNegation *) {
1257 return IrInstructionIdMemberName;1652 return IrInstGenIdNegation;
1258}1653}
12591654
1260static constexpr IrInstructionId ir_instruction_id(IrInstructionBreakpoint *) {1655static constexpr IrInstGenId ir_inst_id(IrInstGenNegationWrapping *) {
1261 return IrInstructionIdBreakpoint;1656 return IrInstGenIdNegationWrapping;
1262}1657}
12631658
1264static constexpr IrInstructionId ir_instruction_id(IrInstructionReturnAddress *) {1659static constexpr IrInstGenId ir_inst_id(IrInstGenBinOp *) {
1265 return IrInstructionIdReturnAddress;1660 return IrInstGenIdBinOp;
1266}1661}
12671662
1268static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameAddress *) {1663static constexpr IrInstGenId ir_inst_id(IrInstGenLoadPtr *) {
1269 return IrInstructionIdFrameAddress;1664 return IrInstGenIdLoadPtr;
1270}1665}
12711666
1272static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameHandle *) {1667static constexpr IrInstGenId ir_inst_id(IrInstGenStorePtr *) {
1273 return IrInstructionIdFrameHandle;1668 return IrInstGenIdStorePtr;
1274}1669}
12751670
1276static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameType *) {1671static constexpr IrInstGenId ir_inst_id(IrInstGenVectorStoreElem *) {
1277 return IrInstructionIdFrameType;1672 return IrInstGenIdVectorStoreElem;
1278}1673}
12791674
1280static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameSizeSrc *) {1675static constexpr IrInstGenId ir_inst_id(IrInstGenStructFieldPtr *) {
1281 return IrInstructionIdFrameSizeSrc;1676 return IrInstGenIdStructFieldPtr;
1282}1677}
12831678
1284static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameSizeGen *) {1679static constexpr IrInstGenId ir_inst_id(IrInstGenUnionFieldPtr *) {
1285 return IrInstructionIdFrameSizeGen;1680 return IrInstGenIdUnionFieldPtr;
1286}1681}
12871682
1288static constexpr IrInstructionId ir_instruction_id(IrInstructionAlignOf *) {1683static constexpr IrInstGenId ir_inst_id(IrInstGenElemPtr *) {
1289 return IrInstructionIdAlignOf;1684 return IrInstGenIdElemPtr;
1290}1685}
12911686
1292static constexpr IrInstructionId ir_instruction_id(IrInstructionOverflowOp *) {1687static constexpr IrInstGenId ir_inst_id(IrInstGenVarPtr *) {
1293 return IrInstructionIdOverflowOp;1688 return IrInstGenIdVarPtr;
1294}1689}
12951690
1296static constexpr IrInstructionId ir_instruction_id(IrInstructionTestErrSrc *) {1691static constexpr IrInstGenId ir_inst_id(IrInstGenReturnPtr *) {
1297 return IrInstructionIdTestErrSrc;1692 return IrInstGenIdReturnPtr;
1298}1693}
12991694
1300static constexpr IrInstructionId ir_instruction_id(IrInstructionTestErrGen *) {1695static constexpr IrInstGenId ir_inst_id(IrInstGenCall *) {
1301 return IrInstructionIdTestErrGen;1696 return IrInstGenIdCall;
1302}1697}
13031698
1304static constexpr IrInstructionId ir_instruction_id(IrInstructionMulAdd *) {1699static constexpr IrInstGenId ir_inst_id(IrInstGenReturn *) {
1305 return IrInstructionIdMulAdd;1700 return IrInstGenIdReturn;
1306}1701}
13071702
1308static constexpr IrInstructionId ir_instruction_id(IrInstructionUnwrapErrCode *) {1703static constexpr IrInstGenId ir_inst_id(IrInstGenCast *) {
1309 return IrInstructionIdUnwrapErrCode;1704 return IrInstGenIdCast;
1310}1705}
13111706
1312static constexpr IrInstructionId ir_instruction_id(IrInstructionUnwrapErrPayload *) {1707static constexpr IrInstGenId ir_inst_id(IrInstGenResizeSlice *) {
1313 return IrInstructionIdUnwrapErrPayload;1708 return IrInstGenIdResizeSlice;
1314}1709}
13151710
1316static constexpr IrInstructionId ir_instruction_id(IrInstructionOptionalWrap *) {1711static constexpr IrInstGenId ir_inst_id(IrInstGenUnreachable *) {
1317 return IrInstructionIdOptionalWrap;1712 return IrInstGenIdUnreachable;
1318}1713}
13191714
1320static constexpr IrInstructionId ir_instruction_id(IrInstructionErrWrapPayload *) {1715static constexpr IrInstGenId ir_inst_id(IrInstGenAsm *) {
1321 return IrInstructionIdErrWrapPayload;1716 return IrInstGenIdAsm;
1322}1717}
13231718
1324static constexpr IrInstructionId ir_instruction_id(IrInstructionErrWrapCode *) {1719static constexpr IrInstGenId ir_inst_id(IrInstGenTestNonNull *) {
1325 return IrInstructionIdErrWrapCode;1720 return IrInstGenIdTestNonNull;
1326}1721}
13271722
1328static constexpr IrInstructionId ir_instruction_id(IrInstructionFnProto *) {1723static constexpr IrInstGenId ir_inst_id(IrInstGenOptionalUnwrapPtr *) {
1329 return IrInstructionIdFnProto;1724 return IrInstGenIdOptionalUnwrapPtr;
1330}1725}
13311726
1332static constexpr IrInstructionId ir_instruction_id(IrInstructionTestComptime *) {1727static constexpr IrInstGenId ir_inst_id(IrInstGenOptionalWrap *) {
1333 return IrInstructionIdTestComptime;1728 return IrInstGenIdOptionalWrap;
1334}1729}
13351730
1336static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrCastSrc *) {1731static constexpr IrInstGenId ir_inst_id(IrInstGenUnionTag *) {
1337 return IrInstructionIdPtrCastSrc;1732 return IrInstGenIdUnionTag;
1338}1733}
13391734
1340static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrCastGen *) {1735static constexpr IrInstGenId ir_inst_id(IrInstGenClz *) {
1341 return IrInstructionIdPtrCastGen;1736 return IrInstGenIdClz;
1342}1737}
13431738
1344static constexpr IrInstructionId ir_instruction_id(IrInstructionBitCastSrc *) {1739static constexpr IrInstGenId ir_inst_id(IrInstGenCtz *) {
1345 return IrInstructionIdBitCastSrc;1740 return IrInstGenIdCtz;
1346}1741}
13471742
1348static constexpr IrInstructionId ir_instruction_id(IrInstructionBitCastGen *) {1743static constexpr IrInstGenId ir_inst_id(IrInstGenPopCount *) {
1349 return IrInstructionIdBitCastGen;1744 return IrInstGenIdPopCount;
1350}1745}
13511746
1352static constexpr IrInstructionId ir_instruction_id(IrInstructionWidenOrShorten *) {1747static constexpr IrInstGenId ir_inst_id(IrInstGenBswap *) {
1353 return IrInstructionIdWidenOrShorten;1748 return IrInstGenIdBswap;
1354}1749}
13551750
1356static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrToInt *) {1751static constexpr IrInstGenId ir_inst_id(IrInstGenBitReverse *) {
1357 return IrInstructionIdPtrToInt;1752 return IrInstGenIdBitReverse;
1358}1753}
13591754
1360static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToPtr *) {1755static constexpr IrInstGenId ir_inst_id(IrInstGenRef *) {
1361 return IrInstructionIdIntToPtr;1756 return IrInstGenIdRef;
1362}1757}
13631758
1364static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToEnum *) {1759static constexpr IrInstGenId ir_inst_id(IrInstGenErrName *) {
1365 return IrInstructionIdIntToEnum;1760 return IrInstGenIdErrName;
1366}1761}
13671762
1368static constexpr IrInstructionId ir_instruction_id(IrInstructionEnumToInt *) {1763static constexpr IrInstGenId ir_inst_id(IrInstGenCmpxchg *) {
1369 return IrInstructionIdEnumToInt;1764 return IrInstGenIdCmpxchg;
1370}1765}
13711766
1372static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToErr *) {1767static constexpr IrInstGenId ir_inst_id(IrInstGenFence *) {
1373 return IrInstructionIdIntToErr;1768 return IrInstGenIdFence;
1374}1769}
13751770
1376static constexpr IrInstructionId ir_instruction_id(IrInstructionErrToInt *) {1771static constexpr IrInstGenId ir_inst_id(IrInstGenTruncate *) {
1377 return IrInstructionIdErrToInt;1772 return IrInstGenIdTruncate;
1378}1773}
13791774
1380static constexpr IrInstructionId ir_instruction_id(IrInstructionCheckSwitchProngs *) {1775static constexpr IrInstGenId ir_inst_id(IrInstGenShuffleVector *) {
1381 return IrInstructionIdCheckSwitchProngs;1776 return IrInstGenIdShuffleVector;
1382}1777}
13831778
1384static constexpr IrInstructionId ir_instruction_id(IrInstructionCheckStatementIsVoid *) {1779static constexpr IrInstGenId ir_inst_id(IrInstGenSplat *) {
1385 return IrInstructionIdCheckStatementIsVoid;1780 return IrInstGenIdSplat;
1386}1781}
13871782
1388static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeName *) {1783static constexpr IrInstGenId ir_inst_id(IrInstGenBoolNot *) {
1389 return IrInstructionIdTypeName;1784 return IrInstGenIdBoolNot;
1390}1785}
13911786
1392static constexpr IrInstructionId ir_instruction_id(IrInstructionDeclRef *) {1787static constexpr IrInstGenId ir_inst_id(IrInstGenMemset *) {
1393 return IrInstructionIdDeclRef;1788 return IrInstGenIdMemset;
1394}1789}
13951790
1396static constexpr IrInstructionId ir_instruction_id(IrInstructionPanic *) {1791static constexpr IrInstGenId ir_inst_id(IrInstGenMemcpy *) {
1397 return IrInstructionIdPanic;1792 return IrInstGenIdMemcpy;
1398}1793}
13991794
1400static constexpr IrInstructionId ir_instruction_id(IrInstructionTagName *) {1795static constexpr IrInstGenId ir_inst_id(IrInstGenSlice *) {
1401 return IrInstructionIdTagName;1796 return IrInstGenIdSlice;
1402}1797}
14031798
1404static constexpr IrInstructionId ir_instruction_id(IrInstructionTagType *) {1799static constexpr IrInstGenId ir_inst_id(IrInstGenBreakpoint *) {
1405 return IrInstructionIdTagType;1800 return IrInstGenIdBreakpoint;
1406}1801}
14071802
1408static constexpr IrInstructionId ir_instruction_id(IrInstructionFieldParentPtr *) {1803static constexpr IrInstGenId ir_inst_id(IrInstGenReturnAddress *) {
1409 return IrInstructionIdFieldParentPtr;1804 return IrInstGenIdReturnAddress;
1410}1805}
14111806
1412static constexpr IrInstructionId ir_instruction_id(IrInstructionByteOffsetOf *) {1807static constexpr IrInstGenId ir_inst_id(IrInstGenFrameAddress *) {
1413 return IrInstructionIdByteOffsetOf;1808 return IrInstGenIdFrameAddress;
1414}1809}
14151810
1416static constexpr IrInstructionId ir_instruction_id(IrInstructionBitOffsetOf *) {1811static constexpr IrInstGenId ir_inst_id(IrInstGenFrameHandle *) {
1417 return IrInstructionIdBitOffsetOf;1812 return IrInstGenIdFrameHandle;
1418}1813}
14191814
1420static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeInfo *) {1815static constexpr IrInstGenId ir_inst_id(IrInstGenFrameSize *) {
1421 return IrInstructionIdTypeInfo;1816 return IrInstGenIdFrameSize;
1422}1817}
14231818
1424static constexpr IrInstructionId ir_instruction_id(IrInstructionType *) {1819static constexpr IrInstGenId ir_inst_id(IrInstGenOverflowOp *) {
1425 return IrInstructionIdType;1820 return IrInstGenIdOverflowOp;
1426}1821}
14271822
1428static constexpr IrInstructionId ir_instruction_id(IrInstructionHasField *) {1823static constexpr IrInstGenId ir_inst_id(IrInstGenTestErr *) {
1429 return IrInstructionIdHasField;1824 return IrInstGenIdTestErr;
1430}1825}
14311826
1432static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeId *) {1827static constexpr IrInstGenId ir_inst_id(IrInstGenMulAdd *) {
1433 return IrInstructionIdTypeId;1828 return IrInstGenIdMulAdd;
1434}1829}
14351830
1436static constexpr IrInstructionId ir_instruction_id(IrInstructionSetEvalBranchQuota *) {1831static constexpr IrInstGenId ir_inst_id(IrInstGenFloatOp *) {
1437 return IrInstructionIdSetEvalBranchQuota;1832 return IrInstGenIdFloatOp;
1438}1833}
14391834
1440static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrType *) {1835static constexpr IrInstGenId ir_inst_id(IrInstGenUnwrapErrCode *) {
1441 return IrInstructionIdPtrType;1836 return IrInstGenIdUnwrapErrCode;
1442}1837}
14431838
1444static constexpr IrInstructionId ir_instruction_id(IrInstructionAlignCast *) {1839static constexpr IrInstGenId ir_inst_id(IrInstGenUnwrapErrPayload *) {
1445 return IrInstructionIdAlignCast;1840 return IrInstGenIdUnwrapErrPayload;
1446}1841}
14471842
1448static constexpr IrInstructionId ir_instruction_id(IrInstructionImplicitCast *) {1843static constexpr IrInstGenId ir_inst_id(IrInstGenErrWrapCode *) {
1449 return IrInstructionIdImplicitCast;1844 return IrInstGenIdErrWrapCode;
1450}1845}
14511846
1452static constexpr IrInstructionId ir_instruction_id(IrInstructionResolveResult *) {1847static constexpr IrInstGenId ir_inst_id(IrInstGenErrWrapPayload *) {
1453 return IrInstructionIdResolveResult;1848 return IrInstGenIdErrWrapPayload;
1454}1849}
14551850
1456static constexpr IrInstructionId ir_instruction_id(IrInstructionResetResult *) {1851static constexpr IrInstGenId ir_inst_id(IrInstGenPtrCast *) {
1457 return IrInstructionIdResetResult;1852 return IrInstGenIdPtrCast;
1458}1853}
14591854
1460static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrOfArrayToSlice *) {1855static constexpr IrInstGenId ir_inst_id(IrInstGenBitCast *) {
1461 return IrInstructionIdPtrOfArrayToSlice;1856 return IrInstGenIdBitCast;
1462}1857}
14631858
1464static constexpr IrInstructionId ir_instruction_id(IrInstructionOpaqueType *) {1859static constexpr IrInstGenId ir_inst_id(IrInstGenWidenOrShorten *) {
1465 return IrInstructionIdOpaqueType;1860 return IrInstGenIdWidenOrShorten;
1466}1861}
14671862
1468static constexpr IrInstructionId ir_instruction_id(IrInstructionSetAlignStack *) {1863static constexpr IrInstGenId ir_inst_id(IrInstGenIntToPtr *) {
1469 return IrInstructionIdSetAlignStack;1864 return IrInstGenIdIntToPtr;
1470}1865}
14711866
1472static constexpr IrInstructionId ir_instruction_id(IrInstructionArgType *) {1867static constexpr IrInstGenId ir_inst_id(IrInstGenPtrToInt *) {
1473 return IrInstructionIdArgType;1868 return IrInstGenIdPtrToInt;
1474}1869}
14751870
1476static constexpr IrInstructionId ir_instruction_id(IrInstructionErrorReturnTrace *) {1871static constexpr IrInstGenId ir_inst_id(IrInstGenIntToEnum *) {
1477 return IrInstructionIdErrorReturnTrace;1872 return IrInstGenIdIntToEnum;
1478}1873}
14791874
1480static constexpr IrInstructionId ir_instruction_id(IrInstructionErrorUnion *) {1875static constexpr IrInstGenId ir_inst_id(IrInstGenIntToErr *) {
1481 return IrInstructionIdErrorUnion;1876 return IrInstGenIdIntToErr;
1482}1877}
14831878
1484static constexpr IrInstructionId ir_instruction_id(IrInstructionAtomicRmw *) {1879static constexpr IrInstGenId ir_inst_id(IrInstGenErrToInt *) {
1485 return IrInstructionIdAtomicRmw;1880 return IrInstGenIdErrToInt;
1486}1881}
14871882
1488static constexpr IrInstructionId ir_instruction_id(IrInstructionAtomicLoad *) {1883static constexpr IrInstGenId ir_inst_id(IrInstGenPanic *) {
1489 return IrInstructionIdAtomicLoad;1884 return IrInstGenIdPanic;
1490}1885}
14911886
1492static constexpr IrInstructionId ir_instruction_id(IrInstructionAtomicStore *) {1887static constexpr IrInstGenId ir_inst_id(IrInstGenTagName *) {
1493 return IrInstructionIdAtomicStore;1888 return IrInstGenIdTagName;
1494}1889}
14951890
1496static constexpr IrInstructionId ir_instruction_id(IrInstructionSaveErrRetAddr *) {1891static constexpr IrInstGenId ir_inst_id(IrInstGenFieldParentPtr *) {
1497 return IrInstructionIdSaveErrRetAddr;1892 return IrInstGenIdFieldParentPtr;
1498}1893}
14991894
1500static constexpr IrInstructionId ir_instruction_id(IrInstructionAddImplicitReturnType *) {1895static constexpr IrInstGenId ir_inst_id(IrInstGenAlignCast *) {
1501 return IrInstructionIdAddImplicitReturnType;1896 return IrInstGenIdAlignCast;
1502}1897}
15031898
1504static constexpr IrInstructionId ir_instruction_id(IrInstructionFloatOp *) {1899static constexpr IrInstGenId ir_inst_id(IrInstGenErrorReturnTrace *) {
1505 return IrInstructionIdFloatOp;1900 return IrInstGenIdErrorReturnTrace;
1506}1901}
15071902
1508static constexpr IrInstructionId ir_instruction_id(IrInstructionCheckRuntimeScope *) {1903static constexpr IrInstGenId ir_inst_id(IrInstGenAtomicRmw *) {
1509 return IrInstructionIdCheckRuntimeScope;1904 return IrInstGenIdAtomicRmw;
1510}1905}
15111906
1512static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorToArray *) {1907static constexpr IrInstGenId ir_inst_id(IrInstGenAtomicLoad *) {
1513 return IrInstructionIdVectorToArray;1908 return IrInstGenIdAtomicLoad;
1514}1909}
15151910
1516static constexpr IrInstructionId ir_instruction_id(IrInstructionArrayToVector *) {1911static constexpr IrInstGenId ir_inst_id(IrInstGenAtomicStore *) {
1517 return IrInstructionIdArrayToVector;1912 return IrInstGenIdAtomicStore;
1518}1913}
15191914
1520static constexpr IrInstructionId ir_instruction_id(IrInstructionAssertZero *) {1915static constexpr IrInstGenId ir_inst_id(IrInstGenSaveErrRetAddr *) {
1521 return IrInstructionIdAssertZero;1916 return IrInstGenIdSaveErrRetAddr;
1522}1917}
15231918
1524static constexpr IrInstructionId ir_instruction_id(IrInstructionAssertNonNull *) {1919static constexpr IrInstGenId ir_inst_id(IrInstGenVectorToArray *) {
1525 return IrInstructionIdAssertNonNull;1920 return IrInstGenIdVectorToArray;
1526}1921}
15271922
1528static constexpr IrInstructionId ir_instruction_id(IrInstructionHasDecl *) {1923static constexpr IrInstGenId ir_inst_id(IrInstGenArrayToVector *) {
1529 return IrInstructionIdHasDecl;1924 return IrInstGenIdArrayToVector;
1530}1925}
15311926
1532static constexpr IrInstructionId ir_instruction_id(IrInstructionUndeclaredIdent *) {1927static constexpr IrInstGenId ir_inst_id(IrInstGenAssertZero *) {
1533 return IrInstructionIdUndeclaredIdent;1928 return IrInstGenIdAssertZero;
1534}1929}
15351930
1536static constexpr IrInstructionId ir_instruction_id(IrInstructionAllocaSrc *) {1931static constexpr IrInstGenId ir_inst_id(IrInstGenAssertNonNull *) {
1537 return IrInstructionIdAllocaSrc;1932 return IrInstGenIdAssertNonNull;
1538}1933}
15391934
1540static constexpr IrInstructionId ir_instruction_id(IrInstructionAllocaGen *) {1935static constexpr IrInstGenId ir_inst_id(IrInstGenPtrOfArrayToSlice *) {
1541 return IrInstructionIdAllocaGen;1936 return IrInstGenIdPtrOfArrayToSlice;
1542}1937}
15431938
1544static constexpr IrInstructionId ir_instruction_id(IrInstructionEndExpr *) {1939static constexpr IrInstGenId ir_inst_id(IrInstGenSuspendBegin *) {
1545 return IrInstructionIdEndExpr;1940 return IrInstGenIdSuspendBegin;
1546}1941}
15471942
1548static constexpr IrInstructionId ir_instruction_id(IrInstructionUnionInitNamedField *) {1943static constexpr IrInstGenId ir_inst_id(IrInstGenSuspendFinish *) {
1549 return IrInstructionIdUnionInitNamedField;1944 return IrInstGenIdSuspendFinish;
1550}1945}
15511946
1552static constexpr IrInstructionId ir_instruction_id(IrInstructionSuspendBegin *) {1947static constexpr IrInstGenId ir_inst_id(IrInstGenAwait *) {
1553 return IrInstructionIdSuspendBegin;1948 return IrInstGenIdAwait;
1554}1949}
15551950
1556static constexpr IrInstructionId ir_instruction_id(IrInstructionSuspendFinish *) {1951static constexpr IrInstGenId ir_inst_id(IrInstGenResume *) {
1557 return IrInstructionIdSuspendFinish;1952 return IrInstGenIdResume;
1558}1953}
15591954
1560static constexpr IrInstructionId ir_instruction_id(IrInstructionAwaitSrc *) {1955static constexpr IrInstGenId ir_inst_id(IrInstGenSpillBegin *) {
1561 return IrInstructionIdAwaitSrc;1956 return IrInstGenIdSpillBegin;
1562}1957}
15631958
1564static constexpr IrInstructionId ir_instruction_id(IrInstructionAwaitGen *) {1959static constexpr IrInstGenId ir_inst_id(IrInstGenSpillEnd *) {
1565 return IrInstructionIdAwaitGen;1960 return IrInstGenIdSpillEnd;
1566}1961}
15671962
1568static constexpr IrInstructionId ir_instruction_id(IrInstructionResume *) {1963static constexpr IrInstGenId ir_inst_id(IrInstGenVectorExtractElem *) {
1569 return IrInstructionIdResume;1964 return IrInstGenIdVectorExtractElem;
1570}1965}
15711966
1572static constexpr IrInstructionId ir_instruction_id(IrInstructionSpillBegin *) {1967static constexpr IrInstGenId ir_inst_id(IrInstGenAlloca *) {
1573 return IrInstructionIdSpillBegin;1968 return IrInstGenIdAlloca;
1574}1969}
15751970
1576static constexpr IrInstructionId ir_instruction_id(IrInstructionSpillEnd *) {1971static constexpr IrInstGenId ir_inst_id(IrInstGenConst *) {
1577 return IrInstructionIdSpillEnd;1972 return IrInstGenIdConst;
1578}1973}
15791974
1580static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorExtractElem *) {1975template<typename T>
1581 return IrInstructionIdVectorExtractElem;1976static T *ir_create_instruction(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
1977 const char *name = nullptr;
1978#ifdef ZIG_ENABLE_MEM_PROFILE
1979 T *dummy = nullptr;
1980 name = ir_inst_src_type_str(ir_inst_id(dummy));
1981#endif
1982 T *special_instruction = allocate<T>(1, name);
1983 special_instruction->base.id = ir_inst_id(special_instruction);
1984 special_instruction->base.base.scope = scope;
1985 special_instruction->base.base.source_node = source_node;
1986 special_instruction->base.base.debug_id = exec_next_debug_id(irb->exec);
1987 special_instruction->base.owner_bb = irb->current_basic_block;
1988 return special_instruction;
1582}1989}
15831990
1584template<typename T>1991template<typename T>
1585static T *ir_create_instruction(IrBuilder *irb, Scope *scope, AstNode *source_node) {1992static T *ir_create_inst_gen(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
1586 const char *name = nullptr;1993 const char *name = nullptr;
1587#ifdef ZIG_ENABLE_MEM_PROFILE1994#ifdef ZIG_ENABLE_MEM_PROFILE
1588 T *dummy = nullptr;1995 T *dummy = nullptr;
1589 name = ir_instruction_type_str(ir_instruction_id(dummy));1996 name = ir_inst_gen_type_str(ir_inst_id(dummy));
1590#endif1997#endif
1591 T *special_instruction = allocate<T>(1, name);1998 T *special_instruction = allocate<T>(1, name);
1592 special_instruction->base.id = ir_instruction_id(special_instruction);1999 special_instruction->base.id = ir_inst_id(special_instruction);
1593 special_instruction->base.scope = scope;2000 special_instruction->base.base.scope = scope;
1594 special_instruction->base.source_node = source_node;2001 special_instruction->base.base.source_node = source_node;
1595 special_instruction->base.debug_id = exec_next_debug_id(irb->exec);2002 special_instruction->base.base.debug_id = exec_next_debug_id_gen(irb->exec);
1596 special_instruction->base.owner_bb = irb->current_basic_block;2003 special_instruction->base.owner_bb = irb->current_basic_block;
1597 special_instruction->base.value = allocate<ZigValue>(1, "ZigValue");2004 special_instruction->base.value = allocate<ZigValue>(1, "ZigValue");
1598 return special_instruction;2005 return special_instruction;
1599}2006}
16002007
1601template<typename T>2008template<typename T>
1602static T *ir_create_instruction_noval(IrBuilder *irb, Scope *scope, AstNode *source_node) {2009static T *ir_create_inst_noval(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
1603 const char *name = nullptr;2010 const char *name = nullptr;
1604#ifdef ZIG_ENABLE_MEM_PROFILE2011#ifdef ZIG_ENABLE_MEM_PROFILE
1605 T *dummy = nullptr;2012 T *dummy = nullptr;
1606 name = ir_instruction_type_str(ir_instruction_id(dummy));2013 name = ir_inst_gen_type_str(ir_inst_id(dummy));
1607#endif2014#endif
1608 T *special_instruction = allocate<T>(1, name);2015 T *special_instruction = allocate<T>(1, name);
1609 special_instruction->base.id = ir_instruction_id(special_instruction);2016 special_instruction->base.id = ir_inst_id(special_instruction);
1610 special_instruction->base.scope = scope;2017 special_instruction->base.base.scope = scope;
1611 special_instruction->base.source_node = source_node;2018 special_instruction->base.base.source_node = source_node;
1612 special_instruction->base.debug_id = exec_next_debug_id(irb->exec);2019 special_instruction->base.base.debug_id = exec_next_debug_id_gen(irb->exec);
1613 special_instruction->base.owner_bb = irb->current_basic_block;2020 special_instruction->base.owner_bb = irb->current_basic_block;
1614 return special_instruction;2021 return special_instruction;
1615}2022}
16162023
1617template<typename T>2024template<typename T>
1618static T *ir_build_instruction(IrBuilder *irb, Scope *scope, AstNode *source_node) {2025static T *ir_build_instruction(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
1619 T *special_instruction = ir_create_instruction<T>(irb, scope, source_node);2026 T *special_instruction = ir_create_instruction<T>(irb, scope, source_node);
1620 ir_instruction_append(irb->current_basic_block, &special_instruction->base);2027 ir_instruction_append(irb->current_basic_block, &special_instruction->base);
1621 return special_instruction;2028 return special_instruction;
1622}2029}
16232030
1624static IrInstruction *ir_build_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigType *dest_type,2031template<typename T>
1625 IrInstruction *value, CastOp cast_op)2032static T *ir_build_inst_gen(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
2033 T *special_instruction = ir_create_inst_gen<T>(irb, scope, source_node);
2034 ir_inst_gen_append(irb->current_basic_block, &special_instruction->base);
2035 return special_instruction;
2036}
2037
2038template<typename T>
2039static T *ir_build_inst_noreturn(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
2040 T *special_instruction = ir_create_inst_noval<T>(irb, scope, source_node);
2041 special_instruction->base.value = irb->codegen->intern.for_unreachable();
2042 ir_inst_gen_append(irb->current_basic_block, &special_instruction->base);
2043 return special_instruction;
2044}
2045
2046template<typename T>
2047static T *ir_build_inst_void(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
2048 T *special_instruction = ir_create_inst_noval<T>(irb, scope, source_node);
2049 special_instruction->base.value = irb->codegen->intern.for_void();
2050 ir_inst_gen_append(irb->current_basic_block, &special_instruction->base);
2051 return special_instruction;
2052}
2053
2054IrInstGen *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
2055 ZigType *var_type, const char *name_hint)
1626{2056{
1627 IrInstructionCast *cast_instruction = ir_build_instruction<IrInstructionCast>(irb, scope, source_node);2057 IrInstGenAlloca *alloca_gen = allocate<IrInstGenAlloca>(1);
1628 cast_instruction->dest_type = dest_type;2058 alloca_gen->base.id = IrInstGenIdAlloca;
1629 cast_instruction->value = value;2059 alloca_gen->base.base.source_node = source_node;
1630 cast_instruction->cast_op = cast_op;2060 alloca_gen->base.base.scope = scope;
2061 alloca_gen->base.value = allocate<ZigValue>(1, "ZigValue");
2062 alloca_gen->base.value->type = get_pointer_to_type(g, var_type, false);
2063 alloca_gen->base.base.ref_count = 1;
2064 alloca_gen->name_hint = name_hint;
2065 fn->alloca_gen_list.append(alloca_gen);
2066 return &alloca_gen->base;
2067}
16312068
1632 ir_ref_instruction(value, irb->current_basic_block);2069static IrInstGen *ir_build_cast(IrAnalyze *ira, IrInst *source_instr,ZigType *dest_type,
2070 IrInstGen *value, CastOp cast_op)
2071{
2072 IrInstGenCast *inst = ir_build_inst_gen<IrInstGenCast>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2073 inst->base.value->type = dest_type;
2074 inst->value = value;
2075 inst->cast_op = cast_op;
16332076
1634 return &cast_instruction->base;2077 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
2078
2079 return &inst->base;
1635}2080}
16362081
1637static IrInstruction *ir_build_cond_br(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *condition,2082static IrInstSrc *ir_build_cond_br(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *condition,
1638 IrBasicBlock *then_block, IrBasicBlock *else_block, IrInstruction *is_comptime)2083 IrBasicBlockSrc *then_block, IrBasicBlockSrc *else_block, IrInstSrc *is_comptime)
1639{2084{
1640 IrInstructionCondBr *cond_br_instruction = ir_build_instruction<IrInstructionCondBr>(irb, scope, source_node);2085 IrInstSrcCondBr *inst = ir_build_instruction<IrInstSrcCondBr>(irb, scope, source_node);
1641 cond_br_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;2086 inst->base.is_noreturn = true;
1642 cond_br_instruction->base.value->special = ConstValSpecialStatic;2087 inst->condition = condition;
1643 cond_br_instruction->condition = condition;2088 inst->then_block = then_block;
1644 cond_br_instruction->then_block = then_block;2089 inst->else_block = else_block;
1645 cond_br_instruction->else_block = else_block;2090 inst->is_comptime = is_comptime;
1646 cond_br_instruction->is_comptime = is_comptime;
16472091
1648 ir_ref_instruction(condition, irb->current_basic_block);2092 ir_ref_instruction(condition, irb->current_basic_block);
1649 ir_ref_bb(then_block);2093 ir_ref_bb(then_block);
1650 ir_ref_bb(else_block);2094 ir_ref_bb(else_block);
1651 if (is_comptime != nullptr) ir_ref_instruction(is_comptime, irb->current_basic_block);2095 if (is_comptime != nullptr) ir_ref_instruction(is_comptime, irb->current_basic_block);
16522096
1653 return &cond_br_instruction->base;2097 return &inst->base;
1654}2098}
16552099
1656static IrInstruction *ir_build_return(IrBuilder *irb, Scope *scope, AstNode *source_node,2100static IrInstGen *ir_build_cond_br_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *condition,
1657 IrInstruction *operand)2101 IrBasicBlockGen *then_block, IrBasicBlockGen *else_block)
1658{2102{
1659 IrInstructionReturn *return_instruction = ir_build_instruction<IrInstructionReturn>(irb, scope, source_node);2103 IrInstGenCondBr *inst = ir_build_inst_noreturn<IrInstGenCondBr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
1660 return_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;2104 inst->condition = condition;
1661 return_instruction->base.value->special = ConstValSpecialStatic;2105 inst->then_block = then_block;
1662 return_instruction->operand = operand;2106 inst->else_block = else_block;
2107
2108 ir_ref_inst_gen(condition, ira->new_irb.current_basic_block);
2109 ir_ref_bb_gen(then_block);
2110 ir_ref_bb_gen(else_block);
2111
2112 return &inst->base;
2113}
2114
2115static IrInstSrc *ir_build_return_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *operand) {
2116 IrInstSrcReturn *inst = ir_build_instruction<IrInstSrcReturn>(irb, scope, source_node);
2117 inst->base.is_noreturn = true;
2118 inst->operand = operand;
16632119
1664 if (operand != nullptr) ir_ref_instruction(operand, irb->current_basic_block);2120 if (operand != nullptr) ir_ref_instruction(operand, irb->current_basic_block);
16652121
1666 return &return_instruction->base;2122 return &inst->base;
2123}
2124
2125static IrInstGen *ir_build_return_gen(IrAnalyze *ira, IrInst *source_inst, IrInstGen *operand) {
2126 IrInstGenReturn *inst = ir_build_inst_noreturn<IrInstGenReturn>(&ira->new_irb,
2127 source_inst->scope, source_inst->source_node);
2128 inst->operand = operand;
2129
2130 if (operand != nullptr) ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2131
2132 return &inst->base;
1667}2133}
16682134
1669static IrInstruction *ir_build_const_void(IrBuilder *irb, Scope *scope, AstNode *source_node) {2135static IrInstSrc *ir_build_const_void(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
1670 IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(irb, scope, source_node);2136 IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
1671 ir_instruction_append(irb->current_basic_block, &const_instruction->base);2137 ir_instruction_append(irb->current_basic_block, &const_instruction->base);
1672 const_instruction->base.value = irb->codegen->intern.for_void();2138 const_instruction->value = irb->codegen->intern.for_void();
1673 return &const_instruction->base;2139 return &const_instruction->base;
1674}2140}
16752141
1676static IrInstruction *ir_build_const_undefined(IrBuilder *irb, Scope *scope, AstNode *source_node) {2142static IrInstSrc *ir_build_const_undefined(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
1677 IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(irb, scope, source_node);2143 IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
1678 ir_instruction_append(irb->current_basic_block, &const_instruction->base);2144 ir_instruction_append(irb->current_basic_block, &const_instruction->base);
1679 const_instruction->base.value = irb->codegen->intern.for_undefined();2145 const_instruction->value = irb->codegen->intern.for_undefined();
1680 return &const_instruction->base;2146 return &const_instruction->base;
1681}2147}
16822148
1683static IrInstruction *ir_build_const_uint(IrBuilder *irb, Scope *scope, AstNode *source_node, uint64_t value) {2149static IrInstSrc *ir_build_const_uint(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, uint64_t value) {
1684 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);2150 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
1685 const_instruction->base.value->type = irb->codegen->builtin_types.entry_num_lit_int;2151 const_instruction->value = create_const_vals(1);
1686 const_instruction->base.value->special = ConstValSpecialStatic;2152 const_instruction->value->type = irb->codegen->builtin_types.entry_num_lit_int;
1687 bigint_init_unsigned(&const_instruction->base.value->data.x_bigint, value);2153 const_instruction->value->special = ConstValSpecialStatic;
2154 bigint_init_unsigned(&const_instruction->value->data.x_bigint, value);
1688 return &const_instruction->base;2155 return &const_instruction->base;
1689}2156}
16902157
1691static IrInstruction *ir_build_const_bigint(IrBuilder *irb, Scope *scope, AstNode *source_node, BigInt *bigint) {2158static IrInstSrc *ir_build_const_bigint(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, BigInt *bigint) {
1692 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);2159 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
1693 const_instruction->base.value->type = irb->codegen->builtin_types.entry_num_lit_int;2160 const_instruction->value = create_const_vals(1);
1694 const_instruction->base.value->special = ConstValSpecialStatic;2161 const_instruction->value->type = irb->codegen->builtin_types.entry_num_lit_int;
1695 bigint_init_bigint(&const_instruction->base.value->data.x_bigint, bigint);2162 const_instruction->value->special = ConstValSpecialStatic;
2163 bigint_init_bigint(&const_instruction->value->data.x_bigint, bigint);
1696 return &const_instruction->base;2164 return &const_instruction->base;
1697}2165}
16982166
1699static IrInstruction *ir_build_const_bigfloat(IrBuilder *irb, Scope *scope, AstNode *source_node, BigFloat *bigfloat) {2167static IrInstSrc *ir_build_const_bigfloat(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, BigFloat *bigfloat) {
1700 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);2168 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
1701 const_instruction->base.value->type = irb->codegen->builtin_types.entry_num_lit_float;2169 const_instruction->value = create_const_vals(1);
1702 const_instruction->base.value->special = ConstValSpecialStatic;2170 const_instruction->value->type = irb->codegen->builtin_types.entry_num_lit_float;
1703 bigfloat_init_bigfloat(&const_instruction->base.value->data.x_bigfloat, bigfloat);2171 const_instruction->value->special = ConstValSpecialStatic;
2172 bigfloat_init_bigfloat(&const_instruction->value->data.x_bigfloat, bigfloat);
1704 return &const_instruction->base;2173 return &const_instruction->base;
1705}2174}
17062175
1707static IrInstruction *ir_build_const_null(IrBuilder *irb, Scope *scope, AstNode *source_node) {2176static IrInstSrc *ir_build_const_null(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
1708 IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(irb, scope, source_node);2177 IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
1709 ir_instruction_append(irb->current_basic_block, &const_instruction->base);2178 ir_instruction_append(irb->current_basic_block, &const_instruction->base);
1710 const_instruction->base.value = irb->codegen->intern.for_null();2179 const_instruction->value = irb->codegen->intern.for_null();
1711 return &const_instruction->base;2180 return &const_instruction->base;
1712}2181}
17132182
1714static IrInstruction *ir_build_const_usize(IrBuilder *irb, Scope *scope, AstNode *source_node, uint64_t value) {2183static IrInstSrc *ir_build_const_usize(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, uint64_t value) {
1715 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);2184 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
1716 const_instruction->base.value->type = irb->codegen->builtin_types.entry_usize;2185 const_instruction->value = create_const_vals(1);
1717 const_instruction->base.value->special = ConstValSpecialStatic;2186 const_instruction->value->type = irb->codegen->builtin_types.entry_usize;
1718 bigint_init_unsigned(&const_instruction->base.value->data.x_bigint, value);2187 const_instruction->value->special = ConstValSpecialStatic;
2188 bigint_init_unsigned(&const_instruction->value->data.x_bigint, value);
1719 return &const_instruction->base;2189 return &const_instruction->base;
1720}2190}
17212191
1722static IrInstruction *ir_create_const_type(IrBuilder *irb, Scope *scope, AstNode *source_node,2192static IrInstSrc *ir_create_const_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
1723 ZigType *type_entry)2193 ZigType *type_entry)
1724{2194{
1725 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(irb, scope, source_node);2195 IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
1726 const_instruction->base.value->type = irb->codegen->builtin_types.entry_type;2196 const_instruction->value = create_const_vals(1);
1727 const_instruction->base.value->special = ConstValSpecialStatic;2197 const_instruction->value->type = irb->codegen->builtin_types.entry_type;
1728 const_instruction->base.value->data.x_type = type_entry;2198 const_instruction->value->special = ConstValSpecialStatic;
2199 const_instruction->value->data.x_type = type_entry;
1729 return &const_instruction->base;2200 return &const_instruction->base;
1730}2201}
17312202
1732static IrInstruction *ir_build_const_type(IrBuilder *irb, Scope *scope, AstNode *source_node,2203static IrInstSrc *ir_build_const_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
1733 ZigType *type_entry)2204 ZigType *type_entry)
1734{2205{
1735 IrInstruction *instruction = ir_create_const_type(irb, scope, source_node, type_entry);2206 IrInstSrc *instruction = ir_create_const_type(irb, scope, source_node, type_entry);
1736 ir_instruction_append(irb->current_basic_block, instruction);2207 ir_instruction_append(irb->current_basic_block, instruction);
1737 return instruction;2208 return instruction;
1738}2209}
17392210
1740static IrInstruction *ir_create_const_fn(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigFn *fn_entry) {2211static IrInstSrc *ir_build_const_import(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigType *import) {
1741 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(irb, scope, source_node);2212 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
1742 const_instruction->base.value->type = fn_entry->type_entry;2213 const_instruction->value = create_const_vals(1);
1743 const_instruction->base.value->special = ConstValSpecialStatic;2214 const_instruction->value->type = irb->codegen->builtin_types.entry_type;
1744 const_instruction->base.value->data.x_ptr.data.fn.fn_entry = fn_entry;2215 const_instruction->value->special = ConstValSpecialStatic;
1745 const_instruction->base.value->data.x_ptr.mut = ConstPtrMutComptimeConst;2216 const_instruction->value->data.x_type = import;
1746 const_instruction->base.value->data.x_ptr.special = ConstPtrSpecialFunction;
1747 return &const_instruction->base;
1748}
1749
1750static IrInstruction *ir_build_const_import(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigType *import) {
1751 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1752 const_instruction->base.value->type = irb->codegen->builtin_types.entry_type;
1753 const_instruction->base.value->special = ConstValSpecialStatic;
1754 const_instruction->base.value->data.x_type = import;
1755 return &const_instruction->base;
1756}
1757
1758static IrInstruction *ir_build_const_bool(IrBuilder *irb, Scope *scope, AstNode *source_node, bool value) {
1759 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1760 const_instruction->base.value->type = irb->codegen->builtin_types.entry_bool;
1761 const_instruction->base.value->special = ConstValSpecialStatic;
1762 const_instruction->base.value->data.x_bool = value;
1763 return &const_instruction->base;2217 return &const_instruction->base;
1764}2218}
17652219
1766static IrInstruction *ir_build_const_enum_literal(IrBuilder *irb, Scope *scope, AstNode *source_node, Buf *name) {2220static IrInstSrc *ir_build_const_bool(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, bool value) {
1767 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);2221 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
1768 const_instruction->base.value->type = irb->codegen->builtin_types.entry_enum_literal;2222 const_instruction->value = create_const_vals(1);
1769 const_instruction->base.value->special = ConstValSpecialStatic;2223 const_instruction->value->type = irb->codegen->builtin_types.entry_bool;
1770 const_instruction->base.value->data.x_enum_literal = name;2224 const_instruction->value->special = ConstValSpecialStatic;
2225 const_instruction->value->data.x_bool = value;
1771 return &const_instruction->base;2226 return &const_instruction->base;
1772}2227}
17732228
1774static IrInstruction *ir_build_const_bound_fn(IrBuilder *irb, Scope *scope, AstNode *source_node,2229static IrInstSrc *ir_build_const_enum_literal(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *name) {
1775 ZigFn *fn_entry, IrInstruction *first_arg)2230 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
1776{2231 const_instruction->value = create_const_vals(1);
1777 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);2232 const_instruction->value->type = irb->codegen->builtin_types.entry_enum_literal;
1778 const_instruction->base.value->type = get_bound_fn_type(irb->codegen, fn_entry);2233 const_instruction->value->special = ConstValSpecialStatic;
1779 const_instruction->base.value->special = ConstValSpecialStatic;2234 const_instruction->value->data.x_enum_literal = name;
1780 const_instruction->base.value->data.x_bound_fn.fn = fn_entry;
1781 const_instruction->base.value->data.x_bound_fn.first_arg = first_arg;
1782 return &const_instruction->base;2235 return &const_instruction->base;
1783}2236}
17842237
1785static IrInstruction *ir_create_const_str_lit(IrBuilder *irb, Scope *scope, AstNode *source_node, Buf *str) {2238static IrInstSrc *ir_create_const_str_lit(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *str) {
1786 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(irb, scope, source_node);2239 IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
1787 init_const_str_lit(irb->codegen, const_instruction->base.value, str);2240 const_instruction->value = create_const_vals(1);
2241 init_const_str_lit(irb->codegen, const_instruction->value, str);
17882242
1789 return &const_instruction->base;2243 return &const_instruction->base;
1790}2244}
17912245
1792static IrInstruction *ir_build_const_str_lit(IrBuilder *irb, Scope *scope, AstNode *source_node, Buf *str) {2246static IrInstSrc *ir_build_const_str_lit(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *str) {
1793 IrInstruction *instruction = ir_create_const_str_lit(irb, scope, source_node, str);2247 IrInstSrc *instruction = ir_create_const_str_lit(irb, scope, source_node, str);
1794 ir_instruction_append(irb->current_basic_block, instruction);2248 ir_instruction_append(irb->current_basic_block, instruction);
1795 return instruction;2249 return instruction;
1796}2250}
17972251
1798static IrInstruction *ir_build_bin_op(IrBuilder *irb, Scope *scope, AstNode *source_node, IrBinOp op_id,2252static IrInstSrc *ir_build_bin_op(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrBinOp op_id,
1799 IrInstruction *op1, IrInstruction *op2, bool safety_check_on)2253 IrInstSrc *op1, IrInstSrc *op2, bool safety_check_on)
1800{2254{
1801 IrInstructionBinOp *bin_op_instruction = ir_build_instruction<IrInstructionBinOp>(irb, scope, source_node);2255 IrInstSrcBinOp *inst = ir_build_instruction<IrInstSrcBinOp>(irb, scope, source_node);
1802 bin_op_instruction->op_id = op_id;2256 inst->op_id = op_id;
1803 bin_op_instruction->op1 = op1;2257 inst->op1 = op1;
1804 bin_op_instruction->op2 = op2;2258 inst->op2 = op2;
1805 bin_op_instruction->safety_check_on = safety_check_on;2259 inst->safety_check_on = safety_check_on;
18062260
1807 ir_ref_instruction(op1, irb->current_basic_block);2261 ir_ref_instruction(op1, irb->current_basic_block);
1808 ir_ref_instruction(op2, irb->current_basic_block);2262 ir_ref_instruction(op2, irb->current_basic_block);
18092263
1810 return &bin_op_instruction->base;2264 return &inst->base;
1811}2265}
18122266
1813static IrInstruction *ir_build_bin_op_gen(IrAnalyze *ira, IrInstruction *source_instr, ZigType *res_type,2267static IrInstGen *ir_build_bin_op_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *res_type,
1814 IrBinOp op_id, IrInstruction *op1, IrInstruction *op2, bool safety_check_on)2268 IrBinOp op_id, IrInstGen *op1, IrInstGen *op2, bool safety_check_on)
1815{2269{
1816 IrInstructionBinOp *bin_op_instruction = ir_build_instruction<IrInstructionBinOp>(&ira->new_irb,2270 IrInstGenBinOp *inst = ir_build_inst_gen<IrInstGenBinOp>(&ira->new_irb,
1817 source_instr->scope, source_instr->source_node);2271 source_instr->scope, source_instr->source_node);
1818 bin_op_instruction->base.value->type = res_type;2272 inst->base.value->type = res_type;
1819 bin_op_instruction->op_id = op_id;2273 inst->op_id = op_id;
1820 bin_op_instruction->op1 = op1;2274 inst->op1 = op1;
1821 bin_op_instruction->op2 = op2;2275 inst->op2 = op2;
1822 bin_op_instruction->safety_check_on = safety_check_on;2276 inst->safety_check_on = safety_check_on;
18232277
1824 ir_ref_instruction(op1, ira->new_irb.current_basic_block);2278 ir_ref_inst_gen(op1, ira->new_irb.current_basic_block);
1825 ir_ref_instruction(op2, ira->new_irb.current_basic_block);2279 ir_ref_inst_gen(op2, ira->new_irb.current_basic_block);
18262280
1827 return &bin_op_instruction->base;2281 return &inst->base;
1828}2282}
18292283
18302284
1831static IrInstruction *ir_build_merge_err_sets(IrBuilder *irb, Scope *scope, AstNode *source_node,2285static IrInstSrc *ir_build_merge_err_sets(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
1832 IrInstruction *op1, IrInstruction *op2, Buf *type_name)2286 IrInstSrc *op1, IrInstSrc *op2, Buf *type_name)
1833{2287{
1834 IrInstructionMergeErrSets *merge_err_sets_instruction = ir_build_instruction<IrInstructionMergeErrSets>(irb, scope, source_node);2288 IrInstSrcMergeErrSets *inst = ir_build_instruction<IrInstSrcMergeErrSets>(irb, scope, source_node);
1835 merge_err_sets_instruction->op1 = op1;2289 inst->op1 = op1;
1836 merge_err_sets_instruction->op2 = op2;2290 inst->op2 = op2;
1837 merge_err_sets_instruction->type_name = type_name;2291 inst->type_name = type_name;
18382292
1839 ir_ref_instruction(op1, irb->current_basic_block);2293 ir_ref_instruction(op1, irb->current_basic_block);
1840 ir_ref_instruction(op2, irb->current_basic_block);2294 ir_ref_instruction(op2, irb->current_basic_block);
18412295
1842 return &merge_err_sets_instruction->base;2296 return &inst->base;
1843}2297}
18442298
1845static IrInstruction *ir_build_var_ptr_x(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigVar *var,2299static IrInstSrc *ir_build_var_ptr_x(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigVar *var,
1846 ScopeFnDef *crossed_fndef_scope)2300 ScopeFnDef *crossed_fndef_scope)
1847{2301{
1848 IrInstructionVarPtr *instruction = ir_build_instruction<IrInstructionVarPtr>(irb, scope, source_node);2302 IrInstSrcVarPtr *instruction = ir_build_instruction<IrInstSrcVarPtr>(irb, scope, source_node);
1849 instruction->var = var;2303 instruction->var = var;
1850 instruction->crossed_fndef_scope = crossed_fndef_scope;2304 instruction->crossed_fndef_scope = crossed_fndef_scope;
18512305
...@@ -1854,24 +2308,30 @@ static IrInstruction *ir_build_var_ptr_x(IrBuilder *irb, Scope *scope, AstNode *...@@ -1854,24 +2308,30 @@ static IrInstruction *ir_build_var_ptr_x(IrBuilder *irb, Scope *scope, AstNode *
1854 return &instruction->base;2308 return &instruction->base;
1855}2309}
18562310
1857static IrInstruction *ir_build_var_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigVar *var) {2311static IrInstSrc *ir_build_var_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigVar *var) {
1858 return ir_build_var_ptr_x(irb, scope, source_node, var, nullptr);2312 return ir_build_var_ptr_x(irb, scope, source_node, var, nullptr);
1859}2313}
18602314
1861static IrInstruction *ir_build_return_ptr(IrAnalyze *ira, Scope *scope, AstNode *source_node,2315static IrInstGen *ir_build_var_ptr_gen(IrAnalyze *ira, IrInst *source_instr, ZigVar *var) {
1862 ZigType *ty)2316 IrInstGenVarPtr *instruction = ir_build_inst_gen<IrInstGenVarPtr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
1863{2317 instruction->var = var;
1864 IrInstructionReturnPtr *instruction = ir_build_instruction<IrInstructionReturnPtr>(&ira->new_irb,2318
1865 scope, source_node);2319 ir_ref_var(var);
2320
2321 return &instruction->base;
2322}
2323
2324static IrInstGen *ir_build_return_ptr(IrAnalyze *ira, Scope *scope, AstNode *source_node, ZigType *ty) {
2325 IrInstGenReturnPtr *instruction = ir_build_inst_gen<IrInstGenReturnPtr>(&ira->new_irb, scope, source_node);
1866 instruction->base.value->type = ty;2326 instruction->base.value->type = ty;
1867 return &instruction->base;2327 return &instruction->base;
1868}2328}
18692329
1870static IrInstruction *ir_build_elem_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,2330static IrInstSrc *ir_build_elem_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
1871 IrInstruction *array_ptr, IrInstruction *elem_index, bool safety_check_on, PtrLen ptr_len,2331 IrInstSrc *array_ptr, IrInstSrc *elem_index, bool safety_check_on, PtrLen ptr_len,
1872 AstNode *init_array_type_source_node)2332 AstNode *init_array_type_source_node)
1873{2333{
1874 IrInstructionElemPtr *instruction = ir_build_instruction<IrInstructionElemPtr>(irb, scope, source_node);2334 IrInstSrcElemPtr *instruction = ir_build_instruction<IrInstSrcElemPtr>(irb, scope, source_node);
1875 instruction->array_ptr = array_ptr;2335 instruction->array_ptr = array_ptr;
1876 instruction->elem_index = elem_index;2336 instruction->elem_index = elem_index;
1877 instruction->safety_check_on = safety_check_on;2337 instruction->safety_check_on = safety_check_on;
...@@ -1884,10 +2344,25 @@ static IrInstruction *ir_build_elem_ptr(IrBuilder *irb, Scope *scope, AstNode *s...@@ -1884,10 +2344,25 @@ static IrInstruction *ir_build_elem_ptr(IrBuilder *irb, Scope *scope, AstNode *s
1884 return &instruction->base;2344 return &instruction->base;
1885}2345}
18862346
1887static IrInstruction *ir_build_field_ptr_instruction(IrBuilder *irb, Scope *scope, AstNode *source_node,2347static IrInstGen *ir_build_elem_ptr_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
1888 IrInstruction *container_ptr, IrInstruction *field_name_expr, bool initializing)2348 IrInstGen *array_ptr, IrInstGen *elem_index, bool safety_check_on, ZigType *return_type)
1889{2349{
1890 IrInstructionFieldPtr *instruction = ir_build_instruction<IrInstructionFieldPtr>(irb, scope, source_node);2350 IrInstGenElemPtr *instruction = ir_build_inst_gen<IrInstGenElemPtr>(&ira->new_irb, scope, source_node);
2351 instruction->base.value->type = return_type;
2352 instruction->array_ptr = array_ptr;
2353 instruction->elem_index = elem_index;
2354 instruction->safety_check_on = safety_check_on;
2355
2356 ir_ref_inst_gen(array_ptr, ira->new_irb.current_basic_block);
2357 ir_ref_inst_gen(elem_index, ira->new_irb.current_basic_block);
2358
2359 return &instruction->base;
2360}
2361
2362static IrInstSrc *ir_build_field_ptr_instruction(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2363 IrInstSrc *container_ptr, IrInstSrc *field_name_expr, bool initializing)
2364{
2365 IrInstSrcFieldPtr *instruction = ir_build_instruction<IrInstSrcFieldPtr>(irb, scope, source_node);
1891 instruction->container_ptr = container_ptr;2366 instruction->container_ptr = container_ptr;
1892 instruction->field_name_buffer = nullptr;2367 instruction->field_name_buffer = nullptr;
1893 instruction->field_name_expr = field_name_expr;2368 instruction->field_name_expr = field_name_expr;
...@@ -1899,10 +2374,10 @@ static IrInstruction *ir_build_field_ptr_instruction(IrBuilder *irb, Scope *scop...@@ -1899,10 +2374,10 @@ static IrInstruction *ir_build_field_ptr_instruction(IrBuilder *irb, Scope *scop
1899 return &instruction->base;2374 return &instruction->base;
1900}2375}
19012376
1902static IrInstruction *ir_build_field_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,2377static IrInstSrc *ir_build_field_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
1903 IrInstruction *container_ptr, Buf *field_name, bool initializing)2378 IrInstSrc *container_ptr, Buf *field_name, bool initializing)
1904{2379{
1905 IrInstructionFieldPtr *instruction = ir_build_instruction<IrInstructionFieldPtr>(irb, scope, source_node);2380 IrInstSrcFieldPtr *instruction = ir_build_instruction<IrInstSrcFieldPtr>(irb, scope, source_node);
1906 instruction->container_ptr = container_ptr;2381 instruction->container_ptr = container_ptr;
1907 instruction->field_name_buffer = field_name;2382 instruction->field_name_buffer = field_name;
1908 instruction->field_name_expr = nullptr;2383 instruction->field_name_expr = nullptr;
...@@ -1913,10 +2388,10 @@ static IrInstruction *ir_build_field_ptr(IrBuilder *irb, Scope *scope, AstNode *...@@ -1913,10 +2388,10 @@ static IrInstruction *ir_build_field_ptr(IrBuilder *irb, Scope *scope, AstNode *
1913 return &instruction->base;2388 return &instruction->base;
1914}2389}
19152390
1916static IrInstruction *ir_build_has_field(IrBuilder *irb, Scope *scope, AstNode *source_node,2391static IrInstSrc *ir_build_has_field(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
1917 IrInstruction *container_type, IrInstruction *field_name)2392 IrInstSrc *container_type, IrInstSrc *field_name)
1918{2393{
1919 IrInstructionHasField *instruction = ir_build_instruction<IrInstructionHasField>(irb, scope, source_node);2394 IrInstSrcHasField *instruction = ir_build_instruction<IrInstSrcHasField>(irb, scope, source_node);
1920 instruction->container_type = container_type;2395 instruction->container_type = container_type;
1921 instruction->field_name = field_name;2396 instruction->field_name = field_name;
19222397
...@@ -1926,36 +2401,39 @@ static IrInstruction *ir_build_has_field(IrBuilder *irb, Scope *scope, AstNode *...@@ -1926,36 +2401,39 @@ static IrInstruction *ir_build_has_field(IrBuilder *irb, Scope *scope, AstNode *
1926 return &instruction->base;2401 return &instruction->base;
1927}2402}
19282403
1929static IrInstruction *ir_build_struct_field_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,2404static IrInstGen *ir_build_struct_field_ptr(IrAnalyze *ira, IrInst *source_instr,
1930 IrInstruction *struct_ptr, TypeStructField *field)2405 IrInstGen *struct_ptr, TypeStructField *field, ZigType *ptr_type)
1931{2406{
1932 IrInstructionStructFieldPtr *instruction = ir_build_instruction<IrInstructionStructFieldPtr>(irb, scope, source_node);2407 IrInstGenStructFieldPtr *inst = ir_build_inst_gen<IrInstGenStructFieldPtr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
1933 instruction->struct_ptr = struct_ptr;2408 inst->base.value->type = ptr_type;
1934 instruction->field = field;2409 inst->struct_ptr = struct_ptr;
2410 inst->field = field;
19352411
1936 ir_ref_instruction(struct_ptr, irb->current_basic_block);2412 ir_ref_inst_gen(struct_ptr, ira->new_irb.current_basic_block);
19372413
1938 return &instruction->base;2414 return &inst->base;
1939}2415}
19402416
1941static IrInstruction *ir_build_union_field_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,2417static IrInstGen *ir_build_union_field_ptr(IrAnalyze *ira, IrInst *source_instr,
1942 IrInstruction *union_ptr, TypeUnionField *field, bool safety_check_on, bool initializing)2418 IrInstGen *union_ptr, TypeUnionField *field, bool safety_check_on, bool initializing, ZigType *ptr_type)
1943{2419{
1944 IrInstructionUnionFieldPtr *instruction = ir_build_instruction<IrInstructionUnionFieldPtr>(irb, scope, source_node);2420 IrInstGenUnionFieldPtr *inst = ir_build_inst_gen<IrInstGenUnionFieldPtr>(&ira->new_irb,
1945 instruction->initializing = initializing;2421 source_instr->scope, source_instr->source_node);
1946 instruction->safety_check_on = safety_check_on;2422 inst->base.value->type = ptr_type;
1947 instruction->union_ptr = union_ptr;2423 inst->initializing = initializing;
1948 instruction->field = field;2424 inst->safety_check_on = safety_check_on;
2425 inst->union_ptr = union_ptr;
2426 inst->field = field;
19492427
1950 ir_ref_instruction(union_ptr, irb->current_basic_block);2428 ir_ref_inst_gen(union_ptr, ira->new_irb.current_basic_block);
19512429
1952 return &instruction->base;2430 return &inst->base;
1953}2431}
19542432
1955static IrInstruction *ir_build_call_extra(IrBuilder *irb, Scope *scope, AstNode *source_node,2433static IrInstSrc *ir_build_call_extra(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
1956 IrInstruction *options, IrInstruction *fn_ref, IrInstruction *args, ResultLoc *result_loc)2434 IrInstSrc *options, IrInstSrc *fn_ref, IrInstSrc *args, ResultLoc *result_loc)
1957{2435{
1958 IrInstructionCallExtra *call_instruction = ir_build_instruction<IrInstructionCallExtra>(irb, scope, source_node);2436 IrInstSrcCallExtra *call_instruction = ir_build_instruction<IrInstSrcCallExtra>(irb, scope, source_node);
1959 call_instruction->options = options;2437 call_instruction->options = options;
1960 call_instruction->fn_ref = fn_ref;2438 call_instruction->fn_ref = fn_ref;
1961 call_instruction->args = args;2439 call_instruction->args = args;
...@@ -1968,11 +2446,11 @@ static IrInstruction *ir_build_call_extra(IrBuilder *irb, Scope *scope, AstNode...@@ -1968,11 +2446,11 @@ static IrInstruction *ir_build_call_extra(IrBuilder *irb, Scope *scope, AstNode
1968 return &call_instruction->base;2446 return &call_instruction->base;
1969}2447}
19702448
1971static IrInstruction *ir_build_call_src_args(IrBuilder *irb, Scope *scope, AstNode *source_node,2449static IrInstSrc *ir_build_call_args(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
1972 IrInstruction *options, IrInstruction *fn_ref, IrInstruction **args_ptr, size_t args_len,2450 IrInstSrc *options, IrInstSrc *fn_ref, IrInstSrc **args_ptr, size_t args_len,
1973 ResultLoc *result_loc)2451 ResultLoc *result_loc)
1974{2452{
1975 IrInstructionCallSrcArgs *call_instruction = ir_build_instruction<IrInstructionCallSrcArgs>(irb, scope, source_node);2453 IrInstSrcCallArgs *call_instruction = ir_build_instruction<IrInstSrcCallArgs>(irb, scope, source_node);
1976 call_instruction->options = options;2454 call_instruction->options = options;
1977 call_instruction->fn_ref = fn_ref;2455 call_instruction->fn_ref = fn_ref;
1978 call_instruction->args_ptr = args_ptr;2456 call_instruction->args_ptr = args_ptr;
...@@ -1987,12 +2465,12 @@ static IrInstruction *ir_build_call_src_args(IrBuilder *irb, Scope *scope, AstNo...@@ -1987,12 +2465,12 @@ static IrInstruction *ir_build_call_src_args(IrBuilder *irb, Scope *scope, AstNo
1987 return &call_instruction->base;2465 return &call_instruction->base;
1988}2466}
19892467
1990static IrInstruction *ir_build_call_src(IrBuilder *irb, Scope *scope, AstNode *source_node,2468static IrInstSrc *ir_build_call_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
1991 ZigFn *fn_entry, IrInstruction *fn_ref, size_t arg_count, IrInstruction **args,2469 ZigFn *fn_entry, IrInstSrc *fn_ref, size_t arg_count, IrInstSrc **args,
1992 IrInstruction *ret_ptr, CallModifier modifier, bool is_async_call_builtin,2470 IrInstSrc *ret_ptr, CallModifier modifier, bool is_async_call_builtin,
1993 IrInstruction *new_stack, ResultLoc *result_loc)2471 IrInstSrc *new_stack, ResultLoc *result_loc)
1994{2472{
1995 IrInstructionCallSrc *call_instruction = ir_build_instruction<IrInstructionCallSrc>(irb, scope, source_node);2473 IrInstSrcCall *call_instruction = ir_build_instruction<IrInstSrcCall>(irb, scope, source_node);
1996 call_instruction->fn_entry = fn_entry;2474 call_instruction->fn_entry = fn_entry;
1997 call_instruction->fn_ref = fn_ref;2475 call_instruction->fn_ref = fn_ref;
1998 call_instruction->args = args;2476 call_instruction->args = args;
...@@ -2012,12 +2490,12 @@ static IrInstruction *ir_build_call_src(IrBuilder *irb, Scope *scope, AstNode *s...@@ -2012,12 +2490,12 @@ static IrInstruction *ir_build_call_src(IrBuilder *irb, Scope *scope, AstNode *s
2012 return &call_instruction->base;2490 return &call_instruction->base;
2013}2491}
20142492
2015static IrInstructionCallGen *ir_build_call_gen(IrAnalyze *ira, IrInstruction *source_instruction,2493static IrInstGenCall *ir_build_call_gen(IrAnalyze *ira, IrInst *source_instruction,
2016 ZigFn *fn_entry, IrInstruction *fn_ref, size_t arg_count, IrInstruction **args,2494 ZigFn *fn_entry, IrInstGen *fn_ref, size_t arg_count, IrInstGen **args,
2017 CallModifier modifier, IrInstruction *new_stack, bool is_async_call_builtin,2495 CallModifier modifier, IrInstGen *new_stack, bool is_async_call_builtin,
2018 IrInstruction *result_loc, ZigType *return_type)2496 IrInstGen *result_loc, ZigType *return_type)
2019{2497{
2020 IrInstructionCallGen *call_instruction = ir_build_instruction<IrInstructionCallGen>(&ira->new_irb,2498 IrInstGenCall *call_instruction = ir_build_inst_gen<IrInstGenCall>(&ira->new_irb,
2021 source_instruction->scope, source_instruction->source_node);2499 source_instruction->scope, source_instruction->source_node);
2022 call_instruction->base.value->type = return_type;2500 call_instruction->base.value->type = return_type;
2023 call_instruction->fn_entry = fn_entry;2501 call_instruction->fn_entry = fn_entry;
...@@ -2029,23 +2507,23 @@ static IrInstructionCallGen *ir_build_call_gen(IrAnalyze *ira, IrInstruction *so...@@ -2029,23 +2507,23 @@ static IrInstructionCallGen *ir_build_call_gen(IrAnalyze *ira, IrInstruction *so
2029 call_instruction->new_stack = new_stack;2507 call_instruction->new_stack = new_stack;
2030 call_instruction->result_loc = result_loc;2508 call_instruction->result_loc = result_loc;
20312509
2032 if (fn_ref != nullptr) ir_ref_instruction(fn_ref, ira->new_irb.current_basic_block);2510 if (fn_ref != nullptr) ir_ref_inst_gen(fn_ref, ira->new_irb.current_basic_block);
2033 for (size_t i = 0; i < arg_count; i += 1)2511 for (size_t i = 0; i < arg_count; i += 1)
2034 ir_ref_instruction(args[i], ira->new_irb.current_basic_block);2512 ir_ref_inst_gen(args[i], ira->new_irb.current_basic_block);
2035 if (new_stack != nullptr) ir_ref_instruction(new_stack, ira->new_irb.current_basic_block);2513 if (new_stack != nullptr) ir_ref_inst_gen(new_stack, ira->new_irb.current_basic_block);
2036 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);2514 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
20372515
2038 return call_instruction;2516 return call_instruction;
2039}2517}
20402518
2041static IrInstruction *ir_build_phi(IrBuilder *irb, Scope *scope, AstNode *source_node,2519static IrInstSrc *ir_build_phi(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2042 size_t incoming_count, IrBasicBlock **incoming_blocks, IrInstruction **incoming_values,2520 size_t incoming_count, IrBasicBlockSrc **incoming_blocks, IrInstSrc **incoming_values,
2043 ResultLocPeerParent *peer_parent)2521 ResultLocPeerParent *peer_parent)
2044{2522{
2045 assert(incoming_count != 0);2523 assert(incoming_count != 0);
2046 assert(incoming_count != SIZE_MAX);2524 assert(incoming_count != SIZE_MAX);
20472525
2048 IrInstructionPhi *phi_instruction = ir_build_instruction<IrInstructionPhi>(irb, scope, source_node);2526 IrInstSrcPhi *phi_instruction = ir_build_instruction<IrInstSrcPhi>(irb, scope, source_node);
2049 phi_instruction->incoming_count = incoming_count;2527 phi_instruction->incoming_count = incoming_count;
2050 phi_instruction->incoming_blocks = incoming_blocks;2528 phi_instruction->incoming_blocks = incoming_blocks;
2051 phi_instruction->incoming_values = incoming_values;2529 phi_instruction->incoming_values = incoming_values;
...@@ -2059,56 +2537,77 @@ static IrInstruction *ir_build_phi(IrBuilder *irb, Scope *scope, AstNode *source...@@ -2059,56 +2537,77 @@ static IrInstruction *ir_build_phi(IrBuilder *irb, Scope *scope, AstNode *source
2059 return &phi_instruction->base;2537 return &phi_instruction->base;
2060}2538}
20612539
2062static IrInstruction *ir_create_br(IrBuilder *irb, Scope *scope, AstNode *source_node,2540static IrInstGen *ir_build_phi_gen(IrAnalyze *ira, IrInst *source_instr, size_t incoming_count,
2063 IrBasicBlock *dest_block, IrInstruction *is_comptime)2541 IrBasicBlockGen **incoming_blocks, IrInstGen **incoming_values, ZigType *result_type)
2064{2542{
2065 IrInstructionBr *br_instruction = ir_create_instruction<IrInstructionBr>(irb, scope, source_node);2543 assert(incoming_count != 0);
2066 br_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;2544 assert(incoming_count != SIZE_MAX);
2067 br_instruction->base.value->special = ConstValSpecialStatic;2545
2068 br_instruction->dest_block = dest_block;2546 IrInstGenPhi *phi_instruction = ir_build_inst_gen<IrInstGenPhi>(&ira->new_irb,
2069 br_instruction->is_comptime = is_comptime;2547 source_instr->scope, source_instr->source_node);
2548 phi_instruction->base.value->type = result_type;
2549 phi_instruction->incoming_count = incoming_count;
2550 phi_instruction->incoming_blocks = incoming_blocks;
2551 phi_instruction->incoming_values = incoming_values;
2552
2553 for (size_t i = 0; i < incoming_count; i += 1) {
2554 ir_ref_bb_gen(incoming_blocks[i]);
2555 ir_ref_inst_gen(incoming_values[i], ira->new_irb.current_basic_block);
2556 }
2557
2558 return &phi_instruction->base;
2559}
2560
2561static IrInstSrc *ir_build_br(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2562 IrBasicBlockSrc *dest_block, IrInstSrc *is_comptime)
2563{
2564 IrInstSrcBr *inst = ir_build_instruction<IrInstSrcBr>(irb, scope, source_node);
2565 inst->base.is_noreturn = true;
2566 inst->dest_block = dest_block;
2567 inst->is_comptime = is_comptime;
20702568
2071 ir_ref_bb(dest_block);2569 ir_ref_bb(dest_block);
2072 if (is_comptime) ir_ref_instruction(is_comptime, irb->current_basic_block);2570 if (is_comptime) ir_ref_instruction(is_comptime, irb->current_basic_block);
20732571
2074 return &br_instruction->base;2572 return &inst->base;
2075}2573}
20762574
2077static IrInstruction *ir_build_br(IrBuilder *irb, Scope *scope, AstNode *source_node,2575static IrInstGen *ir_build_br_gen(IrAnalyze *ira, IrInst *source_instr, IrBasicBlockGen *dest_block) {
2078 IrBasicBlock *dest_block, IrInstruction *is_comptime)2576 IrInstGenBr *inst = ir_build_inst_noreturn<IrInstGenBr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2079{2577 inst->dest_block = dest_block;
2080 IrInstruction *instruction = ir_create_br(irb, scope, source_node, dest_block, is_comptime);2578
2081 ir_instruction_append(irb->current_basic_block, instruction);2579 ir_ref_bb_gen(dest_block);
2082 return instruction;2580
2581 return &inst->base;
2083}2582}
20842583
2085static IrInstruction *ir_build_ptr_type(IrBuilder *irb, Scope *scope, AstNode *source_node,2584static IrInstSrc *ir_build_ptr_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2086 IrInstruction *child_type, bool is_const, bool is_volatile, PtrLen ptr_len,2585 IrInstSrc *child_type, bool is_const, bool is_volatile, PtrLen ptr_len,
2087 IrInstruction *sentinel, IrInstruction *align_value,2586 IrInstSrc *sentinel, IrInstSrc *align_value,
2088 uint32_t bit_offset_start, uint32_t host_int_bytes, bool is_allow_zero)2587 uint32_t bit_offset_start, uint32_t host_int_bytes, bool is_allow_zero)
2089{2588{
2090 IrInstructionPtrType *ptr_type_of_instruction = ir_build_instruction<IrInstructionPtrType>(irb, scope, source_node);2589 IrInstSrcPtrType *inst = ir_build_instruction<IrInstSrcPtrType>(irb, scope, source_node);
2091 ptr_type_of_instruction->sentinel = sentinel;2590 inst->sentinel = sentinel;
2092 ptr_type_of_instruction->align_value = align_value;2591 inst->align_value = align_value;
2093 ptr_type_of_instruction->child_type = child_type;2592 inst->child_type = child_type;
2094 ptr_type_of_instruction->is_const = is_const;2593 inst->is_const = is_const;
2095 ptr_type_of_instruction->is_volatile = is_volatile;2594 inst->is_volatile = is_volatile;
2096 ptr_type_of_instruction->ptr_len = ptr_len;2595 inst->ptr_len = ptr_len;
2097 ptr_type_of_instruction->bit_offset_start = bit_offset_start;2596 inst->bit_offset_start = bit_offset_start;
2098 ptr_type_of_instruction->host_int_bytes = host_int_bytes;2597 inst->host_int_bytes = host_int_bytes;
2099 ptr_type_of_instruction->is_allow_zero = is_allow_zero;2598 inst->is_allow_zero = is_allow_zero;
21002599
2101 if (sentinel) ir_ref_instruction(sentinel, irb->current_basic_block);2600 if (sentinel) ir_ref_instruction(sentinel, irb->current_basic_block);
2102 if (align_value) ir_ref_instruction(align_value, irb->current_basic_block);2601 if (align_value) ir_ref_instruction(align_value, irb->current_basic_block);
2103 ir_ref_instruction(child_type, irb->current_basic_block);2602 ir_ref_instruction(child_type, irb->current_basic_block);
21042603
2105 return &ptr_type_of_instruction->base;2604 return &inst->base;
2106}2605}
21072606
2108static IrInstruction *ir_build_un_op_lval(IrBuilder *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,2607static IrInstSrc *ir_build_un_op_lval(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,
2109 IrInstruction *value, LVal lval, ResultLoc *result_loc)2608 IrInstSrc *value, LVal lval, ResultLoc *result_loc)
2110{2609{
2111 IrInstructionUnOp *instruction = ir_build_instruction<IrInstructionUnOp>(irb, scope, source_node);2610 IrInstSrcUnOp *instruction = ir_build_instruction<IrInstSrcUnOp>(irb, scope, source_node);
2112 instruction->op_id = op_id;2611 instruction->op_id = op_id;
2113 instruction->value = value;2612 instruction->value = value;
2114 instruction->lval = lval;2613 instruction->lval = lval;
...@@ -2119,18 +2618,55 @@ static IrInstruction *ir_build_un_op_lval(IrBuilder *irb, Scope *scope, AstNode...@@ -2119,18 +2618,55 @@ static IrInstruction *ir_build_un_op_lval(IrBuilder *irb, Scope *scope, AstNode
2119 return &instruction->base;2618 return &instruction->base;
2120}2619}
21212620
2122static IrInstruction *ir_build_un_op(IrBuilder *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,2621static IrInstSrc *ir_build_un_op(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,
2123 IrInstruction *value)2622 IrInstSrc *value)
2124{2623{
2125 return ir_build_un_op_lval(irb, scope, source_node, op_id, value, LValNone, nullptr);2624 return ir_build_un_op_lval(irb, scope, source_node, op_id, value, LValNone, nullptr);
2126}2625}
21272626
2128static IrInstruction *ir_build_container_init_list(IrBuilder *irb, Scope *scope, AstNode *source_node,2627static IrInstGen *ir_build_negation(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand, ZigType *expr_type) {
2129 size_t item_count, IrInstruction **elem_result_loc_list, IrInstruction *result_loc,2628 IrInstGenNegation *instruction = ir_build_inst_gen<IrInstGenNegation>(&ira->new_irb,
2629 source_instr->scope, source_instr->source_node);
2630 instruction->base.value->type = expr_type;
2631 instruction->operand = operand;
2632
2633 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2634
2635 return &instruction->base;
2636}
2637
2638static IrInstGen *ir_build_negation_wrapping(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
2639 ZigType *expr_type)
2640{
2641 IrInstGenNegationWrapping *instruction = ir_build_inst_gen<IrInstGenNegationWrapping>(&ira->new_irb,
2642 source_instr->scope, source_instr->source_node);
2643 instruction->base.value->type = expr_type;
2644 instruction->operand = operand;
2645
2646 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2647
2648 return &instruction->base;
2649}
2650
2651static IrInstGen *ir_build_binary_not(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
2652 ZigType *expr_type)
2653{
2654 IrInstGenBinaryNot *instruction = ir_build_inst_gen<IrInstGenBinaryNot>(&ira->new_irb,
2655 source_instr->scope, source_instr->source_node);
2656 instruction->base.value->type = expr_type;
2657 instruction->operand = operand;
2658
2659 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2660
2661 return &instruction->base;
2662}
2663
2664static IrInstSrc *ir_build_container_init_list(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2665 size_t item_count, IrInstSrc **elem_result_loc_list, IrInstSrc *result_loc,
2130 AstNode *init_array_type_source_node)2666 AstNode *init_array_type_source_node)
2131{2667{
2132 IrInstructionContainerInitList *container_init_list_instruction =2668 IrInstSrcContainerInitList *container_init_list_instruction =
2133 ir_build_instruction<IrInstructionContainerInitList>(irb, scope, source_node);2669 ir_build_instruction<IrInstSrcContainerInitList>(irb, scope, source_node);
2134 container_init_list_instruction->item_count = item_count;2670 container_init_list_instruction->item_count = item_count;
2135 container_init_list_instruction->elem_result_loc_list = elem_result_loc_list;2671 container_init_list_instruction->elem_result_loc_list = elem_result_loc_list;
2136 container_init_list_instruction->result_loc = result_loc;2672 container_init_list_instruction->result_loc = result_loc;
...@@ -2144,11 +2680,11 @@ static IrInstruction *ir_build_container_init_list(IrBuilder *irb, Scope *scope,...@@ -2144,11 +2680,11 @@ static IrInstruction *ir_build_container_init_list(IrBuilder *irb, Scope *scope,
2144 return &container_init_list_instruction->base;2680 return &container_init_list_instruction->base;
2145}2681}
21462682
2147static IrInstruction *ir_build_container_init_fields(IrBuilder *irb, Scope *scope, AstNode *source_node,2683static IrInstSrc *ir_build_container_init_fields(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2148 size_t field_count, IrInstructionContainerInitFieldsField *fields, IrInstruction *result_loc)2684 size_t field_count, IrInstSrcContainerInitFieldsField *fields, IrInstSrc *result_loc)
2149{2685{
2150 IrInstructionContainerInitFields *container_init_fields_instruction =2686 IrInstSrcContainerInitFields *container_init_fields_instruction =
2151 ir_build_instruction<IrInstructionContainerInitFields>(irb, scope, source_node);2687 ir_build_instruction<IrInstSrcContainerInitFields>(irb, scope, source_node);
2152 container_init_fields_instruction->field_count = field_count;2688 container_init_fields_instruction->field_count = field_count;
2153 container_init_fields_instruction->fields = fields;2689 container_init_fields_instruction->fields = fields;
2154 container_init_fields_instruction->result_loc = result_loc;2690 container_init_fields_instruction->result_loc = result_loc;
...@@ -2161,20 +2697,21 @@ static IrInstruction *ir_build_container_init_fields(IrBuilder *irb, Scope *scop...@@ -2161,20 +2697,21 @@ static IrInstruction *ir_build_container_init_fields(IrBuilder *irb, Scope *scop
2161 return &container_init_fields_instruction->base;2697 return &container_init_fields_instruction->base;
2162}2698}
21632699
2164static IrInstruction *ir_build_unreachable(IrBuilder *irb, Scope *scope, AstNode *source_node) {2700static IrInstSrc *ir_build_unreachable(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
2165 IrInstructionUnreachable *unreachable_instruction =2701 IrInstSrcUnreachable *inst = ir_build_instruction<IrInstSrcUnreachable>(irb, scope, source_node);
2166 ir_build_instruction<IrInstructionUnreachable>(irb, scope, source_node);2702 inst->base.is_noreturn = true;
2167 unreachable_instruction->base.value->special = ConstValSpecialStatic;2703 return &inst->base;
2168 unreachable_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;2704}
2169 return &unreachable_instruction->base;2705
2706static IrInstGen *ir_build_unreachable_gen(IrAnalyze *ira, IrInst *source_instr) {
2707 IrInstGenUnreachable *inst = ir_build_inst_noreturn<IrInstGenUnreachable>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2708 return &inst->base;
2170}2709}
21712710
2172static IrInstructionStorePtr *ir_build_store_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,2711static IrInstSrcStorePtr *ir_build_store_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2173 IrInstruction *ptr, IrInstruction *value)2712 IrInstSrc *ptr, IrInstSrc *value)
2174{2713{
2175 IrInstructionStorePtr *instruction = ir_build_instruction<IrInstructionStorePtr>(irb, scope, source_node);2714 IrInstSrcStorePtr *instruction = ir_build_instruction<IrInstSrcStorePtr>(irb, scope, source_node);
2176 instruction->base.value->special = ConstValSpecialStatic;
2177 instruction->base.value->type = irb->codegen->builtin_types.entry_void;
2178 instruction->ptr = ptr;2715 instruction->ptr = ptr;
2179 instruction->value = value;2716 instruction->value = value;
21802717
...@@ -2184,76 +2721,83 @@ static IrInstructionStorePtr *ir_build_store_ptr(IrBuilder *irb, Scope *scope, A...@@ -2184,76 +2721,83 @@ static IrInstructionStorePtr *ir_build_store_ptr(IrBuilder *irb, Scope *scope, A
2184 return instruction;2721 return instruction;
2185}2722}
21862723
2187static IrInstruction *ir_build_vector_store_elem(IrAnalyze *ira, IrInstruction *source_instruction,2724static IrInstGen *ir_build_store_ptr_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *ptr, IrInstGen *value) {
2188 IrInstruction *vector_ptr, IrInstruction *index, IrInstruction *value)2725 IrInstGenStorePtr *instruction = ir_build_inst_void<IrInstGenStorePtr>(&ira->new_irb,
2726 source_instr->scope, source_instr->source_node);
2727 instruction->ptr = ptr;
2728 instruction->value = value;
2729
2730 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
2731 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
2732
2733 return &instruction->base;
2734}
2735
2736static IrInstGen *ir_build_vector_store_elem(IrAnalyze *ira, IrInst *src_inst,
2737 IrInstGen *vector_ptr, IrInstGen *index, IrInstGen *value)
2189{2738{
2190 IrInstructionVectorStoreElem *inst = ir_build_instruction<IrInstructionVectorStoreElem>(2739 IrInstGenVectorStoreElem *inst = ir_build_inst_void<IrInstGenVectorStoreElem>(
2191 &ira->new_irb, source_instruction->scope, source_instruction->source_node);2740 &ira->new_irb, src_inst->scope, src_inst->source_node);
2192 inst->base.value->type = ira->codegen->builtin_types.entry_void;
2193 inst->vector_ptr = vector_ptr;2741 inst->vector_ptr = vector_ptr;
2194 inst->index = index;2742 inst->index = index;
2195 inst->value = value;2743 inst->value = value;
21962744
2197 ir_ref_instruction(vector_ptr, ira->new_irb.current_basic_block);2745 ir_ref_inst_gen(vector_ptr, ira->new_irb.current_basic_block);
2198 ir_ref_instruction(index, ira->new_irb.current_basic_block);2746 ir_ref_inst_gen(index, ira->new_irb.current_basic_block);
2199 ir_ref_instruction(value, ira->new_irb.current_basic_block);2747 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
22002748
2201 return &inst->base;2749 return &inst->base;
2202}2750}
22032751
2204static IrInstruction *ir_build_var_decl_src(IrBuilder *irb, Scope *scope, AstNode *source_node,2752static IrInstSrc *ir_build_var_decl_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2205 ZigVar *var, IrInstruction *align_value, IrInstruction *ptr)2753 ZigVar *var, IrInstSrc *align_value, IrInstSrc *ptr)
2206{2754{
2207 IrInstructionDeclVarSrc *decl_var_instruction = ir_build_instruction<IrInstructionDeclVarSrc>(irb, scope, source_node);2755 IrInstSrcDeclVar *inst = ir_build_instruction<IrInstSrcDeclVar>(irb, scope, source_node);
2208 decl_var_instruction->base.value->special = ConstValSpecialStatic;2756 inst->var = var;
2209 decl_var_instruction->base.value->type = irb->codegen->builtin_types.entry_void;2757 inst->align_value = align_value;
2210 decl_var_instruction->var = var;2758 inst->ptr = ptr;
2211 decl_var_instruction->align_value = align_value;
2212 decl_var_instruction->ptr = ptr;
22132759
2214 if (align_value != nullptr) ir_ref_instruction(align_value, irb->current_basic_block);2760 if (align_value != nullptr) ir_ref_instruction(align_value, irb->current_basic_block);
2215 ir_ref_instruction(ptr, irb->current_basic_block);2761 ir_ref_instruction(ptr, irb->current_basic_block);
22162762
2217 return &decl_var_instruction->base;2763 return &inst->base;
2218}2764}
22192765
2220static IrInstruction *ir_build_var_decl_gen(IrAnalyze *ira, IrInstruction *source_instruction,2766static IrInstGen *ir_build_var_decl_gen(IrAnalyze *ira, IrInst *source_instruction,
2221 ZigVar *var, IrInstruction *var_ptr)2767 ZigVar *var, IrInstGen *var_ptr)
2222{2768{
2223 IrInstructionDeclVarGen *decl_var_instruction = ir_build_instruction<IrInstructionDeclVarGen>(&ira->new_irb,2769 IrInstGenDeclVar *inst = ir_build_inst_gen<IrInstGenDeclVar>(&ira->new_irb,
2224 source_instruction->scope, source_instruction->source_node);2770 source_instruction->scope, source_instruction->source_node);
2225 decl_var_instruction->base.value->special = ConstValSpecialStatic;2771 inst->base.value->special = ConstValSpecialStatic;
2226 decl_var_instruction->base.value->type = ira->codegen->builtin_types.entry_void;2772 inst->base.value->type = ira->codegen->builtin_types.entry_void;
2227 decl_var_instruction->var = var;2773 inst->var = var;
2228 decl_var_instruction->var_ptr = var_ptr;2774 inst->var_ptr = var_ptr;
22292775
2230 ir_ref_instruction(var_ptr, ira->new_irb.current_basic_block);2776 ir_ref_inst_gen(var_ptr, ira->new_irb.current_basic_block);
22312777
2232 return &decl_var_instruction->base;2778 return &inst->base;
2233}2779}
22342780
2235static IrInstruction *ir_build_resize_slice(IrAnalyze *ira, IrInstruction *source_instruction,2781static IrInstGen *ir_build_resize_slice(IrAnalyze *ira, IrInst *source_instruction,
2236 IrInstruction *operand, ZigType *ty, IrInstruction *result_loc)2782 IrInstGen *operand, ZigType *ty, IrInstGen *result_loc)
2237{2783{
2238 IrInstructionResizeSlice *instruction = ir_build_instruction<IrInstructionResizeSlice>(&ira->new_irb,2784 IrInstGenResizeSlice *instruction = ir_build_inst_gen<IrInstGenResizeSlice>(&ira->new_irb,
2239 source_instruction->scope, source_instruction->source_node);2785 source_instruction->scope, source_instruction->source_node);
2240 instruction->base.value->type = ty;2786 instruction->base.value->type = ty;
2241 instruction->operand = operand;2787 instruction->operand = operand;
2242 instruction->result_loc = result_loc;2788 instruction->result_loc = result_loc;
22432789
2244 ir_ref_instruction(operand, ira->new_irb.current_basic_block);2790 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2245 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);2791 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
22462792
2247 return &instruction->base;2793 return &instruction->base;
2248}2794}
22492795
2250static IrInstruction *ir_build_export(IrBuilder *irb, Scope *scope, AstNode *source_node,2796static IrInstSrc *ir_build_export(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2251 IrInstruction *target, IrInstruction *options)2797 IrInstSrc *target, IrInstSrc *options)
2252{2798{
2253 IrInstructionExport *export_instruction = ir_build_instruction<IrInstructionExport>(2799 IrInstSrcExport *export_instruction = ir_build_instruction<IrInstSrcExport>(
2254 irb, scope, source_node);2800 irb, scope, source_node);
2255 export_instruction->base.value->special = ConstValSpecialStatic;
2256 export_instruction->base.value->type = irb->codegen->builtin_types.entry_void;
2257 export_instruction->target = target;2801 export_instruction->target = target;
2258 export_instruction->options = options;2802 export_instruction->options = options;
22592803
...@@ -2263,8 +2807,8 @@ static IrInstruction *ir_build_export(IrBuilder *irb, Scope *scope, AstNode *sou...@@ -2263,8 +2807,8 @@ static IrInstruction *ir_build_export(IrBuilder *irb, Scope *scope, AstNode *sou
2263 return &export_instruction->base;2807 return &export_instruction->base;
2264}2808}
22652809
2266static IrInstruction *ir_build_load_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *ptr) {2810static IrInstSrc *ir_build_load_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *ptr) {
2267 IrInstructionLoadPtr *instruction = ir_build_instruction<IrInstructionLoadPtr>(irb, scope, source_node);2811 IrInstSrcLoadPtr *instruction = ir_build_instruction<IrInstSrcLoadPtr>(irb, scope, source_node);
2268 instruction->ptr = ptr;2812 instruction->ptr = ptr;
22692813
2270 ir_ref_instruction(ptr, irb->current_basic_block);2814 ir_ref_instruction(ptr, irb->current_basic_block);
...@@ -2272,8 +2816,23 @@ static IrInstruction *ir_build_load_ptr(IrBuilder *irb, Scope *scope, AstNode *s...@@ -2272,8 +2816,23 @@ static IrInstruction *ir_build_load_ptr(IrBuilder *irb, Scope *scope, AstNode *s
2272 return &instruction->base;2816 return &instruction->base;
2273}2817}
22742818
2275static IrInstruction *ir_build_typeof(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {2819static IrInstGen *ir_build_load_ptr_gen(IrAnalyze *ira, IrInst *source_instruction,
2276 IrInstructionTypeOf *instruction = ir_build_instruction<IrInstructionTypeOf>(irb, scope, source_node);2820 IrInstGen *ptr, ZigType *ty, IrInstGen *result_loc)
2821{
2822 IrInstGenLoadPtr *instruction = ir_build_inst_gen<IrInstGenLoadPtr>(
2823 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
2824 instruction->base.value->type = ty;
2825 instruction->ptr = ptr;
2826 instruction->result_loc = result_loc;
2827
2828 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
2829 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
2830
2831 return &instruction->base;
2832}
2833
2834static IrInstSrc *ir_build_typeof(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
2835 IrInstSrcTypeOf *instruction = ir_build_instruction<IrInstSrcTypeOf>(irb, scope, source_node);
2277 instruction->value = value;2836 instruction->value = value;
22782837
2279 ir_ref_instruction(value, irb->current_basic_block);2838 ir_ref_instruction(value, irb->current_basic_block);
...@@ -2281,8 +2840,8 @@ static IrInstruction *ir_build_typeof(IrBuilder *irb, Scope *scope, AstNode *sou...@@ -2281,8 +2840,8 @@ static IrInstruction *ir_build_typeof(IrBuilder *irb, Scope *scope, AstNode *sou
2281 return &instruction->base;2840 return &instruction->base;
2282}2841}
22832842
2284static IrInstruction *ir_build_set_cold(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *is_cold) {2843static IrInstSrc *ir_build_set_cold(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *is_cold) {
2285 IrInstructionSetCold *instruction = ir_build_instruction<IrInstructionSetCold>(irb, scope, source_node);2844 IrInstSrcSetCold *instruction = ir_build_instruction<IrInstSrcSetCold>(irb, scope, source_node);
2286 instruction->is_cold = is_cold;2845 instruction->is_cold = is_cold;
22872846
2288 ir_ref_instruction(is_cold, irb->current_basic_block);2847 ir_ref_instruction(is_cold, irb->current_basic_block);
...@@ -2290,21 +2849,21 @@ static IrInstruction *ir_build_set_cold(IrBuilder *irb, Scope *scope, AstNode *s...@@ -2290,21 +2849,21 @@ static IrInstruction *ir_build_set_cold(IrBuilder *irb, Scope *scope, AstNode *s
2290 return &instruction->base;2849 return &instruction->base;
2291}2850}
22922851
2293static IrInstruction *ir_build_set_runtime_safety(IrBuilder *irb, Scope *scope, AstNode *source_node,2852static IrInstSrc *ir_build_set_runtime_safety(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2294 IrInstruction *safety_on)2853 IrInstSrc *safety_on)
2295{2854{
2296 IrInstructionSetRuntimeSafety *instruction = ir_build_instruction<IrInstructionSetRuntimeSafety>(irb, scope, source_node);2855 IrInstSrcSetRuntimeSafety *inst = ir_build_instruction<IrInstSrcSetRuntimeSafety>(irb, scope, source_node);
2297 instruction->safety_on = safety_on;2856 inst->safety_on = safety_on;
22982857
2299 ir_ref_instruction(safety_on, irb->current_basic_block);2858 ir_ref_instruction(safety_on, irb->current_basic_block);
23002859
2301 return &instruction->base;2860 return &inst->base;
2302}2861}
23032862
2304static IrInstruction *ir_build_set_float_mode(IrBuilder *irb, Scope *scope, AstNode *source_node,2863static IrInstSrc *ir_build_set_float_mode(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2305 IrInstruction *mode_value)2864 IrInstSrc *mode_value)
2306{2865{
2307 IrInstructionSetFloatMode *instruction = ir_build_instruction<IrInstructionSetFloatMode>(irb, scope, source_node);2866 IrInstSrcSetFloatMode *instruction = ir_build_instruction<IrInstSrcSetFloatMode>(irb, scope, source_node);
2308 instruction->mode_value = mode_value;2867 instruction->mode_value = mode_value;
23092868
2310 ir_ref_instruction(mode_value, irb->current_basic_block);2869 ir_ref_instruction(mode_value, irb->current_basic_block);
...@@ -2312,10 +2871,10 @@ static IrInstruction *ir_build_set_float_mode(IrBuilder *irb, Scope *scope, AstN...@@ -2312,10 +2871,10 @@ static IrInstruction *ir_build_set_float_mode(IrBuilder *irb, Scope *scope, AstN
2312 return &instruction->base;2871 return &instruction->base;
2313}2872}
23142873
2315static IrInstruction *ir_build_array_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *size,2874static IrInstSrc *ir_build_array_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *size,
2316 IrInstruction *sentinel, IrInstruction *child_type)2875 IrInstSrc *sentinel, IrInstSrc *child_type)
2317{2876{
2318 IrInstructionArrayType *instruction = ir_build_instruction<IrInstructionArrayType>(irb, scope, source_node);2877 IrInstSrcArrayType *instruction = ir_build_instruction<IrInstSrcArrayType>(irb, scope, source_node);
2319 instruction->size = size;2878 instruction->size = size;
2320 instruction->sentinel = sentinel;2879 instruction->sentinel = sentinel;
2321 instruction->child_type = child_type;2880 instruction->child_type = child_type;
...@@ -2327,10 +2886,10 @@ static IrInstruction *ir_build_array_type(IrBuilder *irb, Scope *scope, AstNode...@@ -2327,10 +2886,10 @@ static IrInstruction *ir_build_array_type(IrBuilder *irb, Scope *scope, AstNode
2327 return &instruction->base;2886 return &instruction->base;
2328}2887}
23292888
2330static IrInstruction *ir_build_anyframe_type(IrBuilder *irb, Scope *scope, AstNode *source_node,2889static IrInstSrc *ir_build_anyframe_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2331 IrInstruction *payload_type)2890 IrInstSrc *payload_type)
2332{2891{
2333 IrInstructionAnyFrameType *instruction = ir_build_instruction<IrInstructionAnyFrameType>(irb, scope, source_node);2892 IrInstSrcAnyFrameType *instruction = ir_build_instruction<IrInstSrcAnyFrameType>(irb, scope, source_node);
2334 instruction->payload_type = payload_type;2893 instruction->payload_type = payload_type;
23352894
2336 if (payload_type != nullptr) ir_ref_instruction(payload_type, irb->current_basic_block);2895 if (payload_type != nullptr) ir_ref_instruction(payload_type, irb->current_basic_block);
...@@ -2338,11 +2897,11 @@ static IrInstruction *ir_build_anyframe_type(IrBuilder *irb, Scope *scope, AstNo...@@ -2338,11 +2897,11 @@ static IrInstruction *ir_build_anyframe_type(IrBuilder *irb, Scope *scope, AstNo
2338 return &instruction->base;2897 return &instruction->base;
2339}2898}
23402899
2341static IrInstruction *ir_build_slice_type(IrBuilder *irb, Scope *scope, AstNode *source_node,2900static IrInstSrc *ir_build_slice_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2342 IrInstruction *child_type, bool is_const, bool is_volatile,2901 IrInstSrc *child_type, bool is_const, bool is_volatile,
2343 IrInstruction *sentinel, IrInstruction *align_value, bool is_allow_zero)2902 IrInstSrc *sentinel, IrInstSrc *align_value, bool is_allow_zero)
2344{2903{
2345 IrInstructionSliceType *instruction = ir_build_instruction<IrInstructionSliceType>(irb, scope, source_node);2904 IrInstSrcSliceType *instruction = ir_build_instruction<IrInstSrcSliceType>(irb, scope, source_node);
2346 instruction->is_const = is_const;2905 instruction->is_const = is_const;
2347 instruction->is_volatile = is_volatile;2906 instruction->is_volatile = is_volatile;
2348 instruction->child_type = child_type;2907 instruction->child_type = child_type;
...@@ -2357,11 +2916,11 @@ static IrInstruction *ir_build_slice_type(IrBuilder *irb, Scope *scope, AstNode...@@ -2357,11 +2916,11 @@ static IrInstruction *ir_build_slice_type(IrBuilder *irb, Scope *scope, AstNode
2357 return &instruction->base;2916 return &instruction->base;
2358}2917}
23592918
2360static IrInstruction *ir_build_asm_src(IrBuilder *irb, Scope *scope, AstNode *source_node,2919static IrInstSrc *ir_build_asm_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2361 IrInstruction *asm_template, IrInstruction **input_list, IrInstruction **output_types,2920 IrInstSrc *asm_template, IrInstSrc **input_list, IrInstSrc **output_types,
2362 ZigVar **output_vars, size_t return_count, bool has_side_effects, bool is_global)2921 ZigVar **output_vars, size_t return_count, bool has_side_effects, bool is_global)
2363{2922{
2364 IrInstructionAsmSrc *instruction = ir_build_instruction<IrInstructionAsmSrc>(irb, scope, source_node);2923 IrInstSrcAsm *instruction = ir_build_instruction<IrInstSrcAsm>(irb, scope, source_node);
2365 instruction->asm_template = asm_template;2924 instruction->asm_template = asm_template;
2366 instruction->input_list = input_list;2925 instruction->input_list = input_list;
2367 instruction->output_types = output_types;2926 instruction->output_types = output_types;
...@@ -2372,24 +2931,25 @@ static IrInstruction *ir_build_asm_src(IrBuilder *irb, Scope *scope, AstNode *so...@@ -2372,24 +2931,25 @@ static IrInstruction *ir_build_asm_src(IrBuilder *irb, Scope *scope, AstNode *so
23722931
2373 assert(source_node->type == NodeTypeAsmExpr);2932 assert(source_node->type == NodeTypeAsmExpr);
2374 for (size_t i = 0; i < source_node->data.asm_expr.output_list.length; i += 1) {2933 for (size_t i = 0; i < source_node->data.asm_expr.output_list.length; i += 1) {
2375 IrInstruction *output_type = output_types[i];2934 IrInstSrc *output_type = output_types[i];
2376 if (output_type) ir_ref_instruction(output_type, irb->current_basic_block);2935 if (output_type) ir_ref_instruction(output_type, irb->current_basic_block);
2377 }2936 }
23782937
2379 for (size_t i = 0; i < source_node->data.asm_expr.input_list.length; i += 1) {2938 for (size_t i = 0; i < source_node->data.asm_expr.input_list.length; i += 1) {
2380 IrInstruction *input_value = input_list[i];2939 IrInstSrc *input_value = input_list[i];
2381 ir_ref_instruction(input_value, irb->current_basic_block);2940 ir_ref_instruction(input_value, irb->current_basic_block);
2382 }2941 }
23832942
2384 return &instruction->base;2943 return &instruction->base;
2385}2944}
23862945
2387static IrInstruction *ir_build_asm_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,2946static IrInstGen *ir_build_asm_gen(IrAnalyze *ira, IrInst *source_instr,
2388 Buf *asm_template, AsmToken *token_list, size_t token_list_len,2947 Buf *asm_template, AsmToken *token_list, size_t token_list_len,
2389 IrInstruction **input_list, IrInstruction **output_types, ZigVar **output_vars, size_t return_count,2948 IrInstGen **input_list, IrInstGen **output_types, ZigVar **output_vars, size_t return_count,
2390 bool has_side_effects)2949 bool has_side_effects, ZigType *return_type)
2391{2950{
2392 IrInstructionAsmGen *instruction = ir_build_instruction<IrInstructionAsmGen>(&ira->new_irb, scope, source_node);2951 IrInstGenAsm *instruction = ir_build_inst_gen<IrInstGenAsm>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2952 instruction->base.value->type = return_type;
2393 instruction->asm_template = asm_template;2953 instruction->asm_template = asm_template;
2394 instruction->token_list = token_list;2954 instruction->token_list = token_list;
2395 instruction->token_list_len = token_list_len;2955 instruction->token_list_len = token_list_len;
...@@ -2399,22 +2959,24 @@ static IrInstruction *ir_build_asm_gen(IrAnalyze *ira, Scope *scope, AstNode *so...@@ -2399,22 +2959,24 @@ static IrInstruction *ir_build_asm_gen(IrAnalyze *ira, Scope *scope, AstNode *so
2399 instruction->return_count = return_count;2959 instruction->return_count = return_count;
2400 instruction->has_side_effects = has_side_effects;2960 instruction->has_side_effects = has_side_effects;
24012961
2402 assert(source_node->type == NodeTypeAsmExpr);2962 assert(source_instr->source_node->type == NodeTypeAsmExpr);
2403 for (size_t i = 0; i < source_node->data.asm_expr.output_list.length; i += 1) {2963 for (size_t i = 0; i < source_instr->source_node->data.asm_expr.output_list.length; i += 1) {
2404 IrInstruction *output_type = output_types[i];2964 IrInstGen *output_type = output_types[i];
2405 if (output_type) ir_ref_instruction(output_type, ira->new_irb.current_basic_block);2965 if (output_type) ir_ref_inst_gen(output_type, ira->new_irb.current_basic_block);
2406 }2966 }
24072967
2408 for (size_t i = 0; i < source_node->data.asm_expr.input_list.length; i += 1) {2968 for (size_t i = 0; i < source_instr->source_node->data.asm_expr.input_list.length; i += 1) {
2409 IrInstruction *input_value = input_list[i];2969 IrInstGen *input_value = input_list[i];
2410 ir_ref_instruction(input_value, ira->new_irb.current_basic_block);2970 ir_ref_inst_gen(input_value, ira->new_irb.current_basic_block);
2411 }2971 }
24122972
2413 return &instruction->base;2973 return &instruction->base;
2414}2974}
24152975
2416static IrInstruction *ir_build_size_of(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type_value, bool bit_size) {2976static IrInstSrc *ir_build_size_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value,
2417 IrInstructionSizeOf *instruction = ir_build_instruction<IrInstructionSizeOf>(irb, scope, source_node);2977 bool bit_size)
2978{
2979 IrInstSrcSizeOf *instruction = ir_build_instruction<IrInstSrcSizeOf>(irb, scope, source_node);
2418 instruction->type_value = type_value;2980 instruction->type_value = type_value;
2419 instruction->bit_size = bit_size;2981 instruction->bit_size = bit_size;
24202982
...@@ -2423,8 +2985,10 @@ static IrInstruction *ir_build_size_of(IrBuilder *irb, Scope *scope, AstNode *so...@@ -2423,8 +2985,10 @@ static IrInstruction *ir_build_size_of(IrBuilder *irb, Scope *scope, AstNode *so
2423 return &instruction->base;2985 return &instruction->base;
2424}2986}
24252987
2426static IrInstruction *ir_build_test_nonnull(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {2988static IrInstSrc *ir_build_test_non_null_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2427 IrInstructionTestNonNull *instruction = ir_build_instruction<IrInstructionTestNonNull>(irb, scope, source_node);2989 IrInstSrc *value)
2990{
2991 IrInstSrcTestNonNull *instruction = ir_build_instruction<IrInstSrcTestNonNull>(irb, scope, source_node);
2428 instruction->value = value;2992 instruction->value = value;
24292993
2430 ir_ref_instruction(value, irb->current_basic_block);2994 ir_ref_instruction(value, irb->current_basic_block);
...@@ -2432,10 +2996,21 @@ static IrInstruction *ir_build_test_nonnull(IrBuilder *irb, Scope *scope, AstNod...@@ -2432,10 +2996,21 @@ static IrInstruction *ir_build_test_nonnull(IrBuilder *irb, Scope *scope, AstNod
2432 return &instruction->base;2996 return &instruction->base;
2433}2997}
24342998
2435static IrInstruction *ir_build_optional_unwrap_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,2999static IrInstGen *ir_build_test_non_null_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value) {
2436 IrInstruction *base_ptr, bool safety_check_on, bool initializing)3000 IrInstGenTestNonNull *inst = ir_build_inst_gen<IrInstGenTestNonNull>(&ira->new_irb,
3001 source_instr->scope, source_instr->source_node);
3002 inst->base.value->type = ira->codegen->builtin_types.entry_bool;
3003 inst->value = value;
3004
3005 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
3006
3007 return &inst->base;
3008}
3009
3010static IrInstSrc *ir_build_optional_unwrap_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3011 IrInstSrc *base_ptr, bool safety_check_on, bool initializing)
2437{3012{
2438 IrInstructionOptionalUnwrapPtr *instruction = ir_build_instruction<IrInstructionOptionalUnwrapPtr>(irb, scope, source_node);3013 IrInstSrcOptionalUnwrapPtr *instruction = ir_build_instruction<IrInstSrcOptionalUnwrapPtr>(irb, scope, source_node);
2439 instruction->base_ptr = base_ptr;3014 instruction->base_ptr = base_ptr;
2440 instruction->safety_check_on = safety_check_on;3015 instruction->safety_check_on = safety_check_on;
2441 instruction->initializing = initializing;3016 instruction->initializing = initializing;
...@@ -2445,113 +3020,198 @@ static IrInstruction *ir_build_optional_unwrap_ptr(IrBuilder *irb, Scope *scope,...@@ -2445,113 +3020,198 @@ static IrInstruction *ir_build_optional_unwrap_ptr(IrBuilder *irb, Scope *scope,
2445 return &instruction->base;3020 return &instruction->base;
2446}3021}
24473022
2448static IrInstruction *ir_build_optional_wrap(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_ty,3023static IrInstGen *ir_build_optional_unwrap_ptr_gen(IrAnalyze *ira, IrInst *source_instr,
2449 IrInstruction *operand, IrInstruction *result_loc)3024 IrInstGen *base_ptr, bool safety_check_on, bool initializing, ZigType *result_type)
3025{
3026 IrInstGenOptionalUnwrapPtr *inst = ir_build_inst_gen<IrInstGenOptionalUnwrapPtr>(&ira->new_irb,
3027 source_instr->scope, source_instr->source_node);
3028 inst->base.value->type = result_type;
3029 inst->base_ptr = base_ptr;
3030 inst->safety_check_on = safety_check_on;
3031 inst->initializing = initializing;
3032
3033 ir_ref_inst_gen(base_ptr, ira->new_irb.current_basic_block);
3034
3035 return &inst->base;
3036}
3037
3038static IrInstGen *ir_build_optional_wrap(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_ty,
3039 IrInstGen *operand, IrInstGen *result_loc)
2450{3040{
2451 IrInstructionOptionalWrap *instruction = ir_build_instruction<IrInstructionOptionalWrap>(3041 IrInstGenOptionalWrap *instruction = ir_build_inst_gen<IrInstGenOptionalWrap>(
2452 &ira->new_irb, source_instruction->scope, source_instruction->source_node);3042 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
2453 instruction->base.value->type = result_ty;3043 instruction->base.value->type = result_ty;
2454 instruction->operand = operand;3044 instruction->operand = operand;
2455 instruction->result_loc = result_loc;3045 instruction->result_loc = result_loc;
24563046
2457 ir_ref_instruction(operand, ira->new_irb.current_basic_block);3047 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2458 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);3048 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
24593049
2460 return &instruction->base;3050 return &instruction->base;
2461}3051}
24623052
2463static IrInstruction *ir_build_err_wrap_payload(IrAnalyze *ira, IrInstruction *source_instruction,3053static IrInstGen *ir_build_err_wrap_payload(IrAnalyze *ira, IrInst *source_instruction,
2464 ZigType *result_type, IrInstruction *operand, IrInstruction *result_loc)3054 ZigType *result_type, IrInstGen *operand, IrInstGen *result_loc)
2465{3055{
2466 IrInstructionErrWrapPayload *instruction = ir_build_instruction<IrInstructionErrWrapPayload>(3056 IrInstGenErrWrapPayload *instruction = ir_build_inst_gen<IrInstGenErrWrapPayload>(
2467 &ira->new_irb, source_instruction->scope, source_instruction->source_node);3057 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
2468 instruction->base.value->type = result_type;3058 instruction->base.value->type = result_type;
2469 instruction->operand = operand;3059 instruction->operand = operand;
2470 instruction->result_loc = result_loc;3060 instruction->result_loc = result_loc;
24713061
2472 ir_ref_instruction(operand, ira->new_irb.current_basic_block);3062 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2473 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);3063 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
24743064
2475 return &instruction->base;3065 return &instruction->base;
2476}3066}
24773067
2478static IrInstruction *ir_build_err_wrap_code(IrAnalyze *ira, IrInstruction *source_instruction,3068static IrInstGen *ir_build_err_wrap_code(IrAnalyze *ira, IrInst *source_instruction,
2479 ZigType *result_type, IrInstruction *operand, IrInstruction *result_loc)3069 ZigType *result_type, IrInstGen *operand, IrInstGen *result_loc)
2480{3070{
2481 IrInstructionErrWrapCode *instruction = ir_build_instruction<IrInstructionErrWrapCode>(3071 IrInstGenErrWrapCode *instruction = ir_build_inst_gen<IrInstGenErrWrapCode>(
2482 &ira->new_irb, source_instruction->scope, source_instruction->source_node);3072 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
2483 instruction->base.value->type = result_type;3073 instruction->base.value->type = result_type;
2484 instruction->operand = operand;3074 instruction->operand = operand;
2485 instruction->result_loc = result_loc;3075 instruction->result_loc = result_loc;
24863076
2487 ir_ref_instruction(operand, ira->new_irb.current_basic_block);3077 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2488 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);3078 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
24893079
2490 return &instruction->base;3080 return &instruction->base;
2491}3081}
24923082
2493static IrInstruction *ir_build_clz(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {3083static IrInstSrc *ir_build_clz(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
2494 IrInstructionClz *instruction = ir_build_instruction<IrInstructionClz>(irb, scope, source_node);3084 IrInstSrc *op)
3085{
3086 IrInstSrcClz *instruction = ir_build_instruction<IrInstSrcClz>(irb, scope, source_node);
2495 instruction->type = type;3087 instruction->type = type;
2496 instruction->op = op;3088 instruction->op = op;
24973089
2498 if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);3090 ir_ref_instruction(type, irb->current_basic_block);
2499 ir_ref_instruction(op, irb->current_basic_block);3091 ir_ref_instruction(op, irb->current_basic_block);
25003092
2501 return &instruction->base;3093 return &instruction->base;
2502}3094}
25033095
2504static IrInstruction *ir_build_ctz(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {3096static IrInstGen *ir_build_clz_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *result_type, IrInstGen *op) {
2505 IrInstructionCtz *instruction = ir_build_instruction<IrInstructionCtz>(irb, scope, source_node);3097 IrInstGenClz *instruction = ir_build_inst_gen<IrInstGenClz>(&ira->new_irb,
3098 source_instr->scope, source_instr->source_node);
3099 instruction->base.value->type = result_type;
3100 instruction->op = op;
3101
3102 ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
3103
3104 return &instruction->base;
3105}
3106
3107static IrInstSrc *ir_build_ctz(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
3108 IrInstSrc *op)
3109{
3110 IrInstSrcCtz *instruction = ir_build_instruction<IrInstSrcCtz>(irb, scope, source_node);
2506 instruction->type = type;3111 instruction->type = type;
2507 instruction->op = op;3112 instruction->op = op;
25083113
2509 if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);3114 ir_ref_instruction(type, irb->current_basic_block);
2510 ir_ref_instruction(op, irb->current_basic_block);3115 ir_ref_instruction(op, irb->current_basic_block);
25113116
2512 return &instruction->base;3117 return &instruction->base;
2513}3118}
25143119
2515static IrInstruction *ir_build_pop_count(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {3120static IrInstGen *ir_build_ctz_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *result_type, IrInstGen *op) {
2516 IrInstructionPopCount *instruction = ir_build_instruction<IrInstructionPopCount>(irb, scope, source_node);3121 IrInstGenCtz *instruction = ir_build_inst_gen<IrInstGenCtz>(&ira->new_irb,
3122 source_instr->scope, source_instr->source_node);
3123 instruction->base.value->type = result_type;
3124 instruction->op = op;
3125
3126 ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
3127
3128 return &instruction->base;
3129}
3130
3131static IrInstSrc *ir_build_pop_count(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
3132 IrInstSrc *op)
3133{
3134 IrInstSrcPopCount *instruction = ir_build_instruction<IrInstSrcPopCount>(irb, scope, source_node);
2517 instruction->type = type;3135 instruction->type = type;
2518 instruction->op = op;3136 instruction->op = op;
25193137
2520 if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);3138 ir_ref_instruction(type, irb->current_basic_block);
2521 ir_ref_instruction(op, irb->current_basic_block);3139 ir_ref_instruction(op, irb->current_basic_block);
25223140
2523 return &instruction->base;3141 return &instruction->base;
2524}3142}
25253143
2526static IrInstruction *ir_build_bswap(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {3144static IrInstGen *ir_build_pop_count_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *result_type,
2527 IrInstructionBswap *instruction = ir_build_instruction<IrInstructionBswap>(irb, scope, source_node);3145 IrInstGen *op)
3146{
3147 IrInstGenPopCount *instruction = ir_build_inst_gen<IrInstGenPopCount>(&ira->new_irb,
3148 source_instr->scope, source_instr->source_node);
3149 instruction->base.value->type = result_type;
3150 instruction->op = op;
3151
3152 ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
3153
3154 return &instruction->base;
3155}
3156
3157static IrInstSrc *ir_build_bswap(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
3158 IrInstSrc *op)
3159{
3160 IrInstSrcBswap *instruction = ir_build_instruction<IrInstSrcBswap>(irb, scope, source_node);
2528 instruction->type = type;3161 instruction->type = type;
2529 instruction->op = op;3162 instruction->op = op;
25303163
2531 if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);3164 ir_ref_instruction(type, irb->current_basic_block);
2532 ir_ref_instruction(op, irb->current_basic_block);3165 ir_ref_instruction(op, irb->current_basic_block);
25333166
2534 return &instruction->base;3167 return &instruction->base;
2535}3168}
25363169
2537static IrInstruction *ir_build_bit_reverse(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {3170static IrInstGen *ir_build_bswap_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *op_type,
2538 IrInstructionBitReverse *instruction = ir_build_instruction<IrInstructionBitReverse>(irb, scope, source_node);3171 IrInstGen *op)
3172{
3173 IrInstGenBswap *instruction = ir_build_inst_gen<IrInstGenBswap>(&ira->new_irb,
3174 source_instr->scope, source_instr->source_node);
3175 instruction->base.value->type = op_type;
3176 instruction->op = op;
3177
3178 ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
3179
3180 return &instruction->base;
3181}
3182
3183static IrInstSrc *ir_build_bit_reverse(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
3184 IrInstSrc *op)
3185{
3186 IrInstSrcBitReverse *instruction = ir_build_instruction<IrInstSrcBitReverse>(irb, scope, source_node);
2539 instruction->type = type;3187 instruction->type = type;
2540 instruction->op = op;3188 instruction->op = op;
25413189
2542 if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);3190 ir_ref_instruction(type, irb->current_basic_block);
2543 ir_ref_instruction(op, irb->current_basic_block);3191 ir_ref_instruction(op, irb->current_basic_block);
25443192
2545 return &instruction->base;3193 return &instruction->base;
2546}3194}
25473195
2548static IrInstructionSwitchBr *ir_build_switch_br(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *target_value,3196static IrInstGen *ir_build_bit_reverse_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *int_type,
2549 IrBasicBlock *else_block, size_t case_count, IrInstructionSwitchBrCase *cases, IrInstruction *is_comptime,3197 IrInstGen *op)
2550 IrInstruction *switch_prongs_void)3198{
3199 IrInstGenBitReverse *instruction = ir_build_inst_gen<IrInstGenBitReverse>(&ira->new_irb,
3200 source_instr->scope, source_instr->source_node);
3201 instruction->base.value->type = int_type;
3202 instruction->op = op;
3203
3204 ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
3205
3206 return &instruction->base;
3207}
3208
3209static IrInstSrcSwitchBr *ir_build_switch_br_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3210 IrInstSrc *target_value, IrBasicBlockSrc *else_block, size_t case_count, IrInstSrcSwitchBrCase *cases,
3211 IrInstSrc *is_comptime, IrInstSrc *switch_prongs_void)
2551{3212{
2552 IrInstructionSwitchBr *instruction = ir_build_instruction<IrInstructionSwitchBr>(irb, scope, source_node);3213 IrInstSrcSwitchBr *instruction = ir_build_instruction<IrInstSrcSwitchBr>(irb, scope, source_node);
2553 instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;3214 instruction->base.is_noreturn = true;
2554 instruction->base.value->special = ConstValSpecialStatic;
2555 instruction->target_value = target_value;3215 instruction->target_value = target_value;
2556 instruction->else_block = else_block;3216 instruction->else_block = else_block;
2557 instruction->case_count = case_count;3217 instruction->case_count = case_count;
...@@ -2560,9 +3220,9 @@ static IrInstructionSwitchBr *ir_build_switch_br(IrBuilder *irb, Scope *scope, A...@@ -2560,9 +3220,9 @@ static IrInstructionSwitchBr *ir_build_switch_br(IrBuilder *irb, Scope *scope, A
2560 instruction->switch_prongs_void = switch_prongs_void;3220 instruction->switch_prongs_void = switch_prongs_void;
25613221
2562 ir_ref_instruction(target_value, irb->current_basic_block);3222 ir_ref_instruction(target_value, irb->current_basic_block);
2563 if (is_comptime) ir_ref_instruction(is_comptime, irb->current_basic_block);3223 ir_ref_instruction(is_comptime, irb->current_basic_block);
2564 ir_ref_bb(else_block);3224 ir_ref_bb(else_block);
2565 if (switch_prongs_void) ir_ref_instruction(switch_prongs_void, irb->current_basic_block);3225 ir_ref_instruction(switch_prongs_void, irb->current_basic_block);
25663226
2567 for (size_t i = 0; i < case_count; i += 1) {3227 for (size_t i = 0; i < case_count; i += 1) {
2568 ir_ref_instruction(cases[i].value, irb->current_basic_block);3228 ir_ref_instruction(cases[i].value, irb->current_basic_block);
...@@ -2572,10 +3232,31 @@ static IrInstructionSwitchBr *ir_build_switch_br(IrBuilder *irb, Scope *scope, A...@@ -2572,10 +3232,31 @@ static IrInstructionSwitchBr *ir_build_switch_br(IrBuilder *irb, Scope *scope, A
2572 return instruction;3232 return instruction;
2573}3233}
25743234
2575static IrInstruction *ir_build_switch_target(IrBuilder *irb, Scope *scope, AstNode *source_node,3235static IrInstGenSwitchBr *ir_build_switch_br_gen(IrAnalyze *ira, IrInst *source_instr,
2576 IrInstruction *target_value_ptr)3236 IrInstGen *target_value, IrBasicBlockGen *else_block, size_t case_count, IrInstGenSwitchBrCase *cases)
3237{
3238 IrInstGenSwitchBr *instruction = ir_build_inst_noreturn<IrInstGenSwitchBr>(&ira->new_irb,
3239 source_instr->scope, source_instr->source_node);
3240 instruction->target_value = target_value;
3241 instruction->else_block = else_block;
3242 instruction->case_count = case_count;
3243 instruction->cases = cases;
3244
3245 ir_ref_inst_gen(target_value, ira->new_irb.current_basic_block);
3246 ir_ref_bb_gen(else_block);
3247
3248 for (size_t i = 0; i < case_count; i += 1) {
3249 ir_ref_inst_gen(cases[i].value, ira->new_irb.current_basic_block);
3250 ir_ref_bb_gen(cases[i].block);
3251 }
3252
3253 return instruction;
3254}
3255
3256static IrInstSrc *ir_build_switch_target(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3257 IrInstSrc *target_value_ptr)
2577{3258{
2578 IrInstructionSwitchTarget *instruction = ir_build_instruction<IrInstructionSwitchTarget>(irb, scope, source_node);3259 IrInstSrcSwitchTarget *instruction = ir_build_instruction<IrInstSrcSwitchTarget>(irb, scope, source_node);
2579 instruction->target_value_ptr = target_value_ptr;3260 instruction->target_value_ptr = target_value_ptr;
25803261
2581 ir_ref_instruction(target_value_ptr, irb->current_basic_block);3262 ir_ref_instruction(target_value_ptr, irb->current_basic_block);
...@@ -2583,10 +3264,10 @@ static IrInstruction *ir_build_switch_target(IrBuilder *irb, Scope *scope, AstNo...@@ -2583,10 +3264,10 @@ static IrInstruction *ir_build_switch_target(IrBuilder *irb, Scope *scope, AstNo
2583 return &instruction->base;3264 return &instruction->base;
2584}3265}
25853266
2586static IrInstruction *ir_build_switch_var(IrBuilder *irb, Scope *scope, AstNode *source_node,3267static IrInstSrc *ir_build_switch_var(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2587 IrInstruction *target_value_ptr, IrInstruction **prongs_ptr, size_t prongs_len)3268 IrInstSrc *target_value_ptr, IrInstSrc **prongs_ptr, size_t prongs_len)
2588{3269{
2589 IrInstructionSwitchVar *instruction = ir_build_instruction<IrInstructionSwitchVar>(irb, scope, source_node);3270 IrInstSrcSwitchVar *instruction = ir_build_instruction<IrInstSrcSwitchVar>(irb, scope, source_node);
2590 instruction->target_value_ptr = target_value_ptr;3271 instruction->target_value_ptr = target_value_ptr;
2591 instruction->prongs_ptr = prongs_ptr;3272 instruction->prongs_ptr = prongs_ptr;
2592 instruction->prongs_len = prongs_len;3273 instruction->prongs_len = prongs_len;
...@@ -2600,10 +3281,10 @@ static IrInstruction *ir_build_switch_var(IrBuilder *irb, Scope *scope, AstNode...@@ -2600,10 +3281,10 @@ static IrInstruction *ir_build_switch_var(IrBuilder *irb, Scope *scope, AstNode
2600}3281}
26013282
2602// For this instruction the switch_br must be set later.3283// For this instruction the switch_br must be set later.
2603static IrInstructionSwitchElseVar *ir_build_switch_else_var(IrBuilder *irb, Scope *scope, AstNode *source_node,3284static IrInstSrcSwitchElseVar *ir_build_switch_else_var(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2604 IrInstruction *target_value_ptr)3285 IrInstSrc *target_value_ptr)
2605{3286{
2606 IrInstructionSwitchElseVar *instruction = ir_build_instruction<IrInstructionSwitchElseVar>(irb, scope, source_node);3287 IrInstSrcSwitchElseVar *instruction = ir_build_instruction<IrInstSrcSwitchElseVar>(irb, scope, source_node);
2607 instruction->target_value_ptr = target_value_ptr;3288 instruction->target_value_ptr = target_value_ptr;
26083289
2609 ir_ref_instruction(target_value_ptr, irb->current_basic_block);3290 ir_ref_instruction(target_value_ptr, irb->current_basic_block);
...@@ -2611,17 +3292,21 @@ static IrInstructionSwitchElseVar *ir_build_switch_else_var(IrBuilder *irb, Scop...@@ -2611,17 +3292,21 @@ static IrInstructionSwitchElseVar *ir_build_switch_else_var(IrBuilder *irb, Scop
2611 return instruction;3292 return instruction;
2612}3293}
26133294
2614static IrInstruction *ir_build_union_tag(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {3295static IrInstGen *ir_build_union_tag(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value,
2615 IrInstructionUnionTag *instruction = ir_build_instruction<IrInstructionUnionTag>(irb, scope, source_node);3296 ZigType *tag_type)
3297{
3298 IrInstGenUnionTag *instruction = ir_build_inst_gen<IrInstGenUnionTag>(&ira->new_irb,
3299 source_instr->scope, source_instr->source_node);
2616 instruction->value = value;3300 instruction->value = value;
3301 instruction->base.value->type = tag_type;
26173302
2618 ir_ref_instruction(value, irb->current_basic_block);3303 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
26193304
2620 return &instruction->base;3305 return &instruction->base;
2621}3306}
26223307
2623static IrInstruction *ir_build_import(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {3308static IrInstSrc *ir_build_import(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
2624 IrInstructionImport *instruction = ir_build_instruction<IrInstructionImport>(irb, scope, source_node);3309 IrInstSrcImport *instruction = ir_build_instruction<IrInstSrcImport>(irb, scope, source_node);
2625 instruction->name = name;3310 instruction->name = name;
26263311
2627 ir_ref_instruction(name, irb->current_basic_block);3312 ir_ref_instruction(name, irb->current_basic_block);
...@@ -2629,10 +3314,10 @@ static IrInstruction *ir_build_import(IrBuilder *irb, Scope *scope, AstNode *sou...@@ -2629,10 +3314,10 @@ static IrInstruction *ir_build_import(IrBuilder *irb, Scope *scope, AstNode *sou
2629 return &instruction->base;3314 return &instruction->base;
2630}3315}
26313316
2632static IrInstruction *ir_build_ref(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value,3317static IrInstSrc *ir_build_ref_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value,
2633 bool is_const, bool is_volatile)3318 bool is_const, bool is_volatile)
2634{3319{
2635 IrInstructionRef *instruction = ir_build_instruction<IrInstructionRef>(irb, scope, source_node);3320 IrInstSrcRef *instruction = ir_build_instruction<IrInstSrcRef>(irb, scope, source_node);
2636 instruction->value = value;3321 instruction->value = value;
2637 instruction->is_const = is_const;3322 instruction->is_const = is_const;
2638 instruction->is_volatile = is_volatile;3323 instruction->is_volatile = is_volatile;
...@@ -2642,23 +3327,23 @@ static IrInstruction *ir_build_ref(IrBuilder *irb, Scope *scope, AstNode *source...@@ -2642,23 +3327,23 @@ static IrInstruction *ir_build_ref(IrBuilder *irb, Scope *scope, AstNode *source
2642 return &instruction->base;3327 return &instruction->base;
2643}3328}
26443329
2645static IrInstruction *ir_build_ref_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_type,3330static IrInstGen *ir_build_ref_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_type,
2646 IrInstruction *operand, IrInstruction *result_loc)3331 IrInstGen *operand, IrInstGen *result_loc)
2647{3332{
2648 IrInstructionRefGen *instruction = ir_build_instruction<IrInstructionRefGen>(&ira->new_irb,3333 IrInstGenRef *instruction = ir_build_inst_gen<IrInstGenRef>(&ira->new_irb,
2649 source_instruction->scope, source_instruction->source_node);3334 source_instruction->scope, source_instruction->source_node);
2650 instruction->base.value->type = result_type;3335 instruction->base.value->type = result_type;
2651 instruction->operand = operand;3336 instruction->operand = operand;
2652 instruction->result_loc = result_loc;3337 instruction->result_loc = result_loc;
26533338
2654 ir_ref_instruction(operand, ira->new_irb.current_basic_block);3339 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2655 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);3340 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
26563341
2657 return &instruction->base;3342 return &instruction->base;
2658}3343}
26593344
2660static IrInstruction *ir_build_compile_err(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *msg) {3345static IrInstSrc *ir_build_compile_err(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *msg) {
2661 IrInstructionCompileErr *instruction = ir_build_instruction<IrInstructionCompileErr>(irb, scope, source_node);3346 IrInstSrcCompileErr *instruction = ir_build_instruction<IrInstSrcCompileErr>(irb, scope, source_node);
2662 instruction->msg = msg;3347 instruction->msg = msg;
26633348
2664 ir_ref_instruction(msg, irb->current_basic_block);3349 ir_ref_instruction(msg, irb->current_basic_block);
...@@ -2666,10 +3351,10 @@ static IrInstruction *ir_build_compile_err(IrBuilder *irb, Scope *scope, AstNode...@@ -2666,10 +3351,10 @@ static IrInstruction *ir_build_compile_err(IrBuilder *irb, Scope *scope, AstNode
2666 return &instruction->base;3351 return &instruction->base;
2667}3352}
26683353
2669static IrInstruction *ir_build_compile_log(IrBuilder *irb, Scope *scope, AstNode *source_node,3354static IrInstSrc *ir_build_compile_log(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2670 size_t msg_count, IrInstruction **msg_list)3355 size_t msg_count, IrInstSrc **msg_list)
2671{3356{
2672 IrInstructionCompileLog *instruction = ir_build_instruction<IrInstructionCompileLog>(irb, scope, source_node);3357 IrInstSrcCompileLog *instruction = ir_build_instruction<IrInstSrcCompileLog>(irb, scope, source_node);
2673 instruction->msg_count = msg_count;3358 instruction->msg_count = msg_count;
2674 instruction->msg_list = msg_list;3359 instruction->msg_list = msg_list;
26753360
...@@ -2680,8 +3365,8 @@ static IrInstruction *ir_build_compile_log(IrBuilder *irb, Scope *scope, AstNode...@@ -2680,8 +3365,8 @@ static IrInstruction *ir_build_compile_log(IrBuilder *irb, Scope *scope, AstNode
2680 return &instruction->base;3365 return &instruction->base;
2681}3366}
26823367
2683static IrInstruction *ir_build_err_name(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {3368static IrInstSrc *ir_build_err_name(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
2684 IrInstructionErrName *instruction = ir_build_instruction<IrInstructionErrName>(irb, scope, source_node);3369 IrInstSrcErrName *instruction = ir_build_instruction<IrInstSrcErrName>(irb, scope, source_node);
2685 instruction->value = value;3370 instruction->value = value;
26863371
2687 ir_ref_instruction(value, irb->current_basic_block);3372 ir_ref_instruction(value, irb->current_basic_block);
...@@ -2689,13 +3374,26 @@ static IrInstruction *ir_build_err_name(IrBuilder *irb, Scope *scope, AstNode *s...@@ -2689,13 +3374,26 @@ static IrInstruction *ir_build_err_name(IrBuilder *irb, Scope *scope, AstNode *s
2689 return &instruction->base;3374 return &instruction->base;
2690}3375}
26913376
2692static IrInstruction *ir_build_c_import(IrBuilder *irb, Scope *scope, AstNode *source_node) {3377static IrInstGen *ir_build_err_name_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value,
2693 IrInstructionCImport *instruction = ir_build_instruction<IrInstructionCImport>(irb, scope, source_node);3378 ZigType *str_type)
3379{
3380 IrInstGenErrName *instruction = ir_build_inst_gen<IrInstGenErrName>(&ira->new_irb,
3381 source_instr->scope, source_instr->source_node);
3382 instruction->base.value->type = str_type;
3383 instruction->value = value;
3384
3385 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
3386
2694 return &instruction->base;3387 return &instruction->base;
2695}3388}
26963389
2697static IrInstruction *ir_build_c_include(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {3390static IrInstSrc *ir_build_c_import(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
2698 IrInstructionCInclude *instruction = ir_build_instruction<IrInstructionCInclude>(irb, scope, source_node);3391 IrInstSrcCImport *instruction = ir_build_instruction<IrInstSrcCImport>(irb, scope, source_node);
3392 return &instruction->base;
3393}
3394
3395static IrInstSrc *ir_build_c_include(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
3396 IrInstSrcCInclude *instruction = ir_build_instruction<IrInstSrcCInclude>(irb, scope, source_node);
2699 instruction->name = name;3397 instruction->name = name;
27003398
2701 ir_ref_instruction(name, irb->current_basic_block);3399 ir_ref_instruction(name, irb->current_basic_block);
...@@ -2703,8 +3401,8 @@ static IrInstruction *ir_build_c_include(IrBuilder *irb, Scope *scope, AstNode *...@@ -2703,8 +3401,8 @@ static IrInstruction *ir_build_c_include(IrBuilder *irb, Scope *scope, AstNode *
2703 return &instruction->base;3401 return &instruction->base;
2704}3402}
27053403
2706static IrInstruction *ir_build_c_define(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name, IrInstruction *value) {3404static IrInstSrc *ir_build_c_define(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name, IrInstSrc *value) {
2707 IrInstructionCDefine *instruction = ir_build_instruction<IrInstructionCDefine>(irb, scope, source_node);3405 IrInstSrcCDefine *instruction = ir_build_instruction<IrInstSrcCDefine>(irb, scope, source_node);
2708 instruction->name = name;3406 instruction->name = name;
2709 instruction->value = value;3407 instruction->value = value;
27103408
...@@ -2714,8 +3412,8 @@ static IrInstruction *ir_build_c_define(IrBuilder *irb, Scope *scope, AstNode *s...@@ -2714,8 +3412,8 @@ static IrInstruction *ir_build_c_define(IrBuilder *irb, Scope *scope, AstNode *s
2714 return &instruction->base;3412 return &instruction->base;
2715}3413}
27163414
2717static IrInstruction *ir_build_c_undef(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {3415static IrInstSrc *ir_build_c_undef(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
2718 IrInstructionCUndef *instruction = ir_build_instruction<IrInstructionCUndef>(irb, scope, source_node);3416 IrInstSrcCUndef *instruction = ir_build_instruction<IrInstSrcCUndef>(irb, scope, source_node);
2719 instruction->name = name;3417 instruction->name = name;
27203418
2721 ir_ref_instruction(name, irb->current_basic_block);3419 ir_ref_instruction(name, irb->current_basic_block);
...@@ -2723,8 +3421,8 @@ static IrInstruction *ir_build_c_undef(IrBuilder *irb, Scope *scope, AstNode *so...@@ -2723,8 +3421,8 @@ static IrInstruction *ir_build_c_undef(IrBuilder *irb, Scope *scope, AstNode *so
2723 return &instruction->base;3421 return &instruction->base;
2724}3422}
27253423
2726static IrInstruction *ir_build_embed_file(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {3424static IrInstSrc *ir_build_embed_file(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
2727 IrInstructionEmbedFile *instruction = ir_build_instruction<IrInstructionEmbedFile>(irb, scope, source_node);3425 IrInstSrcEmbedFile *instruction = ir_build_instruction<IrInstSrcEmbedFile>(irb, scope, source_node);
2728 instruction->name = name;3426 instruction->name = name;
27293427
2730 ir_ref_instruction(name, irb->current_basic_block);3428 ir_ref_instruction(name, irb->current_basic_block);
...@@ -2732,11 +3430,11 @@ static IrInstruction *ir_build_embed_file(IrBuilder *irb, Scope *scope, AstNode...@@ -2732,11 +3430,11 @@ static IrInstruction *ir_build_embed_file(IrBuilder *irb, Scope *scope, AstNode
2732 return &instruction->base;3430 return &instruction->base;
2733}3431}
27343432
2735static IrInstruction *ir_build_cmpxchg_src(IrBuilder *irb, Scope *scope, AstNode *source_node,3433static IrInstSrc *ir_build_cmpxchg_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2736 IrInstruction *type_value, IrInstruction *ptr, IrInstruction *cmp_value, IrInstruction *new_value,3434 IrInstSrc *type_value, IrInstSrc *ptr, IrInstSrc *cmp_value, IrInstSrc *new_value,
2737 IrInstruction *success_order_value, IrInstruction *failure_order_value, bool is_weak, ResultLoc *result_loc)3435 IrInstSrc *success_order_value, IrInstSrc *failure_order_value, bool is_weak, ResultLoc *result_loc)
2738{3436{
2739 IrInstructionCmpxchgSrc *instruction = ir_build_instruction<IrInstructionCmpxchgSrc>(irb, scope, source_node);3437 IrInstSrcCmpxchg *instruction = ir_build_instruction<IrInstSrcCmpxchg>(irb, scope, source_node);
2740 instruction->type_value = type_value;3438 instruction->type_value = type_value;
2741 instruction->ptr = ptr;3439 instruction->ptr = ptr;
2742 instruction->cmp_value = cmp_value;3440 instruction->cmp_value = cmp_value;
...@@ -2756,11 +3454,11 @@ static IrInstruction *ir_build_cmpxchg_src(IrBuilder *irb, Scope *scope, AstNode...@@ -2756,11 +3454,11 @@ static IrInstruction *ir_build_cmpxchg_src(IrBuilder *irb, Scope *scope, AstNode
2756 return &instruction->base;3454 return &instruction->base;
2757}3455}
27583456
2759static IrInstruction *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_type,3457static IrInstGen *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_type,
2760 IrInstruction *ptr, IrInstruction *cmp_value, IrInstruction *new_value,3458 IrInstGen *ptr, IrInstGen *cmp_value, IrInstGen *new_value,
2761 AtomicOrder success_order, AtomicOrder failure_order, bool is_weak, IrInstruction *result_loc)3459 AtomicOrder success_order, AtomicOrder failure_order, bool is_weak, IrInstGen *result_loc)
2762{3460{
2763 IrInstructionCmpxchgGen *instruction = ir_build_instruction<IrInstructionCmpxchgGen>(&ira->new_irb,3461 IrInstGenCmpxchg *instruction = ir_build_inst_gen<IrInstGenCmpxchg>(&ira->new_irb,
2764 source_instruction->scope, source_instruction->source_node);3462 source_instruction->scope, source_instruction->source_node);
2765 instruction->base.value->type = result_type;3463 instruction->base.value->type = result_type;
2766 instruction->ptr = ptr;3464 instruction->ptr = ptr;
...@@ -2771,26 +3469,35 @@ static IrInstruction *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInstruction *source...@@ -2771,26 +3469,35 @@ static IrInstruction *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInstruction *source
2771 instruction->is_weak = is_weak;3469 instruction->is_weak = is_weak;
2772 instruction->result_loc = result_loc;3470 instruction->result_loc = result_loc;
27733471
2774 ir_ref_instruction(ptr, ira->new_irb.current_basic_block);3472 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
2775 ir_ref_instruction(cmp_value, ira->new_irb.current_basic_block);3473 ir_ref_inst_gen(cmp_value, ira->new_irb.current_basic_block);
2776 ir_ref_instruction(new_value, ira->new_irb.current_basic_block);3474 ir_ref_inst_gen(new_value, ira->new_irb.current_basic_block);
2777 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);3475 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
27783476
2779 return &instruction->base;3477 return &instruction->base;
2780}3478}
27813479
2782static IrInstruction *ir_build_fence(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *order_value, AtomicOrder order) {3480static IrInstSrc *ir_build_fence(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *order) {
2783 IrInstructionFence *instruction = ir_build_instruction<IrInstructionFence>(irb, scope, source_node);3481 IrInstSrcFence *instruction = ir_build_instruction<IrInstSrcFence>(irb, scope, source_node);
2784 instruction->order_value = order_value;
2785 instruction->order = order;3482 instruction->order = order;
27863483
2787 ir_ref_instruction(order_value, irb->current_basic_block);3484 ir_ref_instruction(order, irb->current_basic_block);
3485
3486 return &instruction->base;
3487}
3488
3489static IrInstGen *ir_build_fence_gen(IrAnalyze *ira, IrInst *source_instr, AtomicOrder order) {
3490 IrInstGenFence *instruction = ir_build_inst_void<IrInstGenFence>(&ira->new_irb,
3491 source_instr->scope, source_instr->source_node);
3492 instruction->order = order;
27883493
2789 return &instruction->base;3494 return &instruction->base;
2790}3495}
27913496
2792static IrInstruction *ir_build_truncate(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {3497static IrInstSrc *ir_build_truncate(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2793 IrInstructionTruncate *instruction = ir_build_instruction<IrInstructionTruncate>(irb, scope, source_node);3498 IrInstSrc *dest_type, IrInstSrc *target)
3499{
3500 IrInstSrcTruncate *instruction = ir_build_instruction<IrInstSrcTruncate>(irb, scope, source_node);
2794 instruction->dest_type = dest_type;3501 instruction->dest_type = dest_type;
2795 instruction->target = target;3502 instruction->target = target;
27963503
...@@ -2800,8 +3507,23 @@ static IrInstruction *ir_build_truncate(IrBuilder *irb, Scope *scope, AstNode *s...@@ -2800,8 +3507,23 @@ static IrInstruction *ir_build_truncate(IrBuilder *irb, Scope *scope, AstNode *s
2800 return &instruction->base;3507 return &instruction->base;
2801}3508}
28023509
2803static IrInstruction *ir_build_int_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {3510static IrInstGen *ir_build_truncate_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *dest_type,
2804 IrInstructionIntCast *instruction = ir_build_instruction<IrInstructionIntCast>(irb, scope, source_node);3511 IrInstGen *target)
3512{
3513 IrInstGenTruncate *instruction = ir_build_inst_gen<IrInstGenTruncate>(&ira->new_irb,
3514 source_instr->scope, source_instr->source_node);
3515 instruction->base.value->type = dest_type;
3516 instruction->target = target;
3517
3518 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
3519
3520 return &instruction->base;
3521}
3522
3523static IrInstSrc *ir_build_int_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *dest_type,
3524 IrInstSrc *target)
3525{
3526 IrInstSrcIntCast *instruction = ir_build_instruction<IrInstSrcIntCast>(irb, scope, source_node);
2805 instruction->dest_type = dest_type;3527 instruction->dest_type = dest_type;
2806 instruction->target = target;3528 instruction->target = target;
28073529
...@@ -2811,8 +3533,10 @@ static IrInstruction *ir_build_int_cast(IrBuilder *irb, Scope *scope, AstNode *s...@@ -2811,8 +3533,10 @@ static IrInstruction *ir_build_int_cast(IrBuilder *irb, Scope *scope, AstNode *s
2811 return &instruction->base;3533 return &instruction->base;
2812}3534}
28133535
2814static IrInstruction *ir_build_float_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {3536static IrInstSrc *ir_build_float_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *dest_type,
2815 IrInstructionFloatCast *instruction = ir_build_instruction<IrInstructionFloatCast>(irb, scope, source_node);3537 IrInstSrc *target)
3538{
3539 IrInstSrcFloatCast *instruction = ir_build_instruction<IrInstSrcFloatCast>(irb, scope, source_node);
2816 instruction->dest_type = dest_type;3540 instruction->dest_type = dest_type;
2817 instruction->target = target;3541 instruction->target = target;
28183542
...@@ -2822,8 +3546,10 @@ static IrInstruction *ir_build_float_cast(IrBuilder *irb, Scope *scope, AstNode...@@ -2822,8 +3546,10 @@ static IrInstruction *ir_build_float_cast(IrBuilder *irb, Scope *scope, AstNode
2822 return &instruction->base;3546 return &instruction->base;
2823}3547}
28243548
2825static IrInstruction *ir_build_err_set_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {3549static IrInstSrc *ir_build_err_set_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2826 IrInstructionErrSetCast *instruction = ir_build_instruction<IrInstructionErrSetCast>(irb, scope, source_node);3550 IrInstSrc *dest_type, IrInstSrc *target)
3551{
3552 IrInstSrcErrSetCast *instruction = ir_build_instruction<IrInstSrcErrSetCast>(irb, scope, source_node);
2827 instruction->dest_type = dest_type;3553 instruction->dest_type = dest_type;
2828 instruction->target = target;3554 instruction->target = target;
28293555
...@@ -2833,10 +3559,10 @@ static IrInstruction *ir_build_err_set_cast(IrBuilder *irb, Scope *scope, AstNod...@@ -2833,10 +3559,10 @@ static IrInstruction *ir_build_err_set_cast(IrBuilder *irb, Scope *scope, AstNod
2833 return &instruction->base;3559 return &instruction->base;
2834}3560}
28353561
2836static IrInstruction *ir_build_to_bytes(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *target,3562static IrInstSrc *ir_build_to_bytes(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *target,
2837 ResultLoc *result_loc)3563 ResultLoc *result_loc)
2838{3564{
2839 IrInstructionToBytes *instruction = ir_build_instruction<IrInstructionToBytes>(irb, scope, source_node);3565 IrInstSrcToBytes *instruction = ir_build_instruction<IrInstSrcToBytes>(irb, scope, source_node);
2840 instruction->target = target;3566 instruction->target = target;
2841 instruction->result_loc = result_loc;3567 instruction->result_loc = result_loc;
28423568
...@@ -2845,10 +3571,10 @@ static IrInstruction *ir_build_to_bytes(IrBuilder *irb, Scope *scope, AstNode *s...@@ -2845,10 +3571,10 @@ static IrInstruction *ir_build_to_bytes(IrBuilder *irb, Scope *scope, AstNode *s
2845 return &instruction->base;3571 return &instruction->base;
2846}3572}
28473573
2848static IrInstruction *ir_build_from_bytes(IrBuilder *irb, Scope *scope, AstNode *source_node,3574static IrInstSrc *ir_build_from_bytes(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2849 IrInstruction *dest_child_type, IrInstruction *target, ResultLoc *result_loc)3575 IrInstSrc *dest_child_type, IrInstSrc *target, ResultLoc *result_loc)
2850{3576{
2851 IrInstructionFromBytes *instruction = ir_build_instruction<IrInstructionFromBytes>(irb, scope, source_node);3577 IrInstSrcFromBytes *instruction = ir_build_instruction<IrInstSrcFromBytes>(irb, scope, source_node);
2852 instruction->dest_child_type = dest_child_type;3578 instruction->dest_child_type = dest_child_type;
2853 instruction->target = target;3579 instruction->target = target;
2854 instruction->result_loc = result_loc;3580 instruction->result_loc = result_loc;
...@@ -2859,8 +3585,10 @@ static IrInstruction *ir_build_from_bytes(IrBuilder *irb, Scope *scope, AstNode...@@ -2859,8 +3585,10 @@ static IrInstruction *ir_build_from_bytes(IrBuilder *irb, Scope *scope, AstNode
2859 return &instruction->base;3585 return &instruction->base;
2860}3586}
28613587
2862static IrInstruction *ir_build_int_to_float(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {3588static IrInstSrc *ir_build_int_to_float(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2863 IrInstructionIntToFloat *instruction = ir_build_instruction<IrInstructionIntToFloat>(irb, scope, source_node);3589 IrInstSrc *dest_type, IrInstSrc *target)
3590{
3591 IrInstSrcIntToFloat *instruction = ir_build_instruction<IrInstSrcIntToFloat>(irb, scope, source_node);
2864 instruction->dest_type = dest_type;3592 instruction->dest_type = dest_type;
2865 instruction->target = target;3593 instruction->target = target;
28663594
...@@ -2870,8 +3598,10 @@ static IrInstruction *ir_build_int_to_float(IrBuilder *irb, Scope *scope, AstNod...@@ -2870,8 +3598,10 @@ static IrInstruction *ir_build_int_to_float(IrBuilder *irb, Scope *scope, AstNod
2870 return &instruction->base;3598 return &instruction->base;
2871}3599}
28723600
2873static IrInstruction *ir_build_float_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {3601static IrInstSrc *ir_build_float_to_int(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2874 IrInstructionFloatToInt *instruction = ir_build_instruction<IrInstructionFloatToInt>(irb, scope, source_node);3602 IrInstSrc *dest_type, IrInstSrc *target)
3603{
3604 IrInstSrcFloatToInt *instruction = ir_build_instruction<IrInstSrcFloatToInt>(irb, scope, source_node);
2875 instruction->dest_type = dest_type;3605 instruction->dest_type = dest_type;
2876 instruction->target = target;3606 instruction->target = target;
28773607
...@@ -2881,8 +3611,8 @@ static IrInstruction *ir_build_float_to_int(IrBuilder *irb, Scope *scope, AstNod...@@ -2881,8 +3611,8 @@ static IrInstruction *ir_build_float_to_int(IrBuilder *irb, Scope *scope, AstNod
2881 return &instruction->base;3611 return &instruction->base;
2882}3612}
28833613
2884static IrInstruction *ir_build_bool_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *target) {3614static IrInstSrc *ir_build_bool_to_int(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *target) {
2885 IrInstructionBoolToInt *instruction = ir_build_instruction<IrInstructionBoolToInt>(irb, scope, source_node);3615 IrInstSrcBoolToInt *instruction = ir_build_instruction<IrInstSrcBoolToInt>(irb, scope, source_node);
2886 instruction->target = target;3616 instruction->target = target;
28873617
2888 ir_ref_instruction(target, irb->current_basic_block);3618 ir_ref_instruction(target, irb->current_basic_block);
...@@ -2890,8 +3620,10 @@ static IrInstruction *ir_build_bool_to_int(IrBuilder *irb, Scope *scope, AstNode...@@ -2890,8 +3620,10 @@ static IrInstruction *ir_build_bool_to_int(IrBuilder *irb, Scope *scope, AstNode
2890 return &instruction->base;3620 return &instruction->base;
2891}3621}
28923622
2893static IrInstruction *ir_build_int_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *is_signed, IrInstruction *bit_count) {3623static IrInstSrc *ir_build_int_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *is_signed,
2894 IrInstructionIntType *instruction = ir_build_instruction<IrInstructionIntType>(irb, scope, source_node);3624 IrInstSrc *bit_count)
3625{
3626 IrInstSrcIntType *instruction = ir_build_instruction<IrInstSrcIntType>(irb, scope, source_node);
2895 instruction->is_signed = is_signed;3627 instruction->is_signed = is_signed;
2896 instruction->bit_count = bit_count;3628 instruction->bit_count = bit_count;
28973629
...@@ -2901,10 +3633,10 @@ static IrInstruction *ir_build_int_type(IrBuilder *irb, Scope *scope, AstNode *s...@@ -2901,10 +3633,10 @@ static IrInstruction *ir_build_int_type(IrBuilder *irb, Scope *scope, AstNode *s
2901 return &instruction->base;3633 return &instruction->base;
2902}3634}
29033635
2904static IrInstruction *ir_build_vector_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *len,3636static IrInstSrc *ir_build_vector_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *len,
2905 IrInstruction *elem_type)3637 IrInstSrc *elem_type)
2906{3638{
2907 IrInstructionVectorType *instruction = ir_build_instruction<IrInstructionVectorType>(irb, scope, source_node);3639 IrInstSrcVectorType *instruction = ir_build_instruction<IrInstSrcVectorType>(irb, scope, source_node);
2908 instruction->len = len;3640 instruction->len = len;
2909 instruction->elem_type = elem_type;3641 instruction->elem_type = elem_type;
29103642
...@@ -2914,18 +3646,16 @@ static IrInstruction *ir_build_vector_type(IrBuilder *irb, Scope *scope, AstNode...@@ -2914,18 +3646,16 @@ static IrInstruction *ir_build_vector_type(IrBuilder *irb, Scope *scope, AstNode
2914 return &instruction->base;3646 return &instruction->base;
2915}3647}
29163648
2917static IrInstruction *ir_build_shuffle_vector(IrBuilder *irb, Scope *scope, AstNode *source_node,3649static IrInstSrc *ir_build_shuffle_vector(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2918 IrInstruction *scalar_type, IrInstruction *a, IrInstruction *b, IrInstruction *mask)3650 IrInstSrc *scalar_type, IrInstSrc *a, IrInstSrc *b, IrInstSrc *mask)
2919{3651{
2920 IrInstructionShuffleVector *instruction = ir_build_instruction<IrInstructionShuffleVector>(irb, scope, source_node);3652 IrInstSrcShuffleVector *instruction = ir_build_instruction<IrInstSrcShuffleVector>(irb, scope, source_node);
2921 instruction->scalar_type = scalar_type;3653 instruction->scalar_type = scalar_type;
2922 instruction->a = a;3654 instruction->a = a;
2923 instruction->b = b;3655 instruction->b = b;
2924 instruction->mask = mask;3656 instruction->mask = mask;
29253657
2926 if (scalar_type != nullptr) {3658 if (scalar_type != nullptr) ir_ref_instruction(scalar_type, irb->current_basic_block);
2927 ir_ref_instruction(scalar_type, irb->current_basic_block);
2928 }
2929 ir_ref_instruction(a, irb->current_basic_block);3659 ir_ref_instruction(a, irb->current_basic_block);
2930 ir_ref_instruction(b, irb->current_basic_block);3660 ir_ref_instruction(b, irb->current_basic_block);
2931 ir_ref_instruction(mask, irb->current_basic_block);3661 ir_ref_instruction(mask, irb->current_basic_block);
...@@ -2933,10 +3663,26 @@ static IrInstruction *ir_build_shuffle_vector(IrBuilder *irb, Scope *scope, AstN...@@ -2933,10 +3663,26 @@ static IrInstruction *ir_build_shuffle_vector(IrBuilder *irb, Scope *scope, AstN
2933 return &instruction->base;3663 return &instruction->base;
2934}3664}
29353665
2936static IrInstruction *ir_build_splat_src(IrBuilder *irb, Scope *scope, AstNode *source_node,3666static IrInstGen *ir_build_shuffle_vector_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
2937 IrInstruction *len, IrInstruction *scalar)3667 ZigType *result_type, IrInstGen *a, IrInstGen *b, IrInstGen *mask)
3668{
3669 IrInstGenShuffleVector *inst = ir_build_inst_gen<IrInstGenShuffleVector>(&ira->new_irb, scope, source_node);
3670 inst->base.value->type = result_type;
3671 inst->a = a;
3672 inst->b = b;
3673 inst->mask = mask;
3674
3675 ir_ref_inst_gen(a, ira->new_irb.current_basic_block);
3676 ir_ref_inst_gen(b, ira->new_irb.current_basic_block);
3677 ir_ref_inst_gen(mask, ira->new_irb.current_basic_block);
3678
3679 return &inst->base;
3680}
3681
3682static IrInstSrc *ir_build_splat_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3683 IrInstSrc *len, IrInstSrc *scalar)
2938{3684{
2939 IrInstructionSplatSrc *instruction = ir_build_instruction<IrInstructionSplatSrc>(irb, scope, source_node);3685 IrInstSrcSplat *instruction = ir_build_instruction<IrInstSrcSplat>(irb, scope, source_node);
2940 instruction->len = len;3686 instruction->len = len;
2941 instruction->scalar = scalar;3687 instruction->scalar = scalar;
29423688
...@@ -2946,8 +3692,21 @@ static IrInstruction *ir_build_splat_src(IrBuilder *irb, Scope *scope, AstNode *...@@ -2946,8 +3692,21 @@ static IrInstruction *ir_build_splat_src(IrBuilder *irb, Scope *scope, AstNode *
2946 return &instruction->base;3692 return &instruction->base;
2947}3693}
29483694
2949static IrInstruction *ir_build_bool_not(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {3695static IrInstGen *ir_build_splat_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_type,
2950 IrInstructionBoolNot *instruction = ir_build_instruction<IrInstructionBoolNot>(irb, scope, source_node);3696 IrInstGen *scalar)
3697{
3698 IrInstGenSplat *instruction = ir_build_inst_gen<IrInstGenSplat>(
3699 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
3700 instruction->base.value->type = result_type;
3701 instruction->scalar = scalar;
3702
3703 ir_ref_inst_gen(scalar, ira->new_irb.current_basic_block);
3704
3705 return &instruction->base;
3706}
3707
3708static IrInstSrc *ir_build_bool_not(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
3709 IrInstSrcBoolNot *instruction = ir_build_instruction<IrInstSrcBoolNot>(irb, scope, source_node);
2951 instruction->value = value;3710 instruction->value = value;
29523711
2953 ir_ref_instruction(value, irb->current_basic_block);3712 ir_ref_instruction(value, irb->current_basic_block);
...@@ -2955,10 +3714,21 @@ static IrInstruction *ir_build_bool_not(IrBuilder *irb, Scope *scope, AstNode *s...@@ -2955,10 +3714,21 @@ static IrInstruction *ir_build_bool_not(IrBuilder *irb, Scope *scope, AstNode *s
2955 return &instruction->base;3714 return &instruction->base;
2956}3715}
29573716
2958static IrInstruction *ir_build_memset(IrBuilder *irb, Scope *scope, AstNode *source_node,3717static IrInstGen *ir_build_bool_not_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value) {
2959 IrInstruction *dest_ptr, IrInstruction *byte, IrInstruction *count)3718 IrInstGenBoolNot *instruction = ir_build_inst_gen<IrInstGenBoolNot>(&ira->new_irb,
3719 source_instr->scope, source_instr->source_node);
3720 instruction->base.value->type = ira->codegen->builtin_types.entry_bool;
3721 instruction->value = value;
3722
3723 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
3724
3725 return &instruction->base;
3726}
3727
3728static IrInstSrc *ir_build_memset_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3729 IrInstSrc *dest_ptr, IrInstSrc *byte, IrInstSrc *count)
2960{3730{
2961 IrInstructionMemset *instruction = ir_build_instruction<IrInstructionMemset>(irb, scope, source_node);3731 IrInstSrcMemset *instruction = ir_build_instruction<IrInstSrcMemset>(irb, scope, source_node);
2962 instruction->dest_ptr = dest_ptr;3732 instruction->dest_ptr = dest_ptr;
2963 instruction->byte = byte;3733 instruction->byte = byte;
2964 instruction->count = count;3734 instruction->count = count;
...@@ -2970,10 +3740,26 @@ static IrInstruction *ir_build_memset(IrBuilder *irb, Scope *scope, AstNode *sou...@@ -2970,10 +3740,26 @@ static IrInstruction *ir_build_memset(IrBuilder *irb, Scope *scope, AstNode *sou
2970 return &instruction->base;3740 return &instruction->base;
2971}3741}
29723742
2973static IrInstruction *ir_build_memcpy(IrBuilder *irb, Scope *scope, AstNode *source_node,3743static IrInstGen *ir_build_memset_gen(IrAnalyze *ira, IrInst *source_instr,
2974 IrInstruction *dest_ptr, IrInstruction *src_ptr, IrInstruction *count)3744 IrInstGen *dest_ptr, IrInstGen *byte, IrInstGen *count)
3745{
3746 IrInstGenMemset *instruction = ir_build_inst_void<IrInstGenMemset>(&ira->new_irb,
3747 source_instr->scope, source_instr->source_node);
3748 instruction->dest_ptr = dest_ptr;
3749 instruction->byte = byte;
3750 instruction->count = count;
3751
3752 ir_ref_inst_gen(dest_ptr, ira->new_irb.current_basic_block);
3753 ir_ref_inst_gen(byte, ira->new_irb.current_basic_block);
3754 ir_ref_inst_gen(count, ira->new_irb.current_basic_block);
3755
3756 return &instruction->base;
3757}
3758
3759static IrInstSrc *ir_build_memcpy_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3760 IrInstSrc *dest_ptr, IrInstSrc *src_ptr, IrInstSrc *count)
2975{3761{
2976 IrInstructionMemcpy *instruction = ir_build_instruction<IrInstructionMemcpy>(irb, scope, source_node);3762 IrInstSrcMemcpy *instruction = ir_build_instruction<IrInstSrcMemcpy>(irb, scope, source_node);
2977 instruction->dest_ptr = dest_ptr;3763 instruction->dest_ptr = dest_ptr;
2978 instruction->src_ptr = src_ptr;3764 instruction->src_ptr = src_ptr;
2979 instruction->count = count;3765 instruction->count = count;
...@@ -2985,11 +3771,27 @@ static IrInstruction *ir_build_memcpy(IrBuilder *irb, Scope *scope, AstNode *sou...@@ -2985,11 +3771,27 @@ static IrInstruction *ir_build_memcpy(IrBuilder *irb, Scope *scope, AstNode *sou
2985 return &instruction->base;3771 return &instruction->base;
2986}3772}
29873773
2988static IrInstruction *ir_build_slice_src(IrBuilder *irb, Scope *scope, AstNode *source_node,3774static IrInstGen *ir_build_memcpy_gen(IrAnalyze *ira, IrInst *source_instr,
2989 IrInstruction *ptr, IrInstruction *start, IrInstruction *end, IrInstruction *sentinel,3775 IrInstGen *dest_ptr, IrInstGen *src_ptr, IrInstGen *count)
3776{
3777 IrInstGenMemcpy *instruction = ir_build_inst_void<IrInstGenMemcpy>(&ira->new_irb,
3778 source_instr->scope, source_instr->source_node);
3779 instruction->dest_ptr = dest_ptr;
3780 instruction->src_ptr = src_ptr;
3781 instruction->count = count;
3782
3783 ir_ref_inst_gen(dest_ptr, ira->new_irb.current_basic_block);
3784 ir_ref_inst_gen(src_ptr, ira->new_irb.current_basic_block);
3785 ir_ref_inst_gen(count, ira->new_irb.current_basic_block);
3786
3787 return &instruction->base;
3788}
3789
3790static IrInstSrc *ir_build_slice_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3791 IrInstSrc *ptr, IrInstSrc *start, IrInstSrc *end, IrInstSrc *sentinel,
2990 bool safety_check_on, ResultLoc *result_loc)3792 bool safety_check_on, ResultLoc *result_loc)
2991{3793{
2992 IrInstructionSliceSrc *instruction = ir_build_instruction<IrInstructionSliceSrc>(irb, scope, source_node);3794 IrInstSrcSlice *instruction = ir_build_instruction<IrInstSrcSlice>(irb, scope, source_node);
2993 instruction->ptr = ptr;3795 instruction->ptr = ptr;
2994 instruction->start = start;3796 instruction->start = start;
2995 instruction->end = end;3797 instruction->end = end;
...@@ -3005,23 +3807,10 @@ static IrInstruction *ir_build_slice_src(IrBuilder *irb, Scope *scope, AstNode *...@@ -3005,23 +3807,10 @@ static IrInstruction *ir_build_slice_src(IrBuilder *irb, Scope *scope, AstNode *
3005 return &instruction->base;3807 return &instruction->base;
3006}3808}
30073809
3008static IrInstruction *ir_build_splat_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_type,3810static IrInstGen *ir_build_slice_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *slice_type,
3009 IrInstruction *scalar)3811 IrInstGen *ptr, IrInstGen *start, IrInstGen *end, bool safety_check_on, IrInstGen *result_loc)
3010{
3011 IrInstructionSplatGen *instruction = ir_build_instruction<IrInstructionSplatGen>(
3012 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
3013 instruction->base.value->type = result_type;
3014 instruction->scalar = scalar;
3015
3016 ir_ref_instruction(scalar, ira->new_irb.current_basic_block);
3017
3018 return &instruction->base;
3019}
3020
3021static IrInstruction *ir_build_slice_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *slice_type,
3022 IrInstruction *ptr, IrInstruction *start, IrInstruction *end, bool safety_check_on, IrInstruction *result_loc)
3023{3812{
3024 IrInstructionSliceGen *instruction = ir_build_instruction<IrInstructionSliceGen>(3813 IrInstGenSlice *instruction = ir_build_inst_gen<IrInstGenSlice>(
3025 &ira->new_irb, source_instruction->scope, source_instruction->source_node);3814 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
3026 instruction->base.value->type = slice_type;3815 instruction->base.value->type = slice_type;
3027 instruction->ptr = ptr;3816 instruction->ptr = ptr;
...@@ -3030,16 +3819,16 @@ static IrInstruction *ir_build_slice_gen(IrAnalyze *ira, IrInstruction *source_i...@@ -3030,16 +3819,16 @@ static IrInstruction *ir_build_slice_gen(IrAnalyze *ira, IrInstruction *source_i
3030 instruction->safety_check_on = safety_check_on;3819 instruction->safety_check_on = safety_check_on;
3031 instruction->result_loc = result_loc;3820 instruction->result_loc = result_loc;
30323821
3033 ir_ref_instruction(ptr, ira->new_irb.current_basic_block);3822 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
3034 ir_ref_instruction(start, ira->new_irb.current_basic_block);3823 ir_ref_inst_gen(start, ira->new_irb.current_basic_block);
3035 if (end) ir_ref_instruction(end, ira->new_irb.current_basic_block);3824 if (end) ir_ref_inst_gen(end, ira->new_irb.current_basic_block);
3036 ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);3825 ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
30373826
3038 return &instruction->base;3827 return &instruction->base;
3039}3828}
30403829
3041static IrInstruction *ir_build_member_count(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *container) {3830static IrInstSrc *ir_build_member_count(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *container) {
3042 IrInstructionMemberCount *instruction = ir_build_instruction<IrInstructionMemberCount>(irb, scope, source_node);3831 IrInstSrcMemberCount *instruction = ir_build_instruction<IrInstSrcMemberCount>(irb, scope, source_node);
3043 instruction->container = container;3832 instruction->container = container;
30443833
3045 ir_ref_instruction(container, irb->current_basic_block);3834 ir_ref_instruction(container, irb->current_basic_block);
...@@ -3047,10 +3836,10 @@ static IrInstruction *ir_build_member_count(IrBuilder *irb, Scope *scope, AstNod...@@ -3047,10 +3836,10 @@ static IrInstruction *ir_build_member_count(IrBuilder *irb, Scope *scope, AstNod
3047 return &instruction->base;3836 return &instruction->base;
3048}3837}
30493838
3050static IrInstruction *ir_build_member_type(IrBuilder *irb, Scope *scope, AstNode *source_node,3839static IrInstSrc *ir_build_member_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3051 IrInstruction *container_type, IrInstruction *member_index)3840 IrInstSrc *container_type, IrInstSrc *member_index)
3052{3841{
3053 IrInstructionMemberType *instruction = ir_build_instruction<IrInstructionMemberType>(irb, scope, source_node);3842 IrInstSrcMemberType *instruction = ir_build_instruction<IrInstSrcMemberType>(irb, scope, source_node);
3054 instruction->container_type = container_type;3843 instruction->container_type = container_type;
3055 instruction->member_index = member_index;3844 instruction->member_index = member_index;
30563845
...@@ -3060,10 +3849,10 @@ static IrInstruction *ir_build_member_type(IrBuilder *irb, Scope *scope, AstNode...@@ -3060,10 +3849,10 @@ static IrInstruction *ir_build_member_type(IrBuilder *irb, Scope *scope, AstNode
3060 return &instruction->base;3849 return &instruction->base;
3061}3850}
30623851
3063static IrInstruction *ir_build_member_name(IrBuilder *irb, Scope *scope, AstNode *source_node,3852static IrInstSrc *ir_build_member_name(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3064 IrInstruction *container_type, IrInstruction *member_index)3853 IrInstSrc *container_type, IrInstSrc *member_index)
3065{3854{
3066 IrInstructionMemberName *instruction = ir_build_instruction<IrInstructionMemberName>(irb, scope, source_node);3855 IrInstSrcMemberName *instruction = ir_build_instruction<IrInstSrcMemberName>(irb, scope, source_node);
3067 instruction->container_type = container_type;3856 instruction->container_type = container_type;
3068 instruction->member_index = member_index;3857 instruction->member_index = member_index;
30693858
...@@ -3073,65 +3862,88 @@ static IrInstruction *ir_build_member_name(IrBuilder *irb, Scope *scope, AstNode...@@ -3073,65 +3862,88 @@ static IrInstruction *ir_build_member_name(IrBuilder *irb, Scope *scope, AstNode
3073 return &instruction->base;3862 return &instruction->base;
3074}3863}
30753864
3076static IrInstruction *ir_build_breakpoint(IrBuilder *irb, Scope *scope, AstNode *source_node) {3865static IrInstSrc *ir_build_breakpoint(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3077 IrInstructionBreakpoint *instruction = ir_build_instruction<IrInstructionBreakpoint>(irb, scope, source_node);3866 IrInstSrcBreakpoint *instruction = ir_build_instruction<IrInstSrcBreakpoint>(irb, scope, source_node);
3078 return &instruction->base;3867 return &instruction->base;
3079}3868}
30803869
3081static IrInstruction *ir_build_return_address(IrBuilder *irb, Scope *scope, AstNode *source_node) {3870static IrInstGen *ir_build_breakpoint_gen(IrAnalyze *ira, IrInst *source_instr) {
3082 IrInstructionReturnAddress *instruction = ir_build_instruction<IrInstructionReturnAddress>(irb, scope, source_node);3871 IrInstGenBreakpoint *instruction = ir_build_inst_void<IrInstGenBreakpoint>(&ira->new_irb,
3872 source_instr->scope, source_instr->source_node);
3083 return &instruction->base;3873 return &instruction->base;
3084}3874}
30853875
3086static IrInstruction *ir_build_frame_address(IrBuilder *irb, Scope *scope, AstNode *source_node) {3876static IrInstSrc *ir_build_return_address_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3087 IrInstructionFrameAddress *instruction = ir_build_instruction<IrInstructionFrameAddress>(irb, scope, source_node);3877 IrInstSrcReturnAddress *instruction = ir_build_instruction<IrInstSrcReturnAddress>(irb, scope, source_node);
3088 return &instruction->base;3878 return &instruction->base;
3089}3879}
30903880
3091static IrInstruction *ir_build_handle(IrBuilder *irb, Scope *scope, AstNode *source_node) {3881static IrInstGen *ir_build_return_address_gen(IrAnalyze *ira, IrInst *source_instr) {
3092 IrInstructionFrameHandle *instruction = ir_build_instruction<IrInstructionFrameHandle>(irb, scope, source_node);3882 IrInstGenReturnAddress *inst = ir_build_inst_gen<IrInstGenReturnAddress>(&ira->new_irb, source_instr->scope, source_instr->source_node);
3093 return &instruction->base;3883 inst->base.value->type = ira->codegen->builtin_types.entry_usize;
3884 return &inst->base;
3885}
3886
3887static IrInstSrc *ir_build_frame_address_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3888 IrInstSrcFrameAddress *inst = ir_build_instruction<IrInstSrcFrameAddress>(irb, scope, source_node);
3889 return &inst->base;
3890}
3891
3892static IrInstGen *ir_build_frame_address_gen(IrAnalyze *ira, IrInst *source_instr) {
3893 IrInstGenFrameAddress *inst = ir_build_inst_gen<IrInstGenFrameAddress>(&ira->new_irb, source_instr->scope, source_instr->source_node);
3894 inst->base.value->type = ira->codegen->builtin_types.entry_usize;
3895 return &inst->base;
3896}
3897
3898static IrInstSrc *ir_build_handle_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3899 IrInstSrcFrameHandle *inst = ir_build_instruction<IrInstSrcFrameHandle>(irb, scope, source_node);
3900 return &inst->base;
3901}
3902
3903static IrInstGen *ir_build_handle_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *ty) {
3904 IrInstGenFrameHandle *inst = ir_build_inst_gen<IrInstGenFrameHandle>(&ira->new_irb, source_instr->scope, source_instr->source_node);
3905 inst->base.value->type = ty;
3906 return &inst->base;
3094}3907}
30953908
3096static IrInstruction *ir_build_frame_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *fn) {3909static IrInstSrc *ir_build_frame_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *fn) {
3097 IrInstructionFrameType *instruction = ir_build_instruction<IrInstructionFrameType>(irb, scope, source_node);3910 IrInstSrcFrameType *inst = ir_build_instruction<IrInstSrcFrameType>(irb, scope, source_node);
3098 instruction->fn = fn;3911 inst->fn = fn;
30993912
3100 ir_ref_instruction(fn, irb->current_basic_block);3913 ir_ref_instruction(fn, irb->current_basic_block);
31013914
3102 return &instruction->base;3915 return &inst->base;
3103}3916}
31043917
3105static IrInstruction *ir_build_frame_size_src(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *fn) {3918static IrInstSrc *ir_build_frame_size_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *fn) {
3106 IrInstructionFrameSizeSrc *instruction = ir_build_instruction<IrInstructionFrameSizeSrc>(irb, scope, source_node);3919 IrInstSrcFrameSize *inst = ir_build_instruction<IrInstSrcFrameSize>(irb, scope, source_node);
3107 instruction->fn = fn;3920 inst->fn = fn;
31083921
3109 ir_ref_instruction(fn, irb->current_basic_block);3922 ir_ref_instruction(fn, irb->current_basic_block);
31103923
3111 return &instruction->base;3924 return &inst->base;
3112}3925}
31133926
3114static IrInstruction *ir_build_frame_size_gen(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *fn)3927static IrInstGen *ir_build_frame_size_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *fn)
3115{3928{
3116 IrInstructionFrameSizeGen *instruction = ir_build_instruction<IrInstructionFrameSizeGen>(irb, scope, source_node);3929 IrInstGenFrameSize *inst = ir_build_inst_gen<IrInstGenFrameSize>(&ira->new_irb, source_instr->scope, source_instr->source_node);
3117 instruction->fn = fn;3930 inst->base.value->type = ira->codegen->builtin_types.entry_usize;
3931 inst->fn = fn;
31183932
3119 ir_ref_instruction(fn, irb->current_basic_block);3933 ir_ref_inst_gen(fn, ira->new_irb.current_basic_block);
31203934
3121 return &instruction->base;3935 return &inst->base;
3122}3936}
31233937
3124static IrInstruction *ir_build_overflow_op(IrBuilder *irb, Scope *scope, AstNode *source_node,3938static IrInstSrc *ir_build_overflow_op_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3125 IrOverflowOp op, IrInstruction *type_value, IrInstruction *op1, IrInstruction *op2,3939 IrOverflowOp op, IrInstSrc *type_value, IrInstSrc *op1, IrInstSrc *op2, IrInstSrc *result_ptr)
3126 IrInstruction *result_ptr, ZigType *result_ptr_type)
3127{3940{
3128 IrInstructionOverflowOp *instruction = ir_build_instruction<IrInstructionOverflowOp>(irb, scope, source_node);3941 IrInstSrcOverflowOp *instruction = ir_build_instruction<IrInstSrcOverflowOp>(irb, scope, source_node);
3129 instruction->op = op;3942 instruction->op = op;
3130 instruction->type_value = type_value;3943 instruction->type_value = type_value;
3131 instruction->op1 = op1;3944 instruction->op1 = op1;
3132 instruction->op2 = op2;3945 instruction->op2 = op2;
3133 instruction->result_ptr = result_ptr;3946 instruction->result_ptr = result_ptr;
3134 instruction->result_ptr_type = result_ptr_type;
31353947
3136 ir_ref_instruction(type_value, irb->current_basic_block);3948 ir_ref_instruction(type_value, irb->current_basic_block);
3137 ir_ref_instruction(op1, irb->current_basic_block);3949 ir_ref_instruction(op1, irb->current_basic_block);
...@@ -3141,60 +3953,56 @@ static IrInstruction *ir_build_overflow_op(IrBuilder *irb, Scope *scope, AstNode...@@ -3141,60 +3953,56 @@ static IrInstruction *ir_build_overflow_op(IrBuilder *irb, Scope *scope, AstNode
3141 return &instruction->base;3953 return &instruction->base;
3142}3954}
31433955
3956static IrInstGen *ir_build_overflow_op_gen(IrAnalyze *ira, IrInst *source_instr,
3957 IrOverflowOp op, IrInstGen *op1, IrInstGen *op2, IrInstGen *result_ptr,
3958 ZigType *result_ptr_type)
3959{
3960 IrInstGenOverflowOp *instruction = ir_build_inst_gen<IrInstGenOverflowOp>(&ira->new_irb,
3961 source_instr->scope, source_instr->source_node);
3962 instruction->base.value->type = ira->codegen->builtin_types.entry_bool;
3963 instruction->op = op;
3964 instruction->op1 = op1;
3965 instruction->op2 = op2;
3966 instruction->result_ptr = result_ptr;
3967 instruction->result_ptr_type = result_ptr_type;
31443968
3145//TODO Powi, Pow, minnum, maxnum, maximum, minimum, copysign,3969 ir_ref_inst_gen(op1, ira->new_irb.current_basic_block);
3146// lround, llround, lrint, llrint3970 ir_ref_inst_gen(op2, ira->new_irb.current_basic_block);
3147// So far this is only non-complicated type functions.3971 ir_ref_inst_gen(result_ptr, ira->new_irb.current_basic_block);
3148const char *float_op_to_name(BuiltinFnId op) {3972
3149 switch (op) {3973 return &instruction->base;
3150 case BuiltinFnIdSqrt:
3151 return "sqrt";
3152 case BuiltinFnIdSin:
3153 return "sin";
3154 case BuiltinFnIdCos:
3155 return "cos";
3156 case BuiltinFnIdExp:
3157 return "exp";
3158 case BuiltinFnIdExp2:
3159 return "exp2";
3160 case BuiltinFnIdLog:
3161 return "log";
3162 case BuiltinFnIdLog10:
3163 return "log10";
3164 case BuiltinFnIdLog2:
3165 return "log2";
3166 case BuiltinFnIdFabs:
3167 return "fabs";
3168 case BuiltinFnIdFloor:
3169 return "floor";
3170 case BuiltinFnIdCeil:
3171 return "ceil";
3172 case BuiltinFnIdTrunc:
3173 return "trunc";
3174 case BuiltinFnIdNearbyInt:
3175 return "nearbyint";
3176 case BuiltinFnIdRound:
3177 return "round";
3178 default:
3179 zig_unreachable();
3180 }
3181}3974}
31823975
3183static IrInstruction *ir_build_float_op(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *operand,3976static IrInstSrc *ir_build_float_op_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *operand,
3184 BuiltinFnId fn_id)3977 BuiltinFnId fn_id)
3185{3978{
3186 IrInstructionFloatOp *instruction = ir_build_instruction<IrInstructionFloatOp>(irb, scope, source_node);3979 IrInstSrcFloatOp *instruction = ir_build_instruction<IrInstSrcFloatOp>(irb, scope, source_node);
3980 instruction->operand = operand;
3981 instruction->fn_id = fn_id;
3982
3983 ir_ref_instruction(operand, irb->current_basic_block);
3984
3985 return &instruction->base;
3986}
3987
3988static IrInstGen *ir_build_float_op_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
3989 BuiltinFnId fn_id, ZigType *operand_type)
3990{
3991 IrInstGenFloatOp *instruction = ir_build_inst_gen<IrInstGenFloatOp>(&ira->new_irb,
3992 source_instr->scope, source_instr->source_node);
3993 instruction->base.value->type = operand_type;
3187 instruction->operand = operand;3994 instruction->operand = operand;
3188 instruction->fn_id = fn_id;3995 instruction->fn_id = fn_id;
31893996
3190 ir_ref_instruction(operand, irb->current_basic_block);3997 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
31913998
3192 return &instruction->base;3999 return &instruction->base;
3193}4000}
31944001
3195static IrInstruction *ir_build_mul_add(IrBuilder *irb, Scope *scope, AstNode *source_node,4002static IrInstSrc *ir_build_mul_add_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3196 IrInstruction *type_value, IrInstruction *op1, IrInstruction *op2, IrInstruction *op3) {4003 IrInstSrc *type_value, IrInstSrc *op1, IrInstSrc *op2, IrInstSrc *op3)
3197 IrInstructionMulAdd *instruction = ir_build_instruction<IrInstructionMulAdd>(irb, scope, source_node);4004{
4005 IrInstSrcMulAdd *instruction = ir_build_instruction<IrInstSrcMulAdd>(irb, scope, source_node);
3198 instruction->type_value = type_value;4006 instruction->type_value = type_value;
3199 instruction->op1 = op1;4007 instruction->op1 = op1;
3200 instruction->op2 = op2;4008 instruction->op2 = op2;
...@@ -3208,8 +4016,25 @@ static IrInstruction *ir_build_mul_add(IrBuilder *irb, Scope *scope, AstNode *so...@@ -3208,8 +4016,25 @@ static IrInstruction *ir_build_mul_add(IrBuilder *irb, Scope *scope, AstNode *so
3208 return &instruction->base;4016 return &instruction->base;
3209}4017}
32104018
3211static IrInstruction *ir_build_align_of(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type_value) {4019static IrInstGen *ir_build_mul_add_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *op1, IrInstGen *op2,
3212 IrInstructionAlignOf *instruction = ir_build_instruction<IrInstructionAlignOf>(irb, scope, source_node);4020 IrInstGen *op3, ZigType *expr_type)
4021{
4022 IrInstGenMulAdd *instruction = ir_build_inst_gen<IrInstGenMulAdd>(&ira->new_irb,
4023 source_instr->scope, source_instr->source_node);
4024 instruction->base.value->type = expr_type;
4025 instruction->op1 = op1;
4026 instruction->op2 = op2;
4027 instruction->op3 = op3;
4028
4029 ir_ref_inst_gen(op1, ira->new_irb.current_basic_block);
4030 ir_ref_inst_gen(op2, ira->new_irb.current_basic_block);
4031 ir_ref_inst_gen(op3, ira->new_irb.current_basic_block);
4032
4033 return &instruction->base;
4034}
4035
4036static IrInstSrc *ir_build_align_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value) {
4037 IrInstSrcAlignOf *instruction = ir_build_instruction<IrInstSrcAlignOf>(irb, scope, source_node);
3213 instruction->type_value = type_value;4038 instruction->type_value = type_value;
32144039
3215 ir_ref_instruction(type_value, irb->current_basic_block);4040 ir_ref_instruction(type_value, irb->current_basic_block);
...@@ -3217,10 +4042,10 @@ static IrInstruction *ir_build_align_of(IrBuilder *irb, Scope *scope, AstNode *s...@@ -3217,10 +4042,10 @@ static IrInstruction *ir_build_align_of(IrBuilder *irb, Scope *scope, AstNode *s
3217 return &instruction->base;4042 return &instruction->base;
3218}4043}
32194044
3220static IrInstruction *ir_build_test_err_src(IrBuilder *irb, Scope *scope, AstNode *source_node,4045static IrInstSrc *ir_build_test_err_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3221 IrInstruction *base_ptr, bool resolve_err_set, bool base_ptr_is_payload)4046 IrInstSrc *base_ptr, bool resolve_err_set, bool base_ptr_is_payload)
3222{4047{
3223 IrInstructionTestErrSrc *instruction = ir_build_instruction<IrInstructionTestErrSrc>(irb, scope, source_node);4048 IrInstSrcTestErr *instruction = ir_build_instruction<IrInstSrcTestErr>(irb, scope, source_node);
3224 instruction->base_ptr = base_ptr;4049 instruction->base_ptr = base_ptr;
3225 instruction->resolve_err_set = resolve_err_set;4050 instruction->resolve_err_set = resolve_err_set;
3226 instruction->base_ptr_is_payload = base_ptr_is_payload;4051 instruction->base_ptr_is_payload = base_ptr_is_payload;
...@@ -3230,48 +4055,72 @@ static IrInstruction *ir_build_test_err_src(IrBuilder *irb, Scope *scope, AstNod...@@ -3230,48 +4055,72 @@ static IrInstruction *ir_build_test_err_src(IrBuilder *irb, Scope *scope, AstNod
3230 return &instruction->base;4055 return &instruction->base;
3231}4056}
32324057
3233static IrInstruction *ir_build_test_err_gen(IrAnalyze *ira, IrInstruction *source_instruction,4058static IrInstGen *ir_build_test_err_gen(IrAnalyze *ira, IrInst *source_instruction, IrInstGen *err_union) {
3234 IrInstruction *err_union)4059 IrInstGenTestErr *instruction = ir_build_inst_gen<IrInstGenTestErr>(
3235{
3236 IrInstructionTestErrGen *instruction = ir_build_instruction<IrInstructionTestErrGen>(
3237 &ira->new_irb, source_instruction->scope, source_instruction->source_node);4060 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
3238 instruction->base.value->type = ira->codegen->builtin_types.entry_bool;4061 instruction->base.value->type = ira->codegen->builtin_types.entry_bool;
3239 instruction->err_union = err_union;4062 instruction->err_union = err_union;
32404063
3241 ir_ref_instruction(err_union, ira->new_irb.current_basic_block);4064 ir_ref_inst_gen(err_union, ira->new_irb.current_basic_block);
32424065
3243 return &instruction->base;4066 return &instruction->base;
3244}4067}
32454068
3246static IrInstruction *ir_build_unwrap_err_code(IrBuilder *irb, Scope *scope, AstNode *source_node,4069static IrInstSrc *ir_build_unwrap_err_code_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3247 IrInstruction *err_union_ptr)4070 IrInstSrc *err_union_ptr)
3248{4071{
3249 IrInstructionUnwrapErrCode *instruction = ir_build_instruction<IrInstructionUnwrapErrCode>(irb, scope, source_node);4072 IrInstSrcUnwrapErrCode *inst = ir_build_instruction<IrInstSrcUnwrapErrCode>(irb, scope, source_node);
3250 instruction->err_union_ptr = err_union_ptr;4073 inst->err_union_ptr = err_union_ptr;
32514074
3252 ir_ref_instruction(err_union_ptr, irb->current_basic_block);4075 ir_ref_instruction(err_union_ptr, irb->current_basic_block);
32534076
3254 return &instruction->base;4077 return &inst->base;
3255}4078}
32564079
3257static IrInstruction *ir_build_unwrap_err_payload(IrBuilder *irb, Scope *scope, AstNode *source_node,4080static IrInstGen *ir_build_unwrap_err_code_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
3258 IrInstruction *value, bool safety_check_on, bool initializing)4081 IrInstGen *err_union_ptr, ZigType *result_type)
3259{4082{
3260 IrInstructionUnwrapErrPayload *instruction = ir_build_instruction<IrInstructionUnwrapErrPayload>(irb, scope, source_node);4083 IrInstGenUnwrapErrCode *inst = ir_build_inst_gen<IrInstGenUnwrapErrCode>(&ira->new_irb, scope, source_node);
3261 instruction->value = value;4084 inst->base.value->type = result_type;
3262 instruction->safety_check_on = safety_check_on;4085 inst->err_union_ptr = err_union_ptr;
3263 instruction->initializing = initializing;4086
4087 ir_ref_inst_gen(err_union_ptr, ira->new_irb.current_basic_block);
4088
4089 return &inst->base;
4090}
4091
4092static IrInstSrc *ir_build_unwrap_err_payload_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4093 IrInstSrc *value, bool safety_check_on, bool initializing)
4094{
4095 IrInstSrcUnwrapErrPayload *inst = ir_build_instruction<IrInstSrcUnwrapErrPayload>(irb, scope, source_node);
4096 inst->value = value;
4097 inst->safety_check_on = safety_check_on;
4098 inst->initializing = initializing;
32644099
3265 ir_ref_instruction(value, irb->current_basic_block);4100 ir_ref_instruction(value, irb->current_basic_block);
32664101
3267 return &instruction->base;4102 return &inst->base;
4103}
4104
4105static IrInstGen *ir_build_unwrap_err_payload_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
4106 IrInstGen *value, bool safety_check_on, bool initializing, ZigType *result_type)
4107{
4108 IrInstGenUnwrapErrPayload *inst = ir_build_inst_gen<IrInstGenUnwrapErrPayload>(&ira->new_irb, scope, source_node);
4109 inst->base.value->type = result_type;
4110 inst->value = value;
4111 inst->safety_check_on = safety_check_on;
4112 inst->initializing = initializing;
4113
4114 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
4115
4116 return &inst->base;
3268}4117}
32694118
3270static IrInstruction *ir_build_fn_proto(IrBuilder *irb, Scope *scope, AstNode *source_node,4119static IrInstSrc *ir_build_fn_proto(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3271 IrInstruction **param_types, IrInstruction *align_value, IrInstruction *callconv_value,4120 IrInstSrc **param_types, IrInstSrc *align_value, IrInstSrc *callconv_value,
3272 IrInstruction *return_type, bool is_var_args)4121 IrInstSrc *return_type, bool is_var_args)
3273{4122{
3274 IrInstructionFnProto *instruction = ir_build_instruction<IrInstructionFnProto>(irb, scope, source_node);4123 IrInstSrcFnProto *instruction = ir_build_instruction<IrInstSrcFnProto>(irb, scope, source_node);
3275 instruction->param_types = param_types;4124 instruction->param_types = param_types;
3276 instruction->align_value = align_value;4125 instruction->align_value = align_value;
3277 instruction->callconv_value = callconv_value;4126 instruction->callconv_value = callconv_value;
...@@ -3291,8 +4140,8 @@ static IrInstruction *ir_build_fn_proto(IrBuilder *irb, Scope *scope, AstNode *s...@@ -3291,8 +4140,8 @@ static IrInstruction *ir_build_fn_proto(IrBuilder *irb, Scope *scope, AstNode *s
3291 return &instruction->base;4140 return &instruction->base;
3292}4141}
32934142
3294static IrInstruction *ir_build_test_comptime(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {4143static IrInstSrc *ir_build_test_comptime(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
3295 IrInstructionTestComptime *instruction = ir_build_instruction<IrInstructionTestComptime>(irb, scope, source_node);4144 IrInstSrcTestComptime *instruction = ir_build_instruction<IrInstSrcTestComptime>(irb, scope, source_node);
3296 instruction->value = value;4145 instruction->value = value;
32974146
3298 ir_ref_instruction(value, irb->current_basic_block);4147 ir_ref_instruction(value, irb->current_basic_block);
...@@ -3300,10 +4149,10 @@ static IrInstruction *ir_build_test_comptime(IrBuilder *irb, Scope *scope, AstNo...@@ -3300,10 +4149,10 @@ static IrInstruction *ir_build_test_comptime(IrBuilder *irb, Scope *scope, AstNo
3300 return &instruction->base;4149 return &instruction->base;
3301}4150}
33024151
3303static IrInstruction *ir_build_ptr_cast_src(IrBuilder *irb, Scope *scope, AstNode *source_node,4152static IrInstSrc *ir_build_ptr_cast_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3304 IrInstruction *dest_type, IrInstruction *ptr, bool safety_check_on)4153 IrInstSrc *dest_type, IrInstSrc *ptr, bool safety_check_on)
3305{4154{
3306 IrInstructionPtrCastSrc *instruction = ir_build_instruction<IrInstructionPtrCastSrc>(4155 IrInstSrcPtrCast *instruction = ir_build_instruction<IrInstSrcPtrCast>(
3307 irb, scope, source_node);4156 irb, scope, source_node);
3308 instruction->dest_type = dest_type;4157 instruction->dest_type = dest_type;
3309 instruction->ptr = ptr;4158 instruction->ptr = ptr;
...@@ -3315,39 +4164,24 @@ static IrInstruction *ir_build_ptr_cast_src(IrBuilder *irb, Scope *scope, AstNod...@@ -3315,39 +4164,24 @@ static IrInstruction *ir_build_ptr_cast_src(IrBuilder *irb, Scope *scope, AstNod
3315 return &instruction->base;4164 return &instruction->base;
3316}4165}
33174166
3318static IrInstruction *ir_build_ptr_cast_gen(IrAnalyze *ira, IrInstruction *source_instruction,4167static IrInstGen *ir_build_ptr_cast_gen(IrAnalyze *ira, IrInst *source_instruction,
3319 ZigType *ptr_type, IrInstruction *ptr, bool safety_check_on)4168 ZigType *ptr_type, IrInstGen *ptr, bool safety_check_on)
3320{4169{
3321 IrInstructionPtrCastGen *instruction = ir_build_instruction<IrInstructionPtrCastGen>(4170 IrInstGenPtrCast *instruction = ir_build_inst_gen<IrInstGenPtrCast>(
3322 &ira->new_irb, source_instruction->scope, source_instruction->source_node);4171 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
3323 instruction->base.value->type = ptr_type;4172 instruction->base.value->type = ptr_type;
3324 instruction->ptr = ptr;4173 instruction->ptr = ptr;
3325 instruction->safety_check_on = safety_check_on;4174 instruction->safety_check_on = safety_check_on;
33264175
3327 ir_ref_instruction(ptr, ira->new_irb.current_basic_block);4176 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
3328
3329 return &instruction->base;
3330}
3331
3332static IrInstruction *ir_build_load_ptr_gen(IrAnalyze *ira, IrInstruction *source_instruction,
3333 IrInstruction *ptr, ZigType *ty, IrInstruction *result_loc)
3334{
3335 IrInstructionLoadPtrGen *instruction = ir_build_instruction<IrInstructionLoadPtrGen>(
3336 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
3337 instruction->base.value->type = ty;
3338 instruction->ptr = ptr;
3339 instruction->result_loc = result_loc;
3340
3341 ir_ref_instruction(ptr, ira->new_irb.current_basic_block);
3342 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
33434177
3344 return &instruction->base;4178 return &instruction->base;
3345}4179}
33464180
3347static IrInstruction *ir_build_implicit_cast(IrBuilder *irb, Scope *scope, AstNode *source_node,4181static IrInstSrc *ir_build_implicit_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3348 IrInstruction *operand, ResultLocCast *result_loc_cast)4182 IrInstSrc *operand, ResultLocCast *result_loc_cast)
3349{4183{
3350 IrInstructionImplicitCast *instruction = ir_build_instruction<IrInstructionImplicitCast>(irb, scope, source_node);4184 IrInstSrcImplicitCast *instruction = ir_build_instruction<IrInstSrcImplicitCast>(irb, scope, source_node);
3351 instruction->operand = operand;4185 instruction->operand = operand;
3352 instruction->result_loc_cast = result_loc_cast;4186 instruction->result_loc_cast = result_loc_cast;
33534187
...@@ -3356,10 +4190,10 @@ static IrInstruction *ir_build_implicit_cast(IrBuilder *irb, Scope *scope, AstNo...@@ -3356,10 +4190,10 @@ static IrInstruction *ir_build_implicit_cast(IrBuilder *irb, Scope *scope, AstNo
3356 return &instruction->base;4190 return &instruction->base;
3357}4191}
33584192
3359static IrInstruction *ir_build_bit_cast_src(IrBuilder *irb, Scope *scope, AstNode *source_node,4193static IrInstSrc *ir_build_bit_cast_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3360 IrInstruction *operand, ResultLocBitCast *result_loc_bit_cast)4194 IrInstSrc *operand, ResultLocBitCast *result_loc_bit_cast)
3361{4195{
3362 IrInstructionBitCastSrc *instruction = ir_build_instruction<IrInstructionBitCastSrc>(irb, scope, source_node);4196 IrInstSrcBitCast *instruction = ir_build_instruction<IrInstSrcBitCast>(irb, scope, source_node);
3363 instruction->operand = operand;4197 instruction->operand = operand;
3364 instruction->result_loc_bit_cast = result_loc_bit_cast;4198 instruction->result_loc_bit_cast = result_loc_bit_cast;
33654199
...@@ -3368,62 +4202,81 @@ static IrInstruction *ir_build_bit_cast_src(IrBuilder *irb, Scope *scope, AstNod...@@ -3368,62 +4202,81 @@ static IrInstruction *ir_build_bit_cast_src(IrBuilder *irb, Scope *scope, AstNod
3368 return &instruction->base;4202 return &instruction->base;
3369}4203}
33704204
3371static IrInstruction *ir_build_bit_cast_gen(IrAnalyze *ira, IrInstruction *source_instruction,4205static IrInstGen *ir_build_bit_cast_gen(IrAnalyze *ira, IrInst *source_instruction,
3372 IrInstruction *operand, ZigType *ty)4206 IrInstGen *operand, ZigType *ty)
3373{4207{
3374 IrInstructionBitCastGen *instruction = ir_build_instruction<IrInstructionBitCastGen>(4208 IrInstGenBitCast *instruction = ir_build_inst_gen<IrInstGenBitCast>(
3375 &ira->new_irb, source_instruction->scope, source_instruction->source_node);4209 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
3376 instruction->base.value->type = ty;4210 instruction->base.value->type = ty;
3377 instruction->operand = operand;4211 instruction->operand = operand;
33784212
3379 ir_ref_instruction(operand, ira->new_irb.current_basic_block);4213 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
33804214
3381 return &instruction->base;4215 return &instruction->base;
3382}4216}
33834217
3384static IrInstruction *ir_build_widen_or_shorten(IrBuilder *irb, Scope *scope, AstNode *source_node,4218static IrInstGen *ir_build_widen_or_shorten(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
3385 IrInstruction *target)4219 ZigType *result_type)
3386{4220{
3387 IrInstructionWidenOrShorten *instruction = ir_build_instruction<IrInstructionWidenOrShorten>(4221 IrInstGenWidenOrShorten *inst = ir_build_inst_gen<IrInstGenWidenOrShorten>(&ira->new_irb, scope, source_node);
3388 irb, scope, source_node);4222 inst->base.value->type = result_type;
3389 instruction->target = target;4223 inst->target = target;
33904224
3391 ir_ref_instruction(target, irb->current_basic_block);4225 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
33924226
3393 return &instruction->base;4227 return &inst->base;
3394}4228}
33954229
3396static IrInstruction *ir_build_int_to_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,4230static IrInstSrc *ir_build_int_to_ptr_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3397 IrInstruction *dest_type, IrInstruction *target)4231 IrInstSrc *dest_type, IrInstSrc *target)
3398{4232{
3399 IrInstructionIntToPtr *instruction = ir_build_instruction<IrInstructionIntToPtr>(4233 IrInstSrcIntToPtr *instruction = ir_build_instruction<IrInstSrcIntToPtr>(irb, scope, source_node);
3400 irb, scope, source_node);
3401 instruction->dest_type = dest_type;4234 instruction->dest_type = dest_type;
3402 instruction->target = target;4235 instruction->target = target;
34034236
3404 if (dest_type) ir_ref_instruction(dest_type, irb->current_basic_block);4237 ir_ref_instruction(dest_type, irb->current_basic_block);
3405 ir_ref_instruction(target, irb->current_basic_block);4238 ir_ref_instruction(target, irb->current_basic_block);
34064239
3407 return &instruction->base;4240 return &instruction->base;
3408}4241}
34094242
3410static IrInstruction *ir_build_ptr_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node,4243static IrInstGen *ir_build_int_to_ptr_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
3411 IrInstruction *target)4244 IrInstGen *target, ZigType *ptr_type)
3412{4245{
3413 IrInstructionPtrToInt *instruction = ir_build_instruction<IrInstructionPtrToInt>(4246 IrInstGenIntToPtr *instruction = ir_build_inst_gen<IrInstGenIntToPtr>(&ira->new_irb, scope, source_node);
3414 irb, scope, source_node);4247 instruction->base.value->type = ptr_type;
3415 instruction->target = target;4248 instruction->target = target;
34164249
3417 ir_ref_instruction(target, irb->current_basic_block);4250 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
34184251
3419 return &instruction->base;4252 return &instruction->base;
3420}4253}
34214254
3422static IrInstruction *ir_build_int_to_enum(IrBuilder *irb, Scope *scope, AstNode *source_node,4255static IrInstSrc *ir_build_ptr_to_int_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3423 IrInstruction *dest_type, IrInstruction *target)4256 IrInstSrc *target)
3424{4257{
3425 IrInstructionIntToEnum *instruction = ir_build_instruction<IrInstructionIntToEnum>(4258 IrInstSrcPtrToInt *inst = ir_build_instruction<IrInstSrcPtrToInt>(irb, scope, source_node);
3426 irb, scope, source_node);4259 inst->target = target;
4260
4261 ir_ref_instruction(target, irb->current_basic_block);
4262
4263 return &inst->base;
4264}
4265
4266static IrInstGen *ir_build_ptr_to_int_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *target) {
4267 IrInstGenPtrToInt *inst = ir_build_inst_gen<IrInstGenPtrToInt>(&ira->new_irb, source_instr->scope, source_instr->source_node);
4268 inst->base.value->type = ira->codegen->builtin_types.entry_usize;
4269 inst->target = target;
4270
4271 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
4272
4273 return &inst->base;
4274}
4275
4276static IrInstSrc *ir_build_int_to_enum_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4277 IrInstSrc *dest_type, IrInstSrc *target)
4278{
4279 IrInstSrcIntToEnum *instruction = ir_build_instruction<IrInstSrcIntToEnum>(irb, scope, source_node);
3427 instruction->dest_type = dest_type;4280 instruction->dest_type = dest_type;
3428 instruction->target = target;4281 instruction->target = target;
34294282
...@@ -3433,12 +4286,22 @@ static IrInstruction *ir_build_int_to_enum(IrBuilder *irb, Scope *scope, AstNode...@@ -3433,12 +4286,22 @@ static IrInstruction *ir_build_int_to_enum(IrBuilder *irb, Scope *scope, AstNode
3433 return &instruction->base;4286 return &instruction->base;
3434}4287}
34354288
4289static IrInstGen *ir_build_int_to_enum_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
4290 ZigType *dest_type, IrInstGen *target)
4291{
4292 IrInstGenIntToEnum *instruction = ir_build_inst_gen<IrInstGenIntToEnum>(&ira->new_irb, scope, source_node);
4293 instruction->base.value->type = dest_type;
4294 instruction->target = target;
4295
4296 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
34364297
4298 return &instruction->base;
4299}
34374300
3438static IrInstruction *ir_build_enum_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node,4301static IrInstSrc *ir_build_enum_to_int(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3439 IrInstruction *target)4302 IrInstSrc *target)
3440{4303{
3441 IrInstructionEnumToInt *instruction = ir_build_instruction<IrInstructionEnumToInt>(4304 IrInstSrcEnumToInt *instruction = ir_build_instruction<IrInstSrcEnumToInt>(
3442 irb, scope, source_node);4305 irb, scope, source_node);
3443 instruction->target = target;4306 instruction->target = target;
34444307
...@@ -3447,11 +4310,10 @@ static IrInstruction *ir_build_enum_to_int(IrBuilder *irb, Scope *scope, AstNode...@@ -3447,11 +4310,10 @@ static IrInstruction *ir_build_enum_to_int(IrBuilder *irb, Scope *scope, AstNode
3447 return &instruction->base;4310 return &instruction->base;
3448}4311}
34494312
3450static IrInstruction *ir_build_int_to_err(IrBuilder *irb, Scope *scope, AstNode *source_node,4313static IrInstSrc *ir_build_int_to_err_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3451 IrInstruction *target)4314 IrInstSrc *target)
3452{4315{
3453 IrInstructionIntToErr *instruction = ir_build_instruction<IrInstructionIntToErr>(4316 IrInstSrcIntToErr *instruction = ir_build_instruction<IrInstSrcIntToErr>(irb, scope, source_node);
3454 irb, scope, source_node);
3455 instruction->target = target;4317 instruction->target = target;
34564318
3457 ir_ref_instruction(target, irb->current_basic_block);4319 ir_ref_instruction(target, irb->current_basic_block);
...@@ -3459,10 +4321,22 @@ static IrInstruction *ir_build_int_to_err(IrBuilder *irb, Scope *scope, AstNode...@@ -3459,10 +4321,22 @@ static IrInstruction *ir_build_int_to_err(IrBuilder *irb, Scope *scope, AstNode
3459 return &instruction->base;4321 return &instruction->base;
3460}4322}
34614323
3462static IrInstruction *ir_build_err_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node,4324static IrInstGen *ir_build_int_to_err_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
3463 IrInstruction *target)4325 ZigType *wanted_type)
4326{
4327 IrInstGenIntToErr *instruction = ir_build_inst_gen<IrInstGenIntToErr>(&ira->new_irb, scope, source_node);
4328 instruction->base.value->type = wanted_type;
4329 instruction->target = target;
4330
4331 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
4332
4333 return &instruction->base;
4334}
4335
4336static IrInstSrc *ir_build_err_to_int_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4337 IrInstSrc *target)
3464{4338{
3465 IrInstructionErrToInt *instruction = ir_build_instruction<IrInstructionErrToInt>(4339 IrInstSrcErrToInt *instruction = ir_build_instruction<IrInstSrcErrToInt>(
3466 irb, scope, source_node);4340 irb, scope, source_node);
3467 instruction->target = target;4341 instruction->target = target;
34684342
...@@ -3471,16 +4345,29 @@ static IrInstruction *ir_build_err_to_int(IrBuilder *irb, Scope *scope, AstNode...@@ -3471,16 +4345,29 @@ static IrInstruction *ir_build_err_to_int(IrBuilder *irb, Scope *scope, AstNode
3471 return &instruction->base;4345 return &instruction->base;
3472}4346}
34734347
3474static IrInstruction *ir_build_check_switch_prongs(IrBuilder *irb, Scope *scope, AstNode *source_node,4348static IrInstGen *ir_build_err_to_int_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
3475 IrInstruction *target_value, IrInstructionCheckSwitchProngsRange *ranges, size_t range_count,4349 ZigType *wanted_type)
3476 bool have_else_prong)4350{
4351 IrInstGenErrToInt *instruction = ir_build_inst_gen<IrInstGenErrToInt>(&ira->new_irb, scope, source_node);
4352 instruction->base.value->type = wanted_type;
4353 instruction->target = target;
4354
4355 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
4356
4357 return &instruction->base;
4358}
4359
4360static IrInstSrc *ir_build_check_switch_prongs(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4361 IrInstSrc *target_value, IrInstSrcCheckSwitchProngsRange *ranges, size_t range_count,
4362 bool have_else_prong, bool have_underscore_prong)
3477{4363{
3478 IrInstructionCheckSwitchProngs *instruction = ir_build_instruction<IrInstructionCheckSwitchProngs>(4364 IrInstSrcCheckSwitchProngs *instruction = ir_build_instruction<IrInstSrcCheckSwitchProngs>(
3479 irb, scope, source_node);4365 irb, scope, source_node);
3480 instruction->target_value = target_value;4366 instruction->target_value = target_value;
3481 instruction->ranges = ranges;4367 instruction->ranges = ranges;
3482 instruction->range_count = range_count;4368 instruction->range_count = range_count;
3483 instruction->have_else_prong = have_else_prong;4369 instruction->have_else_prong = have_else_prong;
4370 instruction->have_underscore_prong = have_underscore_prong;
34844371
3485 ir_ref_instruction(target_value, irb->current_basic_block);4372 ir_ref_instruction(target_value, irb->current_basic_block);
3486 for (size_t i = 0; i < range_count; i += 1) {4373 for (size_t i = 0; i < range_count; i += 1) {
...@@ -3491,10 +4378,10 @@ static IrInstruction *ir_build_check_switch_prongs(IrBuilder *irb, Scope *scope,...@@ -3491,10 +4378,10 @@ static IrInstruction *ir_build_check_switch_prongs(IrBuilder *irb, Scope *scope,
3491 return &instruction->base;4378 return &instruction->base;
3492}4379}
34934380
3494static IrInstruction *ir_build_check_statement_is_void(IrBuilder *irb, Scope *scope, AstNode *source_node,4381static IrInstSrc *ir_build_check_statement_is_void(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3495 IrInstruction* statement_value)4382 IrInstSrc* statement_value)
3496{4383{
3497 IrInstructionCheckStatementIsVoid *instruction = ir_build_instruction<IrInstructionCheckStatementIsVoid>(4384 IrInstSrcCheckStatementIsVoid *instruction = ir_build_instruction<IrInstSrcCheckStatementIsVoid>(
3498 irb, scope, source_node);4385 irb, scope, source_node);
3499 instruction->statement_value = statement_value;4386 instruction->statement_value = statement_value;
35004387
...@@ -3503,11 +4390,10 @@ static IrInstruction *ir_build_check_statement_is_void(IrBuilder *irb, Scope *sc...@@ -3503,11 +4390,10 @@ static IrInstruction *ir_build_check_statement_is_void(IrBuilder *irb, Scope *sc
3503 return &instruction->base;4390 return &instruction->base;
3504}4391}
35054392
3506static IrInstruction *ir_build_type_name(IrBuilder *irb, Scope *scope, AstNode *source_node,4393static IrInstSrc *ir_build_type_name(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3507 IrInstruction *type_value)4394 IrInstSrc *type_value)
3508{4395{
3509 IrInstructionTypeName *instruction = ir_build_instruction<IrInstructionTypeName>(4396 IrInstSrcTypeName *instruction = ir_build_instruction<IrInstSrcTypeName>(irb, scope, source_node);
3510 irb, scope, source_node);
3511 instruction->type_value = type_value;4397 instruction->type_value = type_value;
35124398
3513 ir_ref_instruction(type_value, irb->current_basic_block);4399 ir_ref_instruction(type_value, irb->current_basic_block);
...@@ -3515,18 +4401,17 @@ static IrInstruction *ir_build_type_name(IrBuilder *irb, Scope *scope, AstNode *...@@ -3515,18 +4401,17 @@ static IrInstruction *ir_build_type_name(IrBuilder *irb, Scope *scope, AstNode *
3515 return &instruction->base;4401 return &instruction->base;
3516}4402}
35174403
3518static IrInstruction *ir_build_decl_ref(IrBuilder *irb, Scope *scope, AstNode *source_node, Tld *tld, LVal lval) {4404static IrInstSrc *ir_build_decl_ref(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Tld *tld, LVal lval) {
3519 IrInstructionDeclRef *instruction = ir_build_instruction<IrInstructionDeclRef>(irb, scope, source_node);4405 IrInstSrcDeclRef *instruction = ir_build_instruction<IrInstSrcDeclRef>(irb, scope, source_node);
3520 instruction->tld = tld;4406 instruction->tld = tld;
3521 instruction->lval = lval;4407 instruction->lval = lval;
35224408
3523 return &instruction->base;4409 return &instruction->base;
3524}4410}
35254411
3526static IrInstruction *ir_build_panic(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *msg) {4412static IrInstSrc *ir_build_panic_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *msg) {
3527 IrInstructionPanic *instruction = ir_build_instruction<IrInstructionPanic>(irb, scope, source_node);4413 IrInstSrcPanic *instruction = ir_build_instruction<IrInstSrcPanic>(irb, scope, source_node);
3528 instruction->base.value->special = ConstValSpecialStatic;4414 instruction->base.is_noreturn = true;
3529 instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
3530 instruction->msg = msg;4415 instruction->msg = msg;
35314416
3532 ir_ref_instruction(msg, irb->current_basic_block);4417 ir_ref_instruction(msg, irb->current_basic_block);
...@@ -3534,10 +4419,18 @@ static IrInstruction *ir_build_panic(IrBuilder *irb, Scope *scope, AstNode *sour...@@ -3534,10 +4419,18 @@ static IrInstruction *ir_build_panic(IrBuilder *irb, Scope *scope, AstNode *sour
3534 return &instruction->base;4419 return &instruction->base;
3535}4420}
35364421
3537static IrInstruction *ir_build_tag_name(IrBuilder *irb, Scope *scope, AstNode *source_node,4422static IrInstGen *ir_build_panic_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *msg) {
3538 IrInstruction *target)4423 IrInstGenPanic *instruction = ir_build_inst_noreturn<IrInstGenPanic>(&ira->new_irb,
3539{4424 source_instr->scope, source_instr->source_node);
3540 IrInstructionTagName *instruction = ir_build_instruction<IrInstructionTagName>(irb, scope, source_node);4425 instruction->msg = msg;
4426
4427 ir_ref_inst_gen(msg, ira->new_irb.current_basic_block);
4428
4429 return &instruction->base;
4430}
4431
4432static IrInstSrc *ir_build_tag_name_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *target) {
4433 IrInstSrcTagName *instruction = ir_build_instruction<IrInstSrcTagName>(irb, scope, source_node);
3541 instruction->target = target;4434 instruction->target = target;
35424435
3543 ir_ref_instruction(target, irb->current_basic_block);4436 ir_ref_instruction(target, irb->current_basic_block);
...@@ -3545,10 +4438,23 @@ static IrInstruction *ir_build_tag_name(IrBuilder *irb, Scope *scope, AstNode *s...@@ -3545,10 +4438,23 @@ static IrInstruction *ir_build_tag_name(IrBuilder *irb, Scope *scope, AstNode *s
3545 return &instruction->base;4438 return &instruction->base;
3546}4439}
35474440
3548static IrInstruction *ir_build_tag_type(IrBuilder *irb, Scope *scope, AstNode *source_node,4441static IrInstGen *ir_build_tag_name_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *target,
3549 IrInstruction *target)4442 ZigType *result_type)
4443{
4444 IrInstGenTagName *instruction = ir_build_inst_gen<IrInstGenTagName>(&ira->new_irb,
4445 source_instr->scope, source_instr->source_node);
4446 instruction->base.value->type = result_type;
4447 instruction->target = target;
4448
4449 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
4450
4451 return &instruction->base;
4452}
4453
4454static IrInstSrc *ir_build_tag_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4455 IrInstSrc *target)
3550{4456{
3551 IrInstructionTagType *instruction = ir_build_instruction<IrInstructionTagType>(irb, scope, source_node);4457 IrInstSrcTagType *instruction = ir_build_instruction<IrInstSrcTagType>(irb, scope, source_node);
3552 instruction->target = target;4458 instruction->target = target;
35534459
3554 ir_ref_instruction(target, irb->current_basic_block);4460 ir_ref_instruction(target, irb->current_basic_block);
...@@ -3556,27 +4462,40 @@ static IrInstruction *ir_build_tag_type(IrBuilder *irb, Scope *scope, AstNode *s...@@ -3556,27 +4462,40 @@ static IrInstruction *ir_build_tag_type(IrBuilder *irb, Scope *scope, AstNode *s
3556 return &instruction->base;4462 return &instruction->base;
3557}4463}
35584464
3559static IrInstruction *ir_build_field_parent_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,4465static IrInstSrc *ir_build_field_parent_ptr_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3560 IrInstruction *type_value, IrInstruction *field_name, IrInstruction *field_ptr, TypeStructField *field)4466 IrInstSrc *type_value, IrInstSrc *field_name, IrInstSrc *field_ptr)
3561{4467{
3562 IrInstructionFieldParentPtr *instruction = ir_build_instruction<IrInstructionFieldParentPtr>(4468 IrInstSrcFieldParentPtr *inst = ir_build_instruction<IrInstSrcFieldParentPtr>(
3563 irb, scope, source_node);4469 irb, scope, source_node);
3564 instruction->type_value = type_value;4470 inst->type_value = type_value;
3565 instruction->field_name = field_name;4471 inst->field_name = field_name;
3566 instruction->field_ptr = field_ptr;4472 inst->field_ptr = field_ptr;
3567 instruction->field = field;
35684473
3569 ir_ref_instruction(type_value, irb->current_basic_block);4474 ir_ref_instruction(type_value, irb->current_basic_block);
3570 ir_ref_instruction(field_name, irb->current_basic_block);4475 ir_ref_instruction(field_name, irb->current_basic_block);
3571 ir_ref_instruction(field_ptr, irb->current_basic_block);4476 ir_ref_instruction(field_ptr, irb->current_basic_block);
35724477
3573 return &instruction->base;4478 return &inst->base;
4479}
4480
4481static IrInstGen *ir_build_field_parent_ptr_gen(IrAnalyze *ira, IrInst *source_instr,
4482 IrInstGen *field_ptr, TypeStructField *field, ZigType *result_type)
4483{
4484 IrInstGenFieldParentPtr *inst = ir_build_inst_gen<IrInstGenFieldParentPtr>(&ira->new_irb,
4485 source_instr->scope, source_instr->source_node);
4486 inst->base.value->type = result_type;
4487 inst->field_ptr = field_ptr;
4488 inst->field = field;
4489
4490 ir_ref_inst_gen(field_ptr, ira->new_irb.current_basic_block);
4491
4492 return &inst->base;
3574}4493}
35754494
3576static IrInstruction *ir_build_byte_offset_of(IrBuilder *irb, Scope *scope, AstNode *source_node,4495static IrInstSrc *ir_build_byte_offset_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3577 IrInstruction *type_value, IrInstruction *field_name)4496 IrInstSrc *type_value, IrInstSrc *field_name)
3578{4497{
3579 IrInstructionByteOffsetOf *instruction = ir_build_instruction<IrInstructionByteOffsetOf>(irb, scope, source_node);4498 IrInstSrcByteOffsetOf *instruction = ir_build_instruction<IrInstSrcByteOffsetOf>(irb, scope, source_node);
3580 instruction->type_value = type_value;4499 instruction->type_value = type_value;
3581 instruction->field_name = field_name;4500 instruction->field_name = field_name;
35824501
...@@ -3586,10 +4505,10 @@ static IrInstruction *ir_build_byte_offset_of(IrBuilder *irb, Scope *scope, AstN...@@ -3586,10 +4505,10 @@ static IrInstruction *ir_build_byte_offset_of(IrBuilder *irb, Scope *scope, AstN
3586 return &instruction->base;4505 return &instruction->base;
3587}4506}
35884507
3589static IrInstruction *ir_build_bit_offset_of(IrBuilder *irb, Scope *scope, AstNode *source_node,4508static IrInstSrc *ir_build_bit_offset_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3590 IrInstruction *type_value, IrInstruction *field_name)4509 IrInstSrc *type_value, IrInstSrc *field_name)
3591{4510{
3592 IrInstructionBitOffsetOf *instruction = ir_build_instruction<IrInstructionBitOffsetOf>(irb, scope, source_node);4511 IrInstSrcBitOffsetOf *instruction = ir_build_instruction<IrInstSrcBitOffsetOf>(irb, scope, source_node);
3593 instruction->type_value = type_value;4512 instruction->type_value = type_value;
3594 instruction->field_name = field_name;4513 instruction->field_name = field_name;
35954514
...@@ -3599,9 +4518,8 @@ static IrInstruction *ir_build_bit_offset_of(IrBuilder *irb, Scope *scope, AstNo...@@ -3599,9 +4518,8 @@ static IrInstruction *ir_build_bit_offset_of(IrBuilder *irb, Scope *scope, AstNo
3599 return &instruction->base;4518 return &instruction->base;
3600}4519}
36014520
3602static IrInstruction *ir_build_type_info(IrBuilder *irb, Scope *scope, AstNode *source_node,4521static IrInstSrc *ir_build_type_info(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value) {
3603 IrInstruction *type_value) {4522 IrInstSrcTypeInfo *instruction = ir_build_instruction<IrInstSrcTypeInfo>(irb, scope, source_node);
3604 IrInstructionTypeInfo *instruction = ir_build_instruction<IrInstructionTypeInfo>(irb, scope, source_node);
3605 instruction->type_value = type_value;4523 instruction->type_value = type_value;
36064524
3607 ir_ref_instruction(type_value, irb->current_basic_block);4525 ir_ref_instruction(type_value, irb->current_basic_block);
...@@ -3609,8 +4527,8 @@ static IrInstruction *ir_build_type_info(IrBuilder *irb, Scope *scope, AstNode *...@@ -3609,8 +4527,8 @@ static IrInstruction *ir_build_type_info(IrBuilder *irb, Scope *scope, AstNode *
3609 return &instruction->base;4527 return &instruction->base;
3610}4528}
36114529
3612static IrInstruction *ir_build_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type_info) {4530static IrInstSrc *ir_build_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_info) {
3613 IrInstructionType *instruction = ir_build_instruction<IrInstructionType>(irb, scope, source_node);4531 IrInstSrcType *instruction = ir_build_instruction<IrInstSrcType>(irb, scope, source_node);
3614 instruction->type_info = type_info;4532 instruction->type_info = type_info;
36154533
3616 ir_ref_instruction(type_info, irb->current_basic_block);4534 ir_ref_instruction(type_info, irb->current_basic_block);
...@@ -3618,10 +4536,8 @@ static IrInstruction *ir_build_type(IrBuilder *irb, Scope *scope, AstNode *sourc...@@ -3618,10 +4536,8 @@ static IrInstruction *ir_build_type(IrBuilder *irb, Scope *scope, AstNode *sourc
3618 return &instruction->base;4536 return &instruction->base;
3619}4537}
36204538
3621static IrInstruction *ir_build_type_id(IrBuilder *irb, Scope *scope, AstNode *source_node,4539static IrInstSrc *ir_build_type_id(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value) {
3622 IrInstruction *type_value)4540 IrInstSrcTypeId *instruction = ir_build_instruction<IrInstSrcTypeId>(irb, scope, source_node);
3623{
3624 IrInstructionTypeId *instruction = ir_build_instruction<IrInstructionTypeId>(irb, scope, source_node);
3625 instruction->type_value = type_value;4541 instruction->type_value = type_value;
36264542
3627 ir_ref_instruction(type_value, irb->current_basic_block);4543 ir_ref_instruction(type_value, irb->current_basic_block);
...@@ -3629,10 +4545,10 @@ static IrInstruction *ir_build_type_id(IrBuilder *irb, Scope *scope, AstNode *so...@@ -3629,10 +4545,10 @@ static IrInstruction *ir_build_type_id(IrBuilder *irb, Scope *scope, AstNode *so
3629 return &instruction->base;4545 return &instruction->base;
3630}4546}
36314547
3632static IrInstruction *ir_build_set_eval_branch_quota(IrBuilder *irb, Scope *scope, AstNode *source_node,4548static IrInstSrc *ir_build_set_eval_branch_quota(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3633 IrInstruction *new_quota)4549 IrInstSrc *new_quota)
3634{4550{
3635 IrInstructionSetEvalBranchQuota *instruction = ir_build_instruction<IrInstructionSetEvalBranchQuota>(irb, scope, source_node);4551 IrInstSrcSetEvalBranchQuota *instruction = ir_build_instruction<IrInstSrcSetEvalBranchQuota>(irb, scope, source_node);
3636 instruction->new_quota = new_quota;4552 instruction->new_quota = new_quota;
36374553
3638 ir_ref_instruction(new_quota, irb->current_basic_block);4554 ir_ref_instruction(new_quota, irb->current_basic_block);
...@@ -3640,23 +4556,35 @@ static IrInstruction *ir_build_set_eval_branch_quota(IrBuilder *irb, Scope *scop...@@ -3640,23 +4556,35 @@ static IrInstruction *ir_build_set_eval_branch_quota(IrBuilder *irb, Scope *scop
3640 return &instruction->base;4556 return &instruction->base;
3641}4557}
36424558
3643static IrInstruction *ir_build_align_cast(IrBuilder *irb, Scope *scope, AstNode *source_node,4559static IrInstSrc *ir_build_align_cast_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3644 IrInstruction *align_bytes, IrInstruction *target)4560 IrInstSrc *align_bytes, IrInstSrc *target)
3645{4561{
3646 IrInstructionAlignCast *instruction = ir_build_instruction<IrInstructionAlignCast>(irb, scope, source_node);4562 IrInstSrcAlignCast *instruction = ir_build_instruction<IrInstSrcAlignCast>(irb, scope, source_node);
3647 instruction->align_bytes = align_bytes;4563 instruction->align_bytes = align_bytes;
3648 instruction->target = target;4564 instruction->target = target;
36494565
3650 if (align_bytes) ir_ref_instruction(align_bytes, irb->current_basic_block);4566 ir_ref_instruction(align_bytes, irb->current_basic_block);
3651 ir_ref_instruction(target, irb->current_basic_block);4567 ir_ref_instruction(target, irb->current_basic_block);
36524568
3653 return &instruction->base;4569 return &instruction->base;
3654}4570}
36554571
3656static IrInstruction *ir_build_resolve_result(IrBuilder *irb, Scope *scope, AstNode *source_node,4572static IrInstGen *ir_build_align_cast_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
3657 ResultLoc *result_loc, IrInstruction *ty)4573 ZigType *result_type)
4574{
4575 IrInstGenAlignCast *instruction = ir_build_inst_gen<IrInstGenAlignCast>(&ira->new_irb, scope, source_node);
4576 instruction->base.value->type = result_type;
4577 instruction->target = target;
4578
4579 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
4580
4581 return &instruction->base;
4582}
4583
4584static IrInstSrc *ir_build_resolve_result(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4585 ResultLoc *result_loc, IrInstSrc *ty)
3658{4586{
3659 IrInstructionResolveResult *instruction = ir_build_instruction<IrInstructionResolveResult>(irb, scope, source_node);4587 IrInstSrcResolveResult *instruction = ir_build_instruction<IrInstSrcResolveResult>(irb, scope, source_node);
3660 instruction->result_loc = result_loc;4588 instruction->result_loc = result_loc;
3661 instruction->ty = ty;4589 instruction->ty = ty;
36624590
...@@ -3665,26 +4593,26 @@ static IrInstruction *ir_build_resolve_result(IrBuilder *irb, Scope *scope, AstN...@@ -3665,26 +4593,26 @@ static IrInstruction *ir_build_resolve_result(IrBuilder *irb, Scope *scope, AstN
3665 return &instruction->base;4593 return &instruction->base;
3666}4594}
36674595
3668static IrInstruction *ir_build_reset_result(IrBuilder *irb, Scope *scope, AstNode *source_node,4596static IrInstSrc *ir_build_reset_result(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3669 ResultLoc *result_loc)4597 ResultLoc *result_loc)
3670{4598{
3671 IrInstructionResetResult *instruction = ir_build_instruction<IrInstructionResetResult>(irb, scope, source_node);4599 IrInstSrcResetResult *instruction = ir_build_instruction<IrInstSrcResetResult>(irb, scope, source_node);
3672 instruction->result_loc = result_loc;4600 instruction->result_loc = result_loc;
3673 instruction->base.is_gen = true;4601 instruction->base.is_gen = true;
36744602
3675 return &instruction->base;4603 return &instruction->base;
3676}4604}
36774605
3678static IrInstruction *ir_build_opaque_type(IrBuilder *irb, Scope *scope, AstNode *source_node) {4606static IrInstSrc *ir_build_opaque_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3679 IrInstructionOpaqueType *instruction = ir_build_instruction<IrInstructionOpaqueType>(irb, scope, source_node);4607 IrInstSrcOpaqueType *instruction = ir_build_instruction<IrInstSrcOpaqueType>(irb, scope, source_node);
36804608
3681 return &instruction->base;4609 return &instruction->base;
3682}4610}
36834611
3684static IrInstruction *ir_build_set_align_stack(IrBuilder *irb, Scope *scope, AstNode *source_node,4612static IrInstSrc *ir_build_set_align_stack(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3685 IrInstruction *align_bytes)4613 IrInstSrc *align_bytes)
3686{4614{
3687 IrInstructionSetAlignStack *instruction = ir_build_instruction<IrInstructionSetAlignStack>(irb, scope, source_node);4615 IrInstSrcSetAlignStack *instruction = ir_build_instruction<IrInstSrcSetAlignStack>(irb, scope, source_node);
3688 instruction->align_bytes = align_bytes;4616 instruction->align_bytes = align_bytes;
36894617
3690 ir_ref_instruction(align_bytes, irb->current_basic_block);4618 ir_ref_instruction(align_bytes, irb->current_basic_block);
...@@ -3692,10 +4620,10 @@ static IrInstruction *ir_build_set_align_stack(IrBuilder *irb, Scope *scope, Ast...@@ -3692,10 +4620,10 @@ static IrInstruction *ir_build_set_align_stack(IrBuilder *irb, Scope *scope, Ast
3692 return &instruction->base;4620 return &instruction->base;
3693}4621}
36944622
3695static IrInstruction *ir_build_arg_type(IrBuilder *irb, Scope *scope, AstNode *source_node,4623static IrInstSrc *ir_build_arg_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3696 IrInstruction *fn_type, IrInstruction *arg_index, bool allow_var)4624 IrInstSrc *fn_type, IrInstSrc *arg_index, bool allow_var)
3697{4625{
3698 IrInstructionArgType *instruction = ir_build_instruction<IrInstructionArgType>(irb, scope, source_node);4626 IrInstSrcArgType *instruction = ir_build_instruction<IrInstSrcArgType>(irb, scope, source_node);
3699 instruction->fn_type = fn_type;4627 instruction->fn_type = fn_type;
3700 instruction->arg_index = arg_index;4628 instruction->arg_index = arg_index;
3701 instruction->allow_var = allow_var;4629 instruction->allow_var = allow_var;
...@@ -3706,17 +4634,29 @@ static IrInstruction *ir_build_arg_type(IrBuilder *irb, Scope *scope, AstNode *s...@@ -3706,17 +4634,29 @@ static IrInstruction *ir_build_arg_type(IrBuilder *irb, Scope *scope, AstNode *s
3706 return &instruction->base;4634 return &instruction->base;
3707}4635}
37084636
3709static IrInstruction *ir_build_error_return_trace(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstructionErrorReturnTrace::Optional optional) {4637static IrInstSrc *ir_build_error_return_trace_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3710 IrInstructionErrorReturnTrace *instruction = ir_build_instruction<IrInstructionErrorReturnTrace>(irb, scope, source_node);4638 IrInstErrorReturnTraceOptional optional)
3711 instruction->optional = optional;4639{
4640 IrInstSrcErrorReturnTrace *inst = ir_build_instruction<IrInstSrcErrorReturnTrace>(irb, scope, source_node);
4641 inst->optional = optional;
37124642
3713 return &instruction->base;4643 return &inst->base;
4644}
4645
4646static IrInstGen *ir_build_error_return_trace_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
4647 IrInstErrorReturnTraceOptional optional, ZigType *result_type)
4648{
4649 IrInstGenErrorReturnTrace *inst = ir_build_inst_gen<IrInstGenErrorReturnTrace>(&ira->new_irb, scope, source_node);
4650 inst->base.value->type = result_type;
4651 inst->optional = optional;
4652
4653 return &inst->base;
3714}4654}
37154655
3716static IrInstruction *ir_build_error_union(IrBuilder *irb, Scope *scope, AstNode *source_node,4656static IrInstSrc *ir_build_error_union(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3717 IrInstruction *err_set, IrInstruction *payload)4657 IrInstSrc *err_set, IrInstSrc *payload)
3718{4658{
3719 IrInstructionErrorUnion *instruction = ir_build_instruction<IrInstructionErrorUnion>(irb, scope, source_node);4659 IrInstSrcErrorUnion *instruction = ir_build_instruction<IrInstSrcErrorUnion>(irb, scope, source_node);
3720 instruction->err_set = err_set;4660 instruction->err_set = err_set;
3721 instruction->payload = payload;4661 instruction->payload = payload;
37224662
...@@ -3726,85 +4666,130 @@ static IrInstruction *ir_build_error_union(IrBuilder *irb, Scope *scope, AstNode...@@ -3726,85 +4666,130 @@ static IrInstruction *ir_build_error_union(IrBuilder *irb, Scope *scope, AstNode
3726 return &instruction->base;4666 return &instruction->base;
3727}4667}
37284668
3729static IrInstruction *ir_build_atomic_rmw(IrBuilder *irb, Scope *scope, AstNode *source_node,4669static IrInstSrc *ir_build_atomic_rmw_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3730 IrInstruction *operand_type, IrInstruction *ptr, IrInstruction *op, IrInstruction *operand,4670 IrInstSrc *operand_type, IrInstSrc *ptr, IrInstSrc *op, IrInstSrc *operand,
3731 IrInstruction *ordering, AtomicRmwOp resolved_op, AtomicOrder resolved_ordering)4671 IrInstSrc *ordering)
3732{4672{
3733 IrInstructionAtomicRmw *instruction = ir_build_instruction<IrInstructionAtomicRmw>(irb, scope, source_node);4673 IrInstSrcAtomicRmw *instruction = ir_build_instruction<IrInstSrcAtomicRmw>(irb, scope, source_node);
3734 instruction->operand_type = operand_type;4674 instruction->operand_type = operand_type;
3735 instruction->ptr = ptr;4675 instruction->ptr = ptr;
3736 instruction->op = op;4676 instruction->op = op;
3737 instruction->operand = operand;4677 instruction->operand = operand;
3738 instruction->ordering = ordering;4678 instruction->ordering = ordering;
3739 instruction->resolved_op = resolved_op;
3740 instruction->resolved_ordering = resolved_ordering;
37414679
3742 if (operand_type != nullptr) ir_ref_instruction(operand_type, irb->current_basic_block);4680 ir_ref_instruction(operand_type, irb->current_basic_block);
3743 ir_ref_instruction(ptr, irb->current_basic_block);4681 ir_ref_instruction(ptr, irb->current_basic_block);
3744 if (op != nullptr) ir_ref_instruction(op, irb->current_basic_block);4682 ir_ref_instruction(op, irb->current_basic_block);
3745 ir_ref_instruction(operand, irb->current_basic_block);4683 ir_ref_instruction(operand, irb->current_basic_block);
3746 if (ordering != nullptr) ir_ref_instruction(ordering, irb->current_basic_block);4684 ir_ref_instruction(ordering, irb->current_basic_block);
4685
4686 return &instruction->base;
4687}
4688
4689static IrInstGen *ir_build_atomic_rmw_gen(IrAnalyze *ira, IrInst *source_instr,
4690 IrInstGen *ptr, IrInstGen *operand, AtomicRmwOp op, AtomicOrder ordering, ZigType *operand_type)
4691{
4692 IrInstGenAtomicRmw *instruction = ir_build_inst_gen<IrInstGenAtomicRmw>(&ira->new_irb, source_instr->scope, source_instr->source_node);
4693 instruction->base.value->type = operand_type;
4694 instruction->ptr = ptr;
4695 instruction->op = op;
4696 instruction->operand = operand;
4697 instruction->ordering = ordering;
4698
4699 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
4700 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
37474701
3748 return &instruction->base;4702 return &instruction->base;
3749}4703}
37504704
3751static IrInstruction *ir_build_atomic_load(IrBuilder *irb, Scope *scope, AstNode *source_node,4705static IrInstSrc *ir_build_atomic_load_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3752 IrInstruction *operand_type, IrInstruction *ptr,4706 IrInstSrc *operand_type, IrInstSrc *ptr, IrInstSrc *ordering)
3753 IrInstruction *ordering, AtomicOrder resolved_ordering)
3754{4707{
3755 IrInstructionAtomicLoad *instruction = ir_build_instruction<IrInstructionAtomicLoad>(irb, scope, source_node);4708 IrInstSrcAtomicLoad *instruction = ir_build_instruction<IrInstSrcAtomicLoad>(irb, scope, source_node);
3756 instruction->operand_type = operand_type;4709 instruction->operand_type = operand_type;
3757 instruction->ptr = ptr;4710 instruction->ptr = ptr;
3758 instruction->ordering = ordering;4711 instruction->ordering = ordering;
3759 instruction->resolved_ordering = resolved_ordering;
37604712
3761 if (operand_type != nullptr) ir_ref_instruction(operand_type, irb->current_basic_block);4713 ir_ref_instruction(operand_type, irb->current_basic_block);
3762 ir_ref_instruction(ptr, irb->current_basic_block);4714 ir_ref_instruction(ptr, irb->current_basic_block);
3763 if (ordering != nullptr) ir_ref_instruction(ordering, irb->current_basic_block);4715 ir_ref_instruction(ordering, irb->current_basic_block);
4716
4717 return &instruction->base;
4718}
4719
4720static IrInstGen *ir_build_atomic_load_gen(IrAnalyze *ira, IrInst *source_instr,
4721 IrInstGen *ptr, AtomicOrder ordering, ZigType *operand_type)
4722{
4723 IrInstGenAtomicLoad *instruction = ir_build_inst_gen<IrInstGenAtomicLoad>(&ira->new_irb,
4724 source_instr->scope, source_instr->source_node);
4725 instruction->base.value->type = operand_type;
4726 instruction->ptr = ptr;
4727 instruction->ordering = ordering;
4728
4729 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
37644730
3765 return &instruction->base;4731 return &instruction->base;
3766}4732}
37674733
3768static IrInstruction *ir_build_atomic_store(IrBuilder *irb, Scope *scope, AstNode *source_node,4734static IrInstSrc *ir_build_atomic_store_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3769 IrInstruction *operand_type, IrInstruction *ptr, IrInstruction *value,4735 IrInstSrc *operand_type, IrInstSrc *ptr, IrInstSrc *value, IrInstSrc *ordering)
3770 IrInstruction *ordering, AtomicOrder resolved_ordering)
3771{4736{
3772 IrInstructionAtomicStore *instruction = ir_build_instruction<IrInstructionAtomicStore>(irb, scope, source_node);4737 IrInstSrcAtomicStore *instruction = ir_build_instruction<IrInstSrcAtomicStore>(irb, scope, source_node);
3773 instruction->operand_type = operand_type;4738 instruction->operand_type = operand_type;
3774 instruction->ptr = ptr;4739 instruction->ptr = ptr;
3775 instruction->value = value;4740 instruction->value = value;
3776 instruction->ordering = ordering;4741 instruction->ordering = ordering;
3777 instruction->resolved_ordering = resolved_ordering;
37784742
3779 if (operand_type != nullptr) ir_ref_instruction(operand_type, irb->current_basic_block);4743 ir_ref_instruction(operand_type, irb->current_basic_block);
3780 ir_ref_instruction(ptr, irb->current_basic_block);4744 ir_ref_instruction(ptr, irb->current_basic_block);
3781 ir_ref_instruction(value, irb->current_basic_block);4745 ir_ref_instruction(value, irb->current_basic_block);
3782 if (ordering != nullptr) ir_ref_instruction(ordering, irb->current_basic_block);4746 ir_ref_instruction(ordering, irb->current_basic_block);
37834747
3784 return &instruction->base;4748 return &instruction->base;
3785}4749}
37864750
3787static IrInstruction *ir_build_save_err_ret_addr(IrBuilder *irb, Scope *scope, AstNode *source_node) {4751static IrInstGen *ir_build_atomic_store_gen(IrAnalyze *ira, IrInst *source_instr,
3788 IrInstructionSaveErrRetAddr *instruction = ir_build_instruction<IrInstructionSaveErrRetAddr>(irb, scope, source_node);4752 IrInstGen *ptr, IrInstGen *value, AtomicOrder ordering)
4753{
4754 IrInstGenAtomicStore *instruction = ir_build_inst_void<IrInstGenAtomicStore>(&ira->new_irb,
4755 source_instr->scope, source_instr->source_node);
4756 instruction->ptr = ptr;
4757 instruction->value = value;
4758 instruction->ordering = ordering;
4759
4760 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
4761 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
4762
3789 return &instruction->base;4763 return &instruction->base;
3790}4764}
37914765
3792static IrInstruction *ir_build_add_implicit_return_type(IrBuilder *irb, Scope *scope, AstNode *source_node,4766static IrInstSrc *ir_build_save_err_ret_addr_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3793 IrInstruction *value, ResultLocReturn *result_loc_ret)4767 IrInstSrcSaveErrRetAddr *inst = ir_build_instruction<IrInstSrcSaveErrRetAddr>(irb, scope, source_node);
4768 return &inst->base;
4769}
4770
4771static IrInstGen *ir_build_save_err_ret_addr_gen(IrAnalyze *ira, IrInst *source_instr) {
4772 IrInstGenSaveErrRetAddr *inst = ir_build_inst_void<IrInstGenSaveErrRetAddr>(&ira->new_irb,
4773 source_instr->scope, source_instr->source_node);
4774 return &inst->base;
4775}
4776
4777static IrInstSrc *ir_build_add_implicit_return_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4778 IrInstSrc *value, ResultLocReturn *result_loc_ret)
3794{4779{
3795 IrInstructionAddImplicitReturnType *instruction = ir_build_instruction<IrInstructionAddImplicitReturnType>(irb, scope, source_node);4780 IrInstSrcAddImplicitReturnType *inst = ir_build_instruction<IrInstSrcAddImplicitReturnType>(irb, scope, source_node);
3796 instruction->value = value;4781 inst->value = value;
3797 instruction->result_loc_ret = result_loc_ret;4782 inst->result_loc_ret = result_loc_ret;
37984783
3799 ir_ref_instruction(value, irb->current_basic_block);4784 ir_ref_instruction(value, irb->current_basic_block);
38004785
3801 return &instruction->base;4786 return &inst->base;
3802}4787}
38034788
3804static IrInstruction *ir_build_has_decl(IrBuilder *irb, Scope *scope, AstNode *source_node,4789static IrInstSrc *ir_build_has_decl(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3805 IrInstruction *container, IrInstruction *name)4790 IrInstSrc *container, IrInstSrc *name)
3806{4791{
3807 IrInstructionHasDecl *instruction = ir_build_instruction<IrInstructionHasDecl>(irb, scope, source_node);4792 IrInstSrcHasDecl *instruction = ir_build_instruction<IrInstSrcHasDecl>(irb, scope, source_node);
3808 instruction->container = container;4793 instruction->container = container;
3809 instruction->name = name;4794 instruction->name = name;
38104795
...@@ -3814,17 +4799,15 @@ static IrInstruction *ir_build_has_decl(IrBuilder *irb, Scope *scope, AstNode *s...@@ -3814,17 +4799,15 @@ static IrInstruction *ir_build_has_decl(IrBuilder *irb, Scope *scope, AstNode *s
3814 return &instruction->base;4799 return &instruction->base;
3815}4800}
38164801
3817static IrInstruction *ir_build_undeclared_identifier(IrBuilder *irb, Scope *scope, AstNode *source_node,4802static IrInstSrc *ir_build_undeclared_identifier(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *name) {
3818 Buf *name)4803 IrInstSrcUndeclaredIdent *instruction = ir_build_instruction<IrInstSrcUndeclaredIdent>(irb, scope, source_node);
3819{
3820 IrInstructionUndeclaredIdent *instruction = ir_build_instruction<IrInstructionUndeclaredIdent>(irb, scope, source_node);
3821 instruction->name = name;4804 instruction->name = name;
38224805
3823 return &instruction->base;4806 return &instruction->base;
3824}4807}
38254808
3826static IrInstruction *ir_build_check_runtime_scope(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *scope_is_comptime, IrInstruction *is_comptime) {4809static IrInstSrc *ir_build_check_runtime_scope(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *scope_is_comptime, IrInstSrc *is_comptime) {
3827 IrInstructionCheckRuntimeScope *instruction = ir_build_instruction<IrInstructionCheckRuntimeScope>(irb, scope, source_node);4810 IrInstSrcCheckRuntimeScope *instruction = ir_build_instruction<IrInstSrcCheckRuntimeScope>(irb, scope, source_node);
3828 instruction->scope_is_comptime = scope_is_comptime;4811 instruction->scope_is_comptime = scope_is_comptime;
3829 instruction->is_comptime = is_comptime;4812 instruction->is_comptime = is_comptime;
38304813
...@@ -3834,10 +4817,10 @@ static IrInstruction *ir_build_check_runtime_scope(IrBuilder *irb, Scope *scope,...@@ -3834,10 +4817,10 @@ static IrInstruction *ir_build_check_runtime_scope(IrBuilder *irb, Scope *scope,
3834 return &instruction->base;4817 return &instruction->base;
3835}4818}
38364819
3837static IrInstruction *ir_build_union_init_named_field(IrBuilder *irb, Scope *scope, AstNode *source_node,4820static IrInstSrc *ir_build_union_init_named_field(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3838 IrInstruction *union_type, IrInstruction *field_name, IrInstruction *field_result_loc, IrInstruction *result_loc)4821 IrInstSrc *union_type, IrInstSrc *field_name, IrInstSrc *field_result_loc, IrInstSrc *result_loc)
3839{4822{
3840 IrInstructionUnionInitNamedField *instruction = ir_build_instruction<IrInstructionUnionInitNamedField>(irb, scope, source_node);4823 IrInstSrcUnionInitNamedField *instruction = ir_build_instruction<IrInstSrcUnionInitNamedField>(irb, scope, source_node);
3841 instruction->union_type = union_type;4824 instruction->union_type = union_type;
3842 instruction->field_name = field_name;4825 instruction->field_name = field_name;
3843 instruction->field_result_loc = field_result_loc;4826 instruction->field_result_loc = field_result_loc;
...@@ -3852,79 +4835,79 @@ static IrInstruction *ir_build_union_init_named_field(IrBuilder *irb, Scope *sco...@@ -3852,79 +4835,79 @@ static IrInstruction *ir_build_union_init_named_field(IrBuilder *irb, Scope *sco
3852}4835}
38534836
38544837
3855static IrInstruction *ir_build_vector_to_array(IrAnalyze *ira, IrInstruction *source_instruction,4838static IrInstGen *ir_build_vector_to_array(IrAnalyze *ira, IrInst *source_instruction,
3856 ZigType *result_type, IrInstruction *vector, IrInstruction *result_loc)4839 ZigType *result_type, IrInstGen *vector, IrInstGen *result_loc)
3857{4840{
3858 IrInstructionVectorToArray *instruction = ir_build_instruction<IrInstructionVectorToArray>(&ira->new_irb,4841 IrInstGenVectorToArray *instruction = ir_build_inst_gen<IrInstGenVectorToArray>(&ira->new_irb,
3859 source_instruction->scope, source_instruction->source_node);4842 source_instruction->scope, source_instruction->source_node);
3860 instruction->base.value->type = result_type;4843 instruction->base.value->type = result_type;
3861 instruction->vector = vector;4844 instruction->vector = vector;
3862 instruction->result_loc = result_loc;4845 instruction->result_loc = result_loc;
38634846
3864 ir_ref_instruction(vector, ira->new_irb.current_basic_block);4847 ir_ref_inst_gen(vector, ira->new_irb.current_basic_block);
3865 ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);4848 ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
38664849
3867 return &instruction->base;4850 return &instruction->base;
3868}4851}
38694852
3870static IrInstruction *ir_build_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruction *source_instruction,4853static IrInstGen *ir_build_ptr_of_array_to_slice(IrAnalyze *ira, IrInst *source_instruction,
3871 ZigType *result_type, IrInstruction *operand, IrInstruction *result_loc)4854 ZigType *result_type, IrInstGen *operand, IrInstGen *result_loc)
3872{4855{
3873 IrInstructionPtrOfArrayToSlice *instruction = ir_build_instruction<IrInstructionPtrOfArrayToSlice>(&ira->new_irb,4856 IrInstGenPtrOfArrayToSlice *instruction = ir_build_inst_gen<IrInstGenPtrOfArrayToSlice>(&ira->new_irb,
3874 source_instruction->scope, source_instruction->source_node);4857 source_instruction->scope, source_instruction->source_node);
3875 instruction->base.value->type = result_type;4858 instruction->base.value->type = result_type;
3876 instruction->operand = operand;4859 instruction->operand = operand;
3877 instruction->result_loc = result_loc;4860 instruction->result_loc = result_loc;
38784861
3879 ir_ref_instruction(operand, ira->new_irb.current_basic_block);4862 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
3880 ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);4863 ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
38814864
3882 return &instruction->base;4865 return &instruction->base;
3883}4866}
38844867
3885static IrInstruction *ir_build_array_to_vector(IrAnalyze *ira, IrInstruction *source_instruction,4868static IrInstGen *ir_build_array_to_vector(IrAnalyze *ira, IrInst *source_instruction,
3886 IrInstruction *array, ZigType *result_type)4869 IrInstGen *array, ZigType *result_type)
3887{4870{
3888 IrInstructionArrayToVector *instruction = ir_build_instruction<IrInstructionArrayToVector>(&ira->new_irb,4871 IrInstGenArrayToVector *instruction = ir_build_inst_gen<IrInstGenArrayToVector>(&ira->new_irb,
3889 source_instruction->scope, source_instruction->source_node);4872 source_instruction->scope, source_instruction->source_node);
3890 instruction->base.value->type = result_type;4873 instruction->base.value->type = result_type;
3891 instruction->array = array;4874 instruction->array = array;
38924875
3893 ir_ref_instruction(array, ira->new_irb.current_basic_block);4876 ir_ref_inst_gen(array, ira->new_irb.current_basic_block);
38944877
3895 return &instruction->base;4878 return &instruction->base;
3896}4879}
38974880
3898static IrInstruction *ir_build_assert_zero(IrAnalyze *ira, IrInstruction *source_instruction,4881static IrInstGen *ir_build_assert_zero(IrAnalyze *ira, IrInst *source_instruction,
3899 IrInstruction *target)4882 IrInstGen *target)
3900{4883{
3901 IrInstructionAssertZero *instruction = ir_build_instruction<IrInstructionAssertZero>(&ira->new_irb,4884 IrInstGenAssertZero *instruction = ir_build_inst_gen<IrInstGenAssertZero>(&ira->new_irb,
3902 source_instruction->scope, source_instruction->source_node);4885 source_instruction->scope, source_instruction->source_node);
3903 instruction->base.value->type = ira->codegen->builtin_types.entry_void;4886 instruction->base.value->type = ira->codegen->builtin_types.entry_void;
3904 instruction->target = target;4887 instruction->target = target;
39054888
3906 ir_ref_instruction(target, ira->new_irb.current_basic_block);4889 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
39074890
3908 return &instruction->base;4891 return &instruction->base;
3909}4892}
39104893
3911static IrInstruction *ir_build_assert_non_null(IrAnalyze *ira, IrInstruction *source_instruction,4894static IrInstGen *ir_build_assert_non_null(IrAnalyze *ira, IrInst *source_instruction,
3912 IrInstruction *target)4895 IrInstGen *target)
3913{4896{
3914 IrInstructionAssertNonNull *instruction = ir_build_instruction<IrInstructionAssertNonNull>(&ira->new_irb,4897 IrInstGenAssertNonNull *instruction = ir_build_inst_gen<IrInstGenAssertNonNull>(&ira->new_irb,
3915 source_instruction->scope, source_instruction->source_node);4898 source_instruction->scope, source_instruction->source_node);
3916 instruction->base.value->type = ira->codegen->builtin_types.entry_void;4899 instruction->base.value->type = ira->codegen->builtin_types.entry_void;
3917 instruction->target = target;4900 instruction->target = target;
39184901
3919 ir_ref_instruction(target, ira->new_irb.current_basic_block);4902 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
39204903
3921 return &instruction->base;4904 return &instruction->base;
3922}4905}
39234906
3924static IrInstruction *ir_build_alloca_src(IrBuilder *irb, Scope *scope, AstNode *source_node,4907static IrInstSrc *ir_build_alloca_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3925 IrInstruction *align, const char *name_hint, IrInstruction *is_comptime)4908 IrInstSrc *align, const char *name_hint, IrInstSrc *is_comptime)
3926{4909{
3927 IrInstructionAllocaSrc *instruction = ir_build_instruction<IrInstructionAllocaSrc>(irb, scope, source_node);4910 IrInstSrcAlloca *instruction = ir_build_instruction<IrInstSrcAlloca>(irb, scope, source_node);
3928 instruction->base.is_gen = true;4911 instruction->base.is_gen = true;
3929 instruction->align = align;4912 instruction->align = align;
3930 instruction->name_hint = name_hint;4913 instruction->name_hint = name_hint;
...@@ -3936,10 +4919,10 @@ static IrInstruction *ir_build_alloca_src(IrBuilder *irb, Scope *scope, AstNode...@@ -3936,10 +4919,10 @@ static IrInstruction *ir_build_alloca_src(IrBuilder *irb, Scope *scope, AstNode
3936 return &instruction->base;4919 return &instruction->base;
3937}4920}
39384921
3939static IrInstructionAllocaGen *ir_build_alloca_gen(IrAnalyze *ira, IrInstruction *source_instruction,4922static IrInstGenAlloca *ir_build_alloca_gen(IrAnalyze *ira, IrInst *source_instruction,
3940 uint32_t align, const char *name_hint)4923 uint32_t align, const char *name_hint)
3941{4924{
3942 IrInstructionAllocaGen *instruction = ir_create_instruction<IrInstructionAllocaGen>(&ira->new_irb,4925 IrInstGenAlloca *instruction = ir_create_inst_gen<IrInstGenAlloca>(&ira->new_irb,
3943 source_instruction->scope, source_instruction->source_node);4926 source_instruction->scope, source_instruction->source_node);
3944 instruction->align = align;4927 instruction->align = align;
3945 instruction->name_hint = name_hint;4928 instruction->name_hint = name_hint;
...@@ -3947,10 +4930,10 @@ static IrInstructionAllocaGen *ir_build_alloca_gen(IrAnalyze *ira, IrInstruction...@@ -3947,10 +4930,10 @@ static IrInstructionAllocaGen *ir_build_alloca_gen(IrAnalyze *ira, IrInstruction
3947 return instruction;4930 return instruction;
3948}4931}
39494932
3950static IrInstruction *ir_build_end_expr(IrBuilder *irb, Scope *scope, AstNode *source_node,4933static IrInstSrc *ir_build_end_expr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3951 IrInstruction *value, ResultLoc *result_loc)4934 IrInstSrc *value, ResultLoc *result_loc)
3952{4935{
3953 IrInstructionEndExpr *instruction = ir_build_instruction<IrInstructionEndExpr>(irb, scope, source_node);4936 IrInstSrcEndExpr *instruction = ir_build_instruction<IrInstSrcEndExpr>(irb, scope, source_node);
3954 instruction->base.is_gen = true;4937 instruction->base.is_gen = true;
3955 instruction->value = value;4938 instruction->value = value;
3956 instruction->result_loc = result_loc;4939 instruction->result_loc = result_loc;
...@@ -3960,29 +4943,41 @@ static IrInstruction *ir_build_end_expr(IrBuilder *irb, Scope *scope, AstNode *s...@@ -3960,29 +4943,41 @@ static IrInstruction *ir_build_end_expr(IrBuilder *irb, Scope *scope, AstNode *s
3960 return &instruction->base;4943 return &instruction->base;
3961}4944}
39624945
3963static IrInstructionSuspendBegin *ir_build_suspend_begin(IrBuilder *irb, Scope *scope, AstNode *source_node) {4946static IrInstSrcSuspendBegin *ir_build_suspend_begin_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3964 IrInstructionSuspendBegin *instruction = ir_build_instruction<IrInstructionSuspendBegin>(irb, scope, source_node);4947 return ir_build_instruction<IrInstSrcSuspendBegin>(irb, scope, source_node);
3965 instruction->base.value->type = irb->codegen->builtin_types.entry_void;4948}
39664949
3967 return instruction;4950static IrInstGen *ir_build_suspend_begin_gen(IrAnalyze *ira, IrInst *source_instr) {
4951 IrInstGenSuspendBegin *inst = ir_build_inst_void<IrInstGenSuspendBegin>(&ira->new_irb,
4952 source_instr->scope, source_instr->source_node);
4953 return &inst->base;
3968}4954}
39694955
3970static IrInstruction *ir_build_suspend_finish(IrBuilder *irb, Scope *scope, AstNode *source_node,4956static IrInstSrc *ir_build_suspend_finish_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3971 IrInstructionSuspendBegin *begin)4957 IrInstSrcSuspendBegin *begin)
3972{4958{
3973 IrInstructionSuspendFinish *instruction = ir_build_instruction<IrInstructionSuspendFinish>(irb, scope, source_node);4959 IrInstSrcSuspendFinish *inst = ir_build_instruction<IrInstSrcSuspendFinish>(irb, scope, source_node);
3974 instruction->base.value->type = irb->codegen->builtin_types.entry_void;4960 inst->begin = begin;
3975 instruction->begin = begin;
39764961
3977 ir_ref_instruction(&begin->base, irb->current_basic_block);4962 ir_ref_instruction(&begin->base, irb->current_basic_block);
39784963
3979 return &instruction->base;4964 return &inst->base;
3980}4965}
39814966
3982static IrInstruction *ir_build_await_src(IrBuilder *irb, Scope *scope, AstNode *source_node,4967static IrInstGen *ir_build_suspend_finish_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGenSuspendBegin *begin) {
3983 IrInstruction *frame, ResultLoc *result_loc)4968 IrInstGenSuspendFinish *inst = ir_build_inst_void<IrInstGenSuspendFinish>(&ira->new_irb,
4969 source_instr->scope, source_instr->source_node);
4970 inst->begin = begin;
4971
4972 ir_ref_inst_gen(&begin->base, ira->new_irb.current_basic_block);
4973
4974 return &inst->base;
4975}
4976
4977static IrInstSrc *ir_build_await_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4978 IrInstSrc *frame, ResultLoc *result_loc)
3984{4979{
3985 IrInstructionAwaitSrc *instruction = ir_build_instruction<IrInstructionAwaitSrc>(irb, scope, source_node);4980 IrInstSrcAwait *instruction = ir_build_instruction<IrInstSrcAwait>(irb, scope, source_node);
3986 instruction->frame = frame;4981 instruction->frame = frame;
3987 instruction->result_loc = result_loc;4982 instruction->result_loc = result_loc;
39884983
...@@ -3991,24 +4986,23 @@ static IrInstruction *ir_build_await_src(IrBuilder *irb, Scope *scope, AstNode *...@@ -3991,24 +4986,23 @@ static IrInstruction *ir_build_await_src(IrBuilder *irb, Scope *scope, AstNode *
3991 return &instruction->base;4986 return &instruction->base;
3992}4987}
39934988
3994static IrInstructionAwaitGen *ir_build_await_gen(IrAnalyze *ira, IrInstruction *source_instruction,4989static IrInstGenAwait *ir_build_await_gen(IrAnalyze *ira, IrInst *source_instruction,
3995 IrInstruction *frame, ZigType *result_type, IrInstruction *result_loc)4990 IrInstGen *frame, ZigType *result_type, IrInstGen *result_loc)
3996{4991{
3997 IrInstructionAwaitGen *instruction = ir_build_instruction<IrInstructionAwaitGen>(&ira->new_irb,4992 IrInstGenAwait *instruction = ir_build_inst_gen<IrInstGenAwait>(&ira->new_irb,
3998 source_instruction->scope, source_instruction->source_node);4993 source_instruction->scope, source_instruction->source_node);
3999 instruction->base.value->type = result_type;4994 instruction->base.value->type = result_type;
4000 instruction->frame = frame;4995 instruction->frame = frame;
4001 instruction->result_loc = result_loc;4996 instruction->result_loc = result_loc;
40024997
4003 ir_ref_instruction(frame, ira->new_irb.current_basic_block);4998 ir_ref_inst_gen(frame, ira->new_irb.current_basic_block);
4004 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);4999 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
40055000
4006 return instruction;5001 return instruction;
4007}5002}
40085003
4009static IrInstruction *ir_build_resume(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *frame) {5004static IrInstSrc *ir_build_resume_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *frame) {
4010 IrInstructionResume *instruction = ir_build_instruction<IrInstructionResume>(irb, scope, source_node);5005 IrInstSrcResume *instruction = ir_build_instruction<IrInstSrcResume>(irb, scope, source_node);
4011 instruction->base.value->type = irb->codegen->builtin_types.entry_void;
4012 instruction->frame = frame;5006 instruction->frame = frame;
40135007
4014 ir_ref_instruction(frame, irb->current_basic_block);5008 ir_ref_instruction(frame, irb->current_basic_block);
...@@ -4016,12 +5010,20 @@ static IrInstruction *ir_build_resume(IrBuilder *irb, Scope *scope, AstNode *sou...@@ -4016,12 +5010,20 @@ static IrInstruction *ir_build_resume(IrBuilder *irb, Scope *scope, AstNode *sou
4016 return &instruction->base;5010 return &instruction->base;
4017}5011}
40185012
4019static IrInstructionSpillBegin *ir_build_spill_begin(IrBuilder *irb, Scope *scope, AstNode *source_node,5013static IrInstGen *ir_build_resume_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *frame) {
4020 IrInstruction *operand, SpillId spill_id)5014 IrInstGenResume *instruction = ir_build_inst_void<IrInstGenResume>(&ira->new_irb,
5015 source_instr->scope, source_instr->source_node);
5016 instruction->frame = frame;
5017
5018 ir_ref_inst_gen(frame, ira->new_irb.current_basic_block);
5019
5020 return &instruction->base;
5021}
5022
5023static IrInstSrcSpillBegin *ir_build_spill_begin_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
5024 IrInstSrc *operand, SpillId spill_id)
4021{5025{
4022 IrInstructionSpillBegin *instruction = ir_build_instruction<IrInstructionSpillBegin>(irb, scope, source_node);5026 IrInstSrcSpillBegin *instruction = ir_build_instruction<IrInstSrcSpillBegin>(irb, scope, source_node);
4023 instruction->base.value->special = ConstValSpecialStatic;
4024 instruction->base.value->type = irb->codegen->builtin_types.entry_void;
4025 instruction->operand = operand;5027 instruction->operand = operand;
4026 instruction->spill_id = spill_id;5028 instruction->spill_id = spill_id;
40275029
...@@ -4030,10 +5032,23 @@ static IrInstructionSpillBegin *ir_build_spill_begin(IrBuilder *irb, Scope *scop...@@ -4030,10 +5032,23 @@ static IrInstructionSpillBegin *ir_build_spill_begin(IrBuilder *irb, Scope *scop
4030 return instruction;5032 return instruction;
4031}5033}
40325034
4033static IrInstruction *ir_build_spill_end(IrBuilder *irb, Scope *scope, AstNode *source_node,5035static IrInstGen *ir_build_spill_begin_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
4034 IrInstructionSpillBegin *begin)5036 SpillId spill_id)
5037{
5038 IrInstGenSpillBegin *instruction = ir_build_inst_void<IrInstGenSpillBegin>(&ira->new_irb,
5039 source_instr->scope, source_instr->source_node);
5040 instruction->operand = operand;
5041 instruction->spill_id = spill_id;
5042
5043 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
5044
5045 return &instruction->base;
5046}
5047
5048static IrInstSrc *ir_build_spill_end_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
5049 IrInstSrcSpillBegin *begin)
4035{5050{
4036 IrInstructionSpillEnd *instruction = ir_build_instruction<IrInstructionSpillEnd>(irb, scope, source_node);5051 IrInstSrcSpillEnd *instruction = ir_build_instruction<IrInstSrcSpillEnd>(irb, scope, source_node);
4037 instruction->begin = begin;5052 instruction->begin = begin;
40385053
4039 ir_ref_instruction(&begin->base, irb->current_basic_block);5054 ir_ref_instruction(&begin->base, irb->current_basic_block);
...@@ -4041,22 +5056,35 @@ static IrInstruction *ir_build_spill_end(IrBuilder *irb, Scope *scope, AstNode *...@@ -4041,22 +5056,35 @@ static IrInstruction *ir_build_spill_end(IrBuilder *irb, Scope *scope, AstNode *
4041 return &instruction->base;5056 return &instruction->base;
4042}5057}
40435058
4044static IrInstruction *ir_build_vector_extract_elem(IrAnalyze *ira, IrInstruction *source_instruction,5059static IrInstGen *ir_build_spill_end_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGenSpillBegin *begin,
4045 IrInstruction *vector, IrInstruction *index)5060 ZigType *result_type)
5061{
5062 IrInstGenSpillEnd *instruction = ir_build_inst_gen<IrInstGenSpillEnd>(&ira->new_irb,
5063 source_instr->scope, source_instr->source_node);
5064 instruction->base.value->type = result_type;
5065 instruction->begin = begin;
5066
5067 ir_ref_inst_gen(&begin->base, ira->new_irb.current_basic_block);
5068
5069 return &instruction->base;
5070}
5071
5072static IrInstGen *ir_build_vector_extract_elem(IrAnalyze *ira, IrInst *source_instruction,
5073 IrInstGen *vector, IrInstGen *index)
4046{5074{
4047 IrInstructionVectorExtractElem *instruction = ir_build_instruction<IrInstructionVectorExtractElem>(5075 IrInstGenVectorExtractElem *instruction = ir_build_inst_gen<IrInstGenVectorExtractElem>(
4048 &ira->new_irb, source_instruction->scope, source_instruction->source_node);5076 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
4049 instruction->base.value->type = vector->value->type->data.vector.elem_type;5077 instruction->base.value->type = vector->value->type->data.vector.elem_type;
4050 instruction->vector = vector;5078 instruction->vector = vector;
4051 instruction->index = index;5079 instruction->index = index;
40525080
4053 ir_ref_instruction(vector, ira->new_irb.current_basic_block);5081 ir_ref_inst_gen(vector, ira->new_irb.current_basic_block);
4054 ir_ref_instruction(index, ira->new_irb.current_basic_block);5082 ir_ref_inst_gen(index, ira->new_irb.current_basic_block);
40555083
4056 return &instruction->base;5084 return &instruction->base;
4057}5085}
40585086
4059static void ir_count_defers(IrBuilder *irb, Scope *inner_scope, Scope *outer_scope, size_t *results) {5087static void ir_count_defers(IrBuilderSrc *irb, Scope *inner_scope, Scope *outer_scope, size_t *results) {
4060 results[ReturnKindUnconditional] = 0;5088 results[ReturnKindUnconditional] = 0;
4061 results[ReturnKindError] = 0;5089 results[ReturnKindError] = 0;
40625090
...@@ -4093,12 +5121,12 @@ static void ir_count_defers(IrBuilder *irb, Scope *inner_scope, Scope *outer_sco...@@ -4093,12 +5121,12 @@ static void ir_count_defers(IrBuilder *irb, Scope *inner_scope, Scope *outer_sco
4093 }5121 }
4094}5122}
40955123
4096static IrInstruction *ir_mark_gen(IrInstruction *instruction) {5124static IrInstSrc *ir_mark_gen(IrInstSrc *instruction) {
4097 instruction->is_gen = true;5125 instruction->is_gen = true;
4098 return instruction;5126 return instruction;
4099}5127}
41005128
4101static bool ir_gen_defers_for_block(IrBuilder *irb, Scope *inner_scope, Scope *outer_scope, bool gen_error_defers) {5129static bool ir_gen_defers_for_block(IrBuilderSrc *irb, Scope *inner_scope, Scope *outer_scope, bool gen_error_defers) {
4102 Scope *scope = inner_scope;5130 Scope *scope = inner_scope;
4103 bool is_noreturn = false;5131 bool is_noreturn = false;
4104 while (scope != outer_scope) {5132 while (scope != outer_scope) {
...@@ -4115,11 +5143,9 @@ static bool ir_gen_defers_for_block(IrBuilder *irb, Scope *inner_scope, Scope *o...@@ -4115,11 +5143,9 @@ static bool ir_gen_defers_for_block(IrBuilder *irb, Scope *inner_scope, Scope *o
4115 {5143 {
4116 AstNode *defer_expr_node = defer_node->data.defer.expr;5144 AstNode *defer_expr_node = defer_node->data.defer.expr;
4117 Scope *defer_expr_scope = defer_node->data.defer.expr_scope;5145 Scope *defer_expr_scope = defer_node->data.defer.expr_scope;
4118 IrInstruction *defer_expr_value = ir_gen_node(irb, defer_expr_node, defer_expr_scope);5146 IrInstSrc *defer_expr_value = ir_gen_node(irb, defer_expr_node, defer_expr_scope);
4119 if (defer_expr_value != irb->codegen->invalid_instruction) {5147 if (defer_expr_value != irb->codegen->invalid_inst_src) {
4120 if (defer_expr_value->value->type != nullptr &&5148 if (defer_expr_value->is_noreturn) {
4121 defer_expr_value->value->type->id == ZigTypeIdUnreachable)
4122 {
4123 is_noreturn = true;5149 is_noreturn = true;
4124 } else {5150 } else {
4125 ir_mark_gen(ir_build_check_statement_is_void(irb, defer_expr_scope, defer_expr_node,5151 ir_mark_gen(ir_build_check_statement_is_void(irb, defer_expr_scope, defer_expr_node,
...@@ -4151,13 +5177,17 @@ static bool ir_gen_defers_for_block(IrBuilder *irb, Scope *inner_scope, Scope *o...@@ -4151,13 +5177,17 @@ static bool ir_gen_defers_for_block(IrBuilder *irb, Scope *inner_scope, Scope *o
4151 return is_noreturn;5177 return is_noreturn;
4152}5178}
41535179
4154static void ir_set_cursor_at_end(IrBuilder *irb, IrBasicBlock *basic_block) {5180static void ir_set_cursor_at_end_gen(IrBuilderGen *irb, IrBasicBlockGen *basic_block) {
4155 assert(basic_block);5181 assert(basic_block);
5182 irb->current_basic_block = basic_block;
5183}
41565184
5185static void ir_set_cursor_at_end(IrBuilderSrc *irb, IrBasicBlockSrc *basic_block) {
5186 assert(basic_block);
4157 irb->current_basic_block = basic_block;5187 irb->current_basic_block = basic_block;
4158}5188}
41595189
4160static void ir_set_cursor_at_end_and_append_block(IrBuilder *irb, IrBasicBlock *basic_block) {5190static void ir_set_cursor_at_end_and_append_block(IrBuilderSrc *irb, IrBasicBlockSrc *basic_block) {
4161 basic_block->index = irb->exec->basic_block_list.length;5191 basic_block->index = irb->exec->basic_block_list.length;
4162 irb->exec->basic_block_list.append(basic_block);5192 irb->exec->basic_block_list.append(basic_block);
4163 ir_set_cursor_at_end(irb, basic_block);5193 ir_set_cursor_at_end(irb, basic_block);
...@@ -4187,7 +5217,7 @@ static ScopeDeferExpr *get_scope_defer_expr(Scope *scope) {...@@ -4187,7 +5217,7 @@ static ScopeDeferExpr *get_scope_defer_expr(Scope *scope) {
4187 return nullptr;5217 return nullptr;
4188}5218}
41895219
4190static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {5220static IrInstSrc *ir_gen_return(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
4191 assert(node->type == NodeTypeReturnExpr);5221 assert(node->type == NodeTypeReturnExpr);
41925222
4193 ScopeDeferExpr *scope_defer_expr = get_scope_defer_expr(scope);5223 ScopeDeferExpr *scope_defer_expr = get_scope_defer_expr(scope);
...@@ -4196,7 +5226,7 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,...@@ -4196,7 +5226,7 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
4196 add_node_error(irb->codegen, node, buf_sprintf("cannot return from defer expression"));5226 add_node_error(irb->codegen, node, buf_sprintf("cannot return from defer expression"));
4197 scope_defer_expr->reported_err = true;5227 scope_defer_expr->reported_err = true;
4198 }5228 }
4199 return irb->codegen->invalid_instruction;5229 return irb->codegen->invalid_inst_src;
4200 }5230 }
42015231
4202 Scope *outer_scope = irb->exec->begin_scope;5232 Scope *outer_scope = irb->exec->begin_scope;
...@@ -4209,15 +5239,15 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,...@@ -4209,15 +5239,15 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
4209 result_loc_ret->base.id = ResultLocIdReturn;5239 result_loc_ret->base.id = ResultLocIdReturn;
4210 ir_build_reset_result(irb, scope, node, &result_loc_ret->base);5240 ir_build_reset_result(irb, scope, node, &result_loc_ret->base);
42115241
4212 IrInstruction *return_value;5242 IrInstSrc *return_value;
4213 if (expr_node) {5243 if (expr_node) {
4214 // Temporarily set this so that if we return a type it gets the name of the function5244 // Temporarily set this so that if we return a type it gets the name of the function
4215 ZigFn *prev_name_fn = irb->exec->name_fn;5245 ZigFn *prev_name_fn = irb->exec->name_fn;
4216 irb->exec->name_fn = exec_fn_entry(irb->exec);5246 irb->exec->name_fn = exec_fn_entry(irb->exec);
4217 return_value = ir_gen_node_extra(irb, expr_node, scope, LValNone, &result_loc_ret->base);5247 return_value = ir_gen_node_extra(irb, expr_node, scope, LValNone, &result_loc_ret->base);
4218 irb->exec->name_fn = prev_name_fn;5248 irb->exec->name_fn = prev_name_fn;
4219 if (return_value == irb->codegen->invalid_instruction)5249 if (return_value == irb->codegen->invalid_inst_src)
4220 return irb->codegen->invalid_instruction;5250 return irb->codegen->invalid_inst_src;
4221 } else {5251 } else {
4222 return_value = ir_build_const_void(irb, scope, node);5252 return_value = ir_build_const_void(irb, scope, node);
4223 }5253 }
...@@ -4230,22 +5260,22 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,...@@ -4230,22 +5260,22 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
4230 if (!have_err_defers && !irb->codegen->have_err_ret_tracing) {5260 if (!have_err_defers && !irb->codegen->have_err_ret_tracing) {
4231 // only generate unconditional defers5261 // only generate unconditional defers
4232 ir_gen_defers_for_block(irb, scope, outer_scope, false);5262 ir_gen_defers_for_block(irb, scope, outer_scope, false);
4233 IrInstruction *result = ir_build_return(irb, scope, node, return_value);5263 IrInstSrc *result = ir_build_return_src(irb, scope, node, return_value);
4234 result_loc_ret->base.source_instruction = result;5264 result_loc_ret->base.source_instruction = result;
4235 return result;5265 return result;
4236 }5266 }
4237 bool should_inline = ir_should_inline(irb->exec, scope);5267 bool should_inline = ir_should_inline(irb->exec, scope);
42385268
4239 IrBasicBlock *err_block = ir_create_basic_block(irb, scope, "ErrRetErr");5269 IrBasicBlockSrc *err_block = ir_create_basic_block(irb, scope, "ErrRetErr");
4240 IrBasicBlock *ok_block = ir_create_basic_block(irb, scope, "ErrRetOk");5270 IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, scope, "ErrRetOk");
42415271
4242 if (!have_err_defers) {5272 if (!have_err_defers) {
4243 ir_gen_defers_for_block(irb, scope, outer_scope, false);5273 ir_gen_defers_for_block(irb, scope, outer_scope, false);
4244 }5274 }
42455275
4246 IrInstruction *is_err = ir_build_test_err_src(irb, scope, node, return_value, false, true);5276 IrInstSrc *is_err = ir_build_test_err_src(irb, scope, node, return_value, false, true);
42475277
4248 IrInstruction *is_comptime;5278 IrInstSrc *is_comptime;
4249 if (should_inline) {5279 if (should_inline) {
4250 is_comptime = ir_build_const_bool(irb, scope, node, should_inline);5280 is_comptime = ir_build_const_bool(irb, scope, node, should_inline);
4251 } else {5281 } else {
...@@ -4253,14 +5283,14 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,...@@ -4253,14 +5283,14 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
4253 }5283 }
42545284
4255 ir_mark_gen(ir_build_cond_br(irb, scope, node, is_err, err_block, ok_block, is_comptime));5285 ir_mark_gen(ir_build_cond_br(irb, scope, node, is_err, err_block, ok_block, is_comptime));
4256 IrBasicBlock *ret_stmt_block = ir_create_basic_block(irb, scope, "RetStmt");5286 IrBasicBlockSrc *ret_stmt_block = ir_create_basic_block(irb, scope, "RetStmt");
42575287
4258 ir_set_cursor_at_end_and_append_block(irb, err_block);5288 ir_set_cursor_at_end_and_append_block(irb, err_block);
4259 if (have_err_defers) {5289 if (have_err_defers) {
4260 ir_gen_defers_for_block(irb, scope, outer_scope, true);5290 ir_gen_defers_for_block(irb, scope, outer_scope, true);
4261 }5291 }
4262 if (irb->codegen->have_err_ret_tracing && !should_inline) {5292 if (irb->codegen->have_err_ret_tracing && !should_inline) {
4263 ir_build_save_err_ret_addr(irb, scope, node);5293 ir_build_save_err_ret_addr_src(irb, scope, node);
4264 }5294 }
4265 ir_build_br(irb, scope, node, ret_stmt_block, is_comptime);5295 ir_build_br(irb, scope, node, ret_stmt_block, is_comptime);
42665296
...@@ -4271,21 +5301,21 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,...@@ -4271,21 +5301,21 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
4271 ir_build_br(irb, scope, node, ret_stmt_block, is_comptime);5301 ir_build_br(irb, scope, node, ret_stmt_block, is_comptime);
42725302
4273 ir_set_cursor_at_end_and_append_block(irb, ret_stmt_block);5303 ir_set_cursor_at_end_and_append_block(irb, ret_stmt_block);
4274 IrInstruction *result = ir_build_return(irb, scope, node, return_value);5304 IrInstSrc *result = ir_build_return_src(irb, scope, node, return_value);
4275 result_loc_ret->base.source_instruction = result;5305 result_loc_ret->base.source_instruction = result;
4276 return result;5306 return result;
4277 }5307 }
4278 case ReturnKindError:5308 case ReturnKindError:
4279 {5309 {
4280 assert(expr_node);5310 assert(expr_node);
4281 IrInstruction *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);5311 IrInstSrc *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
4282 if (err_union_ptr == irb->codegen->invalid_instruction)5312 if (err_union_ptr == irb->codegen->invalid_inst_src)
4283 return irb->codegen->invalid_instruction;5313 return irb->codegen->invalid_inst_src;
4284 IrInstruction *is_err_val = ir_build_test_err_src(irb, scope, node, err_union_ptr, true, false);5314 IrInstSrc *is_err_val = ir_build_test_err_src(irb, scope, node, err_union_ptr, true, false);
42855315
4286 IrBasicBlock *return_block = ir_create_basic_block(irb, scope, "ErrRetReturn");5316 IrBasicBlockSrc *return_block = ir_create_basic_block(irb, scope, "ErrRetReturn");
4287 IrBasicBlock *continue_block = ir_create_basic_block(irb, scope, "ErrRetContinue");5317 IrBasicBlockSrc *continue_block = ir_create_basic_block(irb, scope, "ErrRetContinue");
4288 IrInstruction *is_comptime;5318 IrInstSrc *is_comptime;
4289 bool should_inline = ir_should_inline(irb->exec, scope);5319 bool should_inline = ir_should_inline(irb->exec, scope);
4290 if (should_inline) {5320 if (should_inline) {
4291 is_comptime = ir_build_const_bool(irb, scope, node, true);5321 is_comptime = ir_build_const_bool(irb, scope, node, true);
...@@ -4295,10 +5325,10 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,...@@ -4295,10 +5325,10 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
4295 ir_mark_gen(ir_build_cond_br(irb, scope, node, is_err_val, return_block, continue_block, is_comptime));5325 ir_mark_gen(ir_build_cond_br(irb, scope, node, is_err_val, return_block, continue_block, is_comptime));
42965326
4297 ir_set_cursor_at_end_and_append_block(irb, return_block);5327 ir_set_cursor_at_end_and_append_block(irb, return_block);
4298 IrInstruction *err_val_ptr = ir_build_unwrap_err_code(irb, scope, node, err_union_ptr);5328 IrInstSrc *err_val_ptr = ir_build_unwrap_err_code_src(irb, scope, node, err_union_ptr);
4299 IrInstruction *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);5329 IrInstSrc *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);
4300 ir_mark_gen(ir_build_add_implicit_return_type(irb, scope, node, err_val, nullptr));5330 ir_mark_gen(ir_build_add_implicit_return_type(irb, scope, node, err_val, nullptr));
4301 IrInstructionSpillBegin *spill_begin = ir_build_spill_begin(irb, scope, node, err_val,5331 IrInstSrcSpillBegin *spill_begin = ir_build_spill_begin_src(irb, scope, node, err_val,
4302 SpillIdRetErrCode);5332 SpillIdRetErrCode);
4303 ResultLocReturn *result_loc_ret = allocate<ResultLocReturn>(1, "ResultLocReturn");5333 ResultLocReturn *result_loc_ret = allocate<ResultLocReturn>(1, "ResultLocReturn");
4304 result_loc_ret->base.id = ResultLocIdReturn;5334 result_loc_ret->base.id = ResultLocIdReturn;
...@@ -4306,15 +5336,15 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,...@@ -4306,15 +5336,15 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
4306 ir_build_end_expr(irb, scope, node, err_val, &result_loc_ret->base);5336 ir_build_end_expr(irb, scope, node, err_val, &result_loc_ret->base);
4307 if (!ir_gen_defers_for_block(irb, scope, outer_scope, true)) {5337 if (!ir_gen_defers_for_block(irb, scope, outer_scope, true)) {
4308 if (irb->codegen->have_err_ret_tracing && !should_inline) {5338 if (irb->codegen->have_err_ret_tracing && !should_inline) {
4309 ir_build_save_err_ret_addr(irb, scope, node);5339 ir_build_save_err_ret_addr_src(irb, scope, node);
4310 }5340 }
4311 err_val = ir_build_spill_end(irb, scope, node, spill_begin);5341 err_val = ir_build_spill_end_src(irb, scope, node, spill_begin);
4312 IrInstruction *ret_inst = ir_build_return(irb, scope, node, err_val);5342 IrInstSrc *ret_inst = ir_build_return_src(irb, scope, node, err_val);
4313 result_loc_ret->base.source_instruction = ret_inst;5343 result_loc_ret->base.source_instruction = ret_inst;
4314 }5344 }
43155345
4316 ir_set_cursor_at_end_and_append_block(irb, continue_block);5346 ir_set_cursor_at_end_and_append_block(irb, continue_block);
4317 IrInstruction *unwrapped_ptr = ir_build_unwrap_err_payload(irb, scope, node, err_union_ptr, false, false);5347 IrInstSrc *unwrapped_ptr = ir_build_unwrap_err_payload_src(irb, scope, node, err_union_ptr, false, false);
4318 if (lval == LValPtr)5348 if (lval == LValPtr)
4319 return unwrapped_ptr;5349 return unwrapped_ptr;
4320 else5350 else
...@@ -4325,7 +5355,7 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,...@@ -4325,7 +5355,7 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
4325}5355}
43265356
4327static ZigVar *create_local_var(CodeGen *codegen, AstNode *node, Scope *parent_scope,5357static ZigVar *create_local_var(CodeGen *codegen, AstNode *node, Scope *parent_scope,
4328 Buf *name, bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstruction *is_comptime,5358 Buf *name, bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstSrc *is_comptime,
4329 bool skip_name_check)5359 bool skip_name_check)
4330{5360{
4331 ZigVar *variable_entry = allocate<ZigVar>(1, "ZigVar");5361 ZigVar *variable_entry = allocate<ZigVar>(1, "ZigVar");
...@@ -4336,7 +5366,7 @@ static ZigVar *create_local_var(CodeGen *codegen, AstNode *node, Scope *parent_s...@@ -4336,7 +5366,7 @@ static ZigVar *create_local_var(CodeGen *codegen, AstNode *node, Scope *parent_s
4336 variable_entry->const_value = create_const_vals(1);5366 variable_entry->const_value = create_const_vals(1);
43375367
4338 if (is_comptime != nullptr) {5368 if (is_comptime != nullptr) {
4339 is_comptime->ref_count += 1;5369 is_comptime->base.ref_count += 1;
4340 }5370 }
43415371
4342 if (name) {5372 if (name) {
...@@ -4386,8 +5416,8 @@ static ZigVar *create_local_var(CodeGen *codegen, AstNode *node, Scope *parent_s...@@ -4386,8 +5416,8 @@ static ZigVar *create_local_var(CodeGen *codegen, AstNode *node, Scope *parent_s
43865416
4387// Set name to nullptr to make the variable anonymous (not visible to programmer).5417// Set name to nullptr to make the variable anonymous (not visible to programmer).
4388// After you call this function var->child_scope has the variable in scope5418// After you call this function var->child_scope has the variable in scope
4389static ZigVar *ir_create_var(IrBuilder *irb, AstNode *node, Scope *scope, Buf *name,5419static ZigVar *ir_create_var(IrBuilderSrc *irb, AstNode *node, Scope *scope, Buf *name,
4390 bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstruction *is_comptime)5420 bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstSrc *is_comptime)
4391{5421{
4392 bool is_underscored = name ? buf_eql_str(name, "_") : false;5422 bool is_underscored = name ? buf_eql_str(name, "_") : false;
4393 ZigVar *var = create_local_var(irb->codegen, node, scope,5423 ZigVar *var = create_local_var(irb->codegen, node, scope,
...@@ -4409,13 +5439,13 @@ static ResultLocPeer *create_peer_result(ResultLocPeerParent *peer_parent) {...@@ -4409,13 +5439,13 @@ static ResultLocPeer *create_peer_result(ResultLocPeerParent *peer_parent) {
4409 return result;5439 return result;
4410}5440}
44115441
4412static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode *block_node, LVal lval,5442static IrInstSrc *ir_gen_block(IrBuilderSrc *irb, Scope *parent_scope, AstNode *block_node, LVal lval,
4413 ResultLoc *result_loc)5443 ResultLoc *result_loc)
4414{5444{
4415 assert(block_node->type == NodeTypeBlock);5445 assert(block_node->type == NodeTypeBlock);
44165446
4417 ZigList<IrInstruction *> incoming_values = {0};5447 ZigList<IrInstSrc *> incoming_values = {0};
4418 ZigList<IrBasicBlock *> incoming_blocks = {0};5448 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
44195449
4420 ScopeBlock *scope_block = create_block_scope(irb->codegen, block_node, parent_scope);5450 ScopeBlock *scope_block = create_block_scope(irb->codegen, block_node, parent_scope);
44215451
...@@ -4451,11 +5481,11 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode...@@ -4451,11 +5481,11 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
4451 }5481 }
44525482
4453 bool is_continuation_unreachable = false;5483 bool is_continuation_unreachable = false;
4454 IrInstruction *noreturn_return_value = nullptr;5484 IrInstSrc *noreturn_return_value = nullptr;
4455 for (size_t i = 0; i < block_node->data.block.statements.length; i += 1) {5485 for (size_t i = 0; i < block_node->data.block.statements.length; i += 1) {
4456 AstNode *statement_node = block_node->data.block.statements.at(i);5486 AstNode *statement_node = block_node->data.block.statements.at(i);
44575487
4458 IrInstruction *statement_value = ir_gen_node(irb, statement_node, child_scope);5488 IrInstSrc *statement_value = ir_gen_node(irb, statement_node, child_scope);
4459 is_continuation_unreachable = instr_is_unreachable(statement_value);5489 is_continuation_unreachable = instr_is_unreachable(statement_value);
4460 if (is_continuation_unreachable) {5490 if (is_continuation_unreachable) {
4461 // keep the last noreturn statement value around in case we need to return it5491 // keep the last noreturn statement value around in case we need to return it
...@@ -4463,15 +5493,15 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode...@@ -4463,15 +5493,15 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
4463 }5493 }
4464 // This logic must be kept in sync with5494 // This logic must be kept in sync with
4465 // [STMT_EXPR_TEST_THING] <--- (search this token)5495 // [STMT_EXPR_TEST_THING] <--- (search this token)
4466 if (statement_node->type == NodeTypeDefer && statement_value != irb->codegen->invalid_instruction) {5496 if (statement_node->type == NodeTypeDefer && statement_value != irb->codegen->invalid_inst_src) {
4467 // defer starts a new scope5497 // defer starts a new scope
4468 child_scope = statement_node->data.defer.child_scope;5498 child_scope = statement_node->data.defer.child_scope;
4469 assert(child_scope);5499 assert(child_scope);
4470 } else if (statement_value->id == IrInstructionIdDeclVarSrc) {5500 } else if (statement_value->id == IrInstSrcIdDeclVar) {
4471 // variable declarations start a new scope5501 // variable declarations start a new scope
4472 IrInstructionDeclVarSrc *decl_var_instruction = (IrInstructionDeclVarSrc *)statement_value;5502 IrInstSrcDeclVar *decl_var_instruction = (IrInstSrcDeclVar *)statement_value;
4473 child_scope = decl_var_instruction->var->child_scope;5503 child_scope = decl_var_instruction->var->child_scope;
4474 } else if (statement_value != irb->codegen->invalid_instruction && !is_continuation_unreachable) {5504 } else if (statement_value != irb->codegen->invalid_inst_src && !is_continuation_unreachable) {
4475 // this statement's value must be void5505 // this statement's value must be void
4476 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, statement_node, statement_value));5506 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, statement_node, statement_value));
4477 }5507 }
...@@ -4487,12 +5517,12 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode...@@ -4487,12 +5517,12 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
4487 scope_block->peer_parent->peers.last()->next_bb = scope_block->end_block;5517 scope_block->peer_parent->peers.last()->next_bb = scope_block->end_block;
4488 }5518 }
4489 ir_set_cursor_at_end_and_append_block(irb, scope_block->end_block);5519 ir_set_cursor_at_end_and_append_block(irb, scope_block->end_block);
4490 IrInstruction *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,5520 IrInstSrc *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,
4491 incoming_blocks.items, incoming_values.items, scope_block->peer_parent);5521 incoming_blocks.items, incoming_values.items, scope_block->peer_parent);
4492 return ir_expr_wrap(irb, parent_scope, phi, result_loc);5522 return ir_expr_wrap(irb, parent_scope, phi, result_loc);
4493 } else {5523 } else {
4494 incoming_blocks.append(irb->current_basic_block);5524 incoming_blocks.append(irb->current_basic_block);
4495 IrInstruction *else_expr_result = ir_mark_gen(ir_build_const_void(irb, parent_scope, block_node));5525 IrInstSrc *else_expr_result = ir_mark_gen(ir_build_const_void(irb, parent_scope, block_node));
44965526
4497 if (scope_block->peer_parent != nullptr) {5527 if (scope_block->peer_parent != nullptr) {
4498 ResultLocPeer *peer_result = create_peer_result(scope_block->peer_parent);5528 ResultLocPeer *peer_result = create_peer_result(scope_block->peer_parent);
...@@ -4512,15 +5542,15 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode...@@ -4512,15 +5542,15 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
4512 ir_gen_defers_for_block(irb, child_scope, outer_block_scope, false);5542 ir_gen_defers_for_block(irb, child_scope, outer_block_scope, false);
4513 }5543 }
45145544
4515 IrInstruction *result;5545 IrInstSrc *result;
4516 if (block_node->data.block.name != nullptr) {5546 if (block_node->data.block.name != nullptr) {
4517 ir_mark_gen(ir_build_br(irb, parent_scope, block_node, scope_block->end_block, scope_block->is_comptime));5547 ir_mark_gen(ir_build_br(irb, parent_scope, block_node, scope_block->end_block, scope_block->is_comptime));
4518 ir_set_cursor_at_end_and_append_block(irb, scope_block->end_block);5548 ir_set_cursor_at_end_and_append_block(irb, scope_block->end_block);
4519 IrInstruction *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,5549 IrInstSrc *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,
4520 incoming_blocks.items, incoming_values.items, scope_block->peer_parent);5550 incoming_blocks.items, incoming_values.items, scope_block->peer_parent);
4521 result = ir_expr_wrap(irb, parent_scope, phi, result_loc);5551 result = ir_expr_wrap(irb, parent_scope, phi, result_loc);
4522 } else {5552 } else {
4523 IrInstruction *void_inst = ir_mark_gen(ir_build_const_void(irb, child_scope, block_node));5553 IrInstSrc *void_inst = ir_mark_gen(ir_build_const_void(irb, child_scope, block_node));
4524 result = ir_lval_wrap(irb, parent_scope, void_inst, lval, result_loc);5554 result = ir_lval_wrap(irb, parent_scope, void_inst, lval, result_loc);
4525 }5555 }
4526 if (!is_return_from_fn)5556 if (!is_return_from_fn)
...@@ -4535,30 +5565,30 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode...@@ -4535,30 +5565,30 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
4535 ir_build_reset_result(irb, parent_scope, block_node, &result_loc_ret->base);5565 ir_build_reset_result(irb, parent_scope, block_node, &result_loc_ret->base);
4536 ir_mark_gen(ir_build_end_expr(irb, parent_scope, block_node, result, &result_loc_ret->base));5566 ir_mark_gen(ir_build_end_expr(irb, parent_scope, block_node, result, &result_loc_ret->base));
4537 ir_gen_defers_for_block(irb, child_scope, outer_block_scope, false);5567 ir_gen_defers_for_block(irb, child_scope, outer_block_scope, false);
4538 return ir_mark_gen(ir_build_return(irb, child_scope, result->source_node, result));5568 return ir_mark_gen(ir_build_return_src(irb, child_scope, result->base.source_node, result));
4539}5569}
45405570
4541static IrInstruction *ir_gen_bin_op_id(IrBuilder *irb, Scope *scope, AstNode *node, IrBinOp op_id) {5571static IrInstSrc *ir_gen_bin_op_id(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrBinOp op_id) {
4542 Scope *inner_scope = scope;5572 Scope *inner_scope = scope;
4543 if (op_id == IrBinOpArrayCat || op_id == IrBinOpArrayMult) {5573 if (op_id == IrBinOpArrayCat || op_id == IrBinOpArrayMult) {
4544 inner_scope = create_comptime_scope(irb->codegen, node, scope);5574 inner_scope = create_comptime_scope(irb->codegen, node, scope);
4545 }5575 }
45465576
4547 IrInstruction *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, inner_scope);5577 IrInstSrc *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, inner_scope);
4548 IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, inner_scope);5578 IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, inner_scope);
45495579
4550 if (op1 == irb->codegen->invalid_instruction || op2 == irb->codegen->invalid_instruction)5580 if (op1 == irb->codegen->invalid_inst_src || op2 == irb->codegen->invalid_inst_src)
4551 return irb->codegen->invalid_instruction;5581 return irb->codegen->invalid_inst_src;
45525582
4553 return ir_build_bin_op(irb, scope, node, op_id, op1, op2, true);5583 return ir_build_bin_op(irb, scope, node, op_id, op1, op2, true);
4554}5584}
45555585
4556static IrInstruction *ir_gen_merge_err_sets(IrBuilder *irb, Scope *scope, AstNode *node) {5586static IrInstSrc *ir_gen_merge_err_sets(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
4557 IrInstruction *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);5587 IrInstSrc *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
4558 IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);5588 IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
45595589
4560 if (op1 == irb->codegen->invalid_instruction || op2 == irb->codegen->invalid_instruction)5590 if (op1 == irb->codegen->invalid_inst_src || op2 == irb->codegen->invalid_inst_src)
4561 return irb->codegen->invalid_instruction;5591 return irb->codegen->invalid_inst_src;
45625592
4563 // TODO only pass type_name when the || operator is the top level AST node in the var decl expr5593 // TODO only pass type_name when the || operator is the top level AST node in the var decl expr
4564 Buf bare_name = BUF_INIT;5594 Buf bare_name = BUF_INIT;
...@@ -4567,10 +5597,10 @@ static IrInstruction *ir_gen_merge_err_sets(IrBuilder *irb, Scope *scope, AstNod...@@ -4567,10 +5597,10 @@ static IrInstruction *ir_gen_merge_err_sets(IrBuilder *irb, Scope *scope, AstNod
4567 return ir_build_merge_err_sets(irb, scope, node, op1, op2, type_name);5597 return ir_build_merge_err_sets(irb, scope, node, op1, op2, type_name);
4568}5598}
45695599
4570static IrInstruction *ir_gen_assign(IrBuilder *irb, Scope *scope, AstNode *node) {5600static IrInstSrc *ir_gen_assign(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
4571 IrInstruction *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);5601 IrInstSrc *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
4572 if (lvalue == irb->codegen->invalid_instruction)5602 if (lvalue == irb->codegen->invalid_inst_src)
4573 return irb->codegen->invalid_instruction;5603 return irb->codegen->invalid_inst_src;
45745604
4575 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1, "ResultLocInstruction");5605 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1, "ResultLocInstruction");
4576 result_loc_inst->base.id = ResultLocIdInstruction;5606 result_loc_inst->base.id = ResultLocIdInstruction;
...@@ -4578,49 +5608,49 @@ static IrInstruction *ir_gen_assign(IrBuilder *irb, Scope *scope, AstNode *node)...@@ -4578,49 +5608,49 @@ static IrInstruction *ir_gen_assign(IrBuilder *irb, Scope *scope, AstNode *node)
4578 ir_ref_instruction(lvalue, irb->current_basic_block);5608 ir_ref_instruction(lvalue, irb->current_basic_block);
4579 ir_build_reset_result(irb, scope, node, &result_loc_inst->base);5609 ir_build_reset_result(irb, scope, node, &result_loc_inst->base);
45805610
4581 IrInstruction *rvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op2, scope, LValNone,5611 IrInstSrc *rvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op2, scope, LValNone,
4582 &result_loc_inst->base);5612 &result_loc_inst->base);
4583 if (rvalue == irb->codegen->invalid_instruction)5613 if (rvalue == irb->codegen->invalid_inst_src)
4584 return irb->codegen->invalid_instruction;5614 return irb->codegen->invalid_inst_src;
45855615
4586 return ir_build_const_void(irb, scope, node);5616 return ir_build_const_void(irb, scope, node);
4587}5617}
45885618
4589static IrInstruction *ir_gen_assign_merge_err_sets(IrBuilder *irb, Scope *scope, AstNode *node) {5619static IrInstSrc *ir_gen_assign_merge_err_sets(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
4590 IrInstruction *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);5620 IrInstSrc *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
4591 if (lvalue == irb->codegen->invalid_instruction)5621 if (lvalue == irb->codegen->invalid_inst_src)
4592 return lvalue;5622 return lvalue;
4593 IrInstruction *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);5623 IrInstSrc *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);
4594 IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);5624 IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
4595 if (op2 == irb->codegen->invalid_instruction)5625 if (op2 == irb->codegen->invalid_inst_src)
4596 return op2;5626 return op2;
4597 IrInstruction *result = ir_build_merge_err_sets(irb, scope, node, op1, op2, nullptr);5627 IrInstSrc *result = ir_build_merge_err_sets(irb, scope, node, op1, op2, nullptr);
4598 ir_build_store_ptr(irb, scope, node, lvalue, result);5628 ir_build_store_ptr(irb, scope, node, lvalue, result);
4599 return ir_build_const_void(irb, scope, node);5629 return ir_build_const_void(irb, scope, node);
4600}5630}
46015631
4602static IrInstruction *ir_gen_assign_op(IrBuilder *irb, Scope *scope, AstNode *node, IrBinOp op_id) {5632static IrInstSrc *ir_gen_assign_op(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrBinOp op_id) {
4603 IrInstruction *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);5633 IrInstSrc *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
4604 if (lvalue == irb->codegen->invalid_instruction)5634 if (lvalue == irb->codegen->invalid_inst_src)
4605 return lvalue;5635 return lvalue;
4606 IrInstruction *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);5636 IrInstSrc *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);
4607 IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);5637 IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
4608 if (op2 == irb->codegen->invalid_instruction)5638 if (op2 == irb->codegen->invalid_inst_src)
4609 return op2;5639 return op2;
4610 IrInstruction *result = ir_build_bin_op(irb, scope, node, op_id, op1, op2, true);5640 IrInstSrc *result = ir_build_bin_op(irb, scope, node, op_id, op1, op2, true);
4611 ir_build_store_ptr(irb, scope, node, lvalue, result);5641 ir_build_store_ptr(irb, scope, node, lvalue, result);
4612 return ir_build_const_void(irb, scope, node);5642 return ir_build_const_void(irb, scope, node);
4613}5643}
46145644
4615static IrInstruction *ir_gen_bool_or(IrBuilder *irb, Scope *scope, AstNode *node) {5645static IrInstSrc *ir_gen_bool_or(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
4616 assert(node->type == NodeTypeBinOpExpr);5646 assert(node->type == NodeTypeBinOpExpr);
46175647
4618 IrInstruction *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);5648 IrInstSrc *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
4619 if (val1 == irb->codegen->invalid_instruction)5649 if (val1 == irb->codegen->invalid_inst_src)
4620 return irb->codegen->invalid_instruction;5650 return irb->codegen->invalid_inst_src;
4621 IrBasicBlock *post_val1_block = irb->current_basic_block;5651 IrBasicBlockSrc *post_val1_block = irb->current_basic_block;
46225652
4623 IrInstruction *is_comptime;5653 IrInstSrc *is_comptime;
4624 if (ir_should_inline(irb->exec, scope)) {5654 if (ir_should_inline(irb->exec, scope)) {
4625 is_comptime = ir_build_const_bool(irb, scope, node, true);5655 is_comptime = ir_build_const_bool(irb, scope, node, true);
4626 } else {5656 } else {
...@@ -4628,41 +5658,41 @@ static IrInstruction *ir_gen_bool_or(IrBuilder *irb, Scope *scope, AstNode *node...@@ -4628,41 +5658,41 @@ static IrInstruction *ir_gen_bool_or(IrBuilder *irb, Scope *scope, AstNode *node
4628 }5658 }
46295659
4630 // block for when val1 == false5660 // block for when val1 == false
4631 IrBasicBlock *false_block = ir_create_basic_block(irb, scope, "BoolOrFalse");5661 IrBasicBlockSrc *false_block = ir_create_basic_block(irb, scope, "BoolOrFalse");
4632 // block for when val1 == true (don't even evaluate the second part)5662 // block for when val1 == true (don't even evaluate the second part)
4633 IrBasicBlock *true_block = ir_create_basic_block(irb, scope, "BoolOrTrue");5663 IrBasicBlockSrc *true_block = ir_create_basic_block(irb, scope, "BoolOrTrue");
46345664
4635 ir_build_cond_br(irb, scope, node, val1, true_block, false_block, is_comptime);5665 ir_build_cond_br(irb, scope, node, val1, true_block, false_block, is_comptime);
46365666
4637 ir_set_cursor_at_end_and_append_block(irb, false_block);5667 ir_set_cursor_at_end_and_append_block(irb, false_block);
4638 IrInstruction *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);5668 IrInstSrc *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
4639 if (val2 == irb->codegen->invalid_instruction)5669 if (val2 == irb->codegen->invalid_inst_src)
4640 return irb->codegen->invalid_instruction;5670 return irb->codegen->invalid_inst_src;
4641 IrBasicBlock *post_val2_block = irb->current_basic_block;5671 IrBasicBlockSrc *post_val2_block = irb->current_basic_block;
46425672
4643 ir_build_br(irb, scope, node, true_block, is_comptime);5673 ir_build_br(irb, scope, node, true_block, is_comptime);
46445674
4645 ir_set_cursor_at_end_and_append_block(irb, true_block);5675 ir_set_cursor_at_end_and_append_block(irb, true_block);
46465676
4647 IrInstruction **incoming_values = allocate<IrInstruction *>(2, "IrInstruction *");5677 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2, "IrInstSrc *");
4648 incoming_values[0] = val1;5678 incoming_values[0] = val1;
4649 incoming_values[1] = val2;5679 incoming_values[1] = val2;
4650 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");5680 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
4651 incoming_blocks[0] = post_val1_block;5681 incoming_blocks[0] = post_val1_block;
4652 incoming_blocks[1] = post_val2_block;5682 incoming_blocks[1] = post_val2_block;
46535683
4654 return ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, nullptr);5684 return ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, nullptr);
4655}5685}
46565686
4657static IrInstruction *ir_gen_bool_and(IrBuilder *irb, Scope *scope, AstNode *node) {5687static IrInstSrc *ir_gen_bool_and(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
4658 assert(node->type == NodeTypeBinOpExpr);5688 assert(node->type == NodeTypeBinOpExpr);
46595689
4660 IrInstruction *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);5690 IrInstSrc *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
4661 if (val1 == irb->codegen->invalid_instruction)5691 if (val1 == irb->codegen->invalid_inst_src)
4662 return irb->codegen->invalid_instruction;5692 return irb->codegen->invalid_inst_src;
4663 IrBasicBlock *post_val1_block = irb->current_basic_block;5693 IrBasicBlockSrc *post_val1_block = irb->current_basic_block;
46645694
4665 IrInstruction *is_comptime;5695 IrInstSrc *is_comptime;
4666 if (ir_should_inline(irb->exec, scope)) {5696 if (ir_should_inline(irb->exec, scope)) {
4667 is_comptime = ir_build_const_bool(irb, scope, node, true);5697 is_comptime = ir_build_const_bool(irb, scope, node, true);
4668 } else {5698 } else {
...@@ -4670,34 +5700,34 @@ static IrInstruction *ir_gen_bool_and(IrBuilder *irb, Scope *scope, AstNode *nod...@@ -4670,34 +5700,34 @@ static IrInstruction *ir_gen_bool_and(IrBuilder *irb, Scope *scope, AstNode *nod
4670 }5700 }
46715701
4672 // block for when val1 == true5702 // block for when val1 == true
4673 IrBasicBlock *true_block = ir_create_basic_block(irb, scope, "BoolAndTrue");5703 IrBasicBlockSrc *true_block = ir_create_basic_block(irb, scope, "BoolAndTrue");
4674 // block for when val1 == false (don't even evaluate the second part)5704 // block for when val1 == false (don't even evaluate the second part)
4675 IrBasicBlock *false_block = ir_create_basic_block(irb, scope, "BoolAndFalse");5705 IrBasicBlockSrc *false_block = ir_create_basic_block(irb, scope, "BoolAndFalse");
46765706
4677 ir_build_cond_br(irb, scope, node, val1, true_block, false_block, is_comptime);5707 ir_build_cond_br(irb, scope, node, val1, true_block, false_block, is_comptime);
46785708
4679 ir_set_cursor_at_end_and_append_block(irb, true_block);5709 ir_set_cursor_at_end_and_append_block(irb, true_block);
4680 IrInstruction *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);5710 IrInstSrc *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
4681 if (val2 == irb->codegen->invalid_instruction)5711 if (val2 == irb->codegen->invalid_inst_src)
4682 return irb->codegen->invalid_instruction;5712 return irb->codegen->invalid_inst_src;
4683 IrBasicBlock *post_val2_block = irb->current_basic_block;5713 IrBasicBlockSrc *post_val2_block = irb->current_basic_block;
46845714
4685 ir_build_br(irb, scope, node, false_block, is_comptime);5715 ir_build_br(irb, scope, node, false_block, is_comptime);
46865716
4687 ir_set_cursor_at_end_and_append_block(irb, false_block);5717 ir_set_cursor_at_end_and_append_block(irb, false_block);
46885718
4689 IrInstruction **incoming_values = allocate<IrInstruction *>(2);5719 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
4690 incoming_values[0] = val1;5720 incoming_values[0] = val1;
4691 incoming_values[1] = val2;5721 incoming_values[1] = val2;
4692 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");5722 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
4693 incoming_blocks[0] = post_val1_block;5723 incoming_blocks[0] = post_val1_block;
4694 incoming_blocks[1] = post_val2_block;5724 incoming_blocks[1] = post_val2_block;
46955725
4696 return ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, nullptr);5726 return ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, nullptr);
4697}5727}
46985728
4699static ResultLocPeerParent *ir_build_result_peers(IrBuilder *irb, IrInstruction *cond_br_inst,5729static ResultLocPeerParent *ir_build_result_peers(IrBuilderSrc *irb, IrInstSrc *cond_br_inst,
4700 IrBasicBlock *end_block, ResultLoc *parent, IrInstruction *is_comptime)5730 IrBasicBlockSrc *end_block, ResultLoc *parent, IrInstSrc *is_comptime)
4701{5731{
4702 ResultLocPeerParent *peer_parent = allocate<ResultLocPeerParent>(1);5732 ResultLocPeerParent *peer_parent = allocate<ResultLocPeerParent>(1);
4703 peer_parent->base.id = ResultLocIdPeerParent;5733 peer_parent->base.id = ResultLocIdPeerParent;
...@@ -4707,17 +5737,17 @@ static ResultLocPeerParent *ir_build_result_peers(IrBuilder *irb, IrInstruction...@@ -4707,17 +5737,17 @@ static ResultLocPeerParent *ir_build_result_peers(IrBuilder *irb, IrInstruction
4707 peer_parent->is_comptime = is_comptime;5737 peer_parent->is_comptime = is_comptime;
4708 peer_parent->parent = parent;5738 peer_parent->parent = parent;
47095739
4710 IrInstruction *popped_inst = irb->current_basic_block->instruction_list.pop();5740 IrInstSrc *popped_inst = irb->current_basic_block->instruction_list.pop();
4711 ir_assert(popped_inst == cond_br_inst, cond_br_inst);5741 ir_assert(popped_inst == cond_br_inst, &cond_br_inst->base);
47125742
4713 ir_build_reset_result(irb, cond_br_inst->scope, cond_br_inst->source_node, &peer_parent->base);5743 ir_build_reset_result(irb, cond_br_inst->base.scope, cond_br_inst->base.source_node, &peer_parent->base);
4714 irb->current_basic_block->instruction_list.append(popped_inst);5744 irb->current_basic_block->instruction_list.append(popped_inst);
47155745
4716 return peer_parent;5746 return peer_parent;
4717}5747}
47185748
4719static ResultLocPeerParent *ir_build_binary_result_peers(IrBuilder *irb, IrInstruction *cond_br_inst,5749static ResultLocPeerParent *ir_build_binary_result_peers(IrBuilderSrc *irb, IrInstSrc *cond_br_inst,
4720 IrBasicBlock *else_block, IrBasicBlock *end_block, ResultLoc *parent, IrInstruction *is_comptime)5750 IrBasicBlockSrc *else_block, IrBasicBlockSrc *end_block, ResultLoc *parent, IrInstSrc *is_comptime)
4721{5751{
4722 ResultLocPeerParent *peer_parent = ir_build_result_peers(irb, cond_br_inst, end_block, parent, is_comptime);5752 ResultLocPeerParent *peer_parent = ir_build_result_peers(irb, cond_br_inst, end_block, parent, is_comptime);
47235753
...@@ -4730,7 +5760,7 @@ static ResultLocPeerParent *ir_build_binary_result_peers(IrBuilder *irb, IrInstr...@@ -4730,7 +5760,7 @@ static ResultLocPeerParent *ir_build_binary_result_peers(IrBuilder *irb, IrInstr
4730 return peer_parent;5760 return peer_parent;
4731}5761}
47325762
4733static IrInstruction *ir_gen_orelse(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval,5763static IrInstSrc *ir_gen_orelse(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval,
4734 ResultLoc *result_loc)5764 ResultLoc *result_loc)
4735{5765{
4736 assert(node->type == NodeTypeBinOpExpr);5766 assert(node->type == NodeTypeBinOpExpr);
...@@ -4738,73 +5768,73 @@ static IrInstruction *ir_gen_orelse(IrBuilder *irb, Scope *parent_scope, AstNode...@@ -4738,73 +5768,73 @@ static IrInstruction *ir_gen_orelse(IrBuilder *irb, Scope *parent_scope, AstNode
4738 AstNode *op1_node = node->data.bin_op_expr.op1;5768 AstNode *op1_node = node->data.bin_op_expr.op1;
4739 AstNode *op2_node = node->data.bin_op_expr.op2;5769 AstNode *op2_node = node->data.bin_op_expr.op2;
47405770
4741 IrInstruction *maybe_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);5771 IrInstSrc *maybe_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);
4742 if (maybe_ptr == irb->codegen->invalid_instruction)5772 if (maybe_ptr == irb->codegen->invalid_inst_src)
4743 return irb->codegen->invalid_instruction;5773 return irb->codegen->invalid_inst_src;
47445774
4745 IrInstruction *maybe_val = ir_build_load_ptr(irb, parent_scope, node, maybe_ptr);5775 IrInstSrc *maybe_val = ir_build_load_ptr(irb, parent_scope, node, maybe_ptr);
4746 IrInstruction *is_non_null = ir_build_test_nonnull(irb, parent_scope, node, maybe_val);5776 IrInstSrc *is_non_null = ir_build_test_non_null_src(irb, parent_scope, node, maybe_val);
47475777
4748 IrInstruction *is_comptime;5778 IrInstSrc *is_comptime;
4749 if (ir_should_inline(irb->exec, parent_scope)) {5779 if (ir_should_inline(irb->exec, parent_scope)) {
4750 is_comptime = ir_build_const_bool(irb, parent_scope, node, true);5780 is_comptime = ir_build_const_bool(irb, parent_scope, node, true);
4751 } else {5781 } else {
4752 is_comptime = ir_build_test_comptime(irb, parent_scope, node, is_non_null);5782 is_comptime = ir_build_test_comptime(irb, parent_scope, node, is_non_null);
4753 }5783 }
47545784
4755 IrBasicBlock *ok_block = ir_create_basic_block(irb, parent_scope, "OptionalNonNull");5785 IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, parent_scope, "OptionalNonNull");
4756 IrBasicBlock *null_block = ir_create_basic_block(irb, parent_scope, "OptionalNull");5786 IrBasicBlockSrc *null_block = ir_create_basic_block(irb, parent_scope, "OptionalNull");
4757 IrBasicBlock *end_block = ir_create_basic_block(irb, parent_scope, "OptionalEnd");5787 IrBasicBlockSrc *end_block = ir_create_basic_block(irb, parent_scope, "OptionalEnd");
4758 IrInstruction *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_non_null, ok_block, null_block, is_comptime);5788 IrInstSrc *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_non_null, ok_block, null_block, is_comptime);
47595789
4760 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, ok_block, end_block,5790 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, ok_block, end_block,
4761 result_loc, is_comptime);5791 result_loc, is_comptime);
47625792
4763 ir_set_cursor_at_end_and_append_block(irb, null_block);5793 ir_set_cursor_at_end_and_append_block(irb, null_block);
4764 IrInstruction *null_result = ir_gen_node_extra(irb, op2_node, parent_scope, LValNone,5794 IrInstSrc *null_result = ir_gen_node_extra(irb, op2_node, parent_scope, LValNone,
4765 &peer_parent->peers.at(0)->base);5795 &peer_parent->peers.at(0)->base);
4766 if (null_result == irb->codegen->invalid_instruction)5796 if (null_result == irb->codegen->invalid_inst_src)
4767 return irb->codegen->invalid_instruction;5797 return irb->codegen->invalid_inst_src;
4768 IrBasicBlock *after_null_block = irb->current_basic_block;5798 IrBasicBlockSrc *after_null_block = irb->current_basic_block;
4769 if (!instr_is_unreachable(null_result))5799 if (!instr_is_unreachable(null_result))
4770 ir_mark_gen(ir_build_br(irb, parent_scope, node, end_block, is_comptime));5800 ir_mark_gen(ir_build_br(irb, parent_scope, node, end_block, is_comptime));
47715801
4772 ir_set_cursor_at_end_and_append_block(irb, ok_block);5802 ir_set_cursor_at_end_and_append_block(irb, ok_block);
4773 IrInstruction *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, parent_scope, node, maybe_ptr, false, false);5803 IrInstSrc *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, parent_scope, node, maybe_ptr, false, false);
4774 IrInstruction *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);5804 IrInstSrc *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);
4775 ir_build_end_expr(irb, parent_scope, node, unwrapped_payload, &peer_parent->peers.at(1)->base);5805 ir_build_end_expr(irb, parent_scope, node, unwrapped_payload, &peer_parent->peers.at(1)->base);
4776 IrBasicBlock *after_ok_block = irb->current_basic_block;5806 IrBasicBlockSrc *after_ok_block = irb->current_basic_block;
4777 ir_build_br(irb, parent_scope, node, end_block, is_comptime);5807 ir_build_br(irb, parent_scope, node, end_block, is_comptime);
47785808
4779 ir_set_cursor_at_end_and_append_block(irb, end_block);5809 ir_set_cursor_at_end_and_append_block(irb, end_block);
4780 IrInstruction **incoming_values = allocate<IrInstruction *>(2);5810 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
4781 incoming_values[0] = null_result;5811 incoming_values[0] = null_result;
4782 incoming_values[1] = unwrapped_payload;5812 incoming_values[1] = unwrapped_payload;
4783 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");5813 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
4784 incoming_blocks[0] = after_null_block;5814 incoming_blocks[0] = after_null_block;
4785 incoming_blocks[1] = after_ok_block;5815 incoming_blocks[1] = after_ok_block;
4786 IrInstruction *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);5816 IrInstSrc *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);
4787 return ir_lval_wrap(irb, parent_scope, phi, lval, result_loc);5817 return ir_lval_wrap(irb, parent_scope, phi, lval, result_loc);
4788}5818}
47895819
4790static IrInstruction *ir_gen_error_union(IrBuilder *irb, Scope *parent_scope, AstNode *node) {5820static IrInstSrc *ir_gen_error_union(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
4791 assert(node->type == NodeTypeBinOpExpr);5821 assert(node->type == NodeTypeBinOpExpr);
47925822
4793 AstNode *op1_node = node->data.bin_op_expr.op1;5823 AstNode *op1_node = node->data.bin_op_expr.op1;
4794 AstNode *op2_node = node->data.bin_op_expr.op2;5824 AstNode *op2_node = node->data.bin_op_expr.op2;
47955825
4796 IrInstruction *err_set = ir_gen_node(irb, op1_node, parent_scope);5826 IrInstSrc *err_set = ir_gen_node(irb, op1_node, parent_scope);
4797 if (err_set == irb->codegen->invalid_instruction)5827 if (err_set == irb->codegen->invalid_inst_src)
4798 return irb->codegen->invalid_instruction;5828 return irb->codegen->invalid_inst_src;
47995829
4800 IrInstruction *payload = ir_gen_node(irb, op2_node, parent_scope);5830 IrInstSrc *payload = ir_gen_node(irb, op2_node, parent_scope);
4801 if (payload == irb->codegen->invalid_instruction)5831 if (payload == irb->codegen->invalid_inst_src)
4802 return irb->codegen->invalid_instruction;5832 return irb->codegen->invalid_inst_src;
48035833
4804 return ir_build_error_union(irb, parent_scope, node, err_set, payload);5834 return ir_build_error_union(irb, parent_scope, node, err_set, payload);
4805}5835}
48065836
4807static IrInstruction *ir_gen_bin_op(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {5837static IrInstSrc *ir_gen_bin_op(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
4808 assert(node->type == NodeTypeBinOpExpr);5838 assert(node->type == NodeTypeBinOpExpr);
48095839
4810 BinOpType bin_op_type = node->data.bin_op_expr.bin_op;5840 BinOpType bin_op_type = node->data.bin_op_expr.bin_op;
...@@ -4897,30 +5927,30 @@ static IrInstruction *ir_gen_bin_op(IrBuilder *irb, Scope *scope, AstNode *node,...@@ -4897,30 +5927,30 @@ static IrInstruction *ir_gen_bin_op(IrBuilder *irb, Scope *scope, AstNode *node,
4897 zig_unreachable();5927 zig_unreachable();
4898}5928}
48995929
4900static IrInstruction *ir_gen_int_lit(IrBuilder *irb, Scope *scope, AstNode *node) {5930static IrInstSrc *ir_gen_int_lit(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
4901 assert(node->type == NodeTypeIntLiteral);5931 assert(node->type == NodeTypeIntLiteral);
49025932
4903 return ir_build_const_bigint(irb, scope, node, node->data.int_literal.bigint);5933 return ir_build_const_bigint(irb, scope, node, node->data.int_literal.bigint);
4904}5934}
49055935
4906static IrInstruction *ir_gen_float_lit(IrBuilder *irb, Scope *scope, AstNode *node) {5936static IrInstSrc *ir_gen_float_lit(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
4907 assert(node->type == NodeTypeFloatLiteral);5937 assert(node->type == NodeTypeFloatLiteral);
49085938
4909 if (node->data.float_literal.overflow) {5939 if (node->data.float_literal.overflow) {
4910 add_node_error(irb->codegen, node, buf_sprintf("float literal out of range of any type"));5940 add_node_error(irb->codegen, node, buf_sprintf("float literal out of range of any type"));
4911 return irb->codegen->invalid_instruction;5941 return irb->codegen->invalid_inst_src;
4912 }5942 }
49135943
4914 return ir_build_const_bigfloat(irb, scope, node, node->data.float_literal.bigfloat);5944 return ir_build_const_bigfloat(irb, scope, node, node->data.float_literal.bigfloat);
4915}5945}
49165946
4917static IrInstruction *ir_gen_char_lit(IrBuilder *irb, Scope *scope, AstNode *node) {5947static IrInstSrc *ir_gen_char_lit(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
4918 assert(node->type == NodeTypeCharLiteral);5948 assert(node->type == NodeTypeCharLiteral);
49195949
4920 return ir_build_const_uint(irb, scope, node, node->data.char_literal.value);5950 return ir_build_const_uint(irb, scope, node, node->data.char_literal.value);
4921}5951}
49225952
4923static IrInstruction *ir_gen_null_literal(IrBuilder *irb, Scope *scope, AstNode *node) {5953static IrInstSrc *ir_gen_null_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
4924 assert(node->type == NodeTypeNullLiteral);5954 assert(node->type == NodeTypeNullLiteral);
49255955
4926 return ir_build_const_null(irb, scope, node);5956 return ir_build_const_null(irb, scope, node);
...@@ -4938,11 +5968,11 @@ static void populate_invalid_variable_in_scope(CodeGen *g, Scope *scope, AstNode...@@ -4938,11 +5968,11 @@ static void populate_invalid_variable_in_scope(CodeGen *g, Scope *scope, AstNode
4938 init_tld(&tld_var->base, TldIdVar, var_name, VisibModPub, node, &scope_decls->base);5968 init_tld(&tld_var->base, TldIdVar, var_name, VisibModPub, node, &scope_decls->base);
4939 tld_var->base.resolution = TldResolutionInvalid;5969 tld_var->base.resolution = TldResolutionInvalid;
4940 tld_var->var = add_variable(g, node, &scope_decls->base, var_name, false,5970 tld_var->var = add_variable(g, node, &scope_decls->base, var_name, false,
4941 g->invalid_instruction->value, &tld_var->base, g->builtin_types.entry_invalid);5971 g->invalid_inst_gen->value, &tld_var->base, g->builtin_types.entry_invalid);
4942 scope_decls->decl_table.put(var_name, &tld_var->base);5972 scope_decls->decl_table.put(var_name, &tld_var->base);
4943}5973}
49445974
4945static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {5975static IrInstSrc *ir_gen_symbol(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
4946 Error err;5976 Error err;
4947 assert(node->type == NodeTypeSymbol);5977 assert(node->type == NodeTypeSymbol);
49485978
...@@ -4950,15 +5980,16 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,...@@ -4950,15 +5980,16 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
49505980
4951 if (buf_eql_str(variable_name, "_")) {5981 if (buf_eql_str(variable_name, "_")) {
4952 if (lval == LValPtr) {5982 if (lval == LValPtr) {
4953 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, node);5983 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, node);
4954 const_instruction->base.value->type = get_pointer_to_type(irb->codegen,5984 const_instruction->value = create_const_vals(1);
5985 const_instruction->value->type = get_pointer_to_type(irb->codegen,
4955 irb->codegen->builtin_types.entry_void, false);5986 irb->codegen->builtin_types.entry_void, false);
4956 const_instruction->base.value->special = ConstValSpecialStatic;5987 const_instruction->value->special = ConstValSpecialStatic;
4957 const_instruction->base.value->data.x_ptr.special = ConstPtrSpecialDiscard;5988 const_instruction->value->data.x_ptr.special = ConstPtrSpecialDiscard;
4958 return &const_instruction->base;5989 return &const_instruction->base;
4959 } else {5990 } else {
4960 add_node_error(irb->codegen, node, buf_sprintf("`_` may only be used to assign things to"));5991 add_node_error(irb->codegen, node, buf_sprintf("`_` may only be used to assign things to"));
4961 return irb->codegen->invalid_instruction;5992 return irb->codegen->invalid_inst_src;
4962 }5993 }
4963 }5994 }
49645995
...@@ -4968,13 +5999,13 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,...@@ -4968,13 +5999,13 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
4968 add_node_error(irb->codegen, node,5999 add_node_error(irb->codegen, node,
4969 buf_sprintf("primitive integer type '%s' exceeds maximum bit width of 65535",6000 buf_sprintf("primitive integer type '%s' exceeds maximum bit width of 65535",
4970 buf_ptr(variable_name)));6001 buf_ptr(variable_name)));
4971 return irb->codegen->invalid_instruction;6002 return irb->codegen->invalid_inst_src;
4972 }6003 }
4973 assert(err == ErrorPrimitiveTypeNotFound);6004 assert(err == ErrorPrimitiveTypeNotFound);
4974 } else {6005 } else {
4975 IrInstruction *value = ir_build_const_type(irb, scope, node, primitive_type);6006 IrInstSrc *value = ir_build_const_type(irb, scope, node, primitive_type);
4976 if (lval == LValPtr) {6007 if (lval == LValPtr) {
4977 return ir_build_ref(irb, scope, node, value, false, false);6008 return ir_build_ref_src(irb, scope, node, value, false, false);
4978 } else {6009 } else {
4979 return ir_expr_wrap(irb, scope, value, result_loc);6010 return ir_expr_wrap(irb, scope, value, result_loc);
4980 }6011 }
...@@ -4983,7 +6014,7 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,...@@ -4983,7 +6014,7 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
4983 ScopeFnDef *crossed_fndef_scope;6014 ScopeFnDef *crossed_fndef_scope;
4984 ZigVar *var = find_variable(irb->codegen, scope, variable_name, &crossed_fndef_scope);6015 ZigVar *var = find_variable(irb->codegen, scope, variable_name, &crossed_fndef_scope);
4985 if (var) {6016 if (var) {
4986 IrInstruction *var_ptr = ir_build_var_ptr_x(irb, scope, node, var, crossed_fndef_scope);6017 IrInstSrc *var_ptr = ir_build_var_ptr_x(irb, scope, node, var, crossed_fndef_scope);
4987 if (lval == LValPtr) {6018 if (lval == LValPtr) {
4988 return var_ptr;6019 return var_ptr;
4989 } else {6020 } else {
...@@ -4993,7 +6024,7 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,...@@ -4993,7 +6024,7 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
49936024
4994 Tld *tld = find_decl(irb->codegen, scope, variable_name);6025 Tld *tld = find_decl(irb->codegen, scope, variable_name);
4995 if (tld) {6026 if (tld) {
4996 IrInstruction *decl_ref = ir_build_decl_ref(irb, scope, node, tld, lval);6027 IrInstSrc *decl_ref = ir_build_decl_ref(irb, scope, node, tld, lval);
4997 if (lval == LValPtr) {6028 if (lval == LValPtr) {
4998 return decl_ref;6029 return decl_ref;
4999 } else {6030 } else {
...@@ -5004,50 +6035,50 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,...@@ -5004,50 +6035,50 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
5004 if (get_container_scope(node->owner)->any_imports_failed) {6035 if (get_container_scope(node->owner)->any_imports_failed) {
5005 // skip the error message since we had a failing import in this file6036 // skip the error message since we had a failing import in this file
5006 // if an import breaks we don't need redundant undeclared identifier errors6037 // if an import breaks we don't need redundant undeclared identifier errors
5007 return irb->codegen->invalid_instruction;6038 return irb->codegen->invalid_inst_src;
5008 }6039 }
50096040
5010 return ir_build_undeclared_identifier(irb, scope, node, variable_name);6041 return ir_build_undeclared_identifier(irb, scope, node, variable_name);
5011}6042}
50126043
5013static IrInstruction *ir_gen_array_access(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,6044static IrInstSrc *ir_gen_array_access(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
5014 ResultLoc *result_loc)6045 ResultLoc *result_loc)
5015{6046{
5016 assert(node->type == NodeTypeArrayAccessExpr);6047 assert(node->type == NodeTypeArrayAccessExpr);
50176048
5018 AstNode *array_ref_node = node->data.array_access_expr.array_ref_expr;6049 AstNode *array_ref_node = node->data.array_access_expr.array_ref_expr;
5019 IrInstruction *array_ref_instruction = ir_gen_node_extra(irb, array_ref_node, scope, LValPtr, nullptr);6050 IrInstSrc *array_ref_instruction = ir_gen_node_extra(irb, array_ref_node, scope, LValPtr, nullptr);
5020 if (array_ref_instruction == irb->codegen->invalid_instruction)6051 if (array_ref_instruction == irb->codegen->invalid_inst_src)
5021 return array_ref_instruction;6052 return array_ref_instruction;
50226053
5023 AstNode *subscript_node = node->data.array_access_expr.subscript;6054 AstNode *subscript_node = node->data.array_access_expr.subscript;
5024 IrInstruction *subscript_instruction = ir_gen_node(irb, subscript_node, scope);6055 IrInstSrc *subscript_instruction = ir_gen_node(irb, subscript_node, scope);
5025 if (subscript_instruction == irb->codegen->invalid_instruction)6056 if (subscript_instruction == irb->codegen->invalid_inst_src)
5026 return subscript_instruction;6057 return subscript_instruction;
50276058
5028 IrInstruction *ptr_instruction = ir_build_elem_ptr(irb, scope, node, array_ref_instruction,6059 IrInstSrc *ptr_instruction = ir_build_elem_ptr(irb, scope, node, array_ref_instruction,
5029 subscript_instruction, true, PtrLenSingle, nullptr);6060 subscript_instruction, true, PtrLenSingle, nullptr);
5030 if (lval == LValPtr)6061 if (lval == LValPtr)
5031 return ptr_instruction;6062 return ptr_instruction;
50326063
5033 IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);6064 IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
5034 return ir_expr_wrap(irb, scope, load_ptr, result_loc);6065 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
5035}6066}
50366067
5037static IrInstruction *ir_gen_field_access(IrBuilder *irb, Scope *scope, AstNode *node) {6068static IrInstSrc *ir_gen_field_access(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
5038 assert(node->type == NodeTypeFieldAccessExpr);6069 assert(node->type == NodeTypeFieldAccessExpr);
50396070
5040 AstNode *container_ref_node = node->data.field_access_expr.struct_expr;6071 AstNode *container_ref_node = node->data.field_access_expr.struct_expr;
5041 Buf *field_name = node->data.field_access_expr.field_name;6072 Buf *field_name = node->data.field_access_expr.field_name;
50426073
5043 IrInstruction *container_ref_instruction = ir_gen_node_extra(irb, container_ref_node, scope, LValPtr, nullptr);6074 IrInstSrc *container_ref_instruction = ir_gen_node_extra(irb, container_ref_node, scope, LValPtr, nullptr);
5044 if (container_ref_instruction == irb->codegen->invalid_instruction)6075 if (container_ref_instruction == irb->codegen->invalid_inst_src)
5045 return container_ref_instruction;6076 return container_ref_instruction;
50466077
5047 return ir_build_field_ptr(irb, scope, node, container_ref_instruction, field_name, false);6078 return ir_build_field_ptr(irb, scope, node, container_ref_instruction, field_name, false);
5048}6079}
50496080
5050static IrInstruction *ir_gen_overflow_op(IrBuilder *irb, Scope *scope, AstNode *node, IrOverflowOp op) {6081static IrInstSrc *ir_gen_overflow_op(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrOverflowOp op) {
5051 assert(node->type == NodeTypeFnCallExpr);6082 assert(node->type == NodeTypeFnCallExpr);
50526083
5053 AstNode *type_node = node->data.fn_call_expr.params.at(0);6084 AstNode *type_node = node->data.fn_call_expr.params.at(0);
...@@ -5056,26 +6087,26 @@ static IrInstruction *ir_gen_overflow_op(IrBuilder *irb, Scope *scope, AstNode *...@@ -5056,26 +6087,26 @@ static IrInstruction *ir_gen_overflow_op(IrBuilder *irb, Scope *scope, AstNode *
5056 AstNode *result_ptr_node = node->data.fn_call_expr.params.at(3);6087 AstNode *result_ptr_node = node->data.fn_call_expr.params.at(3);
50576088
50586089
5059 IrInstruction *type_value = ir_gen_node(irb, type_node, scope);6090 IrInstSrc *type_value = ir_gen_node(irb, type_node, scope);
5060 if (type_value == irb->codegen->invalid_instruction)6091 if (type_value == irb->codegen->invalid_inst_src)
5061 return irb->codegen->invalid_instruction;6092 return irb->codegen->invalid_inst_src;
50626093
5063 IrInstruction *op1 = ir_gen_node(irb, op1_node, scope);6094 IrInstSrc *op1 = ir_gen_node(irb, op1_node, scope);
5064 if (op1 == irb->codegen->invalid_instruction)6095 if (op1 == irb->codegen->invalid_inst_src)
5065 return irb->codegen->invalid_instruction;6096 return irb->codegen->invalid_inst_src;
50666097
5067 IrInstruction *op2 = ir_gen_node(irb, op2_node, scope);6098 IrInstSrc *op2 = ir_gen_node(irb, op2_node, scope);
5068 if (op2 == irb->codegen->invalid_instruction)6099 if (op2 == irb->codegen->invalid_inst_src)
5069 return irb->codegen->invalid_instruction;6100 return irb->codegen->invalid_inst_src;
50706101
5071 IrInstruction *result_ptr = ir_gen_node(irb, result_ptr_node, scope);6102 IrInstSrc *result_ptr = ir_gen_node(irb, result_ptr_node, scope);
5072 if (result_ptr == irb->codegen->invalid_instruction)6103 if (result_ptr == irb->codegen->invalid_inst_src)
5073 return irb->codegen->invalid_instruction;6104 return irb->codegen->invalid_inst_src;
50746105
5075 return ir_build_overflow_op(irb, scope, node, op, type_value, op1, op2, result_ptr, nullptr);6106 return ir_build_overflow_op_src(irb, scope, node, op, type_value, op1, op2, result_ptr);
5076}6107}
50776108
5078static IrInstruction *ir_gen_mul_add(IrBuilder *irb, Scope *scope, AstNode *node) {6109static IrInstSrc *ir_gen_mul_add(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
5079 assert(node->type == NodeTypeFnCallExpr);6110 assert(node->type == NodeTypeFnCallExpr);
50806111
5081 AstNode *type_node = node->data.fn_call_expr.params.at(0);6112 AstNode *type_node = node->data.fn_call_expr.params.at(0);
...@@ -5083,26 +6114,26 @@ static IrInstruction *ir_gen_mul_add(IrBuilder *irb, Scope *scope, AstNode *node...@@ -5083,26 +6114,26 @@ static IrInstruction *ir_gen_mul_add(IrBuilder *irb, Scope *scope, AstNode *node
5083 AstNode *op2_node = node->data.fn_call_expr.params.at(2);6114 AstNode *op2_node = node->data.fn_call_expr.params.at(2);
5084 AstNode *op3_node = node->data.fn_call_expr.params.at(3);6115 AstNode *op3_node = node->data.fn_call_expr.params.at(3);
50856116
5086 IrInstruction *type_value = ir_gen_node(irb, type_node, scope);6117 IrInstSrc *type_value = ir_gen_node(irb, type_node, scope);
5087 if (type_value == irb->codegen->invalid_instruction)6118 if (type_value == irb->codegen->invalid_inst_src)
5088 return irb->codegen->invalid_instruction;6119 return irb->codegen->invalid_inst_src;
50896120
5090 IrInstruction *op1 = ir_gen_node(irb, op1_node, scope);6121 IrInstSrc *op1 = ir_gen_node(irb, op1_node, scope);
5091 if (op1 == irb->codegen->invalid_instruction)6122 if (op1 == irb->codegen->invalid_inst_src)
5092 return irb->codegen->invalid_instruction;6123 return irb->codegen->invalid_inst_src;
50936124
5094 IrInstruction *op2 = ir_gen_node(irb, op2_node, scope);6125 IrInstSrc *op2 = ir_gen_node(irb, op2_node, scope);
5095 if (op2 == irb->codegen->invalid_instruction)6126 if (op2 == irb->codegen->invalid_inst_src)
5096 return irb->codegen->invalid_instruction;6127 return irb->codegen->invalid_inst_src;
50976128
5098 IrInstruction *op3 = ir_gen_node(irb, op3_node, scope);6129 IrInstSrc *op3 = ir_gen_node(irb, op3_node, scope);
5099 if (op3 == irb->codegen->invalid_instruction)6130 if (op3 == irb->codegen->invalid_inst_src)
5100 return irb->codegen->invalid_instruction;6131 return irb->codegen->invalid_inst_src;
51016132
5102 return ir_build_mul_add(irb, scope, node, type_value, op1, op2, op3);6133 return ir_build_mul_add_src(irb, scope, node, type_value, op1, op2, op3);
5103}6134}
51046135
5105static IrInstruction *ir_gen_this(IrBuilder *irb, Scope *orig_scope, AstNode *node) {6136static IrInstSrc *ir_gen_this(IrBuilderSrc *irb, Scope *orig_scope, AstNode *node) {
5106 for (Scope *it_scope = orig_scope; it_scope != nullptr; it_scope = it_scope->parent) {6137 for (Scope *it_scope = orig_scope; it_scope != nullptr; it_scope = it_scope->parent) {
5107 if (it_scope->id == ScopeIdDecls) {6138 if (it_scope->id == ScopeIdDecls) {
5108 ScopeDecls *decls_scope = (ScopeDecls *)it_scope;6139 ScopeDecls *decls_scope = (ScopeDecls *)it_scope;
...@@ -5117,7 +6148,7 @@ static IrInstruction *ir_gen_this(IrBuilder *irb, Scope *orig_scope, AstNode *no...@@ -5117,7 +6148,7 @@ static IrInstruction *ir_gen_this(IrBuilder *irb, Scope *orig_scope, AstNode *no
5117 zig_unreachable();6148 zig_unreachable();
5118}6149}
51196150
5120static IrInstruction *ir_gen_async_call(IrBuilder *irb, Scope *scope, AstNode *await_node, AstNode *call_node,6151static IrInstSrc *ir_gen_async_call(IrBuilderSrc *irb, Scope *scope, AstNode *await_node, AstNode *call_node,
5121 LVal lval, ResultLoc *result_loc)6152 LVal lval, ResultLoc *result_loc)
5122{6153{
5123 size_t arg_offset = 3;6154 size_t arg_offset = 3;
...@@ -5125,71 +6156,71 @@ static IrInstruction *ir_gen_async_call(IrBuilder *irb, Scope *scope, AstNode *a...@@ -5125,71 +6156,71 @@ static IrInstruction *ir_gen_async_call(IrBuilder *irb, Scope *scope, AstNode *a
5125 add_node_error(irb->codegen, call_node,6156 add_node_error(irb->codegen, call_node,
5126 buf_sprintf("expected at least %" ZIG_PRI_usize " arguments, found %" ZIG_PRI_usize,6157 buf_sprintf("expected at least %" ZIG_PRI_usize " arguments, found %" ZIG_PRI_usize,
5127 arg_offset, call_node->data.fn_call_expr.params.length));6158 arg_offset, call_node->data.fn_call_expr.params.length));
5128 return irb->codegen->invalid_instruction;6159 return irb->codegen->invalid_inst_src;
5129 }6160 }
51306161
5131 AstNode *bytes_node = call_node->data.fn_call_expr.params.at(0);6162 AstNode *bytes_node = call_node->data.fn_call_expr.params.at(0);
5132 IrInstruction *bytes = ir_gen_node(irb, bytes_node, scope);6163 IrInstSrc *bytes = ir_gen_node(irb, bytes_node, scope);
5133 if (bytes == irb->codegen->invalid_instruction)6164 if (bytes == irb->codegen->invalid_inst_src)
5134 return bytes;6165 return bytes;
51356166
5136 AstNode *ret_ptr_node = call_node->data.fn_call_expr.params.at(1);6167 AstNode *ret_ptr_node = call_node->data.fn_call_expr.params.at(1);
5137 IrInstruction *ret_ptr = ir_gen_node(irb, ret_ptr_node, scope);6168 IrInstSrc *ret_ptr = ir_gen_node(irb, ret_ptr_node, scope);
5138 if (ret_ptr == irb->codegen->invalid_instruction)6169 if (ret_ptr == irb->codegen->invalid_inst_src)
5139 return ret_ptr;6170 return ret_ptr;
51406171
5141 AstNode *fn_ref_node = call_node->data.fn_call_expr.params.at(2);6172 AstNode *fn_ref_node = call_node->data.fn_call_expr.params.at(2);
5142 IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);6173 IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
5143 if (fn_ref == irb->codegen->invalid_instruction)6174 if (fn_ref == irb->codegen->invalid_inst_src)
5144 return fn_ref;6175 return fn_ref;
51456176
5146 size_t arg_count = call_node->data.fn_call_expr.params.length - arg_offset;6177 size_t arg_count = call_node->data.fn_call_expr.params.length - arg_offset;
5147 IrInstruction **args = allocate<IrInstruction*>(arg_count);6178 IrInstSrc **args = allocate<IrInstSrc*>(arg_count);
5148 for (size_t i = 0; i < arg_count; i += 1) {6179 for (size_t i = 0; i < arg_count; i += 1) {
5149 AstNode *arg_node = call_node->data.fn_call_expr.params.at(i + arg_offset);6180 AstNode *arg_node = call_node->data.fn_call_expr.params.at(i + arg_offset);
5150 IrInstruction *arg = ir_gen_node(irb, arg_node, scope);6181 IrInstSrc *arg = ir_gen_node(irb, arg_node, scope);
5151 if (arg == irb->codegen->invalid_instruction)6182 if (arg == irb->codegen->invalid_inst_src)
5152 return arg;6183 return arg;
5153 args[i] = arg;6184 args[i] = arg;
5154 }6185 }
51556186
5156 CallModifier modifier = (await_node == nullptr) ? CallModifierAsync : CallModifierNone;6187 CallModifier modifier = (await_node == nullptr) ? CallModifierAsync : CallModifierNone;
5157 bool is_async_call_builtin = true;6188 bool is_async_call_builtin = true;
5158 IrInstruction *call = ir_build_call_src(irb, scope, call_node, nullptr, fn_ref, arg_count, args,6189 IrInstSrc *call = ir_build_call_src(irb, scope, call_node, nullptr, fn_ref, arg_count, args,
5159 ret_ptr, modifier, is_async_call_builtin, bytes, result_loc);6190 ret_ptr, modifier, is_async_call_builtin, bytes, result_loc);
5160 return ir_lval_wrap(irb, scope, call, lval, result_loc);6191 return ir_lval_wrap(irb, scope, call, lval, result_loc);
5161}6192}
51626193
5163static IrInstruction *ir_gen_fn_call_with_args(IrBuilder *irb, Scope *scope, AstNode *source_node,6194static IrInstSrc *ir_gen_fn_call_with_args(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
5164 AstNode *fn_ref_node, CallModifier modifier, IrInstruction *options,6195 AstNode *fn_ref_node, CallModifier modifier, IrInstSrc *options,
5165 AstNode **args_ptr, size_t args_len, LVal lval, ResultLoc *result_loc)6196 AstNode **args_ptr, size_t args_len, LVal lval, ResultLoc *result_loc)
5166{6197{
5167 IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);6198 IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
5168 if (fn_ref == irb->codegen->invalid_instruction)6199 if (fn_ref == irb->codegen->invalid_inst_src)
5169 return fn_ref;6200 return fn_ref;
51706201
5171 IrInstruction *fn_type = ir_build_typeof(irb, scope, source_node, fn_ref);6202 IrInstSrc *fn_type = ir_build_typeof(irb, scope, source_node, fn_ref);
51726203
5173 IrInstruction **args = allocate<IrInstruction*>(args_len);6204 IrInstSrc **args = allocate<IrInstSrc*>(args_len);
5174 for (size_t i = 0; i < args_len; i += 1) {6205 for (size_t i = 0; i < args_len; i += 1) {
5175 AstNode *arg_node = args_ptr[i];6206 AstNode *arg_node = args_ptr[i];
51766207
5177 IrInstruction *arg_index = ir_build_const_usize(irb, scope, arg_node, i);6208 IrInstSrc *arg_index = ir_build_const_usize(irb, scope, arg_node, i);
5178 IrInstruction *arg_type = ir_build_arg_type(irb, scope, source_node, fn_type, arg_index, true);6209 IrInstSrc *arg_type = ir_build_arg_type(irb, scope, source_node, fn_type, arg_index, true);
5179 ResultLoc *no_result = no_result_loc();6210 ResultLoc *no_result = no_result_loc();
5180 ir_build_reset_result(irb, scope, source_node, no_result);6211 ir_build_reset_result(irb, scope, source_node, no_result);
5181 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, arg_type, no_result);6212 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, arg_type, no_result);
51826213
5183 IrInstruction *arg = ir_gen_node_extra(irb, arg_node, scope, LValNone, &result_loc_cast->base);6214 IrInstSrc *arg = ir_gen_node_extra(irb, arg_node, scope, LValNone, &result_loc_cast->base);
5184 if (arg == irb->codegen->invalid_instruction)6215 if (arg == irb->codegen->invalid_inst_src)
5185 return arg;6216 return arg;
51866217
5187 args[i] = ir_build_implicit_cast(irb, scope, arg_node, arg, result_loc_cast);6218 args[i] = ir_build_implicit_cast(irb, scope, arg_node, arg, result_loc_cast);
5188 }6219 }
51896220
5190 IrInstruction *fn_call;6221 IrInstSrc *fn_call;
5191 if (options != nullptr) {6222 if (options != nullptr) {
5192 fn_call = ir_build_call_src_args(irb, scope, source_node, options, fn_ref, args, args_len, result_loc);6223 fn_call = ir_build_call_args(irb, scope, source_node, options, fn_ref, args, args_len, result_loc);
5193 } else {6224 } else {
5194 fn_call = ir_build_call_src(irb, scope, source_node, nullptr, fn_ref, args_len, args, nullptr,6225 fn_call = ir_build_call_src(irb, scope, source_node, nullptr, fn_ref, args_len, args, nullptr,
5195 modifier, false, nullptr, result_loc);6226 modifier, false, nullptr, result_loc);
...@@ -5197,7 +6228,7 @@ static IrInstruction *ir_gen_fn_call_with_args(IrBuilder *irb, Scope *scope, Ast...@@ -5197,7 +6228,7 @@ static IrInstruction *ir_gen_fn_call_with_args(IrBuilder *irb, Scope *scope, Ast
5197 return ir_lval_wrap(irb, scope, fn_call, lval, result_loc);6228 return ir_lval_wrap(irb, scope, fn_call, lval, result_loc);
5198}6229}
51996230
5200static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,6231static IrInstSrc *ir_gen_builtin_fn_call(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
5201 ResultLoc *result_loc)6232 ResultLoc *result_loc)
5202{6233{
5203 assert(node->type == NodeTypeFnCallExpr);6234 assert(node->type == NodeTypeFnCallExpr);
...@@ -5209,7 +6240,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo...@@ -5209,7 +6240,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
5209 if (!entry) {6240 if (!entry) {
5210 add_node_error(irb->codegen, node,6241 add_node_error(irb->codegen, node,
5211 buf_sprintf("invalid builtin function: '%s'", buf_ptr(name)));6242 buf_sprintf("invalid builtin function: '%s'", buf_ptr(name)));
5212 return irb->codegen->invalid_instruction;6243 return irb->codegen->invalid_inst_src;
5213 }6244 }
52146245
5215 BuiltinFnEntry *builtin_fn = entry->value;6246 BuiltinFnEntry *builtin_fn = entry->value;
...@@ -5219,7 +6250,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo...@@ -5219,7 +6250,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
5219 add_node_error(irb->codegen, node,6250 add_node_error(irb->codegen, node,
5220 buf_sprintf("expected %" ZIG_PRI_usize " arguments, found %" ZIG_PRI_usize,6251 buf_sprintf("expected %" ZIG_PRI_usize " arguments, found %" ZIG_PRI_usize,
5221 builtin_fn->param_count, actual_param_count));6252 builtin_fn->param_count, actual_param_count));
5222 return irb->codegen->invalid_instruction;6253 return irb->codegen->invalid_inst_src;
5223 }6254 }
52246255
5225 switch (builtin_fn->id) {6256 switch (builtin_fn->id) {
...@@ -5230,197 +6261,197 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo...@@ -5230,197 +6261,197 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
5230 Scope *sub_scope = create_typeof_scope(irb->codegen, node, scope);6261 Scope *sub_scope = create_typeof_scope(irb->codegen, node, scope);
52316262
5232 AstNode *arg_node = node->data.fn_call_expr.params.at(0);6263 AstNode *arg_node = node->data.fn_call_expr.params.at(0);
5233 IrInstruction *arg = ir_gen_node(irb, arg_node, sub_scope);6264 IrInstSrc *arg = ir_gen_node(irb, arg_node, sub_scope);
5234 if (arg == irb->codegen->invalid_instruction)6265 if (arg == irb->codegen->invalid_inst_src)
5235 return arg;6266 return arg;
52366267
5237 IrInstruction *type_of = ir_build_typeof(irb, scope, node, arg);6268 IrInstSrc *type_of = ir_build_typeof(irb, scope, node, arg);
5238 return ir_lval_wrap(irb, scope, type_of, lval, result_loc);6269 return ir_lval_wrap(irb, scope, type_of, lval, result_loc);
5239 }6270 }
5240 case BuiltinFnIdSetCold:6271 case BuiltinFnIdSetCold:
5241 {6272 {
5242 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6273 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5243 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6274 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5244 if (arg0_value == irb->codegen->invalid_instruction)6275 if (arg0_value == irb->codegen->invalid_inst_src)
5245 return arg0_value;6276 return arg0_value;
52466277
5247 IrInstruction *set_cold = ir_build_set_cold(irb, scope, node, arg0_value);6278 IrInstSrc *set_cold = ir_build_set_cold(irb, scope, node, arg0_value);
5248 return ir_lval_wrap(irb, scope, set_cold, lval, result_loc);6279 return ir_lval_wrap(irb, scope, set_cold, lval, result_loc);
5249 }6280 }
5250 case BuiltinFnIdSetRuntimeSafety:6281 case BuiltinFnIdSetRuntimeSafety:
5251 {6282 {
5252 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6283 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5253 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6284 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5254 if (arg0_value == irb->codegen->invalid_instruction)6285 if (arg0_value == irb->codegen->invalid_inst_src)
5255 return arg0_value;6286 return arg0_value;
52566287
5257 IrInstruction *set_safety = ir_build_set_runtime_safety(irb, scope, node, arg0_value);6288 IrInstSrc *set_safety = ir_build_set_runtime_safety(irb, scope, node, arg0_value);
5258 return ir_lval_wrap(irb, scope, set_safety, lval, result_loc);6289 return ir_lval_wrap(irb, scope, set_safety, lval, result_loc);
5259 }6290 }
5260 case BuiltinFnIdSetFloatMode:6291 case BuiltinFnIdSetFloatMode:
5261 {6292 {
5262 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6293 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5263 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6294 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5264 if (arg0_value == irb->codegen->invalid_instruction)6295 if (arg0_value == irb->codegen->invalid_inst_src)
5265 return arg0_value;6296 return arg0_value;
52666297
5267 IrInstruction *set_float_mode = ir_build_set_float_mode(irb, scope, node, arg0_value);6298 IrInstSrc *set_float_mode = ir_build_set_float_mode(irb, scope, node, arg0_value);
5268 return ir_lval_wrap(irb, scope, set_float_mode, lval, result_loc);6299 return ir_lval_wrap(irb, scope, set_float_mode, lval, result_loc);
5269 }6300 }
5270 case BuiltinFnIdSizeof:6301 case BuiltinFnIdSizeof:
5271 case BuiltinFnIdBitSizeof:6302 case BuiltinFnIdBitSizeof:
5272 {6303 {
5273 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6304 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5274 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6305 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5275 if (arg0_value == irb->codegen->invalid_instruction)6306 if (arg0_value == irb->codegen->invalid_inst_src)
5276 return arg0_value;6307 return arg0_value;
52776308
5278 IrInstruction *size_of = ir_build_size_of(irb, scope, node, arg0_value, builtin_fn->id == BuiltinFnIdBitSizeof);6309 IrInstSrc *size_of = ir_build_size_of(irb, scope, node, arg0_value, builtin_fn->id == BuiltinFnIdBitSizeof);
5279 return ir_lval_wrap(irb, scope, size_of, lval, result_loc);6310 return ir_lval_wrap(irb, scope, size_of, lval, result_loc);
5280 }6311 }
5281 case BuiltinFnIdImport:6312 case BuiltinFnIdImport:
5282 {6313 {
5283 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6314 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5284 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6315 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5285 if (arg0_value == irb->codegen->invalid_instruction)6316 if (arg0_value == irb->codegen->invalid_inst_src)
5286 return arg0_value;6317 return arg0_value;
52876318
5288 IrInstruction *import = ir_build_import(irb, scope, node, arg0_value);6319 IrInstSrc *import = ir_build_import(irb, scope, node, arg0_value);
5289 return ir_lval_wrap(irb, scope, import, lval, result_loc);6320 return ir_lval_wrap(irb, scope, import, lval, result_loc);
5290 }6321 }
5291 case BuiltinFnIdCImport:6322 case BuiltinFnIdCImport:
5292 {6323 {
5293 IrInstruction *c_import = ir_build_c_import(irb, scope, node);6324 IrInstSrc *c_import = ir_build_c_import(irb, scope, node);
5294 return ir_lval_wrap(irb, scope, c_import, lval, result_loc);6325 return ir_lval_wrap(irb, scope, c_import, lval, result_loc);
5295 }6326 }
5296 case BuiltinFnIdCInclude:6327 case BuiltinFnIdCInclude:
5297 {6328 {
5298 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6329 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5299 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6330 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5300 if (arg0_value == irb->codegen->invalid_instruction)6331 if (arg0_value == irb->codegen->invalid_inst_src)
5301 return arg0_value;6332 return arg0_value;
53026333
5303 if (!exec_c_import_buf(irb->exec)) {6334 if (!exec_c_import_buf(irb->exec)) {
5304 add_node_error(irb->codegen, node, buf_sprintf("C include valid only inside C import block"));6335 add_node_error(irb->codegen, node, buf_sprintf("C include valid only inside C import block"));
5305 return irb->codegen->invalid_instruction;6336 return irb->codegen->invalid_inst_src;
5306 }6337 }
53076338
5308 IrInstruction *c_include = ir_build_c_include(irb, scope, node, arg0_value);6339 IrInstSrc *c_include = ir_build_c_include(irb, scope, node, arg0_value);
5309 return ir_lval_wrap(irb, scope, c_include, lval, result_loc);6340 return ir_lval_wrap(irb, scope, c_include, lval, result_loc);
5310 }6341 }
5311 case BuiltinFnIdCDefine:6342 case BuiltinFnIdCDefine:
5312 {6343 {
5313 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6344 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5314 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6345 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5315 if (arg0_value == irb->codegen->invalid_instruction)6346 if (arg0_value == irb->codegen->invalid_inst_src)
5316 return arg0_value;6347 return arg0_value;
53176348
5318 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6349 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5319 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6350 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5320 if (arg1_value == irb->codegen->invalid_instruction)6351 if (arg1_value == irb->codegen->invalid_inst_src)
5321 return arg1_value;6352 return arg1_value;
53226353
5323 if (!exec_c_import_buf(irb->exec)) {6354 if (!exec_c_import_buf(irb->exec)) {
5324 add_node_error(irb->codegen, node, buf_sprintf("C define valid only inside C import block"));6355 add_node_error(irb->codegen, node, buf_sprintf("C define valid only inside C import block"));
5325 return irb->codegen->invalid_instruction;6356 return irb->codegen->invalid_inst_src;
5326 }6357 }
53276358
5328 IrInstruction *c_define = ir_build_c_define(irb, scope, node, arg0_value, arg1_value);6359 IrInstSrc *c_define = ir_build_c_define(irb, scope, node, arg0_value, arg1_value);
5329 return ir_lval_wrap(irb, scope, c_define, lval, result_loc);6360 return ir_lval_wrap(irb, scope, c_define, lval, result_loc);
5330 }6361 }
5331 case BuiltinFnIdCUndef:6362 case BuiltinFnIdCUndef:
5332 {6363 {
5333 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6364 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5334 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6365 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5335 if (arg0_value == irb->codegen->invalid_instruction)6366 if (arg0_value == irb->codegen->invalid_inst_src)
5336 return arg0_value;6367 return arg0_value;
53376368
5338 if (!exec_c_import_buf(irb->exec)) {6369 if (!exec_c_import_buf(irb->exec)) {
5339 add_node_error(irb->codegen, node, buf_sprintf("C undef valid only inside C import block"));6370 add_node_error(irb->codegen, node, buf_sprintf("C undef valid only inside C import block"));
5340 return irb->codegen->invalid_instruction;6371 return irb->codegen->invalid_inst_src;
5341 }6372 }
53426373
5343 IrInstruction *c_undef = ir_build_c_undef(irb, scope, node, arg0_value);6374 IrInstSrc *c_undef = ir_build_c_undef(irb, scope, node, arg0_value);
5344 return ir_lval_wrap(irb, scope, c_undef, lval, result_loc);6375 return ir_lval_wrap(irb, scope, c_undef, lval, result_loc);
5345 }6376 }
5346 case BuiltinFnIdCompileErr:6377 case BuiltinFnIdCompileErr:
5347 {6378 {
5348 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6379 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5349 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6380 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5350 if (arg0_value == irb->codegen->invalid_instruction)6381 if (arg0_value == irb->codegen->invalid_inst_src)
5351 return arg0_value;6382 return arg0_value;
53526383
5353 IrInstruction *compile_err = ir_build_compile_err(irb, scope, node, arg0_value);6384 IrInstSrc *compile_err = ir_build_compile_err(irb, scope, node, arg0_value);
5354 return ir_lval_wrap(irb, scope, compile_err, lval, result_loc);6385 return ir_lval_wrap(irb, scope, compile_err, lval, result_loc);
5355 }6386 }
5356 case BuiltinFnIdCompileLog:6387 case BuiltinFnIdCompileLog:
5357 {6388 {
5358 IrInstruction **args = allocate<IrInstruction*>(actual_param_count);6389 IrInstSrc **args = allocate<IrInstSrc*>(actual_param_count);
53596390
5360 for (size_t i = 0; i < actual_param_count; i += 1) {6391 for (size_t i = 0; i < actual_param_count; i += 1) {
5361 AstNode *arg_node = node->data.fn_call_expr.params.at(i);6392 AstNode *arg_node = node->data.fn_call_expr.params.at(i);
5362 args[i] = ir_gen_node(irb, arg_node, scope);6393 args[i] = ir_gen_node(irb, arg_node, scope);
5363 if (args[i] == irb->codegen->invalid_instruction)6394 if (args[i] == irb->codegen->invalid_inst_src)
5364 return irb->codegen->invalid_instruction;6395 return irb->codegen->invalid_inst_src;
5365 }6396 }
53666397
5367 IrInstruction *compile_log = ir_build_compile_log(irb, scope, node, actual_param_count, args);6398 IrInstSrc *compile_log = ir_build_compile_log(irb, scope, node, actual_param_count, args);
5368 return ir_lval_wrap(irb, scope, compile_log, lval, result_loc);6399 return ir_lval_wrap(irb, scope, compile_log, lval, result_loc);
5369 }6400 }
5370 case BuiltinFnIdErrName:6401 case BuiltinFnIdErrName:
5371 {6402 {
5372 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6403 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5373 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6404 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5374 if (arg0_value == irb->codegen->invalid_instruction)6405 if (arg0_value == irb->codegen->invalid_inst_src)
5375 return arg0_value;6406 return arg0_value;
53766407
5377 IrInstruction *err_name = ir_build_err_name(irb, scope, node, arg0_value);6408 IrInstSrc *err_name = ir_build_err_name(irb, scope, node, arg0_value);
5378 return ir_lval_wrap(irb, scope, err_name, lval, result_loc);6409 return ir_lval_wrap(irb, scope, err_name, lval, result_loc);
5379 }6410 }
5380 case BuiltinFnIdEmbedFile:6411 case BuiltinFnIdEmbedFile:
5381 {6412 {
5382 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6413 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5383 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6414 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5384 if (arg0_value == irb->codegen->invalid_instruction)6415 if (arg0_value == irb->codegen->invalid_inst_src)
5385 return arg0_value;6416 return arg0_value;
53866417
5387 IrInstruction *embed_file = ir_build_embed_file(irb, scope, node, arg0_value);6418 IrInstSrc *embed_file = ir_build_embed_file(irb, scope, node, arg0_value);
5388 return ir_lval_wrap(irb, scope, embed_file, lval, result_loc);6419 return ir_lval_wrap(irb, scope, embed_file, lval, result_loc);
5389 }6420 }
5390 case BuiltinFnIdCmpxchgWeak:6421 case BuiltinFnIdCmpxchgWeak:
5391 case BuiltinFnIdCmpxchgStrong:6422 case BuiltinFnIdCmpxchgStrong:
5392 {6423 {
5393 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6424 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5394 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6425 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5395 if (arg0_value == irb->codegen->invalid_instruction)6426 if (arg0_value == irb->codegen->invalid_inst_src)
5396 return arg0_value;6427 return arg0_value;
53976428
5398 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6429 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5399 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6430 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5400 if (arg1_value == irb->codegen->invalid_instruction)6431 if (arg1_value == irb->codegen->invalid_inst_src)
5401 return arg1_value;6432 return arg1_value;
54026433
5403 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);6434 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
5404 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);6435 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
5405 if (arg2_value == irb->codegen->invalid_instruction)6436 if (arg2_value == irb->codegen->invalid_inst_src)
5406 return arg2_value;6437 return arg2_value;
54076438
5408 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);6439 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
5409 IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);6440 IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
5410 if (arg3_value == irb->codegen->invalid_instruction)6441 if (arg3_value == irb->codegen->invalid_inst_src)
5411 return arg3_value;6442 return arg3_value;
54126443
5413 AstNode *arg4_node = node->data.fn_call_expr.params.at(4);6444 AstNode *arg4_node = node->data.fn_call_expr.params.at(4);
5414 IrInstruction *arg4_value = ir_gen_node(irb, arg4_node, scope);6445 IrInstSrc *arg4_value = ir_gen_node(irb, arg4_node, scope);
5415 if (arg4_value == irb->codegen->invalid_instruction)6446 if (arg4_value == irb->codegen->invalid_inst_src)
5416 return arg4_value;6447 return arg4_value;
54176448
5418 AstNode *arg5_node = node->data.fn_call_expr.params.at(5);6449 AstNode *arg5_node = node->data.fn_call_expr.params.at(5);
5419 IrInstruction *arg5_value = ir_gen_node(irb, arg5_node, scope);6450 IrInstSrc *arg5_value = ir_gen_node(irb, arg5_node, scope);
5420 if (arg5_value == irb->codegen->invalid_instruction)6451 if (arg5_value == irb->codegen->invalid_inst_src)
5421 return arg5_value;6452 return arg5_value;
54226453
5423 IrInstruction *cmpxchg = ir_build_cmpxchg_src(irb, scope, node, arg0_value, arg1_value,6454 IrInstSrc *cmpxchg = ir_build_cmpxchg_src(irb, scope, node, arg0_value, arg1_value,
5424 arg2_value, arg3_value, arg4_value, arg5_value, (builtin_fn->id == BuiltinFnIdCmpxchgWeak),6455 arg2_value, arg3_value, arg4_value, arg5_value, (builtin_fn->id == BuiltinFnIdCmpxchgWeak),
5425 result_loc);6456 result_loc);
5426 return ir_lval_wrap(irb, scope, cmpxchg, lval, result_loc);6457 return ir_lval_wrap(irb, scope, cmpxchg, lval, result_loc);
...@@ -5428,86 +6459,86 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo...@@ -5428,86 +6459,86 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
5428 case BuiltinFnIdFence:6459 case BuiltinFnIdFence:
5429 {6460 {
5430 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6461 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5431 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6462 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5432 if (arg0_value == irb->codegen->invalid_instruction)6463 if (arg0_value == irb->codegen->invalid_inst_src)
5433 return arg0_value;6464 return arg0_value;
54346465
5435 IrInstruction *fence = ir_build_fence(irb, scope, node, arg0_value, AtomicOrderUnordered);6466 IrInstSrc *fence = ir_build_fence(irb, scope, node, arg0_value);
5436 return ir_lval_wrap(irb, scope, fence, lval, result_loc);6467 return ir_lval_wrap(irb, scope, fence, lval, result_loc);
5437 }6468 }
5438 case BuiltinFnIdDivExact:6469 case BuiltinFnIdDivExact:
5439 {6470 {
5440 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6471 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5441 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6472 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5442 if (arg0_value == irb->codegen->invalid_instruction)6473 if (arg0_value == irb->codegen->invalid_inst_src)
5443 return arg0_value;6474 return arg0_value;
54446475
5445 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6476 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5446 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6477 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5447 if (arg1_value == irb->codegen->invalid_instruction)6478 if (arg1_value == irb->codegen->invalid_inst_src)
5448 return arg1_value;6479 return arg1_value;
54496480
5450 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivExact, arg0_value, arg1_value, true);6481 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivExact, arg0_value, arg1_value, true);
5451 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);6482 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
5452 }6483 }
5453 case BuiltinFnIdDivTrunc:6484 case BuiltinFnIdDivTrunc:
5454 {6485 {
5455 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6486 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5456 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6487 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5457 if (arg0_value == irb->codegen->invalid_instruction)6488 if (arg0_value == irb->codegen->invalid_inst_src)
5458 return arg0_value;6489 return arg0_value;
54596490
5460 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6491 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5461 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6492 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5462 if (arg1_value == irb->codegen->invalid_instruction)6493 if (arg1_value == irb->codegen->invalid_inst_src)
5463 return arg1_value;6494 return arg1_value;
54646495
5465 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivTrunc, arg0_value, arg1_value, true);6496 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivTrunc, arg0_value, arg1_value, true);
5466 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);6497 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
5467 }6498 }
5468 case BuiltinFnIdDivFloor:6499 case BuiltinFnIdDivFloor:
5469 {6500 {
5470 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6501 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5471 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6502 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5472 if (arg0_value == irb->codegen->invalid_instruction)6503 if (arg0_value == irb->codegen->invalid_inst_src)
5473 return arg0_value;6504 return arg0_value;
54746505
5475 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6506 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5476 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6507 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5477 if (arg1_value == irb->codegen->invalid_instruction)6508 if (arg1_value == irb->codegen->invalid_inst_src)
5478 return arg1_value;6509 return arg1_value;
54796510
5480 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivFloor, arg0_value, arg1_value, true);6511 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivFloor, arg0_value, arg1_value, true);
5481 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);6512 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
5482 }6513 }
5483 case BuiltinFnIdRem:6514 case BuiltinFnIdRem:
5484 {6515 {
5485 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6516 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5486 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6517 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5487 if (arg0_value == irb->codegen->invalid_instruction)6518 if (arg0_value == irb->codegen->invalid_inst_src)
5488 return arg0_value;6519 return arg0_value;
54896520
5490 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6521 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5491 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6522 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5492 if (arg1_value == irb->codegen->invalid_instruction)6523 if (arg1_value == irb->codegen->invalid_inst_src)
5493 return arg1_value;6524 return arg1_value;
54946525
5495 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemRem, arg0_value, arg1_value, true);6526 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemRem, arg0_value, arg1_value, true);
5496 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);6527 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
5497 }6528 }
5498 case BuiltinFnIdMod:6529 case BuiltinFnIdMod:
5499 {6530 {
5500 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6531 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5501 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6532 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5502 if (arg0_value == irb->codegen->invalid_instruction)6533 if (arg0_value == irb->codegen->invalid_inst_src)
5503 return arg0_value;6534 return arg0_value;
55046535
5505 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6536 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5506 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6537 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5507 if (arg1_value == irb->codegen->invalid_instruction)6538 if (arg1_value == irb->codegen->invalid_inst_src)
5508 return arg1_value;6539 return arg1_value;
55096540
5510 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemMod, arg0_value, arg1_value, true);6541 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemMod, arg0_value, arg1_value, true);
5511 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);6542 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
5512 }6543 }
5513 case BuiltinFnIdSqrt:6544 case BuiltinFnIdSqrt:
...@@ -5526,406 +6557,406 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo...@@ -5526,406 +6557,406 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
5526 case BuiltinFnIdRound:6557 case BuiltinFnIdRound:
5527 {6558 {
5528 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6559 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5529 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6560 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5530 if (arg0_value == irb->codegen->invalid_instruction)6561 if (arg0_value == irb->codegen->invalid_inst_src)
5531 return arg0_value;6562 return arg0_value;
55326563
5533 IrInstruction *inst = ir_build_float_op(irb, scope, node, arg0_value, builtin_fn->id);6564 IrInstSrc *inst = ir_build_float_op_src(irb, scope, node, arg0_value, builtin_fn->id);
5534 return ir_lval_wrap(irb, scope, inst, lval, result_loc);6565 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
5535 }6566 }
5536 case BuiltinFnIdTruncate:6567 case BuiltinFnIdTruncate:
5537 {6568 {
5538 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6569 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5539 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6570 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5540 if (arg0_value == irb->codegen->invalid_instruction)6571 if (arg0_value == irb->codegen->invalid_inst_src)
5541 return arg0_value;6572 return arg0_value;
55426573
5543 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6574 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5544 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6575 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5545 if (arg1_value == irb->codegen->invalid_instruction)6576 if (arg1_value == irb->codegen->invalid_inst_src)
5546 return arg1_value;6577 return arg1_value;
55476578
5548 IrInstruction *truncate = ir_build_truncate(irb, scope, node, arg0_value, arg1_value);6579 IrInstSrc *truncate = ir_build_truncate(irb, scope, node, arg0_value, arg1_value);
5549 return ir_lval_wrap(irb, scope, truncate, lval, result_loc);6580 return ir_lval_wrap(irb, scope, truncate, lval, result_loc);
5550 }6581 }
5551 case BuiltinFnIdIntCast:6582 case BuiltinFnIdIntCast:
5552 {6583 {
5553 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6584 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5554 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6585 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5555 if (arg0_value == irb->codegen->invalid_instruction)6586 if (arg0_value == irb->codegen->invalid_inst_src)
5556 return arg0_value;6587 return arg0_value;
55576588
5558 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6589 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5559 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6590 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5560 if (arg1_value == irb->codegen->invalid_instruction)6591 if (arg1_value == irb->codegen->invalid_inst_src)
5561 return arg1_value;6592 return arg1_value;
55626593
5563 IrInstruction *result = ir_build_int_cast(irb, scope, node, arg0_value, arg1_value);6594 IrInstSrc *result = ir_build_int_cast(irb, scope, node, arg0_value, arg1_value);
5564 return ir_lval_wrap(irb, scope, result, lval, result_loc);6595 return ir_lval_wrap(irb, scope, result, lval, result_loc);
5565 }6596 }
5566 case BuiltinFnIdFloatCast:6597 case BuiltinFnIdFloatCast:
5567 {6598 {
5568 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6599 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5569 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6600 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5570 if (arg0_value == irb->codegen->invalid_instruction)6601 if (arg0_value == irb->codegen->invalid_inst_src)
5571 return arg0_value;6602 return arg0_value;
55726603
5573 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6604 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5574 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6605 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5575 if (arg1_value == irb->codegen->invalid_instruction)6606 if (arg1_value == irb->codegen->invalid_inst_src)
5576 return arg1_value;6607 return arg1_value;
55776608
5578 IrInstruction *result = ir_build_float_cast(irb, scope, node, arg0_value, arg1_value);6609 IrInstSrc *result = ir_build_float_cast(irb, scope, node, arg0_value, arg1_value);
5579 return ir_lval_wrap(irb, scope, result, lval, result_loc);6610 return ir_lval_wrap(irb, scope, result, lval, result_loc);
5580 }6611 }
5581 case BuiltinFnIdErrSetCast:6612 case BuiltinFnIdErrSetCast:
5582 {6613 {
5583 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6614 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5584 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6615 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5585 if (arg0_value == irb->codegen->invalid_instruction)6616 if (arg0_value == irb->codegen->invalid_inst_src)
5586 return arg0_value;6617 return arg0_value;
55876618
5588 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6619 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5589 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6620 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5590 if (arg1_value == irb->codegen->invalid_instruction)6621 if (arg1_value == irb->codegen->invalid_inst_src)
5591 return arg1_value;6622 return arg1_value;
55926623
5593 IrInstruction *result = ir_build_err_set_cast(irb, scope, node, arg0_value, arg1_value);6624 IrInstSrc *result = ir_build_err_set_cast(irb, scope, node, arg0_value, arg1_value);
5594 return ir_lval_wrap(irb, scope, result, lval, result_loc);6625 return ir_lval_wrap(irb, scope, result, lval, result_loc);
5595 }6626 }
5596 case BuiltinFnIdFromBytes:6627 case BuiltinFnIdFromBytes:
5597 {6628 {
5598 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6629 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5599 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6630 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5600 if (arg0_value == irb->codegen->invalid_instruction)6631 if (arg0_value == irb->codegen->invalid_inst_src)
5601 return arg0_value;6632 return arg0_value;
56026633
5603 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6634 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5604 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6635 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5605 if (arg1_value == irb->codegen->invalid_instruction)6636 if (arg1_value == irb->codegen->invalid_inst_src)
5606 return arg1_value;6637 return arg1_value;
56076638
5608 IrInstruction *result = ir_build_from_bytes(irb, scope, node, arg0_value, arg1_value, result_loc);6639 IrInstSrc *result = ir_build_from_bytes(irb, scope, node, arg0_value, arg1_value, result_loc);
5609 return ir_lval_wrap(irb, scope, result, lval, result_loc);6640 return ir_lval_wrap(irb, scope, result, lval, result_loc);
5610 }6641 }
5611 case BuiltinFnIdToBytes:6642 case BuiltinFnIdToBytes:
5612 {6643 {
5613 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6644 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5614 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6645 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5615 if (arg0_value == irb->codegen->invalid_instruction)6646 if (arg0_value == irb->codegen->invalid_inst_src)
5616 return arg0_value;6647 return arg0_value;
56176648
5618 IrInstruction *result = ir_build_to_bytes(irb, scope, node, arg0_value, result_loc);6649 IrInstSrc *result = ir_build_to_bytes(irb, scope, node, arg0_value, result_loc);
5619 return ir_lval_wrap(irb, scope, result, lval, result_loc);6650 return ir_lval_wrap(irb, scope, result, lval, result_loc);
5620 }6651 }
5621 case BuiltinFnIdIntToFloat:6652 case BuiltinFnIdIntToFloat:
5622 {6653 {
5623 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6654 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5624 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6655 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5625 if (arg0_value == irb->codegen->invalid_instruction)6656 if (arg0_value == irb->codegen->invalid_inst_src)
5626 return arg0_value;6657 return arg0_value;
56276658
5628 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6659 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5629 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6660 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5630 if (arg1_value == irb->codegen->invalid_instruction)6661 if (arg1_value == irb->codegen->invalid_inst_src)
5631 return arg1_value;6662 return arg1_value;
56326663
5633 IrInstruction *result = ir_build_int_to_float(irb, scope, node, arg0_value, arg1_value);6664 IrInstSrc *result = ir_build_int_to_float(irb, scope, node, arg0_value, arg1_value);
5634 return ir_lval_wrap(irb, scope, result, lval, result_loc);6665 return ir_lval_wrap(irb, scope, result, lval, result_loc);
5635 }6666 }
5636 case BuiltinFnIdFloatToInt:6667 case BuiltinFnIdFloatToInt:
5637 {6668 {
5638 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6669 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5639 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6670 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5640 if (arg0_value == irb->codegen->invalid_instruction)6671 if (arg0_value == irb->codegen->invalid_inst_src)
5641 return arg0_value;6672 return arg0_value;
56426673
5643 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6674 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5644 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6675 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5645 if (arg1_value == irb->codegen->invalid_instruction)6676 if (arg1_value == irb->codegen->invalid_inst_src)
5646 return arg1_value;6677 return arg1_value;
56476678
5648 IrInstruction *result = ir_build_float_to_int(irb, scope, node, arg0_value, arg1_value);6679 IrInstSrc *result = ir_build_float_to_int(irb, scope, node, arg0_value, arg1_value);
5649 return ir_lval_wrap(irb, scope, result, lval, result_loc);6680 return ir_lval_wrap(irb, scope, result, lval, result_loc);
5650 }6681 }
5651 case BuiltinFnIdErrToInt:6682 case BuiltinFnIdErrToInt:
5652 {6683 {
5653 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6684 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5654 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6685 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5655 if (arg0_value == irb->codegen->invalid_instruction)6686 if (arg0_value == irb->codegen->invalid_inst_src)
5656 return arg0_value;6687 return arg0_value;
56576688
5658 IrInstruction *result = ir_build_err_to_int(irb, scope, node, arg0_value);6689 IrInstSrc *result = ir_build_err_to_int_src(irb, scope, node, arg0_value);
5659 return ir_lval_wrap(irb, scope, result, lval, result_loc);6690 return ir_lval_wrap(irb, scope, result, lval, result_loc);
5660 }6691 }
5661 case BuiltinFnIdIntToErr:6692 case BuiltinFnIdIntToErr:
5662 {6693 {
5663 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6694 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5664 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6695 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5665 if (arg0_value == irb->codegen->invalid_instruction)6696 if (arg0_value == irb->codegen->invalid_inst_src)
5666 return arg0_value;6697 return arg0_value;
56676698
5668 IrInstruction *result = ir_build_int_to_err(irb, scope, node, arg0_value);6699 IrInstSrc *result = ir_build_int_to_err_src(irb, scope, node, arg0_value);
5669 return ir_lval_wrap(irb, scope, result, lval, result_loc);6700 return ir_lval_wrap(irb, scope, result, lval, result_loc);
5670 }6701 }
5671 case BuiltinFnIdBoolToInt:6702 case BuiltinFnIdBoolToInt:
5672 {6703 {
5673 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6704 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5674 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6705 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5675 if (arg0_value == irb->codegen->invalid_instruction)6706 if (arg0_value == irb->codegen->invalid_inst_src)
5676 return arg0_value;6707 return arg0_value;
56776708
5678 IrInstruction *result = ir_build_bool_to_int(irb, scope, node, arg0_value);6709 IrInstSrc *result = ir_build_bool_to_int(irb, scope, node, arg0_value);
5679 return ir_lval_wrap(irb, scope, result, lval, result_loc);6710 return ir_lval_wrap(irb, scope, result, lval, result_loc);
5680 }6711 }
5681 case BuiltinFnIdIntType:6712 case BuiltinFnIdIntType:
5682 {6713 {
5683 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6714 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5684 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6715 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5685 if (arg0_value == irb->codegen->invalid_instruction)6716 if (arg0_value == irb->codegen->invalid_inst_src)
5686 return arg0_value;6717 return arg0_value;
56876718
5688 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6719 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5689 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6720 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5690 if (arg1_value == irb->codegen->invalid_instruction)6721 if (arg1_value == irb->codegen->invalid_inst_src)
5691 return arg1_value;6722 return arg1_value;
56926723
5693 IrInstruction *int_type = ir_build_int_type(irb, scope, node, arg0_value, arg1_value);6724 IrInstSrc *int_type = ir_build_int_type(irb, scope, node, arg0_value, arg1_value);
5694 return ir_lval_wrap(irb, scope, int_type, lval, result_loc);6725 return ir_lval_wrap(irb, scope, int_type, lval, result_loc);
5695 }6726 }
5696 case BuiltinFnIdVectorType:6727 case BuiltinFnIdVectorType:
5697 {6728 {
5698 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6729 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5699 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6730 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5700 if (arg0_value == irb->codegen->invalid_instruction)6731 if (arg0_value == irb->codegen->invalid_inst_src)
5701 return arg0_value;6732 return arg0_value;
57026733
5703 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6734 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5704 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6735 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5705 if (arg1_value == irb->codegen->invalid_instruction)6736 if (arg1_value == irb->codegen->invalid_inst_src)
5706 return arg1_value;6737 return arg1_value;
57076738
5708 IrInstruction *vector_type = ir_build_vector_type(irb, scope, node, arg0_value, arg1_value);6739 IrInstSrc *vector_type = ir_build_vector_type(irb, scope, node, arg0_value, arg1_value);
5709 return ir_lval_wrap(irb, scope, vector_type, lval, result_loc);6740 return ir_lval_wrap(irb, scope, vector_type, lval, result_loc);
5710 }6741 }
5711 case BuiltinFnIdShuffle:6742 case BuiltinFnIdShuffle:
5712 {6743 {
5713 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6744 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5714 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6745 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5715 if (arg0_value == irb->codegen->invalid_instruction)6746 if (arg0_value == irb->codegen->invalid_inst_src)
5716 return arg0_value;6747 return arg0_value;
57176748
5718 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6749 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5719 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6750 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5720 if (arg1_value == irb->codegen->invalid_instruction)6751 if (arg1_value == irb->codegen->invalid_inst_src)
5721 return arg1_value;6752 return arg1_value;
57226753
5723 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);6754 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
5724 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);6755 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
5725 if (arg2_value == irb->codegen->invalid_instruction)6756 if (arg2_value == irb->codegen->invalid_inst_src)
5726 return arg2_value;6757 return arg2_value;
57276758
5728 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);6759 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
5729 IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);6760 IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
5730 if (arg3_value == irb->codegen->invalid_instruction)6761 if (arg3_value == irb->codegen->invalid_inst_src)
5731 return arg3_value;6762 return arg3_value;
57326763
5733 IrInstruction *shuffle_vector = ir_build_shuffle_vector(irb, scope, node,6764 IrInstSrc *shuffle_vector = ir_build_shuffle_vector(irb, scope, node,
5734 arg0_value, arg1_value, arg2_value, arg3_value);6765 arg0_value, arg1_value, arg2_value, arg3_value);
5735 return ir_lval_wrap(irb, scope, shuffle_vector, lval, result_loc);6766 return ir_lval_wrap(irb, scope, shuffle_vector, lval, result_loc);
5736 }6767 }
5737 case BuiltinFnIdSplat:6768 case BuiltinFnIdSplat:
5738 {6769 {
5739 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6770 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5740 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6771 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5741 if (arg0_value == irb->codegen->invalid_instruction)6772 if (arg0_value == irb->codegen->invalid_inst_src)
5742 return arg0_value;6773 return arg0_value;
57436774
5744 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6775 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5745 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6776 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5746 if (arg1_value == irb->codegen->invalid_instruction)6777 if (arg1_value == irb->codegen->invalid_inst_src)
5747 return arg1_value;6778 return arg1_value;
57486779
5749 IrInstruction *splat = ir_build_splat_src(irb, scope, node,6780 IrInstSrc *splat = ir_build_splat_src(irb, scope, node,
5750 arg0_value, arg1_value);6781 arg0_value, arg1_value);
5751 return ir_lval_wrap(irb, scope, splat, lval, result_loc);6782 return ir_lval_wrap(irb, scope, splat, lval, result_loc);
5752 }6783 }
5753 case BuiltinFnIdMemcpy:6784 case BuiltinFnIdMemcpy:
5754 {6785 {
5755 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6786 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5756 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6787 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5757 if (arg0_value == irb->codegen->invalid_instruction)6788 if (arg0_value == irb->codegen->invalid_inst_src)
5758 return arg0_value;6789 return arg0_value;
57596790
5760 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6791 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5761 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6792 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5762 if (arg1_value == irb->codegen->invalid_instruction)6793 if (arg1_value == irb->codegen->invalid_inst_src)
5763 return arg1_value;6794 return arg1_value;
57646795
5765 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);6796 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
5766 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);6797 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
5767 if (arg2_value == irb->codegen->invalid_instruction)6798 if (arg2_value == irb->codegen->invalid_inst_src)
5768 return arg2_value;6799 return arg2_value;
57696800
5770 IrInstruction *ir_memcpy = ir_build_memcpy(irb, scope, node, arg0_value, arg1_value, arg2_value);6801 IrInstSrc *ir_memcpy = ir_build_memcpy_src(irb, scope, node, arg0_value, arg1_value, arg2_value);
5771 return ir_lval_wrap(irb, scope, ir_memcpy, lval, result_loc);6802 return ir_lval_wrap(irb, scope, ir_memcpy, lval, result_loc);
5772 }6803 }
5773 case BuiltinFnIdMemset:6804 case BuiltinFnIdMemset:
5774 {6805 {
5775 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6806 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5776 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6807 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5777 if (arg0_value == irb->codegen->invalid_instruction)6808 if (arg0_value == irb->codegen->invalid_inst_src)
5778 return arg0_value;6809 return arg0_value;
57796810
5780 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6811 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5781 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6812 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5782 if (arg1_value == irb->codegen->invalid_instruction)6813 if (arg1_value == irb->codegen->invalid_inst_src)
5783 return arg1_value;6814 return arg1_value;
57846815
5785 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);6816 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
5786 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);6817 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
5787 if (arg2_value == irb->codegen->invalid_instruction)6818 if (arg2_value == irb->codegen->invalid_inst_src)
5788 return arg2_value;6819 return arg2_value;
57896820
5790 IrInstruction *ir_memset = ir_build_memset(irb, scope, node, arg0_value, arg1_value, arg2_value);6821 IrInstSrc *ir_memset = ir_build_memset_src(irb, scope, node, arg0_value, arg1_value, arg2_value);
5791 return ir_lval_wrap(irb, scope, ir_memset, lval, result_loc);6822 return ir_lval_wrap(irb, scope, ir_memset, lval, result_loc);
5792 }6823 }
5793 case BuiltinFnIdMemberCount:6824 case BuiltinFnIdMemberCount:
5794 {6825 {
5795 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6826 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5796 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6827 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5797 if (arg0_value == irb->codegen->invalid_instruction)6828 if (arg0_value == irb->codegen->invalid_inst_src)
5798 return arg0_value;6829 return arg0_value;
57996830
5800 IrInstruction *member_count = ir_build_member_count(irb, scope, node, arg0_value);6831 IrInstSrc *member_count = ir_build_member_count(irb, scope, node, arg0_value);
5801 return ir_lval_wrap(irb, scope, member_count, lval, result_loc);6832 return ir_lval_wrap(irb, scope, member_count, lval, result_loc);
5802 }6833 }
5803 case BuiltinFnIdMemberType:6834 case BuiltinFnIdMemberType:
5804 {6835 {
5805 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6836 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5806 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6837 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5807 if (arg0_value == irb->codegen->invalid_instruction)6838 if (arg0_value == irb->codegen->invalid_inst_src)
5808 return arg0_value;6839 return arg0_value;
58096840
5810 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6841 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5811 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6842 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5812 if (arg1_value == irb->codegen->invalid_instruction)6843 if (arg1_value == irb->codegen->invalid_inst_src)
5813 return arg1_value;6844 return arg1_value;
58146845
58156846
5816 IrInstruction *member_type = ir_build_member_type(irb, scope, node, arg0_value, arg1_value);6847 IrInstSrc *member_type = ir_build_member_type(irb, scope, node, arg0_value, arg1_value);
5817 return ir_lval_wrap(irb, scope, member_type, lval, result_loc);6848 return ir_lval_wrap(irb, scope, member_type, lval, result_loc);
5818 }6849 }
5819 case BuiltinFnIdMemberName:6850 case BuiltinFnIdMemberName:
5820 {6851 {
5821 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6852 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5822 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6853 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5823 if (arg0_value == irb->codegen->invalid_instruction)6854 if (arg0_value == irb->codegen->invalid_inst_src)
5824 return arg0_value;6855 return arg0_value;
58256856
5826 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6857 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5827 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6858 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5828 if (arg1_value == irb->codegen->invalid_instruction)6859 if (arg1_value == irb->codegen->invalid_inst_src)
5829 return arg1_value;6860 return arg1_value;
58306861
58316862
5832 IrInstruction *member_name = ir_build_member_name(irb, scope, node, arg0_value, arg1_value);6863 IrInstSrc *member_name = ir_build_member_name(irb, scope, node, arg0_value, arg1_value);
5833 return ir_lval_wrap(irb, scope, member_name, lval, result_loc);6864 return ir_lval_wrap(irb, scope, member_name, lval, result_loc);
5834 }6865 }
5835 case BuiltinFnIdField:6866 case BuiltinFnIdField:
5836 {6867 {
5837 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6868 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5838 IrInstruction *arg0_value = ir_gen_node_extra(irb, arg0_node, scope, LValPtr, nullptr);6869 IrInstSrc *arg0_value = ir_gen_node_extra(irb, arg0_node, scope, LValPtr, nullptr);
5839 if (arg0_value == irb->codegen->invalid_instruction)6870 if (arg0_value == irb->codegen->invalid_inst_src)
5840 return arg0_value;6871 return arg0_value;
58416872
5842 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6873 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5843 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6874 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5844 if (arg1_value == irb->codegen->invalid_instruction)6875 if (arg1_value == irb->codegen->invalid_inst_src)
5845 return arg1_value;6876 return arg1_value;
58466877
5847 IrInstruction *ptr_instruction = ir_build_field_ptr_instruction(irb, scope, node,6878 IrInstSrc *ptr_instruction = ir_build_field_ptr_instruction(irb, scope, node,
5848 arg0_value, arg1_value, false);6879 arg0_value, arg1_value, false);
58496880
5850 if (lval == LValPtr)6881 if (lval == LValPtr)
5851 return ptr_instruction;6882 return ptr_instruction;
58526883
5853 IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);6884 IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
5854 return ir_expr_wrap(irb, scope, load_ptr, result_loc);6885 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
5855 }6886 }
5856 case BuiltinFnIdHasField:6887 case BuiltinFnIdHasField:
5857 {6888 {
5858 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6889 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5859 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6890 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5860 if (arg0_value == irb->codegen->invalid_instruction)6891 if (arg0_value == irb->codegen->invalid_inst_src)
5861 return arg0_value;6892 return arg0_value;
58626893
5863 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6894 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5864 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);6895 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5865 if (arg1_value == irb->codegen->invalid_instruction)6896 if (arg1_value == irb->codegen->invalid_inst_src)
5866 return arg1_value;6897 return arg1_value;
58676898
5868 IrInstruction *type_info = ir_build_has_field(irb, scope, node, arg0_value, arg1_value);6899 IrInstSrc *type_info = ir_build_has_field(irb, scope, node, arg0_value, arg1_value);
5869 return ir_lval_wrap(irb, scope, type_info, lval, result_loc);6900 return ir_lval_wrap(irb, scope, type_info, lval, result_loc);
5870 }6901 }
5871 case BuiltinFnIdTypeInfo:6902 case BuiltinFnIdTypeInfo:
5872 {6903 {
5873 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6904 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5874 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6905 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5875 if (arg0_value == irb->codegen->invalid_instruction)6906 if (arg0_value == irb->codegen->invalid_inst_src)
5876 return arg0_value;6907 return arg0_value;
58776908
5878 IrInstruction *type_info = ir_build_type_info(irb, scope, node, arg0_value);6909 IrInstSrc *type_info = ir_build_type_info(irb, scope, node, arg0_value);
5879 return ir_lval_wrap(irb, scope, type_info, lval, result_loc);6910 return ir_lval_wrap(irb, scope, type_info, lval, result_loc);
5880 }6911 }
5881 case BuiltinFnIdType:6912 case BuiltinFnIdType:
5882 {6913 {
5883 AstNode *arg_node = node->data.fn_call_expr.params.at(0);6914 AstNode *arg_node = node->data.fn_call_expr.params.at(0);
5884 IrInstruction *arg = ir_gen_node(irb, arg_node, scope);6915 IrInstSrc *arg = ir_gen_node(irb, arg_node, scope);
5885 if (arg == irb->codegen->invalid_instruction)6916 if (arg == irb->codegen->invalid_inst_src)
5886 return arg;6917 return arg;
58876918
5888 IrInstruction *type = ir_build_type(irb, scope, node, arg);6919 IrInstSrc *type = ir_build_type(irb, scope, node, arg);
5889 return ir_lval_wrap(irb, scope, type, lval, result_loc);6920 return ir_lval_wrap(irb, scope, type, lval, result_loc);
5890 }6921 }
5891 case BuiltinFnIdBreakpoint:6922 case BuiltinFnIdBreakpoint:
5892 return ir_lval_wrap(irb, scope, ir_build_breakpoint(irb, scope, node), lval, result_loc);6923 return ir_lval_wrap(irb, scope, ir_build_breakpoint(irb, scope, node), lval, result_loc);
5893 case BuiltinFnIdReturnAddress:6924 case BuiltinFnIdReturnAddress:
5894 return ir_lval_wrap(irb, scope, ir_build_return_address(irb, scope, node), lval, result_loc);6925 return ir_lval_wrap(irb, scope, ir_build_return_address_src(irb, scope, node), lval, result_loc);
5895 case BuiltinFnIdFrameAddress:6926 case BuiltinFnIdFrameAddress:
5896 return ir_lval_wrap(irb, scope, ir_build_frame_address(irb, scope, node), lval, result_loc);6927 return ir_lval_wrap(irb, scope, ir_build_frame_address_src(irb, scope, node), lval, result_loc);
5897 case BuiltinFnIdFrameHandle:6928 case BuiltinFnIdFrameHandle:
5898 if (!irb->exec->fn_entry) {6929 if (!irb->exec->fn_entry) {
5899 add_node_error(irb->codegen, node, buf_sprintf("@frame() called outside of function definition"));6930 add_node_error(irb->codegen, node, buf_sprintf("@frame() called outside of function definition"));
5900 return irb->codegen->invalid_instruction;6931 return irb->codegen->invalid_inst_src;
5901 }6932 }
5902 return ir_lval_wrap(irb, scope, ir_build_handle(irb, scope, node), lval, result_loc);6933 return ir_lval_wrap(irb, scope, ir_build_handle_src(irb, scope, node), lval, result_loc);
5903 case BuiltinFnIdFrameType: {6934 case BuiltinFnIdFrameType: {
5904 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6935 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5905 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6936 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5906 if (arg0_value == irb->codegen->invalid_instruction)6937 if (arg0_value == irb->codegen->invalid_inst_src)
5907 return arg0_value;6938 return arg0_value;
59086939
5909 IrInstruction *frame_type = ir_build_frame_type(irb, scope, node, arg0_value);6940 IrInstSrc *frame_type = ir_build_frame_type(irb, scope, node, arg0_value);
5910 return ir_lval_wrap(irb, scope, frame_type, lval, result_loc);6941 return ir_lval_wrap(irb, scope, frame_type, lval, result_loc);
5911 }6942 }
5912 case BuiltinFnIdFrameSize: {6943 case BuiltinFnIdFrameSize: {
5913 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6944 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5914 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6945 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5915 if (arg0_value == irb->codegen->invalid_instruction)6946 if (arg0_value == irb->codegen->invalid_inst_src)
5916 return arg0_value;6947 return arg0_value;
59176948
5918 IrInstruction *frame_size = ir_build_frame_size_src(irb, scope, node, arg0_value);6949 IrInstSrc *frame_size = ir_build_frame_size_src(irb, scope, node, arg0_value);
5919 return ir_lval_wrap(irb, scope, frame_size, lval, result_loc);6950 return ir_lval_wrap(irb, scope, frame_size, lval, result_loc);
5920 }6951 }
5921 case BuiltinFnIdAlignOf:6952 case BuiltinFnIdAlignOf:
5922 {6953 {
5923 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6954 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5924 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6955 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5925 if (arg0_value == irb->codegen->invalid_instruction)6956 if (arg0_value == irb->codegen->invalid_inst_src)
5926 return arg0_value;6957 return arg0_value;
59276958
5928 IrInstruction *align_of = ir_build_align_of(irb, scope, node, arg0_value);6959 IrInstSrc *align_of = ir_build_align_of(irb, scope, node, arg0_value);
5929 return ir_lval_wrap(irb, scope, align_of, lval, result_loc);6960 return ir_lval_wrap(irb, scope, align_of, lval, result_loc);
5930 }6961 }
5931 case BuiltinFnIdAddWithOverflow:6962 case BuiltinFnIdAddWithOverflow:
...@@ -5941,43 +6972,43 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo...@@ -5941,43 +6972,43 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
5941 case BuiltinFnIdTypeName:6972 case BuiltinFnIdTypeName:
5942 {6973 {
5943 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6974 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5944 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6975 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5945 if (arg0_value == irb->codegen->invalid_instruction)6976 if (arg0_value == irb->codegen->invalid_inst_src)
5946 return arg0_value;6977 return arg0_value;
59476978
5948 IrInstruction *type_name = ir_build_type_name(irb, scope, node, arg0_value);6979 IrInstSrc *type_name = ir_build_type_name(irb, scope, node, arg0_value);
5949 return ir_lval_wrap(irb, scope, type_name, lval, result_loc);6980 return ir_lval_wrap(irb, scope, type_name, lval, result_loc);
5950 }6981 }
5951 case BuiltinFnIdPanic:6982 case BuiltinFnIdPanic:
5952 {6983 {
5953 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6984 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5954 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6985 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5955 if (arg0_value == irb->codegen->invalid_instruction)6986 if (arg0_value == irb->codegen->invalid_inst_src)
5956 return arg0_value;6987 return arg0_value;
59576988
5958 IrInstruction *panic = ir_build_panic(irb, scope, node, arg0_value);6989 IrInstSrc *panic = ir_build_panic_src(irb, scope, node, arg0_value);
5959 return ir_lval_wrap(irb, scope, panic, lval, result_loc);6990 return ir_lval_wrap(irb, scope, panic, lval, result_loc);
5960 }6991 }
5961 case BuiltinFnIdPtrCast:6992 case BuiltinFnIdPtrCast:
5962 {6993 {
5963 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);6994 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5964 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);6995 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
5965 if (arg0_value == irb->codegen->invalid_instruction)6996 if (arg0_value == irb->codegen->invalid_inst_src)
5966 return arg0_value;6997 return arg0_value;
59676998
5968 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);6999 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5969 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);7000 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
5970 if (arg1_value == irb->codegen->invalid_instruction)7001 if (arg1_value == irb->codegen->invalid_inst_src)
5971 return arg1_value;7002 return arg1_value;
59727003
5973 IrInstruction *ptr_cast = ir_build_ptr_cast_src(irb, scope, node, arg0_value, arg1_value, true);7004 IrInstSrc *ptr_cast = ir_build_ptr_cast_src(irb, scope, node, arg0_value, arg1_value, true);
5974 return ir_lval_wrap(irb, scope, ptr_cast, lval, result_loc);7005 return ir_lval_wrap(irb, scope, ptr_cast, lval, result_loc);
5975 }7006 }
5976 case BuiltinFnIdBitCast:7007 case BuiltinFnIdBitCast:
5977 {7008 {
5978 AstNode *dest_type_node = node->data.fn_call_expr.params.at(0);7009 AstNode *dest_type_node = node->data.fn_call_expr.params.at(0);
5979 IrInstruction *dest_type = ir_gen_node(irb, dest_type_node, scope);7010 IrInstSrc *dest_type = ir_gen_node(irb, dest_type_node, scope);
5980 if (dest_type == irb->codegen->invalid_instruction)7011 if (dest_type == irb->codegen->invalid_inst_src)
5981 return dest_type;7012 return dest_type;
59827013
5983 ResultLocBitCast *result_loc_bit_cast = allocate<ResultLocBitCast>(1);7014 ResultLocBitCast *result_loc_bit_cast = allocate<ResultLocBitCast>(1);
...@@ -5989,126 +7020,126 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo...@@ -5989,126 +7020,126 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
5989 ir_build_reset_result(irb, scope, node, &result_loc_bit_cast->base);7020 ir_build_reset_result(irb, scope, node, &result_loc_bit_cast->base);
59907021
5991 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7022 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5992 IrInstruction *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,7023 IrInstSrc *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,
5993 &result_loc_bit_cast->base);7024 &result_loc_bit_cast->base);
5994 if (arg1_value == irb->codegen->invalid_instruction)7025 if (arg1_value == irb->codegen->invalid_inst_src)
5995 return arg1_value;7026 return arg1_value;
59967027
5997 IrInstruction *bitcast = ir_build_bit_cast_src(irb, scope, arg1_node, arg1_value, result_loc_bit_cast);7028 IrInstSrc *bitcast = ir_build_bit_cast_src(irb, scope, arg1_node, arg1_value, result_loc_bit_cast);
5998 return ir_lval_wrap(irb, scope, bitcast, lval, result_loc);7029 return ir_lval_wrap(irb, scope, bitcast, lval, result_loc);
5999 }7030 }
6000 case BuiltinFnIdAs:7031 case BuiltinFnIdAs:
6001 {7032 {
6002 AstNode *dest_type_node = node->data.fn_call_expr.params.at(0);7033 AstNode *dest_type_node = node->data.fn_call_expr.params.at(0);
6003 IrInstruction *dest_type = ir_gen_node(irb, dest_type_node, scope);7034 IrInstSrc *dest_type = ir_gen_node(irb, dest_type_node, scope);
6004 if (dest_type == irb->codegen->invalid_instruction)7035 if (dest_type == irb->codegen->invalid_inst_src)
6005 return dest_type;7036 return dest_type;
60067037
6007 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, dest_type, result_loc);7038 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, dest_type, result_loc);
60087039
6009 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7040 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6010 IrInstruction *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,7041 IrInstSrc *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,
6011 &result_loc_cast->base);7042 &result_loc_cast->base);
6012 if (arg1_value == irb->codegen->invalid_instruction)7043 if (arg1_value == irb->codegen->invalid_inst_src)
6013 return arg1_value;7044 return arg1_value;
60147045
6015 IrInstruction *result = ir_build_implicit_cast(irb, scope, node, arg1_value, result_loc_cast);7046 IrInstSrc *result = ir_build_implicit_cast(irb, scope, node, arg1_value, result_loc_cast);
6016 return ir_lval_wrap(irb, scope, result, lval, result_loc);7047 return ir_lval_wrap(irb, scope, result, lval, result_loc);
6017 }7048 }
6018 case BuiltinFnIdIntToPtr:7049 case BuiltinFnIdIntToPtr:
6019 {7050 {
6020 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7051 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6021 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7052 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6022 if (arg0_value == irb->codegen->invalid_instruction)7053 if (arg0_value == irb->codegen->invalid_inst_src)
6023 return arg0_value;7054 return arg0_value;
60247055
6025 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7056 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6026 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);7057 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6027 if (arg1_value == irb->codegen->invalid_instruction)7058 if (arg1_value == irb->codegen->invalid_inst_src)
6028 return arg1_value;7059 return arg1_value;
60297060
6030 IrInstruction *int_to_ptr = ir_build_int_to_ptr(irb, scope, node, arg0_value, arg1_value);7061 IrInstSrc *int_to_ptr = ir_build_int_to_ptr_src(irb, scope, node, arg0_value, arg1_value);
6031 return ir_lval_wrap(irb, scope, int_to_ptr, lval, result_loc);7062 return ir_lval_wrap(irb, scope, int_to_ptr, lval, result_loc);
6032 }7063 }
6033 case BuiltinFnIdPtrToInt:7064 case BuiltinFnIdPtrToInt:
6034 {7065 {
6035 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7066 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6036 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7067 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6037 if (arg0_value == irb->codegen->invalid_instruction)7068 if (arg0_value == irb->codegen->invalid_inst_src)
6038 return arg0_value;7069 return arg0_value;
60397070
6040 IrInstruction *ptr_to_int = ir_build_ptr_to_int(irb, scope, node, arg0_value);7071 IrInstSrc *ptr_to_int = ir_build_ptr_to_int_src(irb, scope, node, arg0_value);
6041 return ir_lval_wrap(irb, scope, ptr_to_int, lval, result_loc);7072 return ir_lval_wrap(irb, scope, ptr_to_int, lval, result_loc);
6042 }7073 }
6043 case BuiltinFnIdTagName:7074 case BuiltinFnIdTagName:
6044 {7075 {
6045 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7076 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6046 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7077 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6047 if (arg0_value == irb->codegen->invalid_instruction)7078 if (arg0_value == irb->codegen->invalid_inst_src)
6048 return arg0_value;7079 return arg0_value;
60497080
6050 IrInstruction *actual_tag = ir_build_union_tag(irb, scope, node, arg0_value);7081 IrInstSrc *tag_name = ir_build_tag_name_src(irb, scope, node, arg0_value);
6051 IrInstruction *tag_name = ir_build_tag_name(irb, scope, node, actual_tag);
6052 return ir_lval_wrap(irb, scope, tag_name, lval, result_loc);7082 return ir_lval_wrap(irb, scope, tag_name, lval, result_loc);
6053 }7083 }
6054 case BuiltinFnIdTagType:7084 case BuiltinFnIdTagType:
6055 {7085 {
6056 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7086 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6057 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7087 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6058 if (arg0_value == irb->codegen->invalid_instruction)7088 if (arg0_value == irb->codegen->invalid_inst_src)
6059 return arg0_value;7089 return arg0_value;
60607090
6061 IrInstruction *tag_type = ir_build_tag_type(irb, scope, node, arg0_value);7091 IrInstSrc *tag_type = ir_build_tag_type(irb, scope, node, arg0_value);
6062 return ir_lval_wrap(irb, scope, tag_type, lval, result_loc);7092 return ir_lval_wrap(irb, scope, tag_type, lval, result_loc);
6063 }7093 }
6064 case BuiltinFnIdFieldParentPtr:7094 case BuiltinFnIdFieldParentPtr:
6065 {7095 {
6066 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7096 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6067 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7097 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6068 if (arg0_value == irb->codegen->invalid_instruction)7098 if (arg0_value == irb->codegen->invalid_inst_src)
6069 return arg0_value;7099 return arg0_value;
60707100
6071 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7101 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6072 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);7102 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6073 if (arg1_value == irb->codegen->invalid_instruction)7103 if (arg1_value == irb->codegen->invalid_inst_src)
6074 return arg1_value;7104 return arg1_value;
60757105
6076 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);7106 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
6077 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);7107 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
6078 if (arg2_value == irb->codegen->invalid_instruction)7108 if (arg2_value == irb->codegen->invalid_inst_src)
6079 return arg2_value;7109 return arg2_value;
60807110
6081 IrInstruction *field_parent_ptr = ir_build_field_parent_ptr(irb, scope, node, arg0_value, arg1_value, arg2_value, nullptr);7111 IrInstSrc *field_parent_ptr = ir_build_field_parent_ptr_src(irb, scope, node,
7112 arg0_value, arg1_value, arg2_value);
6082 return ir_lval_wrap(irb, scope, field_parent_ptr, lval, result_loc);7113 return ir_lval_wrap(irb, scope, field_parent_ptr, lval, result_loc);
6083 }7114 }
6084 case BuiltinFnIdByteOffsetOf:7115 case BuiltinFnIdByteOffsetOf:
6085 {7116 {
6086 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7117 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6087 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7118 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6088 if (arg0_value == irb->codegen->invalid_instruction)7119 if (arg0_value == irb->codegen->invalid_inst_src)
6089 return arg0_value;7120 return arg0_value;
60907121
6091 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7122 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6092 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);7123 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6093 if (arg1_value == irb->codegen->invalid_instruction)7124 if (arg1_value == irb->codegen->invalid_inst_src)
6094 return arg1_value;7125 return arg1_value;
60957126
6096 IrInstruction *offset_of = ir_build_byte_offset_of(irb, scope, node, arg0_value, arg1_value);7127 IrInstSrc *offset_of = ir_build_byte_offset_of(irb, scope, node, arg0_value, arg1_value);
6097 return ir_lval_wrap(irb, scope, offset_of, lval, result_loc);7128 return ir_lval_wrap(irb, scope, offset_of, lval, result_loc);
6098 }7129 }
6099 case BuiltinFnIdBitOffsetOf:7130 case BuiltinFnIdBitOffsetOf:
6100 {7131 {
6101 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7132 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6102 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7133 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6103 if (arg0_value == irb->codegen->invalid_instruction)7134 if (arg0_value == irb->codegen->invalid_inst_src)
6104 return arg0_value;7135 return arg0_value;
61057136
6106 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7137 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6107 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);7138 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6108 if (arg1_value == irb->codegen->invalid_instruction)7139 if (arg1_value == irb->codegen->invalid_inst_src)
6109 return arg1_value;7140 return arg1_value;
61107141
6111 IrInstruction *offset_of = ir_build_bit_offset_of(irb, scope, node, arg0_value, arg1_value);7142 IrInstSrc *offset_of = ir_build_bit_offset_of(irb, scope, node, arg0_value, arg1_value);
6112 return ir_lval_wrap(irb, scope, offset_of, lval, result_loc);7143 return ir_lval_wrap(irb, scope, offset_of, lval, result_loc);
6113 }7144 }
6114 case BuiltinFnIdNewStackCall:7145 case BuiltinFnIdNewStackCall:
...@@ -6117,45 +7148,45 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo...@@ -6117,45 +7148,45 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
6117 add_node_error(irb->codegen, node,7148 add_node_error(irb->codegen, node,
6118 buf_sprintf("expected at least 2 arguments, found %" ZIG_PRI_usize,7149 buf_sprintf("expected at least 2 arguments, found %" ZIG_PRI_usize,
6119 node->data.fn_call_expr.params.length));7150 node->data.fn_call_expr.params.length));
6120 return irb->codegen->invalid_instruction;7151 return irb->codegen->invalid_inst_src;
6121 }7152 }
61227153
6123 AstNode *new_stack_node = node->data.fn_call_expr.params.at(0);7154 AstNode *new_stack_node = node->data.fn_call_expr.params.at(0);
6124 IrInstruction *new_stack = ir_gen_node(irb, new_stack_node, scope);7155 IrInstSrc *new_stack = ir_gen_node(irb, new_stack_node, scope);
6125 if (new_stack == irb->codegen->invalid_instruction)7156 if (new_stack == irb->codegen->invalid_inst_src)
6126 return new_stack;7157 return new_stack;
61277158
6128 AstNode *fn_ref_node = node->data.fn_call_expr.params.at(1);7159 AstNode *fn_ref_node = node->data.fn_call_expr.params.at(1);
6129 IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);7160 IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
6130 if (fn_ref == irb->codegen->invalid_instruction)7161 if (fn_ref == irb->codegen->invalid_inst_src)
6131 return fn_ref;7162 return fn_ref;
61327163
6133 size_t arg_count = node->data.fn_call_expr.params.length - 2;7164 size_t arg_count = node->data.fn_call_expr.params.length - 2;
61347165
6135 IrInstruction **args = allocate<IrInstruction*>(arg_count);7166 IrInstSrc **args = allocate<IrInstSrc*>(arg_count);
6136 for (size_t i = 0; i < arg_count; i += 1) {7167 for (size_t i = 0; i < arg_count; i += 1) {
6137 AstNode *arg_node = node->data.fn_call_expr.params.at(i + 2);7168 AstNode *arg_node = node->data.fn_call_expr.params.at(i + 2);
6138 args[i] = ir_gen_node(irb, arg_node, scope);7169 args[i] = ir_gen_node(irb, arg_node, scope);
6139 if (args[i] == irb->codegen->invalid_instruction)7170 if (args[i] == irb->codegen->invalid_inst_src)
6140 return args[i];7171 return args[i];
6141 }7172 }
61427173
6143 IrInstruction *call = ir_build_call_src(irb, scope, node, nullptr, fn_ref, arg_count, args,7174 IrInstSrc *call = ir_build_call_src(irb, scope, node, nullptr, fn_ref, arg_count, args,
6144 nullptr, CallModifierNone, false, new_stack, result_loc);7175 nullptr, CallModifierNone, false, new_stack, result_loc);
6145 return ir_lval_wrap(irb, scope, call, lval, result_loc);7176 return ir_lval_wrap(irb, scope, call, lval, result_loc);
6146 }7177 }
6147 case BuiltinFnIdCall: {7178 case BuiltinFnIdCall: {
6148 // Cast the options parameter to the options type7179 // Cast the options parameter to the options type
6149 ZigType *options_type = get_builtin_type(irb->codegen, "CallOptions");7180 ZigType *options_type = get_builtin_type(irb->codegen, "CallOptions");
6150 IrInstruction *options_type_inst = ir_build_const_type(irb, scope, node, options_type);7181 IrInstSrc *options_type_inst = ir_build_const_type(irb, scope, node, options_type);
6151 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, options_type_inst, no_result_loc());7182 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, options_type_inst, no_result_loc());
61527183
6153 AstNode *options_node = node->data.fn_call_expr.params.at(0);7184 AstNode *options_node = node->data.fn_call_expr.params.at(0);
6154 IrInstruction *options_inner = ir_gen_node_extra(irb, options_node, scope,7185 IrInstSrc *options_inner = ir_gen_node_extra(irb, options_node, scope,
6155 LValNone, &result_loc_cast->base);7186 LValNone, &result_loc_cast->base);
6156 if (options_inner == irb->codegen->invalid_instruction)7187 if (options_inner == irb->codegen->invalid_inst_src)
6157 return options_inner;7188 return options_inner;
6158 IrInstruction *options = ir_build_implicit_cast(irb, scope, options_node, options_inner, result_loc_cast);7189 IrInstSrc *options = ir_build_implicit_cast(irb, scope, options_node, options_inner, result_loc_cast);
61597190
6160 AstNode *fn_ref_node = node->data.fn_call_expr.params.at(1);7191 AstNode *fn_ref_node = node->data.fn_call_expr.params.at(1);
6161 AstNode *args_node = node->data.fn_call_expr.params.at(2);7192 AstNode *args_node = node->data.fn_call_expr.params.at(2);
...@@ -6171,18 +7202,18 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo...@@ -6171,18 +7202,18 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
6171 } else {7202 } else {
6172 exec_add_error_node(irb->codegen, irb->exec, args_node,7203 exec_add_error_node(irb->codegen, irb->exec, args_node,
6173 buf_sprintf("TODO: @call with anon struct literal"));7204 buf_sprintf("TODO: @call with anon struct literal"));
6174 return irb->codegen->invalid_instruction;7205 return irb->codegen->invalid_inst_src;
6175 }7206 }
6176 } else {7207 } else {
6177 IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);7208 IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
6178 if (fn_ref == irb->codegen->invalid_instruction)7209 if (fn_ref == irb->codegen->invalid_inst_src)
6179 return fn_ref;7210 return fn_ref;
61807211
6181 IrInstruction *args = ir_gen_node(irb, args_node, scope);7212 IrInstSrc *args = ir_gen_node(irb, args_node, scope);
6182 if (args == irb->codegen->invalid_instruction)7213 if (args == irb->codegen->invalid_inst_src)
6183 return args;7214 return args;
61847215
6185 IrInstruction *call = ir_build_call_extra(irb, scope, node, options, fn_ref, args, result_loc);7216 IrInstSrc *call = ir_build_call_extra(irb, scope, node, options, fn_ref, args, result_loc);
6186 return ir_lval_wrap(irb, scope, call, lval, result_loc);7217 return ir_lval_wrap(irb, scope, call, lval, result_loc);
6187 }7218 }
6188 }7219 }
...@@ -6191,237 +7222,233 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo...@@ -6191,237 +7222,233 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
6191 case BuiltinFnIdTypeId:7222 case BuiltinFnIdTypeId:
6192 {7223 {
6193 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7224 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6194 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7225 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6195 if (arg0_value == irb->codegen->invalid_instruction)7226 if (arg0_value == irb->codegen->invalid_inst_src)
6196 return arg0_value;7227 return arg0_value;
61977228
6198 IrInstruction *type_id = ir_build_type_id(irb, scope, node, arg0_value);7229 IrInstSrc *type_id = ir_build_type_id(irb, scope, node, arg0_value);
6199 return ir_lval_wrap(irb, scope, type_id, lval, result_loc);7230 return ir_lval_wrap(irb, scope, type_id, lval, result_loc);
6200 }7231 }
6201 case BuiltinFnIdShlExact:7232 case BuiltinFnIdShlExact:
6202 {7233 {
6203 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7234 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6204 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7235 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6205 if (arg0_value == irb->codegen->invalid_instruction)7236 if (arg0_value == irb->codegen->invalid_inst_src)
6206 return arg0_value;7237 return arg0_value;
62077238
6208 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7239 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6209 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);7240 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6210 if (arg1_value == irb->codegen->invalid_instruction)7241 if (arg1_value == irb->codegen->invalid_inst_src)
6211 return arg1_value;7242 return arg1_value;
62127243
6213 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftLeftExact, arg0_value, arg1_value, true);7244 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftLeftExact, arg0_value, arg1_value, true);
6214 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);7245 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
6215 }7246 }
6216 case BuiltinFnIdShrExact:7247 case BuiltinFnIdShrExact:
6217 {7248 {
6218 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7249 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6219 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7250 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6220 if (arg0_value == irb->codegen->invalid_instruction)7251 if (arg0_value == irb->codegen->invalid_inst_src)
6221 return arg0_value;7252 return arg0_value;
62227253
6223 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7254 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6224 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);7255 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6225 if (arg1_value == irb->codegen->invalid_instruction)7256 if (arg1_value == irb->codegen->invalid_inst_src)
6226 return arg1_value;7257 return arg1_value;
62277258
6228 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftRightExact, arg0_value, arg1_value, true);7259 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftRightExact, arg0_value, arg1_value, true);
6229 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);7260 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
6230 }7261 }
6231 case BuiltinFnIdSetEvalBranchQuota:7262 case BuiltinFnIdSetEvalBranchQuota:
6232 {7263 {
6233 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7264 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6234 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7265 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6235 if (arg0_value == irb->codegen->invalid_instruction)7266 if (arg0_value == irb->codegen->invalid_inst_src)
6236 return arg0_value;7267 return arg0_value;
62377268
6238 IrInstruction *set_eval_branch_quota = ir_build_set_eval_branch_quota(irb, scope, node, arg0_value);7269 IrInstSrc *set_eval_branch_quota = ir_build_set_eval_branch_quota(irb, scope, node, arg0_value);
6239 return ir_lval_wrap(irb, scope, set_eval_branch_quota, lval, result_loc);7270 return ir_lval_wrap(irb, scope, set_eval_branch_quota, lval, result_loc);
6240 }7271 }
6241 case BuiltinFnIdAlignCast:7272 case BuiltinFnIdAlignCast:
6242 {7273 {
6243 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7274 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6244 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7275 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6245 if (arg0_value == irb->codegen->invalid_instruction)7276 if (arg0_value == irb->codegen->invalid_inst_src)
6246 return arg0_value;7277 return arg0_value;
62477278
6248 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7279 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6249 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);7280 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6250 if (arg1_value == irb->codegen->invalid_instruction)7281 if (arg1_value == irb->codegen->invalid_inst_src)
6251 return arg1_value;7282 return arg1_value;
62527283
6253 IrInstruction *align_cast = ir_build_align_cast(irb, scope, node, arg0_value, arg1_value);7284 IrInstSrc *align_cast = ir_build_align_cast_src(irb, scope, node, arg0_value, arg1_value);
6254 return ir_lval_wrap(irb, scope, align_cast, lval, result_loc);7285 return ir_lval_wrap(irb, scope, align_cast, lval, result_loc);
6255 }7286 }
6256 case BuiltinFnIdOpaqueType:7287 case BuiltinFnIdOpaqueType:
6257 {7288 {
6258 IrInstruction *opaque_type = ir_build_opaque_type(irb, scope, node);7289 IrInstSrc *opaque_type = ir_build_opaque_type(irb, scope, node);
6259 return ir_lval_wrap(irb, scope, opaque_type, lval, result_loc);7290 return ir_lval_wrap(irb, scope, opaque_type, lval, result_loc);
6260 }7291 }
6261 case BuiltinFnIdThis:7292 case BuiltinFnIdThis:
6262 {7293 {
6263 IrInstruction *this_inst = ir_gen_this(irb, scope, node);7294 IrInstSrc *this_inst = ir_gen_this(irb, scope, node);
6264 return ir_lval_wrap(irb, scope, this_inst, lval, result_loc);7295 return ir_lval_wrap(irb, scope, this_inst, lval, result_loc);
6265 }7296 }
6266 case BuiltinFnIdSetAlignStack:7297 case BuiltinFnIdSetAlignStack:
6267 {7298 {
6268 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7299 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6269 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7300 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6270 if (arg0_value == irb->codegen->invalid_instruction)7301 if (arg0_value == irb->codegen->invalid_inst_src)
6271 return arg0_value;7302 return arg0_value;
62727303
6273 IrInstruction *set_align_stack = ir_build_set_align_stack(irb, scope, node, arg0_value);7304 IrInstSrc *set_align_stack = ir_build_set_align_stack(irb, scope, node, arg0_value);
6274 return ir_lval_wrap(irb, scope, set_align_stack, lval, result_loc);7305 return ir_lval_wrap(irb, scope, set_align_stack, lval, result_loc);
6275 }7306 }
6276 case BuiltinFnIdArgType:7307 case BuiltinFnIdArgType:
6277 {7308 {
6278 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7309 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6279 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7310 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6280 if (arg0_value == irb->codegen->invalid_instruction)7311 if (arg0_value == irb->codegen->invalid_inst_src)
6281 return arg0_value;7312 return arg0_value;
62827313
6283 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7314 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6284 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);7315 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6285 if (arg1_value == irb->codegen->invalid_instruction)7316 if (arg1_value == irb->codegen->invalid_inst_src)
6286 return arg1_value;7317 return arg1_value;
62877318
6288 IrInstruction *arg_type = ir_build_arg_type(irb, scope, node, arg0_value, arg1_value, false);7319 IrInstSrc *arg_type = ir_build_arg_type(irb, scope, node, arg0_value, arg1_value, false);
6289 return ir_lval_wrap(irb, scope, arg_type, lval, result_loc);7320 return ir_lval_wrap(irb, scope, arg_type, lval, result_loc);
6290 }7321 }
6291 case BuiltinFnIdExport:7322 case BuiltinFnIdExport:
6292 {7323 {
6293 // Cast the options parameter to the options type7324 // Cast the options parameter to the options type
6294 ZigType *options_type = get_builtin_type(irb->codegen, "ExportOptions");7325 ZigType *options_type = get_builtin_type(irb->codegen, "ExportOptions");
6295 IrInstruction *options_type_inst = ir_build_const_type(irb, scope, node, options_type);7326 IrInstSrc *options_type_inst = ir_build_const_type(irb, scope, node, options_type);
6296 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, options_type_inst, no_result_loc());7327 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, options_type_inst, no_result_loc());
62977328
6298 AstNode *target_node = node->data.fn_call_expr.params.at(0);7329 AstNode *target_node = node->data.fn_call_expr.params.at(0);
6299 IrInstruction *target_value = ir_gen_node(irb, target_node, scope);7330 IrInstSrc *target_value = ir_gen_node(irb, target_node, scope);
6300 if (target_value == irb->codegen->invalid_instruction)7331 if (target_value == irb->codegen->invalid_inst_src)
6301 return target_value;7332 return target_value;
63027333
6303 AstNode *options_node = node->data.fn_call_expr.params.at(1);7334 AstNode *options_node = node->data.fn_call_expr.params.at(1);
6304 IrInstruction *options_value = ir_gen_node_extra(irb, options_node,7335 IrInstSrc *options_value = ir_gen_node_extra(irb, options_node,
6305 scope, LValNone, &result_loc_cast->base);7336 scope, LValNone, &result_loc_cast->base);
6306 if (options_value == irb->codegen->invalid_instruction)7337 if (options_value == irb->codegen->invalid_inst_src)
6307 return options_value;7338 return options_value;
63087339
6309 IrInstruction *casted_options_value = ir_build_implicit_cast(7340 IrInstSrc *casted_options_value = ir_build_implicit_cast(
6310 irb, scope, options_node, options_value, result_loc_cast);7341 irb, scope, options_node, options_value, result_loc_cast);
63117342
6312 IrInstruction *ir_export = ir_build_export(irb, scope, node, target_value, casted_options_value);7343 IrInstSrc *ir_export = ir_build_export(irb, scope, node, target_value, casted_options_value);
6313 return ir_lval_wrap(irb, scope, ir_export, lval, result_loc);7344 return ir_lval_wrap(irb, scope, ir_export, lval, result_loc);
6314 }7345 }
6315 case BuiltinFnIdErrorReturnTrace:7346 case BuiltinFnIdErrorReturnTrace:
6316 {7347 {
6317 IrInstruction *error_return_trace = ir_build_error_return_trace(irb, scope, node, IrInstructionErrorReturnTrace::Null);7348 IrInstSrc *error_return_trace = ir_build_error_return_trace_src(irb, scope, node,
7349 IrInstErrorReturnTraceNull);
6318 return ir_lval_wrap(irb, scope, error_return_trace, lval, result_loc);7350 return ir_lval_wrap(irb, scope, error_return_trace, lval, result_loc);
6319 }7351 }
6320 case BuiltinFnIdAtomicRmw:7352 case BuiltinFnIdAtomicRmw:
6321 {7353 {
6322 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7354 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6323 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7355 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6324 if (arg0_value == irb->codegen->invalid_instruction)7356 if (arg0_value == irb->codegen->invalid_inst_src)
6325 return arg0_value;7357 return arg0_value;
63267358
6327 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7359 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6328 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);7360 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6329 if (arg1_value == irb->codegen->invalid_instruction)7361 if (arg1_value == irb->codegen->invalid_inst_src)
6330 return arg1_value;7362 return arg1_value;
63317363
6332 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);7364 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
6333 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);7365 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
6334 if (arg2_value == irb->codegen->invalid_instruction)7366 if (arg2_value == irb->codegen->invalid_inst_src)
6335 return arg2_value;7367 return arg2_value;
63367368
6337 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);7369 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
6338 IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);7370 IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
6339 if (arg3_value == irb->codegen->invalid_instruction)7371 if (arg3_value == irb->codegen->invalid_inst_src)
6340 return arg3_value;7372 return arg3_value;
63417373
6342 AstNode *arg4_node = node->data.fn_call_expr.params.at(4);7374 AstNode *arg4_node = node->data.fn_call_expr.params.at(4);
6343 IrInstruction *arg4_value = ir_gen_node(irb, arg4_node, scope);7375 IrInstSrc *arg4_value = ir_gen_node(irb, arg4_node, scope);
6344 if (arg4_value == irb->codegen->invalid_instruction)7376 if (arg4_value == irb->codegen->invalid_inst_src)
6345 return arg4_value;7377 return arg4_value;
63467378
6347 IrInstruction *inst = ir_build_atomic_rmw(irb, scope, node, arg0_value, arg1_value, arg2_value, arg3_value,7379 IrInstSrc *inst = ir_build_atomic_rmw_src(irb, scope, node,
6348 arg4_value,7380 arg0_value, arg1_value, arg2_value, arg3_value, arg4_value);
6349 // these 2 values don't mean anything since we passed non-null values for other args
6350 AtomicRmwOp_xchg, AtomicOrderMonotonic);
6351 return ir_lval_wrap(irb, scope, inst, lval, result_loc);7381 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
6352 }7382 }
6353 case BuiltinFnIdAtomicLoad:7383 case BuiltinFnIdAtomicLoad:
6354 {7384 {
6355 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7385 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6356 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7386 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6357 if (arg0_value == irb->codegen->invalid_instruction)7387 if (arg0_value == irb->codegen->invalid_inst_src)
6358 return arg0_value;7388 return arg0_value;
63597389
6360 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7390 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6361 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);7391 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6362 if (arg1_value == irb->codegen->invalid_instruction)7392 if (arg1_value == irb->codegen->invalid_inst_src)
6363 return arg1_value;7393 return arg1_value;
63647394
6365 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);7395 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
6366 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);7396 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
6367 if (arg2_value == irb->codegen->invalid_instruction)7397 if (arg2_value == irb->codegen->invalid_inst_src)
6368 return arg2_value;7398 return arg2_value;
63697399
6370 IrInstruction *inst = ir_build_atomic_load(irb, scope, node, arg0_value, arg1_value, arg2_value,7400 IrInstSrc *inst = ir_build_atomic_load_src(irb, scope, node, arg0_value, arg1_value, arg2_value);
6371 // this value does not mean anything since we passed non-null values for other arg
6372 AtomicOrderMonotonic);
6373 return ir_lval_wrap(irb, scope, inst, lval, result_loc);7401 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
6374 }7402 }
6375 case BuiltinFnIdAtomicStore:7403 case BuiltinFnIdAtomicStore:
6376 {7404 {
6377 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7405 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6378 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7406 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6379 if (arg0_value == irb->codegen->invalid_instruction)7407 if (arg0_value == irb->codegen->invalid_inst_src)
6380 return arg0_value;7408 return arg0_value;
63817409
6382 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7410 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6383 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);7411 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6384 if (arg1_value == irb->codegen->invalid_instruction)7412 if (arg1_value == irb->codegen->invalid_inst_src)
6385 return arg1_value;7413 return arg1_value;
63867414
6387 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);7415 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
6388 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);7416 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
6389 if (arg2_value == irb->codegen->invalid_instruction)7417 if (arg2_value == irb->codegen->invalid_inst_src)
6390 return arg2_value;7418 return arg2_value;
63917419
6392 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);7420 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
6393 IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);7421 IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
6394 if (arg3_value == irb->codegen->invalid_instruction)7422 if (arg3_value == irb->codegen->invalid_inst_src)
6395 return arg3_value;7423 return arg3_value;
63967424
6397 IrInstruction *inst = ir_build_atomic_store(irb, scope, node, arg0_value, arg1_value, arg2_value, arg3_value,7425 IrInstSrc *inst = ir_build_atomic_store_src(irb, scope, node, arg0_value, arg1_value,
6398 // this value does not mean anything since we passed non-null values for other arg7426 arg2_value, arg3_value);
6399 AtomicOrderMonotonic);
6400 return ir_lval_wrap(irb, scope, inst, lval, result_loc);7427 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
6401 }7428 }
6402 case BuiltinFnIdIntToEnum:7429 case BuiltinFnIdIntToEnum:
6403 {7430 {
6404 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7431 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6405 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7432 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6406 if (arg0_value == irb->codegen->invalid_instruction)7433 if (arg0_value == irb->codegen->invalid_inst_src)
6407 return arg0_value;7434 return arg0_value;
64087435
6409 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7436 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6410 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);7437 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6411 if (arg1_value == irb->codegen->invalid_instruction)7438 if (arg1_value == irb->codegen->invalid_inst_src)
6412 return arg1_value;7439 return arg1_value;
64137440
6414 IrInstruction *result = ir_build_int_to_enum(irb, scope, node, arg0_value, arg1_value);7441 IrInstSrc *result = ir_build_int_to_enum_src(irb, scope, node, arg0_value, arg1_value);
6415 return ir_lval_wrap(irb, scope, result, lval, result_loc);7442 return ir_lval_wrap(irb, scope, result, lval, result_loc);
6416 }7443 }
6417 case BuiltinFnIdEnumToInt:7444 case BuiltinFnIdEnumToInt:
6418 {7445 {
6419 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7446 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6420 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7447 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6421 if (arg0_value == irb->codegen->invalid_instruction)7448 if (arg0_value == irb->codegen->invalid_inst_src)
6422 return arg0_value;7449 return arg0_value;
64237450
6424 IrInstruction *result = ir_build_enum_to_int(irb, scope, node, arg0_value);7451 IrInstSrc *result = ir_build_enum_to_int(irb, scope, node, arg0_value);
6425 return ir_lval_wrap(irb, scope, result, lval, result_loc);7452 return ir_lval_wrap(irb, scope, result, lval, result_loc);
6426 }7453 }
6427 case BuiltinFnIdCtz:7454 case BuiltinFnIdCtz:
...@@ -6431,16 +7458,16 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo...@@ -6431,16 +7458,16 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
6431 case BuiltinFnIdBitReverse:7458 case BuiltinFnIdBitReverse:
6432 {7459 {
6433 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7460 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6434 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7461 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6435 if (arg0_value == irb->codegen->invalid_instruction)7462 if (arg0_value == irb->codegen->invalid_inst_src)
6436 return arg0_value;7463 return arg0_value;
64377464
6438 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7465 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6439 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);7466 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6440 if (arg1_value == irb->codegen->invalid_instruction)7467 if (arg1_value == irb->codegen->invalid_inst_src)
6441 return arg1_value;7468 return arg1_value;
64427469
6443 IrInstruction *result;7470 IrInstSrc *result;
6444 switch (builtin_fn->id) {7471 switch (builtin_fn->id) {
6445 case BuiltinFnIdCtz:7472 case BuiltinFnIdCtz:
6446 result = ir_build_ctz(irb, scope, node, arg0_value, arg1_value);7473 result = ir_build_ctz(irb, scope, node, arg0_value, arg1_value);
...@@ -6465,28 +7492,28 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo...@@ -6465,28 +7492,28 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
6465 case BuiltinFnIdHasDecl:7492 case BuiltinFnIdHasDecl:
6466 {7493 {
6467 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);7494 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6468 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);7495 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6469 if (arg0_value == irb->codegen->invalid_instruction)7496 if (arg0_value == irb->codegen->invalid_inst_src)
6470 return arg0_value;7497 return arg0_value;
64717498
6472 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);7499 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6473 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);7500 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6474 if (arg1_value == irb->codegen->invalid_instruction)7501 if (arg1_value == irb->codegen->invalid_inst_src)
6475 return arg1_value;7502 return arg1_value;
64767503
6477 IrInstruction *has_decl = ir_build_has_decl(irb, scope, node, arg0_value, arg1_value);7504 IrInstSrc *has_decl = ir_build_has_decl(irb, scope, node, arg0_value, arg1_value);
6478 return ir_lval_wrap(irb, scope, has_decl, lval, result_loc);7505 return ir_lval_wrap(irb, scope, has_decl, lval, result_loc);
6479 }7506 }
6480 case BuiltinFnIdUnionInit:7507 case BuiltinFnIdUnionInit:
6481 {7508 {
6482 AstNode *union_type_node = node->data.fn_call_expr.params.at(0);7509 AstNode *union_type_node = node->data.fn_call_expr.params.at(0);
6483 IrInstruction *union_type_inst = ir_gen_node(irb, union_type_node, scope);7510 IrInstSrc *union_type_inst = ir_gen_node(irb, union_type_node, scope);
6484 if (union_type_inst == irb->codegen->invalid_instruction)7511 if (union_type_inst == irb->codegen->invalid_inst_src)
6485 return union_type_inst;7512 return union_type_inst;
64867513
6487 AstNode *name_node = node->data.fn_call_expr.params.at(1);7514 AstNode *name_node = node->data.fn_call_expr.params.at(1);
6488 IrInstruction *name_inst = ir_gen_node(irb, name_node, scope);7515 IrInstSrc *name_inst = ir_gen_node(irb, name_node, scope);
6489 if (name_inst == irb->codegen->invalid_instruction)7516 if (name_inst == irb->codegen->invalid_inst_src)
6490 return name_inst;7517 return name_inst;
64917518
6492 AstNode *init_node = node->data.fn_call_expr.params.at(2);7519 AstNode *init_node = node->data.fn_call_expr.params.at(2);
...@@ -6498,7 +7525,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo...@@ -6498,7 +7525,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
6498 zig_unreachable();7525 zig_unreachable();
6499}7526}
65007527
6501static IrInstruction *ir_gen_fn_call(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,7528static IrInstSrc *ir_gen_fn_call(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
6502 ResultLoc *result_loc)7529 ResultLoc *result_loc)
6503{7530{
6504 assert(node->type == NodeTypeFnCallExpr);7531 assert(node->type == NodeTypeFnCallExpr);
...@@ -6511,16 +7538,16 @@ static IrInstruction *ir_gen_fn_call(IrBuilder *irb, Scope *scope, AstNode *node...@@ -6511,16 +7538,16 @@ static IrInstruction *ir_gen_fn_call(IrBuilder *irb, Scope *scope, AstNode *node
6511 nullptr, node->data.fn_call_expr.params.items, node->data.fn_call_expr.params.length, lval, result_loc);7538 nullptr, node->data.fn_call_expr.params.items, node->data.fn_call_expr.params.length, lval, result_loc);
6512}7539}
65137540
6514static IrInstruction *ir_gen_if_bool_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,7541static IrInstSrc *ir_gen_if_bool_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
6515 ResultLoc *result_loc)7542 ResultLoc *result_loc)
6516{7543{
6517 assert(node->type == NodeTypeIfBoolExpr);7544 assert(node->type == NodeTypeIfBoolExpr);
65187545
6519 IrInstruction *condition = ir_gen_node(irb, node->data.if_bool_expr.condition, scope);7546 IrInstSrc *condition = ir_gen_node(irb, node->data.if_bool_expr.condition, scope);
6520 if (condition == irb->codegen->invalid_instruction)7547 if (condition == irb->codegen->invalid_inst_src)
6521 return irb->codegen->invalid_instruction;7548 return irb->codegen->invalid_inst_src;
65227549
6523 IrInstruction *is_comptime;7550 IrInstSrc *is_comptime;
6524 if (ir_should_inline(irb->exec, scope)) {7551 if (ir_should_inline(irb->exec, scope)) {
6525 is_comptime = ir_build_const_bool(irb, scope, node, true);7552 is_comptime = ir_build_const_bool(irb, scope, node, true);
6526 } else {7553 } else {
...@@ -6530,11 +7557,11 @@ static IrInstruction *ir_gen_if_bool_expr(IrBuilder *irb, Scope *scope, AstNode...@@ -6530,11 +7557,11 @@ static IrInstruction *ir_gen_if_bool_expr(IrBuilder *irb, Scope *scope, AstNode
6530 AstNode *then_node = node->data.if_bool_expr.then_block;7557 AstNode *then_node = node->data.if_bool_expr.then_block;
6531 AstNode *else_node = node->data.if_bool_expr.else_node;7558 AstNode *else_node = node->data.if_bool_expr.else_node;
65327559
6533 IrBasicBlock *then_block = ir_create_basic_block(irb, scope, "Then");7560 IrBasicBlockSrc *then_block = ir_create_basic_block(irb, scope, "Then");
6534 IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "Else");7561 IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "Else");
6535 IrBasicBlock *endif_block = ir_create_basic_block(irb, scope, "EndIf");7562 IrBasicBlockSrc *endif_block = ir_create_basic_block(irb, scope, "EndIf");
65367563
6537 IrInstruction *cond_br_inst = ir_build_cond_br(irb, scope, node, condition,7564 IrInstSrc *cond_br_inst = ir_build_cond_br(irb, scope, node, condition,
6538 then_block, else_block, is_comptime);7565 then_block, else_block, is_comptime);
6539 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, else_block, endif_block,7566 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, else_block, endif_block,
6540 result_loc, is_comptime);7567 result_loc, is_comptime);
...@@ -6542,70 +7569,70 @@ static IrInstruction *ir_gen_if_bool_expr(IrBuilder *irb, Scope *scope, AstNode...@@ -6542,70 +7569,70 @@ static IrInstruction *ir_gen_if_bool_expr(IrBuilder *irb, Scope *scope, AstNode
6542 ir_set_cursor_at_end_and_append_block(irb, then_block);7569 ir_set_cursor_at_end_and_append_block(irb, then_block);
65437570
6544 Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, scope, is_comptime);7571 Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, scope, is_comptime);
6545 IrInstruction *then_expr_result = ir_gen_node_extra(irb, then_node, subexpr_scope, lval,7572 IrInstSrc *then_expr_result = ir_gen_node_extra(irb, then_node, subexpr_scope, lval,
6546 &peer_parent->peers.at(0)->base);7573 &peer_parent->peers.at(0)->base);
6547 if (then_expr_result == irb->codegen->invalid_instruction)7574 if (then_expr_result == irb->codegen->invalid_inst_src)
6548 return irb->codegen->invalid_instruction;7575 return irb->codegen->invalid_inst_src;
6549 IrBasicBlock *after_then_block = irb->current_basic_block;7576 IrBasicBlockSrc *after_then_block = irb->current_basic_block;
6550 if (!instr_is_unreachable(then_expr_result))7577 if (!instr_is_unreachable(then_expr_result))
6551 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));7578 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
65527579
6553 ir_set_cursor_at_end_and_append_block(irb, else_block);7580 ir_set_cursor_at_end_and_append_block(irb, else_block);
6554 IrInstruction *else_expr_result;7581 IrInstSrc *else_expr_result;
6555 if (else_node) {7582 if (else_node) {
6556 else_expr_result = ir_gen_node_extra(irb, else_node, subexpr_scope, lval, &peer_parent->peers.at(1)->base);7583 else_expr_result = ir_gen_node_extra(irb, else_node, subexpr_scope, lval, &peer_parent->peers.at(1)->base);
6557 if (else_expr_result == irb->codegen->invalid_instruction)7584 if (else_expr_result == irb->codegen->invalid_inst_src)
6558 return irb->codegen->invalid_instruction;7585 return irb->codegen->invalid_inst_src;
6559 } else {7586 } else {
6560 else_expr_result = ir_build_const_void(irb, scope, node);7587 else_expr_result = ir_build_const_void(irb, scope, node);
6561 ir_build_end_expr(irb, scope, node, else_expr_result, &peer_parent->peers.at(1)->base);7588 ir_build_end_expr(irb, scope, node, else_expr_result, &peer_parent->peers.at(1)->base);
6562 }7589 }
6563 IrBasicBlock *after_else_block = irb->current_basic_block;7590 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
6564 if (!instr_is_unreachable(else_expr_result))7591 if (!instr_is_unreachable(else_expr_result))
6565 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));7592 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
65667593
6567 ir_set_cursor_at_end_and_append_block(irb, endif_block);7594 ir_set_cursor_at_end_and_append_block(irb, endif_block);
6568 IrInstruction **incoming_values = allocate<IrInstruction *>(2);7595 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
6569 incoming_values[0] = then_expr_result;7596 incoming_values[0] = then_expr_result;
6570 incoming_values[1] = else_expr_result;7597 incoming_values[1] = else_expr_result;
6571 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");7598 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
6572 incoming_blocks[0] = after_then_block;7599 incoming_blocks[0] = after_then_block;
6573 incoming_blocks[1] = after_else_block;7600 incoming_blocks[1] = after_else_block;
65747601
6575 IrInstruction *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);7602 IrInstSrc *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
6576 return ir_expr_wrap(irb, scope, phi, result_loc);7603 return ir_expr_wrap(irb, scope, phi, result_loc);
6577}7604}
65787605
6579static IrInstruction *ir_gen_prefix_op_id_lval(IrBuilder *irb, Scope *scope, AstNode *node, IrUnOp op_id, LVal lval) {7606static IrInstSrc *ir_gen_prefix_op_id_lval(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrUnOp op_id, LVal lval) {
6580 assert(node->type == NodeTypePrefixOpExpr);7607 assert(node->type == NodeTypePrefixOpExpr);
6581 AstNode *expr_node = node->data.prefix_op_expr.primary_expr;7608 AstNode *expr_node = node->data.prefix_op_expr.primary_expr;
65827609
6583 IrInstruction *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);7610 IrInstSrc *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);
6584 if (value == irb->codegen->invalid_instruction)7611 if (value == irb->codegen->invalid_inst_src)
6585 return value;7612 return value;
65867613
6587 return ir_build_un_op(irb, scope, node, op_id, value);7614 return ir_build_un_op(irb, scope, node, op_id, value);
6588}7615}
65897616
6590static IrInstruction *ir_gen_prefix_op_id(IrBuilder *irb, Scope *scope, AstNode *node, IrUnOp op_id) {7617static IrInstSrc *ir_gen_prefix_op_id(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrUnOp op_id) {
6591 return ir_gen_prefix_op_id_lval(irb, scope, node, op_id, LValNone);7618 return ir_gen_prefix_op_id_lval(irb, scope, node, op_id, LValNone);
6592}7619}
65937620
6594static IrInstruction *ir_expr_wrap(IrBuilder *irb, Scope *scope, IrInstruction *inst, ResultLoc *result_loc) {7621static IrInstSrc *ir_expr_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *inst, ResultLoc *result_loc) {
6595 if (inst == irb->codegen->invalid_instruction) return inst;7622 if (inst == irb->codegen->invalid_inst_src) return inst;
6596 ir_build_end_expr(irb, scope, inst->source_node, inst, result_loc);7623 ir_build_end_expr(irb, scope, inst->base.source_node, inst, result_loc);
6597 return inst;7624 return inst;
6598}7625}
65997626
6600static IrInstruction *ir_lval_wrap(IrBuilder *irb, Scope *scope, IrInstruction *value, LVal lval,7627static IrInstSrc *ir_lval_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *value, LVal lval,
6601 ResultLoc *result_loc)7628 ResultLoc *result_loc)
6602{7629{
6603 // This logic must be kept in sync with7630 // This logic must be kept in sync with
6604 // [STMT_EXPR_TEST_THING] <--- (search this token)7631 // [STMT_EXPR_TEST_THING] <--- (search this token)
6605 if (value == irb->codegen->invalid_instruction ||7632 if (value == irb->codegen->invalid_inst_src ||
6606 instr_is_unreachable(value) ||7633 instr_is_unreachable(value) ||
6607 value->source_node->type == NodeTypeDefer ||7634 value->base.source_node->type == NodeTypeDefer ||
6608 value->id == IrInstructionIdDeclVarSrc)7635 value->id == IrInstSrcIdDeclVar)
6609 {7636 {
6610 return value;7637 return value;
6611 }7638 }
...@@ -6613,7 +7640,7 @@ static IrInstruction *ir_lval_wrap(IrBuilder *irb, Scope *scope, IrInstruction *...@@ -6613,7 +7640,7 @@ static IrInstruction *ir_lval_wrap(IrBuilder *irb, Scope *scope, IrInstruction *
6613 if (lval == LValPtr) {7640 if (lval == LValPtr) {
6614 // We needed a pointer to a value, but we got a value. So we create7641 // We needed a pointer to a value, but we got a value. So we create
6615 // an instruction which just makes a pointer of it.7642 // an instruction which just makes a pointer of it.
6616 return ir_build_ref(irb, scope, value->source_node, value, false, false);7643 return ir_build_ref_src(irb, scope, value->base.source_node, value, false, false);
6617 } else if (result_loc != nullptr) {7644 } else if (result_loc != nullptr) {
6618 return ir_expr_wrap(irb, scope, value, result_loc);7645 return ir_expr_wrap(irb, scope, value, result_loc);
6619 } else {7646 } else {
...@@ -6636,7 +7663,7 @@ static PtrLen star_token_to_ptr_len(TokenId token_id) {...@@ -6636,7 +7663,7 @@ static PtrLen star_token_to_ptr_len(TokenId token_id) {
6636 }7663 }
6637}7664}
66387665
6639static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode *node) {7666static IrInstSrc *ir_gen_pointer_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
6640 assert(node->type == NodeTypePointerType);7667 assert(node->type == NodeTypePointerType);
66417668
6642 PtrLen ptr_len = star_token_to_ptr_len(node->data.pointer_type.star_token->id);7669 PtrLen ptr_len = star_token_to_ptr_len(node->data.pointer_type.star_token->id);
...@@ -6648,26 +7675,26 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode...@@ -6648,26 +7675,26 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
6648 AstNode *expr_node = node->data.pointer_type.op_expr;7675 AstNode *expr_node = node->data.pointer_type.op_expr;
6649 AstNode *align_expr = node->data.pointer_type.align_expr;7676 AstNode *align_expr = node->data.pointer_type.align_expr;
66507677
6651 IrInstruction *sentinel;7678 IrInstSrc *sentinel;
6652 if (sentinel_expr != nullptr) {7679 if (sentinel_expr != nullptr) {
6653 sentinel = ir_gen_node(irb, sentinel_expr, scope);7680 sentinel = ir_gen_node(irb, sentinel_expr, scope);
6654 if (sentinel == irb->codegen->invalid_instruction)7681 if (sentinel == irb->codegen->invalid_inst_src)
6655 return sentinel;7682 return sentinel;
6656 } else {7683 } else {
6657 sentinel = nullptr;7684 sentinel = nullptr;
6658 }7685 }
66597686
6660 IrInstruction *align_value;7687 IrInstSrc *align_value;
6661 if (align_expr != nullptr) {7688 if (align_expr != nullptr) {
6662 align_value = ir_gen_node(irb, align_expr, scope);7689 align_value = ir_gen_node(irb, align_expr, scope);
6663 if (align_value == irb->codegen->invalid_instruction)7690 if (align_value == irb->codegen->invalid_inst_src)
6664 return align_value;7691 return align_value;
6665 } else {7692 } else {
6666 align_value = nullptr;7693 align_value = nullptr;
6667 }7694 }
66687695
6669 IrInstruction *child_type = ir_gen_node(irb, expr_node, scope);7696 IrInstSrc *child_type = ir_gen_node(irb, expr_node, scope);
6670 if (child_type == irb->codegen->invalid_instruction)7697 if (child_type == irb->codegen->invalid_inst_src)
6671 return child_type;7698 return child_type;
66727699
6673 uint32_t bit_offset_start = 0;7700 uint32_t bit_offset_start = 0;
...@@ -6677,7 +7704,7 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode...@@ -6677,7 +7704,7 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
6677 bigint_append_buf(val_buf, node->data.pointer_type.bit_offset_start, 10);7704 bigint_append_buf(val_buf, node->data.pointer_type.bit_offset_start, 10);
6678 exec_add_error_node(irb->codegen, irb->exec, node,7705 exec_add_error_node(irb->codegen, irb->exec, node,
6679 buf_sprintf("value %s too large for u32 bit offset", buf_ptr(val_buf)));7706 buf_sprintf("value %s too large for u32 bit offset", buf_ptr(val_buf)));
6680 return irb->codegen->invalid_instruction;7707 return irb->codegen->invalid_inst_src;
6681 }7708 }
6682 bit_offset_start = bigint_as_u32(node->data.pointer_type.bit_offset_start);7709 bit_offset_start = bigint_as_u32(node->data.pointer_type.bit_offset_start);
6683 }7710 }
...@@ -6689,7 +7716,7 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode...@@ -6689,7 +7716,7 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
6689 bigint_append_buf(val_buf, node->data.pointer_type.host_int_bytes, 10);7716 bigint_append_buf(val_buf, node->data.pointer_type.host_int_bytes, 10);
6690 exec_add_error_node(irb->codegen, irb->exec, node,7717 exec_add_error_node(irb->codegen, irb->exec, node,
6691 buf_sprintf("value %s too large for u32 byte count", buf_ptr(val_buf)));7718 buf_sprintf("value %s too large for u32 byte count", buf_ptr(val_buf)));
6692 return irb->codegen->invalid_instruction;7719 return irb->codegen->invalid_inst_src;
6693 }7720 }
6694 host_int_bytes = bigint_as_u32(node->data.pointer_type.host_int_bytes);7721 host_int_bytes = bigint_as_u32(node->data.pointer_type.host_int_bytes);
6695 }7722 }
...@@ -6697,43 +7724,43 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode...@@ -6697,43 +7724,43 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
6697 if (host_int_bytes != 0 && bit_offset_start >= host_int_bytes * 8) {7724 if (host_int_bytes != 0 && bit_offset_start >= host_int_bytes * 8) {
6698 exec_add_error_node(irb->codegen, irb->exec, node,7725 exec_add_error_node(irb->codegen, irb->exec, node,
6699 buf_sprintf("bit offset starts after end of host integer"));7726 buf_sprintf("bit offset starts after end of host integer"));
6700 return irb->codegen->invalid_instruction;7727 return irb->codegen->invalid_inst_src;
6701 }7728 }
67027729
6703 return ir_build_ptr_type(irb, scope, node, child_type, is_const, is_volatile,7730 return ir_build_ptr_type(irb, scope, node, child_type, is_const, is_volatile,
6704 ptr_len, sentinel, align_value, bit_offset_start, host_int_bytes, is_allow_zero);7731 ptr_len, sentinel, align_value, bit_offset_start, host_int_bytes, is_allow_zero);
6705}7732}
67067733
6707static IrInstruction *ir_gen_catch_unreachable(IrBuilder *irb, Scope *scope, AstNode *source_node,7734static IrInstSrc *ir_gen_catch_unreachable(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
6708 AstNode *expr_node, LVal lval, ResultLoc *result_loc)7735 AstNode *expr_node, LVal lval, ResultLoc *result_loc)
6709{7736{
6710 IrInstruction *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);7737 IrInstSrc *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
6711 if (err_union_ptr == irb->codegen->invalid_instruction)7738 if (err_union_ptr == irb->codegen->invalid_inst_src)
6712 return irb->codegen->invalid_instruction;7739 return irb->codegen->invalid_inst_src;
67137740
6714 IrInstruction *payload_ptr = ir_build_unwrap_err_payload(irb, scope, source_node, err_union_ptr, true, false);7741 IrInstSrc *payload_ptr = ir_build_unwrap_err_payload_src(irb, scope, source_node, err_union_ptr, true, false);
6715 if (payload_ptr == irb->codegen->invalid_instruction)7742 if (payload_ptr == irb->codegen->invalid_inst_src)
6716 return irb->codegen->invalid_instruction;7743 return irb->codegen->invalid_inst_src;
67177744
6718 if (lval == LValPtr)7745 if (lval == LValPtr)
6719 return payload_ptr;7746 return payload_ptr;
67207747
6721 IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, source_node, payload_ptr);7748 IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, source_node, payload_ptr);
6722 return ir_expr_wrap(irb, scope, load_ptr, result_loc);7749 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
6723}7750}
67247751
6725static IrInstruction *ir_gen_bool_not(IrBuilder *irb, Scope *scope, AstNode *node) {7752static IrInstSrc *ir_gen_bool_not(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
6726 assert(node->type == NodeTypePrefixOpExpr);7753 assert(node->type == NodeTypePrefixOpExpr);
6727 AstNode *expr_node = node->data.prefix_op_expr.primary_expr;7754 AstNode *expr_node = node->data.prefix_op_expr.primary_expr;
67287755
6729 IrInstruction *value = ir_gen_node(irb, expr_node, scope);7756 IrInstSrc *value = ir_gen_node(irb, expr_node, scope);
6730 if (value == irb->codegen->invalid_instruction)7757 if (value == irb->codegen->invalid_inst_src)
6731 return irb->codegen->invalid_instruction;7758 return irb->codegen->invalid_inst_src;
67327759
6733 return ir_build_bool_not(irb, scope, node, value);7760 return ir_build_bool_not(irb, scope, node, value);
6734}7761}
67357762
6736static IrInstruction *ir_gen_prefix_op_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,7763static IrInstSrc *ir_gen_prefix_op_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
6737 ResultLoc *result_loc)7764 ResultLoc *result_loc)
6738{7765{
6739 assert(node->type == NodeTypePrefixOpExpr);7766 assert(node->type == NodeTypePrefixOpExpr);
...@@ -6761,12 +7788,12 @@ static IrInstruction *ir_gen_prefix_op_expr(IrBuilder *irb, Scope *scope, AstNod...@@ -6761,12 +7788,12 @@ static IrInstruction *ir_gen_prefix_op_expr(IrBuilder *irb, Scope *scope, AstNod
6761 zig_unreachable();7788 zig_unreachable();
6762}7789}
67637790
6764static IrInstruction *ir_gen_union_init_expr(IrBuilder *irb, Scope *scope, AstNode *source_node,7791static IrInstSrc *ir_gen_union_init_expr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
6765 IrInstruction *union_type, IrInstruction *field_name, AstNode *expr_node,7792 IrInstSrc *union_type, IrInstSrc *field_name, AstNode *expr_node,
6766 LVal lval, ResultLoc *parent_result_loc)7793 LVal lval, ResultLoc *parent_result_loc)
6767{7794{
6768 IrInstruction *container_ptr = ir_build_resolve_result(irb, scope, source_node, parent_result_loc, union_type);7795 IrInstSrc *container_ptr = ir_build_resolve_result(irb, scope, source_node, parent_result_loc, union_type);
6769 IrInstruction *field_ptr = ir_build_field_ptr_instruction(irb, scope, source_node, container_ptr,7796 IrInstSrc *field_ptr = ir_build_field_ptr_instruction(irb, scope, source_node, container_ptr,
6770 field_name, true);7797 field_name, true);
67717798
6772 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1);7799 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1);
...@@ -6775,18 +7802,18 @@ static IrInstruction *ir_gen_union_init_expr(IrBuilder *irb, Scope *scope, AstNo...@@ -6775,18 +7802,18 @@ static IrInstruction *ir_gen_union_init_expr(IrBuilder *irb, Scope *scope, AstNo
6775 ir_ref_instruction(field_ptr, irb->current_basic_block);7802 ir_ref_instruction(field_ptr, irb->current_basic_block);
6776 ir_build_reset_result(irb, scope, expr_node, &result_loc_inst->base);7803 ir_build_reset_result(irb, scope, expr_node, &result_loc_inst->base);
67777804
6778 IrInstruction *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,7805 IrInstSrc *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
6779 &result_loc_inst->base);7806 &result_loc_inst->base);
6780 if (expr_value == irb->codegen->invalid_instruction)7807 if (expr_value == irb->codegen->invalid_inst_src)
6781 return expr_value;7808 return expr_value;
67827809
6783 IrInstruction *init_union = ir_build_union_init_named_field(irb, scope, source_node, union_type,7810 IrInstSrc *init_union = ir_build_union_init_named_field(irb, scope, source_node, union_type,
6784 field_name, field_ptr, container_ptr);7811 field_name, field_ptr, container_ptr);
67857812
6786 return ir_lval_wrap(irb, scope, init_union, lval, parent_result_loc);7813 return ir_lval_wrap(irb, scope, init_union, lval, parent_result_loc);
6787}7814}
67887815
6789static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,7816static IrInstSrc *ir_gen_container_init_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
6790 ResultLoc *parent_result_loc)7817 ResultLoc *parent_result_loc)
6791{7818{
6792 assert(node->type == NodeTypeContainerInitExpr);7819 assert(node->type == NodeTypeContainerInitExpr);
...@@ -6798,42 +7825,42 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A...@@ -6798,42 +7825,42 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
6798 ResultLoc *child_result_loc;7825 ResultLoc *child_result_loc;
6799 AstNode *init_array_type_source_node;7826 AstNode *init_array_type_source_node;
6800 if (container_init_expr->type != nullptr) {7827 if (container_init_expr->type != nullptr) {
6801 IrInstruction *container_type;7828 IrInstSrc *container_type;
6802 if (container_init_expr->type->type == NodeTypeInferredArrayType) {7829 if (container_init_expr->type->type == NodeTypeInferredArrayType) {
6803 if (kind == ContainerInitKindStruct) {7830 if (kind == ContainerInitKindStruct) {
6804 add_node_error(irb->codegen, container_init_expr->type,7831 add_node_error(irb->codegen, container_init_expr->type,
6805 buf_sprintf("initializing array with struct syntax"));7832 buf_sprintf("initializing array with struct syntax"));
6806 return irb->codegen->invalid_instruction;7833 return irb->codegen->invalid_inst_src;
6807 }7834 }
6808 IrInstruction *sentinel;7835 IrInstSrc *sentinel;
6809 if (container_init_expr->type->data.inferred_array_type.sentinel != nullptr) {7836 if (container_init_expr->type->data.inferred_array_type.sentinel != nullptr) {
6810 sentinel = ir_gen_node(irb, container_init_expr->type->data.inferred_array_type.sentinel, scope);7837 sentinel = ir_gen_node(irb, container_init_expr->type->data.inferred_array_type.sentinel, scope);
6811 if (sentinel == irb->codegen->invalid_instruction)7838 if (sentinel == irb->codegen->invalid_inst_src)
6812 return sentinel;7839 return sentinel;
6813 } else {7840 } else {
6814 sentinel = nullptr;7841 sentinel = nullptr;
6815 }7842 }
68167843
6817 IrInstruction *elem_type = ir_gen_node(irb,7844 IrInstSrc *elem_type = ir_gen_node(irb,
6818 container_init_expr->type->data.inferred_array_type.child_type, scope);7845 container_init_expr->type->data.inferred_array_type.child_type, scope);
6819 if (elem_type == irb->codegen->invalid_instruction)7846 if (elem_type == irb->codegen->invalid_inst_src)
6820 return elem_type;7847 return elem_type;
6821 size_t item_count = container_init_expr->entries.length;7848 size_t item_count = container_init_expr->entries.length;
6822 IrInstruction *item_count_inst = ir_build_const_usize(irb, scope, node, item_count);7849 IrInstSrc *item_count_inst = ir_build_const_usize(irb, scope, node, item_count);
6823 container_type = ir_build_array_type(irb, scope, node, item_count_inst, sentinel, elem_type);7850 container_type = ir_build_array_type(irb, scope, node, item_count_inst, sentinel, elem_type);
6824 } else {7851 } else {
6825 container_type = ir_gen_node(irb, container_init_expr->type, scope);7852 container_type = ir_gen_node(irb, container_init_expr->type, scope);
6826 if (container_type == irb->codegen->invalid_instruction)7853 if (container_type == irb->codegen->invalid_inst_src)
6827 return container_type;7854 return container_type;
6828 }7855 }
68297856
6830 result_loc_cast = ir_build_cast_result_loc(irb, container_type, parent_result_loc);7857 result_loc_cast = ir_build_cast_result_loc(irb, container_type, parent_result_loc);
6831 child_result_loc = &result_loc_cast->base;7858 child_result_loc = &result_loc_cast->base;
6832 init_array_type_source_node = container_type->source_node;7859 init_array_type_source_node = container_type->base.source_node;
6833 } else {7860 } else {
6834 child_result_loc = parent_result_loc;7861 child_result_loc = parent_result_loc;
6835 if (parent_result_loc->source_instruction != nullptr) {7862 if (parent_result_loc->source_instruction != nullptr) {
6836 init_array_type_source_node = parent_result_loc->source_instruction->source_node;7863 init_array_type_source_node = parent_result_loc->source_instruction->base.source_node;
6837 } else {7864 } else {
6838 init_array_type_source_node = node;7865 init_array_type_source_node = node;
6839 }7866 }
...@@ -6841,11 +7868,11 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A...@@ -6841,11 +7868,11 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
68417868
6842 switch (kind) {7869 switch (kind) {
6843 case ContainerInitKindStruct: {7870 case ContainerInitKindStruct: {
6844 IrInstruction *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,7871 IrInstSrc *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,
6845 nullptr);7872 nullptr);
68467873
6847 size_t field_count = container_init_expr->entries.length;7874 size_t field_count = container_init_expr->entries.length;
6848 IrInstructionContainerInitFieldsField *fields = allocate<IrInstructionContainerInitFieldsField>(field_count);7875 IrInstSrcContainerInitFieldsField *fields = allocate<IrInstSrcContainerInitFieldsField>(field_count);
6849 for (size_t i = 0; i < field_count; i += 1) {7876 for (size_t i = 0; i < field_count; i += 1) {
6850 AstNode *entry_node = container_init_expr->entries.at(i);7877 AstNode *entry_node = container_init_expr->entries.at(i);
6851 assert(entry_node->type == NodeTypeStructValueField);7878 assert(entry_node->type == NodeTypeStructValueField);
...@@ -6853,7 +7880,7 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A...@@ -6853,7 +7880,7 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
6853 Buf *name = entry_node->data.struct_val_field.name;7880 Buf *name = entry_node->data.struct_val_field.name;
6854 AstNode *expr_node = entry_node->data.struct_val_field.expr;7881 AstNode *expr_node = entry_node->data.struct_val_field.expr;
68557882
6856 IrInstruction *field_ptr = ir_build_field_ptr(irb, scope, entry_node, container_ptr, name, true);7883 IrInstSrc *field_ptr = ir_build_field_ptr(irb, scope, entry_node, container_ptr, name, true);
6857 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1);7884 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1);
6858 result_loc_inst->base.id = ResultLocIdInstruction;7885 result_loc_inst->base.id = ResultLocIdInstruction;
6859 result_loc_inst->base.source_instruction = field_ptr;7886 result_loc_inst->base.source_instruction = field_ptr;
...@@ -6861,16 +7888,16 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A...@@ -6861,16 +7888,16 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
6861 ir_ref_instruction(field_ptr, irb->current_basic_block);7888 ir_ref_instruction(field_ptr, irb->current_basic_block);
6862 ir_build_reset_result(irb, scope, expr_node, &result_loc_inst->base);7889 ir_build_reset_result(irb, scope, expr_node, &result_loc_inst->base);
68637890
6864 IrInstruction *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,7891 IrInstSrc *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
6865 &result_loc_inst->base);7892 &result_loc_inst->base);
6866 if (expr_value == irb->codegen->invalid_instruction)7893 if (expr_value == irb->codegen->invalid_inst_src)
6867 return expr_value;7894 return expr_value;
68687895
6869 fields[i].name = name;7896 fields[i].name = name;
6870 fields[i].source_node = entry_node;7897 fields[i].source_node = entry_node;
6871 fields[i].result_loc = field_ptr;7898 fields[i].result_loc = field_ptr;
6872 }7899 }
6873 IrInstruction *result = ir_build_container_init_fields(irb, scope, node, field_count,7900 IrInstSrc *result = ir_build_container_init_fields(irb, scope, node, field_count,
6874 fields, container_ptr);7901 fields, container_ptr);
68757902
6876 if (result_loc_cast != nullptr) {7903 if (result_loc_cast != nullptr) {
...@@ -6881,15 +7908,15 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A...@@ -6881,15 +7908,15 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
6881 case ContainerInitKindArray: {7908 case ContainerInitKindArray: {
6882 size_t item_count = container_init_expr->entries.length;7909 size_t item_count = container_init_expr->entries.length;
68837910
6884 IrInstruction *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,7911 IrInstSrc *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,
6885 nullptr);7912 nullptr);
68867913
6887 IrInstruction **result_locs = allocate<IrInstruction *>(item_count);7914 IrInstSrc **result_locs = allocate<IrInstSrc *>(item_count);
6888 for (size_t i = 0; i < item_count; i += 1) {7915 for (size_t i = 0; i < item_count; i += 1) {
6889 AstNode *expr_node = container_init_expr->entries.at(i);7916 AstNode *expr_node = container_init_expr->entries.at(i);
68907917
6891 IrInstruction *elem_index = ir_build_const_usize(irb, scope, expr_node, i);7918 IrInstSrc *elem_index = ir_build_const_usize(irb, scope, expr_node, i);
6892 IrInstruction *elem_ptr = ir_build_elem_ptr(irb, scope, expr_node, container_ptr,7919 IrInstSrc *elem_ptr = ir_build_elem_ptr(irb, scope, expr_node, container_ptr,
6893 elem_index, false, PtrLenSingle, init_array_type_source_node);7920 elem_index, false, PtrLenSingle, init_array_type_source_node);
6894 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1);7921 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1);
6895 result_loc_inst->base.id = ResultLocIdInstruction;7922 result_loc_inst->base.id = ResultLocIdInstruction;
...@@ -6898,14 +7925,14 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A...@@ -6898,14 +7925,14 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
6898 ir_ref_instruction(elem_ptr, irb->current_basic_block);7925 ir_ref_instruction(elem_ptr, irb->current_basic_block);
6899 ir_build_reset_result(irb, scope, expr_node, &result_loc_inst->base);7926 ir_build_reset_result(irb, scope, expr_node, &result_loc_inst->base);
69007927
6901 IrInstruction *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,7928 IrInstSrc *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
6902 &result_loc_inst->base);7929 &result_loc_inst->base);
6903 if (expr_value == irb->codegen->invalid_instruction)7930 if (expr_value == irb->codegen->invalid_inst_src)
6904 return expr_value;7931 return expr_value;
69057932
6906 result_locs[i] = elem_ptr;7933 result_locs[i] = elem_ptr;
6907 }7934 }
6908 IrInstruction *result = ir_build_container_init_list(irb, scope, node, item_count,7935 IrInstSrc *result = ir_build_container_init_list(irb, scope, node, item_count,
6909 result_locs, container_ptr, init_array_type_source_node);7936 result_locs, container_ptr, init_array_type_source_node);
6910 if (result_loc_cast != nullptr) {7937 if (result_loc_cast != nullptr) {
6911 result = ir_build_implicit_cast(irb, scope, node, result, result_loc_cast);7938 result = ir_build_implicit_cast(irb, scope, node, result, result_loc_cast);
...@@ -6916,19 +7943,19 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A...@@ -6916,19 +7943,19 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
6916 zig_unreachable();7943 zig_unreachable();
6917}7944}
69187945
6919static ResultLocVar *ir_build_var_result_loc(IrBuilder *irb, IrInstruction *alloca, ZigVar *var) {7946static ResultLocVar *ir_build_var_result_loc(IrBuilderSrc *irb, IrInstSrc *alloca, ZigVar *var) {
6920 ResultLocVar *result_loc_var = allocate<ResultLocVar>(1);7947 ResultLocVar *result_loc_var = allocate<ResultLocVar>(1);
6921 result_loc_var->base.id = ResultLocIdVar;7948 result_loc_var->base.id = ResultLocIdVar;
6922 result_loc_var->base.source_instruction = alloca;7949 result_loc_var->base.source_instruction = alloca;
6923 result_loc_var->base.allow_write_through_const = true;7950 result_loc_var->base.allow_write_through_const = true;
6924 result_loc_var->var = var;7951 result_loc_var->var = var;
69257952
6926 ir_build_reset_result(irb, alloca->scope, alloca->source_node, &result_loc_var->base);7953 ir_build_reset_result(irb, alloca->base.scope, alloca->base.source_node, &result_loc_var->base);
69277954
6928 return result_loc_var;7955 return result_loc_var;
6929}7956}
69307957
6931static ResultLocCast *ir_build_cast_result_loc(IrBuilder *irb, IrInstruction *dest_type,7958static ResultLocCast *ir_build_cast_result_loc(IrBuilderSrc *irb, IrInstSrc *dest_type,
6932 ResultLoc *parent_result_loc)7959 ResultLoc *parent_result_loc)
6933{7960{
6934 ResultLocCast *result_loc_cast = allocate<ResultLocCast>(1);7961 ResultLocCast *result_loc_cast = allocate<ResultLocCast>(1);
...@@ -6938,37 +7965,37 @@ static ResultLocCast *ir_build_cast_result_loc(IrBuilder *irb, IrInstruction *de...@@ -6938,37 +7965,37 @@ static ResultLocCast *ir_build_cast_result_loc(IrBuilder *irb, IrInstruction *de
6938 ir_ref_instruction(dest_type, irb->current_basic_block);7965 ir_ref_instruction(dest_type, irb->current_basic_block);
6939 result_loc_cast->parent = parent_result_loc;7966 result_loc_cast->parent = parent_result_loc;
69407967
6941 ir_build_reset_result(irb, dest_type->scope, dest_type->source_node, &result_loc_cast->base);7968 ir_build_reset_result(irb, dest_type->base.scope, dest_type->base.source_node, &result_loc_cast->base);
69427969
6943 return result_loc_cast;7970 return result_loc_cast;
6944}7971}
69457972
6946static void build_decl_var_and_init(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigVar *var,7973static void build_decl_var_and_init(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigVar *var,
6947 IrInstruction *init, const char *name_hint, IrInstruction *is_comptime)7974 IrInstSrc *init, const char *name_hint, IrInstSrc *is_comptime)
6948{7975{
6949 IrInstruction *alloca = ir_build_alloca_src(irb, scope, source_node, nullptr, name_hint, is_comptime);7976 IrInstSrc *alloca = ir_build_alloca_src(irb, scope, source_node, nullptr, name_hint, is_comptime);
6950 ResultLocVar *var_result_loc = ir_build_var_result_loc(irb, alloca, var);7977 ResultLocVar *var_result_loc = ir_build_var_result_loc(irb, alloca, var);
6951 ir_build_end_expr(irb, scope, source_node, init, &var_result_loc->base);7978 ir_build_end_expr(irb, scope, source_node, init, &var_result_loc->base);
6952 ir_build_var_decl_src(irb, scope, source_node, var, nullptr, alloca);7979 ir_build_var_decl_src(irb, scope, source_node, var, nullptr, alloca);
6953}7980}
69547981
6955static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *node) {7982static IrInstSrc *ir_gen_var_decl(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
6956 assert(node->type == NodeTypeVariableDeclaration);7983 assert(node->type == NodeTypeVariableDeclaration);
69577984
6958 AstNodeVariableDeclaration *variable_declaration = &node->data.variable_declaration;7985 AstNodeVariableDeclaration *variable_declaration = &node->data.variable_declaration;
69597986
6960 if (buf_eql_str(variable_declaration->symbol, "_")) {7987 if (buf_eql_str(variable_declaration->symbol, "_")) {
6961 add_node_error(irb->codegen, node, buf_sprintf("`_` is not a declarable symbol"));7988 add_node_error(irb->codegen, node, buf_sprintf("`_` is not a declarable symbol"));
6962 return irb->codegen->invalid_instruction;7989 return irb->codegen->invalid_inst_src;
6963 }7990 }
69647991
6965 // Used for the type expr and the align expr7992 // Used for the type expr and the align expr
6966 Scope *comptime_scope = create_comptime_scope(irb->codegen, node, scope);7993 Scope *comptime_scope = create_comptime_scope(irb->codegen, node, scope);
69677994
6968 IrInstruction *type_instruction;7995 IrInstSrc *type_instruction;
6969 if (variable_declaration->type != nullptr) {7996 if (variable_declaration->type != nullptr) {
6970 type_instruction = ir_gen_node(irb, variable_declaration->type, comptime_scope);7997 type_instruction = ir_gen_node(irb, variable_declaration->type, comptime_scope);
6971 if (type_instruction == irb->codegen->invalid_instruction)7998 if (type_instruction == irb->codegen->invalid_inst_src)
6972 return type_instruction;7999 return type_instruction;
6973 } else {8000 } else {
6974 type_instruction = nullptr;8001 type_instruction = nullptr;
...@@ -6979,22 +8006,22 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod...@@ -6979,22 +8006,22 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
6979 bool is_extern = variable_declaration->is_extern;8006 bool is_extern = variable_declaration->is_extern;
69808007
6981 bool is_comptime_scalar = ir_should_inline(irb->exec, scope) || variable_declaration->is_comptime;8008 bool is_comptime_scalar = ir_should_inline(irb->exec, scope) || variable_declaration->is_comptime;
6982 IrInstruction *is_comptime = ir_build_const_bool(irb, scope, node, is_comptime_scalar);8009 IrInstSrc *is_comptime = ir_build_const_bool(irb, scope, node, is_comptime_scalar);
6983 ZigVar *var = ir_create_var(irb, node, scope, variable_declaration->symbol,8010 ZigVar *var = ir_create_var(irb, node, scope, variable_declaration->symbol,
6984 is_const, is_const, is_shadowable, is_comptime);8011 is_const, is_const, is_shadowable, is_comptime);
6985 // we detect IrInstructionIdDeclVarSrc in gen_block to make sure the next node8012 // we detect IrInstSrcDeclVar in gen_block to make sure the next node
6986 // is inside var->child_scope8013 // is inside var->child_scope
69878014
6988 if (!is_extern && !variable_declaration->expr) {8015 if (!is_extern && !variable_declaration->expr) {
6989 var->var_type = irb->codegen->builtin_types.entry_invalid;8016 var->var_type = irb->codegen->builtin_types.entry_invalid;
6990 add_node_error(irb->codegen, node, buf_sprintf("variables must be initialized"));8017 add_node_error(irb->codegen, node, buf_sprintf("variables must be initialized"));
6991 return irb->codegen->invalid_instruction;8018 return irb->codegen->invalid_inst_src;
6992 }8019 }
69938020
6994 IrInstruction *align_value = nullptr;8021 IrInstSrc *align_value = nullptr;
6995 if (variable_declaration->align_expr != nullptr) {8022 if (variable_declaration->align_expr != nullptr) {
6996 align_value = ir_gen_node(irb, variable_declaration->align_expr, comptime_scope);8023 align_value = ir_gen_node(irb, variable_declaration->align_expr, comptime_scope);
6997 if (align_value == irb->codegen->invalid_instruction)8024 if (align_value == irb->codegen->invalid_inst_src)
6998 return align_value;8025 return align_value;
6999 }8026 }
70008027
...@@ -7006,7 +8033,7 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod...@@ -7006,7 +8033,7 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
7006 // Parser should ensure that this never happens8033 // Parser should ensure that this never happens
7007 assert(variable_declaration->threadlocal_tok == nullptr);8034 assert(variable_declaration->threadlocal_tok == nullptr);
70088035
7009 IrInstruction *alloca = ir_build_alloca_src(irb, scope, node, align_value,8036 IrInstSrc *alloca = ir_build_alloca_src(irb, scope, node, align_value,
7010 buf_ptr(variable_declaration->symbol), is_comptime);8037 buf_ptr(variable_declaration->symbol), is_comptime);
70118038
7012 // Create a result location for the initialization expression.8039 // Create a result location for the initialization expression.
...@@ -7024,19 +8051,19 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod...@@ -7024,19 +8051,19 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
7024 Scope *init_scope = is_comptime_scalar ?8051 Scope *init_scope = is_comptime_scalar ?
7025 create_comptime_scope(irb->codegen, variable_declaration->expr, scope) : scope;8052 create_comptime_scope(irb->codegen, variable_declaration->expr, scope) : scope;
70268053
7027 // Temporarily set the name of the IrExecutable to the VariableDeclaration8054 // Temporarily set the name of the IrExecutableSrc to the VariableDeclaration
7028 // so that the struct or enum from the init expression inherits the name.8055 // so that the struct or enum from the init expression inherits the name.
7029 Buf *old_exec_name = irb->exec->name;8056 Buf *old_exec_name = irb->exec->name;
7030 irb->exec->name = variable_declaration->symbol;8057 irb->exec->name = variable_declaration->symbol;
7031 IrInstruction *init_value = ir_gen_node_extra(irb, variable_declaration->expr, init_scope,8058 IrInstSrc *init_value = ir_gen_node_extra(irb, variable_declaration->expr, init_scope,
7032 LValNone, init_result_loc);8059 LValNone, init_result_loc);
7033 irb->exec->name = old_exec_name;8060 irb->exec->name = old_exec_name;
70348061
7035 if (init_value == irb->codegen->invalid_instruction)8062 if (init_value == irb->codegen->invalid_inst_src)
7036 return irb->codegen->invalid_instruction;8063 return irb->codegen->invalid_inst_src;
70378064
7038 if (result_loc_cast != nullptr) {8065 if (result_loc_cast != nullptr) {
7039 IrInstruction *implicit_cast = ir_build_implicit_cast(irb, scope, init_value->source_node,8066 IrInstSrc *implicit_cast = ir_build_implicit_cast(irb, scope, init_value->base.source_node,
7040 init_value, result_loc_cast);8067 init_value, result_loc_cast);
7041 ir_build_end_expr(irb, scope, node, implicit_cast, &result_loc_var->base);8068 ir_build_end_expr(irb, scope, node, implicit_cast, &result_loc_var->base);
7042 }8069 }
...@@ -7044,7 +8071,7 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod...@@ -7044,7 +8071,7 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
7044 return ir_build_var_decl_src(irb, scope, node, var, align_value, alloca);8071 return ir_build_var_decl_src(irb, scope, node, var, align_value, alloca);
7045}8072}
70468073
7047static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,8074static IrInstSrc *ir_gen_while_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
7048 ResultLoc *result_loc)8075 ResultLoc *result_loc)
7049{8076{
7050 assert(node->type == NodeTypeWhileExpr);8077 assert(node->type == NodeTypeWhileExpr);
...@@ -7052,15 +8079,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7052,15 +8079,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7052 AstNode *continue_expr_node = node->data.while_expr.continue_expr;8079 AstNode *continue_expr_node = node->data.while_expr.continue_expr;
7053 AstNode *else_node = node->data.while_expr.else_node;8080 AstNode *else_node = node->data.while_expr.else_node;
70548081
7055 IrBasicBlock *cond_block = ir_create_basic_block(irb, scope, "WhileCond");8082 IrBasicBlockSrc *cond_block = ir_create_basic_block(irb, scope, "WhileCond");
7056 IrBasicBlock *body_block = ir_create_basic_block(irb, scope, "WhileBody");8083 IrBasicBlockSrc *body_block = ir_create_basic_block(irb, scope, "WhileBody");
7057 IrBasicBlock *continue_block = continue_expr_node ?8084 IrBasicBlockSrc *continue_block = continue_expr_node ?
7058 ir_create_basic_block(irb, scope, "WhileContinue") : cond_block;8085 ir_create_basic_block(irb, scope, "WhileContinue") : cond_block;
7059 IrBasicBlock *end_block = ir_create_basic_block(irb, scope, "WhileEnd");8086 IrBasicBlockSrc *end_block = ir_create_basic_block(irb, scope, "WhileEnd");
7060 IrBasicBlock *else_block = else_node ?8087 IrBasicBlockSrc *else_block = else_node ?
7061 ir_create_basic_block(irb, scope, "WhileElse") : end_block;8088 ir_create_basic_block(irb, scope, "WhileElse") : end_block;
70628089
7063 IrInstruction *is_comptime = ir_build_const_bool(irb, scope, node,8090 IrInstSrc *is_comptime = ir_build_const_bool(irb, scope, node,
7064 ir_should_inline(irb->exec, scope) || node->data.while_expr.is_inline);8091 ir_should_inline(irb->exec, scope) || node->data.while_expr.is_inline);
7065 ir_build_br(irb, scope, node, cond_block, is_comptime);8092 ir_build_br(irb, scope, node, cond_block, is_comptime);
70668093
...@@ -7081,15 +8108,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7081,15 +8108,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7081 } else {8108 } else {
7082 payload_scope = subexpr_scope;8109 payload_scope = subexpr_scope;
7083 }8110 }
7084 IrInstruction *err_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,8111 IrInstSrc *err_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,
7085 LValPtr, nullptr);8112 LValPtr, nullptr);
7086 if (err_val_ptr == irb->codegen->invalid_instruction)8113 if (err_val_ptr == irb->codegen->invalid_inst_src)
7087 return err_val_ptr;8114 return err_val_ptr;
7088 IrInstruction *is_err = ir_build_test_err_src(irb, scope, node->data.while_expr.condition, err_val_ptr,8115 IrInstSrc *is_err = ir_build_test_err_src(irb, scope, node->data.while_expr.condition, err_val_ptr,
7089 true, false);8116 true, false);
7090 IrBasicBlock *after_cond_block = irb->current_basic_block;8117 IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
7091 IrInstruction *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));8118 IrInstSrc *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
7092 IrInstruction *cond_br_inst;8119 IrInstSrc *cond_br_inst;
7093 if (!instr_is_unreachable(is_err)) {8120 if (!instr_is_unreachable(is_err)) {
7094 cond_br_inst = ir_build_cond_br(irb, scope, node->data.while_expr.condition, is_err,8121 cond_br_inst = ir_build_cond_br(irb, scope, node->data.while_expr.condition, is_err,
7095 else_block, body_block, is_comptime);8122 else_block, body_block, is_comptime);
...@@ -7104,15 +8131,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7104,15 +8131,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71048131
7105 ir_set_cursor_at_end_and_append_block(irb, body_block);8132 ir_set_cursor_at_end_and_append_block(irb, body_block);
7106 if (var_symbol) {8133 if (var_symbol) {
7107 IrInstruction *payload_ptr = ir_build_unwrap_err_payload(irb, payload_scope, symbol_node,8134 IrInstSrc *payload_ptr = ir_build_unwrap_err_payload_src(irb, payload_scope, symbol_node,
7108 err_val_ptr, false, false);8135 err_val_ptr, false, false);
7109 IrInstruction *var_ptr = node->data.while_expr.var_is_ptr ?8136 IrInstSrc *var_ptr = node->data.while_expr.var_is_ptr ?
7110 ir_build_ref(irb, payload_scope, symbol_node, payload_ptr, true, false) : payload_ptr;8137 ir_build_ref_src(irb, payload_scope, symbol_node, payload_ptr, true, false) : payload_ptr;
7111 ir_build_var_decl_src(irb, payload_scope, symbol_node, payload_var, nullptr, var_ptr);8138 ir_build_var_decl_src(irb, payload_scope, symbol_node, payload_var, nullptr, var_ptr);
7112 }8139 }
71138140
7114 ZigList<IrInstruction *> incoming_values = {0};8141 ZigList<IrInstSrc *> incoming_values = {0};
7115 ZigList<IrBasicBlock *> incoming_blocks = {0};8142 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
71168143
7117 ScopeLoop *loop_scope = create_loop_scope(irb->codegen, node, payload_scope);8144 ScopeLoop *loop_scope = create_loop_scope(irb->codegen, node, payload_scope);
7118 loop_scope->break_block = end_block;8145 loop_scope->break_block = end_block;
...@@ -7126,8 +8153,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7126,8 +8153,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7126 // Note the body block of the loop is not the place that lval and result_loc are used -8153 // Note the body block of the loop is not the place that lval and result_loc are used -
7127 // it's actually in break statements, handled similarly to return statements.8154 // it's actually in break statements, handled similarly to return statements.
7128 // That is why we set those values in loop_scope above and not in this ir_gen_node call.8155 // That is why we set those values in loop_scope above and not in this ir_gen_node call.
7129 IrInstruction *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);8156 IrInstSrc *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
7130 if (body_result == irb->codegen->invalid_instruction)8157 if (body_result == irb->codegen->invalid_inst_src)
7131 return body_result;8158 return body_result;
71328159
7133 if (!instr_is_unreachable(body_result)) {8160 if (!instr_is_unreachable(body_result)) {
...@@ -7137,8 +8164,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7137,8 +8164,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71378164
7138 if (continue_expr_node) {8165 if (continue_expr_node) {
7139 ir_set_cursor_at_end_and_append_block(irb, continue_block);8166 ir_set_cursor_at_end_and_append_block(irb, continue_block);
7140 IrInstruction *expr_result = ir_gen_node(irb, continue_expr_node, payload_scope);8167 IrInstSrc *expr_result = ir_gen_node(irb, continue_expr_node, payload_scope);
7141 if (expr_result == irb->codegen->invalid_instruction)8168 if (expr_result == irb->codegen->invalid_inst_src)
7142 return expr_result;8169 return expr_result;
7143 if (!instr_is_unreachable(expr_result)) {8170 if (!instr_is_unreachable(expr_result)) {
7144 ir_mark_gen(ir_build_check_statement_is_void(irb, payload_scope, continue_expr_node, expr_result));8171 ir_mark_gen(ir_build_check_statement_is_void(irb, payload_scope, continue_expr_node, expr_result));
...@@ -7154,7 +8181,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7154,7 +8181,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7154 ZigVar *err_var = ir_create_var(irb, err_symbol_node, scope, err_symbol,8181 ZigVar *err_var = ir_create_var(irb, err_symbol_node, scope, err_symbol,
7155 true, false, false, is_comptime);8182 true, false, false, is_comptime);
7156 Scope *err_scope = err_var->child_scope;8183 Scope *err_scope = err_var->child_scope;
7157 IrInstruction *err_ptr = ir_build_unwrap_err_code(irb, err_scope, err_symbol_node, err_val_ptr);8184 IrInstSrc *err_ptr = ir_build_unwrap_err_code_src(irb, err_scope, err_symbol_node, err_val_ptr);
7158 ir_build_var_decl_src(irb, err_scope, symbol_node, err_var, nullptr, err_ptr);8185 ir_build_var_decl_src(irb, err_scope, symbol_node, err_var, nullptr, err_ptr);
71598186
7160 if (peer_parent->peers.length != 0) {8187 if (peer_parent->peers.length != 0) {
...@@ -7162,12 +8189,12 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7162,12 +8189,12 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7162 }8189 }
7163 ResultLocPeer *peer_result = create_peer_result(peer_parent);8190 ResultLocPeer *peer_result = create_peer_result(peer_parent);
7164 peer_parent->peers.append(peer_result);8191 peer_parent->peers.append(peer_result);
7165 IrInstruction *else_result = ir_gen_node_extra(irb, else_node, err_scope, lval, &peer_result->base);8192 IrInstSrc *else_result = ir_gen_node_extra(irb, else_node, err_scope, lval, &peer_result->base);
7166 if (else_result == irb->codegen->invalid_instruction)8193 if (else_result == irb->codegen->invalid_inst_src)
7167 return else_result;8194 return else_result;
7168 if (!instr_is_unreachable(else_result))8195 if (!instr_is_unreachable(else_result))
7169 ir_mark_gen(ir_build_br(irb, scope, node, end_block, is_comptime));8196 ir_mark_gen(ir_build_br(irb, scope, node, end_block, is_comptime));
7170 IrBasicBlock *after_else_block = irb->current_basic_block;8197 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
7171 ir_set_cursor_at_end_and_append_block(irb, end_block);8198 ir_set_cursor_at_end_and_append_block(irb, end_block);
7172 if (else_result) {8199 if (else_result) {
7173 incoming_blocks.append(after_else_block);8200 incoming_blocks.append(after_else_block);
...@@ -7180,7 +8207,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7180,7 +8207,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7180 peer_parent->peers.last()->next_bb = end_block;8207 peer_parent->peers.last()->next_bb = end_block;
7181 }8208 }
71828209
7183 IrInstruction *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,8210 IrInstSrc *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
7184 incoming_blocks.items, incoming_values.items, peer_parent);8211 incoming_blocks.items, incoming_values.items, peer_parent);
7185 return ir_expr_wrap(irb, scope, phi, result_loc);8212 return ir_expr_wrap(irb, scope, phi, result_loc);
7186 } else if (var_symbol != nullptr) {8213 } else if (var_symbol != nullptr) {
...@@ -7192,15 +8219,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7192,15 +8219,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7192 ZigVar *payload_var = ir_create_var(irb, symbol_node, subexpr_scope, var_symbol,8219 ZigVar *payload_var = ir_create_var(irb, symbol_node, subexpr_scope, var_symbol,
7193 true, false, false, is_comptime);8220 true, false, false, is_comptime);
7194 Scope *child_scope = payload_var->child_scope;8221 Scope *child_scope = payload_var->child_scope;
7195 IrInstruction *maybe_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,8222 IrInstSrc *maybe_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,
7196 LValPtr, nullptr);8223 LValPtr, nullptr);
7197 if (maybe_val_ptr == irb->codegen->invalid_instruction)8224 if (maybe_val_ptr == irb->codegen->invalid_inst_src)
7198 return maybe_val_ptr;8225 return maybe_val_ptr;
7199 IrInstruction *maybe_val = ir_build_load_ptr(irb, scope, node->data.while_expr.condition, maybe_val_ptr);8226 IrInstSrc *maybe_val = ir_build_load_ptr(irb, scope, node->data.while_expr.condition, maybe_val_ptr);
7200 IrInstruction *is_non_null = ir_build_test_nonnull(irb, scope, node->data.while_expr.condition, maybe_val);8227 IrInstSrc *is_non_null = ir_build_test_non_null_src(irb, scope, node->data.while_expr.condition, maybe_val);
7201 IrBasicBlock *after_cond_block = irb->current_basic_block;8228 IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
7202 IrInstruction *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));8229 IrInstSrc *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
7203 IrInstruction *cond_br_inst;8230 IrInstSrc *cond_br_inst;
7204 if (!instr_is_unreachable(is_non_null)) {8231 if (!instr_is_unreachable(is_non_null)) {
7205 cond_br_inst = ir_build_cond_br(irb, scope, node->data.while_expr.condition, is_non_null,8232 cond_br_inst = ir_build_cond_br(irb, scope, node->data.while_expr.condition, is_non_null,
7206 body_block, else_block, is_comptime);8233 body_block, else_block, is_comptime);
...@@ -7214,13 +8241,13 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7214,13 +8241,13 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7214 is_comptime);8241 is_comptime);
72158242
7216 ir_set_cursor_at_end_and_append_block(irb, body_block);8243 ir_set_cursor_at_end_and_append_block(irb, body_block);
7217 IrInstruction *payload_ptr = ir_build_optional_unwrap_ptr(irb, child_scope, symbol_node, maybe_val_ptr, false, false);8244 IrInstSrc *payload_ptr = ir_build_optional_unwrap_ptr(irb, child_scope, symbol_node, maybe_val_ptr, false, false);
7218 IrInstruction *var_ptr = node->data.while_expr.var_is_ptr ?8245 IrInstSrc *var_ptr = node->data.while_expr.var_is_ptr ?
7219 ir_build_ref(irb, child_scope, symbol_node, payload_ptr, true, false) : payload_ptr;8246 ir_build_ref_src(irb, child_scope, symbol_node, payload_ptr, true, false) : payload_ptr;
7220 ir_build_var_decl_src(irb, child_scope, symbol_node, payload_var, nullptr, var_ptr);8247 ir_build_var_decl_src(irb, child_scope, symbol_node, payload_var, nullptr, var_ptr);
72218248
7222 ZigList<IrInstruction *> incoming_values = {0};8249 ZigList<IrInstSrc *> incoming_values = {0};
7223 ZigList<IrBasicBlock *> incoming_blocks = {0};8250 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
72248251
7225 ScopeLoop *loop_scope = create_loop_scope(irb->codegen, node, child_scope);8252 ScopeLoop *loop_scope = create_loop_scope(irb->codegen, node, child_scope);
7226 loop_scope->break_block = end_block;8253 loop_scope->break_block = end_block;
...@@ -7234,8 +8261,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7234,8 +8261,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7234 // Note the body block of the loop is not the place that lval and result_loc are used -8261 // Note the body block of the loop is not the place that lval and result_loc are used -
7235 // it's actually in break statements, handled similarly to return statements.8262 // it's actually in break statements, handled similarly to return statements.
7236 // That is why we set those values in loop_scope above and not in this ir_gen_node call.8263 // That is why we set those values in loop_scope above and not in this ir_gen_node call.
7237 IrInstruction *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);8264 IrInstSrc *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
7238 if (body_result == irb->codegen->invalid_instruction)8265 if (body_result == irb->codegen->invalid_inst_src)
7239 return body_result;8266 return body_result;
72408267
7241 if (!instr_is_unreachable(body_result)) {8268 if (!instr_is_unreachable(body_result)) {
...@@ -7245,8 +8272,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7245,8 +8272,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
72458272
7246 if (continue_expr_node) {8273 if (continue_expr_node) {
7247 ir_set_cursor_at_end_and_append_block(irb, continue_block);8274 ir_set_cursor_at_end_and_append_block(irb, continue_block);
7248 IrInstruction *expr_result = ir_gen_node(irb, continue_expr_node, child_scope);8275 IrInstSrc *expr_result = ir_gen_node(irb, continue_expr_node, child_scope);
7249 if (expr_result == irb->codegen->invalid_instruction)8276 if (expr_result == irb->codegen->invalid_inst_src)
7250 return expr_result;8277 return expr_result;
7251 if (!instr_is_unreachable(expr_result)) {8278 if (!instr_is_unreachable(expr_result)) {
7252 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, continue_expr_node, expr_result));8279 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, continue_expr_node, expr_result));
...@@ -7254,7 +8281,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7254,7 +8281,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7254 }8281 }
7255 }8282 }
72568283
7257 IrInstruction *else_result = nullptr;8284 IrInstSrc *else_result = nullptr;
7258 if (else_node) {8285 if (else_node) {
7259 ir_set_cursor_at_end_and_append_block(irb, else_block);8286 ir_set_cursor_at_end_and_append_block(irb, else_block);
72608287
...@@ -7264,12 +8291,12 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7264,12 +8291,12 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7264 ResultLocPeer *peer_result = create_peer_result(peer_parent);8291 ResultLocPeer *peer_result = create_peer_result(peer_parent);
7265 peer_parent->peers.append(peer_result);8292 peer_parent->peers.append(peer_result);
7266 else_result = ir_gen_node_extra(irb, else_node, scope, lval, &peer_result->base);8293 else_result = ir_gen_node_extra(irb, else_node, scope, lval, &peer_result->base);
7267 if (else_result == irb->codegen->invalid_instruction)8294 if (else_result == irb->codegen->invalid_inst_src)
7268 return else_result;8295 return else_result;
7269 if (!instr_is_unreachable(else_result))8296 if (!instr_is_unreachable(else_result))
7270 ir_mark_gen(ir_build_br(irb, scope, node, end_block, is_comptime));8297 ir_mark_gen(ir_build_br(irb, scope, node, end_block, is_comptime));
7271 }8298 }
7272 IrBasicBlock *after_else_block = irb->current_basic_block;8299 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
7273 ir_set_cursor_at_end_and_append_block(irb, end_block);8300 ir_set_cursor_at_end_and_append_block(irb, end_block);
7274 if (else_result) {8301 if (else_result) {
7275 incoming_blocks.append(after_else_block);8302 incoming_blocks.append(after_else_block);
...@@ -7282,17 +8309,17 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7282,17 +8309,17 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7282 peer_parent->peers.last()->next_bb = end_block;8309 peer_parent->peers.last()->next_bb = end_block;
7283 }8310 }
72848311
7285 IrInstruction *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,8312 IrInstSrc *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
7286 incoming_blocks.items, incoming_values.items, peer_parent);8313 incoming_blocks.items, incoming_values.items, peer_parent);
7287 return ir_expr_wrap(irb, scope, phi, result_loc);8314 return ir_expr_wrap(irb, scope, phi, result_loc);
7288 } else {8315 } else {
7289 ir_set_cursor_at_end_and_append_block(irb, cond_block);8316 ir_set_cursor_at_end_and_append_block(irb, cond_block);
7290 IrInstruction *cond_val = ir_gen_node(irb, node->data.while_expr.condition, scope);8317 IrInstSrc *cond_val = ir_gen_node(irb, node->data.while_expr.condition, scope);
7291 if (cond_val == irb->codegen->invalid_instruction)8318 if (cond_val == irb->codegen->invalid_inst_src)
7292 return cond_val;8319 return cond_val;
7293 IrBasicBlock *after_cond_block = irb->current_basic_block;8320 IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
7294 IrInstruction *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));8321 IrInstSrc *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
7295 IrInstruction *cond_br_inst;8322 IrInstSrc *cond_br_inst;
7296 if (!instr_is_unreachable(cond_val)) {8323 if (!instr_is_unreachable(cond_val)) {
7297 cond_br_inst = ir_build_cond_br(irb, scope, node->data.while_expr.condition, cond_val,8324 cond_br_inst = ir_build_cond_br(irb, scope, node->data.while_expr.condition, cond_val,
7298 body_block, else_block, is_comptime);8325 body_block, else_block, is_comptime);
...@@ -7306,8 +8333,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7306,8 +8333,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7306 is_comptime);8333 is_comptime);
7307 ir_set_cursor_at_end_and_append_block(irb, body_block);8334 ir_set_cursor_at_end_and_append_block(irb, body_block);
73088335
7309 ZigList<IrInstruction *> incoming_values = {0};8336 ZigList<IrInstSrc *> incoming_values = {0};
7310 ZigList<IrBasicBlock *> incoming_blocks = {0};8337 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
73118338
7312 Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, scope, is_comptime);8339 Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, scope, is_comptime);
73138340
...@@ -7323,8 +8350,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7323,8 +8350,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7323 // Note the body block of the loop is not the place that lval and result_loc are used -8350 // Note the body block of the loop is not the place that lval and result_loc are used -
7324 // it's actually in break statements, handled similarly to return statements.8351 // it's actually in break statements, handled similarly to return statements.
7325 // That is why we set those values in loop_scope above and not in this ir_gen_node call.8352 // That is why we set those values in loop_scope above and not in this ir_gen_node call.
7326 IrInstruction *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);8353 IrInstSrc *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
7327 if (body_result == irb->codegen->invalid_instruction)8354 if (body_result == irb->codegen->invalid_inst_src)
7328 return body_result;8355 return body_result;
73298356
7330 if (!instr_is_unreachable(body_result)) {8357 if (!instr_is_unreachable(body_result)) {
...@@ -7334,8 +8361,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7334,8 +8361,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
73348361
7335 if (continue_expr_node) {8362 if (continue_expr_node) {
7336 ir_set_cursor_at_end_and_append_block(irb, continue_block);8363 ir_set_cursor_at_end_and_append_block(irb, continue_block);
7337 IrInstruction *expr_result = ir_gen_node(irb, continue_expr_node, subexpr_scope);8364 IrInstSrc *expr_result = ir_gen_node(irb, continue_expr_node, subexpr_scope);
7338 if (expr_result == irb->codegen->invalid_instruction)8365 if (expr_result == irb->codegen->invalid_inst_src)
7339 return expr_result;8366 return expr_result;
7340 if (!instr_is_unreachable(expr_result)) {8367 if (!instr_is_unreachable(expr_result)) {
7341 ir_mark_gen(ir_build_check_statement_is_void(irb, scope, continue_expr_node, expr_result));8368 ir_mark_gen(ir_build_check_statement_is_void(irb, scope, continue_expr_node, expr_result));
...@@ -7343,7 +8370,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7343,7 +8370,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7343 }8370 }
7344 }8371 }
73458372
7346 IrInstruction *else_result = nullptr;8373 IrInstSrc *else_result = nullptr;
7347 if (else_node) {8374 if (else_node) {
7348 ir_set_cursor_at_end_and_append_block(irb, else_block);8375 ir_set_cursor_at_end_and_append_block(irb, else_block);
73498376
...@@ -7354,12 +8381,12 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7354,12 +8381,12 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7354 peer_parent->peers.append(peer_result);8381 peer_parent->peers.append(peer_result);
73558382
7356 else_result = ir_gen_node_extra(irb, else_node, subexpr_scope, lval, &peer_result->base);8383 else_result = ir_gen_node_extra(irb, else_node, subexpr_scope, lval, &peer_result->base);
7357 if (else_result == irb->codegen->invalid_instruction)8384 if (else_result == irb->codegen->invalid_inst_src)
7358 return else_result;8385 return else_result;
7359 if (!instr_is_unreachable(else_result))8386 if (!instr_is_unreachable(else_result))
7360 ir_mark_gen(ir_build_br(irb, scope, node, end_block, is_comptime));8387 ir_mark_gen(ir_build_br(irb, scope, node, end_block, is_comptime));
7361 }8388 }
7362 IrBasicBlock *after_else_block = irb->current_basic_block;8389 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
7363 ir_set_cursor_at_end_and_append_block(irb, end_block);8390 ir_set_cursor_at_end_and_append_block(irb, end_block);
7364 if (else_result) {8391 if (else_result) {
7365 incoming_blocks.append(after_else_block);8392 incoming_blocks.append(after_else_block);
...@@ -7372,13 +8399,13 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7372,13 +8399,13 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
7372 peer_parent->peers.last()->next_bb = end_block;8399 peer_parent->peers.last()->next_bb = end_block;
7373 }8400 }
73748401
7375 IrInstruction *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,8402 IrInstSrc *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
7376 incoming_blocks.items, incoming_values.items, peer_parent);8403 incoming_blocks.items, incoming_values.items, peer_parent);
7377 return ir_expr_wrap(irb, scope, phi, result_loc);8404 return ir_expr_wrap(irb, scope, phi, result_loc);
7378 }8405 }
7379}8406}
73808407
7381static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval,8408static IrInstSrc *ir_gen_for_expr(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval,
7382 ResultLoc *result_loc)8409 ResultLoc *result_loc)
7383{8410{
7384 assert(node->type == NodeTypeForExpr);8411 assert(node->type == NodeTypeForExpr);
...@@ -7391,17 +8418,17 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo...@@ -7391,17 +8418,17 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
73918418
7392 if (!elem_node) {8419 if (!elem_node) {
7393 add_node_error(irb->codegen, node, buf_sprintf("for loop expression missing element parameter"));8420 add_node_error(irb->codegen, node, buf_sprintf("for loop expression missing element parameter"));
7394 return irb->codegen->invalid_instruction;8421 return irb->codegen->invalid_inst_src;
7395 }8422 }
7396 assert(elem_node->type == NodeTypeSymbol);8423 assert(elem_node->type == NodeTypeSymbol);
73978424
7398 ScopeExpr *spill_scope = create_expr_scope(irb->codegen, node, parent_scope);8425 ScopeExpr *spill_scope = create_expr_scope(irb->codegen, node, parent_scope);
73998426
7400 IrInstruction *array_val_ptr = ir_gen_node_extra(irb, array_node, &spill_scope->base, LValPtr, nullptr);8427 IrInstSrc *array_val_ptr = ir_gen_node_extra(irb, array_node, &spill_scope->base, LValPtr, nullptr);
7401 if (array_val_ptr == irb->codegen->invalid_instruction)8428 if (array_val_ptr == irb->codegen->invalid_inst_src)
7402 return array_val_ptr;8429 return array_val_ptr;
74038430
7404 IrInstruction *is_comptime = ir_build_const_bool(irb, parent_scope, node,8431 IrInstSrc *is_comptime = ir_build_const_bool(irb, parent_scope, node,
7405 ir_should_inline(irb->exec, parent_scope) || node->data.for_expr.is_inline);8432 ir_should_inline(irb->exec, parent_scope) || node->data.for_expr.is_inline);
74068433
7407 AstNode *index_var_source_node;8434 AstNode *index_var_source_node;
...@@ -7418,50 +8445,50 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo...@@ -7418,50 +8445,50 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
7418 index_var_name = "i";8445 index_var_name = "i";
7419 }8446 }
74208447
7421 IrInstruction *zero = ir_build_const_usize(irb, parent_scope, node, 0);8448 IrInstSrc *zero = ir_build_const_usize(irb, parent_scope, node, 0);
7422 build_decl_var_and_init(irb, parent_scope, index_var_source_node, index_var, zero, index_var_name, is_comptime);8449 build_decl_var_and_init(irb, parent_scope, index_var_source_node, index_var, zero, index_var_name, is_comptime);
7423 parent_scope = index_var->child_scope;8450 parent_scope = index_var->child_scope;
74248451
7425 IrInstruction *one = ir_build_const_usize(irb, parent_scope, node, 1);8452 IrInstSrc *one = ir_build_const_usize(irb, parent_scope, node, 1);
7426 IrInstruction *index_ptr = ir_build_var_ptr(irb, parent_scope, node, index_var);8453 IrInstSrc *index_ptr = ir_build_var_ptr(irb, parent_scope, node, index_var);
74278454
74288455
7429 IrBasicBlock *cond_block = ir_create_basic_block(irb, parent_scope, "ForCond");8456 IrBasicBlockSrc *cond_block = ir_create_basic_block(irb, parent_scope, "ForCond");
7430 IrBasicBlock *body_block = ir_create_basic_block(irb, parent_scope, "ForBody");8457 IrBasicBlockSrc *body_block = ir_create_basic_block(irb, parent_scope, "ForBody");
7431 IrBasicBlock *end_block = ir_create_basic_block(irb, parent_scope, "ForEnd");8458 IrBasicBlockSrc *end_block = ir_create_basic_block(irb, parent_scope, "ForEnd");
7432 IrBasicBlock *else_block = else_node ? ir_create_basic_block(irb, parent_scope, "ForElse") : end_block;8459 IrBasicBlockSrc *else_block = else_node ? ir_create_basic_block(irb, parent_scope, "ForElse") : end_block;
7433 IrBasicBlock *continue_block = ir_create_basic_block(irb, parent_scope, "ForContinue");8460 IrBasicBlockSrc *continue_block = ir_create_basic_block(irb, parent_scope, "ForContinue");
74348461
7435 Buf *len_field_name = buf_create_from_str("len");8462 Buf *len_field_name = buf_create_from_str("len");
7436 IrInstruction *len_ref = ir_build_field_ptr(irb, parent_scope, node, array_val_ptr, len_field_name, false);8463 IrInstSrc *len_ref = ir_build_field_ptr(irb, parent_scope, node, array_val_ptr, len_field_name, false);
7437 IrInstruction *len_val = ir_build_load_ptr(irb, &spill_scope->base, node, len_ref);8464 IrInstSrc *len_val = ir_build_load_ptr(irb, &spill_scope->base, node, len_ref);
7438 ir_build_br(irb, parent_scope, node, cond_block, is_comptime);8465 ir_build_br(irb, parent_scope, node, cond_block, is_comptime);
74398466
7440 ir_set_cursor_at_end_and_append_block(irb, cond_block);8467 ir_set_cursor_at_end_and_append_block(irb, cond_block);
7441 IrInstruction *index_val = ir_build_load_ptr(irb, &spill_scope->base, node, index_ptr);8468 IrInstSrc *index_val = ir_build_load_ptr(irb, &spill_scope->base, node, index_ptr);
7442 IrInstruction *cond = ir_build_bin_op(irb, parent_scope, node, IrBinOpCmpLessThan, index_val, len_val, false);8469 IrInstSrc *cond = ir_build_bin_op(irb, parent_scope, node, IrBinOpCmpLessThan, index_val, len_val, false);
7443 IrBasicBlock *after_cond_block = irb->current_basic_block;8470 IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
7444 IrInstruction *void_else_value = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, parent_scope, node));8471 IrInstSrc *void_else_value = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, parent_scope, node));
7445 IrInstruction *cond_br_inst = ir_mark_gen(ir_build_cond_br(irb, parent_scope, node, cond,8472 IrInstSrc *cond_br_inst = ir_mark_gen(ir_build_cond_br(irb, parent_scope, node, cond,
7446 body_block, else_block, is_comptime));8473 body_block, else_block, is_comptime));
74478474
7448 ResultLocPeerParent *peer_parent = ir_build_result_peers(irb, cond_br_inst, end_block, result_loc, is_comptime);8475 ResultLocPeerParent *peer_parent = ir_build_result_peers(irb, cond_br_inst, end_block, result_loc, is_comptime);
74498476
7450 ir_set_cursor_at_end_and_append_block(irb, body_block);8477 ir_set_cursor_at_end_and_append_block(irb, body_block);
7451 Scope *elem_ptr_scope = node->data.for_expr.elem_is_ptr ? parent_scope : &spill_scope->base;8478 Scope *elem_ptr_scope = node->data.for_expr.elem_is_ptr ? parent_scope : &spill_scope->base;
7452 IrInstruction *elem_ptr = ir_build_elem_ptr(irb, elem_ptr_scope, node, array_val_ptr, index_val, false,8479 IrInstSrc *elem_ptr = ir_build_elem_ptr(irb, elem_ptr_scope, node, array_val_ptr, index_val, false,
7453 PtrLenSingle, nullptr);8480 PtrLenSingle, nullptr);
7454 // TODO make it an error to write to element variable or i variable.8481 // TODO make it an error to write to element variable or i variable.
7455 Buf *elem_var_name = elem_node->data.symbol_expr.symbol;8482 Buf *elem_var_name = elem_node->data.symbol_expr.symbol;
7456 ZigVar *elem_var = ir_create_var(irb, elem_node, parent_scope, elem_var_name, true, false, false, is_comptime);8483 ZigVar *elem_var = ir_create_var(irb, elem_node, parent_scope, elem_var_name, true, false, false, is_comptime);
7457 Scope *child_scope = elem_var->child_scope;8484 Scope *child_scope = elem_var->child_scope;
74588485
7459 IrInstruction *var_ptr = node->data.for_expr.elem_is_ptr ?8486 IrInstSrc *var_ptr = node->data.for_expr.elem_is_ptr ?
7460 ir_build_ref(irb, &spill_scope->base, elem_node, elem_ptr, true, false) : elem_ptr;8487 ir_build_ref_src(irb, &spill_scope->base, elem_node, elem_ptr, true, false) : elem_ptr;
7461 ir_build_var_decl_src(irb, parent_scope, elem_node, elem_var, nullptr, var_ptr);8488 ir_build_var_decl_src(irb, parent_scope, elem_node, elem_var, nullptr, var_ptr);
74628489
7463 ZigList<IrInstruction *> incoming_values = {0};8490 ZigList<IrInstSrc *> incoming_values = {0};
7464 ZigList<IrBasicBlock *> incoming_blocks = {0};8491 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
7465 ScopeLoop *loop_scope = create_loop_scope(irb->codegen, node, child_scope);8492 ScopeLoop *loop_scope = create_loop_scope(irb->codegen, node, child_scope);
7466 loop_scope->break_block = end_block;8493 loop_scope->break_block = end_block;
7467 loop_scope->continue_block = continue_block;8494 loop_scope->continue_block = continue_block;
...@@ -7475,9 +8502,9 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo...@@ -7475,9 +8502,9 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
7475 // Note the body block of the loop is not the place that lval and result_loc are used -8502 // Note the body block of the loop is not the place that lval and result_loc are used -
7476 // it's actually in break statements, handled similarly to return statements.8503 // it's actually in break statements, handled similarly to return statements.
7477 // That is why we set those values in loop_scope above and not in this ir_gen_node call.8504 // That is why we set those values in loop_scope above and not in this ir_gen_node call.
7478 IrInstruction *body_result = ir_gen_node(irb, body_node, &loop_scope->base);8505 IrInstSrc *body_result = ir_gen_node(irb, body_node, &loop_scope->base);
7479 if (body_result == irb->codegen->invalid_instruction)8506 if (body_result == irb->codegen->invalid_inst_src)
7480 return irb->codegen->invalid_instruction;8507 return irb->codegen->invalid_inst_src;
74818508
7482 if (!instr_is_unreachable(body_result)) {8509 if (!instr_is_unreachable(body_result)) {
7483 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, node->data.for_expr.body, body_result));8510 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, node->data.for_expr.body, body_result));
...@@ -7485,11 +8512,11 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo...@@ -7485,11 +8512,11 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
7485 }8512 }
74868513
7487 ir_set_cursor_at_end_and_append_block(irb, continue_block);8514 ir_set_cursor_at_end_and_append_block(irb, continue_block);
7488 IrInstruction *new_index_val = ir_build_bin_op(irb, child_scope, node, IrBinOpAdd, index_val, one, false);8515 IrInstSrc *new_index_val = ir_build_bin_op(irb, child_scope, node, IrBinOpAdd, index_val, one, false);
7489 ir_build_store_ptr(irb, child_scope, node, index_ptr, new_index_val)->allow_write_through_const = true;8516 ir_build_store_ptr(irb, child_scope, node, index_ptr, new_index_val)->allow_write_through_const = true;
7490 ir_build_br(irb, child_scope, node, cond_block, is_comptime);8517 ir_build_br(irb, child_scope, node, cond_block, is_comptime);
74918518
7492 IrInstruction *else_result = nullptr;8519 IrInstSrc *else_result = nullptr;
7493 if (else_node) {8520 if (else_node) {
7494 ir_set_cursor_at_end_and_append_block(irb, else_block);8521 ir_set_cursor_at_end_and_append_block(irb, else_block);
74958522
...@@ -7499,12 +8526,12 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo...@@ -7499,12 +8526,12 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
7499 ResultLocPeer *peer_result = create_peer_result(peer_parent);8526 ResultLocPeer *peer_result = create_peer_result(peer_parent);
7500 peer_parent->peers.append(peer_result);8527 peer_parent->peers.append(peer_result);
7501 else_result = ir_gen_node_extra(irb, else_node, parent_scope, LValNone, &peer_result->base);8528 else_result = ir_gen_node_extra(irb, else_node, parent_scope, LValNone, &peer_result->base);
7502 if (else_result == irb->codegen->invalid_instruction)8529 if (else_result == irb->codegen->invalid_inst_src)
7503 return else_result;8530 return else_result;
7504 if (!instr_is_unreachable(else_result))8531 if (!instr_is_unreachable(else_result))
7505 ir_mark_gen(ir_build_br(irb, parent_scope, node, end_block, is_comptime));8532 ir_mark_gen(ir_build_br(irb, parent_scope, node, end_block, is_comptime));
7506 }8533 }
7507 IrBasicBlock *after_else_block = irb->current_basic_block;8534 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
7508 ir_set_cursor_at_end_and_append_block(irb, end_block);8535 ir_set_cursor_at_end_and_append_block(irb, end_block);
75098536
7510 if (else_result) {8537 if (else_result) {
...@@ -7518,29 +8545,29 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo...@@ -7518,29 +8545,29 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
7518 peer_parent->peers.last()->next_bb = end_block;8545 peer_parent->peers.last()->next_bb = end_block;
7519 }8546 }
75208547
7521 IrInstruction *phi = ir_build_phi(irb, parent_scope, node, incoming_blocks.length,8548 IrInstSrc *phi = ir_build_phi(irb, parent_scope, node, incoming_blocks.length,
7522 incoming_blocks.items, incoming_values.items, peer_parent);8549 incoming_blocks.items, incoming_values.items, peer_parent);
7523 return ir_lval_wrap(irb, parent_scope, phi, lval, result_loc);8550 return ir_lval_wrap(irb, parent_scope, phi, lval, result_loc);
7524}8551}
75258552
7526static IrInstruction *ir_gen_bool_literal(IrBuilder *irb, Scope *scope, AstNode *node) {8553static IrInstSrc *ir_gen_bool_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
7527 assert(node->type == NodeTypeBoolLiteral);8554 assert(node->type == NodeTypeBoolLiteral);
7528 return ir_build_const_bool(irb, scope, node, node->data.bool_literal.value);8555 return ir_build_const_bool(irb, scope, node, node->data.bool_literal.value);
7529}8556}
75308557
7531static IrInstruction *ir_gen_enum_literal(IrBuilder *irb, Scope *scope, AstNode *node) {8558static IrInstSrc *ir_gen_enum_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
7532 assert(node->type == NodeTypeEnumLiteral);8559 assert(node->type == NodeTypeEnumLiteral);
7533 Buf *name = &node->data.enum_literal.identifier->data.str_lit.str;8560 Buf *name = &node->data.enum_literal.identifier->data.str_lit.str;
7534 return ir_build_const_enum_literal(irb, scope, node, name);8561 return ir_build_const_enum_literal(irb, scope, node, name);
7535}8562}
75368563
7537static IrInstruction *ir_gen_string_literal(IrBuilder *irb, Scope *scope, AstNode *node) {8564static IrInstSrc *ir_gen_string_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
7538 assert(node->type == NodeTypeStringLiteral);8565 assert(node->type == NodeTypeStringLiteral);
75398566
7540 return ir_build_const_str_lit(irb, scope, node, node->data.string_literal.buf);8567 return ir_build_const_str_lit(irb, scope, node, node->data.string_literal.buf);
7541}8568}
75428569
7543static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *node) {8570static IrInstSrc *ir_gen_array_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
7544 assert(node->type == NodeTypeArrayType);8571 assert(node->type == NodeTypeArrayType);
75458572
7546 AstNode *size_node = node->data.array_type.size;8573 AstNode *size_node = node->data.array_type.size;
...@@ -7553,10 +8580,10 @@ static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7553,10 +8580,10 @@ static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *n
75538580
7554 Scope *comptime_scope = create_comptime_scope(irb->codegen, node, scope);8581 Scope *comptime_scope = create_comptime_scope(irb->codegen, node, scope);
75558582
7556 IrInstruction *sentinel;8583 IrInstSrc *sentinel;
7557 if (sentinel_expr != nullptr) {8584 if (sentinel_expr != nullptr) {
7558 sentinel = ir_gen_node(irb, sentinel_expr, comptime_scope);8585 sentinel = ir_gen_node(irb, sentinel_expr, comptime_scope);
7559 if (sentinel == irb->codegen->invalid_instruction)8586 if (sentinel == irb->codegen->invalid_inst_src)
7560 return sentinel;8587 return sentinel;
7561 } else {8588 } else {
7562 sentinel = nullptr;8589 sentinel = nullptr;
...@@ -7565,42 +8592,42 @@ static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7565,42 +8592,42 @@ static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *n
7565 if (size_node) {8592 if (size_node) {
7566 if (is_const) {8593 if (is_const) {
7567 add_node_error(irb->codegen, node, buf_create_from_str("const qualifier invalid on array type"));8594 add_node_error(irb->codegen, node, buf_create_from_str("const qualifier invalid on array type"));
7568 return irb->codegen->invalid_instruction;8595 return irb->codegen->invalid_inst_src;
7569 }8596 }
7570 if (is_volatile) {8597 if (is_volatile) {
7571 add_node_error(irb->codegen, node, buf_create_from_str("volatile qualifier invalid on array type"));8598 add_node_error(irb->codegen, node, buf_create_from_str("volatile qualifier invalid on array type"));
7572 return irb->codegen->invalid_instruction;8599 return irb->codegen->invalid_inst_src;
7573 }8600 }
7574 if (is_allow_zero) {8601 if (is_allow_zero) {
7575 add_node_error(irb->codegen, node, buf_create_from_str("allowzero qualifier invalid on array type"));8602 add_node_error(irb->codegen, node, buf_create_from_str("allowzero qualifier invalid on array type"));
7576 return irb->codegen->invalid_instruction;8603 return irb->codegen->invalid_inst_src;
7577 }8604 }
7578 if (align_expr != nullptr) {8605 if (align_expr != nullptr) {
7579 add_node_error(irb->codegen, node, buf_create_from_str("align qualifier invalid on array type"));8606 add_node_error(irb->codegen, node, buf_create_from_str("align qualifier invalid on array type"));
7580 return irb->codegen->invalid_instruction;8607 return irb->codegen->invalid_inst_src;
7581 }8608 }
75828609
7583 IrInstruction *size_value = ir_gen_node(irb, size_node, comptime_scope);8610 IrInstSrc *size_value = ir_gen_node(irb, size_node, comptime_scope);
7584 if (size_value == irb->codegen->invalid_instruction)8611 if (size_value == irb->codegen->invalid_inst_src)
7585 return size_value;8612 return size_value;
75868613
7587 IrInstruction *child_type = ir_gen_node(irb, child_type_node, comptime_scope);8614 IrInstSrc *child_type = ir_gen_node(irb, child_type_node, comptime_scope);
7588 if (child_type == irb->codegen->invalid_instruction)8615 if (child_type == irb->codegen->invalid_inst_src)
7589 return child_type;8616 return child_type;
75908617
7591 return ir_build_array_type(irb, scope, node, size_value, sentinel, child_type);8618 return ir_build_array_type(irb, scope, node, size_value, sentinel, child_type);
7592 } else {8619 } else {
7593 IrInstruction *align_value;8620 IrInstSrc *align_value;
7594 if (align_expr != nullptr) {8621 if (align_expr != nullptr) {
7595 align_value = ir_gen_node(irb, align_expr, comptime_scope);8622 align_value = ir_gen_node(irb, align_expr, comptime_scope);
7596 if (align_value == irb->codegen->invalid_instruction)8623 if (align_value == irb->codegen->invalid_inst_src)
7597 return align_value;8624 return align_value;
7598 } else {8625 } else {
7599 align_value = nullptr;8626 align_value = nullptr;
7600 }8627 }
76018628
7602 IrInstruction *child_type = ir_gen_node(irb, child_type_node, comptime_scope);8629 IrInstSrc *child_type = ir_gen_node(irb, child_type_node, comptime_scope);
7603 if (child_type == irb->codegen->invalid_instruction)8630 if (child_type == irb->codegen->invalid_inst_src)
7604 return child_type;8631 return child_type;
76058632
7606 return ir_build_slice_type(irb, scope, node, child_type, is_const, is_volatile, sentinel,8633 return ir_build_slice_type(irb, scope, node, child_type, is_const, is_volatile, sentinel,
...@@ -7608,15 +8635,15 @@ static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *n...@@ -7608,15 +8635,15 @@ static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *n
7608 }8635 }
7609}8636}
76108637
7611static IrInstruction *ir_gen_anyframe_type(IrBuilder *irb, Scope *scope, AstNode *node) {8638static IrInstSrc *ir_gen_anyframe_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
7612 assert(node->type == NodeTypeAnyFrameType);8639 assert(node->type == NodeTypeAnyFrameType);
76138640
7614 AstNode *payload_type_node = node->data.anyframe_type.payload_type;8641 AstNode *payload_type_node = node->data.anyframe_type.payload_type;
7615 IrInstruction *payload_type_value = nullptr;8642 IrInstSrc *payload_type_value = nullptr;
76168643
7617 if (payload_type_node != nullptr) {8644 if (payload_type_node != nullptr) {
7618 payload_type_value = ir_gen_node(irb, payload_type_node, scope);8645 payload_type_value = ir_gen_node(irb, payload_type_node, scope);
7619 if (payload_type_value == irb->codegen->invalid_instruction)8646 if (payload_type_value == irb->codegen->invalid_inst_src)
7620 return payload_type_value;8647 return payload_type_value;
76218648
7622 }8649 }
...@@ -7624,7 +8651,7 @@ static IrInstruction *ir_gen_anyframe_type(IrBuilder *irb, Scope *scope, AstNode...@@ -7624,7 +8651,7 @@ static IrInstruction *ir_gen_anyframe_type(IrBuilder *irb, Scope *scope, AstNode
7624 return ir_build_anyframe_type(irb, scope, node, payload_type_value);8651 return ir_build_anyframe_type(irb, scope, node, payload_type_value);
7625}8652}
76268653
7627static IrInstruction *ir_gen_undefined_literal(IrBuilder *irb, Scope *scope, AstNode *node) {8654static IrInstSrc *ir_gen_undefined_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
7628 assert(node->type == NodeTypeUndefinedLiteral);8655 assert(node->type == NodeTypeUndefinedLiteral);
7629 return ir_build_const_undefined(irb, scope, node);8656 return ir_build_const_undefined(irb, scope, node);
7630}8657}
...@@ -7741,13 +8768,13 @@ static size_t find_asm_index(CodeGen *g, AstNode *node, AsmToken *tok, Buf *src_...@@ -7741,13 +8768,13 @@ static size_t find_asm_index(CodeGen *g, AstNode *node, AsmToken *tok, Buf *src_
7741 return SIZE_MAX;8768 return SIZE_MAX;
7742}8769}
77438770
7744static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *node) {8771static IrInstSrc *ir_gen_asm_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
7745 assert(node->type == NodeTypeAsmExpr);8772 assert(node->type == NodeTypeAsmExpr);
7746 AstNodeAsmExpr *asm_expr = &node->data.asm_expr;8773 AstNodeAsmExpr *asm_expr = &node->data.asm_expr;
77478774
7748 IrInstruction *asm_template = ir_gen_node(irb, asm_expr->asm_template, scope);8775 IrInstSrc *asm_template = ir_gen_node(irb, asm_expr->asm_template, scope);
7749 if (asm_template == irb->codegen->invalid_instruction)8776 if (asm_template == irb->codegen->invalid_inst_src)
7750 return irb->codegen->invalid_instruction;8777 return irb->codegen->invalid_inst_src;
77518778
7752 bool is_volatile = asm_expr->volatile_token != nullptr;8779 bool is_volatile = asm_expr->volatile_token != nullptr;
7753 bool in_fn_scope = (scope_fn_entry(scope) != nullptr);8780 bool in_fn_scope = (scope_fn_entry(scope) != nullptr);
...@@ -7756,7 +8783,7 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod...@@ -7756,7 +8783,7 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
7756 if (is_volatile) {8783 if (is_volatile) {
7757 add_token_error(irb->codegen, node->owner, asm_expr->volatile_token,8784 add_token_error(irb->codegen, node->owner, asm_expr->volatile_token,
7758 buf_sprintf("volatile is meaningless on global assembly"));8785 buf_sprintf("volatile is meaningless on global assembly"));
7759 return irb->codegen->invalid_instruction;8786 return irb->codegen->invalid_inst_src;
7760 }8787 }
77618788
7762 if (asm_expr->output_list.length != 0 || asm_expr->input_list.length != 0 ||8789 if (asm_expr->output_list.length != 0 || asm_expr->input_list.length != 0 ||
...@@ -7764,34 +8791,34 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod...@@ -7764,34 +8791,34 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
7764 {8791 {
7765 add_node_error(irb->codegen, node,8792 add_node_error(irb->codegen, node,
7766 buf_sprintf("global assembly cannot have inputs, outputs, or clobbers"));8793 buf_sprintf("global assembly cannot have inputs, outputs, or clobbers"));
7767 return irb->codegen->invalid_instruction;8794 return irb->codegen->invalid_inst_src;
7768 }8795 }
77698796
7770 return ir_build_asm_src(irb, scope, node, asm_template, nullptr, nullptr,8797 return ir_build_asm_src(irb, scope, node, asm_template, nullptr, nullptr,
7771 nullptr, 0, is_volatile, true);8798 nullptr, 0, is_volatile, true);
7772 }8799 }
77738800
7774 IrInstruction **input_list = allocate<IrInstruction *>(asm_expr->input_list.length);8801 IrInstSrc **input_list = allocate<IrInstSrc *>(asm_expr->input_list.length);
7775 IrInstruction **output_types = allocate<IrInstruction *>(asm_expr->output_list.length);8802 IrInstSrc **output_types = allocate<IrInstSrc *>(asm_expr->output_list.length);
7776 ZigVar **output_vars = allocate<ZigVar *>(asm_expr->output_list.length);8803 ZigVar **output_vars = allocate<ZigVar *>(asm_expr->output_list.length);
7777 size_t return_count = 0;8804 size_t return_count = 0;
7778 if (!is_volatile && asm_expr->output_list.length == 0) {8805 if (!is_volatile && asm_expr->output_list.length == 0) {
7779 add_node_error(irb->codegen, node,8806 add_node_error(irb->codegen, node,
7780 buf_sprintf("assembly expression with no output must be marked volatile"));8807 buf_sprintf("assembly expression with no output must be marked volatile"));
7781 return irb->codegen->invalid_instruction;8808 return irb->codegen->invalid_inst_src;
7782 }8809 }
7783 for (size_t i = 0; i < asm_expr->output_list.length; i += 1) {8810 for (size_t i = 0; i < asm_expr->output_list.length; i += 1) {
7784 AsmOutput *asm_output = asm_expr->output_list.at(i);8811 AsmOutput *asm_output = asm_expr->output_list.at(i);
7785 if (asm_output->return_type) {8812 if (asm_output->return_type) {
7786 return_count += 1;8813 return_count += 1;
77878814
7788 IrInstruction *return_type = ir_gen_node(irb, asm_output->return_type, scope);8815 IrInstSrc *return_type = ir_gen_node(irb, asm_output->return_type, scope);
7789 if (return_type == irb->codegen->invalid_instruction)8816 if (return_type == irb->codegen->invalid_inst_src)
7790 return irb->codegen->invalid_instruction;8817 return irb->codegen->invalid_inst_src;
7791 if (return_count > 1) {8818 if (return_count > 1) {
7792 add_node_error(irb->codegen, node,8819 add_node_error(irb->codegen, node,
7793 buf_sprintf("inline assembly allows up to one output value"));8820 buf_sprintf("inline assembly allows up to one output value"));
7794 return irb->codegen->invalid_instruction;8821 return irb->codegen->invalid_inst_src;
7795 }8822 }
7796 output_types[i] = return_type;8823 output_types[i] = return_type;
7797 } else {8824 } else {
...@@ -7804,7 +8831,7 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod...@@ -7804,7 +8831,7 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
7804 } else {8831 } else {
7805 add_node_error(irb->codegen, node,8832 add_node_error(irb->codegen, node,
7806 buf_sprintf("use of undeclared identifier '%s'", buf_ptr(variable_name)));8833 buf_sprintf("use of undeclared identifier '%s'", buf_ptr(variable_name)));
7807 return irb->codegen->invalid_instruction;8834 return irb->codegen->invalid_inst_src;
7808 }8835 }
7809 }8836 }
78108837
...@@ -7814,14 +8841,14 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod...@@ -7814,14 +8841,14 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
7814 buf_sprintf("invalid modifier starting output constraint for '%s': '%c', only '=' is supported."8841 buf_sprintf("invalid modifier starting output constraint for '%s': '%c', only '=' is supported."
7815 " Compiler TODO: see https://github.com/ziglang/zig/issues/215",8842 " Compiler TODO: see https://github.com/ziglang/zig/issues/215",
7816 buf_ptr(asm_output->asm_symbolic_name), modifier));8843 buf_ptr(asm_output->asm_symbolic_name), modifier));
7817 return irb->codegen->invalid_instruction;8844 return irb->codegen->invalid_inst_src;
7818 }8845 }
7819 }8846 }
7820 for (size_t i = 0; i < asm_expr->input_list.length; i += 1) {8847 for (size_t i = 0; i < asm_expr->input_list.length; i += 1) {
7821 AsmInput *asm_input = asm_expr->input_list.at(i);8848 AsmInput *asm_input = asm_expr->input_list.at(i);
7822 IrInstruction *input_value = ir_gen_node(irb, asm_input->expr, scope);8849 IrInstSrc *input_value = ir_gen_node(irb, asm_input->expr, scope);
7823 if (input_value == irb->codegen->invalid_instruction)8850 if (input_value == irb->codegen->invalid_inst_src)
7824 return irb->codegen->invalid_instruction;8851 return irb->codegen->invalid_inst_src;
78258852
7826 input_list[i] = input_value;8853 input_list[i] = input_value;
7827 }8854 }
...@@ -7830,7 +8857,7 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod...@@ -7830,7 +8857,7 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
7830 output_vars, return_count, is_volatile, false);8857 output_vars, return_count, is_volatile, false);
7831}8858}
78328859
7833static IrInstruction *ir_gen_if_optional_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,8860static IrInstSrc *ir_gen_if_optional_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
7834 ResultLoc *result_loc)8861 ResultLoc *result_loc)
7835{8862{
7836 assert(node->type == NodeTypeIfOptional);8863 assert(node->type == NodeTypeIfOptional);
...@@ -7841,24 +8868,24 @@ static IrInstruction *ir_gen_if_optional_expr(IrBuilder *irb, Scope *scope, AstN...@@ -7841,24 +8868,24 @@ static IrInstruction *ir_gen_if_optional_expr(IrBuilder *irb, Scope *scope, AstN
7841 AstNode *else_node = node->data.test_expr.else_node;8868 AstNode *else_node = node->data.test_expr.else_node;
7842 bool var_is_ptr = node->data.test_expr.var_is_ptr;8869 bool var_is_ptr = node->data.test_expr.var_is_ptr;
78438870
7844 IrInstruction *maybe_val_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);8871 IrInstSrc *maybe_val_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
7845 if (maybe_val_ptr == irb->codegen->invalid_instruction)8872 if (maybe_val_ptr == irb->codegen->invalid_inst_src)
7846 return maybe_val_ptr;8873 return maybe_val_ptr;
78478874
7848 IrInstruction *maybe_val = ir_build_load_ptr(irb, scope, node, maybe_val_ptr);8875 IrInstSrc *maybe_val = ir_build_load_ptr(irb, scope, node, maybe_val_ptr);
7849 IrInstruction *is_non_null = ir_build_test_nonnull(irb, scope, node, maybe_val);8876 IrInstSrc *is_non_null = ir_build_test_non_null_src(irb, scope, node, maybe_val);
78508877
7851 IrBasicBlock *then_block = ir_create_basic_block(irb, scope, "OptionalThen");8878 IrBasicBlockSrc *then_block = ir_create_basic_block(irb, scope, "OptionalThen");
7852 IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "OptionalElse");8879 IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "OptionalElse");
7853 IrBasicBlock *endif_block = ir_create_basic_block(irb, scope, "OptionalEndIf");8880 IrBasicBlockSrc *endif_block = ir_create_basic_block(irb, scope, "OptionalEndIf");
78548881
7855 IrInstruction *is_comptime;8882 IrInstSrc *is_comptime;
7856 if (ir_should_inline(irb->exec, scope)) {8883 if (ir_should_inline(irb->exec, scope)) {
7857 is_comptime = ir_build_const_bool(irb, scope, node, true);8884 is_comptime = ir_build_const_bool(irb, scope, node, true);
7858 } else {8885 } else {
7859 is_comptime = ir_build_test_comptime(irb, scope, node, is_non_null);8886 is_comptime = ir_build_test_comptime(irb, scope, node, is_non_null);
7860 }8887 }
7861 IrInstruction *cond_br_inst = ir_build_cond_br(irb, scope, node, is_non_null,8888 IrInstSrc *cond_br_inst = ir_build_cond_br(irb, scope, node, is_non_null,
7862 then_block, else_block, is_comptime);8889 then_block, else_block, is_comptime);
78638890
7864 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, else_block, endif_block,8891 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, else_block, endif_block,
...@@ -7874,48 +8901,48 @@ static IrInstruction *ir_gen_if_optional_expr(IrBuilder *irb, Scope *scope, AstN...@@ -7874,48 +8901,48 @@ static IrInstruction *ir_gen_if_optional_expr(IrBuilder *irb, Scope *scope, AstN
7874 ZigVar *var = ir_create_var(irb, node, subexpr_scope,8901 ZigVar *var = ir_create_var(irb, node, subexpr_scope,
7875 var_symbol, is_const, is_const, is_shadowable, is_comptime);8902 var_symbol, is_const, is_const, is_shadowable, is_comptime);
78768903
7877 IrInstruction *payload_ptr = ir_build_optional_unwrap_ptr(irb, subexpr_scope, node, maybe_val_ptr, false, false);8904 IrInstSrc *payload_ptr = ir_build_optional_unwrap_ptr(irb, subexpr_scope, node, maybe_val_ptr, false, false);
7878 IrInstruction *var_ptr = var_is_ptr ? ir_build_ref(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;8905 IrInstSrc *var_ptr = var_is_ptr ? ir_build_ref_src(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;
7879 ir_build_var_decl_src(irb, subexpr_scope, node, var, nullptr, var_ptr);8906 ir_build_var_decl_src(irb, subexpr_scope, node, var, nullptr, var_ptr);
7880 var_scope = var->child_scope;8907 var_scope = var->child_scope;
7881 } else {8908 } else {
7882 var_scope = subexpr_scope;8909 var_scope = subexpr_scope;
7883 }8910 }
7884 IrInstruction *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,8911 IrInstSrc *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,
7885 &peer_parent->peers.at(0)->base);8912 &peer_parent->peers.at(0)->base);
7886 if (then_expr_result == irb->codegen->invalid_instruction)8913 if (then_expr_result == irb->codegen->invalid_inst_src)
7887 return then_expr_result;8914 return then_expr_result;
7888 IrBasicBlock *after_then_block = irb->current_basic_block;8915 IrBasicBlockSrc *after_then_block = irb->current_basic_block;
7889 if (!instr_is_unreachable(then_expr_result))8916 if (!instr_is_unreachable(then_expr_result))
7890 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));8917 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
78918918
7892 ir_set_cursor_at_end_and_append_block(irb, else_block);8919 ir_set_cursor_at_end_and_append_block(irb, else_block);
7893 IrInstruction *else_expr_result;8920 IrInstSrc *else_expr_result;
7894 if (else_node) {8921 if (else_node) {
7895 else_expr_result = ir_gen_node_extra(irb, else_node, subexpr_scope, lval, &peer_parent->peers.at(1)->base);8922 else_expr_result = ir_gen_node_extra(irb, else_node, subexpr_scope, lval, &peer_parent->peers.at(1)->base);
7896 if (else_expr_result == irb->codegen->invalid_instruction)8923 if (else_expr_result == irb->codegen->invalid_inst_src)
7897 return else_expr_result;8924 return else_expr_result;
7898 } else {8925 } else {
7899 else_expr_result = ir_build_const_void(irb, scope, node);8926 else_expr_result = ir_build_const_void(irb, scope, node);
7900 ir_build_end_expr(irb, scope, node, else_expr_result, &peer_parent->peers.at(1)->base);8927 ir_build_end_expr(irb, scope, node, else_expr_result, &peer_parent->peers.at(1)->base);
7901 }8928 }
7902 IrBasicBlock *after_else_block = irb->current_basic_block;8929 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
7903 if (!instr_is_unreachable(else_expr_result))8930 if (!instr_is_unreachable(else_expr_result))
7904 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));8931 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
79058932
7906 ir_set_cursor_at_end_and_append_block(irb, endif_block);8933 ir_set_cursor_at_end_and_append_block(irb, endif_block);
7907 IrInstruction **incoming_values = allocate<IrInstruction *>(2);8934 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
7908 incoming_values[0] = then_expr_result;8935 incoming_values[0] = then_expr_result;
7909 incoming_values[1] = else_expr_result;8936 incoming_values[1] = else_expr_result;
7910 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");8937 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
7911 incoming_blocks[0] = after_then_block;8938 incoming_blocks[0] = after_then_block;
7912 incoming_blocks[1] = after_else_block;8939 incoming_blocks[1] = after_else_block;
79138940
7914 IrInstruction *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);8941 IrInstSrc *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
7915 return ir_expr_wrap(irb, scope, phi, result_loc);8942 return ir_expr_wrap(irb, scope, phi, result_loc);
7916}8943}
79178944
7918static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,8945static IrInstSrc *ir_gen_if_err_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
7919 ResultLoc *result_loc)8946 ResultLoc *result_loc)
7920{8947{
7921 assert(node->type == NodeTypeIfErrorExpr);8948 assert(node->type == NodeTypeIfErrorExpr);
...@@ -7928,20 +8955,20 @@ static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *...@@ -7928,20 +8955,20 @@ static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *
7928 Buf *var_symbol = node->data.if_err_expr.var_symbol;8955 Buf *var_symbol = node->data.if_err_expr.var_symbol;
7929 Buf *err_symbol = node->data.if_err_expr.err_symbol;8956 Buf *err_symbol = node->data.if_err_expr.err_symbol;
79308957
7931 IrInstruction *err_val_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);8958 IrInstSrc *err_val_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);
7932 if (err_val_ptr == irb->codegen->invalid_instruction)8959 if (err_val_ptr == irb->codegen->invalid_inst_src)
7933 return err_val_ptr;8960 return err_val_ptr;
79348961
7935 IrInstruction *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);8962 IrInstSrc *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);
7936 IrInstruction *is_err = ir_build_test_err_src(irb, scope, node, err_val_ptr, true, false);8963 IrInstSrc *is_err = ir_build_test_err_src(irb, scope, node, err_val_ptr, true, false);
79378964
7938 IrBasicBlock *ok_block = ir_create_basic_block(irb, scope, "TryOk");8965 IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, scope, "TryOk");
7939 IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "TryElse");8966 IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "TryElse");
7940 IrBasicBlock *endif_block = ir_create_basic_block(irb, scope, "TryEnd");8967 IrBasicBlockSrc *endif_block = ir_create_basic_block(irb, scope, "TryEnd");
79418968
7942 bool force_comptime = ir_should_inline(irb->exec, scope);8969 bool force_comptime = ir_should_inline(irb->exec, scope);
7943 IrInstruction *is_comptime = force_comptime ? ir_build_const_bool(irb, scope, node, true) : ir_build_test_comptime(irb, scope, node, is_err);8970 IrInstSrc *is_comptime = force_comptime ? ir_build_const_bool(irb, scope, node, true) : ir_build_test_comptime(irb, scope, node, is_err);
7944 IrInstruction *cond_br_inst = ir_build_cond_br(irb, scope, node, is_err, else_block, ok_block, is_comptime);8971 IrInstSrc *cond_br_inst = ir_build_cond_br(irb, scope, node, is_err, else_block, ok_block, is_comptime);
79458972
7946 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, else_block, endif_block,8973 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, else_block, endif_block,
7947 result_loc, is_comptime);8974 result_loc, is_comptime);
...@@ -7952,29 +8979,29 @@ static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *...@@ -7952,29 +8979,29 @@ static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *
7952 Scope *var_scope;8979 Scope *var_scope;
7953 if (var_symbol) {8980 if (var_symbol) {
7954 bool is_shadowable = false;8981 bool is_shadowable = false;
7955 IrInstruction *var_is_comptime = force_comptime ? ir_build_const_bool(irb, subexpr_scope, node, true) : ir_build_test_comptime(irb, subexpr_scope, node, err_val);8982 IrInstSrc *var_is_comptime = force_comptime ? ir_build_const_bool(irb, subexpr_scope, node, true) : ir_build_test_comptime(irb, subexpr_scope, node, err_val);
7956 ZigVar *var = ir_create_var(irb, node, subexpr_scope,8983 ZigVar *var = ir_create_var(irb, node, subexpr_scope,
7957 var_symbol, var_is_const, var_is_const, is_shadowable, var_is_comptime);8984 var_symbol, var_is_const, var_is_const, is_shadowable, var_is_comptime);
79588985
7959 IrInstruction *payload_ptr = ir_build_unwrap_err_payload(irb, subexpr_scope, node, err_val_ptr, false, false);8986 IrInstSrc *payload_ptr = ir_build_unwrap_err_payload_src(irb, subexpr_scope, node, err_val_ptr, false, false);
7960 IrInstruction *var_ptr = var_is_ptr ?8987 IrInstSrc *var_ptr = var_is_ptr ?
7961 ir_build_ref(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;8988 ir_build_ref_src(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;
7962 ir_build_var_decl_src(irb, subexpr_scope, node, var, nullptr, var_ptr);8989 ir_build_var_decl_src(irb, subexpr_scope, node, var, nullptr, var_ptr);
7963 var_scope = var->child_scope;8990 var_scope = var->child_scope;
7964 } else {8991 } else {
7965 var_scope = subexpr_scope;8992 var_scope = subexpr_scope;
7966 }8993 }
7967 IrInstruction *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,8994 IrInstSrc *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,
7968 &peer_parent->peers.at(0)->base);8995 &peer_parent->peers.at(0)->base);
7969 if (then_expr_result == irb->codegen->invalid_instruction)8996 if (then_expr_result == irb->codegen->invalid_inst_src)
7970 return then_expr_result;8997 return then_expr_result;
7971 IrBasicBlock *after_then_block = irb->current_basic_block;8998 IrBasicBlockSrc *after_then_block = irb->current_basic_block;
7972 if (!instr_is_unreachable(then_expr_result))8999 if (!instr_is_unreachable(then_expr_result))
7973 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));9000 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
79749001
7975 ir_set_cursor_at_end_and_append_block(irb, else_block);9002 ir_set_cursor_at_end_and_append_block(irb, else_block);
79769003
7977 IrInstruction *else_expr_result;9004 IrInstSrc *else_expr_result;
7978 if (else_node) {9005 if (else_node) {
7979 Scope *err_var_scope;9006 Scope *err_var_scope;
7980 if (err_symbol) {9007 if (err_symbol) {
...@@ -7983,40 +9010,40 @@ static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *...@@ -7983,40 +9010,40 @@ static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *
7983 ZigVar *var = ir_create_var(irb, node, subexpr_scope,9010 ZigVar *var = ir_create_var(irb, node, subexpr_scope,
7984 err_symbol, is_const, is_const, is_shadowable, is_comptime);9011 err_symbol, is_const, is_const, is_shadowable, is_comptime);
79859012
7986 IrInstruction *err_ptr = ir_build_unwrap_err_code(irb, subexpr_scope, node, err_val_ptr);9013 IrInstSrc *err_ptr = ir_build_unwrap_err_code_src(irb, subexpr_scope, node, err_val_ptr);
7987 ir_build_var_decl_src(irb, subexpr_scope, node, var, nullptr, err_ptr);9014 ir_build_var_decl_src(irb, subexpr_scope, node, var, nullptr, err_ptr);
7988 err_var_scope = var->child_scope;9015 err_var_scope = var->child_scope;
7989 } else {9016 } else {
7990 err_var_scope = subexpr_scope;9017 err_var_scope = subexpr_scope;
7991 }9018 }
7992 else_expr_result = ir_gen_node_extra(irb, else_node, err_var_scope, lval, &peer_parent->peers.at(1)->base);9019 else_expr_result = ir_gen_node_extra(irb, else_node, err_var_scope, lval, &peer_parent->peers.at(1)->base);
7993 if (else_expr_result == irb->codegen->invalid_instruction)9020 if (else_expr_result == irb->codegen->invalid_inst_src)
7994 return else_expr_result;9021 return else_expr_result;
7995 } else {9022 } else {
7996 else_expr_result = ir_build_const_void(irb, scope, node);9023 else_expr_result = ir_build_const_void(irb, scope, node);
7997 ir_build_end_expr(irb, scope, node, else_expr_result, &peer_parent->peers.at(1)->base);9024 ir_build_end_expr(irb, scope, node, else_expr_result, &peer_parent->peers.at(1)->base);
7998 }9025 }
7999 IrBasicBlock *after_else_block = irb->current_basic_block;9026 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
8000 if (!instr_is_unreachable(else_expr_result))9027 if (!instr_is_unreachable(else_expr_result))
8001 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));9028 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
80029029
8003 ir_set_cursor_at_end_and_append_block(irb, endif_block);9030 ir_set_cursor_at_end_and_append_block(irb, endif_block);
8004 IrInstruction **incoming_values = allocate<IrInstruction *>(2);9031 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
8005 incoming_values[0] = then_expr_result;9032 incoming_values[0] = then_expr_result;
8006 incoming_values[1] = else_expr_result;9033 incoming_values[1] = else_expr_result;
8007 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");9034 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
8008 incoming_blocks[0] = after_then_block;9035 incoming_blocks[0] = after_then_block;
8009 incoming_blocks[1] = after_else_block;9036 incoming_blocks[1] = after_else_block;
80109037
8011 IrInstruction *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);9038 IrInstSrc *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
8012 return ir_expr_wrap(irb, scope, phi, result_loc);9039 return ir_expr_wrap(irb, scope, phi, result_loc);
8013}9040}
80149041
8015static bool ir_gen_switch_prong_expr(IrBuilder *irb, Scope *scope, AstNode *switch_node, AstNode *prong_node,9042static bool ir_gen_switch_prong_expr(IrBuilderSrc *irb, Scope *scope, AstNode *switch_node, AstNode *prong_node,
8016 IrBasicBlock *end_block, IrInstruction *is_comptime, IrInstruction *var_is_comptime,9043 IrBasicBlockSrc *end_block, IrInstSrc *is_comptime, IrInstSrc *var_is_comptime,
8017 IrInstruction *target_value_ptr, IrInstruction **prong_values, size_t prong_values_len,9044 IrInstSrc *target_value_ptr, IrInstSrc **prong_values, size_t prong_values_len,
8018 ZigList<IrBasicBlock *> *incoming_blocks, ZigList<IrInstruction *> *incoming_values,9045 ZigList<IrBasicBlockSrc *> *incoming_blocks, ZigList<IrInstSrc *> *incoming_values,
8019 IrInstructionSwitchElseVar **out_switch_else_var, LVal lval, ResultLoc *result_loc)9046 IrInstSrcSwitchElseVar **out_switch_else_var, LVal lval, ResultLoc *result_loc)
8020{9047{
8021 assert(switch_node->type == NodeTypeSwitchExpr);9048 assert(switch_node->type == NodeTypeSwitchExpr);
8022 assert(prong_node->type == NodeTypeSwitchProng);9049 assert(prong_node->type == NodeTypeSwitchProng);
...@@ -8034,28 +9061,28 @@ static bool ir_gen_switch_prong_expr(IrBuilder *irb, Scope *scope, AstNode *swit...@@ -8034,28 +9061,28 @@ static bool ir_gen_switch_prong_expr(IrBuilder *irb, Scope *scope, AstNode *swit
8034 ZigVar *var = ir_create_var(irb, var_symbol_node, scope,9061 ZigVar *var = ir_create_var(irb, var_symbol_node, scope,
8035 var_name, is_const, is_const, is_shadowable, var_is_comptime);9062 var_name, is_const, is_const, is_shadowable, var_is_comptime);
8036 child_scope = var->child_scope;9063 child_scope = var->child_scope;
8037 IrInstruction *var_ptr;9064 IrInstSrc *var_ptr;
8038 if (out_switch_else_var != nullptr) {9065 if (out_switch_else_var != nullptr) {
8039 IrInstructionSwitchElseVar *switch_else_var = ir_build_switch_else_var(irb, scope, var_symbol_node,9066 IrInstSrcSwitchElseVar *switch_else_var = ir_build_switch_else_var(irb, scope, var_symbol_node,
8040 target_value_ptr);9067 target_value_ptr);
8041 *out_switch_else_var = switch_else_var;9068 *out_switch_else_var = switch_else_var;
8042 IrInstruction *payload_ptr = &switch_else_var->base;9069 IrInstSrc *payload_ptr = &switch_else_var->base;
8043 var_ptr = var_is_ptr ? ir_build_ref(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;9070 var_ptr = var_is_ptr ? ir_build_ref_src(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;
8044 } else if (prong_values != nullptr) {9071 } else if (prong_values != nullptr) {
8045 IrInstruction *payload_ptr = ir_build_switch_var(irb, scope, var_symbol_node, target_value_ptr,9072 IrInstSrc *payload_ptr = ir_build_switch_var(irb, scope, var_symbol_node, target_value_ptr,
8046 prong_values, prong_values_len);9073 prong_values, prong_values_len);
8047 var_ptr = var_is_ptr ? ir_build_ref(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;9074 var_ptr = var_is_ptr ? ir_build_ref_src(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;
8048 } else {9075 } else {
8049 var_ptr = var_is_ptr ?9076 var_ptr = var_is_ptr ?
8050 ir_build_ref(irb, scope, var_symbol_node, target_value_ptr, true, false) : target_value_ptr;9077 ir_build_ref_src(irb, scope, var_symbol_node, target_value_ptr, true, false) : target_value_ptr;
8051 }9078 }
8052 ir_build_var_decl_src(irb, scope, var_symbol_node, var, nullptr, var_ptr);9079 ir_build_var_decl_src(irb, scope, var_symbol_node, var, nullptr, var_ptr);
8053 } else {9080 } else {
8054 child_scope = scope;9081 child_scope = scope;
8055 }9082 }
80569083
8057 IrInstruction *expr_result = ir_gen_node_extra(irb, expr_node, child_scope, lval, result_loc);9084 IrInstSrc *expr_result = ir_gen_node_extra(irb, expr_node, child_scope, lval, result_loc);
8058 if (expr_result == irb->codegen->invalid_instruction)9085 if (expr_result == irb->codegen->invalid_inst_src)
8059 return false;9086 return false;
8060 if (!instr_is_unreachable(expr_result))9087 if (!instr_is_unreachable(expr_result))
8061 ir_mark_gen(ir_build_br(irb, scope, switch_node, end_block, is_comptime));9088 ir_mark_gen(ir_build_br(irb, scope, switch_node, end_block, is_comptime));
...@@ -8064,25 +9091,25 @@ static bool ir_gen_switch_prong_expr(IrBuilder *irb, Scope *scope, AstNode *swit...@@ -8064,25 +9091,25 @@ static bool ir_gen_switch_prong_expr(IrBuilder *irb, Scope *scope, AstNode *swit
8064 return true;9091 return true;
8065}9092}
80669093
8067static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,9094static IrInstSrc *ir_gen_switch_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
8068 ResultLoc *result_loc)9095 ResultLoc *result_loc)
8069{9096{
8070 assert(node->type == NodeTypeSwitchExpr);9097 assert(node->type == NodeTypeSwitchExpr);
80719098
8072 AstNode *target_node = node->data.switch_expr.expr;9099 AstNode *target_node = node->data.switch_expr.expr;
8073 IrInstruction *target_value_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);9100 IrInstSrc *target_value_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);
8074 if (target_value_ptr == irb->codegen->invalid_instruction)9101 if (target_value_ptr == irb->codegen->invalid_inst_src)
8075 return target_value_ptr;9102 return target_value_ptr;
8076 IrInstruction *target_value = ir_build_switch_target(irb, scope, node, target_value_ptr);9103 IrInstSrc *target_value = ir_build_switch_target(irb, scope, node, target_value_ptr);
80779104
8078 IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "SwitchElse");9105 IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "SwitchElse");
8079 IrBasicBlock *end_block = ir_create_basic_block(irb, scope, "SwitchEnd");9106 IrBasicBlockSrc *end_block = ir_create_basic_block(irb, scope, "SwitchEnd");
80809107
8081 size_t prong_count = node->data.switch_expr.prongs.length;9108 size_t prong_count = node->data.switch_expr.prongs.length;
8082 ZigList<IrInstructionSwitchBrCase> cases = {0};9109 ZigList<IrInstSrcSwitchBrCase> cases = {0};
80839110
8084 IrInstruction *is_comptime;9111 IrInstSrc *is_comptime;
8085 IrInstruction *var_is_comptime;9112 IrInstSrc *var_is_comptime;
8086 if (ir_should_inline(irb->exec, scope)) {9113 if (ir_should_inline(irb->exec, scope)) {
8087 is_comptime = ir_build_const_bool(irb, scope, node, true);9114 is_comptime = ir_build_const_bool(irb, scope, node, true);
8088 var_is_comptime = is_comptime;9115 var_is_comptime = is_comptime;
...@@ -8091,11 +9118,11 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *...@@ -8091,11 +9118,11 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
8091 var_is_comptime = ir_build_test_comptime(irb, scope, node, target_value_ptr);9118 var_is_comptime = ir_build_test_comptime(irb, scope, node, target_value_ptr);
8092 }9119 }
80939120
8094 ZigList<IrInstruction *> incoming_values = {0};9121 ZigList<IrInstSrc *> incoming_values = {0};
8095 ZigList<IrBasicBlock *> incoming_blocks = {0};9122 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
8096 ZigList<IrInstructionCheckSwitchProngsRange> check_ranges = {0};9123 ZigList<IrInstSrcCheckSwitchProngsRange> check_ranges = {0};
80979124
8098 IrInstructionSwitchElseVar *switch_else_var = nullptr;9125 IrInstSrcSwitchElseVar *switch_else_var = nullptr;
80999126
8100 ResultLocPeerParent *peer_parent = allocate<ResultLocPeerParent>(1);9127 ResultLocPeerParent *peer_parent = allocate<ResultLocPeerParent>(1);
8101 peer_parent->base.id = ResultLocIdPeerParent;9128 peer_parent->base.id = ResultLocIdPeerParent;
...@@ -8110,37 +9137,14 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *...@@ -8110,37 +9137,14 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
8110 Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, scope, is_comptime);9137 Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, scope, is_comptime);
8111 Scope *comptime_scope = create_comptime_scope(irb->codegen, node, scope);9138 Scope *comptime_scope = create_comptime_scope(irb->codegen, node, scope);
8112 AstNode *else_prong = nullptr;9139 AstNode *else_prong = nullptr;
9140 AstNode *underscore_prong = nullptr;
8113 for (size_t prong_i = 0; prong_i < prong_count; prong_i += 1) {9141 for (size_t prong_i = 0; prong_i < prong_count; prong_i += 1) {
8114 AstNode *prong_node = node->data.switch_expr.prongs.at(prong_i);9142 AstNode *prong_node = node->data.switch_expr.prongs.at(prong_i);
8115 size_t prong_item_count = prong_node->data.switch_prong.items.length;9143 size_t prong_item_count = prong_node->data.switch_prong.items.length;
8116 if (prong_item_count == 0) {9144 if (prong_node->data.switch_prong.any_items_are_range) {
8117 ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
8118 if (else_prong) {
8119 ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
8120 buf_sprintf("multiple else prongs in switch expression"));
8121 add_error_note(irb->codegen, msg, else_prong,
8122 buf_sprintf("previous else prong is here"));
8123 return irb->codegen->invalid_instruction;
8124 }
8125 else_prong = prong_node;
8126
8127 IrBasicBlock *prev_block = irb->current_basic_block;
8128 if (peer_parent->peers.length > 0) {
8129 peer_parent->peers.last()->next_bb = else_block;
8130 }
8131 peer_parent->peers.append(this_peer_result_loc);
8132 ir_set_cursor_at_end_and_append_block(irb, else_block);
8133 if (!ir_gen_switch_prong_expr(irb, subexpr_scope, node, prong_node, end_block,
8134 is_comptime, var_is_comptime, target_value_ptr, nullptr, 0, &incoming_blocks, &incoming_values,
8135 &switch_else_var, LValNone, &this_peer_result_loc->base))
8136 {
8137 return irb->codegen->invalid_instruction;
8138 }
8139 ir_set_cursor_at_end(irb, prev_block);
8140 } else if (prong_node->data.switch_prong.any_items_are_range) {
8141 ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);9145 ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
81429146
8143 IrInstruction *ok_bit = nullptr;9147 IrInstSrc *ok_bit = nullptr;
8144 AstNode *last_item_node = nullptr;9148 AstNode *last_item_node = nullptr;
8145 for (size_t item_i = 0; item_i < prong_item_count; item_i += 1) {9149 for (size_t item_i = 0; item_i < prong_item_count; item_i += 1) {
8146 AstNode *item_node = prong_node->data.switch_prong.items.at(item_i);9150 AstNode *item_node = prong_node->data.switch_prong.items.at(item_i);
...@@ -8149,23 +9153,23 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *...@@ -8149,23 +9153,23 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
8149 AstNode *start_node = item_node->data.switch_range.start;9153 AstNode *start_node = item_node->data.switch_range.start;
8150 AstNode *end_node = item_node->data.switch_range.end;9154 AstNode *end_node = item_node->data.switch_range.end;
81519155
8152 IrInstruction *start_value = ir_gen_node(irb, start_node, comptime_scope);9156 IrInstSrc *start_value = ir_gen_node(irb, start_node, comptime_scope);
8153 if (start_value == irb->codegen->invalid_instruction)9157 if (start_value == irb->codegen->invalid_inst_src)
8154 return irb->codegen->invalid_instruction;9158 return irb->codegen->invalid_inst_src;
81559159
8156 IrInstruction *end_value = ir_gen_node(irb, end_node, comptime_scope);9160 IrInstSrc *end_value = ir_gen_node(irb, end_node, comptime_scope);
8157 if (end_value == irb->codegen->invalid_instruction)9161 if (end_value == irb->codegen->invalid_inst_src)
8158 return irb->codegen->invalid_instruction;9162 return irb->codegen->invalid_inst_src;
81599163
8160 IrInstructionCheckSwitchProngsRange *check_range = check_ranges.add_one();9164 IrInstSrcCheckSwitchProngsRange *check_range = check_ranges.add_one();
8161 check_range->start = start_value;9165 check_range->start = start_value;
8162 check_range->end = end_value;9166 check_range->end = end_value;
81639167
8164 IrInstruction *lower_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpGreaterOrEq,9168 IrInstSrc *lower_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpGreaterOrEq,
8165 target_value, start_value, false);9169 target_value, start_value, false);
8166 IrInstruction *upper_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpLessOrEq,9170 IrInstSrc *upper_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpLessOrEq,
8167 target_value, end_value, false);9171 target_value, end_value, false);
8168 IrInstruction *both_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolAnd,9172 IrInstSrc *both_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolAnd,
8169 lower_range_ok, upper_range_ok, false);9173 lower_range_ok, upper_range_ok, false);
8170 if (ok_bit) {9174 if (ok_bit) {
8171 ok_bit = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolOr, both_ok, ok_bit, false);9175 ok_bit = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolOr, both_ok, ok_bit, false);
...@@ -8173,15 +9177,15 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *...@@ -8173,15 +9177,15 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
8173 ok_bit = both_ok;9177 ok_bit = both_ok;
8174 }9178 }
8175 } else {9179 } else {
8176 IrInstruction *item_value = ir_gen_node(irb, item_node, comptime_scope);9180 IrInstSrc *item_value = ir_gen_node(irb, item_node, comptime_scope);
8177 if (item_value == irb->codegen->invalid_instruction)9181 if (item_value == irb->codegen->invalid_inst_src)
8178 return irb->codegen->invalid_instruction;9182 return irb->codegen->invalid_inst_src;
81799183
8180 IrInstructionCheckSwitchProngsRange *check_range = check_ranges.add_one();9184 IrInstSrcCheckSwitchProngsRange *check_range = check_ranges.add_one();
8181 check_range->start = item_value;9185 check_range->start = item_value;
8182 check_range->end = item_value;9186 check_range->end = item_value;
81839187
8184 IrInstruction *cmp_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpEq,9188 IrInstSrc *cmp_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpEq,
8185 item_value, target_value, false);9189 item_value, target_value, false);
8186 if (ok_bit) {9190 if (ok_bit) {
8187 ok_bit = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolOr, cmp_ok, ok_bit, false);9191 ok_bit = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolOr, cmp_ok, ok_bit, false);
...@@ -8191,12 +9195,12 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *...@@ -8191,12 +9195,12 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
8191 }9195 }
8192 }9196 }
81939197
8194 IrBasicBlock *range_block_yes = ir_create_basic_block(irb, scope, "SwitchRangeYes");9198 IrBasicBlockSrc *range_block_yes = ir_create_basic_block(irb, scope, "SwitchRangeYes");
8195 IrBasicBlock *range_block_no = ir_create_basic_block(irb, scope, "SwitchRangeNo");9199 IrBasicBlockSrc *range_block_no = ir_create_basic_block(irb, scope, "SwitchRangeNo");
81969200
8197 assert(ok_bit);9201 assert(ok_bit);
8198 assert(last_item_node);9202 assert(last_item_node);
8199 IrInstruction *br_inst = ir_mark_gen(ir_build_cond_br(irb, scope, last_item_node, ok_bit,9203 IrInstSrc *br_inst = ir_mark_gen(ir_build_cond_br(irb, scope, last_item_node, ok_bit,
8200 range_block_yes, range_block_no, is_comptime));9204 range_block_yes, range_block_no, is_comptime));
8201 if (peer_parent->base.source_instruction == nullptr) {9205 if (peer_parent->base.source_instruction == nullptr) {
8202 peer_parent->base.source_instruction = br_inst;9206 peer_parent->base.source_instruction = br_inst;
...@@ -8211,10 +9215,60 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *...@@ -8211,10 +9215,60 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
8211 is_comptime, var_is_comptime, target_value_ptr, nullptr, 0,9215 is_comptime, var_is_comptime, target_value_ptr, nullptr, 0,
8212 &incoming_blocks, &incoming_values, nullptr, LValNone, &this_peer_result_loc->base))9216 &incoming_blocks, &incoming_values, nullptr, LValNone, &this_peer_result_loc->base))
8213 {9217 {
8214 return irb->codegen->invalid_instruction;9218 return irb->codegen->invalid_inst_src;
9219 }
9220
9221 ir_set_cursor_at_end_and_append_block(irb, range_block_no);
9222 } else {
9223 if (prong_item_count == 0) {
9224 if (else_prong) {
9225 ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
9226 buf_sprintf("multiple else prongs in switch expression"));
9227 add_error_note(irb->codegen, msg, else_prong,
9228 buf_sprintf("previous else prong is here"));
9229 return irb->codegen->invalid_inst_src;
9230 }
9231 else_prong = prong_node;
9232 } else if (prong_item_count == 1 &&
9233 prong_node->data.switch_prong.items.at(0)->type == NodeTypeSymbol &&
9234 buf_eql_str(prong_node->data.switch_prong.items.at(0)->data.symbol_expr.symbol, "_")) {
9235 if (underscore_prong) {
9236 ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
9237 buf_sprintf("multiple '_' prongs in switch expression"));
9238 add_error_note(irb->codegen, msg, underscore_prong,
9239 buf_sprintf("previous '_' prong is here"));
9240 return irb->codegen->invalid_inst_src;
9241 }
9242 underscore_prong = prong_node;
9243 } else {
9244 continue;
9245 }
9246 if (underscore_prong && else_prong) {
9247 ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
9248 buf_sprintf("else and '_' prong in switch expression"));
9249 if (underscore_prong == prong_node)
9250 add_error_note(irb->codegen, msg, else_prong,
9251 buf_sprintf("else prong is here"));
9252 else
9253 add_error_note(irb->codegen, msg, underscore_prong,
9254 buf_sprintf("'_' prong is here"));
9255 return irb->codegen->invalid_inst_src;
9256 }
9257 ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
9258
9259 IrBasicBlockSrc *prev_block = irb->current_basic_block;
9260 if (peer_parent->peers.length > 0) {
9261 peer_parent->peers.last()->next_bb = else_block;
9262 }
9263 peer_parent->peers.append(this_peer_result_loc);
9264 ir_set_cursor_at_end_and_append_block(irb, else_block);
9265 if (!ir_gen_switch_prong_expr(irb, subexpr_scope, node, prong_node, end_block,
9266 is_comptime, var_is_comptime, target_value_ptr, nullptr, 0, &incoming_blocks, &incoming_values,
9267 &switch_else_var, LValNone, &this_peer_result_loc->base))
9268 {
9269 return irb->codegen->invalid_inst_src;
8215 }9270 }
82169271 ir_set_cursor_at_end(irb, prev_block);
8217 ir_set_cursor_at_end_and_append_block(irb, range_block_no);
8218 }9272 }
8219 }9273 }
82209274
...@@ -8226,32 +9280,34 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *...@@ -8226,32 +9280,34 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
8226 continue;9280 continue;
8227 if (prong_node->data.switch_prong.any_items_are_range)9281 if (prong_node->data.switch_prong.any_items_are_range)
8228 continue;9282 continue;
9283 if (underscore_prong == prong_node)
9284 continue;
82299285
8230 ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);9286 ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
82319287
8232 IrBasicBlock *prong_block = ir_create_basic_block(irb, scope, "SwitchProng");9288 IrBasicBlockSrc *prong_block = ir_create_basic_block(irb, scope, "SwitchProng");
8233 IrInstruction **items = allocate<IrInstruction *>(prong_item_count);9289 IrInstSrc **items = allocate<IrInstSrc *>(prong_item_count);
82349290
8235 for (size_t item_i = 0; item_i < prong_item_count; item_i += 1) {9291 for (size_t item_i = 0; item_i < prong_item_count; item_i += 1) {
8236 AstNode *item_node = prong_node->data.switch_prong.items.at(item_i);9292 AstNode *item_node = prong_node->data.switch_prong.items.at(item_i);
8237 assert(item_node->type != NodeTypeSwitchRange);9293 assert(item_node->type != NodeTypeSwitchRange);
82389294
8239 IrInstruction *item_value = ir_gen_node(irb, item_node, comptime_scope);9295 IrInstSrc *item_value = ir_gen_node(irb, item_node, comptime_scope);
8240 if (item_value == irb->codegen->invalid_instruction)9296 if (item_value == irb->codegen->invalid_inst_src)
8241 return irb->codegen->invalid_instruction;9297 return irb->codegen->invalid_inst_src;
82429298
8243 IrInstructionCheckSwitchProngsRange *check_range = check_ranges.add_one();9299 IrInstSrcCheckSwitchProngsRange *check_range = check_ranges.add_one();
8244 check_range->start = item_value;9300 check_range->start = item_value;
8245 check_range->end = item_value;9301 check_range->end = item_value;
82469302
8247 IrInstructionSwitchBrCase *this_case = cases.add_one();9303 IrInstSrcSwitchBrCase *this_case = cases.add_one();
8248 this_case->value = item_value;9304 this_case->value = item_value;
8249 this_case->block = prong_block;9305 this_case->block = prong_block;
82509306
8251 items[item_i] = item_value;9307 items[item_i] = item_value;
8252 }9308 }
82539309
8254 IrBasicBlock *prev_block = irb->current_basic_block;9310 IrBasicBlockSrc *prev_block = irb->current_basic_block;
8255 if (peer_parent->peers.length > 0) {9311 if (peer_parent->peers.length > 0) {
8256 peer_parent->peers.last()->next_bb = prong_block;9312 peer_parent->peers.last()->next_bb = prong_block;
8257 }9313 }
...@@ -8261,21 +9317,21 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *...@@ -8261,21 +9317,21 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
8261 is_comptime, var_is_comptime, target_value_ptr, items, prong_item_count,9317 is_comptime, var_is_comptime, target_value_ptr, items, prong_item_count,
8262 &incoming_blocks, &incoming_values, nullptr, LValNone, &this_peer_result_loc->base))9318 &incoming_blocks, &incoming_values, nullptr, LValNone, &this_peer_result_loc->base))
8263 {9319 {
8264 return irb->codegen->invalid_instruction;9320 return irb->codegen->invalid_inst_src;
8265 }9321 }
82669322
8267 ir_set_cursor_at_end(irb, prev_block);9323 ir_set_cursor_at_end(irb, prev_block);
82689324
8269 }9325 }
82709326
8271 IrInstruction *switch_prongs_void = ir_build_check_switch_prongs(irb, scope, node, target_value,9327 IrInstSrc *switch_prongs_void = ir_build_check_switch_prongs(irb, scope, node, target_value,
8272 check_ranges.items, check_ranges.length, else_prong != nullptr);9328 check_ranges.items, check_ranges.length, else_prong != nullptr, underscore_prong != nullptr);
82739329
8274 IrInstruction *br_instruction;9330 IrInstSrc *br_instruction;
8275 if (cases.length == 0) {9331 if (cases.length == 0) {
8276 br_instruction = ir_build_br(irb, scope, node, else_block, is_comptime);9332 br_instruction = ir_build_br(irb, scope, node, else_block, is_comptime);
8277 } else {9333 } else {
8278 IrInstructionSwitchBr *switch_br = ir_build_switch_br(irb, scope, node, target_value, else_block,9334 IrInstSrcSwitchBr *switch_br = ir_build_switch_br_src(irb, scope, node, target_value, else_block,
8279 cases.length, cases.items, is_comptime, switch_prongs_void);9335 cases.length, cases.items, is_comptime, switch_prongs_void);
8280 if (switch_else_var != nullptr) {9336 if (switch_else_var != nullptr) {
8281 switch_else_var->switch_br = switch_br;9337 switch_else_var->switch_br = switch_br;
...@@ -8289,7 +9345,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *...@@ -8289,7 +9345,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
8289 peer_parent->peers.at(i)->base.source_instruction = peer_parent->base.source_instruction;9345 peer_parent->peers.at(i)->base.source_instruction = peer_parent->base.source_instruction;
8290 }9346 }
82919347
8292 if (!else_prong) {9348 if (!else_prong && !underscore_prong) {
8293 if (peer_parent->peers.length != 0) {9349 if (peer_parent->peers.length != 0) {
8294 peer_parent->peers.last()->next_bb = else_block;9350 peer_parent->peers.last()->next_bb = else_block;
8295 }9351 }
...@@ -8303,7 +9359,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *...@@ -8303,7 +9359,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
83039359
8304 ir_set_cursor_at_end_and_append_block(irb, end_block);9360 ir_set_cursor_at_end_and_append_block(irb, end_block);
8305 assert(incoming_blocks.length == incoming_values.length);9361 assert(incoming_blocks.length == incoming_values.length);
8306 IrInstruction *result_instruction;9362 IrInstSrc *result_instruction;
8307 if (incoming_blocks.length == 0) {9363 if (incoming_blocks.length == 0) {
8308 result_instruction = ir_build_const_void(irb, scope, node);9364 result_instruction = ir_build_const_void(irb, scope, node);
8309 } else {9365 } else {
...@@ -8313,7 +9369,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *...@@ -8313,7 +9369,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
8313 return ir_lval_wrap(irb, scope, result_instruction, lval, result_loc);9369 return ir_lval_wrap(irb, scope, result_instruction, lval, result_loc);
8314}9370}
83159371
8316static IrInstruction *ir_gen_comptime(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval) {9372static IrInstSrc *ir_gen_comptime(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval) {
8317 assert(node->type == NodeTypeCompTime);9373 assert(node->type == NodeTypeCompTime);
83189374
8319 Scope *child_scope = create_comptime_scope(irb->codegen, node, parent_scope);9375 Scope *child_scope = create_comptime_scope(irb->codegen, node, parent_scope);
...@@ -8321,28 +9377,28 @@ static IrInstruction *ir_gen_comptime(IrBuilder *irb, Scope *parent_scope, AstNo...@@ -8321,28 +9377,28 @@ static IrInstruction *ir_gen_comptime(IrBuilder *irb, Scope *parent_scope, AstNo
8321 return ir_gen_node_extra(irb, node->data.comptime_expr.expr, child_scope, lval, nullptr);9377 return ir_gen_node_extra(irb, node->data.comptime_expr.expr, child_scope, lval, nullptr);
8322}9378}
83239379
8324static IrInstruction *ir_gen_return_from_block(IrBuilder *irb, Scope *break_scope, AstNode *node, ScopeBlock *block_scope) {9380static IrInstSrc *ir_gen_return_from_block(IrBuilderSrc *irb, Scope *break_scope, AstNode *node, ScopeBlock *block_scope) {
8325 IrInstruction *is_comptime;9381 IrInstSrc *is_comptime;
8326 if (ir_should_inline(irb->exec, break_scope)) {9382 if (ir_should_inline(irb->exec, break_scope)) {
8327 is_comptime = ir_build_const_bool(irb, break_scope, node, true);9383 is_comptime = ir_build_const_bool(irb, break_scope, node, true);
8328 } else {9384 } else {
8329 is_comptime = block_scope->is_comptime;9385 is_comptime = block_scope->is_comptime;
8330 }9386 }
83319387
8332 IrInstruction *result_value;9388 IrInstSrc *result_value;
8333 if (node->data.break_expr.expr) {9389 if (node->data.break_expr.expr) {
8334 ResultLocPeer *peer_result = create_peer_result(block_scope->peer_parent);9390 ResultLocPeer *peer_result = create_peer_result(block_scope->peer_parent);
8335 block_scope->peer_parent->peers.append(peer_result);9391 block_scope->peer_parent->peers.append(peer_result);
83369392
8337 result_value = ir_gen_node_extra(irb, node->data.break_expr.expr, break_scope, block_scope->lval,9393 result_value = ir_gen_node_extra(irb, node->data.break_expr.expr, break_scope, block_scope->lval,
8338 &peer_result->base);9394 &peer_result->base);
8339 if (result_value == irb->codegen->invalid_instruction)9395 if (result_value == irb->codegen->invalid_inst_src)
8340 return irb->codegen->invalid_instruction;9396 return irb->codegen->invalid_inst_src;
8341 } else {9397 } else {
8342 result_value = ir_build_const_void(irb, break_scope, node);9398 result_value = ir_build_const_void(irb, break_scope, node);
8343 }9399 }
83449400
8345 IrBasicBlock *dest_block = block_scope->end_block;9401 IrBasicBlockSrc *dest_block = block_scope->end_block;
8346 ir_gen_defers_for_block(irb, break_scope, dest_block->scope, false);9402 ir_gen_defers_for_block(irb, break_scope, dest_block->scope, false);
83479403
8348 block_scope->incoming_blocks->append(irb->current_basic_block);9404 block_scope->incoming_blocks->append(irb->current_basic_block);
...@@ -8350,7 +9406,7 @@ static IrInstruction *ir_gen_return_from_block(IrBuilder *irb, Scope *break_scop...@@ -8350,7 +9406,7 @@ static IrInstruction *ir_gen_return_from_block(IrBuilder *irb, Scope *break_scop
8350 return ir_build_br(irb, break_scope, node, dest_block, is_comptime);9406 return ir_build_br(irb, break_scope, node, dest_block, is_comptime);
8351}9407}
83529408
8353static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *node) {9409static IrInstSrc *ir_gen_break(IrBuilderSrc *irb, Scope *break_scope, AstNode *node) {
8354 assert(node->type == NodeTypeBreak);9410 assert(node->type == NodeTypeBreak);
83559411
8356 // Search up the scope. We'll find one of these things first:9412 // Search up the scope. We'll find one of these things first:
...@@ -8365,14 +9421,14 @@ static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *...@@ -8365,14 +9421,14 @@ static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *
8365 if (search_scope == nullptr || search_scope->id == ScopeIdFnDef) {9421 if (search_scope == nullptr || search_scope->id == ScopeIdFnDef) {
8366 if (node->data.break_expr.name != nullptr) {9422 if (node->data.break_expr.name != nullptr) {
8367 add_node_error(irb->codegen, node, buf_sprintf("label not found: '%s'", buf_ptr(node->data.break_expr.name)));9423 add_node_error(irb->codegen, node, buf_sprintf("label not found: '%s'", buf_ptr(node->data.break_expr.name)));
8368 return irb->codegen->invalid_instruction;9424 return irb->codegen->invalid_inst_src;
8369 } else {9425 } else {
8370 add_node_error(irb->codegen, node, buf_sprintf("break expression outside loop"));9426 add_node_error(irb->codegen, node, buf_sprintf("break expression outside loop"));
8371 return irb->codegen->invalid_instruction;9427 return irb->codegen->invalid_inst_src;
8372 }9428 }
8373 } else if (search_scope->id == ScopeIdDeferExpr) {9429 } else if (search_scope->id == ScopeIdDeferExpr) {
8374 add_node_error(irb->codegen, node, buf_sprintf("cannot break out of defer expression"));9430 add_node_error(irb->codegen, node, buf_sprintf("cannot break out of defer expression"));
8375 return irb->codegen->invalid_instruction;9431 return irb->codegen->invalid_inst_src;
8376 } else if (search_scope->id == ScopeIdLoop) {9432 } else if (search_scope->id == ScopeIdLoop) {
8377 ScopeLoop *this_loop_scope = (ScopeLoop *)search_scope;9433 ScopeLoop *this_loop_scope = (ScopeLoop *)search_scope;
8378 if (node->data.break_expr.name == nullptr ||9434 if (node->data.break_expr.name == nullptr ||
...@@ -8391,32 +9447,32 @@ static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *...@@ -8391,32 +9447,32 @@ static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *
8391 }9447 }
8392 } else if (search_scope->id == ScopeIdSuspend) {9448 } else if (search_scope->id == ScopeIdSuspend) {
8393 add_node_error(irb->codegen, node, buf_sprintf("cannot break out of suspend block"));9449 add_node_error(irb->codegen, node, buf_sprintf("cannot break out of suspend block"));
8394 return irb->codegen->invalid_instruction;9450 return irb->codegen->invalid_inst_src;
8395 }9451 }
8396 search_scope = search_scope->parent;9452 search_scope = search_scope->parent;
8397 }9453 }
83989454
8399 IrInstruction *is_comptime;9455 IrInstSrc *is_comptime;
8400 if (ir_should_inline(irb->exec, break_scope)) {9456 if (ir_should_inline(irb->exec, break_scope)) {
8401 is_comptime = ir_build_const_bool(irb, break_scope, node, true);9457 is_comptime = ir_build_const_bool(irb, break_scope, node, true);
8402 } else {9458 } else {
8403 is_comptime = loop_scope->is_comptime;9459 is_comptime = loop_scope->is_comptime;
8404 }9460 }
84059461
8406 IrInstruction *result_value;9462 IrInstSrc *result_value;
8407 if (node->data.break_expr.expr) {9463 if (node->data.break_expr.expr) {
8408 ResultLocPeer *peer_result = create_peer_result(loop_scope->peer_parent);9464 ResultLocPeer *peer_result = create_peer_result(loop_scope->peer_parent);
8409 loop_scope->peer_parent->peers.append(peer_result);9465 loop_scope->peer_parent->peers.append(peer_result);
84109466
8411 result_value = ir_gen_node_extra(irb, node->data.break_expr.expr, break_scope,9467 result_value = ir_gen_node_extra(irb, node->data.break_expr.expr, break_scope,
8412 loop_scope->lval, &peer_result->base);9468 loop_scope->lval, &peer_result->base);
8413 if (result_value == irb->codegen->invalid_instruction)9469 if (result_value == irb->codegen->invalid_inst_src)
8414 return irb->codegen->invalid_instruction;9470 return irb->codegen->invalid_inst_src;
8415 } else {9471 } else {
8416 result_value = ir_build_const_void(irb, break_scope, node);9472 result_value = ir_build_const_void(irb, break_scope, node);
8417 }9473 }
84189474
8419 IrBasicBlock *dest_block = loop_scope->break_block;9475 IrBasicBlockSrc *dest_block = loop_scope->break_block;
8420 ir_gen_defers_for_block(irb, break_scope, dest_block->scope, false);9476 ir_gen_defers_for_block(irb, break_scope, dest_block->scope, false);
84219477
8422 loop_scope->incoming_blocks->append(irb->current_basic_block);9478 loop_scope->incoming_blocks->append(irb->current_basic_block);
...@@ -8424,7 +9480,7 @@ static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *...@@ -8424,7 +9480,7 @@ static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *
8424 return ir_build_br(irb, break_scope, node, dest_block, is_comptime);9480 return ir_build_br(irb, break_scope, node, dest_block, is_comptime);
8425}9481}
84269482
8427static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, AstNode *node) {9483static IrInstSrc *ir_gen_continue(IrBuilderSrc *irb, Scope *continue_scope, AstNode *node) {
8428 assert(node->type == NodeTypeContinue);9484 assert(node->type == NodeTypeContinue);
84299485
8430 // Search up the scope. We'll find one of these things first:9486 // Search up the scope. We'll find one of these things first:
...@@ -8440,14 +9496,14 @@ static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, Ast...@@ -8440,14 +9496,14 @@ static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, Ast
8440 if (search_scope == nullptr || search_scope->id == ScopeIdFnDef) {9496 if (search_scope == nullptr || search_scope->id == ScopeIdFnDef) {
8441 if (node->data.continue_expr.name != nullptr) {9497 if (node->data.continue_expr.name != nullptr) {
8442 add_node_error(irb->codegen, node, buf_sprintf("labeled loop not found: '%s'", buf_ptr(node->data.continue_expr.name)));9498 add_node_error(irb->codegen, node, buf_sprintf("labeled loop not found: '%s'", buf_ptr(node->data.continue_expr.name)));
8443 return irb->codegen->invalid_instruction;9499 return irb->codegen->invalid_inst_src;
8444 } else {9500 } else {
8445 add_node_error(irb->codegen, node, buf_sprintf("continue expression outside loop"));9501 add_node_error(irb->codegen, node, buf_sprintf("continue expression outside loop"));
8446 return irb->codegen->invalid_instruction;9502 return irb->codegen->invalid_inst_src;
8447 }9503 }
8448 } else if (search_scope->id == ScopeIdDeferExpr) {9504 } else if (search_scope->id == ScopeIdDeferExpr) {
8449 add_node_error(irb->codegen, node, buf_sprintf("cannot continue out of defer expression"));9505 add_node_error(irb->codegen, node, buf_sprintf("cannot continue out of defer expression"));
8450 return irb->codegen->invalid_instruction;9506 return irb->codegen->invalid_inst_src;
8451 } else if (search_scope->id == ScopeIdLoop) {9507 } else if (search_scope->id == ScopeIdLoop) {
8452 ScopeLoop *this_loop_scope = (ScopeLoop *)search_scope;9508 ScopeLoop *this_loop_scope = (ScopeLoop *)search_scope;
8453 if (node->data.continue_expr.name == nullptr ||9509 if (node->data.continue_expr.name == nullptr ||
...@@ -8463,7 +9519,7 @@ static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, Ast...@@ -8463,7 +9519,7 @@ static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, Ast
8463 search_scope = search_scope->parent;9519 search_scope = search_scope->parent;
8464 }9520 }
84659521
8466 IrInstruction *is_comptime;9522 IrInstSrc *is_comptime;
8467 if (ir_should_inline(irb->exec, continue_scope)) {9523 if (ir_should_inline(irb->exec, continue_scope)) {
8468 is_comptime = ir_build_const_bool(irb, continue_scope, node, true);9524 is_comptime = ir_build_const_bool(irb, continue_scope, node, true);
8469 } else {9525 } else {
...@@ -8475,17 +9531,17 @@ static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, Ast...@@ -8475,17 +9531,17 @@ static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, Ast
8475 ir_mark_gen(ir_build_check_runtime_scope(irb, continue_scope, node, scope_runtime->is_comptime, is_comptime));9531 ir_mark_gen(ir_build_check_runtime_scope(irb, continue_scope, node, scope_runtime->is_comptime, is_comptime));
8476 }9532 }
84779533
8478 IrBasicBlock *dest_block = loop_scope->continue_block;9534 IrBasicBlockSrc *dest_block = loop_scope->continue_block;
8479 ir_gen_defers_for_block(irb, continue_scope, dest_block->scope, false);9535 ir_gen_defers_for_block(irb, continue_scope, dest_block->scope, false);
8480 return ir_mark_gen(ir_build_br(irb, continue_scope, node, dest_block, is_comptime));9536 return ir_mark_gen(ir_build_br(irb, continue_scope, node, dest_block, is_comptime));
8481}9537}
84829538
8483static IrInstruction *ir_gen_error_type(IrBuilder *irb, Scope *scope, AstNode *node) {9539static IrInstSrc *ir_gen_error_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
8484 assert(node->type == NodeTypeErrorType);9540 assert(node->type == NodeTypeErrorType);
8485 return ir_build_const_type(irb, scope, node, irb->codegen->builtin_types.entry_global_error_set);9541 return ir_build_const_type(irb, scope, node, irb->codegen->builtin_types.entry_global_error_set);
8486}9542}
84879543
8488static IrInstruction *ir_gen_defer(IrBuilder *irb, Scope *parent_scope, AstNode *node) {9544static IrInstSrc *ir_gen_defer(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
8489 assert(node->type == NodeTypeDefer);9545 assert(node->type == NodeTypeDefer);
84909546
8491 ScopeDefer *defer_child_scope = create_defer_scope(irb->codegen, node, parent_scope);9547 ScopeDefer *defer_child_scope = create_defer_scope(irb->codegen, node, parent_scope);
...@@ -8497,7 +9553,7 @@ static IrInstruction *ir_gen_defer(IrBuilder *irb, Scope *parent_scope, AstNode...@@ -8497,7 +9553,7 @@ static IrInstruction *ir_gen_defer(IrBuilder *irb, Scope *parent_scope, AstNode
8497 return ir_build_const_void(irb, parent_scope, node);9553 return ir_build_const_void(irb, parent_scope, node);
8498}9554}
84999555
8500static IrInstruction *ir_gen_slice(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {9556static IrInstSrc *ir_gen_slice(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
8501 assert(node->type == NodeTypeSliceExpr);9557 assert(node->type == NodeTypeSliceExpr);
85029558
8503 AstNodeSliceExpr *slice_expr = &node->data.slice_expr;9559 AstNodeSliceExpr *slice_expr = &node->data.slice_expr;
...@@ -8506,38 +9562,38 @@ static IrInstruction *ir_gen_slice(IrBuilder *irb, Scope *scope, AstNode *node,...@@ -8506,38 +9562,38 @@ static IrInstruction *ir_gen_slice(IrBuilder *irb, Scope *scope, AstNode *node,
8506 AstNode *end_node = slice_expr->end;9562 AstNode *end_node = slice_expr->end;
8507 AstNode *sentinel_node = slice_expr->sentinel;9563 AstNode *sentinel_node = slice_expr->sentinel;
85089564
8509 IrInstruction *ptr_value = ir_gen_node_extra(irb, array_node, scope, LValPtr, nullptr);9565 IrInstSrc *ptr_value = ir_gen_node_extra(irb, array_node, scope, LValPtr, nullptr);
8510 if (ptr_value == irb->codegen->invalid_instruction)9566 if (ptr_value == irb->codegen->invalid_inst_src)
8511 return irb->codegen->invalid_instruction;9567 return irb->codegen->invalid_inst_src;
85129568
8513 IrInstruction *start_value = ir_gen_node(irb, start_node, scope);9569 IrInstSrc *start_value = ir_gen_node(irb, start_node, scope);
8514 if (start_value == irb->codegen->invalid_instruction)9570 if (start_value == irb->codegen->invalid_inst_src)
8515 return irb->codegen->invalid_instruction;9571 return irb->codegen->invalid_inst_src;
85169572
8517 IrInstruction *end_value;9573 IrInstSrc *end_value;
8518 if (end_node) {9574 if (end_node) {
8519 end_value = ir_gen_node(irb, end_node, scope);9575 end_value = ir_gen_node(irb, end_node, scope);
8520 if (end_value == irb->codegen->invalid_instruction)9576 if (end_value == irb->codegen->invalid_inst_src)
8521 return irb->codegen->invalid_instruction;9577 return irb->codegen->invalid_inst_src;
8522 } else {9578 } else {
8523 end_value = nullptr;9579 end_value = nullptr;
8524 }9580 }
85259581
8526 IrInstruction *sentinel_value;9582 IrInstSrc *sentinel_value;
8527 if (sentinel_node) {9583 if (sentinel_node) {
8528 sentinel_value = ir_gen_node(irb, sentinel_node, scope);9584 sentinel_value = ir_gen_node(irb, sentinel_node, scope);
8529 if (sentinel_value == irb->codegen->invalid_instruction)9585 if (sentinel_value == irb->codegen->invalid_inst_src)
8530 return irb->codegen->invalid_instruction;9586 return irb->codegen->invalid_inst_src;
8531 } else {9587 } else {
8532 sentinel_value = nullptr;9588 sentinel_value = nullptr;
8533 }9589 }
85349590
8535 IrInstruction *slice = ir_build_slice_src(irb, scope, node, ptr_value, start_value, end_value,9591 IrInstSrc *slice = ir_build_slice_src(irb, scope, node, ptr_value, start_value, end_value,
8536 sentinel_value, true, result_loc);9592 sentinel_value, true, result_loc);
8537 return ir_lval_wrap(irb, scope, slice, lval, result_loc);9593 return ir_lval_wrap(irb, scope, slice, lval, result_loc);
8538}9594}
85399595
8540static IrInstruction *ir_gen_catch(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval,9596static IrInstSrc *ir_gen_catch(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval,
8541 ResultLoc *result_loc)9597 ResultLoc *result_loc)
8542{9598{
8543 assert(node->type == NodeTypeCatchExpr);9599 assert(node->type == NodeTypeCatchExpr);
...@@ -8551,29 +9607,29 @@ static IrInstruction *ir_gen_catch(IrBuilder *irb, Scope *parent_scope, AstNode...@@ -8551,29 +9607,29 @@ static IrInstruction *ir_gen_catch(IrBuilder *irb, Scope *parent_scope, AstNode
8551 assert(var_node->type == NodeTypeSymbol);9607 assert(var_node->type == NodeTypeSymbol);
8552 Buf *var_name = var_node->data.symbol_expr.symbol;9608 Buf *var_name = var_node->data.symbol_expr.symbol;
8553 add_node_error(irb->codegen, var_node, buf_sprintf("unused variable: '%s'", buf_ptr(var_name)));9609 add_node_error(irb->codegen, var_node, buf_sprintf("unused variable: '%s'", buf_ptr(var_name)));
8554 return irb->codegen->invalid_instruction;9610 return irb->codegen->invalid_inst_src;
8555 }9611 }
8556 return ir_gen_catch_unreachable(irb, parent_scope, node, op1_node, lval, result_loc);9612 return ir_gen_catch_unreachable(irb, parent_scope, node, op1_node, lval, result_loc);
8557 }9613 }
85589614
85599615
8560 IrInstruction *err_union_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);9616 IrInstSrc *err_union_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);
8561 if (err_union_ptr == irb->codegen->invalid_instruction)9617 if (err_union_ptr == irb->codegen->invalid_inst_src)
8562 return irb->codegen->invalid_instruction;9618 return irb->codegen->invalid_inst_src;
85639619
8564 IrInstruction *is_err = ir_build_test_err_src(irb, parent_scope, node, err_union_ptr, true, false);9620 IrInstSrc *is_err = ir_build_test_err_src(irb, parent_scope, node, err_union_ptr, true, false);
85659621
8566 IrInstruction *is_comptime;9622 IrInstSrc *is_comptime;
8567 if (ir_should_inline(irb->exec, parent_scope)) {9623 if (ir_should_inline(irb->exec, parent_scope)) {
8568 is_comptime = ir_build_const_bool(irb, parent_scope, node, true);9624 is_comptime = ir_build_const_bool(irb, parent_scope, node, true);
8569 } else {9625 } else {
8570 is_comptime = ir_build_test_comptime(irb, parent_scope, node, is_err);9626 is_comptime = ir_build_test_comptime(irb, parent_scope, node, is_err);
8571 }9627 }
85729628
8573 IrBasicBlock *ok_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrOk");9629 IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrOk");
8574 IrBasicBlock *err_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrError");9630 IrBasicBlockSrc *err_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrError");
8575 IrBasicBlock *end_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrEnd");9631 IrBasicBlockSrc *end_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrEnd");
8576 IrInstruction *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_err, err_block, ok_block, is_comptime);9632 IrInstSrc *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_err, err_block, ok_block, is_comptime);
85779633
8578 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, ok_block, end_block, result_loc,9634 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, ok_block, end_block, result_loc,
8579 is_comptime);9635 is_comptime);
...@@ -8589,33 +9645,33 @@ static IrInstruction *ir_gen_catch(IrBuilder *irb, Scope *parent_scope, AstNode...@@ -8589,33 +9645,33 @@ static IrInstruction *ir_gen_catch(IrBuilder *irb, Scope *parent_scope, AstNode
8589 ZigVar *var = ir_create_var(irb, node, subexpr_scope, var_name,9645 ZigVar *var = ir_create_var(irb, node, subexpr_scope, var_name,
8590 is_const, is_const, is_shadowable, is_comptime);9646 is_const, is_const, is_shadowable, is_comptime);
8591 err_scope = var->child_scope;9647 err_scope = var->child_scope;
8592 IrInstruction *err_ptr = ir_build_unwrap_err_code(irb, err_scope, node, err_union_ptr);9648 IrInstSrc *err_ptr = ir_build_unwrap_err_code_src(irb, err_scope, node, err_union_ptr);
8593 ir_build_var_decl_src(irb, err_scope, var_node, var, nullptr, err_ptr);9649 ir_build_var_decl_src(irb, err_scope, var_node, var, nullptr, err_ptr);
8594 } else {9650 } else {
8595 err_scope = subexpr_scope;9651 err_scope = subexpr_scope;
8596 }9652 }
8597 IrInstruction *err_result = ir_gen_node_extra(irb, op2_node, err_scope, LValNone, &peer_parent->peers.at(0)->base);9653 IrInstSrc *err_result = ir_gen_node_extra(irb, op2_node, err_scope, LValNone, &peer_parent->peers.at(0)->base);
8598 if (err_result == irb->codegen->invalid_instruction)9654 if (err_result == irb->codegen->invalid_inst_src)
8599 return irb->codegen->invalid_instruction;9655 return irb->codegen->invalid_inst_src;
8600 IrBasicBlock *after_err_block = irb->current_basic_block;9656 IrBasicBlockSrc *after_err_block = irb->current_basic_block;
8601 if (!instr_is_unreachable(err_result))9657 if (!instr_is_unreachable(err_result))
8602 ir_mark_gen(ir_build_br(irb, parent_scope, node, end_block, is_comptime));9658 ir_mark_gen(ir_build_br(irb, parent_scope, node, end_block, is_comptime));
86039659
8604 ir_set_cursor_at_end_and_append_block(irb, ok_block);9660 ir_set_cursor_at_end_and_append_block(irb, ok_block);
8605 IrInstruction *unwrapped_ptr = ir_build_unwrap_err_payload(irb, parent_scope, node, err_union_ptr, false, false);9661 IrInstSrc *unwrapped_ptr = ir_build_unwrap_err_payload_src(irb, parent_scope, node, err_union_ptr, false, false);
8606 IrInstruction *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);9662 IrInstSrc *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);
8607 ir_build_end_expr(irb, parent_scope, node, unwrapped_payload, &peer_parent->peers.at(1)->base);9663 ir_build_end_expr(irb, parent_scope, node, unwrapped_payload, &peer_parent->peers.at(1)->base);
8608 IrBasicBlock *after_ok_block = irb->current_basic_block;9664 IrBasicBlockSrc *after_ok_block = irb->current_basic_block;
8609 ir_build_br(irb, parent_scope, node, end_block, is_comptime);9665 ir_build_br(irb, parent_scope, node, end_block, is_comptime);
86109666
8611 ir_set_cursor_at_end_and_append_block(irb, end_block);9667 ir_set_cursor_at_end_and_append_block(irb, end_block);
8612 IrInstruction **incoming_values = allocate<IrInstruction *>(2);9668 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
8613 incoming_values[0] = err_result;9669 incoming_values[0] = err_result;
8614 incoming_values[1] = unwrapped_payload;9670 incoming_values[1] = unwrapped_payload;
8615 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");9671 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
8616 incoming_blocks[0] = after_err_block;9672 incoming_blocks[0] = after_err_block;
8617 incoming_blocks[1] = after_ok_block;9673 incoming_blocks[1] = after_ok_block;
8618 IrInstruction *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);9674 IrInstSrc *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);
8619 return ir_lval_wrap(irb, parent_scope, phi, lval, result_loc);9675 return ir_lval_wrap(irb, parent_scope, phi, lval, result_loc);
8620}9676}
86219677
...@@ -8633,7 +9689,7 @@ static bool render_instance_name_recursive(CodeGen *codegen, Buf *name, Scope *o...@@ -8633,7 +9689,7 @@ static bool render_instance_name_recursive(CodeGen *codegen, Buf *name, Scope *o
8633 return true;9689 return true;
8634}9690}
86359691
8636static Buf *get_anon_type_name(CodeGen *codegen, IrExecutable *exec, const char *kind_name,9692static Buf *get_anon_type_name(CodeGen *codegen, IrExecutableSrc *exec, const char *kind_name,
8637 Scope *scope, AstNode *source_node, Buf *out_bare_name)9693 Scope *scope, AstNode *source_node, Buf *out_bare_name)
8638{9694{
8639 if (exec != nullptr && exec->name) {9695 if (exec != nullptr && exec->name) {
...@@ -8662,7 +9718,7 @@ static Buf *get_anon_type_name(CodeGen *codegen, IrExecutable *exec, const char...@@ -8662,7 +9718,7 @@ static Buf *get_anon_type_name(CodeGen *codegen, IrExecutable *exec, const char
8662 }9718 }
8663}9719}
86649720
8665static IrInstruction *ir_gen_container_decl(IrBuilder *irb, Scope *parent_scope, AstNode *node) {9721static IrInstSrc *ir_gen_container_decl(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
8666 assert(node->type == NodeTypeContainerDecl);9722 assert(node->type == NodeTypeContainerDecl);
86679723
8668 ContainerKind kind = node->data.container_decl.kind;9724 ContainerKind kind = node->data.container_decl.kind;
...@@ -8787,7 +9843,7 @@ static AstNode *ast_field_to_symbol_node(AstNode *err_set_field_node) {...@@ -8787,7 +9843,7 @@ static AstNode *ast_field_to_symbol_node(AstNode *err_set_field_node) {
8787 }9843 }
8788}9844}
87899845
8790static IrInstruction *ir_gen_err_set_decl(IrBuilder *irb, Scope *parent_scope, AstNode *node) {9846static IrInstSrc *ir_gen_err_set_decl(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
8791 assert(node->type == NodeTypeErrorSetDecl);9847 assert(node->type == NodeTypeErrorSetDecl);
87929848
8793 uint32_t err_count = node->data.err_set_decl.decls.length;9849 uint32_t err_count = node->data.err_set_decl.decls.length;
...@@ -8830,7 +9886,7 @@ static IrInstruction *ir_gen_err_set_decl(IrBuilder *irb, Scope *parent_scope, A...@@ -8830,7 +9886,7 @@ static IrInstruction *ir_gen_err_set_decl(IrBuilder *irb, Scope *parent_scope, A
8830 buf_sprintf("duplicate error: '%s'", buf_ptr(&err->name)));9886 buf_sprintf("duplicate error: '%s'", buf_ptr(&err->name)));
8831 add_error_note(irb->codegen, msg, ast_field_to_symbol_node(prev_err->decl_node),9887 add_error_note(irb->codegen, msg, ast_field_to_symbol_node(prev_err->decl_node),
8832 buf_sprintf("other error here"));9888 buf_sprintf("other error here"));
8833 return irb->codegen->invalid_instruction;9889 return irb->codegen->invalid_inst_src;
8834 }9890 }
8835 errors[err->value] = err;9891 errors[err->value] = err;
8836 }9892 }
...@@ -8838,11 +9894,11 @@ static IrInstruction *ir_gen_err_set_decl(IrBuilder *irb, Scope *parent_scope, A...@@ -8838,11 +9894,11 @@ static IrInstruction *ir_gen_err_set_decl(IrBuilder *irb, Scope *parent_scope, A
8838 return ir_build_const_type(irb, parent_scope, node, err_set_type);9894 return ir_build_const_type(irb, parent_scope, node, err_set_type);
8839}9895}
88409896
8841static IrInstruction *ir_gen_fn_proto(IrBuilder *irb, Scope *parent_scope, AstNode *node) {9897static IrInstSrc *ir_gen_fn_proto(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
8842 assert(node->type == NodeTypeFnProto);9898 assert(node->type == NodeTypeFnProto);
88439899
8844 size_t param_count = node->data.fn_proto.params.length;9900 size_t param_count = node->data.fn_proto.params.length;
8845 IrInstruction **param_types = allocate<IrInstruction*>(param_count);9901 IrInstSrc **param_types = allocate<IrInstSrc*>(param_count);
88469902
8847 bool is_var_args = false;9903 bool is_var_args = false;
8848 for (size_t i = 0; i < param_count; i += 1) {9904 for (size_t i = 0; i < param_count; i += 1) {
...@@ -8853,59 +9909,59 @@ static IrInstruction *ir_gen_fn_proto(IrBuilder *irb, Scope *parent_scope, AstNo...@@ -8853,59 +9909,59 @@ static IrInstruction *ir_gen_fn_proto(IrBuilder *irb, Scope *parent_scope, AstNo
8853 }9909 }
8854 if (param_node->data.param_decl.var_token == nullptr) {9910 if (param_node->data.param_decl.var_token == nullptr) {
8855 AstNode *type_node = param_node->data.param_decl.type;9911 AstNode *type_node = param_node->data.param_decl.type;
8856 IrInstruction *type_value = ir_gen_node(irb, type_node, parent_scope);9912 IrInstSrc *type_value = ir_gen_node(irb, type_node, parent_scope);
8857 if (type_value == irb->codegen->invalid_instruction)9913 if (type_value == irb->codegen->invalid_inst_src)
8858 return irb->codegen->invalid_instruction;9914 return irb->codegen->invalid_inst_src;
8859 param_types[i] = type_value;9915 param_types[i] = type_value;
8860 } else {9916 } else {
8861 param_types[i] = nullptr;9917 param_types[i] = nullptr;
8862 }9918 }
8863 }9919 }
88649920
8865 IrInstruction *align_value = nullptr;9921 IrInstSrc *align_value = nullptr;
8866 if (node->data.fn_proto.align_expr != nullptr) {9922 if (node->data.fn_proto.align_expr != nullptr) {
8867 align_value = ir_gen_node(irb, node->data.fn_proto.align_expr, parent_scope);9923 align_value = ir_gen_node(irb, node->data.fn_proto.align_expr, parent_scope);
8868 if (align_value == irb->codegen->invalid_instruction)9924 if (align_value == irb->codegen->invalid_inst_src)
8869 return irb->codegen->invalid_instruction;9925 return irb->codegen->invalid_inst_src;
8870 }9926 }
88719927
8872 IrInstruction *callconv_value = nullptr;9928 IrInstSrc *callconv_value = nullptr;
8873 if (node->data.fn_proto.callconv_expr != nullptr) {9929 if (node->data.fn_proto.callconv_expr != nullptr) {
8874 callconv_value = ir_gen_node(irb, node->data.fn_proto.callconv_expr, parent_scope);9930 callconv_value = ir_gen_node(irb, node->data.fn_proto.callconv_expr, parent_scope);
8875 if (callconv_value == irb->codegen->invalid_instruction)9931 if (callconv_value == irb->codegen->invalid_inst_src)
8876 return irb->codegen->invalid_instruction;9932 return irb->codegen->invalid_inst_src;
8877 }9933 }
88789934
8879 IrInstruction *return_type;9935 IrInstSrc *return_type;
8880 if (node->data.fn_proto.return_var_token == nullptr) {9936 if (node->data.fn_proto.return_var_token == nullptr) {
8881 if (node->data.fn_proto.return_type == nullptr) {9937 if (node->data.fn_proto.return_type == nullptr) {
8882 return_type = ir_build_const_type(irb, parent_scope, node, irb->codegen->builtin_types.entry_void);9938 return_type = ir_build_const_type(irb, parent_scope, node, irb->codegen->builtin_types.entry_void);
8883 } else {9939 } else {
8884 return_type = ir_gen_node(irb, node->data.fn_proto.return_type, parent_scope);9940 return_type = ir_gen_node(irb, node->data.fn_proto.return_type, parent_scope);
8885 if (return_type == irb->codegen->invalid_instruction)9941 if (return_type == irb->codegen->invalid_inst_src)
8886 return irb->codegen->invalid_instruction;9942 return irb->codegen->invalid_inst_src;
8887 }9943 }
8888 } else {9944 } else {
8889 add_node_error(irb->codegen, node,9945 add_node_error(irb->codegen, node,
8890 buf_sprintf("TODO implement inferred return types https://github.com/ziglang/zig/issues/447"));9946 buf_sprintf("TODO implement inferred return types https://github.com/ziglang/zig/issues/447"));
8891 return irb->codegen->invalid_instruction;9947 return irb->codegen->invalid_inst_src;
8892 //return_type = nullptr;9948 //return_type = nullptr;
8893 }9949 }
88949950
8895 return ir_build_fn_proto(irb, parent_scope, node, param_types, align_value, callconv_value, return_type, is_var_args);9951 return ir_build_fn_proto(irb, parent_scope, node, param_types, align_value, callconv_value, return_type, is_var_args);
8896}9952}
88979953
8898static IrInstruction *ir_gen_resume(IrBuilder *irb, Scope *scope, AstNode *node) {9954static IrInstSrc *ir_gen_resume(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
8899 assert(node->type == NodeTypeResume);9955 assert(node->type == NodeTypeResume);
89009956
8901 IrInstruction *target_inst = ir_gen_node_extra(irb, node->data.resume_expr.expr, scope, LValPtr, nullptr);9957 IrInstSrc *target_inst = ir_gen_node_extra(irb, node->data.resume_expr.expr, scope, LValPtr, nullptr);
8902 if (target_inst == irb->codegen->invalid_instruction)9958 if (target_inst == irb->codegen->invalid_inst_src)
8903 return irb->codegen->invalid_instruction;9959 return irb->codegen->invalid_inst_src;
89049960
8905 return ir_build_resume(irb, scope, node, target_inst);9961 return ir_build_resume_src(irb, scope, node, target_inst);
8906}9962}
89079963
8908static IrInstruction *ir_gen_await_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,9964static IrInstSrc *ir_gen_await_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
8909 ResultLoc *result_loc)9965 ResultLoc *result_loc)
8910{9966{
8911 assert(node->type == NodeTypeAwaitExpr);9967 assert(node->type == NodeTypeAwaitExpr);
...@@ -8926,7 +9982,7 @@ static IrInstruction *ir_gen_await_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -8926,7 +9982,7 @@ static IrInstruction *ir_gen_await_expr(IrBuilder *irb, Scope *scope, AstNode *n
8926 ZigFn *fn_entry = exec_fn_entry(irb->exec);9982 ZigFn *fn_entry = exec_fn_entry(irb->exec);
8927 if (!fn_entry) {9983 if (!fn_entry) {
8928 add_node_error(irb->codegen, node, buf_sprintf("await outside function definition"));9984 add_node_error(irb->codegen, node, buf_sprintf("await outside function definition"));
8929 return irb->codegen->invalid_instruction;9985 return irb->codegen->invalid_inst_src;
8930 }9986 }
8931 ScopeSuspend *existing_suspend_scope = get_scope_suspend(scope);9987 ScopeSuspend *existing_suspend_scope = get_scope_suspend(scope);
8932 if (existing_suspend_scope) {9988 if (existing_suspend_scope) {
...@@ -8935,24 +9991,24 @@ static IrInstruction *ir_gen_await_expr(IrBuilder *irb, Scope *scope, AstNode *n...@@ -8935,24 +9991,24 @@ static IrInstruction *ir_gen_await_expr(IrBuilder *irb, Scope *scope, AstNode *n
8935 add_error_note(irb->codegen, msg, existing_suspend_scope->base.source_node, buf_sprintf("suspend block here"));9991 add_error_note(irb->codegen, msg, existing_suspend_scope->base.source_node, buf_sprintf("suspend block here"));
8936 existing_suspend_scope->reported_err = true;9992 existing_suspend_scope->reported_err = true;
8937 }9993 }
8938 return irb->codegen->invalid_instruction;9994 return irb->codegen->invalid_inst_src;
8939 }9995 }
89409996
8941 IrInstruction *target_inst = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);9997 IrInstSrc *target_inst = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
8942 if (target_inst == irb->codegen->invalid_instruction)9998 if (target_inst == irb->codegen->invalid_inst_src)
8943 return irb->codegen->invalid_instruction;9999 return irb->codegen->invalid_inst_src;
894410000
8945 IrInstruction *await_inst = ir_build_await_src(irb, scope, node, target_inst, result_loc);10001 IrInstSrc *await_inst = ir_build_await_src(irb, scope, node, target_inst, result_loc);
8946 return ir_lval_wrap(irb, scope, await_inst, lval, result_loc);10002 return ir_lval_wrap(irb, scope, await_inst, lval, result_loc);
8947}10003}
894810004
8949static IrInstruction *ir_gen_suspend(IrBuilder *irb, Scope *parent_scope, AstNode *node) {10005static IrInstSrc *ir_gen_suspend(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
8950 assert(node->type == NodeTypeSuspend);10006 assert(node->type == NodeTypeSuspend);
895110007
8952 ZigFn *fn_entry = exec_fn_entry(irb->exec);10008 ZigFn *fn_entry = exec_fn_entry(irb->exec);
8953 if (!fn_entry) {10009 if (!fn_entry) {
8954 add_node_error(irb->codegen, node, buf_sprintf("suspend outside function definition"));10010 add_node_error(irb->codegen, node, buf_sprintf("suspend outside function definition"));
8955 return irb->codegen->invalid_instruction;10011 return irb->codegen->invalid_inst_src;
8956 }10012 }
8957 ScopeSuspend *existing_suspend_scope = get_scope_suspend(parent_scope);10013 ScopeSuspend *existing_suspend_scope = get_scope_suspend(parent_scope);
8958 if (existing_suspend_scope) {10014 if (existing_suspend_scope) {
...@@ -8961,21 +10017,21 @@ static IrInstruction *ir_gen_suspend(IrBuilder *irb, Scope *parent_scope, AstNod...@@ -8961,21 +10017,21 @@ static IrInstruction *ir_gen_suspend(IrBuilder *irb, Scope *parent_scope, AstNod
8961 add_error_note(irb->codegen, msg, existing_suspend_scope->base.source_node, buf_sprintf("other suspend block here"));10017 add_error_note(irb->codegen, msg, existing_suspend_scope->base.source_node, buf_sprintf("other suspend block here"));
8962 existing_suspend_scope->reported_err = true;10018 existing_suspend_scope->reported_err = true;
8963 }10019 }
8964 return irb->codegen->invalid_instruction;10020 return irb->codegen->invalid_inst_src;
8965 }10021 }
896610022
8967 IrInstructionSuspendBegin *begin = ir_build_suspend_begin(irb, parent_scope, node);10023 IrInstSrcSuspendBegin *begin = ir_build_suspend_begin_src(irb, parent_scope, node);
8968 if (node->data.suspend.block != nullptr) {10024 if (node->data.suspend.block != nullptr) {
8969 ScopeSuspend *suspend_scope = create_suspend_scope(irb->codegen, node, parent_scope);10025 ScopeSuspend *suspend_scope = create_suspend_scope(irb->codegen, node, parent_scope);
8970 Scope *child_scope = &suspend_scope->base;10026 Scope *child_scope = &suspend_scope->base;
8971 IrInstruction *susp_res = ir_gen_node(irb, node->data.suspend.block, child_scope);10027 IrInstSrc *susp_res = ir_gen_node(irb, node->data.suspend.block, child_scope);
8972 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, node->data.suspend.block, susp_res));10028 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, node->data.suspend.block, susp_res));
8973 }10029 }
897410030
8975 return ir_mark_gen(ir_build_suspend_finish(irb, parent_scope, node, begin));10031 return ir_mark_gen(ir_build_suspend_finish_src(irb, parent_scope, node, begin));
8976}10032}
897710033
8978static IrInstruction *ir_gen_node_raw(IrBuilder *irb, AstNode *node, Scope *scope,10034static IrInstSrc *ir_gen_node_raw(IrBuilderSrc *irb, AstNode *node, Scope *scope,
8979 LVal lval, ResultLoc *result_loc)10035 LVal lval, ResultLoc *result_loc)
8980{10036{
8981 assert(scope);10037 assert(scope);
...@@ -9024,39 +10080,39 @@ static IrInstruction *ir_gen_node_raw(IrBuilder *irb, AstNode *node, Scope *scop...@@ -9024,39 +10080,39 @@ static IrInstruction *ir_gen_node_raw(IrBuilder *irb, AstNode *node, Scope *scop
9024 return ir_gen_return(irb, scope, node, lval, result_loc);10080 return ir_gen_return(irb, scope, node, lval, result_loc);
9025 case NodeTypeFieldAccessExpr:10081 case NodeTypeFieldAccessExpr:
9026 {10082 {
9027 IrInstruction *ptr_instruction = ir_gen_field_access(irb, scope, node);10083 IrInstSrc *ptr_instruction = ir_gen_field_access(irb, scope, node);
9028 if (ptr_instruction == irb->codegen->invalid_instruction)10084 if (ptr_instruction == irb->codegen->invalid_inst_src)
9029 return ptr_instruction;10085 return ptr_instruction;
9030 if (lval == LValPtr)10086 if (lval == LValPtr)
9031 return ptr_instruction;10087 return ptr_instruction;
903210088
9033 IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);10089 IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
9034 return ir_expr_wrap(irb, scope, load_ptr, result_loc);10090 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
9035 }10091 }
9036 case NodeTypePtrDeref: {10092 case NodeTypePtrDeref: {
9037 AstNode *expr_node = node->data.ptr_deref_expr.target;10093 AstNode *expr_node = node->data.ptr_deref_expr.target;
9038 IrInstruction *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);10094 IrInstSrc *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);
9039 if (value == irb->codegen->invalid_instruction)10095 if (value == irb->codegen->invalid_inst_src)
9040 return value;10096 return value;
904110097
9042 // We essentially just converted any lvalue from &(x.*) to (&x).*;10098 // We essentially just converted any lvalue from &(x.*) to (&x).*;
9043 // this inhibits checking that x is a pointer later, so we directly10099 // this inhibits checking that x is a pointer later, so we directly
9044 // record whether the pointer check is needed10100 // record whether the pointer check is needed
9045 IrInstruction *un_op = ir_build_un_op_lval(irb, scope, node, IrUnOpDereference, value, lval, result_loc);10101 IrInstSrc *un_op = ir_build_un_op_lval(irb, scope, node, IrUnOpDereference, value, lval, result_loc);
9046 return ir_expr_wrap(irb, scope, un_op, result_loc);10102 return ir_expr_wrap(irb, scope, un_op, result_loc);
9047 }10103 }
9048 case NodeTypeUnwrapOptional: {10104 case NodeTypeUnwrapOptional: {
9049 AstNode *expr_node = node->data.unwrap_optional.expr;10105 AstNode *expr_node = node->data.unwrap_optional.expr;
905010106
9051 IrInstruction *maybe_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);10107 IrInstSrc *maybe_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
9052 if (maybe_ptr == irb->codegen->invalid_instruction)10108 if (maybe_ptr == irb->codegen->invalid_inst_src)
9053 return irb->codegen->invalid_instruction;10109 return irb->codegen->invalid_inst_src;
905410110
9055 IrInstruction *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, scope, node, maybe_ptr, true, false);10111 IrInstSrc *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, scope, node, maybe_ptr, true, false);
9056 if (lval == LValPtr)10112 if (lval == LValPtr)
9057 return unwrapped_ptr;10113 return unwrapped_ptr;
905810114
9059 IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, unwrapped_ptr);10115 IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, unwrapped_ptr);
9060 return ir_expr_wrap(irb, scope, load_ptr, result_loc);10116 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
9061 }10117 }
9062 case NodeTypeBoolLiteral:10118 case NodeTypeBoolLiteral:
...@@ -9114,7 +10170,7 @@ static IrInstruction *ir_gen_node_raw(IrBuilder *irb, AstNode *node, Scope *scop...@@ -9114,7 +10170,7 @@ static IrInstruction *ir_gen_node_raw(IrBuilder *irb, AstNode *node, Scope *scop
9114 case NodeTypeInferredArrayType:10170 case NodeTypeInferredArrayType:
9115 add_node_error(irb->codegen, node,10171 add_node_error(irb->codegen, node,
9116 buf_sprintf("inferred array size invalid here"));10172 buf_sprintf("inferred array size invalid here"));
9117 return irb->codegen->invalid_instruction;10173 return irb->codegen->invalid_inst_src;
9118 case NodeTypeVarFieldType:10174 case NodeTypeVarFieldType:
9119 return ir_lval_wrap(irb, scope,10175 return ir_lval_wrap(irb, scope,
9120 ir_build_const_type(irb, scope, node, irb->codegen->builtin_types.entry_var), lval, result_loc);10176 ir_build_const_type(irb, scope, node, irb->codegen->builtin_types.entry_var), lval, result_loc);
...@@ -9128,7 +10184,7 @@ static ResultLoc *no_result_loc(void) {...@@ -9128,7 +10184,7 @@ static ResultLoc *no_result_loc(void) {
9128 return &result_loc_none->base;10184 return &result_loc_none->base;
9129}10185}
913010186
9131static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *scope, LVal lval,10187static IrInstSrc *ir_gen_node_extra(IrBuilderSrc *irb, AstNode *node, Scope *scope, LVal lval,
9132 ResultLoc *result_loc)10188 ResultLoc *result_loc)
9133{10189{
9134 if (result_loc == nullptr) {10190 if (result_loc == nullptr) {
...@@ -9145,8 +10201,8 @@ static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *sc...@@ -9145,8 +10201,8 @@ static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *sc
9145 } else {10201 } else {
9146 child_scope = &create_expr_scope(irb->codegen, node, scope)->base;10202 child_scope = &create_expr_scope(irb->codegen, node, scope)->base;
9147 }10203 }
9148 IrInstruction *result = ir_gen_node_raw(irb, node, child_scope, lval, result_loc);10204 IrInstSrc *result = ir_gen_node_raw(irb, node, child_scope, lval, result_loc);
9149 if (result == irb->codegen->invalid_instruction) {10205 if (result == irb->codegen->invalid_inst_src) {
9150 if (irb->exec->first_err_trace_msg == nullptr) {10206 if (irb->exec->first_err_trace_msg == nullptr) {
9151 irb->exec->first_err_trace_msg = irb->codegen->trace_err;10207 irb->exec->first_err_trace_msg = irb->codegen->trace_err;
9152 }10208 }
...@@ -9154,11 +10210,22 @@ static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *sc...@@ -9154,11 +10210,22 @@ static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *sc
9154 return result;10210 return result;
9155}10211}
915610212
9157static IrInstruction *ir_gen_node(IrBuilder *irb, AstNode *node, Scope *scope) {10213static IrInstSrc *ir_gen_node(IrBuilderSrc *irb, AstNode *node, Scope *scope) {
9158 return ir_gen_node_extra(irb, node, scope, LValNone, nullptr);10214 return ir_gen_node_extra(irb, node, scope, LValNone, nullptr);
9159}10215}
916010216
9161static void invalidate_exec(IrExecutable *exec, ErrorMsg *msg) {10217static void invalidate_exec(IrExecutableSrc *exec, ErrorMsg *msg) {
10218 if (exec->first_err_trace_msg != nullptr)
10219 return;
10220
10221 exec->first_err_trace_msg = msg;
10222
10223 for (size_t i = 0; i < exec->tld_list.length; i += 1) {
10224 exec->tld_list.items[i]->resolution = TldResolutionInvalid;
10225 }
10226}
10227
10228static void invalidate_exec_gen(IrExecutableGen *exec, ErrorMsg *msg) {
9162 if (exec->first_err_trace_msg != nullptr)10229 if (exec->first_err_trace_msg != nullptr)
9163 return;10230 return;
916410231
...@@ -9172,24 +10239,25 @@ static void invalidate_exec(IrExecutable *exec, ErrorMsg *msg) {...@@ -9172,24 +10239,25 @@ static void invalidate_exec(IrExecutable *exec, ErrorMsg *msg) {
9172 invalidate_exec(exec->source_exec, msg);10239 invalidate_exec(exec->source_exec, msg);
9173}10240}
917410241
9175bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutable *ir_executable) {10242
10243bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutableSrc *ir_executable) {
9176 assert(node->owner);10244 assert(node->owner);
917710245
9178 IrBuilder ir_builder = {0};10246 IrBuilderSrc ir_builder = {0};
9179 IrBuilder *irb = &ir_builder;10247 IrBuilderSrc *irb = &ir_builder;
918010248
9181 irb->codegen = codegen;10249 irb->codegen = codegen;
9182 irb->exec = ir_executable;10250 irb->exec = ir_executable;
9183 irb->main_block_node = node;10251 irb->main_block_node = node;
918410252
9185 IrBasicBlock *entry_block = ir_create_basic_block(irb, scope, "Entry");10253 IrBasicBlockSrc *entry_block = ir_create_basic_block(irb, scope, "Entry");
9186 ir_set_cursor_at_end_and_append_block(irb, entry_block);10254 ir_set_cursor_at_end_and_append_block(irb, entry_block);
9187 // Entry block gets a reference because we enter it to begin.10255 // Entry block gets a reference because we enter it to begin.
9188 ir_ref_bb(irb->current_basic_block);10256 ir_ref_bb(irb->current_basic_block);
918910257
9190 IrInstruction *result = ir_gen_node_extra(irb, node, scope, LValNone, nullptr);10258 IrInstSrc *result = ir_gen_node_extra(irb, node, scope, LValNone, nullptr);
919110259
9192 if (result == irb->codegen->invalid_instruction)10260 if (result == irb->codegen->invalid_inst_src)
9193 return false;10261 return false;
919410262
9195 if (irb->exec->first_err_trace_msg != nullptr) {10263 if (irb->exec->first_err_trace_msg != nullptr) {
...@@ -9198,13 +10266,13 @@ bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutable *ir_exec...@@ -9198,13 +10266,13 @@ bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutable *ir_exec
9198 }10266 }
919910267
9200 if (!instr_is_unreachable(result)) {10268 if (!instr_is_unreachable(result)) {
9201 ir_mark_gen(ir_build_add_implicit_return_type(irb, scope, result->source_node, result, nullptr));10269 ir_mark_gen(ir_build_add_implicit_return_type(irb, scope, result->base.source_node, result, nullptr));
9202 // no need for save_err_ret_addr because this cannot return error10270 // no need for save_err_ret_addr because this cannot return error
9203 ResultLocReturn *result_loc_ret = allocate<ResultLocReturn>(1, "ResultLocReturn");10271 ResultLocReturn *result_loc_ret = allocate<ResultLocReturn>(1, "ResultLocReturn");
9204 result_loc_ret->base.id = ResultLocIdReturn;10272 result_loc_ret->base.id = ResultLocIdReturn;
9205 ir_build_reset_result(irb, scope, node, &result_loc_ret->base);10273 ir_build_reset_result(irb, scope, node, &result_loc_ret->base);
9206 ir_mark_gen(ir_build_end_expr(irb, scope, node, result, &result_loc_ret->base));10274 ir_mark_gen(ir_build_end_expr(irb, scope, node, result, &result_loc_ret->base));
9207 ir_mark_gen(ir_build_return(irb, scope, result->source_node, result));10275 ir_mark_gen(ir_build_return_src(irb, scope, result->base.source_node, result));
9208 }10276 }
920910277
9210 return true;10278 return true;
...@@ -9213,7 +10281,7 @@ bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutable *ir_exec...@@ -9213,7 +10281,7 @@ bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutable *ir_exec
9213bool ir_gen_fn(CodeGen *codegen, ZigFn *fn_entry) {10281bool ir_gen_fn(CodeGen *codegen, ZigFn *fn_entry) {
9214 assert(fn_entry);10282 assert(fn_entry);
921510283
9216 IrExecutable *ir_executable = fn_entry->ir_executable;10284 IrExecutableSrc *ir_executable = fn_entry->ir_executable;
9217 AstNode *body_node = fn_entry->body_node;10285 AstNode *body_node = fn_entry->body_node;
921810286
9219 assert(fn_entry->child_scope);10287 assert(fn_entry->child_scope);
...@@ -9221,14 +10289,21 @@ bool ir_gen_fn(CodeGen *codegen, ZigFn *fn_entry) {...@@ -9221,14 +10289,21 @@ bool ir_gen_fn(CodeGen *codegen, ZigFn *fn_entry) {
9221 return ir_gen(codegen, body_node, fn_entry->child_scope, ir_executable);10289 return ir_gen(codegen, body_node, fn_entry->child_scope, ir_executable);
9222}10290}
922310291
9224static void ir_add_call_stack_errors(CodeGen *codegen, IrExecutable *exec, ErrorMsg *err_msg, int limit) {10292static void ir_add_call_stack_errors_gen(CodeGen *codegen, IrExecutableGen *exec, ErrorMsg *err_msg, int limit) {
9225 if (!exec || !exec->source_node || limit < 0) return;10293 if (!exec || !exec->source_node || limit < 0) return;
9226 add_error_note(codegen, err_msg, exec->source_node, buf_sprintf("called from here"));10294 add_error_note(codegen, err_msg, exec->source_node, buf_sprintf("called from here"));
922710295
9228 ir_add_call_stack_errors(codegen, exec->parent_exec, err_msg, limit - 1);10296 ir_add_call_stack_errors_gen(codegen, exec->parent_exec, err_msg, limit - 1);
9229}10297}
923010298
9231static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutable *exec, AstNode *source_node, Buf *msg) {10299static void ir_add_call_stack_errors(CodeGen *codegen, IrExecutableSrc *exec, ErrorMsg *err_msg, int limit) {
10300 if (!exec || !exec->source_node || limit < 0) return;
10301 add_error_note(codegen, err_msg, exec->source_node, buf_sprintf("called from here"));
10302
10303 ir_add_call_stack_errors_gen(codegen, exec->parent_exec, err_msg, limit - 1);
10304}
10305
10306static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutableSrc *exec, AstNode *source_node, Buf *msg) {
9232 ErrorMsg *err_msg = add_node_error(codegen, source_node, msg);10307 ErrorMsg *err_msg = add_node_error(codegen, source_node, msg);
9233 invalidate_exec(exec, err_msg);10308 invalidate_exec(exec, err_msg);
9234 if (exec->parent_exec) {10309 if (exec->parent_exec) {
...@@ -9237,26 +10312,40 @@ static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutable *exec, AstNo...@@ -9237,26 +10312,40 @@ static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutable *exec, AstNo
9237 return err_msg;10312 return err_msg;
9238}10313}
923910314
10315static ErrorMsg *exec_add_error_node_gen(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node, Buf *msg) {
10316 ErrorMsg *err_msg = add_node_error(codegen, source_node, msg);
10317 invalidate_exec_gen(exec, err_msg);
10318 if (exec->parent_exec) {
10319 ir_add_call_stack_errors_gen(codegen, exec, err_msg, 10);
10320 }
10321 return err_msg;
10322}
10323
9240static ErrorMsg *ir_add_error_node(IrAnalyze *ira, AstNode *source_node, Buf *msg) {10324static ErrorMsg *ir_add_error_node(IrAnalyze *ira, AstNode *source_node, Buf *msg) {
9241 return exec_add_error_node(ira->codegen, ira->new_irb.exec, source_node, msg);10325 return exec_add_error_node_gen(ira->codegen, ira->new_irb.exec, source_node, msg);
9242}10326}
924310327
9244static ErrorMsg *opt_ir_add_error_node(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node, Buf *msg) {10328static ErrorMsg *opt_ir_add_error_node(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node, Buf *msg) {
9245 if (ira != nullptr)10329 if (ira != nullptr)
9246 return exec_add_error_node(codegen, ira->new_irb.exec, source_node, msg);10330 return exec_add_error_node_gen(codegen, ira->new_irb.exec, source_node, msg);
9247 else10331 else
9248 return add_node_error(codegen, source_node, msg);10332 return add_node_error(codegen, source_node, msg);
9249}10333}
925010334
9251static ErrorMsg *ir_add_error(IrAnalyze *ira, IrInstruction *source_instruction, Buf *msg) {10335static ErrorMsg *ir_add_error(IrAnalyze *ira, IrInst *source_instruction, Buf *msg) {
9252 return ir_add_error_node(ira, source_instruction->source_node, msg);10336 return ir_add_error_node(ira, source_instruction->source_node, msg);
9253}10337}
925410338
9255static void ir_assert(bool ok, IrInstruction *source_instruction) {10339static void ir_assert(bool ok, IrInst *source_instruction) {
9256 if (ok) return;10340 if (ok) return;
9257 src_assert(ok, source_instruction->source_node);10341 src_assert(ok, source_instruction->source_node);
9258}10342}
925910343
10344static void ir_assert_gen(bool ok, IrInstGen *source_instruction) {
10345 if (ok) return;
10346 src_assert(ok, source_instruction->base.source_node);
10347}
10348
9260// This function takes a comptime ptr and makes the child const value conform to the type10349// This function takes a comptime ptr and makes the child const value conform to the type
9261// described by the pointer.10350// described by the pointer.
9262static Error eval_comptime_ptr_reinterpret(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node,10351static Error eval_comptime_ptr_reinterpret(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node,
...@@ -9302,36 +10391,36 @@ ZigValue *const_ptr_pointee(IrAnalyze *ira, CodeGen *codegen, ZigValue *const_va...@@ -9302,36 +10391,36 @@ ZigValue *const_ptr_pointee(IrAnalyze *ira, CodeGen *codegen, ZigValue *const_va
9302 return val;10391 return val;
9303}10392}
930410393
9305static Error ir_exec_scan_for_side_effects(CodeGen *codegen, IrExecutable *exec) {10394static Error ir_exec_scan_for_side_effects(CodeGen *codegen, IrExecutableGen *exec) {
9306 IrBasicBlock *bb = exec->basic_block_list.at(0);10395 IrBasicBlockGen *bb = exec->basic_block_list.at(0);
9307 for (size_t i = 0; i < bb->instruction_list.length; i += 1) {10396 for (size_t i = 0; i < bb->instruction_list.length; i += 1) {
9308 IrInstruction *instruction = bb->instruction_list.at(i);10397 IrInstGen *instruction = bb->instruction_list.at(i);
9309 if (instruction->id == IrInstructionIdReturn) {10398 if (instruction->id == IrInstGenIdReturn) {
9310 return ErrorNone;10399 return ErrorNone;
9311 } else if (ir_has_side_effects(instruction)) {10400 } else if (ir_inst_gen_has_side_effects(instruction)) {
9312 if (instr_is_comptime(instruction)) {10401 if (instr_is_comptime(instruction)) {
9313 switch (instruction->id) {10402 switch (instruction->id) {
9314 case IrInstructionIdUnwrapErrPayload:10403 case IrInstGenIdUnwrapErrPayload:
9315 case IrInstructionIdUnionFieldPtr:10404 case IrInstGenIdUnionFieldPtr:
9316 continue;10405 continue;
9317 default:10406 default:
9318 break;10407 break;
9319 }10408 }
9320 }10409 }
9321 if (get_scope_typeof(instruction->scope) != nullptr) {10410 if (get_scope_typeof(instruction->base.scope) != nullptr) {
9322 // doesn't count, it's inside a @TypeOf()10411 // doesn't count, it's inside a @TypeOf()
9323 continue;10412 continue;
9324 }10413 }
9325 exec_add_error_node(codegen, exec, instruction->source_node,10414 exec_add_error_node_gen(codegen, exec, instruction->base.source_node,
9326 buf_sprintf("unable to evaluate constant expression"));10415 buf_sprintf("unable to evaluate constant expression"));
9327 return ErrorSemanticAnalyzeFail;10416 return ErrorSemanticAnalyzeFail;
9328 }10417 }
9329 }10418 }
9330 zig_unreachable();10419 zig_unreachable();
9331}10420}
933210421
9333static bool ir_emit_global_runtime_side_effect(IrAnalyze *ira, IrInstruction *source_instruction) {10422static bool ir_emit_global_runtime_side_effect(IrAnalyze *ira, IrInst* source_instruction) {
9334 if (ir_should_inline(ira->new_irb.exec, source_instruction->scope)) {10423 if (ir_should_inline(ira->old_irb.exec, source_instruction->scope)) {
9335 ir_add_error(ira, source_instruction, buf_sprintf("unable to evaluate constant expression"));10424 ir_add_error(ira, source_instruction, buf_sprintf("unable to evaluate constant expression"));
9336 return false;10425 return false;
9337 }10426 }
...@@ -10065,7 +11154,7 @@ void float_read_ieee597(ZigValue *val, uint8_t *buf, bool is_big_endian) {...@@ -10065,7 +11154,7 @@ void float_read_ieee597(ZigValue *val, uint8_t *buf, bool is_big_endian) {
10065 }11154 }
10066}11155}
1006711156
10068static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruction, ZigType *other_type,11157static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstGen *instruction, ZigType *other_type,
10069 bool explicit_cast)11158 bool explicit_cast)
10070{11159{
10071 if (type_is_invalid(other_type)) {11160 if (type_is_invalid(other_type)) {
...@@ -10159,7 +11248,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc...@@ -10159,7 +11248,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
10159 }11248 }
10160 Buf *val_buf = buf_alloc();11249 Buf *val_buf = buf_alloc();
10161 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);11250 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
10162 ir_add_error(ira, instruction,11251 ir_add_error_node(ira, instruction->base.source_node,
10163 buf_sprintf("integer value %s has no representation in type '%s'",11252 buf_sprintf("integer value %s has no representation in type '%s'",
10164 buf_ptr(val_buf),11253 buf_ptr(val_buf),
10165 buf_ptr(&other_type->name)));11254 buf_ptr(&other_type->name)));
...@@ -10254,7 +11343,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc...@@ -10254,7 +11343,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
10254 }11343 }
10255 Buf *val_buf = buf_alloc();11344 Buf *val_buf = buf_alloc();
10256 float_append_buf(val_buf, const_val);11345 float_append_buf(val_buf, const_val);
10257 ir_add_error(ira, instruction,11346 ir_add_error_node(ira, instruction->base.source_node,
10258 buf_sprintf("cast of value %s to type '%s' loses information",11347 buf_sprintf("cast of value %s to type '%s' loses information",
10259 buf_ptr(val_buf),11348 buf_ptr(val_buf),
10260 buf_ptr(&other_type->name)));11349 buf_ptr(&other_type->name)));
...@@ -10263,7 +11352,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc...@@ -10263,7 +11352,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
10263 if (!other_type->data.integral.is_signed && const_val->data.x_bigint.is_negative) {11352 if (!other_type->data.integral.is_signed && const_val->data.x_bigint.is_negative) {
10264 Buf *val_buf = buf_alloc();11353 Buf *val_buf = buf_alloc();
10265 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);11354 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
10266 ir_add_error(ira, instruction,11355 ir_add_error_node(ira, instruction->base.source_node,
10267 buf_sprintf("cannot cast negative value %s to unsigned integer type '%s'",11356 buf_sprintf("cannot cast negative value %s to unsigned integer type '%s'",
10268 buf_ptr(val_buf),11357 buf_ptr(val_buf),
10269 buf_ptr(&other_type->name)));11358 buf_ptr(&other_type->name)));
...@@ -10284,7 +11373,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc...@@ -10284,7 +11373,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
10284 if (!child_type->data.integral.is_signed && const_val->data.x_bigint.is_negative) {11373 if (!child_type->data.integral.is_signed && const_val->data.x_bigint.is_negative) {
10285 Buf *val_buf = buf_alloc();11374 Buf *val_buf = buf_alloc();
10286 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);11375 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
10287 ir_add_error(ira, instruction,11376 ir_add_error_node(ira, instruction->base.source_node,
10288 buf_sprintf("cannot cast negative value %s to unsigned integer type '%s'",11377 buf_sprintf("cannot cast negative value %s to unsigned integer type '%s'",
10289 buf_ptr(val_buf),11378 buf_ptr(val_buf),
10290 buf_ptr(&child_type->name)));11379 buf_ptr(&child_type->name)));
...@@ -10307,7 +11396,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc...@@ -10307,7 +11396,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
10307 Buf *val_buf = buf_alloc();11396 Buf *val_buf = buf_alloc();
10308 float_append_buf(val_buf, const_val);11397 float_append_buf(val_buf, const_val);
1030911398
10310 ir_add_error(ira, instruction,11399 ir_add_error_node(ira, instruction->base.source_node,
10311 buf_sprintf("fractional component prevents float value %s from being casted to type '%s'",11400 buf_sprintf("fractional component prevents float value %s from being casted to type '%s'",
10312 buf_ptr(val_buf),11401 buf_ptr(val_buf),
10313 buf_ptr(&other_type->name)));11402 buf_ptr(&other_type->name)));
...@@ -10337,7 +11426,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc...@@ -10337,7 +11426,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
10337 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);11426 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
10338 }11427 }
1033911428
10340 ir_add_error(ira, instruction,11429 ir_add_error_node(ira, instruction->base.source_node,
10341 buf_sprintf("%s value %s cannot be coerced to type '%s'",11430 buf_sprintf("%s value %s cannot be coerced to type '%s'",
10342 num_lit_str,11431 num_lit_str,
10343 buf_ptr(val_buf),11432 buf_ptr(val_buf),
...@@ -10791,11 +11880,11 @@ static void update_errors_helper(CodeGen *g, ErrorTableEntry ***errors, size_t *...@@ -10791,11 +11880,11 @@ static void update_errors_helper(CodeGen *g, ErrorTableEntry ***errors, size_t *
10791}11880}
1079211881
10793static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigType *expected_type,11882static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigType *expected_type,
10794 IrInstruction **instructions, size_t instruction_count)11883 IrInstGen **instructions, size_t instruction_count)
10795{11884{
10796 Error err;11885 Error err;
10797 assert(instruction_count >= 1);11886 assert(instruction_count >= 1);
10798 IrInstruction *prev_inst;11887 IrInstGen *prev_inst;
10799 size_t i = 0;11888 size_t i = 0;
10800 for (;;) {11889 for (;;) {
10801 prev_inst = instructions[i];11890 prev_inst = instructions[i];
...@@ -10815,7 +11904,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT...@@ -10815,7 +11904,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
10815 size_t errors_count = 0;11904 size_t errors_count = 0;
10816 ZigType *err_set_type = nullptr;11905 ZigType *err_set_type = nullptr;
10817 if (prev_inst->value->type->id == ZigTypeIdErrorSet) {11906 if (prev_inst->value->type->id == ZigTypeIdErrorSet) {
10818 if (!resolve_inferred_error_set(ira->codegen, prev_inst->value->type, prev_inst->source_node)) {11907 if (!resolve_inferred_error_set(ira->codegen, prev_inst->value->type, prev_inst->base.source_node)) {
10819 return ira->codegen->builtin_types.entry_invalid;11908 return ira->codegen->builtin_types.entry_invalid;
10820 }11909 }
10821 if (type_is_global_error_set(prev_inst->value->type)) {11910 if (type_is_global_error_set(prev_inst->value->type)) {
...@@ -10835,7 +11924,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT...@@ -10835,7 +11924,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
10835 bool any_are_null = (prev_inst->value->type->id == ZigTypeIdNull);11924 bool any_are_null = (prev_inst->value->type->id == ZigTypeIdNull);
10836 bool convert_to_const_slice = false;11925 bool convert_to_const_slice = false;
10837 for (; i < instruction_count; i += 1) {11926 for (; i < instruction_count; i += 1) {
10838 IrInstruction *cur_inst = instructions[i];11927 IrInstGen *cur_inst = instructions[i];
10839 ZigType *cur_type = cur_inst->value->type;11928 ZigType *cur_type = cur_inst->value->type;
10840 ZigType *prev_type = prev_inst->value->type;11929 ZigType *prev_type = prev_inst->value->type;
1084111930
...@@ -10857,14 +11946,14 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT...@@ -10857,14 +11946,14 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
10857 }11946 }
1085811947
10859 if (prev_type->id == ZigTypeIdErrorSet) {11948 if (prev_type->id == ZigTypeIdErrorSet) {
10860 ir_assert(err_set_type != nullptr, prev_inst);11949 ir_assert_gen(err_set_type != nullptr, prev_inst);
10861 if (cur_type->id == ZigTypeIdErrorSet) {11950 if (cur_type->id == ZigTypeIdErrorSet) {
10862 if (type_is_global_error_set(err_set_type)) {11951 if (type_is_global_error_set(err_set_type)) {
10863 continue;11952 continue;
10864 }11953 }
10865 bool allow_infer = cur_type->data.error_set.infer_fn != nullptr &&11954 bool allow_infer = cur_type->data.error_set.infer_fn != nullptr &&
10866 cur_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;11955 cur_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
10867 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->source_node)) {11956 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->base.source_node)) {
10868 return ira->codegen->builtin_types.entry_invalid;11957 return ira->codegen->builtin_types.entry_invalid;
10869 }11958 }
10870 if (!allow_infer && type_is_global_error_set(cur_type)) {11959 if (!allow_infer && type_is_global_error_set(cur_type)) {
...@@ -10932,7 +12021,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT...@@ -10932,7 +12021,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
10932 ZigType *cur_err_set_type = cur_type->data.error_union.err_set_type;12021 ZigType *cur_err_set_type = cur_type->data.error_union.err_set_type;
10933 bool allow_infer = cur_err_set_type->data.error_set.infer_fn != nullptr &&12022 bool allow_infer = cur_err_set_type->data.error_set.infer_fn != nullptr &&
10934 cur_err_set_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;12023 cur_err_set_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
10935 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->source_node)) {12024 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->base.source_node)) {
10936 return ira->codegen->builtin_types.entry_invalid;12025 return ira->codegen->builtin_types.entry_invalid;
10937 }12026 }
10938 if (!allow_infer && type_is_global_error_set(cur_err_set_type)) {12027 if (!allow_infer && type_is_global_error_set(cur_err_set_type)) {
...@@ -10987,7 +12076,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT...@@ -10987,7 +12076,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
10987 if (cur_type->id == ZigTypeIdErrorSet) {12076 if (cur_type->id == ZigTypeIdErrorSet) {
10988 bool allow_infer = cur_type->data.error_set.infer_fn != nullptr &&12077 bool allow_infer = cur_type->data.error_set.infer_fn != nullptr &&
10989 cur_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;12078 cur_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
10990 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->source_node)) {12079 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->base.source_node)) {
10991 return ira->codegen->builtin_types.entry_invalid;12080 return ira->codegen->builtin_types.entry_invalid;
10992 }12081 }
10993 if (!allow_infer && type_is_global_error_set(cur_type)) {12082 if (!allow_infer && type_is_global_error_set(cur_type)) {
...@@ -11010,7 +12099,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT...@@ -11010,7 +12099,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
11010 err_set_type = cur_type;12099 err_set_type = cur_type;
11011 }12100 }
1101212101
11013 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, err_set_type, cur_inst->source_node)) {12102 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, err_set_type, cur_inst->base.source_node)) {
11014 return ira->codegen->builtin_types.entry_invalid;12103 return ira->codegen->builtin_types.entry_invalid;
11015 }12104 }
1101612105
...@@ -11073,11 +12162,11 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT...@@ -11073,11 +12162,11 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
11073 bool allow_infer_cur = cur_err_set_type->data.error_set.infer_fn != nullptr &&12162 bool allow_infer_cur = cur_err_set_type->data.error_set.infer_fn != nullptr &&
11074 cur_err_set_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;12163 cur_err_set_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
1107512164
11076 if (!allow_infer_prev && !resolve_inferred_error_set(ira->codegen, prev_err_set_type, cur_inst->source_node)) {12165 if (!allow_infer_prev && !resolve_inferred_error_set(ira->codegen, prev_err_set_type, cur_inst->base.source_node)) {
11077 return ira->codegen->builtin_types.entry_invalid;12166 return ira->codegen->builtin_types.entry_invalid;
11078 }12167 }
1107912168
11080 if (!allow_infer_cur && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->source_node)) {12169 if (!allow_infer_cur && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->base.source_node)) {
11081 return ira->codegen->builtin_types.entry_invalid;12170 return ira->codegen->builtin_types.entry_invalid;
11082 }12171 }
1108312172
...@@ -11254,7 +12343,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT...@@ -11254,7 +12343,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
11254 ZigType *cur_err_set_type = cur_type->data.error_union.err_set_type;12343 ZigType *cur_err_set_type = cur_type->data.error_union.err_set_type;
11255 bool allow_infer = cur_err_set_type->data.error_set.infer_fn != nullptr &&12344 bool allow_infer = cur_err_set_type->data.error_set.infer_fn != nullptr &&
11256 cur_err_set_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;12345 cur_err_set_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
11257 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->source_node)) {12346 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->base.source_node)) {
11258 return ira->codegen->builtin_types.entry_invalid;12347 return ira->codegen->builtin_types.entry_invalid;
11259 }12348 }
11260 if ((!allow_infer && type_is_global_error_set(cur_err_set_type)) ||12349 if ((!allow_infer && type_is_global_error_set(cur_err_set_type)) ||
...@@ -11449,9 +12538,9 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT...@@ -11449,9 +12538,9 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
11449 ErrorMsg *msg = ir_add_error_node(ira, source_node,12538 ErrorMsg *msg = ir_add_error_node(ira, source_node,
11450 buf_sprintf("incompatible types: '%s' and '%s'",12539 buf_sprintf("incompatible types: '%s' and '%s'",
11451 buf_ptr(&prev_type->name), buf_ptr(&cur_type->name)));12540 buf_ptr(&prev_type->name), buf_ptr(&cur_type->name)));
11452 add_error_note(ira->codegen, msg, prev_inst->source_node,12541 add_error_note(ira->codegen, msg, prev_inst->base.source_node,
11453 buf_sprintf("type '%s' here", buf_ptr(&prev_type->name)));12542 buf_sprintf("type '%s' here", buf_ptr(&prev_type->name)));
11454 add_error_note(ira->codegen, msg, cur_inst->source_node,12543 add_error_note(ira->codegen, msg, cur_inst->base.source_node,
11455 buf_sprintf("type '%s' here", buf_ptr(&cur_type->name)));12544 buf_sprintf("type '%s' here", buf_ptr(&cur_type->name)));
1145612545
11457 return ira->codegen->builtin_types.entry_invalid;12546 return ira->codegen->builtin_types.entry_invalid;
...@@ -11521,7 +12610,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT...@@ -11521,7 +12610,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
11521 }12610 }
11522}12611}
1152312612
11524static bool eval_const_expr_implicit_cast(IrAnalyze *ira, IrInstruction *source_instr,12613static bool eval_const_expr_implicit_cast(IrAnalyze *ira, IrInst *source_instr,
11525 CastOp cast_op,12614 CastOp cast_op,
11526 ZigValue *other_val, ZigType *other_type,12615 ZigValue *other_val, ZigType *other_type,
11527 ZigValue *const_val, ZigType *new_type)12616 ZigValue *const_val, ZigType *new_type)
...@@ -11621,58 +12710,56 @@ static bool eval_const_expr_implicit_cast(IrAnalyze *ira, IrInstruction *source_...@@ -11621,58 +12710,56 @@ static bool eval_const_expr_implicit_cast(IrAnalyze *ira, IrInstruction *source_
11621 return true;12710 return true;
11622}12711}
1162312712
11624static IrInstruction *ir_const(IrAnalyze *ira, IrInstruction *old_instruction, ZigType *ty) {12713static IrInstGen *ir_const(IrAnalyze *ira, IrInst *inst, ZigType *ty) {
11625 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,12714 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
11626 old_instruction->scope, old_instruction->source_node);12715 inst->scope, inst->source_node);
11627 IrInstruction *new_instruction = &const_instruction->base;12716 IrInstGen *new_instruction = &const_instruction->base;
11628 new_instruction->value->type = ty;12717 new_instruction->value->type = ty;
11629 new_instruction->value->special = ConstValSpecialStatic;12718 new_instruction->value->special = ConstValSpecialStatic;
11630 return new_instruction;12719 return new_instruction;
11631}12720}
1163212721
11633static IrInstruction *ir_const_noval(IrAnalyze *ira, IrInstruction *old_instruction) {12722static IrInstGen *ir_const_noval(IrAnalyze *ira, IrInst *old_instruction) {
11634 IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(&ira->new_irb,12723 IrInstGenConst *const_instruction = ir_create_inst_noval<IrInstGenConst>(&ira->new_irb,
11635 old_instruction->scope, old_instruction->source_node);12724 old_instruction->scope, old_instruction->source_node);
11636 return &const_instruction->base;12725 return &const_instruction->base;
11637}12726}
1163812727
11639// This function initializes the new IrInstruction with the provided ZigValue,12728// This function initializes the new IrInstGen with the provided ZigValue,
11640// rather than creating a new one.12729// rather than creating a new one.
11641static IrInstruction *ir_const_move(IrAnalyze *ira, IrInstruction *old_instruction, ZigValue *val) {12730static IrInstGen *ir_const_move(IrAnalyze *ira, IrInst *old_instruction, ZigValue *val) {
11642 IrInstruction *result = ir_const_noval(ira, old_instruction);12731 IrInstGen *result = ir_const_noval(ira, old_instruction);
11643 result->value = val;12732 result->value = val;
11644 return result;12733 return result;
11645}12734}
1164612735
11647static IrInstruction *ir_resolve_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,12736static IrInstGen *ir_resolve_cast(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value,
11648 ZigType *wanted_type, CastOp cast_op)12737 ZigType *wanted_type, CastOp cast_op)
11649{12738{
11650 if (instr_is_comptime(value) || !type_has_bits(wanted_type)) {12739 if (instr_is_comptime(value) || !type_has_bits(wanted_type)) {
11651 IrInstruction *result = ir_const(ira, source_instr, wanted_type);12740 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
11652 if (!eval_const_expr_implicit_cast(ira, source_instr, cast_op, value->value, value->value->type,12741 if (!eval_const_expr_implicit_cast(ira, source_instr, cast_op, value->value, value->value->type,
11653 result->value, wanted_type))12742 result->value, wanted_type))
11654 {12743 {
11655 return ira->codegen->invalid_instruction;12744 return ira->codegen->invalid_inst_gen;
11656 }12745 }
11657 return result;12746 return result;
11658 } else {12747 } else {
11659 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node, wanted_type, value, cast_op);12748 return ir_build_cast(ira, source_instr, wanted_type, value, cast_op);
11660 result->value->type = wanted_type;
11661 return result;
11662 }12749 }
11663}12750}
1166412751
11665static IrInstruction *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira, IrInstruction *source_instr,12752static IrInstGen *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira, IrInst* source_instr,
11666 IrInstruction *value, ZigType *wanted_type)12753 IrInstGen *value, ZigType *wanted_type)
11667{12754{
11668 assert(value->value->type->id == ZigTypeIdPointer);12755 ir_assert(value->value->type->id == ZigTypeIdPointer, source_instr);
1166912756
11670 Error err;12757 Error err;
1167112758
11672 if ((err = type_resolve(ira->codegen, value->value->type->data.pointer.child_type,12759 if ((err = type_resolve(ira->codegen, value->value->type->data.pointer.child_type,
11673 ResolveStatusAlignmentKnown)))12760 ResolveStatusAlignmentKnown)))
11674 {12761 {
11675 return ira->codegen->invalid_instruction;12762 return ira->codegen->invalid_inst_gen;
11676 }12763 }
1167712764
11678 wanted_type = adjust_ptr_align(ira->codegen, wanted_type, get_ptr_align(ira->codegen, value->value->type));12765 wanted_type = adjust_ptr_align(ira->codegen, wanted_type, get_ptr_align(ira->codegen, value->value->type));
...@@ -11680,9 +12767,9 @@ static IrInstruction *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira,...@@ -11680,9 +12767,9 @@ static IrInstruction *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira,
11680 if (instr_is_comptime(value)) {12767 if (instr_is_comptime(value)) {
11681 ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, value->value, source_instr->source_node);12768 ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, value->value, source_instr->source_node);
11682 if (pointee == nullptr)12769 if (pointee == nullptr)
11683 return ira->codegen->invalid_instruction;12770 return ira->codegen->invalid_inst_gen;
11684 if (pointee->special != ConstValSpecialRuntime) {12771 if (pointee->special != ConstValSpecialRuntime) {
11685 IrInstruction *result = ir_const(ira, source_instr, wanted_type);12772 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
11686 result->value->data.x_ptr.special = ConstPtrSpecialBaseArray;12773 result->value->data.x_ptr.special = ConstPtrSpecialBaseArray;
11687 result->value->data.x_ptr.mut = value->value->data.x_ptr.mut;12774 result->value->data.x_ptr.mut = value->value->data.x_ptr.mut;
11688 result->value->data.x_ptr.data.base_array.array_val = pointee;12775 result->value->data.x_ptr.data.base_array.array_val = pointee;
...@@ -11691,21 +12778,18 @@ static IrInstruction *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira,...@@ -11691,21 +12778,18 @@ static IrInstruction *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira,
11691 }12778 }
11692 }12779 }
1169312780
11694 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node,12781 return ir_build_cast(ira, source_instr, wanted_type, value, CastOpBitCast);
11695 wanted_type, value, CastOpBitCast);
11696 result->value->type = wanted_type;
11697 return result;
11698}12782}
1169912783
11700static IrInstruction *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruction *source_instr,12784static IrInstGen *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInst* source_instr,
11701 IrInstruction *array_ptr, ZigType *wanted_type, ResultLoc *result_loc)12785 IrInstGen *array_ptr, ZigType *wanted_type, ResultLoc *result_loc)
11702{12786{
11703 Error err;12787 Error err;
1170412788
11705 if ((err = type_resolve(ira->codegen, array_ptr->value->type->data.pointer.child_type,12789 if ((err = type_resolve(ira->codegen, array_ptr->value->type->data.pointer.child_type,
11706 ResolveStatusAlignmentKnown)))12790 ResolveStatusAlignmentKnown)))
11707 {12791 {
11708 return ira->codegen->invalid_instruction;12792 return ira->codegen->invalid_inst_gen;
11709 }12793 }
1171012794
11711 wanted_type = adjust_slice_align(ira->codegen, wanted_type, get_ptr_align(ira->codegen, array_ptr->value->type));12795 wanted_type = adjust_slice_align(ira->codegen, wanted_type, get_ptr_align(ira->codegen, array_ptr->value->type));
...@@ -11713,17 +12797,17 @@ static IrInstruction *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruc...@@ -11713,17 +12797,17 @@ static IrInstruction *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruc
11713 if (instr_is_comptime(array_ptr)) {12797 if (instr_is_comptime(array_ptr)) {
11714 ZigValue *array_ptr_val = ir_resolve_const(ira, array_ptr, UndefBad);12798 ZigValue *array_ptr_val = ir_resolve_const(ira, array_ptr, UndefBad);
11715 if (array_ptr_val == nullptr)12799 if (array_ptr_val == nullptr)
11716 return ira->codegen->invalid_instruction;12800 return ira->codegen->invalid_inst_gen;
11717 ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, array_ptr_val, source_instr->source_node);12801 ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, array_ptr_val, source_instr->source_node);
11718 if (pointee == nullptr)12802 if (pointee == nullptr)
11719 return ira->codegen->invalid_instruction;12803 return ira->codegen->invalid_inst_gen;
11720 if (pointee->special != ConstValSpecialRuntime) {12804 if (pointee->special != ConstValSpecialRuntime) {
11721 assert(array_ptr_val->type->id == ZigTypeIdPointer);12805 assert(array_ptr_val->type->id == ZigTypeIdPointer);
11722 ZigType *array_type = array_ptr_val->type->data.pointer.child_type;12806 ZigType *array_type = array_ptr_val->type->data.pointer.child_type;
11723 assert(is_slice(wanted_type));12807 assert(is_slice(wanted_type));
11724 bool is_const = wanted_type->data.structure.fields[slice_ptr_index]->type_entry->data.pointer.is_const;12808 bool is_const = wanted_type->data.structure.fields[slice_ptr_index]->type_entry->data.pointer.is_const;
1172512809
11726 IrInstruction *result = ir_const(ira, source_instr, wanted_type);12810 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
11727 init_const_slice(ira->codegen, result->value, pointee, 0, array_type->data.array.len, is_const);12811 init_const_slice(ira->codegen, result->value, pointee, 0, array_type->data.array.len, is_const);
11728 result->value->data.x_struct.fields[slice_ptr_index]->data.x_ptr.mut = array_ptr_val->data.x_ptr.mut;12812 result->value->data.x_struct.fields[slice_ptr_index]->data.x_ptr.mut = array_ptr_val->data.x_ptr.mut;
11729 result->value->type = wanted_type;12813 result->value->type = wanted_type;
...@@ -11732,32 +12816,33 @@ static IrInstruction *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruc...@@ -11732,32 +12816,33 @@ static IrInstruction *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruc
11732 }12816 }
1173312817
11734 if (result_loc == nullptr) result_loc = no_result_loc();12818 if (result_loc == nullptr) result_loc = no_result_loc();
11735 IrInstruction *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type,12819 IrInstGen *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, true);
11736 nullptr, true, true);12820 if (type_is_invalid(result_loc_inst->value->type) ||
11737 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {12821 result_loc_inst->value->type->id == ZigTypeIdUnreachable)
12822 {
11738 return result_loc_inst;12823 return result_loc_inst;
11739 }12824 }
11740 return ir_build_ptr_of_array_to_slice(ira, source_instr, wanted_type, array_ptr, result_loc_inst);12825 return ir_build_ptr_of_array_to_slice(ira, source_instr, wanted_type, array_ptr, result_loc_inst);
11741}12826}
1174212827
11743static IrBasicBlock *ir_get_new_bb(IrAnalyze *ira, IrBasicBlock *old_bb, IrInstruction *ref_old_instruction) {12828static IrBasicBlockGen *ir_get_new_bb(IrAnalyze *ira, IrBasicBlockSrc *old_bb, IrInst *ref_old_instruction) {
11744 assert(old_bb);12829 assert(old_bb);
1174512830
11746 if (old_bb->other) {12831 if (old_bb->child) {
11747 if (ref_old_instruction == nullptr || old_bb->other->ref_instruction != ref_old_instruction) {12832 if (ref_old_instruction == nullptr || old_bb->child->ref_instruction != ref_old_instruction) {
11748 return old_bb->other;12833 return old_bb->child;
11749 }12834 }
11750 }12835 }
1175112836
11752 IrBasicBlock *new_bb = ir_build_bb_from(&ira->new_irb, old_bb);12837 IrBasicBlockGen *new_bb = ir_build_bb_from(ira, old_bb);
11753 new_bb->ref_instruction = ref_old_instruction;12838 new_bb->ref_instruction = ref_old_instruction;
1175412839
11755 return new_bb;12840 return new_bb;
11756}12841}
1175712842
11758static IrBasicBlock *ir_get_new_bb_runtime(IrAnalyze *ira, IrBasicBlock *old_bb, IrInstruction *ref_old_instruction) {12843static IrBasicBlockGen *ir_get_new_bb_runtime(IrAnalyze *ira, IrBasicBlockSrc *old_bb, IrInst *ref_old_instruction) {
11759 assert(ref_old_instruction != nullptr);12844 assert(ref_old_instruction != nullptr);
11760 IrBasicBlock *new_bb = ir_get_new_bb(ira, old_bb, ref_old_instruction);12845 IrBasicBlockGen *new_bb = ir_get_new_bb(ira, old_bb, ref_old_instruction);
11761 if (new_bb->must_be_comptime_source_instr) {12846 if (new_bb->must_be_comptime_source_instr) {
11762 ErrorMsg *msg = ir_add_error(ira, ref_old_instruction,12847 ErrorMsg *msg = ir_add_error(ira, ref_old_instruction,
11763 buf_sprintf("control flow attempts to use compile-time variable at runtime"));12848 buf_sprintf("control flow attempts to use compile-time variable at runtime"));
...@@ -11768,24 +12853,24 @@ static IrBasicBlock *ir_get_new_bb_runtime(IrAnalyze *ira, IrBasicBlock *old_bb,...@@ -11768,24 +12853,24 @@ static IrBasicBlock *ir_get_new_bb_runtime(IrAnalyze *ira, IrBasicBlock *old_bb,
11768 return new_bb;12853 return new_bb;
11769}12854}
1177012855
11771static void ir_start_bb(IrAnalyze *ira, IrBasicBlock *old_bb, IrBasicBlock *const_predecessor_bb) {12856static void ir_start_bb(IrAnalyze *ira, IrBasicBlockSrc *old_bb, IrBasicBlockSrc *const_predecessor_bb) {
11772 ir_assert(!old_bb->suspended, (old_bb->instruction_list.length != 0) ? old_bb->instruction_list.at(0) : nullptr);12857 ir_assert(!old_bb->suspended, (old_bb->instruction_list.length != 0) ? &old_bb->instruction_list.at(0)->base : nullptr);
11773 ira->instruction_index = 0;12858 ira->instruction_index = 0;
11774 ira->old_irb.current_basic_block = old_bb;12859 ira->old_irb.current_basic_block = old_bb;
11775 ira->const_predecessor_bb = const_predecessor_bb;12860 ira->const_predecessor_bb = const_predecessor_bb;
11776 ira->old_bb_index = old_bb->index;12861 ira->old_bb_index = old_bb->index;
11777}12862}
1177812863
11779static IrInstruction *ira_suspend(IrAnalyze *ira, IrInstruction *old_instruction, IrBasicBlock *next_bb,12864static IrInstGen *ira_suspend(IrAnalyze *ira, IrInst *old_instruction, IrBasicBlockSrc *next_bb,
11780 IrSuspendPosition *suspend_pos)12865 IrSuspendPosition *suspend_pos)
11781{12866{
11782 if (ira->codegen->verbose_ir) {12867 if (ira->codegen->verbose_ir) {
11783 fprintf(stderr, "suspend %s_%zu %s_%zu #%" PRIu32 " (%zu,%zu)\n",12868 fprintf(stderr, "suspend %s_%" PRIu32 " %s_%" PRIu32 " #%" PRIu32 " (%zu,%zu)\n",
11784 ira->old_irb.current_basic_block->name_hint,12869 ira->old_irb.current_basic_block->name_hint,
11785 ira->old_irb.current_basic_block->debug_id,12870 ira->old_irb.current_basic_block->debug_id,
11786 ira->old_irb.exec->basic_block_list.at(ira->old_bb_index)->name_hint,12871 ira->old_irb.exec->basic_block_list.at(ira->old_bb_index)->name_hint,
11787 ira->old_irb.exec->basic_block_list.at(ira->old_bb_index)->debug_id,12872 ira->old_irb.exec->basic_block_list.at(ira->old_bb_index)->debug_id,
11788 ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index)->debug_id,12873 ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index)->base.debug_id,
11789 ira->old_bb_index, ira->instruction_index);12874 ira->old_bb_index, ira->instruction_index);
11790 }12875 }
11791 suspend_pos->basic_block_index = ira->old_bb_index;12876 suspend_pos->basic_block_index = ira->old_bb_index;
...@@ -11800,13 +12885,13 @@ static IrInstruction *ira_suspend(IrAnalyze *ira, IrInstruction *old_instruction...@@ -11800,13 +12885,13 @@ static IrInstruction *ira_suspend(IrAnalyze *ira, IrInstruction *old_instruction
11800 assert(ira->old_irb.current_basic_block == next_bb);12885 assert(ira->old_irb.current_basic_block == next_bb);
11801 ira->instruction_index = 0;12886 ira->instruction_index = 0;
11802 ira->const_predecessor_bb = nullptr;12887 ira->const_predecessor_bb = nullptr;
11803 next_bb->other = ir_get_new_bb_runtime(ira, next_bb, old_instruction);12888 next_bb->child = ir_get_new_bb_runtime(ira, next_bb, old_instruction);
11804 ira->new_irb.current_basic_block = next_bb->other;12889 ira->new_irb.current_basic_block = next_bb->child;
11805 }12890 }
11806 return ira->codegen->unreach_instruction;12891 return ira->codegen->unreach_instruction;
11807}12892}
1180812893
11809static IrInstruction *ira_resume(IrAnalyze *ira) {12894static IrInstGen *ira_resume(IrAnalyze *ira) {
11810 IrSuspendPosition pos = ira->resume_stack.pop();12895 IrSuspendPosition pos = ira->resume_stack.pop();
11811 if (ira->codegen->verbose_ir) {12896 if (ira->codegen->verbose_ir) {
11812 fprintf(stderr, "resume (%zu,%zu) ", pos.basic_block_index, pos.instruction_index);12897 fprintf(stderr, "resume (%zu,%zu) ", pos.basic_block_index, pos.instruction_index);
...@@ -11819,12 +12904,12 @@ static IrInstruction *ira_resume(IrAnalyze *ira) {...@@ -11819,12 +12904,12 @@ static IrInstruction *ira_resume(IrAnalyze *ira) {
11819 ira->instruction_index = pos.instruction_index;12904 ira->instruction_index = pos.instruction_index;
11820 assert(pos.instruction_index < ira->old_irb.current_basic_block->instruction_list.length);12905 assert(pos.instruction_index < ira->old_irb.current_basic_block->instruction_list.length);
11821 if (ira->codegen->verbose_ir) {12906 if (ira->codegen->verbose_ir) {
11822 fprintf(stderr, "%s_%zu #%" PRIu32 "\n", ira->old_irb.current_basic_block->name_hint,12907 fprintf(stderr, "%s_%" PRIu32 " #%" PRIu32 "\n", ira->old_irb.current_basic_block->name_hint,
11823 ira->old_irb.current_basic_block->debug_id,12908 ira->old_irb.current_basic_block->debug_id,
11824 ira->old_irb.current_basic_block->instruction_list.at(pos.instruction_index)->debug_id);12909 ira->old_irb.current_basic_block->instruction_list.at(pos.instruction_index)->base.debug_id);
11825 }12910 }
11826 ira->const_predecessor_bb = nullptr;12911 ira->const_predecessor_bb = nullptr;
11827 ira->new_irb.current_basic_block = ira->old_irb.current_basic_block->other;12912 ira->new_irb.current_basic_block = ira->old_irb.current_basic_block->child;
11828 assert(ira->new_irb.current_basic_block != nullptr);12913 assert(ira->new_irb.current_basic_block != nullptr);
11829 return ira->codegen->unreach_instruction;12914 return ira->codegen->unreach_instruction;
11830}12915}
...@@ -11835,8 +12920,8 @@ static void ir_start_next_bb(IrAnalyze *ira) {...@@ -11835,8 +12920,8 @@ static void ir_start_next_bb(IrAnalyze *ira) {
11835 bool need_repeat = true;12920 bool need_repeat = true;
11836 for (;;) {12921 for (;;) {
11837 while (ira->old_bb_index < ira->old_irb.exec->basic_block_list.length) {12922 while (ira->old_bb_index < ira->old_irb.exec->basic_block_list.length) {
11838 IrBasicBlock *old_bb = ira->old_irb.exec->basic_block_list.at(ira->old_bb_index);12923 IrBasicBlockSrc *old_bb = ira->old_irb.exec->basic_block_list.at(ira->old_bb_index);
11839 if (old_bb->other == nullptr && old_bb->suspend_instruction_ref == nullptr) {12924 if (old_bb->child == nullptr && old_bb->suspend_instruction_ref == nullptr) {
11840 ira->old_bb_index += 1;12925 ira->old_bb_index += 1;
11841 continue;12926 continue;
11842 }12927 }
...@@ -11844,8 +12929,8 @@ static void ir_start_next_bb(IrAnalyze *ira) {...@@ -11844,8 +12929,8 @@ static void ir_start_next_bb(IrAnalyze *ira) {
11844 // if it's a suspended block,12929 // if it's a suspended block,
11845 // then skip it12930 // then skip it
11846 if (old_bb->suspended ||12931 if (old_bb->suspended ||
11847 (old_bb->other != nullptr && old_bb->other->instruction_list.length != 0) ||12932 (old_bb->child != nullptr && old_bb->child->instruction_list.length != 0) ||
11848 (old_bb->other != nullptr && old_bb->other->already_appended))12933 (old_bb->child != nullptr && old_bb->child->already_appended))
11849 {12934 {
11850 ira->old_bb_index += 1;12935 ira->old_bb_index += 1;
11851 continue;12936 continue;
...@@ -11859,10 +12944,10 @@ static void ir_start_next_bb(IrAnalyze *ira) {...@@ -11859,10 +12944,10 @@ static void ir_start_next_bb(IrAnalyze *ira) {
11859 return;12944 return;
11860 }12945 }
1186112946
11862 if (old_bb->other == nullptr) {12947 if (old_bb->child == nullptr) {
11863 old_bb->other = ir_get_new_bb_runtime(ira, old_bb, old_bb->suspend_instruction_ref);12948 old_bb->child = ir_get_new_bb_runtime(ira, old_bb, old_bb->suspend_instruction_ref);
11864 }12949 }
11865 ira->new_irb.current_basic_block = old_bb->other;12950 ira->new_irb.current_basic_block = old_bb->child;
11866 ir_start_bb(ira, old_bb, nullptr);12951 ir_start_bb(ira, old_bb, nullptr);
11867 return;12952 return;
11868 }12953 }
...@@ -11882,16 +12967,16 @@ static void ir_finish_bb(IrAnalyze *ira) {...@@ -11882,16 +12967,16 @@ static void ir_finish_bb(IrAnalyze *ira) {
11882 if (!ira->new_irb.current_basic_block->already_appended) {12967 if (!ira->new_irb.current_basic_block->already_appended) {
11883 ira->new_irb.current_basic_block->already_appended = true;12968 ira->new_irb.current_basic_block->already_appended = true;
11884 if (ira->codegen->verbose_ir) {12969 if (ira->codegen->verbose_ir) {
11885 fprintf(stderr, "append new bb %s_%zu\n", ira->new_irb.current_basic_block->name_hint,12970 fprintf(stderr, "append new bb %s_%" PRIu32 "\n", ira->new_irb.current_basic_block->name_hint,
11886 ira->new_irb.current_basic_block->debug_id);12971 ira->new_irb.current_basic_block->debug_id);
11887 }12972 }
11888 ira->new_irb.exec->basic_block_list.append(ira->new_irb.current_basic_block);12973 ira->new_irb.exec->basic_block_list.append(ira->new_irb.current_basic_block);
11889 }12974 }
11890 ira->instruction_index += 1;12975 ira->instruction_index += 1;
11891 while (ira->instruction_index < ira->old_irb.current_basic_block->instruction_list.length) {12976 while (ira->instruction_index < ira->old_irb.current_basic_block->instruction_list.length) {
11892 IrInstruction *next_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);12977 IrInstSrc *next_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);
11893 if (!next_instruction->is_gen) {12978 if (!next_instruction->is_gen) {
11894 ir_add_error(ira, next_instruction, buf_sprintf("unreachable code"));12979 ir_add_error(ira, &next_instruction->base, buf_sprintf("unreachable code"));
11895 break;12980 break;
11896 }12981 }
11897 ira->instruction_index += 1;12982 ira->instruction_index += 1;
...@@ -11900,7 +12985,7 @@ static void ir_finish_bb(IrAnalyze *ira) {...@@ -11900,7 +12985,7 @@ static void ir_finish_bb(IrAnalyze *ira) {
11900 ir_start_next_bb(ira);12985 ir_start_next_bb(ira);
11901}12986}
1190212987
11903static IrInstruction *ir_unreach_error(IrAnalyze *ira) {12988static IrInstGen *ir_unreach_error(IrAnalyze *ira) {
11904 ira->old_bb_index = SIZE_MAX;12989 ira->old_bb_index = SIZE_MAX;
11905 if (ira->new_irb.exec->first_err_trace_msg == nullptr) {12990 if (ira->new_irb.exec->first_err_trace_msg == nullptr) {
11906 ira->new_irb.exec->first_err_trace_msg = ira->codegen->trace_err;12991 ira->new_irb.exec->first_err_trace_msg = ira->codegen->trace_err;
...@@ -11908,7 +12993,7 @@ static IrInstruction *ir_unreach_error(IrAnalyze *ira) {...@@ -11908,7 +12993,7 @@ static IrInstruction *ir_unreach_error(IrAnalyze *ira) {
11908 return ira->codegen->unreach_instruction;12993 return ira->codegen->unreach_instruction;
11909}12994}
1191012995
11911static bool ir_emit_backward_branch(IrAnalyze *ira, IrInstruction *source_instruction) {12996static bool ir_emit_backward_branch(IrAnalyze *ira, IrInst* source_instruction) {
11912 size_t *bbc = ira->new_irb.exec->backward_branch_count;12997 size_t *bbc = ira->new_irb.exec->backward_branch_count;
11913 size_t *quota = ira->new_irb.exec->backward_branch_quota;12998 size_t *quota = ira->new_irb.exec->backward_branch_quota;
1191412999
...@@ -11927,66 +13012,82 @@ static bool ir_emit_backward_branch(IrAnalyze *ira, IrInstruction *source_instru...@@ -11927,66 +13012,82 @@ static bool ir_emit_backward_branch(IrAnalyze *ira, IrInstruction *source_instru
11927 return true;13012 return true;
11928}13013}
1192913014
11930static IrInstruction *ir_inline_bb(IrAnalyze *ira, IrInstruction *source_instruction, IrBasicBlock *old_bb) {13015static IrInstGen *ir_inline_bb(IrAnalyze *ira, IrInst* source_instruction, IrBasicBlockSrc *old_bb) {
11931 if (old_bb->debug_id <= ira->old_irb.current_basic_block->debug_id) {13016 if (old_bb->debug_id <= ira->old_irb.current_basic_block->debug_id) {
11932 if (!ir_emit_backward_branch(ira, source_instruction))13017 if (!ir_emit_backward_branch(ira, source_instruction))
11933 return ir_unreach_error(ira);13018 return ir_unreach_error(ira);
11934 }13019 }
1193513020
11936 old_bb->other = ira->old_irb.current_basic_block->other;13021 old_bb->child = ira->old_irb.current_basic_block->child;
11937 ir_start_bb(ira, old_bb, ira->old_irb.current_basic_block);13022 ir_start_bb(ira, old_bb, ira->old_irb.current_basic_block);
11938 return ira->codegen->unreach_instruction;13023 return ira->codegen->unreach_instruction;
11939}13024}
1194013025
11941static IrInstruction *ir_finish_anal(IrAnalyze *ira, IrInstruction *instruction) {13026static IrInstGen *ir_finish_anal(IrAnalyze *ira, IrInstGen *instruction) {
11942 if (instruction->value->type->id == ZigTypeIdUnreachable)13027 if (instruction->value->type->id == ZigTypeIdUnreachable)
11943 ir_finish_bb(ira);13028 ir_finish_bb(ira);
11944 return instruction;13029 return instruction;
11945}13030}
1194613031
11947static IrInstruction *ir_const_type(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *ty) {13032static IrInstGen *ir_const_fn(IrAnalyze *ira, IrInst *source_instr, ZigFn *fn_entry) {
11948 IrInstruction *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_type);13033 IrInstGen *result = ir_const(ira, source_instr, fn_entry->type_entry);
13034 result->value->special = ConstValSpecialStatic;
13035 result->value->data.x_ptr.data.fn.fn_entry = fn_entry;
13036 result->value->data.x_ptr.mut = ConstPtrMutComptimeConst;
13037 result->value->data.x_ptr.special = ConstPtrSpecialFunction;
13038 return result;
13039}
13040
13041static IrInstGen *ir_const_bound_fn(IrAnalyze *ira, IrInst *src_inst, ZigFn *fn_entry, IrInstGen *first_arg) {
13042 IrInstGen *result = ir_const(ira, src_inst, get_bound_fn_type(ira->codegen, fn_entry));
13043 result->value->data.x_bound_fn.fn = fn_entry;
13044 result->value->data.x_bound_fn.first_arg = first_arg;
13045 return result;
13046}
13047
13048static IrInstGen *ir_const_type(IrAnalyze *ira, IrInst *source_instruction, ZigType *ty) {
13049 IrInstGen *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_type);
11949 result->value->data.x_type = ty;13050 result->value->data.x_type = ty;
11950 return result;13051 return result;
11951}13052}
1195213053
11953static IrInstruction *ir_const_bool(IrAnalyze *ira, IrInstruction *source_instruction, bool value) {13054static IrInstGen *ir_const_bool(IrAnalyze *ira, IrInst *source_instruction, bool value) {
11954 IrInstruction *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_bool);13055 IrInstGen *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_bool);
11955 result->value->data.x_bool = value;13056 result->value->data.x_bool = value;
11956 return result;13057 return result;
11957}13058}
1195813059
11959static IrInstruction *ir_const_undef(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *ty) {13060static IrInstGen *ir_const_undef(IrAnalyze *ira, IrInst *source_instruction, ZigType *ty) {
11960 IrInstruction *result = ir_const(ira, source_instruction, ty);13061 IrInstGen *result = ir_const(ira, source_instruction, ty);
11961 result->value->special = ConstValSpecialUndef;13062 result->value->special = ConstValSpecialUndef;
11962 return result;13063 return result;
11963}13064}
1196413065
11965static IrInstruction *ir_const_unreachable(IrAnalyze *ira, IrInstruction *source_instruction) {13066static IrInstGen *ir_const_unreachable(IrAnalyze *ira, IrInst *source_instruction) {
11966 IrInstruction *result = ir_const_noval(ira, source_instruction);13067 IrInstGen *result = ir_const_noval(ira, source_instruction);
11967 result->value = ira->codegen->intern.for_unreachable();13068 result->value = ira->codegen->intern.for_unreachable();
11968 return result;13069 return result;
11969}13070}
1197013071
11971static IrInstruction *ir_const_void(IrAnalyze *ira, IrInstruction *source_instruction) {13072static IrInstGen *ir_const_void(IrAnalyze *ira, IrInst *source_instruction) {
11972 IrInstruction *result = ir_const_noval(ira, source_instruction);13073 IrInstGen *result = ir_const_noval(ira, source_instruction);
11973 result->value = ira->codegen->intern.for_void();13074 result->value = ira->codegen->intern.for_void();
11974 return result;13075 return result;
11975}13076}
1197613077
11977static IrInstruction *ir_const_unsigned(IrAnalyze *ira, IrInstruction *source_instruction, uint64_t value) {13078static IrInstGen *ir_const_unsigned(IrAnalyze *ira, IrInst *source_instruction, uint64_t value) {
11978 IrInstruction *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_num_lit_int);13079 IrInstGen *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_num_lit_int);
11979 bigint_init_unsigned(&result->value->data.x_bigint, value);13080 bigint_init_unsigned(&result->value->data.x_bigint, value);
11980 return result;13081 return result;
11981}13082}
1198213083
11983static IrInstruction *ir_get_const_ptr(IrAnalyze *ira, IrInstruction *instruction,13084static IrInstGen *ir_get_const_ptr(IrAnalyze *ira, IrInst *instruction,
11984 ZigValue *pointee, ZigType *pointee_type,13085 ZigValue *pointee, ZigType *pointee_type,
11985 ConstPtrMut ptr_mut, bool ptr_is_const, bool ptr_is_volatile, uint32_t ptr_align)13086 ConstPtrMut ptr_mut, bool ptr_is_const, bool ptr_is_volatile, uint32_t ptr_align)
11986{13087{
11987 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, pointee_type,13088 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, pointee_type,
11988 ptr_is_const, ptr_is_volatile, PtrLenSingle, ptr_align, 0, 0, false);13089 ptr_is_const, ptr_is_volatile, PtrLenSingle, ptr_align, 0, 0, false);
11989 IrInstruction *const_instr = ir_const(ira, instruction, ptr_type);13090 IrInstGen *const_instr = ir_const(ira, instruction, ptr_type);
11990 ZigValue *const_val = const_instr->value;13091 ZigValue *const_val = const_instr->value;
11991 const_val->data.x_ptr.special = ConstPtrSpecialRef;13092 const_val->data.x_ptr.special = ConstPtrSpecialRef;
11992 const_val->data.x_ptr.mut = ptr_mut;13093 const_val->data.x_ptr.mut = ptr_mut;
...@@ -11994,7 +13095,7 @@ static IrInstruction *ir_get_const_ptr(IrAnalyze *ira, IrInstruction *instructio...@@ -11994,7 +13095,7 @@ static IrInstruction *ir_get_const_ptr(IrAnalyze *ira, IrInstruction *instructio
11994 return const_instr;13095 return const_instr;
11995}13096}
1199613097
11997static Error ir_resolve_const_val(CodeGen *codegen, IrExecutable *exec, AstNode *source_node,13098static Error ir_resolve_const_val(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node,
11998 ZigValue *val, UndefAllowed undef_allowed)13099 ZigValue *val, UndefAllowed undef_allowed)
11999{13100{
12000 Error err;13101 Error err;
...@@ -12006,14 +13107,14 @@ static Error ir_resolve_const_val(CodeGen *codegen, IrExecutable *exec, AstNode...@@ -12006,14 +13107,14 @@ static Error ir_resolve_const_val(CodeGen *codegen, IrExecutable *exec, AstNode
12006 if (!type_has_bits(val->type))13107 if (!type_has_bits(val->type))
12007 return ErrorNone;13108 return ErrorNone;
1200813109
12009 exec_add_error_node(codegen, exec, source_node,13110 exec_add_error_node_gen(codegen, exec, source_node,
12010 buf_sprintf("unable to evaluate constant expression"));13111 buf_sprintf("unable to evaluate constant expression"));
12011 return ErrorSemanticAnalyzeFail;13112 return ErrorSemanticAnalyzeFail;
12012 case ConstValSpecialUndef:13113 case ConstValSpecialUndef:
12013 if (undef_allowed == UndefOk || undef_allowed == LazyOk)13114 if (undef_allowed == UndefOk || undef_allowed == LazyOk)
12014 return ErrorNone;13115 return ErrorNone;
1201513116
12016 exec_add_error_node(codegen, exec, source_node,13117 exec_add_error_node_gen(codegen, exec, source_node,
12017 buf_sprintf("use of undefined value here causes undefined behavior"));13118 buf_sprintf("use of undefined value here causes undefined behavior"));
12018 return ErrorSemanticAnalyzeFail;13119 return ErrorSemanticAnalyzeFail;
12019 case ConstValSpecialLazy:13120 case ConstValSpecialLazy:
...@@ -12028,9 +13129,9 @@ static Error ir_resolve_const_val(CodeGen *codegen, IrExecutable *exec, AstNode...@@ -12028,9 +13129,9 @@ static Error ir_resolve_const_val(CodeGen *codegen, IrExecutable *exec, AstNode
12028 }13129 }
12029}13130}
1203013131
12031static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstruction *value, UndefAllowed undef_allowed) {13132static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstGen *value, UndefAllowed undef_allowed) {
12032 Error err;13133 Error err;
12033 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, value->source_node,13134 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, value->base.source_node,
12034 value->value, undef_allowed)))13135 value->value, undef_allowed)))
12035 {13136 {
12036 return nullptr;13137 return nullptr;
...@@ -12041,7 +13142,7 @@ static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstruction *value, UndefAll...@@ -12041,7 +13142,7 @@ static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstruction *value, UndefAll
12041Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,13142Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
12042 ZigValue *return_ptr, size_t *backward_branch_count, size_t *backward_branch_quota,13143 ZigValue *return_ptr, size_t *backward_branch_count, size_t *backward_branch_quota,
12043 ZigFn *fn_entry, Buf *c_import_buf, AstNode *source_node, Buf *exec_name,13144 ZigFn *fn_entry, Buf *c_import_buf, AstNode *source_node, Buf *exec_name,
12044 IrExecutable *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef_allowed)13145 IrExecutableGen *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef_allowed)
12045{13146{
12046 Error err;13147 Error err;
1204713148
...@@ -12050,7 +13151,7 @@ Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,...@@ -12050,7 +13151,7 @@ Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
12050 if (type_is_invalid(return_ptr->type))13151 if (type_is_invalid(return_ptr->type))
12051 return ErrorSemanticAnalyzeFail;13152 return ErrorSemanticAnalyzeFail;
1205213153
12053 IrExecutable *ir_executable = allocate<IrExecutable>(1, "IrExecutablePass1");13154 IrExecutableSrc *ir_executable = allocate<IrExecutableSrc>(1, "IrExecutableSrc");
12054 ir_executable->source_node = source_node;13155 ir_executable->source_node = source_node;
12055 ir_executable->parent_exec = parent_exec;13156 ir_executable->parent_exec = parent_exec;
12056 ir_executable->name = exec_name;13157 ir_executable->name = exec_name;
...@@ -12071,10 +13172,10 @@ Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,...@@ -12071,10 +13172,10 @@ Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
12071 fprintf(stderr, "\nSource: ");13172 fprintf(stderr, "\nSource: ");
12072 ast_render(stderr, node, 4);13173 ast_render(stderr, node, 4);
12073 fprintf(stderr, "\n{ // (IR)\n");13174 fprintf(stderr, "\n{ // (IR)\n");
12074 ir_print(codegen, stderr, ir_executable, 2, IrPassSrc);13175 ir_print_src(codegen, stderr, ir_executable, 2);
12075 fprintf(stderr, "}\n");13176 fprintf(stderr, "}\n");
12076 }13177 }
12077 IrExecutable *analyzed_executable = allocate<IrExecutable>(1, "IrExecutablePass2");13178 IrExecutableGen *analyzed_executable = allocate<IrExecutableGen>(1, "IrExecutableGen");
12078 analyzed_executable->source_node = source_node;13179 analyzed_executable->source_node = source_node;
12079 analyzed_executable->parent_exec = parent_exec;13180 analyzed_executable->parent_exec = parent_exec;
12080 analyzed_executable->source_exec = ir_executable;13181 analyzed_executable->source_exec = ir_executable;
...@@ -12093,7 +13194,7 @@ Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,...@@ -12093,7 +13194,7 @@ Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
1209313194
12094 if (codegen->verbose_ir) {13195 if (codegen->verbose_ir) {
12095 fprintf(stderr, "{ // (analyzed)\n");13196 fprintf(stderr, "{ // (analyzed)\n");
12096 ir_print(codegen, stderr, analyzed_executable, 2, IrPassGen);13197 ir_print_gen(codegen, stderr, analyzed_executable, 2);
12097 fprintf(stderr, "}\n");13198 fprintf(stderr, "}\n");
12098 }13199 }
1209913200
...@@ -12109,12 +13210,12 @@ Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,...@@ -12109,12 +13210,12 @@ Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
12109 return ErrorNone;13210 return ErrorNone;
12110}13211}
1211113212
12112static ErrorTableEntry *ir_resolve_error(IrAnalyze *ira, IrInstruction *err_value) {13213static ErrorTableEntry *ir_resolve_error(IrAnalyze *ira, IrInstGen *err_value) {
12113 if (type_is_invalid(err_value->value->type))13214 if (type_is_invalid(err_value->value->type))
12114 return nullptr;13215 return nullptr;
1211513216
12116 if (err_value->value->type->id != ZigTypeIdErrorSet) {13217 if (err_value->value->type->id != ZigTypeIdErrorSet) {
12117 ir_add_error(ira, err_value,13218 ir_add_error_node(ira, err_value->base.source_node,
12118 buf_sprintf("expected error, found '%s'", buf_ptr(&err_value->value->type->name)));13219 buf_sprintf("expected error, found '%s'", buf_ptr(&err_value->value->type->name)));
12119 return nullptr;13220 return nullptr;
12120 }13221 }
...@@ -12127,7 +13228,7 @@ static ErrorTableEntry *ir_resolve_error(IrAnalyze *ira, IrInstruction *err_valu...@@ -12127,7 +13228,7 @@ static ErrorTableEntry *ir_resolve_error(IrAnalyze *ira, IrInstruction *err_valu
12127 return const_val->data.x_err_set;13228 return const_val->data.x_err_set;
12128}13229}
1212913230
12130static ZigType *ir_resolve_const_type(CodeGen *codegen, IrExecutable *exec, AstNode *source_node,13231static ZigType *ir_resolve_const_type(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node,
12131 ZigValue *val)13232 ZigValue *val)
12132{13233{
12133 Error err;13234 Error err;
...@@ -12138,18 +13239,18 @@ static ZigType *ir_resolve_const_type(CodeGen *codegen, IrExecutable *exec, AstN...@@ -12138,18 +13239,18 @@ static ZigType *ir_resolve_const_type(CodeGen *codegen, IrExecutable *exec, AstN
12138 return val->data.x_type;13239 return val->data.x_type;
12139}13240}
1214013241
12141static ZigValue *ir_resolve_type_lazy(IrAnalyze *ira, IrInstruction *type_value) {13242static ZigValue *ir_resolve_type_lazy(IrAnalyze *ira, IrInstGen *type_value) {
12142 if (type_is_invalid(type_value->value->type))13243 if (type_is_invalid(type_value->value->type))
12143 return nullptr;13244 return nullptr;
1214413245
12145 if (type_value->value->type->id != ZigTypeIdMetaType) {13246 if (type_value->value->type->id != ZigTypeIdMetaType) {
12146 ir_add_error(ira, type_value,13247 ir_add_error_node(ira, type_value->base.source_node,
12147 buf_sprintf("expected type 'type', found '%s'", buf_ptr(&type_value->value->type->name)));13248 buf_sprintf("expected type 'type', found '%s'", buf_ptr(&type_value->value->type->name)));
12148 return nullptr;13249 return nullptr;
12149 }13250 }
1215013251
12151 Error err;13252 Error err;
12152 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, type_value->source_node,13253 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, type_value->base.source_node,
12153 type_value->value, LazyOk)))13254 type_value->value, LazyOk)))
12154 {13255 {
12155 return nullptr;13256 return nullptr;
...@@ -12158,17 +13259,17 @@ static ZigValue *ir_resolve_type_lazy(IrAnalyze *ira, IrInstruction *type_value)...@@ -12158,17 +13259,17 @@ static ZigValue *ir_resolve_type_lazy(IrAnalyze *ira, IrInstruction *type_value)
12158 return type_value->value;13259 return type_value->value;
12159}13260}
1216013261
12161static ZigType *ir_resolve_type(IrAnalyze *ira, IrInstruction *type_value) {13262static ZigType *ir_resolve_type(IrAnalyze *ira, IrInstGen *type_value) {
12162 ZigValue *val = ir_resolve_type_lazy(ira, type_value);13263 ZigValue *val = ir_resolve_type_lazy(ira, type_value);
12163 if (val == nullptr)13264 if (val == nullptr)
12164 return ira->codegen->builtin_types.entry_invalid;13265 return ira->codegen->builtin_types.entry_invalid;
1216513266
12166 return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, type_value->source_node, val);13267 return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, type_value->base.source_node, val);
12167}13268}
1216813269
12169static Error ir_validate_vector_elem_type(IrAnalyze *ira, IrInstruction *source_instr, ZigType *elem_type) {13270static Error ir_validate_vector_elem_type(IrAnalyze *ira, AstNode *source_node, ZigType *elem_type) {
12170 if (!is_valid_vector_elem_type(elem_type)) {13271 if (!is_valid_vector_elem_type(elem_type)) {
12171 ir_add_error(ira, source_instr,13272 ir_add_error_node(ira, source_node,
12172 buf_sprintf("vector element type must be integer, float, bool, or pointer; '%s' is invalid",13273 buf_sprintf("vector element type must be integer, float, bool, or pointer; '%s' is invalid",
12173 buf_ptr(&elem_type->name)));13274 buf_ptr(&elem_type->name)));
12174 return ErrorSemanticAnalyzeFail;13275 return ErrorSemanticAnalyzeFail;
...@@ -12176,28 +13277,28 @@ static Error ir_validate_vector_elem_type(IrAnalyze *ira, IrInstruction *source_...@@ -12176,28 +13277,28 @@ static Error ir_validate_vector_elem_type(IrAnalyze *ira, IrInstruction *source_
12176 return ErrorNone;13277 return ErrorNone;
12177}13278}
1217813279
12179static ZigType *ir_resolve_vector_elem_type(IrAnalyze *ira, IrInstruction *elem_type_value) {13280static ZigType *ir_resolve_vector_elem_type(IrAnalyze *ira, IrInstGen *elem_type_value) {
12180 Error err;13281 Error err;
12181 ZigType *elem_type = ir_resolve_type(ira, elem_type_value);13282 ZigType *elem_type = ir_resolve_type(ira, elem_type_value);
12182 if (type_is_invalid(elem_type))13283 if (type_is_invalid(elem_type))
12183 return ira->codegen->builtin_types.entry_invalid;13284 return ira->codegen->builtin_types.entry_invalid;
12184 if ((err = ir_validate_vector_elem_type(ira, elem_type_value, elem_type)))13285 if ((err = ir_validate_vector_elem_type(ira, elem_type_value->base.source_node, elem_type)))
12185 return ira->codegen->builtin_types.entry_invalid;13286 return ira->codegen->builtin_types.entry_invalid;
12186 return elem_type;13287 return elem_type;
12187}13288}
1218813289
12189static ZigType *ir_resolve_int_type(IrAnalyze *ira, IrInstruction *type_value) {13290static ZigType *ir_resolve_int_type(IrAnalyze *ira, IrInstGen *type_value) {
12190 ZigType *ty = ir_resolve_type(ira, type_value);13291 ZigType *ty = ir_resolve_type(ira, type_value);
12191 if (type_is_invalid(ty))13292 if (type_is_invalid(ty))
12192 return ira->codegen->builtin_types.entry_invalid;13293 return ira->codegen->builtin_types.entry_invalid;
1219313294
12194 if (ty->id != ZigTypeIdInt) {13295 if (ty->id != ZigTypeIdInt) {
12195 ErrorMsg *msg = ir_add_error(ira, type_value,13296 ErrorMsg *msg = ir_add_error_node(ira, type_value->base.source_node,
12196 buf_sprintf("expected integer type, found '%s'", buf_ptr(&ty->name)));13297 buf_sprintf("expected integer type, found '%s'", buf_ptr(&ty->name)));
12197 if (ty->id == ZigTypeIdVector &&13298 if (ty->id == ZigTypeIdVector &&
12198 ty->data.vector.elem_type->id == ZigTypeIdInt)13299 ty->data.vector.elem_type->id == ZigTypeIdInt)
12199 {13300 {
12200 add_error_note(ira->codegen, msg, type_value->source_node,13301 add_error_note(ira->codegen, msg, type_value->base.source_node,
12201 buf_sprintf("represent vectors with their element types, i.e. '%s'",13302 buf_sprintf("represent vectors with their element types, i.e. '%s'",
12202 buf_ptr(&ty->data.vector.elem_type->name)));13303 buf_ptr(&ty->data.vector.elem_type->name)));
12203 }13304 }
...@@ -12207,12 +13308,12 @@ static ZigType *ir_resolve_int_type(IrAnalyze *ira, IrInstruction *type_value) {...@@ -12207,12 +13308,12 @@ static ZigType *ir_resolve_int_type(IrAnalyze *ira, IrInstruction *type_value) {
12207 return ty;13308 return ty;
12208}13309}
1220913310
12210static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInstruction *op_source, IrInstruction *type_value) {13311static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInst *op_source, IrInstGen *type_value) {
12211 if (type_is_invalid(type_value->value->type))13312 if (type_is_invalid(type_value->value->type))
12212 return ira->codegen->builtin_types.entry_invalid;13313 return ira->codegen->builtin_types.entry_invalid;
1221313314
12214 if (type_value->value->type->id != ZigTypeIdMetaType) {13315 if (type_value->value->type->id != ZigTypeIdMetaType) {
12215 ErrorMsg *msg = ir_add_error(ira, type_value,13316 ErrorMsg *msg = ir_add_error_node(ira, type_value->base.source_node,
12216 buf_sprintf("expected error set type, found '%s'", buf_ptr(&type_value->value->type->name)));13317 buf_sprintf("expected error set type, found '%s'", buf_ptr(&type_value->value->type->name)));
12217 add_error_note(ira->codegen, msg, op_source->source_node,13318 add_error_note(ira->codegen, msg, op_source->source_node,
12218 buf_sprintf("`||` merges error sets; `or` performs boolean OR"));13319 buf_sprintf("`||` merges error sets; `or` performs boolean OR"));
...@@ -12226,7 +13327,7 @@ static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInstruction *op_sour...@@ -12226,7 +13327,7 @@ static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInstruction *op_sour
12226 assert(const_val->data.x_type != nullptr);13327 assert(const_val->data.x_type != nullptr);
12227 ZigType *result_type = const_val->data.x_type;13328 ZigType *result_type = const_val->data.x_type;
12228 if (result_type->id != ZigTypeIdErrorSet) {13329 if (result_type->id != ZigTypeIdErrorSet) {
12229 ErrorMsg *msg = ir_add_error(ira, type_value,13330 ErrorMsg *msg = ir_add_error_node(ira, type_value->base.source_node,
12230 buf_sprintf("expected error set type, found type '%s'", buf_ptr(&result_type->name)));13331 buf_sprintf("expected error set type, found type '%s'", buf_ptr(&result_type->name)));
12231 add_error_note(ira->codegen, msg, op_source->source_node,13332 add_error_note(ira->codegen, msg, op_source->source_node,
12232 buf_sprintf("`||` merges error sets; `or` performs boolean OR"));13333 buf_sprintf("`||` merges error sets; `or` performs boolean OR"));
...@@ -12235,15 +13336,12 @@ static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInstruction *op_sour...@@ -12235,15 +13336,12 @@ static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInstruction *op_sour
12235 return result_type;13336 return result_type;
12236}13337}
1223713338
12238static ZigFn *ir_resolve_fn(IrAnalyze *ira, IrInstruction *fn_value) {13339static ZigFn *ir_resolve_fn(IrAnalyze *ira, IrInstGen *fn_value) {
12239 if (fn_value == ira->codegen->invalid_instruction)
12240 return nullptr;
12241
12242 if (type_is_invalid(fn_value->value->type))13340 if (type_is_invalid(fn_value->value->type))
12243 return nullptr;13341 return nullptr;
1224413342
12245 if (fn_value->value->type->id != ZigTypeIdFn) {13343 if (fn_value->value->type->id != ZigTypeIdFn) {
12246 ir_add_error_node(ira, fn_value->source_node,13344 ir_add_error_node(ira, fn_value->base.source_node,
12247 buf_sprintf("expected function type, found '%s'", buf_ptr(&fn_value->value->type->name)));13345 buf_sprintf("expected function type, found '%s'", buf_ptr(&fn_value->value->type->name)));
12248 return nullptr;13346 return nullptr;
12249 }13347 }
...@@ -12259,22 +13357,22 @@ static ZigFn *ir_resolve_fn(IrAnalyze *ira, IrInstruction *fn_value) {...@@ -12259,22 +13357,22 @@ static ZigFn *ir_resolve_fn(IrAnalyze *ira, IrInstruction *fn_value) {
12259 return const_val->data.x_ptr.data.fn.fn_entry;13357 return const_val->data.x_ptr.data.fn.fn_entry;
12260}13358}
1226113359
12262static IrInstruction *ir_analyze_optional_wrap(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,13360static IrInstGen *ir_analyze_optional_wrap(IrAnalyze *ira, IrInst* source_instr,
12263 ZigType *wanted_type, ResultLoc *result_loc)13361 IrInstGen *value, ZigType *wanted_type, ResultLoc *result_loc)
12264{13362{
12265 assert(wanted_type->id == ZigTypeIdOptional);13363 assert(wanted_type->id == ZigTypeIdOptional);
1226613364
12267 if (instr_is_comptime(value)) {13365 if (instr_is_comptime(value)) {
12268 ZigType *payload_type = wanted_type->data.maybe.child_type;13366 ZigType *payload_type = wanted_type->data.maybe.child_type;
12269 IrInstruction *casted_payload = ir_implicit_cast(ira, value, payload_type);13367 IrInstGen *casted_payload = ir_implicit_cast(ira, value, payload_type);
12270 if (type_is_invalid(casted_payload->value->type))13368 if (type_is_invalid(casted_payload->value->type))
12271 return ira->codegen->invalid_instruction;13369 return ira->codegen->invalid_inst_gen;
1227213370
12273 ZigValue *val = ir_resolve_const(ira, casted_payload, UndefOk);13371 ZigValue *val = ir_resolve_const(ira, casted_payload, UndefOk);
12274 if (!val)13372 if (!val)
12275 return ira->codegen->invalid_instruction;13373 return ira->codegen->invalid_inst_gen;
1227613374
12277 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,13375 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
12278 source_instr->scope, source_instr->source_node);13376 source_instr->scope, source_instr->source_node);
12279 const_instruction->base.value->special = ConstValSpecialStatic;13377 const_instruction->base.value->special = ConstValSpecialStatic;
12280 if (types_have_same_zig_comptime_repr(ira->codegen, wanted_type, payload_type)) {13378 if (types_have_same_zig_comptime_repr(ira->codegen, wanted_type, payload_type)) {
...@@ -12289,40 +13387,42 @@ static IrInstruction *ir_analyze_optional_wrap(IrAnalyze *ira, IrInstruction *so...@@ -12289,40 +13387,42 @@ static IrInstruction *ir_analyze_optional_wrap(IrAnalyze *ira, IrInstruction *so
12289 if (result_loc == nullptr && handle_is_ptr(wanted_type)) {13387 if (result_loc == nullptr && handle_is_ptr(wanted_type)) {
12290 result_loc = no_result_loc();13388 result_loc = no_result_loc();
12291 }13389 }
12292 IrInstruction *result_loc_inst = nullptr;13390 IrInstGen *result_loc_inst = nullptr;
12293 if (result_loc != nullptr) {13391 if (result_loc != nullptr) {
12294 result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, true);13392 result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, true);
12295 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {13393 if (type_is_invalid(result_loc_inst->value->type) ||
13394 result_loc_inst->value->type->id == ZigTypeIdUnreachable)
13395 {
12296 return result_loc_inst;13396 return result_loc_inst;
12297 }13397 }
12298 }13398 }
12299 IrInstruction *result = ir_build_optional_wrap(ira, source_instr, wanted_type, value, result_loc_inst);13399 IrInstGen *result = ir_build_optional_wrap(ira, source_instr, wanted_type, value, result_loc_inst);
12300 result->value->data.rh_maybe = RuntimeHintOptionalNonNull;13400 result->value->data.rh_maybe = RuntimeHintOptionalNonNull;
12301 return result;13401 return result;
12302}13402}
1230313403
12304static IrInstruction *ir_analyze_err_wrap_payload(IrAnalyze *ira, IrInstruction *source_instr,13404static IrInstGen *ir_analyze_err_wrap_payload(IrAnalyze *ira, IrInst* source_instr,
12305 IrInstruction *value, ZigType *wanted_type, ResultLoc *result_loc)13405 IrInstGen *value, ZigType *wanted_type, ResultLoc *result_loc)
12306{13406{
12307 assert(wanted_type->id == ZigTypeIdErrorUnion);13407 assert(wanted_type->id == ZigTypeIdErrorUnion);
1230813408
12309 ZigType *payload_type = wanted_type->data.error_union.payload_type;13409 ZigType *payload_type = wanted_type->data.error_union.payload_type;
12310 ZigType *err_set_type = wanted_type->data.error_union.err_set_type;13410 ZigType *err_set_type = wanted_type->data.error_union.err_set_type;
12311 if (instr_is_comptime(value)) {13411 if (instr_is_comptime(value)) {
12312 IrInstruction *casted_payload = ir_implicit_cast(ira, value, payload_type);13412 IrInstGen *casted_payload = ir_implicit_cast(ira, value, payload_type);
12313 if (type_is_invalid(casted_payload->value->type))13413 if (type_is_invalid(casted_payload->value->type))
12314 return ira->codegen->invalid_instruction;13414 return ira->codegen->invalid_inst_gen;
1231513415
12316 ZigValue *val = ir_resolve_const(ira, casted_payload, UndefOk);13416 ZigValue *val = ir_resolve_const(ira, casted_payload, UndefOk);
12317 if (val == nullptr)13417 if (val == nullptr)
12318 return ira->codegen->invalid_instruction;13418 return ira->codegen->invalid_inst_gen;
1231913419
12320 ZigValue *err_set_val = create_const_vals(1);13420 ZigValue *err_set_val = create_const_vals(1);
12321 err_set_val->type = err_set_type;13421 err_set_val->type = err_set_type;
12322 err_set_val->special = ConstValSpecialStatic;13422 err_set_val->special = ConstValSpecialStatic;
12323 err_set_val->data.x_err_set = nullptr;13423 err_set_val->data.x_err_set = nullptr;
1232413424
12325 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,13425 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
12326 source_instr->scope, source_instr->source_node);13426 source_instr->scope, source_instr->source_node);
12327 const_instruction->base.value->type = wanted_type;13427 const_instruction->base.value->type = wanted_type;
12328 const_instruction->base.value->special = ConstValSpecialStatic;13428 const_instruction->base.value->special = ConstValSpecialStatic;
...@@ -12331,23 +13431,24 @@ static IrInstruction *ir_analyze_err_wrap_payload(IrAnalyze *ira, IrInstruction...@@ -12331,23 +13431,24 @@ static IrInstruction *ir_analyze_err_wrap_payload(IrAnalyze *ira, IrInstruction
12331 return &const_instruction->base;13431 return &const_instruction->base;
12332 }13432 }
1233313433
12334 IrInstruction *result_loc_inst;13434 IrInstGen *result_loc_inst;
12335 if (handle_is_ptr(wanted_type)) {13435 if (handle_is_ptr(wanted_type)) {
12336 if (result_loc == nullptr) result_loc = no_result_loc();13436 if (result_loc == nullptr) result_loc = no_result_loc();
12337 result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, true);13437 result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, true);
12338 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {13438 if (type_is_invalid(result_loc_inst->value->type) ||
13439 result_loc_inst->value->type->id == ZigTypeIdUnreachable) {
12339 return result_loc_inst;13440 return result_loc_inst;
12340 }13441 }
12341 } else {13442 } else {
12342 result_loc_inst = nullptr;13443 result_loc_inst = nullptr;
12343 }13444 }
1234413445
12345 IrInstruction *result = ir_build_err_wrap_payload(ira, source_instr, wanted_type, value, result_loc_inst);13446 IrInstGen *result = ir_build_err_wrap_payload(ira, source_instr, wanted_type, value, result_loc_inst);
12346 result->value->data.rh_error_union = RuntimeHintErrorUnionNonError;13447 result->value->data.rh_error_union = RuntimeHintErrorUnionNonError;
12347 return result;13448 return result;
12348}13449}
1234913450
12350static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,13451static IrInstGen *ir_analyze_err_set_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
12351 ZigType *wanted_type)13452 ZigType *wanted_type)
12352{13453{
12353 assert(value->value->type->id == ZigTypeIdErrorSet);13454 assert(value->value->type->id == ZigTypeIdErrorSet);
...@@ -12356,10 +13457,10 @@ static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *sou...@@ -12356,10 +13457,10 @@ static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *sou
12356 if (instr_is_comptime(value)) {13457 if (instr_is_comptime(value)) {
12357 ZigValue *val = ir_resolve_const(ira, value, UndefBad);13458 ZigValue *val = ir_resolve_const(ira, value, UndefBad);
12358 if (!val)13459 if (!val)
12359 return ira->codegen->invalid_instruction;13460 return ira->codegen->invalid_inst_gen;
1236013461
12361 if (!resolve_inferred_error_set(ira->codegen, wanted_type, source_instr->source_node)) {13462 if (!resolve_inferred_error_set(ira->codegen, wanted_type, source_instr->source_node)) {
12362 return ira->codegen->invalid_instruction;13463 return ira->codegen->invalid_inst_gen;
12363 }13464 }
12364 if (!type_is_global_error_set(wanted_type)) {13465 if (!type_is_global_error_set(wanted_type)) {
12365 bool subset = false;13466 bool subset = false;
...@@ -12373,11 +13474,11 @@ static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *sou...@@ -12373,11 +13474,11 @@ static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *sou
12373 ir_add_error(ira, source_instr,13474 ir_add_error(ira, source_instr,
12374 buf_sprintf("error.%s not a member of error set '%s'",13475 buf_sprintf("error.%s not a member of error set '%s'",
12375 buf_ptr(&val->data.x_err_set->name), buf_ptr(&wanted_type->name)));13476 buf_ptr(&val->data.x_err_set->name), buf_ptr(&wanted_type->name)));
12376 return ira->codegen->invalid_instruction;13477 return ira->codegen->invalid_inst_gen;
12377 }13478 }
12378 }13479 }
1237913480
12380 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,13481 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
12381 source_instr->scope, source_instr->source_node);13482 source_instr->scope, source_instr->source_node);
12382 const_instruction->base.value->type = wanted_type;13483 const_instruction->base.value->type = wanted_type;
12383 const_instruction->base.value->special = ConstValSpecialStatic;13484 const_instruction->base.value->special = ConstValSpecialStatic;
...@@ -12385,18 +13486,16 @@ static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *sou...@@ -12385,18 +13486,16 @@ static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *sou
12385 return &const_instruction->base;13486 return &const_instruction->base;
12386 }13487 }
1238713488
12388 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node, wanted_type, value, CastOpErrSet);13489 return ir_build_cast(ira, source_instr, wanted_type, value, CastOpErrSet);
12389 result->value->type = wanted_type;
12390 return result;
12391}13490}
1239213491
12393static IrInstruction *ir_analyze_frame_ptr_to_anyframe(IrAnalyze *ira, IrInstruction *source_instr,13492static IrInstGen *ir_analyze_frame_ptr_to_anyframe(IrAnalyze *ira, IrInst* source_instr,
12394 IrInstruction *frame_ptr, ZigType *wanted_type)13493 IrInstGen *frame_ptr, ZigType *wanted_type)
12395{13494{
12396 if (instr_is_comptime(frame_ptr)) {13495 if (instr_is_comptime(frame_ptr)) {
12397 ZigValue *ptr_val = ir_resolve_const(ira, frame_ptr, UndefBad);13496 ZigValue *ptr_val = ir_resolve_const(ira, frame_ptr, UndefBad);
12398 if (ptr_val == nullptr)13497 if (ptr_val == nullptr)
12399 return ira->codegen->invalid_instruction;13498 return ira->codegen->invalid_inst_gen;
1240013499
12401 ir_assert(ptr_val->type->id == ZigTypeIdPointer, source_instr);13500 ir_assert(ptr_val->type->id == ZigTypeIdPointer, source_instr);
12402 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {13501 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
...@@ -12404,44 +13503,38 @@ static IrInstruction *ir_analyze_frame_ptr_to_anyframe(IrAnalyze *ira, IrInstruc...@@ -12404,44 +13503,38 @@ static IrInstruction *ir_analyze_frame_ptr_to_anyframe(IrAnalyze *ira, IrInstruc
12404 }13503 }
12405 }13504 }
1240613505
12407 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node,13506 return ir_build_cast(ira, source_instr, wanted_type, frame_ptr, CastOpBitCast);
12408 wanted_type, frame_ptr, CastOpBitCast);
12409 result->value->type = wanted_type;
12410 return result;
12411}13507}
1241213508
12413static IrInstruction *ir_analyze_anyframe_to_anyframe(IrAnalyze *ira, IrInstruction *source_instr,13509static IrInstGen *ir_analyze_anyframe_to_anyframe(IrAnalyze *ira, IrInst* source_instr,
12414 IrInstruction *value, ZigType *wanted_type)13510 IrInstGen *value, ZigType *wanted_type)
12415{13511{
12416 if (instr_is_comptime(value)) {13512 if (instr_is_comptime(value)) {
12417 zig_panic("TODO comptime anyframe->T to anyframe");13513 zig_panic("TODO comptime anyframe->T to anyframe");
12418 }13514 }
1241913515
12420 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node,13516 return ir_build_cast(ira, source_instr, wanted_type, value, CastOpBitCast);
12421 wanted_type, value, CastOpBitCast);
12422 result->value->type = wanted_type;
12423 return result;
12424}13517}
1242513518
1242613519
12427static IrInstruction *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,13520static IrInstGen *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
12428 ZigType *wanted_type, ResultLoc *result_loc)13521 ZigType *wanted_type, ResultLoc *result_loc)
12429{13522{
12430 assert(wanted_type->id == ZigTypeIdErrorUnion);13523 assert(wanted_type->id == ZigTypeIdErrorUnion);
1243113524
12432 IrInstruction *casted_value = ir_implicit_cast(ira, value, wanted_type->data.error_union.err_set_type);13525 IrInstGen *casted_value = ir_implicit_cast(ira, value, wanted_type->data.error_union.err_set_type);
1243313526
12434 if (instr_is_comptime(casted_value)) {13527 if (instr_is_comptime(casted_value)) {
12435 ZigValue *val = ir_resolve_const(ira, casted_value, UndefBad);13528 ZigValue *val = ir_resolve_const(ira, casted_value, UndefBad);
12436 if (!val)13529 if (!val)
12437 return ira->codegen->invalid_instruction;13530 return ira->codegen->invalid_inst_gen;
1243813531
12439 ZigValue *err_set_val = create_const_vals(1);13532 ZigValue *err_set_val = create_const_vals(1);
12440 err_set_val->special = ConstValSpecialStatic;13533 err_set_val->special = ConstValSpecialStatic;
12441 err_set_val->type = wanted_type->data.error_union.err_set_type;13534 err_set_val->type = wanted_type->data.error_union.err_set_type;
12442 err_set_val->data.x_err_set = val->data.x_err_set;13535 err_set_val->data.x_err_set = val->data.x_err_set;
1244313536
12444 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,13537 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
12445 source_instr->scope, source_instr->source_node);13538 source_instr->scope, source_instr->source_node);
12446 const_instruction->base.value->type = wanted_type;13539 const_instruction->base.value->type = wanted_type;
12447 const_instruction->base.value->special = ConstValSpecialStatic;13540 const_instruction->base.value->special = ConstValSpecialStatic;
...@@ -12450,11 +13543,13 @@ static IrInstruction *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInstruction *so...@@ -12450,11 +13543,13 @@ static IrInstruction *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInstruction *so
12450 return &const_instruction->base;13543 return &const_instruction->base;
12451 }13544 }
1245213545
12453 IrInstruction *result_loc_inst;13546 IrInstGen *result_loc_inst;
12454 if (handle_is_ptr(wanted_type)) {13547 if (handle_is_ptr(wanted_type)) {
12455 if (result_loc == nullptr) result_loc = no_result_loc();13548 if (result_loc == nullptr) result_loc = no_result_loc();
12456 result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, true);13549 result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, true);
12457 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {13550 if (type_is_invalid(result_loc_inst->value->type) ||
13551 result_loc_inst->value->type->id == ZigTypeIdUnreachable)
13552 {
12458 return result_loc_inst;13553 return result_loc_inst;
12459 }13554 }
12460 } else {13555 } else {
...@@ -12462,19 +13557,19 @@ static IrInstruction *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInstruction *so...@@ -12462,19 +13557,19 @@ static IrInstruction *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInstruction *so
12462 }13557 }
1246313558
1246413559
12465 IrInstruction *result = ir_build_err_wrap_code(ira, source_instr, wanted_type, value, result_loc_inst);13560 IrInstGen *result = ir_build_err_wrap_code(ira, source_instr, wanted_type, value, result_loc_inst);
12466 result->value->data.rh_error_union = RuntimeHintErrorUnionError;13561 result->value->data.rh_error_union = RuntimeHintErrorUnionError;
12467 return result;13562 return result;
12468}13563}
1246913564
12470static IrInstruction *ir_analyze_null_to_maybe(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value, ZigType *wanted_type) {13565static IrInstGen *ir_analyze_null_to_maybe(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value, ZigType *wanted_type) {
12471 assert(wanted_type->id == ZigTypeIdOptional);13566 assert(wanted_type->id == ZigTypeIdOptional);
12472 assert(instr_is_comptime(value));13567 assert(instr_is_comptime(value));
1247313568
12474 ZigValue *val = ir_resolve_const(ira, value, UndefBad);13569 ZigValue *val = ir_resolve_const(ira, value, UndefBad);
12475 assert(val != nullptr);13570 assert(val != nullptr);
1247613571
12477 IrInstruction *result = ir_const(ira, source_instr, wanted_type);13572 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
12478 result->value->special = ConstValSpecialStatic;13573 result->value->special = ConstValSpecialStatic;
12479 if (get_codegen_ptr_type(wanted_type) != nullptr) {13574 if (get_codegen_ptr_type(wanted_type) != nullptr) {
12480 result->value->data.x_ptr.special = ConstPtrSpecialNull;13575 result->value->data.x_ptr.special = ConstPtrSpecialNull;
...@@ -12486,8 +13581,8 @@ static IrInstruction *ir_analyze_null_to_maybe(IrAnalyze *ira, IrInstruction *so...@@ -12486,8 +13581,8 @@ static IrInstruction *ir_analyze_null_to_maybe(IrAnalyze *ira, IrInstruction *so
12486 return result;13581 return result;
12487}13582}
1248813583
12489static IrInstruction *ir_analyze_null_to_c_pointer(IrAnalyze *ira, IrInstruction *source_instr,13584static IrInstGen *ir_analyze_null_to_c_pointer(IrAnalyze *ira, IrInst *source_instr,
12490 IrInstruction *value, ZigType *wanted_type)13585 IrInstGen *value, ZigType *wanted_type)
12491{13586{
12492 assert(wanted_type->id == ZigTypeIdPointer);13587 assert(wanted_type->id == ZigTypeIdPointer);
12493 assert(wanted_type->data.pointer.ptr_len == PtrLenC);13588 assert(wanted_type->data.pointer.ptr_len == PtrLenC);
...@@ -12496,24 +13591,24 @@ static IrInstruction *ir_analyze_null_to_c_pointer(IrAnalyze *ira, IrInstruction...@@ -12496,24 +13591,24 @@ static IrInstruction *ir_analyze_null_to_c_pointer(IrAnalyze *ira, IrInstruction
12496 ZigValue *val = ir_resolve_const(ira, value, UndefBad);13591 ZigValue *val = ir_resolve_const(ira, value, UndefBad);
12497 assert(val != nullptr);13592 assert(val != nullptr);
1249813593
12499 IrInstruction *result = ir_const(ira, source_instr, wanted_type);13594 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
12500 result->value->data.x_ptr.special = ConstPtrSpecialNull;13595 result->value->data.x_ptr.special = ConstPtrSpecialNull;
12501 result->value->data.x_ptr.mut = ConstPtrMutComptimeConst;13596 result->value->data.x_ptr.mut = ConstPtrMutComptimeConst;
12502 return result;13597 return result;
12503}13598}
1250413599
12505static IrInstruction *ir_get_ref(IrAnalyze *ira, IrInstruction *source_instruction, IrInstruction *value,13600static IrInstGen *ir_get_ref(IrAnalyze *ira, IrInst* source_instruction, IrInstGen *value,
12506 bool is_const, bool is_volatile)13601 bool is_const, bool is_volatile)
12507{13602{
12508 Error err;13603 Error err;
1250913604
12510 if (type_is_invalid(value->value->type))13605 if (type_is_invalid(value->value->type))
12511 return ira->codegen->invalid_instruction;13606 return ira->codegen->invalid_inst_gen;
1251213607
12513 if (instr_is_comptime(value)) {13608 if (instr_is_comptime(value)) {
12514 ZigValue *val = ir_resolve_const(ira, value, LazyOk);13609 ZigValue *val = ir_resolve_const(ira, value, LazyOk);
12515 if (!val)13610 if (!val)
12516 return ira->codegen->invalid_instruction;13611 return ira->codegen->invalid_inst_gen;
12517 return ir_get_const_ptr(ira, source_instruction, val, value->value->type,13612 return ir_get_const_ptr(ira, source_instruction, val, value->value->type,
12518 ConstPtrMutComptimeConst, is_const, is_volatile, 0);13613 ConstPtrMutComptimeConst, is_const, is_volatile, 0);
12519 }13614 }
...@@ -12522,9 +13617,9 @@ static IrInstruction *ir_get_ref(IrAnalyze *ira, IrInstruction *source_instructi...@@ -12522,9 +13617,9 @@ static IrInstruction *ir_get_ref(IrAnalyze *ira, IrInstruction *source_instructi
12522 is_const, is_volatile, PtrLenSingle, 0, 0, 0, false);13617 is_const, is_volatile, PtrLenSingle, 0, 0, 0, false);
1252313618
12524 if ((err = type_resolve(ira->codegen, ptr_type, ResolveStatusZeroBitsKnown)))13619 if ((err = type_resolve(ira->codegen, ptr_type, ResolveStatusZeroBitsKnown)))
12525 return ira->codegen->invalid_instruction;13620 return ira->codegen->invalid_inst_gen;
1252613621
12527 IrInstruction *result_loc;13622 IrInstGen *result_loc;
12528 if (type_has_bits(ptr_type) && !handle_is_ptr(value->value->type)) {13623 if (type_has_bits(ptr_type) && !handle_is_ptr(value->value->type)) {
12529 result_loc = ir_resolve_result(ira, source_instruction, no_result_loc(), value->value->type,13624 result_loc = ir_resolve_result(ira, source_instruction, no_result_loc(), value->value->type,
12530 nullptr, true, true);13625 nullptr, true, true);
...@@ -12532,12 +13627,12 @@ static IrInstruction *ir_get_ref(IrAnalyze *ira, IrInstruction *source_instructi...@@ -12532,12 +13627,12 @@ static IrInstruction *ir_get_ref(IrAnalyze *ira, IrInstruction *source_instructi
12532 result_loc = nullptr;13627 result_loc = nullptr;
12533 }13628 }
1253413629
12535 IrInstruction *new_instruction = ir_build_ref_gen(ira, source_instruction, ptr_type, value, result_loc);13630 IrInstGen *new_instruction = ir_build_ref_gen(ira, source_instruction, ptr_type, value, result_loc);
12536 new_instruction->value->data.rh_ptr = RuntimeHintPtrStack;13631 new_instruction->value->data.rh_ptr = RuntimeHintPtrStack;
12537 return new_instruction;13632 return new_instruction;
12538}13633}
1253913634
12540static ZigType *ir_resolve_union_tag_type(IrAnalyze *ira, IrInstruction *source_instr, ZigType *union_type) {13635static ZigType *ir_resolve_union_tag_type(IrAnalyze *ira, AstNode *source_node, ZigType *union_type) {
12541 assert(union_type->id == ZigTypeIdUnion);13636 assert(union_type->id == ZigTypeIdUnion);
1254213637
12543 Error err;13638 Error err;
...@@ -12549,36 +13644,36 @@ static ZigType *ir_resolve_union_tag_type(IrAnalyze *ira, IrInstruction *source_...@@ -12549,36 +13644,36 @@ static ZigType *ir_resolve_union_tag_type(IrAnalyze *ira, IrInstruction *source_
12549 assert(union_type->data.unionation.tag_type != nullptr);13644 assert(union_type->data.unionation.tag_type != nullptr);
12550 return union_type->data.unionation.tag_type;13645 return union_type->data.unionation.tag_type;
12551 } else {13646 } else {
12552 ErrorMsg *msg = ir_add_error(ira, source_instr, buf_sprintf("union '%s' has no tag",13647 ErrorMsg *msg = ir_add_error_node(ira, source_node, buf_sprintf("union '%s' has no tag",
12553 buf_ptr(&union_type->name)));13648 buf_ptr(&union_type->name)));
12554 add_error_note(ira->codegen, msg, decl_node, buf_sprintf("consider 'union(enum)' here"));13649 add_error_note(ira->codegen, msg, decl_node, buf_sprintf("consider 'union(enum)' here"));
12555 return ira->codegen->builtin_types.entry_invalid;13650 return ira->codegen->builtin_types.entry_invalid;
12556 }13651 }
12557}13652}
1255813653
12559static IrInstruction *ir_analyze_enum_to_int(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target) {13654static IrInstGen *ir_analyze_enum_to_int(IrAnalyze *ira, IrInst *source_instr, IrInstGen *target) {
12560 Error err;13655 Error err;
1256113656
12562 IrInstruction *enum_target;13657 IrInstGen *enum_target;
12563 ZigType *enum_type;13658 ZigType *enum_type;
12564 if (target->value->type->id == ZigTypeIdUnion) {13659 if (target->value->type->id == ZigTypeIdUnion) {
12565 enum_type = ir_resolve_union_tag_type(ira, target, target->value->type);13660 enum_type = ir_resolve_union_tag_type(ira, target->base.source_node, target->value->type);
12566 if (type_is_invalid(enum_type))13661 if (type_is_invalid(enum_type))
12567 return ira->codegen->invalid_instruction;13662 return ira->codegen->invalid_inst_gen;
12568 enum_target = ir_implicit_cast(ira, target, enum_type);13663 enum_target = ir_implicit_cast(ira, target, enum_type);
12569 if (type_is_invalid(enum_target->value->type))13664 if (type_is_invalid(enum_target->value->type))
12570 return ira->codegen->invalid_instruction;13665 return ira->codegen->invalid_inst_gen;
12571 } else if (target->value->type->id == ZigTypeIdEnum) {13666 } else if (target->value->type->id == ZigTypeIdEnum) {
12572 enum_target = target;13667 enum_target = target;
12573 enum_type = target->value->type;13668 enum_type = target->value->type;
12574 } else {13669 } else {
12575 ir_add_error(ira, target,13670 ir_add_error_node(ira, target->base.source_node,
12576 buf_sprintf("expected enum, found type '%s'", buf_ptr(&target->value->type->name)));13671 buf_sprintf("expected enum, found type '%s'", buf_ptr(&target->value->type->name)));
12577 return ira->codegen->invalid_instruction;13672 return ira->codegen->invalid_inst_gen;
12578 }13673 }
1257913674
12580 if ((err = type_resolve(ira->codegen, enum_type, ResolveStatusSizeKnown)))13675 if ((err = type_resolve(ira->codegen, enum_type, ResolveStatusSizeKnown)))
12581 return ira->codegen->invalid_instruction;13676 return ira->codegen->invalid_inst_gen;
1258213677
12583 ZigType *tag_type = enum_type->data.enumeration.tag_int_type;13678 ZigType *tag_type = enum_type->data.enumeration.tag_int_type;
12584 assert(tag_type->id == ZigTypeIdInt || tag_type->id == ZigTypeIdComptimeInt);13679 assert(tag_type->id == ZigTypeIdInt || tag_type->id == ZigTypeIdComptimeInt);
...@@ -12587,7 +13682,7 @@ static IrInstruction *ir_analyze_enum_to_int(IrAnalyze *ira, IrInstruction *sour...@@ -12587,7 +13682,7 @@ static IrInstruction *ir_analyze_enum_to_int(IrAnalyze *ira, IrInstruction *sour
12587 if (enum_type->data.enumeration.layout == ContainerLayoutAuto &&13682 if (enum_type->data.enumeration.layout == ContainerLayoutAuto &&
12588 enum_type->data.enumeration.src_field_count == 1)13683 enum_type->data.enumeration.src_field_count == 1)
12589 {13684 {
12590 IrInstruction *result = ir_const(ira, source_instr, tag_type);13685 IrInstGen *result = ir_const(ira, source_instr, tag_type);
12591 init_const_bigint(result->value, tag_type,13686 init_const_bigint(result->value, tag_type,
12592 &enum_type->data.enumeration.fields[0].value);13687 &enum_type->data.enumeration.fields[0].value);
12593 return result;13688 return result;
...@@ -12596,20 +13691,17 @@ static IrInstruction *ir_analyze_enum_to_int(IrAnalyze *ira, IrInstruction *sour...@@ -12596,20 +13691,17 @@ static IrInstruction *ir_analyze_enum_to_int(IrAnalyze *ira, IrInstruction *sour
12596 if (instr_is_comptime(enum_target)) {13691 if (instr_is_comptime(enum_target)) {
12597 ZigValue *val = ir_resolve_const(ira, enum_target, UndefBad);13692 ZigValue *val = ir_resolve_const(ira, enum_target, UndefBad);
12598 if (!val)13693 if (!val)
12599 return ira->codegen->invalid_instruction;13694 return ira->codegen->invalid_inst_gen;
12600 IrInstruction *result = ir_const(ira, source_instr, tag_type);13695 IrInstGen *result = ir_const(ira, source_instr, tag_type);
12601 init_const_bigint(result->value, tag_type, &val->data.x_enum_tag);13696 init_const_bigint(result->value, tag_type, &val->data.x_enum_tag);
12602 return result;13697 return result;
12603 }13698 }
1260413699
12605 IrInstruction *result = ir_build_widen_or_shorten(&ira->new_irb, source_instr->scope,13700 return ir_build_widen_or_shorten(ira, source_instr->scope, source_instr->source_node, enum_target, tag_type);
12606 source_instr->source_node, enum_target);
12607 result->value->type = tag_type;
12608 return result;
12609}13701}
1261013702
12611static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *source_instr,13703static IrInstGen *ir_analyze_union_to_tag(IrAnalyze *ira, IrInst* source_instr,
12612 IrInstruction *target, ZigType *wanted_type)13704 IrInstGen *target, ZigType *wanted_type)
12613{13705{
12614 assert(target->value->type->id == ZigTypeIdUnion);13706 assert(target->value->type->id == ZigTypeIdUnion);
12615 assert(wanted_type->id == ZigTypeIdEnum);13707 assert(wanted_type->id == ZigTypeIdEnum);
...@@ -12618,8 +13710,8 @@ static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *sou...@@ -12618,8 +13710,8 @@ static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *sou
12618 if (instr_is_comptime(target)) {13710 if (instr_is_comptime(target)) {
12619 ZigValue *val = ir_resolve_const(ira, target, UndefBad);13711 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
12620 if (!val)13712 if (!val)
12621 return ira->codegen->invalid_instruction;13713 return ira->codegen->invalid_inst_gen;
12622 IrInstruction *result = ir_const(ira, source_instr, wanted_type);13714 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
12623 result->value->special = ConstValSpecialStatic;13715 result->value->special = ConstValSpecialStatic;
12624 result->value->type = wanted_type;13716 result->value->type = wanted_type;
12625 bigint_init_bigint(&result->value->data.x_enum_tag, &val->data.x_union.tag);13717 bigint_init_bigint(&result->value->data.x_enum_tag, &val->data.x_union.tag);
...@@ -12630,7 +13722,7 @@ static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *sou...@@ -12630,7 +13722,7 @@ static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *sou
12630 if (wanted_type->data.enumeration.layout == ContainerLayoutAuto &&13722 if (wanted_type->data.enumeration.layout == ContainerLayoutAuto &&
12631 wanted_type->data.enumeration.src_field_count == 1)13723 wanted_type->data.enumeration.src_field_count == 1)
12632 {13724 {
12633 IrInstruction *result = ir_const(ira, source_instr, wanted_type);13725 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
12634 result->value->special = ConstValSpecialStatic;13726 result->value->special = ConstValSpecialStatic;
12635 result->value->type = wanted_type;13727 result->value->type = wanted_type;
12636 TypeEnumField *enum_field = target->value->type->data.unionation.fields[0].enum_field;13728 TypeEnumField *enum_field = target->value->type->data.unionation.fields[0].enum_field;
...@@ -12638,48 +13730,45 @@ static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *sou...@@ -12638,48 +13730,45 @@ static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *sou
12638 return result;13730 return result;
12639 }13731 }
1264013732
12641 IrInstruction *result = ir_build_union_tag(&ira->new_irb, source_instr->scope,13733 return ir_build_union_tag(ira, source_instr, target, wanted_type);
12642 source_instr->source_node, target);
12643 result->value->type = wanted_type;
12644 return result;
12645}13734}
1264613735
12647static IrInstruction *ir_analyze_undefined_to_anything(IrAnalyze *ira, IrInstruction *source_instr,13736static IrInstGen *ir_analyze_undefined_to_anything(IrAnalyze *ira, IrInst* source_instr,
12648 IrInstruction *target, ZigType *wanted_type)13737 IrInstGen *target, ZigType *wanted_type)
12649{13738{
12650 IrInstruction *result = ir_const(ira, source_instr, wanted_type);13739 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
12651 result->value->special = ConstValSpecialUndef;13740 result->value->special = ConstValSpecialUndef;
12652 return result;13741 return result;
12653}13742}
1265413743
12655static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *source_instr,13744static IrInstGen *ir_analyze_enum_to_union(IrAnalyze *ira, IrInst* source_instr,
12656 IrInstruction *uncasted_target, ZigType *wanted_type)13745 IrInstGen *uncasted_target, ZigType *wanted_type)
12657{13746{
12658 Error err;13747 Error err;
12659 assert(wanted_type->id == ZigTypeIdUnion);13748 assert(wanted_type->id == ZigTypeIdUnion);
1266013749
12661 if ((err = type_resolve(ira->codegen, wanted_type, ResolveStatusZeroBitsKnown)))13750 if ((err = type_resolve(ira->codegen, wanted_type, ResolveStatusZeroBitsKnown)))
12662 return ira->codegen->invalid_instruction;13751 return ira->codegen->invalid_inst_gen;
1266313752
12664 IrInstruction *target = ir_implicit_cast(ira, uncasted_target, wanted_type->data.unionation.tag_type);13753 IrInstGen *target = ir_implicit_cast(ira, uncasted_target, wanted_type->data.unionation.tag_type);
12665 if (type_is_invalid(target->value->type))13754 if (type_is_invalid(target->value->type))
12666 return ira->codegen->invalid_instruction;13755 return ira->codegen->invalid_inst_gen;
1266713756
12668 if (instr_is_comptime(target)) {13757 if (instr_is_comptime(target)) {
12669 ZigValue *val = ir_resolve_const(ira, target, UndefBad);13758 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
12670 if (!val)13759 if (!val)
12671 return ira->codegen->invalid_instruction;13760 return ira->codegen->invalid_inst_gen;
12672 TypeUnionField *union_field = find_union_field_by_tag(wanted_type, &val->data.x_enum_tag);13761 TypeUnionField *union_field = find_union_field_by_tag(wanted_type, &val->data.x_enum_tag);
12673 assert(union_field != nullptr);13762 assert(union_field != nullptr);
12674 ZigType *field_type = resolve_union_field_type(ira->codegen, union_field);13763 ZigType *field_type = resolve_union_field_type(ira->codegen, union_field);
12675 if (field_type == nullptr)13764 if (field_type == nullptr)
12676 return ira->codegen->invalid_instruction;13765 return ira->codegen->invalid_inst_gen;
12677 if ((err = type_resolve(ira->codegen, field_type, ResolveStatusZeroBitsKnown)))13766 if ((err = type_resolve(ira->codegen, field_type, ResolveStatusZeroBitsKnown)))
12678 return ira->codegen->invalid_instruction;13767 return ira->codegen->invalid_inst_gen;
1267913768
12680 switch (type_has_one_possible_value(ira->codegen, field_type)) {13769 switch (type_has_one_possible_value(ira->codegen, field_type)) {
12681 case OnePossibleValueInvalid:13770 case OnePossibleValueInvalid:
12682 return ira->codegen->invalid_instruction;13771 return ira->codegen->invalid_inst_gen;
12683 case OnePossibleValueNo: {13772 case OnePossibleValueNo: {
12684 AstNode *field_node = wanted_type->data.unionation.decl_node->data.container_decl.fields.at(13773 AstNode *field_node = wanted_type->data.unionation.decl_node->data.container_decl.fields.at(
12685 union_field->enum_field->decl_index);13774 union_field->enum_field->decl_index);
...@@ -12690,13 +13779,13 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so...@@ -12690,13 +13779,13 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
12690 buf_ptr(union_field->name)));13779 buf_ptr(union_field->name)));
12691 add_error_note(ira->codegen, msg, field_node,13780 add_error_note(ira->codegen, msg, field_node,
12692 buf_sprintf("field '%s' declared here", buf_ptr(union_field->name)));13781 buf_sprintf("field '%s' declared here", buf_ptr(union_field->name)));
12693 return ira->codegen->invalid_instruction;13782 return ira->codegen->invalid_inst_gen;
12694 }13783 }
12695 case OnePossibleValueYes:13784 case OnePossibleValueYes:
12696 break;13785 break;
12697 }13786 }
1269813787
12699 IrInstruction *result = ir_const(ira, source_instr, wanted_type);13788 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
12700 result->value->special = ConstValSpecialStatic;13789 result->value->special = ConstValSpecialStatic;
12701 result->value->type = wanted_type;13790 result->value->type = wanted_type;
12702 bigint_init_bigint(&result->value->data.x_union.tag, &val->data.x_enum_tag);13791 bigint_init_bigint(&result->value->data.x_union.tag, &val->data.x_enum_tag);
...@@ -12709,9 +13798,7 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so...@@ -12709,9 +13798,7 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
12709 // if the union has all fields 0 bits, we can do it13798 // if the union has all fields 0 bits, we can do it
12710 // and in fact it's a noop cast because the union value is just the enum value13799 // and in fact it's a noop cast because the union value is just the enum value
12711 if (wanted_type->data.unionation.gen_field_count == 0) {13800 if (wanted_type->data.unionation.gen_field_count == 0) {
12712 IrInstruction *result = ir_build_cast(&ira->new_irb, target->scope, target->source_node, wanted_type, target, CastOpNoop);13801 return ir_build_cast(ira, &target->base, wanted_type, target, CastOpNoop);
12713 result->value->type = wanted_type;
12714 return result;
12715 }13802 }
1271613803
12717 ErrorMsg *msg = ir_add_error(ira, source_instr,13804 ErrorMsg *msg = ir_add_error(ira, source_instr,
...@@ -12721,10 +13808,10 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so...@@ -12721,10 +13808,10 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
12721 TypeUnionField *union_field = &wanted_type->data.unionation.fields[i];13808 TypeUnionField *union_field = &wanted_type->data.unionation.fields[i];
12722 ZigType *field_type = resolve_union_field_type(ira->codegen, union_field);13809 ZigType *field_type = resolve_union_field_type(ira->codegen, union_field);
12723 if (field_type == nullptr)13810 if (field_type == nullptr)
12724 return ira->codegen->invalid_instruction;13811 return ira->codegen->invalid_inst_gen;
12725 bool has_bits;13812 bool has_bits;
12726 if ((err = type_has_bits2(ira->codegen, field_type, &has_bits)))13813 if ((err = type_has_bits2(ira->codegen, field_type, &has_bits)))
12727 return ira->codegen->invalid_instruction;13814 return ira->codegen->invalid_inst_gen;
12728 if (has_bits) {13815 if (has_bits) {
12729 AstNode *field_node = wanted_type->data.unionation.decl_node->data.container_decl.fields.at(i);13816 AstNode *field_node = wanted_type->data.unionation.decl_node->data.container_decl.fields.at(i);
12730 add_error_note(ira->codegen, msg, field_node,13817 add_error_note(ira->codegen, msg, field_node,
...@@ -12733,23 +13820,23 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so...@@ -12733,23 +13820,23 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
12733 buf_ptr(&field_type->name)));13820 buf_ptr(&field_type->name)));
12734 }13821 }
12735 }13822 }
12736 return ira->codegen->invalid_instruction;13823 return ira->codegen->invalid_inst_gen;
12737}13824}
1273813825
12739static IrInstruction *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInstruction *source_instr,13826static IrInstGen *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInst* source_instr,
12740 IrInstruction *target, ZigType *wanted_type)13827 IrInstGen *target, ZigType *wanted_type)
12741{13828{
12742 assert(wanted_type->id == ZigTypeIdInt || wanted_type->id == ZigTypeIdFloat);13829 assert(wanted_type->id == ZigTypeIdInt || wanted_type->id == ZigTypeIdFloat);
1274313830
12744 if (instr_is_comptime(target)) {13831 if (instr_is_comptime(target)) {
12745 ZigValue *val = ir_resolve_const(ira, target, UndefBad);13832 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
12746 if (!val)13833 if (!val)
12747 return ira->codegen->invalid_instruction;13834 return ira->codegen->invalid_inst_gen;
12748 if (wanted_type->id == ZigTypeIdInt) {13835 if (wanted_type->id == ZigTypeIdInt) {
12749 if (bigint_cmp_zero(&val->data.x_bigint) == CmpLT && !wanted_type->data.integral.is_signed) {13836 if (bigint_cmp_zero(&val->data.x_bigint) == CmpLT && !wanted_type->data.integral.is_signed) {
12750 ir_add_error(ira, source_instr,13837 ir_add_error(ira, source_instr,
12751 buf_sprintf("attempt to cast negative value to unsigned integer"));13838 buf_sprintf("attempt to cast negative value to unsigned integer"));
12752 return ira->codegen->invalid_instruction;13839 return ira->codegen->invalid_inst_gen;
12753 }13840 }
12754 if (!bigint_fits_in_bits(&val->data.x_bigint, wanted_type->data.integral.bit_count,13841 if (!bigint_fits_in_bits(&val->data.x_bigint, wanted_type->data.integral.bit_count,
12755 wanted_type->data.integral.is_signed))13842 wanted_type->data.integral.is_signed))
...@@ -12757,10 +13844,10 @@ static IrInstruction *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInstruction...@@ -12757,10 +13844,10 @@ static IrInstruction *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInstruction
12757 ir_add_error(ira, source_instr,13844 ir_add_error(ira, source_instr,
12758 buf_sprintf("cast from '%s' to '%s' truncates bits",13845 buf_sprintf("cast from '%s' to '%s' truncates bits",
12759 buf_ptr(&target->value->type->name), buf_ptr(&wanted_type->name)));13846 buf_ptr(&target->value->type->name), buf_ptr(&wanted_type->name)));
12760 return ira->codegen->invalid_instruction;13847 return ira->codegen->invalid_inst_gen;
12761 }13848 }
12762 }13849 }
12763 IrInstruction *result = ir_const(ira, source_instr, wanted_type);13850 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
12764 result->value->type = wanted_type;13851 result->value->type = wanted_type;
12765 if (wanted_type->id == ZigTypeIdInt) {13852 if (wanted_type->id == ZigTypeIdInt) {
12766 bigint_init_bigint(&result->value->data.x_bigint, &val->data.x_bigint);13853 bigint_init_bigint(&result->value->data.x_bigint, &val->data.x_bigint);
...@@ -12777,19 +13864,16 @@ static IrInstruction *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInstruction...@@ -12777,19 +13864,16 @@ static IrInstruction *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInstruction
12777 assert(wanted_type->id == ZigTypeIdInt);13864 assert(wanted_type->id == ZigTypeIdInt);
12778 assert(type_has_bits(target->value->type));13865 assert(type_has_bits(target->value->type));
12779 ir_build_assert_zero(ira, source_instr, target);13866 ir_build_assert_zero(ira, source_instr, target);
12780 IrInstruction *result = ir_const_unsigned(ira, source_instr, 0);13867 IrInstGen *result = ir_const_unsigned(ira, source_instr, 0);
12781 result->value->type = wanted_type;13868 result->value->type = wanted_type;
12782 return result;13869 return result;
12783 }13870 }
1278413871
12785 IrInstruction *result = ir_build_widen_or_shorten(&ira->new_irb, source_instr->scope,13872 return ir_build_widen_or_shorten(ira, source_instr->scope, source_instr->source_node, target, wanted_type);
12786 source_instr->source_node, target);
12787 result->value->type = wanted_type;
12788 return result;
12789}13873}
1279013874
12791static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *source_instr,13875static IrInstGen *ir_analyze_int_to_enum(IrAnalyze *ira, IrInst* source_instr,
12792 IrInstruction *target, ZigType *wanted_type)13876 IrInstGen *target, ZigType *wanted_type)
12793{13877{
12794 Error err;13878 Error err;
12795 assert(wanted_type->id == ZigTypeIdEnum);13879 assert(wanted_type->id == ZigTypeIdEnum);
...@@ -12797,14 +13881,14 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour...@@ -12797,14 +13881,14 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour
12797 ZigType *actual_type = target->value->type;13881 ZigType *actual_type = target->value->type;
1279813882
12799 if ((err = type_resolve(ira->codegen, wanted_type, ResolveStatusSizeKnown)))13883 if ((err = type_resolve(ira->codegen, wanted_type, ResolveStatusSizeKnown)))
12800 return ira->codegen->invalid_instruction;13884 return ira->codegen->invalid_inst_gen;
1280113885
12802 if (actual_type != wanted_type->data.enumeration.tag_int_type) {13886 if (actual_type != wanted_type->data.enumeration.tag_int_type) {
12803 ir_add_error(ira, source_instr,13887 ir_add_error(ira, source_instr,
12804 buf_sprintf("integer to enum cast from '%s' instead of its tag type, '%s'",13888 buf_sprintf("integer to enum cast from '%s' instead of its tag type, '%s'",
12805 buf_ptr(&actual_type->name),13889 buf_ptr(&actual_type->name),
12806 buf_ptr(&wanted_type->data.enumeration.tag_int_type->name)));13890 buf_ptr(&wanted_type->data.enumeration.tag_int_type->name)));
12807 return ira->codegen->invalid_instruction;13891 return ira->codegen->invalid_inst_gen;
12808 }13892 }
1280913893
12810 assert(actual_type->id == ZigTypeIdInt || actual_type->id == ZigTypeIdComptimeInt);13894 assert(actual_type->id == ZigTypeIdInt || actual_type->id == ZigTypeIdComptimeInt);
...@@ -12812,10 +13896,10 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour...@@ -12812,10 +13896,10 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour
12812 if (instr_is_comptime(target)) {13896 if (instr_is_comptime(target)) {
12813 ZigValue *val = ir_resolve_const(ira, target, UndefBad);13897 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
12814 if (!val)13898 if (!val)
12815 return ira->codegen->invalid_instruction;13899 return ira->codegen->invalid_inst_gen;
1281613900
12817 TypeEnumField *field = find_enum_field_by_tag(wanted_type, &val->data.x_bigint);13901 TypeEnumField *field = find_enum_field_by_tag(wanted_type, &val->data.x_bigint);
12818 if (field == nullptr && wanted_type->data.enumeration.layout != ContainerLayoutExtern) {13902 if (field == nullptr && !wanted_type->data.enumeration.non_exhaustive) {
12819 Buf *val_buf = buf_alloc();13903 Buf *val_buf = buf_alloc();
12820 bigint_append_buf(val_buf, &val->data.x_bigint, 10);13904 bigint_append_buf(val_buf, &val->data.x_bigint, 10);
12821 ErrorMsg *msg = ir_add_error(ira, source_instr,13905 ErrorMsg *msg = ir_add_error(ira, source_instr,
...@@ -12823,28 +13907,25 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour...@@ -12823,28 +13907,25 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour
12823 buf_ptr(&wanted_type->name), buf_ptr(val_buf)));13907 buf_ptr(&wanted_type->name), buf_ptr(val_buf)));
12824 add_error_note(ira->codegen, msg, wanted_type->data.enumeration.decl_node,13908 add_error_note(ira->codegen, msg, wanted_type->data.enumeration.decl_node,
12825 buf_sprintf("'%s' declared here", buf_ptr(&wanted_type->name)));13909 buf_sprintf("'%s' declared here", buf_ptr(&wanted_type->name)));
12826 return ira->codegen->invalid_instruction;13910 return ira->codegen->invalid_inst_gen;
12827 }13911 }
1282813912
12829 IrInstruction *result = ir_const(ira, source_instr, wanted_type);13913 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
12830 bigint_init_bigint(&result->value->data.x_enum_tag, &val->data.x_bigint);13914 bigint_init_bigint(&result->value->data.x_enum_tag, &val->data.x_bigint);
12831 return result;13915 return result;
12832 }13916 }
1283313917
12834 IrInstruction *result = ir_build_int_to_enum(&ira->new_irb, source_instr->scope,13918 return ir_build_int_to_enum_gen(ira, source_instr->scope, source_instr->source_node, wanted_type, target);
12835 source_instr->source_node, nullptr, target);
12836 result->value->type = wanted_type;
12837 return result;
12838}13919}
1283913920
12840static IrInstruction *ir_analyze_number_to_literal(IrAnalyze *ira, IrInstruction *source_instr,13921static IrInstGen *ir_analyze_number_to_literal(IrAnalyze *ira, IrInst* source_instr,
12841 IrInstruction *target, ZigType *wanted_type)13922 IrInstGen *target, ZigType *wanted_type)
12842{13923{
12843 ZigValue *val = ir_resolve_const(ira, target, UndefBad);13924 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
12844 if (!val)13925 if (!val)
12845 return ira->codegen->invalid_instruction;13926 return ira->codegen->invalid_inst_gen;
1284613927
12847 IrInstruction *result = ir_const(ira, source_instr, wanted_type);13928 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
12848 if (wanted_type->id == ZigTypeIdComptimeFloat) {13929 if (wanted_type->id == ZigTypeIdComptimeFloat) {
12849 float_init_float(result->value, val);13930 float_init_float(result->value, val);
12850 } else if (wanted_type->id == ZigTypeIdComptimeInt) {13931 } else if (wanted_type->id == ZigTypeIdComptimeInt) {
...@@ -12855,7 +13936,7 @@ static IrInstruction *ir_analyze_number_to_literal(IrAnalyze *ira, IrInstruction...@@ -12855,7 +13936,7 @@ static IrInstruction *ir_analyze_number_to_literal(IrAnalyze *ira, IrInstruction
12855 return result;13936 return result;
12856}13937}
1285713938
12858static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,13939static IrInstGen *ir_analyze_int_to_err(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
12859 ZigType *wanted_type)13940 ZigType *wanted_type)
12860{13941{
12861 assert(target->value->type->id == ZigTypeIdInt);13942 assert(target->value->type->id == ZigTypeIdInt);
...@@ -12865,12 +13946,12 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc...@@ -12865,12 +13946,12 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
12865 if (instr_is_comptime(target)) {13946 if (instr_is_comptime(target)) {
12866 ZigValue *val = ir_resolve_const(ira, target, UndefBad);13947 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
12867 if (!val)13948 if (!val)
12868 return ira->codegen->invalid_instruction;13949 return ira->codegen->invalid_inst_gen;
1286913950
12870 IrInstruction *result = ir_const(ira, source_instr, wanted_type);13951 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1287113952
12872 if (!resolve_inferred_error_set(ira->codegen, wanted_type, source_instr->source_node)) {13953 if (!resolve_inferred_error_set(ira->codegen, wanted_type, source_instr->source_node)) {
12873 return ira->codegen->invalid_instruction;13954 return ira->codegen->invalid_inst_gen;
12874 }13955 }
1287513956
12876 if (type_is_global_error_set(wanted_type)) {13957 if (type_is_global_error_set(wanted_type)) {
...@@ -12882,7 +13963,7 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc...@@ -12882,7 +13963,7 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
12882 bigint_append_buf(val_buf, &val->data.x_bigint, 10);13963 bigint_append_buf(val_buf, &val->data.x_bigint, 10);
12883 ir_add_error(ira, source_instr,13964 ir_add_error(ira, source_instr,
12884 buf_sprintf("integer value %s represents no error", buf_ptr(val_buf)));13965 buf_sprintf("integer value %s represents no error", buf_ptr(val_buf)));
12885 return ira->codegen->invalid_instruction;13966 return ira->codegen->invalid_inst_gen;
12886 }13967 }
1288713968
12888 size_t index = bigint_as_usize(&val->data.x_bigint);13969 size_t index = bigint_as_usize(&val->data.x_bigint);
...@@ -12906,7 +13987,7 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc...@@ -12906,7 +13987,7 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
12906 bigint_append_buf(val_buf, &val->data.x_bigint, 10);13987 bigint_append_buf(val_buf, &val->data.x_bigint, 10);
12907 ir_add_error(ira, source_instr,13988 ir_add_error(ira, source_instr,
12908 buf_sprintf("integer value %s represents no error in '%s'", buf_ptr(val_buf), buf_ptr(&wanted_type->name)));13989 buf_sprintf("integer value %s represents no error in '%s'", buf_ptr(val_buf), buf_ptr(&wanted_type->name)));
12909 return ira->codegen->invalid_instruction;13990 return ira->codegen->invalid_inst_gen;
12910 }13991 }
1291113992
12912 result->value->data.x_err_set = err;13993 result->value->data.x_err_set = err;
...@@ -12914,12 +13995,10 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc...@@ -12914,12 +13995,10 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
12914 }13995 }
12915 }13996 }
1291613997
12917 IrInstruction *result = ir_build_int_to_err(&ira->new_irb, source_instr->scope, source_instr->source_node, target);13998 return ir_build_int_to_err_gen(ira, source_instr->scope, source_instr->source_node, target, wanted_type);
12918 result->value->type = wanted_type;
12919 return result;
12920}13999}
1292114000
12922static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,14001static IrInstGen *ir_analyze_err_to_int(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
12923 ZigType *wanted_type)14002 ZigType *wanted_type)
12924{14003{
12925 assert(wanted_type->id == ZigTypeIdInt);14004 assert(wanted_type->id == ZigTypeIdInt);
...@@ -12929,9 +14008,9 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc...@@ -12929,9 +14008,9 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
12929 if (instr_is_comptime(target)) {14008 if (instr_is_comptime(target)) {
12930 ZigValue *val = ir_resolve_const(ira, target, UndefBad);14009 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
12931 if (!val)14010 if (!val)
12932 return ira->codegen->invalid_instruction;14011 return ira->codegen->invalid_inst_gen;
1293314012
12934 IrInstruction *result = ir_const(ira, source_instr, wanted_type);14013 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1293514014
12936 ErrorTableEntry *err;14015 ErrorTableEntry *err;
12937 if (err_type->id == ZigTypeIdErrorUnion) {14016 if (err_type->id == ZigTypeIdErrorUnion) {
...@@ -12951,7 +14030,7 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc...@@ -12951,7 +14030,7 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
12951 ir_add_error_node(ira, source_instr->source_node,14030 ir_add_error_node(ira, source_instr->source_node,
12952 buf_sprintf("error code '%s' does not fit in '%s'",14031 buf_sprintf("error code '%s' does not fit in '%s'",
12953 buf_ptr(&err->name), buf_ptr(&wanted_type->name)));14032 buf_ptr(&err->name), buf_ptr(&wanted_type->name)));
12954 return ira->codegen->invalid_instruction;14033 return ira->codegen->invalid_inst_gen;
12955 }14034 }
1295614035
12957 return result;14036 return result;
...@@ -12967,14 +14046,14 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc...@@ -12967,14 +14046,14 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
12967 }14046 }
12968 if (!type_is_global_error_set(err_set_type)) {14047 if (!type_is_global_error_set(err_set_type)) {
12969 if (!resolve_inferred_error_set(ira->codegen, err_set_type, source_instr->source_node)) {14048 if (!resolve_inferred_error_set(ira->codegen, err_set_type, source_instr->source_node)) {
12970 return ira->codegen->invalid_instruction;14049 return ira->codegen->invalid_inst_gen;
12971 }14050 }
12972 if (err_set_type->data.error_set.err_count == 0) {14051 if (err_set_type->data.error_set.err_count == 0) {
12973 IrInstruction *result = ir_const(ira, source_instr, wanted_type);14052 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
12974 bigint_init_unsigned(&result->value->data.x_bigint, 0);14053 bigint_init_unsigned(&result->value->data.x_bigint, 0);
12975 return result;14054 return result;
12976 } else if (err_set_type->data.error_set.err_count == 1) {14055 } else if (err_set_type->data.error_set.err_count == 1) {
12977 IrInstruction *result = ir_const(ira, source_instr, wanted_type);14056 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
12978 ErrorTableEntry *err = err_set_type->data.error_set.errors[0];14057 ErrorTableEntry *err = err_set_type->data.error_set.errors[0];
12979 bigint_init_unsigned(&result->value->data.x_bigint, err->value);14058 bigint_init_unsigned(&result->value->data.x_bigint, err->value);
12980 return result;14059 return result;
...@@ -12986,21 +14065,19 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc...@@ -12986,21 +14065,19 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
12986 if (!bigint_fits_in_bits(&bn, wanted_type->data.integral.bit_count, wanted_type->data.integral.is_signed)) {14065 if (!bigint_fits_in_bits(&bn, wanted_type->data.integral.bit_count, wanted_type->data.integral.is_signed)) {
12987 ir_add_error_node(ira, source_instr->source_node,14066 ir_add_error_node(ira, source_instr->source_node,
12988 buf_sprintf("too many error values to fit in '%s'", buf_ptr(&wanted_type->name)));14067 buf_sprintf("too many error values to fit in '%s'", buf_ptr(&wanted_type->name)));
12989 return ira->codegen->invalid_instruction;14068 return ira->codegen->invalid_inst_gen;
12990 }14069 }
1299114070
12992 IrInstruction *result = ir_build_err_to_int(&ira->new_irb, source_instr->scope, source_instr->source_node, target);14071 return ir_build_err_to_int_gen(ira, source_instr->scope, source_instr->source_node, target, wanted_type);
12993 result->value->type = wanted_type;
12994 return result;
12995}14072}
1299614073
12997static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,14074static IrInstGen *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
12998 ZigType *wanted_type)14075 ZigType *wanted_type)
12999{14076{
13000 assert(wanted_type->id == ZigTypeIdPointer);14077 assert(wanted_type->id == ZigTypeIdPointer);
13001 Error err;14078 Error err;
13002 if ((err = type_resolve(ira->codegen, target->value->type->data.pointer.child_type, ResolveStatusAlignmentKnown)))14079 if ((err = type_resolve(ira->codegen, target->value->type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
13003 return ira->codegen->invalid_instruction;14080 return ira->codegen->invalid_inst_gen;
13004 assert((wanted_type->data.pointer.is_const && target->value->type->data.pointer.is_const) || !target->value->type->data.pointer.is_const);14081 assert((wanted_type->data.pointer.is_const && target->value->type->data.pointer.is_const) || !target->value->type->data.pointer.is_const);
13005 wanted_type = adjust_ptr_align(ira->codegen, wanted_type, get_ptr_align(ira->codegen, target->value->type));14082 wanted_type = adjust_ptr_align(ira->codegen, wanted_type, get_ptr_align(ira->codegen, target->value->type));
13006 ZigType *array_type = wanted_type->data.pointer.child_type;14083 ZigType *array_type = wanted_type->data.pointer.child_type;
...@@ -13010,12 +14087,12 @@ static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *sou...@@ -13010,12 +14087,12 @@ static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *sou
13010 if (instr_is_comptime(target)) {14087 if (instr_is_comptime(target)) {
13011 ZigValue *val = ir_resolve_const(ira, target, UndefBad);14088 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
13012 if (!val)14089 if (!val)
13013 return ira->codegen->invalid_instruction;14090 return ira->codegen->invalid_inst_gen;
1301414091
13015 assert(val->type->id == ZigTypeIdPointer);14092 assert(val->type->id == ZigTypeIdPointer);
13016 ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, val, source_instr->source_node);14093 ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, val, source_instr->source_node);
13017 if (pointee == nullptr)14094 if (pointee == nullptr)
13018 return ira->codegen->invalid_instruction;14095 return ira->codegen->invalid_inst_gen;
13019 if (pointee->special != ConstValSpecialRuntime) {14096 if (pointee->special != ConstValSpecialRuntime) {
13020 ZigValue *array_val = create_const_vals(1);14097 ZigValue *array_val = create_const_vals(1);
13021 array_val->special = ConstValSpecialStatic;14098 array_val->special = ConstValSpecialStatic;
...@@ -13025,7 +14102,7 @@ static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *sou...@@ -13025,7 +14102,7 @@ static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *sou
13025 array_val->parent.id = ConstParentIdScalar;14102 array_val->parent.id = ConstParentIdScalar;
13026 array_val->parent.data.p_scalar.scalar_val = pointee;14103 array_val->parent.data.p_scalar.scalar_val = pointee;
1302714104
13028 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,14105 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
13029 source_instr->scope, source_instr->source_node);14106 source_instr->scope, source_instr->source_node);
13030 const_instruction->base.value->type = wanted_type;14107 const_instruction->base.value->type = wanted_type;
13031 const_instruction->base.value->special = ConstValSpecialStatic;14108 const_instruction->base.value->special = ConstValSpecialStatic;
...@@ -13037,10 +14114,7 @@ static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *sou...@@ -13037,10 +14114,7 @@ static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *sou
13037 }14114 }
1303814115
13039 // pointer to array and pointer to single item are represented the same way at runtime14116 // pointer to array and pointer to single item are represented the same way at runtime
13040 IrInstruction *result = ir_build_cast(&ira->new_irb, target->scope, target->source_node,14117 return ir_build_cast(ira, &target->base, wanted_type, target, CastOpBitCast);
13041 wanted_type, target, CastOpBitCast);
13042 result->value->type = wanted_type;
13043 return result;
13044}14118}
1304514119
13046static void report_recursive_error(IrAnalyze *ira, AstNode *source_node, ConstCastOnly *cast_result,14120static void report_recursive_error(IrAnalyze *ira, AstNode *source_node, ConstCastOnly *cast_result,
...@@ -13228,12 +14302,12 @@ static void report_recursive_error(IrAnalyze *ira, AstNode *source_node, ConstCa...@@ -13228,12 +14302,12 @@ static void report_recursive_error(IrAnalyze *ira, AstNode *source_node, ConstCa
13228 }14302 }
13229}14303}
1323014304
13231static IrInstruction *ir_analyze_array_to_vector(IrAnalyze *ira, IrInstruction *source_instr,14305static IrInstGen *ir_analyze_array_to_vector(IrAnalyze *ira, IrInst* source_instr,
13232 IrInstruction *array, ZigType *vector_type)14306 IrInstGen *array, ZigType *vector_type)
13233{14307{
13234 if (instr_is_comptime(array)) {14308 if (instr_is_comptime(array)) {
13235 // arrays and vectors have the same ZigValue representation14309 // arrays and vectors have the same ZigValue representation
13236 IrInstruction *result = ir_const(ira, source_instr, vector_type);14310 IrInstGen *result = ir_const(ira, source_instr, vector_type);
13237 copy_const_val(result->value, array->value);14311 copy_const_val(result->value, array->value);
13238 result->value->type = vector_type;14312 result->value->type = vector_type;
13239 return result;14313 return result;
...@@ -13241,12 +14315,12 @@ static IrInstruction *ir_analyze_array_to_vector(IrAnalyze *ira, IrInstruction *...@@ -13241,12 +14315,12 @@ static IrInstruction *ir_analyze_array_to_vector(IrAnalyze *ira, IrInstruction *
13241 return ir_build_array_to_vector(ira, source_instr, array, vector_type);14315 return ir_build_array_to_vector(ira, source_instr, array, vector_type);
13242}14316}
1324314317
13244static IrInstruction *ir_analyze_vector_to_array(IrAnalyze *ira, IrInstruction *source_instr,14318static IrInstGen *ir_analyze_vector_to_array(IrAnalyze *ira, IrInst* source_instr,
13245 IrInstruction *vector, ZigType *array_type, ResultLoc *result_loc)14319 IrInstGen *vector, ZigType *array_type, ResultLoc *result_loc)
13246{14320{
13247 if (instr_is_comptime(vector)) {14321 if (instr_is_comptime(vector)) {
13248 // arrays and vectors have the same ZigValue representation14322 // arrays and vectors have the same ZigValue representation
13249 IrInstruction *result = ir_const(ira, source_instr, array_type);14323 IrInstGen *result = ir_const(ira, source_instr, array_type);
13250 copy_const_val(result->value, vector->value);14324 copy_const_val(result->value, vector->value);
13251 result->value->type = array_type;14325 result->value->type = array_type;
13252 return result;14326 return result;
...@@ -13254,18 +14328,17 @@ static IrInstruction *ir_analyze_vector_to_array(IrAnalyze *ira, IrInstruction *...@@ -13254,18 +14328,17 @@ static IrInstruction *ir_analyze_vector_to_array(IrAnalyze *ira, IrInstruction *
13254 if (result_loc == nullptr) {14328 if (result_loc == nullptr) {
13255 result_loc = no_result_loc();14329 result_loc = no_result_loc();
13256 }14330 }
13257 IrInstruction *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, array_type, nullptr,14331 IrInstGen *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, array_type, nullptr, true, true);
13258 true, true);14332 if (type_is_invalid(result_loc_inst->value->type) || result_loc_inst->value->type->id == ZigTypeIdUnreachable) {
13259 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
13260 return result_loc_inst;14333 return result_loc_inst;
13261 }14334 }
13262 return ir_build_vector_to_array(ira, source_instr, array_type, vector, result_loc_inst);14335 return ir_build_vector_to_array(ira, source_instr, array_type, vector, result_loc_inst);
13263}14336}
1326414337
13265static IrInstruction *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInstruction *source_instr,14338static IrInstGen *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInst* source_instr,
13266 IrInstruction *integer, ZigType *dest_type)14339 IrInstGen *integer, ZigType *dest_type)
13267{14340{
13268 IrInstruction *unsigned_integer;14341 IrInstGen *unsigned_integer;
13269 if (instr_is_comptime(integer)) {14342 if (instr_is_comptime(integer)) {
13270 unsigned_integer = integer;14343 unsigned_integer = integer;
13271 } else {14344 } else {
...@@ -13278,7 +14351,7 @@ static IrInstruction *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInstruction *sou...@@ -13278,7 +14351,7 @@ static IrInstruction *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInstruction *sou
13278 buf_sprintf("integer type '%s' too big for implicit @intToPtr to type '%s'",14351 buf_sprintf("integer type '%s' too big for implicit @intToPtr to type '%s'",
13279 buf_ptr(&integer->value->type->name),14352 buf_ptr(&integer->value->type->name),
13280 buf_ptr(&dest_type->name)));14353 buf_ptr(&dest_type->name)));
13281 return ira->codegen->invalid_instruction;14354 return ira->codegen->invalid_inst_gen;
13282 }14355 }
1328314356
13284 if (integer->value->type->data.integral.is_signed) {14357 if (integer->value->type->data.integral.is_signed) {
...@@ -13286,7 +14359,7 @@ static IrInstruction *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInstruction *sou...@@ -13286,7 +14359,7 @@ static IrInstruction *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInstruction *sou
13286 integer->value->type->data.integral.bit_count);14359 integer->value->type->data.integral.bit_count);
13287 unsigned_integer = ir_analyze_bit_cast(ira, source_instr, integer, unsigned_int_type);14360 unsigned_integer = ir_analyze_bit_cast(ira, source_instr, integer, unsigned_int_type);
13288 if (type_is_invalid(unsigned_integer->value->type))14361 if (type_is_invalid(unsigned_integer->value->type))
13289 return ira->codegen->invalid_instruction;14362 return ira->codegen->invalid_inst_gen;
13290 } else {14363 } else {
13291 unsigned_integer = integer;14364 unsigned_integer = integer;
13292 }14365 }
...@@ -13306,14 +14379,14 @@ static bool is_pointery_and_elem_is_not_pointery(ZigType *ty) {...@@ -13306,14 +14379,14 @@ static bool is_pointery_and_elem_is_not_pointery(ZigType *ty) {
13306 return false;14379 return false;
13307}14380}
1330814381
13309static IrInstruction *ir_analyze_enum_literal(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,14382static IrInstGen *ir_analyze_enum_literal(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
13310 ZigType *enum_type)14383 ZigType *enum_type)
13311{14384{
13312 assert(enum_type->id == ZigTypeIdEnum);14385 assert(enum_type->id == ZigTypeIdEnum);
1331314386
13314 Error err;14387 Error err;
13315 if ((err = type_resolve(ira->codegen, enum_type, ResolveStatusZeroBitsKnown)))14388 if ((err = type_resolve(ira->codegen, enum_type, ResolveStatusZeroBitsKnown)))
13316 return ira->codegen->invalid_instruction;14389 return ira->codegen->invalid_inst_gen;
1331714390
13318 TypeEnumField *field = find_enum_type_field(enum_type, value->value->data.x_enum_literal);14391 TypeEnumField *field = find_enum_type_field(enum_type, value->value->data.x_enum_literal);
13319 if (field == nullptr) {14392 if (field == nullptr) {
...@@ -13321,40 +14394,40 @@ static IrInstruction *ir_analyze_enum_literal(IrAnalyze *ira, IrInstruction *sou...@@ -13321,40 +14394,40 @@ static IrInstruction *ir_analyze_enum_literal(IrAnalyze *ira, IrInstruction *sou
13321 buf_ptr(&enum_type->name), buf_ptr(value->value->data.x_enum_literal)));14394 buf_ptr(&enum_type->name), buf_ptr(value->value->data.x_enum_literal)));
13322 add_error_note(ira->codegen, msg, enum_type->data.enumeration.decl_node,14395 add_error_note(ira->codegen, msg, enum_type->data.enumeration.decl_node,
13323 buf_sprintf("'%s' declared here", buf_ptr(&enum_type->name)));14396 buf_sprintf("'%s' declared here", buf_ptr(&enum_type->name)));
13324 return ira->codegen->invalid_instruction;14397 return ira->codegen->invalid_inst_gen;
13325 }14398 }
13326 IrInstruction *result = ir_const(ira, source_instr, enum_type);14399 IrInstGen *result = ir_const(ira, source_instr, enum_type);
13327 bigint_init_bigint(&result->value->data.x_enum_tag, &field->value);14400 bigint_init_bigint(&result->value->data.x_enum_tag, &field->value);
1332814401
13329 return result;14402 return result;
13330}14403}
1333114404
13332static IrInstruction *ir_analyze_struct_literal_to_array(IrAnalyze *ira, IrInstruction *source_instr,14405static IrInstGen *ir_analyze_struct_literal_to_array(IrAnalyze *ira, IrInst* source_instr,
13333 IrInstruction *value, ZigType *wanted_type)14406 IrInstGen *value, ZigType *wanted_type)
13334{14407{
13335 ir_add_error(ira, source_instr, buf_sprintf("TODO: type coercion of anon list literal to array"));14408 ir_add_error(ira, source_instr, buf_sprintf("TODO: type coercion of anon list literal to array"));
13336 return ira->codegen->invalid_instruction;14409 return ira->codegen->invalid_inst_gen;
13337}14410}
1333814411
13339static IrInstruction *ir_analyze_struct_literal_to_struct(IrAnalyze *ira, IrInstruction *source_instr,14412static IrInstGen *ir_analyze_struct_literal_to_struct(IrAnalyze *ira, IrInst* source_instr,
13340 IrInstruction *value, ZigType *wanted_type)14413 IrInstGen *value, ZigType *wanted_type)
13341{14414{
13342 ir_add_error(ira, source_instr, buf_sprintf("TODO: type coercion of anon struct literal to struct"));14415 ir_add_error(ira, source_instr, buf_sprintf("TODO: type coercion of anon struct literal to struct"));
13343 return ira->codegen->invalid_instruction;14416 return ira->codegen->invalid_inst_gen;
13344}14417}
1334514418
13346static IrInstruction *ir_analyze_struct_literal_to_union(IrAnalyze *ira, IrInstruction *source_instr,14419static IrInstGen *ir_analyze_struct_literal_to_union(IrAnalyze *ira, IrInst* source_instr,
13347 IrInstruction *value, ZigType *wanted_type)14420 IrInstGen *value, ZigType *wanted_type)
13348{14421{
13349 ir_add_error(ira, source_instr, buf_sprintf("TODO: type coercion of anon struct literal to union"));14422 ir_add_error(ira, source_instr, buf_sprintf("TODO: type coercion of anon struct literal to union"));
13350 return ira->codegen->invalid_instruction;14423 return ira->codegen->invalid_inst_gen;
13351}14424}
1335214425
13353// Add a compile error and return ErrorSemanticAnalyzeFail if the pointer alignment does not work,14426// Add a compile error and return ErrorSemanticAnalyzeFail if the pointer alignment does not work,
13354// otherwise return ErrorNone. Does not emit any instructions.14427// otherwise return ErrorNone. Does not emit any instructions.
13355// Assumes that the pointer types have element types with the same ABI alignment. Avoids resolving the14428// Assumes that the pointer types have element types with the same ABI alignment. Avoids resolving the
13356// pointer types' alignments if both of the pointer types are ABI aligned.14429// pointer types' alignments if both of the pointer types are ABI aligned.
13357static Error ir_cast_ptr_align(IrAnalyze *ira, IrInstruction *source_instr, ZigType *dest_ptr_type,14430static Error ir_cast_ptr_align(IrAnalyze *ira, IrInst* source_instr, ZigType *dest_ptr_type,
13358 ZigType *src_ptr_type, AstNode *src_source_node)14431 ZigType *src_ptr_type, AstNode *src_source_node)
13359{14432{
13360 Error err;14433 Error err;
...@@ -13388,37 +14461,37 @@ static Error ir_cast_ptr_align(IrAnalyze *ira, IrInstruction *source_instr, ZigT...@@ -13388,37 +14461,37 @@ static Error ir_cast_ptr_align(IrAnalyze *ira, IrInstruction *source_instr, ZigT
13388 return ErrorNone;14461 return ErrorNone;
13389}14462}
1339014463
13391static IrInstruction *ir_analyze_struct_value_field_value(IrAnalyze *ira, IrInstruction *source_instr,14464static IrInstGen *ir_analyze_struct_value_field_value(IrAnalyze *ira, IrInst* source_instr,
13392 IrInstruction *struct_operand, TypeStructField *field)14465 IrInstGen *struct_operand, TypeStructField *field)
13393{14466{
13394 IrInstruction *struct_ptr = ir_get_ref(ira, source_instr, struct_operand, true, false);14467 IrInstGen *struct_ptr = ir_get_ref(ira, source_instr, struct_operand, true, false);
13395 if (type_is_invalid(struct_ptr->value->type))14468 if (type_is_invalid(struct_ptr->value->type))
13396 return ira->codegen->invalid_instruction;14469 return ira->codegen->invalid_inst_gen;
13397 IrInstruction *field_ptr = ir_analyze_struct_field_ptr(ira, source_instr, field, struct_ptr,14470 IrInstGen *field_ptr = ir_analyze_struct_field_ptr(ira, source_instr, field, struct_ptr,
13398 struct_operand->value->type, false);14471 struct_operand->value->type, false);
13399 if (type_is_invalid(field_ptr->value->type))14472 if (type_is_invalid(field_ptr->value->type))
13400 return ira->codegen->invalid_instruction;14473 return ira->codegen->invalid_inst_gen;
13401 return ir_get_deref(ira, source_instr, field_ptr, nullptr);14474 return ir_get_deref(ira, source_instr, field_ptr, nullptr);
13402}14475}
1340314476
13404static IrInstruction *ir_analyze_optional_value_payload_value(IrAnalyze *ira, IrInstruction *source_instr,14477static IrInstGen *ir_analyze_optional_value_payload_value(IrAnalyze *ira, IrInst* source_instr,
13405 IrInstruction *optional_operand, bool safety_check_on)14478 IrInstGen *optional_operand, bool safety_check_on)
13406{14479{
13407 IrInstruction *opt_ptr = ir_get_ref(ira, source_instr, optional_operand, true, false);14480 IrInstGen *opt_ptr = ir_get_ref(ira, source_instr, optional_operand, true, false);
13408 IrInstruction *payload_ptr = ir_analyze_unwrap_optional_payload(ira, source_instr, opt_ptr,14481 IrInstGen *payload_ptr = ir_analyze_unwrap_optional_payload(ira, source_instr, opt_ptr,
13409 safety_check_on, false);14482 safety_check_on, false);
13410 return ir_get_deref(ira, source_instr, payload_ptr, nullptr);14483 return ir_get_deref(ira, source_instr, payload_ptr, nullptr);
13411}14484}
1341214485
13413static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_instr,14486static IrInstGen *ir_analyze_cast(IrAnalyze *ira, IrInst *source_instr,
13414 ZigType *wanted_type, IrInstruction *value)14487 ZigType *wanted_type, IrInstGen *value)
13415{14488{
13416 Error err;14489 Error err;
13417 ZigType *actual_type = value->value->type;14490 ZigType *actual_type = value->value->type;
13418 AstNode *source_node = source_instr->source_node;14491 AstNode *source_node = source_instr->source_node;
1341914492
13420 if (type_is_invalid(wanted_type) || type_is_invalid(actual_type)) {14493 if (type_is_invalid(wanted_type) || type_is_invalid(actual_type)) {
13421 return ira->codegen->invalid_instruction;14494 return ira->codegen->invalid_inst_gen;
13422 }14495 }
1342314496
13424 // This means the wanted type is anything.14497 // This means the wanted type is anything.
...@@ -13430,7 +14503,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13430,7 +14503,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13430 ConstCastOnly const_cast_result = types_match_const_cast_only(ira, wanted_type, actual_type,14503 ConstCastOnly const_cast_result = types_match_const_cast_only(ira, wanted_type, actual_type,
13431 source_node, false);14504 source_node, false);
13432 if (const_cast_result.id == ConstCastResultIdInvalid)14505 if (const_cast_result.id == ConstCastResultIdInvalid)
13433 return ira->codegen->invalid_instruction;14506 return ira->codegen->invalid_inst_gen;
13434 if (const_cast_result.id == ConstCastResultIdOk) {14507 if (const_cast_result.id == ConstCastResultIdOk) {
13435 return ir_resolve_cast(ira, source_instr, value, wanted_type, CastOpNoop);14508 return ir_resolve_cast(ira, source_instr, value, wanted_type, CastOpNoop);
13436 }14509 }
...@@ -13464,7 +14537,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13464,7 +14537,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13464 if (ir_num_lit_fits_in_other_type(ira, value, wanted_child_type, true)) {14537 if (ir_num_lit_fits_in_other_type(ira, value, wanted_child_type, true)) {
13465 return ir_analyze_optional_wrap(ira, source_instr, value, wanted_type, nullptr);14538 return ir_analyze_optional_wrap(ira, source_instr, value, wanted_type, nullptr);
13466 } else {14539 } else {
13467 return ira->codegen->invalid_instruction;14540 return ira->codegen->invalid_inst_gen;
13468 }14541 }
13469 } else if (14542 } else if (
13470 wanted_child_type->id == ZigTypeIdPointer &&14543 wanted_child_type->id == ZigTypeIdPointer &&
...@@ -13474,18 +14547,18 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13474,18 +14547,18 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13474 actual_type->data.pointer.child_type->id == ZigTypeIdArray)14547 actual_type->data.pointer.child_type->id == ZigTypeIdArray)
13475 {14548 {
13476 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))14549 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
13477 return ira->codegen->invalid_instruction;14550 return ira->codegen->invalid_inst_gen;
13478 if ((err = type_resolve(ira->codegen, wanted_child_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))14551 if ((err = type_resolve(ira->codegen, wanted_child_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
13479 return ira->codegen->invalid_instruction;14552 return ira->codegen->invalid_inst_gen;
13480 if (get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, wanted_child_type) &&14553 if (get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, wanted_child_type) &&
13481 types_match_const_cast_only(ira, wanted_child_type->data.pointer.child_type,14554 types_match_const_cast_only(ira, wanted_child_type->data.pointer.child_type,
13482 actual_type->data.pointer.child_type->data.array.child_type, source_node,14555 actual_type->data.pointer.child_type->data.array.child_type, source_node,
13483 !wanted_child_type->data.pointer.is_const).id == ConstCastResultIdOk)14556 !wanted_child_type->data.pointer.is_const).id == ConstCastResultIdOk)
13484 {14557 {
13485 IrInstruction *cast1 = ir_resolve_ptr_of_array_to_unknown_len_ptr(ira, source_instr, value,14558 IrInstGen *cast1 = ir_resolve_ptr_of_array_to_unknown_len_ptr(ira, source_instr, value,
13486 wanted_child_type);14559 wanted_child_type);
13487 if (type_is_invalid(cast1->value->type))14560 if (type_is_invalid(cast1->value->type))
13488 return ira->codegen->invalid_instruction;14561 return ira->codegen->invalid_inst_gen;
13489 return ir_analyze_optional_wrap(ira, source_instr, cast1, wanted_type, nullptr);14562 return ir_analyze_optional_wrap(ira, source_instr, cast1, wanted_type, nullptr);
13490 }14563 }
13491 }14564 }
...@@ -13503,7 +14576,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13503,7 +14576,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13503 if (ir_num_lit_fits_in_other_type(ira, value, wanted_type->data.error_union.payload_type, true)) {14576 if (ir_num_lit_fits_in_other_type(ira, value, wanted_type->data.error_union.payload_type, true)) {
13504 return ir_analyze_err_wrap_payload(ira, source_instr, value, wanted_type, nullptr);14577 return ir_analyze_err_wrap_payload(ira, source_instr, value, wanted_type, nullptr);
13505 } else {14578 } else {
13506 return ira->codegen->invalid_instruction;14579 return ira->codegen->invalid_inst_gen;
13507 }14580 }
13508 }14581 }
13509 }14582 }
...@@ -13519,13 +14592,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13519,13 +14592,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13519 actual_type->id == ZigTypeIdComptimeInt ||14592 actual_type->id == ZigTypeIdComptimeInt ||
13520 actual_type->id == ZigTypeIdComptimeFloat)14593 actual_type->id == ZigTypeIdComptimeFloat)
13521 {14594 {
13522 IrInstruction *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.error_union.payload_type, value);14595 IrInstGen *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.error_union.payload_type, value);
13523 if (type_is_invalid(cast1->value->type))14596 if (type_is_invalid(cast1->value->type))
13524 return ira->codegen->invalid_instruction;14597 return ira->codegen->invalid_inst_gen;
1352514598
13526 IrInstruction *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);14599 IrInstGen *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
13527 if (type_is_invalid(cast2->value->type))14600 if (type_is_invalid(cast2->value->type))
13528 return ira->codegen->invalid_instruction;14601 return ira->codegen->invalid_inst_gen;
1352914602
13530 return cast2;14603 return cast2;
13531 }14604 }
...@@ -13540,13 +14613,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13540,13 +14613,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13540 wanted_type->id == ZigTypeIdFloat || wanted_type->id == ZigTypeIdComptimeFloat))14613 wanted_type->id == ZigTypeIdFloat || wanted_type->id == ZigTypeIdComptimeFloat))
13541 {14614 {
13542 if (value->value->special == ConstValSpecialUndef) {14615 if (value->value->special == ConstValSpecialUndef) {
13543 IrInstruction *result = ir_const(ira, source_instr, wanted_type);14616 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
13544 result->value->special = ConstValSpecialUndef;14617 result->value->special = ConstValSpecialUndef;
13545 return result;14618 return result;
13546 }14619 }
13547 if (ir_num_lit_fits_in_other_type(ira, value, wanted_type, true)) {14620 if (ir_num_lit_fits_in_other_type(ira, value, wanted_type, true)) {
13548 if (wanted_type->id == ZigTypeIdComptimeInt || wanted_type->id == ZigTypeIdInt) {14621 if (wanted_type->id == ZigTypeIdComptimeInt || wanted_type->id == ZigTypeIdInt) {
13549 IrInstruction *result = ir_const(ira, source_instr, wanted_type);14622 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
13550 if (actual_type->id == ZigTypeIdComptimeInt || actual_type->id == ZigTypeIdInt) {14623 if (actual_type->id == ZigTypeIdComptimeInt || actual_type->id == ZigTypeIdInt) {
13551 copy_const_val(result->value, value->value);14624 copy_const_val(result->value, value->value);
13552 result->value->type = wanted_type;14625 result->value->type = wanted_type;
...@@ -13555,7 +14628,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13555,7 +14628,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13555 }14628 }
13556 return result;14629 return result;
13557 } else if (wanted_type->id == ZigTypeIdComptimeFloat || wanted_type->id == ZigTypeIdFloat) {14630 } else if (wanted_type->id == ZigTypeIdComptimeFloat || wanted_type->id == ZigTypeIdFloat) {
13558 IrInstruction *result = ir_const(ira, source_instr, wanted_type);14631 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
13559 if (actual_type->id == ZigTypeIdComptimeInt || actual_type->id == ZigTypeIdInt) {14632 if (actual_type->id == ZigTypeIdComptimeInt || actual_type->id == ZigTypeIdInt) {
13560 BigFloat bf;14633 BigFloat bf;
13561 bigfloat_init_bigint(&bf, &value->value->data.x_bigint);14634 bigfloat_init_bigint(&bf, &value->value->data.x_bigint);
...@@ -13567,7 +14640,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13567,7 +14640,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13567 }14640 }
13568 zig_unreachable();14641 zig_unreachable();
13569 } else {14642 } else {
13570 return ira->codegen->invalid_instruction;14643 return ira->codegen->invalid_inst_gen;
13571 }14644 }
13572 }14645 }
1357314646
...@@ -13603,13 +14676,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13603,13 +14676,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13603 actual_type->data.pointer.ptr_len == PtrLenSingle &&14676 actual_type->data.pointer.ptr_len == PtrLenSingle &&
13604 actual_type->data.pointer.child_type->id == ZigTypeIdArray)14677 actual_type->data.pointer.child_type->id == ZigTypeIdArray)
13605 {14678 {
13606 IrInstruction *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.maybe.child_type, value);14679 IrInstGen *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.maybe.child_type, value);
13607 if (type_is_invalid(cast1->value->type))14680 if (type_is_invalid(cast1->value->type))
13608 return ira->codegen->invalid_instruction;14681 return ira->codegen->invalid_inst_gen;
1360914682
13610 IrInstruction *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);14683 IrInstGen *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
13611 if (type_is_invalid(cast2->value->type))14684 if (type_is_invalid(cast2->value->type))
13612 return ira->codegen->invalid_instruction;14685 return ira->codegen->invalid_inst_gen;
1361314686
13614 return cast2;14687 return cast2;
13615 }14688 }
...@@ -13630,9 +14703,9 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13630,9 +14703,9 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13630 actual_array_type->data.array.sentinel)))14703 actual_array_type->data.array.sentinel)))
13631 {14704 {
13632 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))14705 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
13633 return ira->codegen->invalid_instruction;14706 return ira->codegen->invalid_inst_gen;
13634 if ((err = type_resolve(ira->codegen, wanted_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))14707 if ((err = type_resolve(ira->codegen, wanted_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
13635 return ira->codegen->invalid_instruction;14708 return ira->codegen->invalid_inst_gen;
13636 if (get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, wanted_type) &&14709 if (get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, wanted_type) &&
13637 types_match_const_cast_only(ira, wanted_type->data.pointer.child_type,14710 types_match_const_cast_only(ira, wanted_type->data.pointer.child_type,
13638 actual_type->data.pointer.child_type->data.array.child_type, source_node,14711 actual_type->data.pointer.child_type->data.array.child_type, source_node,
...@@ -13673,24 +14746,24 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13673,24 +14746,24 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13673 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type,14746 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type,
13674 ResolveStatusAlignmentKnown)))14747 ResolveStatusAlignmentKnown)))
13675 {14748 {
13676 return ira->codegen->invalid_instruction;14749 return ira->codegen->invalid_inst_gen;
13677 }14750 }
13678 if ((err = type_resolve(ira->codegen, slice_ptr_type->data.pointer.child_type,14751 if ((err = type_resolve(ira->codegen, slice_ptr_type->data.pointer.child_type,
13679 ResolveStatusAlignmentKnown)))14752 ResolveStatusAlignmentKnown)))
13680 {14753 {
13681 return ira->codegen->invalid_instruction;14754 return ira->codegen->invalid_inst_gen;
13682 }14755 }
13683 ok_align = get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, slice_ptr_type);14756 ok_align = get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, slice_ptr_type);
13684 }14757 }
13685 if (ok_align) {14758 if (ok_align) {
13686 if (wanted_type->id == ZigTypeIdErrorUnion) {14759 if (wanted_type->id == ZigTypeIdErrorUnion) {
13687 IrInstruction *cast1 = ir_analyze_cast(ira, source_instr, slice_type, value);14760 IrInstGen *cast1 = ir_analyze_cast(ira, source_instr, slice_type, value);
13688 if (type_is_invalid(cast1->value->type))14761 if (type_is_invalid(cast1->value->type))
13689 return ira->codegen->invalid_instruction;14762 return ira->codegen->invalid_inst_gen;
1369014763
13691 IrInstruction *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);14764 IrInstGen *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
13692 if (type_is_invalid(cast2->value->type))14765 if (type_is_invalid(cast2->value->type))
13693 return ira->codegen->invalid_instruction;14766 return ira->codegen->invalid_inst_gen;
1369414767
13695 return cast2;14768 return cast2;
13696 } else {14769 } else {
...@@ -13725,12 +14798,12 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13725,12 +14798,12 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13725 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type,14798 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type,
13726 ResolveStatusAlignmentKnown)))14799 ResolveStatusAlignmentKnown)))
13727 {14800 {
13728 return ira->codegen->invalid_instruction;14801 return ira->codegen->invalid_inst_gen;
13729 }14802 }
13730 if ((err = type_resolve(ira->codegen, slice_ptr_type->data.pointer.child_type,14803 if ((err = type_resolve(ira->codegen, slice_ptr_type->data.pointer.child_type,
13731 ResolveStatusAlignmentKnown)))14804 ResolveStatusAlignmentKnown)))
13732 {14805 {
13733 return ira->codegen->invalid_instruction;14806 return ira->codegen->invalid_inst_gen;
13734 }14807 }
13735 ok_align = get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, slice_ptr_type);14808 ok_align = get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, slice_ptr_type);
13736 }14809 }
...@@ -13771,7 +14844,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13771,7 +14844,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13771 }14844 }
13772 }14845 }
13773 if (ok) {14846 if (ok) {
13774 IrInstruction *cast1 = ir_analyze_frame_ptr_to_anyframe(ira, source_instr, value, anyframe_type);14847 IrInstGen *cast1 = ir_analyze_frame_ptr_to_anyframe(ira, source_instr, value, anyframe_type);
13775 if (anyframe_type == wanted_type)14848 if (anyframe_type == wanted_type)
13776 return cast1;14849 return cast1;
13777 return ir_analyze_cast(ira, source_instr, wanted_type, cast1);14850 return ir_analyze_cast(ira, source_instr, wanted_type, cast1);
...@@ -13826,28 +14899,28 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13826,28 +14899,28 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13826 if (actual_type->id == ZigTypeIdEnumLiteral &&14899 if (actual_type->id == ZigTypeIdEnumLiteral &&
13827 (wanted_type->id == ZigTypeIdOptional && wanted_type->data.maybe.child_type->id == ZigTypeIdEnum))14900 (wanted_type->id == ZigTypeIdOptional && wanted_type->data.maybe.child_type->id == ZigTypeIdEnum))
13828 {14901 {
13829 IrInstruction *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.maybe.child_type);14902 IrInstGen *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.maybe.child_type);
13830 if (result == ira->codegen->invalid_instruction)14903 if (type_is_invalid(result->value->type))
13831 return result;14904 return result;
1383214905
13833 return ir_analyze_optional_wrap(ira, result, value, wanted_type, nullptr);14906 return ir_analyze_optional_wrap(ira, source_instr, value, wanted_type, nullptr);
13834 }14907 }
1383514908
13836 // cast from enum literal to error union when payload is an enum14909 // cast from enum literal to error union when payload is an enum
13837 if (actual_type->id == ZigTypeIdEnumLiteral &&14910 if (actual_type->id == ZigTypeIdEnumLiteral &&
13838 (wanted_type->id == ZigTypeIdErrorUnion && wanted_type->data.error_union.payload_type->id == ZigTypeIdEnum))14911 (wanted_type->id == ZigTypeIdErrorUnion && wanted_type->data.error_union.payload_type->id == ZigTypeIdEnum))
13839 {14912 {
13840 IrInstruction *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.error_union.payload_type);14913 IrInstGen *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.error_union.payload_type);
13841 if (result == ira->codegen->invalid_instruction)14914 if (type_is_invalid(result->value->type))
13842 return result;14915 return result;
1384314916
13844 return ir_analyze_err_wrap_payload(ira, result, value, wanted_type, nullptr);14917 return ir_analyze_err_wrap_payload(ira, source_instr, value, wanted_type, nullptr);
13845 }14918 }
1384614919
13847 // cast from union to the enum type of the union14920 // cast from union to the enum type of the union
13848 if (actual_type->id == ZigTypeIdUnion && wanted_type->id == ZigTypeIdEnum) {14921 if (actual_type->id == ZigTypeIdUnion && wanted_type->id == ZigTypeIdEnum) {
13849 if ((err = type_resolve(ira->codegen, actual_type, ResolveStatusZeroBitsKnown)))14922 if ((err = type_resolve(ira->codegen, actual_type, ResolveStatusZeroBitsKnown)))
13850 return ira->codegen->invalid_instruction;14923 return ira->codegen->invalid_inst_gen;
1385114924
13852 if (actual_type->data.unionation.tag_type == wanted_type) {14925 if (actual_type->data.unionation.tag_type == wanted_type) {
13853 return ir_analyze_union_to_tag(ira, source_instr, value, wanted_type);14926 return ir_analyze_union_to_tag(ira, source_instr, value, wanted_type);
...@@ -13875,8 +14948,8 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13875,8 +14948,8 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13875 (!actual_type->data.pointer.is_const || wanted_type->data.pointer.is_const) &&14948 (!actual_type->data.pointer.is_const || wanted_type->data.pointer.is_const) &&
13876 (!actual_type->data.pointer.is_volatile || wanted_type->data.pointer.is_volatile))14949 (!actual_type->data.pointer.is_volatile || wanted_type->data.pointer.is_volatile))
13877 {14950 {
13878 if ((err = ir_cast_ptr_align(ira, source_instr, wanted_type, actual_type, value->source_node)))14951 if ((err = ir_cast_ptr_align(ira, source_instr, wanted_type, actual_type, value->base.source_node)))
13879 return ira->codegen->invalid_instruction;14952 return ira->codegen->invalid_inst_gen;
1388014953
13881 return ir_analyze_ptr_to_array(ira, source_instr, value, wanted_type);14954 return ir_analyze_ptr_to_array(ira, source_instr, value, wanted_type);
13882 }14955 }
...@@ -13899,7 +14972,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13899,7 +14972,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13899 slice_ptr_type->data.pointer.sentinel))))14972 slice_ptr_type->data.pointer.sentinel))))
13900 {14973 {
13901 TypeStructField *ptr_field = actual_type->data.structure.fields[slice_ptr_index];14974 TypeStructField *ptr_field = actual_type->data.structure.fields[slice_ptr_index];
13902 IrInstruction *slice_ptr = ir_analyze_struct_value_field_value(ira, source_instr, value, ptr_field);14975 IrInstGen *slice_ptr = ir_analyze_struct_value_field_value(ira, source_instr, value, ptr_field);
13903 return ir_implicit_cast2(ira, source_instr, slice_ptr, wanted_type);14976 return ir_implicit_cast2(ira, source_instr, slice_ptr, wanted_type);
13904 }14977 }
13905 }14978 }
...@@ -13930,7 +15003,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13930,7 +15003,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
13930 {15003 {
13931 bool has_bits;15004 bool has_bits;
13932 if ((err = type_has_bits2(ira->codegen, actual_type, &has_bits)))15005 if ((err = type_has_bits2(ira->codegen, actual_type, &has_bits)))
13933 return ira->codegen->invalid_instruction;15006 return ira->codegen->invalid_inst_gen;
13934 if (!has_bits) {15007 if (!has_bits) {
13935 return ir_get_ref(ira, source_instr, value, false, false);15008 return ir_get_ref(ira, source_instr, value, false, false);
13936 }15009 }
...@@ -13997,9 +15070,9 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -13997,9 +15070,9 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1399715070
13998 // T to ?U, where T implicitly casts to U15071 // T to ?U, where T implicitly casts to U
13999 if (wanted_type->id == ZigTypeIdOptional && actual_type->id != ZigTypeIdOptional) {15072 if (wanted_type->id == ZigTypeIdOptional && actual_type->id != ZigTypeIdOptional) {
14000 IrInstruction *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.maybe.child_type);15073 IrInstGen *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.maybe.child_type);
14001 if (type_is_invalid(cast1->value->type))15074 if (type_is_invalid(cast1->value->type))
14002 return ira->codegen->invalid_instruction;15075 return ira->codegen->invalid_inst_gen;
14003 return ir_implicit_cast2(ira, source_instr, cast1, wanted_type);15076 return ir_implicit_cast2(ira, source_instr, cast1, wanted_type);
14004 }15077 }
1400515078
...@@ -14007,9 +15080,9 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -14007,9 +15080,9 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
14007 if (wanted_type->id == ZigTypeIdErrorUnion && actual_type->id != ZigTypeIdErrorUnion &&15080 if (wanted_type->id == ZigTypeIdErrorUnion && actual_type->id != ZigTypeIdErrorUnion &&
14008 actual_type->id != ZigTypeIdErrorSet)15081 actual_type->id != ZigTypeIdErrorSet)
14009 {15082 {
14010 IrInstruction *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.error_union.payload_type);15083 IrInstGen *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.error_union.payload_type);
14011 if (type_is_invalid(cast1->value->type))15084 if (type_is_invalid(cast1->value->type))
14012 return ira->codegen->invalid_instruction;15085 return ira->codegen->invalid_inst_gen;
14013 return ir_implicit_cast2(ira, source_instr, cast1, wanted_type);15086 return ir_implicit_cast2(ira, source_instr, cast1, wanted_type);
14014 }15087 }
1401515088
...@@ -14018,14 +15091,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst...@@ -14018,14 +15091,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
14018 buf_ptr(&wanted_type->name),15091 buf_ptr(&wanted_type->name),
14019 buf_ptr(&actual_type->name)));15092 buf_ptr(&actual_type->name)));
14020 report_recursive_error(ira, source_instr->source_node, &const_cast_result, parent_msg);15093 report_recursive_error(ira, source_instr->source_node, &const_cast_result, parent_msg);
14021 return ira->codegen->invalid_instruction;15094 return ira->codegen->invalid_inst_gen;
14022}15095}
1402315096
14024static IrInstruction *ir_implicit_cast2(IrAnalyze *ira, IrInstruction *value_source_instr,15097static IrInstGen *ir_implicit_cast2(IrAnalyze *ira, IrInst *value_source_instr,
14025 IrInstruction *value, ZigType *expected_type)15098 IrInstGen *value, ZigType *expected_type)
14026{15099{
14027 assert(value);15100 assert(value);
14028 assert(value != ira->codegen->invalid_instruction);
14029 assert(!expected_type || !type_is_invalid(expected_type));15101 assert(!expected_type || !type_is_invalid(expected_type));
14030 assert(value->value->type);15102 assert(value->value->type);
14031 assert(!type_is_invalid(value->value->type));15103 assert(!type_is_invalid(value->value->type));
...@@ -14039,17 +15111,17 @@ static IrInstruction *ir_implicit_cast2(IrAnalyze *ira, IrInstruction *value_sou...@@ -14039,17 +15111,17 @@ static IrInstruction *ir_implicit_cast2(IrAnalyze *ira, IrInstruction *value_sou
14039 return ir_analyze_cast(ira, value_source_instr, expected_type, value);15111 return ir_analyze_cast(ira, value_source_instr, expected_type, value);
14040}15112}
1404115113
14042static IrInstruction *ir_implicit_cast(IrAnalyze *ira, IrInstruction *value, ZigType *expected_type) {15114static IrInstGen *ir_implicit_cast(IrAnalyze *ira, IrInstGen *value, ZigType *expected_type) {
14043 return ir_implicit_cast2(ira, value, value, expected_type);15115 return ir_implicit_cast2(ira, &value->base, value, expected_type);
14044}15116}
1404515117
14046static ZigType *get_ptr_elem_type(CodeGen *g, IrInstruction *ptr) {15118static ZigType *get_ptr_elem_type(CodeGen *g, IrInstGen *ptr) {
14047 ir_assert(ptr->value->type->id == ZigTypeIdPointer, ptr);15119 ir_assert_gen(ptr->value->type->id == ZigTypeIdPointer, ptr);
14048 ZigType *elem_type = ptr->value->type->data.pointer.child_type;15120 ZigType *elem_type = ptr->value->type->data.pointer.child_type;
14049 if (elem_type != g->builtin_types.entry_var)15121 if (elem_type != g->builtin_types.entry_var)
14050 return elem_type;15122 return elem_type;
1405115123
14052 if (ir_resolve_lazy(g, ptr->source_node, ptr->value))15124 if (ir_resolve_lazy(g, ptr->base.source_node, ptr->value))
14053 return g->builtin_types.entry_invalid;15125 return g->builtin_types.entry_invalid;
1405415126
14055 assert(value_is_comptime(ptr->value));15127 assert(value_is_comptime(ptr->value));
...@@ -14057,28 +15129,28 @@ static ZigType *get_ptr_elem_type(CodeGen *g, IrInstruction *ptr) {...@@ -14057,28 +15129,28 @@ static ZigType *get_ptr_elem_type(CodeGen *g, IrInstruction *ptr) {
14057 return pointee->type;15129 return pointee->type;
14058}15130}
1405915131
14060static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruction, IrInstruction *ptr,15132static IrInstGen *ir_get_deref(IrAnalyze *ira, IrInst* source_instruction, IrInstGen *ptr,
14061 ResultLoc *result_loc)15133 ResultLoc *result_loc)
14062{15134{
14063 Error err;15135 Error err;
14064 ZigType *ptr_type = ptr->value->type;15136 ZigType *ptr_type = ptr->value->type;
14065 if (type_is_invalid(ptr_type))15137 if (type_is_invalid(ptr_type))
14066 return ira->codegen->invalid_instruction;15138 return ira->codegen->invalid_inst_gen;
1406715139
14068 if (ptr_type->id != ZigTypeIdPointer) {15140 if (ptr_type->id != ZigTypeIdPointer) {
14069 ir_add_error_node(ira, source_instruction->source_node,15141 ir_add_error_node(ira, source_instruction->source_node,
14070 buf_sprintf("attempt to dereference non-pointer type '%s'",15142 buf_sprintf("attempt to dereference non-pointer type '%s'",
14071 buf_ptr(&ptr_type->name)));15143 buf_ptr(&ptr_type->name)));
14072 return ira->codegen->invalid_instruction;15144 return ira->codegen->invalid_inst_gen;
14073 }15145 }
1407415146
14075 ZigType *child_type = ptr_type->data.pointer.child_type;15147 ZigType *child_type = ptr_type->data.pointer.child_type;
14076 if (type_is_invalid(child_type))15148 if (type_is_invalid(child_type))
14077 return ira->codegen->invalid_instruction;15149 return ira->codegen->invalid_inst_gen;
14078 // if the child type has one possible value, the deref is comptime15150 // if the child type has one possible value, the deref is comptime
14079 switch (type_has_one_possible_value(ira->codegen, child_type)) {15151 switch (type_has_one_possible_value(ira->codegen, child_type)) {
14080 case OnePossibleValueInvalid:15152 case OnePossibleValueInvalid:
14081 return ira->codegen->invalid_instruction;15153 return ira->codegen->invalid_inst_gen;
14082 case OnePossibleValueYes:15154 case OnePossibleValueYes:
14083 return ir_const_move(ira, source_instruction,15155 return ir_const_move(ira, source_instruction,
14084 get_the_one_possible_value(ira->codegen, child_type));15156 get_the_one_possible_value(ira->codegen, child_type));
...@@ -14087,8 +15159,8 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc...@@ -14087,8 +15159,8 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
14087 }15159 }
14088 if (instr_is_comptime(ptr)) {15160 if (instr_is_comptime(ptr)) {
14089 if (ptr->value->special == ConstValSpecialUndef) {15161 if (ptr->value->special == ConstValSpecialUndef) {
14090 ir_add_error(ira, ptr, buf_sprintf("attempt to dereference undefined value"));15162 ir_add_error(ira, &ptr->base, buf_sprintf("attempt to dereference undefined value"));
14091 return ira->codegen->invalid_instruction;15163 return ira->codegen->invalid_inst_gen;
14092 }15164 }
14093 if (ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {15165 if (ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
14094 ZigValue *pointee = const_ptr_pointee_unchecked(ira->codegen, ptr->value);15166 ZigValue *pointee = const_ptr_pointee_unchecked(ira->codegen, ptr->value);
...@@ -14096,12 +15168,12 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc...@@ -14096,12 +15168,12 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
14096 child_type = pointee->type;15168 child_type = pointee->type;
14097 }15169 }
14098 if (pointee->special != ConstValSpecialRuntime) {15170 if (pointee->special != ConstValSpecialRuntime) {
14099 IrInstruction *result = ir_const(ira, source_instruction, child_type);15171 IrInstGen *result = ir_const(ira, source_instruction, child_type);
1410015172
14101 if ((err = ir_read_const_ptr(ira, ira->codegen, source_instruction->source_node, result->value,15173 if ((err = ir_read_const_ptr(ira, ira->codegen, source_instruction->source_node, result->value,
14102 ptr->value)))15174 ptr->value)))
14103 {15175 {
14104 return ira->codegen->invalid_instruction;15176 return ira->codegen->invalid_inst_gen;
14105 }15177 }
14106 result->value->type = child_type;15178 result->value->type = child_type;
14107 return result;15179 return result;
...@@ -14110,38 +15182,37 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc...@@ -14110,38 +15182,37 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
14110 }15182 }
1411115183
14112 // if the instruction is a const ref instruction we can skip it15184 // if the instruction is a const ref instruction we can skip it
14113 if (ptr->id == IrInstructionIdRef) {15185 if (ptr->id == IrInstGenIdRef) {
14114 IrInstructionRef *ref_inst = reinterpret_cast<IrInstructionRef *>(ptr);15186 IrInstGenRef *ref_inst = reinterpret_cast<IrInstGenRef *>(ptr);
14115 return ref_inst->value;15187 return ref_inst->operand;
14116 }15188 }
1411715189
14118 // If the instruction is a element pointer instruction to a vector, we emit15190 // If the instruction is a element pointer instruction to a vector, we emit
14119 // vector element extract instruction rather than load pointer. If the15191 // vector element extract instruction rather than load pointer. If the
14120 // pointer type has non-VECTOR_INDEX_RUNTIME value, it would have been15192 // pointer type has non-VECTOR_INDEX_RUNTIME value, it would have been
14121 // possible to implement this in the codegen for IrInstructionLoadPtrGen.15193 // possible to implement this in the codegen for IrInstGenLoadPtr.
14122 // However if it has VECTOR_INDEX_RUNTIME then we must emit a compile error15194 // However if it has VECTOR_INDEX_RUNTIME then we must emit a compile error
14123 // if the vector index cannot be determined right here, right now, because15195 // if the vector index cannot be determined right here, right now, because
14124 // the type information does not contain enough information to actually15196 // the type information does not contain enough information to actually
14125 // perform a dereference.15197 // perform a dereference.
14126 if (ptr_type->data.pointer.vector_index == VECTOR_INDEX_RUNTIME) {15198 if (ptr_type->data.pointer.vector_index == VECTOR_INDEX_RUNTIME) {
14127 if (ptr->id == IrInstructionIdElemPtr) {15199 if (ptr->id == IrInstGenIdElemPtr) {
14128 IrInstructionElemPtr *elem_ptr = (IrInstructionElemPtr *)ptr;15200 IrInstGenElemPtr *elem_ptr = (IrInstGenElemPtr *)ptr;
14129 IrInstruction *vector_loaded = ir_get_deref(ira, elem_ptr->array_ptr,15201 IrInstGen *vector_loaded = ir_get_deref(ira, &elem_ptr->array_ptr->base,
14130 elem_ptr->array_ptr, nullptr);15202 elem_ptr->array_ptr, nullptr);
14131 IrInstruction *elem_index = elem_ptr->elem_index;15203 IrInstGen *elem_index = elem_ptr->elem_index;
14132 return ir_build_vector_extract_elem(ira, source_instruction, vector_loaded, elem_index);15204 return ir_build_vector_extract_elem(ira, source_instruction, vector_loaded, elem_index);
14133 }15205 }
14134 ir_add_error(ira, ptr,15206 ir_add_error(ira, &ptr->base,
14135 buf_sprintf("unable to determine vector element index of type '%s'", buf_ptr(&ptr_type->name)));15207 buf_sprintf("unable to determine vector element index of type '%s'", buf_ptr(&ptr_type->name)));
14136 return ira->codegen->invalid_instruction;15208 return ira->codegen->invalid_inst_gen;
14137 }15209 }
1413815210
14139 IrInstruction *result_loc_inst;15211 IrInstGen *result_loc_inst;
14140 if (ptr_type->data.pointer.host_int_bytes != 0 && handle_is_ptr(child_type)) {15212 if (ptr_type->data.pointer.host_int_bytes != 0 && handle_is_ptr(child_type)) {
14141 if (result_loc == nullptr) result_loc = no_result_loc();15213 if (result_loc == nullptr) result_loc = no_result_loc();
14142 result_loc_inst = ir_resolve_result(ira, source_instruction, result_loc, child_type, nullptr,15214 result_loc_inst = ir_resolve_result(ira, source_instruction, result_loc, child_type, nullptr, true, true);
14143 true, true);15215 if (type_is_invalid(result_loc_inst->value->type) || result_loc_inst->value->type->id == ZigTypeIdUnreachable) {
14144 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
14145 return result_loc_inst;15216 return result_loc_inst;
14146 }15217 }
14147 } else {15218 } else {
...@@ -14151,7 +15222,7 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc...@@ -14151,7 +15222,7 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
14151 return ir_build_load_ptr_gen(ira, source_instruction, ptr, child_type, result_loc_inst);15222 return ir_build_load_ptr_gen(ira, source_instruction, ptr, child_type, result_loc_inst);
14152}15223}
1415315224
14154static bool ir_resolve_const_align(CodeGen *codegen, IrExecutable *exec, AstNode *source_node,15225static bool ir_resolve_const_align(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node,
14155 ZigValue *const_val, uint32_t *out)15226 ZigValue *const_val, uint32_t *out)
14156{15227{
14157 Error err;15228 Error err;
...@@ -14160,12 +15231,12 @@ static bool ir_resolve_const_align(CodeGen *codegen, IrExecutable *exec, AstNode...@@ -14160,12 +15231,12 @@ static bool ir_resolve_const_align(CodeGen *codegen, IrExecutable *exec, AstNode
1416015231
14161 uint32_t align_bytes = bigint_as_u32(&const_val->data.x_bigint);15232 uint32_t align_bytes = bigint_as_u32(&const_val->data.x_bigint);
14162 if (align_bytes == 0) {15233 if (align_bytes == 0) {
14163 exec_add_error_node(codegen, exec, source_node, buf_sprintf("alignment must be >= 1"));15234 exec_add_error_node_gen(codegen, exec, source_node, buf_sprintf("alignment must be >= 1"));
14164 return false;15235 return false;
14165 }15236 }
1416615237
14167 if (!is_power_of_2(align_bytes)) {15238 if (!is_power_of_2(align_bytes)) {
14168 exec_add_error_node(codegen, exec, source_node,15239 exec_add_error_node_gen(codegen, exec, source_node,
14169 buf_sprintf("alignment value %" PRIu32 " is not a power of 2", align_bytes));15240 buf_sprintf("alignment value %" PRIu32 " is not a power of 2", align_bytes));
14170 return false;15241 return false;
14171 }15242 }
...@@ -14174,7 +15245,7 @@ static bool ir_resolve_const_align(CodeGen *codegen, IrExecutable *exec, AstNode...@@ -14174,7 +15245,7 @@ static bool ir_resolve_const_align(CodeGen *codegen, IrExecutable *exec, AstNode
14174 return true;15245 return true;
14175}15246}
1417615247
14177static bool ir_resolve_align(IrAnalyze *ira, IrInstruction *value, ZigType *elem_type, uint32_t *out) {15248static bool ir_resolve_align(IrAnalyze *ira, IrInstGen *value, ZigType *elem_type, uint32_t *out) {
14178 if (type_is_invalid(value->value->type))15249 if (type_is_invalid(value->value->type))
14179 return false;15250 return false;
1418015251
...@@ -14195,19 +15266,19 @@ static bool ir_resolve_align(IrAnalyze *ira, IrInstruction *value, ZigType *elem...@@ -14195,19 +15266,19 @@ static bool ir_resolve_align(IrAnalyze *ira, IrInstruction *value, ZigType *elem
14195 }15266 }
14196 }15267 }
1419715268
14198 IrInstruction *casted_value = ir_implicit_cast(ira, value, get_align_amt_type(ira->codegen));15269 IrInstGen *casted_value = ir_implicit_cast(ira, value, get_align_amt_type(ira->codegen));
14199 if (type_is_invalid(casted_value->value->type))15270 if (type_is_invalid(casted_value->value->type))
14200 return false;15271 return false;
1420115272
14202 return ir_resolve_const_align(ira->codegen, ira->new_irb.exec, value->source_node,15273 return ir_resolve_const_align(ira->codegen, ira->new_irb.exec, value->base.source_node,
14203 casted_value->value, out);15274 casted_value->value, out);
14204}15275}
1420515276
14206static bool ir_resolve_unsigned(IrAnalyze *ira, IrInstruction *value, ZigType *int_type, uint64_t *out) {15277static bool ir_resolve_unsigned(IrAnalyze *ira, IrInstGen *value, ZigType *int_type, uint64_t *out) {
14207 if (type_is_invalid(value->value->type))15278 if (type_is_invalid(value->value->type))
14208 return false;15279 return false;
1420915280
14210 IrInstruction *casted_value = ir_implicit_cast(ira, value, int_type);15281 IrInstGen *casted_value = ir_implicit_cast(ira, value, int_type);
14211 if (type_is_invalid(casted_value->value->type))15282 if (type_is_invalid(casted_value->value->type))
14212 return false;15283 return false;
1421315284
...@@ -14219,15 +15290,15 @@ static bool ir_resolve_unsigned(IrAnalyze *ira, IrInstruction *value, ZigType *i...@@ -14219,15 +15290,15 @@ static bool ir_resolve_unsigned(IrAnalyze *ira, IrInstruction *value, ZigType *i
14219 return true;15290 return true;
14220}15291}
1422115292
14222static bool ir_resolve_usize(IrAnalyze *ira, IrInstruction *value, uint64_t *out) {15293static bool ir_resolve_usize(IrAnalyze *ira, IrInstGen *value, uint64_t *out) {
14223 return ir_resolve_unsigned(ira, value, ira->codegen->builtin_types.entry_usize, out);15294 return ir_resolve_unsigned(ira, value, ira->codegen->builtin_types.entry_usize, out);
14224}15295}
1422515296
14226static bool ir_resolve_bool(IrAnalyze *ira, IrInstruction *value, bool *out) {15297static bool ir_resolve_bool(IrAnalyze *ira, IrInstGen *value, bool *out) {
14227 if (type_is_invalid(value->value->type))15298 if (type_is_invalid(value->value->type))
14228 return false;15299 return false;
1422915300
14230 IrInstruction *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_bool);15301 IrInstGen *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_bool);
14231 if (type_is_invalid(casted_value->value->type))15302 if (type_is_invalid(casted_value->value->type))
14232 return false;15303 return false;
1423315304
...@@ -14239,7 +15310,7 @@ static bool ir_resolve_bool(IrAnalyze *ira, IrInstruction *value, bool *out) {...@@ -14239,7 +15310,7 @@ static bool ir_resolve_bool(IrAnalyze *ira, IrInstruction *value, bool *out) {
14239 return true;15310 return true;
14240}15311}
1424115312
14242static bool ir_resolve_comptime(IrAnalyze *ira, IrInstruction *value, bool *out) {15313static bool ir_resolve_comptime(IrAnalyze *ira, IrInstGen *value, bool *out) {
14243 if (!value) {15314 if (!value) {
14244 *out = false;15315 *out = false;
14245 return true;15316 return true;
...@@ -14247,13 +15318,13 @@ static bool ir_resolve_comptime(IrAnalyze *ira, IrInstruction *value, bool *out)...@@ -14247,13 +15318,13 @@ static bool ir_resolve_comptime(IrAnalyze *ira, IrInstruction *value, bool *out)
14247 return ir_resolve_bool(ira, value, out);15318 return ir_resolve_bool(ira, value, out);
14248}15319}
1424915320
14250static bool ir_resolve_atomic_order(IrAnalyze *ira, IrInstruction *value, AtomicOrder *out) {15321static bool ir_resolve_atomic_order(IrAnalyze *ira, IrInstGen *value, AtomicOrder *out) {
14251 if (type_is_invalid(value->value->type))15322 if (type_is_invalid(value->value->type))
14252 return false;15323 return false;
1425315324
14254 ZigType *atomic_order_type = get_builtin_type(ira->codegen, "AtomicOrder");15325 ZigType *atomic_order_type = get_builtin_type(ira->codegen, "AtomicOrder");
1425515326
14256 IrInstruction *casted_value = ir_implicit_cast(ira, value, atomic_order_type);15327 IrInstGen *casted_value = ir_implicit_cast(ira, value, atomic_order_type);
14257 if (type_is_invalid(casted_value->value->type))15328 if (type_is_invalid(casted_value->value->type))
14258 return false;15329 return false;
1425915330
...@@ -14265,13 +15336,13 @@ static bool ir_resolve_atomic_order(IrAnalyze *ira, IrInstruction *value, Atomic...@@ -14265,13 +15336,13 @@ static bool ir_resolve_atomic_order(IrAnalyze *ira, IrInstruction *value, Atomic
14265 return true;15336 return true;
14266}15337}
1426715338
14268static bool ir_resolve_atomic_rmw_op(IrAnalyze *ira, IrInstruction *value, AtomicRmwOp *out) {15339static bool ir_resolve_atomic_rmw_op(IrAnalyze *ira, IrInstGen *value, AtomicRmwOp *out) {
14269 if (type_is_invalid(value->value->type))15340 if (type_is_invalid(value->value->type))
14270 return false;15341 return false;
1427115342
14272 ZigType *atomic_rmw_op_type = get_builtin_type(ira->codegen, "AtomicRmwOp");15343 ZigType *atomic_rmw_op_type = get_builtin_type(ira->codegen, "AtomicRmwOp");
1427315344
14274 IrInstruction *casted_value = ir_implicit_cast(ira, value, atomic_rmw_op_type);15345 IrInstGen *casted_value = ir_implicit_cast(ira, value, atomic_rmw_op_type);
14275 if (type_is_invalid(casted_value->value->type))15346 if (type_is_invalid(casted_value->value->type))
14276 return false;15347 return false;
1427715348
...@@ -14283,13 +15354,13 @@ static bool ir_resolve_atomic_rmw_op(IrAnalyze *ira, IrInstruction *value, Atomi...@@ -14283,13 +15354,13 @@ static bool ir_resolve_atomic_rmw_op(IrAnalyze *ira, IrInstruction *value, Atomi
14283 return true;15354 return true;
14284}15355}
1428515356
14286static bool ir_resolve_global_linkage(IrAnalyze *ira, IrInstruction *value, GlobalLinkageId *out) {15357static bool ir_resolve_global_linkage(IrAnalyze *ira, IrInstGen *value, GlobalLinkageId *out) {
14287 if (type_is_invalid(value->value->type))15358 if (type_is_invalid(value->value->type))
14288 return false;15359 return false;
1428915360
14290 ZigType *global_linkage_type = get_builtin_type(ira->codegen, "GlobalLinkage");15361 ZigType *global_linkage_type = get_builtin_type(ira->codegen, "GlobalLinkage");
1429115362
14292 IrInstruction *casted_value = ir_implicit_cast(ira, value, global_linkage_type);15363 IrInstGen *casted_value = ir_implicit_cast(ira, value, global_linkage_type);
14293 if (type_is_invalid(casted_value->value->type))15364 if (type_is_invalid(casted_value->value->type))
14294 return false;15365 return false;
1429515366
...@@ -14301,13 +15372,13 @@ static bool ir_resolve_global_linkage(IrAnalyze *ira, IrInstruction *value, Glob...@@ -14301,13 +15372,13 @@ static bool ir_resolve_global_linkage(IrAnalyze *ira, IrInstruction *value, Glob
14301 return true;15372 return true;
14302}15373}
1430315374
14304static bool ir_resolve_float_mode(IrAnalyze *ira, IrInstruction *value, FloatMode *out) {15375static bool ir_resolve_float_mode(IrAnalyze *ira, IrInstGen *value, FloatMode *out) {
14305 if (type_is_invalid(value->value->type))15376 if (type_is_invalid(value->value->type))
14306 return false;15377 return false;
1430715378
14308 ZigType *float_mode_type = get_builtin_type(ira->codegen, "FloatMode");15379 ZigType *float_mode_type = get_builtin_type(ira->codegen, "FloatMode");
1430915380
14310 IrInstruction *casted_value = ir_implicit_cast(ira, value, float_mode_type);15381 IrInstGen *casted_value = ir_implicit_cast(ira, value, float_mode_type);
14311 if (type_is_invalid(casted_value->value->type))15382 if (type_is_invalid(casted_value->value->type))
14312 return false;15383 return false;
1431315384
...@@ -14319,14 +15390,14 @@ static bool ir_resolve_float_mode(IrAnalyze *ira, IrInstruction *value, FloatMod...@@ -14319,14 +15390,14 @@ static bool ir_resolve_float_mode(IrAnalyze *ira, IrInstruction *value, FloatMod
14319 return true;15390 return true;
14320}15391}
1432115392
14322static Buf *ir_resolve_str(IrAnalyze *ira, IrInstruction *value) {15393static Buf *ir_resolve_str(IrAnalyze *ira, IrInstGen *value) {
14323 if (type_is_invalid(value->value->type))15394 if (type_is_invalid(value->value->type))
14324 return nullptr;15395 return nullptr;
1432515396
14326 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,15397 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
14327 true, false, PtrLenUnknown, 0, 0, 0, false);15398 true, false, PtrLenUnknown, 0, 0, 0, false);
14328 ZigType *str_type = get_slice_type(ira->codegen, ptr_type);15399 ZigType *str_type = get_slice_type(ira->codegen, ptr_type);
14329 IrInstruction *casted_value = ir_implicit_cast(ira, value, str_type);15400 IrInstGen *casted_value = ir_implicit_cast(ira, value, str_type);
14330 if (type_is_invalid(casted_value->value->type))15401 if (type_is_invalid(casted_value->value->type))
14331 return nullptr;15402 return nullptr;
1433215403
...@@ -14350,7 +15421,7 @@ static Buf *ir_resolve_str(IrAnalyze *ira, IrInstruction *value) {...@@ -14350,7 +15421,7 @@ static Buf *ir_resolve_str(IrAnalyze *ira, IrInstruction *value) {
14350 size_t new_index = ptr_field->data.x_ptr.data.base_array.elem_index + i;15421 size_t new_index = ptr_field->data.x_ptr.data.base_array.elem_index + i;
14351 ZigValue *char_val = &array_val->data.x_array.data.s_none.elements[new_index];15422 ZigValue *char_val = &array_val->data.x_array.data.s_none.elements[new_index];
14352 if (char_val->special == ConstValSpecialUndef) {15423 if (char_val->special == ConstValSpecialUndef) {
14353 ir_add_error(ira, casted_value, buf_sprintf("use of undefined value"));15424 ir_add_error(ira, &casted_value->base, buf_sprintf("use of undefined value"));
14354 return nullptr;15425 return nullptr;
14355 }15426 }
14356 uint64_t big_c = bigint_as_u64(&char_val->data.x_bigint);15427 uint64_t big_c = bigint_as_u64(&char_val->data.x_bigint);
...@@ -14361,10 +15432,10 @@ static Buf *ir_resolve_str(IrAnalyze *ira, IrInstruction *value) {...@@ -14361,10 +15432,10 @@ static Buf *ir_resolve_str(IrAnalyze *ira, IrInstruction *value) {
14361 return result;15432 return result;
14362}15433}
1436315434
14364static IrInstruction *ir_analyze_instruction_add_implicit_return_type(IrAnalyze *ira,15435static IrInstGen *ir_analyze_instruction_add_implicit_return_type(IrAnalyze *ira,
14365 IrInstructionAddImplicitReturnType *instruction)15436 IrInstSrcAddImplicitReturnType *instruction)
14366{15437{
14367 IrInstruction *value = instruction->value->child;15438 IrInstGen *value = instruction->value->child;
14368 if (type_is_invalid(value->value->type))15439 if (type_is_invalid(value->value->type))
14369 return ir_unreach_error(ira);15440 return ir_unreach_error(ira);
1437015441
...@@ -14372,15 +15443,15 @@ static IrInstruction *ir_analyze_instruction_add_implicit_return_type(IrAnalyze...@@ -14372,15 +15443,15 @@ static IrInstruction *ir_analyze_instruction_add_implicit_return_type(IrAnalyze
14372 ira->src_implicit_return_type_list.append(value);15443 ira->src_implicit_return_type_list.append(value);
14373 }15444 }
1437415445
14375 return ir_const_void(ira, &instruction->base);15446 return ir_const_void(ira, &instruction->base.base);
14376}15447}
1437715448
14378static IrInstruction *ir_analyze_instruction_return(IrAnalyze *ira, IrInstructionReturn *instruction) {15449static IrInstGen *ir_analyze_instruction_return(IrAnalyze *ira, IrInstSrcReturn *instruction) {
14379 IrInstruction *operand = instruction->operand->child;15450 IrInstGen *operand = instruction->operand->child;
14380 if (type_is_invalid(operand->value->type))15451 if (type_is_invalid(operand->value->type))
14381 return ir_unreach_error(ira);15452 return ir_unreach_error(ira);
1438215453
14383 IrInstruction *casted_operand = ir_implicit_cast(ira, operand, ira->explicit_return_type);15454 IrInstGen *casted_operand = ir_implicit_cast(ira, operand, ira->explicit_return_type);
14384 if (type_is_invalid(casted_operand->value->type)) {15455 if (type_is_invalid(casted_operand->value->type)) {
14385 AstNode *source_node = ira->explicit_return_type_source_node;15456 AstNode *source_node = ira->explicit_return_type_source_node;
14386 if (source_node != nullptr) {15457 if (source_node != nullptr) {
...@@ -14395,9 +15466,7 @@ static IrInstruction *ir_analyze_instruction_return(IrAnalyze *ira, IrInstructio...@@ -14395,9 +15466,7 @@ static IrInstruction *ir_analyze_instruction_return(IrAnalyze *ira, IrInstructio
14395 handle_is_ptr(ira->explicit_return_type))15466 handle_is_ptr(ira->explicit_return_type))
14396 {15467 {
14397 // result location mechanism took care of it.15468 // result location mechanism took care of it.
14398 IrInstruction *result = ir_build_return(&ira->new_irb, instruction->base.scope,15469 IrInstGen *result = ir_build_return_gen(ira, &instruction->base.base, nullptr);
14399 instruction->base.source_node, nullptr);
14400 result->value->type = ira->codegen->builtin_types.entry_unreachable;
14401 return ir_finish_anal(ira, result);15470 return ir_finish_anal(ira, result);
14402 }15471 }
1440315472
...@@ -14405,47 +15474,45 @@ static IrInstruction *ir_analyze_instruction_return(IrAnalyze *ira, IrInstructio...@@ -14405,47 +15474,45 @@ static IrInstruction *ir_analyze_instruction_return(IrAnalyze *ira, IrInstructio
14405 casted_operand->value->type->id == ZigTypeIdPointer &&15474 casted_operand->value->type->id == ZigTypeIdPointer &&
14406 casted_operand->value->data.rh_ptr == RuntimeHintPtrStack)15475 casted_operand->value->data.rh_ptr == RuntimeHintPtrStack)
14407 {15476 {
14408 ir_add_error(ira, casted_operand, buf_sprintf("function returns address of local variable"));15477 ir_add_error(ira, &casted_operand->base, buf_sprintf("function returns address of local variable"));
14409 return ir_unreach_error(ira);15478 return ir_unreach_error(ira);
14410 }15479 }
1441115480
14412 IrInstruction *result = ir_build_return(&ira->new_irb, instruction->base.scope,15481 IrInstGen *result = ir_build_return_gen(ira, &instruction->base.base, casted_operand);
14413 instruction->base.source_node, casted_operand);
14414 result->value->type = ira->codegen->builtin_types.entry_unreachable;
14415 return ir_finish_anal(ira, result);15482 return ir_finish_anal(ira, result);
14416}15483}
1441715484
14418static IrInstruction *ir_analyze_instruction_const(IrAnalyze *ira, IrInstructionConst *instruction) {15485static IrInstGen *ir_analyze_instruction_const(IrAnalyze *ira, IrInstSrcConst *instruction) {
14419 return ir_const_move(ira, &instruction->base, instruction->base.value);15486 return ir_const_move(ira, &instruction->base.base, instruction->value);
14420}15487}
1442115488
14422static IrInstruction *ir_analyze_bin_op_bool(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {15489static IrInstGen *ir_analyze_bin_op_bool(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
14423 IrInstruction *op1 = bin_op_instruction->op1->child;15490 IrInstGen *op1 = bin_op_instruction->op1->child;
14424 if (type_is_invalid(op1->value->type))15491 if (type_is_invalid(op1->value->type))
14425 return ira->codegen->invalid_instruction;15492 return ira->codegen->invalid_inst_gen;
1442615493
14427 IrInstruction *op2 = bin_op_instruction->op2->child;15494 IrInstGen *op2 = bin_op_instruction->op2->child;
14428 if (type_is_invalid(op2->value->type))15495 if (type_is_invalid(op2->value->type))
14429 return ira->codegen->invalid_instruction;15496 return ira->codegen->invalid_inst_gen;
1443015497
14431 ZigType *bool_type = ira->codegen->builtin_types.entry_bool;15498 ZigType *bool_type = ira->codegen->builtin_types.entry_bool;
1443215499
14433 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, bool_type);15500 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, bool_type);
14434 if (casted_op1 == ira->codegen->invalid_instruction)15501 if (type_is_invalid(casted_op1->value->type))
14435 return ira->codegen->invalid_instruction;15502 return ira->codegen->invalid_inst_gen;
1443615503
14437 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, bool_type);15504 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, bool_type);
14438 if (casted_op2 == ira->codegen->invalid_instruction)15505 if (type_is_invalid(casted_op2->value->type))
14439 return ira->codegen->invalid_instruction;15506 return ira->codegen->invalid_inst_gen;
1444015507
14441 if (instr_is_comptime(casted_op1) && instr_is_comptime(casted_op2)) {15508 if (instr_is_comptime(casted_op1) && instr_is_comptime(casted_op2)) {
14442 ZigValue *op1_val = ir_resolve_const(ira, casted_op1, UndefBad);15509 ZigValue *op1_val = ir_resolve_const(ira, casted_op1, UndefBad);
14443 if (op1_val == nullptr)15510 if (op1_val == nullptr)
14444 return ira->codegen->invalid_instruction;15511 return ira->codegen->invalid_inst_gen;
1444515512
14446 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);15513 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
14447 if (op2_val == nullptr)15514 if (op2_val == nullptr)
14448 return ira->codegen->invalid_instruction;15515 return ira->codegen->invalid_inst_gen;
1444915516
14450 assert(casted_op1->value->type->id == ZigTypeIdBool);15517 assert(casted_op1->value->type->id == ZigTypeIdBool);
14451 assert(casted_op2->value->type->id == ZigTypeIdBool);15518 assert(casted_op2->value->type->id == ZigTypeIdBool);
...@@ -14457,14 +15524,11 @@ static IrInstruction *ir_analyze_bin_op_bool(IrAnalyze *ira, IrInstructionBinOp...@@ -14457,14 +15524,11 @@ static IrInstruction *ir_analyze_bin_op_bool(IrAnalyze *ira, IrInstructionBinOp
14457 } else {15524 } else {
14458 zig_unreachable();15525 zig_unreachable();
14459 }15526 }
14460 return ir_const_bool(ira, &bin_op_instruction->base, result_bool);15527 return ir_const_bool(ira, &bin_op_instruction->base.base, result_bool);
14461 }15528 }
1446215529
14463 IrInstruction *result = ir_build_bin_op(&ira->new_irb,15530 return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, bool_type,
14464 bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
14465 bin_op_instruction->op_id, casted_op1, casted_op2, bin_op_instruction->safety_check_on);15531 bin_op_instruction->op_id, casted_op1, casted_op2, bin_op_instruction->safety_check_on);
14466 result->value->type = bool_type;
14467 return result;
14468}15532}
1446915533
14470static bool resolve_cmp_op_id(IrBinOp op_id, Cmp cmp) {15534static bool resolve_cmp_op_id(IrBinOp op_id, Cmp cmp) {
...@@ -14529,12 +15593,13 @@ static void set_optional_payload(ZigValue *opt_val, ZigValue *payload) {...@@ -14529,12 +15593,13 @@ static void set_optional_payload(ZigValue *opt_val, ZigValue *payload) {
14529 }15593 }
14530}15594}
1453115595
14532static IrInstruction *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_type,15596static IrInstGen *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_type,
14533 ZigValue *op1_val, ZigValue *op2_val, IrInstructionBinOp *bin_op_instruction, IrBinOp op_id,15597 ZigValue *op1_val, ZigValue *op2_val, IrInstSrcBinOp *bin_op_instruction, IrBinOp op_id,
14534 bool one_possible_value) {15598 bool one_possible_value)
15599{
14535 if (op1_val->special == ConstValSpecialUndef ||15600 if (op1_val->special == ConstValSpecialUndef ||
14536 op2_val->special == ConstValSpecialUndef)15601 op2_val->special == ConstValSpecialUndef)
14537 return ir_const_undef(ira, &bin_op_instruction->base, resolved_type);15602 return ir_const_undef(ira, &bin_op_instruction->base.base, resolved_type);
14538 if (resolved_type->id == ZigTypeIdPointer && op_id != IrBinOpCmpEq && op_id != IrBinOpCmpNotEq) {15603 if (resolved_type->id == ZigTypeIdPointer && op_id != IrBinOpCmpEq && op_id != IrBinOpCmpNotEq) {
14539 if ((op1_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr ||15604 if ((op1_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr ||
14540 op1_val->data.x_ptr.special == ConstPtrSpecialNull) &&15605 op1_val->data.x_ptr.special == ConstPtrSpecialNull) &&
...@@ -14554,7 +15619,7 @@ static IrInstruction *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_t...@@ -14554,7 +15619,7 @@ static IrInstruction *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_t
14554 cmp_result = CmpEQ;15619 cmp_result = CmpEQ;
14555 }15620 }
14556 bool answer = resolve_cmp_op_id(op_id, cmp_result);15621 bool answer = resolve_cmp_op_id(op_id, cmp_result);
14557 return ir_const_bool(ira, &bin_op_instruction->base, answer);15622 return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
14558 }15623 }
14559 } else {15624 } else {
14560 bool are_equal = one_possible_value || const_values_equal(ira->codegen, op1_val, op2_val);15625 bool are_equal = one_possible_value || const_values_equal(ira->codegen, op1_val, op2_val);
...@@ -14566,7 +15631,7 @@ static IrInstruction *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_t...@@ -14566,7 +15631,7 @@ static IrInstruction *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_t
14566 } else {15631 } else {
14567 zig_unreachable();15632 zig_unreachable();
14568 }15633 }
14569 return ir_const_bool(ira, &bin_op_instruction->base, answer);15634 return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
14570 }15635 }
14571 zig_unreachable();15636 zig_unreachable();
14572}15637}
...@@ -14620,7 +15685,7 @@ static Error lazy_cmp_zero(AstNode *source_node, ZigValue *val, Cmp *result) {...@@ -14620,7 +15685,7 @@ static Error lazy_cmp_zero(AstNode *source_node, ZigValue *val, Cmp *result) {
14620 zig_unreachable();15685 zig_unreachable();
14621}15686}
1462215687
14623static ErrorMsg *ir_eval_bin_op_cmp_scalar(IrAnalyze *ira, IrInstruction *source_instr,15688static ErrorMsg *ir_eval_bin_op_cmp_scalar(IrAnalyze *ira, IrInst* source_instr,
14624 ZigValue *op1_val, IrBinOp op_id, ZigValue *op2_val, ZigValue *out_val)15689 ZigValue *op1_val, IrBinOp op_id, ZigValue *op2_val, ZigValue *out_val)
14625{15690{
14626 Error err;15691 Error err;
...@@ -14698,14 +15763,14 @@ never_mind_just_calculate_it_normally:...@@ -14698,14 +15763,14 @@ never_mind_just_calculate_it_normally:
14698 return nullptr;15763 return nullptr;
14699 }15764 }
14700 if (op1_val->type->id == ZigTypeIdComptimeFloat) {15765 if (op1_val->type->id == ZigTypeIdComptimeFloat) {
14701 IrInstruction *tmp = ir_const_noval(ira, source_instr);15766 IrInstGen *tmp = ir_const_noval(ira, source_instr);
14702 tmp->value = op1_val;15767 tmp->value = op1_val;
14703 IrInstruction *casted = ir_implicit_cast(ira, tmp, op2_val->type);15768 IrInstGen *casted = ir_implicit_cast(ira, tmp, op2_val->type);
14704 op1_val = casted->value;15769 op1_val = casted->value;
14705 } else if (op2_val->type->id == ZigTypeIdComptimeFloat) {15770 } else if (op2_val->type->id == ZigTypeIdComptimeFloat) {
14706 IrInstruction *tmp = ir_const_noval(ira, source_instr);15771 IrInstGen *tmp = ir_const_noval(ira, source_instr);
14707 tmp->value = op2_val;15772 tmp->value = op2_val;
14708 IrInstruction *casted = ir_implicit_cast(ira, tmp, op1_val->type);15773 IrInstGen *casted = ir_implicit_cast(ira, tmp, op1_val->type);
14709 op2_val = casted->value;15774 op2_val = casted->value;
14710 }15775 }
14711 Cmp cmp_result = float_cmp(op1_val, op2_val);15776 Cmp cmp_result = float_cmp(op1_val, op2_val);
...@@ -14747,8 +15812,8 @@ never_mind_just_calculate_it_normally:...@@ -14747,8 +15812,8 @@ never_mind_just_calculate_it_normally:
14747 return nullptr;15812 return nullptr;
14748}15813}
1474915814
14750static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstruction *source_instr,15815static IrInstGen *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInst *source_instr,
14751 IrInstruction *op1, IrInstruction *op2, IrBinOp op_id)15816 IrInstGen *op1, IrInstGen *op2, IrBinOp op_id)
14752{15817{
14753 Error err;15818 Error err;
1475415819
...@@ -14761,7 +15826,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio...@@ -14761,7 +15826,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
14761 ir_add_error(ira, source_instr,15826 ir_add_error(ira, source_instr,
14762 buf_sprintf("vector length mismatch: %" PRIu32 " and %" PRIu32,15827 buf_sprintf("vector length mismatch: %" PRIu32 " and %" PRIu32,
14763 op1->value->type->data.vector.len, op2->value->type->data.vector.len));15828 op1->value->type->data.vector.len, op2->value->type->data.vector.len));
14764 return ira->codegen->invalid_instruction;15829 return ira->codegen->invalid_inst_gen;
14765 }15830 }
14766 result_type = get_vector_type(ira->codegen, op1->value->type->data.vector.len, scalar_result_type);15831 result_type = get_vector_type(ira->codegen, op1->value->type->data.vector.len, scalar_result_type);
14767 op1_scalar_type = op1->value->type->data.vector.elem_type;15832 op1_scalar_type = op1->value->type->data.vector.elem_type;
...@@ -14770,13 +15835,13 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio...@@ -14770,13 +15835,13 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
14770 ir_add_error(ira, source_instr,15835 ir_add_error(ira, source_instr,
14771 buf_sprintf("mixed scalar and vector operands to comparison operator: '%s' and '%s'",15836 buf_sprintf("mixed scalar and vector operands to comparison operator: '%s' and '%s'",
14772 buf_ptr(&op1->value->type->name), buf_ptr(&op2->value->type->name)));15837 buf_ptr(&op1->value->type->name), buf_ptr(&op2->value->type->name)));
14773 return ira->codegen->invalid_instruction;15838 return ira->codegen->invalid_inst_gen;
14774 }15839 }
1477515840
14776 bool opv_op1;15841 bool opv_op1;
14777 switch (type_has_one_possible_value(ira->codegen, op1->value->type)) {15842 switch (type_has_one_possible_value(ira->codegen, op1->value->type)) {
14778 case OnePossibleValueInvalid:15843 case OnePossibleValueInvalid:
14779 return ira->codegen->invalid_instruction;15844 return ira->codegen->invalid_inst_gen;
14780 case OnePossibleValueYes:15845 case OnePossibleValueYes:
14781 opv_op1 = true;15846 opv_op1 = true;
14782 break;15847 break;
...@@ -14787,7 +15852,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio...@@ -14787,7 +15852,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
14787 bool opv_op2;15852 bool opv_op2;
14788 switch (type_has_one_possible_value(ira->codegen, op2->value->type)) {15853 switch (type_has_one_possible_value(ira->codegen, op2->value->type)) {
14789 case OnePossibleValueInvalid:15854 case OnePossibleValueInvalid:
14790 return ira->codegen->invalid_instruction;15855 return ira->codegen->invalid_inst_gen;
14791 case OnePossibleValueYes:15856 case OnePossibleValueYes:
14792 opv_op2 = true;15857 opv_op2 = true;
14793 break;15858 break;
...@@ -14798,21 +15863,21 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio...@@ -14798,21 +15863,21 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
14798 Cmp op1_cmp_zero;15863 Cmp op1_cmp_zero;
14799 bool have_op1_cmp_zero = false;15864 bool have_op1_cmp_zero = false;
14800 if ((err = lazy_cmp_zero(source_instr->source_node, op1->value, &op1_cmp_zero))) {15865 if ((err = lazy_cmp_zero(source_instr->source_node, op1->value, &op1_cmp_zero))) {
14801 if (err != ErrorNotLazy) return ira->codegen->invalid_instruction;15866 if (err != ErrorNotLazy) return ira->codegen->invalid_inst_gen;
14802 } else {15867 } else {
14803 have_op1_cmp_zero = true;15868 have_op1_cmp_zero = true;
14804 }15869 }
14805 Cmp op2_cmp_zero;15870 Cmp op2_cmp_zero;
14806 bool have_op2_cmp_zero = false;15871 bool have_op2_cmp_zero = false;
14807 if ((err = lazy_cmp_zero(source_instr->source_node, op2->value, &op2_cmp_zero))) {15872 if ((err = lazy_cmp_zero(source_instr->source_node, op2->value, &op2_cmp_zero))) {
14808 if (err != ErrorNotLazy) return ira->codegen->invalid_instruction;15873 if (err != ErrorNotLazy) return ira->codegen->invalid_inst_gen;
14809 } else {15874 } else {
14810 have_op2_cmp_zero = true;15875 have_op2_cmp_zero = true;
14811 }15876 }
14812 if (((opv_op1 || instr_is_comptime(op1)) && (opv_op2 || instr_is_comptime(op2))) ||15877 if (((opv_op1 || instr_is_comptime(op1)) && (opv_op2 || instr_is_comptime(op2))) ||
14813 (have_op1_cmp_zero && have_op2_cmp_zero))15878 (have_op1_cmp_zero && have_op2_cmp_zero))
14814 {15879 {
14815 IrInstruction *result_instruction = ir_const(ira, source_instr, result_type);15880 IrInstGen *result_instruction = ir_const(ira, source_instr, result_type);
14816 ZigValue *out_val = result_instruction->value;15881 ZigValue *out_val = result_instruction->value;
14817 if (result_type->id == ZigTypeIdVector) {15882 if (result_type->id == ZigTypeIdVector) {
14818 size_t len = result_type->data.vector.len;15883 size_t len = result_type->data.vector.len;
...@@ -14830,7 +15895,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio...@@ -14830,7 +15895,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
14830 if (msg != nullptr) {15895 if (msg != nullptr) {
14831 add_error_note(ira->codegen, msg, source_instr->source_node,15896 add_error_note(ira->codegen, msg, source_instr->source_node,
14832 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));15897 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
14833 return ira->codegen->invalid_instruction;15898 return ira->codegen->invalid_inst_gen;
14834 }15899 }
14835 }15900 }
14836 out_val->type = result_type;15901 out_val->type = result_type;
...@@ -14839,7 +15904,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio...@@ -14839,7 +15904,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
14839 if (ir_eval_bin_op_cmp_scalar(ira, source_instr, op1->value, op_id,15904 if (ir_eval_bin_op_cmp_scalar(ira, source_instr, op1->value, op_id,
14840 op2->value, out_val) != nullptr)15905 op2->value, out_val) != nullptr)
14841 {15906 {
14842 return ira->codegen->invalid_instruction;15907 return ira->codegen->invalid_inst_gen;
14843 }15908 }
14844 }15909 }
14845 return result_instruction;15910 return result_instruction;
...@@ -14933,10 +15998,10 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio...@@ -14933,10 +15998,10 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
14933 }15998 }
14934 ZigType *dest_type = (result_type->id == ZigTypeIdVector) ?15999 ZigType *dest_type = (result_type->id == ZigTypeIdVector) ?
14935 get_vector_type(ira->codegen, result_type->data.vector.len, dest_scalar_type) : dest_scalar_type;16000 get_vector_type(ira->codegen, result_type->data.vector.len, dest_scalar_type) : dest_scalar_type;
14936 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, dest_type);16001 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
14937 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, dest_type);16002 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, dest_type);
14938 if (type_is_invalid(casted_op1->value->type) || type_is_invalid(casted_op2->value->type))16003 if (type_is_invalid(casted_op1->value->type) || type_is_invalid(casted_op2->value->type))
14939 return ira->codegen->invalid_instruction;16004 return ira->codegen->invalid_inst_gen;
14940 return ir_build_bin_op_gen(ira, source_instr, result_type, op_id, casted_op1, casted_op2, true);16005 return ir_build_bin_op_gen(ira, source_instr, result_type, op_id, casted_op1, casted_op2, true);
14941 }16006 }
1494216007
...@@ -14966,12 +16031,12 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio...@@ -14966,12 +16031,12 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
14966 if (instr_is_comptime(op1)) {16031 if (instr_is_comptime(op1)) {
14967 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefOk);16032 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefOk);
14968 if (op1_val == nullptr)16033 if (op1_val == nullptr)
14969 return ira->codegen->invalid_instruction;16034 return ira->codegen->invalid_inst_gen;
14970 if (op1_val->special == ConstValSpecialUndef)16035 if (op1_val->special == ConstValSpecialUndef)
14971 return ir_const_undef(ira, source_instr, ira->codegen->builtin_types.entry_bool);16036 return ir_const_undef(ira, source_instr, ira->codegen->builtin_types.entry_bool);
14972 if (result_type->id == ZigTypeIdVector) {16037 if (result_type->id == ZigTypeIdVector) {
14973 ir_add_error(ira, op1, buf_sprintf("compiler bug: TODO: support comptime vector here"));16038 ir_add_error(ira, &op1->base, buf_sprintf("compiler bug: TODO: support comptime vector here"));
14974 return ira->codegen->invalid_instruction;16039 return ira->codegen->invalid_inst_gen;
14975 }16040 }
14976 bool is_unsigned;16041 bool is_unsigned;
14977 if (op1_is_float) {16042 if (op1_is_float) {
...@@ -15010,12 +16075,12 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio...@@ -15010,12 +16075,12 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
15010 if (instr_is_comptime(op2)) {16075 if (instr_is_comptime(op2)) {
15011 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefOk);16076 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefOk);
15012 if (op2_val == nullptr)16077 if (op2_val == nullptr)
15013 return ira->codegen->invalid_instruction;16078 return ira->codegen->invalid_inst_gen;
15014 if (op2_val->special == ConstValSpecialUndef)16079 if (op2_val->special == ConstValSpecialUndef)
15015 return ir_const_undef(ira, source_instr, ira->codegen->builtin_types.entry_bool);16080 return ir_const_undef(ira, source_instr, ira->codegen->builtin_types.entry_bool);
15016 if (result_type->id == ZigTypeIdVector) {16081 if (result_type->id == ZigTypeIdVector) {
15017 ir_add_error(ira, op2, buf_sprintf("compiler bug: TODO: support comptime vector here"));16082 ir_add_error(ira, &op2->base, buf_sprintf("compiler bug: TODO: support comptime vector here"));
15018 return ira->codegen->invalid_instruction;16083 return ira->codegen->invalid_inst_gen;
15019 }16084 }
15020 bool is_unsigned;16085 bool is_unsigned;
15021 if (op2_is_float) {16086 if (op2_is_float) {
...@@ -15056,35 +16121,35 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio...@@ -15056,35 +16121,35 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
15056 ZigType *dest_type = (result_type->id == ZigTypeIdVector) ?16121 ZigType *dest_type = (result_type->id == ZigTypeIdVector) ?
15057 get_vector_type(ira->codegen, result_type->data.vector.len, dest_scalar_type) : dest_scalar_type;16122 get_vector_type(ira->codegen, result_type->data.vector.len, dest_scalar_type) : dest_scalar_type;
1505816123
15059 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, dest_type);16124 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
15060 if (type_is_invalid(casted_op1->value->type))16125 if (type_is_invalid(casted_op1->value->type))
15061 return ira->codegen->invalid_instruction;16126 return ira->codegen->invalid_inst_gen;
15062 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, dest_type);16127 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, dest_type);
15063 if (type_is_invalid(casted_op2->value->type))16128 if (type_is_invalid(casted_op2->value->type))
15064 return ira->codegen->invalid_instruction;16129 return ira->codegen->invalid_inst_gen;
15065 return ir_build_bin_op_gen(ira, source_instr, result_type, op_id, casted_op1, casted_op2, true);16130 return ir_build_bin_op_gen(ira, source_instr, result_type, op_id, casted_op1, casted_op2, true);
15066}16131}
1506716132
15068static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {16133static IrInstGen *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
15069 IrInstruction *op1 = bin_op_instruction->op1->child;16134 IrInstGen *op1 = bin_op_instruction->op1->child;
15070 if (type_is_invalid(op1->value->type))16135 if (type_is_invalid(op1->value->type))
15071 return ira->codegen->invalid_instruction;16136 return ira->codegen->invalid_inst_gen;
1507216137
15073 IrInstruction *op2 = bin_op_instruction->op2->child;16138 IrInstGen *op2 = bin_op_instruction->op2->child;
15074 if (type_is_invalid(op2->value->type))16139 if (type_is_invalid(op2->value->type))
15075 return ira->codegen->invalid_instruction;16140 return ira->codegen->invalid_inst_gen;
1507616141
15077 AstNode *source_node = bin_op_instruction->base.source_node;16142 AstNode *source_node = bin_op_instruction->base.base.source_node;
1507816143
15079 IrBinOp op_id = bin_op_instruction->op_id;16144 IrBinOp op_id = bin_op_instruction->op_id;
15080 bool is_equality_cmp = (op_id == IrBinOpCmpEq || op_id == IrBinOpCmpNotEq);16145 bool is_equality_cmp = (op_id == IrBinOpCmpEq || op_id == IrBinOpCmpNotEq);
15081 if (is_equality_cmp && op1->value->type->id == ZigTypeIdNull && op2->value->type->id == ZigTypeIdNull) {16146 if (is_equality_cmp && op1->value->type->id == ZigTypeIdNull && op2->value->type->id == ZigTypeIdNull) {
15082 return ir_const_bool(ira, &bin_op_instruction->base, (op_id == IrBinOpCmpEq));16147 return ir_const_bool(ira, &bin_op_instruction->base.base, (op_id == IrBinOpCmpEq));
15083 } else if (is_equality_cmp &&16148 } else if (is_equality_cmp &&
15084 ((op1->value->type->id == ZigTypeIdNull && op2->value->type->id == ZigTypeIdOptional) ||16149 ((op1->value->type->id == ZigTypeIdNull && op2->value->type->id == ZigTypeIdOptional) ||
15085 (op2->value->type->id == ZigTypeIdNull && op1->value->type->id == ZigTypeIdOptional)))16150 (op2->value->type->id == ZigTypeIdNull && op1->value->type->id == ZigTypeIdOptional)))
15086 {16151 {
15087 IrInstruction *maybe_op;16152 IrInstGen *maybe_op;
15088 if (op1->value->type->id == ZigTypeIdNull) {16153 if (op1->value->type->id == ZigTypeIdNull) {
15089 maybe_op = op2;16154 maybe_op = op2;
15090 } else if (op2->value->type->id == ZigTypeIdNull) {16155 } else if (op2->value->type->id == ZigTypeIdNull) {
...@@ -15095,21 +16160,16 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *...@@ -15095,21 +16160,16 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
15095 if (instr_is_comptime(maybe_op)) {16160 if (instr_is_comptime(maybe_op)) {
15096 ZigValue *maybe_val = ir_resolve_const(ira, maybe_op, UndefBad);16161 ZigValue *maybe_val = ir_resolve_const(ira, maybe_op, UndefBad);
15097 if (!maybe_val)16162 if (!maybe_val)
15098 return ira->codegen->invalid_instruction;16163 return ira->codegen->invalid_inst_gen;
15099 bool is_null = optional_value_is_null(maybe_val);16164 bool is_null = optional_value_is_null(maybe_val);
15100 bool bool_result = (op_id == IrBinOpCmpEq) ? is_null : !is_null;16165 bool bool_result = (op_id == IrBinOpCmpEq) ? is_null : !is_null;
15101 return ir_const_bool(ira, &bin_op_instruction->base, bool_result);16166 return ir_const_bool(ira, &bin_op_instruction->base.base, bool_result);
15102 }16167 }
1510316168
15104 IrInstruction *is_non_null = ir_build_test_nonnull(&ira->new_irb, bin_op_instruction->base.scope,16169 IrInstGen *is_non_null = ir_build_test_non_null_gen(ira, &bin_op_instruction->base.base, maybe_op);
15105 source_node, maybe_op);
15106 is_non_null->value->type = ira->codegen->builtin_types.entry_bool;
1510716170
15108 if (op_id == IrBinOpCmpEq) {16171 if (op_id == IrBinOpCmpEq) {
15109 IrInstruction *result = ir_build_bool_not(&ira->new_irb, bin_op_instruction->base.scope,16172 return ir_build_bool_not_gen(ira, &bin_op_instruction->base.base, is_non_null);
15110 bin_op_instruction->base.source_node, is_non_null);
15111 result->value->type = ira->codegen->builtin_types.entry_bool;
15112 return result;
15113 } else {16173 } else {
15114 return is_non_null;16174 return is_non_null;
15115 }16175 }
...@@ -15119,7 +16179,7 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *...@@ -15119,7 +16179,7 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
15119 (op2->value->type->id == ZigTypeIdNull && op1->value->type->id == ZigTypeIdPointer &&16179 (op2->value->type->id == ZigTypeIdNull && op1->value->type->id == ZigTypeIdPointer &&
15120 op1->value->type->data.pointer.ptr_len == PtrLenC)))16180 op1->value->type->data.pointer.ptr_len == PtrLenC)))
15121 {16181 {
15122 IrInstruction *c_ptr_op;16182 IrInstGen *c_ptr_op;
15123 if (op1->value->type->id == ZigTypeIdNull) {16183 if (op1->value->type->id == ZigTypeIdNull) {
15124 c_ptr_op = op2;16184 c_ptr_op = op2;
15125 } else if (op2->value->type->id == ZigTypeIdNull) {16185 } else if (op2->value->type->id == ZigTypeIdNull) {
...@@ -15130,24 +16190,19 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *...@@ -15130,24 +16190,19 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
15130 if (instr_is_comptime(c_ptr_op)) {16190 if (instr_is_comptime(c_ptr_op)) {
15131 ZigValue *c_ptr_val = ir_resolve_const(ira, c_ptr_op, UndefOk);16191 ZigValue *c_ptr_val = ir_resolve_const(ira, c_ptr_op, UndefOk);
15132 if (!c_ptr_val)16192 if (!c_ptr_val)
15133 return ira->codegen->invalid_instruction;16193 return ira->codegen->invalid_inst_gen;
15134 if (c_ptr_val->special == ConstValSpecialUndef)16194 if (c_ptr_val->special == ConstValSpecialUndef)
15135 return ir_const_undef(ira, &bin_op_instruction->base, ira->codegen->builtin_types.entry_bool);16195 return ir_const_undef(ira, &bin_op_instruction->base.base, ira->codegen->builtin_types.entry_bool);
15136 bool is_null = c_ptr_val->data.x_ptr.special == ConstPtrSpecialNull ||16196 bool is_null = c_ptr_val->data.x_ptr.special == ConstPtrSpecialNull ||
15137 (c_ptr_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr &&16197 (c_ptr_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr &&
15138 c_ptr_val->data.x_ptr.data.hard_coded_addr.addr == 0);16198 c_ptr_val->data.x_ptr.data.hard_coded_addr.addr == 0);
15139 bool bool_result = (op_id == IrBinOpCmpEq) ? is_null : !is_null;16199 bool bool_result = (op_id == IrBinOpCmpEq) ? is_null : !is_null;
15140 return ir_const_bool(ira, &bin_op_instruction->base, bool_result);16200 return ir_const_bool(ira, &bin_op_instruction->base.base, bool_result);
15141 }16201 }
15142 IrInstruction *is_non_null = ir_build_test_nonnull(&ira->new_irb, bin_op_instruction->base.scope,16202 IrInstGen *is_non_null = ir_build_test_non_null_gen(ira, &bin_op_instruction->base.base, c_ptr_op);
15143 source_node, c_ptr_op);
15144 is_non_null->value->type = ira->codegen->builtin_types.entry_bool;
1514516203
15146 if (op_id == IrBinOpCmpEq) {16204 if (op_id == IrBinOpCmpEq) {
15147 IrInstruction *result = ir_build_bool_not(&ira->new_irb, bin_op_instruction->base.scope,16205 return ir_build_bool_not_gen(ira, &bin_op_instruction->base.base, is_non_null);
15148 bin_op_instruction->base.source_node, is_non_null);
15149 result->value->type = ira->codegen->builtin_types.entry_bool;
15150 return result;
15151 } else {16206 } else {
15152 return is_non_null;16207 return is_non_null;
15153 }16208 }
...@@ -15155,61 +16210,57 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *...@@ -15155,61 +16210,57 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
15155 ZigType *non_null_type = (op1->value->type->id == ZigTypeIdNull) ? op2->value->type : op1->value->type;16210 ZigType *non_null_type = (op1->value->type->id == ZigTypeIdNull) ? op2->value->type : op1->value->type;
15156 ir_add_error_node(ira, source_node, buf_sprintf("comparison of '%s' with null",16211 ir_add_error_node(ira, source_node, buf_sprintf("comparison of '%s' with null",
15157 buf_ptr(&non_null_type->name)));16212 buf_ptr(&non_null_type->name)));
15158 return ira->codegen->invalid_instruction;16213 return ira->codegen->invalid_inst_gen;
15159 } else if (is_equality_cmp && (16214 } else if (is_equality_cmp && (
15160 (op1->value->type->id == ZigTypeIdEnumLiteral && op2->value->type->id == ZigTypeIdUnion) ||16215 (op1->value->type->id == ZigTypeIdEnumLiteral && op2->value->type->id == ZigTypeIdUnion) ||
15161 (op2->value->type->id == ZigTypeIdEnumLiteral && op1->value->type->id == ZigTypeIdUnion)))16216 (op2->value->type->id == ZigTypeIdEnumLiteral && op1->value->type->id == ZigTypeIdUnion)))
15162 {16217 {
15163 // Support equality comparison between a union's tag value and a enum literal16218 // Support equality comparison between a union's tag value and a enum literal
15164 IrInstruction *union_val = op1->value->type->id == ZigTypeIdUnion ? op1 : op2;16219 IrInstGen *union_val = op1->value->type->id == ZigTypeIdUnion ? op1 : op2;
15165 IrInstruction *enum_val = op1->value->type->id == ZigTypeIdUnion ? op2 : op1;16220 IrInstGen *enum_val = op1->value->type->id == ZigTypeIdUnion ? op2 : op1;
1516616221
15167 ZigType *tag_type = union_val->value->type->data.unionation.tag_type;16222 ZigType *tag_type = union_val->value->type->data.unionation.tag_type;
15168 assert(tag_type != nullptr);16223 assert(tag_type != nullptr);
1516916224
15170 IrInstruction *casted_union = ir_implicit_cast(ira, union_val, tag_type);16225 IrInstGen *casted_union = ir_implicit_cast(ira, union_val, tag_type);
15171 if (type_is_invalid(casted_union->value->type))16226 if (type_is_invalid(casted_union->value->type))
15172 return ira->codegen->invalid_instruction;16227 return ira->codegen->invalid_inst_gen;
1517316228
15174 IrInstruction *casted_val = ir_implicit_cast(ira, enum_val, tag_type);16229 IrInstGen *casted_val = ir_implicit_cast(ira, enum_val, tag_type);
15175 if (type_is_invalid(casted_val->value->type))16230 if (type_is_invalid(casted_val->value->type))
15176 return ira->codegen->invalid_instruction;16231 return ira->codegen->invalid_inst_gen;
1517716232
15178 if (instr_is_comptime(casted_union)) {16233 if (instr_is_comptime(casted_union)) {
15179 ZigValue *const_union_val = ir_resolve_const(ira, casted_union, UndefBad);16234 ZigValue *const_union_val = ir_resolve_const(ira, casted_union, UndefBad);
15180 if (!const_union_val)16235 if (!const_union_val)
15181 return ira->codegen->invalid_instruction;16236 return ira->codegen->invalid_inst_gen;
1518216237
15183 ZigValue *const_enum_val = ir_resolve_const(ira, casted_val, UndefBad);16238 ZigValue *const_enum_val = ir_resolve_const(ira, casted_val, UndefBad);
15184 if (!const_enum_val)16239 if (!const_enum_val)
15185 return ira->codegen->invalid_instruction;16240 return ira->codegen->invalid_inst_gen;
1518616241
15187 Cmp cmp_result = bigint_cmp(&const_union_val->data.x_union.tag, &const_enum_val->data.x_enum_tag);16242 Cmp cmp_result = bigint_cmp(&const_union_val->data.x_union.tag, &const_enum_val->data.x_enum_tag);
15188 bool bool_result = (op_id == IrBinOpCmpEq) ? cmp_result == CmpEQ : cmp_result != CmpEQ;16243 bool bool_result = (op_id == IrBinOpCmpEq) ? cmp_result == CmpEQ : cmp_result != CmpEQ;
1518916244
15190 return ir_const_bool(ira, &bin_op_instruction->base, bool_result);16245 return ir_const_bool(ira, &bin_op_instruction->base.base, bool_result);
15191 }16246 }
1519216247
15193 IrInstruction *result = ir_build_bin_op(&ira->new_irb,16248 return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, ira->codegen->builtin_types.entry_bool,
15194 bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
15195 op_id, casted_union, casted_val, bin_op_instruction->safety_check_on);16249 op_id, casted_union, casted_val, bin_op_instruction->safety_check_on);
15196 result->value->type = ira->codegen->builtin_types.entry_bool;
15197
15198 return result;
15199 }16250 }
1520016251
15201 if (op1->value->type->id == ZigTypeIdErrorSet && op2->value->type->id == ZigTypeIdErrorSet) {16252 if (op1->value->type->id == ZigTypeIdErrorSet && op2->value->type->id == ZigTypeIdErrorSet) {
15202 if (!is_equality_cmp) {16253 if (!is_equality_cmp) {
15203 ir_add_error_node(ira, source_node, buf_sprintf("operator not allowed for errors"));16254 ir_add_error_node(ira, source_node, buf_sprintf("operator not allowed for errors"));
15204 return ira->codegen->invalid_instruction;16255 return ira->codegen->invalid_inst_gen;
15205 }16256 }
15206 ZigType *intersect_type = get_error_set_intersection(ira, op1->value->type, op2->value->type, source_node);16257 ZigType *intersect_type = get_error_set_intersection(ira, op1->value->type, op2->value->type, source_node);
15207 if (type_is_invalid(intersect_type)) {16258 if (type_is_invalid(intersect_type)) {
15208 return ira->codegen->invalid_instruction;16259 return ira->codegen->invalid_inst_gen;
15209 }16260 }
1521016261
15211 if (!resolve_inferred_error_set(ira->codegen, intersect_type, source_node)) {16262 if (!resolve_inferred_error_set(ira->codegen, intersect_type, source_node)) {
15212 return ira->codegen->invalid_instruction;16263 return ira->codegen->invalid_inst_gen;
15213 }16264 }
1521416265
15215 // exception if one of the operators has the type of the empty error set, we allow the comparison16266 // exception if one of the operators has the type of the empty error set, we allow the comparison
...@@ -15226,7 +16277,7 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *...@@ -15226,7 +16277,7 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
15226 } else {16277 } else {
15227 zig_unreachable();16278 zig_unreachable();
15228 }16279 }
15229 return ir_const_bool(ira, &bin_op_instruction->base, answer);16280 return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
15230 }16281 }
1523116282
15232 if (!type_is_global_error_set(intersect_type)) {16283 if (!type_is_global_error_set(intersect_type)) {
...@@ -15234,7 +16285,7 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *...@@ -15234,7 +16285,7 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
15234 ir_add_error_node(ira, source_node,16285 ir_add_error_node(ira, source_node,
15235 buf_sprintf("error sets '%s' and '%s' have no common errors",16286 buf_sprintf("error sets '%s' and '%s' have no common errors",
15236 buf_ptr(&op1->value->type->name), buf_ptr(&op2->value->type->name)));16287 buf_ptr(&op1->value->type->name), buf_ptr(&op2->value->type->name)));
15237 return ira->codegen->invalid_instruction;16288 return ira->codegen->invalid_inst_gen;
15238 }16289 }
15239 if (op1->value->type->data.error_set.err_count == 1 && op2->value->type->data.error_set.err_count == 1) {16290 if (op1->value->type->data.error_set.err_count == 1 && op2->value->type->data.error_set.err_count == 1) {
15240 bool are_equal = true;16291 bool are_equal = true;
...@@ -15246,17 +16297,17 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *...@@ -15246,17 +16297,17 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
15246 } else {16297 } else {
15247 zig_unreachable();16298 zig_unreachable();
15248 }16299 }
15249 return ir_const_bool(ira, &bin_op_instruction->base, answer);16300 return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
15250 }16301 }
15251 }16302 }
1525216303
15253 if (instr_is_comptime(op1) && instr_is_comptime(op2)) {16304 if (instr_is_comptime(op1) && instr_is_comptime(op2)) {
15254 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);16305 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
15255 if (op1_val == nullptr)16306 if (op1_val == nullptr)
15256 return ira->codegen->invalid_instruction;16307 return ira->codegen->invalid_inst_gen;
15257 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);16308 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
15258 if (op2_val == nullptr)16309 if (op2_val == nullptr)
15259 return ira->codegen->invalid_instruction;16310 return ira->codegen->invalid_inst_gen;
1526016311
15261 bool answer;16312 bool answer;
15262 bool are_equal = op1_val->data.x_err_set->value == op2_val->data.x_err_set->value;16313 bool are_equal = op1_val->data.x_err_set->value == op2_val->data.x_err_set->value;
...@@ -15268,27 +16319,24 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *...@@ -15268,27 +16319,24 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
15268 zig_unreachable();16319 zig_unreachable();
15269 }16320 }
1527016321
15271 return ir_const_bool(ira, &bin_op_instruction->base, answer);16322 return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
15272 }16323 }
1527316324
15274 IrInstruction *result = ir_build_bin_op(&ira->new_irb,16325 return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, ira->codegen->builtin_types.entry_bool,
15275 bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
15276 op_id, op1, op2, bin_op_instruction->safety_check_on);16326 op_id, op1, op2, bin_op_instruction->safety_check_on);
15277 result->value->type = ira->codegen->builtin_types.entry_bool;
15278 return result;
15279 }16327 }
1528016328
15281 if (type_is_numeric(op1->value->type) && type_is_numeric(op2->value->type)) {16329 if (type_is_numeric(op1->value->type) && type_is_numeric(op2->value->type)) {
15282 // This operation allows any combination of integer and float types, regardless of the16330 // This operation allows any combination of integer and float types, regardless of the
15283 // signed-ness, comptime-ness, and bit-width. So peer type resolution is incorrect for16331 // signed-ness, comptime-ness, and bit-width. So peer type resolution is incorrect for
15284 // numeric types.16332 // numeric types.
15285 return ir_analyze_bin_op_cmp_numeric(ira, &bin_op_instruction->base, op1, op2, op_id);16333 return ir_analyze_bin_op_cmp_numeric(ira, &bin_op_instruction->base.base, op1, op2, op_id);
15286 }16334 }
1528716335
15288 IrInstruction *instructions[] = {op1, op2};16336 IrInstGen *instructions[] = {op1, op2};
15289 ZigType *resolved_type = ir_resolve_peer_types(ira, source_node, nullptr, instructions, 2);16337 ZigType *resolved_type = ir_resolve_peer_types(ira, source_node, nullptr, instructions, 2);
15290 if (type_is_invalid(resolved_type))16338 if (type_is_invalid(resolved_type))
15291 return ira->codegen->invalid_instruction;16339 return ira->codegen->invalid_inst_gen;
1529216340
15293 bool operator_allowed;16341 bool operator_allowed;
15294 switch (resolved_type->id) {16342 switch (resolved_type->id) {
...@@ -15336,21 +16384,21 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *...@@ -15336,21 +16384,21 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
15336 if (!operator_allowed) {16384 if (!operator_allowed) {
15337 ir_add_error_node(ira, source_node,16385 ir_add_error_node(ira, source_node,
15338 buf_sprintf("operator not allowed for type '%s'", buf_ptr(&resolved_type->name)));16386 buf_sprintf("operator not allowed for type '%s'", buf_ptr(&resolved_type->name)));
15339 return ira->codegen->invalid_instruction;16387 return ira->codegen->invalid_inst_gen;
15340 }16388 }
1534116389
15342 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);16390 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);
15343 if (casted_op1 == ira->codegen->invalid_instruction)16391 if (type_is_invalid(casted_op1->value->type))
15344 return ira->codegen->invalid_instruction;16392 return ira->codegen->invalid_inst_gen;
1534516393
15346 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);16394 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
15347 if (casted_op2 == ira->codegen->invalid_instruction)16395 if (type_is_invalid(casted_op2->value->type))
15348 return ira->codegen->invalid_instruction;16396 return ira->codegen->invalid_inst_gen;
1534916397
15350 bool one_possible_value;16398 bool one_possible_value;
15351 switch (type_has_one_possible_value(ira->codegen, resolved_type)) {16399 switch (type_has_one_possible_value(ira->codegen, resolved_type)) {
15352 case OnePossibleValueInvalid:16400 case OnePossibleValueInvalid:
15353 return ira->codegen->invalid_instruction;16401 return ira->codegen->invalid_inst_gen;
15354 case OnePossibleValueYes:16402 case OnePossibleValueYes:
15355 one_possible_value = true;16403 one_possible_value = true;
15356 break;16404 break;
...@@ -15362,20 +16410,20 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *...@@ -15362,20 +16410,20 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
15362 if (one_possible_value || (instr_is_comptime(casted_op1) && instr_is_comptime(casted_op2))) {16410 if (one_possible_value || (instr_is_comptime(casted_op1) && instr_is_comptime(casted_op2))) {
15363 ZigValue *op1_val = one_possible_value ? casted_op1->value : ir_resolve_const(ira, casted_op1, UndefBad);16411 ZigValue *op1_val = one_possible_value ? casted_op1->value : ir_resolve_const(ira, casted_op1, UndefBad);
15364 if (op1_val == nullptr)16412 if (op1_val == nullptr)
15365 return ira->codegen->invalid_instruction;16413 return ira->codegen->invalid_inst_gen;
15366 ZigValue *op2_val = one_possible_value ? casted_op2->value : ir_resolve_const(ira, casted_op2, UndefBad);16414 ZigValue *op2_val = one_possible_value ? casted_op2->value : ir_resolve_const(ira, casted_op2, UndefBad);
15367 if (op2_val == nullptr)16415 if (op2_val == nullptr)
15368 return ira->codegen->invalid_instruction;16416 return ira->codegen->invalid_inst_gen;
15369 if (resolved_type->id != ZigTypeIdVector)16417 if (resolved_type->id != ZigTypeIdVector)
15370 return ir_evaluate_bin_op_cmp(ira, resolved_type, op1_val, op2_val, bin_op_instruction, op_id, one_possible_value);16418 return ir_evaluate_bin_op_cmp(ira, resolved_type, op1_val, op2_val, bin_op_instruction, op_id, one_possible_value);
15371 IrInstruction *result = ir_const(ira, &bin_op_instruction->base,16419 IrInstGen *result = ir_const(ira, &bin_op_instruction->base.base,
15372 get_vector_type(ira->codegen, resolved_type->data.vector.len, ira->codegen->builtin_types.entry_bool));16420 get_vector_type(ira->codegen, resolved_type->data.vector.len, ira->codegen->builtin_types.entry_bool));
15373 result->value->data.x_array.data.s_none.elements =16421 result->value->data.x_array.data.s_none.elements =
15374 create_const_vals(resolved_type->data.vector.len);16422 create_const_vals(resolved_type->data.vector.len);
1537516423
15376 expand_undef_array(ira->codegen, result->value);16424 expand_undef_array(ira->codegen, result->value);
15377 for (size_t i = 0;i < resolved_type->data.vector.len;i++) {16425 for (size_t i = 0;i < resolved_type->data.vector.len;i++) {
15378 IrInstruction *cur_res = ir_evaluate_bin_op_cmp(ira, resolved_type->data.vector.elem_type,16426 IrInstGen *cur_res = ir_evaluate_bin_op_cmp(ira, resolved_type->data.vector.elem_type,
15379 &op1_val->data.x_array.data.s_none.elements[i],16427 &op1_val->data.x_array.data.s_none.elements[i],
15380 &op2_val->data.x_array.data.s_none.elements[i],16428 &op2_val->data.x_array.data.s_none.elements[i],
15381 bin_op_instruction, op_id, one_possible_value);16429 bin_op_instruction, op_id, one_possible_value);
...@@ -15384,19 +16432,14 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *...@@ -15384,19 +16432,14 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
15384 return result;16432 return result;
15385 }16433 }
1538616434
15387 IrInstruction *result = ir_build_bin_op(&ira->new_irb,16435 ZigType *res_type = (resolved_type->id == ZigTypeIdVector) ?
15388 bin_op_instruction->base.scope, bin_op_instruction->base.source_node,16436 get_vector_type(ira->codegen, resolved_type->data.vector.len, ira->codegen->builtin_types.entry_bool) :
16437 ira->codegen->builtin_types.entry_bool;
16438 return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, res_type,
15389 op_id, casted_op1, casted_op2, bin_op_instruction->safety_check_on);16439 op_id, casted_op1, casted_op2, bin_op_instruction->safety_check_on);
15390 if (resolved_type->id == ZigTypeIdVector) {
15391 result->value->type = get_vector_type(ira->codegen, resolved_type->data.vector.len,
15392 ira->codegen->builtin_types.entry_bool);
15393 } else {
15394 result->value->type = ira->codegen->builtin_types.entry_bool;
15395 }
15396 return result;
15397}16440}
1539816441
15399static ErrorMsg *ir_eval_math_op_scalar(IrAnalyze *ira, IrInstruction *source_instr, ZigType *type_entry,16442static ErrorMsg *ir_eval_math_op_scalar(IrAnalyze *ira, IrInst* source_instr, ZigType *type_entry,
15400 ZigValue *op1_val, IrBinOp op_id, ZigValue *op2_val, ZigValue *out_val)16443 ZigValue *op1_val, IrBinOp op_id, ZigValue *op2_val, ZigValue *out_val)
15401{16444{
15402 bool is_int;16445 bool is_int;
...@@ -15576,10 +16619,10 @@ static ErrorMsg *ir_eval_math_op_scalar(IrAnalyze *ira, IrInstruction *source_in...@@ -15576,10 +16619,10 @@ static ErrorMsg *ir_eval_math_op_scalar(IrAnalyze *ira, IrInstruction *source_in
15576}16619}
1557716620
15578// This works on operands that have already been checked to be comptime known.16621// This works on operands that have already been checked to be comptime known.
15579static IrInstruction *ir_analyze_math_op(IrAnalyze *ira, IrInstruction *source_instr,16622static IrInstGen *ir_analyze_math_op(IrAnalyze *ira, IrInst* source_instr,
15580 ZigType *type_entry, ZigValue *op1_val, IrBinOp op_id, ZigValue *op2_val)16623 ZigType *type_entry, ZigValue *op1_val, IrBinOp op_id, ZigValue *op2_val)
15581{16624{
15582 IrInstruction *result_instruction = ir_const(ira, source_instr, type_entry);16625 IrInstGen *result_instruction = ir_const(ira, source_instr, type_entry);
15583 ZigValue *out_val = result_instruction->value;16626 ZigValue *out_val = result_instruction->value;
15584 if (type_entry->id == ZigTypeIdVector) {16627 if (type_entry->id == ZigTypeIdVector) {
15585 expand_undef_array(ira->codegen, op1_val);16628 expand_undef_array(ira->codegen, op1_val);
...@@ -15600,43 +16643,43 @@ static IrInstruction *ir_analyze_math_op(IrAnalyze *ira, IrInstruction *source_i...@@ -15600,43 +16643,43 @@ static IrInstruction *ir_analyze_math_op(IrAnalyze *ira, IrInstruction *source_i
15600 if (msg != nullptr) {16643 if (msg != nullptr) {
15601 add_error_note(ira->codegen, msg, source_instr->source_node,16644 add_error_note(ira->codegen, msg, source_instr->source_node,
15602 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));16645 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
15603 return ira->codegen->invalid_instruction;16646 return ira->codegen->invalid_inst_gen;
15604 }16647 }
15605 }16648 }
15606 out_val->type = type_entry;16649 out_val->type = type_entry;
15607 out_val->special = ConstValSpecialStatic;16650 out_val->special = ConstValSpecialStatic;
15608 } else {16651 } else {
15609 if (ir_eval_math_op_scalar(ira, source_instr, type_entry, op1_val, op_id, op2_val, out_val) != nullptr) {16652 if (ir_eval_math_op_scalar(ira, source_instr, type_entry, op1_val, op_id, op2_val, out_val) != nullptr) {
15610 return ira->codegen->invalid_instruction;16653 return ira->codegen->invalid_inst_gen;
15611 }16654 }
15612 }16655 }
15613 return ir_implicit_cast(ira, result_instruction, type_entry);16656 return ir_implicit_cast(ira, result_instruction, type_entry);
15614}16657}
1561516658
15616static IrInstruction *ir_analyze_bit_shift(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {16659static IrInstGen *ir_analyze_bit_shift(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
15617 IrInstruction *op1 = bin_op_instruction->op1->child;16660 IrInstGen *op1 = bin_op_instruction->op1->child;
15618 if (type_is_invalid(op1->value->type))16661 if (type_is_invalid(op1->value->type))
15619 return ira->codegen->invalid_instruction;16662 return ira->codegen->invalid_inst_gen;
1562016663
15621 if (op1->value->type->id != ZigTypeIdInt && op1->value->type->id != ZigTypeIdComptimeInt) {16664 if (op1->value->type->id != ZigTypeIdInt && op1->value->type->id != ZigTypeIdComptimeInt) {
15622 ir_add_error(ira, bin_op_instruction->op1,16665 ir_add_error(ira, &bin_op_instruction->op1->base,
15623 buf_sprintf("bit shifting operation expected integer type, found '%s'",16666 buf_sprintf("bit shifting operation expected integer type, found '%s'",
15624 buf_ptr(&op1->value->type->name)));16667 buf_ptr(&op1->value->type->name)));
15625 return ira->codegen->invalid_instruction;16668 return ira->codegen->invalid_inst_gen;
15626 }16669 }
1562716670
15628 IrInstruction *op2 = bin_op_instruction->op2->child;16671 IrInstGen *op2 = bin_op_instruction->op2->child;
15629 if (type_is_invalid(op2->value->type))16672 if (type_is_invalid(op2->value->type))
15630 return ira->codegen->invalid_instruction;16673 return ira->codegen->invalid_inst_gen;
1563116674
15632 if (op2->value->type->id != ZigTypeIdInt && op2->value->type->id != ZigTypeIdComptimeInt) {16675 if (op2->value->type->id != ZigTypeIdInt && op2->value->type->id != ZigTypeIdComptimeInt) {
15633 ir_add_error(ira, bin_op_instruction->op2,16676 ir_add_error(ira, &bin_op_instruction->op2->base,
15634 buf_sprintf("shift amount has to be an integer type, but found '%s'",16677 buf_sprintf("shift amount has to be an integer type, but found '%s'",
15635 buf_ptr(&op2->value->type->name)));16678 buf_ptr(&op2->value->type->name)));
15636 return ira->codegen->invalid_instruction;16679 return ira->codegen->invalid_inst_gen;
15637 }16680 }
1563816681
15639 IrInstruction *casted_op2;16682 IrInstGen *casted_op2;
15640 IrBinOp op_id = bin_op_instruction->op_id;16683 IrBinOp op_id = bin_op_instruction->op_id;
15641 if (op1->value->type->id == ZigTypeIdComptimeInt) {16684 if (op1->value->type->id == ZigTypeIdComptimeInt) {
15642 casted_op2 = op2;16685 casted_op2 = op2;
...@@ -15648,8 +16691,8 @@ static IrInstruction *ir_analyze_bit_shift(IrAnalyze *ira, IrInstructionBinOp *b...@@ -15648,8 +16691,8 @@ static IrInstruction *ir_analyze_bit_shift(IrAnalyze *ira, IrInstructionBinOp *b
15648 if (casted_op2->value->data.x_bigint.is_negative) {16691 if (casted_op2->value->data.x_bigint.is_negative) {
15649 Buf *val_buf = buf_alloc();16692 Buf *val_buf = buf_alloc();
15650 bigint_append_buf(val_buf, &casted_op2->value->data.x_bigint, 10);16693 bigint_append_buf(val_buf, &casted_op2->value->data.x_bigint, 10);
15651 ir_add_error(ira, casted_op2, buf_sprintf("shift by negative value %s", buf_ptr(val_buf)));16694 ir_add_error(ira, &casted_op2->base, buf_sprintf("shift by negative value %s", buf_ptr(val_buf)));
15652 return ira->codegen->invalid_instruction;16695 return ira->codegen->invalid_inst_gen;
15653 }16696 }
15654 } else {16697 } else {
15655 ZigType *shift_amt_type = get_smallest_unsigned_int_type(ira->codegen,16698 ZigType *shift_amt_type = get_smallest_unsigned_int_type(ira->codegen,
...@@ -15659,57 +16702,51 @@ static IrInstruction *ir_analyze_bit_shift(IrAnalyze *ira, IrInstructionBinOp *b...@@ -15659,57 +16702,51 @@ static IrInstruction *ir_analyze_bit_shift(IrAnalyze *ira, IrInstructionBinOp *b
1565916702
15660 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);16703 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
15661 if (op2_val == nullptr)16704 if (op2_val == nullptr)
15662 return ira->codegen->invalid_instruction;16705 return ira->codegen->invalid_inst_gen;
15663 if (!bigint_fits_in_bits(&op2_val->data.x_bigint,16706 if (!bigint_fits_in_bits(&op2_val->data.x_bigint,
15664 shift_amt_type->data.integral.bit_count,16707 shift_amt_type->data.integral.bit_count,
15665 op2_val->data.x_bigint.is_negative)) {16708 op2_val->data.x_bigint.is_negative)) {
15666 Buf *val_buf = buf_alloc();16709 Buf *val_buf = buf_alloc();
15667 bigint_append_buf(val_buf, &op2_val->data.x_bigint, 10);16710 bigint_append_buf(val_buf, &op2_val->data.x_bigint, 10);
15668 ErrorMsg* msg = ir_add_error(ira,16711 ErrorMsg* msg = ir_add_error(ira,
15669 &bin_op_instruction->base,16712 &bin_op_instruction->base.base,
15670 buf_sprintf("RHS of shift is too large for LHS type"));16713 buf_sprintf("RHS of shift is too large for LHS type"));
15671 add_error_note(16714 add_error_note(
15672 ira->codegen,16715 ira->codegen,
15673 msg,16716 msg,
15674 op2->source_node,16717 op2->base.source_node,
15675 buf_sprintf("value %s cannot fit into type %s",16718 buf_sprintf("value %s cannot fit into type %s",
15676 buf_ptr(val_buf),16719 buf_ptr(val_buf),
15677 buf_ptr(&shift_amt_type->name)));16720 buf_ptr(&shift_amt_type->name)));
15678 return ira->codegen->invalid_instruction;16721 return ira->codegen->invalid_inst_gen;
15679 }16722 }
15680 }16723 }
1568116724
15682 casted_op2 = ir_implicit_cast(ira, op2, shift_amt_type);16725 casted_op2 = ir_implicit_cast(ira, op2, shift_amt_type);
15683 if (casted_op2 == ira->codegen->invalid_instruction)16726 if (type_is_invalid(casted_op2->value->type))
15684 return ira->codegen->invalid_instruction;16727 return ira->codegen->invalid_inst_gen;
15685 }16728 }
1568616729
15687 if (instr_is_comptime(op1) && instr_is_comptime(casted_op2)) {16730 if (instr_is_comptime(op1) && instr_is_comptime(casted_op2)) {
15688 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);16731 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
15689 if (op1_val == nullptr)16732 if (op1_val == nullptr)
15690 return ira->codegen->invalid_instruction;16733 return ira->codegen->invalid_inst_gen;
1569116734
15692 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);16735 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
15693 if (op2_val == nullptr)16736 if (op2_val == nullptr)
15694 return ira->codegen->invalid_instruction;16737 return ira->codegen->invalid_inst_gen;
1569516738
15696 return ir_analyze_math_op(ira, &bin_op_instruction->base, op1->value->type, op1_val, op_id, op2_val);16739 return ir_analyze_math_op(ira, &bin_op_instruction->base.base, op1->value->type, op1_val, op_id, op2_val);
15697 } else if (op1->value->type->id == ZigTypeIdComptimeInt) {16740 } else if (op1->value->type->id == ZigTypeIdComptimeInt) {
15698 ir_add_error(ira, &bin_op_instruction->base,16741 ir_add_error(ira, &bin_op_instruction->base.base,
15699 buf_sprintf("LHS of shift must be an integer type, or RHS must be compile-time known"));16742 buf_sprintf("LHS of shift must be an integer type, or RHS must be compile-time known"));
15700 return ira->codegen->invalid_instruction;16743 return ira->codegen->invalid_inst_gen;
15701 } else if (instr_is_comptime(casted_op2) && bigint_cmp_zero(&casted_op2->value->data.x_bigint) == CmpEQ) {16744 } else if (instr_is_comptime(casted_op2) && bigint_cmp_zero(&casted_op2->value->data.x_bigint) == CmpEQ) {
15702 IrInstruction *result = ir_build_cast(&ira->new_irb, bin_op_instruction->base.scope,16745 return ir_build_cast(ira, &bin_op_instruction->base.base, op1->value->type, op1, CastOpNoop);
15703 bin_op_instruction->base.source_node, op1->value->type, op1, CastOpNoop);
15704 result->value->type = op1->value->type;
15705 return result;
15706 }16746 }
1570716747
15708 IrInstruction *result = ir_build_bin_op(&ira->new_irb, bin_op_instruction->base.scope,16748 return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, op1->value->type,
15709 bin_op_instruction->base.source_node, op_id,16749 op_id, op1, casted_op2, bin_op_instruction->safety_check_on);
15710 op1, casted_op2, bin_op_instruction->safety_check_on);
15711 result->value->type = op1->value->type;
15712 return result;
15713}16750}
1571416751
15715static bool ok_float_op(IrBinOp op) {16752static bool ok_float_op(IrBinOp op) {
...@@ -15773,24 +16810,24 @@ static bool is_pointer_arithmetic_allowed(ZigType *lhs_type, IrBinOp op) {...@@ -15773,24 +16810,24 @@ static bool is_pointer_arithmetic_allowed(ZigType *lhs_type, IrBinOp op) {
15773 zig_unreachable();16810 zig_unreachable();
15774}16811}
1577516812
15776static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp *instruction) {16813static IrInstGen *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstSrcBinOp *instruction) {
15777 Error err;16814 Error err;
1577816815
15779 IrInstruction *op1 = instruction->op1->child;16816 IrInstGen *op1 = instruction->op1->child;
15780 if (type_is_invalid(op1->value->type))16817 if (type_is_invalid(op1->value->type))
15781 return ira->codegen->invalid_instruction;16818 return ira->codegen->invalid_inst_gen;
1578216819
15783 IrInstruction *op2 = instruction->op2->child;16820 IrInstGen *op2 = instruction->op2->child;
15784 if (type_is_invalid(op2->value->type))16821 if (type_is_invalid(op2->value->type))
15785 return ira->codegen->invalid_instruction;16822 return ira->codegen->invalid_inst_gen;
1578616823
15787 IrBinOp op_id = instruction->op_id;16824 IrBinOp op_id = instruction->op_id;
1578816825
15789 // look for pointer math16826 // look for pointer math
15790 if (is_pointer_arithmetic_allowed(op1->value->type, op_id)) {16827 if (is_pointer_arithmetic_allowed(op1->value->type, op_id)) {
15791 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, ira->codegen->builtin_types.entry_usize);16828 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, ira->codegen->builtin_types.entry_usize);
15792 if (type_is_invalid(casted_op2->value->type))16829 if (type_is_invalid(casted_op2->value->type))
15793 return ira->codegen->invalid_instruction;16830 return ira->codegen->invalid_inst_gen;
1579416831
15795 // If either operand is undef, result is undef.16832 // If either operand is undef, result is undef.
15796 ZigValue *op1_val = nullptr;16833 ZigValue *op1_val = nullptr;
...@@ -15798,28 +16835,28 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp...@@ -15798,28 +16835,28 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
15798 if (instr_is_comptime(op1)) {16835 if (instr_is_comptime(op1)) {
15799 op1_val = ir_resolve_const(ira, op1, UndefOk);16836 op1_val = ir_resolve_const(ira, op1, UndefOk);
15800 if (op1_val == nullptr)16837 if (op1_val == nullptr)
15801 return ira->codegen->invalid_instruction;16838 return ira->codegen->invalid_inst_gen;
15802 if (op1_val->special == ConstValSpecialUndef)16839 if (op1_val->special == ConstValSpecialUndef)
15803 return ir_const_undef(ira, &instruction->base, op1->value->type);16840 return ir_const_undef(ira, &instruction->base.base, op1->value->type);
15804 }16841 }
15805 if (instr_is_comptime(casted_op2)) {16842 if (instr_is_comptime(casted_op2)) {
15806 op2_val = ir_resolve_const(ira, casted_op2, UndefOk);16843 op2_val = ir_resolve_const(ira, casted_op2, UndefOk);
15807 if (op2_val == nullptr)16844 if (op2_val == nullptr)
15808 return ira->codegen->invalid_instruction;16845 return ira->codegen->invalid_inst_gen;
15809 if (op2_val->special == ConstValSpecialUndef)16846 if (op2_val->special == ConstValSpecialUndef)
15810 return ir_const_undef(ira, &instruction->base, op1->value->type);16847 return ir_const_undef(ira, &instruction->base.base, op1->value->type);
15811 }16848 }
1581216849
15813 ZigType *elem_type = op1->value->type->data.pointer.child_type;16850 ZigType *elem_type = op1->value->type->data.pointer.child_type;
15814 if ((err = type_resolve(ira->codegen, elem_type, ResolveStatusSizeKnown)))16851 if ((err = type_resolve(ira->codegen, elem_type, ResolveStatusSizeKnown)))
15815 return ira->codegen->invalid_instruction;16852 return ira->codegen->invalid_inst_gen;
1581616853
15817 // NOTE: this variable is meaningful iff op2_val is not null!16854 // NOTE: this variable is meaningful iff op2_val is not null!
15818 uint64_t byte_offset;16855 uint64_t byte_offset;
15819 if (op2_val != nullptr) {16856 if (op2_val != nullptr) {
15820 uint64_t elem_offset;16857 uint64_t elem_offset;
15821 if (!ir_resolve_usize(ira, casted_op2, &elem_offset))16858 if (!ir_resolve_usize(ira, casted_op2, &elem_offset))
15822 return ira->codegen->invalid_instruction;16859 return ira->codegen->invalid_inst_gen;
1582316860
15824 byte_offset = type_size(ira->codegen, elem_type) * elem_offset;16861 byte_offset = type_size(ira->codegen, elem_type) * elem_offset;
15825 }16862 }
...@@ -15834,7 +16871,7 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp...@@ -15834,7 +16871,7 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
15834 {16871 {
15835 uint32_t align_bytes;16872 uint32_t align_bytes;
15836 if ((err = resolve_ptr_align(ira, op1->value->type, &align_bytes)))16873 if ((err = resolve_ptr_align(ira, op1->value->type, &align_bytes)))
15837 return ira->codegen->invalid_instruction;16874 return ira->codegen->invalid_inst_gen;
1583816875
15839 // If the addend is not a comptime-known value we can still count on16876 // If the addend is not a comptime-known value we can still count on
15840 // it being a multiple of the type size16877 // it being a multiple of the type size
...@@ -15863,23 +16900,20 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp...@@ -15863,23 +16900,20 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
15863 } else {16900 } else {
15864 zig_unreachable();16901 zig_unreachable();
15865 }16902 }
15866 IrInstruction *result = ir_const(ira, &instruction->base, result_type);16903 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
15867 result->value->data.x_ptr.special = ConstPtrSpecialHardCodedAddr;16904 result->value->data.x_ptr.special = ConstPtrSpecialHardCodedAddr;
15868 result->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;16905 result->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;
15869 result->value->data.x_ptr.data.hard_coded_addr.addr = new_addr;16906 result->value->data.x_ptr.data.hard_coded_addr.addr = new_addr;
15870 return result;16907 return result;
15871 }16908 }
1587216909
15873 IrInstruction *result = ir_build_bin_op(&ira->new_irb, instruction->base.scope,16910 return ir_build_bin_op_gen(ira, &instruction->base.base, result_type, op_id, op1, casted_op2, true);
15874 instruction->base.source_node, op_id, op1, casted_op2, true);
15875 result->value->type = result_type;
15876 return result;
15877 }16911 }
1587816912
15879 IrInstruction *instructions[] = {op1, op2};16913 IrInstGen *instructions[] = {op1, op2};
15880 ZigType *resolved_type = ir_resolve_peer_types(ira, instruction->base.source_node, nullptr, instructions, 2);16914 ZigType *resolved_type = ir_resolve_peer_types(ira, instruction->base.base.source_node, nullptr, instructions, 2);
15881 if (type_is_invalid(resolved_type))16915 if (type_is_invalid(resolved_type))
15882 return ira->codegen->invalid_instruction;16916 return ira->codegen->invalid_inst_gen;
1588316917
15884 bool is_int = resolved_type->id == ZigTypeIdInt || resolved_type->id == ZigTypeIdComptimeInt;16918 bool is_int = resolved_type->id == ZigTypeIdInt || resolved_type->id == ZigTypeIdComptimeInt;
15885 bool is_float = resolved_type->id == ZigTypeIdFloat || resolved_type->id == ZigTypeIdComptimeFloat;16919 bool is_float = resolved_type->id == ZigTypeIdFloat || resolved_type->id == ZigTypeIdComptimeFloat;
...@@ -15899,11 +16933,11 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp...@@ -15899,11 +16933,11 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
15899 if (instr_is_comptime(op1) && instr_is_comptime(op2)) {16933 if (instr_is_comptime(op1) && instr_is_comptime(op2)) {
15900 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);16934 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
15901 if (op1_val == nullptr)16935 if (op1_val == nullptr)
15902 return ira->codegen->invalid_instruction;16936 return ira->codegen->invalid_inst_gen;
1590316937
15904 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);16938 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
15905 if (op2_val == nullptr)16939 if (op2_val == nullptr)
15906 return ira->codegen->invalid_instruction;16940 return ira->codegen->invalid_inst_gen;
1590716941
15908 if (bigint_cmp_zero(&op2_val->data.x_bigint) == CmpEQ) {16942 if (bigint_cmp_zero(&op2_val->data.x_bigint) == CmpEQ) {
15909 // the division by zero error will be caught later, but we don't have a16943 // the division by zero error will be caught later, but we don't have a
...@@ -15922,11 +16956,11 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp...@@ -15922,11 +16956,11 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
15922 }16956 }
15923 }16957 }
15924 if (!ok) {16958 if (!ok) {
15925 ir_add_error(ira, &instruction->base,16959 ir_add_error(ira, &instruction->base.base,
15926 buf_sprintf("division with '%s' and '%s': signed integers must use @divTrunc, @divFloor, or @divExact",16960 buf_sprintf("division with '%s' and '%s': signed integers must use @divTrunc, @divFloor, or @divExact",
15927 buf_ptr(&op1->value->type->name),16961 buf_ptr(&op1->value->type->name),
15928 buf_ptr(&op2->value->type->name)));16962 buf_ptr(&op2->value->type->name)));
15929 return ira->codegen->invalid_instruction;16963 return ira->codegen->invalid_inst_gen;
15930 }16964 }
15931 } else {16965 } else {
15932 op_id = IrBinOpDivTrunc;16966 op_id = IrBinOpDivTrunc;
...@@ -15937,12 +16971,12 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp...@@ -15937,12 +16971,12 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
15937 if (instr_is_comptime(op1) && instr_is_comptime(op2)) {16971 if (instr_is_comptime(op1) && instr_is_comptime(op2)) {
15938 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);16972 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
15939 if (op1_val == nullptr)16973 if (op1_val == nullptr)
15940 return ira->codegen->invalid_instruction;16974 return ira->codegen->invalid_inst_gen;
1594116975
15942 if (is_int) {16976 if (is_int) {
15943 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);16977 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
15944 if (op2_val == nullptr)16978 if (op2_val == nullptr)
15945 return ira->codegen->invalid_instruction;16979 return ira->codegen->invalid_inst_gen;
1594616980
15947 if (bigint_cmp_zero(&op2->value->data.x_bigint) == CmpEQ) {16981 if (bigint_cmp_zero(&op2->value->data.x_bigint) == CmpEQ) {
15948 // the division by zero error will be caught later, but we don't16982 // the division by zero error will be caught later, but we don't
...@@ -15956,13 +16990,13 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp...@@ -15956,13 +16990,13 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
15956 ok = bigint_cmp(&rem_result, &mod_result) == CmpEQ;16990 ok = bigint_cmp(&rem_result, &mod_result) == CmpEQ;
15957 }16991 }
15958 } else {16992 } else {
15959 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);16993 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
15960 if (casted_op2 == ira->codegen->invalid_instruction)16994 if (type_is_invalid(casted_op2->value->type))
15961 return ira->codegen->invalid_instruction;16995 return ira->codegen->invalid_inst_gen;
1596216996
15963 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);16997 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
15964 if (op2_val == nullptr)16998 if (op2_val == nullptr)
15965 return ira->codegen->invalid_instruction;16999 return ira->codegen->invalid_inst_gen;
1596617000
15967 if (float_cmp_zero(casted_op2->value) == CmpEQ) {17001 if (float_cmp_zero(casted_op2->value) == CmpEQ) {
15968 // the division by zero error will be caught later, but we don't17002 // the division by zero error will be caught later, but we don't
...@@ -15978,11 +17012,11 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp...@@ -15978,11 +17012,11 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
15978 }17012 }
15979 }17013 }
15980 if (!ok) {17014 if (!ok) {
15981 ir_add_error(ira, &instruction->base,17015 ir_add_error(ira, &instruction->base.base,
15982 buf_sprintf("remainder division with '%s' and '%s': signed integers and floats must use @rem or @mod",17016 buf_sprintf("remainder division with '%s' and '%s': signed integers and floats must use @rem or @mod",
15983 buf_ptr(&op1->value->type->name),17017 buf_ptr(&op1->value->type->name),
15984 buf_ptr(&op2->value->type->name)));17018 buf_ptr(&op2->value->type->name)));
15985 return ira->codegen->invalid_instruction;17019 return ira->codegen->invalid_inst_gen;
15986 }17020 }
15987 }17021 }
15988 op_id = IrBinOpRemRem;17022 op_id = IrBinOpRemRem;
...@@ -16002,12 +17036,12 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp...@@ -16002,12 +17036,12 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
16002 }17036 }
16003 }17037 }
16004 if (!ok) {17038 if (!ok) {
16005 AstNode *source_node = instruction->base.source_node;17039 AstNode *source_node = instruction->base.base.source_node;
16006 ir_add_error_node(ira, source_node,17040 ir_add_error_node(ira, source_node,
16007 buf_sprintf("invalid operands to binary expression: '%s' and '%s'",17041 buf_sprintf("invalid operands to binary expression: '%s' and '%s'",
16008 buf_ptr(&op1->value->type->name),17042 buf_ptr(&op1->value->type->name),
16009 buf_ptr(&op2->value->type->name)));17043 buf_ptr(&op2->value->type->name)));
16010 return ira->codegen->invalid_instruction;17044 return ira->codegen->invalid_inst_gen;
16011 }17045 }
1601217046
16013 if (resolved_type->id == ZigTypeIdComptimeInt) {17047 if (resolved_type->id == ZigTypeIdComptimeInt) {
...@@ -16020,33 +17054,31 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp...@@ -16020,33 +17054,31 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
16020 }17054 }
16021 }17055 }
1602217056
16023 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);17057 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);
16024 if (casted_op1 == ira->codegen->invalid_instruction)17058 if (type_is_invalid(casted_op1->value->type))
16025 return ira->codegen->invalid_instruction;17059 return ira->codegen->invalid_inst_gen;
1602617060
16027 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);17061 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
16028 if (casted_op2 == ira->codegen->invalid_instruction)17062 if (type_is_invalid(casted_op2->value->type))
16029 return ira->codegen->invalid_instruction;17063 return ira->codegen->invalid_inst_gen;
1603017064
16031 if (instr_is_comptime(casted_op1) && instr_is_comptime(casted_op2)) {17065 if (instr_is_comptime(casted_op1) && instr_is_comptime(casted_op2)) {
16032 ZigValue *op1_val = ir_resolve_const(ira, casted_op1, UndefBad);17066 ZigValue *op1_val = ir_resolve_const(ira, casted_op1, UndefBad);
16033 if (op1_val == nullptr)17067 if (op1_val == nullptr)
16034 return ira->codegen->invalid_instruction;17068 return ira->codegen->invalid_inst_gen;
16035 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);17069 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
16036 if (op2_val == nullptr)17070 if (op2_val == nullptr)
16037 return ira->codegen->invalid_instruction;17071 return ira->codegen->invalid_inst_gen;
1603817072
16039 return ir_analyze_math_op(ira, &instruction->base, resolved_type, op1_val, op_id, op2_val);17073 return ir_analyze_math_op(ira, &instruction->base.base, resolved_type, op1_val, op_id, op2_val);
16040 }17074 }
1604117075
16042 IrInstruction *result = ir_build_bin_op(&ira->new_irb, instruction->base.scope,17076 return ir_build_bin_op_gen(ira, &instruction->base.base, resolved_type,
16043 instruction->base.source_node, op_id, casted_op1, casted_op2, instruction->safety_check_on);17077 op_id, casted_op1, casted_op2, instruction->safety_check_on);
16044 result->value->type = resolved_type;
16045 return result;
16046}17078}
1604717079
16048static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source_instr,17080static IrInstGen *ir_analyze_tuple_cat(IrAnalyze *ira, IrInst* source_instr,
16049 IrInstruction *op1, IrInstruction *op2)17081 IrInstGen *op1, IrInstGen *op2)
16050{17082{
16051 Error err;17083 Error err;
16052 ZigType *op1_type = op1->value->type;17084 ZigType *op1_type = op1->value->type;
...@@ -16063,9 +17095,9 @@ static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source...@@ -16063,9 +17095,9 @@ static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source
16063 new_type->data.structure.special = StructSpecialInferredTuple;17095 new_type->data.structure.special = StructSpecialInferredTuple;
16064 new_type->data.structure.resolve_status = ResolveStatusBeingInferred;17096 new_type->data.structure.resolve_status = ResolveStatusBeingInferred;
1606517097
16066 bool is_comptime = ir_should_inline(ira->new_irb.exec, source_instr->scope);17098 bool is_comptime = ir_should_inline(ira->old_irb.exec, source_instr->scope);
1606717099
16068 IrInstruction *new_struct_ptr = ir_resolve_result(ira, source_instr, no_result_loc(),17100 IrInstGen *new_struct_ptr = ir_resolve_result(ira, source_instr, no_result_loc(),
16069 new_type, nullptr, false, true);17101 new_type, nullptr, false, true);
16070 uint32_t new_field_count = op1_field_count + op2_field_count;17102 uint32_t new_field_count = op1_field_count + op2_field_count;
1607117103
...@@ -16089,13 +17121,13 @@ static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source...@@ -16089,13 +17121,13 @@ static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source
16089 new_field->is_comptime = src_field->is_comptime;17121 new_field->is_comptime = src_field->is_comptime;
16090 }17122 }
16091 if ((err = type_resolve(ira->codegen, new_type, ResolveStatusZeroBitsKnown)))17123 if ((err = type_resolve(ira->codegen, new_type, ResolveStatusZeroBitsKnown)))
16092 return ira->codegen->invalid_instruction;17124 return ira->codegen->invalid_inst_gen;
1609317125
16094 ZigList<IrInstruction *> const_ptrs = {};17126 ZigList<IrInstGen *> const_ptrs = {};
16095 IrInstruction *first_non_const_instruction = nullptr;17127 IrInstGen *first_non_const_instruction = nullptr;
16096 for (uint32_t i = 0; i < new_field_count; i += 1) {17128 for (uint32_t i = 0; i < new_field_count; i += 1) {
16097 TypeStructField *dst_field = new_type->data.structure.fields[i];17129 TypeStructField *dst_field = new_type->data.structure.fields[i];
16098 IrInstruction *src_struct_op;17130 IrInstGen *src_struct_op;
16099 TypeStructField *src_field;17131 TypeStructField *src_field;
16100 if (i < op1_field_count) {17132 if (i < op1_field_count) {
16101 src_field = op1_type->data.structure.fields[i];17133 src_field = op1_type->data.structure.fields[i];
...@@ -16104,73 +17136,73 @@ static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source...@@ -16104,73 +17136,73 @@ static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source
16104 src_field = op2_type->data.structure.fields[i - op1_field_count];17136 src_field = op2_type->data.structure.fields[i - op1_field_count];
16105 src_struct_op = op2;17137 src_struct_op = op2;
16106 }17138 }
16107 IrInstruction *field_value = ir_analyze_struct_value_field_value(ira, source_instr,17139 IrInstGen *field_value = ir_analyze_struct_value_field_value(ira, source_instr,
16108 src_struct_op, src_field);17140 src_struct_op, src_field);
16109 if (type_is_invalid(field_value->value->type))17141 if (type_is_invalid(field_value->value->type))
16110 return ira->codegen->invalid_instruction;17142 return ira->codegen->invalid_inst_gen;
16111 IrInstruction *dest_ptr = ir_analyze_struct_field_ptr(ira, source_instr, dst_field,17143 IrInstGen *dest_ptr = ir_analyze_struct_field_ptr(ira, source_instr, dst_field,
16112 new_struct_ptr, new_type, true);17144 new_struct_ptr, new_type, true);
16113 if (type_is_invalid(dest_ptr->value->type))17145 if (type_is_invalid(dest_ptr->value->type))
16114 return ira->codegen->invalid_instruction;17146 return ira->codegen->invalid_inst_gen;
16115 if (instr_is_comptime(field_value)) {17147 if (instr_is_comptime(field_value)) {
16116 const_ptrs.append(dest_ptr);17148 const_ptrs.append(dest_ptr);
16117 } else {17149 } else {
16118 first_non_const_instruction = field_value;17150 first_non_const_instruction = field_value;
16119 }17151 }
16120 IrInstruction *store_ptr_inst = ir_analyze_store_ptr(ira, source_instr, dest_ptr, field_value,17152 IrInstGen *store_ptr_inst = ir_analyze_store_ptr(ira, source_instr, dest_ptr, field_value,
16121 true);17153 true);
16122 if (type_is_invalid(store_ptr_inst->value->type))17154 if (type_is_invalid(store_ptr_inst->value->type))
16123 return ira->codegen->invalid_instruction;17155 return ira->codegen->invalid_inst_gen;
16124 }17156 }
16125 if (const_ptrs.length != new_field_count) {17157 if (const_ptrs.length != new_field_count) {
16126 new_struct_ptr->value->special = ConstValSpecialRuntime;17158 new_struct_ptr->value->special = ConstValSpecialRuntime;
16127 for (size_t i = 0; i < const_ptrs.length; i += 1) {17159 for (size_t i = 0; i < const_ptrs.length; i += 1) {
16128 IrInstruction *elem_result_loc = const_ptrs.at(i);17160 IrInstGen *elem_result_loc = const_ptrs.at(i);
16129 assert(elem_result_loc->value->special == ConstValSpecialStatic);17161 assert(elem_result_loc->value->special == ConstValSpecialStatic);
16130 if (elem_result_loc->value->type->data.pointer.inferred_struct_field != nullptr) {17162 if (elem_result_loc->value->type->data.pointer.inferred_struct_field != nullptr) {
16131 // This field will be generated comptime; no need to do this.17163 // This field will be generated comptime; no need to do this.
16132 continue;17164 continue;
16133 }17165 }
16134 IrInstruction *deref = ir_get_deref(ira, elem_result_loc, elem_result_loc, nullptr);17166 IrInstGen *deref = ir_get_deref(ira, &elem_result_loc->base, elem_result_loc, nullptr);
16135 elem_result_loc->value->special = ConstValSpecialRuntime;17167 elem_result_loc->value->special = ConstValSpecialRuntime;
16136 ir_analyze_store_ptr(ira, elem_result_loc, elem_result_loc, deref, false);17168 ir_analyze_store_ptr(ira, &elem_result_loc->base, elem_result_loc, deref, false);
16137 }17169 }
16138 }17170 }
16139 IrInstruction *result = ir_get_deref(ira, source_instr, new_struct_ptr, nullptr);17171 IrInstGen *result = ir_get_deref(ira, source_instr, new_struct_ptr, nullptr);
16140 if (instr_is_comptime(result))17172 if (instr_is_comptime(result))
16141 return result;17173 return result;
1614217174
16143 if (is_comptime) {17175 if (is_comptime) {
16144 ir_add_error_node(ira, first_non_const_instruction->source_node,17176 ir_add_error(ira, &first_non_const_instruction->base,
16145 buf_sprintf("unable to evaluate constant expression"));17177 buf_sprintf("unable to evaluate constant expression"));
16146 return ira->codegen->invalid_instruction;17178 return ira->codegen->invalid_inst_gen;
16147 }17179 }
1614817180
16149 return result;17181 return result;
16150}17182}
1615117183
16152static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *instruction) {17184static IrInstGen *ir_analyze_array_cat(IrAnalyze *ira, IrInstSrcBinOp *instruction) {
16153 IrInstruction *op1 = instruction->op1->child;17185 IrInstGen *op1 = instruction->op1->child;
16154 ZigType *op1_type = op1->value->type;17186 ZigType *op1_type = op1->value->type;
16155 if (type_is_invalid(op1_type))17187 if (type_is_invalid(op1_type))
16156 return ira->codegen->invalid_instruction;17188 return ira->codegen->invalid_inst_gen;
1615717189
16158 IrInstruction *op2 = instruction->op2->child;17190 IrInstGen *op2 = instruction->op2->child;
16159 ZigType *op2_type = op2->value->type;17191 ZigType *op2_type = op2->value->type;
16160 if (type_is_invalid(op2_type))17192 if (type_is_invalid(op2_type))
16161 return ira->codegen->invalid_instruction;17193 return ira->codegen->invalid_inst_gen;
1616217194
16163 if (is_tuple(op1_type) && is_tuple(op2_type)) {17195 if (is_tuple(op1_type) && is_tuple(op2_type)) {
16164 return ir_analyze_tuple_cat(ira, &instruction->base, op1, op2);17196 return ir_analyze_tuple_cat(ira, &instruction->base.base, op1, op2);
16165 }17197 }
1616617198
16167 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);17199 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
16168 if (!op1_val)17200 if (!op1_val)
16169 return ira->codegen->invalid_instruction;17201 return ira->codegen->invalid_inst_gen;
1617017202
16171 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);17203 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
16172 if (!op2_val)17204 if (!op2_val)
16173 return ira->codegen->invalid_instruction;17205 return ira->codegen->invalid_inst_gen;
1617417206
16175 ZigValue *sentinel1 = nullptr;17207 ZigValue *sentinel1 = nullptr;
16176 ZigValue *op1_array_val;17208 ZigValue *op1_array_val;
...@@ -16208,15 +17240,15 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i...@@ -16208,15 +17240,15 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
16208 {17240 {
16209 ZigType *array_type = op1_type->data.pointer.child_type;17241 ZigType *array_type = op1_type->data.pointer.child_type;
16210 child_type = array_type->data.array.child_type;17242 child_type = array_type->data.array.child_type;
16211 op1_array_val = const_ptr_pointee(ira, ira->codegen, op1_val, op1->source_node);17243 op1_array_val = const_ptr_pointee(ira, ira->codegen, op1_val, op1->base.source_node);
16212 if (op1_array_val == nullptr)17244 if (op1_array_val == nullptr)
16213 return ira->codegen->invalid_instruction;17245 return ira->codegen->invalid_inst_gen;
16214 op1_array_index = 0;17246 op1_array_index = 0;
16215 op1_array_end = array_type->data.array.len;17247 op1_array_end = array_type->data.array.len;
16216 sentinel1 = array_type->data.array.sentinel;17248 sentinel1 = array_type->data.array.sentinel;
16217 } else {17249 } else {
16218 ir_add_error(ira, op1, buf_sprintf("expected array, found '%s'", buf_ptr(&op1->value->type->name)));17250 ir_add_error(ira, &op1->base, buf_sprintf("expected array, found '%s'", buf_ptr(&op1->value->type->name)));
16219 return ira->codegen->invalid_instruction;17251 return ira->codegen->invalid_inst_gen;
16220 }17252 }
1622117253
16222 ZigValue *sentinel2 = nullptr;17254 ZigValue *sentinel2 = nullptr;
...@@ -16256,23 +17288,23 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i...@@ -16256,23 +17288,23 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
16256 {17288 {
16257 ZigType *array_type = op2_type->data.pointer.child_type;17289 ZigType *array_type = op2_type->data.pointer.child_type;
16258 op2_type_valid = array_type->data.array.child_type == child_type;17290 op2_type_valid = array_type->data.array.child_type == child_type;
16259 op2_array_val = const_ptr_pointee(ira, ira->codegen, op2_val, op2->source_node);17291 op2_array_val = const_ptr_pointee(ira, ira->codegen, op2_val, op2->base.source_node);
16260 if (op2_array_val == nullptr)17292 if (op2_array_val == nullptr)
16261 return ira->codegen->invalid_instruction;17293 return ira->codegen->invalid_inst_gen;
16262 op2_array_index = 0;17294 op2_array_index = 0;
16263 op2_array_end = array_type->data.array.len;17295 op2_array_end = array_type->data.array.len;
1626417296
16265 sentinel2 = array_type->data.array.sentinel;17297 sentinel2 = array_type->data.array.sentinel;
16266 } else {17298 } else {
16267 ir_add_error(ira, op2,17299 ir_add_error(ira, &op2->base,
16268 buf_sprintf("expected array or C string literal, found '%s'", buf_ptr(&op2->value->type->name)));17300 buf_sprintf("expected array or C string literal, found '%s'", buf_ptr(&op2->value->type->name)));
16269 return ira->codegen->invalid_instruction;17301 return ira->codegen->invalid_inst_gen;
16270 }17302 }
16271 if (!op2_type_valid) {17303 if (!op2_type_valid) {
16272 ir_add_error(ira, op2, buf_sprintf("expected array of type '%s', found '%s'",17304 ir_add_error(ira, &op2->base, buf_sprintf("expected array of type '%s', found '%s'",
16273 buf_ptr(&child_type->name),17305 buf_ptr(&child_type->name),
16274 buf_ptr(&op2->value->type->name)));17306 buf_ptr(&op2->value->type->name)));
16275 return ira->codegen->invalid_instruction;17307 return ira->codegen->invalid_inst_gen;
16276 }17308 }
1627717309
16278 ZigValue *sentinel;17310 ZigValue *sentinel;
...@@ -16289,7 +17321,7 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i...@@ -16289,7 +17321,7 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
16289 }17321 }
1629017322
16291 // The type of result is populated in the following if blocks17323 // The type of result is populated in the following if blocks
16292 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);17324 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
16293 ZigValue *out_val = result->value;17325 ZigValue *out_val = result->value;
1629417326
16295 ZigValue *out_array_val;17327 ZigValue *out_array_val;
...@@ -16377,14 +17409,14 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i...@@ -16377,14 +17409,14 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
16377 return result;17409 return result;
16378}17410}
1637917411
16380static IrInstruction *ir_analyze_array_mult(IrAnalyze *ira, IrInstructionBinOp *instruction) {17412static IrInstGen *ir_analyze_array_mult(IrAnalyze *ira, IrInstSrcBinOp *instruction) {
16381 IrInstruction *op1 = instruction->op1->child;17413 IrInstGen *op1 = instruction->op1->child;
16382 if (type_is_invalid(op1->value->type))17414 if (type_is_invalid(op1->value->type))
16383 return ira->codegen->invalid_instruction;17415 return ira->codegen->invalid_inst_gen;
1638417416
16385 IrInstruction *op2 = instruction->op2->child;17417 IrInstGen *op2 = instruction->op2->child;
16386 if (type_is_invalid(op2->value->type))17418 if (type_is_invalid(op2->value->type))
16387 return ira->codegen->invalid_instruction;17419 return ira->codegen->invalid_inst_gen;
1638817420
16389 bool want_ptr_to_array = false;17421 bool want_ptr_to_array = false;
16390 ZigType *array_type;17422 ZigType *array_type;
...@@ -16393,49 +17425,49 @@ static IrInstruction *ir_analyze_array_mult(IrAnalyze *ira, IrInstructionBinOp *...@@ -16393,49 +17425,49 @@ static IrInstruction *ir_analyze_array_mult(IrAnalyze *ira, IrInstructionBinOp *
16393 array_type = op1->value->type;17425 array_type = op1->value->type;
16394 array_val = ir_resolve_const(ira, op1, UndefOk);17426 array_val = ir_resolve_const(ira, op1, UndefOk);
16395 if (array_val == nullptr)17427 if (array_val == nullptr)
16396 return ira->codegen->invalid_instruction;17428 return ira->codegen->invalid_inst_gen;
16397 } else if (op1->value->type->id == ZigTypeIdPointer && op1->value->type->data.pointer.ptr_len == PtrLenSingle &&17429 } else if (op1->value->type->id == ZigTypeIdPointer && op1->value->type->data.pointer.ptr_len == PtrLenSingle &&
16398 op1->value->type->data.pointer.child_type->id == ZigTypeIdArray)17430 op1->value->type->data.pointer.child_type->id == ZigTypeIdArray)
16399 {17431 {
16400 array_type = op1->value->type->data.pointer.child_type;17432 array_type = op1->value->type->data.pointer.child_type;
16401 IrInstruction *array_inst = ir_get_deref(ira, op1, op1, nullptr);17433 IrInstGen *array_inst = ir_get_deref(ira, &op1->base, op1, nullptr);
16402 if (type_is_invalid(array_inst->value->type))17434 if (type_is_invalid(array_inst->value->type))
16403 return ira->codegen->invalid_instruction;17435 return ira->codegen->invalid_inst_gen;
16404 array_val = ir_resolve_const(ira, array_inst, UndefOk);17436 array_val = ir_resolve_const(ira, array_inst, UndefOk);
16405 if (array_val == nullptr)17437 if (array_val == nullptr)
16406 return ira->codegen->invalid_instruction;17438 return ira->codegen->invalid_inst_gen;
16407 want_ptr_to_array = true;17439 want_ptr_to_array = true;
16408 } else {17440 } else {
16409 ir_add_error(ira, op1, buf_sprintf("expected array type, found '%s'", buf_ptr(&op1->value->type->name)));17441 ir_add_error(ira, &op1->base, buf_sprintf("expected array type, found '%s'", buf_ptr(&op1->value->type->name)));
16410 return ira->codegen->invalid_instruction;17442 return ira->codegen->invalid_inst_gen;
16411 }17443 }
1641217444
16413 uint64_t mult_amt;17445 uint64_t mult_amt;
16414 if (!ir_resolve_usize(ira, op2, &mult_amt))17446 if (!ir_resolve_usize(ira, op2, &mult_amt))
16415 return ira->codegen->invalid_instruction;17447 return ira->codegen->invalid_inst_gen;
1641617448
16417 uint64_t old_array_len = array_type->data.array.len;17449 uint64_t old_array_len = array_type->data.array.len;
16418 uint64_t new_array_len;17450 uint64_t new_array_len;
1641917451
16420 if (mul_u64_overflow(old_array_len, mult_amt, &new_array_len)) {17452 if (mul_u64_overflow(old_array_len, mult_amt, &new_array_len)) {
16421 ir_add_error(ira, &instruction->base, buf_sprintf("operation results in overflow"));17453 ir_add_error(ira, &instruction->base.base, buf_sprintf("operation results in overflow"));
16422 return ira->codegen->invalid_instruction;17454 return ira->codegen->invalid_inst_gen;
16423 }17455 }
1642417456
16425 ZigType *child_type = array_type->data.array.child_type;17457 ZigType *child_type = array_type->data.array.child_type;
16426 ZigType *result_array_type = get_array_type(ira->codegen, child_type, new_array_len,17458 ZigType *result_array_type = get_array_type(ira->codegen, child_type, new_array_len,
16427 array_type->data.array.sentinel);17459 array_type->data.array.sentinel);
1642817460
16429 IrInstruction *array_result;17461 IrInstGen *array_result;
16430 if (array_val->special == ConstValSpecialUndef || array_val->data.x_array.special == ConstArraySpecialUndef) {17462 if (array_val->special == ConstValSpecialUndef || array_val->data.x_array.special == ConstArraySpecialUndef) {
16431 array_result = ir_const_undef(ira, &instruction->base, result_array_type);17463 array_result = ir_const_undef(ira, &instruction->base.base, result_array_type);
16432 } else {17464 } else {
16433 array_result = ir_const(ira, &instruction->base, result_array_type);17465 array_result = ir_const(ira, &instruction->base.base, result_array_type);
16434 ZigValue *out_val = array_result->value;17466 ZigValue *out_val = array_result->value;
1643517467
16436 switch (type_has_one_possible_value(ira->codegen, result_array_type)) {17468 switch (type_has_one_possible_value(ira->codegen, result_array_type)) {
16437 case OnePossibleValueInvalid:17469 case OnePossibleValueInvalid:
16438 return ira->codegen->invalid_instruction;17470 return ira->codegen->invalid_inst_gen;
16439 case OnePossibleValueYes:17471 case OnePossibleValueYes:
16440 goto skip_computation;17472 goto skip_computation;
16441 case OnePossibleValueNo:17473 case OnePossibleValueNo:
...@@ -16471,35 +17503,35 @@ static IrInstruction *ir_analyze_array_mult(IrAnalyze *ira, IrInstructionBinOp *...@@ -16471,35 +17503,35 @@ static IrInstruction *ir_analyze_array_mult(IrAnalyze *ira, IrInstructionBinOp *
16471 }17503 }
16472skip_computation:17504skip_computation:
16473 if (want_ptr_to_array) {17505 if (want_ptr_to_array) {
16474 return ir_get_ref(ira, &instruction->base, array_result, true, false);17506 return ir_get_ref(ira, &instruction->base.base, array_result, true, false);
16475 } else {17507 } else {
16476 return array_result;17508 return array_result;
16477 }17509 }
16478}17510}
1647917511
16480static IrInstruction *ir_analyze_instruction_merge_err_sets(IrAnalyze *ira,17512static IrInstGen *ir_analyze_instruction_merge_err_sets(IrAnalyze *ira,
16481 IrInstructionMergeErrSets *instruction)17513 IrInstSrcMergeErrSets *instruction)
16482{17514{
16483 ZigType *op1_type = ir_resolve_error_set_type(ira, &instruction->base, instruction->op1->child);17515 ZigType *op1_type = ir_resolve_error_set_type(ira, &instruction->base.base, instruction->op1->child);
16484 if (type_is_invalid(op1_type))17516 if (type_is_invalid(op1_type))
16485 return ira->codegen->invalid_instruction;17517 return ira->codegen->invalid_inst_gen;
1648617518
16487 ZigType *op2_type = ir_resolve_error_set_type(ira, &instruction->base, instruction->op2->child);17519 ZigType *op2_type = ir_resolve_error_set_type(ira, &instruction->base.base, instruction->op2->child);
16488 if (type_is_invalid(op2_type))17520 if (type_is_invalid(op2_type))
16489 return ira->codegen->invalid_instruction;17521 return ira->codegen->invalid_inst_gen;
1649017522
16491 if (type_is_global_error_set(op1_type) ||17523 if (type_is_global_error_set(op1_type) ||
16492 type_is_global_error_set(op2_type))17524 type_is_global_error_set(op2_type))
16493 {17525 {
16494 return ir_const_type(ira, &instruction->base, ira->codegen->builtin_types.entry_global_error_set);17526 return ir_const_type(ira, &instruction->base.base, ira->codegen->builtin_types.entry_global_error_set);
16495 }17527 }
1649617528
16497 if (!resolve_inferred_error_set(ira->codegen, op1_type, instruction->op1->child->source_node)) {17529 if (!resolve_inferred_error_set(ira->codegen, op1_type, instruction->op1->child->base.source_node)) {
16498 return ira->codegen->invalid_instruction;17530 return ira->codegen->invalid_inst_gen;
16499 }17531 }
1650017532
16501 if (!resolve_inferred_error_set(ira->codegen, op2_type, instruction->op2->child->source_node)) {17533 if (!resolve_inferred_error_set(ira->codegen, op2_type, instruction->op2->child->base.source_node)) {
16502 return ira->codegen->invalid_instruction;17534 return ira->codegen->invalid_inst_gen;
16503 }17535 }
1650417536
16505 size_t errors_count = ira->codegen->errors_by_index.length;17537 size_t errors_count = ira->codegen->errors_by_index.length;
...@@ -16512,11 +17544,11 @@ static IrInstruction *ir_analyze_instruction_merge_err_sets(IrAnalyze *ira,...@@ -16512,11 +17544,11 @@ static IrInstruction *ir_analyze_instruction_merge_err_sets(IrAnalyze *ira,
16512 ZigType *result_type = get_error_set_union(ira->codegen, errors, op1_type, op2_type, instruction->type_name);17544 ZigType *result_type = get_error_set_union(ira->codegen, errors, op1_type, op2_type, instruction->type_name);
16513 deallocate(errors, errors_count, "ErrorTableEntry *");17545 deallocate(errors, errors_count, "ErrorTableEntry *");
1651417546
16515 return ir_const_type(ira, &instruction->base, result_type);17547 return ir_const_type(ira, &instruction->base.base, result_type);
16516}17548}
1651717549
1651817550
16519static IrInstruction *ir_analyze_instruction_bin_op(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {17551static IrInstGen *ir_analyze_instruction_bin_op(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
16520 IrBinOp op_id = bin_op_instruction->op_id;17552 IrBinOp op_id = bin_op_instruction->op_id;
16521 switch (op_id) {17553 switch (op_id) {
16522 case IrBinOpInvalid:17554 case IrBinOpInvalid:
...@@ -16561,41 +17593,39 @@ static IrInstruction *ir_analyze_instruction_bin_op(IrAnalyze *ira, IrInstructio...@@ -16561,41 +17593,39 @@ static IrInstruction *ir_analyze_instruction_bin_op(IrAnalyze *ira, IrInstructio
16561 zig_unreachable();17593 zig_unreachable();
16562}17594}
1656317595
16564static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,17596static IrInstGen *ir_analyze_instruction_decl_var(IrAnalyze *ira, IrInstSrcDeclVar *decl_var_instruction) {
16565 IrInstructionDeclVarSrc *decl_var_instruction)
16566{
16567 Error err;17597 Error err;
16568 ZigVar *var = decl_var_instruction->var;17598 ZigVar *var = decl_var_instruction->var;
1656917599
16570 ZigType *explicit_type = nullptr;17600 ZigType *explicit_type = nullptr;
16571 IrInstruction *var_type = nullptr;17601 IrInstGen *var_type = nullptr;
16572 if (decl_var_instruction->var_type != nullptr) {17602 if (decl_var_instruction->var_type != nullptr) {
16573 var_type = decl_var_instruction->var_type->child;17603 var_type = decl_var_instruction->var_type->child;
16574 ZigType *proposed_type = ir_resolve_type(ira, var_type);17604 ZigType *proposed_type = ir_resolve_type(ira, var_type);
16575 explicit_type = validate_var_type(ira->codegen, var_type->source_node, proposed_type);17605 explicit_type = validate_var_type(ira->codegen, var_type->base.source_node, proposed_type);
16576 if (type_is_invalid(explicit_type)) {17606 if (type_is_invalid(explicit_type)) {
16577 var->var_type = ira->codegen->builtin_types.entry_invalid;17607 var->var_type = ira->codegen->builtin_types.entry_invalid;
16578 return ira->codegen->invalid_instruction;17608 return ira->codegen->invalid_inst_gen;
16579 }17609 }
16580 }17610 }
1658117611
16582 AstNode *source_node = decl_var_instruction->base.source_node;17612 AstNode *source_node = decl_var_instruction->base.base.source_node;
1658317613
16584 bool is_comptime_var = ir_get_var_is_comptime(var);17614 bool is_comptime_var = ir_get_var_is_comptime(var);
1658517615
16586 bool var_class_requires_const = false;17616 bool var_class_requires_const = false;
1658717617
16588 IrInstruction *var_ptr = decl_var_instruction->ptr->child;17618 IrInstGen *var_ptr = decl_var_instruction->ptr->child;
16589 // if this is null, a compiler error happened and did not initialize the variable.17619 // if this is null, a compiler error happened and did not initialize the variable.
16590 // if there are no compile errors there may be a missing ir_expr_wrap in pass1 IR generation.17620 // if there are no compile errors there may be a missing ir_expr_wrap in pass1 IR generation.
16591 if (var_ptr == nullptr || type_is_invalid(var_ptr->value->type)) {17621 if (var_ptr == nullptr || type_is_invalid(var_ptr->value->type)) {
16592 ir_assert(var_ptr != nullptr || ira->codegen->errors.length != 0, &decl_var_instruction->base);17622 ir_assert(var_ptr != nullptr || ira->codegen->errors.length != 0, &decl_var_instruction->base.base);
16593 var->var_type = ira->codegen->builtin_types.entry_invalid;17623 var->var_type = ira->codegen->builtin_types.entry_invalid;
16594 return ira->codegen->invalid_instruction;17624 return ira->codegen->invalid_inst_gen;
16595 }17625 }
1659617626
16597 // The ir_build_var_decl_src call is supposed to pass a pointer to the allocation, not an initialization value.17627 // The ir_build_var_decl_src call is supposed to pass a pointer to the allocation, not an initialization value.
16598 ir_assert(var_ptr->value->type->id == ZigTypeIdPointer, &decl_var_instruction->base);17628 ir_assert(var_ptr->value->type->id == ZigTypeIdPointer, &decl_var_instruction->base.base);
1659917629
16600 ZigType *result_type = var_ptr->value->type->data.pointer.child_type;17630 ZigType *result_type = var_ptr->value->type->data.pointer.child_type;
16601 if (type_is_invalid(result_type)) {17631 if (type_is_invalid(result_type)) {
...@@ -16606,7 +17636,7 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,...@@ -16606,7 +17636,7 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
1660617636
16607 ZigValue *init_val = nullptr;17637 ZigValue *init_val = nullptr;
16608 if (instr_is_comptime(var_ptr) && var_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {17638 if (instr_is_comptime(var_ptr) && var_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
16609 init_val = const_ptr_pointee(ira, ira->codegen, var_ptr->value, decl_var_instruction->base.source_node);17639 init_val = const_ptr_pointee(ira, ira->codegen, var_ptr->value, decl_var_instruction->base.base.source_node);
16610 if (is_comptime_var) {17640 if (is_comptime_var) {
16611 if (var->gen_is_const) {17641 if (var->gen_is_const) {
16612 var->const_value = init_val;17642 var->const_value = init_val;
...@@ -16633,7 +17663,7 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,...@@ -16633,7 +17663,7 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
16633 case ReqCompTimeNo:17663 case ReqCompTimeNo:
16634 if (init_val != nullptr && value_is_comptime(init_val)) {17664 if (init_val != nullptr && value_is_comptime(init_val)) {
16635 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,17665 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,
16636 decl_var_instruction->base.source_node, init_val, UndefOk)))17666 decl_var_instruction->base.base.source_node, init_val, UndefOk)))
16637 {17667 {
16638 result_type = ira->codegen->builtin_types.entry_invalid;17668 result_type = ira->codegen->builtin_types.entry_invalid;
16639 } else if (init_val->type->id == ZigTypeIdFn &&17669 } else if (init_val->type->id == ZigTypeIdFn &&
...@@ -16666,13 +17696,13 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,...@@ -16666,13 +17696,13 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
16666 assert(var->var_type);17696 assert(var->var_type);
1666717697
16668 if (type_is_invalid(result_type)) {17698 if (type_is_invalid(result_type)) {
16669 return ir_const_void(ira, &decl_var_instruction->base);17699 return ir_const_void(ira, &decl_var_instruction->base.base);
16670 }17700 }
1667117701
16672 if (decl_var_instruction->align_value == nullptr) {17702 if (decl_var_instruction->align_value == nullptr) {
16673 if ((err = type_resolve(ira->codegen, result_type, ResolveStatusAlignmentKnown))) {17703 if ((err = type_resolve(ira->codegen, result_type, ResolveStatusAlignmentKnown))) {
16674 var->var_type = ira->codegen->builtin_types.entry_invalid;17704 var->var_type = ira->codegen->builtin_types.entry_invalid;
16675 return ir_const_void(ira, &decl_var_instruction->base);17705 return ir_const_void(ira, &decl_var_instruction->base.base);
16676 }17706 }
16677 var->align_bytes = get_abi_alignment(ira->codegen, result_type);17707 var->align_bytes = get_abi_alignment(ira->codegen, result_type);
16678 } else {17708 } else {
...@@ -16691,98 +17721,96 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,...@@ -16691,98 +17721,96 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
16691 // we need a runtime ptr but we have a comptime val.17721 // we need a runtime ptr but we have a comptime val.
16692 // since it's a comptime val there are no instructions for it.17722 // since it's a comptime val there are no instructions for it.
16693 // we memcpy the init value here17723 // we memcpy the init value here
16694 IrInstruction *deref = ir_get_deref(ira, var_ptr, var_ptr, nullptr);17724 IrInstGen *deref = ir_get_deref(ira, &var_ptr->base, var_ptr, nullptr);
16695 if (type_is_invalid(deref->value->type)) {17725 if (type_is_invalid(deref->value->type)) {
16696 var->var_type = ira->codegen->builtin_types.entry_invalid;17726 var->var_type = ira->codegen->builtin_types.entry_invalid;
16697 return ira->codegen->invalid_instruction;17727 return ira->codegen->invalid_inst_gen;
16698 }17728 }
16699 // If this assertion trips, something is wrong with the IR instructions, because17729 // If this assertion trips, something is wrong with the IR instructions, because
16700 // we expected the above deref to return a constant value, but it created a runtime17730 // we expected the above deref to return a constant value, but it created a runtime
16701 // instruction.17731 // instruction.
16702 assert(deref->value->special != ConstValSpecialRuntime);17732 assert(deref->value->special != ConstValSpecialRuntime);
16703 var_ptr->value->special = ConstValSpecialRuntime;17733 var_ptr->value->special = ConstValSpecialRuntime;
16704 ir_analyze_store_ptr(ira, var_ptr, var_ptr, deref, false);17734 ir_analyze_store_ptr(ira, &var_ptr->base, var_ptr, deref, false);
16705 }17735 }
16706 if (instr_is_comptime(var_ptr) &&17736 if (instr_is_comptime(var_ptr) && (is_comptime_var || (var_class_requires_const && var->gen_is_const))) {
16707 (is_comptime_var || (var_class_requires_const && var->gen_is_const)))17737 return ir_const_void(ira, &decl_var_instruction->base.base);
16708 {
16709 return ir_const_void(ira, &decl_var_instruction->base);
16710 }17738 }
16711 } else if (is_comptime_var) {17739 } else if (is_comptime_var) {
16712 ir_add_error(ira, &decl_var_instruction->base,17740 ir_add_error(ira, &decl_var_instruction->base.base,
16713 buf_sprintf("cannot store runtime value in compile time variable"));17741 buf_sprintf("cannot store runtime value in compile time variable"));
16714 var->var_type = ira->codegen->builtin_types.entry_invalid;17742 var->var_type = ira->codegen->builtin_types.entry_invalid;
16715 return ira->codegen->invalid_instruction;17743 return ira->codegen->invalid_inst_gen;
16716 }17744 }
1671717745
16718 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);17746 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
16719 if (fn_entry)17747 if (fn_entry)
16720 fn_entry->variable_list.append(var);17748 fn_entry->variable_list.append(var);
1672117749
16722 return ir_build_var_decl_gen(ira, &decl_var_instruction->base, var, var_ptr);17750 return ir_build_var_decl_gen(ira, &decl_var_instruction->base.base, var, var_ptr);
16723}17751}
1672417752
16725static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructionExport *instruction) {17753static IrInstGen *ir_analyze_instruction_export(IrAnalyze *ira, IrInstSrcExport *instruction) {
16726 IrInstruction *target = instruction->target->child;17754 IrInstGen *target = instruction->target->child;
16727 if (type_is_invalid(target->value->type))17755 if (type_is_invalid(target->value->type))
16728 return ira->codegen->invalid_instruction;17756 return ira->codegen->invalid_inst_gen;
1672917757
16730 IrInstruction *options = instruction->options->child;17758 IrInstGen *options = instruction->options->child;
16731 if (type_is_invalid(options->value->type))17759 if (type_is_invalid(options->value->type))
16732 return ira->codegen->invalid_instruction;17760 return ira->codegen->invalid_inst_gen;
1673317761
16734 ZigType *options_type = options->value->type;17762 ZigType *options_type = options->value->type;
16735 assert(options_type->id == ZigTypeIdStruct);17763 assert(options_type->id == ZigTypeIdStruct);
1673617764
16737 TypeStructField *name_field = find_struct_type_field(options_type, buf_create_from_str("name"));17765 TypeStructField *name_field = find_struct_type_field(options_type, buf_create_from_str("name"));
16738 ir_assert(name_field != nullptr, &instruction->base);17766 ir_assert(name_field != nullptr, &instruction->base.base);
16739 IrInstruction *name_inst = ir_analyze_struct_value_field_value(ira, &instruction->base, options, name_field);17767 IrInstGen *name_inst = ir_analyze_struct_value_field_value(ira, &instruction->base.base, options, name_field);
16740 if (type_is_invalid(name_inst->value->type))17768 if (type_is_invalid(name_inst->value->type))
16741 return ira->codegen->invalid_instruction;17769 return ira->codegen->invalid_inst_gen;
1674217770
16743 TypeStructField *linkage_field = find_struct_type_field(options_type, buf_create_from_str("linkage"));17771 TypeStructField *linkage_field = find_struct_type_field(options_type, buf_create_from_str("linkage"));
16744 ir_assert(linkage_field != nullptr, &instruction->base);17772 ir_assert(linkage_field != nullptr, &instruction->base.base);
16745 IrInstruction *linkage_inst = ir_analyze_struct_value_field_value(ira, &instruction->base, options, linkage_field);17773 IrInstGen *linkage_inst = ir_analyze_struct_value_field_value(ira, &instruction->base.base, options, linkage_field);
16746 if (type_is_invalid(linkage_inst->value->type))17774 if (type_is_invalid(linkage_inst->value->type))
16747 return ira->codegen->invalid_instruction;17775 return ira->codegen->invalid_inst_gen;
1674817776
16749 TypeStructField *section_field = find_struct_type_field(options_type, buf_create_from_str("section"));17777 TypeStructField *section_field = find_struct_type_field(options_type, buf_create_from_str("section"));
16750 ir_assert(section_field != nullptr, &instruction->base);17778 ir_assert(section_field != nullptr, &instruction->base.base);
16751 IrInstruction *section_inst = ir_analyze_struct_value_field_value(ira, &instruction->base, options, section_field);17779 IrInstGen *section_inst = ir_analyze_struct_value_field_value(ira, &instruction->base.base, options, section_field);
16752 if (type_is_invalid(section_inst->value->type))17780 if (type_is_invalid(section_inst->value->type))
16753 return ira->codegen->invalid_instruction;17781 return ira->codegen->invalid_inst_gen;
1675417782
16755 // The `section` field is optional, we have to unwrap it first17783 // The `section` field is optional, we have to unwrap it first
16756 IrInstruction *non_null_check = ir_analyze_test_non_null(ira, &instruction->base, section_inst);17784 IrInstGen *non_null_check = ir_analyze_test_non_null(ira, &instruction->base.base, section_inst);
16757 bool is_non_null;17785 bool is_non_null;
16758 if (!ir_resolve_bool(ira, non_null_check, &is_non_null))17786 if (!ir_resolve_bool(ira, non_null_check, &is_non_null))
16759 return ira->codegen->invalid_instruction;17787 return ira->codegen->invalid_inst_gen;
1676017788
16761 IrInstruction *section_str_inst = nullptr;17789 IrInstGen *section_str_inst = nullptr;
16762 if (is_non_null) {17790 if (is_non_null) {
16763 section_str_inst = ir_analyze_optional_value_payload_value(ira, &instruction->base, section_inst, false);17791 section_str_inst = ir_analyze_optional_value_payload_value(ira, &instruction->base.base, section_inst, false);
16764 if (type_is_invalid(section_str_inst->value->type))17792 if (type_is_invalid(section_str_inst->value->type))
16765 return ira->codegen->invalid_instruction;17793 return ira->codegen->invalid_inst_gen;
16766 }17794 }
1676717795
16768 // Resolve all the comptime values17796 // Resolve all the comptime values
16769 Buf *symbol_name = ir_resolve_str(ira, name_inst);17797 Buf *symbol_name = ir_resolve_str(ira, name_inst);
16770 if (!symbol_name)17798 if (!symbol_name)
16771 return ira->codegen->invalid_instruction;17799 return ira->codegen->invalid_inst_gen;
1677217800
16773 if (buf_len(symbol_name) < 1) {17801 if (buf_len(symbol_name) < 1) {
16774 ir_add_error(ira, name_inst,17802 ir_add_error(ira, &name_inst->base,
16775 buf_sprintf("exported symbol name cannot be empty"));17803 buf_sprintf("exported symbol name cannot be empty"));
16776 return ira->codegen->invalid_instruction;17804 return ira->codegen->invalid_inst_gen;
16777 }17805 }
1677817806
16779 GlobalLinkageId global_linkage_id;17807 GlobalLinkageId global_linkage_id;
16780 if (!ir_resolve_global_linkage(ira, linkage_inst, &global_linkage_id))17808 if (!ir_resolve_global_linkage(ira, linkage_inst, &global_linkage_id))
16781 return ira->codegen->invalid_instruction;17809 return ira->codegen->invalid_inst_gen;
1678217810
16783 Buf *section_name = nullptr;17811 Buf *section_name = nullptr;
16784 if (section_str_inst != nullptr && !(section_name = ir_resolve_str(ira, section_str_inst)))17812 if (section_str_inst != nullptr && !(section_name = ir_resolve_str(ira, section_str_inst)))
16785 return ira->codegen->invalid_instruction;17813 return ira->codegen->invalid_inst_gen;
1678617814
16787 // TODO: This function needs to be audited.17815 // TODO: This function needs to be audited.
16788 // It's not clear how all the different types are supposed to be handled.17816 // It's not clear how all the different types are supposed to be handled.
...@@ -16790,15 +17818,15 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio...@@ -16790,15 +17818,15 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
16790 // in another file.17818 // in another file.
16791 TldFn *tld_fn = allocate<TldFn>(1);17819 TldFn *tld_fn = allocate<TldFn>(1);
16792 tld_fn->base.id = TldIdFn;17820 tld_fn->base.id = TldIdFn;
16793 tld_fn->base.source_node = instruction->base.source_node;17821 tld_fn->base.source_node = instruction->base.base.source_node;
1679417822
16795 auto entry = ira->codegen->exported_symbol_names.put_unique(symbol_name, &tld_fn->base);17823 auto entry = ira->codegen->exported_symbol_names.put_unique(symbol_name, &tld_fn->base);
16796 if (entry) {17824 if (entry) {
16797 AstNode *other_export_node = entry->value->source_node;17825 AstNode *other_export_node = entry->value->source_node;
16798 ErrorMsg *msg = ir_add_error(ira, &instruction->base,17826 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
16799 buf_sprintf("exported symbol collision: '%s'", buf_ptr(symbol_name)));17827 buf_sprintf("exported symbol collision: '%s'", buf_ptr(symbol_name)));
16800 add_error_note(ira->codegen, msg, other_export_node, buf_sprintf("other symbol is here"));17828 add_error_note(ira->codegen, msg, other_export_node, buf_sprintf("other symbol is here"));
16801 return ira->codegen->invalid_instruction;17829 return ira->codegen->invalid_inst_gen;
16802 }17830 }
1680317831
16804 Error err;17832 Error err;
...@@ -16814,12 +17842,12 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio...@@ -16814,12 +17842,12 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
16814 CallingConvention cc = fn_entry->type_entry->data.fn.fn_type_id.cc;17842 CallingConvention cc = fn_entry->type_entry->data.fn.fn_type_id.cc;
16815 switch (cc) {17843 switch (cc) {
16816 case CallingConventionUnspecified: {17844 case CallingConventionUnspecified: {
16817 ErrorMsg *msg = ir_add_error(ira, target,17845 ErrorMsg *msg = ir_add_error(ira, &target->base,
16818 buf_sprintf("exported function must specify calling convention"));17846 buf_sprintf("exported function must specify calling convention"));
16819 add_error_note(ira->codegen, msg, fn_entry->proto_node, buf_sprintf("declared here"));17847 add_error_note(ira->codegen, msg, fn_entry->proto_node, buf_sprintf("declared here"));
16820 } break;17848 } break;
16821 case CallingConventionAsync: {17849 case CallingConventionAsync: {
16822 ErrorMsg *msg = ir_add_error(ira, target,17850 ErrorMsg *msg = ir_add_error(ira, &target->base,
16823 buf_sprintf("exported function cannot be async"));17851 buf_sprintf("exported function cannot be async"));
16824 add_error_note(ira->codegen, msg, fn_entry->proto_node, buf_sprintf("declared here"));17852 add_error_note(ira->codegen, msg, fn_entry->proto_node, buf_sprintf("declared here"));
16825 } break;17853 } break;
...@@ -16842,10 +17870,10 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio...@@ -16842,10 +17870,10 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
16842 } break;17870 } break;
16843 case ZigTypeIdStruct:17871 case ZigTypeIdStruct:
16844 if (is_slice(target->value->type)) {17872 if (is_slice(target->value->type)) {
16845 ir_add_error(ira, target,17873 ir_add_error(ira, &target->base,
16846 buf_sprintf("unable to export value of type '%s'", buf_ptr(&target->value->type->name)));17874 buf_sprintf("unable to export value of type '%s'", buf_ptr(&target->value->type->name)));
16847 } else if (target->value->type->data.structure.layout != ContainerLayoutExtern) {17875 } else if (target->value->type->data.structure.layout != ContainerLayoutExtern) {
16848 ErrorMsg *msg = ir_add_error(ira, target,17876 ErrorMsg *msg = ir_add_error(ira, &target->base,
16849 buf_sprintf("exported struct value must be declared extern"));17877 buf_sprintf("exported struct value must be declared extern"));
16850 add_error_note(ira->codegen, msg, target->value->type->data.structure.decl_node, buf_sprintf("declared here"));17878 add_error_note(ira->codegen, msg, target->value->type->data.structure.decl_node, buf_sprintf("declared here"));
16851 } else {17879 } else {
...@@ -16854,7 +17882,7 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio...@@ -16854,7 +17882,7 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
16854 break;17882 break;
16855 case ZigTypeIdUnion:17883 case ZigTypeIdUnion:
16856 if (target->value->type->data.unionation.layout != ContainerLayoutExtern) {17884 if (target->value->type->data.unionation.layout != ContainerLayoutExtern) {
16857 ErrorMsg *msg = ir_add_error(ira, target,17885 ErrorMsg *msg = ir_add_error(ira, &target->base,
16858 buf_sprintf("exported union value must be declared extern"));17886 buf_sprintf("exported union value must be declared extern"));
16859 add_error_note(ira->codegen, msg, target->value->type->data.unionation.decl_node, buf_sprintf("declared here"));17887 add_error_note(ira->codegen, msg, target->value->type->data.unionation.decl_node, buf_sprintf("declared here"));
16860 } else {17888 } else {
...@@ -16863,7 +17891,7 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio...@@ -16863,7 +17891,7 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
16863 break;17891 break;
16864 case ZigTypeIdEnum:17892 case ZigTypeIdEnum:
16865 if (target->value->type->data.enumeration.layout != ContainerLayoutExtern) {17893 if (target->value->type->data.enumeration.layout != ContainerLayoutExtern) {
16866 ErrorMsg *msg = ir_add_error(ira, target,17894 ErrorMsg *msg = ir_add_error(ira, &target->base,
16867 buf_sprintf("exported enum value must be declared extern"));17895 buf_sprintf("exported enum value must be declared extern"));
16868 add_error_note(ira->codegen, msg, target->value->type->data.enumeration.decl_node, buf_sprintf("declared here"));17896 add_error_note(ira->codegen, msg, target->value->type->data.enumeration.decl_node, buf_sprintf("declared here"));
16869 } else {17897 } else {
...@@ -16873,10 +17901,10 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio...@@ -16873,10 +17901,10 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
16873 case ZigTypeIdArray: {17901 case ZigTypeIdArray: {
16874 bool ok_type;17902 bool ok_type;
16875 if ((err = type_allowed_in_extern(ira->codegen, target->value->type->data.array.child_type, &ok_type)))17903 if ((err = type_allowed_in_extern(ira->codegen, target->value->type->data.array.child_type, &ok_type)))
16876 return ira->codegen->invalid_instruction;17904 return ira->codegen->invalid_inst_gen;
1687717905
16878 if (!ok_type) {17906 if (!ok_type) {
16879 ir_add_error(ira, target,17907 ir_add_error(ira, &target->base,
16880 buf_sprintf("array element type '%s' not extern-compatible",17908 buf_sprintf("array element type '%s' not extern-compatible",
16881 buf_ptr(&target->value->type->data.array.child_type->name)));17909 buf_ptr(&target->value->type->data.array.child_type->name)));
16882 } else {17910 } else {
...@@ -16891,31 +17919,31 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio...@@ -16891,31 +17919,31 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
16891 zig_unreachable();17919 zig_unreachable();
16892 case ZigTypeIdStruct:17920 case ZigTypeIdStruct:
16893 if (is_slice(type_value)) {17921 if (is_slice(type_value)) {
16894 ir_add_error(ira, target,17922 ir_add_error(ira, &target->base,
16895 buf_sprintf("unable to export type '%s'", buf_ptr(&type_value->name)));17923 buf_sprintf("unable to export type '%s'", buf_ptr(&type_value->name)));
16896 } else if (type_value->data.structure.layout != ContainerLayoutExtern) {17924 } else if (type_value->data.structure.layout != ContainerLayoutExtern) {
16897 ErrorMsg *msg = ir_add_error(ira, target,17925 ErrorMsg *msg = ir_add_error(ira, &target->base,
16898 buf_sprintf("exported struct must be declared extern"));17926 buf_sprintf("exported struct must be declared extern"));
16899 add_error_note(ira->codegen, msg, type_value->data.structure.decl_node, buf_sprintf("declared here"));17927 add_error_note(ira->codegen, msg, type_value->data.structure.decl_node, buf_sprintf("declared here"));
16900 }17928 }
16901 break;17929 break;
16902 case ZigTypeIdUnion:17930 case ZigTypeIdUnion:
16903 if (type_value->data.unionation.layout != ContainerLayoutExtern) {17931 if (type_value->data.unionation.layout != ContainerLayoutExtern) {
16904 ErrorMsg *msg = ir_add_error(ira, target,17932 ErrorMsg *msg = ir_add_error(ira, &target->base,
16905 buf_sprintf("exported union must be declared extern"));17933 buf_sprintf("exported union must be declared extern"));
16906 add_error_note(ira->codegen, msg, type_value->data.unionation.decl_node, buf_sprintf("declared here"));17934 add_error_note(ira->codegen, msg, type_value->data.unionation.decl_node, buf_sprintf("declared here"));
16907 }17935 }
16908 break;17936 break;
16909 case ZigTypeIdEnum:17937 case ZigTypeIdEnum:
16910 if (type_value->data.enumeration.layout != ContainerLayoutExtern) {17938 if (type_value->data.enumeration.layout != ContainerLayoutExtern) {
16911 ErrorMsg *msg = ir_add_error(ira, target,17939 ErrorMsg *msg = ir_add_error(ira, &target->base,
16912 buf_sprintf("exported enum must be declared extern"));17940 buf_sprintf("exported enum must be declared extern"));
16913 add_error_note(ira->codegen, msg, type_value->data.enumeration.decl_node, buf_sprintf("declared here"));17941 add_error_note(ira->codegen, msg, type_value->data.enumeration.decl_node, buf_sprintf("declared here"));
16914 }17942 }
16915 break;17943 break;
16916 case ZigTypeIdFn: {17944 case ZigTypeIdFn: {
16917 if (type_value->data.fn.fn_type_id.cc == CallingConventionUnspecified) {17945 if (type_value->data.fn.fn_type_id.cc == CallingConventionUnspecified) {
16918 ir_add_error(ira, target,17946 ir_add_error(ira, &target->base,
16919 buf_sprintf("exported function type must specify calling convention"));17947 buf_sprintf("exported function type must specify calling convention"));
16920 }17948 }
16921 } break;17949 } break;
...@@ -16941,7 +17969,7 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio...@@ -16941,7 +17969,7 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
16941 case ZigTypeIdOpaque:17969 case ZigTypeIdOpaque:
16942 case ZigTypeIdFnFrame:17970 case ZigTypeIdFnFrame:
16943 case ZigTypeIdAnyFrame:17971 case ZigTypeIdAnyFrame:
16944 ir_add_error(ira, target,17972 ir_add_error(ira, &target->base,
16945 buf_sprintf("invalid export target '%s'", buf_ptr(&type_value->name)));17973 buf_sprintf("invalid export target '%s'", buf_ptr(&type_value->name)));
16946 break;17974 break;
16947 }17975 }
...@@ -16966,61 +17994,55 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio...@@ -16966,61 +17994,55 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
16966 case ZigTypeIdEnumLiteral:17994 case ZigTypeIdEnumLiteral:
16967 case ZigTypeIdFnFrame:17995 case ZigTypeIdFnFrame:
16968 case ZigTypeIdAnyFrame:17996 case ZigTypeIdAnyFrame:
16969 ir_add_error(ira, target,17997 ir_add_error(ira, &target->base,
16970 buf_sprintf("invalid export target type '%s'", buf_ptr(&target->value->type->name)));17998 buf_sprintf("invalid export target type '%s'", buf_ptr(&target->value->type->name)));
16971 break;17999 break;
16972 }18000 }
1697318001
16974 // TODO audit the various ways to use @export18002 // TODO audit the various ways to use @export
16975 if (want_var_export && target->id == IrInstructionIdLoadPtrGen) {18003 if (want_var_export && target->id == IrInstGenIdLoadPtr) {
16976 IrInstructionLoadPtrGen *load_ptr = reinterpret_cast<IrInstructionLoadPtrGen *>(target);18004 IrInstGenLoadPtr *load_ptr = reinterpret_cast<IrInstGenLoadPtr *>(target);
16977 if (load_ptr->ptr->id == IrInstructionIdVarPtr) {18005 if (load_ptr->ptr->id == IrInstGenIdVarPtr) {
16978 IrInstructionVarPtr *var_ptr = reinterpret_cast<IrInstructionVarPtr *>(load_ptr->ptr);18006 IrInstGenVarPtr *var_ptr = reinterpret_cast<IrInstGenVarPtr *>(load_ptr->ptr);
16979 ZigVar *var = var_ptr->var;18007 ZigVar *var = var_ptr->var;
16980 add_var_export(ira->codegen, var, buf_ptr(symbol_name), global_linkage_id);18008 add_var_export(ira->codegen, var, buf_ptr(symbol_name), global_linkage_id);
16981 var->section_name = section_name;18009 var->section_name = section_name;
16982 }18010 }
16983 }18011 }
1698418012
16985 return ir_const_void(ira, &instruction->base);18013 return ir_const_void(ira, &instruction->base.base);
16986}18014}
1698718015
16988static bool exec_has_err_ret_trace(CodeGen *g, IrExecutable *exec) {18016static bool exec_has_err_ret_trace(CodeGen *g, IrExecutableSrc *exec) {
16989 ZigFn *fn_entry = exec_fn_entry(exec);18017 ZigFn *fn_entry = exec_fn_entry(exec);
16990 return fn_entry != nullptr && fn_entry->calls_or_awaits_errorable_fn && g->have_err_ret_tracing;18018 return fn_entry != nullptr && fn_entry->calls_or_awaits_errorable_fn && g->have_err_ret_tracing;
16991}18019}
1699218020
16993static IrInstruction *ir_analyze_instruction_error_return_trace(IrAnalyze *ira,18021static IrInstGen *ir_analyze_instruction_error_return_trace(IrAnalyze *ira,
16994 IrInstructionErrorReturnTrace *instruction)18022 IrInstSrcErrorReturnTrace *instruction)
16995{18023{
16996 ZigType *ptr_to_stack_trace_type = get_pointer_to_type(ira->codegen, get_stack_trace_type(ira->codegen), false);18024 ZigType *ptr_to_stack_trace_type = get_pointer_to_type(ira->codegen, get_stack_trace_type(ira->codegen), false);
16997 if (instruction->optional == IrInstructionErrorReturnTrace::Null) {18025 if (instruction->optional == IrInstErrorReturnTraceNull) {
16998 ZigType *optional_type = get_optional_type(ira->codegen, ptr_to_stack_trace_type);18026 ZigType *optional_type = get_optional_type(ira->codegen, ptr_to_stack_trace_type);
16999 if (!exec_has_err_ret_trace(ira->codegen, ira->new_irb.exec)) {18027 if (!exec_has_err_ret_trace(ira->codegen, ira->old_irb.exec)) {
17000 IrInstruction *result = ir_const(ira, &instruction->base, optional_type);18028 IrInstGen *result = ir_const(ira, &instruction->base.base, optional_type);
17001 ZigValue *out_val = result->value;18029 ZigValue *out_val = result->value;
17002 assert(get_codegen_ptr_type(optional_type) != nullptr);18030 assert(get_codegen_ptr_type(optional_type) != nullptr);
17003 out_val->data.x_ptr.special = ConstPtrSpecialHardCodedAddr;18031 out_val->data.x_ptr.special = ConstPtrSpecialHardCodedAddr;
17004 out_val->data.x_ptr.data.hard_coded_addr.addr = 0;18032 out_val->data.x_ptr.data.hard_coded_addr.addr = 0;
17005 return result;18033 return result;
17006 }18034 }
17007 IrInstruction *new_instruction = ir_build_error_return_trace(&ira->new_irb, instruction->base.scope,18035 return ir_build_error_return_trace_gen(ira, instruction->base.base.scope,
17008 instruction->base.source_node, instruction->optional);18036 instruction->base.base.source_node, instruction->optional, optional_type);
17009 new_instruction->value->type = optional_type;
17010 return new_instruction;
17011 } else {18037 } else {
17012 assert(ira->codegen->have_err_ret_tracing);18038 assert(ira->codegen->have_err_ret_tracing);
17013 IrInstruction *new_instruction = ir_build_error_return_trace(&ira->new_irb, instruction->base.scope,18039 return ir_build_error_return_trace_gen(ira, instruction->base.base.scope,
17014 instruction->base.source_node, instruction->optional);18040 instruction->base.base.source_node, instruction->optional, ptr_to_stack_trace_type);
17015 new_instruction->value->type = ptr_to_stack_trace_type;
17016 return new_instruction;
17017 }18041 }
17018}18042}
1701918043
17020static IrInstruction *ir_analyze_instruction_error_union(IrAnalyze *ira,18044static IrInstGen *ir_analyze_instruction_error_union(IrAnalyze *ira, IrInstSrcErrorUnion *instruction) {
17021 IrInstructionErrorUnion *instruction)18045 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
17022{
17023 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);
17024 result->value->special = ConstValSpecialLazy;18046 result->value->special = ConstValSpecialLazy;
1702518047
17026 LazyValueErrUnionType *lazy_err_union_type = allocate<LazyValueErrUnionType>(1, "LazyValueErrUnionType");18048 LazyValueErrUnionType *lazy_err_union_type = allocate<LazyValueErrUnionType>(1, "LazyValueErrUnionType");
...@@ -17030,16 +18052,16 @@ static IrInstruction *ir_analyze_instruction_error_union(IrAnalyze *ira,...@@ -17030,16 +18052,16 @@ static IrInstruction *ir_analyze_instruction_error_union(IrAnalyze *ira,
1703018052
17031 lazy_err_union_type->err_set_type = instruction->err_set->child;18053 lazy_err_union_type->err_set_type = instruction->err_set->child;
17032 if (ir_resolve_type_lazy(ira, lazy_err_union_type->err_set_type) == nullptr)18054 if (ir_resolve_type_lazy(ira, lazy_err_union_type->err_set_type) == nullptr)
17033 return ira->codegen->invalid_instruction;18055 return ira->codegen->invalid_inst_gen;
1703418056
17035 lazy_err_union_type->payload_type = instruction->payload->child;18057 lazy_err_union_type->payload_type = instruction->payload->child;
17036 if (ir_resolve_type_lazy(ira, lazy_err_union_type->payload_type) == nullptr)18058 if (ir_resolve_type_lazy(ira, lazy_err_union_type->payload_type) == nullptr)
17037 return ira->codegen->invalid_instruction;18059 return ira->codegen->invalid_inst_gen;
1703818060
17039 return result;18061 return result;
17040}18062}
1704118063
17042static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_inst, ZigType *var_type,18064static IrInstGen *ir_analyze_alloca(IrAnalyze *ira, IrInst *source_inst, ZigType *var_type,
17043 uint32_t align, const char *name_hint, bool force_comptime)18065 uint32_t align, const char *name_hint, bool force_comptime)
17044{18066{
17045 Error err;18067 Error err;
...@@ -17048,7 +18070,7 @@ static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_in...@@ -17048,7 +18070,7 @@ static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_in
17048 pointee->special = ConstValSpecialUndef;18070 pointee->special = ConstValSpecialUndef;
17049 pointee->llvm_align = align;18071 pointee->llvm_align = align;
1705018072
17051 IrInstructionAllocaGen *result = ir_build_alloca_gen(ira, source_inst, align, name_hint);18073 IrInstGenAlloca *result = ir_build_alloca_gen(ira, source_inst, align, name_hint);
17052 result->base.value->special = ConstValSpecialStatic;18074 result->base.value->special = ConstValSpecialStatic;
17053 result->base.value->data.x_ptr.special = ConstPtrSpecialRef;18075 result->base.value->data.x_ptr.special = ConstPtrSpecialRef;
17054 result->base.value->data.x_ptr.mut = force_comptime ? ConstPtrMutComptimeVar : ConstPtrMutInfer;18076 result->base.value->data.x_ptr.mut = force_comptime ? ConstPtrMutComptimeVar : ConstPtrMutInfer;
...@@ -17056,15 +18078,15 @@ static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_in...@@ -17056,15 +18078,15 @@ static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_in
1705618078
17057 bool var_type_has_bits;18079 bool var_type_has_bits;
17058 if ((err = type_has_bits2(ira->codegen, var_type, &var_type_has_bits)))18080 if ((err = type_has_bits2(ira->codegen, var_type, &var_type_has_bits)))
17059 return ira->codegen->invalid_instruction;18081 return ira->codegen->invalid_inst_gen;
17060 if (align != 0) {18082 if (align != 0) {
17061 if ((err = type_resolve(ira->codegen, var_type, ResolveStatusAlignmentKnown)))18083 if ((err = type_resolve(ira->codegen, var_type, ResolveStatusAlignmentKnown)))
17062 return ira->codegen->invalid_instruction;18084 return ira->codegen->invalid_inst_gen;
17063 if (!var_type_has_bits) {18085 if (!var_type_has_bits) {
17064 ir_add_error(ira, source_inst,18086 ir_add_error(ira, source_inst,
17065 buf_sprintf("variable '%s' of zero-bit type '%s' has no in-memory representation, it cannot be aligned",18087 buf_sprintf("variable '%s' of zero-bit type '%s' has no in-memory representation, it cannot be aligned",
17066 name_hint, buf_ptr(&var_type->name)));18088 name_hint, buf_ptr(&var_type->name)));
17067 return ira->codegen->invalid_instruction;18089 return ira->codegen->invalid_inst_gen;
17068 }18090 }
17069 }18091 }
17070 assert(result->base.value->data.x_ptr.special != ConstPtrSpecialInvalid);18092 assert(result->base.value->data.x_ptr.special != ConstPtrSpecialInvalid);
...@@ -17074,16 +18096,15 @@ static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_in...@@ -17074,16 +18096,15 @@ static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_in
17074 PtrLenSingle, align, 0, 0, false);18096 PtrLenSingle, align, 0, 0, false);
1707518097
17076 if (!force_comptime) {18098 if (!force_comptime) {
17077 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);18099 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
17078 if (fn_entry != nullptr) {18100 if (fn_entry != nullptr) {
17079 fn_entry->alloca_gen_list.append(result);18101 fn_entry->alloca_gen_list.append(result);
17080 }18102 }
17081 }18103 }
17082 result->base.is_gen = true;
17083 return &result->base;18104 return &result->base;
17084}18105}
1708518106
17086static ZigType *ir_result_loc_expected_type(IrAnalyze *ira, IrInstruction *suspend_source_instr,18107static ZigType *ir_result_loc_expected_type(IrAnalyze *ira, IrInst *suspend_source_instr,
17087 ResultLoc *result_loc)18108 ResultLoc *result_loc)
17088{18109{
17089 switch (result_loc->id) {18110 switch (result_loc->id) {
...@@ -17126,7 +18147,7 @@ static bool type_can_bit_cast(ZigType *t) {...@@ -17126,7 +18147,7 @@ static bool type_can_bit_cast(ZigType *t) {
17126 }18147 }
17127}18148}
1712818149
17129static void set_up_result_loc_for_inferred_comptime(IrInstruction *ptr) {18150static void set_up_result_loc_for_inferred_comptime(IrInstGen *ptr) {
17130 ZigValue *undef_child = create_const_vals(1);18151 ZigValue *undef_child = create_const_vals(1);
17131 undef_child->type = ptr->value->type->data.pointer.child_type;18152 undef_child->type = ptr->value->type->data.pointer.child_type;
17132 undef_child->special = ConstValSpecialUndef;18153 undef_child->special = ConstValSpecialUndef;
...@@ -17165,16 +18186,16 @@ static Error ir_result_has_type(IrAnalyze *ira, ResultLoc *result_loc, bool *out...@@ -17165,16 +18186,16 @@ static Error ir_result_has_type(IrAnalyze *ira, ResultLoc *result_loc, bool *out
17165 zig_unreachable();18186 zig_unreachable();
17166}18187}
1716718188
17168static IrInstruction *ir_resolve_no_result_loc(IrAnalyze *ira, IrInstruction *suspend_source_instr,18189static IrInstGen *ir_resolve_no_result_loc(IrAnalyze *ira, IrInst *suspend_source_instr,
17169 ResultLoc *result_loc, ZigType *value_type)18190 ResultLoc *result_loc, ZigType *value_type)
17170{18191{
17171 if (type_is_invalid(value_type))18192 if (type_is_invalid(value_type))
17172 return ira->codegen->invalid_instruction;18193 return ira->codegen->invalid_inst_gen;
17173 IrInstructionAllocaGen *alloca_gen = ir_build_alloca_gen(ira, suspend_source_instr, 0, "");18194 IrInstGenAlloca *alloca_gen = ir_build_alloca_gen(ira, suspend_source_instr, 0, "");
17174 alloca_gen->base.value->type = get_pointer_to_type_extra(ira->codegen, value_type, false, false,18195 alloca_gen->base.value->type = get_pointer_to_type_extra(ira->codegen, value_type, false, false,
17175 PtrLenSingle, 0, 0, 0, false);18196 PtrLenSingle, 0, 0, 0, false);
17176 set_up_result_loc_for_inferred_comptime(&alloca_gen->base);18197 set_up_result_loc_for_inferred_comptime(&alloca_gen->base);
17177 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);18198 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
17178 if (fn_entry != nullptr && get_scope_typeof(suspend_source_instr->scope) == nullptr) {18199 if (fn_entry != nullptr && get_scope_typeof(suspend_source_instr->scope) == nullptr) {
17179 fn_entry->alloca_gen_list.append(alloca_gen);18200 fn_entry->alloca_gen_list.append(alloca_gen);
17180 }18201 }
...@@ -17184,8 +18205,8 @@ static IrInstruction *ir_resolve_no_result_loc(IrAnalyze *ira, IrInstruction *su...@@ -17184,8 +18205,8 @@ static IrInstruction *ir_resolve_no_result_loc(IrAnalyze *ira, IrInstruction *su
17184}18205}
1718518206
17186// when calling this function, at the callsite must check for result type noreturn and propagate it up18207// when calling this function, at the callsite must check for result type noreturn and propagate it up
17187static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspend_source_instr,18208static IrInstGen *ir_resolve_result_raw(IrAnalyze *ira, IrInst *suspend_source_instr,
17188 ResultLoc *result_loc, ZigType *value_type, IrInstruction *value, bool force_runtime,18209 ResultLoc *result_loc, ZigType *value_type, IrInstGen *value, bool force_runtime,
17189 bool allow_discard)18210 bool allow_discard)
17190{18211{
17191 Error err;18212 Error err;
...@@ -17210,10 +18231,8 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe...@@ -17210,10 +18231,8 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
17210 }18231 }
17211 case ResultLocIdVar: {18232 case ResultLocIdVar: {
17212 ResultLocVar *result_loc_var = reinterpret_cast<ResultLocVar *>(result_loc);18233 ResultLocVar *result_loc_var = reinterpret_cast<ResultLocVar *>(result_loc);
17213 assert(result_loc->source_instruction->id == IrInstructionIdAllocaSrc);18234 assert(result_loc->source_instruction->id == IrInstSrcIdAlloca);
1721418235 IrInstSrcAlloca *alloca_src = reinterpret_cast<IrInstSrcAlloca *>(result_loc->source_instruction);
17215 IrInstructionAllocaSrc *alloca_src =
17216 reinterpret_cast<IrInstructionAllocaSrc *>(result_loc->source_instruction);
1721718236
17218 ZigVar *var = result_loc_var->var;18237 ZigVar *var = result_loc_var->var;
17219 if (var->var_type != nullptr && !ir_get_var_is_comptime(var)) {18238 if (var->var_type != nullptr && !ir_get_var_is_comptime(var)) {
...@@ -17231,26 +18250,26 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe...@@ -17231,26 +18250,26 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
17231 var = new_var;18250 var = new_var;
17232 }18251 }
17233 if (value_type->id == ZigTypeIdUnreachable || value_type->id == ZigTypeIdOpaque) {18252 if (value_type->id == ZigTypeIdUnreachable || value_type->id == ZigTypeIdOpaque) {
17234 ir_add_error(ira, result_loc->source_instruction,18253 ir_add_error(ira, &result_loc->source_instruction->base,
17235 buf_sprintf("variable of type '%s' not allowed", buf_ptr(&value_type->name)));18254 buf_sprintf("variable of type '%s' not allowed", buf_ptr(&value_type->name)));
17236 return ira->codegen->invalid_instruction;18255 return ira->codegen->invalid_inst_gen;
17237 }18256 }
17238 if (alloca_src->base.child == nullptr || var->ptr_instruction == nullptr) {18257 if (alloca_src->base.child == nullptr || var->ptr_instruction == nullptr) {
17239 bool force_comptime;18258 bool force_comptime;
17240 if (!ir_resolve_comptime(ira, alloca_src->is_comptime->child, &force_comptime))18259 if (!ir_resolve_comptime(ira, alloca_src->is_comptime->child, &force_comptime))
17241 return ira->codegen->invalid_instruction;18260 return ira->codegen->invalid_inst_gen;
17242 uint32_t align = 0;18261 uint32_t align = 0;
17243 if (alloca_src->align != nullptr && !ir_resolve_align(ira, alloca_src->align->child, nullptr, &align)) {18262 if (alloca_src->align != nullptr && !ir_resolve_align(ira, alloca_src->align->child, nullptr, &align)) {
17244 return ira->codegen->invalid_instruction;18263 return ira->codegen->invalid_inst_gen;
17245 }18264 }
17246 IrInstruction *alloca_gen = ir_analyze_alloca(ira, result_loc->source_instruction,18265 IrInstGen *alloca_gen = ir_analyze_alloca(ira, &result_loc->source_instruction->base, value_type,
17247 value_type, align, alloca_src->name_hint, force_comptime);18266 align, alloca_src->name_hint, force_comptime);
17248 if (force_runtime) {18267 if (force_runtime) {
17249 alloca_gen->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;18268 alloca_gen->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;
17250 alloca_gen->value->special = ConstValSpecialRuntime;18269 alloca_gen->value->special = ConstValSpecialRuntime;
17251 }18270 }
17252 if (alloca_src->base.child != nullptr && !result_loc->written) {18271 if (alloca_src->base.child != nullptr && !result_loc->written) {
17253 alloca_src->base.child->ref_count = 0;18272 alloca_src->base.child->base.ref_count = 0;
17254 }18273 }
17255 alloca_src->base.child = alloca_gen;18274 alloca_src->base.child = alloca_gen;
17256 var->ptr_instruction = alloca_gen;18275 var->ptr_instruction = alloca_gen;
...@@ -17278,7 +18297,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe...@@ -17278,7 +18297,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
17278 ResultLocPeerParent *peer_parent = result_peer->parent;18297 ResultLocPeerParent *peer_parent = result_peer->parent;
1727918298
17280 if (peer_parent->peers.length == 1) {18299 if (peer_parent->peers.length == 1) {
17281 IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,18300 IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
17282 value_type, value, force_runtime, true);18301 value_type, value, force_runtime, true);
17283 result_peer->suspend_pos.basic_block_index = SIZE_MAX;18302 result_peer->suspend_pos.basic_block_index = SIZE_MAX;
17284 result_peer->suspend_pos.instruction_index = SIZE_MAX;18303 result_peer->suspend_pos.instruction_index = SIZE_MAX;
...@@ -17294,7 +18313,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe...@@ -17294,7 +18313,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1729418313
17295 bool is_condition_comptime;18314 bool is_condition_comptime;
17296 if (!ir_resolve_comptime(ira, peer_parent->is_comptime->child, &is_condition_comptime))18315 if (!ir_resolve_comptime(ira, peer_parent->is_comptime->child, &is_condition_comptime))
17297 return ira->codegen->invalid_instruction;18316 return ira->codegen->invalid_inst_gen;
17298 if (is_condition_comptime) {18317 if (is_condition_comptime) {
17299 peer_parent->skipped = true;18318 peer_parent->skipped = true;
17300 return ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,18319 return ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
...@@ -17302,10 +18321,10 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe...@@ -17302,10 +18321,10 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
17302 }18321 }
17303 bool peer_parent_has_type;18322 bool peer_parent_has_type;
17304 if ((err = ir_result_has_type(ira, peer_parent->parent, &peer_parent_has_type)))18323 if ((err = ir_result_has_type(ira, peer_parent->parent, &peer_parent_has_type)))
17305 return ira->codegen->invalid_instruction;18324 return ira->codegen->invalid_inst_gen;
17306 if (peer_parent_has_type) {18325 if (peer_parent_has_type) {
17307 peer_parent->skipped = true;18326 peer_parent->skipped = true;
17308 IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,18327 IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
17309 value_type, value, force_runtime || !is_condition_comptime, true);18328 value_type, value, force_runtime || !is_condition_comptime, true);
17310 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||18329 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
17311 parent_result_loc->value->type->id == ZigTypeIdUnreachable)18330 parent_result_loc->value->type->id == ZigTypeIdUnreachable)
...@@ -17322,7 +18341,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe...@@ -17322,7 +18341,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
17322 if (peer_parent->end_bb->suspend_instruction_ref == nullptr) {18341 if (peer_parent->end_bb->suspend_instruction_ref == nullptr) {
17323 peer_parent->end_bb->suspend_instruction_ref = suspend_source_instr;18342 peer_parent->end_bb->suspend_instruction_ref = suspend_source_instr;
17324 }18343 }
17325 IrInstruction *unreach_inst = ira_suspend(ira, suspend_source_instr, result_peer->next_bb,18344 IrInstGen *unreach_inst = ira_suspend(ira, suspend_source_instr, result_peer->next_bb,
17326 &result_peer->suspend_pos);18345 &result_peer->suspend_pos);
17327 if (result_peer->next_bb == nullptr) {18346 if (result_peer->next_bb == nullptr) {
17328 ir_start_next_bb(ira);18347 ir_start_next_bb(ira);
...@@ -17330,7 +18349,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe...@@ -17330,7 +18349,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
17330 return unreach_inst;18349 return unreach_inst;
17331 }18350 }
1733218351
17333 IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,18352 IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
17334 peer_parent->resolved_type, nullptr, force_runtime, true);18353 peer_parent->resolved_type, nullptr, force_runtime, true);
17335 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||18354 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
17336 parent_result_loc->value->type->id == ZigTypeIdUnreachable)18355 parent_result_loc->value->type->id == ZigTypeIdUnreachable)
...@@ -17347,23 +18366,23 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe...@@ -17347,23 +18366,23 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
17347 ResultLocCast *result_cast = reinterpret_cast<ResultLocCast *>(result_loc);18366 ResultLocCast *result_cast = reinterpret_cast<ResultLocCast *>(result_loc);
17348 ZigType *dest_type = ir_resolve_type(ira, result_cast->base.source_instruction->child);18367 ZigType *dest_type = ir_resolve_type(ira, result_cast->base.source_instruction->child);
17349 if (type_is_invalid(dest_type))18368 if (type_is_invalid(dest_type))
17350 return ira->codegen->invalid_instruction;18369 return ira->codegen->invalid_inst_gen;
1735118370
17352 if (dest_type == ira->codegen->builtin_types.entry_var) {18371 if (dest_type == ira->codegen->builtin_types.entry_var) {
17353 return ir_resolve_no_result_loc(ira, suspend_source_instr, result_loc, value_type);18372 return ir_resolve_no_result_loc(ira, suspend_source_instr, result_loc, value_type);
17354 }18373 }
1735518374
17356 IrInstruction *casted_value;18375 IrInstGen *casted_value;
17357 if (value != nullptr) {18376 if (value != nullptr) {
17358 casted_value = ir_implicit_cast(ira, value, dest_type);18377 casted_value = ir_implicit_cast(ira, value, dest_type);
17359 if (type_is_invalid(casted_value->value->type))18378 if (type_is_invalid(casted_value->value->type))
17360 return ira->codegen->invalid_instruction;18379 return ira->codegen->invalid_inst_gen;
17361 dest_type = casted_value->value->type;18380 dest_type = casted_value->value->type;
17362 } else {18381 } else {
17363 casted_value = nullptr;18382 casted_value = nullptr;
17364 }18383 }
1736518384
17366 IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_cast->parent,18385 IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_cast->parent,
17367 dest_type, casted_value, force_runtime, true);18386 dest_type, casted_value, force_runtime, true);
17368 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||18387 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
17369 parent_result_loc->value->type->id == ZigTypeIdUnreachable)18388 parent_result_loc->value->type->id == ZigTypeIdUnreachable)
...@@ -17377,11 +18396,11 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe...@@ -17377,11 +18396,11 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
17377 if ((err = type_resolve(ira->codegen, parent_ptr_type->data.pointer.child_type,18396 if ((err = type_resolve(ira->codegen, parent_ptr_type->data.pointer.child_type,
17378 ResolveStatusAlignmentKnown)))18397 ResolveStatusAlignmentKnown)))
17379 {18398 {
17380 return ira->codegen->invalid_instruction;18399 return ira->codegen->invalid_inst_gen;
17381 }18400 }
17382 uint64_t parent_ptr_align = get_ptr_align(ira->codegen, parent_ptr_type);18401 uint64_t parent_ptr_align = get_ptr_align(ira->codegen, parent_ptr_type);
17383 if ((err = type_resolve(ira->codegen, value_type, ResolveStatusAlignmentKnown))) {18402 if ((err = type_resolve(ira->codegen, value_type, ResolveStatusAlignmentKnown))) {
17384 return ira->codegen->invalid_instruction;18403 return ira->codegen->invalid_inst_gen;
17385 }18404 }
17386 if (!type_has_bits(value_type)) {18405 if (!type_has_bits(value_type)) {
17387 parent_ptr_align = 0;18406 parent_ptr_align = 0;
...@@ -17404,9 +18423,9 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe...@@ -17404,9 +18423,9 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1740418423
17405 ConstCastOnly const_cast_result = types_match_const_cast_only(ira,18424 ConstCastOnly const_cast_result = types_match_const_cast_only(ira,
17406 parent_result_loc->value->type, ptr_type,18425 parent_result_loc->value->type, ptr_type,
17407 result_cast->base.source_instruction->source_node, false);18426 result_cast->base.source_instruction->base.source_node, false);
17408 if (const_cast_result.id == ConstCastResultIdInvalid)18427 if (const_cast_result.id == ConstCastResultIdInvalid)
17409 return ira->codegen->invalid_instruction;18428 return ira->codegen->invalid_inst_gen;
17410 if (const_cast_result.id != ConstCastResultIdOk) {18429 if (const_cast_result.id != ConstCastResultIdOk) {
17411 if (allow_discard) {18430 if (allow_discard) {
17412 return parent_result_loc;18431 return parent_result_loc;
...@@ -17419,42 +18438,42 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe...@@ -17419,42 +18438,42 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1741918438
17420 result_loc->written = true;18439 result_loc->written = true;
17421 result_loc->resolved_loc = ir_analyze_ptr_cast(ira, suspend_source_instr, parent_result_loc,18440 result_loc->resolved_loc = ir_analyze_ptr_cast(ira, suspend_source_instr, parent_result_loc,
17422 ptr_type, result_cast->base.source_instruction, false);18441 ptr_type, &result_cast->base.source_instruction->base, false);
17423 return result_loc->resolved_loc;18442 return result_loc->resolved_loc;
17424 }18443 }
17425 case ResultLocIdBitCast: {18444 case ResultLocIdBitCast: {
17426 ResultLocBitCast *result_bit_cast = reinterpret_cast<ResultLocBitCast *>(result_loc);18445 ResultLocBitCast *result_bit_cast = reinterpret_cast<ResultLocBitCast *>(result_loc);
17427 ZigType *dest_type = ir_resolve_type(ira, result_bit_cast->base.source_instruction->child);18446 ZigType *dest_type = ir_resolve_type(ira, result_bit_cast->base.source_instruction->child);
17428 if (type_is_invalid(dest_type))18447 if (type_is_invalid(dest_type))
17429 return ira->codegen->invalid_instruction;18448 return ira->codegen->invalid_inst_gen;
1743018449
17431 if (get_codegen_ptr_type(dest_type) != nullptr) {18450 if (get_codegen_ptr_type(dest_type) != nullptr) {
17432 ir_add_error(ira, result_loc->source_instruction,18451 ir_add_error(ira, &result_loc->source_instruction->base,
17433 buf_sprintf("unable to @bitCast to pointer type '%s'", buf_ptr(&dest_type->name)));18452 buf_sprintf("unable to @bitCast to pointer type '%s'", buf_ptr(&dest_type->name)));
17434 return ira->codegen->invalid_instruction;18453 return ira->codegen->invalid_inst_gen;
17435 }18454 }
1743618455
17437 if (!type_can_bit_cast(dest_type)) {18456 if (!type_can_bit_cast(dest_type)) {
17438 ir_add_error(ira, result_loc->source_instruction,18457 ir_add_error(ira, &result_loc->source_instruction->base,
17439 buf_sprintf("unable to @bitCast to type '%s'", buf_ptr(&dest_type->name)));18458 buf_sprintf("unable to @bitCast to type '%s'", buf_ptr(&dest_type->name)));
17440 return ira->codegen->invalid_instruction;18459 return ira->codegen->invalid_inst_gen;
17441 }18460 }
1744218461
17443 if (get_codegen_ptr_type(value_type) != nullptr) {18462 if (get_codegen_ptr_type(value_type) != nullptr) {
17444 ir_add_error(ira, suspend_source_instr,18463 ir_add_error(ira, suspend_source_instr,
17445 buf_sprintf("unable to @bitCast from pointer type '%s'", buf_ptr(&value_type->name)));18464 buf_sprintf("unable to @bitCast from pointer type '%s'", buf_ptr(&value_type->name)));
17446 return ira->codegen->invalid_instruction;18465 return ira->codegen->invalid_inst_gen;
17447 }18466 }
1744818467
17449 if (!type_can_bit_cast(value_type)) {18468 if (!type_can_bit_cast(value_type)) {
17450 ir_add_error(ira, suspend_source_instr,18469 ir_add_error(ira, suspend_source_instr,
17451 buf_sprintf("unable to @bitCast from type '%s'", buf_ptr(&value_type->name)));18470 buf_sprintf("unable to @bitCast from type '%s'", buf_ptr(&value_type->name)));
17452 return ira->codegen->invalid_instruction;18471 return ira->codegen->invalid_inst_gen;
17453 }18472 }
1745418473
17455 IrInstruction *bitcasted_value;18474 IrInstGen *bitcasted_value;
17456 if (value != nullptr) {18475 if (value != nullptr) {
17457 bitcasted_value = ir_analyze_bit_cast(ira, result_loc->source_instruction, value, dest_type);18476 bitcasted_value = ir_analyze_bit_cast(ira, &result_loc->source_instruction->base, value, dest_type);
17458 dest_type = bitcasted_value->value->type;18477 dest_type = bitcasted_value->value->type;
17459 } else {18478 } else {
17460 bitcasted_value = nullptr;18479 bitcasted_value = nullptr;
...@@ -17464,7 +18483,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe...@@ -17464,7 +18483,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
17464 return bitcasted_value;18483 return bitcasted_value;
17465 }18484 }
1746618485
17467 IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_bit_cast->parent,18486 IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_bit_cast->parent,
17468 dest_type, bitcasted_value, force_runtime, true);18487 dest_type, bitcasted_value, force_runtime, true);
17469 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||18488 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
17470 parent_result_loc->value->type->id == ZigTypeIdUnreachable)18489 parent_result_loc->value->type->id == ZigTypeIdUnreachable)
...@@ -17477,7 +18496,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe...@@ -17477,7 +18496,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1747718496
17478 bool has_bits;18497 bool has_bits;
17479 if ((err = type_has_bits2(ira->codegen, child_type, &has_bits))) {18498 if ((err = type_has_bits2(ira->codegen, child_type, &has_bits))) {
17480 return ira->codegen->invalid_instruction;18499 return ira->codegen->invalid_inst_gen;
17481 }18500 }
1748218501
17483 // This happens when the bitCast result is assigned to _18502 // This happens when the bitCast result is assigned to _
...@@ -17487,12 +18506,12 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe...@@ -17487,12 +18506,12 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
17487 }18506 }
1748818507
17489 if ((err = type_resolve(ira->codegen, child_type, ResolveStatusAlignmentKnown))) {18508 if ((err = type_resolve(ira->codegen, child_type, ResolveStatusAlignmentKnown))) {
17490 return ira->codegen->invalid_instruction;18509 return ira->codegen->invalid_inst_gen;
17491 }18510 }
1749218511
17493 uint64_t parent_ptr_align = get_ptr_align(ira->codegen, parent_ptr_type);18512 uint64_t parent_ptr_align = get_ptr_align(ira->codegen, parent_ptr_type);
17494 if ((err = type_resolve(ira->codegen, value_type, ResolveStatusAlignmentKnown))) {18513 if ((err = type_resolve(ira->codegen, value_type, ResolveStatusAlignmentKnown))) {
17495 return ira->codegen->invalid_instruction;18514 return ira->codegen->invalid_inst_gen;
17496 }18515 }
17497 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, value_type,18516 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, value_type,
17498 parent_ptr_type->data.pointer.is_const, parent_ptr_type->data.pointer.is_volatile, PtrLenSingle,18517 parent_ptr_type->data.pointer.is_const, parent_ptr_type->data.pointer.is_volatile, PtrLenSingle,
...@@ -17500,30 +18519,37 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe...@@ -17500,30 +18519,37 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1750018519
17501 result_loc->written = true;18520 result_loc->written = true;
17502 result_loc->resolved_loc = ir_analyze_ptr_cast(ira, suspend_source_instr, parent_result_loc,18521 result_loc->resolved_loc = ir_analyze_ptr_cast(ira, suspend_source_instr, parent_result_loc,
17503 ptr_type, result_bit_cast->base.source_instruction, false);18522 ptr_type, &result_bit_cast->base.source_instruction->base, false);
17504 return result_loc->resolved_loc;18523 return result_loc->resolved_loc;
17505 }18524 }
17506 }18525 }
17507 zig_unreachable();18526 zig_unreachable();
17508}18527}
1750918528
17510static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_source_instr,18529static IrInstGen *ir_resolve_result(IrAnalyze *ira, IrInst *suspend_source_instr,
17511 ResultLoc *result_loc_pass1, ZigType *value_type, IrInstruction *value, bool force_runtime,18530 ResultLoc *result_loc_pass1, ZigType *value_type, IrInstGen *value, bool force_runtime,
17512 bool allow_discard)18531 bool allow_discard)
17513{18532{
17514 Error err;18533 Error err;
17515 if (!allow_discard && result_loc_pass1->id == ResultLocIdInstruction &&18534 if (!allow_discard && result_loc_pass1->id == ResultLocIdInstruction &&
17516 instr_is_comptime(result_loc_pass1->source_instruction) &&18535 result_loc_pass1->source_instruction->id == IrInstSrcIdConst)
17517 result_loc_pass1->source_instruction->value->type->id == ZigTypeIdPointer &&
17518 result_loc_pass1->source_instruction->value->data.x_ptr.special == ConstPtrSpecialDiscard)
17519 {18536 {
17520 result_loc_pass1 = no_result_loc();18537 IrInstSrcConst *const_inst = reinterpret_cast<IrInstSrcConst *>(result_loc_pass1->source_instruction);
18538 if (value_is_comptime(const_inst->value) &&
18539 const_inst->value->type->id == ZigTypeIdPointer &&
18540 const_inst->value->data.x_ptr.special == ConstPtrSpecialDiscard)
18541 {
18542 result_loc_pass1 = no_result_loc();
18543 }
17521 }18544 }
17522 bool was_written = result_loc_pass1->written;18545 bool was_written = result_loc_pass1->written;
17523 IrInstruction *result_loc = ir_resolve_result_raw(ira, suspend_source_instr, result_loc_pass1, value_type,18546 IrInstGen *result_loc = ir_resolve_result_raw(ira, suspend_source_instr, result_loc_pass1, value_type,
17524 value, force_runtime, allow_discard);18547 value, force_runtime, allow_discard);
17525 if (result_loc == nullptr || (instr_is_unreachable(result_loc) || type_is_invalid(result_loc->value->type)))18548 if (result_loc == nullptr || result_loc->value->type->id == ZigTypeIdUnreachable ||
18549 type_is_invalid(result_loc->value->type))
18550 {
17526 return result_loc;18551 return result_loc;
18552 }
1752718553
17528 if ((force_runtime || (value != nullptr && !instr_is_comptime(value))) &&18554 if ((force_runtime || (value != nullptr && !instr_is_comptime(value))) &&
17529 result_loc_pass1->written && result_loc->value->data.x_ptr.mut == ConstPtrMutInfer)18555 result_loc_pass1->written && result_loc->value->data.x_ptr.mut == ConstPtrMutInfer)
...@@ -17534,7 +18560,7 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s...@@ -17534,7 +18560,7 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
17534 InferredStructField *isf = result_loc->value->type->data.pointer.inferred_struct_field;18560 InferredStructField *isf = result_loc->value->type->data.pointer.inferred_struct_field;
17535 if (isf != nullptr) {18561 if (isf != nullptr) {
17536 TypeStructField *field;18562 TypeStructField *field;
17537 IrInstruction *casted_ptr;18563 IrInstGen *casted_ptr;
17538 if (isf->already_resolved) {18564 if (isf->already_resolved) {
17539 field = find_struct_type_field(isf->inferred_struct_type, isf->field_name);18565 field = find_struct_type_field(isf->inferred_struct_type, isf->field_name);
17540 casted_ptr = result_loc;18566 casted_ptr = result_loc;
...@@ -17552,11 +18578,11 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s...@@ -17552,11 +18578,11 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
17552 field->type_entry = value_type;18578 field->type_entry = value_type;
17553 field->type_val = create_const_type(ira->codegen, field->type_entry);18579 field->type_val = create_const_type(ira->codegen, field->type_entry);
17554 field->src_index = old_field_count;18580 field->src_index = old_field_count;
17555 field->decl_node = value ? value->source_node : suspend_source_instr->source_node;18581 field->decl_node = value ? value->base.source_node : suspend_source_instr->source_node;
17556 if (value && instr_is_comptime(value)) {18582 if (value && instr_is_comptime(value)) {
17557 ZigValue *val = ir_resolve_const(ira, value, UndefOk);18583 ZigValue *val = ir_resolve_const(ira, value, UndefOk);
17558 if (!val)18584 if (!val)
17559 return ira->codegen->invalid_instruction;18585 return ira->codegen->invalid_inst_gen;
17560 field->is_comptime = true;18586 field->is_comptime = true;
17561 field->init_val = create_const_vals(1);18587 field->init_val = create_const_vals(1);
17562 copy_const_val(field->init_val, val);18588 copy_const_val(field->init_val, val);
...@@ -17574,7 +18600,7 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s...@@ -17574,7 +18600,7 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
17574 if (instr_is_comptime(casted_ptr)) {18600 if (instr_is_comptime(casted_ptr)) {
17575 ZigValue *ptr_val = ir_resolve_const(ira, casted_ptr, UndefBad);18601 ZigValue *ptr_val = ir_resolve_const(ira, casted_ptr, UndefBad);
17576 if (!ptr_val)18602 if (!ptr_val)
17577 return ira->codegen->invalid_instruction;18603 return ira->codegen->invalid_inst_gen;
17578 if (ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {18604 if (ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
17579 ZigValue *struct_val = const_ptr_pointee(ira, ira->codegen, ptr_val,18605 ZigValue *struct_val = const_ptr_pointee(ira, ira->codegen, ptr_val,
17580 suspend_source_instr->source_node);18606 suspend_source_instr->source_node);
...@@ -17610,7 +18636,7 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s...@@ -17610,7 +18636,7 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
17610 if (!same_comptime_repr) {18636 if (!same_comptime_repr) {
17611 bool has_bits;18637 bool has_bits;
17612 if ((err = type_has_bits2(ira->codegen, value_type, &has_bits)))18638 if ((err = type_has_bits2(ira->codegen, value_type, &has_bits)))
17613 return ira->codegen->invalid_instruction;18639 return ira->codegen->invalid_inst_gen;
17614 if (has_bits) {18640 if (has_bits) {
17615 result_loc_pass1->written = false;18641 result_loc_pass1->written = false;
17616 return ir_analyze_unwrap_optional_payload(ira, suspend_source_instr, result_loc, false, true);18642 return ir_analyze_unwrap_optional_payload(ira, suspend_source_instr, result_loc, false, true);
...@@ -17619,12 +18645,12 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s...@@ -17619,12 +18645,12 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
17619 } else if (actual_elem_type->id == ZigTypeIdErrorUnion && value_type->id != ZigTypeIdErrorUnion) {18645 } else if (actual_elem_type->id == ZigTypeIdErrorUnion && value_type->id != ZigTypeIdErrorUnion) {
17620 bool has_bits;18646 bool has_bits;
17621 if ((err = type_has_bits2(ira->codegen, value_type, &has_bits)))18647 if ((err = type_has_bits2(ira->codegen, value_type, &has_bits)))
17622 return ira->codegen->invalid_instruction;18648 return ira->codegen->invalid_inst_gen;
17623 if (has_bits) {18649 if (has_bits) {
17624 if (value_type->id == ZigTypeIdErrorSet) {18650 if (value_type->id == ZigTypeIdErrorSet) {
17625 return ir_analyze_unwrap_err_code(ira, suspend_source_instr, result_loc, true);18651 return ir_analyze_unwrap_err_code(ira, suspend_source_instr, result_loc, true);
17626 } else {18652 } else {
17627 IrInstruction *unwrapped_err_ptr = ir_analyze_unwrap_error_payload(ira, suspend_source_instr,18653 IrInstGen *unwrapped_err_ptr = ir_analyze_unwrap_error_payload(ira, suspend_source_instr,
17628 result_loc, false, true);18654 result_loc, false, true);
17629 ZigType *actual_payload_type = actual_elem_type->data.error_union.payload_type;18655 ZigType *actual_payload_type = actual_elem_type->data.error_union.payload_type;
17630 if (actual_payload_type->id == ZigTypeIdOptional && value_type->id != ZigTypeIdOptional &&18656 if (actual_payload_type->id == ZigTypeIdOptional && value_type->id != ZigTypeIdOptional &&
...@@ -17640,37 +18666,35 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s...@@ -17640,37 +18666,35 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
17640 return result_loc;18666 return result_loc;
17641}18667}
1764218668
17643static IrInstruction *ir_analyze_instruction_resolve_result(IrAnalyze *ira,18669static IrInstGen *ir_analyze_instruction_resolve_result(IrAnalyze *ira, IrInstSrcResolveResult *instruction) {
17644 IrInstructionResolveResult *instruction)
17645{
17646 ZigType *implicit_elem_type;18670 ZigType *implicit_elem_type;
17647 if (instruction->ty == nullptr) {18671 if (instruction->ty == nullptr) {
17648 if (instruction->result_loc->id == ResultLocIdCast) {18672 if (instruction->result_loc->id == ResultLocIdCast) {
17649 implicit_elem_type = ir_resolve_type(ira,18673 implicit_elem_type = ir_resolve_type(ira,
17650 instruction->result_loc->source_instruction->child);18674 instruction->result_loc->source_instruction->child);
17651 if (type_is_invalid(implicit_elem_type))18675 if (type_is_invalid(implicit_elem_type))
17652 return ira->codegen->invalid_instruction;18676 return ira->codegen->invalid_inst_gen;
17653 } else if (instruction->result_loc->id == ResultLocIdReturn) {18677 } else if (instruction->result_loc->id == ResultLocIdReturn) {
17654 implicit_elem_type = ira->explicit_return_type;18678 implicit_elem_type = ira->explicit_return_type;
17655 if (type_is_invalid(implicit_elem_type))18679 if (type_is_invalid(implicit_elem_type))
17656 return ira->codegen->invalid_instruction;18680 return ira->codegen->invalid_inst_gen;
17657 } else {18681 } else {
17658 implicit_elem_type = ira->codegen->builtin_types.entry_var;18682 implicit_elem_type = ira->codegen->builtin_types.entry_var;
17659 }18683 }
17660 if (implicit_elem_type == ira->codegen->builtin_types.entry_var) {18684 if (implicit_elem_type == ira->codegen->builtin_types.entry_var) {
17661 Buf *bare_name = buf_alloc();18685 Buf *bare_name = buf_alloc();
17662 Buf *name = get_anon_type_name(ira->codegen, nullptr, container_string(ContainerKindStruct),18686 Buf *name = get_anon_type_name(ira->codegen, nullptr, container_string(ContainerKindStruct),
17663 instruction->base.scope, instruction->base.source_node, bare_name);18687 instruction->base.base.scope, instruction->base.base.source_node, bare_name);
1766418688
17665 StructSpecial struct_special = StructSpecialInferredStruct;18689 StructSpecial struct_special = StructSpecialInferredStruct;
17666 if (instruction->base.source_node->type == NodeTypeContainerInitExpr &&18690 if (instruction->base.base.source_node->type == NodeTypeContainerInitExpr &&
17667 instruction->base.source_node->data.container_init_expr.kind == ContainerInitKindArray)18691 instruction->base.base.source_node->data.container_init_expr.kind == ContainerInitKindArray)
17668 {18692 {
17669 struct_special = StructSpecialInferredTuple;18693 struct_special = StructSpecialInferredTuple;
17670 }18694 }
1767118695
17672 ZigType *inferred_struct_type = get_partial_container_type(ira->codegen,18696 ZigType *inferred_struct_type = get_partial_container_type(ira->codegen,
17673 instruction->base.scope, ContainerKindStruct, instruction->base.source_node,18697 instruction->base.base.scope, ContainerKindStruct, instruction->base.base.source_node,
17674 buf_ptr(name), bare_name, ContainerLayoutAuto);18698 buf_ptr(name), bare_name, ContainerLayoutAuto);
17675 inferred_struct_type->data.structure.special = struct_special;18699 inferred_struct_type->data.structure.special = struct_special;
17676 inferred_struct_type->data.structure.resolve_status = ResolveStatusBeingInferred;18700 inferred_struct_type->data.structure.resolve_status = ResolveStatusBeingInferred;
...@@ -17679,21 +18703,21 @@ static IrInstruction *ir_analyze_instruction_resolve_result(IrAnalyze *ira,...@@ -17679,21 +18703,21 @@ static IrInstruction *ir_analyze_instruction_resolve_result(IrAnalyze *ira,
17679 } else {18703 } else {
17680 implicit_elem_type = ir_resolve_type(ira, instruction->ty->child);18704 implicit_elem_type = ir_resolve_type(ira, instruction->ty->child);
17681 if (type_is_invalid(implicit_elem_type))18705 if (type_is_invalid(implicit_elem_type))
17682 return ira->codegen->invalid_instruction;18706 return ira->codegen->invalid_inst_gen;
17683 }18707 }
17684 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,18708 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
17685 implicit_elem_type, nullptr, false, true);18709 implicit_elem_type, nullptr, false, true);
17686 if (result_loc != nullptr)18710 if (result_loc != nullptr)
17687 return result_loc;18711 return result_loc;
1768818712
17689 ZigFn *fn = exec_fn_entry(ira->new_irb.exec);18713 ZigFn *fn = ira->new_irb.exec->fn_entry;
17690 if (fn != nullptr && fn->type_entry->data.fn.fn_type_id.cc == CallingConventionAsync &&18714 if (fn != nullptr && fn->type_entry->data.fn.fn_type_id.cc == CallingConventionAsync &&
17691 instruction->result_loc->id == ResultLocIdReturn)18715 instruction->result_loc->id == ResultLocIdReturn)
17692 {18716 {
17693 result_loc = ir_resolve_result(ira, &instruction->base, no_result_loc(),18717 result_loc = ir_resolve_result(ira, &instruction->base.base, no_result_loc(),
17694 implicit_elem_type, nullptr, false, true);18718 implicit_elem_type, nullptr, false, true);
17695 if (result_loc != nullptr &&18719 if (result_loc != nullptr &&
17696 (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)))18720 (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable))
17697 {18721 {
17698 return result_loc;18722 return result_loc;
17699 }18723 }
...@@ -17701,9 +18725,9 @@ static IrInstruction *ir_analyze_instruction_resolve_result(IrAnalyze *ira,...@@ -17701,9 +18725,9 @@ static IrInstruction *ir_analyze_instruction_resolve_result(IrAnalyze *ira,
17701 return result_loc;18725 return result_loc;
17702 }18726 }
1770318727
17704 IrInstruction *result = ir_const(ira, &instruction->base, implicit_elem_type);18728 IrInstGen *result = ir_const(ira, &instruction->base.base, implicit_elem_type);
17705 result->value->special = ConstValSpecialUndef;18729 result->value->special = ConstValSpecialUndef;
17706 IrInstruction *ptr = ir_get_ref(ira, &instruction->base, result, false, false);18730 IrInstGen *ptr = ir_get_ref(ira, &instruction->base.base, result, false, false);
17707 ptr->value->data.x_ptr.mut = ConstPtrMutComptimeVar;18731 ptr->value->data.x_ptr.mut = ConstPtrMutComptimeVar;
17708 return ptr;18732 return ptr;
17709}18733}
...@@ -17727,8 +18751,7 @@ static void ir_reset_result(ResultLoc *result_loc) {...@@ -17727,8 +18751,7 @@ static void ir_reset_result(ResultLoc *result_loc) {
17727 break;18751 break;
17728 }18752 }
17729 case ResultLocIdVar: {18753 case ResultLocIdVar: {
17730 IrInstructionAllocaSrc *alloca_src =18754 IrInstSrcAlloca *alloca_src = reinterpret_cast<IrInstSrcAlloca *>(result_loc->source_instruction);
17731 reinterpret_cast<IrInstructionAllocaSrc *>(result_loc->source_instruction);
17732 alloca_src->base.child = nullptr;18755 alloca_src->base.child = nullptr;
17733 break;18756 break;
17734 }18757 }
...@@ -17744,18 +18767,18 @@ static void ir_reset_result(ResultLoc *result_loc) {...@@ -17744,18 +18767,18 @@ static void ir_reset_result(ResultLoc *result_loc) {
17744 }18767 }
17745}18768}
1774618769
17747static IrInstruction *ir_analyze_instruction_reset_result(IrAnalyze *ira, IrInstructionResetResult *instruction) {18770static IrInstGen *ir_analyze_instruction_reset_result(IrAnalyze *ira, IrInstSrcResetResult *instruction) {
17748 ir_reset_result(instruction->result_loc);18771 ir_reset_result(instruction->result_loc);
17749 return ir_const_void(ira, &instruction->base);18772 return ir_const_void(ira, &instruction->base.base);
17750}18773}
1775118774
17752static IrInstruction *get_async_call_result_loc(IrAnalyze *ira, IrInstruction *source_instr,18775static IrInstGen *get_async_call_result_loc(IrAnalyze *ira, IrInst* source_instr,
17753 ZigType *fn_ret_type, bool is_async_call_builtin, IrInstruction **args_ptr, size_t args_len,18776 ZigType *fn_ret_type, bool is_async_call_builtin, IrInstGen **args_ptr, size_t args_len,
17754 IrInstruction *ret_ptr_uncasted)18777 IrInstGen *ret_ptr_uncasted)
17755{18778{
17756 ir_assert(is_async_call_builtin, source_instr);18779 ir_assert(is_async_call_builtin, source_instr);
17757 if (type_is_invalid(ret_ptr_uncasted->value->type))18780 if (type_is_invalid(ret_ptr_uncasted->value->type))
17758 return ira->codegen->invalid_instruction;18781 return ira->codegen->invalid_inst_gen;
17759 if (ret_ptr_uncasted->value->type->id == ZigTypeIdVoid) {18782 if (ret_ptr_uncasted->value->type->id == ZigTypeIdVoid) {
17760 // Result location will be inside the async frame.18783 // Result location will be inside the async frame.
17761 return nullptr;18784 return nullptr;
...@@ -17763,57 +18786,57 @@ static IrInstruction *get_async_call_result_loc(IrAnalyze *ira, IrInstruction *s...@@ -17763,57 +18786,57 @@ static IrInstruction *get_async_call_result_loc(IrAnalyze *ira, IrInstruction *s
17763 return ir_implicit_cast(ira, ret_ptr_uncasted, get_pointer_to_type(ira->codegen, fn_ret_type, false));18786 return ir_implicit_cast(ira, ret_ptr_uncasted, get_pointer_to_type(ira->codegen, fn_ret_type, false));
17764}18787}
1776518788
17766static IrInstruction *ir_analyze_async_call(IrAnalyze *ira, IrInstruction *source_instr, ZigFn *fn_entry,18789static IrInstGen *ir_analyze_async_call(IrAnalyze *ira, IrInst* source_instr, ZigFn *fn_entry,
17767 ZigType *fn_type, IrInstruction *fn_ref, IrInstruction **casted_args, size_t arg_count,18790 ZigType *fn_type, IrInstGen *fn_ref, IrInstGen **casted_args, size_t arg_count,
17768 IrInstruction *casted_new_stack, bool is_async_call_builtin, IrInstruction *ret_ptr_uncasted,18791 IrInstGen *casted_new_stack, bool is_async_call_builtin, IrInstGen *ret_ptr_uncasted,
17769 ResultLoc *call_result_loc)18792 ResultLoc *call_result_loc)
17770{18793{
17771 if (fn_entry == nullptr) {18794 if (fn_entry == nullptr) {
17772 if (fn_type->data.fn.fn_type_id.cc != CallingConventionAsync) {18795 if (fn_type->data.fn.fn_type_id.cc != CallingConventionAsync) {
17773 ir_add_error(ira, fn_ref,18796 ir_add_error(ira, &fn_ref->base,
17774 buf_sprintf("expected async function, found '%s'", buf_ptr(&fn_type->name)));18797 buf_sprintf("expected async function, found '%s'", buf_ptr(&fn_type->name)));
17775 return ira->codegen->invalid_instruction;18798 return ira->codegen->invalid_inst_gen;
17776 }18799 }
17777 if (casted_new_stack == nullptr) {18800 if (casted_new_stack == nullptr) {
17778 ir_add_error(ira, fn_ref, buf_sprintf("function is not comptime-known; @asyncCall required"));18801 ir_add_error(ira, &fn_ref->base, buf_sprintf("function is not comptime-known; @asyncCall required"));
17779 return ira->codegen->invalid_instruction;18802 return ira->codegen->invalid_inst_gen;
17780 }18803 }
17781 }18804 }
17782 if (casted_new_stack != nullptr) {18805 if (casted_new_stack != nullptr) {
17783 ZigType *fn_ret_type = fn_type->data.fn.fn_type_id.return_type;18806 ZigType *fn_ret_type = fn_type->data.fn.fn_type_id.return_type;
17784 IrInstruction *ret_ptr = get_async_call_result_loc(ira, source_instr, fn_ret_type, is_async_call_builtin,18807 IrInstGen *ret_ptr = get_async_call_result_loc(ira, source_instr, fn_ret_type, is_async_call_builtin,
17785 casted_args, arg_count, ret_ptr_uncasted);18808 casted_args, arg_count, ret_ptr_uncasted);
17786 if (ret_ptr != nullptr && type_is_invalid(ret_ptr->value->type))18809 if (ret_ptr != nullptr && type_is_invalid(ret_ptr->value->type))
17787 return ira->codegen->invalid_instruction;18810 return ira->codegen->invalid_inst_gen;
1778818811
17789 ZigType *anyframe_type = get_any_frame_type(ira->codegen, fn_ret_type);18812 ZigType *anyframe_type = get_any_frame_type(ira->codegen, fn_ret_type);
1779018813
17791 IrInstructionCallGen *call_gen = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,18814 IrInstGenCall *call_gen = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,
17792 arg_count, casted_args, CallModifierAsync, casted_new_stack,18815 arg_count, casted_args, CallModifierAsync, casted_new_stack,
17793 is_async_call_builtin, ret_ptr, anyframe_type);18816 is_async_call_builtin, ret_ptr, anyframe_type);
17794 return &call_gen->base;18817 return &call_gen->base;
17795 } else {18818 } else {
17796 ZigType *frame_type = get_fn_frame_type(ira->codegen, fn_entry);18819 ZigType *frame_type = get_fn_frame_type(ira->codegen, fn_entry);
17797 IrInstruction *result_loc = ir_resolve_result(ira, source_instr, call_result_loc,18820 IrInstGen *result_loc = ir_resolve_result(ira, source_instr, call_result_loc,
17798 frame_type, nullptr, true, false);18821 frame_type, nullptr, true, false);
17799 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {18822 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
17800 return result_loc;18823 return result_loc;
17801 }18824 }
17802 result_loc = ir_implicit_cast(ira, result_loc, get_pointer_to_type(ira->codegen, frame_type, false));18825 result_loc = ir_implicit_cast(ira, result_loc, get_pointer_to_type(ira->codegen, frame_type, false));
17803 if (type_is_invalid(result_loc->value->type))18826 if (type_is_invalid(result_loc->value->type))
17804 return ira->codegen->invalid_instruction;18827 return ira->codegen->invalid_inst_gen;
17805 return &ir_build_call_gen(ira, source_instr, fn_entry, fn_ref, arg_count,18828 return &ir_build_call_gen(ira, source_instr, fn_entry, fn_ref, arg_count,
17806 casted_args, CallModifierAsync, casted_new_stack,18829 casted_args, CallModifierAsync, casted_new_stack,
17807 is_async_call_builtin, result_loc, frame_type)->base;18830 is_async_call_builtin, result_loc, frame_type)->base;
17808 }18831 }
17809}18832}
17810static bool ir_analyze_fn_call_inline_arg(IrAnalyze *ira, AstNode *fn_proto_node,18833static bool ir_analyze_fn_call_inline_arg(IrAnalyze *ira, AstNode *fn_proto_node,
17811 IrInstruction *arg, Scope **exec_scope, size_t *next_proto_i)18834 IrInstGen *arg, Scope **exec_scope, size_t *next_proto_i)
17812{18835{
17813 AstNode *param_decl_node = fn_proto_node->data.fn_proto.params.at(*next_proto_i);18836 AstNode *param_decl_node = fn_proto_node->data.fn_proto.params.at(*next_proto_i);
17814 assert(param_decl_node->type == NodeTypeParamDecl);18837 assert(param_decl_node->type == NodeTypeParamDecl);
1781518838
17816 IrInstruction *casted_arg;18839 IrInstGen *casted_arg;
17817 if (param_decl_node->data.param_decl.var_token == nullptr) {18840 if (param_decl_node->data.param_decl.var_token == nullptr) {
17818 AstNode *param_type_node = param_decl_node->data.param_decl.type;18841 AstNode *param_type_node = param_decl_node->data.param_decl.type;
17819 ZigType *param_type = ir_analyze_type_expr(ira, *exec_scope, param_type_node);18842 ZigType *param_type = ir_analyze_type_expr(ira, *exec_scope, param_type_node);
...@@ -17841,15 +18864,15 @@ static bool ir_analyze_fn_call_inline_arg(IrAnalyze *ira, AstNode *fn_proto_node...@@ -17841,15 +18864,15 @@ static bool ir_analyze_fn_call_inline_arg(IrAnalyze *ira, AstNode *fn_proto_node
17841}18864}
1784218865
17843static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_node,18866static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_node,
17844 IrInstruction *arg, Scope **child_scope, size_t *next_proto_i,18867 IrInstGen *arg, Scope **child_scope, size_t *next_proto_i,
17845 GenericFnTypeId *generic_id, FnTypeId *fn_type_id, IrInstruction **casted_args,18868 GenericFnTypeId *generic_id, FnTypeId *fn_type_id, IrInstGen **casted_args,
17846 ZigFn *impl_fn)18869 ZigFn *impl_fn)
17847{18870{
17848 AstNode *param_decl_node = fn_proto_node->data.fn_proto.params.at(*next_proto_i);18871 AstNode *param_decl_node = fn_proto_node->data.fn_proto.params.at(*next_proto_i);
17849 assert(param_decl_node->type == NodeTypeParamDecl);18872 assert(param_decl_node->type == NodeTypeParamDecl);
17850 bool is_var_args = param_decl_node->data.param_decl.is_var_args;18873 bool is_var_args = param_decl_node->data.param_decl.is_var_args;
17851 bool arg_part_of_generic_id = false;18874 bool arg_part_of_generic_id = false;
17852 IrInstruction *casted_arg;18875 IrInstGen *casted_arg;
17853 if (is_var_args) {18876 if (is_var_args) {
17854 arg_part_of_generic_id = true;18877 arg_part_of_generic_id = true;
17855 casted_arg = arg;18878 casted_arg = arg;
...@@ -17909,7 +18932,7 @@ static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_nod...@@ -17909,7 +18932,7 @@ static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_nod
17909 } else if (casted_arg->value->type->id == ZigTypeIdComptimeInt ||18932 } else if (casted_arg->value->type->id == ZigTypeIdComptimeInt ||
17910 casted_arg->value->type->id == ZigTypeIdComptimeFloat)18933 casted_arg->value->type->id == ZigTypeIdComptimeFloat)
17911 {18934 {
17912 ir_add_error(ira, casted_arg,18935 ir_add_error(ira, &casted_arg->base,
17913 buf_sprintf("compiler bug: integer and float literals in var args function must be casted. https://github.com/ziglang/zig/issues/557"));18936 buf_sprintf("compiler bug: integer and float literals in var args function must be casted. https://github.com/ziglang/zig/issues/557"));
17914 return false;18937 return false;
17915 }18938 }
...@@ -17926,13 +18949,13 @@ static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_nod...@@ -17926,13 +18949,13 @@ static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_nod
17926 return true;18949 return true;
17927}18950}
1792818951
17929static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction, ZigVar *var) {18952static IrInstGen *ir_get_var_ptr(IrAnalyze *ira, IrInst *source_instr, ZigVar *var) {
17930 while (var->next_var != nullptr) {18953 while (var->next_var != nullptr) {
17931 var = var->next_var;18954 var = var->next_var;
17932 }18955 }
1793318956
17934 if (var->var_type == nullptr || type_is_invalid(var->var_type))18957 if (var->var_type == nullptr || type_is_invalid(var->var_type))
17935 return ira->codegen->invalid_instruction;18958 return ira->codegen->invalid_inst_gen;
1793618959
17937 bool is_volatile = false;18960 bool is_volatile = false;
17938 ZigType *var_ptr_type = get_pointer_to_type_extra(ira->codegen, var->var_type,18961 ZigType *var_ptr_type = get_pointer_to_type_extra(ira->codegen, var->var_type,
...@@ -17945,8 +18968,7 @@ static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction,...@@ -17945,8 +18968,7 @@ static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction,
17945 bool comptime_var_mem = ir_get_var_is_comptime(var);18968 bool comptime_var_mem = ir_get_var_is_comptime(var);
17946 bool linkage_makes_it_runtime = var->decl_node->data.variable_declaration.is_extern;18969 bool linkage_makes_it_runtime = var->decl_node->data.variable_declaration.is_extern;
1794718970
17948 IrInstruction *result = ir_build_var_ptr(&ira->new_irb,18971 IrInstGen *result = ir_build_var_ptr_gen(ira, source_instr, var);
17949 instruction->scope, instruction->source_node, var);
17950 result->value->type = var_ptr_type;18972 result->value->type = var_ptr_type;
1795118973
17952 if (!linkage_makes_it_runtime && !var->is_thread_local && value_is_comptime(var->const_value)) {18974 if (!linkage_makes_it_runtime && !var->is_thread_local && value_is_comptime(var->const_value)) {
...@@ -17982,7 +19004,7 @@ static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction,...@@ -17982,7 +19004,7 @@ static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction,
17982}19004}
1798319005
17984// This function is called when a comptime value becomes accessible at runtime.19006// This function is called when a comptime value becomes accessible at runtime.
17985static void mark_comptime_value_escape(IrAnalyze *ira, IrInstruction *source_instr, ZigValue *val) {19007static void mark_comptime_value_escape(IrAnalyze *ira, IrInst* source_instr, ZigValue *val) {
17986 ir_assert(value_is_comptime(val), source_instr);19008 ir_assert(value_is_comptime(val), source_instr);
17987 if (val->special == ConstValSpecialUndef)19009 if (val->special == ConstValSpecialUndef)
17988 return;19010 return;
...@@ -17995,8 +19017,8 @@ static void mark_comptime_value_escape(IrAnalyze *ira, IrInstruction *source_ins...@@ -17995,8 +19017,8 @@ static void mark_comptime_value_escape(IrAnalyze *ira, IrInstruction *source_ins
17995 }19017 }
17996}19018}
1799719019
17998static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source_instr,19020static IrInstGen *ir_analyze_store_ptr(IrAnalyze *ira, IrInst* source_instr,
17999 IrInstruction *ptr, IrInstruction *uncasted_value, bool allow_write_through_const)19021 IrInstGen *ptr, IrInstGen *uncasted_value, bool allow_write_through_const)
18000{19022{
18001 assert(ptr->value->type->id == ZigTypeIdPointer);19023 assert(ptr->value->type->id == ZigTypeIdPointer);
1800219024
...@@ -18005,24 +19027,24 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source...@@ -18005,24 +19027,24 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
18005 uncasted_value->value->type->id == ZigTypeIdErrorSet)19027 uncasted_value->value->type->id == ZigTypeIdErrorSet)
18006 {19028 {
18007 ir_add_error(ira, source_instr, buf_sprintf("error is discarded"));19029 ir_add_error(ira, source_instr, buf_sprintf("error is discarded"));
18008 return ira->codegen->invalid_instruction;19030 return ira->codegen->invalid_inst_gen;
18009 }19031 }
18010 return ir_const_void(ira, source_instr);19032 return ir_const_void(ira, source_instr);
18011 }19033 }
1801219034
18013 if (ptr->value->type->data.pointer.is_const && !allow_write_through_const) {19035 if (ptr->value->type->data.pointer.is_const && !allow_write_through_const) {
18014 ir_add_error(ira, source_instr, buf_sprintf("cannot assign to constant"));19036 ir_add_error(ira, source_instr, buf_sprintf("cannot assign to constant"));
18015 return ira->codegen->invalid_instruction;19037 return ira->codegen->invalid_inst_gen;
18016 }19038 }
1801719039
18018 ZigType *child_type = ptr->value->type->data.pointer.child_type;19040 ZigType *child_type = ptr->value->type->data.pointer.child_type;
18019 IrInstruction *value = ir_implicit_cast(ira, uncasted_value, child_type);19041 IrInstGen *value = ir_implicit_cast(ira, uncasted_value, child_type);
18020 if (value == ira->codegen->invalid_instruction)19042 if (type_is_invalid(value->value->type))
18021 return ira->codegen->invalid_instruction;19043 return ira->codegen->invalid_inst_gen;
1802219044
18023 switch (type_has_one_possible_value(ira->codegen, child_type)) {19045 switch (type_has_one_possible_value(ira->codegen, child_type)) {
18024 case OnePossibleValueInvalid:19046 case OnePossibleValueInvalid:
18025 return ira->codegen->invalid_instruction;19047 return ira->codegen->invalid_inst_gen;
18026 case OnePossibleValueYes:19048 case OnePossibleValueYes:
18027 return ir_const_void(ira, source_instr);19049 return ir_const_void(ira, source_instr);
18028 case OnePossibleValueNo:19050 case OnePossibleValueNo:
...@@ -18032,7 +19054,7 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source...@@ -18032,7 +19054,7 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
18032 if (instr_is_comptime(ptr) && ptr->value->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {19054 if (instr_is_comptime(ptr) && ptr->value->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
18033 if (!allow_write_through_const && ptr->value->data.x_ptr.mut == ConstPtrMutComptimeConst) {19055 if (!allow_write_through_const && ptr->value->data.x_ptr.mut == ConstPtrMutComptimeConst) {
18034 ir_add_error(ira, source_instr, buf_sprintf("cannot assign to constant"));19056 ir_add_error(ira, source_instr, buf_sprintf("cannot assign to constant"));
18035 return ira->codegen->invalid_instruction;19057 return ira->codegen->invalid_inst_gen;
18036 }19058 }
18037 if ((allow_write_through_const && ptr->value->data.x_ptr.mut == ConstPtrMutComptimeConst) ||19059 if ((allow_write_through_const && ptr->value->data.x_ptr.mut == ConstPtrMutComptimeConst) ||
18038 ptr->value->data.x_ptr.mut == ConstPtrMutComptimeVar ||19060 ptr->value->data.x_ptr.mut == ConstPtrMutComptimeVar ||
...@@ -18041,7 +19063,7 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source...@@ -18041,7 +19063,7 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
18041 if (instr_is_comptime(value)) {19063 if (instr_is_comptime(value)) {
18042 ZigValue *dest_val = const_ptr_pointee(ira, ira->codegen, ptr->value, source_instr->source_node);19064 ZigValue *dest_val = const_ptr_pointee(ira, ira->codegen, ptr->value, source_instr->source_node);
18043 if (dest_val == nullptr)19065 if (dest_val == nullptr)
18044 return ira->codegen->invalid_instruction;19066 return ira->codegen->invalid_inst_gen;
18045 if (dest_val->special != ConstValSpecialRuntime) {19067 if (dest_val->special != ConstValSpecialRuntime) {
18046 copy_const_val(dest_val, value->value);19068 copy_const_val(dest_val, value->value);
1804719069
...@@ -18061,7 +19083,7 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source...@@ -18061,7 +19083,7 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
18061 ZigValue *dest_val = const_ptr_pointee_unchecked(ira->codegen, ptr->value);19083 ZigValue *dest_val = const_ptr_pointee_unchecked(ira->codegen, ptr->value);
18062 dest_val->type = ira->codegen->builtin_types.entry_invalid;19084 dest_val->type = ira->codegen->builtin_types.entry_invalid;
1806319085
18064 return ira->codegen->invalid_instruction;19086 return ira->codegen->invalid_inst_gen;
18065 }19087 }
18066 }19088 }
18067 }19089 }
...@@ -18074,15 +19096,15 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source...@@ -18074,15 +19096,15 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
1807419096
18075 switch (type_requires_comptime(ira->codegen, child_type)) {19097 switch (type_requires_comptime(ira->codegen, child_type)) {
18076 case ReqCompTimeInvalid:19098 case ReqCompTimeInvalid:
18077 return ira->codegen->invalid_instruction;19099 return ira->codegen->invalid_inst_gen;
18078 case ReqCompTimeYes:19100 case ReqCompTimeYes:
18079 switch (type_has_one_possible_value(ira->codegen, ptr->value->type)) {19101 switch (type_has_one_possible_value(ira->codegen, ptr->value->type)) {
18080 case OnePossibleValueInvalid:19102 case OnePossibleValueInvalid:
18081 return ira->codegen->invalid_instruction;19103 return ira->codegen->invalid_inst_gen;
18082 case OnePossibleValueNo:19104 case OnePossibleValueNo:
18083 ir_add_error(ira, source_instr,19105 ir_add_error(ira, source_instr,
18084 buf_sprintf("cannot store runtime value in type '%s'", buf_ptr(&child_type->name)));19106 buf_sprintf("cannot store runtime value in type '%s'", buf_ptr(&child_type->name)));
18085 return ira->codegen->invalid_instruction;19107 return ira->codegen->invalid_inst_gen;
18086 case OnePossibleValueYes:19108 case OnePossibleValueYes:
18087 return ir_const_void(ira, source_instr);19109 return ir_const_void(ira, source_instr);
18088 }19110 }
...@@ -18096,30 +19118,28 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source...@@ -18096,30 +19118,28 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
18096 }19118 }
1809719119
18098 // If this is a store to a pointer with a runtime-known vector index,19120 // If this is a store to a pointer with a runtime-known vector index,
18099 // we have to figure out the IrInstruction which represents the index and19121 // we have to figure out the IrInstGen which represents the index and
18100 // emit a IrInstructionVectorStoreElem, or emit a compile error19122 // emit a IrInstGenVectorStoreElem, or emit a compile error
18101 // explaining why it is impossible for this store to work. Which is that19123 // explaining why it is impossible for this store to work. Which is that
18102 // the pointer address is of the vector; without the element index being known19124 // the pointer address is of the vector; without the element index being known
18103 // we cannot properly perform the insertion.19125 // we cannot properly perform the insertion.
18104 if (ptr->value->type->data.pointer.vector_index == VECTOR_INDEX_RUNTIME) {19126 if (ptr->value->type->data.pointer.vector_index == VECTOR_INDEX_RUNTIME) {
18105 if (ptr->id == IrInstructionIdElemPtr) {19127 if (ptr->id == IrInstGenIdElemPtr) {
18106 IrInstructionElemPtr *elem_ptr = (IrInstructionElemPtr *)ptr;19128 IrInstGenElemPtr *elem_ptr = (IrInstGenElemPtr *)ptr;
18107 return ir_build_vector_store_elem(ira, source_instr, elem_ptr->array_ptr,19129 return ir_build_vector_store_elem(ira, source_instr, elem_ptr->array_ptr,
18108 elem_ptr->elem_index, value);19130 elem_ptr->elem_index, value);
18109 }19131 }
18110 ir_add_error(ira, ptr,19132 ir_add_error(ira, &ptr->base,
18111 buf_sprintf("unable to determine vector element index of type '%s'",19133 buf_sprintf("unable to determine vector element index of type '%s'",
18112 buf_ptr(&ptr->value->type->name)));19134 buf_ptr(&ptr->value->type->name)));
18113 return ira->codegen->invalid_instruction;19135 return ira->codegen->invalid_inst_gen;
18114 }19136 }
1811519137
18116 IrInstructionStorePtr *store_ptr = ir_build_store_ptr(&ira->new_irb, source_instr->scope,19138 return ir_build_store_ptr_gen(ira, source_instr, ptr, value);
18117 source_instr->source_node, ptr, value);
18118 return &store_ptr->base;
18119}19139}
1812019140
18121static IrInstruction *analyze_casted_new_stack(IrAnalyze *ira, IrInstruction *source_instr,19141static IrInstGen *analyze_casted_new_stack(IrAnalyze *ira, IrInst* source_instr,
18122 IrInstruction *new_stack, bool is_async_call_builtin, ZigFn *fn_entry)19142 IrInstGen *new_stack, bool is_async_call_builtin, ZigFn *fn_entry)
18123{19143{
18124 if (new_stack == nullptr)19144 if (new_stack == nullptr)
18125 return nullptr;19145 return nullptr;
...@@ -18148,11 +19168,11 @@ static IrInstruction *analyze_casted_new_stack(IrAnalyze *ira, IrInstruction *so...@@ -18148,11 +19168,11 @@ static IrInstruction *analyze_casted_new_stack(IrAnalyze *ira, IrInstruction *so
18148 }19168 }
18149}19169}
1815019170
18151static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_instr,19171static IrInstGen *ir_analyze_fn_call(IrAnalyze *ira, IrInst* source_instr,
18152 ZigFn *fn_entry, ZigType *fn_type, IrInstruction *fn_ref,19172 ZigFn *fn_entry, ZigType *fn_type, IrInstGen *fn_ref,
18153 IrInstruction *first_arg_ptr, CallModifier modifier,19173 IrInstGen *first_arg_ptr, CallModifier modifier,
18154 IrInstruction *new_stack, bool is_async_call_builtin,19174 IrInstGen *new_stack, bool is_async_call_builtin,
18155 IrInstruction **args_ptr, size_t args_len, IrInstruction *ret_ptr, ResultLoc *call_result_loc)19175 IrInstGen **args_ptr, size_t args_len, IrInstGen *ret_ptr, ResultLoc *call_result_loc)
18156{19176{
18157 Error err;19177 Error err;
18158 FnTypeId *fn_type_id = &fn_type->data.fn.fn_type_id;19178 FnTypeId *fn_type_id = &fn_type->data.fn.fn_type_id;
...@@ -18173,11 +19193,11 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18173,11 +19193,11 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18173 AstNode *fn_proto_node = fn_entry ? fn_entry->proto_node : nullptr;;19193 AstNode *fn_proto_node = fn_entry ? fn_entry->proto_node : nullptr;;
1817419194
18175 if (fn_type_id->cc == CallingConventionNaked) {19195 if (fn_type_id->cc == CallingConventionNaked) {
18176 ErrorMsg *msg = ir_add_error(ira, fn_ref, buf_sprintf("unable to call function with naked calling convention"));19196 ErrorMsg *msg = ir_add_error(ira, &fn_ref->base, buf_sprintf("unable to call function with naked calling convention"));
18177 if (fn_proto_node) {19197 if (fn_proto_node) {
18178 add_error_note(ira->codegen, msg, fn_proto_node, buf_sprintf("declared here"));19198 add_error_note(ira->codegen, msg, fn_proto_node, buf_sprintf("declared here"));
18179 }19199 }
18180 return ira->codegen->invalid_instruction;19200 return ira->codegen->invalid_inst_gen;
18181 }19201 }
1818219202
18183 if (fn_type_id->is_var_args) {19203 if (fn_type_id->is_var_args) {
...@@ -18188,7 +19208,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18188,7 +19208,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18188 add_error_note(ira->codegen, msg, fn_proto_node,19208 add_error_note(ira->codegen, msg, fn_proto_node,
18189 buf_sprintf("declared here"));19209 buf_sprintf("declared here"));
18190 }19210 }
18191 return ira->codegen->invalid_instruction;19211 return ira->codegen->invalid_inst_gen;
18192 }19212 }
18193 } else if (src_param_count != call_param_count) {19213 } else if (src_param_count != call_param_count) {
18194 ErrorMsg *msg = ir_add_error_node(ira, source_node,19214 ErrorMsg *msg = ir_add_error_node(ira, source_node,
...@@ -18197,18 +19217,18 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18197,18 +19217,18 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18197 add_error_note(ira->codegen, msg, fn_proto_node,19217 add_error_note(ira->codegen, msg, fn_proto_node,
18198 buf_sprintf("declared here"));19218 buf_sprintf("declared here"));
18199 }19219 }
18200 return ira->codegen->invalid_instruction;19220 return ira->codegen->invalid_inst_gen;
18201 }19221 }
1820219222
18203 if (modifier == CallModifierCompileTime) {19223 if (modifier == CallModifierCompileTime) {
18204 // No special handling is needed for compile time evaluation of generic functions.19224 // No special handling is needed for compile time evaluation of generic functions.
18205 if (!fn_entry || fn_entry->body_node == nullptr) {19225 if (!fn_entry || fn_entry->body_node == nullptr) {
18206 ir_add_error(ira, fn_ref, buf_sprintf("unable to evaluate constant expression"));19226 ir_add_error(ira, &fn_ref->base, buf_sprintf("unable to evaluate constant expression"));
18207 return ira->codegen->invalid_instruction;19227 return ira->codegen->invalid_inst_gen;
18208 }19228 }
1820919229
18210 if (!ir_emit_backward_branch(ira, source_instr))19230 if (!ir_emit_backward_branch(ira, source_instr))
18211 return ira->codegen->invalid_instruction;19231 return ira->codegen->invalid_inst_gen;
1821219232
18213 // Fork a scope of the function with known values for the parameters.19233 // Fork a scope of the function with known values for the parameters.
18214 Scope *exec_scope = &fn_entry->fndef_scope->base;19234 Scope *exec_scope = &fn_entry->fndef_scope->base;
...@@ -18221,40 +19241,40 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18221,40 +19241,40 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18221 if (fn_type_id->next_param_index >= 1) {19241 if (fn_type_id->next_param_index >= 1) {
18222 ZigType *param_type = fn_type_id->param_info[next_proto_i].type;19242 ZigType *param_type = fn_type_id->param_info[next_proto_i].type;
18223 if (type_is_invalid(param_type))19243 if (type_is_invalid(param_type))
18224 return ira->codegen->invalid_instruction;19244 return ira->codegen->invalid_inst_gen;
18225 first_arg_known_bare = param_type->id != ZigTypeIdPointer;19245 first_arg_known_bare = param_type->id != ZigTypeIdPointer;
18226 }19246 }
1822719247
18228 IrInstruction *first_arg;19248 IrInstGen *first_arg;
18229 if (!first_arg_known_bare && handle_is_ptr(first_arg_ptr->value->type->data.pointer.child_type)) {19249 if (!first_arg_known_bare && handle_is_ptr(first_arg_ptr->value->type->data.pointer.child_type)) {
18230 first_arg = first_arg_ptr;19250 first_arg = first_arg_ptr;
18231 } else {19251 } else {
18232 first_arg = ir_get_deref(ira, first_arg_ptr, first_arg_ptr, nullptr);19252 first_arg = ir_get_deref(ira, &first_arg_ptr->base, first_arg_ptr, nullptr);
18233 if (type_is_invalid(first_arg->value->type))19253 if (type_is_invalid(first_arg->value->type))
18234 return ira->codegen->invalid_instruction;19254 return ira->codegen->invalid_inst_gen;
18235 }19255 }
1823619256
18237 if (!ir_analyze_fn_call_inline_arg(ira, fn_proto_node, first_arg, &exec_scope, &next_proto_i))19257 if (!ir_analyze_fn_call_inline_arg(ira, fn_proto_node, first_arg, &exec_scope, &next_proto_i))
18238 return ira->codegen->invalid_instruction;19258 return ira->codegen->invalid_inst_gen;
18239 }19259 }
1824019260
18241 for (size_t call_i = 0; call_i < args_len; call_i += 1) {19261 for (size_t call_i = 0; call_i < args_len; call_i += 1) {
18242 IrInstruction *old_arg = args_ptr[call_i];19262 IrInstGen *old_arg = args_ptr[call_i];
1824319263
18244 if (!ir_analyze_fn_call_inline_arg(ira, fn_proto_node, old_arg, &exec_scope, &next_proto_i))19264 if (!ir_analyze_fn_call_inline_arg(ira, fn_proto_node, old_arg, &exec_scope, &next_proto_i))
18245 return ira->codegen->invalid_instruction;19265 return ira->codegen->invalid_inst_gen;
18246 }19266 }
1824719267
18248 AstNode *return_type_node = fn_proto_node->data.fn_proto.return_type;19268 AstNode *return_type_node = fn_proto_node->data.fn_proto.return_type;
18249 ZigType *specified_return_type = ir_analyze_type_expr(ira, exec_scope, return_type_node);19269 ZigType *specified_return_type = ir_analyze_type_expr(ira, exec_scope, return_type_node);
18250 if (type_is_invalid(specified_return_type))19270 if (type_is_invalid(specified_return_type))
18251 return ira->codegen->invalid_instruction;19271 return ira->codegen->invalid_inst_gen;
18252 ZigType *return_type;19272 ZigType *return_type;
18253 ZigType *inferred_err_set_type = nullptr;19273 ZigType *inferred_err_set_type = nullptr;
18254 if (fn_proto_node->data.fn_proto.auto_err_set) {19274 if (fn_proto_node->data.fn_proto.auto_err_set) {
18255 inferred_err_set_type = get_auto_err_set_type(ira->codegen, fn_entry);19275 inferred_err_set_type = get_auto_err_set_type(ira->codegen, fn_entry);
18256 if ((err = type_resolve(ira->codegen, specified_return_type, ResolveStatusSizeKnown)))19276 if ((err = type_resolve(ira->codegen, specified_return_type, ResolveStatusSizeKnown)))
18257 return ira->codegen->invalid_instruction;19277 return ira->codegen->invalid_inst_gen;
18258 return_type = get_error_union_type(ira->codegen, inferred_err_set_type, specified_return_type);19278 return_type = get_error_union_type(ira->codegen, inferred_err_set_type, specified_return_type);
18259 } else {19279 } else {
18260 return_type = specified_return_type;19280 return_type = specified_return_type;
...@@ -18278,7 +19298,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18278,7 +19298,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18278 fn_entry, nullptr, source_instr->source_node, nullptr, ira->new_irb.exec, return_type_node,19298 fn_entry, nullptr, source_instr->source_node, nullptr, ira->new_irb.exec, return_type_node,
18279 UndefOk)))19299 UndefOk)))
18280 {19300 {
18281 return ira->codegen->invalid_instruction;19301 return ira->codegen->invalid_inst_gen;
18282 }19302 }
18283 destroy(result_ptr, "ZigValue");19303 destroy(result_ptr, "ZigValue");
18284 result_ptr = nullptr;19304 result_ptr = nullptr;
...@@ -18306,24 +19326,24 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18306,24 +19326,24 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18306 }19326 }
1830719327
18308 if (type_is_invalid(result->type)) {19328 if (type_is_invalid(result->type)) {
18309 return ira->codegen->invalid_instruction;19329 return ira->codegen->invalid_inst_gen;
18310 }19330 }
18311 }19331 }
1831219332
18313 IrInstruction *new_instruction = ir_const_move(ira, source_instr, result);19333 IrInstGen *new_instruction = ir_const_move(ira, source_instr, result);
18314 return ir_finish_anal(ira, new_instruction);19334 return ir_finish_anal(ira, new_instruction);
18315 }19335 }
1831619336
18317 if (fn_type->data.fn.is_generic) {19337 if (fn_type->data.fn.is_generic) {
18318 if (!fn_entry) {19338 if (!fn_entry) {
18319 ir_add_error(ira, fn_ref,19339 ir_add_error(ira, &fn_ref->base,
18320 buf_sprintf("calling a generic function requires compile-time known function value"));19340 buf_sprintf("calling a generic function requires compile-time known function value"));
18321 return ira->codegen->invalid_instruction;19341 return ira->codegen->invalid_inst_gen;
18322 }19342 }
1832319343
18324 size_t new_fn_arg_count = first_arg_1_or_0 + args_len;19344 size_t new_fn_arg_count = first_arg_1_or_0 + args_len;
1832519345
18326 IrInstruction **casted_args = allocate<IrInstruction *>(new_fn_arg_count);19346 IrInstGen **casted_args = allocate<IrInstGen *>(new_fn_arg_count);
1832719347
18328 // Fork a scope of the function with known values for the parameters.19348 // Fork a scope of the function with known values for the parameters.
18329 Scope *parent_scope = fn_entry->fndef_scope->base.parent;19349 Scope *parent_scope = fn_entry->fndef_scope->base.parent;
...@@ -18352,30 +19372,30 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18352,30 +19372,30 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18352 if (fn_type_id->next_param_index >= 1) {19372 if (fn_type_id->next_param_index >= 1) {
18353 ZigType *param_type = fn_type_id->param_info[next_proto_i].type;19373 ZigType *param_type = fn_type_id->param_info[next_proto_i].type;
18354 if (type_is_invalid(param_type))19374 if (type_is_invalid(param_type))
18355 return ira->codegen->invalid_instruction;19375 return ira->codegen->invalid_inst_gen;
18356 first_arg_known_bare = param_type->id != ZigTypeIdPointer;19376 first_arg_known_bare = param_type->id != ZigTypeIdPointer;
18357 }19377 }
1835819378
18359 IrInstruction *first_arg;19379 IrInstGen *first_arg;
18360 if (!first_arg_known_bare && handle_is_ptr(first_arg_ptr->value->type->data.pointer.child_type)) {19380 if (!first_arg_known_bare && handle_is_ptr(first_arg_ptr->value->type->data.pointer.child_type)) {
18361 first_arg = first_arg_ptr;19381 first_arg = first_arg_ptr;
18362 } else {19382 } else {
18363 first_arg = ir_get_deref(ira, first_arg_ptr, first_arg_ptr, nullptr);19383 first_arg = ir_get_deref(ira, &first_arg_ptr->base, first_arg_ptr, nullptr);
18364 if (type_is_invalid(first_arg->value->type))19384 if (type_is_invalid(first_arg->value->type))
18365 return ira->codegen->invalid_instruction;19385 return ira->codegen->invalid_inst_gen;
18366 }19386 }
1836719387
18368 if (!ir_analyze_fn_call_generic_arg(ira, fn_proto_node, first_arg, &impl_fn->child_scope,19388 if (!ir_analyze_fn_call_generic_arg(ira, fn_proto_node, first_arg, &impl_fn->child_scope,
18369 &next_proto_i, generic_id, &inst_fn_type_id, casted_args, impl_fn))19389 &next_proto_i, generic_id, &inst_fn_type_id, casted_args, impl_fn))
18370 {19390 {
18371 return ira->codegen->invalid_instruction;19391 return ira->codegen->invalid_inst_gen;
18372 }19392 }
18373 }19393 }
1837419394
18375 ZigFn *parent_fn_entry = exec_fn_entry(ira->new_irb.exec);19395 ZigFn *parent_fn_entry = ira->new_irb.exec->fn_entry;
18376 assert(parent_fn_entry);19396 assert(parent_fn_entry);
18377 for (size_t call_i = 0; call_i < args_len; call_i += 1) {19397 for (size_t call_i = 0; call_i < args_len; call_i += 1) {
18378 IrInstruction *arg = args_ptr[call_i];19398 IrInstGen *arg = args_ptr[call_i];
1837919399
18380 AstNode *param_decl_node = fn_proto_node->data.fn_proto.params.at(next_proto_i);19400 AstNode *param_decl_node = fn_proto_node->data.fn_proto.params.at(next_proto_i);
18381 assert(param_decl_node->type == NodeTypeParamDecl);19401 assert(param_decl_node->type == NodeTypeParamDecl);
...@@ -18383,7 +19403,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18383,7 +19403,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18383 if (!ir_analyze_fn_call_generic_arg(ira, fn_proto_node, arg, &impl_fn->child_scope,19403 if (!ir_analyze_fn_call_generic_arg(ira, fn_proto_node, arg, &impl_fn->child_scope,
18384 &next_proto_i, generic_id, &inst_fn_type_id, casted_args, impl_fn))19404 &next_proto_i, generic_id, &inst_fn_type_id, casted_args, impl_fn))
18385 {19405 {
18386 return ira->codegen->invalid_instruction;19406 return ira->codegen->invalid_inst_gen;
18387 }19407 }
18388 }19408 }
1838919409
...@@ -18397,9 +19417,9 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18397,9 +19417,9 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18397 nullptr, nullptr, fn_proto_node->data.fn_proto.align_expr, nullptr, ira->new_irb.exec,19417 nullptr, nullptr, fn_proto_node->data.fn_proto.align_expr, nullptr, ira->new_irb.exec,
18398 nullptr, UndefBad)))19418 nullptr, UndefBad)))
18399 {19419 {
18400 return ira->codegen->invalid_instruction;19420 return ira->codegen->invalid_inst_gen;
18401 }19421 }
18402 IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(&ira->new_irb,19422 IrInstGenConst *const_instruction = ir_create_inst_noval<IrInstGenConst>(&ira->new_irb,
18403 impl_fn->child_scope, fn_proto_node->data.fn_proto.align_expr);19423 impl_fn->child_scope, fn_proto_node->data.fn_proto.align_expr);
18404 const_instruction->base.value = align_result;19424 const_instruction->base.value = align_result;
18405 destroy(result_ptr, "ZigValue");19425 destroy(result_ptr, "ZigValue");
...@@ -18414,11 +19434,11 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18414,11 +19434,11 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18414 AstNode *return_type_node = fn_proto_node->data.fn_proto.return_type;19434 AstNode *return_type_node = fn_proto_node->data.fn_proto.return_type;
18415 ZigType *specified_return_type = ir_analyze_type_expr(ira, impl_fn->child_scope, return_type_node);19435 ZigType *specified_return_type = ir_analyze_type_expr(ira, impl_fn->child_scope, return_type_node);
18416 if (type_is_invalid(specified_return_type))19436 if (type_is_invalid(specified_return_type))
18417 return ira->codegen->invalid_instruction;19437 return ira->codegen->invalid_inst_gen;
18418 if (fn_proto_node->data.fn_proto.auto_err_set) {19438 if (fn_proto_node->data.fn_proto.auto_err_set) {
18419 ZigType *inferred_err_set_type = get_auto_err_set_type(ira->codegen, impl_fn);19439 ZigType *inferred_err_set_type = get_auto_err_set_type(ira->codegen, impl_fn);
18420 if ((err = type_resolve(ira->codegen, specified_return_type, ResolveStatusSizeKnown)))19440 if ((err = type_resolve(ira->codegen, specified_return_type, ResolveStatusSizeKnown)))
18421 return ira->codegen->invalid_instruction;19441 return ira->codegen->invalid_inst_gen;
18422 inst_fn_type_id.return_type = get_error_union_type(ira->codegen, inferred_err_set_type, specified_return_type);19442 inst_fn_type_id.return_type = get_error_union_type(ira->codegen, inferred_err_set_type, specified_return_type);
18423 } else {19443 } else {
18424 inst_fn_type_id.return_type = specified_return_type;19444 inst_fn_type_id.return_type = specified_return_type;
...@@ -18431,7 +19451,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18431,7 +19451,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18431 CallModifierCompileTime, new_stack, is_async_call_builtin, args_ptr, args_len,19451 CallModifierCompileTime, new_stack, is_async_call_builtin, args_ptr, args_len,
18432 ret_ptr, call_result_loc);19452 ret_ptr, call_result_loc);
18433 case ReqCompTimeInvalid:19453 case ReqCompTimeInvalid:
18434 return ira->codegen->invalid_instruction;19454 return ira->codegen->invalid_inst_gen;
18435 case ReqCompTimeNo:19455 case ReqCompTimeNo:
18436 break;19456 break;
18437 }19457 }
...@@ -18445,7 +19465,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18445,7 +19465,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18445 // finish instantiating the function19465 // finish instantiating the function
18446 impl_fn->type_entry = get_fn_type(ira->codegen, &inst_fn_type_id);19466 impl_fn->type_entry = get_fn_type(ira->codegen, &inst_fn_type_id);
18447 if (type_is_invalid(impl_fn->type_entry))19467 if (type_is_invalid(impl_fn->type_entry))
18448 return ira->codegen->invalid_instruction;19468 return ira->codegen->invalid_inst_gen;
1844919469
18450 impl_fn->ir_executable->source_node = source_instr->source_node;19470 impl_fn->ir_executable->source_node = source_instr->source_node;
18451 impl_fn->ir_executable->parent_exec = ira->new_irb.exec;19471 impl_fn->ir_executable->parent_exec = ira->new_irb.exec;
...@@ -18463,25 +19483,25 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18463,25 +19483,25 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18463 parent_fn_entry->calls_or_awaits_errorable_fn = true;19483 parent_fn_entry->calls_or_awaits_errorable_fn = true;
18464 }19484 }
1846519485
18466 IrInstruction *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack,19486 IrInstGen *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack,
18467 is_async_call_builtin, impl_fn);19487 is_async_call_builtin, impl_fn);
18468 if (casted_new_stack != nullptr && type_is_invalid(casted_new_stack->value->type))19488 if (casted_new_stack != nullptr && type_is_invalid(casted_new_stack->value->type))
18469 return ira->codegen->invalid_instruction;19489 return ira->codegen->invalid_inst_gen;
1847019490
18471 size_t impl_param_count = impl_fn_type_id->param_count;19491 size_t impl_param_count = impl_fn_type_id->param_count;
18472 if (modifier == CallModifierAsync) {19492 if (modifier == CallModifierAsync) {
18473 IrInstruction *result = ir_analyze_async_call(ira, source_instr, impl_fn, impl_fn->type_entry,19493 IrInstGen *result = ir_analyze_async_call(ira, source_instr, impl_fn, impl_fn->type_entry,
18474 nullptr, casted_args, impl_param_count, casted_new_stack, is_async_call_builtin, ret_ptr,19494 nullptr, casted_args, impl_param_count, casted_new_stack, is_async_call_builtin, ret_ptr,
18475 call_result_loc);19495 call_result_loc);
18476 return ir_finish_anal(ira, result);19496 return ir_finish_anal(ira, result);
18477 }19497 }
1847819498
18479 IrInstruction *result_loc;19499 IrInstGen *result_loc;
18480 if (handle_is_ptr(impl_fn_type_id->return_type)) {19500 if (handle_is_ptr(impl_fn_type_id->return_type)) {
18481 result_loc = ir_resolve_result(ira, source_instr, call_result_loc,19501 result_loc = ir_resolve_result(ira, source_instr, call_result_loc,
18482 impl_fn_type_id->return_type, nullptr, true, false);19502 impl_fn_type_id->return_type, nullptr, true, false);
18483 if (result_loc != nullptr) {19503 if (result_loc != nullptr) {
18484 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {19504 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
18485 return result_loc;19505 return result_loc;
18486 }19506 }
18487 ZigType *res_child_type = result_loc->value->type->data.pointer.child_type;19507 ZigType *res_child_type = result_loc->value->type->data.pointer.child_type;
...@@ -18497,7 +19517,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18497,7 +19517,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18497 result_loc = get_async_call_result_loc(ira, source_instr, impl_fn_type_id->return_type,19517 result_loc = get_async_call_result_loc(ira, source_instr, impl_fn_type_id->return_type,
18498 is_async_call_builtin, args_ptr, args_len, ret_ptr);19518 is_async_call_builtin, args_ptr, args_len, ret_ptr);
18499 if (result_loc != nullptr && type_is_invalid(result_loc->value->type))19519 if (result_loc != nullptr && type_is_invalid(result_loc->value->type))
18500 return ira->codegen->invalid_instruction;19520 return ira->codegen->invalid_inst_gen;
18501 } else {19521 } else {
18502 result_loc = nullptr;19522 result_loc = nullptr;
18503 }19523 }
...@@ -18506,11 +19526,11 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18506,11 +19526,11 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18506 parent_fn_entry->inferred_async_node == nullptr &&19526 parent_fn_entry->inferred_async_node == nullptr &&
18507 modifier != CallModifierNoAsync)19527 modifier != CallModifierNoAsync)
18508 {19528 {
18509 parent_fn_entry->inferred_async_node = fn_ref->source_node;19529 parent_fn_entry->inferred_async_node = fn_ref->base.source_node;
18510 parent_fn_entry->inferred_async_fn = impl_fn;19530 parent_fn_entry->inferred_async_fn = impl_fn;
18511 }19531 }
1851219532
18513 IrInstructionCallGen *new_call_instruction = ir_build_call_gen(ira, source_instr,19533 IrInstGenCall *new_call_instruction = ir_build_call_gen(ira, source_instr,
18514 impl_fn, nullptr, impl_param_count, casted_args, modifier, casted_new_stack,19534 impl_fn, nullptr, impl_param_count, casted_args, modifier, casted_new_stack,
18515 is_async_call_builtin, result_loc, impl_fn_type_id->return_type);19535 is_async_call_builtin, result_loc, impl_fn_type_id->return_type);
1851619536
...@@ -18521,7 +19541,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18521,7 +19541,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18521 return ir_finish_anal(ira, &new_call_instruction->base);19541 return ir_finish_anal(ira, &new_call_instruction->base);
18522 }19542 }
1852319543
18524 ZigFn *parent_fn_entry = exec_fn_entry(ira->new_irb.exec);19544 ZigFn *parent_fn_entry = ira->new_irb.exec->fn_entry;
18525 assert(fn_type_id->return_type != nullptr);19545 assert(fn_type_id->return_type != nullptr);
18526 assert(parent_fn_entry != nullptr);19546 assert(parent_fn_entry != nullptr);
18527 if (fn_type_can_fail(fn_type_id)) {19547 if (fn_type_can_fail(fn_type_id)) {
...@@ -18529,46 +19549,46 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18529,46 +19549,46 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18529 }19549 }
1853019550
1853119551
18532 IrInstruction **casted_args = allocate<IrInstruction *>(call_param_count);19552 IrInstGen **casted_args = allocate<IrInstGen *>(call_param_count);
18533 size_t next_arg_index = 0;19553 size_t next_arg_index = 0;
18534 if (first_arg_ptr) {19554 if (first_arg_ptr) {
18535 assert(first_arg_ptr->value->type->id == ZigTypeIdPointer);19555 assert(first_arg_ptr->value->type->id == ZigTypeIdPointer);
1853619556
18537 ZigType *param_type = fn_type_id->param_info[next_arg_index].type;19557 ZigType *param_type = fn_type_id->param_info[next_arg_index].type;
18538 if (type_is_invalid(param_type))19558 if (type_is_invalid(param_type))
18539 return ira->codegen->invalid_instruction;19559 return ira->codegen->invalid_inst_gen;
1854019560
18541 IrInstruction *first_arg;19561 IrInstGen *first_arg;
18542 if (param_type->id == ZigTypeIdPointer &&19562 if (param_type->id == ZigTypeIdPointer &&
18543 handle_is_ptr(first_arg_ptr->value->type->data.pointer.child_type))19563 handle_is_ptr(first_arg_ptr->value->type->data.pointer.child_type))
18544 {19564 {
18545 first_arg = first_arg_ptr;19565 first_arg = first_arg_ptr;
18546 } else {19566 } else {
18547 first_arg = ir_get_deref(ira, first_arg_ptr, first_arg_ptr, nullptr);19567 first_arg = ir_get_deref(ira, &first_arg_ptr->base, first_arg_ptr, nullptr);
18548 if (type_is_invalid(first_arg->value->type))19568 if (type_is_invalid(first_arg->value->type))
18549 return ira->codegen->invalid_instruction;19569 return ira->codegen->invalid_inst_gen;
18550 }19570 }
1855119571
18552 IrInstruction *casted_arg = ir_implicit_cast(ira, first_arg, param_type);19572 IrInstGen *casted_arg = ir_implicit_cast(ira, first_arg, param_type);
18553 if (type_is_invalid(casted_arg->value->type))19573 if (type_is_invalid(casted_arg->value->type))
18554 return ira->codegen->invalid_instruction;19574 return ira->codegen->invalid_inst_gen;
1855519575
18556 casted_args[next_arg_index] = casted_arg;19576 casted_args[next_arg_index] = casted_arg;
18557 next_arg_index += 1;19577 next_arg_index += 1;
18558 }19578 }
18559 for (size_t call_i = 0; call_i < args_len; call_i += 1) {19579 for (size_t call_i = 0; call_i < args_len; call_i += 1) {
18560 IrInstruction *old_arg = args_ptr[call_i];19580 IrInstGen *old_arg = args_ptr[call_i];
18561 if (type_is_invalid(old_arg->value->type))19581 if (type_is_invalid(old_arg->value->type))
18562 return ira->codegen->invalid_instruction;19582 return ira->codegen->invalid_inst_gen;
1856319583
18564 IrInstruction *casted_arg;19584 IrInstGen *casted_arg;
18565 if (next_arg_index < src_param_count) {19585 if (next_arg_index < src_param_count) {
18566 ZigType *param_type = fn_type_id->param_info[next_arg_index].type;19586 ZigType *param_type = fn_type_id->param_info[next_arg_index].type;
18567 if (type_is_invalid(param_type))19587 if (type_is_invalid(param_type))
18568 return ira->codegen->invalid_instruction;19588 return ira->codegen->invalid_inst_gen;
18569 casted_arg = ir_implicit_cast(ira, old_arg, param_type);19589 casted_arg = ir_implicit_cast(ira, old_arg, param_type);
18570 if (type_is_invalid(casted_arg->value->type))19590 if (type_is_invalid(casted_arg->value->type))
18571 return ira->codegen->invalid_instruction;19591 return ira->codegen->invalid_inst_gen;
18572 } else {19592 } else {
18573 casted_arg = old_arg;19593 casted_arg = old_arg;
18574 }19594 }
...@@ -18581,21 +19601,21 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18581,21 +19601,21 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1858119601
18582 ZigType *return_type = fn_type_id->return_type;19602 ZigType *return_type = fn_type_id->return_type;
18583 if (type_is_invalid(return_type))19603 if (type_is_invalid(return_type))
18584 return ira->codegen->invalid_instruction;19604 return ira->codegen->invalid_inst_gen;
1858519605
18586 if (fn_entry != nullptr && fn_entry->fn_inline == FnInlineAlways && modifier == CallModifierNeverInline) {19606 if (fn_entry != nullptr && fn_entry->fn_inline == FnInlineAlways && modifier == CallModifierNeverInline) {
18587 ir_add_error(ira, source_instr,19607 ir_add_error(ira, source_instr,
18588 buf_sprintf("no-inline call of inline function"));19608 buf_sprintf("no-inline call of inline function"));
18589 return ira->codegen->invalid_instruction;19609 return ira->codegen->invalid_inst_gen;
18590 }19610 }
1859119611
18592 IrInstruction *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack,19612 IrInstGen *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack,
18593 is_async_call_builtin, fn_entry);19613 is_async_call_builtin, fn_entry);
18594 if (casted_new_stack != nullptr && type_is_invalid(casted_new_stack->value->type))19614 if (casted_new_stack != nullptr && type_is_invalid(casted_new_stack->value->type))
18595 return ira->codegen->invalid_instruction;19615 return ira->codegen->invalid_inst_gen;
1859619616
18597 if (modifier == CallModifierAsync) {19617 if (modifier == CallModifierAsync) {
18598 IrInstruction *result = ir_analyze_async_call(ira, source_instr, fn_entry, fn_type, fn_ref,19618 IrInstGen *result = ir_analyze_async_call(ira, source_instr, fn_entry, fn_type, fn_ref,
18599 casted_args, call_param_count, casted_new_stack, is_async_call_builtin, ret_ptr, call_result_loc);19619 casted_args, call_param_count, casted_new_stack, is_async_call_builtin, ret_ptr, call_result_loc);
18600 return ir_finish_anal(ira, result);19620 return ir_finish_anal(ira, result);
18601 }19621 }
...@@ -18604,16 +19624,16 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18604,16 +19624,16 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18604 parent_fn_entry->inferred_async_node == nullptr &&19624 parent_fn_entry->inferred_async_node == nullptr &&
18605 modifier != CallModifierNoAsync)19625 modifier != CallModifierNoAsync)
18606 {19626 {
18607 parent_fn_entry->inferred_async_node = fn_ref->source_node;19627 parent_fn_entry->inferred_async_node = fn_ref->base.source_node;
18608 parent_fn_entry->inferred_async_fn = fn_entry;19628 parent_fn_entry->inferred_async_fn = fn_entry;
18609 }19629 }
1861019630
18611 IrInstruction *result_loc;19631 IrInstGen *result_loc;
18612 if (handle_is_ptr(return_type)) {19632 if (handle_is_ptr(return_type)) {
18613 result_loc = ir_resolve_result(ira, source_instr, call_result_loc,19633 result_loc = ir_resolve_result(ira, source_instr, call_result_loc,
18614 return_type, nullptr, true, false);19634 return_type, nullptr, true, false);
18615 if (result_loc != nullptr) {19635 if (result_loc != nullptr) {
18616 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {19636 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
18617 return result_loc;19637 return result_loc;
18618 }19638 }
18619 ZigType *res_child_type = result_loc->value->type->data.pointer.child_type;19639 ZigType *res_child_type = result_loc->value->type->data.pointer.child_type;
...@@ -18629,12 +19649,12 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18629,12 +19649,12 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18629 result_loc = get_async_call_result_loc(ira, source_instr, return_type, is_async_call_builtin,19649 result_loc = get_async_call_result_loc(ira, source_instr, return_type, is_async_call_builtin,
18630 args_ptr, args_len, ret_ptr);19650 args_ptr, args_len, ret_ptr);
18631 if (result_loc != nullptr && type_is_invalid(result_loc->value->type))19651 if (result_loc != nullptr && type_is_invalid(result_loc->value->type))
18632 return ira->codegen->invalid_instruction;19652 return ira->codegen->invalid_inst_gen;
18633 } else {19653 } else {
18634 result_loc = nullptr;19654 result_loc = nullptr;
18635 }19655 }
1863619656
18637 IrInstructionCallGen *new_call_instruction = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,19657 IrInstGenCall *new_call_instruction = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,
18638 call_param_count, casted_args, modifier, casted_new_stack,19658 call_param_count, casted_args, modifier, casted_new_stack,
18639 is_async_call_builtin, result_loc, return_type);19659 is_async_call_builtin, result_loc, return_type);
18640 if (get_scope_typeof(source_instr->scope) == nullptr) {19660 if (get_scope_typeof(source_instr->scope) == nullptr) {
...@@ -18643,62 +19663,62 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i...@@ -18643,62 +19663,62 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
18643 return ir_finish_anal(ira, &new_call_instruction->base);19663 return ir_finish_anal(ira, &new_call_instruction->base);
18644}19664}
1864519665
18646static IrInstruction *ir_analyze_fn_call_src(IrAnalyze *ira, IrInstructionCallSrc *call_instruction,19666static IrInstGen *ir_analyze_fn_call_src(IrAnalyze *ira, IrInstSrcCall *call_instruction,
18647 ZigFn *fn_entry, ZigType *fn_type, IrInstruction *fn_ref,19667 ZigFn *fn_entry, ZigType *fn_type, IrInstGen *fn_ref,
18648 IrInstruction *first_arg_ptr, CallModifier modifier)19668 IrInstGen *first_arg_ptr, CallModifier modifier)
18649{19669{
18650 IrInstruction *new_stack = nullptr;19670 IrInstGen *new_stack = nullptr;
18651 if (call_instruction->new_stack) {19671 if (call_instruction->new_stack) {
18652 new_stack = call_instruction->new_stack->child;19672 new_stack = call_instruction->new_stack->child;
18653 if (type_is_invalid(new_stack->value->type))19673 if (type_is_invalid(new_stack->value->type))
18654 return ira->codegen->invalid_instruction;19674 return ira->codegen->invalid_inst_gen;
18655 }19675 }
18656 IrInstruction **args_ptr = allocate<IrInstruction *>(call_instruction->arg_count, "IrInstruction *");19676 IrInstGen **args_ptr = allocate<IrInstGen *>(call_instruction->arg_count, "IrInstGen *");
18657 for (size_t i = 0; i < call_instruction->arg_count; i += 1) {19677 for (size_t i = 0; i < call_instruction->arg_count; i += 1) {
18658 args_ptr[i] = call_instruction->args[i]->child;19678 args_ptr[i] = call_instruction->args[i]->child;
18659 if (type_is_invalid(args_ptr[i]->value->type))19679 if (type_is_invalid(args_ptr[i]->value->type))
18660 return ira->codegen->invalid_instruction;19680 return ira->codegen->invalid_inst_gen;
18661 }19681 }
18662 IrInstruction *ret_ptr = nullptr;19682 IrInstGen *ret_ptr = nullptr;
18663 if (call_instruction->ret_ptr != nullptr) {19683 if (call_instruction->ret_ptr != nullptr) {
18664 ret_ptr = call_instruction->ret_ptr->child;19684 ret_ptr = call_instruction->ret_ptr->child;
18665 if (type_is_invalid(ret_ptr->value->type))19685 if (type_is_invalid(ret_ptr->value->type))
18666 return ira->codegen->invalid_instruction;19686 return ira->codegen->invalid_inst_gen;
18667 }19687 }
18668 IrInstruction *result = ir_analyze_fn_call(ira, &call_instruction->base, fn_entry, fn_type, fn_ref,19688 IrInstGen *result = ir_analyze_fn_call(ira, &call_instruction->base.base, fn_entry, fn_type, fn_ref,
18669 first_arg_ptr, modifier, new_stack, call_instruction->is_async_call_builtin,19689 first_arg_ptr, modifier, new_stack, call_instruction->is_async_call_builtin,
18670 args_ptr, call_instruction->arg_count, ret_ptr, call_instruction->result_loc);19690 args_ptr, call_instruction->arg_count, ret_ptr, call_instruction->result_loc);
18671 deallocate(args_ptr, call_instruction->arg_count, "IrInstruction *");19691 deallocate(args_ptr, call_instruction->arg_count, "IrInstGen *");
18672 return result;19692 return result;
18673}19693}
1867419694
18675static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *source_instr,19695static IrInstGen *ir_analyze_call_extra(IrAnalyze *ira, IrInst* source_instr,
18676 IrInstruction *pass1_options, IrInstruction *pass1_fn_ref, IrInstruction **args_ptr, size_t args_len,19696 IrInstSrc *pass1_options, IrInstSrc *pass1_fn_ref, IrInstGen **args_ptr, size_t args_len,
18677 ResultLoc *result_loc)19697 ResultLoc *result_loc)
18678{19698{
18679 IrInstruction *options = pass1_options->child;19699 IrInstGen *options = pass1_options->child;
18680 if (type_is_invalid(options->value->type))19700 if (type_is_invalid(options->value->type))
18681 return ira->codegen->invalid_instruction;19701 return ira->codegen->invalid_inst_gen;
1868219702
18683 IrInstruction *fn_ref = pass1_fn_ref->child;19703 IrInstGen *fn_ref = pass1_fn_ref->child;
18684 if (type_is_invalid(fn_ref->value->type))19704 if (type_is_invalid(fn_ref->value->type))
18685 return ira->codegen->invalid_instruction;19705 return ira->codegen->invalid_inst_gen;
1868619706
18687 TypeStructField *modifier_field = find_struct_type_field(options->value->type, buf_create_from_str("modifier"));19707 TypeStructField *modifier_field = find_struct_type_field(options->value->type, buf_create_from_str("modifier"));
18688 ir_assert(modifier_field != nullptr, source_instr);19708 ir_assert(modifier_field != nullptr, source_instr);
18689 IrInstruction *modifier_inst = ir_analyze_struct_value_field_value(ira, source_instr, options, modifier_field);19709 IrInstGen *modifier_inst = ir_analyze_struct_value_field_value(ira, source_instr, options, modifier_field);
18690 ZigValue *modifier_val = ir_resolve_const(ira, modifier_inst, UndefBad);19710 ZigValue *modifier_val = ir_resolve_const(ira, modifier_inst, UndefBad);
18691 if (modifier_val == nullptr)19711 if (modifier_val == nullptr)
18692 return ira->codegen->invalid_instruction;19712 return ira->codegen->invalid_inst_gen;
18693 CallModifier modifier = (CallModifier)bigint_as_u32(&modifier_val->data.x_enum_tag);19713 CallModifier modifier = (CallModifier)bigint_as_u32(&modifier_val->data.x_enum_tag);
1869419714
18695 if (ir_should_inline(ira->new_irb.exec, source_instr->scope)) {19715 if (ir_should_inline(ira->old_irb.exec, source_instr->scope)) {
18696 switch (modifier) {19716 switch (modifier) {
18697 case CallModifierBuiltin:19717 case CallModifierBuiltin:
18698 zig_unreachable();19718 zig_unreachable();
18699 case CallModifierAsync:19719 case CallModifierAsync:
18700 ir_add_error(ira, source_instr, buf_sprintf("TODO: comptime @call with async modifier"));19720 ir_add_error(ira, source_instr, buf_sprintf("TODO: comptime @call with async modifier"));
18701 return ira->codegen->invalid_instruction;19721 return ira->codegen->invalid_inst_gen;
18702 case CallModifierCompileTime:19722 case CallModifierCompileTime:
18703 case CallModifierNone:19723 case CallModifierNone:
18704 case CallModifierAlwaysInline:19724 case CallModifierAlwaysInline:
...@@ -18709,15 +19729,15 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc...@@ -18709,15 +19729,15 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc
18709 case CallModifierNeverInline:19729 case CallModifierNeverInline:
18710 ir_add_error(ira, source_instr,19730 ir_add_error(ira, source_instr,
18711 buf_sprintf("unable to perform 'never_inline' call at compile-time"));19731 buf_sprintf("unable to perform 'never_inline' call at compile-time"));
18712 return ira->codegen->invalid_instruction;19732 return ira->codegen->invalid_inst_gen;
18713 case CallModifierNeverTail:19733 case CallModifierNeverTail:
18714 ir_add_error(ira, source_instr,19734 ir_add_error(ira, source_instr,
18715 buf_sprintf("unable to perform 'never_tail' call at compile-time"));19735 buf_sprintf("unable to perform 'never_tail' call at compile-time"));
18716 return ira->codegen->invalid_instruction;19736 return ira->codegen->invalid_inst_gen;
18717 }19737 }
18718 }19738 }
1871919739
18720 IrInstruction *first_arg_ptr = nullptr;19740 IrInstGen *first_arg_ptr = nullptr;
18721 ZigFn *fn = nullptr;19741 ZigFn *fn = nullptr;
18722 if (instr_is_comptime(fn_ref)) {19742 if (instr_is_comptime(fn_ref)) {
18723 if (fn_ref->value->type->id == ZigTypeIdBoundFn) {19743 if (fn_ref->value->type->id == ZigTypeIdBoundFn) {
...@@ -18725,7 +19745,7 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc...@@ -18725,7 +19745,7 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc
18725 fn = fn_ref->value->data.x_bound_fn.fn;19745 fn = fn_ref->value->data.x_bound_fn.fn;
18726 first_arg_ptr = fn_ref->value->data.x_bound_fn.first_arg;19746 first_arg_ptr = fn_ref->value->data.x_bound_fn.first_arg;
18727 if (type_is_invalid(first_arg_ptr->value->type))19747 if (type_is_invalid(first_arg_ptr->value->type))
18728 return ira->codegen->invalid_instruction;19748 return ira->codegen->invalid_inst_gen;
18729 } else {19749 } else {
18730 fn = ir_resolve_fn(ira, fn_ref);19750 fn = ir_resolve_fn(ira, fn_ref);
18731 }19751 }
...@@ -18737,9 +19757,9 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc...@@ -18737,9 +19757,9 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc
18737 case CallModifierAlwaysInline:19757 case CallModifierAlwaysInline:
18738 case CallModifierAsync:19758 case CallModifierAsync:
18739 if (fn == nullptr) {19759 if (fn == nullptr) {
18740 ir_add_error(ira, modifier_inst,19760 ir_add_error(ira, &modifier_inst->base,
18741 buf_sprintf("the specified modifier requires a comptime-known function"));19761 buf_sprintf("the specified modifier requires a comptime-known function"));
18742 return ira->codegen->invalid_instruction;19762 return ira->codegen->invalid_inst_gen;
18743 }19763 }
18744 default:19764 default:
18745 break;19765 break;
...@@ -18749,93 +19769,93 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc...@@ -18749,93 +19769,93 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc
1874919769
18750 TypeStructField *stack_field = find_struct_type_field(options->value->type, buf_create_from_str("stack"));19770 TypeStructField *stack_field = find_struct_type_field(options->value->type, buf_create_from_str("stack"));
18751 ir_assert(stack_field != nullptr, source_instr);19771 ir_assert(stack_field != nullptr, source_instr);
18752 IrInstruction *opt_stack = ir_analyze_struct_value_field_value(ira, source_instr, options, stack_field);19772 IrInstGen *opt_stack = ir_analyze_struct_value_field_value(ira, source_instr, options, stack_field);
18753 if (type_is_invalid(opt_stack->value->type))19773 if (type_is_invalid(opt_stack->value->type))
18754 return ira->codegen->invalid_instruction;19774 return ira->codegen->invalid_inst_gen;
1875519775
18756 IrInstruction *stack_is_non_null_inst = ir_analyze_test_non_null(ira, source_instr, opt_stack);19776 IrInstGen *stack_is_non_null_inst = ir_analyze_test_non_null(ira, source_instr, opt_stack);
18757 bool stack_is_non_null;19777 bool stack_is_non_null;
18758 if (!ir_resolve_bool(ira, stack_is_non_null_inst, &stack_is_non_null))19778 if (!ir_resolve_bool(ira, stack_is_non_null_inst, &stack_is_non_null))
18759 return ira->codegen->invalid_instruction;19779 return ira->codegen->invalid_inst_gen;
1876019780
18761 IrInstruction *stack = nullptr;19781 IrInstGen *stack = nullptr;
18762 if (stack_is_non_null) {19782 if (stack_is_non_null) {
18763 stack = ir_analyze_optional_value_payload_value(ira, source_instr, opt_stack, false);19783 stack = ir_analyze_optional_value_payload_value(ira, source_instr, opt_stack, false);
18764 if (type_is_invalid(stack->value->type))19784 if (type_is_invalid(stack->value->type))
18765 return ira->codegen->invalid_instruction;19785 return ira->codegen->invalid_inst_gen;
18766 }19786 }
1876719787
18768 return ir_analyze_fn_call(ira, source_instr, fn, fn_type, fn_ref, first_arg_ptr,19788 return ir_analyze_fn_call(ira, source_instr, fn, fn_type, fn_ref, first_arg_ptr,
18769 modifier, stack, false, args_ptr, args_len, nullptr, result_loc);19789 modifier, stack, false, args_ptr, args_len, nullptr, result_loc);
18770}19790}
1877119791
18772static IrInstruction *ir_analyze_instruction_call_extra(IrAnalyze *ira, IrInstructionCallExtra *instruction) {19792static IrInstGen *ir_analyze_instruction_call_extra(IrAnalyze *ira, IrInstSrcCallExtra *instruction) {
18773 IrInstruction *args = instruction->args->child;19793 IrInstGen *args = instruction->args->child;
18774 ZigType *args_type = args->value->type;19794 ZigType *args_type = args->value->type;
18775 if (type_is_invalid(args_type))19795 if (type_is_invalid(args_type))
18776 return ira->codegen->invalid_instruction;19796 return ira->codegen->invalid_inst_gen;
1877719797
18778 if (args_type->id != ZigTypeIdStruct) {19798 if (args_type->id != ZigTypeIdStruct) {
18779 ir_add_error(ira, args,19799 ir_add_error(ira, &args->base,
18780 buf_sprintf("expected tuple or struct, found '%s'", buf_ptr(&args_type->name)));19800 buf_sprintf("expected tuple or struct, found '%s'", buf_ptr(&args_type->name)));
18781 return ira->codegen->invalid_instruction;19801 return ira->codegen->invalid_inst_gen;
18782 }19802 }
1878319803
18784 IrInstruction **args_ptr = nullptr;19804 IrInstGen **args_ptr = nullptr;
18785 size_t args_len = 0;19805 size_t args_len = 0;
1878619806
18787 if (is_tuple(args_type)) {19807 if (is_tuple(args_type)) {
18788 args_len = args_type->data.structure.src_field_count;19808 args_len = args_type->data.structure.src_field_count;
18789 args_ptr = allocate<IrInstruction *>(args_len, "IrInstruction *");19809 args_ptr = allocate<IrInstGen *>(args_len, "IrInstGen *");
18790 for (size_t i = 0; i < args_len; i += 1) {19810 for (size_t i = 0; i < args_len; i += 1) {
18791 TypeStructField *arg_field = args_type->data.structure.fields[i];19811 TypeStructField *arg_field = args_type->data.structure.fields[i];
18792 args_ptr[i] = ir_analyze_struct_value_field_value(ira, &instruction->base, args, arg_field);19812 args_ptr[i] = ir_analyze_struct_value_field_value(ira, &instruction->base.base, args, arg_field);
18793 if (type_is_invalid(args_ptr[i]->value->type))19813 if (type_is_invalid(args_ptr[i]->value->type))
18794 return ira->codegen->invalid_instruction;19814 return ira->codegen->invalid_inst_gen;
18795 }19815 }
18796 } else {19816 } else {
18797 ir_add_error(ira, args, buf_sprintf("TODO: struct args"));19817 ir_add_error(ira, &args->base, buf_sprintf("TODO: struct args"));
18798 return ira->codegen->invalid_instruction;19818 return ira->codegen->invalid_inst_gen;
18799 }19819 }
18800 IrInstruction *result = ir_analyze_call_extra(ira, &instruction->base, instruction->options,19820 IrInstGen *result = ir_analyze_call_extra(ira, &instruction->base.base, instruction->options,
18801 instruction->fn_ref, args_ptr, args_len, instruction->result_loc);19821 instruction->fn_ref, args_ptr, args_len, instruction->result_loc);
18802 deallocate(args_ptr, args_len, "IrInstruction *");19822 deallocate(args_ptr, args_len, "IrInstGen *");
18803 return result;19823 return result;
18804}19824}
1880519825
18806static IrInstruction *ir_analyze_instruction_call_args(IrAnalyze *ira, IrInstructionCallSrcArgs *instruction) {19826static IrInstGen *ir_analyze_instruction_call_args(IrAnalyze *ira, IrInstSrcCallArgs *instruction) {
18807 IrInstruction **args_ptr = allocate<IrInstruction *>(instruction->args_len, "IrInstruction *");19827 IrInstGen **args_ptr = allocate<IrInstGen *>(instruction->args_len, "IrInstGen *");
18808 for (size_t i = 0; i < instruction->args_len; i += 1) {19828 for (size_t i = 0; i < instruction->args_len; i += 1) {
18809 args_ptr[i] = instruction->args_ptr[i]->child;19829 args_ptr[i] = instruction->args_ptr[i]->child;
18810 if (type_is_invalid(args_ptr[i]->value->type))19830 if (type_is_invalid(args_ptr[i]->value->type))
18811 return ira->codegen->invalid_instruction;19831 return ira->codegen->invalid_inst_gen;
18812 }19832 }
1881319833
18814 IrInstruction *result = ir_analyze_call_extra(ira, &instruction->base, instruction->options,19834 IrInstGen *result = ir_analyze_call_extra(ira, &instruction->base.base, instruction->options,
18815 instruction->fn_ref, args_ptr, instruction->args_len, instruction->result_loc);19835 instruction->fn_ref, args_ptr, instruction->args_len, instruction->result_loc);
18816 deallocate(args_ptr, instruction->args_len, "IrInstruction *");19836 deallocate(args_ptr, instruction->args_len, "IrInstGen *");
18817 return result;19837 return result;
18818}19838}
1881919839
18820static IrInstruction *ir_analyze_instruction_call(IrAnalyze *ira, IrInstructionCallSrc *call_instruction) {19840static IrInstGen *ir_analyze_instruction_call(IrAnalyze *ira, IrInstSrcCall *call_instruction) {
18821 IrInstruction *fn_ref = call_instruction->fn_ref->child;19841 IrInstGen *fn_ref = call_instruction->fn_ref->child;
18822 if (type_is_invalid(fn_ref->value->type))19842 if (type_is_invalid(fn_ref->value->type))
18823 return ira->codegen->invalid_instruction;19843 return ira->codegen->invalid_inst_gen;
1882419844
18825 bool is_comptime = (call_instruction->modifier == CallModifierCompileTime) ||19845 bool is_comptime = (call_instruction->modifier == CallModifierCompileTime) ||
18826 ir_should_inline(ira->new_irb.exec, call_instruction->base.scope);19846 ir_should_inline(ira->old_irb.exec, call_instruction->base.base.scope);
18827 CallModifier modifier = is_comptime ? CallModifierCompileTime : call_instruction->modifier;19847 CallModifier modifier = is_comptime ? CallModifierCompileTime : call_instruction->modifier;
1882819848
18829 if (is_comptime || instr_is_comptime(fn_ref)) {19849 if (is_comptime || instr_is_comptime(fn_ref)) {
18830 if (fn_ref->value->type->id == ZigTypeIdMetaType) {19850 if (fn_ref->value->type->id == ZigTypeIdMetaType) {
18831 ZigType *ty = ir_resolve_type(ira, fn_ref);19851 ZigType *ty = ir_resolve_type(ira, fn_ref);
18832 if (ty == nullptr)19852 if (ty == nullptr)
18833 return ira->codegen->invalid_instruction;19853 return ira->codegen->invalid_inst_gen;
18834 ErrorMsg *msg = ir_add_error_node(ira, fn_ref->source_node,19854 ErrorMsg *msg = ir_add_error(ira, &fn_ref->base,
18835 buf_sprintf("type '%s' not a function", buf_ptr(&ty->name)));19855 buf_sprintf("type '%s' not a function", buf_ptr(&ty->name)));
18836 add_error_note(ira->codegen, msg, call_instruction->base.source_node,19856 add_error_note(ira->codegen, msg, call_instruction->base.base.source_node,
18837 buf_sprintf("use @as builtin for type coercion"));19857 buf_sprintf("use @as builtin for type coercion"));
18838 return ira->codegen->invalid_instruction;19858 return ira->codegen->invalid_inst_gen;
18839 } else if (fn_ref->value->type->id == ZigTypeIdFn) {19859 } else if (fn_ref->value->type->id == ZigTypeIdFn) {
18840 ZigFn *fn_table_entry = ir_resolve_fn(ira, fn_ref);19860 ZigFn *fn_table_entry = ir_resolve_fn(ira, fn_ref);
18841 ZigType *fn_type = fn_table_entry ? fn_table_entry->type_entry : fn_ref->value->type;19861 ZigType *fn_type = fn_table_entry ? fn_table_entry->type_entry : fn_ref->value->type;
...@@ -18845,14 +19865,14 @@ static IrInstruction *ir_analyze_instruction_call(IrAnalyze *ira, IrInstructionC...@@ -18845,14 +19865,14 @@ static IrInstruction *ir_analyze_instruction_call(IrAnalyze *ira, IrInstructionC
18845 } else if (fn_ref->value->type->id == ZigTypeIdBoundFn) {19865 } else if (fn_ref->value->type->id == ZigTypeIdBoundFn) {
18846 assert(fn_ref->value->special == ConstValSpecialStatic);19866 assert(fn_ref->value->special == ConstValSpecialStatic);
18847 ZigFn *fn_table_entry = fn_ref->value->data.x_bound_fn.fn;19867 ZigFn *fn_table_entry = fn_ref->value->data.x_bound_fn.fn;
18848 IrInstruction *first_arg_ptr = fn_ref->value->data.x_bound_fn.first_arg;19868 IrInstGen *first_arg_ptr = fn_ref->value->data.x_bound_fn.first_arg;
18849 CallModifier modifier = is_comptime ? CallModifierCompileTime : call_instruction->modifier;19869 CallModifier modifier = is_comptime ? CallModifierCompileTime : call_instruction->modifier;
18850 return ir_analyze_fn_call_src(ira, call_instruction, fn_table_entry, fn_table_entry->type_entry,19870 return ir_analyze_fn_call_src(ira, call_instruction, fn_table_entry, fn_table_entry->type_entry,
18851 fn_ref, first_arg_ptr, modifier);19871 fn_ref, first_arg_ptr, modifier);
18852 } else {19872 } else {
18853 ir_add_error_node(ira, fn_ref->source_node,19873 ir_add_error(ira, &fn_ref->base,
18854 buf_sprintf("type '%s' not a function", buf_ptr(&fn_ref->value->type->name)));19874 buf_sprintf("type '%s' not a function", buf_ptr(&fn_ref->value->type->name)));
18855 return ira->codegen->invalid_instruction;19875 return ira->codegen->invalid_inst_gen;
18856 }19876 }
18857 }19877 }
1885819878
...@@ -18860,9 +19880,9 @@ static IrInstruction *ir_analyze_instruction_call(IrAnalyze *ira, IrInstructionC...@@ -18860,9 +19880,9 @@ static IrInstruction *ir_analyze_instruction_call(IrAnalyze *ira, IrInstructionC
18860 return ir_analyze_fn_call_src(ira, call_instruction, nullptr, fn_ref->value->type,19880 return ir_analyze_fn_call_src(ira, call_instruction, nullptr, fn_ref->value->type,
18861 fn_ref, nullptr, modifier);19881 fn_ref, nullptr, modifier);
18862 } else {19882 } else {
18863 ir_add_error_node(ira, fn_ref->source_node,19883 ir_add_error(ira, &fn_ref->base,
18864 buf_sprintf("type '%s' not a function", buf_ptr(&fn_ref->value->type->name)));19884 buf_sprintf("type '%s' not a function", buf_ptr(&fn_ref->value->type->name)));
18865 return ira->codegen->invalid_instruction;19885 return ira->codegen->invalid_inst_gen;
18866 }19886 }
18867}19887}
1886819888
...@@ -18951,8 +19971,8 @@ static Error ir_read_const_ptr(IrAnalyze *ira, CodeGen *codegen, AstNode *source...@@ -18951,8 +19971,8 @@ static Error ir_read_const_ptr(IrAnalyze *ira, CodeGen *codegen, AstNode *source
18951 zig_unreachable();19971 zig_unreachable();
18952}19972}
1895319973
18954static IrInstruction *ir_analyze_optional_type(IrAnalyze *ira, IrInstructionUnOp *instruction) {19974static IrInstGen *ir_analyze_optional_type(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
18955 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);19975 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
18956 result->value->special = ConstValSpecialLazy;19976 result->value->special = ConstValSpecialLazy;
1895719977
18958 LazyValueOptType *lazy_opt_type = allocate<LazyValueOptType>(1, "LazyValueOptType");19978 LazyValueOptType *lazy_opt_type = allocate<LazyValueOptType>(1, "LazyValueOptType");
...@@ -18962,12 +19982,12 @@ static IrInstruction *ir_analyze_optional_type(IrAnalyze *ira, IrInstructionUnOp...@@ -18962,12 +19982,12 @@ static IrInstruction *ir_analyze_optional_type(IrAnalyze *ira, IrInstructionUnOp
1896219982
18963 lazy_opt_type->payload_type = instruction->value->child;19983 lazy_opt_type->payload_type = instruction->value->child;
18964 if (ir_resolve_type_lazy(ira, lazy_opt_type->payload_type) == nullptr)19984 if (ir_resolve_type_lazy(ira, lazy_opt_type->payload_type) == nullptr)
18965 return ira->codegen->invalid_instruction;19985 return ira->codegen->invalid_inst_gen;
1896619986
18967 return result;19987 return result;
18968}19988}
1896919989
18970static ErrorMsg *ir_eval_negation_scalar(IrAnalyze *ira, IrInstruction *source_instr, ZigType *scalar_type,19990static ErrorMsg *ir_eval_negation_scalar(IrAnalyze *ira, IrInst* source_instr, ZigType *scalar_type,
18971 ZigValue *operand_val, ZigValue *scalar_out_val, bool is_wrap_op)19991 ZigValue *operand_val, ZigValue *scalar_out_val, bool is_wrap_op)
18972{19992{
18973 bool is_float = (scalar_type->id == ZigTypeIdFloat || scalar_type->id == ZigTypeIdComptimeFloat);19993 bool is_float = (scalar_type->id == ZigTypeIdFloat || scalar_type->id == ZigTypeIdComptimeFloat);
...@@ -19002,19 +20022,19 @@ static ErrorMsg *ir_eval_negation_scalar(IrAnalyze *ira, IrInstruction *source_i...@@ -19002,19 +20022,19 @@ static ErrorMsg *ir_eval_negation_scalar(IrAnalyze *ira, IrInstruction *source_i
19002 return nullptr;20022 return nullptr;
19003}20023}
1900420024
19005static IrInstruction *ir_analyze_negation(IrAnalyze *ira, IrInstructionUnOp *instruction) {20025static IrInstGen *ir_analyze_negation(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
19006 IrInstruction *value = instruction->value->child;20026 IrInstGen *value = instruction->value->child;
19007 ZigType *expr_type = value->value->type;20027 ZigType *expr_type = value->value->type;
19008 if (type_is_invalid(expr_type))20028 if (type_is_invalid(expr_type))
19009 return ira->codegen->invalid_instruction;20029 return ira->codegen->invalid_inst_gen;
1901020030
19011 if (!(expr_type->id == ZigTypeIdInt || expr_type->id == ZigTypeIdComptimeInt ||20031 if (!(expr_type->id == ZigTypeIdInt || expr_type->id == ZigTypeIdComptimeInt ||
19012 expr_type->id == ZigTypeIdFloat || expr_type->id == ZigTypeIdComptimeFloat ||20032 expr_type->id == ZigTypeIdFloat || expr_type->id == ZigTypeIdComptimeFloat ||
19013 expr_type->id == ZigTypeIdVector))20033 expr_type->id == ZigTypeIdVector))
19014 {20034 {
19015 ir_add_error(ira, &instruction->base,20035 ir_add_error(ira, &instruction->base.base,
19016 buf_sprintf("negation of type '%s'", buf_ptr(&expr_type->name)));20036 buf_sprintf("negation of type '%s'", buf_ptr(&expr_type->name)));
19017 return ira->codegen->invalid_instruction;20037 return ira->codegen->invalid_inst_gen;
19018 }20038 }
1901920039
19020 bool is_wrap_op = (instruction->op_id == IrUnOpNegationWrap);20040 bool is_wrap_op = (instruction->op_id == IrUnOpNegationWrap);
...@@ -19024,9 +20044,9 @@ static IrInstruction *ir_analyze_negation(IrAnalyze *ira, IrInstructionUnOp *ins...@@ -19024,9 +20044,9 @@ static IrInstruction *ir_analyze_negation(IrAnalyze *ira, IrInstructionUnOp *ins
19024 if (instr_is_comptime(value)) {20044 if (instr_is_comptime(value)) {
19025 ZigValue *operand_val = ir_resolve_const(ira, value, UndefBad);20045 ZigValue *operand_val = ir_resolve_const(ira, value, UndefBad);
19026 if (!operand_val)20046 if (!operand_val)
19027 return ira->codegen->invalid_instruction;20047 return ira->codegen->invalid_inst_gen;
1902820048
19029 IrInstruction *result_instruction = ir_const(ira, &instruction->base, expr_type);20049 IrInstGen *result_instruction = ir_const(ira, &instruction->base.base, expr_type);
19030 ZigValue *out_val = result_instruction->value;20050 ZigValue *out_val = result_instruction->value;
19031 if (expr_type->id == ZigTypeIdVector) {20051 if (expr_type->id == ZigTypeIdVector) {
19032 expand_undef_array(ira->codegen, operand_val);20052 expand_undef_array(ira->codegen, operand_val);
...@@ -19038,63 +20058,60 @@ static IrInstruction *ir_analyze_negation(IrAnalyze *ira, IrInstructionUnOp *ins...@@ -19038,63 +20058,60 @@ static IrInstruction *ir_analyze_negation(IrAnalyze *ira, IrInstructionUnOp *ins
19038 ZigValue *scalar_out_val = &out_val->data.x_array.data.s_none.elements[i];20058 ZigValue *scalar_out_val = &out_val->data.x_array.data.s_none.elements[i];
19039 assert(scalar_operand_val->type == scalar_type);20059 assert(scalar_operand_val->type == scalar_type);
19040 assert(scalar_out_val->type == scalar_type);20060 assert(scalar_out_val->type == scalar_type);
19041 ErrorMsg *msg = ir_eval_negation_scalar(ira, &instruction->base, scalar_type,20061 ErrorMsg *msg = ir_eval_negation_scalar(ira, &instruction->base.base, scalar_type,
19042 scalar_operand_val, scalar_out_val, is_wrap_op);20062 scalar_operand_val, scalar_out_val, is_wrap_op);
19043 if (msg != nullptr) {20063 if (msg != nullptr) {
19044 add_error_note(ira->codegen, msg, instruction->base.source_node,20064 add_error_note(ira->codegen, msg, instruction->base.base.source_node,
19045 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));20065 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
19046 return ira->codegen->invalid_instruction;20066 return ira->codegen->invalid_inst_gen;
19047 }20067 }
19048 }20068 }
19049 out_val->type = expr_type;20069 out_val->type = expr_type;
19050 out_val->special = ConstValSpecialStatic;20070 out_val->special = ConstValSpecialStatic;
19051 } else {20071 } else {
19052 if (ir_eval_negation_scalar(ira, &instruction->base, scalar_type, operand_val, out_val,20072 if (ir_eval_negation_scalar(ira, &instruction->base.base, scalar_type, operand_val, out_val,
19053 is_wrap_op) != nullptr)20073 is_wrap_op) != nullptr)
19054 {20074 {
19055 return ira->codegen->invalid_instruction;20075 return ira->codegen->invalid_inst_gen;
19056 }20076 }
19057 }20077 }
19058 return result_instruction;20078 return result_instruction;
19059 }20079 }
1906020080
19061 IrInstruction *result = ir_build_un_op(&ira->new_irb,20081 if (is_wrap_op) {
19062 instruction->base.scope, instruction->base.source_node,20082 return ir_build_negation_wrapping(ira, &instruction->base.base, value, expr_type);
19063 instruction->op_id, value);20083 } else {
19064 result->value->type = expr_type;20084 return ir_build_negation(ira, &instruction->base.base, value, expr_type);
19065 return result;20085 }
19066}20086}
1906720087
19068static IrInstruction *ir_analyze_bin_not(IrAnalyze *ira, IrInstructionUnOp *instruction) {20088static IrInstGen *ir_analyze_bin_not(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
19069 IrInstruction *value = instruction->value->child;20089 IrInstGen *value = instruction->value->child;
19070 ZigType *expr_type = value->value->type;20090 ZigType *expr_type = value->value->type;
19071 if (type_is_invalid(expr_type))20091 if (type_is_invalid(expr_type))
19072 return ira->codegen->invalid_instruction;20092 return ira->codegen->invalid_inst_gen;
1907320093
19074 if (expr_type->id == ZigTypeIdInt) {20094 if (expr_type->id == ZigTypeIdInt) {
19075 if (instr_is_comptime(value)) {20095 if (instr_is_comptime(value)) {
19076 ZigValue *target_const_val = ir_resolve_const(ira, value, UndefBad);20096 ZigValue *target_const_val = ir_resolve_const(ira, value, UndefBad);
19077 if (target_const_val == nullptr)20097 if (target_const_val == nullptr)
19078 return ira->codegen->invalid_instruction;20098 return ira->codegen->invalid_inst_gen;
1907920099
19080 IrInstruction *result = ir_const(ira, &instruction->base, expr_type);20100 IrInstGen *result = ir_const(ira, &instruction->base.base, expr_type);
19081 bigint_not(&result->value->data.x_bigint, &target_const_val->data.x_bigint,20101 bigint_not(&result->value->data.x_bigint, &target_const_val->data.x_bigint,
19082 expr_type->data.integral.bit_count, expr_type->data.integral.is_signed);20102 expr_type->data.integral.bit_count, expr_type->data.integral.is_signed);
19083 return result;20103 return result;
19084 }20104 }
1908520105
19086 IrInstruction *result = ir_build_un_op(&ira->new_irb, instruction->base.scope,20106 return ir_build_binary_not(ira, &instruction->base.base, value, expr_type);
19087 instruction->base.source_node, IrUnOpBinNot, value);
19088 result->value->type = expr_type;
19089 return result;
19090 }20107 }
1909120108
19092 ir_add_error(ira, &instruction->base,20109 ir_add_error(ira, &instruction->base.base,
19093 buf_sprintf("unable to perform binary not operation on type '%s'", buf_ptr(&expr_type->name)));20110 buf_sprintf("unable to perform binary not operation on type '%s'", buf_ptr(&expr_type->name)));
19094 return ira->codegen->invalid_instruction;20111 return ira->codegen->invalid_inst_gen;
19095}20112}
1909620113
19097static IrInstruction *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstructionUnOp *instruction) {20114static IrInstGen *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
19098 IrUnOp op_id = instruction->op_id;20115 IrUnOp op_id = instruction->op_id;
19099 switch (op_id) {20116 switch (op_id) {
19100 case IrUnOpInvalid:20117 case IrUnOpInvalid:
...@@ -19105,26 +20122,26 @@ static IrInstruction *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstruction...@@ -19105,26 +20122,26 @@ static IrInstruction *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstruction
19105 case IrUnOpNegationWrap:20122 case IrUnOpNegationWrap:
19106 return ir_analyze_negation(ira, instruction);20123 return ir_analyze_negation(ira, instruction);
19107 case IrUnOpDereference: {20124 case IrUnOpDereference: {
19108 IrInstruction *ptr = instruction->value->child;20125 IrInstGen *ptr = instruction->value->child;
19109 if (type_is_invalid(ptr->value->type))20126 if (type_is_invalid(ptr->value->type))
19110 return ira->codegen->invalid_instruction;20127 return ira->codegen->invalid_inst_gen;
19111 ZigType *ptr_type = ptr->value->type;20128 ZigType *ptr_type = ptr->value->type;
19112 if (ptr_type->id == ZigTypeIdPointer && ptr_type->data.pointer.ptr_len == PtrLenUnknown) {20129 if (ptr_type->id == ZigTypeIdPointer && ptr_type->data.pointer.ptr_len == PtrLenUnknown) {
19113 ir_add_error_node(ira, instruction->base.source_node,20130 ir_add_error_node(ira, instruction->base.base.source_node,
19114 buf_sprintf("index syntax required for unknown-length pointer type '%s'",20131 buf_sprintf("index syntax required for unknown-length pointer type '%s'",
19115 buf_ptr(&ptr_type->name)));20132 buf_ptr(&ptr_type->name)));
19116 return ira->codegen->invalid_instruction;20133 return ira->codegen->invalid_inst_gen;
19117 }20134 }
1911820135
19119 IrInstruction *result = ir_get_deref(ira, &instruction->base, ptr, instruction->result_loc);20136 IrInstGen *result = ir_get_deref(ira, &instruction->base.base, ptr, instruction->result_loc);
19120 if (result == ira->codegen->invalid_instruction)20137 if (type_is_invalid(result->value->type))
19121 return ira->codegen->invalid_instruction;20138 return ira->codegen->invalid_inst_gen;
1912220139
19123 // If the result needs to be an lvalue, type check it20140 // If the result needs to be an lvalue, type check it
19124 if (instruction->lval == LValPtr && result->value->type->id != ZigTypeIdPointer) {20141 if (instruction->lval == LValPtr && result->value->type->id != ZigTypeIdPointer) {
19125 ir_add_error(ira, &instruction->base,20142 ir_add_error(ira, &instruction->base.base,
19126 buf_sprintf("attempt to dereference non-pointer type '%s'", buf_ptr(&result->value->type->name)));20143 buf_sprintf("attempt to dereference non-pointer type '%s'", buf_ptr(&result->value->type->name)));
19127 return ira->codegen->invalid_instruction;20144 return ira->codegen->invalid_inst_gen;
19128 }20145 }
1912920146
19130 return result;20147 return result;
...@@ -19136,42 +20153,40 @@ static IrInstruction *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstruction...@@ -19136,42 +20153,40 @@ static IrInstruction *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstruction
19136}20153}
1913720154
19138static void ir_push_resume(IrAnalyze *ira, IrSuspendPosition pos) {20155static void ir_push_resume(IrAnalyze *ira, IrSuspendPosition pos) {
19139 IrBasicBlock *old_bb = ira->old_irb.exec->basic_block_list.at(pos.basic_block_index);20156 IrBasicBlockSrc *old_bb = ira->old_irb.exec->basic_block_list.at(pos.basic_block_index);
19140 if (old_bb->in_resume_stack) return;20157 if (old_bb->in_resume_stack) return;
19141 ira->resume_stack.append(pos);20158 ira->resume_stack.append(pos);
19142 old_bb->in_resume_stack = true;20159 old_bb->in_resume_stack = true;
19143}20160}
1914420161
19145static void ir_push_resume_block(IrAnalyze *ira, IrBasicBlock *old_bb) {20162static void ir_push_resume_block(IrAnalyze *ira, IrBasicBlockSrc *old_bb) {
19146 if (ira->resume_stack.length != 0) {20163 if (ira->resume_stack.length != 0) {
19147 ir_push_resume(ira, {old_bb->index, 0});20164 ir_push_resume(ira, {old_bb->index, 0});
19148 }20165 }
19149}20166}
1915020167
19151static IrInstruction *ir_analyze_instruction_br(IrAnalyze *ira, IrInstructionBr *br_instruction) {20168static IrInstGen *ir_analyze_instruction_br(IrAnalyze *ira, IrInstSrcBr *br_instruction) {
19152 IrBasicBlock *old_dest_block = br_instruction->dest_block;20169 IrBasicBlockSrc *old_dest_block = br_instruction->dest_block;
1915320170
19154 bool is_comptime;20171 bool is_comptime;
19155 if (!ir_resolve_comptime(ira, br_instruction->is_comptime->child, &is_comptime))20172 if (!ir_resolve_comptime(ira, br_instruction->is_comptime->child, &is_comptime))
19156 return ir_unreach_error(ira);20173 return ir_unreach_error(ira);
1915720174
19158 if (is_comptime || (old_dest_block->ref_count == 1 && old_dest_block->suspend_instruction_ref == nullptr))20175 if (is_comptime || (old_dest_block->ref_count == 1 && old_dest_block->suspend_instruction_ref == nullptr))
19159 return ir_inline_bb(ira, &br_instruction->base, old_dest_block);20176 return ir_inline_bb(ira, &br_instruction->base.base, old_dest_block);
1916020177
19161 IrBasicBlock *new_bb = ir_get_new_bb_runtime(ira, old_dest_block, &br_instruction->base);20178 IrBasicBlockGen *new_bb = ir_get_new_bb_runtime(ira, old_dest_block, &br_instruction->base.base);
19162 if (new_bb == nullptr)20179 if (new_bb == nullptr)
19163 return ir_unreach_error(ira);20180 return ir_unreach_error(ira);
1916420181
19165 ir_push_resume_block(ira, old_dest_block);20182 ir_push_resume_block(ira, old_dest_block);
1916620183
19167 IrInstruction *result = ir_build_br(&ira->new_irb,20184 IrInstGen *result = ir_build_br_gen(ira, &br_instruction->base.base, new_bb);
19168 br_instruction->base.scope, br_instruction->base.source_node, new_bb, nullptr);
19169 result->value->type = ira->codegen->builtin_types.entry_unreachable;
19170 return ir_finish_anal(ira, result);20185 return ir_finish_anal(ira, result);
19171}20186}
1917220187
19173static IrInstruction *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstructionCondBr *cond_br_instruction) {20188static IrInstGen *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstSrcCondBr *cond_br_instruction) {
19174 IrInstruction *condition = cond_br_instruction->condition->child;20189 IrInstGen *condition = cond_br_instruction->condition->child;
19175 if (type_is_invalid(condition->value->type))20190 if (type_is_invalid(condition->value->type))
19176 return ir_unreach_error(ira);20191 return ir_unreach_error(ira);
1917720192
...@@ -19180,7 +20195,7 @@ static IrInstruction *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstructi...@@ -19180,7 +20195,7 @@ static IrInstruction *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstructi
19180 return ir_unreach_error(ira);20195 return ir_unreach_error(ira);
1918120196
19182 ZigType *bool_type = ira->codegen->builtin_types.entry_bool;20197 ZigType *bool_type = ira->codegen->builtin_types.entry_bool;
19183 IrInstruction *casted_condition = ir_implicit_cast(ira, condition, bool_type);20198 IrInstGen *casted_condition = ir_implicit_cast(ira, condition, bool_type);
19184 if (type_is_invalid(casted_condition->value->type))20199 if (type_is_invalid(casted_condition->value->type))
19185 return ir_unreach_error(ira);20200 return ir_unreach_error(ira);
1918620201
...@@ -19189,67 +20204,61 @@ static IrInstruction *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstructi...@@ -19189,67 +20204,61 @@ static IrInstruction *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstructi
19189 if (!ir_resolve_bool(ira, casted_condition, &cond_is_true))20204 if (!ir_resolve_bool(ira, casted_condition, &cond_is_true))
19190 return ir_unreach_error(ira);20205 return ir_unreach_error(ira);
1919120206
19192 IrBasicBlock *old_dest_block = cond_is_true ?20207 IrBasicBlockSrc *old_dest_block = cond_is_true ?
19193 cond_br_instruction->then_block : cond_br_instruction->else_block;20208 cond_br_instruction->then_block : cond_br_instruction->else_block;
1919420209
19195 if (is_comptime || (old_dest_block->ref_count == 1 && old_dest_block->suspend_instruction_ref == nullptr))20210 if (is_comptime || (old_dest_block->ref_count == 1 && old_dest_block->suspend_instruction_ref == nullptr))
19196 return ir_inline_bb(ira, &cond_br_instruction->base, old_dest_block);20211 return ir_inline_bb(ira, &cond_br_instruction->base.base, old_dest_block);
1919720212
19198 IrBasicBlock *new_dest_block = ir_get_new_bb_runtime(ira, old_dest_block, &cond_br_instruction->base);20213 IrBasicBlockGen *new_dest_block = ir_get_new_bb_runtime(ira, old_dest_block, &cond_br_instruction->base.base);
19199 if (new_dest_block == nullptr)20214 if (new_dest_block == nullptr)
19200 return ir_unreach_error(ira);20215 return ir_unreach_error(ira);
1920120216
19202 ir_push_resume_block(ira, old_dest_block);20217 ir_push_resume_block(ira, old_dest_block);
1920320218
19204 IrInstruction *result = ir_build_br(&ira->new_irb,20219 IrInstGen *result = ir_build_br_gen(ira, &cond_br_instruction->base.base, new_dest_block);
19205 cond_br_instruction->base.scope, cond_br_instruction->base.source_node, new_dest_block, nullptr);
19206 result->value->type = ira->codegen->builtin_types.entry_unreachable;
19207 return ir_finish_anal(ira, result);20220 return ir_finish_anal(ira, result);
19208 }20221 }
1920920222
19210 assert(cond_br_instruction->then_block != cond_br_instruction->else_block);20223 assert(cond_br_instruction->then_block != cond_br_instruction->else_block);
19211 IrBasicBlock *new_then_block = ir_get_new_bb_runtime(ira, cond_br_instruction->then_block, &cond_br_instruction->base);20224 IrBasicBlockGen *new_then_block = ir_get_new_bb_runtime(ira, cond_br_instruction->then_block, &cond_br_instruction->base.base);
19212 if (new_then_block == nullptr)20225 if (new_then_block == nullptr)
19213 return ir_unreach_error(ira);20226 return ir_unreach_error(ira);
1921420227
19215 IrBasicBlock *new_else_block = ir_get_new_bb_runtime(ira, cond_br_instruction->else_block, &cond_br_instruction->base);20228 IrBasicBlockGen *new_else_block = ir_get_new_bb_runtime(ira, cond_br_instruction->else_block, &cond_br_instruction->base.base);
19216 if (new_else_block == nullptr)20229 if (new_else_block == nullptr)
19217 return ir_unreach_error(ira);20230 return ir_unreach_error(ira);
1921820231
19219 ir_push_resume_block(ira, cond_br_instruction->else_block);20232 ir_push_resume_block(ira, cond_br_instruction->else_block);
19220 ir_push_resume_block(ira, cond_br_instruction->then_block);20233 ir_push_resume_block(ira, cond_br_instruction->then_block);
1922120234
19222 IrInstruction *result = ir_build_cond_br(&ira->new_irb,20235 IrInstGen *result = ir_build_cond_br_gen(ira, &cond_br_instruction->base.base,
19223 cond_br_instruction->base.scope, cond_br_instruction->base.source_node,20236 casted_condition, new_then_block, new_else_block);
19224 casted_condition, new_then_block, new_else_block, nullptr);
19225 result->value->type = ira->codegen->builtin_types.entry_unreachable;
19226 return ir_finish_anal(ira, result);20237 return ir_finish_anal(ira, result);
19227}20238}
1922820239
19229static IrInstruction *ir_analyze_instruction_unreachable(IrAnalyze *ira,20240static IrInstGen *ir_analyze_instruction_unreachable(IrAnalyze *ira,
19230 IrInstructionUnreachable *unreachable_instruction)20241 IrInstSrcUnreachable *unreachable_instruction)
19231{20242{
19232 IrInstruction *result = ir_build_unreachable(&ira->new_irb,20243 IrInstGen *result = ir_build_unreachable_gen(ira, &unreachable_instruction->base.base);
19233 unreachable_instruction->base.scope, unreachable_instruction->base.source_node);
19234 result->value->type = ira->codegen->builtin_types.entry_unreachable;
19235 return ir_finish_anal(ira, result);20244 return ir_finish_anal(ira, result);
19236}20245}
1923720246
19238static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPhi *phi_instruction) {20247static IrInstGen *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstSrcPhi *phi_instruction) {
19239 Error err;20248 Error err;
1924020249
19241 if (ira->const_predecessor_bb) {20250 if (ira->const_predecessor_bb) {
19242 for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {20251 for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
19243 IrBasicBlock *predecessor = phi_instruction->incoming_blocks[i];20252 IrBasicBlockSrc *predecessor = phi_instruction->incoming_blocks[i];
19244 if (predecessor != ira->const_predecessor_bb)20253 if (predecessor != ira->const_predecessor_bb)
19245 continue;20254 continue;
19246 IrInstruction *value = phi_instruction->incoming_values[i]->child;20255 IrInstGen *value = phi_instruction->incoming_values[i]->child;
19247 assert(value->value->type);20256 assert(value->value->type);
19248 if (type_is_invalid(value->value->type))20257 if (type_is_invalid(value->value->type))
19249 return ira->codegen->invalid_instruction;20258 return ira->codegen->invalid_inst_gen;
1925020259
19251 if (value->value->special != ConstValSpecialRuntime) {20260 if (value->value->special != ConstValSpecialRuntime) {
19252 IrInstruction *result = ir_const(ira, &phi_instruction->base, nullptr);20261 IrInstGen *result = ir_const(ira, &phi_instruction->base.base, nullptr);
19253 copy_const_val(result->value, value->value);20262 copy_const_val(result->value, value->value);
19254 return result;20263 return result;
19255 } else {20264 } else {
...@@ -19264,17 +20273,17 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh...@@ -19264,17 +20273,17 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
19264 peer_parent->peers.length >= 2)20273 peer_parent->peers.length >= 2)
19265 {20274 {
19266 if (peer_parent->resolved_type == nullptr) {20275 if (peer_parent->resolved_type == nullptr) {
19267 IrInstruction **instructions = allocate<IrInstruction *>(peer_parent->peers.length);20276 IrInstGen **instructions = allocate<IrInstGen *>(peer_parent->peers.length);
19268 for (size_t i = 0; i < peer_parent->peers.length; i += 1) {20277 for (size_t i = 0; i < peer_parent->peers.length; i += 1) {
19269 ResultLocPeer *this_peer = peer_parent->peers.at(i);20278 ResultLocPeer *this_peer = peer_parent->peers.at(i);
1927020279
19271 IrInstruction *gen_instruction = this_peer->base.gen_instruction;20280 IrInstGen *gen_instruction = this_peer->base.gen_instruction;
19272 if (gen_instruction == nullptr) {20281 if (gen_instruction == nullptr) {
19273 // unreachable instructions will cause implicit_elem_type to be null20282 // unreachable instructions will cause implicit_elem_type to be null
19274 if (this_peer->base.implicit_elem_type == nullptr) {20283 if (this_peer->base.implicit_elem_type == nullptr) {
19275 instructions[i] = ir_const_unreachable(ira, this_peer->base.source_instruction);20284 instructions[i] = ir_const_unreachable(ira, &this_peer->base.source_instruction->base);
19276 } else {20285 } else {
19277 instructions[i] = ir_const(ira, this_peer->base.source_instruction,20286 instructions[i] = ir_const(ira, &this_peer->base.source_instruction->base,
19278 this_peer->base.implicit_elem_type);20287 this_peer->base.implicit_elem_type);
19279 instructions[i]->value->special = ConstValSpecialRuntime;20288 instructions[i]->value->special = ConstValSpecialRuntime;
19280 }20289 }
...@@ -19283,34 +20292,34 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh...@@ -19283,34 +20292,34 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
19283 }20292 }
1928420293
19285 }20294 }
19286 ZigType *expected_type = ir_result_loc_expected_type(ira, &phi_instruction->base, peer_parent->parent);20295 ZigType *expected_type = ir_result_loc_expected_type(ira, &phi_instruction->base.base, peer_parent->parent);
19287 peer_parent->resolved_type = ir_resolve_peer_types(ira,20296 peer_parent->resolved_type = ir_resolve_peer_types(ira,
19288 peer_parent->base.source_instruction->source_node, expected_type, instructions,20297 peer_parent->base.source_instruction->base.source_node, expected_type, instructions,
19289 peer_parent->peers.length);20298 peer_parent->peers.length);
19290 if (type_is_invalid(peer_parent->resolved_type))20299 if (type_is_invalid(peer_parent->resolved_type))
19291 return ira->codegen->invalid_instruction;20300 return ira->codegen->invalid_inst_gen;
1929220301
19293 // the logic below assumes there are no instructions in the new current basic block yet20302 // the logic below assumes there are no instructions in the new current basic block yet
19294 ir_assert(ira->new_irb.current_basic_block->instruction_list.length == 0, &phi_instruction->base);20303 ir_assert(ira->new_irb.current_basic_block->instruction_list.length == 0, &phi_instruction->base.base);
1929520304
19296 // In case resolving the parent activates a suspend, do it now20305 // In case resolving the parent activates a suspend, do it now
19297 IrInstruction *parent_result_loc = ir_resolve_result(ira, &phi_instruction->base, peer_parent->parent,20306 IrInstGen *parent_result_loc = ir_resolve_result(ira, &phi_instruction->base.base, peer_parent->parent,
19298 peer_parent->resolved_type, nullptr, false, true);20307 peer_parent->resolved_type, nullptr, false, true);
19299 if (parent_result_loc != nullptr &&20308 if (parent_result_loc != nullptr &&
19300 (type_is_invalid(parent_result_loc->value->type) || instr_is_unreachable(parent_result_loc)))20309 (type_is_invalid(parent_result_loc->value->type) || parent_result_loc->value->type->id == ZigTypeIdUnreachable))
19301 {20310 {
19302 return parent_result_loc;20311 return parent_result_loc;
19303 }20312 }
19304 // If the above code generated any instructions in the current basic block, we need20313 // If the above code generated any instructions in the current basic block, we need
19305 // to move them to the peer parent predecessor.20314 // to move them to the peer parent predecessor.
19306 ZigList<IrInstruction *> instrs_to_move = {};20315 ZigList<IrInstGen *> instrs_to_move = {};
19307 while (ira->new_irb.current_basic_block->instruction_list.length != 0) {20316 while (ira->new_irb.current_basic_block->instruction_list.length != 0) {
19308 instrs_to_move.append(ira->new_irb.current_basic_block->instruction_list.pop());20317 instrs_to_move.append(ira->new_irb.current_basic_block->instruction_list.pop());
19309 }20318 }
19310 if (instrs_to_move.length != 0) {20319 if (instrs_to_move.length != 0) {
19311 IrBasicBlock *predecessor = peer_parent->base.source_instruction->child->owner_bb;20320 IrBasicBlockGen *predecessor = peer_parent->base.source_instruction->child->owner_bb;
19312 IrInstruction *branch_instruction = predecessor->instruction_list.pop();20321 IrInstGen *branch_instruction = predecessor->instruction_list.pop();
19313 ir_assert(branch_instruction->value->type->id == ZigTypeIdUnreachable, &phi_instruction->base);20322 ir_assert(branch_instruction->value->type->id == ZigTypeIdUnreachable, &phi_instruction->base.base);
19314 while (instrs_to_move.length != 0) {20323 while (instrs_to_move.length != 0) {
19315 predecessor->instruction_list.append(instrs_to_move.pop());20324 predecessor->instruction_list.append(instrs_to_move.pop());
19316 }20325 }
...@@ -19319,7 +20328,7 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh...@@ -19319,7 +20328,7 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
19319 }20328 }
1932020329
19321 IrSuspendPosition suspend_pos;20330 IrSuspendPosition suspend_pos;
19322 ira_suspend(ira, &phi_instruction->base, nullptr, &suspend_pos);20331 ira_suspend(ira, &phi_instruction->base.base, nullptr, &suspend_pos);
19323 ir_push_resume(ira, suspend_pos);20332 ir_push_resume(ira, suspend_pos);
1932420333
19325 for (size_t i = 0; i < peer_parent->peers.length; i += 1) {20334 for (size_t i = 0; i < peer_parent->peers.length; i += 1) {
...@@ -19335,34 +20344,32 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh...@@ -19335,34 +20344,32 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
19335 return ira_resume(ira);20344 return ira_resume(ira);
19336 }20345 }
1933720346
19338 ZigList<IrBasicBlock*> new_incoming_blocks = {0};20347 ZigList<IrBasicBlockGen*> new_incoming_blocks = {0};
19339 ZigList<IrInstruction*> new_incoming_values = {0};20348 ZigList<IrInstGen*> new_incoming_values = {0};
1934020349
19341 for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {20350 for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
19342 IrBasicBlock *predecessor = phi_instruction->incoming_blocks[i];20351 IrBasicBlockSrc *predecessor = phi_instruction->incoming_blocks[i];
19343 if (predecessor->ref_count == 0)20352 if (predecessor->ref_count == 0)
19344 continue;20353 continue;
1934520354
1934620355
19347 IrInstruction *old_value = phi_instruction->incoming_values[i];20356 IrInstSrc *old_value = phi_instruction->incoming_values[i];
19348 assert(old_value);20357 assert(old_value);
19349 IrInstruction *new_value = old_value->child;20358 IrInstGen *new_value = old_value->child;
19350 if (!new_value || new_value->value->type->id == ZigTypeIdUnreachable || predecessor->other == nullptr)20359 if (!new_value || new_value->value->type->id == ZigTypeIdUnreachable || predecessor->child == nullptr)
19351 continue;20360 continue;
1935220361
19353 if (type_is_invalid(new_value->value->type))20362 if (type_is_invalid(new_value->value->type))
19354 return ira->codegen->invalid_instruction;20363 return ira->codegen->invalid_inst_gen;
1935520364
1935620365
19357 assert(predecessor->other);20366 assert(predecessor->child);
19358 new_incoming_blocks.append(predecessor->other);20367 new_incoming_blocks.append(predecessor->child);
19359 new_incoming_values.append(new_value);20368 new_incoming_values.append(new_value);
19360 }20369 }
1936120370
19362 if (new_incoming_blocks.length == 0) {20371 if (new_incoming_blocks.length == 0) {
19363 IrInstruction *result = ir_build_unreachable(&ira->new_irb,20372 IrInstGen *result = ir_build_unreachable_gen(ira, &phi_instruction->base.base);
19364 phi_instruction->base.scope, phi_instruction->base.source_node);
19365 result->value->type = ira->codegen->builtin_types.entry_unreachable;
19366 return ir_finish_anal(ira, result);20373 return ir_finish_anal(ira, result);
19367 }20374 }
1936820375
...@@ -19374,7 +20381,7 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh...@@ -19374,7 +20381,7 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
19374 if (peer_parent != nullptr) {20381 if (peer_parent != nullptr) {
19375 bool peer_parent_has_type;20382 bool peer_parent_has_type;
19376 if ((err = ir_result_has_type(ira, peer_parent->parent, &peer_parent_has_type)))20383 if ((err = ir_result_has_type(ira, peer_parent->parent, &peer_parent_has_type)))
19377 return ira->codegen->invalid_instruction;20384 return ira->codegen->invalid_inst_gen;
19378 if (peer_parent_has_type) {20385 if (peer_parent_has_type) {
19379 if (peer_parent->parent->id == ResultLocIdReturn) {20386 if (peer_parent->parent->id == ResultLocIdReturn) {
19380 resolved_type = ira->explicit_return_type;20387 resolved_type = ira->explicit_return_type;
...@@ -19382,27 +20389,27 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh...@@ -19382,27 +20389,27 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
19382 resolved_type = ir_resolve_type(ira, peer_parent->parent->source_instruction->child);20389 resolved_type = ir_resolve_type(ira, peer_parent->parent->source_instruction->child);
19383 } else if (peer_parent->parent->resolved_loc) {20390 } else if (peer_parent->parent->resolved_loc) {
19384 ZigType *resolved_loc_ptr_type = peer_parent->parent->resolved_loc->value->type;20391 ZigType *resolved_loc_ptr_type = peer_parent->parent->resolved_loc->value->type;
19385 ir_assert(resolved_loc_ptr_type->id == ZigTypeIdPointer, &phi_instruction->base);20392 ir_assert(resolved_loc_ptr_type->id == ZigTypeIdPointer, &phi_instruction->base.base);
19386 resolved_type = resolved_loc_ptr_type->data.pointer.child_type;20393 resolved_type = resolved_loc_ptr_type->data.pointer.child_type;
19387 }20394 }
1938820395
19389 if (resolved_type != nullptr && type_is_invalid(resolved_type))20396 if (resolved_type != nullptr && type_is_invalid(resolved_type))
19390 return ira->codegen->invalid_instruction;20397 return ira->codegen->invalid_inst_gen;
19391 }20398 }
19392 }20399 }
1939320400
19394 if (resolved_type == nullptr) {20401 if (resolved_type == nullptr) {
19395 resolved_type = ir_resolve_peer_types(ira, phi_instruction->base.source_node, nullptr,20402 resolved_type = ir_resolve_peer_types(ira, phi_instruction->base.base.source_node, nullptr,
19396 new_incoming_values.items, new_incoming_values.length);20403 new_incoming_values.items, new_incoming_values.length);
19397 if (type_is_invalid(resolved_type))20404 if (type_is_invalid(resolved_type))
19398 return ira->codegen->invalid_instruction;20405 return ira->codegen->invalid_inst_gen;
19399 }20406 }
1940020407
19401 switch (type_has_one_possible_value(ira->codegen, resolved_type)) {20408 switch (type_has_one_possible_value(ira->codegen, resolved_type)) {
19402 case OnePossibleValueInvalid:20409 case OnePossibleValueInvalid:
19403 return ira->codegen->invalid_instruction;20410 return ira->codegen->invalid_inst_gen;
19404 case OnePossibleValueYes:20411 case OnePossibleValueYes:
19405 return ir_const_move(ira, &phi_instruction->base,20412 return ir_const_move(ira, &phi_instruction->base.base,
19406 get_the_one_possible_value(ira->codegen, resolved_type));20413 get_the_one_possible_value(ira->codegen, resolved_type));
19407 case OnePossibleValueNo:20414 case OnePossibleValueNo:
19408 break;20415 break;
...@@ -19410,11 +20417,11 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh...@@ -19410,11 +20417,11 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1941020417
19411 switch (type_requires_comptime(ira->codegen, resolved_type)) {20418 switch (type_requires_comptime(ira->codegen, resolved_type)) {
19412 case ReqCompTimeInvalid:20419 case ReqCompTimeInvalid:
19413 return ira->codegen->invalid_instruction;20420 return ira->codegen->invalid_inst_gen;
19414 case ReqCompTimeYes:20421 case ReqCompTimeYes:
19415 ir_add_error_node(ira, phi_instruction->base.source_node,20422 ir_add_error(ira, &phi_instruction->base.base,
19416 buf_sprintf("values of type '%s' must be comptime known", buf_ptr(&resolved_type->name)));20423 buf_sprintf("values of type '%s' must be comptime known", buf_ptr(&resolved_type->name)));
19417 return ira->codegen->invalid_instruction;20424 return ira->codegen->invalid_inst_gen;
19418 case ReqCompTimeNo:20425 case ReqCompTimeNo:
19419 break;20426 break;
19420 }20427 }
...@@ -19424,16 +20431,16 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh...@@ -19424,16 +20431,16 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
19424 // cast all values to the resolved type. however we can't put cast instructions in front of the phi instruction.20431 // cast all values to the resolved type. however we can't put cast instructions in front of the phi instruction.
19425 // so we go back and insert the casts as the last instruction in the corresponding predecessor blocks, and20432 // so we go back and insert the casts as the last instruction in the corresponding predecessor blocks, and
19426 // then make sure the branch instruction is preserved.20433 // then make sure the branch instruction is preserved.
19427 IrBasicBlock *cur_bb = ira->new_irb.current_basic_block;20434 IrBasicBlockGen *cur_bb = ira->new_irb.current_basic_block;
19428 for (size_t i = 0; i < new_incoming_values.length; i += 1) {20435 for (size_t i = 0; i < new_incoming_values.length; i += 1) {
19429 IrInstruction *new_value = new_incoming_values.at(i);20436 IrInstGen *new_value = new_incoming_values.at(i);
19430 IrBasicBlock *predecessor = new_incoming_blocks.at(i);20437 IrBasicBlockGen *predecessor = new_incoming_blocks.at(i);
19431 ir_assert(predecessor->instruction_list.length != 0, &phi_instruction->base);20438 ir_assert(predecessor->instruction_list.length != 0, &phi_instruction->base.base);
19432 IrInstruction *branch_instruction = predecessor->instruction_list.pop();20439 IrInstGen *branch_instruction = predecessor->instruction_list.pop();
19433 ir_set_cursor_at_end(&ira->new_irb, predecessor);20440 ir_set_cursor_at_end_gen(&ira->new_irb, predecessor);
19434 IrInstruction *casted_value = ir_implicit_cast(ira, new_value, resolved_type);20441 IrInstGen *casted_value = ir_implicit_cast(ira, new_value, resolved_type);
19435 if (type_is_invalid(casted_value->value->type)) {20442 if (type_is_invalid(casted_value->value->type)) {
19436 return ira->codegen->invalid_instruction;20443 return ira->codegen->invalid_inst_gen;
19437 }20444 }
19438 new_incoming_values.items[i] = casted_value;20445 new_incoming_values.items[i] = casted_value;
19439 predecessor->instruction_list.append(branch_instruction);20446 predecessor->instruction_list.append(branch_instruction);
...@@ -19444,12 +20451,10 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh...@@ -19444,12 +20451,10 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
19444 all_stack_ptrs = false;20451 all_stack_ptrs = false;
19445 }20452 }
19446 }20453 }
19447 ir_set_cursor_at_end(&ira->new_irb, cur_bb);20454 ir_set_cursor_at_end_gen(&ira->new_irb, cur_bb);
1944820455
19449 IrInstruction *result = ir_build_phi(&ira->new_irb,20456 IrInstGen *result = ir_build_phi_gen(ira, &phi_instruction->base.base,
19450 phi_instruction->base.scope, phi_instruction->base.source_node,20457 new_incoming_blocks.length, new_incoming_blocks.items, new_incoming_values.items, resolved_type);
19451 new_incoming_blocks.length, new_incoming_blocks.items, new_incoming_values.items, nullptr);
19452 result->value->type = resolved_type;
1945320458
19454 if (all_stack_ptrs) {20459 if (all_stack_ptrs) {
19455 assert(result->value->special == ConstValSpecialRuntime);20460 assert(result->value->special == ConstValSpecialRuntime);
...@@ -19459,17 +20464,17 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh...@@ -19459,17 +20464,17 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
19459 return result;20464 return result;
19460}20465}
1946120466
19462static IrInstruction *ir_analyze_instruction_var_ptr(IrAnalyze *ira, IrInstructionVarPtr *instruction) {20467static IrInstGen *ir_analyze_instruction_var_ptr(IrAnalyze *ira, IrInstSrcVarPtr *instruction) {
19463 ZigVar *var = instruction->var;20468 ZigVar *var = instruction->var;
19464 IrInstruction *result = ir_get_var_ptr(ira, &instruction->base, var);20469 IrInstGen *result = ir_get_var_ptr(ira, &instruction->base.base, var);
19465 if (instruction->crossed_fndef_scope != nullptr && !instr_is_comptime(result)) {20470 if (instruction->crossed_fndef_scope != nullptr && !instr_is_comptime(result)) {
19466 ErrorMsg *msg = ir_add_error(ira, &instruction->base,20471 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
19467 buf_sprintf("'%s' not accessible from inner function", var->name));20472 buf_sprintf("'%s' not accessible from inner function", var->name));
19468 add_error_note(ira->codegen, msg, instruction->crossed_fndef_scope->base.source_node,20473 add_error_note(ira->codegen, msg, instruction->crossed_fndef_scope->base.source_node,
19469 buf_sprintf("crossed function definition here"));20474 buf_sprintf("crossed function definition here"));
19470 add_error_note(ira->codegen, msg, var->decl_node,20475 add_error_note(ira->codegen, msg, var->decl_node,
19471 buf_sprintf("declared here"));20476 buf_sprintf("declared here"));
19472 return ira->codegen->invalid_instruction;20477 return ira->codegen->invalid_inst_gen;
19473 }20478 }
19474 return result;20479 return result;
19475}20480}
...@@ -19520,17 +20525,17 @@ static ZigType *adjust_ptr_len(CodeGen *g, ZigType *ptr_type, PtrLen ptr_len) {...@@ -19520,17 +20525,17 @@ static ZigType *adjust_ptr_len(CodeGen *g, ZigType *ptr_type, PtrLen ptr_len) {
19520 ptr_type->data.pointer.allow_zero);20525 ptr_type->data.pointer.allow_zero);
19521}20526}
1952220527
19523static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstructionElemPtr *elem_ptr_instruction) {20528static IrInstGen *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstSrcElemPtr *elem_ptr_instruction) {
19524 Error err;20529 Error err;
19525 IrInstruction *array_ptr = elem_ptr_instruction->array_ptr->child;20530 IrInstGen *array_ptr = elem_ptr_instruction->array_ptr->child;
19526 if (type_is_invalid(array_ptr->value->type))20531 if (type_is_invalid(array_ptr->value->type))
19527 return ira->codegen->invalid_instruction;20532 return ira->codegen->invalid_inst_gen;
1952820533
19529 ZigValue *orig_array_ptr_val = array_ptr->value;20534 ZigValue *orig_array_ptr_val = array_ptr->value;
1953020535
19531 IrInstruction *elem_index = elem_ptr_instruction->elem_index->child;20536 IrInstGen *elem_index = elem_ptr_instruction->elem_index->child;
19532 if (type_is_invalid(elem_index->value->type))20537 if (type_is_invalid(elem_index->value->type))
19533 return ira->codegen->invalid_instruction;20538 return ira->codegen->invalid_inst_gen;
1953420539
19535 ZigType *ptr_type = orig_array_ptr_val->type;20540 ZigType *ptr_type = orig_array_ptr_val->type;
19536 assert(ptr_type->id == ZigTypeIdPointer);20541 assert(ptr_type->id == ZigTypeIdPointer);
...@@ -19542,7 +20547,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19542,7 +20547,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19542 ZigType *return_type;20547 ZigType *return_type;
1954320548
19544 if (type_is_invalid(array_type)) {20549 if (type_is_invalid(array_type)) {
19545 return ira->codegen->invalid_instruction;20550 return ira->codegen->invalid_inst_gen;
19546 } else if (array_type->id == ZigTypeIdArray ||20551 } else if (array_type->id == ZigTypeIdArray ||
19547 (array_type->id == ZigTypeIdPointer &&20552 (array_type->id == ZigTypeIdPointer &&
19548 array_type->data.pointer.ptr_len == PtrLenSingle &&20553 array_type->data.pointer.ptr_len == PtrLenSingle &&
...@@ -19553,15 +20558,15 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19553,15 +20558,15 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19553 ptr_type = ptr_type->data.pointer.child_type;20558 ptr_type = ptr_type->data.pointer.child_type;
19554 if (orig_array_ptr_val->special != ConstValSpecialRuntime) {20559 if (orig_array_ptr_val->special != ConstValSpecialRuntime) {
19555 orig_array_ptr_val = const_ptr_pointee(ira, ira->codegen, orig_array_ptr_val,20560 orig_array_ptr_val = const_ptr_pointee(ira, ira->codegen, orig_array_ptr_val,
19556 elem_ptr_instruction->base.source_node);20561 elem_ptr_instruction->base.base.source_node);
19557 if (orig_array_ptr_val == nullptr)20562 if (orig_array_ptr_val == nullptr)
19558 return ira->codegen->invalid_instruction;20563 return ira->codegen->invalid_inst_gen;
19559 }20564 }
19560 }20565 }
19561 if (array_type->data.array.len == 0) {20566 if (array_type->data.array.len == 0) {
19562 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,20567 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
19563 buf_sprintf("index 0 outside array of size 0"));20568 buf_sprintf("index 0 outside array of size 0"));
19564 return ira->codegen->invalid_instruction;20569 return ira->codegen->invalid_inst_gen;
19565 }20570 }
19566 ZigType *child_type = array_type->data.array.child_type;20571 ZigType *child_type = array_type->data.array.child_type;
19567 if (ptr_type->data.pointer.host_int_bytes == 0) {20572 if (ptr_type->data.pointer.host_int_bytes == 0) {
...@@ -19572,7 +20577,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19572,7 +20577,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19572 } else {20577 } else {
19573 uint64_t elem_val_scalar;20578 uint64_t elem_val_scalar;
19574 if (!ir_resolve_usize(ira, elem_index, &elem_val_scalar))20579 if (!ir_resolve_usize(ira, elem_index, &elem_val_scalar))
19575 return ira->codegen->invalid_instruction;20580 return ira->codegen->invalid_inst_gen;
1957620581
19577 size_t bit_width = type_size_bits(ira->codegen, child_type);20582 size_t bit_width = type_size_bits(ira->codegen, child_type);
19578 size_t bit_offset = bit_width * elem_val_scalar;20583 size_t bit_offset = bit_width * elem_val_scalar;
...@@ -19584,9 +20589,9 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19584,9 +20589,9 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19584 }20589 }
19585 } else if (array_type->id == ZigTypeIdPointer) {20590 } else if (array_type->id == ZigTypeIdPointer) {
19586 if (array_type->data.pointer.ptr_len == PtrLenSingle) {20591 if (array_type->data.pointer.ptr_len == PtrLenSingle) {
19587 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,20592 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
19588 buf_sprintf("index of single-item pointer"));20593 buf_sprintf("index of single-item pointer"));
19589 return ira->codegen->invalid_instruction;20594 return ira->codegen->invalid_inst_gen;
19590 }20595 }
19591 return_type = adjust_ptr_len(ira->codegen, array_type, elem_ptr_instruction->ptr_len);20596 return_type = adjust_ptr_len(ira->codegen, array_type, elem_ptr_instruction->ptr_len);
19592 } else if (is_slice(array_type)) {20597 } else if (is_slice(array_type)) {
...@@ -19600,38 +20605,38 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19600,38 +20605,38 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19600 array_type->data.structure.resolve_status == ResolveStatusBeingInferred)20605 array_type->data.structure.resolve_status == ResolveStatusBeingInferred)
19601 {20606 {
19602 ZigType *usize = ira->codegen->builtin_types.entry_usize;20607 ZigType *usize = ira->codegen->builtin_types.entry_usize;
19603 IrInstruction *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);20608 IrInstGen *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);
19604 if (type_is_invalid(casted_elem_index->value->type))20609 if (type_is_invalid(casted_elem_index->value->type))
19605 return ira->codegen->invalid_instruction;20610 return ira->codegen->invalid_inst_gen;
19606 ir_assert(instr_is_comptime(casted_elem_index), &elem_ptr_instruction->base);20611 ir_assert(instr_is_comptime(casted_elem_index), &elem_ptr_instruction->base.base);
19607 Buf *field_name = buf_alloc();20612 Buf *field_name = buf_alloc();
19608 bigint_append_buf(field_name, &casted_elem_index->value->data.x_bigint, 10);20613 bigint_append_buf(field_name, &casted_elem_index->value->data.x_bigint, 10);
19609 return ir_analyze_inferred_field_ptr(ira, field_name, &elem_ptr_instruction->base,20614 return ir_analyze_inferred_field_ptr(ira, field_name, &elem_ptr_instruction->base.base,
19610 array_ptr, array_type);20615 array_ptr, array_type);
19611 } else if (is_tuple(array_type)) {20616 } else if (is_tuple(array_type)) {
19612 uint64_t elem_index_scalar;20617 uint64_t elem_index_scalar;
19613 if (!ir_resolve_usize(ira, elem_index, &elem_index_scalar))20618 if (!ir_resolve_usize(ira, elem_index, &elem_index_scalar))
19614 return ira->codegen->invalid_instruction;20619 return ira->codegen->invalid_inst_gen;
19615 if (elem_index_scalar >= array_type->data.structure.src_field_count) {20620 if (elem_index_scalar >= array_type->data.structure.src_field_count) {
19616 ir_add_error(ira, &elem_ptr_instruction->base, buf_sprintf(20621 ir_add_error(ira, &elem_ptr_instruction->base.base, buf_sprintf(
19617 "field index %" ZIG_PRI_u64 " outside tuple '%s' which has %" PRIu32 " fields",20622 "field index %" ZIG_PRI_u64 " outside tuple '%s' which has %" PRIu32 " fields",
19618 elem_index_scalar, buf_ptr(&array_type->name),20623 elem_index_scalar, buf_ptr(&array_type->name),
19619 array_type->data.structure.src_field_count));20624 array_type->data.structure.src_field_count));
19620 return ira->codegen->invalid_instruction;20625 return ira->codegen->invalid_inst_gen;
19621 }20626 }
19622 TypeStructField *field = array_type->data.structure.fields[elem_index_scalar];20627 TypeStructField *field = array_type->data.structure.fields[elem_index_scalar];
19623 return ir_analyze_struct_field_ptr(ira, &elem_ptr_instruction->base, field, array_ptr,20628 return ir_analyze_struct_field_ptr(ira, &elem_ptr_instruction->base.base, field, array_ptr,
19624 array_type, false);20629 array_type, false);
19625 } else {20630 } else {
19626 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,20631 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
19627 buf_sprintf("array access of non-array type '%s'", buf_ptr(&array_type->name)));20632 buf_sprintf("array access of non-array type '%s'", buf_ptr(&array_type->name)));
19628 return ira->codegen->invalid_instruction;20633 return ira->codegen->invalid_inst_gen;
19629 }20634 }
1963020635
19631 ZigType *usize = ira->codegen->builtin_types.entry_usize;20636 ZigType *usize = ira->codegen->builtin_types.entry_usize;
19632 IrInstruction *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);20637 IrInstGen *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);
19633 if (casted_elem_index == ira->codegen->invalid_instruction)20638 if (type_is_invalid(casted_elem_index->value->type))
19634 return ira->codegen->invalid_instruction;20639 return ira->codegen->invalid_inst_gen;
1963520640
19636 bool safety_check_on = elem_ptr_instruction->safety_check_on;20641 bool safety_check_on = elem_ptr_instruction->safety_check_on;
19637 if (instr_is_comptime(casted_elem_index)) {20642 if (instr_is_comptime(casted_elem_index)) {
...@@ -19640,15 +20645,15 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19640,15 +20645,15 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19640 uint64_t array_len = array_type->data.array.len;20645 uint64_t array_len = array_type->data.array.len;
19641 if (index == array_len && array_type->data.array.sentinel != nullptr) {20646 if (index == array_len && array_type->data.array.sentinel != nullptr) {
19642 ZigType *elem_type = array_type->data.array.child_type;20647 ZigType *elem_type = array_type->data.array.child_type;
19643 IrInstruction *sentinel_elem = ir_const(ira, &elem_ptr_instruction->base, elem_type);20648 IrInstGen *sentinel_elem = ir_const(ira, &elem_ptr_instruction->base.base, elem_type);
19644 copy_const_val(sentinel_elem->value, array_type->data.array.sentinel);20649 copy_const_val(sentinel_elem->value, array_type->data.array.sentinel);
19645 return ir_get_ref(ira, &elem_ptr_instruction->base, sentinel_elem, true, false);20650 return ir_get_ref(ira, &elem_ptr_instruction->base.base, sentinel_elem, true, false);
19646 }20651 }
19647 if (index >= array_len) {20652 if (index >= array_len) {
19648 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,20653 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
19649 buf_sprintf("index %" ZIG_PRI_u64 " outside array of size %" ZIG_PRI_u64,20654 buf_sprintf("index %" ZIG_PRI_u64 " outside array of size %" ZIG_PRI_u64,
19650 index, array_len));20655 index, array_len));
19651 return ira->codegen->invalid_instruction;20656 return ira->codegen->invalid_inst_gen;
19652 }20657 }
19653 safety_check_on = false;20658 safety_check_on = false;
19654 }20659 }
...@@ -19664,7 +20669,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19664,7 +20669,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19664 // figure out the largest alignment possible20669 // figure out the largest alignment possible
1966520670
19666 if ((err = type_resolve(ira->codegen, return_type->data.pointer.child_type, ResolveStatusSizeKnown)))20671 if ((err = type_resolve(ira->codegen, return_type->data.pointer.child_type, ResolveStatusSizeKnown)))
19667 return ira->codegen->invalid_instruction;20672 return ira->codegen->invalid_inst_gen;
1966820673
19669 uint64_t elem_size = type_size(ira->codegen, return_type->data.pointer.child_type);20674 uint64_t elem_size = type_size(ira->codegen, return_type->data.pointer.child_type);
19670 uint64_t abi_align = get_abi_alignment(ira->codegen, return_type->data.pointer.child_type);20675 uint64_t abi_align = get_abi_alignment(ira->codegen, return_type->data.pointer.child_type);
...@@ -19696,9 +20701,9 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19696,9 +20701,9 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19696 (orig_array_ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar || array_type->id == ZigTypeIdArray))20701 (orig_array_ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar || array_type->id == ZigTypeIdArray))
19697 {20702 {
19698 ZigValue *array_ptr_val = const_ptr_pointee(ira, ira->codegen, orig_array_ptr_val,20703 ZigValue *array_ptr_val = const_ptr_pointee(ira, ira->codegen, orig_array_ptr_val,
19699 elem_ptr_instruction->base.source_node);20704 elem_ptr_instruction->base.base.source_node);
19700 if (array_ptr_val == nullptr)20705 if (array_ptr_val == nullptr)
19701 return ira->codegen->invalid_instruction;20706 return ira->codegen->invalid_inst_gen;
1970220707
19703 if (array_ptr_val->special == ConstValSpecialUndef &&20708 if (array_ptr_val->special == ConstValSpecialUndef &&
19704 elem_ptr_instruction->init_array_type_source_node != nullptr)20709 elem_ptr_instruction->init_array_type_source_node != nullptr)
...@@ -19716,16 +20721,16 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19716,16 +20721,16 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19716 elem_val->parent.data.p_array.elem_index = i;20721 elem_val->parent.data.p_array.elem_index = i;
19717 }20722 }
19718 } else if (is_slice(array_type)) {20723 } else if (is_slice(array_type)) {
19719 ir_assert(array_ptr->value->type->id == ZigTypeIdPointer, &elem_ptr_instruction->base);20724 ir_assert(array_ptr->value->type->id == ZigTypeIdPointer, &elem_ptr_instruction->base.base);
19720 ZigType *actual_array_type = array_ptr->value->type->data.pointer.child_type;20725 ZigType *actual_array_type = array_ptr->value->type->data.pointer.child_type;
1972120726
19722 if (type_is_invalid(actual_array_type))20727 if (type_is_invalid(actual_array_type))
19723 return ira->codegen->invalid_instruction;20728 return ira->codegen->invalid_inst_gen;
19724 if (actual_array_type->id != ZigTypeIdArray) {20729 if (actual_array_type->id != ZigTypeIdArray) {
19725 ir_add_error_node(ira, elem_ptr_instruction->init_array_type_source_node,20730 ir_add_error_node(ira, elem_ptr_instruction->init_array_type_source_node,
19726 buf_sprintf("array literal requires address-of operator to coerce to slice type '%s'",20731 buf_sprintf("array literal requires address-of operator to coerce to slice type '%s'",
19727 buf_ptr(&actual_array_type->name)));20732 buf_ptr(&actual_array_type->name)));
19728 return ira->codegen->invalid_instruction;20733 return ira->codegen->invalid_inst_gen;
19729 }20734 }
1973020735
19731 ZigValue *array_init_val = create_const_vals(1);20736 ZigValue *array_init_val = create_const_vals(1);
...@@ -19750,7 +20755,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19750,7 +20755,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19750 ir_add_error_node(ira, elem_ptr_instruction->init_array_type_source_node,20755 ir_add_error_node(ira, elem_ptr_instruction->init_array_type_source_node,
19751 buf_sprintf("expected array type or [_], found '%s'",20756 buf_sprintf("expected array type or [_], found '%s'",
19752 buf_ptr(&array_type->name)));20757 buf_ptr(&array_type->name)));
19753 return ira->codegen->invalid_instruction;20758 return ira->codegen->invalid_inst_gen;
19754 }20759 }
19755 }20760 }
1975620761
...@@ -19759,12 +20764,12 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19759,12 +20764,12 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19759 array_ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr))20764 array_ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr))
19760 {20765 {
19761 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,20766 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,
19762 elem_ptr_instruction->base.source_node, array_ptr_val, UndefOk)))20767 elem_ptr_instruction->base.base.source_node, array_ptr_val, UndefOk)))
19763 {20768 {
19764 return ira->codegen->invalid_instruction;20769 return ira->codegen->invalid_inst_gen;
19765 }20770 }
19766 if (array_type->id == ZigTypeIdPointer) {20771 if (array_type->id == ZigTypeIdPointer) {
19767 IrInstruction *result = ir_const(ira, &elem_ptr_instruction->base, return_type);20772 IrInstGen *result = ir_const(ira, &elem_ptr_instruction->base.base, return_type);
19768 ZigValue *out_val = result->value;20773 ZigValue *out_val = result->value;
19769 out_val->data.x_ptr.mut = array_ptr_val->data.x_ptr.mut;20774 out_val->data.x_ptr.mut = array_ptr_val->data.x_ptr.mut;
19770 size_t new_index;20775 size_t new_index;
...@@ -19833,33 +20838,31 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19833,33 +20838,31 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19833 zig_panic("TODO elem ptr on a null pointer");20838 zig_panic("TODO elem ptr on a null pointer");
19834 }20839 }
19835 if (new_index >= mem_size) {20840 if (new_index >= mem_size) {
19836 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,20841 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
19837 buf_sprintf("index %" ZIG_PRI_u64 " outside pointer of size %" ZIG_PRI_usize "", index, old_size));20842 buf_sprintf("index %" ZIG_PRI_u64 " outside pointer of size %" ZIG_PRI_usize "", index, old_size));
19838 return ira->codegen->invalid_instruction;20843 return ira->codegen->invalid_inst_gen;
19839 }20844 }
19840 return result;20845 return result;
19841 } else if (is_slice(array_type)) {20846 } else if (is_slice(array_type)) {
19842 ZigValue *ptr_field = array_ptr_val->data.x_struct.fields[slice_ptr_index];20847 ZigValue *ptr_field = array_ptr_val->data.x_struct.fields[slice_ptr_index];
19843 ir_assert(ptr_field != nullptr, &elem_ptr_instruction->base);20848 ir_assert(ptr_field != nullptr, &elem_ptr_instruction->base.base);
19844 if (ptr_field->data.x_ptr.special == ConstPtrSpecialHardCodedAddr) {20849 if (ptr_field->data.x_ptr.special == ConstPtrSpecialHardCodedAddr) {
19845 IrInstruction *result = ir_build_elem_ptr(&ira->new_irb, elem_ptr_instruction->base.scope,20850 return ir_build_elem_ptr_gen(ira, elem_ptr_instruction->base.base.scope,
19846 elem_ptr_instruction->base.source_node, array_ptr, casted_elem_index, false,20851 elem_ptr_instruction->base.base.source_node, array_ptr, casted_elem_index, false,
19847 elem_ptr_instruction->ptr_len, nullptr);20852 return_type);
19848 result->value->type = return_type;
19849 return result;
19850 }20853 }
19851 ZigValue *len_field = array_ptr_val->data.x_struct.fields[slice_len_index];20854 ZigValue *len_field = array_ptr_val->data.x_struct.fields[slice_len_index];
19852 IrInstruction *result = ir_const(ira, &elem_ptr_instruction->base, return_type);20855 IrInstGen *result = ir_const(ira, &elem_ptr_instruction->base.base, return_type);
19853 ZigValue *out_val = result->value;20856 ZigValue *out_val = result->value;
19854 ZigType *slice_ptr_type = array_type->data.structure.fields[slice_ptr_index]->type_entry;20857 ZigType *slice_ptr_type = array_type->data.structure.fields[slice_ptr_index]->type_entry;
19855 uint64_t slice_len = bigint_as_u64(&len_field->data.x_bigint);20858 uint64_t slice_len = bigint_as_u64(&len_field->data.x_bigint);
19856 uint64_t full_slice_len = slice_len +20859 uint64_t full_slice_len = slice_len +
19857 ((slice_ptr_type->data.pointer.sentinel != nullptr) ? 1 : 0);20860 ((slice_ptr_type->data.pointer.sentinel != nullptr) ? 1 : 0);
19858 if (index >= full_slice_len) {20861 if (index >= full_slice_len) {
19859 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,20862 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
19860 buf_sprintf("index %" ZIG_PRI_u64 " outside slice of size %" ZIG_PRI_u64,20863 buf_sprintf("index %" ZIG_PRI_u64 " outside slice of size %" ZIG_PRI_u64,
19861 index, slice_len));20864 index, slice_len));
19862 return ira->codegen->invalid_instruction;20865 return ira->codegen->invalid_inst_gen;
19863 }20866 }
19864 out_val->data.x_ptr.mut = ptr_field->data.x_ptr.mut;20867 out_val->data.x_ptr.mut = ptr_field->data.x_ptr.mut;
19865 switch (ptr_field->data.x_ptr.special) {20868 switch (ptr_field->data.x_ptr.special) {
...@@ -19879,7 +20882,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19879,7 +20882,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19879 {20882 {
19880 ir_assert(new_index <20883 ir_assert(new_index <
19881 ptr_field->data.x_ptr.data.base_array.array_val->type->data.array.len,20884 ptr_field->data.x_ptr.data.base_array.array_val->type->data.array.len,
19882 &elem_ptr_instruction->base);20885 &elem_ptr_instruction->base.base);
19883 }20886 }
19884 out_val->data.x_ptr.special = ConstPtrSpecialBaseArray;20887 out_val->data.x_ptr.special = ConstPtrSpecialBaseArray;
19885 out_val->data.x_ptr.data.base_array.array_val =20888 out_val->data.x_ptr.data.base_array.array_val =
...@@ -19904,15 +20907,14 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19904,15 +20907,14 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19904 }20907 }
19905 return result;20908 return result;
19906 } else if (array_type->id == ZigTypeIdArray || array_type->id == ZigTypeIdVector) {20909 } else if (array_type->id == ZigTypeIdArray || array_type->id == ZigTypeIdVector) {
19907 IrInstruction *result;20910 IrInstGen *result;
19908 if (orig_array_ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {20911 if (orig_array_ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
19909 result = ir_build_elem_ptr(&ira->new_irb, elem_ptr_instruction->base.scope,20912 result = ir_build_elem_ptr_gen(ira, elem_ptr_instruction->base.base.scope,
19910 elem_ptr_instruction->base.source_node, array_ptr, casted_elem_index,20913 elem_ptr_instruction->base.base.source_node, array_ptr, casted_elem_index,
19911 false, elem_ptr_instruction->ptr_len, nullptr);20914 false, return_type);
19912 result->value->type = return_type;
19913 result->value->special = ConstValSpecialStatic;20915 result->value->special = ConstValSpecialStatic;
19914 } else {20916 } else {
19915 result = ir_const(ira, &elem_ptr_instruction->base, return_type);20917 result = ir_const(ira, &elem_ptr_instruction->base.base, return_type);
19916 }20918 }
19917 ZigValue *out_val = result->value;20919 ZigValue *out_val = result->value;
19918 out_val->data.x_ptr.special = ConstPtrSpecialBaseArray;20920 out_val->data.x_ptr.special = ConstPtrSpecialBaseArray;
...@@ -19938,19 +20940,19 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19938,19 +20940,19 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19938 // runtime known element index20940 // runtime known element index
19939 switch (type_requires_comptime(ira->codegen, return_type)) {20941 switch (type_requires_comptime(ira->codegen, return_type)) {
19940 case ReqCompTimeYes:20942 case ReqCompTimeYes:
19941 ir_add_error(ira, elem_index,20943 ir_add_error(ira, &elem_index->base,
19942 buf_sprintf("values of type '%s' must be comptime known, but index value is runtime known",20944 buf_sprintf("values of type '%s' must be comptime known, but index value is runtime known",
19943 buf_ptr(&return_type->data.pointer.child_type->name)));20945 buf_ptr(&return_type->data.pointer.child_type->name)));
19944 return ira->codegen->invalid_instruction;20946 return ira->codegen->invalid_inst_gen;
19945 case ReqCompTimeInvalid:20947 case ReqCompTimeInvalid:
19946 return ira->codegen->invalid_instruction;20948 return ira->codegen->invalid_inst_gen;
19947 case ReqCompTimeNo:20949 case ReqCompTimeNo:
19948 break;20950 break;
19949 }20951 }
1995020952
19951 if (return_type->data.pointer.explicit_alignment != 0) {20953 if (return_type->data.pointer.explicit_alignment != 0) {
19952 if ((err = type_resolve(ira->codegen, return_type->data.pointer.child_type, ResolveStatusSizeKnown)))20954 if ((err = type_resolve(ira->codegen, return_type->data.pointer.child_type, ResolveStatusSizeKnown)))
19953 return ira->codegen->invalid_instruction;20955 return ira->codegen->invalid_inst_gen;
1995420956
19955 uint64_t elem_size = type_size(ira->codegen, return_type->data.pointer.child_type);20957 uint64_t elem_size = type_size(ira->codegen, return_type->data.pointer.child_type);
19956 uint64_t abi_align = get_abi_alignment(ira->codegen, return_type->data.pointer.child_type);20958 uint64_t abi_align = get_abi_alignment(ira->codegen, return_type->data.pointer.child_type);
...@@ -19968,16 +20970,13 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct...@@ -19968,16 +20970,13 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
19968 }20970 }
19969 }20971 }
1997020972
19971 IrInstruction *result = ir_build_elem_ptr(&ira->new_irb, elem_ptr_instruction->base.scope,20973 return ir_build_elem_ptr_gen(ira, elem_ptr_instruction->base.base.scope,
19972 elem_ptr_instruction->base.source_node, array_ptr, casted_elem_index, safety_check_on,20974 elem_ptr_instruction->base.base.source_node, array_ptr, casted_elem_index, safety_check_on, return_type);
19973 elem_ptr_instruction->ptr_len, nullptr);
19974 result->value->type = return_type;
19975 return result;
19976}20975}
1997720976
19978static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,20977static IrInstGen *ir_analyze_container_member_access_inner(IrAnalyze *ira,
19979 ZigType *bare_struct_type, Buf *field_name, IrInstruction *source_instr,20978 ZigType *bare_struct_type, Buf *field_name, IrInst* source_instr,
19980 IrInstruction *container_ptr, ZigType *container_type)20979 IrInstGen *container_ptr, ZigType *container_type)
19981{20980{
19982 if (!is_slice(bare_struct_type)) {20981 if (!is_slice(bare_struct_type)) {
19983 ScopeDecls *container_scope = get_container_scope(bare_struct_type);20982 ScopeDecls *container_scope = get_container_scope(bare_struct_type);
...@@ -19987,29 +20986,37 @@ static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,...@@ -19987,29 +20986,37 @@ static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,
19987 if (tld->id == TldIdFn) {20986 if (tld->id == TldIdFn) {
19988 resolve_top_level_decl(ira->codegen, tld, source_instr->source_node, false);20987 resolve_top_level_decl(ira->codegen, tld, source_instr->source_node, false);
19989 if (tld->resolution == TldResolutionInvalid)20988 if (tld->resolution == TldResolutionInvalid)
19990 return ira->codegen->invalid_instruction;20989 return ira->codegen->invalid_inst_gen;
20990 if (tld->resolution == TldResolutionResolving)
20991 return ir_error_dependency_loop(ira, source_instr);
20992
19991 TldFn *tld_fn = (TldFn *)tld;20993 TldFn *tld_fn = (TldFn *)tld;
19992 ZigFn *fn_entry = tld_fn->fn_entry;20994 ZigFn *fn_entry = tld_fn->fn_entry;
20995 assert(fn_entry != nullptr);
20996
19993 if (type_is_invalid(fn_entry->type_entry))20997 if (type_is_invalid(fn_entry->type_entry))
19994 return ira->codegen->invalid_instruction;20998 return ira->codegen->invalid_inst_gen;
1999520999
19996 IrInstruction *bound_fn_value = ir_build_const_bound_fn(&ira->new_irb, source_instr->scope,21000 IrInstGen *bound_fn_value = ir_const_bound_fn(ira, source_instr, fn_entry, container_ptr);
19997 source_instr->source_node, fn_entry, container_ptr);
19998 return ir_get_ref(ira, source_instr, bound_fn_value, true, false);21001 return ir_get_ref(ira, source_instr, bound_fn_value, true, false);
19999 } else if (tld->id == TldIdVar) {21002 } else if (tld->id == TldIdVar) {
20000 resolve_top_level_decl(ira->codegen, tld, source_instr->source_node, false);21003 resolve_top_level_decl(ira->codegen, tld, source_instr->source_node, false);
20001 if (tld->resolution == TldResolutionInvalid)21004 if (tld->resolution == TldResolutionInvalid)
20002 return ira->codegen->invalid_instruction;21005 return ira->codegen->invalid_inst_gen;
21006 if (tld->resolution == TldResolutionResolving)
21007 return ir_error_dependency_loop(ira, source_instr);
21008
20003 TldVar *tld_var = (TldVar *)tld;21009 TldVar *tld_var = (TldVar *)tld;
20004 ZigVar *var = tld_var->var;21010 ZigVar *var = tld_var->var;
21011 assert(var != nullptr);
21012
20005 if (type_is_invalid(var->var_type))21013 if (type_is_invalid(var->var_type))
20006 return ira->codegen->invalid_instruction;21014 return ira->codegen->invalid_inst_gen;
2000721015
20008 if (var->const_value->type->id == ZigTypeIdFn) {21016 if (var->const_value->type->id == ZigTypeIdFn) {
20009 ir_assert(var->const_value->data.x_ptr.special == ConstPtrSpecialFunction, source_instr);21017 ir_assert(var->const_value->data.x_ptr.special == ConstPtrSpecialFunction, source_instr);
20010 ZigFn *fn = var->const_value->data.x_ptr.data.fn.fn_entry;21018 ZigFn *fn = var->const_value->data.x_ptr.data.fn.fn_entry;
20011 IrInstruction *bound_fn_value = ir_build_const_bound_fn(&ira->new_irb, source_instr->scope,21019 IrInstGen *bound_fn_value = ir_const_bound_fn(ira, source_instr, fn, container_ptr);
20012 source_instr->source_node, fn, container_ptr);
20013 return ir_get_ref(ira, source_instr, bound_fn_value, true, false);21020 return ir_get_ref(ira, source_instr, bound_fn_value, true, false);
20014 }21021 }
20015 }21022 }
...@@ -20029,7 +21036,7 @@ static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,...@@ -20029,7 +21036,7 @@ static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,
20029 }21036 }
20030 ir_add_error_node(ira, source_instr->source_node,21037 ir_add_error_node(ira, source_instr->source_node,
20031 buf_sprintf("no member named '%s' in %s'%s'", buf_ptr(field_name), prefix_name, buf_ptr(&bare_struct_type->name)));21038 buf_sprintf("no member named '%s' in %s'%s'", buf_ptr(field_name), prefix_name, buf_ptr(&bare_struct_type->name)));
20032 return ira->codegen->invalid_instruction;21039 return ira->codegen->invalid_inst_gen;
20033}21040}
2003421041
20035static void memoize_field_init_val(CodeGen *codegen, ZigType *container_type, TypeStructField *field) {21042static void memoize_field_init_val(CodeGen *codegen, ZigType *container_type, TypeStructField *field) {
...@@ -20044,24 +21051,24 @@ static void memoize_field_init_val(CodeGen *codegen, ZigType *container_type, Ty...@@ -20044,24 +21051,24 @@ static void memoize_field_init_val(CodeGen *codegen, ZigType *container_type, Ty
20044 field->type_entry, nullptr, UndefOk);21051 field->type_entry, nullptr, UndefOk);
20045}21052}
2004621053
20047static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction *source_instr,21054static IrInstGen *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInst* source_instr,
20048 TypeStructField *field, IrInstruction *struct_ptr, ZigType *struct_type, bool initializing)21055 TypeStructField *field, IrInstGen *struct_ptr, ZigType *struct_type, bool initializing)
20049{21056{
20050 Error err;21057 Error err;
20051 ZigType *field_type = resolve_struct_field_type(ira->codegen, field);21058 ZigType *field_type = resolve_struct_field_type(ira->codegen, field);
20052 if (field_type == nullptr)21059 if (field_type == nullptr)
20053 return ira->codegen->invalid_instruction;21060 return ira->codegen->invalid_inst_gen;
20054 if (field->is_comptime) {21061 if (field->is_comptime) {
20055 IrInstruction *elem = ir_const(ira, source_instr, field_type);21062 IrInstGen *elem = ir_const(ira, source_instr, field_type);
20056 memoize_field_init_val(ira->codegen, struct_type, field);21063 memoize_field_init_val(ira->codegen, struct_type, field);
20057 copy_const_val(elem->value, field->init_val);21064 copy_const_val(elem->value, field->init_val);
20058 return ir_get_ref(ira, source_instr, elem, true, false);21065 return ir_get_ref(ira, source_instr, elem, true, false);
20059 }21066 }
20060 switch (type_has_one_possible_value(ira->codegen, field_type)) {21067 switch (type_has_one_possible_value(ira->codegen, field_type)) {
20061 case OnePossibleValueInvalid:21068 case OnePossibleValueInvalid:
20062 return ira->codegen->invalid_instruction;21069 return ira->codegen->invalid_inst_gen;
20063 case OnePossibleValueYes: {21070 case OnePossibleValueYes: {
20064 IrInstruction *elem = ir_const_move(ira, source_instr,21071 IrInstGen *elem = ir_const_move(ira, source_instr,
20065 get_the_one_possible_value(ira->codegen, field_type));21072 get_the_one_possible_value(ira->codegen, field_type));
20066 return ir_get_ref(ira, source_instr, elem, false, false);21073 return ir_get_ref(ira, source_instr, elem, false, false);
20067 }21074 }
...@@ -20079,7 +21086,7 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction...@@ -20079,7 +21086,7 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
20079 (struct_type->data.structure.layout == ContainerLayoutAuto) ?21086 (struct_type->data.structure.layout == ContainerLayoutAuto) ?
20080 ResolveStatusZeroBitsKnown : ResolveStatusSizeKnown;21087 ResolveStatusZeroBitsKnown : ResolveStatusSizeKnown;
20081 if ((err = type_resolve(ira->codegen, struct_type, needed_resolve_status)))21088 if ((err = type_resolve(ira->codegen, struct_type, needed_resolve_status)))
20082 return ira->codegen->invalid_instruction;21089 return ira->codegen->invalid_inst_gen;
20083 assert(struct_ptr->value->type->id == ZigTypeIdPointer);21090 assert(struct_ptr->value->type->id == ZigTypeIdPointer);
20084 uint32_t ptr_bit_offset = struct_ptr->value->type->data.pointer.bit_offset_in_host;21091 uint32_t ptr_bit_offset = struct_ptr->value->type->data.pointer.bit_offset_in_host;
20085 uint32_t ptr_host_int_bytes = struct_ptr->value->type->data.pointer.host_int_bytes;21092 uint32_t ptr_host_int_bytes = struct_ptr->value->type->data.pointer.host_int_bytes;
...@@ -20093,14 +21100,14 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction...@@ -20093,14 +21100,14 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
20093 if (instr_is_comptime(struct_ptr)) {21100 if (instr_is_comptime(struct_ptr)) {
20094 ZigValue *ptr_val = ir_resolve_const(ira, struct_ptr, UndefBad);21101 ZigValue *ptr_val = ir_resolve_const(ira, struct_ptr, UndefBad);
20095 if (!ptr_val)21102 if (!ptr_val)
20096 return ira->codegen->invalid_instruction;21103 return ira->codegen->invalid_inst_gen;
2009721104
20098 if (ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {21105 if (ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
20099 ZigValue *struct_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);21106 ZigValue *struct_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
20100 if (struct_val == nullptr)21107 if (struct_val == nullptr)
20101 return ira->codegen->invalid_instruction;21108 return ira->codegen->invalid_inst_gen;
20102 if (type_is_invalid(struct_val->type))21109 if (type_is_invalid(struct_val->type))
20103 return ira->codegen->invalid_instruction;21110 return ira->codegen->invalid_inst_gen;
20104 if (initializing && struct_val->special == ConstValSpecialUndef) {21111 if (initializing && struct_val->special == ConstValSpecialUndef) {
20105 struct_val->data.x_struct.fields = alloc_const_vals_ptrs(struct_type->data.structure.src_field_count);21112 struct_val->data.x_struct.fields = alloc_const_vals_ptrs(struct_type->data.structure.src_field_count);
20106 struct_val->special = ConstValSpecialStatic;21113 struct_val->special = ConstValSpecialStatic;
...@@ -20114,11 +21121,9 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction...@@ -20114,11 +21121,9 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
20114 field_val->parent.data.p_struct.field_index = i;21121 field_val->parent.data.p_struct.field_index = i;
20115 }21122 }
20116 }21123 }
20117 IrInstruction *result;21124 IrInstGen *result;
20118 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {21125 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
20119 result = ir_build_struct_field_ptr(&ira->new_irb, source_instr->scope,21126 result = ir_build_struct_field_ptr(ira, source_instr, struct_ptr, field, ptr_type);
20120 source_instr->source_node, struct_ptr, field);
20121 result->value->type = ptr_type;
20122 result->value->special = ConstValSpecialStatic;21127 result->value->special = ConstValSpecialStatic;
20123 } else {21128 } else {
20124 result = ir_const(ira, source_instr, ptr_type);21129 result = ir_const(ira, source_instr, ptr_type);
...@@ -20131,14 +21136,11 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction...@@ -20131,14 +21136,11 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
20131 return result;21136 return result;
20132 }21137 }
20133 }21138 }
20134 IrInstruction *result = ir_build_struct_field_ptr(&ira->new_irb, source_instr->scope, source_instr->source_node,21139 return ir_build_struct_field_ptr(ira, source_instr, struct_ptr, field, ptr_type);
20135 struct_ptr, field);
20136 result->value->type = ptr_type;
20137 return result;
20138}21140}
2013921141
20140static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,21142static IrInstGen *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,
20141 IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type)21143 IrInst* source_instr, IrInstGen *container_ptr, ZigType *container_type)
20142{21144{
20143 // The type of the field is not available until a store using this pointer happens.21145 // The type of the field is not available until a store using this pointer happens.
20144 // So, here we create a special pointer type which has the inferred struct type and21146 // So, here we create a special pointer type which has the inferred struct type and
...@@ -20161,12 +21163,11 @@ static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_n...@@ -20161,12 +21163,11 @@ static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_n
20161 if (instr_is_comptime(container_ptr)) {21163 if (instr_is_comptime(container_ptr)) {
20162 ZigValue *ptr_val = ir_resolve_const(ira, container_ptr, UndefBad);21164 ZigValue *ptr_val = ir_resolve_const(ira, container_ptr, UndefBad);
20163 if (ptr_val == nullptr)21165 if (ptr_val == nullptr)
20164 return ira->codegen->invalid_instruction;21166 return ira->codegen->invalid_inst_gen;
2016521167
20166 IrInstruction *result;21168 IrInstGen *result;
20167 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {21169 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
20168 result = ir_build_cast(&ira->new_irb, source_instr->scope,21170 result = ir_build_cast(ira, source_instr, container_ptr_type, container_ptr, CastOpNoop);
20169 source_instr->source_node, container_ptr_type, container_ptr, CastOpNoop);
20170 } else {21171 } else {
20171 result = ir_const(ira, source_instr, field_ptr_type);21172 result = ir_const(ira, source_instr, field_ptr_type);
20172 }21173 }
...@@ -20175,14 +21176,11 @@ static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_n...@@ -20175,14 +21176,11 @@ static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_n
20175 return result;21176 return result;
20176 }21177 }
2017721178
20178 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope,21179 return ir_build_cast(ira, source_instr, field_ptr_type, container_ptr, CastOpNoop);
20179 source_instr->source_node, field_ptr_type, container_ptr, CastOpNoop);
20180 result->value->type = field_ptr_type;
20181 return result;
20182}21180}
2018321181
20184static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,21182static IrInstGen *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,
20185 IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type, bool initializing)21183 IrInst* source_instr, IrInstGen *container_ptr, ZigType *container_type, bool initializing)
20186{21184{
20187 Error err;21185 Error err;
2018821186
...@@ -20195,7 +21193,7 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_...@@ -20195,7 +21193,7 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
20195 }21193 }
2019621194
20197 if ((err = type_resolve(ira->codegen, bare_type, ResolveStatusZeroBitsKnown)))21195 if ((err = type_resolve(ira->codegen, bare_type, ResolveStatusZeroBitsKnown)))
20198 return ira->codegen->invalid_instruction;21196 return ira->codegen->invalid_inst_gen;
2019921197
20200 assert(container_ptr->value->type->id == ZigTypeIdPointer);21198 assert(container_ptr->value->type->id == ZigTypeIdPointer);
20201 if (bare_type->id == ZigTypeIdStruct) {21199 if (bare_type->id == ZigTypeIdStruct) {
...@@ -20225,22 +21223,22 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_...@@ -20225,22 +21223,22 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
2022521223
20226 ZigType *field_type = resolve_union_field_type(ira->codegen, field);21224 ZigType *field_type = resolve_union_field_type(ira->codegen, field);
20227 if (field_type == nullptr)21225 if (field_type == nullptr)
20228 return ira->codegen->invalid_instruction;21226 return ira->codegen->invalid_inst_gen;
2022921227
20230 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, field_type,21228 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, field_type,
20231 is_const, is_volatile, PtrLenSingle, 0, 0, 0, false);21229 is_const, is_volatile, PtrLenSingle, 0, 0, 0, false);
20232 if (instr_is_comptime(container_ptr)) {21230 if (instr_is_comptime(container_ptr)) {
20233 ZigValue *ptr_val = ir_resolve_const(ira, container_ptr, UndefBad);21231 ZigValue *ptr_val = ir_resolve_const(ira, container_ptr, UndefBad);
20234 if (!ptr_val)21232 if (!ptr_val)
20235 return ira->codegen->invalid_instruction;21233 return ira->codegen->invalid_inst_gen;
2023621234
20237 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar &&21235 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar &&
20238 ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {21236 ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
20239 ZigValue *union_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);21237 ZigValue *union_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
20240 if (union_val == nullptr)21238 if (union_val == nullptr)
20241 return ira->codegen->invalid_instruction;21239 return ira->codegen->invalid_inst_gen;
20242 if (type_is_invalid(union_val->type))21240 if (type_is_invalid(union_val->type))
20243 return ira->codegen->invalid_instruction;21241 return ira->codegen->invalid_inst_gen;
2024421242
20245 if (initializing) {21243 if (initializing) {
20246 ZigValue *payload_val = create_const_vals(1);21244 ZigValue *payload_val = create_const_vals(1);
...@@ -20261,17 +21259,16 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_...@@ -20261,17 +21259,16 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
20261 ir_add_error_node(ira, source_instr->source_node,21259 ir_add_error_node(ira, source_instr->source_node,
20262 buf_sprintf("accessing union field '%s' while field '%s' is set", buf_ptr(field_name),21260 buf_sprintf("accessing union field '%s' while field '%s' is set", buf_ptr(field_name),
20263 buf_ptr(actual_field->name)));21261 buf_ptr(actual_field->name)));
20264 return ira->codegen->invalid_instruction;21262 return ira->codegen->invalid_inst_gen;
20265 }21263 }
20266 }21264 }
2026721265
20268 ZigValue *payload_val = union_val->data.x_union.payload;21266 ZigValue *payload_val = union_val->data.x_union.payload;
2026921267
20270 IrInstruction *result;21268 IrInstGen *result;
20271 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {21269 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
20272 result = ir_build_union_field_ptr(&ira->new_irb, source_instr->scope,21270 result = ir_build_union_field_ptr(ira, source_instr, container_ptr, field, true,
20273 source_instr->source_node, container_ptr, field, true, initializing);21271 initializing, ptr_type);
20274 result->value->type = ptr_type;
20275 result->value->special = ConstValSpecialStatic;21272 result->value->special = ConstValSpecialStatic;
20276 } else {21273 } else {
20277 result = ir_const(ira, source_instr, ptr_type);21274 result = ir_const(ira, source_instr, ptr_type);
...@@ -20284,10 +21281,7 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_...@@ -20284,10 +21281,7 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
20284 }21281 }
20285 }21282 }
2028621283
20287 IrInstruction *result = ir_build_union_field_ptr(&ira->new_irb, source_instr->scope,21284 return ir_build_union_field_ptr(ira, source_instr, container_ptr, field, true, initializing, ptr_type);
20288 source_instr->source_node, container_ptr, field, true, initializing);
20289 result->value->type = ptr_type;
20290 return result;
20291 }21285 }
2029221286
20293 zig_unreachable();21287 zig_unreachable();
...@@ -20328,16 +21322,18 @@ static void add_link_lib_symbol(IrAnalyze *ira, Buf *lib_name, Buf *symbol_name,...@@ -20328,16 +21322,18 @@ static void add_link_lib_symbol(IrAnalyze *ira, Buf *lib_name, Buf *symbol_name,
20328 link_lib->symbols.append(symbol_name);21322 link_lib->symbols.append(symbol_name);
20329}21323}
2033021324
20331static IrInstruction *ir_error_dependency_loop(IrAnalyze *ira, IrInstruction *source_instr) {21325static IrInstGen *ir_error_dependency_loop(IrAnalyze *ira, IrInst* source_instr) {
20332 ir_add_error(ira, source_instr, buf_sprintf("dependency loop detected"));21326 ir_add_error(ira, source_instr, buf_sprintf("dependency loop detected"));
20333 return ira->codegen->invalid_instruction;21327 return ira->codegen->invalid_inst_gen;
20334}21328}
2033521329
20336static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_instruction, Tld *tld) {21330static IrInstGen *ir_analyze_decl_ref(IrAnalyze *ira, IrInst* source_instruction, Tld *tld) {
20337 resolve_top_level_decl(ira->codegen, tld, source_instruction->source_node, true);21331 resolve_top_level_decl(ira->codegen, tld, source_instruction->source_node, true);
20338 if (tld->resolution == TldResolutionInvalid) {21332 if (tld->resolution == TldResolutionInvalid) {
20339 return ira->codegen->invalid_instruction;21333 return ira->codegen->invalid_inst_gen;
20340 }21334 }
21335 if (tld->resolution == TldResolutionResolving)
21336 return ir_error_dependency_loop(ira, source_instruction);
2034121337
20342 switch (tld->id) {21338 switch (tld->id) {
20343 case TldIdContainer:21339 case TldIdContainer:
...@@ -20347,9 +21343,8 @@ static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_...@@ -20347,9 +21343,8 @@ static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_
20347 case TldIdVar: {21343 case TldIdVar: {
20348 TldVar *tld_var = (TldVar *)tld;21344 TldVar *tld_var = (TldVar *)tld;
20349 ZigVar *var = tld_var->var;21345 ZigVar *var = tld_var->var;
20350 if (var == nullptr) {21346 assert(var != nullptr);
20351 return ir_error_dependency_loop(ira, source_instruction);21347
20352 }
20353 if (tld_var->extern_lib_name != nullptr) {21348 if (tld_var->extern_lib_name != nullptr) {
20354 add_link_lib_symbol(ira, tld_var->extern_lib_name, buf_create_from_str(var->name),21349 add_link_lib_symbol(ira, tld_var->extern_lib_name, buf_create_from_str(var->name),
20355 source_instruction->source_node);21350 source_instruction->source_node);
...@@ -20360,17 +21355,16 @@ static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_...@@ -20360,17 +21355,16 @@ static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_
20360 case TldIdFn: {21355 case TldIdFn: {
20361 TldFn *tld_fn = (TldFn *)tld;21356 TldFn *tld_fn = (TldFn *)tld;
20362 ZigFn *fn_entry = tld_fn->fn_entry;21357 ZigFn *fn_entry = tld_fn->fn_entry;
20363 assert(fn_entry->type_entry);21358 assert(fn_entry->type_entry != nullptr);
2036421359
20365 if (type_is_invalid(fn_entry->type_entry))21360 if (type_is_invalid(fn_entry->type_entry))
20366 return ira->codegen->invalid_instruction;21361 return ira->codegen->invalid_inst_gen;
2036721362
20368 if (tld_fn->extern_lib_name != nullptr) {21363 if (tld_fn->extern_lib_name != nullptr) {
20369 add_link_lib_symbol(ira, tld_fn->extern_lib_name, &fn_entry->symbol_name, source_instruction->source_node);21364 add_link_lib_symbol(ira, tld_fn->extern_lib_name, &fn_entry->symbol_name, source_instruction->source_node);
20370 }21365 }
2037121366
20372 IrInstruction *fn_inst = ir_create_const_fn(&ira->new_irb, source_instruction->scope,21367 IrInstGen *fn_inst = ir_const_fn(ira, source_instruction, fn_entry);
20373 source_instruction->source_node, fn_entry);
20374 return ir_get_ref(ira, source_instruction, fn_inst, true, false);21368 return ir_get_ref(ira, source_instruction, fn_inst, true, false);
20375 }21369 }
20376 }21370 }
...@@ -20388,40 +21382,40 @@ static ErrorTableEntry *find_err_table_entry(ZigType *err_set_type, Buf *field_n...@@ -20388,40 +21382,40 @@ static ErrorTableEntry *find_err_table_entry(ZigType *err_set_type, Buf *field_n
20388 return nullptr;21382 return nullptr;
20389}21383}
2039021384
20391static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstructionFieldPtr *field_ptr_instruction) {21385static IrInstGen *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstSrcFieldPtr *field_ptr_instruction) {
20392 Error err;21386 Error err;
20393 IrInstruction *container_ptr = field_ptr_instruction->container_ptr->child;21387 IrInstGen *container_ptr = field_ptr_instruction->container_ptr->child;
20394 if (type_is_invalid(container_ptr->value->type))21388 if (type_is_invalid(container_ptr->value->type))
20395 return ira->codegen->invalid_instruction;21389 return ira->codegen->invalid_inst_gen;
2039621390
20397 ZigType *container_type = container_ptr->value->type->data.pointer.child_type;21391 ZigType *container_type = container_ptr->value->type->data.pointer.child_type;
2039821392
20399 Buf *field_name = field_ptr_instruction->field_name_buffer;21393 Buf *field_name = field_ptr_instruction->field_name_buffer;
20400 if (!field_name) {21394 if (!field_name) {
20401 IrInstruction *field_name_expr = field_ptr_instruction->field_name_expr->child;21395 IrInstGen *field_name_expr = field_ptr_instruction->field_name_expr->child;
20402 field_name = ir_resolve_str(ira, field_name_expr);21396 field_name = ir_resolve_str(ira, field_name_expr);
20403 if (!field_name)21397 if (!field_name)
20404 return ira->codegen->invalid_instruction;21398 return ira->codegen->invalid_inst_gen;
20405 }21399 }
2040621400
2040721401
20408 AstNode *source_node = field_ptr_instruction->base.source_node;21402 AstNode *source_node = field_ptr_instruction->base.base.source_node;
2040921403
20410 if (type_is_invalid(container_type)) {21404 if (type_is_invalid(container_type)) {
20411 return ira->codegen->invalid_instruction;21405 return ira->codegen->invalid_inst_gen;
20412 } else if (is_tuple(container_type) && !field_ptr_instruction->initializing && buf_eql_str(field_name, "len")) {21406 } else if (is_tuple(container_type) && !field_ptr_instruction->initializing && buf_eql_str(field_name, "len")) {
20413 IrInstruction *len_inst = ir_const_unsigned(ira, &field_ptr_instruction->base,21407 IrInstGen *len_inst = ir_const_unsigned(ira, &field_ptr_instruction->base.base,
20414 container_type->data.structure.src_field_count);21408 container_type->data.structure.src_field_count);
20415 return ir_get_ref(ira, &field_ptr_instruction->base, len_inst, true, false);21409 return ir_get_ref(ira, &field_ptr_instruction->base.base, len_inst, true, false);
20416 } else if (is_slice(container_type) || is_container_ref(container_type)) {21410 } else if (is_slice(container_type) || is_container_ref(container_type)) {
20417 assert(container_ptr->value->type->id == ZigTypeIdPointer);21411 assert(container_ptr->value->type->id == ZigTypeIdPointer);
20418 if (container_type->id == ZigTypeIdPointer) {21412 if (container_type->id == ZigTypeIdPointer) {
20419 ZigType *bare_type = container_ref_type(container_type);21413 ZigType *bare_type = container_ref_type(container_type);
20420 IrInstruction *container_child = ir_get_deref(ira, &field_ptr_instruction->base, container_ptr, nullptr);21414 IrInstGen *container_child = ir_get_deref(ira, &field_ptr_instruction->base.base, container_ptr, nullptr);
20421 IrInstruction *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base, container_child, bare_type, field_ptr_instruction->initializing);21415 IrInstGen *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base.base, container_child, bare_type, field_ptr_instruction->initializing);
20422 return result;21416 return result;
20423 } else {21417 } else {
20424 IrInstruction *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base, container_ptr, container_type, field_ptr_instruction->initializing);21418 IrInstGen *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base.base, container_ptr, container_type, field_ptr_instruction->initializing);
20425 return result;21419 return result;
20426 }21420 }
20427 } else if (is_array_ref(container_type) && !field_ptr_instruction->initializing) {21421 } else if (is_array_ref(container_type) && !field_ptr_instruction->initializing) {
...@@ -20436,42 +21430,42 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc...@@ -20436,42 +21430,42 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
20436 ZigType *usize = ira->codegen->builtin_types.entry_usize;21430 ZigType *usize = ira->codegen->builtin_types.entry_usize;
20437 bool ptr_is_const = true;21431 bool ptr_is_const = true;
20438 bool ptr_is_volatile = false;21432 bool ptr_is_volatile = false;
20439 return ir_get_const_ptr(ira, &field_ptr_instruction->base, len_val,21433 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base, len_val,
20440 usize, ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21434 usize, ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
20441 } else {21435 } else {
20442 ir_add_error_node(ira, source_node,21436 ir_add_error_node(ira, source_node,
20443 buf_sprintf("no member named '%s' in '%s'", buf_ptr(field_name),21437 buf_sprintf("no member named '%s' in '%s'", buf_ptr(field_name),
20444 buf_ptr(&container_type->name)));21438 buf_ptr(&container_type->name)));
20445 return ira->codegen->invalid_instruction;21439 return ira->codegen->invalid_inst_gen;
20446 }21440 }
20447 } else if (container_type->id == ZigTypeIdMetaType) {21441 } else if (container_type->id == ZigTypeIdMetaType) {
20448 ZigValue *container_ptr_val = ir_resolve_const(ira, container_ptr, UndefBad);21442 ZigValue *container_ptr_val = ir_resolve_const(ira, container_ptr, UndefBad);
20449 if (!container_ptr_val)21443 if (!container_ptr_val)
20450 return ira->codegen->invalid_instruction;21444 return ira->codegen->invalid_inst_gen;
2045121445
20452 assert(container_ptr->value->type->id == ZigTypeIdPointer);21446 assert(container_ptr->value->type->id == ZigTypeIdPointer);
20453 ZigValue *child_val = const_ptr_pointee(ira, ira->codegen, container_ptr_val, source_node);21447 ZigValue *child_val = const_ptr_pointee(ira, ira->codegen, container_ptr_val, source_node);
20454 if (child_val == nullptr)21448 if (child_val == nullptr)
20455 return ira->codegen->invalid_instruction;21449 return ira->codegen->invalid_inst_gen;
20456 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,21450 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,
20457 field_ptr_instruction->base.source_node, child_val, UndefBad)))21451 field_ptr_instruction->base.base.source_node, child_val, UndefBad)))
20458 {21452 {
20459 return ira->codegen->invalid_instruction;21453 return ira->codegen->invalid_inst_gen;
20460 }21454 }
20461 ZigType *child_type = child_val->data.x_type;21455 ZigType *child_type = child_val->data.x_type;
2046221456
20463 if (type_is_invalid(child_type)) {21457 if (type_is_invalid(child_type)) {
20464 return ira->codegen->invalid_instruction;21458 return ira->codegen->invalid_inst_gen;
20465 } else if (is_container(child_type)) {21459 } else if (is_container(child_type)) {
20466 if (child_type->id == ZigTypeIdEnum) {21460 if (child_type->id == ZigTypeIdEnum) {
20467 if ((err = type_resolve(ira->codegen, child_type, ResolveStatusSizeKnown)))21461 if ((err = type_resolve(ira->codegen, child_type, ResolveStatusSizeKnown)))
20468 return ira->codegen->invalid_instruction;21462 return ira->codegen->invalid_inst_gen;
2046921463
20470 TypeEnumField *field = find_enum_type_field(child_type, field_name);21464 TypeEnumField *field = find_enum_type_field(child_type, field_name);
20471 if (field) {21465 if (field) {
20472 bool ptr_is_const = true;21466 bool ptr_is_const = true;
20473 bool ptr_is_volatile = false;21467 bool ptr_is_volatile = false;
20474 return ir_get_const_ptr(ira, &field_ptr_instruction->base,21468 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
20475 create_const_enum(child_type, &field->value), child_type,21469 create_const_enum(child_type, &field->value), child_type,
20476 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21470 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
20477 }21471 }
...@@ -20480,37 +21474,37 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc...@@ -20480,37 +21474,37 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
20480 Tld *tld = find_container_decl(ira->codegen, container_scope, field_name);21474 Tld *tld = find_container_decl(ira->codegen, container_scope, field_name);
20481 if (tld) {21475 if (tld) {
20482 if (tld->visib_mod == VisibModPrivate &&21476 if (tld->visib_mod == VisibModPrivate &&
20483 tld->import != get_scope_import(field_ptr_instruction->base.scope))21477 tld->import != get_scope_import(field_ptr_instruction->base.base.scope))
20484 {21478 {
20485 ErrorMsg *msg = ir_add_error(ira, &field_ptr_instruction->base,21479 ErrorMsg *msg = ir_add_error(ira, &field_ptr_instruction->base.base,
20486 buf_sprintf("'%s' is private", buf_ptr(field_name)));21480 buf_sprintf("'%s' is private", buf_ptr(field_name)));
20487 add_error_note(ira->codegen, msg, tld->source_node, buf_sprintf("declared here"));21481 add_error_note(ira->codegen, msg, tld->source_node, buf_sprintf("declared here"));
20488 return ira->codegen->invalid_instruction;21482 return ira->codegen->invalid_inst_gen;
20489 }21483 }
20490 return ir_analyze_decl_ref(ira, &field_ptr_instruction->base, tld);21484 return ir_analyze_decl_ref(ira, &field_ptr_instruction->base.base, tld);
20491 }21485 }
20492 if (child_type->id == ZigTypeIdUnion &&21486 if (child_type->id == ZigTypeIdUnion &&
20493 (child_type->data.unionation.decl_node->data.container_decl.init_arg_expr != nullptr ||21487 (child_type->data.unionation.decl_node->data.container_decl.init_arg_expr != nullptr ||
20494 child_type->data.unionation.decl_node->data.container_decl.auto_enum))21488 child_type->data.unionation.decl_node->data.container_decl.auto_enum))
20495 {21489 {
20496 if ((err = type_resolve(ira->codegen, child_type, ResolveStatusSizeKnown)))21490 if ((err = type_resolve(ira->codegen, child_type, ResolveStatusSizeKnown)))
20497 return ira->codegen->invalid_instruction;21491 return ira->codegen->invalid_inst_gen;
20498 TypeUnionField *field = find_union_type_field(child_type, field_name);21492 TypeUnionField *field = find_union_type_field(child_type, field_name);
20499 if (field) {21493 if (field) {
20500 ZigType *enum_type = child_type->data.unionation.tag_type;21494 ZigType *enum_type = child_type->data.unionation.tag_type;
20501 bool ptr_is_const = true;21495 bool ptr_is_const = true;
20502 bool ptr_is_volatile = false;21496 bool ptr_is_volatile = false;
20503 return ir_get_const_ptr(ira, &field_ptr_instruction->base,21497 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
20504 create_const_enum(enum_type, &field->enum_field->value), enum_type,21498 create_const_enum(enum_type, &field->enum_field->value), enum_type,
20505 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21499 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
20506 }21500 }
20507 }21501 }
20508 const char *container_name = (child_type == ira->codegen->root_import) ?21502 const char *container_name = (child_type == ira->codegen->root_import) ?
20509 "root source file" : buf_ptr(buf_sprintf("container '%s'", buf_ptr(&child_type->name)));21503 "root source file" : buf_ptr(buf_sprintf("container '%s'", buf_ptr(&child_type->name)));
20510 ir_add_error(ira, &field_ptr_instruction->base,21504 ir_add_error(ira, &field_ptr_instruction->base.base,
20511 buf_sprintf("%s has no member called '%s'",21505 buf_sprintf("%s has no member called '%s'",
20512 container_name, buf_ptr(field_name)));21506 container_name, buf_ptr(field_name)));
20513 return ira->codegen->invalid_instruction;21507 return ira->codegen->invalid_inst_gen;
20514 } else if (child_type->id == ZigTypeIdErrorSet) {21508 } else if (child_type->id == ZigTypeIdErrorSet) {
20515 ErrorTableEntry *err_entry;21509 ErrorTableEntry *err_entry;
20516 ZigType *err_set_type;21510 ZigType *err_set_type;
...@@ -20520,7 +21514,7 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc...@@ -20520,7 +21514,7 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
20520 err_entry = existing_entry->value;21514 err_entry = existing_entry->value;
20521 } else {21515 } else {
20522 err_entry = allocate<ErrorTableEntry>(1);21516 err_entry = allocate<ErrorTableEntry>(1);
20523 err_entry->decl_node = field_ptr_instruction->base.source_node;21517 err_entry->decl_node = field_ptr_instruction->base.base.source_node;
20524 buf_init_from_buf(&err_entry->name, field_name);21518 buf_init_from_buf(&err_entry->name, field_name);
20525 size_t error_value_count = ira->codegen->errors_by_index.length;21519 size_t error_value_count = ira->codegen->errors_by_index.length;
20526 assert((uint32_t)error_value_count < (((uint32_t)1) << (uint32_t)ira->codegen->err_tag_type->data.integral.bit_count));21520 assert((uint32_t)error_value_count < (((uint32_t)1) << (uint32_t)ira->codegen->err_tag_type->data.integral.bit_count));
...@@ -20530,19 +21524,19 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc...@@ -20530,19 +21524,19 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
20530 }21524 }
20531 if (err_entry->set_with_only_this_in_it == nullptr) {21525 if (err_entry->set_with_only_this_in_it == nullptr) {
20532 err_entry->set_with_only_this_in_it = make_err_set_with_one_item(ira->codegen,21526 err_entry->set_with_only_this_in_it = make_err_set_with_one_item(ira->codegen,
20533 field_ptr_instruction->base.scope, field_ptr_instruction->base.source_node,21527 field_ptr_instruction->base.base.scope, field_ptr_instruction->base.base.source_node,
20534 err_entry);21528 err_entry);
20535 }21529 }
20536 err_set_type = err_entry->set_with_only_this_in_it;21530 err_set_type = err_entry->set_with_only_this_in_it;
20537 } else {21531 } else {
20538 if (!resolve_inferred_error_set(ira->codegen, child_type, field_ptr_instruction->base.source_node)) {21532 if (!resolve_inferred_error_set(ira->codegen, child_type, field_ptr_instruction->base.base.source_node)) {
20539 return ira->codegen->invalid_instruction;21533 return ira->codegen->invalid_inst_gen;
20540 }21534 }
20541 err_entry = find_err_table_entry(child_type, field_name);21535 err_entry = find_err_table_entry(child_type, field_name);
20542 if (err_entry == nullptr) {21536 if (err_entry == nullptr) {
20543 ir_add_error(ira, &field_ptr_instruction->base,21537 ir_add_error(ira, &field_ptr_instruction->base.base,
20544 buf_sprintf("no error named '%s' in '%s'", buf_ptr(field_name), buf_ptr(&child_type->name)));21538 buf_sprintf("no error named '%s' in '%s'", buf_ptr(field_name), buf_ptr(&child_type->name)));
20545 return ira->codegen->invalid_instruction;21539 return ira->codegen->invalid_inst_gen;
20546 }21540 }
20547 err_set_type = child_type;21541 err_set_type = child_type;
20548 }21542 }
...@@ -20553,13 +21547,13 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc...@@ -20553,13 +21547,13 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2055321547
20554 bool ptr_is_const = true;21548 bool ptr_is_const = true;
20555 bool ptr_is_volatile = false;21549 bool ptr_is_volatile = false;
20556 return ir_get_const_ptr(ira, &field_ptr_instruction->base, const_val,21550 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base, const_val,
20557 err_set_type, ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21551 err_set_type, ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
20558 } else if (child_type->id == ZigTypeIdInt) {21552 } else if (child_type->id == ZigTypeIdInt) {
20559 if (buf_eql_str(field_name, "bit_count")) {21553 if (buf_eql_str(field_name, "bit_count")) {
20560 bool ptr_is_const = true;21554 bool ptr_is_const = true;
20561 bool ptr_is_volatile = false;21555 bool ptr_is_volatile = false;
20562 return ir_get_const_ptr(ira, &field_ptr_instruction->base,21556 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
20563 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,21557 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
20564 child_type->data.integral.bit_count, false),21558 child_type->data.integral.bit_count, false),
20565 ira->codegen->builtin_types.entry_num_lit_int,21559 ira->codegen->builtin_types.entry_num_lit_int,
...@@ -20567,36 +21561,36 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc...@@ -20567,36 +21561,36 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
20567 } else if (buf_eql_str(field_name, "is_signed")) {21561 } else if (buf_eql_str(field_name, "is_signed")) {
20568 bool ptr_is_const = true;21562 bool ptr_is_const = true;
20569 bool ptr_is_volatile = false;21563 bool ptr_is_volatile = false;
20570 return ir_get_const_ptr(ira, &field_ptr_instruction->base,21564 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
20571 create_const_bool(ira->codegen, child_type->data.integral.is_signed),21565 create_const_bool(ira->codegen, child_type->data.integral.is_signed),
20572 ira->codegen->builtin_types.entry_bool,21566 ira->codegen->builtin_types.entry_bool,
20573 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21567 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
20574 } else {21568 } else {
20575 ir_add_error(ira, &field_ptr_instruction->base,21569 ir_add_error(ira, &field_ptr_instruction->base.base,
20576 buf_sprintf("type '%s' has no member called '%s'",21570 buf_sprintf("type '%s' has no member called '%s'",
20577 buf_ptr(&child_type->name), buf_ptr(field_name)));21571 buf_ptr(&child_type->name), buf_ptr(field_name)));
20578 return ira->codegen->invalid_instruction;21572 return ira->codegen->invalid_inst_gen;
20579 }21573 }
20580 } else if (child_type->id == ZigTypeIdFloat) {21574 } else if (child_type->id == ZigTypeIdFloat) {
20581 if (buf_eql_str(field_name, "bit_count")) {21575 if (buf_eql_str(field_name, "bit_count")) {
20582 bool ptr_is_const = true;21576 bool ptr_is_const = true;
20583 bool ptr_is_volatile = false;21577 bool ptr_is_volatile = false;
20584 return ir_get_const_ptr(ira, &field_ptr_instruction->base,21578 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
20585 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,21579 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
20586 child_type->data.floating.bit_count, false),21580 child_type->data.floating.bit_count, false),
20587 ira->codegen->builtin_types.entry_num_lit_int,21581 ira->codegen->builtin_types.entry_num_lit_int,
20588 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21582 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
20589 } else {21583 } else {
20590 ir_add_error(ira, &field_ptr_instruction->base,21584 ir_add_error(ira, &field_ptr_instruction->base.base,
20591 buf_sprintf("type '%s' has no member called '%s'",21585 buf_sprintf("type '%s' has no member called '%s'",
20592 buf_ptr(&child_type->name), buf_ptr(field_name)));21586 buf_ptr(&child_type->name), buf_ptr(field_name)));
20593 return ira->codegen->invalid_instruction;21587 return ira->codegen->invalid_inst_gen;
20594 }21588 }
20595 } else if (child_type->id == ZigTypeIdPointer) {21589 } else if (child_type->id == ZigTypeIdPointer) {
20596 if (buf_eql_str(field_name, "Child")) {21590 if (buf_eql_str(field_name, "Child")) {
20597 bool ptr_is_const = true;21591 bool ptr_is_const = true;
20598 bool ptr_is_volatile = false;21592 bool ptr_is_volatile = false;
20599 return ir_get_const_ptr(ira, &field_ptr_instruction->base,21593 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
20600 create_const_type(ira->codegen, child_type->data.pointer.child_type),21594 create_const_type(ira->codegen, child_type->data.pointer.child_type),
20601 ira->codegen->builtin_types.entry_type,21595 ira->codegen->builtin_types.entry_type,
20602 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21596 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
...@@ -20606,75 +21600,75 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc...@@ -20606,75 +21600,75 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
20606 if ((err = type_resolve(ira->codegen, child_type->data.pointer.child_type,21600 if ((err = type_resolve(ira->codegen, child_type->data.pointer.child_type,
20607 ResolveStatusAlignmentKnown)))21601 ResolveStatusAlignmentKnown)))
20608 {21602 {
20609 return ira->codegen->invalid_instruction;21603 return ira->codegen->invalid_inst_gen;
20610 }21604 }
20611 return ir_get_const_ptr(ira, &field_ptr_instruction->base,21605 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
20612 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,21606 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
20613 get_ptr_align(ira->codegen, child_type), false),21607 get_ptr_align(ira->codegen, child_type), false),
20614 ira->codegen->builtin_types.entry_num_lit_int,21608 ira->codegen->builtin_types.entry_num_lit_int,
20615 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21609 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
20616 } else {21610 } else {
20617 ir_add_error(ira, &field_ptr_instruction->base,21611 ir_add_error(ira, &field_ptr_instruction->base.base,
20618 buf_sprintf("type '%s' has no member called '%s'",21612 buf_sprintf("type '%s' has no member called '%s'",
20619 buf_ptr(&child_type->name), buf_ptr(field_name)));21613 buf_ptr(&child_type->name), buf_ptr(field_name)));
20620 return ira->codegen->invalid_instruction;21614 return ira->codegen->invalid_inst_gen;
20621 }21615 }
20622 } else if (child_type->id == ZigTypeIdArray) {21616 } else if (child_type->id == ZigTypeIdArray) {
20623 if (buf_eql_str(field_name, "Child")) {21617 if (buf_eql_str(field_name, "Child")) {
20624 bool ptr_is_const = true;21618 bool ptr_is_const = true;
20625 bool ptr_is_volatile = false;21619 bool ptr_is_volatile = false;
20626 return ir_get_const_ptr(ira, &field_ptr_instruction->base,21620 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
20627 create_const_type(ira->codegen, child_type->data.array.child_type),21621 create_const_type(ira->codegen, child_type->data.array.child_type),
20628 ira->codegen->builtin_types.entry_type,21622 ira->codegen->builtin_types.entry_type,
20629 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21623 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
20630 } else if (buf_eql_str(field_name, "len")) {21624 } else if (buf_eql_str(field_name, "len")) {
20631 bool ptr_is_const = true;21625 bool ptr_is_const = true;
20632 bool ptr_is_volatile = false;21626 bool ptr_is_volatile = false;
20633 return ir_get_const_ptr(ira, &field_ptr_instruction->base,21627 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
20634 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,21628 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
20635 child_type->data.array.len, false),21629 child_type->data.array.len, false),
20636 ira->codegen->builtin_types.entry_num_lit_int,21630 ira->codegen->builtin_types.entry_num_lit_int,
20637 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21631 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
20638 } else {21632 } else {
20639 ir_add_error(ira, &field_ptr_instruction->base,21633 ir_add_error(ira, &field_ptr_instruction->base.base,
20640 buf_sprintf("type '%s' has no member called '%s'",21634 buf_sprintf("type '%s' has no member called '%s'",
20641 buf_ptr(&child_type->name), buf_ptr(field_name)));21635 buf_ptr(&child_type->name), buf_ptr(field_name)));
20642 return ira->codegen->invalid_instruction;21636 return ira->codegen->invalid_inst_gen;
20643 }21637 }
20644 } else if (child_type->id == ZigTypeIdErrorUnion) {21638 } else if (child_type->id == ZigTypeIdErrorUnion) {
20645 if (buf_eql_str(field_name, "Payload")) {21639 if (buf_eql_str(field_name, "Payload")) {
20646 bool ptr_is_const = true;21640 bool ptr_is_const = true;
20647 bool ptr_is_volatile = false;21641 bool ptr_is_volatile = false;
20648 return ir_get_const_ptr(ira, &field_ptr_instruction->base,21642 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
20649 create_const_type(ira->codegen, child_type->data.error_union.payload_type),21643 create_const_type(ira->codegen, child_type->data.error_union.payload_type),
20650 ira->codegen->builtin_types.entry_type,21644 ira->codegen->builtin_types.entry_type,
20651 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21645 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
20652 } else if (buf_eql_str(field_name, "ErrorSet")) {21646 } else if (buf_eql_str(field_name, "ErrorSet")) {
20653 bool ptr_is_const = true;21647 bool ptr_is_const = true;
20654 bool ptr_is_volatile = false;21648 bool ptr_is_volatile = false;
20655 return ir_get_const_ptr(ira, &field_ptr_instruction->base,21649 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
20656 create_const_type(ira->codegen, child_type->data.error_union.err_set_type),21650 create_const_type(ira->codegen, child_type->data.error_union.err_set_type),
20657 ira->codegen->builtin_types.entry_type,21651 ira->codegen->builtin_types.entry_type,
20658 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21652 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
20659 } else {21653 } else {
20660 ir_add_error(ira, &field_ptr_instruction->base,21654 ir_add_error(ira, &field_ptr_instruction->base.base,
20661 buf_sprintf("type '%s' has no member called '%s'",21655 buf_sprintf("type '%s' has no member called '%s'",
20662 buf_ptr(&child_type->name), buf_ptr(field_name)));21656 buf_ptr(&child_type->name), buf_ptr(field_name)));
20663 return ira->codegen->invalid_instruction;21657 return ira->codegen->invalid_inst_gen;
20664 }21658 }
20665 } else if (child_type->id == ZigTypeIdOptional) {21659 } else if (child_type->id == ZigTypeIdOptional) {
20666 if (buf_eql_str(field_name, "Child")) {21660 if (buf_eql_str(field_name, "Child")) {
20667 bool ptr_is_const = true;21661 bool ptr_is_const = true;
20668 bool ptr_is_volatile = false;21662 bool ptr_is_volatile = false;
20669 return ir_get_const_ptr(ira, &field_ptr_instruction->base,21663 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
20670 create_const_type(ira->codegen, child_type->data.maybe.child_type),21664 create_const_type(ira->codegen, child_type->data.maybe.child_type),
20671 ira->codegen->builtin_types.entry_type,21665 ira->codegen->builtin_types.entry_type,
20672 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21666 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
20673 } else {21667 } else {
20674 ir_add_error(ira, &field_ptr_instruction->base,21668 ir_add_error(ira, &field_ptr_instruction->base.base,
20675 buf_sprintf("type '%s' has no member called '%s'",21669 buf_sprintf("type '%s' has no member called '%s'",
20676 buf_ptr(&child_type->name), buf_ptr(field_name)));21670 buf_ptr(&child_type->name), buf_ptr(field_name)));
20677 return ira->codegen->invalid_instruction;21671 return ira->codegen->invalid_inst_gen;
20678 }21672 }
20679 } else if (child_type->id == ZigTypeIdFn) {21673 } else if (child_type->id == ZigTypeIdFn) {
20680 if (buf_eql_str(field_name, "ReturnType")) {21674 if (buf_eql_str(field_name, "ReturnType")) {
...@@ -20682,121 +21676,121 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc...@@ -20682,121 +21676,121 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
20682 // Return type can only ever be null, if the function is generic21676 // Return type can only ever be null, if the function is generic
20683 assert(child_type->data.fn.is_generic);21677 assert(child_type->data.fn.is_generic);
2068421678
20685 ir_add_error(ira, &field_ptr_instruction->base,21679 ir_add_error(ira, &field_ptr_instruction->base.base,
20686 buf_sprintf("ReturnType has not been resolved because '%s' is generic", buf_ptr(&child_type->name)));21680 buf_sprintf("ReturnType has not been resolved because '%s' is generic", buf_ptr(&child_type->name)));
20687 return ira->codegen->invalid_instruction;21681 return ira->codegen->invalid_inst_gen;
20688 }21682 }
2068921683
20690 bool ptr_is_const = true;21684 bool ptr_is_const = true;
20691 bool ptr_is_volatile = false;21685 bool ptr_is_volatile = false;
20692 return ir_get_const_ptr(ira, &field_ptr_instruction->base,21686 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
20693 create_const_type(ira->codegen, child_type->data.fn.fn_type_id.return_type),21687 create_const_type(ira->codegen, child_type->data.fn.fn_type_id.return_type),
20694 ira->codegen->builtin_types.entry_type,21688 ira->codegen->builtin_types.entry_type,
20695 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21689 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
20696 } else if (buf_eql_str(field_name, "is_var_args")) {21690 } else if (buf_eql_str(field_name, "is_var_args")) {
20697 bool ptr_is_const = true;21691 bool ptr_is_const = true;
20698 bool ptr_is_volatile = false;21692 bool ptr_is_volatile = false;
20699 return ir_get_const_ptr(ira, &field_ptr_instruction->base,21693 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
20700 create_const_bool(ira->codegen, child_type->data.fn.fn_type_id.is_var_args),21694 create_const_bool(ira->codegen, child_type->data.fn.fn_type_id.is_var_args),
20701 ira->codegen->builtin_types.entry_bool,21695 ira->codegen->builtin_types.entry_bool,
20702 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21696 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
20703 } else if (buf_eql_str(field_name, "arg_count")) {21697 } else if (buf_eql_str(field_name, "arg_count")) {
20704 bool ptr_is_const = true;21698 bool ptr_is_const = true;
20705 bool ptr_is_volatile = false;21699 bool ptr_is_volatile = false;
20706 return ir_get_const_ptr(ira, &field_ptr_instruction->base,21700 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
20707 create_const_usize(ira->codegen, child_type->data.fn.fn_type_id.param_count),21701 create_const_usize(ira->codegen, child_type->data.fn.fn_type_id.param_count),
20708 ira->codegen->builtin_types.entry_usize,21702 ira->codegen->builtin_types.entry_usize,
20709 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);21703 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
20710 } else {21704 } else {
20711 ir_add_error(ira, &field_ptr_instruction->base,21705 ir_add_error(ira, &field_ptr_instruction->base.base,
20712 buf_sprintf("type '%s' has no member called '%s'",21706 buf_sprintf("type '%s' has no member called '%s'",
20713 buf_ptr(&child_type->name), buf_ptr(field_name)));21707 buf_ptr(&child_type->name), buf_ptr(field_name)));
20714 return ira->codegen->invalid_instruction;21708 return ira->codegen->invalid_inst_gen;
20715 }21709 }
20716 } else {21710 } else {
20717 ir_add_error(ira, &field_ptr_instruction->base,21711 ir_add_error(ira, &field_ptr_instruction->base.base,
20718 buf_sprintf("type '%s' does not support field access", buf_ptr(&child_type->name)));21712 buf_sprintf("type '%s' does not support field access", buf_ptr(&child_type->name)));
20719 return ira->codegen->invalid_instruction;21713 return ira->codegen->invalid_inst_gen;
20720 }21714 }
20721 } else if (field_ptr_instruction->initializing) {21715 } else if (field_ptr_instruction->initializing) {
20722 ir_add_error(ira, &field_ptr_instruction->base,21716 ir_add_error(ira, &field_ptr_instruction->base.base,
20723 buf_sprintf("type '%s' does not support struct initialization syntax", buf_ptr(&container_type->name)));21717 buf_sprintf("type '%s' does not support struct initialization syntax", buf_ptr(&container_type->name)));
20724 return ira->codegen->invalid_instruction;21718 return ira->codegen->invalid_inst_gen;
20725 } else {21719 } else {
20726 ir_add_error_node(ira, field_ptr_instruction->base.source_node,21720 ir_add_error_node(ira, field_ptr_instruction->base.base.source_node,
20727 buf_sprintf("type '%s' does not support field access", buf_ptr(&container_type->name)));21721 buf_sprintf("type '%s' does not support field access", buf_ptr(&container_type->name)));
20728 return ira->codegen->invalid_instruction;21722 return ira->codegen->invalid_inst_gen;
20729 }21723 }
20730}21724}
2073121725
20732static IrInstruction *ir_analyze_instruction_store_ptr(IrAnalyze *ira, IrInstructionStorePtr *instruction) {21726static IrInstGen *ir_analyze_instruction_store_ptr(IrAnalyze *ira, IrInstSrcStorePtr *instruction) {
20733 IrInstruction *ptr = instruction->ptr->child;21727 IrInstGen *ptr = instruction->ptr->child;
20734 if (type_is_invalid(ptr->value->type))21728 if (type_is_invalid(ptr->value->type))
20735 return ira->codegen->invalid_instruction;21729 return ira->codegen->invalid_inst_gen;
2073621730
20737 IrInstruction *value = instruction->value->child;21731 IrInstGen *value = instruction->value->child;
20738 if (type_is_invalid(value->value->type))21732 if (type_is_invalid(value->value->type))
20739 return ira->codegen->invalid_instruction;21733 return ira->codegen->invalid_inst_gen;
2074021734
20741 return ir_analyze_store_ptr(ira, &instruction->base, ptr, value, instruction->allow_write_through_const);21735 return ir_analyze_store_ptr(ira, &instruction->base.base, ptr, value, instruction->allow_write_through_const);
20742}21736}
2074321737
20744static IrInstruction *ir_analyze_instruction_load_ptr(IrAnalyze *ira, IrInstructionLoadPtr *instruction) {21738static IrInstGen *ir_analyze_instruction_load_ptr(IrAnalyze *ira, IrInstSrcLoadPtr *instruction) {
20745 IrInstruction *ptr = instruction->ptr->child;21739 IrInstGen *ptr = instruction->ptr->child;
20746 if (type_is_invalid(ptr->value->type))21740 if (type_is_invalid(ptr->value->type))
20747 return ira->codegen->invalid_instruction;21741 return ira->codegen->invalid_inst_gen;
20748 return ir_get_deref(ira, &instruction->base, ptr, nullptr);21742 return ir_get_deref(ira, &instruction->base.base, ptr, nullptr);
20749}21743}
2075021744
20751static IrInstruction *ir_analyze_instruction_typeof(IrAnalyze *ira, IrInstructionTypeOf *typeof_instruction) {21745static IrInstGen *ir_analyze_instruction_typeof(IrAnalyze *ira, IrInstSrcTypeOf *typeof_instruction) {
20752 IrInstruction *expr_value = typeof_instruction->value->child;21746 IrInstGen *expr_value = typeof_instruction->value->child;
20753 ZigType *type_entry = expr_value->value->type;21747 ZigType *type_entry = expr_value->value->type;
20754 if (type_is_invalid(type_entry))21748 if (type_is_invalid(type_entry))
20755 return ira->codegen->invalid_instruction;21749 return ira->codegen->invalid_inst_gen;
20756 return ir_const_type(ira, &typeof_instruction->base, type_entry);21750 return ir_const_type(ira, &typeof_instruction->base.base, type_entry);
20757}21751}
2075821752
20759static IrInstruction *ir_analyze_instruction_set_cold(IrAnalyze *ira, IrInstructionSetCold *instruction) {21753static IrInstGen *ir_analyze_instruction_set_cold(IrAnalyze *ira, IrInstSrcSetCold *instruction) {
20760 if (ira->new_irb.exec->is_inline) {21754 if (ira->new_irb.exec->is_inline) {
20761 // ignore setCold when running functions at compile time21755 // ignore setCold when running functions at compile time
20762 return ir_const_void(ira, &instruction->base);21756 return ir_const_void(ira, &instruction->base.base);
20763 }21757 }
2076421758
20765 IrInstruction *is_cold_value = instruction->is_cold->child;21759 IrInstGen *is_cold_value = instruction->is_cold->child;
20766 bool want_cold;21760 bool want_cold;
20767 if (!ir_resolve_bool(ira, is_cold_value, &want_cold))21761 if (!ir_resolve_bool(ira, is_cold_value, &want_cold))
20768 return ira->codegen->invalid_instruction;21762 return ira->codegen->invalid_inst_gen;
2076921763
20770 ZigFn *fn_entry = scope_fn_entry(instruction->base.scope);21764 ZigFn *fn_entry = scope_fn_entry(instruction->base.base.scope);
20771 if (fn_entry == nullptr) {21765 if (fn_entry == nullptr) {
20772 ir_add_error(ira, &instruction->base, buf_sprintf("@setCold outside function"));21766 ir_add_error(ira, &instruction->base.base, buf_sprintf("@setCold outside function"));
20773 return ira->codegen->invalid_instruction;21767 return ira->codegen->invalid_inst_gen;
20774 }21768 }
2077521769
20776 if (fn_entry->set_cold_node != nullptr) {21770 if (fn_entry->set_cold_node != nullptr) {
20777 ErrorMsg *msg = ir_add_error(ira, &instruction->base, buf_sprintf("cold set twice in same function"));21771 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base, buf_sprintf("cold set twice in same function"));
20778 add_error_note(ira->codegen, msg, fn_entry->set_cold_node, buf_sprintf("first set here"));21772 add_error_note(ira->codegen, msg, fn_entry->set_cold_node, buf_sprintf("first set here"));
20779 return ira->codegen->invalid_instruction;21773 return ira->codegen->invalid_inst_gen;
20780 }21774 }
2078121775
20782 fn_entry->set_cold_node = instruction->base.source_node;21776 fn_entry->set_cold_node = instruction->base.base.source_node;
20783 fn_entry->is_cold = want_cold;21777 fn_entry->is_cold = want_cold;
2078421778
20785 return ir_const_void(ira, &instruction->base);21779 return ir_const_void(ira, &instruction->base.base);
20786}21780}
2078721781
20788static IrInstruction *ir_analyze_instruction_set_runtime_safety(IrAnalyze *ira,21782static IrInstGen *ir_analyze_instruction_set_runtime_safety(IrAnalyze *ira,
20789 IrInstructionSetRuntimeSafety *set_runtime_safety_instruction)21783 IrInstSrcSetRuntimeSafety *set_runtime_safety_instruction)
20790{21784{
20791 if (ira->new_irb.exec->is_inline) {21785 if (ira->new_irb.exec->is_inline) {
20792 // ignore setRuntimeSafety when running functions at compile time21786 // ignore setRuntimeSafety when running functions at compile time
20793 return ir_const_void(ira, &set_runtime_safety_instruction->base);21787 return ir_const_void(ira, &set_runtime_safety_instruction->base.base);
20794 }21788 }
2079521789
20796 bool *safety_off_ptr;21790 bool *safety_off_ptr;
20797 AstNode **safety_set_node_ptr;21791 AstNode **safety_set_node_ptr;
2079821792
20799 Scope *scope = set_runtime_safety_instruction->base.scope;21793 Scope *scope = set_runtime_safety_instruction->base.base.scope;
20800 while (scope != nullptr) {21794 while (scope != nullptr) {
20801 if (scope->id == ScopeIdBlock) {21795 if (scope->id == ScopeIdBlock) {
20802 ScopeBlock *block_scope = (ScopeBlock *)scope;21796 ScopeBlock *block_scope = (ScopeBlock *)scope;
...@@ -20822,36 +21816,36 @@ static IrInstruction *ir_analyze_instruction_set_runtime_safety(IrAnalyze *ira,...@@ -20822,36 +21816,36 @@ static IrInstruction *ir_analyze_instruction_set_runtime_safety(IrAnalyze *ira,
20822 }21816 }
20823 assert(scope != nullptr);21817 assert(scope != nullptr);
2082421818
20825 IrInstruction *safety_on_value = set_runtime_safety_instruction->safety_on->child;21819 IrInstGen *safety_on_value = set_runtime_safety_instruction->safety_on->child;
20826 bool want_runtime_safety;21820 bool want_runtime_safety;
20827 if (!ir_resolve_bool(ira, safety_on_value, &want_runtime_safety))21821 if (!ir_resolve_bool(ira, safety_on_value, &want_runtime_safety))
20828 return ira->codegen->invalid_instruction;21822 return ira->codegen->invalid_inst_gen;
2082921823
20830 AstNode *source_node = set_runtime_safety_instruction->base.source_node;21824 AstNode *source_node = set_runtime_safety_instruction->base.base.source_node;
20831 if (*safety_set_node_ptr) {21825 if (*safety_set_node_ptr) {
20832 ErrorMsg *msg = ir_add_error_node(ira, source_node,21826 ErrorMsg *msg = ir_add_error_node(ira, source_node,
20833 buf_sprintf("runtime safety set twice for same scope"));21827 buf_sprintf("runtime safety set twice for same scope"));
20834 add_error_note(ira->codegen, msg, *safety_set_node_ptr, buf_sprintf("first set here"));21828 add_error_note(ira->codegen, msg, *safety_set_node_ptr, buf_sprintf("first set here"));
20835 return ira->codegen->invalid_instruction;21829 return ira->codegen->invalid_inst_gen;
20836 }21830 }
20837 *safety_set_node_ptr = source_node;21831 *safety_set_node_ptr = source_node;
20838 *safety_off_ptr = !want_runtime_safety;21832 *safety_off_ptr = !want_runtime_safety;
2083921833
20840 return ir_const_void(ira, &set_runtime_safety_instruction->base);21834 return ir_const_void(ira, &set_runtime_safety_instruction->base.base);
20841}21835}
2084221836
20843static IrInstruction *ir_analyze_instruction_set_float_mode(IrAnalyze *ira,21837static IrInstGen *ir_analyze_instruction_set_float_mode(IrAnalyze *ira,
20844 IrInstructionSetFloatMode *instruction)21838 IrInstSrcSetFloatMode *instruction)
20845{21839{
20846 if (ira->new_irb.exec->is_inline) {21840 if (ira->new_irb.exec->is_inline) {
20847 // ignore setFloatMode when running functions at compile time21841 // ignore setFloatMode when running functions at compile time
20848 return ir_const_void(ira, &instruction->base);21842 return ir_const_void(ira, &instruction->base.base);
20849 }21843 }
2085021844
20851 bool *fast_math_on_ptr;21845 bool *fast_math_on_ptr;
20852 AstNode **fast_math_set_node_ptr;21846 AstNode **fast_math_set_node_ptr;
2085321847
20854 Scope *scope = instruction->base.scope;21848 Scope *scope = instruction->base.base.scope;
20855 while (scope != nullptr) {21849 while (scope != nullptr) {
20856 if (scope->id == ScopeIdBlock) {21850 if (scope->id == ScopeIdBlock) {
20857 ScopeBlock *block_scope = (ScopeBlock *)scope;21851 ScopeBlock *block_scope = (ScopeBlock *)scope;
...@@ -20877,42 +21871,38 @@ static IrInstruction *ir_analyze_instruction_set_float_mode(IrAnalyze *ira,...@@ -20877,42 +21871,38 @@ static IrInstruction *ir_analyze_instruction_set_float_mode(IrAnalyze *ira,
20877 }21871 }
20878 assert(scope != nullptr);21872 assert(scope != nullptr);
2087921873
20880 IrInstruction *float_mode_value = instruction->mode_value->child;21874 IrInstGen *float_mode_value = instruction->mode_value->child;
20881 FloatMode float_mode_scalar;21875 FloatMode float_mode_scalar;
20882 if (!ir_resolve_float_mode(ira, float_mode_value, &float_mode_scalar))21876 if (!ir_resolve_float_mode(ira, float_mode_value, &float_mode_scalar))
20883 return ira->codegen->invalid_instruction;21877 return ira->codegen->invalid_inst_gen;
2088421878
20885 AstNode *source_node = instruction->base.source_node;21879 AstNode *source_node = instruction->base.base.source_node;
20886 if (*fast_math_set_node_ptr) {21880 if (*fast_math_set_node_ptr) {
20887 ErrorMsg *msg = ir_add_error_node(ira, source_node,21881 ErrorMsg *msg = ir_add_error_node(ira, source_node,
20888 buf_sprintf("float mode set twice for same scope"));21882 buf_sprintf("float mode set twice for same scope"));
20889 add_error_note(ira->codegen, msg, *fast_math_set_node_ptr, buf_sprintf("first set here"));21883 add_error_note(ira->codegen, msg, *fast_math_set_node_ptr, buf_sprintf("first set here"));
20890 return ira->codegen->invalid_instruction;21884 return ira->codegen->invalid_inst_gen;
20891 }21885 }
20892 *fast_math_set_node_ptr = source_node;21886 *fast_math_set_node_ptr = source_node;
20893 *fast_math_on_ptr = (float_mode_scalar == FloatModeOptimized);21887 *fast_math_on_ptr = (float_mode_scalar == FloatModeOptimized);
2089421888
20895 return ir_const_void(ira, &instruction->base);21889 return ir_const_void(ira, &instruction->base.base);
20896}21890}
2089721891
20898static IrInstruction *ir_analyze_instruction_any_frame_type(IrAnalyze *ira,21892static IrInstGen *ir_analyze_instruction_any_frame_type(IrAnalyze *ira, IrInstSrcAnyFrameType *instruction) {
20899 IrInstructionAnyFrameType *instruction)
20900{
20901 ZigType *payload_type = nullptr;21893 ZigType *payload_type = nullptr;
20902 if (instruction->payload_type != nullptr) {21894 if (instruction->payload_type != nullptr) {
20903 payload_type = ir_resolve_type(ira, instruction->payload_type->child);21895 payload_type = ir_resolve_type(ira, instruction->payload_type->child);
20904 if (type_is_invalid(payload_type))21896 if (type_is_invalid(payload_type))
20905 return ira->codegen->invalid_instruction;21897 return ira->codegen->invalid_inst_gen;
20906 }21898 }
2090721899
20908 ZigType *any_frame_type = get_any_frame_type(ira->codegen, payload_type);21900 ZigType *any_frame_type = get_any_frame_type(ira->codegen, payload_type);
20909 return ir_const_type(ira, &instruction->base, any_frame_type);21901 return ir_const_type(ira, &instruction->base.base, any_frame_type);
20910}21902}
2091121903
20912static IrInstruction *ir_analyze_instruction_slice_type(IrAnalyze *ira,21904static IrInstGen *ir_analyze_instruction_slice_type(IrAnalyze *ira, IrInstSrcSliceType *slice_type_instruction) {
20913 IrInstructionSliceType *slice_type_instruction)21905 IrInstGen *result = ir_const(ira, &slice_type_instruction->base.base, ira->codegen->builtin_types.entry_type);
20914{
20915 IrInstruction *result = ir_const(ira, &slice_type_instruction->base, ira->codegen->builtin_types.entry_type);
20916 result->value->special = ConstValSpecialLazy;21906 result->value->special = ConstValSpecialLazy;
2091721907
20918 LazyValueSliceType *lazy_slice_type = allocate<LazyValueSliceType>(1, "LazyValueSliceType");21908 LazyValueSliceType *lazy_slice_type = allocate<LazyValueSliceType>(1, "LazyValueSliceType");
...@@ -20923,18 +21913,18 @@ static IrInstruction *ir_analyze_instruction_slice_type(IrAnalyze *ira,...@@ -20923,18 +21913,18 @@ static IrInstruction *ir_analyze_instruction_slice_type(IrAnalyze *ira,
20923 if (slice_type_instruction->align_value != nullptr) {21913 if (slice_type_instruction->align_value != nullptr) {
20924 lazy_slice_type->align_inst = slice_type_instruction->align_value->child;21914 lazy_slice_type->align_inst = slice_type_instruction->align_value->child;
20925 if (ir_resolve_const(ira, lazy_slice_type->align_inst, LazyOk) == nullptr)21915 if (ir_resolve_const(ira, lazy_slice_type->align_inst, LazyOk) == nullptr)
20926 return ira->codegen->invalid_instruction;21916 return ira->codegen->invalid_inst_gen;
20927 }21917 }
2092821918
20929 if (slice_type_instruction->sentinel != nullptr) {21919 if (slice_type_instruction->sentinel != nullptr) {
20930 lazy_slice_type->sentinel = slice_type_instruction->sentinel->child;21920 lazy_slice_type->sentinel = slice_type_instruction->sentinel->child;
20931 if (ir_resolve_const(ira, lazy_slice_type->sentinel, LazyOk) == nullptr)21921 if (ir_resolve_const(ira, lazy_slice_type->sentinel, LazyOk) == nullptr)
20932 return ira->codegen->invalid_instruction;21922 return ira->codegen->invalid_inst_gen;
20933 }21923 }
2093421924
20935 lazy_slice_type->elem_type = slice_type_instruction->child_type->child;21925 lazy_slice_type->elem_type = slice_type_instruction->child_type->child;
20936 if (ir_resolve_type_lazy(ira, lazy_slice_type->elem_type) == nullptr)21926 if (ir_resolve_type_lazy(ira, lazy_slice_type->elem_type) == nullptr)
20937 return ira->codegen->invalid_instruction;21927 return ira->codegen->invalid_inst_gen;
2093821928
20939 lazy_slice_type->is_const = slice_type_instruction->is_const;21929 lazy_slice_type->is_const = slice_type_instruction->is_const;
20940 lazy_slice_type->is_volatile = slice_type_instruction->is_volatile;21930 lazy_slice_type->is_volatile = slice_type_instruction->is_volatile;
...@@ -20943,31 +21933,31 @@ static IrInstruction *ir_analyze_instruction_slice_type(IrAnalyze *ira,...@@ -20943,31 +21933,31 @@ static IrInstruction *ir_analyze_instruction_slice_type(IrAnalyze *ira,
20943 return result;21933 return result;
20944}21934}
2094521935
20946static IrInstruction *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstructionAsmSrc *asm_instruction) {21936static IrInstGen *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstSrcAsm *asm_instruction) {
20947 Error err;21937 Error err;
2094821938
20949 assert(asm_instruction->base.source_node->type == NodeTypeAsmExpr);21939 assert(asm_instruction->base.base.source_node->type == NodeTypeAsmExpr);
2095021940
20951 AstNode *node = asm_instruction->base.source_node;21941 AstNode *node = asm_instruction->base.base.source_node;
20952 AstNodeAsmExpr *asm_expr = &asm_instruction->base.source_node->data.asm_expr;21942 AstNodeAsmExpr *asm_expr = &asm_instruction->base.base.source_node->data.asm_expr;
2095321943
20954 Buf *template_buf = ir_resolve_str(ira, asm_instruction->asm_template->child);21944 Buf *template_buf = ir_resolve_str(ira, asm_instruction->asm_template->child);
20955 if (template_buf == nullptr)21945 if (template_buf == nullptr)
20956 return ira->codegen->invalid_instruction;21946 return ira->codegen->invalid_inst_gen;
2095721947
20958 if (asm_instruction->is_global) {21948 if (asm_instruction->is_global) {
20959 buf_append_char(&ira->codegen->global_asm, '\n');21949 buf_append_char(&ira->codegen->global_asm, '\n');
20960 buf_append_buf(&ira->codegen->global_asm, template_buf);21950 buf_append_buf(&ira->codegen->global_asm, template_buf);
2096121951
20962 return ir_const_void(ira, &asm_instruction->base);21952 return ir_const_void(ira, &asm_instruction->base.base);
20963 }21953 }
2096421954
20965 if (!ir_emit_global_runtime_side_effect(ira, &asm_instruction->base))21955 if (!ir_emit_global_runtime_side_effect(ira, &asm_instruction->base.base))
20966 return ira->codegen->invalid_instruction;21956 return ira->codegen->invalid_inst_gen;
2096721957
20968 ZigList<AsmToken> tok_list = {};21958 ZigList<AsmToken> tok_list = {};
20969 if ((err = parse_asm_template(ira, node, template_buf, &tok_list))) {21959 if ((err = parse_asm_template(ira, node, template_buf, &tok_list))) {
20970 return ira->codegen->invalid_instruction;21960 return ira->codegen->invalid_inst_gen;
20971 }21961 }
2097221962
20973 for (size_t token_i = 0; token_i < tok_list.length; token_i += 1) {21963 for (size_t token_i = 0; token_i < tok_list.length; token_i += 1) {
...@@ -20981,15 +21971,15 @@ static IrInstruction *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstructionAs...@@ -20981,15 +21971,15 @@ static IrInstruction *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstructionAs
20981 add_node_error(ira->codegen, node,21971 add_node_error(ira->codegen, node,
20982 buf_sprintf("could not find '%.*s' in the inputs or outputs",21972 buf_sprintf("could not find '%.*s' in the inputs or outputs",
20983 len, ptr));21973 len, ptr));
20984 return ira->codegen->invalid_instruction;21974 return ira->codegen->invalid_inst_gen;
20985 }21975 }
20986 }21976 }
20987 }21977 }
2098821978
20989 // TODO validate the output types and variable types21979 // TODO validate the output types and variable types
2099021980
20991 IrInstruction **input_list = allocate<IrInstruction *>(asm_expr->input_list.length);21981 IrInstGen **input_list = allocate<IrInstGen *>(asm_expr->input_list.length);
20992 IrInstruction **output_types = allocate<IrInstruction *>(asm_expr->output_list.length);21982 IrInstGen **output_types = allocate<IrInstGen *>(asm_expr->output_list.length);
2099321983
20994 ZigType *return_type = ira->codegen->builtin_types.entry_void;21984 ZigType *return_type = ira->codegen->builtin_types.entry_void;
20995 for (size_t i = 0; i < asm_expr->output_list.length; i += 1) {21985 for (size_t i = 0; i < asm_expr->output_list.length; i += 1) {
...@@ -20998,39 +21988,34 @@ static IrInstruction *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstructionAs...@@ -20998,39 +21988,34 @@ static IrInstruction *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstructionAs
20998 output_types[i] = asm_instruction->output_types[i]->child;21988 output_types[i] = asm_instruction->output_types[i]->child;
20999 return_type = ir_resolve_type(ira, output_types[i]);21989 return_type = ir_resolve_type(ira, output_types[i]);
21000 if (type_is_invalid(return_type))21990 if (type_is_invalid(return_type))
21001 return ira->codegen->invalid_instruction;21991 return ira->codegen->invalid_inst_gen;
21002 }21992 }
21003 }21993 }
2100421994
21005 for (size_t i = 0; i < asm_expr->input_list.length; i += 1) {21995 for (size_t i = 0; i < asm_expr->input_list.length; i += 1) {
21006 IrInstruction *const input_value = asm_instruction->input_list[i]->child;21996 IrInstGen *const input_value = asm_instruction->input_list[i]->child;
21007 if (type_is_invalid(input_value->value->type))21997 if (type_is_invalid(input_value->value->type))
21008 return ira->codegen->invalid_instruction;21998 return ira->codegen->invalid_inst_gen;
2100921999
21010 if (instr_is_comptime(input_value) &&22000 if (instr_is_comptime(input_value) &&
21011 (input_value->value->type->id == ZigTypeIdComptimeInt ||22001 (input_value->value->type->id == ZigTypeIdComptimeInt ||
21012 input_value->value->type->id == ZigTypeIdComptimeFloat)) {22002 input_value->value->type->id == ZigTypeIdComptimeFloat)) {
21013 ir_add_error_node(ira, input_value->source_node,22003 ir_add_error(ira, &input_value->base,
21014 buf_sprintf("expected sized integer or sized float, found %s", buf_ptr(&input_value->value->type->name)));22004 buf_sprintf("expected sized integer or sized float, found %s", buf_ptr(&input_value->value->type->name)));
21015 return ira->codegen->invalid_instruction;22005 return ira->codegen->invalid_inst_gen;
21016 }22006 }
2101722007
21018 input_list[i] = input_value;22008 input_list[i] = input_value;
21019 }22009 }
2102022010
21021 IrInstruction *result = ir_build_asm_gen(ira,22011 return ir_build_asm_gen(ira, &asm_instruction->base.base,
21022 asm_instruction->base.scope, asm_instruction->base.source_node,
21023 template_buf, tok_list.items, tok_list.length,22012 template_buf, tok_list.items, tok_list.length,
21024 input_list, output_types, asm_instruction->output_vars, asm_instruction->return_count,22013 input_list, output_types, asm_instruction->output_vars, asm_instruction->return_count,
21025 asm_instruction->has_side_effects);22014 asm_instruction->has_side_effects, return_type);
21026 result->value->type = return_type;
21027 return result;
21028}22015}
2102922016
21030static IrInstruction *ir_analyze_instruction_array_type(IrAnalyze *ira,22017static IrInstGen *ir_analyze_instruction_array_type(IrAnalyze *ira, IrInstSrcArrayType *array_type_instruction) {
21031 IrInstructionArrayType *array_type_instruction)22018 IrInstGen *result = ir_const(ira, &array_type_instruction->base.base, ira->codegen->builtin_types.entry_type);
21032{
21033 IrInstruction *result = ir_const(ira, &array_type_instruction->base, ira->codegen->builtin_types.entry_type);
21034 result->value->special = ConstValSpecialLazy;22019 result->value->special = ConstValSpecialLazy;
2103522020
21036 LazyValueArrayType *lazy_array_type = allocate<LazyValueArrayType>(1, "LazyValueArrayType");22021 LazyValueArrayType *lazy_array_type = allocate<LazyValueArrayType>(1, "LazyValueArrayType");
...@@ -21040,22 +22025,22 @@ static IrInstruction *ir_analyze_instruction_array_type(IrAnalyze *ira,...@@ -21040,22 +22025,22 @@ static IrInstruction *ir_analyze_instruction_array_type(IrAnalyze *ira,
2104022025
21041 lazy_array_type->elem_type = array_type_instruction->child_type->child;22026 lazy_array_type->elem_type = array_type_instruction->child_type->child;
21042 if (ir_resolve_type_lazy(ira, lazy_array_type->elem_type) == nullptr)22027 if (ir_resolve_type_lazy(ira, lazy_array_type->elem_type) == nullptr)
21043 return ira->codegen->invalid_instruction;22028 return ira->codegen->invalid_inst_gen;
2104422029
21045 if (!ir_resolve_usize(ira, array_type_instruction->size->child, &lazy_array_type->length))22030 if (!ir_resolve_usize(ira, array_type_instruction->size->child, &lazy_array_type->length))
21046 return ira->codegen->invalid_instruction;22031 return ira->codegen->invalid_inst_gen;
2104722032
21048 if (array_type_instruction->sentinel != nullptr) {22033 if (array_type_instruction->sentinel != nullptr) {
21049 lazy_array_type->sentinel = array_type_instruction->sentinel->child;22034 lazy_array_type->sentinel = array_type_instruction->sentinel->child;
21050 if (ir_resolve_const(ira, lazy_array_type->sentinel, LazyOk) == nullptr)22035 if (ir_resolve_const(ira, lazy_array_type->sentinel, LazyOk) == nullptr)
21051 return ira->codegen->invalid_instruction;22036 return ira->codegen->invalid_inst_gen;
21052 }22037 }
2105322038
21054 return result;22039 return result;
21055}22040}
2105622041
21057static IrInstruction *ir_analyze_instruction_size_of(IrAnalyze *ira, IrInstructionSizeOf *instruction) {22042static IrInstGen *ir_analyze_instruction_size_of(IrAnalyze *ira, IrInstSrcSizeOf *instruction) {
21058 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);22043 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
21059 result->value->special = ConstValSpecialLazy;22044 result->value->special = ConstValSpecialLazy;
2106022045
21061 LazyValueSizeOf *lazy_size_of = allocate<LazyValueSizeOf>(1, "LazyValueSizeOf");22046 LazyValueSizeOf *lazy_size_of = allocate<LazyValueSizeOf>(1, "LazyValueSizeOf");
...@@ -21066,19 +22051,19 @@ static IrInstruction *ir_analyze_instruction_size_of(IrAnalyze *ira, IrInstructi...@@ -21066,19 +22051,19 @@ static IrInstruction *ir_analyze_instruction_size_of(IrAnalyze *ira, IrInstructi
2106622051
21067 lazy_size_of->target_type = instruction->type_value->child;22052 lazy_size_of->target_type = instruction->type_value->child;
21068 if (ir_resolve_type_lazy(ira, lazy_size_of->target_type) == nullptr)22053 if (ir_resolve_type_lazy(ira, lazy_size_of->target_type) == nullptr)
21069 return ira->codegen->invalid_instruction;22054 return ira->codegen->invalid_inst_gen;
2107022055
21071 return result;22056 return result;
21072}22057}
2107322058
21074static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *source_inst, IrInstruction *value) {22059static IrInstGen *ir_analyze_test_non_null(IrAnalyze *ira, IrInst *source_inst, IrInstGen *value) {
21075 ZigType *type_entry = value->value->type;22060 ZigType *type_entry = value->value->type;
2107622061
21077 if (type_entry->id == ZigTypeIdPointer && type_entry->data.pointer.allow_zero) {22062 if (type_entry->id == ZigTypeIdPointer && type_entry->data.pointer.allow_zero) {
21078 if (instr_is_comptime(value)) {22063 if (instr_is_comptime(value)) {
21079 ZigValue *c_ptr_val = ir_resolve_const(ira, value, UndefOk);22064 ZigValue *c_ptr_val = ir_resolve_const(ira, value, UndefOk);
21080 if (c_ptr_val == nullptr)22065 if (c_ptr_val == nullptr)
21081 return ira->codegen->invalid_instruction;22066 return ira->codegen->invalid_inst_gen;
21082 if (c_ptr_val->special == ConstValSpecialUndef)22067 if (c_ptr_val->special == ConstValSpecialUndef)
21083 return ir_const_undef(ira, source_inst, ira->codegen->builtin_types.entry_bool);22068 return ir_const_undef(ira, source_inst, ira->codegen->builtin_types.entry_bool);
21084 bool is_null = c_ptr_val->data.x_ptr.special == ConstPtrSpecialNull ||22069 bool is_null = c_ptr_val->data.x_ptr.special == ConstPtrSpecialNull ||
...@@ -21087,25 +22072,19 @@ static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *so...@@ -21087,25 +22072,19 @@ static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *so
21087 return ir_const_bool(ira, source_inst, !is_null);22072 return ir_const_bool(ira, source_inst, !is_null);
21088 }22073 }
2108922074
21090 IrInstruction *result = ir_build_test_nonnull(&ira->new_irb,22075 return ir_build_test_non_null_gen(ira, source_inst, value);
21091 source_inst->scope, source_inst->source_node, value);
21092 result->value->type = ira->codegen->builtin_types.entry_bool;
21093 return result;
21094 } else if (type_entry->id == ZigTypeIdOptional) {22076 } else if (type_entry->id == ZigTypeIdOptional) {
21095 if (instr_is_comptime(value)) {22077 if (instr_is_comptime(value)) {
21096 ZigValue *maybe_val = ir_resolve_const(ira, value, UndefOk);22078 ZigValue *maybe_val = ir_resolve_const(ira, value, UndefOk);
21097 if (maybe_val == nullptr)22079 if (maybe_val == nullptr)
21098 return ira->codegen->invalid_instruction;22080 return ira->codegen->invalid_inst_gen;
21099 if (maybe_val->special == ConstValSpecialUndef)22081 if (maybe_val->special == ConstValSpecialUndef)
21100 return ir_const_undef(ira, source_inst, ira->codegen->builtin_types.entry_bool);22082 return ir_const_undef(ira, source_inst, ira->codegen->builtin_types.entry_bool);
2110122083
21102 return ir_const_bool(ira, source_inst, !optional_value_is_null(maybe_val));22084 return ir_const_bool(ira, source_inst, !optional_value_is_null(maybe_val));
21103 }22085 }
2110422086
21105 IrInstruction *result = ir_build_test_nonnull(&ira->new_irb,22087 return ir_build_test_non_null_gen(ira, source_inst, value);
21106 source_inst->scope, source_inst->source_node, value);
21107 result->value->type = ira->codegen->builtin_types.entry_bool;
21108 return result;
21109 } else if (type_entry->id == ZigTypeIdNull) {22088 } else if (type_entry->id == ZigTypeIdNull) {
21110 return ir_const_bool(ira, source_inst, false);22089 return ir_const_bool(ira, source_inst, false);
21111 } else {22090 } else {
...@@ -21113,53 +22092,53 @@ static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *so...@@ -21113,53 +22092,53 @@ static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *so
21113 }22092 }
21114}22093}
2111522094
21116static IrInstruction *ir_analyze_instruction_test_non_null(IrAnalyze *ira, IrInstructionTestNonNull *instruction) {22095static IrInstGen *ir_analyze_instruction_test_non_null(IrAnalyze *ira, IrInstSrcTestNonNull *instruction) {
21117 IrInstruction *value = instruction->value->child;22096 IrInstGen *value = instruction->value->child;
21118 if (type_is_invalid(value->value->type))22097 if (type_is_invalid(value->value->type))
21119 return ira->codegen->invalid_instruction;22098 return ira->codegen->invalid_inst_gen;
2112022099
21121 return ir_analyze_test_non_null(ira, &instruction->base, value);22100 return ir_analyze_test_non_null(ira, &instruction->base.base, value);
21122}22101}
2112322102
21124static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstruction *source_instr,22103static IrInstGen *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInst* source_instr,
21125 IrInstruction *base_ptr, bool safety_check_on, bool initializing)22104 IrInstGen *base_ptr, bool safety_check_on, bool initializing)
21126{22105{
21127 Error err;22106 Error err;
2112822107
21129 ZigType *type_entry = get_ptr_elem_type(ira->codegen, base_ptr);22108 ZigType *type_entry = get_ptr_elem_type(ira->codegen, base_ptr);
21130 if (type_is_invalid(type_entry))22109 if (type_is_invalid(type_entry))
21131 return ira->codegen->invalid_instruction;22110 return ira->codegen->invalid_inst_gen;
2113222111
21133 if (type_entry->id == ZigTypeIdPointer && type_entry->data.pointer.ptr_len == PtrLenC) {22112 if (type_entry->id == ZigTypeIdPointer && type_entry->data.pointer.ptr_len == PtrLenC) {
21134 if (instr_is_comptime(base_ptr)) {22113 if (instr_is_comptime(base_ptr)) {
21135 ZigValue *val = ir_resolve_const(ira, base_ptr, UndefBad);22114 ZigValue *val = ir_resolve_const(ira, base_ptr, UndefBad);
21136 if (!val)22115 if (!val)
21137 return ira->codegen->invalid_instruction;22116 return ira->codegen->invalid_inst_gen;
21138 if (val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {22117 if (val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
21139 ZigValue *c_ptr_val = const_ptr_pointee(ira, ira->codegen, val, source_instr->source_node);22118 ZigValue *c_ptr_val = const_ptr_pointee(ira, ira->codegen, val, source_instr->source_node);
21140 if (c_ptr_val == nullptr)22119 if (c_ptr_val == nullptr)
21141 return ira->codegen->invalid_instruction;22120 return ira->codegen->invalid_inst_gen;
21142 bool is_null = c_ptr_val->data.x_ptr.special == ConstPtrSpecialNull ||22121 bool is_null = c_ptr_val->data.x_ptr.special == ConstPtrSpecialNull ||
21143 (c_ptr_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr &&22122 (c_ptr_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr &&
21144 c_ptr_val->data.x_ptr.data.hard_coded_addr.addr == 0);22123 c_ptr_val->data.x_ptr.data.hard_coded_addr.addr == 0);
21145 if (is_null) {22124 if (is_null) {
21146 ir_add_error(ira, source_instr, buf_sprintf("unable to unwrap null"));22125 ir_add_error(ira, source_instr, buf_sprintf("unable to unwrap null"));
21147 return ira->codegen->invalid_instruction;22126 return ira->codegen->invalid_inst_gen;
21148 }22127 }
21149 return base_ptr;22128 return base_ptr;
21150 }22129 }
21151 }22130 }
21152 if (!safety_check_on)22131 if (!safety_check_on)
21153 return base_ptr;22132 return base_ptr;
21154 IrInstruction *c_ptr_val = ir_get_deref(ira, source_instr, base_ptr, nullptr);22133 IrInstGen *c_ptr_val = ir_get_deref(ira, source_instr, base_ptr, nullptr);
21155 ir_build_assert_non_null(ira, source_instr, c_ptr_val);22134 ir_build_assert_non_null(ira, source_instr, c_ptr_val);
21156 return base_ptr;22135 return base_ptr;
21157 }22136 }
2115822137
21159 if (type_entry->id != ZigTypeIdOptional) {22138 if (type_entry->id != ZigTypeIdOptional) {
21160 ir_add_error_node(ira, base_ptr->source_node,22139 ir_add_error(ira, &base_ptr->base,
21161 buf_sprintf("expected optional type, found '%s'", buf_ptr(&type_entry->name)));22140 buf_sprintf("expected optional type, found '%s'", buf_ptr(&type_entry->name)));
21162 return ira->codegen->invalid_instruction;22141 return ira->codegen->invalid_inst_gen;
21163 }22142 }
2116422143
21165 ZigType *child_type = type_entry->data.maybe.child_type;22144 ZigType *child_type = type_entry->data.maybe.child_type;
...@@ -21172,16 +22151,16 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr...@@ -21172,16 +22151,16 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
21172 if (instr_is_comptime(base_ptr)) {22151 if (instr_is_comptime(base_ptr)) {
21173 ZigValue *ptr_val = ir_resolve_const(ira, base_ptr, UndefBad);22152 ZigValue *ptr_val = ir_resolve_const(ira, base_ptr, UndefBad);
21174 if (ptr_val == nullptr)22153 if (ptr_val == nullptr)
21175 return ira->codegen->invalid_instruction;22154 return ira->codegen->invalid_inst_gen;
21176 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {22155 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
21177 ZigValue *optional_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);22156 ZigValue *optional_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
21178 if (optional_val == nullptr)22157 if (optional_val == nullptr)
21179 return ira->codegen->invalid_instruction;22158 return ira->codegen->invalid_inst_gen;
2118022159
21181 if (initializing) {22160 if (initializing) {
21182 switch (type_has_one_possible_value(ira->codegen, child_type)) {22161 switch (type_has_one_possible_value(ira->codegen, child_type)) {
21183 case OnePossibleValueInvalid:22162 case OnePossibleValueInvalid:
21184 return ira->codegen->invalid_instruction;22163 return ira->codegen->invalid_inst_gen;
21185 case OnePossibleValueNo:22164 case OnePossibleValueNo:
21186 if (!same_comptime_repr) {22165 if (!same_comptime_repr) {
21187 ZigValue *payload_val = create_const_vals(1);22166 ZigValue *payload_val = create_const_vals(1);
...@@ -21209,18 +22188,17 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr...@@ -21209,18 +22188,17 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
21209 } else {22188 } else {
21210 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,22189 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,
21211 source_instr->source_node, optional_val, UndefBad)))22190 source_instr->source_node, optional_val, UndefBad)))
21212 return ira->codegen->invalid_instruction;22191 return ira->codegen->invalid_inst_gen;
21213 if (optional_value_is_null(optional_val)) {22192 if (optional_value_is_null(optional_val)) {
21214 ir_add_error(ira, source_instr, buf_sprintf("unable to unwrap null"));22193 ir_add_error(ira, source_instr, buf_sprintf("unable to unwrap null"));
21215 return ira->codegen->invalid_instruction;22194 return ira->codegen->invalid_inst_gen;
21216 }22195 }
21217 }22196 }
2121822197
21219 IrInstruction *result;22198 IrInstGen *result;
21220 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {22199 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
21221 result = ir_build_optional_unwrap_ptr(&ira->new_irb, source_instr->scope,22200 result = ir_build_optional_unwrap_ptr_gen(ira, source_instr, base_ptr, false,
21222 source_instr->source_node, base_ptr, false, initializing);22201 initializing, result_type);
21223 result->value->type = result_type;
21224 result->value->special = ConstValSpecialStatic;22202 result->value->special = ConstValSpecialStatic;
21225 } else {22203 } else {
21226 result = ir_const(ira, source_instr, result_type);22204 result = ir_const(ira, source_instr, result_type);
...@@ -21230,7 +22208,7 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr...@@ -21230,7 +22208,7 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
21230 result_val->data.x_ptr.mut = ptr_val->data.x_ptr.mut;22208 result_val->data.x_ptr.mut = ptr_val->data.x_ptr.mut;
21231 switch (type_has_one_possible_value(ira->codegen, child_type)) {22209 switch (type_has_one_possible_value(ira->codegen, child_type)) {
21232 case OnePossibleValueInvalid:22210 case OnePossibleValueInvalid:
21233 return ira->codegen->invalid_instruction;22211 return ira->codegen->invalid_inst_gen;
21234 case OnePossibleValueNo:22212 case OnePossibleValueNo:
21235 if (same_comptime_repr) {22213 if (same_comptime_repr) {
21236 result_val->data.x_ptr.data.ref.pointee = optional_val;22214 result_val->data.x_ptr.data.ref.pointee = optional_val;
...@@ -21248,135 +22226,120 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr...@@ -21248,135 +22226,120 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
21248 }22226 }
21249 }22227 }
2125022228
21251 IrInstruction *result = ir_build_optional_unwrap_ptr(&ira->new_irb, source_instr->scope,22229 return ir_build_optional_unwrap_ptr_gen(ira, source_instr, base_ptr, safety_check_on,
21252 source_instr->source_node, base_ptr, safety_check_on, initializing);22230 initializing, result_type);
21253 result->value->type = result_type;
21254 return result;
21255}22231}
2125622232
21257static IrInstruction *ir_analyze_instruction_optional_unwrap_ptr(IrAnalyze *ira,22233static IrInstGen *ir_analyze_instruction_optional_unwrap_ptr(IrAnalyze *ira,
21258 IrInstructionOptionalUnwrapPtr *instruction)22234 IrInstSrcOptionalUnwrapPtr *instruction)
21259{22235{
21260 IrInstruction *base_ptr = instruction->base_ptr->child;22236 IrInstGen *base_ptr = instruction->base_ptr->child;
21261 if (type_is_invalid(base_ptr->value->type))22237 if (type_is_invalid(base_ptr->value->type))
21262 return ira->codegen->invalid_instruction;22238 return ira->codegen->invalid_inst_gen;
2126322239
21264 return ir_analyze_unwrap_optional_payload(ira, &instruction->base, base_ptr,22240 return ir_analyze_unwrap_optional_payload(ira, &instruction->base.base, base_ptr,
21265 instruction->safety_check_on, false);22241 instruction->safety_check_on, false);
21266}22242}
2126722243
21268static IrInstruction *ir_analyze_instruction_ctz(IrAnalyze *ira, IrInstructionCtz *instruction) {22244static IrInstGen *ir_analyze_instruction_ctz(IrAnalyze *ira, IrInstSrcCtz *instruction) {
21269 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);22245 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
21270 if (type_is_invalid(int_type))22246 if (type_is_invalid(int_type))
21271 return ira->codegen->invalid_instruction;22247 return ira->codegen->invalid_inst_gen;
2127222248
21273 IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);22249 IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
21274 if (type_is_invalid(op->value->type))22250 if (type_is_invalid(op->value->type))
21275 return ira->codegen->invalid_instruction;22251 return ira->codegen->invalid_inst_gen;
2127622252
21277 if (int_type->data.integral.bit_count == 0)22253 if (int_type->data.integral.bit_count == 0)
21278 return ir_const_unsigned(ira, &instruction->base, 0);22254 return ir_const_unsigned(ira, &instruction->base.base, 0);
2127922255
21280 if (instr_is_comptime(op)) {22256 if (instr_is_comptime(op)) {
21281 ZigValue *val = ir_resolve_const(ira, op, UndefOk);22257 ZigValue *val = ir_resolve_const(ira, op, UndefOk);
21282 if (val == nullptr)22258 if (val == nullptr)
21283 return ira->codegen->invalid_instruction;22259 return ira->codegen->invalid_inst_gen;
21284 if (val->special == ConstValSpecialUndef)22260 if (val->special == ConstValSpecialUndef)
21285 return ir_const_undef(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);22261 return ir_const_undef(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
21286 size_t result_usize = bigint_ctz(&op->value->data.x_bigint, int_type->data.integral.bit_count);22262 size_t result_usize = bigint_ctz(&op->value->data.x_bigint, int_type->data.integral.bit_count);
21287 return ir_const_unsigned(ira, &instruction->base, result_usize);22263 return ir_const_unsigned(ira, &instruction->base.base, result_usize);
21288 }22264 }
2128922265
21290 ZigType *return_type = get_smallest_unsigned_int_type(ira->codegen, int_type->data.integral.bit_count);22266 ZigType *return_type = get_smallest_unsigned_int_type(ira->codegen, int_type->data.integral.bit_count);
21291 IrInstruction *result = ir_build_ctz(&ira->new_irb, instruction->base.scope,22267 return ir_build_ctz_gen(ira, &instruction->base.base, return_type, op);
21292 instruction->base.source_node, nullptr, op);
21293 result->value->type = return_type;
21294 return result;
21295}22268}
2129622269
21297static IrInstruction *ir_analyze_instruction_clz(IrAnalyze *ira, IrInstructionClz *instruction) {22270static IrInstGen *ir_analyze_instruction_clz(IrAnalyze *ira, IrInstSrcClz *instruction) {
21298 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);22271 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
21299 if (type_is_invalid(int_type))22272 if (type_is_invalid(int_type))
21300 return ira->codegen->invalid_instruction;22273 return ira->codegen->invalid_inst_gen;
2130122274
21302 IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);22275 IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
21303 if (type_is_invalid(op->value->type))22276 if (type_is_invalid(op->value->type))
21304 return ira->codegen->invalid_instruction;22277 return ira->codegen->invalid_inst_gen;
2130522278
21306 if (int_type->data.integral.bit_count == 0)22279 if (int_type->data.integral.bit_count == 0)
21307 return ir_const_unsigned(ira, &instruction->base, 0);22280 return ir_const_unsigned(ira, &instruction->base.base, 0);
2130822281
21309 if (instr_is_comptime(op)) {22282 if (instr_is_comptime(op)) {
21310 ZigValue *val = ir_resolve_const(ira, op, UndefOk);22283 ZigValue *val = ir_resolve_const(ira, op, UndefOk);
21311 if (val == nullptr)22284 if (val == nullptr)
21312 return ira->codegen->invalid_instruction;22285 return ira->codegen->invalid_inst_gen;
21313 if (val->special == ConstValSpecialUndef)22286 if (val->special == ConstValSpecialUndef)
21314 return ir_const_undef(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);22287 return ir_const_undef(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
21315 size_t result_usize = bigint_clz(&op->value->data.x_bigint, int_type->data.integral.bit_count);22288 size_t result_usize = bigint_clz(&op->value->data.x_bigint, int_type->data.integral.bit_count);
21316 return ir_const_unsigned(ira, &instruction->base, result_usize);22289 return ir_const_unsigned(ira, &instruction->base.base, result_usize);
21317 }22290 }
2131822291
21319 ZigType *return_type = get_smallest_unsigned_int_type(ira->codegen, int_type->data.integral.bit_count);22292 ZigType *return_type = get_smallest_unsigned_int_type(ira->codegen, int_type->data.integral.bit_count);
21320 IrInstruction *result = ir_build_clz(&ira->new_irb, instruction->base.scope,22293 return ir_build_clz_gen(ira, &instruction->base.base, return_type, op);
21321 instruction->base.source_node, nullptr, op);
21322 result->value->type = return_type;
21323 return result;
21324}22294}
2132522295
21326static IrInstruction *ir_analyze_instruction_pop_count(IrAnalyze *ira, IrInstructionPopCount *instruction) {22296static IrInstGen *ir_analyze_instruction_pop_count(IrAnalyze *ira, IrInstSrcPopCount *instruction) {
21327 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);22297 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
21328 if (type_is_invalid(int_type))22298 if (type_is_invalid(int_type))
21329 return ira->codegen->invalid_instruction;22299 return ira->codegen->invalid_inst_gen;
2133022300
21331 IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);22301 IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
21332 if (type_is_invalid(op->value->type))22302 if (type_is_invalid(op->value->type))
21333 return ira->codegen->invalid_instruction;22303 return ira->codegen->invalid_inst_gen;
2133422304
21335 if (int_type->data.integral.bit_count == 0)22305 if (int_type->data.integral.bit_count == 0)
21336 return ir_const_unsigned(ira, &instruction->base, 0);22306 return ir_const_unsigned(ira, &instruction->base.base, 0);
2133722307
21338 if (instr_is_comptime(op)) {22308 if (instr_is_comptime(op)) {
21339 ZigValue *val = ir_resolve_const(ira, op, UndefOk);22309 ZigValue *val = ir_resolve_const(ira, op, UndefOk);
21340 if (val == nullptr)22310 if (val == nullptr)
21341 return ira->codegen->invalid_instruction;22311 return ira->codegen->invalid_inst_gen;
21342 if (val->special == ConstValSpecialUndef)22312 if (val->special == ConstValSpecialUndef)
21343 return ir_const_undef(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);22313 return ir_const_undef(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
2134422314
21345 if (bigint_cmp_zero(&val->data.x_bigint) != CmpLT) {22315 if (bigint_cmp_zero(&val->data.x_bigint) != CmpLT) {
21346 size_t result = bigint_popcount_unsigned(&val->data.x_bigint);22316 size_t result = bigint_popcount_unsigned(&val->data.x_bigint);
21347 return ir_const_unsigned(ira, &instruction->base, result);22317 return ir_const_unsigned(ira, &instruction->base.base, result);
21348 }22318 }
21349 size_t result = bigint_popcount_signed(&val->data.x_bigint, int_type->data.integral.bit_count);22319 size_t result = bigint_popcount_signed(&val->data.x_bigint, int_type->data.integral.bit_count);
21350 return ir_const_unsigned(ira, &instruction->base, result);22320 return ir_const_unsigned(ira, &instruction->base.base, result);
21351 }22321 }
2135222322
21353 ZigType *return_type = get_smallest_unsigned_int_type(ira->codegen, int_type->data.integral.bit_count);22323 ZigType *return_type = get_smallest_unsigned_int_type(ira->codegen, int_type->data.integral.bit_count);
21354 IrInstruction *result = ir_build_pop_count(&ira->new_irb, instruction->base.scope,22324 return ir_build_pop_count_gen(ira, &instruction->base.base, return_type, op);
21355 instruction->base.source_node, nullptr, op);
21356 result->value->type = return_type;
21357 return result;
21358}22325}
2135922326
21360static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value) {22327static IrInstGen *ir_analyze_union_tag(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value, bool is_gen) {
21361 if (type_is_invalid(value->value->type))22328 if (type_is_invalid(value->value->type))
21362 return ira->codegen->invalid_instruction;22329 return ira->codegen->invalid_inst_gen;
21363
21364 if (value->value->type->id == ZigTypeIdEnum) {
21365 return value;
21366 }
2136722330
21368 if (value->value->type->id != ZigTypeIdUnion) {22331 if (value->value->type->id != ZigTypeIdUnion) {
21369 ir_add_error(ira, value,22332 ir_add_error(ira, &value->base,
21370 buf_sprintf("expected enum or union type, found '%s'", buf_ptr(&value->value->type->name)));22333 buf_sprintf("expected enum or union type, found '%s'", buf_ptr(&value->value->type->name)));
21371 return ira->codegen->invalid_instruction;22334 return ira->codegen->invalid_inst_gen;
21372 }22335 }
21373 if (!value->value->type->data.unionation.have_explicit_tag_type && !source_instr->is_gen) {22336 if (!value->value->type->data.unionation.have_explicit_tag_type && !is_gen) {
21374 ErrorMsg *msg = ir_add_error(ira, source_instr, buf_sprintf("union has no associated enum"));22337 ErrorMsg *msg = ir_add_error(ira, source_instr, buf_sprintf("union has no associated enum"));
21375 if (value->value->type->data.unionation.decl_node != nullptr) {22338 if (value->value->type->data.unionation.decl_node != nullptr) {
21376 add_error_note(ira->codegen, msg, value->value->type->data.unionation.decl_node,22339 add_error_note(ira->codegen, msg, value->value->type->data.unionation.decl_node,
21377 buf_sprintf("declared here"));22340 buf_sprintf("declared here"));
21378 }22341 }
21379 return ira->codegen->invalid_instruction;22342 return ira->codegen->invalid_inst_gen;
21380 }22343 }
2138122344
21382 ZigType *tag_type = value->value->type->data.unionation.tag_type;22345 ZigType *tag_type = value->value->type->data.unionation.tag_type;
...@@ -21385,9 +22348,9 @@ static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source...@@ -21385,9 +22348,9 @@ static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source
21385 if (instr_is_comptime(value)) {22348 if (instr_is_comptime(value)) {
21386 ZigValue *val = ir_resolve_const(ira, value, UndefBad);22349 ZigValue *val = ir_resolve_const(ira, value, UndefBad);
21387 if (!val)22350 if (!val)
21388 return ira->codegen->invalid_instruction;22351 return ira->codegen->invalid_inst_gen;
2138922352
21390 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,22353 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
21391 source_instr->scope, source_instr->source_node);22354 source_instr->scope, source_instr->source_node);
21392 const_instruction->base.value->type = tag_type;22355 const_instruction->base.value->type = tag_type;
21393 const_instruction->base.value->special = ConstValSpecialStatic;22356 const_instruction->base.value->special = ConstValSpecialStatic;
...@@ -21395,15 +22358,13 @@ static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source...@@ -21395,15 +22358,13 @@ static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source
21395 return &const_instruction->base;22358 return &const_instruction->base;
21396 }22359 }
2139722360
21398 IrInstruction *result = ir_build_union_tag(&ira->new_irb, source_instr->scope, source_instr->source_node, value);22361 return ir_build_union_tag(ira, source_instr, value, tag_type);
21399 result->value->type = tag_type;
21400 return result;
21401}22362}
2140222363
21403static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,22364static IrInstGen *ir_analyze_instruction_switch_br(IrAnalyze *ira,
21404 IrInstructionSwitchBr *switch_br_instruction)22365 IrInstSrcSwitchBr *switch_br_instruction)
21405{22366{
21406 IrInstruction *target_value = switch_br_instruction->target_value->child;22367 IrInstGen *target_value = switch_br_instruction->target_value->child;
21407 if (type_is_invalid(target_value->value->type))22368 if (type_is_invalid(target_value->value->type))
21408 return ir_unreach_error(ira);22369 return ir_unreach_error(ira);
2140922370
...@@ -21418,27 +22379,21 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,...@@ -21418,27 +22379,21 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
2141822379
21419 bool is_comptime;22380 bool is_comptime;
21420 if (!ir_resolve_comptime(ira, switch_br_instruction->is_comptime->child, &is_comptime))22381 if (!ir_resolve_comptime(ira, switch_br_instruction->is_comptime->child, &is_comptime))
21421 return ira->codegen->invalid_instruction;22382 return ira->codegen->invalid_inst_gen;
2142222383
21423 if (is_comptime || instr_is_comptime(target_value)) {22384 if (is_comptime || instr_is_comptime(target_value)) {
21424 ZigValue *target_val = ir_resolve_const(ira, target_value, UndefBad);22385 ZigValue *target_val = ir_resolve_const(ira, target_value, UndefBad);
21425 if (!target_val)22386 if (!target_val)
21426 return ir_unreach_error(ira);22387 return ir_unreach_error(ira);
2142722388
21428 IrBasicBlock *old_dest_block = switch_br_instruction->else_block;22389 IrBasicBlockSrc *old_dest_block = switch_br_instruction->else_block;
21429 for (size_t i = 0; i < case_count; i += 1) {22390 for (size_t i = 0; i < case_count; i += 1) {
21430 IrInstructionSwitchBrCase *old_case = &switch_br_instruction->cases[i];22391 IrInstSrcSwitchBrCase *old_case = &switch_br_instruction->cases[i];
21431 IrInstruction *case_value = old_case->value->child;22392 IrInstGen *case_value = old_case->value->child;
21432 if (type_is_invalid(case_value->value->type))22393 if (type_is_invalid(case_value->value->type))
21433 return ir_unreach_error(ira);22394 return ir_unreach_error(ira);
2143422395
21435 if (case_value->value->type->id == ZigTypeIdEnum) {22396 IrInstGen *casted_case_value = ir_implicit_cast(ira, case_value, target_value->value->type);
21436 case_value = ir_analyze_union_tag(ira, &switch_br_instruction->base, case_value);
21437 if (type_is_invalid(case_value->value->type))
21438 return ir_unreach_error(ira);
21439 }
21440
21441 IrInstruction *casted_case_value = ir_implicit_cast(ira, case_value, target_value->value->type);
21442 if (type_is_invalid(casted_case_value->value->type))22397 if (type_is_invalid(casted_case_value->value->type))
21443 return ir_unreach_error(ira);22398 return ir_unreach_error(ira);
2144422399
...@@ -21453,23 +22408,20 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,...@@ -21453,23 +22408,20 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
21453 }22408 }
2145422409
21455 if (is_comptime || old_dest_block->ref_count == 1) {22410 if (is_comptime || old_dest_block->ref_count == 1) {
21456 return ir_inline_bb(ira, &switch_br_instruction->base, old_dest_block);22411 return ir_inline_bb(ira, &switch_br_instruction->base.base, old_dest_block);
21457 } else {22412 } else {
21458 IrBasicBlock *new_dest_block = ir_get_new_bb(ira, old_dest_block, &switch_br_instruction->base);22413 IrBasicBlockGen *new_dest_block = ir_get_new_bb(ira, old_dest_block, &switch_br_instruction->base.base);
21459 IrInstruction *result = ir_build_br(&ira->new_irb,22414 IrInstGen *result = ir_build_br_gen(ira, &switch_br_instruction->base.base, new_dest_block);
21460 switch_br_instruction->base.scope, switch_br_instruction->base.source_node,
21461 new_dest_block, nullptr);
21462 result->value->type = ira->codegen->builtin_types.entry_unreachable;
21463 return ir_finish_anal(ira, result);22415 return ir_finish_anal(ira, result);
21464 }22416 }
21465 }22417 }
2146622418
21467 IrInstructionSwitchBrCase *cases = allocate<IrInstructionSwitchBrCase>(case_count);22419 IrInstGenSwitchBrCase *cases = allocate<IrInstGenSwitchBrCase>(case_count);
21468 for (size_t i = 0; i < case_count; i += 1) {22420 for (size_t i = 0; i < case_count; i += 1) {
21469 IrInstructionSwitchBrCase *old_case = &switch_br_instruction->cases[i];22421 IrInstSrcSwitchBrCase *old_case = &switch_br_instruction->cases[i];
21470 IrInstructionSwitchBrCase *new_case = &cases[i];22422 IrInstGenSwitchBrCase *new_case = &cases[i];
21471 new_case->block = ir_get_new_bb(ira, old_case->block, &switch_br_instruction->base);22423 new_case->block = ir_get_new_bb(ira, old_case->block, &switch_br_instruction->base.base);
21472 new_case->value = ira->codegen->invalid_instruction;22424 new_case->value = ira->codegen->invalid_inst_gen;
2147322425
21474 // Calling ir_get_new_bb set the ref_instruction on the new basic block.22426 // Calling ir_get_new_bb set the ref_instruction on the new basic block.
21475 // However a switch br may branch to the same basic block which would trigger an22427 // However a switch br may branch to the same basic block which would trigger an
...@@ -21477,18 +22429,12 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,...@@ -21477,18 +22429,12 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
21477 // it back after the loop.22429 // it back after the loop.
21478 new_case->block->ref_instruction = nullptr;22430 new_case->block->ref_instruction = nullptr;
2147922431
21480 IrInstruction *old_value = old_case->value;22432 IrInstSrc *old_value = old_case->value;
21481 IrInstruction *new_value = old_value->child;22433 IrInstGen *new_value = old_value->child;
21482 if (type_is_invalid(new_value->value->type))22434 if (type_is_invalid(new_value->value->type))
21483 continue;22435 continue;
2148422436
21485 if (new_value->value->type->id == ZigTypeIdEnum) {22437 IrInstGen *casted_new_value = ir_implicit_cast(ira, new_value, target_value->value->type);
21486 new_value = ir_analyze_union_tag(ira, &switch_br_instruction->base, new_value);
21487 if (type_is_invalid(new_value->value->type))
21488 continue;
21489 }
21490
21491 IrInstruction *casted_new_value = ir_implicit_cast(ira, new_value, target_value->value->type);
21492 if (type_is_invalid(casted_new_value->value->type))22438 if (type_is_invalid(casted_new_value->value->type))
21493 continue;22439 continue;
2149422440
...@@ -21499,47 +22445,45 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,...@@ -21499,47 +22445,45 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
21499 }22445 }
2150022446
21501 for (size_t i = 0; i < case_count; i += 1) {22447 for (size_t i = 0; i < case_count; i += 1) {
21502 IrInstructionSwitchBrCase *new_case = &cases[i];22448 IrInstGenSwitchBrCase *new_case = &cases[i];
21503 if (new_case->value == ira->codegen->invalid_instruction)22449 if (type_is_invalid(new_case->value->value->type))
21504 return ir_unreach_error(ira);22450 return ir_unreach_error(ira);
21505 new_case->block->ref_instruction = &switch_br_instruction->base;22451 new_case->block->ref_instruction = &switch_br_instruction->base.base;
21506 }22452 }
2150722453
21508 IrBasicBlock *new_else_block = ir_get_new_bb(ira, switch_br_instruction->else_block, &switch_br_instruction->base);22454 IrBasicBlockGen *new_else_block = ir_get_new_bb(ira, switch_br_instruction->else_block, &switch_br_instruction->base.base);
21509 IrInstructionSwitchBr *switch_br = ir_build_switch_br(&ira->new_irb,22455 IrInstGenSwitchBr *switch_br = ir_build_switch_br_gen(ira, &switch_br_instruction->base.base,
21510 switch_br_instruction->base.scope, switch_br_instruction->base.source_node,22456 target_value, new_else_block, case_count, cases);
21511 target_value, new_else_block, case_count, cases, nullptr, nullptr);
21512 switch_br->base.value->type = ira->codegen->builtin_types.entry_unreachable;
21513 return ir_finish_anal(ira, &switch_br->base);22457 return ir_finish_anal(ira, &switch_br->base);
21514}22458}
2151522459
21516static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,22460static IrInstGen *ir_analyze_instruction_switch_target(IrAnalyze *ira,
21517 IrInstructionSwitchTarget *switch_target_instruction)22461 IrInstSrcSwitchTarget *switch_target_instruction)
21518{22462{
21519 Error err;22463 Error err;
21520 IrInstruction *target_value_ptr = switch_target_instruction->target_value_ptr->child;22464 IrInstGen *target_value_ptr = switch_target_instruction->target_value_ptr->child;
21521 if (type_is_invalid(target_value_ptr->value->type))22465 if (type_is_invalid(target_value_ptr->value->type))
21522 return ira->codegen->invalid_instruction;22466 return ira->codegen->invalid_inst_gen;
2152322467
21524 if (target_value_ptr->value->type->id == ZigTypeIdMetaType) {22468 if (target_value_ptr->value->type->id == ZigTypeIdMetaType) {
21525 assert(instr_is_comptime(target_value_ptr));22469 assert(instr_is_comptime(target_value_ptr));
21526 ZigType *ptr_type = target_value_ptr->value->data.x_type;22470 ZigType *ptr_type = target_value_ptr->value->data.x_type;
21527 assert(ptr_type->id == ZigTypeIdPointer);22471 assert(ptr_type->id == ZigTypeIdPointer);
21528 return ir_const_type(ira, &switch_target_instruction->base, ptr_type->data.pointer.child_type);22472 return ir_const_type(ira, &switch_target_instruction->base.base, ptr_type->data.pointer.child_type);
21529 }22473 }
2153022474
21531 ZigType *target_type = target_value_ptr->value->type->data.pointer.child_type;22475 ZigType *target_type = target_value_ptr->value->type->data.pointer.child_type;
21532 ZigValue *pointee_val = nullptr;22476 ZigValue *pointee_val = nullptr;
21533 if (instr_is_comptime(target_value_ptr) && target_value_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {22477 if (instr_is_comptime(target_value_ptr) && target_value_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
21534 pointee_val = const_ptr_pointee(ira, ira->codegen, target_value_ptr->value, target_value_ptr->source_node);22478 pointee_val = const_ptr_pointee(ira, ira->codegen, target_value_ptr->value, target_value_ptr->base.source_node);
21535 if (pointee_val == nullptr)22479 if (pointee_val == nullptr)
21536 return ira->codegen->invalid_instruction;22480 return ira->codegen->invalid_inst_gen;
2153722481
21538 if (pointee_val->special == ConstValSpecialRuntime)22482 if (pointee_val->special == ConstValSpecialRuntime)
21539 pointee_val = nullptr;22483 pointee_val = nullptr;
21540 }22484 }
21541 if ((err = type_resolve(ira->codegen, target_type, ResolveStatusSizeKnown)))22485 if ((err = type_resolve(ira->codegen, target_type, ResolveStatusSizeKnown)))
21542 return ira->codegen->invalid_instruction;22486 return ira->codegen->invalid_inst_gen;
2154322487
21544 switch (target_type->id) {22488 switch (target_type->id) {
21545 case ZigTypeIdInvalid:22489 case ZigTypeIdInvalid:
...@@ -21556,13 +22500,13 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,...@@ -21556,13 +22500,13 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
21556 case ZigTypeIdFn:22500 case ZigTypeIdFn:
21557 case ZigTypeIdErrorSet: {22501 case ZigTypeIdErrorSet: {
21558 if (pointee_val) {22502 if (pointee_val) {
21559 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, nullptr);22503 IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, nullptr);
21560 copy_const_val(result->value, pointee_val);22504 copy_const_val(result->value, pointee_val);
21561 result->value->type = target_type;22505 result->value->type = target_type;
21562 return result;22506 return result;
21563 }22507 }
2156422508
21565 IrInstruction *result = ir_get_deref(ira, &switch_target_instruction->base, target_value_ptr, nullptr);22509 IrInstGen *result = ir_get_deref(ira, &switch_target_instruction->base.base, target_value_ptr, nullptr);
21566 result->value->type = target_type;22510 result->value->type = target_type;
21567 return result;22511 return result;
21568 }22512 }
...@@ -21571,52 +22515,49 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,...@@ -21571,52 +22515,49 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
21571 if (!decl_node->data.container_decl.auto_enum &&22515 if (!decl_node->data.container_decl.auto_enum &&
21572 decl_node->data.container_decl.init_arg_expr == nullptr)22516 decl_node->data.container_decl.init_arg_expr == nullptr)
21573 {22517 {
21574 ErrorMsg *msg = ir_add_error(ira, target_value_ptr,22518 ErrorMsg *msg = ir_add_error(ira, &target_value_ptr->base,
21575 buf_sprintf("switch on union which has no attached enum"));22519 buf_sprintf("switch on union which has no attached enum"));
21576 add_error_note(ira->codegen, msg, decl_node,22520 add_error_note(ira->codegen, msg, decl_node,
21577 buf_sprintf("consider 'union(enum)' here"));22521 buf_sprintf("consider 'union(enum)' here"));
21578 return ira->codegen->invalid_instruction;22522 return ira->codegen->invalid_inst_gen;
21579 }22523 }
21580 ZigType *tag_type = target_type->data.unionation.tag_type;22524 ZigType *tag_type = target_type->data.unionation.tag_type;
21581 assert(tag_type != nullptr);22525 assert(tag_type != nullptr);
21582 assert(tag_type->id == ZigTypeIdEnum);22526 assert(tag_type->id == ZigTypeIdEnum);
21583 if (pointee_val) {22527 if (pointee_val) {
21584 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, tag_type);22528 IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, tag_type);
21585 bigint_init_bigint(&result->value->data.x_enum_tag, &pointee_val->data.x_union.tag);22529 bigint_init_bigint(&result->value->data.x_enum_tag, &pointee_val->data.x_union.tag);
21586 return result;22530 return result;
21587 }22531 }
21588 if (tag_type->data.enumeration.src_field_count == 1) {22532 if (tag_type->data.enumeration.src_field_count == 1) {
21589 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, tag_type);22533 IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, tag_type);
21590 TypeEnumField *only_field = &tag_type->data.enumeration.fields[0];22534 TypeEnumField *only_field = &tag_type->data.enumeration.fields[0];
21591 bigint_init_bigint(&result->value->data.x_enum_tag, &only_field->value);22535 bigint_init_bigint(&result->value->data.x_enum_tag, &only_field->value);
21592 return result;22536 return result;
21593 }22537 }
2159422538
21595 IrInstruction *union_value = ir_get_deref(ira, &switch_target_instruction->base, target_value_ptr, nullptr);22539 IrInstGen *union_value = ir_get_deref(ira, &switch_target_instruction->base.base, target_value_ptr, nullptr);
21596 union_value->value->type = target_type;22540 union_value->value->type = target_type;
2159722541
21598 IrInstruction *union_tag_inst = ir_build_union_tag(&ira->new_irb, switch_target_instruction->base.scope,22542 return ir_build_union_tag(ira, &switch_target_instruction->base.base, union_value, tag_type);
21599 switch_target_instruction->base.source_node, union_value);
21600 union_tag_inst->value->type = tag_type;
21601 return union_tag_inst;
21602 }22543 }
21603 case ZigTypeIdEnum: {22544 case ZigTypeIdEnum: {
21604 if ((err = type_resolve(ira->codegen, target_type, ResolveStatusZeroBitsKnown)))22545 if ((err = type_resolve(ira->codegen, target_type, ResolveStatusZeroBitsKnown)))
21605 return ira->codegen->invalid_instruction;22546 return ira->codegen->invalid_inst_gen;
21606 if (target_type->data.enumeration.src_field_count < 2) {22547 if (target_type->data.enumeration.src_field_count == 1) {
21607 TypeEnumField *only_field = &target_type->data.enumeration.fields[0];22548 TypeEnumField *only_field = &target_type->data.enumeration.fields[0];
21608 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, target_type);22549 IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, target_type);
21609 bigint_init_bigint(&result->value->data.x_enum_tag, &only_field->value);22550 bigint_init_bigint(&result->value->data.x_enum_tag, &only_field->value);
21610 return result;22551 return result;
21611 }22552 }
2161222553
21613 if (pointee_val) {22554 if (pointee_val) {
21614 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, target_type);22555 IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, target_type);
21615 bigint_init_bigint(&result->value->data.x_enum_tag, &pointee_val->data.x_enum_tag);22556 bigint_init_bigint(&result->value->data.x_enum_tag, &pointee_val->data.x_enum_tag);
21616 return result;22557 return result;
21617 }22558 }
2161822559
21619 IrInstruction *enum_value = ir_get_deref(ira, &switch_target_instruction->base, target_value_ptr, nullptr);22560 IrInstGen *enum_value = ir_get_deref(ira, &switch_target_instruction->base.base, target_value_ptr, nullptr);
21620 enum_value->value->type = target_type;22561 enum_value->value->type = target_type;
21621 return enum_value;22562 return enum_value;
21622 }22563 }
...@@ -21632,17 +22573,17 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,...@@ -21632,17 +22573,17 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
21632 case ZigTypeIdVector:22573 case ZigTypeIdVector:
21633 case ZigTypeIdFnFrame:22574 case ZigTypeIdFnFrame:
21634 case ZigTypeIdAnyFrame:22575 case ZigTypeIdAnyFrame:
21635 ir_add_error(ira, &switch_target_instruction->base,22576 ir_add_error(ira, &switch_target_instruction->base.base,
21636 buf_sprintf("invalid switch target type '%s'", buf_ptr(&target_type->name)));22577 buf_sprintf("invalid switch target type '%s'", buf_ptr(&target_type->name)));
21637 return ira->codegen->invalid_instruction;22578 return ira->codegen->invalid_inst_gen;
21638 }22579 }
21639 zig_unreachable();22580 zig_unreachable();
21640}22581}
2164122582
21642static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstructionSwitchVar *instruction) {22583static IrInstGen *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstSrcSwitchVar *instruction) {
21643 IrInstruction *target_value_ptr = instruction->target_value_ptr->child;22584 IrInstGen *target_value_ptr = instruction->target_value_ptr->child;
21644 if (type_is_invalid(target_value_ptr->value->type))22585 if (type_is_invalid(target_value_ptr->value->type))
21645 return ira->codegen->invalid_instruction;22586 return ira->codegen->invalid_inst_gen;
2164622587
21647 ZigType *ref_type = target_value_ptr->value->type;22588 ZigType *ref_type = target_value_ptr->value->type;
21648 assert(ref_type->id == ZigTypeIdPointer);22589 assert(ref_type->id == ZigTypeIdPointer);
...@@ -21653,62 +22594,62 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru...@@ -21653,62 +22594,62 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
21653 assert(enum_type->id == ZigTypeIdEnum);22594 assert(enum_type->id == ZigTypeIdEnum);
21654 assert(instruction->prongs_len > 0);22595 assert(instruction->prongs_len > 0);
2165522596
21656 IrInstruction *first_prong_value = instruction->prongs_ptr[0]->child;22597 IrInstGen *first_prong_value = instruction->prongs_ptr[0]->child;
21657 if (type_is_invalid(first_prong_value->value->type))22598 if (type_is_invalid(first_prong_value->value->type))
21658 return ira->codegen->invalid_instruction;22599 return ira->codegen->invalid_inst_gen;
2165922600
21660 IrInstruction *first_casted_prong_value = ir_implicit_cast(ira, first_prong_value, enum_type);22601 IrInstGen *first_casted_prong_value = ir_implicit_cast(ira, first_prong_value, enum_type);
21661 if (type_is_invalid(first_casted_prong_value->value->type))22602 if (type_is_invalid(first_casted_prong_value->value->type))
21662 return ira->codegen->invalid_instruction;22603 return ira->codegen->invalid_inst_gen;
2166322604
21664 ZigValue *first_prong_val = ir_resolve_const(ira, first_casted_prong_value, UndefBad);22605 ZigValue *first_prong_val = ir_resolve_const(ira, first_casted_prong_value, UndefBad);
21665 if (first_prong_val == nullptr)22606 if (first_prong_val == nullptr)
21666 return ira->codegen->invalid_instruction;22607 return ira->codegen->invalid_inst_gen;
2166722608
21668 TypeUnionField *first_field = find_union_field_by_tag(target_type, &first_prong_val->data.x_enum_tag);22609 TypeUnionField *first_field = find_union_field_by_tag(target_type, &first_prong_val->data.x_enum_tag);
2166922610
21670 ErrorMsg *invalid_payload_msg = nullptr;22611 ErrorMsg *invalid_payload_msg = nullptr;
21671 for (size_t prong_i = 1; prong_i < instruction->prongs_len; prong_i += 1) {22612 for (size_t prong_i = 1; prong_i < instruction->prongs_len; prong_i += 1) {
21672 IrInstruction *this_prong_inst = instruction->prongs_ptr[prong_i]->child;22613 IrInstGen *this_prong_inst = instruction->prongs_ptr[prong_i]->child;
21673 if (type_is_invalid(this_prong_inst->value->type))22614 if (type_is_invalid(this_prong_inst->value->type))
21674 return ira->codegen->invalid_instruction;22615 return ira->codegen->invalid_inst_gen;
2167522616
21676 IrInstruction *this_casted_prong_value = ir_implicit_cast(ira, this_prong_inst, enum_type);22617 IrInstGen *this_casted_prong_value = ir_implicit_cast(ira, this_prong_inst, enum_type);
21677 if (type_is_invalid(this_casted_prong_value->value->type))22618 if (type_is_invalid(this_casted_prong_value->value->type))
21678 return ira->codegen->invalid_instruction;22619 return ira->codegen->invalid_inst_gen;
2167922620
21680 ZigValue *this_prong = ir_resolve_const(ira, this_casted_prong_value, UndefBad);22621 ZigValue *this_prong = ir_resolve_const(ira, this_casted_prong_value, UndefBad);
21681 if (this_prong == nullptr)22622 if (this_prong == nullptr)
21682 return ira->codegen->invalid_instruction;22623 return ira->codegen->invalid_inst_gen;
2168322624
21684 TypeUnionField *payload_field = find_union_field_by_tag(target_type, &this_prong->data.x_enum_tag);22625 TypeUnionField *payload_field = find_union_field_by_tag(target_type, &this_prong->data.x_enum_tag);
21685 ZigType *payload_type = payload_field->type_entry;22626 ZigType *payload_type = payload_field->type_entry;
21686 if (first_field->type_entry != payload_type) {22627 if (first_field->type_entry != payload_type) {
21687 if (invalid_payload_msg == nullptr) {22628 if (invalid_payload_msg == nullptr) {
21688 invalid_payload_msg = ir_add_error(ira, &instruction->base,22629 invalid_payload_msg = ir_add_error(ira, &instruction->base.base,
21689 buf_sprintf("capture group with incompatible types"));22630 buf_sprintf("capture group with incompatible types"));
21690 add_error_note(ira->codegen, invalid_payload_msg, first_prong_value->source_node,22631 add_error_note(ira->codegen, invalid_payload_msg, first_prong_value->base.source_node,
21691 buf_sprintf("type '%s' here", buf_ptr(&first_field->type_entry->name)));22632 buf_sprintf("type '%s' here", buf_ptr(&first_field->type_entry->name)));
21692 }22633 }
21693 add_error_note(ira->codegen, invalid_payload_msg, this_prong_inst->source_node,22634 add_error_note(ira->codegen, invalid_payload_msg, this_prong_inst->base.source_node,
21694 buf_sprintf("type '%s' here", buf_ptr(&payload_field->type_entry->name)));22635 buf_sprintf("type '%s' here", buf_ptr(&payload_field->type_entry->name)));
21695 }22636 }
21696 }22637 }
2169722638
21698 if (invalid_payload_msg != nullptr) {22639 if (invalid_payload_msg != nullptr) {
21699 return ira->codegen->invalid_instruction;22640 return ira->codegen->invalid_inst_gen;
21700 }22641 }
2170122642
21702 if (instr_is_comptime(target_value_ptr)) {22643 if (instr_is_comptime(target_value_ptr)) {
21703 ZigValue *target_val_ptr = ir_resolve_const(ira, target_value_ptr, UndefBad);22644 ZigValue *target_val_ptr = ir_resolve_const(ira, target_value_ptr, UndefBad);
21704 if (!target_value_ptr)22645 if (!target_value_ptr)
21705 return ira->codegen->invalid_instruction;22646 return ira->codegen->invalid_inst_gen;
2170622647
21707 ZigValue *pointee_val = const_ptr_pointee(ira, ira->codegen, target_val_ptr, instruction->base.source_node);22648 ZigValue *pointee_val = const_ptr_pointee(ira, ira->codegen, target_val_ptr, instruction->base.base.source_node);
21708 if (pointee_val == nullptr)22649 if (pointee_val == nullptr)
21709 return ira->codegen->invalid_instruction;22650 return ira->codegen->invalid_inst_gen;
2171022651
21711 IrInstruction *result = ir_const(ira, &instruction->base,22652 IrInstGen *result = ir_const(ira, &instruction->base.base,
21712 get_pointer_to_type(ira->codegen, first_field->type_entry,22653 get_pointer_to_type(ira->codegen, first_field->type_entry,
21713 target_val_ptr->type->data.pointer.is_const));22654 target_val_ptr->type->data.pointer.is_const));
21714 ZigValue *out_val = result->value;22655 ZigValue *out_val = result->value;
...@@ -21718,11 +22659,10 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru...@@ -21718,11 +22659,10 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
21718 return result;22659 return result;
21719 }22660 }
2172022661
21721 IrInstruction *result = ir_build_union_field_ptr(&ira->new_irb,22662 ZigType *result_type = get_pointer_to_type(ira->codegen, first_field->type_entry,
21722 instruction->base.scope, instruction->base.source_node, target_value_ptr, first_field, false, false);
21723 result->value->type = get_pointer_to_type(ira->codegen, first_field->type_entry,
21724 target_value_ptr->value->type->data.pointer.is_const);22663 target_value_ptr->value->type->data.pointer.is_const);
21725 return result;22664 return ir_build_union_field_ptr(ira, &instruction->base.base, target_value_ptr, first_field,
22665 false, false, result_type);
21726 } else if (target_type->id == ZigTypeIdErrorSet) {22666 } else if (target_type->id == ZigTypeIdErrorSet) {
21727 // construct an error set from the prong values22667 // construct an error set from the prong values
21728 ZigType *err_set_type = new_type_table_entry(ZigTypeIdErrorSet);22668 ZigType *err_set_type = new_type_table_entry(ZigTypeIdErrorSet);
...@@ -21735,7 +22675,7 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru...@@ -21735,7 +22675,7 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
21735 for (size_t i = 0; i < instruction->prongs_len; i += 1) {22675 for (size_t i = 0; i < instruction->prongs_len; i += 1) {
21736 ErrorTableEntry *err = ir_resolve_error(ira, instruction->prongs_ptr[i]->child);22676 ErrorTableEntry *err = ir_resolve_error(ira, instruction->prongs_ptr[i]->child);
21737 if (err == nullptr)22677 if (err == nullptr)
21738 return ira->codegen->invalid_instruction;22678 return ira->codegen->invalid_inst_gen;
21739 error_list.append(err);22679 error_list.append(err);
21740 buf_appendf(&err_set_type->name, "%s,", buf_ptr(&err->name));22680 buf_appendf(&err_set_type->name, "%s,", buf_ptr(&err->name));
21741 }22681 }
...@@ -21751,29 +22691,29 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru...@@ -21751,29 +22691,29 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
21751 ref_type->data.pointer.explicit_alignment,22691 ref_type->data.pointer.explicit_alignment,
21752 ref_type->data.pointer.bit_offset_in_host, ref_type->data.pointer.host_int_bytes,22692 ref_type->data.pointer.bit_offset_in_host, ref_type->data.pointer.host_int_bytes,
21753 ref_type->data.pointer.allow_zero);22693 ref_type->data.pointer.allow_zero);
21754 return ir_analyze_ptr_cast(ira, &instruction->base, target_value_ptr, new_target_value_ptr_type,22694 return ir_analyze_ptr_cast(ira, &instruction->base.base, target_value_ptr, new_target_value_ptr_type,
21755 &instruction->base, false);22695 &instruction->base.base, false);
21756 } else {22696 } else {
21757 ir_add_error(ira, &instruction->base,22697 ir_add_error(ira, &instruction->base.base,
21758 buf_sprintf("switch on type '%s' provides no expression parameter", buf_ptr(&target_type->name)));22698 buf_sprintf("switch on type '%s' provides no expression parameter", buf_ptr(&target_type->name)));
21759 return ira->codegen->invalid_instruction;22699 return ira->codegen->invalid_inst_gen;
21760 }22700 }
21761}22701}
2176222702
21763static IrInstruction *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,22703static IrInstGen *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
21764 IrInstructionSwitchElseVar *instruction)22704 IrInstSrcSwitchElseVar *instruction)
21765{22705{
21766 IrInstruction *target_value_ptr = instruction->target_value_ptr->child;22706 IrInstGen *target_value_ptr = instruction->target_value_ptr->child;
21767 if (type_is_invalid(target_value_ptr->value->type))22707 if (type_is_invalid(target_value_ptr->value->type))
21768 return ira->codegen->invalid_instruction;22708 return ira->codegen->invalid_inst_gen;
2176922709
21770 ZigType *ref_type = target_value_ptr->value->type;22710 ZigType *ref_type = target_value_ptr->value->type;
21771 assert(ref_type->id == ZigTypeIdPointer);22711 assert(ref_type->id == ZigTypeIdPointer);
21772 ZigType *target_type = target_value_ptr->value->type->data.pointer.child_type;22712 ZigType *target_type = target_value_ptr->value->type->data.pointer.child_type;
21773 if (target_type->id == ZigTypeIdErrorSet) {22713 if (target_type->id == ZigTypeIdErrorSet) {
21774 // make a new set that has the other cases removed22714 // make a new set that has the other cases removed
21775 if (!resolve_inferred_error_set(ira->codegen, target_type, instruction->base.source_node)) {22715 if (!resolve_inferred_error_set(ira->codegen, target_type, instruction->base.base.source_node)) {
21776 return ira->codegen->invalid_instruction;22716 return ira->codegen->invalid_inst_gen;
21777 }22717 }
21778 if (type_is_global_error_set(target_type)) {22718 if (type_is_global_error_set(target_type)) {
21779 // the type of the else capture variable still has to be the global error set.22719 // the type of the else capture variable still has to be the global error set.
...@@ -21783,17 +22723,17 @@ static IrInstruction *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,...@@ -21783,17 +22723,17 @@ static IrInstruction *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
21783 // Make note of the errors handled by other cases22723 // Make note of the errors handled by other cases
21784 ErrorTableEntry **errors = allocate<ErrorTableEntry *>(ira->codegen->errors_by_index.length);22724 ErrorTableEntry **errors = allocate<ErrorTableEntry *>(ira->codegen->errors_by_index.length);
21785 for (size_t case_i = 0; case_i < instruction->switch_br->case_count; case_i += 1) {22725 for (size_t case_i = 0; case_i < instruction->switch_br->case_count; case_i += 1) {
21786 IrInstructionSwitchBrCase *br_case = &instruction->switch_br->cases[case_i];22726 IrInstSrcSwitchBrCase *br_case = &instruction->switch_br->cases[case_i];
21787 IrInstruction *case_expr = br_case->value->child;22727 IrInstGen *case_expr = br_case->value->child;
21788 if (case_expr->value->type->id == ZigTypeIdErrorSet) {22728 if (case_expr->value->type->id == ZigTypeIdErrorSet) {
21789 ErrorTableEntry *err = ir_resolve_error(ira, case_expr);22729 ErrorTableEntry *err = ir_resolve_error(ira, case_expr);
21790 if (err == nullptr)22730 if (err == nullptr)
21791 return ira->codegen->invalid_instruction;22731 return ira->codegen->invalid_inst_gen;
21792 errors[err->value] = err;22732 errors[err->value] = err;
21793 } else if (case_expr->value->type->id == ZigTypeIdMetaType) {22733 } else if (case_expr->value->type->id == ZigTypeIdMetaType) {
21794 ZigType *err_set_type = ir_resolve_type(ira, case_expr);22734 ZigType *err_set_type = ir_resolve_type(ira, case_expr);
21795 if (type_is_invalid(err_set_type))22735 if (type_is_invalid(err_set_type))
21796 return ira->codegen->invalid_instruction;22736 return ira->codegen->invalid_inst_gen;
21797 populate_error_set_table(errors, err_set_type);22737 populate_error_set_table(errors, err_set_type);
21798 } else {22738 } else {
21799 zig_unreachable();22739 zig_unreachable();
...@@ -21832,27 +22772,22 @@ static IrInstruction *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,...@@ -21832,27 +22772,22 @@ static IrInstruction *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
21832 ref_type->data.pointer.explicit_alignment,22772 ref_type->data.pointer.explicit_alignment,
21833 ref_type->data.pointer.bit_offset_in_host, ref_type->data.pointer.host_int_bytes,22773 ref_type->data.pointer.bit_offset_in_host, ref_type->data.pointer.host_int_bytes,
21834 ref_type->data.pointer.allow_zero);22774 ref_type->data.pointer.allow_zero);
21835 return ir_analyze_ptr_cast(ira, &instruction->base, target_value_ptr, new_target_value_ptr_type,22775 return ir_analyze_ptr_cast(ira, &instruction->base.base, target_value_ptr, new_target_value_ptr_type,
21836 &instruction->base, false);22776 &instruction->base.base, false);
21837 }22777 }
2183822778
21839 return target_value_ptr;22779 return target_value_ptr;
21840}22780}
2184122781
21842static IrInstruction *ir_analyze_instruction_union_tag(IrAnalyze *ira, IrInstructionUnionTag *instruction) {22782static IrInstGen *ir_analyze_instruction_import(IrAnalyze *ira, IrInstSrcImport *import_instruction) {
21843 IrInstruction *value = instruction->value->child;
21844 return ir_analyze_union_tag(ira, &instruction->base, value);
21845}
21846
21847static IrInstruction *ir_analyze_instruction_import(IrAnalyze *ira, IrInstructionImport *import_instruction) {
21848 Error err;22783 Error err;
2184922784
21850 IrInstruction *name_value = import_instruction->name->child;22785 IrInstGen *name_value = import_instruction->name->child;
21851 Buf *import_target_str = ir_resolve_str(ira, name_value);22786 Buf *import_target_str = ir_resolve_str(ira, name_value);
21852 if (!import_target_str)22787 if (!import_target_str)
21853 return ira->codegen->invalid_instruction;22788 return ira->codegen->invalid_inst_gen;
2185422789
21855 AstNode *source_node = import_instruction->base.source_node;22790 AstNode *source_node = import_instruction->base.base.source_node;
21856 ZigType *import = source_node->owner;22791 ZigType *import = source_node->owner;
2185722792
21858 ZigType *target_import;22793 ZigType *target_import;
...@@ -21865,48 +22800,48 @@ static IrInstruction *ir_analyze_instruction_import(IrAnalyze *ira, IrInstructio...@@ -21865,48 +22800,48 @@ static IrInstruction *ir_analyze_instruction_import(IrAnalyze *ira, IrInstructio
21865 ir_add_error_node(ira, source_node,22800 ir_add_error_node(ira, source_node,
21866 buf_sprintf("import of file outside package path: '%s'",22801 buf_sprintf("import of file outside package path: '%s'",
21867 buf_ptr(import_target_path)));22802 buf_ptr(import_target_path)));
21868 return ira->codegen->invalid_instruction;22803 return ira->codegen->invalid_inst_gen;
21869 } else if (err == ErrorFileNotFound) {22804 } else if (err == ErrorFileNotFound) {
21870 ir_add_error_node(ira, source_node,22805 ir_add_error_node(ira, source_node,
21871 buf_sprintf("unable to find '%s'", buf_ptr(import_target_path)));22806 buf_sprintf("unable to find '%s'", buf_ptr(import_target_path)));
21872 return ira->codegen->invalid_instruction;22807 return ira->codegen->invalid_inst_gen;
21873 } else {22808 } else {
21874 ir_add_error_node(ira, source_node,22809 ir_add_error_node(ira, source_node,
21875 buf_sprintf("unable to open '%s': %s", buf_ptr(&full_path), err_str(err)));22810 buf_sprintf("unable to open '%s': %s", buf_ptr(&full_path), err_str(err)));
21876 return ira->codegen->invalid_instruction;22811 return ira->codegen->invalid_inst_gen;
21877 }22812 }
21878 }22813 }
2187922814
21880 return ir_const_type(ira, &import_instruction->base, target_import);22815 return ir_const_type(ira, &import_instruction->base.base, target_import);
21881}22816}
2188222817
21883static IrInstruction *ir_analyze_instruction_ref(IrAnalyze *ira, IrInstructionRef *ref_instruction) {22818static IrInstGen *ir_analyze_instruction_ref(IrAnalyze *ira, IrInstSrcRef *ref_instruction) {
21884 IrInstruction *value = ref_instruction->value->child;22819 IrInstGen *value = ref_instruction->value->child;
21885 if (type_is_invalid(value->value->type))22820 if (type_is_invalid(value->value->type))
21886 return ira->codegen->invalid_instruction;22821 return ira->codegen->invalid_inst_gen;
21887 return ir_get_ref(ira, &ref_instruction->base, value, ref_instruction->is_const, ref_instruction->is_volatile);22822 return ir_get_ref(ira, &ref_instruction->base.base, value, ref_instruction->is_const, ref_instruction->is_volatile);
21888}22823}
2188922824
21890static IrInstruction *ir_analyze_union_init(IrAnalyze *ira, IrInstruction *source_instruction,22825static IrInstGen *ir_analyze_union_init(IrAnalyze *ira, IrInst* source_instruction,
21891 AstNode *field_source_node, ZigType *union_type, Buf *field_name, IrInstruction *field_result_loc,22826 AstNode *field_source_node, ZigType *union_type, Buf *field_name, IrInstGen *field_result_loc,
21892 IrInstruction *result_loc)22827 IrInstGen *result_loc)
21893{22828{
21894 Error err;22829 Error err;
21895 assert(union_type->id == ZigTypeIdUnion);22830 assert(union_type->id == ZigTypeIdUnion);
2189622831
21897 if ((err = type_resolve(ira->codegen, union_type, ResolveStatusSizeKnown)))22832 if ((err = type_resolve(ira->codegen, union_type, ResolveStatusSizeKnown)))
21898 return ira->codegen->invalid_instruction;22833 return ira->codegen->invalid_inst_gen;
2189922834
21900 TypeUnionField *type_field = find_union_type_field(union_type, field_name);22835 TypeUnionField *type_field = find_union_type_field(union_type, field_name);
21901 if (type_field == nullptr) {22836 if (type_field == nullptr) {
21902 ir_add_error_node(ira, field_source_node,22837 ir_add_error_node(ira, field_source_node,
21903 buf_sprintf("no member named '%s' in union '%s'",22838 buf_sprintf("no member named '%s' in union '%s'",
21904 buf_ptr(field_name), buf_ptr(&union_type->name)));22839 buf_ptr(field_name), buf_ptr(&union_type->name)));
21905 return ira->codegen->invalid_instruction;22840 return ira->codegen->invalid_inst_gen;
21906 }22841 }
2190722842
21908 if (type_is_invalid(type_field->type_entry))22843 if (type_is_invalid(type_field->type_entry))
21909 return ira->codegen->invalid_instruction;22844 return ira->codegen->invalid_inst_gen;
2191022845
21911 if (result_loc->value->data.x_ptr.mut == ConstPtrMutInfer) {22846 if (result_loc->value->data.x_ptr.mut == ConstPtrMutInfer) {
21912 if (instr_is_comptime(field_result_loc) &&22847 if (instr_is_comptime(field_result_loc) &&
...@@ -21918,42 +22853,42 @@ static IrInstruction *ir_analyze_union_init(IrAnalyze *ira, IrInstruction *sourc...@@ -21918,42 +22853,42 @@ static IrInstruction *ir_analyze_union_init(IrAnalyze *ira, IrInstruction *sourc
21918 }22853 }
21919 }22854 }
2192022855
21921 bool is_comptime = ir_should_inline(ira->new_irb.exec, source_instruction->scope)22856 bool is_comptime = ir_should_inline(ira->old_irb.exec, source_instruction->scope)
21922 || type_requires_comptime(ira->codegen, union_type) == ReqCompTimeYes;22857 || type_requires_comptime(ira->codegen, union_type) == ReqCompTimeYes;
2192322858
21924 IrInstruction *result = ir_get_deref(ira, source_instruction, result_loc, nullptr);22859 IrInstGen *result = ir_get_deref(ira, source_instruction, result_loc, nullptr);
21925 if (is_comptime && !instr_is_comptime(result)) {22860 if (is_comptime && !instr_is_comptime(result)) {
21926 ir_add_error(ira, field_result_loc,22861 ir_add_error(ira, &field_result_loc->base,
21927 buf_sprintf("unable to evaluate constant expression"));22862 buf_sprintf("unable to evaluate constant expression"));
21928 return ira->codegen->invalid_instruction;22863 return ira->codegen->invalid_inst_gen;
21929 }22864 }
21930 return result;22865 return result;
21931}22866}
2193222867
21933static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruction *instruction,22868static IrInstGen *ir_analyze_container_init_fields(IrAnalyze *ira, IrInst *source_instr,
21934 ZigType *container_type, size_t instr_field_count, IrInstructionContainerInitFieldsField *fields,22869 ZigType *container_type, size_t instr_field_count, IrInstSrcContainerInitFieldsField *fields,
21935 IrInstruction *result_loc)22870 IrInstGen *result_loc)
21936{22871{
21937 Error err;22872 Error err;
21938 if (container_type->id == ZigTypeIdUnion) {22873 if (container_type->id == ZigTypeIdUnion) {
21939 if (instr_field_count != 1) {22874 if (instr_field_count != 1) {
21940 ir_add_error(ira, instruction,22875 ir_add_error(ira, source_instr,
21941 buf_sprintf("union initialization expects exactly one field"));22876 buf_sprintf("union initialization expects exactly one field"));
21942 return ira->codegen->invalid_instruction;22877 return ira->codegen->invalid_inst_gen;
21943 }22878 }
21944 IrInstructionContainerInitFieldsField *field = &fields[0];22879 IrInstSrcContainerInitFieldsField *field = &fields[0];
21945 IrInstruction *field_result_loc = field->result_loc->child;22880 IrInstGen *field_result_loc = field->result_loc->child;
21946 if (type_is_invalid(field_result_loc->value->type))22881 if (type_is_invalid(field_result_loc->value->type))
21947 return ira->codegen->invalid_instruction;22882 return ira->codegen->invalid_inst_gen;
2194822883
21949 return ir_analyze_union_init(ira, instruction, field->source_node, container_type, field->name,22884 return ir_analyze_union_init(ira, source_instr, field->source_node, container_type, field->name,
21950 field_result_loc, result_loc);22885 field_result_loc, result_loc);
21951 }22886 }
21952 if (container_type->id != ZigTypeIdStruct || is_slice(container_type)) {22887 if (container_type->id != ZigTypeIdStruct || is_slice(container_type)) {
21953 ir_add_error(ira, instruction,22888 ir_add_error(ira, source_instr,
21954 buf_sprintf("type '%s' does not support struct initialization syntax",22889 buf_sprintf("type '%s' does not support struct initialization syntax",
21955 buf_ptr(&container_type->name)));22890 buf_ptr(&container_type->name)));
21956 return ira->codegen->invalid_instruction;22891 return ira->codegen->invalid_inst_gen;
21957 }22892 }
2195822893
21959 if (container_type->data.structure.resolve_status == ResolveStatusBeingInferred) {22894 if (container_type->data.structure.resolve_status == ResolveStatusBeingInferred) {
...@@ -21962,16 +22897,16 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc...@@ -21962,16 +22897,16 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
21962 }22897 }
2196322898
21964 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))22899 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
21965 return ira->codegen->invalid_instruction;22900 return ira->codegen->invalid_inst_gen;
2196622901
21967 size_t actual_field_count = container_type->data.structure.src_field_count;22902 size_t actual_field_count = container_type->data.structure.src_field_count;
2196822903
21969 IrInstruction *first_non_const_instruction = nullptr;22904 IrInstGen *first_non_const_instruction = nullptr;
2197022905
21971 AstNode **field_assign_nodes = allocate<AstNode *>(actual_field_count);22906 AstNode **field_assign_nodes = allocate<AstNode *>(actual_field_count);
21972 ZigList<IrInstruction *> const_ptrs = {};22907 ZigList<IrInstGen *> const_ptrs = {};
2197322908
21974 bool is_comptime = ir_should_inline(ira->new_irb.exec, instruction->scope)22909 bool is_comptime = ir_should_inline(ira->old_irb.exec, source_instr->scope)
21975 || type_requires_comptime(ira->codegen, container_type) == ReqCompTimeYes;22910 || type_requires_comptime(ira->codegen, container_type) == ReqCompTimeYes;
2197622911
2197722912
...@@ -21987,29 +22922,29 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc...@@ -21987,29 +22922,29 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
21987 // comptime-known values.22922 // comptime-known values.
2198822923
21989 for (size_t i = 0; i < instr_field_count; i += 1) {22924 for (size_t i = 0; i < instr_field_count; i += 1) {
21990 IrInstructionContainerInitFieldsField *field = &fields[i];22925 IrInstSrcContainerInitFieldsField *field = &fields[i];
2199122926
21992 IrInstruction *field_result_loc = field->result_loc->child;22927 IrInstGen *field_result_loc = field->result_loc->child;
21993 if (type_is_invalid(field_result_loc->value->type))22928 if (type_is_invalid(field_result_loc->value->type))
21994 return ira->codegen->invalid_instruction;22929 return ira->codegen->invalid_inst_gen;
2199522930
21996 TypeStructField *type_field = find_struct_type_field(container_type, field->name);22931 TypeStructField *type_field = find_struct_type_field(container_type, field->name);
21997 if (!type_field) {22932 if (!type_field) {
21998 ir_add_error_node(ira, field->source_node,22933 ir_add_error_node(ira, field->source_node,
21999 buf_sprintf("no member named '%s' in struct '%s'",22934 buf_sprintf("no member named '%s' in struct '%s'",
22000 buf_ptr(field->name), buf_ptr(&container_type->name)));22935 buf_ptr(field->name), buf_ptr(&container_type->name)));
22001 return ira->codegen->invalid_instruction;22936 return ira->codegen->invalid_inst_gen;
22002 }22937 }
2200322938
22004 if (type_is_invalid(type_field->type_entry))22939 if (type_is_invalid(type_field->type_entry))
22005 return ira->codegen->invalid_instruction;22940 return ira->codegen->invalid_inst_gen;
2200622941
22007 size_t field_index = type_field->src_index;22942 size_t field_index = type_field->src_index;
22008 AstNode *existing_assign_node = field_assign_nodes[field_index];22943 AstNode *existing_assign_node = field_assign_nodes[field_index];
22009 if (existing_assign_node) {22944 if (existing_assign_node) {
22010 ErrorMsg *msg = ir_add_error_node(ira, field->source_node, buf_sprintf("duplicate field"));22945 ErrorMsg *msg = ir_add_error_node(ira, field->source_node, buf_sprintf("duplicate field"));
22011 add_error_note(ira->codegen, msg, existing_assign_node, buf_sprintf("other field here"));22946 add_error_note(ira->codegen, msg, existing_assign_node, buf_sprintf("other field here"));
22012 return ira->codegen->invalid_instruction;22947 return ira->codegen->invalid_inst_gen;
22013 }22948 }
22014 field_assign_nodes[field_index] = field->source_node;22949 field_assign_nodes[field_index] = field->source_node;
2201522950
...@@ -22030,20 +22965,20 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc...@@ -22030,20 +22965,20 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
22030 TypeStructField *field = container_type->data.structure.fields[i];22965 TypeStructField *field = container_type->data.structure.fields[i];
22031 memoize_field_init_val(ira->codegen, container_type, field);22966 memoize_field_init_val(ira->codegen, container_type, field);
22032 if (field->init_val == nullptr) {22967 if (field->init_val == nullptr) {
22033 ir_add_error_node(ira, instruction->source_node,22968 ir_add_error(ira, source_instr,
22034 buf_sprintf("missing field: '%s'", buf_ptr(container_type->data.structure.fields[i]->name)));22969 buf_sprintf("missing field: '%s'", buf_ptr(container_type->data.structure.fields[i]->name)));
22035 any_missing = true;22970 any_missing = true;
22036 continue;22971 continue;
22037 }22972 }
22038 if (type_is_invalid(field->init_val->type))22973 if (type_is_invalid(field->init_val->type))
22039 return ira->codegen->invalid_instruction;22974 return ira->codegen->invalid_inst_gen;
2204022975
22041 IrInstruction *runtime_inst = ir_const(ira, instruction, field->init_val->type);22976 IrInstGen *runtime_inst = ir_const(ira, source_instr, field->init_val->type);
22042 copy_const_val(runtime_inst->value, field->init_val);22977 copy_const_val(runtime_inst->value, field->init_val);
2204322978
22044 IrInstruction *field_ptr = ir_analyze_struct_field_ptr(ira, instruction, field, result_loc,22979 IrInstGen *field_ptr = ir_analyze_struct_field_ptr(ira, source_instr, field, result_loc,
22045 container_type, true);22980 container_type, true);
22046 ir_analyze_store_ptr(ira, instruction, field_ptr, runtime_inst, false);22981 ir_analyze_store_ptr(ira, source_instr, field_ptr, runtime_inst, false);
22047 if (instr_is_comptime(field_ptr) && field_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {22982 if (instr_is_comptime(field_ptr) && field_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
22048 const_ptrs.append(field_ptr);22983 const_ptrs.append(field_ptr);
22049 } else {22984 } else {
...@@ -22051,39 +22986,39 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc...@@ -22051,39 +22986,39 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
22051 }22986 }
22052 }22987 }
22053 if (any_missing)22988 if (any_missing)
22054 return ira->codegen->invalid_instruction;22989 return ira->codegen->invalid_inst_gen;
2205522990
22056 if (result_loc->value->data.x_ptr.mut == ConstPtrMutInfer) {22991 if (result_loc->value->data.x_ptr.mut == ConstPtrMutInfer) {
22057 if (const_ptrs.length != actual_field_count) {22992 if (const_ptrs.length != actual_field_count) {
22058 result_loc->value->special = ConstValSpecialRuntime;22993 result_loc->value->special = ConstValSpecialRuntime;
22059 for (size_t i = 0; i < const_ptrs.length; i += 1) {22994 for (size_t i = 0; i < const_ptrs.length; i += 1) {
22060 IrInstruction *field_result_loc = const_ptrs.at(i);22995 IrInstGen *field_result_loc = const_ptrs.at(i);
22061 IrInstruction *deref = ir_get_deref(ira, field_result_loc, field_result_loc, nullptr);22996 IrInstGen *deref = ir_get_deref(ira, &field_result_loc->base, field_result_loc, nullptr);
22062 field_result_loc->value->special = ConstValSpecialRuntime;22997 field_result_loc->value->special = ConstValSpecialRuntime;
22063 ir_analyze_store_ptr(ira, field_result_loc, field_result_loc, deref, false);22998 ir_analyze_store_ptr(ira, &field_result_loc->base, field_result_loc, deref, false);
22064 }22999 }
22065 }23000 }
22066 }23001 }
2206723002
22068 IrInstruction *result = ir_get_deref(ira, instruction, result_loc, nullptr);23003 IrInstGen *result = ir_get_deref(ira, source_instr, result_loc, nullptr);
2206923004
22070 if (is_comptime && !instr_is_comptime(result)) {23005 if (is_comptime && !instr_is_comptime(result)) {
22071 ir_add_error_node(ira, first_non_const_instruction->source_node,23006 ir_add_error_node(ira, first_non_const_instruction->base.source_node,
22072 buf_sprintf("unable to evaluate constant expression"));23007 buf_sprintf("unable to evaluate constant expression"));
22073 return ira->codegen->invalid_instruction;23008 return ira->codegen->invalid_inst_gen;
22074 }23009 }
2207523010
22076 return result;23011 return result;
22077}23012}
2207823013
22079static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,23014static IrInstGen *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
22080 IrInstructionContainerInitList *instruction)23015 IrInstSrcContainerInitList *instruction)
22081{23016{
22082 ir_assert(instruction->result_loc != nullptr, &instruction->base);23017 ir_assert(instruction->result_loc != nullptr, &instruction->base.base);
22083 IrInstruction *result_loc = instruction->result_loc->child;23018 IrInstGen *result_loc = instruction->result_loc->child;
22084 if (type_is_invalid(result_loc->value->type))23019 if (type_is_invalid(result_loc->value->type))
22085 return result_loc;23020 return result_loc;
22086 ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base);23021 ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base.base);
2208723022
22088 ZigType *container_type = result_loc->value->type->data.pointer.child_type;23023 ZigType *container_type = result_loc->value->type->data.pointer.child_type;
2208923024
...@@ -22093,24 +23028,24 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,...@@ -22093,24 +23028,24 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
22093 ir_add_error_node(ira, instruction->init_array_type_source_node,23028 ir_add_error_node(ira, instruction->init_array_type_source_node,
22094 buf_sprintf("array literal requires address-of operator to coerce to slice type '%s'",23029 buf_sprintf("array literal requires address-of operator to coerce to slice type '%s'",
22095 buf_ptr(&container_type->name)));23030 buf_ptr(&container_type->name)));
22096 return ira->codegen->invalid_instruction;23031 return ira->codegen->invalid_inst_gen;
22097 }23032 }
2209823033
22099 if (container_type->id == ZigTypeIdVoid) {23034 if (container_type->id == ZigTypeIdVoid) {
22100 if (elem_count != 0) {23035 if (elem_count != 0) {
22101 ir_add_error_node(ira, instruction->base.source_node,23036 ir_add_error_node(ira, instruction->base.base.source_node,
22102 buf_sprintf("void expression expects no arguments"));23037 buf_sprintf("void expression expects no arguments"));
22103 return ira->codegen->invalid_instruction;23038 return ira->codegen->invalid_inst_gen;
22104 }23039 }
22105 return ir_const_void(ira, &instruction->base);23040 return ir_const_void(ira, &instruction->base.base);
22106 }23041 }
2210723042
22108 if (container_type->id == ZigTypeIdStruct && elem_count == 0) {23043 if (container_type->id == ZigTypeIdStruct && elem_count == 0) {
22109 ir_assert(instruction->result_loc != nullptr, &instruction->base);23044 ir_assert(instruction->result_loc != nullptr, &instruction->base.base);
22110 IrInstruction *result_loc = instruction->result_loc->child;23045 IrInstGen *result_loc = instruction->result_loc->child;
22111 if (type_is_invalid(result_loc->value->type))23046 if (type_is_invalid(result_loc->value->type))
22112 return result_loc;23047 return result_loc;
22113 return ir_analyze_container_init_fields(ira, &instruction->base, container_type, 0, nullptr, result_loc);23048 return ir_analyze_container_init_fields(ira, &instruction->base.base, container_type, 0, nullptr, result_loc);
22114 }23049 }
2211523050
22116 if (container_type->id == ZigTypeIdArray) {23051 if (container_type->id == ZigTypeIdArray) {
...@@ -22118,10 +23053,10 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,...@@ -22118,10 +23053,10 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
22118 if (container_type->data.array.len != elem_count) {23053 if (container_type->data.array.len != elem_count) {
22119 ZigType *literal_type = get_array_type(ira->codegen, child_type, elem_count, nullptr);23054 ZigType *literal_type = get_array_type(ira->codegen, child_type, elem_count, nullptr);
2212023055
22121 ir_add_error(ira, &instruction->base,23056 ir_add_error(ira, &instruction->base.base,
22122 buf_sprintf("expected %s literal, found %s literal",23057 buf_sprintf("expected %s literal, found %s literal",
22123 buf_ptr(&container_type->name), buf_ptr(&literal_type->name)));23058 buf_ptr(&container_type->name), buf_ptr(&literal_type->name)));
22124 return ira->codegen->invalid_instruction;23059 return ira->codegen->invalid_inst_gen;
22125 }23060 }
22126 } else if (container_type->id == ZigTypeIdStruct &&23061 } else if (container_type->id == ZigTypeIdStruct &&
22127 container_type->data.structure.resolve_status == ResolveStatusBeingInferred)23062 container_type->data.structure.resolve_status == ResolveStatusBeingInferred)
...@@ -22131,17 +23066,17 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,...@@ -22131,17 +23066,17 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
22131 } else if (container_type->id == ZigTypeIdVector) {23066 } else if (container_type->id == ZigTypeIdVector) {
22132 // OK23067 // OK
22133 } else {23068 } else {
22134 ir_add_error_node(ira, instruction->base.source_node,23069 ir_add_error(ira, &instruction->base.base,
22135 buf_sprintf("type '%s' does not support array initialization",23070 buf_sprintf("type '%s' does not support array initialization",
22136 buf_ptr(&container_type->name)));23071 buf_ptr(&container_type->name)));
22137 return ira->codegen->invalid_instruction;23072 return ira->codegen->invalid_inst_gen;
22138 }23073 }
2213923074
22140 switch (type_has_one_possible_value(ira->codegen, container_type)) {23075 switch (type_has_one_possible_value(ira->codegen, container_type)) {
22141 case OnePossibleValueInvalid:23076 case OnePossibleValueInvalid:
22142 return ira->codegen->invalid_instruction;23077 return ira->codegen->invalid_inst_gen;
22143 case OnePossibleValueYes:23078 case OnePossibleValueYes:
22144 return ir_const_move(ira, &instruction->base,23079 return ir_const_move(ira, &instruction->base.base,
22145 get_the_one_possible_value(ira->codegen, container_type));23080 get_the_one_possible_value(ira->codegen, container_type));
22146 case OnePossibleValueNo:23081 case OnePossibleValueNo:
22147 break;23082 break;
...@@ -22150,16 +23085,16 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,...@@ -22150,16 +23085,16 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
22150 bool is_comptime;23085 bool is_comptime;
22151 switch (type_requires_comptime(ira->codegen, container_type)) {23086 switch (type_requires_comptime(ira->codegen, container_type)) {
22152 case ReqCompTimeInvalid:23087 case ReqCompTimeInvalid:
22153 return ira->codegen->invalid_instruction;23088 return ira->codegen->invalid_inst_gen;
22154 case ReqCompTimeNo:23089 case ReqCompTimeNo:
22155 is_comptime = ir_should_inline(ira->new_irb.exec, instruction->base.scope);23090 is_comptime = ir_should_inline(ira->old_irb.exec, instruction->base.base.scope);
22156 break;23091 break;
22157 case ReqCompTimeYes:23092 case ReqCompTimeYes:
22158 is_comptime = true;23093 is_comptime = true;
22159 break;23094 break;
22160 }23095 }
2216123096
22162 IrInstruction *first_non_const_instruction = nullptr;23097 IrInstGen *first_non_const_instruction = nullptr;
2216323098
22164 // The Result Location Mechanism has already emitted runtime instructions to23099 // The Result Location Mechanism has already emitted runtime instructions to
22165 // initialize runtime elements and has omitted instructions for the comptime23100 // initialize runtime elements and has omitted instructions for the comptime
...@@ -22168,12 +23103,12 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,...@@ -22168,12 +23103,12 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
22168 // array initialization can be a comptime value, overwrite ConstPtrMutInfer with23103 // array initialization can be a comptime value, overwrite ConstPtrMutInfer with
22169 // ConstPtrMutComptimeConst. Otherwise, emit instructions to runtime-initialize the23104 // ConstPtrMutComptimeConst. Otherwise, emit instructions to runtime-initialize the
22170 // elements that have comptime-known values.23105 // elements that have comptime-known values.
22171 ZigList<IrInstruction *> const_ptrs = {};23106 ZigList<IrInstGen *> const_ptrs = {};
2217223107
22173 for (size_t i = 0; i < elem_count; i += 1) {23108 for (size_t i = 0; i < elem_count; i += 1) {
22174 IrInstruction *elem_result_loc = instruction->elem_result_loc_list[i]->child;23109 IrInstGen *elem_result_loc = instruction->elem_result_loc_list[i]->child;
22175 if (type_is_invalid(elem_result_loc->value->type))23110 if (type_is_invalid(elem_result_loc->value->type))
22176 return ira->codegen->invalid_instruction;23111 return ira->codegen->invalid_inst_gen;
2217723112
22178 assert(elem_result_loc->value->type->id == ZigTypeIdPointer);23113 assert(elem_result_loc->value->type->id == ZigTypeIdPointer);
2217923114
...@@ -22190,81 +23125,79 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,...@@ -22190,81 +23125,79 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
22190 if (const_ptrs.length != elem_count) {23125 if (const_ptrs.length != elem_count) {
22191 result_loc->value->special = ConstValSpecialRuntime;23126 result_loc->value->special = ConstValSpecialRuntime;
22192 for (size_t i = 0; i < const_ptrs.length; i += 1) {23127 for (size_t i = 0; i < const_ptrs.length; i += 1) {
22193 IrInstruction *elem_result_loc = const_ptrs.at(i);23128 IrInstGen *elem_result_loc = const_ptrs.at(i);
22194 assert(elem_result_loc->value->special == ConstValSpecialStatic);23129 assert(elem_result_loc->value->special == ConstValSpecialStatic);
22195 if (elem_result_loc->value->type->data.pointer.inferred_struct_field != nullptr) {23130 if (elem_result_loc->value->type->data.pointer.inferred_struct_field != nullptr) {
22196 // This field will be generated comptime; no need to do this.23131 // This field will be generated comptime; no need to do this.
22197 continue;23132 continue;
22198 }23133 }
22199 IrInstruction *deref = ir_get_deref(ira, elem_result_loc, elem_result_loc, nullptr);23134 IrInstGen *deref = ir_get_deref(ira, &elem_result_loc->base, elem_result_loc, nullptr);
22200 elem_result_loc->value->special = ConstValSpecialRuntime;23135 elem_result_loc->value->special = ConstValSpecialRuntime;
22201 ir_analyze_store_ptr(ira, elem_result_loc, elem_result_loc, deref, false);23136 ir_analyze_store_ptr(ira, &elem_result_loc->base, elem_result_loc, deref, false);
22202 }23137 }
22203 }23138 }
22204 }23139 }
2220523140
22206 IrInstruction *result = ir_get_deref(ira, &instruction->base, result_loc, nullptr);23141 IrInstGen *result = ir_get_deref(ira, &instruction->base.base, result_loc, nullptr);
22207 if (instr_is_comptime(result))23142 if (instr_is_comptime(result))
22208 return result;23143 return result;
2220923144
22210 if (is_comptime) {23145 if (is_comptime) {
22211 ir_add_error_node(ira, first_non_const_instruction->source_node,23146 ir_add_error(ira, &first_non_const_instruction->base,
22212 buf_sprintf("unable to evaluate constant expression"));23147 buf_sprintf("unable to evaluate constant expression"));
22213 return ira->codegen->invalid_instruction;23148 return ira->codegen->invalid_inst_gen;
22214 }23149 }
2221523150
22216 ZigType *result_elem_type = result_loc->value->type->data.pointer.child_type;23151 ZigType *result_elem_type = result_loc->value->type->data.pointer.child_type;
22217 if (is_slice(result_elem_type)) {23152 if (is_slice(result_elem_type)) {
22218 ErrorMsg *msg = ir_add_error(ira, &instruction->base,23153 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
22219 buf_sprintf("runtime-initialized array cannot be casted to slice type '%s'",23154 buf_sprintf("runtime-initialized array cannot be casted to slice type '%s'",
22220 buf_ptr(&result_elem_type->name)));23155 buf_ptr(&result_elem_type->name)));
22221 add_error_note(ira->codegen, msg, first_non_const_instruction->source_node,23156 add_error_note(ira->codegen, msg, first_non_const_instruction->base.source_node,
22222 buf_sprintf("this value is not comptime-known"));23157 buf_sprintf("this value is not comptime-known"));
22223 return ira->codegen->invalid_instruction;23158 return ira->codegen->invalid_inst_gen;
22224 }23159 }
22225 return result;23160 return result;
22226}23161}
2222723162
22228static IrInstruction *ir_analyze_instruction_container_init_fields(IrAnalyze *ira,23163static IrInstGen *ir_analyze_instruction_container_init_fields(IrAnalyze *ira,
22229 IrInstructionContainerInitFields *instruction)23164 IrInstSrcContainerInitFields *instruction)
22230{23165{
22231 ir_assert(instruction->result_loc != nullptr, &instruction->base);23166 ir_assert(instruction->result_loc != nullptr, &instruction->base.base);
22232 IrInstruction *result_loc = instruction->result_loc->child;23167 IrInstGen *result_loc = instruction->result_loc->child;
22233 if (type_is_invalid(result_loc->value->type))23168 if (type_is_invalid(result_loc->value->type))
22234 return result_loc;23169 return result_loc;
2223523170
22236 ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base);23171 ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base.base);
22237 ZigType *container_type = result_loc->value->type->data.pointer.child_type;23172 ZigType *container_type = result_loc->value->type->data.pointer.child_type;
2223823173
22239 return ir_analyze_container_init_fields(ira, &instruction->base, container_type,23174 return ir_analyze_container_init_fields(ira, &instruction->base.base, container_type,
22240 instruction->field_count, instruction->fields, result_loc);23175 instruction->field_count, instruction->fields, result_loc);
22241}23176}
2224223177
22243static IrInstruction *ir_analyze_instruction_compile_err(IrAnalyze *ira,23178static IrInstGen *ir_analyze_instruction_compile_err(IrAnalyze *ira, IrInstSrcCompileErr *instruction) {
22244 IrInstructionCompileErr *instruction)23179 IrInstGen *msg_value = instruction->msg->child;
22245{
22246 IrInstruction *msg_value = instruction->msg->child;
22247 Buf *msg_buf = ir_resolve_str(ira, msg_value);23180 Buf *msg_buf = ir_resolve_str(ira, msg_value);
22248 if (!msg_buf)23181 if (!msg_buf)
22249 return ira->codegen->invalid_instruction;23182 return ira->codegen->invalid_inst_gen;
2225023183
22251 ir_add_error(ira, &instruction->base, msg_buf);23184 ir_add_error(ira, &instruction->base.base, msg_buf);
2225223185
22253 return ira->codegen->invalid_instruction;23186 return ira->codegen->invalid_inst_gen;
22254}23187}
2225523188
22256static IrInstruction *ir_analyze_instruction_compile_log(IrAnalyze *ira, IrInstructionCompileLog *instruction) {23189static IrInstGen *ir_analyze_instruction_compile_log(IrAnalyze *ira, IrInstSrcCompileLog *instruction) {
22257 Buf buf = BUF_INIT;23190 Buf buf = BUF_INIT;
22258 fprintf(stderr, "| ");23191 fprintf(stderr, "| ");
22259 for (size_t i = 0; i < instruction->msg_count; i += 1) {23192 for (size_t i = 0; i < instruction->msg_count; i += 1) {
22260 IrInstruction *msg = instruction->msg_list[i]->child;23193 IrInstGen *msg = instruction->msg_list[i]->child;
22261 if (type_is_invalid(msg->value->type))23194 if (type_is_invalid(msg->value->type))
22262 return ira->codegen->invalid_instruction;23195 return ira->codegen->invalid_inst_gen;
22263 buf_resize(&buf, 0);23196 buf_resize(&buf, 0);
22264 if (msg->value->special == ConstValSpecialLazy) {23197 if (msg->value->special == ConstValSpecialLazy) {
22265 // Resolve any lazy value that's passed, we need its value23198 // Resolve any lazy value that's passed, we need its value
22266 if (ir_resolve_lazy(ira->codegen, msg->source_node, msg->value))23199 if (ir_resolve_lazy(ira->codegen, msg->base.source_node, msg->value))
22267 return ira->codegen->invalid_instruction;23200 return ira->codegen->invalid_inst_gen;
22268 }23201 }
22269 render_const_value(ira->codegen, &buf, msg->value);23202 render_const_value(ira->codegen, &buf, msg->value);
22270 const char *comma_str = (i != 0) ? ", " : "";23203 const char *comma_str = (i != 0) ? ", " : "";
...@@ -22272,25 +23205,25 @@ static IrInstruction *ir_analyze_instruction_compile_log(IrAnalyze *ira, IrInstr...@@ -22272,25 +23205,25 @@ static IrInstruction *ir_analyze_instruction_compile_log(IrAnalyze *ira, IrInstr
22272 }23205 }
22273 fprintf(stderr, "\n");23206 fprintf(stderr, "\n");
2227423207
22275 auto *expr = &instruction->base.source_node->data.fn_call_expr;23208 auto *expr = &instruction->base.base.source_node->data.fn_call_expr;
22276 if (!expr->seen) {23209 if (!expr->seen) {
22277 // Here we bypass higher level functions such as ir_add_error because we do not want23210 // Here we bypass higher level functions such as ir_add_error because we do not want
22278 // invalidate_exec to be called.23211 // invalidate_exec to be called.
22279 add_node_error(ira->codegen, instruction->base.source_node, buf_sprintf("found compile log statement"));23212 add_node_error(ira->codegen, instruction->base.base.source_node, buf_sprintf("found compile log statement"));
22280 }23213 }
22281 expr->seen = true;23214 expr->seen = true;
2228223215
22283 return ir_const_void(ira, &instruction->base);23216 return ir_const_void(ira, &instruction->base.base);
22284}23217}
2228523218
22286static IrInstruction *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstructionErrName *instruction) {23219static IrInstGen *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstSrcErrName *instruction) {
22287 IrInstruction *value = instruction->value->child;23220 IrInstGen *value = instruction->value->child;
22288 if (type_is_invalid(value->value->type))23221 if (type_is_invalid(value->value->type))
22289 return ira->codegen->invalid_instruction;23222 return ira->codegen->invalid_inst_gen;
2229023223
22291 IrInstruction *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_global_error_set);23224 IrInstGen *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_global_error_set);
22292 if (type_is_invalid(casted_value->value->type))23225 if (type_is_invalid(casted_value->value->type))
22293 return ira->codegen->invalid_instruction;23226 return ira->codegen->invalid_inst_gen;
2229423227
22295 ZigType *u8_ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,23228 ZigType *u8_ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
22296 true, false, PtrLenUnknown, 0, 0, 0, false);23229 true, false, PtrLenUnknown, 0, 0, 0, false);
...@@ -22298,13 +23231,13 @@ static IrInstruction *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstruct...@@ -22298,13 +23231,13 @@ static IrInstruction *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstruct
22298 if (instr_is_comptime(casted_value)) {23231 if (instr_is_comptime(casted_value)) {
22299 ZigValue *val = ir_resolve_const(ira, casted_value, UndefBad);23232 ZigValue *val = ir_resolve_const(ira, casted_value, UndefBad);
22300 if (val == nullptr)23233 if (val == nullptr)
22301 return ira->codegen->invalid_instruction;23234 return ira->codegen->invalid_inst_gen;
22302 ErrorTableEntry *err = casted_value->value->data.x_err_set;23235 ErrorTableEntry *err = casted_value->value->data.x_err_set;
22303 if (!err->cached_error_name_val) {23236 if (!err->cached_error_name_val) {
22304 ZigValue *array_val = create_const_str_lit(ira->codegen, &err->name)->data.x_ptr.data.ref.pointee;23237 ZigValue *array_val = create_const_str_lit(ira->codegen, &err->name)->data.x_ptr.data.ref.pointee;
22305 err->cached_error_name_val = create_const_slice(ira->codegen, array_val, 0, buf_len(&err->name), true);23238 err->cached_error_name_val = create_const_slice(ira->codegen, array_val, 0, buf_len(&err->name), true);
22306 }23239 }
22307 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);23240 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
22308 copy_const_val(result->value, err->cached_error_name_val);23241 copy_const_val(result->value, err->cached_error_name_val);
22309 result->value->type = str_type;23242 result->value->type = str_type;
22310 return result;23243 return result;
...@@ -22312,79 +23245,106 @@ static IrInstruction *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstruct...@@ -22312,79 +23245,106 @@ static IrInstruction *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstruct
2231223245
22313 ira->codegen->generate_error_name_table = true;23246 ira->codegen->generate_error_name_table = true;
2231423247
22315 IrInstruction *result = ir_build_err_name(&ira->new_irb,23248 return ir_build_err_name_gen(ira, &instruction->base.base, value, str_type);
22316 instruction->base.scope, instruction->base.source_node, value);
22317 result->value->type = str_type;
22318 return result;
22319}23249}
2232023250
22321static IrInstruction *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrInstructionTagName *instruction) {23251static IrInstGen *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrInstSrcTagName *instruction) {
22322 Error err;23252 Error err;
22323 IrInstruction *target = instruction->target->child;23253 IrInstGen *target = instruction->target->child;
22324 if (type_is_invalid(target->value->type))23254 if (type_is_invalid(target->value->type))
22325 return ira->codegen->invalid_instruction;23255 return ira->codegen->invalid_inst_gen;
23256
23257 if (target->value->type->id == ZigTypeIdEnumLiteral) {
23258 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
23259 Buf *field_name = target->value->data.x_enum_literal;
23260 ZigValue *array_val = create_const_str_lit(ira->codegen, field_name)->data.x_ptr.data.ref.pointee;
23261 init_const_slice(ira->codegen, result->value, array_val, 0, buf_len(field_name), true);
23262 return result;
23263 }
23264
23265 if (target->value->type->id == ZigTypeIdUnion) {
23266 target = ir_analyze_union_tag(ira, &instruction->base.base, target, instruction->base.is_gen);
23267 if (type_is_invalid(target->value->type))
23268 return ira->codegen->invalid_inst_gen;
23269 }
23270
23271 if (target->value->type->id != ZigTypeIdEnum) {
23272 ir_add_error(ira, &target->base,
23273 buf_sprintf("expected enum tag, found '%s'", buf_ptr(&target->value->type->name)));
23274 return ira->codegen->invalid_inst_gen;
23275 }
2232623276
22327 assert(target->value->type->id == ZigTypeIdEnum);23277 if (target->value->type->data.enumeration.src_field_count == 1 &&
23278 !target->value->type->data.enumeration.non_exhaustive) {
23279 TypeEnumField *only_field = &target->value->type->data.enumeration.fields[0];
23280 ZigValue *array_val = create_const_str_lit(ira->codegen, only_field->name)->data.x_ptr.data.ref.pointee;
23281 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
23282 init_const_slice(ira->codegen, result->value, array_val, 0, buf_len(only_field->name), true);
23283 return result;
23284 }
2232823285
22329 if (instr_is_comptime(target)) {23286 if (instr_is_comptime(target)) {
22330 if ((err = type_resolve(ira->codegen, target->value->type, ResolveStatusZeroBitsKnown)))23287 if ((err = type_resolve(ira->codegen, target->value->type, ResolveStatusZeroBitsKnown)))
22331 return ira->codegen->invalid_instruction;23288 return ira->codegen->invalid_inst_gen;
23289 if (target->value->type->data.enumeration.non_exhaustive) {
23290 ir_add_error(ira, &instruction->base.base,
23291 buf_sprintf("TODO @tagName on non-exhaustive enum https://github.com/ziglang/zig/issues/3991"));
23292 return ira->codegen->invalid_inst_gen;
23293 }
22332 TypeEnumField *field = find_enum_field_by_tag(target->value->type, &target->value->data.x_bigint);23294 TypeEnumField *field = find_enum_field_by_tag(target->value->type, &target->value->data.x_bigint);
22333 ZigValue *array_val = create_const_str_lit(ira->codegen, field->name)->data.x_ptr.data.ref.pointee;23295 ZigValue *array_val = create_const_str_lit(ira->codegen, field->name)->data.x_ptr.data.ref.pointee;
22334 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);23296 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
22335 init_const_slice(ira->codegen, result->value, array_val, 0, buf_len(field->name), true);23297 init_const_slice(ira->codegen, result->value, array_val, 0, buf_len(field->name), true);
22336 return result;23298 return result;
22337 }23299 }
2233823300
22339 IrInstruction *result = ir_build_tag_name(&ira->new_irb, instruction->base.scope,
22340 instruction->base.source_node, target);
22341 ZigType *u8_ptr_type = get_pointer_to_type_extra(23301 ZigType *u8_ptr_type = get_pointer_to_type_extra(
22342 ira->codegen, ira->codegen->builtin_types.entry_u8,23302 ira->codegen, ira->codegen->builtin_types.entry_u8,
22343 true, false, PtrLenUnknown,23303 true, false, PtrLenUnknown,
22344 0, 0, 0, false);23304 0, 0, 0, false);
22345 result->value->type = get_slice_type(ira->codegen, u8_ptr_type);23305 ZigType *result_type = get_slice_type(ira->codegen, u8_ptr_type);
22346 return result;23306 return ir_build_tag_name_gen(ira, &instruction->base.base, target, result_type);
22347}23307}
2234823308
22349static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,23309static IrInstGen *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
22350 IrInstructionFieldParentPtr *instruction)23310 IrInstSrcFieldParentPtr *instruction)
22351{23311{
22352 Error err;23312 Error err;
22353 IrInstruction *type_value = instruction->type_value->child;23313 IrInstGen *type_value = instruction->type_value->child;
22354 ZigType *container_type = ir_resolve_type(ira, type_value);23314 ZigType *container_type = ir_resolve_type(ira, type_value);
22355 if (type_is_invalid(container_type))23315 if (type_is_invalid(container_type))
22356 return ira->codegen->invalid_instruction;23316 return ira->codegen->invalid_inst_gen;
2235723317
22358 IrInstruction *field_name_value = instruction->field_name->child;23318 IrInstGen *field_name_value = instruction->field_name->child;
22359 Buf *field_name = ir_resolve_str(ira, field_name_value);23319 Buf *field_name = ir_resolve_str(ira, field_name_value);
22360 if (!field_name)23320 if (!field_name)
22361 return ira->codegen->invalid_instruction;23321 return ira->codegen->invalid_inst_gen;
2236223322
22363 IrInstruction *field_ptr = instruction->field_ptr->child;23323 IrInstGen *field_ptr = instruction->field_ptr->child;
22364 if (type_is_invalid(field_ptr->value->type))23324 if (type_is_invalid(field_ptr->value->type))
22365 return ira->codegen->invalid_instruction;23325 return ira->codegen->invalid_inst_gen;
2236623326
22367 if (container_type->id != ZigTypeIdStruct) {23327 if (container_type->id != ZigTypeIdStruct) {
22368 ir_add_error(ira, type_value,23328 ir_add_error(ira, &type_value->base,
22369 buf_sprintf("expected struct type, found '%s'", buf_ptr(&container_type->name)));23329 buf_sprintf("expected struct type, found '%s'", buf_ptr(&container_type->name)));
22370 return ira->codegen->invalid_instruction;23330 return ira->codegen->invalid_inst_gen;
22371 }23331 }
2237223332
22373 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))23333 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
22374 return ira->codegen->invalid_instruction;23334 return ira->codegen->invalid_inst_gen;
2237523335
22376 TypeStructField *field = find_struct_type_field(container_type, field_name);23336 TypeStructField *field = find_struct_type_field(container_type, field_name);
22377 if (field == nullptr) {23337 if (field == nullptr) {
22378 ir_add_error(ira, field_name_value,23338 ir_add_error(ira, &field_name_value->base,
22379 buf_sprintf("struct '%s' has no field '%s'",23339 buf_sprintf("struct '%s' has no field '%s'",
22380 buf_ptr(&container_type->name), buf_ptr(field_name)));23340 buf_ptr(&container_type->name), buf_ptr(field_name)));
22381 return ira->codegen->invalid_instruction;23341 return ira->codegen->invalid_inst_gen;
22382 }23342 }
2238323343
22384 if (field_ptr->value->type->id != ZigTypeIdPointer) {23344 if (field_ptr->value->type->id != ZigTypeIdPointer) {
22385 ir_add_error(ira, field_ptr,23345 ir_add_error(ira, &field_ptr->base,
22386 buf_sprintf("expected pointer, found '%s'", buf_ptr(&field_ptr->value->type->name)));23346 buf_sprintf("expected pointer, found '%s'", buf_ptr(&field_ptr->value->type->name)));
22387 return ira->codegen->invalid_instruction;23347 return ira->codegen->invalid_inst_gen;
22388 }23348 }
2238923349
22390 bool is_packed = (container_type->data.structure.layout == ContainerLayoutPacked);23350 bool is_packed = (container_type->data.structure.layout == ContainerLayoutPacked);
...@@ -22396,9 +23356,9 @@ static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,...@@ -22396,9 +23356,9 @@ static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
22396 field_ptr->value->type->data.pointer.is_volatile,23356 field_ptr->value->type->data.pointer.is_volatile,
22397 PtrLenSingle,23357 PtrLenSingle,
22398 field_ptr_align, 0, 0, false);23358 field_ptr_align, 0, 0, false);
22399 IrInstruction *casted_field_ptr = ir_implicit_cast(ira, field_ptr, field_ptr_type);23359 IrInstGen *casted_field_ptr = ir_implicit_cast(ira, field_ptr, field_ptr_type);
22400 if (type_is_invalid(casted_field_ptr->value->type))23360 if (type_is_invalid(casted_field_ptr->value->type))
22401 return ira->codegen->invalid_instruction;23361 return ira->codegen->invalid_inst_gen;
2240223362
22403 ZigType *result_type = get_pointer_to_type_extra(ira->codegen, container_type,23363 ZigType *result_type = get_pointer_to_type_extra(ira->codegen, container_type,
22404 casted_field_ptr->value->type->data.pointer.is_const,23364 casted_field_ptr->value->type->data.pointer.is_const,
...@@ -22409,23 +23369,23 @@ static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,...@@ -22409,23 +23369,23 @@ static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
22409 if (instr_is_comptime(casted_field_ptr)) {23369 if (instr_is_comptime(casted_field_ptr)) {
22410 ZigValue *field_ptr_val = ir_resolve_const(ira, casted_field_ptr, UndefBad);23370 ZigValue *field_ptr_val = ir_resolve_const(ira, casted_field_ptr, UndefBad);
22411 if (!field_ptr_val)23371 if (!field_ptr_val)
22412 return ira->codegen->invalid_instruction;23372 return ira->codegen->invalid_inst_gen;
2241323373
22414 if (field_ptr_val->data.x_ptr.special != ConstPtrSpecialBaseStruct) {23374 if (field_ptr_val->data.x_ptr.special != ConstPtrSpecialBaseStruct) {
22415 ir_add_error(ira, field_ptr, buf_sprintf("pointer value not based on parent struct"));23375 ir_add_error(ira, &field_ptr->base, buf_sprintf("pointer value not based on parent struct"));
22416 return ira->codegen->invalid_instruction;23376 return ira->codegen->invalid_inst_gen;
22417 }23377 }
2241823378
22419 size_t ptr_field_index = field_ptr_val->data.x_ptr.data.base_struct.field_index;23379 size_t ptr_field_index = field_ptr_val->data.x_ptr.data.base_struct.field_index;
22420 if (ptr_field_index != field->src_index) {23380 if (ptr_field_index != field->src_index) {
22421 ir_add_error(ira, &instruction->base,23381 ir_add_error(ira, &instruction->base.base,
22422 buf_sprintf("field '%s' has index %" ZIG_PRI_usize " but pointer value is index %" ZIG_PRI_usize " of struct '%s'",23382 buf_sprintf("field '%s' has index %" ZIG_PRI_usize " but pointer value is index %" ZIG_PRI_usize " of struct '%s'",
22423 buf_ptr(field->name), field->src_index,23383 buf_ptr(field->name), field->src_index,
22424 ptr_field_index, buf_ptr(&container_type->name)));23384 ptr_field_index, buf_ptr(&container_type->name)));
22425 return ira->codegen->invalid_instruction;23385 return ira->codegen->invalid_inst_gen;
22426 }23386 }
2242723387
22428 IrInstruction *result = ir_const(ira, &instruction->base, result_type);23388 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
22429 ZigValue *out_val = result->value;23389 ZigValue *out_val = result->value;
22430 out_val->data.x_ptr.special = ConstPtrSpecialRef;23390 out_val->data.x_ptr.special = ConstPtrSpecialRef;
22431 out_val->data.x_ptr.data.ref.pointee = field_ptr_val->data.x_ptr.data.base_struct.struct_val;23391 out_val->data.x_ptr.data.ref.pointee = field_ptr_val->data.x_ptr.data.base_struct.struct_val;
...@@ -22433,15 +23393,12 @@ static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,...@@ -22433,15 +23393,12 @@ static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
22433 return result;23393 return result;
22434 }23394 }
2243523395
22436 IrInstruction *result = ir_build_field_parent_ptr(&ira->new_irb, instruction->base.scope,23396 return ir_build_field_parent_ptr_gen(ira, &instruction->base.base, casted_field_ptr, field, result_type);
22437 instruction->base.source_node, type_value, field_name_value, casted_field_ptr, field);
22438 result->value->type = result_type;
22439 return result;
22440}23397}
2244123398
22442static TypeStructField *validate_byte_offset(IrAnalyze *ira,23399static TypeStructField *validate_byte_offset(IrAnalyze *ira,
22443 IrInstruction *type_value,23400 IrInstGen *type_value,
22444 IrInstruction *field_name_value,23401 IrInstGen *field_name_value,
22445 size_t *byte_offset)23402 size_t *byte_offset)
22446{23403{
22447 ZigType *container_type = ir_resolve_type(ira, type_value);23404 ZigType *container_type = ir_resolve_type(ira, type_value);
...@@ -22457,21 +23414,21 @@ static TypeStructField *validate_byte_offset(IrAnalyze *ira,...@@ -22457,21 +23414,21 @@ static TypeStructField *validate_byte_offset(IrAnalyze *ira,
22457 return nullptr;23414 return nullptr;
2245823415
22459 if (container_type->id != ZigTypeIdStruct) {23416 if (container_type->id != ZigTypeIdStruct) {
22460 ir_add_error(ira, type_value,23417 ir_add_error(ira, &type_value->base,
22461 buf_sprintf("expected struct type, found '%s'", buf_ptr(&container_type->name)));23418 buf_sprintf("expected struct type, found '%s'", buf_ptr(&container_type->name)));
22462 return nullptr;23419 return nullptr;
22463 }23420 }
2246423421
22465 TypeStructField *field = find_struct_type_field(container_type, field_name);23422 TypeStructField *field = find_struct_type_field(container_type, field_name);
22466 if (field == nullptr) {23423 if (field == nullptr) {
22467 ir_add_error(ira, field_name_value,23424 ir_add_error(ira, &field_name_value->base,
22468 buf_sprintf("struct '%s' has no field '%s'",23425 buf_sprintf("struct '%s' has no field '%s'",
22469 buf_ptr(&container_type->name), buf_ptr(field_name)));23426 buf_ptr(&container_type->name), buf_ptr(field_name)));
22470 return nullptr;23427 return nullptr;
22471 }23428 }
2247223429
22473 if (!type_has_bits(field->type_entry)) {23430 if (!type_has_bits(field->type_entry)) {
22474 ir_add_error(ira, field_name_value,23431 ir_add_error(ira, &field_name_value->base,
22475 buf_sprintf("zero-bit field '%s' in struct '%s' has no offset",23432 buf_sprintf("zero-bit field '%s' in struct '%s' has no offset",
22476 buf_ptr(field_name), buf_ptr(&container_type->name)));23433 buf_ptr(field_name), buf_ptr(&container_type->name)));
22477 return nullptr;23434 return nullptr;
...@@ -22481,36 +23438,32 @@ static TypeStructField *validate_byte_offset(IrAnalyze *ira,...@@ -22481,36 +23438,32 @@ static TypeStructField *validate_byte_offset(IrAnalyze *ira,
22481 return field;23438 return field;
22482}23439}
2248323440
22484static IrInstruction *ir_analyze_instruction_byte_offset_of(IrAnalyze *ira,23441static IrInstGen *ir_analyze_instruction_byte_offset_of(IrAnalyze *ira, IrInstSrcByteOffsetOf *instruction) {
22485 IrInstructionByteOffsetOf *instruction)23442 IrInstGen *type_value = instruction->type_value->child;
22486{
22487 IrInstruction *type_value = instruction->type_value->child;
22488 if (type_is_invalid(type_value->value->type))23443 if (type_is_invalid(type_value->value->type))
22489 return ira->codegen->invalid_instruction;23444 return ira->codegen->invalid_inst_gen;
2249023445
22491 IrInstruction *field_name_value = instruction->field_name->child;23446 IrInstGen *field_name_value = instruction->field_name->child;
22492 size_t byte_offset = 0;23447 size_t byte_offset = 0;
22493 if (!validate_byte_offset(ira, type_value, field_name_value, &byte_offset))23448 if (!validate_byte_offset(ira, type_value, field_name_value, &byte_offset))
22494 return ira->codegen->invalid_instruction;23449 return ira->codegen->invalid_inst_gen;
2249523450
2249623451
22497 return ir_const_unsigned(ira, &instruction->base, byte_offset);23452 return ir_const_unsigned(ira, &instruction->base.base, byte_offset);
22498}23453}
2249923454
22500static IrInstruction *ir_analyze_instruction_bit_offset_of(IrAnalyze *ira,23455static IrInstGen *ir_analyze_instruction_bit_offset_of(IrAnalyze *ira, IrInstSrcBitOffsetOf *instruction) {
22501 IrInstructionBitOffsetOf *instruction)23456 IrInstGen *type_value = instruction->type_value->child;
22502{
22503 IrInstruction *type_value = instruction->type_value->child;
22504 if (type_is_invalid(type_value->value->type))23457 if (type_is_invalid(type_value->value->type))
22505 return ira->codegen->invalid_instruction;23458 return ira->codegen->invalid_inst_gen;
22506 IrInstruction *field_name_value = instruction->field_name->child;23459 IrInstGen *field_name_value = instruction->field_name->child;
22507 size_t byte_offset = 0;23460 size_t byte_offset = 0;
22508 TypeStructField *field = nullptr;23461 TypeStructField *field = nullptr;
22509 if (!(field = validate_byte_offset(ira, type_value, field_name_value, &byte_offset)))23462 if (!(field = validate_byte_offset(ira, type_value, field_name_value, &byte_offset)))
22510 return ira->codegen->invalid_instruction;23463 return ira->codegen->invalid_inst_gen;
2251123464
22512 size_t bit_offset = byte_offset * 8 + field->bit_offset_in_host;23465 size_t bit_offset = byte_offset * 8 + field->bit_offset_in_host;
22513 return ir_const_unsigned(ira, &instruction->base, bit_offset);23466 return ir_const_unsigned(ira, &instruction->base.base, bit_offset);
22514}23467}
2251523468
22516static void ensure_field_index(ZigType *type, const char *field_name, size_t index) {23469static void ensure_field_index(ZigType *type, const char *field_name, size_t index) {
...@@ -22558,7 +23511,7 @@ static ZigType *ir_type_info_get_type(IrAnalyze *ira, const char *type_name, Zig...@@ -22558,7 +23511,7 @@ static ZigType *ir_type_info_get_type(IrAnalyze *ira, const char *type_name, Zig
22558 return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, nullptr, var->const_value);23511 return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, nullptr, var->const_value);
22559}23512}
2256023513
22561static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr, ZigValue *out_val,23514static Error ir_make_type_info_decls(IrAnalyze *ira, IrInst* source_instr, ZigValue *out_val,
22562 ScopeDecls *decls_scope)23515 ScopeDecls *decls_scope)
22563{23516{
22564 Error err;23517 Error err;
...@@ -22589,11 +23542,14 @@ static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr...@@ -22589,11 +23542,14 @@ static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr
2258923542
22590 while ((curr_entry = decl_it.next()) != nullptr) {23543 while ((curr_entry = decl_it.next()) != nullptr) {
22591 // If the declaration is unresolved, force it to be resolved again.23544 // If the declaration is unresolved, force it to be resolved again.
22592 if (curr_entry->value->resolution == TldResolutionUnresolved) {23545 resolve_top_level_decl(ira->codegen, curr_entry->value, curr_entry->value->source_node, false);
22593 resolve_top_level_decl(ira->codegen, curr_entry->value, curr_entry->value->source_node, false);23546 if (curr_entry->value->resolution == TldResolutionInvalid) {
22594 if (curr_entry->value->resolution != TldResolutionOk) {23547 return ErrorSemanticAnalyzeFail;
22595 return ErrorSemanticAnalyzeFail;23548 }
22596 }23549
23550 if (curr_entry->value->resolution == TldResolutionResolving) {
23551 ir_error_dependency_loop(ira, source_instr);
23552 return ErrorSemanticAnalyzeFail;
22597 }23553 }
2259823554
22599 // Skip comptime blocks and test functions.23555 // Skip comptime blocks and test functions.
...@@ -22650,6 +23606,8 @@ static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr...@@ -22650,6 +23606,8 @@ static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr
22650 case TldIdVar:23606 case TldIdVar:
22651 {23607 {
22652 ZigVar *var = ((TldVar *)curr_entry->value)->var;23608 ZigVar *var = ((TldVar *)curr_entry->value)->var;
23609 assert(var != nullptr);
23610
22653 if ((err = type_resolve(ira->codegen, var->const_value->type, ResolveStatusSizeKnown)))23611 if ((err = type_resolve(ira->codegen, var->const_value->type, ResolveStatusSizeKnown)))
22654 return ErrorSemanticAnalyzeFail;23612 return ErrorSemanticAnalyzeFail;
2265523613
...@@ -22680,11 +23638,7 @@ static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr...@@ -22680,11 +23638,7 @@ static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr
2268023638
22681 ZigFn *fn_entry = ((TldFn *)curr_entry->value)->fn_entry;23639 ZigFn *fn_entry = ((TldFn *)curr_entry->value)->fn_entry;
22682 assert(!fn_entry->is_test);23640 assert(!fn_entry->is_test);
2268323641 assert(fn_entry->type_entry != nullptr);
22684 if (fn_entry->type_entry == nullptr) {
22685 ir_error_dependency_loop(ira, source_instr);
22686 return ErrorSemanticAnalyzeFail;
22687 }
2268823642
22689 AstNodeFnProto *fn_node = &fn_entry->proto_node->data.fn_proto;23643 AstNodeFnProto *fn_node = &fn_entry->proto_node->data.fn_proto;
2269023644
...@@ -22916,7 +23870,7 @@ static void make_enum_field_val(IrAnalyze *ira, ZigValue *enum_field_val, TypeEn...@@ -22916,7 +23870,7 @@ static void make_enum_field_val(IrAnalyze *ira, ZigValue *enum_field_val, TypeEn
22916 enum_field_val->data.x_struct.fields = inner_fields;23870 enum_field_val->data.x_struct.fields = inner_fields;
22917}23871}
2291823872
22919static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr, ZigType *type_entry,23873static Error ir_make_type_info_value(IrAnalyze *ira, IrInst* source_instr, ZigType *type_entry,
22920 ZigValue **out)23874 ZigValue **out)
22921{23875{
22922 Error err;23876 Error err;
...@@ -23079,7 +24033,7 @@ static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr...@@ -23079,7 +24033,7 @@ static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr
23079 result->special = ConstValSpecialStatic;24033 result->special = ConstValSpecialStatic;
23080 result->type = ir_type_info_get_type(ira, "Enum", nullptr);24034 result->type = ir_type_info_get_type(ira, "Enum", nullptr);
2308124035
23082 ZigValue **fields = alloc_const_vals_ptrs(4);24036 ZigValue **fields = alloc_const_vals_ptrs(5);
23083 result->data.x_struct.fields = fields;24037 result->data.x_struct.fields = fields;
2308424038
23085 // layout: ContainerLayout24039 // layout: ContainerLayout
...@@ -23125,6 +24079,11 @@ static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr...@@ -23125,6 +24079,11 @@ static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr
23125 {24079 {
23126 return err;24080 return err;
23127 }24081 }
24082 // is_exhaustive: bool
24083 ensure_field_index(result->type, "is_exhaustive", 4);
24084 fields[4]->special = ConstValSpecialStatic;
24085 fields[4]->type = ira->codegen->builtin_types.entry_bool;
24086 fields[4]->data.x_bool = !type_entry->data.enumeration.non_exhaustive;
2312824087
23129 break;24088 break;
23130 }24089 }
...@@ -23499,22 +24458,20 @@ static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr...@@ -23499,22 +24458,20 @@ static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr
23499 return ErrorNone;24458 return ErrorNone;
23500}24459}
2350124460
23502static IrInstruction *ir_analyze_instruction_type_info(IrAnalyze *ira,24461static IrInstGen *ir_analyze_instruction_type_info(IrAnalyze *ira, IrInstSrcTypeInfo *instruction) {
23503 IrInstructionTypeInfo *instruction)
23504{
23505 Error err;24462 Error err;
23506 IrInstruction *type_value = instruction->type_value->child;24463 IrInstGen *type_value = instruction->type_value->child;
23507 ZigType *type_entry = ir_resolve_type(ira, type_value);24464 ZigType *type_entry = ir_resolve_type(ira, type_value);
23508 if (type_is_invalid(type_entry))24465 if (type_is_invalid(type_entry))
23509 return ira->codegen->invalid_instruction;24466 return ira->codegen->invalid_inst_gen;
2351024467
23511 ZigType *result_type = ir_type_info_get_type(ira, nullptr, nullptr);24468 ZigType *result_type = ir_type_info_get_type(ira, nullptr, nullptr);
2351224469
23513 ZigValue *payload;24470 ZigValue *payload;
23514 if ((err = ir_make_type_info_value(ira, &instruction->base, type_entry, &payload)))24471 if ((err = ir_make_type_info_value(ira, &instruction->base.base, type_entry, &payload)))
23515 return ira->codegen->invalid_instruction;24472 return ira->codegen->invalid_inst_gen;
2351624473
23517 IrInstruction *result = ir_const(ira, &instruction->base, result_type);24474 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
23518 ZigValue *out_val = result->value;24475 ZigValue *out_val = result->value;
23519 bigint_init_unsigned(&out_val->data.x_union.tag, type_id_index(type_entry));24476 bigint_init_unsigned(&out_val->data.x_union.tag, type_id_index(type_entry));
23520 out_val->data.x_union.payload = payload;24477 out_val->data.x_union.payload = payload;
...@@ -23538,15 +24495,15 @@ static ZigValue *get_const_field(IrAnalyze *ira, AstNode *source_node, ZigValue...@@ -23538,15 +24495,15 @@ static ZigValue *get_const_field(IrAnalyze *ira, AstNode *source_node, ZigValue
23538 return val;24495 return val;
23539}24496}
2354024497
23541static Error get_const_field_sentinel(IrAnalyze *ira, IrInstruction *source_instr, ZigValue *struct_value,24498static Error get_const_field_sentinel(IrAnalyze *ira, IrInst* source_instr, ZigValue *struct_value,
23542 const char *name, size_t field_index, ZigType *elem_type, ZigValue **result)24499 const char *name, size_t field_index, ZigType *elem_type, ZigValue **result)
23543{24500{
23544 ZigValue *field_val = get_const_field(ira, source_instr->source_node, struct_value, name, field_index);24501 ZigValue *field_val = get_const_field(ira, source_instr->source_node, struct_value, name, field_index);
23545 if (field_val == nullptr)24502 if (field_val == nullptr)
23546 return ErrorSemanticAnalyzeFail;24503 return ErrorSemanticAnalyzeFail;
2354724504
23548 IrInstruction *field_inst = ir_const_move(ira, source_instr, field_val);24505 IrInstGen *field_inst = ir_const_move(ira, source_instr, field_val);
23549 IrInstruction *casted_field_inst = ir_implicit_cast(ira, field_inst,24506 IrInstGen *casted_field_inst = ir_implicit_cast(ira, field_inst,
23550 get_optional_type(ira->codegen, elem_type));24507 get_optional_type(ira->codegen, elem_type));
23551 if (type_is_invalid(casted_field_inst->value->type))24508 if (type_is_invalid(casted_field_inst->value->type))
23552 return ErrorSemanticAnalyzeFail;24509 return ErrorSemanticAnalyzeFail;
...@@ -23585,12 +24542,12 @@ static ZigType *get_const_field_meta_type(IrAnalyze *ira, AstNode *source_node,...@@ -23585,12 +24542,12 @@ static ZigType *get_const_field_meta_type(IrAnalyze *ira, AstNode *source_node,
23585{24542{
23586 ZigValue *value = get_const_field(ira, source_node, struct_value, name, field_index);24543 ZigValue *value = get_const_field(ira, source_node, struct_value, name, field_index);
23587 if (value == nullptr)24544 if (value == nullptr)
23588 return ira->codegen->invalid_instruction->value->type;24545 return ira->codegen->invalid_inst_gen->value->type;
23589 assert(value->type == ira->codegen->builtin_types.entry_type);24546 assert(value->type == ira->codegen->builtin_types.entry_type);
23590 return value->data.x_type;24547 return value->data.x_type;
23591}24548}
2359224549
23593static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, ZigTypeId tagTypeId, ZigValue *payload) {24550static ZigType *type_info_to_type(IrAnalyze *ira, IrInst *source_instr, ZigTypeId tagTypeId, ZigValue *payload) {
23594 Error err;24551 Error err;
23595 switch (tagTypeId) {24552 switch (tagTypeId) {
23596 case ZigTypeIdInvalid:24553 case ZigTypeIdInvalid:
...@@ -23606,21 +24563,21 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi...@@ -23606,21 +24563,21 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
23606 case ZigTypeIdInt: {24563 case ZigTypeIdInt: {
23607 assert(payload->special == ConstValSpecialStatic);24564 assert(payload->special == ConstValSpecialStatic);
23608 assert(payload->type == ir_type_info_get_type(ira, "Int", nullptr));24565 assert(payload->type == ir_type_info_get_type(ira, "Int", nullptr));
23609 BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "bits", 1);24566 BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "bits", 1);
23610 if (bi == nullptr)24567 if (bi == nullptr)
23611 return ira->codegen->invalid_instruction->value->type;24568 return ira->codegen->invalid_inst_gen->value->type;
23612 bool is_signed;24569 bool is_signed;
23613 if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_signed", 0, &is_signed)))24570 if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_signed", 0, &is_signed)))
23614 return ira->codegen->invalid_instruction->value->type;24571 return ira->codegen->invalid_inst_gen->value->type;
23615 return get_int_type(ira->codegen, is_signed, bigint_as_u32(bi));24572 return get_int_type(ira->codegen, is_signed, bigint_as_u32(bi));
23616 }24573 }
23617 case ZigTypeIdFloat:24574 case ZigTypeIdFloat:
23618 {24575 {
23619 assert(payload->special == ConstValSpecialStatic);24576 assert(payload->special == ConstValSpecialStatic);
23620 assert(payload->type == ir_type_info_get_type(ira, "Float", nullptr));24577 assert(payload->type == ir_type_info_get_type(ira, "Float", nullptr));
23621 BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "bits", 0);24578 BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "bits", 0);
23622 if (bi == nullptr)24579 if (bi == nullptr)
23623 return ira->codegen->invalid_instruction->value->type;24580 return ira->codegen->invalid_inst_gen->value->type;
23624 uint32_t bits = bigint_as_u32(bi);24581 uint32_t bits = bigint_as_u32(bi);
23625 switch (bits) {24582 switch (bits) {
23626 case 16: return ira->codegen->builtin_types.entry_f16;24583 case 16: return ira->codegen->builtin_types.entry_f16;
...@@ -23628,48 +24585,47 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi...@@ -23628,48 +24585,47 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
23628 case 64: return ira->codegen->builtin_types.entry_f64;24585 case 64: return ira->codegen->builtin_types.entry_f64;
23629 case 128: return ira->codegen->builtin_types.entry_f128;24586 case 128: return ira->codegen->builtin_types.entry_f128;
23630 }24587 }
23631 ir_add_error(ira, instruction,24588 ir_add_error(ira, source_instr, buf_sprintf("%d-bit float unsupported", bits));
23632 buf_sprintf("%d-bit float unsupported", bits));24589 return ira->codegen->invalid_inst_gen->value->type;
23633 return ira->codegen->invalid_instruction->value->type;
23634 }24590 }
23635 case ZigTypeIdPointer:24591 case ZigTypeIdPointer:
23636 {24592 {
23637 ZigType *type_info_pointer_type = ir_type_info_get_type(ira, "Pointer", nullptr);24593 ZigType *type_info_pointer_type = ir_type_info_get_type(ira, "Pointer", nullptr);
23638 assert(payload->special == ConstValSpecialStatic);24594 assert(payload->special == ConstValSpecialStatic);
23639 assert(payload->type == type_info_pointer_type);24595 assert(payload->type == type_info_pointer_type);
23640 ZigValue *size_value = get_const_field(ira, instruction->source_node, payload, "size", 0);24596 ZigValue *size_value = get_const_field(ira, source_instr->source_node, payload, "size", 0);
23641 assert(size_value->type == ir_type_info_get_type(ira, "Size", type_info_pointer_type));24597 assert(size_value->type == ir_type_info_get_type(ira, "Size", type_info_pointer_type));
23642 BuiltinPtrSize size_enum_index = (BuiltinPtrSize)bigint_as_u32(&size_value->data.x_enum_tag);24598 BuiltinPtrSize size_enum_index = (BuiltinPtrSize)bigint_as_u32(&size_value->data.x_enum_tag);
23643 PtrLen ptr_len = size_enum_index_to_ptr_len(size_enum_index);24599 PtrLen ptr_len = size_enum_index_to_ptr_len(size_enum_index);
23644 ZigType *elem_type = get_const_field_meta_type(ira, instruction->source_node, payload, "child", 4);24600 ZigType *elem_type = get_const_field_meta_type(ira, source_instr->source_node, payload, "child", 4);
23645 if (type_is_invalid(elem_type))24601 if (type_is_invalid(elem_type))
23646 return ira->codegen->invalid_instruction->value->type;24602 return ira->codegen->invalid_inst_gen->value->type;
23647 ZigValue *sentinel;24603 ZigValue *sentinel;
23648 if ((err = get_const_field_sentinel(ira, instruction, payload, "sentinel", 6,24604 if ((err = get_const_field_sentinel(ira, source_instr, payload, "sentinel", 6,
23649 elem_type, &sentinel)))24605 elem_type, &sentinel)))
23650 {24606 {
23651 return ira->codegen->invalid_instruction->value->type;24607 return ira->codegen->invalid_inst_gen->value->type;
23652 }24608 }
23653 BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "alignment", 3);24609 BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "alignment", 3);
23654 if (bi == nullptr)24610 if (bi == nullptr)
23655 return ira->codegen->invalid_instruction->value->type;24611 return ira->codegen->invalid_inst_gen->value->type;
2365624612
23657 bool is_const;24613 bool is_const;
23658 if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_const", 1, &is_const)))24614 if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_const", 1, &is_const)))
23659 return ira->codegen->invalid_instruction->value->type;24615 return ira->codegen->invalid_inst_gen->value->type;
2366024616
23661 bool is_volatile;24617 bool is_volatile;
23662 if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_volatile", 2,24618 if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_volatile", 2,
23663 &is_volatile)))24619 &is_volatile)))
23664 {24620 {
23665 return ira->codegen->invalid_instruction->value->type;24621 return ira->codegen->invalid_inst_gen->value->type;
23666 }24622 }
2366724623
23668 bool is_allowzero;24624 bool is_allowzero;
23669 if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_allowzero", 5,24625 if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_allowzero", 5,
23670 &is_allowzero)))24626 &is_allowzero)))
23671 {24627 {
23672 return ira->codegen->invalid_instruction->value->type;24628 return ira->codegen->invalid_inst_gen->value->type;
23673 }24629 }
2367424630
2367524631
...@@ -23690,18 +24646,18 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi...@@ -23690,18 +24646,18 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
23690 case ZigTypeIdArray: {24646 case ZigTypeIdArray: {
23691 assert(payload->special == ConstValSpecialStatic);24647 assert(payload->special == ConstValSpecialStatic);
23692 assert(payload->type == ir_type_info_get_type(ira, "Array", nullptr));24648 assert(payload->type == ir_type_info_get_type(ira, "Array", nullptr));
23693 ZigType *elem_type = get_const_field_meta_type(ira, instruction->source_node, payload, "child", 1);24649 ZigType *elem_type = get_const_field_meta_type(ira, source_instr->source_node, payload, "child", 1);
23694 if (type_is_invalid(elem_type))24650 if (type_is_invalid(elem_type))
23695 return ira->codegen->invalid_instruction->value->type;24651 return ira->codegen->invalid_inst_gen->value->type;
23696 ZigValue *sentinel;24652 ZigValue *sentinel;
23697 if ((err = get_const_field_sentinel(ira, instruction, payload, "sentinel", 2,24653 if ((err = get_const_field_sentinel(ira, source_instr, payload, "sentinel", 2,
23698 elem_type, &sentinel)))24654 elem_type, &sentinel)))
23699 {24655 {
23700 return ira->codegen->invalid_instruction->value->type;24656 return ira->codegen->invalid_inst_gen->value->type;
23701 }24657 }
23702 BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "len", 0);24658 BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "len", 0);
23703 if (bi == nullptr)24659 if (bi == nullptr)
23704 return ira->codegen->invalid_instruction->value->type;24660 return ira->codegen->invalid_inst_gen->value->type;
23705 return get_array_type(ira->codegen, elem_type, bigint_as_u64(bi), sentinel);24661 return get_array_type(ira->codegen, elem_type, bigint_as_u64(bi), sentinel);
23706 }24662 }
23707 case ZigTypeIdComptimeFloat:24663 case ZigTypeIdComptimeFloat:
...@@ -23721,78 +24677,77 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi...@@ -23721,78 +24677,77 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
23721 case ZigTypeIdAnyFrame:24677 case ZigTypeIdAnyFrame:
23722 case ZigTypeIdVector:24678 case ZigTypeIdVector:
23723 case ZigTypeIdEnumLiteral:24679 case ZigTypeIdEnumLiteral:
23724 ir_add_error(ira, instruction, buf_sprintf(24680 ir_add_error(ira, source_instr, buf_sprintf(
23725 "TODO implement @Type for 'TypeInfo.%s': see https://github.com/ziglang/zig/issues/2907", type_id_name(tagTypeId)));24681 "TODO implement @Type for 'TypeInfo.%s': see https://github.com/ziglang/zig/issues/2907", type_id_name(tagTypeId)));
23726 return ira->codegen->invalid_instruction->value->type;24682 return ira->codegen->invalid_inst_gen->value->type;
23727 case ZigTypeIdUnion:24683 case ZigTypeIdUnion:
23728 case ZigTypeIdFn:24684 case ZigTypeIdFn:
23729 case ZigTypeIdBoundFn:24685 case ZigTypeIdBoundFn:
23730 case ZigTypeIdStruct:24686 case ZigTypeIdStruct:
23731 ir_add_error(ira, instruction, buf_sprintf(24687 ir_add_error(ira, source_instr, buf_sprintf(
23732 "@Type not availble for 'TypeInfo.%s'", type_id_name(tagTypeId)));24688 "@Type not availble for 'TypeInfo.%s'", type_id_name(tagTypeId)));
23733 return ira->codegen->invalid_instruction->value->type;24689 return ira->codegen->invalid_inst_gen->value->type;
23734 }24690 }
23735 zig_unreachable();24691 zig_unreachable();
23736}24692}
2373724693
23738static IrInstruction *ir_analyze_instruction_type(IrAnalyze *ira, IrInstructionType *instruction) {24694static IrInstGen *ir_analyze_instruction_type(IrAnalyze *ira, IrInstSrcType *instruction) {
23739 IrInstruction *type_info_ir = instruction->type_info->child;24695 IrInstGen *uncasted_type_info = instruction->type_info->child;
23740 if (type_is_invalid(type_info_ir->value->type))24696 if (type_is_invalid(uncasted_type_info->value->type))
23741 return ira->codegen->invalid_instruction;24697 return ira->codegen->invalid_inst_gen;
2374224698
23743 IrInstruction *casted_ir = ir_implicit_cast(ira, type_info_ir, ir_type_info_get_type(ira, nullptr, nullptr));24699 IrInstGen *type_info = ir_implicit_cast(ira, uncasted_type_info, ir_type_info_get_type(ira, nullptr, nullptr));
23744 if (type_is_invalid(casted_ir->value->type))24700 if (type_is_invalid(type_info->value->type))
23745 return ira->codegen->invalid_instruction;24701 return ira->codegen->invalid_inst_gen;
2374624702
23747 ZigValue *type_info_value = ir_resolve_const(ira, casted_ir, UndefBad);24703 ZigValue *type_info_val = ir_resolve_const(ira, type_info, UndefBad);
23748 if (!type_info_value)24704 if (type_info_val == nullptr)
23749 return ira->codegen->invalid_instruction;24705 return ira->codegen->invalid_inst_gen;
23750 ZigTypeId typeId = type_id_at_index(bigint_as_usize(&type_info_value->data.x_union.tag));24706 ZigTypeId type_id_tag = type_id_at_index(bigint_as_usize(&type_info_val->data.x_union.tag));
23751 ZigType *type = type_info_to_type(ira, type_info_ir, typeId, type_info_value->data.x_union.payload);24707 ZigType *type = type_info_to_type(ira, &uncasted_type_info->base, type_id_tag,
24708 type_info_val->data.x_union.payload);
23752 if (type_is_invalid(type))24709 if (type_is_invalid(type))
23753 return ira->codegen->invalid_instruction;24710 return ira->codegen->invalid_inst_gen;
23754 return ir_const_type(ira, &instruction->base, type);24711 return ir_const_type(ira, &instruction->base.base, type);
23755}24712}
2375624713
23757static IrInstruction *ir_analyze_instruction_type_id(IrAnalyze *ira,24714static IrInstGen *ir_analyze_instruction_type_id(IrAnalyze *ira, IrInstSrcTypeId *instruction) {
23758 IrInstructionTypeId *instruction)24715 IrInstGen *type_value = instruction->type_value->child;
23759{
23760 IrInstruction *type_value = instruction->type_value->child;
23761 ZigType *type_entry = ir_resolve_type(ira, type_value);24716 ZigType *type_entry = ir_resolve_type(ira, type_value);
23762 if (type_is_invalid(type_entry))24717 if (type_is_invalid(type_entry))
23763 return ira->codegen->invalid_instruction;24718 return ira->codegen->invalid_inst_gen;
2376424719
23765 ZigType *result_type = get_builtin_type(ira->codegen, "TypeId");24720 ZigType *result_type = get_builtin_type(ira->codegen, "TypeId");
2376624721
23767 IrInstruction *result = ir_const(ira, &instruction->base, result_type);24722 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
23768 bigint_init_unsigned(&result->value->data.x_enum_tag, type_id_index(type_entry));24723 bigint_init_unsigned(&result->value->data.x_enum_tag, type_id_index(type_entry));
23769 return result;24724 return result;
23770}24725}
2377124726
23772static IrInstruction *ir_analyze_instruction_set_eval_branch_quota(IrAnalyze *ira,24727static IrInstGen *ir_analyze_instruction_set_eval_branch_quota(IrAnalyze *ira,
23773 IrInstructionSetEvalBranchQuota *instruction)24728 IrInstSrcSetEvalBranchQuota *instruction)
23774{24729{
23775 uint64_t new_quota;24730 uint64_t new_quota;
23776 if (!ir_resolve_usize(ira, instruction->new_quota->child, &new_quota))24731 if (!ir_resolve_usize(ira, instruction->new_quota->child, &new_quota))
23777 return ira->codegen->invalid_instruction;24732 return ira->codegen->invalid_inst_gen;
2377824733
23779 if (new_quota > *ira->new_irb.exec->backward_branch_quota) {24734 if (new_quota > *ira->new_irb.exec->backward_branch_quota) {
23780 *ira->new_irb.exec->backward_branch_quota = new_quota;24735 *ira->new_irb.exec->backward_branch_quota = new_quota;
23781 }24736 }
2378224737
23783 return ir_const_void(ira, &instruction->base);24738 return ir_const_void(ira, &instruction->base.base);
23784}24739}
2378524740
23786static IrInstruction *ir_analyze_instruction_type_name(IrAnalyze *ira, IrInstructionTypeName *instruction) {24741static IrInstGen *ir_analyze_instruction_type_name(IrAnalyze *ira, IrInstSrcTypeName *instruction) {
23787 IrInstruction *type_value = instruction->type_value->child;24742 IrInstGen *type_value = instruction->type_value->child;
23788 ZigType *type_entry = ir_resolve_type(ira, type_value);24743 ZigType *type_entry = ir_resolve_type(ira, type_value);
23789 if (type_is_invalid(type_entry))24744 if (type_is_invalid(type_entry))
23790 return ira->codegen->invalid_instruction;24745 return ira->codegen->invalid_inst_gen;
2379124746
23792 if (!type_entry->cached_const_name_val) {24747 if (!type_entry->cached_const_name_val) {
23793 type_entry->cached_const_name_val = create_const_str_lit(ira->codegen, type_bare_name(type_entry));24748 type_entry->cached_const_name_val = create_const_str_lit(ira->codegen, type_bare_name(type_entry));
23794 }24749 }
23795 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);24750 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
23796 copy_const_val(result->value, type_entry->cached_const_name_val);24751 copy_const_val(result->value, type_entry->cached_const_name_val);
23797 return result;24752 return result;
23798}24753}
...@@ -23804,13 +24759,13 @@ static void ir_cimport_cache_paths(Buf *cache_dir, Buf *tmp_c_file_digest, Buf *...@@ -23804,13 +24759,13 @@ static void ir_cimport_cache_paths(Buf *cache_dir, Buf *tmp_c_file_digest, Buf *
23804 buf_ptr(cache_dir), buf_ptr(tmp_c_file_digest));24759 buf_ptr(cache_dir), buf_ptr(tmp_c_file_digest));
23805 buf_appendf(out_zig_path, "%s" OS_SEP "cimport.zig", buf_ptr(out_zig_dir));24760 buf_appendf(out_zig_path, "%s" OS_SEP "cimport.zig", buf_ptr(out_zig_dir));
23806}24761}
23807static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstructionCImport *instruction) {24762static IrInstGen *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstSrcCImport *instruction) {
23808 Error err;24763 Error err;
23809 AstNode *node = instruction->base.source_node;24764 AstNode *node = instruction->base.base.source_node;
23810 assert(node->type == NodeTypeFnCallExpr);24765 assert(node->type == NodeTypeFnCallExpr);
23811 AstNode *block_node = node->data.fn_call_expr.params.at(0);24766 AstNode *block_node = node->data.fn_call_expr.params.at(0);
2381224767
23813 ScopeCImport *cimport_scope = create_cimport_scope(ira->codegen, node, instruction->base.scope);24768 ScopeCImport *cimport_scope = create_cimport_scope(ira->codegen, node, instruction->base.base.scope);
2381424769
23815 // Execute the C import block like an inline function24770 // Execute the C import block like an inline function
23816 ZigType *void_type = ira->codegen->builtin_types.entry_void;24771 ZigType *void_type = ira->codegen->builtin_types.entry_void;
...@@ -23821,13 +24776,13 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct...@@ -23821,13 +24776,13 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
23821 ira->new_irb.exec->backward_branch_count, ira->new_irb.exec->backward_branch_quota, nullptr,24776 ira->new_irb.exec->backward_branch_count, ira->new_irb.exec->backward_branch_quota, nullptr,
23822 &cimport_scope->buf, block_node, nullptr, nullptr, nullptr, UndefBad)))24777 &cimport_scope->buf, block_node, nullptr, nullptr, nullptr, UndefBad)))
23823 {24778 {
23824 return ira->codegen->invalid_instruction;24779 return ira->codegen->invalid_inst_gen;
23825 }24780 }
23826 if (type_is_invalid(cimport_result->type))24781 if (type_is_invalid(cimport_result->type))
23827 return ira->codegen->invalid_instruction;24782 return ira->codegen->invalid_inst_gen;
23828 destroy(result_ptr, "ZigValue");24783 destroy(result_ptr, "ZigValue");
2382924784
23830 ZigPackage *cur_scope_pkg = scope_package(instruction->base.scope);24785 ZigPackage *cur_scope_pkg = scope_package(instruction->base.base.scope);
23831 Buf *namespace_name = buf_sprintf("%s.cimport:%" ZIG_PRI_usize ":%" ZIG_PRI_usize,24786 Buf *namespace_name = buf_sprintf("%s.cimport:%" ZIG_PRI_usize ":%" ZIG_PRI_usize,
23832 buf_ptr(&cur_scope_pkg->pkg_path), node->line + 1, node->column + 1);24787 buf_ptr(&cur_scope_pkg->pkg_path), node->line + 1, node->column + 1);
2383324788
...@@ -23839,7 +24794,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct...@@ -23839,7 +24794,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
23839 CacheHash *cache_hash;24794 CacheHash *cache_hash;
23840 if ((err = create_c_object_cache(ira->codegen, &cache_hash, false))) {24795 if ((err = create_c_object_cache(ira->codegen, &cache_hash, false))) {
23841 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to create cache: %s", err_str(err)));24796 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to create cache: %s", err_str(err)));
23842 return ira->codegen->invalid_instruction;24797 return ira->codegen->invalid_inst_gen;
23843 }24798 }
23844 cache_buf(cache_hash, &cimport_scope->buf);24799 cache_buf(cache_hash, &cimport_scope->buf);
2384524800
...@@ -23851,7 +24806,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct...@@ -23851,7 +24806,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
23851 if ((err = cache_hit(cache_hash, &tmp_c_file_digest))) {24806 if ((err = cache_hit(cache_hash, &tmp_c_file_digest))) {
23852 if (err != ErrorInvalidFormat) {24807 if (err != ErrorInvalidFormat) {
23853 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to check cache: %s", err_str(err)));24808 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to check cache: %s", err_str(err)));
23854 return ira->codegen->invalid_instruction;24809 return ira->codegen->invalid_inst_gen;
23855 }24810 }
23856 }24811 }
23857 ira->codegen->caches_to_release.append(cache_hash);24812 ira->codegen->caches_to_release.append(cache_hash);
...@@ -23870,12 +24825,12 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct...@@ -23870,12 +24825,12 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2387024825
23871 if ((err = os_make_path(tmp_c_file_dir))) {24826 if ((err = os_make_path(tmp_c_file_dir))) {
23872 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to make dir: %s", err_str(err)));24827 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to make dir: %s", err_str(err)));
23873 return ira->codegen->invalid_instruction;24828 return ira->codegen->invalid_inst_gen;
23874 }24829 }
2387524830
23876 if ((err = os_write_file(&tmp_c_file_path, &cimport_scope->buf))) {24831 if ((err = os_write_file(&tmp_c_file_path, &cimport_scope->buf))) {
23877 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to write .h file: %s", err_str(err)));24832 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to write .h file: %s", err_str(err)));
23878 return ira->codegen->invalid_instruction;24833 return ira->codegen->invalid_inst_gen;
23879 }24834 }
23880 if (ira->codegen->verbose_cimport) {24835 if (ira->codegen->verbose_cimport) {
23881 fprintf(stderr, "@cImport source: %s\n", buf_ptr(&tmp_c_file_path));24836 fprintf(stderr, "@cImport source: %s\n", buf_ptr(&tmp_c_file_path));
...@@ -23910,7 +24865,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct...@@ -23910,7 +24865,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
23910 {24865 {
23911 if (err != ErrorCCompileErrors) {24866 if (err != ErrorCCompileErrors) {
23912 ir_add_error_node(ira, node, buf_sprintf("C import failed: %s", err_str(err)));24867 ir_add_error_node(ira, node, buf_sprintf("C import failed: %s", err_str(err)));
23913 return ira->codegen->invalid_instruction;24868 return ira->codegen->invalid_inst_gen;
23914 }24869 }
2391524870
23916 ErrorMsg *parent_err_msg = ir_add_error_node(ira, node, buf_sprintf("C import failed"));24871 ErrorMsg *parent_err_msg = ir_add_error_node(ira, node, buf_sprintf("C import failed"));
...@@ -23931,7 +24886,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct...@@ -23931,7 +24886,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
23931 }24886 }
23932 }24887 }
2393324888
23934 return ira->codegen->invalid_instruction;24889 return ira->codegen->invalid_inst_gen;
23935 }24890 }
23936 if (ira->codegen->verbose_cimport) {24891 if (ira->codegen->verbose_cimport) {
23937 fprintf(stderr, "@cImport .d file: %s\n", buf_ptr(tmp_dep_file));24892 fprintf(stderr, "@cImport .d file: %s\n", buf_ptr(tmp_dep_file));
...@@ -23939,29 +24894,29 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct...@@ -23939,29 +24894,29 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2393924894
23940 if ((err = cache_add_dep_file(cache_hash, tmp_dep_file, false))) {24895 if ((err = cache_add_dep_file(cache_hash, tmp_dep_file, false))) {
23941 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to parse .d file: %s", err_str(err)));24896 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to parse .d file: %s", err_str(err)));
23942 return ira->codegen->invalid_instruction;24897 return ira->codegen->invalid_inst_gen;
23943 }24898 }
23944 if ((err = cache_final(cache_hash, &tmp_c_file_digest))) {24899 if ((err = cache_final(cache_hash, &tmp_c_file_digest))) {
23945 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to finalize cache: %s", err_str(err)));24900 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to finalize cache: %s", err_str(err)));
23946 return ira->codegen->invalid_instruction;24901 return ira->codegen->invalid_inst_gen;
23947 }24902 }
2394824903
23949 ir_cimport_cache_paths(ira->codegen->cache_dir, &tmp_c_file_digest, out_zig_dir, out_zig_path);24904 ir_cimport_cache_paths(ira->codegen->cache_dir, &tmp_c_file_digest, out_zig_dir, out_zig_path);
23950 if ((err = os_make_path(out_zig_dir))) {24905 if ((err = os_make_path(out_zig_dir))) {
23951 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to make output dir: %s", err_str(err)));24906 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to make output dir: %s", err_str(err)));
23952 return ira->codegen->invalid_instruction;24907 return ira->codegen->invalid_inst_gen;
23953 }24908 }
23954 FILE *out_file = fopen(buf_ptr(out_zig_path), "wb");24909 FILE *out_file = fopen(buf_ptr(out_zig_path), "wb");
23955 if (out_file == nullptr) {24910 if (out_file == nullptr) {
23956 ir_add_error_node(ira, node,24911 ir_add_error_node(ira, node,
23957 buf_sprintf("C import failed: unable to open output file: %s", strerror(errno)));24912 buf_sprintf("C import failed: unable to open output file: %s", strerror(errno)));
23958 return ira->codegen->invalid_instruction;24913 return ira->codegen->invalid_inst_gen;
23959 }24914 }
23960 stage2_render_ast(ast, out_file);24915 stage2_render_ast(ast, out_file);
23961 if (fclose(out_file) != 0) {24916 if (fclose(out_file) != 0) {
23962 ir_add_error_node(ira, node,24917 ir_add_error_node(ira, node,
23963 buf_sprintf("C import failed: unable to write to output file: %s", strerror(errno)));24918 buf_sprintf("C import failed: unable to write to output file: %s", strerror(errno)));
23964 return ira->codegen->invalid_instruction;24919 return ira->codegen->invalid_inst_gen;
23965 }24920 }
2396624921
23967 if (ira->codegen->verbose_cimport) {24922 if (ira->codegen->verbose_cimport) {
...@@ -23980,90 +24935,90 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct...@@ -23980,90 +24935,90 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
23980 if ((err = file_fetch(ira->codegen, out_zig_path, import_code))) {24935 if ((err = file_fetch(ira->codegen, out_zig_path, import_code))) {
23981 ir_add_error_node(ira, node,24936 ir_add_error_node(ira, node,
23982 buf_sprintf("unable to open '%s': %s", buf_ptr(out_zig_path), err_str(err)));24937 buf_sprintf("unable to open '%s': %s", buf_ptr(out_zig_path), err_str(err)));
23983 return ira->codegen->invalid_instruction;24938 return ira->codegen->invalid_inst_gen;
23984 }24939 }
23985 ZigType *child_import = add_source_file(ira->codegen, cimport_pkg, out_zig_path,24940 ZigType *child_import = add_source_file(ira->codegen, cimport_pkg, out_zig_path,
23986 import_code, SourceKindCImport);24941 import_code, SourceKindCImport);
23987 return ir_const_type(ira, &instruction->base, child_import);24942 return ir_const_type(ira, &instruction->base.base, child_import);
23988}24943}
2398924944
23990static IrInstruction *ir_analyze_instruction_c_include(IrAnalyze *ira, IrInstructionCInclude *instruction) {24945static IrInstGen *ir_analyze_instruction_c_include(IrAnalyze *ira, IrInstSrcCInclude *instruction) {
23991 IrInstruction *name_value = instruction->name->child;24946 IrInstGen *name_value = instruction->name->child;
23992 if (type_is_invalid(name_value->value->type))24947 if (type_is_invalid(name_value->value->type))
23993 return ira->codegen->invalid_instruction;24948 return ira->codegen->invalid_inst_gen;
2399424949
23995 Buf *include_name = ir_resolve_str(ira, name_value);24950 Buf *include_name = ir_resolve_str(ira, name_value);
23996 if (!include_name)24951 if (!include_name)
23997 return ira->codegen->invalid_instruction;24952 return ira->codegen->invalid_inst_gen;
2399824953
23999 Buf *c_import_buf = exec_c_import_buf(ira->new_irb.exec);24954 Buf *c_import_buf = ira->new_irb.exec->c_import_buf;
24000 // We check for this error in pass124955 // We check for this error in pass1
24001 assert(c_import_buf);24956 assert(c_import_buf);
2400224957
24003 buf_appendf(c_import_buf, "#include <%s>\n", buf_ptr(include_name));24958 buf_appendf(c_import_buf, "#include <%s>\n", buf_ptr(include_name));
2400424959
24005 return ir_const_void(ira, &instruction->base);24960 return ir_const_void(ira, &instruction->base.base);
24006}24961}
2400724962
24008static IrInstruction *ir_analyze_instruction_c_define(IrAnalyze *ira, IrInstructionCDefine *instruction) {24963static IrInstGen *ir_analyze_instruction_c_define(IrAnalyze *ira, IrInstSrcCDefine *instruction) {
24009 IrInstruction *name = instruction->name->child;24964 IrInstGen *name = instruction->name->child;
24010 if (type_is_invalid(name->value->type))24965 if (type_is_invalid(name->value->type))
24011 return ira->codegen->invalid_instruction;24966 return ira->codegen->invalid_inst_gen;
2401224967
24013 Buf *define_name = ir_resolve_str(ira, name);24968 Buf *define_name = ir_resolve_str(ira, name);
24014 if (!define_name)24969 if (!define_name)
24015 return ira->codegen->invalid_instruction;24970 return ira->codegen->invalid_inst_gen;
2401624971
24017 IrInstruction *value = instruction->value->child;24972 IrInstGen *value = instruction->value->child;
24018 if (type_is_invalid(value->value->type))24973 if (type_is_invalid(value->value->type))
24019 return ira->codegen->invalid_instruction;24974 return ira->codegen->invalid_inst_gen;
2402024975
24021 Buf *define_value = nullptr;24976 Buf *define_value = nullptr;
24022 // The second parameter is either a string or void (equivalent to "")24977 // The second parameter is either a string or void (equivalent to "")
24023 if (value->value->type->id != ZigTypeIdVoid) {24978 if (value->value->type->id != ZigTypeIdVoid) {
24024 define_value = ir_resolve_str(ira, value);24979 define_value = ir_resolve_str(ira, value);
24025 if (!define_value)24980 if (!define_value)
24026 return ira->codegen->invalid_instruction;24981 return ira->codegen->invalid_inst_gen;
24027 }24982 }
2402824983
24029 Buf *c_import_buf = exec_c_import_buf(ira->new_irb.exec);24984 Buf *c_import_buf = ira->new_irb.exec->c_import_buf;
24030 // We check for this error in pass124985 // We check for this error in pass1
24031 assert(c_import_buf);24986 assert(c_import_buf);
2403224987
24033 buf_appendf(c_import_buf, "#define %s %s\n", buf_ptr(define_name),24988 buf_appendf(c_import_buf, "#define %s %s\n", buf_ptr(define_name),
24034 define_value ? buf_ptr(define_value) : "");24989 define_value ? buf_ptr(define_value) : "");
2403524990
24036 return ir_const_void(ira, &instruction->base);24991 return ir_const_void(ira, &instruction->base.base);
24037}24992}
2403824993
24039static IrInstruction *ir_analyze_instruction_c_undef(IrAnalyze *ira, IrInstructionCUndef *instruction) {24994static IrInstGen *ir_analyze_instruction_c_undef(IrAnalyze *ira, IrInstSrcCUndef *instruction) {
24040 IrInstruction *name = instruction->name->child;24995 IrInstGen *name = instruction->name->child;
24041 if (type_is_invalid(name->value->type))24996 if (type_is_invalid(name->value->type))
24042 return ira->codegen->invalid_instruction;24997 return ira->codegen->invalid_inst_gen;
2404324998
24044 Buf *undef_name = ir_resolve_str(ira, name);24999 Buf *undef_name = ir_resolve_str(ira, name);
24045 if (!undef_name)25000 if (!undef_name)
24046 return ira->codegen->invalid_instruction;25001 return ira->codegen->invalid_inst_gen;
2404725002
24048 Buf *c_import_buf = exec_c_import_buf(ira->new_irb.exec);25003 Buf *c_import_buf = ira->new_irb.exec->c_import_buf;
24049 // We check for this error in pass125004 // We check for this error in pass1
24050 assert(c_import_buf);25005 assert(c_import_buf);
2405125006
24052 buf_appendf(c_import_buf, "#undef %s\n", buf_ptr(undef_name));25007 buf_appendf(c_import_buf, "#undef %s\n", buf_ptr(undef_name));
2405325008
24054 return ir_const_void(ira, &instruction->base);25009 return ir_const_void(ira, &instruction->base.base);
24055}25010}
2405625011
24057static IrInstruction *ir_analyze_instruction_embed_file(IrAnalyze *ira, IrInstructionEmbedFile *instruction) {25012static IrInstGen *ir_analyze_instruction_embed_file(IrAnalyze *ira, IrInstSrcEmbedFile *instruction) {
24058 IrInstruction *name = instruction->name->child;25013 IrInstGen *name = instruction->name->child;
24059 if (type_is_invalid(name->value->type))25014 if (type_is_invalid(name->value->type))
24060 return ira->codegen->invalid_instruction;25015 return ira->codegen->invalid_inst_gen;
2406125016
24062 Buf *rel_file_path = ir_resolve_str(ira, name);25017 Buf *rel_file_path = ir_resolve_str(ira, name);
24063 if (!rel_file_path)25018 if (!rel_file_path)
24064 return ira->codegen->invalid_instruction;25019 return ira->codegen->invalid_inst_gen;
2406525020
24066 ZigType *import = get_scope_import(instruction->base.scope);25021 ZigType *import = get_scope_import(instruction->base.base.scope);
24067 // figure out absolute path to resource25022 // figure out absolute path to resource
24068 Buf source_dir_path = BUF_INIT;25023 Buf source_dir_path = BUF_INIT;
24069 os_path_dirname(import->data.structure.root_struct->path, &source_dir_path);25024 os_path_dirname(import->data.structure.root_struct->path, &source_dir_path);
...@@ -24080,93 +25035,95 @@ static IrInstruction *ir_analyze_instruction_embed_file(IrAnalyze *ira, IrInstru...@@ -24080,93 +25035,95 @@ static IrInstruction *ir_analyze_instruction_embed_file(IrAnalyze *ira, IrInstru
24080 Error err;25035 Error err;
24081 if ((err = file_fetch(ira->codegen, file_path, file_contents))) {25036 if ((err = file_fetch(ira->codegen, file_path, file_contents))) {
24082 if (err == ErrorFileNotFound) {25037 if (err == ErrorFileNotFound) {
24083 ir_add_error(ira, instruction->name, buf_sprintf("unable to find '%s'", buf_ptr(file_path)));25038 ir_add_error(ira, &instruction->name->base,
24084 return ira->codegen->invalid_instruction;25039 buf_sprintf("unable to find '%s'", buf_ptr(file_path)));
25040 return ira->codegen->invalid_inst_gen;
24085 } else {25041 } else {
24086 ir_add_error(ira, instruction->name, buf_sprintf("unable to open '%s': %s", buf_ptr(file_path), err_str(err)));25042 ir_add_error(ira, &instruction->name->base,
24087 return ira->codegen->invalid_instruction;25043 buf_sprintf("unable to open '%s': %s", buf_ptr(file_path), err_str(err)));
25044 return ira->codegen->invalid_inst_gen;
24088 }25045 }
24089 }25046 }
2409025047
24091 ZigType *result_type = get_array_type(ira->codegen,25048 ZigType *result_type = get_array_type(ira->codegen,
24092 ira->codegen->builtin_types.entry_u8, buf_len(file_contents), nullptr);25049 ira->codegen->builtin_types.entry_u8, buf_len(file_contents), nullptr);
24093 IrInstruction *result = ir_const(ira, &instruction->base, result_type);25050 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
24094 init_const_str_lit(ira->codegen, result->value, file_contents);25051 init_const_str_lit(ira->codegen, result->value, file_contents);
24095 return result;25052 return result;
24096}25053}
2409725054
24098static IrInstruction *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstructionCmpxchgSrc *instruction) {25055static IrInstGen *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstSrcCmpxchg *instruction) {
24099 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->type_value->child);25056 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->type_value->child);
24100 if (type_is_invalid(operand_type))25057 if (type_is_invalid(operand_type))
24101 return ira->codegen->invalid_instruction;25058 return ira->codegen->invalid_inst_gen;
2410225059
24103 if (operand_type->id == ZigTypeIdFloat) {25060 if (operand_type->id == ZigTypeIdFloat) {
24104 ir_add_error(ira, instruction->type_value->child,25061 ir_add_error(ira, &instruction->type_value->child->base,
24105 buf_sprintf("expected integer, enum or pointer type, found '%s'", buf_ptr(&operand_type->name)));25062 buf_sprintf("expected integer, enum or pointer type, found '%s'", buf_ptr(&operand_type->name)));
24106 return ira->codegen->invalid_instruction;25063 return ira->codegen->invalid_inst_gen;
24107 }25064 }
2410825065
24109 IrInstruction *ptr = instruction->ptr->child;25066 IrInstGen *ptr = instruction->ptr->child;
24110 if (type_is_invalid(ptr->value->type))25067 if (type_is_invalid(ptr->value->type))
24111 return ira->codegen->invalid_instruction;25068 return ira->codegen->invalid_inst_gen;
2411225069
24113 // TODO let this be volatile25070 // TODO let this be volatile
24114 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, false);25071 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, false);
24115 IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr, ptr_type);25072 IrInstGen *casted_ptr = ir_implicit_cast(ira, ptr, ptr_type);
24116 if (type_is_invalid(casted_ptr->value->type))25073 if (type_is_invalid(casted_ptr->value->type))
24117 return ira->codegen->invalid_instruction;25074 return ira->codegen->invalid_inst_gen;
2411825075
24119 IrInstruction *cmp_value = instruction->cmp_value->child;25076 IrInstGen *cmp_value = instruction->cmp_value->child;
24120 if (type_is_invalid(cmp_value->value->type))25077 if (type_is_invalid(cmp_value->value->type))
24121 return ira->codegen->invalid_instruction;25078 return ira->codegen->invalid_inst_gen;
2412225079
24123 IrInstruction *new_value = instruction->new_value->child;25080 IrInstGen *new_value = instruction->new_value->child;
24124 if (type_is_invalid(new_value->value->type))25081 if (type_is_invalid(new_value->value->type))
24125 return ira->codegen->invalid_instruction;25082 return ira->codegen->invalid_inst_gen;
2412625083
24127 IrInstruction *success_order_value = instruction->success_order_value->child;25084 IrInstGen *success_order_value = instruction->success_order_value->child;
24128 if (type_is_invalid(success_order_value->value->type))25085 if (type_is_invalid(success_order_value->value->type))
24129 return ira->codegen->invalid_instruction;25086 return ira->codegen->invalid_inst_gen;
2413025087
24131 AtomicOrder success_order;25088 AtomicOrder success_order;
24132 if (!ir_resolve_atomic_order(ira, success_order_value, &success_order))25089 if (!ir_resolve_atomic_order(ira, success_order_value, &success_order))
24133 return ira->codegen->invalid_instruction;25090 return ira->codegen->invalid_inst_gen;
2413425091
24135 IrInstruction *failure_order_value = instruction->failure_order_value->child;25092 IrInstGen *failure_order_value = instruction->failure_order_value->child;
24136 if (type_is_invalid(failure_order_value->value->type))25093 if (type_is_invalid(failure_order_value->value->type))
24137 return ira->codegen->invalid_instruction;25094 return ira->codegen->invalid_inst_gen;
2413825095
24139 AtomicOrder failure_order;25096 AtomicOrder failure_order;
24140 if (!ir_resolve_atomic_order(ira, failure_order_value, &failure_order))25097 if (!ir_resolve_atomic_order(ira, failure_order_value, &failure_order))
24141 return ira->codegen->invalid_instruction;25098 return ira->codegen->invalid_inst_gen;
2414225099
24143 IrInstruction *casted_cmp_value = ir_implicit_cast(ira, cmp_value, operand_type);25100 IrInstGen *casted_cmp_value = ir_implicit_cast(ira, cmp_value, operand_type);
24144 if (type_is_invalid(casted_cmp_value->value->type))25101 if (type_is_invalid(casted_cmp_value->value->type))
24145 return ira->codegen->invalid_instruction;25102 return ira->codegen->invalid_inst_gen;
2414625103
24147 IrInstruction *casted_new_value = ir_implicit_cast(ira, new_value, operand_type);25104 IrInstGen *casted_new_value = ir_implicit_cast(ira, new_value, operand_type);
24148 if (type_is_invalid(casted_new_value->value->type))25105 if (type_is_invalid(casted_new_value->value->type))
24149 return ira->codegen->invalid_instruction;25106 return ira->codegen->invalid_inst_gen;
2415025107
24151 if (success_order < AtomicOrderMonotonic) {25108 if (success_order < AtomicOrderMonotonic) {
24152 ir_add_error(ira, success_order_value,25109 ir_add_error(ira, &success_order_value->base,
24153 buf_sprintf("success atomic ordering must be Monotonic or stricter"));25110 buf_sprintf("success atomic ordering must be Monotonic or stricter"));
24154 return ira->codegen->invalid_instruction;25111 return ira->codegen->invalid_inst_gen;
24155 }25112 }
24156 if (failure_order < AtomicOrderMonotonic) {25113 if (failure_order < AtomicOrderMonotonic) {
24157 ir_add_error(ira, failure_order_value,25114 ir_add_error(ira, &failure_order_value->base,
24158 buf_sprintf("failure atomic ordering must be Monotonic or stricter"));25115 buf_sprintf("failure atomic ordering must be Monotonic or stricter"));
24159 return ira->codegen->invalid_instruction;25116 return ira->codegen->invalid_inst_gen;
24160 }25117 }
24161 if (failure_order > success_order) {25118 if (failure_order > success_order) {
24162 ir_add_error(ira, failure_order_value,25119 ir_add_error(ira, &failure_order_value->base,
24163 buf_sprintf("failure atomic ordering must be no stricter than success"));25120 buf_sprintf("failure atomic ordering must be no stricter than success"));
24164 return ira->codegen->invalid_instruction;25121 return ira->codegen->invalid_inst_gen;
24165 }25122 }
24166 if (failure_order == AtomicOrderRelease || failure_order == AtomicOrderAcqRel) {25123 if (failure_order == AtomicOrderRelease || failure_order == AtomicOrderAcqRel) {
24167 ir_add_error(ira, failure_order_value,25124 ir_add_error(ira, &failure_order_value->base,
24168 buf_sprintf("failure atomic ordering must not be Release or AcqRel"));25125 buf_sprintf("failure atomic ordering must not be Release or AcqRel"));
24169 return ira->codegen->invalid_instruction;25126 return ira->codegen->invalid_inst_gen;
24170 }25127 }
2417125128
24172 if (instr_is_comptime(casted_ptr) && casted_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar &&25129 if (instr_is_comptime(casted_ptr) && casted_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar &&
...@@ -24175,66 +25132,63 @@ static IrInstruction *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstructi...@@ -24175,66 +25132,63 @@ static IrInstruction *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstructi
24175 }25132 }
2417625133
24177 ZigType *result_type = get_optional_type(ira->codegen, operand_type);25134 ZigType *result_type = get_optional_type(ira->codegen, operand_type);
24178 IrInstruction *result_loc;25135 IrInstGen *result_loc;
24179 if (handle_is_ptr(result_type)) {25136 if (handle_is_ptr(result_type)) {
24180 result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,25137 result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
24181 result_type, nullptr, true, true);25138 result_type, nullptr, true, true);
24182 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {25139 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
24183 return result_loc;25140 return result_loc;
24184 }25141 }
24185 } else {25142 } else {
24186 result_loc = nullptr;25143 result_loc = nullptr;
24187 }25144 }
2418825145
24189 return ir_build_cmpxchg_gen(ira, &instruction->base, result_type,25146 return ir_build_cmpxchg_gen(ira, &instruction->base.base, result_type,
24190 casted_ptr, casted_cmp_value, casted_new_value,25147 casted_ptr, casted_cmp_value, casted_new_value,
24191 success_order, failure_order, instruction->is_weak, result_loc);25148 success_order, failure_order, instruction->is_weak, result_loc);
24192}25149}
2419325150
24194static IrInstruction *ir_analyze_instruction_fence(IrAnalyze *ira, IrInstructionFence *instruction) {25151static IrInstGen *ir_analyze_instruction_fence(IrAnalyze *ira, IrInstSrcFence *instruction) {
24195 IrInstruction *order_value = instruction->order_value->child;25152 IrInstGen *order_inst = instruction->order->child;
24196 if (type_is_invalid(order_value->value->type))25153 if (type_is_invalid(order_inst->value->type))
24197 return ira->codegen->invalid_instruction;25154 return ira->codegen->invalid_inst_gen;
2419825155
24199 AtomicOrder order;25156 AtomicOrder order;
24200 if (!ir_resolve_atomic_order(ira, order_value, &order))25157 if (!ir_resolve_atomic_order(ira, order_inst, &order))
24201 return ira->codegen->invalid_instruction;25158 return ira->codegen->invalid_inst_gen;
2420225159
24203 if (order < AtomicOrderAcquire) {25160 if (order < AtomicOrderAcquire) {
24204 ir_add_error(ira, order_value,25161 ir_add_error(ira, &order_inst->base,
24205 buf_sprintf("atomic ordering must be Acquire or stricter"));25162 buf_sprintf("atomic ordering must be Acquire or stricter"));
24206 return ira->codegen->invalid_instruction;25163 return ira->codegen->invalid_inst_gen;
24207 }25164 }
2420825165
24209 IrInstruction *result = ir_build_fence(&ira->new_irb,25166 return ir_build_fence_gen(ira, &instruction->base.base, order);
24210 instruction->base.scope, instruction->base.source_node, order_value, order);
24211 result->value->type = ira->codegen->builtin_types.entry_void;
24212 return result;
24213}25167}
2421425168
24215static IrInstruction *ir_analyze_instruction_truncate(IrAnalyze *ira, IrInstructionTruncate *instruction) {25169static IrInstGen *ir_analyze_instruction_truncate(IrAnalyze *ira, IrInstSrcTruncate *instruction) {
24216 IrInstruction *dest_type_value = instruction->dest_type->child;25170 IrInstGen *dest_type_value = instruction->dest_type->child;
24217 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);25171 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
24218 if (type_is_invalid(dest_type))25172 if (type_is_invalid(dest_type))
24219 return ira->codegen->invalid_instruction;25173 return ira->codegen->invalid_inst_gen;
2422025174
24221 if (dest_type->id != ZigTypeIdInt &&25175 if (dest_type->id != ZigTypeIdInt &&
24222 dest_type->id != ZigTypeIdComptimeInt)25176 dest_type->id != ZigTypeIdComptimeInt)
24223 {25177 {
24224 ir_add_error(ira, dest_type_value, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));25178 ir_add_error(ira, &dest_type_value->base, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
24225 return ira->codegen->invalid_instruction;25179 return ira->codegen->invalid_inst_gen;
24226 }25180 }
2422725181
24228 IrInstruction *target = instruction->target->child;25182 IrInstGen *target = instruction->target->child;
24229 ZigType *src_type = target->value->type;25183 ZigType *src_type = target->value->type;
24230 if (type_is_invalid(src_type))25184 if (type_is_invalid(src_type))
24231 return ira->codegen->invalid_instruction;25185 return ira->codegen->invalid_inst_gen;
2423225186
24233 if (src_type->id != ZigTypeIdInt &&25187 if (src_type->id != ZigTypeIdInt &&
24234 src_type->id != ZigTypeIdComptimeInt)25188 src_type->id != ZigTypeIdComptimeInt)
24235 {25189 {
24236 ir_add_error(ira, target, buf_sprintf("expected integer type, found '%s'", buf_ptr(&src_type->name)));25190 ir_add_error(ira, &target->base, buf_sprintf("expected integer type, found '%s'", buf_ptr(&src_type->name)));
24237 return ira->codegen->invalid_instruction;25191 return ira->codegen->invalid_inst_gen;
24238 }25192 }
2423925193
24240 if (dest_type->id == ZigTypeIdComptimeInt) {25194 if (dest_type->id == ZigTypeIdComptimeInt) {
...@@ -24244,54 +25198,51 @@ static IrInstruction *ir_analyze_instruction_truncate(IrAnalyze *ira, IrInstruct...@@ -24244,54 +25198,51 @@ static IrInstruction *ir_analyze_instruction_truncate(IrAnalyze *ira, IrInstruct
24244 if (instr_is_comptime(target)) {25198 if (instr_is_comptime(target)) {
24245 ZigValue *val = ir_resolve_const(ira, target, UndefBad);25199 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
24246 if (val == nullptr)25200 if (val == nullptr)
24247 return ira->codegen->invalid_instruction;25201 return ira->codegen->invalid_inst_gen;
2424825202
24249 IrInstruction *result = ir_const(ira, &instruction->base, dest_type);25203 IrInstGen *result = ir_const(ira, &instruction->base.base, dest_type);
24250 bigint_truncate(&result->value->data.x_bigint, &val->data.x_bigint,25204 bigint_truncate(&result->value->data.x_bigint, &val->data.x_bigint,
24251 dest_type->data.integral.bit_count, dest_type->data.integral.is_signed);25205 dest_type->data.integral.bit_count, dest_type->data.integral.is_signed);
24252 return result;25206 return result;
24253 }25207 }
2425425208
24255 if (src_type->data.integral.bit_count == 0 || dest_type->data.integral.bit_count == 0) {25209 if (src_type->data.integral.bit_count == 0 || dest_type->data.integral.bit_count == 0) {
24256 IrInstruction *result = ir_const(ira, &instruction->base, dest_type);25210 IrInstGen *result = ir_const(ira, &instruction->base.base, dest_type);
24257 bigint_init_unsigned(&result->value->data.x_bigint, 0);25211 bigint_init_unsigned(&result->value->data.x_bigint, 0);
24258 return result;25212 return result;
24259 }25213 }
2426025214
24261 if (src_type->data.integral.is_signed != dest_type->data.integral.is_signed) {25215 if (src_type->data.integral.is_signed != dest_type->data.integral.is_signed) {
24262 const char *sign_str = dest_type->data.integral.is_signed ? "signed" : "unsigned";25216 const char *sign_str = dest_type->data.integral.is_signed ? "signed" : "unsigned";
24263 ir_add_error(ira, target, buf_sprintf("expected %s integer type, found '%s'", sign_str, buf_ptr(&src_type->name)));25217 ir_add_error(ira, &target->base, buf_sprintf("expected %s integer type, found '%s'", sign_str, buf_ptr(&src_type->name)));
24264 return ira->codegen->invalid_instruction;25218 return ira->codegen->invalid_inst_gen;
24265 } else if (src_type->data.integral.bit_count < dest_type->data.integral.bit_count) {25219 } else if (src_type->data.integral.bit_count < dest_type->data.integral.bit_count) {
24266 ir_add_error(ira, target, buf_sprintf("type '%s' has fewer bits than destination type '%s'",25220 ir_add_error(ira, &target->base, buf_sprintf("type '%s' has fewer bits than destination type '%s'",
24267 buf_ptr(&src_type->name), buf_ptr(&dest_type->name)));25221 buf_ptr(&src_type->name), buf_ptr(&dest_type->name)));
24268 return ira->codegen->invalid_instruction;25222 return ira->codegen->invalid_inst_gen;
24269 }25223 }
2427025224
24271 IrInstruction *new_instruction = ir_build_truncate(&ira->new_irb, instruction->base.scope,25225 return ir_build_truncate_gen(ira, &instruction->base.base, dest_type, target);
24272 instruction->base.source_node, dest_type_value, target);
24273 new_instruction->value->type = dest_type;
24274 return new_instruction;
24275}25226}
2427625227
24277static IrInstruction *ir_analyze_instruction_int_cast(IrAnalyze *ira, IrInstructionIntCast *instruction) {25228static IrInstGen *ir_analyze_instruction_int_cast(IrAnalyze *ira, IrInstSrcIntCast *instruction) {
24278 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);25229 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
24279 if (type_is_invalid(dest_type))25230 if (type_is_invalid(dest_type))
24280 return ira->codegen->invalid_instruction;25231 return ira->codegen->invalid_inst_gen;
2428125232
24282 if (dest_type->id != ZigTypeIdInt && dest_type->id != ZigTypeIdComptimeInt) {25233 if (dest_type->id != ZigTypeIdInt && dest_type->id != ZigTypeIdComptimeInt) {
24283 ir_add_error(ira, instruction->dest_type, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));25234 ir_add_error(ira, &instruction->dest_type->base, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
24284 return ira->codegen->invalid_instruction;25235 return ira->codegen->invalid_inst_gen;
24285 }25236 }
2428625237
24287 IrInstruction *target = instruction->target->child;25238 IrInstGen *target = instruction->target->child;
24288 if (type_is_invalid(target->value->type))25239 if (type_is_invalid(target->value->type))
24289 return ira->codegen->invalid_instruction;25240 return ira->codegen->invalid_inst_gen;
2429025241
24291 if (target->value->type->id != ZigTypeIdInt && target->value->type->id != ZigTypeIdComptimeInt) {25242 if (target->value->type->id != ZigTypeIdInt && target->value->type->id != ZigTypeIdComptimeInt) {
24292 ir_add_error(ira, instruction->target, buf_sprintf("expected integer type, found '%s'",25243 ir_add_error(ira, &instruction->target->base, buf_sprintf("expected integer type, found '%s'",
24293 buf_ptr(&target->value->type->name)));25244 buf_ptr(&target->value->type->name)));
24294 return ira->codegen->invalid_instruction;25245 return ira->codegen->invalid_inst_gen;
24295 }25246 }
2429625247
24297 if (instr_is_comptime(target)) {25248 if (instr_is_comptime(target)) {
...@@ -24299,28 +25250,28 @@ static IrInstruction *ir_analyze_instruction_int_cast(IrAnalyze *ira, IrInstruct...@@ -24299,28 +25250,28 @@ static IrInstruction *ir_analyze_instruction_int_cast(IrAnalyze *ira, IrInstruct
24299 }25250 }
2430025251
24301 if (dest_type->id == ZigTypeIdComptimeInt) {25252 if (dest_type->id == ZigTypeIdComptimeInt) {
24302 ir_add_error(ira, instruction->target, buf_sprintf("attempt to cast runtime value to '%s'",25253 ir_add_error(ira, &instruction->target->base, buf_sprintf("attempt to cast runtime value to '%s'",
24303 buf_ptr(&dest_type->name)));25254 buf_ptr(&dest_type->name)));
24304 return ira->codegen->invalid_instruction;25255 return ira->codegen->invalid_inst_gen;
24305 }25256 }
2430625257
24307 return ir_analyze_widen_or_shorten(ira, &instruction->base, target, dest_type);25258 return ir_analyze_widen_or_shorten(ira, &instruction->base.base, target, dest_type);
24308}25259}
2430925260
24310static IrInstruction *ir_analyze_instruction_float_cast(IrAnalyze *ira, IrInstructionFloatCast *instruction) {25261static IrInstGen *ir_analyze_instruction_float_cast(IrAnalyze *ira, IrInstSrcFloatCast *instruction) {
24311 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);25262 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
24312 if (type_is_invalid(dest_type))25263 if (type_is_invalid(dest_type))
24313 return ira->codegen->invalid_instruction;25264 return ira->codegen->invalid_inst_gen;
2431425265
24315 if (dest_type->id != ZigTypeIdFloat) {25266 if (dest_type->id != ZigTypeIdFloat) {
24316 ir_add_error(ira, instruction->dest_type,25267 ir_add_error(ira, &instruction->dest_type->base,
24317 buf_sprintf("expected float type, found '%s'", buf_ptr(&dest_type->name)));25268 buf_sprintf("expected float type, found '%s'", buf_ptr(&dest_type->name)));
24318 return ira->codegen->invalid_instruction;25269 return ira->codegen->invalid_inst_gen;
24319 }25270 }
2432025271
24321 IrInstruction *target = instruction->target->child;25272 IrInstGen *target = instruction->target->child;
24322 if (type_is_invalid(target->value->type))25273 if (type_is_invalid(target->value->type))
24323 return ira->codegen->invalid_instruction;25274 return ira->codegen->invalid_inst_gen;
2432425275
24325 if (target->value->type->id == ZigTypeIdComptimeInt ||25276 if (target->value->type->id == ZigTypeIdComptimeInt ||
24326 target->value->type->id == ZigTypeIdComptimeFloat)25277 target->value->type->id == ZigTypeIdComptimeFloat)
...@@ -24332,55 +25283,55 @@ static IrInstruction *ir_analyze_instruction_float_cast(IrAnalyze *ira, IrInstru...@@ -24332,55 +25283,55 @@ static IrInstruction *ir_analyze_instruction_float_cast(IrAnalyze *ira, IrInstru
24332 } else {25283 } else {
24333 op = CastOpNumLitToConcrete;25284 op = CastOpNumLitToConcrete;
24334 }25285 }
24335 return ir_resolve_cast(ira, &instruction->base, target, dest_type, op);25286 return ir_resolve_cast(ira, &instruction->base.base, target, dest_type, op);
24336 } else {25287 } else {
24337 return ira->codegen->invalid_instruction;25288 return ira->codegen->invalid_inst_gen;
24338 }25289 }
24339 }25290 }
2434025291
24341 if (target->value->type->id != ZigTypeIdFloat) {25292 if (target->value->type->id != ZigTypeIdFloat) {
24342 ir_add_error(ira, instruction->target, buf_sprintf("expected float type, found '%s'",25293 ir_add_error(ira, &instruction->target->base, buf_sprintf("expected float type, found '%s'",
24343 buf_ptr(&target->value->type->name)));25294 buf_ptr(&target->value->type->name)));
24344 return ira->codegen->invalid_instruction;25295 return ira->codegen->invalid_inst_gen;
24345 }25296 }
2434625297
24347 return ir_analyze_widen_or_shorten(ira, &instruction->base, target, dest_type);25298 return ir_analyze_widen_or_shorten(ira, &instruction->base.base, target, dest_type);
24348}25299}
2434925300
24350static IrInstruction *ir_analyze_instruction_err_set_cast(IrAnalyze *ira, IrInstructionErrSetCast *instruction) {25301static IrInstGen *ir_analyze_instruction_err_set_cast(IrAnalyze *ira, IrInstSrcErrSetCast *instruction) {
24351 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);25302 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
24352 if (type_is_invalid(dest_type))25303 if (type_is_invalid(dest_type))
24353 return ira->codegen->invalid_instruction;25304 return ira->codegen->invalid_inst_gen;
2435425305
24355 if (dest_type->id != ZigTypeIdErrorSet) {25306 if (dest_type->id != ZigTypeIdErrorSet) {
24356 ir_add_error(ira, instruction->dest_type,25307 ir_add_error(ira, &instruction->dest_type->base,
24357 buf_sprintf("expected error set type, found '%s'", buf_ptr(&dest_type->name)));25308 buf_sprintf("expected error set type, found '%s'", buf_ptr(&dest_type->name)));
24358 return ira->codegen->invalid_instruction;25309 return ira->codegen->invalid_inst_gen;
24359 }25310 }
2436025311
24361 IrInstruction *target = instruction->target->child;25312 IrInstGen *target = instruction->target->child;
24362 if (type_is_invalid(target->value->type))25313 if (type_is_invalid(target->value->type))
24363 return ira->codegen->invalid_instruction;25314 return ira->codegen->invalid_inst_gen;
2436425315
24365 if (target->value->type->id != ZigTypeIdErrorSet) {25316 if (target->value->type->id != ZigTypeIdErrorSet) {
24366 ir_add_error(ira, instruction->target,25317 ir_add_error(ira, &instruction->target->base,
24367 buf_sprintf("expected error set type, found '%s'", buf_ptr(&target->value->type->name)));25318 buf_sprintf("expected error set type, found '%s'", buf_ptr(&target->value->type->name)));
24368 return ira->codegen->invalid_instruction;25319 return ira->codegen->invalid_inst_gen;
24369 }25320 }
2437025321
24371 return ir_analyze_err_set_cast(ira, &instruction->base, target, dest_type);25322 return ir_analyze_err_set_cast(ira, &instruction->base.base, target, dest_type);
24372}25323}
2437325324
24374static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstructionFromBytes *instruction) {25325static IrInstGen *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstSrcFromBytes *instruction) {
24375 Error err;25326 Error err;
2437625327
24377 ZigType *dest_child_type = ir_resolve_type(ira, instruction->dest_child_type->child);25328 ZigType *dest_child_type = ir_resolve_type(ira, instruction->dest_child_type->child);
24378 if (type_is_invalid(dest_child_type))25329 if (type_is_invalid(dest_child_type))
24379 return ira->codegen->invalid_instruction;25330 return ira->codegen->invalid_inst_gen;
2438025331
24381 IrInstruction *target = instruction->target->child;25332 IrInstGen *target = instruction->target->child;
24382 if (type_is_invalid(target->value->type))25333 if (type_is_invalid(target->value->type))
24383 return ira->codegen->invalid_instruction;25334 return ira->codegen->invalid_inst_gen;
2438425335
24385 bool src_ptr_const;25336 bool src_ptr_const;
24386 bool src_ptr_volatile;25337 bool src_ptr_volatile;
...@@ -24390,27 +25341,27 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru...@@ -24390,27 +25341,27 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
24390 src_ptr_volatile = target->value->type->data.pointer.is_volatile;25341 src_ptr_volatile = target->value->type->data.pointer.is_volatile;
2439125342
24392 if ((err = resolve_ptr_align(ira, target->value->type, &src_ptr_align)))25343 if ((err = resolve_ptr_align(ira, target->value->type, &src_ptr_align)))
24393 return ira->codegen->invalid_instruction;25344 return ira->codegen->invalid_inst_gen;
24394 } else if (is_slice(target->value->type)) {25345 } else if (is_slice(target->value->type)) {
24395 ZigType *src_ptr_type = target->value->type->data.structure.fields[slice_ptr_index]->type_entry;25346 ZigType *src_ptr_type = target->value->type->data.structure.fields[slice_ptr_index]->type_entry;
24396 src_ptr_const = src_ptr_type->data.pointer.is_const;25347 src_ptr_const = src_ptr_type->data.pointer.is_const;
24397 src_ptr_volatile = src_ptr_type->data.pointer.is_volatile;25348 src_ptr_volatile = src_ptr_type->data.pointer.is_volatile;
2439825349
24399 if ((err = resolve_ptr_align(ira, src_ptr_type, &src_ptr_align)))25350 if ((err = resolve_ptr_align(ira, src_ptr_type, &src_ptr_align)))
24400 return ira->codegen->invalid_instruction;25351 return ira->codegen->invalid_inst_gen;
24401 } else {25352 } else {
24402 src_ptr_const = true;25353 src_ptr_const = true;
24403 src_ptr_volatile = false;25354 src_ptr_volatile = false;
2440425355
24405 if ((err = type_resolve(ira->codegen, target->value->type, ResolveStatusAlignmentKnown)))25356 if ((err = type_resolve(ira->codegen, target->value->type, ResolveStatusAlignmentKnown)))
24406 return ira->codegen->invalid_instruction;25357 return ira->codegen->invalid_inst_gen;
2440725358
24408 src_ptr_align = get_abi_alignment(ira->codegen, target->value->type);25359 src_ptr_align = get_abi_alignment(ira->codegen, target->value->type);
24409 }25360 }
2441025361
24411 if (src_ptr_align != 0) {25362 if (src_ptr_align != 0) {
24412 if ((err = type_resolve(ira->codegen, dest_child_type, ResolveStatusAlignmentKnown)))25363 if ((err = type_resolve(ira->codegen, dest_child_type, ResolveStatusAlignmentKnown)))
24413 return ira->codegen->invalid_instruction;25364 return ira->codegen->invalid_inst_gen;
24414 }25365 }
2441525366
24416 ZigType *dest_ptr_type = get_pointer_to_type_extra(ira->codegen, dest_child_type,25367 ZigType *dest_ptr_type = get_pointer_to_type_extra(ira->codegen, dest_child_type,
...@@ -24423,9 +25374,9 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru...@@ -24423,9 +25374,9 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
24423 src_ptr_align, 0, 0, false);25374 src_ptr_align, 0, 0, false);
24424 ZigType *u8_slice = get_slice_type(ira->codegen, u8_ptr);25375 ZigType *u8_slice = get_slice_type(ira->codegen, u8_ptr);
2442525376
24426 IrInstruction *casted_value = ir_implicit_cast(ira, target, u8_slice);25377 IrInstGen *casted_value = ir_implicit_cast(ira, target, u8_slice);
24427 if (type_is_invalid(casted_value->value->type))25378 if (type_is_invalid(casted_value->value->type))
24428 return ira->codegen->invalid_instruction;25379 return ira->codegen->invalid_inst_gen;
2442925380
24430 bool have_known_len = false;25381 bool have_known_len = false;
24431 uint64_t known_len;25382 uint64_t known_len;
...@@ -24433,7 +25384,7 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru...@@ -24433,7 +25384,7 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
24433 if (instr_is_comptime(casted_value)) {25384 if (instr_is_comptime(casted_value)) {
24434 ZigValue *val = ir_resolve_const(ira, casted_value, UndefBad);25385 ZigValue *val = ir_resolve_const(ira, casted_value, UndefBad);
24435 if (!val)25386 if (!val)
24436 return ira->codegen->invalid_instruction;25387 return ira->codegen->invalid_inst_gen;
2443725388
24438 ZigValue *len_val = val->data.x_struct.fields[slice_len_index];25389 ZigValue *len_val = val->data.x_struct.fields[slice_len_index];
24439 if (value_is_comptime(len_val)) {25390 if (value_is_comptime(len_val)) {
...@@ -24442,9 +25393,9 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru...@@ -24442,9 +25393,9 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
24442 }25393 }
24443 }25394 }
2444425395
24445 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,25396 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
24446 dest_slice_type, nullptr, true, true);25397 dest_slice_type, nullptr, true, true);
24447 if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc))) {25398 if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable)) {
24448 return result_loc;25399 return result_loc;
24449 }25400 }
2445025401
...@@ -24461,41 +25412,41 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru...@@ -24461,41 +25412,41 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
2446125412
24462 if (have_known_len) {25413 if (have_known_len) {
24463 if ((err = type_resolve(ira->codegen, dest_child_type, ResolveStatusSizeKnown)))25414 if ((err = type_resolve(ira->codegen, dest_child_type, ResolveStatusSizeKnown)))
24464 return ira->codegen->invalid_instruction;25415 return ira->codegen->invalid_inst_gen;
24465 uint64_t child_type_size = type_size(ira->codegen, dest_child_type);25416 uint64_t child_type_size = type_size(ira->codegen, dest_child_type);
24466 uint64_t remainder = known_len % child_type_size;25417 uint64_t remainder = known_len % child_type_size;
24467 if (remainder != 0) {25418 if (remainder != 0) {
24468 ErrorMsg *msg = ir_add_error(ira, &instruction->base,25419 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
24469 buf_sprintf("unable to convert [%" ZIG_PRI_u64 "]u8 to %s: size mismatch",25420 buf_sprintf("unable to convert [%" ZIG_PRI_u64 "]u8 to %s: size mismatch",
24470 known_len, buf_ptr(&dest_slice_type->name)));25421 known_len, buf_ptr(&dest_slice_type->name)));
24471 add_error_note(ira->codegen, msg, instruction->dest_child_type->source_node,25422 add_error_note(ira->codegen, msg, instruction->dest_child_type->base.source_node,
24472 buf_sprintf("%s has size %" ZIG_PRI_u64 "; remaining bytes: %" ZIG_PRI_u64,25423 buf_sprintf("%s has size %" ZIG_PRI_u64 "; remaining bytes: %" ZIG_PRI_u64,
24473 buf_ptr(&dest_child_type->name), child_type_size, remainder));25424 buf_ptr(&dest_child_type->name), child_type_size, remainder));
24474 return ira->codegen->invalid_instruction;25425 return ira->codegen->invalid_inst_gen;
24475 }25426 }
24476 }25427 }
2447725428
24478 return ir_build_resize_slice(ira, &instruction->base, casted_value, dest_slice_type, result_loc);25429 return ir_build_resize_slice(ira, &instruction->base.base, casted_value, dest_slice_type, result_loc);
24479}25430}
2448025431
24481static IrInstruction *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstructionToBytes *instruction) {25432static IrInstGen *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstSrcToBytes *instruction) {
24482 Error err;25433 Error err;
2448325434
24484 IrInstruction *target = instruction->target->child;25435 IrInstGen *target = instruction->target->child;
24485 if (type_is_invalid(target->value->type))25436 if (type_is_invalid(target->value->type))
24486 return ira->codegen->invalid_instruction;25437 return ira->codegen->invalid_inst_gen;
2448725438
24488 if (!is_slice(target->value->type)) {25439 if (!is_slice(target->value->type)) {
24489 ir_add_error(ira, instruction->target,25440 ir_add_error(ira, &instruction->target->base,
24490 buf_sprintf("expected slice, found '%s'", buf_ptr(&target->value->type->name)));25441 buf_sprintf("expected slice, found '%s'", buf_ptr(&target->value->type->name)));
24491 return ira->codegen->invalid_instruction;25442 return ira->codegen->invalid_inst_gen;
24492 }25443 }
2449325444
24494 ZigType *src_ptr_type = target->value->type->data.structure.fields[slice_ptr_index]->type_entry;25445 ZigType *src_ptr_type = target->value->type->data.structure.fields[slice_ptr_index]->type_entry;
2449525446
24496 uint32_t alignment;25447 uint32_t alignment;
24497 if ((err = resolve_ptr_align(ira, src_ptr_type, &alignment)))25448 if ((err = resolve_ptr_align(ira, src_ptr_type, &alignment)))
24498 return ira->codegen->invalid_instruction;25449 return ira->codegen->invalid_inst_gen;
2449925450
24500 ZigType *dest_ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,25451 ZigType *dest_ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
24501 src_ptr_type->data.pointer.is_const, src_ptr_type->data.pointer.is_volatile, PtrLenUnknown,25452 src_ptr_type->data.pointer.is_const, src_ptr_type->data.pointer.is_volatile, PtrLenUnknown,
...@@ -24505,9 +25456,9 @@ static IrInstruction *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstruct...@@ -24505,9 +25456,9 @@ static IrInstruction *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstruct
24505 if (instr_is_comptime(target)) {25456 if (instr_is_comptime(target)) {
24506 ZigValue *target_val = ir_resolve_const(ira, target, UndefBad);25457 ZigValue *target_val = ir_resolve_const(ira, target, UndefBad);
24507 if (target_val == nullptr)25458 if (target_val == nullptr)
24508 return ira->codegen->invalid_instruction;25459 return ira->codegen->invalid_inst_gen;
2450925460
24510 IrInstruction *result = ir_const(ira, &instruction->base, dest_slice_type);25461 IrInstGen *result = ir_const(ira, &instruction->base.base, dest_slice_type);
24511 result->value->data.x_struct.fields = alloc_const_vals_ptrs(2);25462 result->value->data.x_struct.fields = alloc_const_vals_ptrs(2);
2451225463
24513 ZigValue *ptr_val = result->value->data.x_struct.fields[slice_ptr_index];25464 ZigValue *ptr_val = result->value->data.x_struct.fields[slice_ptr_index];
...@@ -24527,13 +25478,13 @@ static IrInstruction *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstruct...@@ -24527,13 +25478,13 @@ static IrInstruction *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstruct
24527 return result;25478 return result;
24528 }25479 }
2452925480
24530 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,25481 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
24531 dest_slice_type, nullptr, true, true);25482 dest_slice_type, nullptr, true, true);
24532 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {25483 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
24533 return result_loc;25484 return result_loc;
24534 }25485 }
2453525486
24536 return ir_build_resize_slice(ira, &instruction->base, target, dest_slice_type, result_loc);25487 return ir_build_resize_slice(ira, &instruction->base.base, target, dest_slice_type, result_loc);
24537}25488}
2453825489
24539static Error resolve_ptr_align(IrAnalyze *ira, ZigType *ty, uint32_t *result_align) {25490static Error resolve_ptr_align(IrAnalyze *ira, ZigType *ty, uint32_t *result_align) {
...@@ -24550,26 +25501,26 @@ static Error resolve_ptr_align(IrAnalyze *ira, ZigType *ty, uint32_t *result_ali...@@ -24550,26 +25501,26 @@ static Error resolve_ptr_align(IrAnalyze *ira, ZigType *ty, uint32_t *result_ali
24550 return ErrorNone;25501 return ErrorNone;
24551}25502}
2455225503
24553static IrInstruction *ir_analyze_instruction_int_to_float(IrAnalyze *ira, IrInstructionIntToFloat *instruction) {25504static IrInstGen *ir_analyze_instruction_int_to_float(IrAnalyze *ira, IrInstSrcIntToFloat *instruction) {
24554 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);25505 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
24555 if (type_is_invalid(dest_type))25506 if (type_is_invalid(dest_type))
24556 return ira->codegen->invalid_instruction;25507 return ira->codegen->invalid_inst_gen;
2455725508
24558 IrInstruction *target = instruction->target->child;25509 IrInstGen *target = instruction->target->child;
24559 if (type_is_invalid(target->value->type))25510 if (type_is_invalid(target->value->type))
24560 return ira->codegen->invalid_instruction;25511 return ira->codegen->invalid_inst_gen;
2456125512
24562 if (target->value->type->id != ZigTypeIdInt && target->value->type->id != ZigTypeIdComptimeInt) {25513 if (target->value->type->id != ZigTypeIdInt && target->value->type->id != ZigTypeIdComptimeInt) {
24563 ir_add_error(ira, instruction->target, buf_sprintf("expected int type, found '%s'",25514 ir_add_error(ira, &instruction->target->base, buf_sprintf("expected int type, found '%s'",
24564 buf_ptr(&target->value->type->name)));25515 buf_ptr(&target->value->type->name)));
24565 return ira->codegen->invalid_instruction;25516 return ira->codegen->invalid_inst_gen;
24566 }25517 }
2456725518
24568 return ir_resolve_cast(ira, &instruction->base, target, dest_type, CastOpIntToFloat);25519 return ir_resolve_cast(ira, &instruction->base.base, target, dest_type, CastOpIntToFloat);
24569}25520}
2457025521
24571static IrInstruction *ir_analyze_float_to_int(IrAnalyze *ira, IrInstruction *source_instr,25522static IrInstGen *ir_analyze_float_to_int(IrAnalyze *ira, IrInst* source_instr,
24572 ZigType *dest_type, IrInstruction *operand, AstNode *operand_source_node)25523 ZigType *dest_type, IrInstGen *operand, AstNode *operand_source_node)
24573{25524{
24574 if (operand->value->type->id == ZigTypeIdComptimeInt) {25525 if (operand->value->type->id == ZigTypeIdComptimeInt) {
24575 return ir_implicit_cast(ira, operand, dest_type);25526 return ir_implicit_cast(ira, operand, dest_type);
...@@ -24578,106 +25529,107 @@ static IrInstruction *ir_analyze_float_to_int(IrAnalyze *ira, IrInstruction *sou...@@ -24578,106 +25529,107 @@ static IrInstruction *ir_analyze_float_to_int(IrAnalyze *ira, IrInstruction *sou
24578 if (operand->value->type->id != ZigTypeIdFloat && operand->value->type->id != ZigTypeIdComptimeFloat) {25529 if (operand->value->type->id != ZigTypeIdFloat && operand->value->type->id != ZigTypeIdComptimeFloat) {
24579 ir_add_error_node(ira, operand_source_node, buf_sprintf("expected float type, found '%s'",25530 ir_add_error_node(ira, operand_source_node, buf_sprintf("expected float type, found '%s'",
24580 buf_ptr(&operand->value->type->name)));25531 buf_ptr(&operand->value->type->name)));
24581 return ira->codegen->invalid_instruction;25532 return ira->codegen->invalid_inst_gen;
24582 }25533 }
2458325534
24584 return ir_resolve_cast(ira, source_instr, operand, dest_type, CastOpFloatToInt);25535 return ir_resolve_cast(ira, source_instr, operand, dest_type, CastOpFloatToInt);
24585}25536}
2458625537
24587static IrInstruction *ir_analyze_instruction_float_to_int(IrAnalyze *ira, IrInstructionFloatToInt *instruction) {25538static IrInstGen *ir_analyze_instruction_float_to_int(IrAnalyze *ira, IrInstSrcFloatToInt *instruction) {
24588 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);25539 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
24589 if (type_is_invalid(dest_type))25540 if (type_is_invalid(dest_type))
24590 return ira->codegen->invalid_instruction;25541 return ira->codegen->invalid_inst_gen;
2459125542
24592 IrInstruction *operand = instruction->target->child;25543 IrInstGen *operand = instruction->target->child;
24593 if (type_is_invalid(operand->value->type))25544 if (type_is_invalid(operand->value->type))
24594 return ira->codegen->invalid_instruction;25545 return ira->codegen->invalid_inst_gen;
2459525546
24596 return ir_analyze_float_to_int(ira, &instruction->base, dest_type, operand, instruction->target->source_node);25547 return ir_analyze_float_to_int(ira, &instruction->base.base, dest_type, operand,
25548 instruction->target->base.source_node);
24597}25549}
2459825550
24599static IrInstruction *ir_analyze_instruction_err_to_int(IrAnalyze *ira, IrInstructionErrToInt *instruction) {25551static IrInstGen *ir_analyze_instruction_err_to_int(IrAnalyze *ira, IrInstSrcErrToInt *instruction) {
24600 IrInstruction *target = instruction->target->child;25552 IrInstGen *target = instruction->target->child;
24601 if (type_is_invalid(target->value->type))25553 if (type_is_invalid(target->value->type))
24602 return ira->codegen->invalid_instruction;25554 return ira->codegen->invalid_inst_gen;
2460325555
24604 IrInstruction *casted_target;25556 IrInstGen *casted_target;
24605 if (target->value->type->id == ZigTypeIdErrorSet) {25557 if (target->value->type->id == ZigTypeIdErrorSet) {
24606 casted_target = target;25558 casted_target = target;
24607 } else {25559 } else {
24608 casted_target = ir_implicit_cast(ira, target, ira->codegen->builtin_types.entry_global_error_set);25560 casted_target = ir_implicit_cast(ira, target, ira->codegen->builtin_types.entry_global_error_set);
24609 if (type_is_invalid(casted_target->value->type))25561 if (type_is_invalid(casted_target->value->type))
24610 return ira->codegen->invalid_instruction;25562 return ira->codegen->invalid_inst_gen;
24611 }25563 }
2461225564
24613 return ir_analyze_err_to_int(ira, &instruction->base, casted_target, ira->codegen->err_tag_type);25565 return ir_analyze_err_to_int(ira, &instruction->base.base, casted_target, ira->codegen->err_tag_type);
24614}25566}
2461525567
24616static IrInstruction *ir_analyze_instruction_int_to_err(IrAnalyze *ira, IrInstructionIntToErr *instruction) {25568static IrInstGen *ir_analyze_instruction_int_to_err(IrAnalyze *ira, IrInstSrcIntToErr *instruction) {
24617 IrInstruction *target = instruction->target->child;25569 IrInstGen *target = instruction->target->child;
24618 if (type_is_invalid(target->value->type))25570 if (type_is_invalid(target->value->type))
24619 return ira->codegen->invalid_instruction;25571 return ira->codegen->invalid_inst_gen;
2462025572
24621 IrInstruction *casted_target = ir_implicit_cast(ira, target, ira->codegen->err_tag_type);25573 IrInstGen *casted_target = ir_implicit_cast(ira, target, ira->codegen->err_tag_type);
24622 if (type_is_invalid(casted_target->value->type))25574 if (type_is_invalid(casted_target->value->type))
24623 return ira->codegen->invalid_instruction;25575 return ira->codegen->invalid_inst_gen;
2462425576
24625 return ir_analyze_int_to_err(ira, &instruction->base, casted_target, ira->codegen->builtin_types.entry_global_error_set);25577 return ir_analyze_int_to_err(ira, &instruction->base.base, casted_target, ira->codegen->builtin_types.entry_global_error_set);
24626}25578}
2462725579
24628static IrInstruction *ir_analyze_instruction_bool_to_int(IrAnalyze *ira, IrInstructionBoolToInt *instruction) {25580static IrInstGen *ir_analyze_instruction_bool_to_int(IrAnalyze *ira, IrInstSrcBoolToInt *instruction) {
24629 IrInstruction *target = instruction->target->child;25581 IrInstGen *target = instruction->target->child;
24630 if (type_is_invalid(target->value->type))25582 if (type_is_invalid(target->value->type))
24631 return ira->codegen->invalid_instruction;25583 return ira->codegen->invalid_inst_gen;
2463225584
24633 if (target->value->type->id != ZigTypeIdBool) {25585 if (target->value->type->id != ZigTypeIdBool) {
24634 ir_add_error(ira, instruction->target, buf_sprintf("expected bool, found '%s'",25586 ir_add_error(ira, &instruction->target->base, buf_sprintf("expected bool, found '%s'",
24635 buf_ptr(&target->value->type->name)));25587 buf_ptr(&target->value->type->name)));
24636 return ira->codegen->invalid_instruction;25588 return ira->codegen->invalid_inst_gen;
24637 }25589 }
2463825590
24639 if (instr_is_comptime(target)) {25591 if (instr_is_comptime(target)) {
24640 bool is_true;25592 bool is_true;
24641 if (!ir_resolve_bool(ira, target, &is_true))25593 if (!ir_resolve_bool(ira, target, &is_true))
24642 return ira->codegen->invalid_instruction;25594 return ira->codegen->invalid_inst_gen;
2464325595
24644 return ir_const_unsigned(ira, &instruction->base, is_true ? 1 : 0);25596 return ir_const_unsigned(ira, &instruction->base.base, is_true ? 1 : 0);
24645 }25597 }
2464625598
24647 ZigType *u1_type = get_int_type(ira->codegen, false, 1);25599 ZigType *u1_type = get_int_type(ira->codegen, false, 1);
24648 return ir_resolve_cast(ira, &instruction->base, target, u1_type, CastOpBoolToInt);25600 return ir_resolve_cast(ira, &instruction->base.base, target, u1_type, CastOpBoolToInt);
24649}25601}
2465025602
24651static IrInstruction *ir_analyze_instruction_int_type(IrAnalyze *ira, IrInstructionIntType *instruction) {25603static IrInstGen *ir_analyze_instruction_int_type(IrAnalyze *ira, IrInstSrcIntType *instruction) {
24652 IrInstruction *is_signed_value = instruction->is_signed->child;25604 IrInstGen *is_signed_value = instruction->is_signed->child;
24653 bool is_signed;25605 bool is_signed;
24654 if (!ir_resolve_bool(ira, is_signed_value, &is_signed))25606 if (!ir_resolve_bool(ira, is_signed_value, &is_signed))
24655 return ira->codegen->invalid_instruction;25607 return ira->codegen->invalid_inst_gen;
2465625608
24657 IrInstruction *bit_count_value = instruction->bit_count->child;25609 IrInstGen *bit_count_value = instruction->bit_count->child;
24658 uint64_t bit_count;25610 uint64_t bit_count;
24659 if (!ir_resolve_unsigned(ira, bit_count_value, ira->codegen->builtin_types.entry_u16, &bit_count))25611 if (!ir_resolve_unsigned(ira, bit_count_value, ira->codegen->builtin_types.entry_u16, &bit_count))
24660 return ira->codegen->invalid_instruction;25612 return ira->codegen->invalid_inst_gen;
2466125613
24662 return ir_const_type(ira, &instruction->base, get_int_type(ira->codegen, is_signed, (uint32_t)bit_count));25614 return ir_const_type(ira, &instruction->base.base, get_int_type(ira->codegen, is_signed, (uint32_t)bit_count));
24663}25615}
2466425616
24665static IrInstruction *ir_analyze_instruction_vector_type(IrAnalyze *ira, IrInstructionVectorType *instruction) {25617static IrInstGen *ir_analyze_instruction_vector_type(IrAnalyze *ira, IrInstSrcVectorType *instruction) {
24666 uint64_t len;25618 uint64_t len;
24667 if (!ir_resolve_unsigned(ira, instruction->len->child, ira->codegen->builtin_types.entry_u32, &len))25619 if (!ir_resolve_unsigned(ira, instruction->len->child, ira->codegen->builtin_types.entry_u32, &len))
24668 return ira->codegen->invalid_instruction;25620 return ira->codegen->invalid_inst_gen;
2466925621
24670 ZigType *elem_type = ir_resolve_vector_elem_type(ira, instruction->elem_type->child);25622 ZigType *elem_type = ir_resolve_vector_elem_type(ira, instruction->elem_type->child);
24671 if (type_is_invalid(elem_type))25623 if (type_is_invalid(elem_type))
24672 return ira->codegen->invalid_instruction;25624 return ira->codegen->invalid_inst_gen;
2467325625
24674 ZigType *vector_type = get_vector_type(ira->codegen, len, elem_type);25626 ZigType *vector_type = get_vector_type(ira->codegen, len, elem_type);
2467525627
24676 return ir_const_type(ira, &instruction->base, vector_type);25628 return ir_const_type(ira, &instruction->base.base, vector_type);
24677}25629}
2467825630
24679static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *source_instr,25631static IrInstGen *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInst* source_instr,
24680 ZigType *scalar_type, IrInstruction *a, IrInstruction *b, IrInstruction *mask)25632 ZigType *scalar_type, IrInstGen *a, IrInstGen *b, IrInstGen *mask)
24681{25633{
24682 ir_assert(source_instr && scalar_type && a && b && mask, source_instr);25634 ir_assert(source_instr && scalar_type && a && b && mask, source_instr);
24683 ir_assert(is_valid_vector_elem_type(scalar_type), source_instr);25635 ir_assert(is_valid_vector_elem_type(scalar_type), source_instr);
...@@ -24688,15 +25640,15 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s...@@ -24688,15 +25640,15 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
24688 } else if (mask->value->type->id == ZigTypeIdArray) {25640 } else if (mask->value->type->id == ZigTypeIdArray) {
24689 len_mask = mask->value->type->data.array.len;25641 len_mask = mask->value->type->data.array.len;
24690 } else {25642 } else {
24691 ir_add_error(ira, mask,25643 ir_add_error(ira, &mask->base,
24692 buf_sprintf("expected vector or array, found '%s'",25644 buf_sprintf("expected vector or array, found '%s'",
24693 buf_ptr(&mask->value->type->name)));25645 buf_ptr(&mask->value->type->name)));
24694 return ira->codegen->invalid_instruction;25646 return ira->codegen->invalid_inst_gen;
24695 }25647 }
24696 mask = ir_implicit_cast(ira, mask, get_vector_type(ira->codegen, len_mask,25648 mask = ir_implicit_cast(ira, mask, get_vector_type(ira->codegen, len_mask,
24697 ira->codegen->builtin_types.entry_i32));25649 ira->codegen->builtin_types.entry_i32));
24698 if (type_is_invalid(mask->value->type))25650 if (type_is_invalid(mask->value->type))
24699 return ira->codegen->invalid_instruction;25651 return ira->codegen->invalid_inst_gen;
2470025652
24701 uint32_t len_a;25653 uint32_t len_a;
24702 if (a->value->type->id == ZigTypeIdVector) {25654 if (a->value->type->id == ZigTypeIdVector) {
...@@ -24706,11 +25658,11 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s...@@ -24706,11 +25658,11 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
24706 } else if (a->value->type->id == ZigTypeIdUndefined) {25658 } else if (a->value->type->id == ZigTypeIdUndefined) {
24707 len_a = UINT32_MAX;25659 len_a = UINT32_MAX;
24708 } else {25660 } else {
24709 ir_add_error(ira, a,25661 ir_add_error(ira, &a->base,
24710 buf_sprintf("expected vector or array with element type '%s', found '%s'",25662 buf_sprintf("expected vector or array with element type '%s', found '%s'",
24711 buf_ptr(&scalar_type->name),25663 buf_ptr(&scalar_type->name),
24712 buf_ptr(&a->value->type->name)));25664 buf_ptr(&a->value->type->name)));
24713 return ira->codegen->invalid_instruction;25665 return ira->codegen->invalid_inst_gen;
24714 }25666 }
2471525667
24716 uint32_t len_b;25668 uint32_t len_b;
...@@ -24721,38 +25673,38 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s...@@ -24721,38 +25673,38 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
24721 } else if (b->value->type->id == ZigTypeIdUndefined) {25673 } else if (b->value->type->id == ZigTypeIdUndefined) {
24722 len_b = UINT32_MAX;25674 len_b = UINT32_MAX;
24723 } else {25675 } else {
24724 ir_add_error(ira, b,25676 ir_add_error(ira, &b->base,
24725 buf_sprintf("expected vector or array with element type '%s', found '%s'",25677 buf_sprintf("expected vector or array with element type '%s', found '%s'",
24726 buf_ptr(&scalar_type->name),25678 buf_ptr(&scalar_type->name),
24727 buf_ptr(&b->value->type->name)));25679 buf_ptr(&b->value->type->name)));
24728 return ira->codegen->invalid_instruction;25680 return ira->codegen->invalid_inst_gen;
24729 }25681 }
2473025682
24731 if (len_a == UINT32_MAX && len_b == UINT32_MAX) {25683 if (len_a == UINT32_MAX && len_b == UINT32_MAX) {
24732 return ir_const_undef(ira, a, get_vector_type(ira->codegen, len_mask, scalar_type));25684 return ir_const_undef(ira, &a->base, get_vector_type(ira->codegen, len_mask, scalar_type));
24733 }25685 }
2473425686
24735 if (len_a == UINT32_MAX) {25687 if (len_a == UINT32_MAX) {
24736 len_a = len_b;25688 len_a = len_b;
24737 a = ir_const_undef(ira, a, get_vector_type(ira->codegen, len_a, scalar_type));25689 a = ir_const_undef(ira, &a->base, get_vector_type(ira->codegen, len_a, scalar_type));
24738 } else {25690 } else {
24739 a = ir_implicit_cast(ira, a, get_vector_type(ira->codegen, len_a, scalar_type));25691 a = ir_implicit_cast(ira, a, get_vector_type(ira->codegen, len_a, scalar_type));
24740 if (type_is_invalid(a->value->type))25692 if (type_is_invalid(a->value->type))
24741 return ira->codegen->invalid_instruction;25693 return ira->codegen->invalid_inst_gen;
24742 }25694 }
2474325695
24744 if (len_b == UINT32_MAX) {25696 if (len_b == UINT32_MAX) {
24745 len_b = len_a;25697 len_b = len_a;
24746 b = ir_const_undef(ira, b, get_vector_type(ira->codegen, len_b, scalar_type));25698 b = ir_const_undef(ira, &b->base, get_vector_type(ira->codegen, len_b, scalar_type));
24747 } else {25699 } else {
24748 b = ir_implicit_cast(ira, b, get_vector_type(ira->codegen, len_b, scalar_type));25700 b = ir_implicit_cast(ira, b, get_vector_type(ira->codegen, len_b, scalar_type));
24749 if (type_is_invalid(b->value->type))25701 if (type_is_invalid(b->value->type))
24750 return ira->codegen->invalid_instruction;25702 return ira->codegen->invalid_inst_gen;
24751 }25703 }
2475225704
24753 ZigValue *mask_val = ir_resolve_const(ira, mask, UndefOk);25705 ZigValue *mask_val = ir_resolve_const(ira, mask, UndefOk);
24754 if (mask_val == nullptr)25706 if (mask_val == nullptr)
24755 return ira->codegen->invalid_instruction;25707 return ira->codegen->invalid_inst_gen;
2475625708
24757 expand_undef_array(ira->codegen, mask_val);25709 expand_undef_array(ira->codegen, mask_val);
2475825710
...@@ -24762,7 +25714,7 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s...@@ -24762,7 +25714,7 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
24762 continue;25714 continue;
24763 int32_t v_i32 = bigint_as_signed(&mask_elem_val->data.x_bigint);25715 int32_t v_i32 = bigint_as_signed(&mask_elem_val->data.x_bigint);
24764 uint32_t v;25716 uint32_t v;
24765 IrInstruction *chosen_operand;25717 IrInstGen *chosen_operand;
24766 if (v_i32 >= 0) {25718 if (v_i32 >= 0) {
24767 v = (uint32_t)v_i32;25719 v = (uint32_t)v_i32;
24768 chosen_operand = a;25720 chosen_operand = a;
...@@ -24771,16 +25723,16 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s...@@ -24771,16 +25723,16 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
24771 chosen_operand = b;25723 chosen_operand = b;
24772 }25724 }
24773 if (v >= chosen_operand->value->type->data.vector.len) {25725 if (v >= chosen_operand->value->type->data.vector.len) {
24774 ErrorMsg *msg = ir_add_error(ira, mask,25726 ErrorMsg *msg = ir_add_error(ira, &mask->base,
24775 buf_sprintf("mask index '%u' has out-of-bounds selection", i));25727 buf_sprintf("mask index '%u' has out-of-bounds selection", i));
24776 add_error_note(ira->codegen, msg, chosen_operand->source_node,25728 add_error_note(ira->codegen, msg, chosen_operand->base.source_node,
24777 buf_sprintf("selected index '%u' out of bounds of %s", v,25729 buf_sprintf("selected index '%u' out of bounds of %s", v,
24778 buf_ptr(&chosen_operand->value->type->name)));25730 buf_ptr(&chosen_operand->value->type->name)));
24779 if (chosen_operand == a && v < len_a + len_b) {25731 if (chosen_operand == a && v < len_a + len_b) {
24780 add_error_note(ira->codegen, msg, b->source_node,25732 add_error_note(ira->codegen, msg, b->base.source_node,
24781 buf_create_from_str("selections from the second vector are specified with negative numbers"));25733 buf_create_from_str("selections from the second vector are specified with negative numbers"));
24782 }25734 }
24783 return ira->codegen->invalid_instruction;25735 return ira->codegen->invalid_inst_gen;
24784 }25736 }
24785 }25737 }
2478625738
...@@ -24788,16 +25740,16 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s...@@ -24788,16 +25740,16 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
24788 if (instr_is_comptime(a) && instr_is_comptime(b)) {25740 if (instr_is_comptime(a) && instr_is_comptime(b)) {
24789 ZigValue *a_val = ir_resolve_const(ira, a, UndefOk);25741 ZigValue *a_val = ir_resolve_const(ira, a, UndefOk);
24790 if (a_val == nullptr)25742 if (a_val == nullptr)
24791 return ira->codegen->invalid_instruction;25743 return ira->codegen->invalid_inst_gen;
2479225744
24793 ZigValue *b_val = ir_resolve_const(ira, b, UndefOk);25745 ZigValue *b_val = ir_resolve_const(ira, b, UndefOk);
24794 if (b_val == nullptr)25746 if (b_val == nullptr)
24795 return ira->codegen->invalid_instruction;25747 return ira->codegen->invalid_inst_gen;
2479625748
24797 expand_undef_array(ira->codegen, a_val);25749 expand_undef_array(ira->codegen, a_val);
24798 expand_undef_array(ira->codegen, b_val);25750 expand_undef_array(ira->codegen, b_val);
2479925751
24800 IrInstruction *result = ir_const(ira, source_instr, result_type);25752 IrInstGen *result = ir_const(ira, source_instr, result_type);
24801 result->value->data.x_array.data.s_none.elements = create_const_vals(len_mask);25753 result->value->data.x_array.data.s_none.elements = create_const_vals(len_mask);
24802 for (uint32_t i = 0; i < mask_val->type->data.vector.len; i += 1) {25754 for (uint32_t i = 0; i < mask_val->type->data.vector.len; i += 1) {
24803 ZigValue *mask_elem_val = &mask_val->data.x_array.data.s_none.elements[i];25755 ZigValue *mask_elem_val = &mask_val->data.x_array.data.s_none.elements[i];
...@@ -24829,7 +25781,7 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s...@@ -24829,7 +25781,7 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
24829 uint32_t len_min = min(len_a, len_b);25781 uint32_t len_min = min(len_a, len_b);
24830 uint32_t len_max = max(len_a, len_b);25782 uint32_t len_max = max(len_a, len_b);
2483125783
24832 IrInstruction *expand_mask = ir_const(ira, mask,25784 IrInstGen *expand_mask = ir_const(ira, &mask->base,
24833 get_vector_type(ira->codegen, len_max, ira->codegen->builtin_types.entry_i32));25785 get_vector_type(ira->codegen, len_max, ira->codegen->builtin_types.entry_i32));
24834 expand_mask->value->data.x_array.data.s_none.elements = create_const_vals(len_max);25786 expand_mask->value->data.x_array.data.s_none.elements = create_const_vals(len_max);
24835 uint32_t i = 0;25787 uint32_t i = 0;
...@@ -24838,7 +25790,7 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s...@@ -24838,7 +25790,7 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
24838 for (; i < len_max; i += 1)25790 for (; i < len_max; i += 1)
24839 bigint_init_signed(&expand_mask->value->data.x_array.data.s_none.elements[i].data.x_bigint, -1);25791 bigint_init_signed(&expand_mask->value->data.x_array.data.s_none.elements[i].data.x_bigint, -1);
2484025792
24841 IrInstruction *undef = ir_const_undef(ira, source_instr,25793 IrInstGen *undef = ir_const_undef(ira, source_instr,
24842 get_vector_type(ira->codegen, len_min, scalar_type));25794 get_vector_type(ira->codegen, len_min, scalar_type));
2484325795
24844 if (len_b < len_a) {25796 if (len_b < len_a) {
...@@ -24848,62 +25800,59 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s...@@ -24848,62 +25800,59 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
24848 }25800 }
24849 }25801 }
2485025802
24851 IrInstruction *result = ir_build_shuffle_vector(&ira->new_irb,25803 return ir_build_shuffle_vector_gen(ira, source_instr->scope, source_instr->source_node,
24852 source_instr->scope, source_instr->source_node,25804 result_type, a, b, mask);
24853 nullptr, a, b, mask);
24854 result->value->type = result_type;
24855 return result;
24856}25805}
2485725806
24858static IrInstruction *ir_analyze_instruction_shuffle_vector(IrAnalyze *ira, IrInstructionShuffleVector *instruction) {25807static IrInstGen *ir_analyze_instruction_shuffle_vector(IrAnalyze *ira, IrInstSrcShuffleVector *instruction) {
24859 ZigType *scalar_type = ir_resolve_vector_elem_type(ira, instruction->scalar_type);25808 ZigType *scalar_type = ir_resolve_vector_elem_type(ira, instruction->scalar_type->child);
24860 if (type_is_invalid(scalar_type))25809 if (type_is_invalid(scalar_type))
24861 return ira->codegen->invalid_instruction;25810 return ira->codegen->invalid_inst_gen;
2486225811
24863 IrInstruction *a = instruction->a->child;25812 IrInstGen *a = instruction->a->child;
24864 if (type_is_invalid(a->value->type))25813 if (type_is_invalid(a->value->type))
24865 return ira->codegen->invalid_instruction;25814 return ira->codegen->invalid_inst_gen;
2486625815
24867 IrInstruction *b = instruction->b->child;25816 IrInstGen *b = instruction->b->child;
24868 if (type_is_invalid(b->value->type))25817 if (type_is_invalid(b->value->type))
24869 return ira->codegen->invalid_instruction;25818 return ira->codegen->invalid_inst_gen;
2487025819
24871 IrInstruction *mask = instruction->mask->child;25820 IrInstGen *mask = instruction->mask->child;
24872 if (type_is_invalid(mask->value->type))25821 if (type_is_invalid(mask->value->type))
24873 return ira->codegen->invalid_instruction;25822 return ira->codegen->invalid_inst_gen;
2487425823
24875 return ir_analyze_shuffle_vector(ira, &instruction->base, scalar_type, a, b, mask);25824 return ir_analyze_shuffle_vector(ira, &instruction->base.base, scalar_type, a, b, mask);
24876}25825}
2487725826
24878static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstructionSplatSrc *instruction) {25827static IrInstGen *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstSrcSplat *instruction) {
24879 Error err;25828 Error err;
2488025829
24881 IrInstruction *len = instruction->len->child;25830 IrInstGen *len = instruction->len->child;
24882 if (type_is_invalid(len->value->type))25831 if (type_is_invalid(len->value->type))
24883 return ira->codegen->invalid_instruction;25832 return ira->codegen->invalid_inst_gen;
2488425833
24885 IrInstruction *scalar = instruction->scalar->child;25834 IrInstGen *scalar = instruction->scalar->child;
24886 if (type_is_invalid(scalar->value->type))25835 if (type_is_invalid(scalar->value->type))
24887 return ira->codegen->invalid_instruction;25836 return ira->codegen->invalid_inst_gen;
2488825837
24889 uint64_t len_u64;25838 uint64_t len_u64;
24890 if (!ir_resolve_unsigned(ira, len, ira->codegen->builtin_types.entry_u32, &len_u64))25839 if (!ir_resolve_unsigned(ira, len, ira->codegen->builtin_types.entry_u32, &len_u64))
24891 return ira->codegen->invalid_instruction;25840 return ira->codegen->invalid_inst_gen;
24892 uint32_t len_int = len_u64;25841 uint32_t len_int = len_u64;
2489325842
24894 if ((err = ir_validate_vector_elem_type(ira, scalar, scalar->value->type)))25843 if ((err = ir_validate_vector_elem_type(ira, scalar->base.source_node, scalar->value->type)))
24895 return ira->codegen->invalid_instruction;25844 return ira->codegen->invalid_inst_gen;
2489625845
24897 ZigType *return_type = get_vector_type(ira->codegen, len_int, scalar->value->type);25846 ZigType *return_type = get_vector_type(ira->codegen, len_int, scalar->value->type);
2489825847
24899 if (instr_is_comptime(scalar)) {25848 if (instr_is_comptime(scalar)) {
24900 ZigValue *scalar_val = ir_resolve_const(ira, scalar, UndefOk);25849 ZigValue *scalar_val = ir_resolve_const(ira, scalar, UndefOk);
24901 if (scalar_val == nullptr)25850 if (scalar_val == nullptr)
24902 return ira->codegen->invalid_instruction;25851 return ira->codegen->invalid_inst_gen;
24903 if (scalar_val->special == ConstValSpecialUndef)25852 if (scalar_val->special == ConstValSpecialUndef)
24904 return ir_const_undef(ira, &instruction->base, return_type);25853 return ir_const_undef(ira, &instruction->base.base, return_type);
2490525854
24906 IrInstruction *result = ir_const(ira, &instruction->base, return_type);25855 IrInstGen *result = ir_const(ira, &instruction->base.base, return_type);
24907 result->value->data.x_array.data.s_none.elements = create_const_vals(len_int);25856 result->value->data.x_array.data.s_none.elements = create_const_vals(len_int);
24908 for (uint32_t i = 0; i < len_int; i += 1) {25857 for (uint32_t i = 0; i < len_int; i += 1) {
24909 copy_const_val(&result->value->data.x_array.data.s_none.elements[i], scalar_val);25858 copy_const_val(&result->value->data.x_array.data.s_none.elements[i], scalar_val);
...@@ -24911,48 +25860,45 @@ static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstruction...@@ -24911,48 +25860,45 @@ static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstruction
24911 return result;25860 return result;
24912 }25861 }
2491325862
24914 return ir_build_splat_gen(ira, &instruction->base, return_type, scalar);25863 return ir_build_splat_gen(ira, &instruction->base.base, return_type, scalar);
24915}25864}
2491625865
24917static IrInstruction *ir_analyze_instruction_bool_not(IrAnalyze *ira, IrInstructionBoolNot *instruction) {25866static IrInstGen *ir_analyze_instruction_bool_not(IrAnalyze *ira, IrInstSrcBoolNot *instruction) {
24918 IrInstruction *value = instruction->value->child;25867 IrInstGen *value = instruction->value->child;
24919 if (type_is_invalid(value->value->type))25868 if (type_is_invalid(value->value->type))
24920 return ira->codegen->invalid_instruction;25869 return ira->codegen->invalid_inst_gen;
2492125870
24922 ZigType *bool_type = ira->codegen->builtin_types.entry_bool;25871 ZigType *bool_type = ira->codegen->builtin_types.entry_bool;
2492325872
24924 IrInstruction *casted_value = ir_implicit_cast(ira, value, bool_type);25873 IrInstGen *casted_value = ir_implicit_cast(ira, value, bool_type);
24925 if (type_is_invalid(casted_value->value->type))25874 if (type_is_invalid(casted_value->value->type))
24926 return ira->codegen->invalid_instruction;25875 return ira->codegen->invalid_inst_gen;
2492725876
24928 if (instr_is_comptime(casted_value)) {25877 if (instr_is_comptime(casted_value)) {
24929 ZigValue *value = ir_resolve_const(ira, casted_value, UndefBad);25878 ZigValue *value = ir_resolve_const(ira, casted_value, UndefBad);
24930 if (value == nullptr)25879 if (value == nullptr)
24931 return ira->codegen->invalid_instruction;25880 return ira->codegen->invalid_inst_gen;
2493225881
24933 return ir_const_bool(ira, &instruction->base, !value->data.x_bool);25882 return ir_const_bool(ira, &instruction->base.base, !value->data.x_bool);
24934 }25883 }
2493525884
24936 IrInstruction *result = ir_build_bool_not(&ira->new_irb, instruction->base.scope,25885 return ir_build_bool_not_gen(ira, &instruction->base.base, casted_value);
24937 instruction->base.source_node, casted_value);
24938 result->value->type = bool_type;
24939 return result;
24940}25886}
2494125887
24942static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructionMemset *instruction) {25888static IrInstGen *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstSrcMemset *instruction) {
24943 Error err;25889 Error err;
2494425890
24945 IrInstruction *dest_ptr = instruction->dest_ptr->child;25891 IrInstGen *dest_ptr = instruction->dest_ptr->child;
24946 if (type_is_invalid(dest_ptr->value->type))25892 if (type_is_invalid(dest_ptr->value->type))
24947 return ira->codegen->invalid_instruction;25893 return ira->codegen->invalid_inst_gen;
2494825894
24949 IrInstruction *byte_value = instruction->byte->child;25895 IrInstGen *byte_value = instruction->byte->child;
24950 if (type_is_invalid(byte_value->value->type))25896 if (type_is_invalid(byte_value->value->type))
24951 return ira->codegen->invalid_instruction;25897 return ira->codegen->invalid_inst_gen;
2495225898
24953 IrInstruction *count_value = instruction->count->child;25899 IrInstGen *count_value = instruction->count->child;
24954 if (type_is_invalid(count_value->value->type))25900 if (type_is_invalid(count_value->value->type))
24955 return ira->codegen->invalid_instruction;25901 return ira->codegen->invalid_inst_gen;
2495625902
24957 ZigType *dest_uncasted_type = dest_ptr->value->type;25903 ZigType *dest_uncasted_type = dest_ptr->value->type;
24958 bool dest_is_volatile = (dest_uncasted_type->id == ZigTypeIdPointer) &&25904 bool dest_is_volatile = (dest_uncasted_type->id == ZigTypeIdPointer) &&
...@@ -24963,24 +25909,24 @@ static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructio...@@ -24963,24 +25909,24 @@ static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructio
24963 uint32_t dest_align;25909 uint32_t dest_align;
24964 if (dest_uncasted_type->id == ZigTypeIdPointer) {25910 if (dest_uncasted_type->id == ZigTypeIdPointer) {
24965 if ((err = resolve_ptr_align(ira, dest_uncasted_type, &dest_align)))25911 if ((err = resolve_ptr_align(ira, dest_uncasted_type, &dest_align)))
24966 return ira->codegen->invalid_instruction;25912 return ira->codegen->invalid_inst_gen;
24967 } else {25913 } else {
24968 dest_align = get_abi_alignment(ira->codegen, u8);25914 dest_align = get_abi_alignment(ira->codegen, u8);
24969 }25915 }
24970 ZigType *u8_ptr = get_pointer_to_type_extra(ira->codegen, u8, false, dest_is_volatile,25916 ZigType *u8_ptr = get_pointer_to_type_extra(ira->codegen, u8, false, dest_is_volatile,
24971 PtrLenUnknown, dest_align, 0, 0, false);25917 PtrLenUnknown, dest_align, 0, 0, false);
2497225918
24973 IrInstruction *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr);25919 IrInstGen *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr);
24974 if (type_is_invalid(casted_dest_ptr->value->type))25920 if (type_is_invalid(casted_dest_ptr->value->type))
24975 return ira->codegen->invalid_instruction;25921 return ira->codegen->invalid_inst_gen;
2497625922
24977 IrInstruction *casted_byte = ir_implicit_cast(ira, byte_value, u8);25923 IrInstGen *casted_byte = ir_implicit_cast(ira, byte_value, u8);
24978 if (type_is_invalid(casted_byte->value->type))25924 if (type_is_invalid(casted_byte->value->type))
24979 return ira->codegen->invalid_instruction;25925 return ira->codegen->invalid_inst_gen;
2498025926
24981 IrInstruction *casted_count = ir_implicit_cast(ira, count_value, usize);25927 IrInstGen *casted_count = ir_implicit_cast(ira, count_value, usize);
24982 if (type_is_invalid(casted_count->value->type))25928 if (type_is_invalid(casted_count->value->type))
24983 return ira->codegen->invalid_instruction;25929 return ira->codegen->invalid_inst_gen;
2498425930
24985 // TODO test this at comptime with u8 and non-u8 types25931 // TODO test this at comptime with u8 and non-u8 types
24986 if (instr_is_comptime(casted_dest_ptr) &&25932 if (instr_is_comptime(casted_dest_ptr) &&
...@@ -24989,15 +25935,15 @@ static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructio...@@ -24989,15 +25935,15 @@ static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructio
24989 {25935 {
24990 ZigValue *dest_ptr_val = ir_resolve_const(ira, casted_dest_ptr, UndefBad);25936 ZigValue *dest_ptr_val = ir_resolve_const(ira, casted_dest_ptr, UndefBad);
24991 if (dest_ptr_val == nullptr)25937 if (dest_ptr_val == nullptr)
24992 return ira->codegen->invalid_instruction;25938 return ira->codegen->invalid_inst_gen;
2499325939
24994 ZigValue *byte_val = ir_resolve_const(ira, casted_byte, UndefOk);25940 ZigValue *byte_val = ir_resolve_const(ira, casted_byte, UndefOk);
24995 if (byte_val == nullptr)25941 if (byte_val == nullptr)
24996 return ira->codegen->invalid_instruction;25942 return ira->codegen->invalid_inst_gen;
2499725943
24998 ZigValue *count_val = ir_resolve_const(ira, casted_count, UndefBad);25944 ZigValue *count_val = ir_resolve_const(ira, casted_count, UndefBad);
24999 if (count_val == nullptr)25945 if (count_val == nullptr)
25000 return ira->codegen->invalid_instruction;25946 return ira->codegen->invalid_inst_gen;
2500125947
25002 if (casted_dest_ptr->value->data.x_ptr.special != ConstPtrSpecialHardCodedAddr &&25948 if (casted_dest_ptr->value->data.x_ptr.special != ConstPtrSpecialHardCodedAddr &&
25003 casted_dest_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar)25949 casted_dest_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar)
...@@ -25042,38 +25988,35 @@ static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructio...@@ -25042,38 +25988,35 @@ static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructio
25042 size_t count = bigint_as_usize(&count_val->data.x_bigint);25988 size_t count = bigint_as_usize(&count_val->data.x_bigint);
25043 size_t end = start + count;25989 size_t end = start + count;
25044 if (end > bound_end) {25990 if (end > bound_end) {
25045 ir_add_error(ira, count_value, buf_sprintf("out of bounds pointer access"));25991 ir_add_error(ira, &count_value->base, buf_sprintf("out of bounds pointer access"));
25046 return ira->codegen->invalid_instruction;25992 return ira->codegen->invalid_inst_gen;
25047 }25993 }
2504825994
25049 for (size_t i = start; i < end; i += 1) {25995 for (size_t i = start; i < end; i += 1) {
25050 copy_const_val(&dest_elements[i], byte_val);25996 copy_const_val(&dest_elements[i], byte_val);
25051 }25997 }
2505225998
25053 return ir_const_void(ira, &instruction->base);25999 return ir_const_void(ira, &instruction->base.base);
25054 }26000 }
25055 }26001 }
2505626002
25057 IrInstruction *result = ir_build_memset(&ira->new_irb, instruction->base.scope, instruction->base.source_node,26003 return ir_build_memset_gen(ira, &instruction->base.base, casted_dest_ptr, casted_byte, casted_count);
25058 casted_dest_ptr, casted_byte, casted_count);
25059 result->value->type = ira->codegen->builtin_types.entry_void;
25060 return result;
25061}26004}
2506226005
25063static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructionMemcpy *instruction) {26006static IrInstGen *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstSrcMemcpy *instruction) {
25064 Error err;26007 Error err;
2506526008
25066 IrInstruction *dest_ptr = instruction->dest_ptr->child;26009 IrInstGen *dest_ptr = instruction->dest_ptr->child;
25067 if (type_is_invalid(dest_ptr->value->type))26010 if (type_is_invalid(dest_ptr->value->type))
25068 return ira->codegen->invalid_instruction;26011 return ira->codegen->invalid_inst_gen;
2506926012
25070 IrInstruction *src_ptr = instruction->src_ptr->child;26013 IrInstGen *src_ptr = instruction->src_ptr->child;
25071 if (type_is_invalid(src_ptr->value->type))26014 if (type_is_invalid(src_ptr->value->type))
25072 return ira->codegen->invalid_instruction;26015 return ira->codegen->invalid_inst_gen;
2507326016
25074 IrInstruction *count_value = instruction->count->child;26017 IrInstGen *count_value = instruction->count->child;
25075 if (type_is_invalid(count_value->value->type))26018 if (type_is_invalid(count_value->value->type))
25076 return ira->codegen->invalid_instruction;26019 return ira->codegen->invalid_inst_gen;
2507726020
25078 ZigType *u8 = ira->codegen->builtin_types.entry_u8;26021 ZigType *u8 = ira->codegen->builtin_types.entry_u8;
25079 ZigType *dest_uncasted_type = dest_ptr->value->type;26022 ZigType *dest_uncasted_type = dest_ptr->value->type;
...@@ -25086,7 +26029,7 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio...@@ -25086,7 +26029,7 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
25086 uint32_t dest_align;26029 uint32_t dest_align;
25087 if (dest_uncasted_type->id == ZigTypeIdPointer) {26030 if (dest_uncasted_type->id == ZigTypeIdPointer) {
25088 if ((err = resolve_ptr_align(ira, dest_uncasted_type, &dest_align)))26031 if ((err = resolve_ptr_align(ira, dest_uncasted_type, &dest_align)))
25089 return ira->codegen->invalid_instruction;26032 return ira->codegen->invalid_inst_gen;
25090 } else {26033 } else {
25091 dest_align = get_abi_alignment(ira->codegen, u8);26034 dest_align = get_abi_alignment(ira->codegen, u8);
25092 }26035 }
...@@ -25094,7 +26037,7 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio...@@ -25094,7 +26037,7 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
25094 uint32_t src_align;26037 uint32_t src_align;
25095 if (src_uncasted_type->id == ZigTypeIdPointer) {26038 if (src_uncasted_type->id == ZigTypeIdPointer) {
25096 if ((err = resolve_ptr_align(ira, src_uncasted_type, &src_align)))26039 if ((err = resolve_ptr_align(ira, src_uncasted_type, &src_align)))
25097 return ira->codegen->invalid_instruction;26040 return ira->codegen->invalid_inst_gen;
25098 } else {26041 } else {
25099 src_align = get_abi_alignment(ira->codegen, u8);26042 src_align = get_abi_alignment(ira->codegen, u8);
25100 }26043 }
...@@ -25105,17 +26048,17 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio...@@ -25105,17 +26048,17 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
25105 ZigType *u8_ptr_const = get_pointer_to_type_extra(ira->codegen, u8, true, src_is_volatile,26048 ZigType *u8_ptr_const = get_pointer_to_type_extra(ira->codegen, u8, true, src_is_volatile,
25106 PtrLenUnknown, src_align, 0, 0, false);26049 PtrLenUnknown, src_align, 0, 0, false);
2510726050
25108 IrInstruction *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr_mut);26051 IrInstGen *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr_mut);
25109 if (type_is_invalid(casted_dest_ptr->value->type))26052 if (type_is_invalid(casted_dest_ptr->value->type))
25110 return ira->codegen->invalid_instruction;26053 return ira->codegen->invalid_inst_gen;
2511126054
25112 IrInstruction *casted_src_ptr = ir_implicit_cast(ira, src_ptr, u8_ptr_const);26055 IrInstGen *casted_src_ptr = ir_implicit_cast(ira, src_ptr, u8_ptr_const);
25113 if (type_is_invalid(casted_src_ptr->value->type))26056 if (type_is_invalid(casted_src_ptr->value->type))
25114 return ira->codegen->invalid_instruction;26057 return ira->codegen->invalid_inst_gen;
2511526058
25116 IrInstruction *casted_count = ir_implicit_cast(ira, count_value, usize);26059 IrInstGen *casted_count = ir_implicit_cast(ira, count_value, usize);
25117 if (type_is_invalid(casted_count->value->type))26060 if (type_is_invalid(casted_count->value->type))
25118 return ira->codegen->invalid_instruction;26061 return ira->codegen->invalid_inst_gen;
2511926062
25120 // TODO test this at comptime with u8 and non-u8 types26063 // TODO test this at comptime with u8 and non-u8 types
25121 // TODO test with dest ptr being a global runtime variable26064 // TODO test with dest ptr being a global runtime variable
...@@ -25125,15 +26068,15 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio...@@ -25125,15 +26068,15 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
25125 {26068 {
25126 ZigValue *dest_ptr_val = ir_resolve_const(ira, casted_dest_ptr, UndefBad);26069 ZigValue *dest_ptr_val = ir_resolve_const(ira, casted_dest_ptr, UndefBad);
25127 if (dest_ptr_val == nullptr)26070 if (dest_ptr_val == nullptr)
25128 return ira->codegen->invalid_instruction;26071 return ira->codegen->invalid_inst_gen;
2512926072
25130 ZigValue *src_ptr_val = ir_resolve_const(ira, casted_src_ptr, UndefBad);26073 ZigValue *src_ptr_val = ir_resolve_const(ira, casted_src_ptr, UndefBad);
25131 if (src_ptr_val == nullptr)26074 if (src_ptr_val == nullptr)
25132 return ira->codegen->invalid_instruction;26075 return ira->codegen->invalid_inst_gen;
2513326076
25134 ZigValue *count_val = ir_resolve_const(ira, casted_count, UndefBad);26077 ZigValue *count_val = ir_resolve_const(ira, casted_count, UndefBad);
25135 if (count_val == nullptr)26078 if (count_val == nullptr)
25136 return ira->codegen->invalid_instruction;26079 return ira->codegen->invalid_inst_gen;
2513726080
25138 if (dest_ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {26081 if (dest_ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
25139 size_t count = bigint_as_usize(&count_val->data.x_bigint);26082 size_t count = bigint_as_usize(&count_val->data.x_bigint);
...@@ -25176,8 +26119,8 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio...@@ -25176,8 +26119,8 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
25176 }26119 }
2517726120
25178 if (dest_start + count > dest_end) {26121 if (dest_start + count > dest_end) {
25179 ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds pointer access"));26122 ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds pointer access"));
25180 return ira->codegen->invalid_instruction;26123 return ira->codegen->invalid_inst_gen;
25181 }26124 }
2518226125
25183 ZigValue *src_elements;26126 ZigValue *src_elements;
...@@ -25219,8 +26162,8 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio...@@ -25219,8 +26162,8 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
25219 }26162 }
2522026163
25221 if (src_start + count > src_end) {26164 if (src_start + count > src_end) {
25222 ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds pointer access"));26165 ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds pointer access"));
25223 return ira->codegen->invalid_instruction;26166 return ira->codegen->invalid_inst_gen;
25224 }26167 }
2522526168
25226 // TODO check for noalias violations - this should be generalized to work for any function26169 // TODO check for noalias violations - this should be generalized to work for any function
...@@ -25229,42 +26172,39 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio...@@ -25229,42 +26172,39 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
25229 copy_const_val(&dest_elements[dest_start + i], &src_elements[src_start + i]);26172 copy_const_val(&dest_elements[dest_start + i], &src_elements[src_start + i]);
25230 }26173 }
2523126174
25232 return ir_const_void(ira, &instruction->base);26175 return ir_const_void(ira, &instruction->base.base);
25233 }26176 }
25234 }26177 }
2523526178
25236 IrInstruction *result = ir_build_memcpy(&ira->new_irb, instruction->base.scope, instruction->base.source_node,26179 return ir_build_memcpy_gen(ira, &instruction->base.base, casted_dest_ptr, casted_src_ptr, casted_count);
25237 casted_dest_ptr, casted_src_ptr, casted_count);
25238 result->value->type = ira->codegen->builtin_types.entry_void;
25239 return result;
25240}26180}
2524126181
25242static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstructionSliceSrc *instruction) {26182static IrInstGen *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstSrcSlice *instruction) {
25243 IrInstruction *ptr_ptr = instruction->ptr->child;26183 IrInstGen *ptr_ptr = instruction->ptr->child;
25244 if (type_is_invalid(ptr_ptr->value->type))26184 if (type_is_invalid(ptr_ptr->value->type))
25245 return ira->codegen->invalid_instruction;26185 return ira->codegen->invalid_inst_gen;
2524626186
25247 ZigType *ptr_ptr_type = ptr_ptr->value->type;26187 ZigType *ptr_ptr_type = ptr_ptr->value->type;
25248 assert(ptr_ptr_type->id == ZigTypeIdPointer);26188 assert(ptr_ptr_type->id == ZigTypeIdPointer);
25249 ZigType *array_type = ptr_ptr_type->data.pointer.child_type;26189 ZigType *array_type = ptr_ptr_type->data.pointer.child_type;
2525026190
25251 IrInstruction *start = instruction->start->child;26191 IrInstGen *start = instruction->start->child;
25252 if (type_is_invalid(start->value->type))26192 if (type_is_invalid(start->value->type))
25253 return ira->codegen->invalid_instruction;26193 return ira->codegen->invalid_inst_gen;
2525426194
25255 ZigType *usize = ira->codegen->builtin_types.entry_usize;26195 ZigType *usize = ira->codegen->builtin_types.entry_usize;
25256 IrInstruction *casted_start = ir_implicit_cast(ira, start, usize);26196 IrInstGen *casted_start = ir_implicit_cast(ira, start, usize);
25257 if (type_is_invalid(casted_start->value->type))26197 if (type_is_invalid(casted_start->value->type))
25258 return ira->codegen->invalid_instruction;26198 return ira->codegen->invalid_inst_gen;
2525926199
25260 IrInstruction *end;26200 IrInstGen *end;
25261 if (instruction->end) {26201 if (instruction->end) {
25262 end = instruction->end->child;26202 end = instruction->end->child;
25263 if (type_is_invalid(end->value->type))26203 if (type_is_invalid(end->value->type))
25264 return ira->codegen->invalid_instruction;26204 return ira->codegen->invalid_inst_gen;
25265 end = ir_implicit_cast(ira, end, usize);26205 end = ir_implicit_cast(ira, end, usize);
25266 if (type_is_invalid(end->value->type))26206 if (type_is_invalid(end->value->type))
25267 return ira->codegen->invalid_instruction;26207 return ira->codegen->invalid_inst_gen;
25268 } else {26208 } else {
25269 end = nullptr;26209 end = nullptr;
25270 }26210 }
...@@ -25292,8 +26232,8 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction...@@ -25292,8 +26232,8 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
25292 PtrLenUnknown,26232 PtrLenUnknown,
25293 array_type->data.pointer.explicit_alignment, 0, 0, false);26233 array_type->data.pointer.explicit_alignment, 0, 0, false);
25294 } else {26234 } else {
25295 ir_add_error(ira, &instruction->base, buf_sprintf("slice of single-item pointer"));26235 ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of single-item pointer"));
25296 return ira->codegen->invalid_instruction;26236 return ira->codegen->invalid_inst_gen;
25297 }26237 }
25298 } else {26238 } else {
25299 elem_type = array_type->data.pointer.child_type;26239 elem_type = array_type->data.pointer.child_type;
...@@ -25303,8 +26243,8 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction...@@ -25303,8 +26243,8 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
25303 ZigType *maybe_sentineled_slice_ptr_type = array_type;26243 ZigType *maybe_sentineled_slice_ptr_type = array_type;
25304 non_sentinel_slice_ptr_type = adjust_ptr_sentinel(ira->codegen, maybe_sentineled_slice_ptr_type, nullptr);26244 non_sentinel_slice_ptr_type = adjust_ptr_sentinel(ira->codegen, maybe_sentineled_slice_ptr_type, nullptr);
25305 if (!end) {26245 if (!end) {
25306 ir_add_error(ira, &instruction->base, buf_sprintf("slice of pointer must include end value"));26246 ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of pointer must include end value"));
25307 return ira->codegen->invalid_instruction;26247 return ira->codegen->invalid_inst_gen;
25308 }26248 }
25309 }26249 }
25310 } else if (is_slice(array_type)) {26250 } else if (is_slice(array_type)) {
...@@ -25312,23 +26252,23 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction...@@ -25312,23 +26252,23 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
25312 non_sentinel_slice_ptr_type = adjust_ptr_sentinel(ira->codegen, maybe_sentineled_slice_ptr_type, nullptr);26252 non_sentinel_slice_ptr_type = adjust_ptr_sentinel(ira->codegen, maybe_sentineled_slice_ptr_type, nullptr);
25313 elem_type = non_sentinel_slice_ptr_type->data.pointer.child_type;26253 elem_type = non_sentinel_slice_ptr_type->data.pointer.child_type;
25314 } else {26254 } else {
25315 ir_add_error(ira, &instruction->base,26255 ir_add_error(ira, &instruction->base.base,
25316 buf_sprintf("slice of non-array type '%s'", buf_ptr(&array_type->name)));26256 buf_sprintf("slice of non-array type '%s'", buf_ptr(&array_type->name)));
25317 return ira->codegen->invalid_instruction;26257 return ira->codegen->invalid_inst_gen;
25318 }26258 }
2531926259
25320 ZigType *return_type;26260 ZigType *return_type;
25321 ZigValue *sentinel_val = nullptr;26261 ZigValue *sentinel_val = nullptr;
25322 if (instruction->sentinel) {26262 if (instruction->sentinel) {
25323 IrInstruction *uncasted_sentinel = instruction->sentinel->child;26263 IrInstGen *uncasted_sentinel = instruction->sentinel->child;
25324 if (type_is_invalid(uncasted_sentinel->value->type))26264 if (type_is_invalid(uncasted_sentinel->value->type))
25325 return ira->codegen->invalid_instruction;26265 return ira->codegen->invalid_inst_gen;
25326 IrInstruction *sentinel = ir_implicit_cast(ira, uncasted_sentinel, elem_type);26266 IrInstGen *sentinel = ir_implicit_cast(ira, uncasted_sentinel, elem_type);
25327 if (type_is_invalid(sentinel->value->type))26267 if (type_is_invalid(sentinel->value->type))
25328 return ira->codegen->invalid_instruction;26268 return ira->codegen->invalid_inst_gen;
25329 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);26269 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
25330 if (sentinel_val == nullptr)26270 if (sentinel_val == nullptr)
25331 return ira->codegen->invalid_instruction;26271 return ira->codegen->invalid_inst_gen;
25332 ZigType *slice_ptr_type = adjust_ptr_sentinel(ira->codegen, non_sentinel_slice_ptr_type, sentinel_val);26272 ZigType *slice_ptr_type = adjust_ptr_sentinel(ira->codegen, non_sentinel_slice_ptr_type, sentinel_val);
25333 return_type = get_slice_type(ira->codegen, slice_ptr_type);26273 return_type = get_slice_type(ira->codegen, slice_ptr_type);
25334 } else {26274 } else {
...@@ -25350,9 +26290,9 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction...@@ -25350,9 +26290,9 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
25350 if (array_type->id == ZigTypeIdPointer) {26290 if (array_type->id == ZigTypeIdPointer) {
25351 ZigType *child_array_type = array_type->data.pointer.child_type;26291 ZigType *child_array_type = array_type->data.pointer.child_type;
25352 assert(child_array_type->id == ZigTypeIdArray);26292 assert(child_array_type->id == ZigTypeIdArray);
25353 parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);26293 parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
25354 if (parent_ptr == nullptr)26294 if (parent_ptr == nullptr)
25355 return ira->codegen->invalid_instruction;26295 return ira->codegen->invalid_inst_gen;
2535626296
2535726297
25358 if (parent_ptr->special == ConstValSpecialUndef) {26298 if (parent_ptr->special == ConstValSpecialUndef) {
...@@ -25361,26 +26301,26 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction...@@ -25361,26 +26301,26 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
25361 rel_end = SIZE_MAX;26301 rel_end = SIZE_MAX;
25362 ptr_is_undef = true;26302 ptr_is_undef = true;
25363 } else {26303 } else {
25364 array_val = const_ptr_pointee(ira, ira->codegen, parent_ptr, instruction->base.source_node);26304 array_val = const_ptr_pointee(ira, ira->codegen, parent_ptr, instruction->base.base.source_node);
25365 if (array_val == nullptr)26305 if (array_val == nullptr)
25366 return ira->codegen->invalid_instruction;26306 return ira->codegen->invalid_inst_gen;
2536726307
25368 rel_end = child_array_type->data.array.len;26308 rel_end = child_array_type->data.array.len;
25369 abs_offset = 0;26309 abs_offset = 0;
25370 }26310 }
25371 } else {26311 } else {
25372 array_val = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);26312 array_val = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
25373 if (array_val == nullptr)26313 if (array_val == nullptr)
25374 return ira->codegen->invalid_instruction;26314 return ira->codegen->invalid_inst_gen;
25375 rel_end = array_type->data.array.len;26315 rel_end = array_type->data.array.len;
25376 parent_ptr = nullptr;26316 parent_ptr = nullptr;
25377 abs_offset = 0;26317 abs_offset = 0;
25378 }26318 }
25379 } else if (array_type->id == ZigTypeIdPointer) {26319 } else if (array_type->id == ZigTypeIdPointer) {
25380 assert(array_type->data.pointer.ptr_len == PtrLenUnknown);26320 assert(array_type->data.pointer.ptr_len == PtrLenUnknown);
25381 parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);26321 parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
25382 if (parent_ptr == nullptr)26322 if (parent_ptr == nullptr)
25383 return ira->codegen->invalid_instruction;26323 return ira->codegen->invalid_inst_gen;
2538426324
25385 if (parent_ptr->special == ConstValSpecialUndef) {26325 if (parent_ptr->special == ConstValSpecialUndef) {
25386 array_val = nullptr;26326 array_val = nullptr;
...@@ -25426,19 +26366,19 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction...@@ -25426,19 +26366,19 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
25426 zig_panic("TODO slice of null ptr");26366 zig_panic("TODO slice of null ptr");
25427 }26367 }
25428 } else if (is_slice(array_type)) {26368 } else if (is_slice(array_type)) {
25429 ZigValue *slice_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);26369 ZigValue *slice_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
25430 if (slice_ptr == nullptr)26370 if (slice_ptr == nullptr)
25431 return ira->codegen->invalid_instruction;26371 return ira->codegen->invalid_inst_gen;
2543226372
25433 if (slice_ptr->special == ConstValSpecialUndef) {26373 if (slice_ptr->special == ConstValSpecialUndef) {
25434 ir_add_error(ira, &instruction->base, buf_sprintf("slice of undefined"));26374 ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of undefined"));
25435 return ira->codegen->invalid_instruction;26375 return ira->codegen->invalid_inst_gen;
25436 }26376 }
2543726377
25438 parent_ptr = slice_ptr->data.x_struct.fields[slice_ptr_index];26378 parent_ptr = slice_ptr->data.x_struct.fields[slice_ptr_index];
25439 if (parent_ptr->special == ConstValSpecialUndef) {26379 if (parent_ptr->special == ConstValSpecialUndef) {
25440 ir_add_error(ira, &instruction->base, buf_sprintf("slice of undefined"));26380 ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of undefined"));
25441 return ira->codegen->invalid_instruction;26381 return ira->codegen->invalid_inst_gen;
25442 }26382 }
2544326383
25444 ZigValue *len_val = slice_ptr->data.x_struct.fields[slice_len_index];26384 ZigValue *len_val = slice_ptr->data.x_struct.fields[slice_len_index];
...@@ -25481,37 +26421,37 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction...@@ -25481,37 +26421,37 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2548126421
25482 ZigValue *start_val = ir_resolve_const(ira, casted_start, UndefBad);26422 ZigValue *start_val = ir_resolve_const(ira, casted_start, UndefBad);
25483 if (!start_val)26423 if (!start_val)
25484 return ira->codegen->invalid_instruction;26424 return ira->codegen->invalid_inst_gen;
2548526425
25486 uint64_t start_scalar = bigint_as_u64(&start_val->data.x_bigint);26426 uint64_t start_scalar = bigint_as_u64(&start_val->data.x_bigint);
25487 if (!ptr_is_undef && start_scalar > rel_end) {26427 if (!ptr_is_undef && start_scalar > rel_end) {
25488 ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds slice"));26428 ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds slice"));
25489 return ira->codegen->invalid_instruction;26429 return ira->codegen->invalid_inst_gen;
25490 }26430 }
2549126431
25492 uint64_t end_scalar = rel_end;26432 uint64_t end_scalar = rel_end;
25493 if (end) {26433 if (end) {
25494 ZigValue *end_val = ir_resolve_const(ira, end, UndefBad);26434 ZigValue *end_val = ir_resolve_const(ira, end, UndefBad);
25495 if (!end_val)26435 if (!end_val)
25496 return ira->codegen->invalid_instruction;26436 return ira->codegen->invalid_inst_gen;
25497 end_scalar = bigint_as_u64(&end_val->data.x_bigint);26437 end_scalar = bigint_as_u64(&end_val->data.x_bigint);
25498 }26438 }
25499 if (!ptr_is_undef) {26439 if (!ptr_is_undef) {
25500 if (end_scalar > rel_end) {26440 if (end_scalar > rel_end) {
25501 ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds slice"));26441 ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds slice"));
25502 return ira->codegen->invalid_instruction;26442 return ira->codegen->invalid_inst_gen;
25503 }26443 }
25504 if (start_scalar > end_scalar) {26444 if (start_scalar > end_scalar) {
25505 ir_add_error(ira, &instruction->base, buf_sprintf("slice start is greater than end"));26445 ir_add_error(ira, &instruction->base.base, buf_sprintf("slice start is greater than end"));
25506 return ira->codegen->invalid_instruction;26446 return ira->codegen->invalid_inst_gen;
25507 }26447 }
25508 }26448 }
25509 if (ptr_is_undef && start_scalar != end_scalar) {26449 if (ptr_is_undef && start_scalar != end_scalar) {
25510 ir_add_error(ira, &instruction->base, buf_sprintf("non-zero length slice of undefined pointer"));26450 ir_add_error(ira, &instruction->base.base, buf_sprintf("non-zero length slice of undefined pointer"));
25511 return ira->codegen->invalid_instruction;26451 return ira->codegen->invalid_inst_gen;
25512 }26452 }
2551326453
25514 IrInstruction *result = ir_const(ira, &instruction->base, return_type);26454 IrInstGen *result = ir_const(ira, &instruction->base.base, return_type);
25515 ZigValue *out_val = result->value;26455 ZigValue *out_val = result->value;
25516 out_val->data.x_struct.fields = alloc_const_vals_ptrs(2);26456 out_val->data.x_struct.fields = alloc_const_vals_ptrs(2);
2551726457
...@@ -25568,28 +26508,28 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction...@@ -25568,28 +26508,28 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
25568 return result;26508 return result;
25569 }26509 }
2557026510
25571 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,26511 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
25572 return_type, nullptr, true, true);26512 return_type, nullptr, true, true);
25573 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {26513 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
25574 return result_loc;26514 return result_loc;
25575 }26515 }
25576 return ir_build_slice_gen(ira, &instruction->base, return_type,26516 return ir_build_slice_gen(ira, &instruction->base.base, return_type,
25577 ptr_ptr, casted_start, end, instruction->safety_check_on, result_loc);26517 ptr_ptr, casted_start, end, instruction->safety_check_on, result_loc);
25578}26518}
2557926519
25580static IrInstruction *ir_analyze_instruction_member_count(IrAnalyze *ira, IrInstructionMemberCount *instruction) {26520static IrInstGen *ir_analyze_instruction_member_count(IrAnalyze *ira, IrInstSrcMemberCount *instruction) {
25581 Error err;26521 Error err;
25582 IrInstruction *container = instruction->container->child;26522 IrInstGen *container = instruction->container->child;
25583 if (type_is_invalid(container->value->type))26523 if (type_is_invalid(container->value->type))
25584 return ira->codegen->invalid_instruction;26524 return ira->codegen->invalid_inst_gen;
25585 ZigType *container_type = ir_resolve_type(ira, container);26525 ZigType *container_type = ir_resolve_type(ira, container);
2558626526
25587 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))26527 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
25588 return ira->codegen->invalid_instruction;26528 return ira->codegen->invalid_inst_gen;
2558926529
25590 uint64_t result;26530 uint64_t result;
25591 if (type_is_invalid(container_type)) {26531 if (type_is_invalid(container_type)) {
25592 return ira->codegen->invalid_instruction;26532 return ira->codegen->invalid_inst_gen;
25593 } else if (container_type->id == ZigTypeIdEnum) {26533 } else if (container_type->id == ZigTypeIdEnum) {
25594 result = container_type->data.enumeration.src_field_count;26534 result = container_type->data.enumeration.src_field_count;
25595 } else if (container_type->id == ZigTypeIdStruct) {26535 } else if (container_type->id == ZigTypeIdStruct) {
...@@ -25597,135 +26537,135 @@ static IrInstruction *ir_analyze_instruction_member_count(IrAnalyze *ira, IrInst...@@ -25597,135 +26537,135 @@ static IrInstruction *ir_analyze_instruction_member_count(IrAnalyze *ira, IrInst
25597 } else if (container_type->id == ZigTypeIdUnion) {26537 } else if (container_type->id == ZigTypeIdUnion) {
25598 result = container_type->data.unionation.src_field_count;26538 result = container_type->data.unionation.src_field_count;
25599 } else if (container_type->id == ZigTypeIdErrorSet) {26539 } else if (container_type->id == ZigTypeIdErrorSet) {
25600 if (!resolve_inferred_error_set(ira->codegen, container_type, instruction->base.source_node)) {26540 if (!resolve_inferred_error_set(ira->codegen, container_type, instruction->base.base.source_node)) {
25601 return ira->codegen->invalid_instruction;26541 return ira->codegen->invalid_inst_gen;
25602 }26542 }
25603 if (type_is_global_error_set(container_type)) {26543 if (type_is_global_error_set(container_type)) {
25604 ir_add_error(ira, &instruction->base, buf_sprintf("global error set member count not available at comptime"));26544 ir_add_error(ira, &instruction->base.base, buf_sprintf("global error set member count not available at comptime"));
25605 return ira->codegen->invalid_instruction;26545 return ira->codegen->invalid_inst_gen;
25606 }26546 }
25607 result = container_type->data.error_set.err_count;26547 result = container_type->data.error_set.err_count;
25608 } else {26548 } else {
25609 ir_add_error(ira, &instruction->base, buf_sprintf("no value count available for type '%s'", buf_ptr(&container_type->name)));26549 ir_add_error(ira, &instruction->base.base, buf_sprintf("no value count available for type '%s'", buf_ptr(&container_type->name)));
25610 return ira->codegen->invalid_instruction;26550 return ira->codegen->invalid_inst_gen;
25611 }26551 }
2561226552
25613 return ir_const_unsigned(ira, &instruction->base, result);26553 return ir_const_unsigned(ira, &instruction->base.base, result);
25614}26554}
2561526555
25616static IrInstruction *ir_analyze_instruction_member_type(IrAnalyze *ira, IrInstructionMemberType *instruction) {26556static IrInstGen *ir_analyze_instruction_member_type(IrAnalyze *ira, IrInstSrcMemberType *instruction) {
25617 Error err;26557 Error err;
25618 IrInstruction *container_type_value = instruction->container_type->child;26558 IrInstGen *container_type_value = instruction->container_type->child;
25619 ZigType *container_type = ir_resolve_type(ira, container_type_value);26559 ZigType *container_type = ir_resolve_type(ira, container_type_value);
25620 if (type_is_invalid(container_type))26560 if (type_is_invalid(container_type))
25621 return ira->codegen->invalid_instruction;26561 return ira->codegen->invalid_inst_gen;
2562226562
25623 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))26563 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
25624 return ira->codegen->invalid_instruction;26564 return ira->codegen->invalid_inst_gen;
2562526565
2562626566
25627 uint64_t member_index;26567 uint64_t member_index;
25628 IrInstruction *index_value = instruction->member_index->child;26568 IrInstGen *index_value = instruction->member_index->child;
25629 if (!ir_resolve_usize(ira, index_value, &member_index))26569 if (!ir_resolve_usize(ira, index_value, &member_index))
25630 return ira->codegen->invalid_instruction;26570 return ira->codegen->invalid_inst_gen;
2563126571
25632 if (container_type->id == ZigTypeIdStruct) {26572 if (container_type->id == ZigTypeIdStruct) {
25633 if (member_index >= container_type->data.structure.src_field_count) {26573 if (member_index >= container_type->data.structure.src_field_count) {
25634 ir_add_error(ira, index_value,26574 ir_add_error(ira, &index_value->base,
25635 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",26575 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
25636 member_index, buf_ptr(&container_type->name), container_type->data.structure.src_field_count));26576 member_index, buf_ptr(&container_type->name), container_type->data.structure.src_field_count));
25637 return ira->codegen->invalid_instruction;26577 return ira->codegen->invalid_inst_gen;
25638 }26578 }
25639 TypeStructField *field = container_type->data.structure.fields[member_index];26579 TypeStructField *field = container_type->data.structure.fields[member_index];
2564026580
25641 return ir_const_type(ira, &instruction->base, field->type_entry);26581 return ir_const_type(ira, &instruction->base.base, field->type_entry);
25642 } else if (container_type->id == ZigTypeIdUnion) {26582 } else if (container_type->id == ZigTypeIdUnion) {
25643 if (member_index >= container_type->data.unionation.src_field_count) {26583 if (member_index >= container_type->data.unionation.src_field_count) {
25644 ir_add_error(ira, index_value,26584 ir_add_error(ira, &index_value->base,
25645 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",26585 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
25646 member_index, buf_ptr(&container_type->name), container_type->data.unionation.src_field_count));26586 member_index, buf_ptr(&container_type->name), container_type->data.unionation.src_field_count));
25647 return ira->codegen->invalid_instruction;26587 return ira->codegen->invalid_inst_gen;
25648 }26588 }
25649 TypeUnionField *field = &container_type->data.unionation.fields[member_index];26589 TypeUnionField *field = &container_type->data.unionation.fields[member_index];
2565026590
25651 return ir_const_type(ira, &instruction->base, field->type_entry);26591 return ir_const_type(ira, &instruction->base.base, field->type_entry);
25652 } else {26592 } else {
25653 ir_add_error(ira, container_type_value,26593 ir_add_error(ira, &container_type_value->base,
25654 buf_sprintf("type '%s' does not support @memberType", buf_ptr(&container_type->name)));26594 buf_sprintf("type '%s' does not support @memberType", buf_ptr(&container_type->name)));
25655 return ira->codegen->invalid_instruction;26595 return ira->codegen->invalid_inst_gen;
25656 }26596 }
25657}26597}
2565826598
25659static IrInstruction *ir_analyze_instruction_member_name(IrAnalyze *ira, IrInstructionMemberName *instruction) {26599static IrInstGen *ir_analyze_instruction_member_name(IrAnalyze *ira, IrInstSrcMemberName *instruction) {
25660 Error err;26600 Error err;
25661 IrInstruction *container_type_value = instruction->container_type->child;26601 IrInstGen *container_type_value = instruction->container_type->child;
25662 ZigType *container_type = ir_resolve_type(ira, container_type_value);26602 ZigType *container_type = ir_resolve_type(ira, container_type_value);
25663 if (type_is_invalid(container_type))26603 if (type_is_invalid(container_type))
25664 return ira->codegen->invalid_instruction;26604 return ira->codegen->invalid_inst_gen;
2566526605
25666 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))26606 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
25667 return ira->codegen->invalid_instruction;26607 return ira->codegen->invalid_inst_gen;
2566826608
25669 uint64_t member_index;26609 uint64_t member_index;
25670 IrInstruction *index_value = instruction->member_index->child;26610 IrInstGen *index_value = instruction->member_index->child;
25671 if (!ir_resolve_usize(ira, index_value, &member_index))26611 if (!ir_resolve_usize(ira, index_value, &member_index))
25672 return ira->codegen->invalid_instruction;26612 return ira->codegen->invalid_inst_gen;
2567326613
25674 if (container_type->id == ZigTypeIdStruct) {26614 if (container_type->id == ZigTypeIdStruct) {
25675 if (member_index >= container_type->data.structure.src_field_count) {26615 if (member_index >= container_type->data.structure.src_field_count) {
25676 ir_add_error(ira, index_value,26616 ir_add_error(ira, &index_value->base,
25677 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",26617 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
25678 member_index, buf_ptr(&container_type->name), container_type->data.structure.src_field_count));26618 member_index, buf_ptr(&container_type->name), container_type->data.structure.src_field_count));
25679 return ira->codegen->invalid_instruction;26619 return ira->codegen->invalid_inst_gen;
25680 }26620 }
25681 TypeStructField *field = container_type->data.structure.fields[member_index];26621 TypeStructField *field = container_type->data.structure.fields[member_index];
2568226622
25683 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);26623 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
25684 init_const_str_lit(ira->codegen, result->value, field->name);26624 init_const_str_lit(ira->codegen, result->value, field->name);
25685 return result;26625 return result;
25686 } else if (container_type->id == ZigTypeIdEnum) {26626 } else if (container_type->id == ZigTypeIdEnum) {
25687 if (member_index >= container_type->data.enumeration.src_field_count) {26627 if (member_index >= container_type->data.enumeration.src_field_count) {
25688 ir_add_error(ira, index_value,26628 ir_add_error(ira, &index_value->base,
25689 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",26629 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
25690 member_index, buf_ptr(&container_type->name), container_type->data.enumeration.src_field_count));26630 member_index, buf_ptr(&container_type->name), container_type->data.enumeration.src_field_count));
25691 return ira->codegen->invalid_instruction;26631 return ira->codegen->invalid_inst_gen;
25692 }26632 }
25693 TypeEnumField *field = &container_type->data.enumeration.fields[member_index];26633 TypeEnumField *field = &container_type->data.enumeration.fields[member_index];
2569426634
25695 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);26635 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
25696 init_const_str_lit(ira->codegen, result->value, field->name);26636 init_const_str_lit(ira->codegen, result->value, field->name);
25697 return result;26637 return result;
25698 } else if (container_type->id == ZigTypeIdUnion) {26638 } else if (container_type->id == ZigTypeIdUnion) {
25699 if (member_index >= container_type->data.unionation.src_field_count) {26639 if (member_index >= container_type->data.unionation.src_field_count) {
25700 ir_add_error(ira, index_value,26640 ir_add_error(ira, &index_value->base,
25701 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",26641 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
25702 member_index, buf_ptr(&container_type->name), container_type->data.unionation.src_field_count));26642 member_index, buf_ptr(&container_type->name), container_type->data.unionation.src_field_count));
25703 return ira->codegen->invalid_instruction;26643 return ira->codegen->invalid_inst_gen;
25704 }26644 }
25705 TypeUnionField *field = &container_type->data.unionation.fields[member_index];26645 TypeUnionField *field = &container_type->data.unionation.fields[member_index];
2570626646
25707 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);26647 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
25708 init_const_str_lit(ira->codegen, result->value, field->name);26648 init_const_str_lit(ira->codegen, result->value, field->name);
25709 return result;26649 return result;
25710 } else {26650 } else {
25711 ir_add_error(ira, container_type_value,26651 ir_add_error(ira, &container_type_value->base,
25712 buf_sprintf("type '%s' does not support @memberName", buf_ptr(&container_type->name)));26652 buf_sprintf("type '%s' does not support @memberName", buf_ptr(&container_type->name)));
25713 return ira->codegen->invalid_instruction;26653 return ira->codegen->invalid_inst_gen;
25714 }26654 }
25715}26655}
2571626656
25717static IrInstruction *ir_analyze_instruction_has_field(IrAnalyze *ira, IrInstructionHasField *instruction) {26657static IrInstGen *ir_analyze_instruction_has_field(IrAnalyze *ira, IrInstSrcHasField *instruction) {
25718 Error err;26658 Error err;
25719 ZigType *container_type = ir_resolve_type(ira, instruction->container_type->child);26659 ZigType *container_type = ir_resolve_type(ira, instruction->container_type->child);
25720 if (type_is_invalid(container_type))26660 if (type_is_invalid(container_type))
25721 return ira->codegen->invalid_instruction;26661 return ira->codegen->invalid_inst_gen;
2572226662
25723 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusZeroBitsKnown)))26663 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusZeroBitsKnown)))
25724 return ira->codegen->invalid_instruction;26664 return ira->codegen->invalid_inst_gen;
2572526665
25726 Buf *field_name = ir_resolve_str(ira, instruction->field_name->child);26666 Buf *field_name = ir_resolve_str(ira, instruction->field_name->child);
25727 if (field_name == nullptr)26667 if (field_name == nullptr)
25728 return ira->codegen->invalid_instruction;26668 return ira->codegen->invalid_inst_gen;
2572926669
25730 bool result;26670 bool result;
25731 if (container_type->id == ZigTypeIdStruct) {26671 if (container_type->id == ZigTypeIdStruct) {
...@@ -25735,91 +26675,77 @@ static IrInstruction *ir_analyze_instruction_has_field(IrAnalyze *ira, IrInstruc...@@ -25735,91 +26675,77 @@ static IrInstruction *ir_analyze_instruction_has_field(IrAnalyze *ira, IrInstruc
25735 } else if (container_type->id == ZigTypeIdUnion) {26675 } else if (container_type->id == ZigTypeIdUnion) {
25736 result = find_union_type_field(container_type, field_name) != nullptr;26676 result = find_union_type_field(container_type, field_name) != nullptr;
25737 } else {26677 } else {
25738 ir_add_error(ira, instruction->container_type,26678 ir_add_error(ira, &instruction->container_type->base,
25739 buf_sprintf("type '%s' does not support @hasField", buf_ptr(&container_type->name)));26679 buf_sprintf("type '%s' does not support @hasField", buf_ptr(&container_type->name)));
25740 return ira->codegen->invalid_instruction;26680 return ira->codegen->invalid_inst_gen;
25741 }26681 }
25742 return ir_const_bool(ira, &instruction->base, result);26682 return ir_const_bool(ira, &instruction->base.base, result);
25743}26683}
2574426684
25745static IrInstruction *ir_analyze_instruction_breakpoint(IrAnalyze *ira, IrInstructionBreakpoint *instruction) {26685static IrInstGen *ir_analyze_instruction_breakpoint(IrAnalyze *ira, IrInstSrcBreakpoint *instruction) {
25746 IrInstruction *result = ir_build_breakpoint(&ira->new_irb,26686 return ir_build_breakpoint_gen(ira, &instruction->base.base);
25747 instruction->base.scope, instruction->base.source_node);
25748 result->value->type = ira->codegen->builtin_types.entry_void;
25749 return result;
25750}26687}
2575126688
25752static IrInstruction *ir_analyze_instruction_return_address(IrAnalyze *ira, IrInstructionReturnAddress *instruction) {26689static IrInstGen *ir_analyze_instruction_return_address(IrAnalyze *ira, IrInstSrcReturnAddress *instruction) {
25753 IrInstruction *result = ir_build_return_address(&ira->new_irb,26690 return ir_build_return_address_gen(ira, &instruction->base.base);
25754 instruction->base.scope, instruction->base.source_node);
25755 result->value->type = ira->codegen->builtin_types.entry_usize;
25756 return result;
25757}26691}
2575826692
25759static IrInstruction *ir_analyze_instruction_frame_address(IrAnalyze *ira, IrInstructionFrameAddress *instruction) {26693static IrInstGen *ir_analyze_instruction_frame_address(IrAnalyze *ira, IrInstSrcFrameAddress *instruction) {
25760 IrInstruction *result = ir_build_frame_address(&ira->new_irb,26694 return ir_build_frame_address_gen(ira, &instruction->base.base);
25761 instruction->base.scope, instruction->base.source_node);
25762 result->value->type = ira->codegen->builtin_types.entry_usize;
25763 return result;
25764}26695}
2576526696
25766static IrInstruction *ir_analyze_instruction_frame_handle(IrAnalyze *ira, IrInstructionFrameHandle *instruction) {26697static IrInstGen *ir_analyze_instruction_frame_handle(IrAnalyze *ira, IrInstSrcFrameHandle *instruction) {
25767 ZigFn *fn = exec_fn_entry(ira->new_irb.exec);26698 ZigFn *fn = ira->new_irb.exec->fn_entry;
25768 ir_assert(fn != nullptr, &instruction->base);26699 ir_assert(fn != nullptr, &instruction->base.base);
2576926700
25770 if (fn->inferred_async_node == nullptr) {26701 if (fn->inferred_async_node == nullptr) {
25771 fn->inferred_async_node = instruction->base.source_node;26702 fn->inferred_async_node = instruction->base.base.source_node;
25772 }26703 }
2577326704
25774 ZigType *frame_type = get_fn_frame_type(ira->codegen, fn);26705 ZigType *frame_type = get_fn_frame_type(ira->codegen, fn);
25775 ZigType *ptr_frame_type = get_pointer_to_type(ira->codegen, frame_type, false);26706 ZigType *ptr_frame_type = get_pointer_to_type(ira->codegen, frame_type, false);
2577626707
25777 IrInstruction *result = ir_build_handle(&ira->new_irb, instruction->base.scope, instruction->base.source_node);26708 return ir_build_handle_gen(ira, &instruction->base.base, ptr_frame_type);
25778 result->value->type = ptr_frame_type;
25779 return result;
25780}26709}
2578126710
25782static IrInstruction *ir_analyze_instruction_frame_type(IrAnalyze *ira, IrInstructionFrameType *instruction) {26711static IrInstGen *ir_analyze_instruction_frame_type(IrAnalyze *ira, IrInstSrcFrameType *instruction) {
25783 ZigFn *fn = ir_resolve_fn(ira, instruction->fn->child);26712 ZigFn *fn = ir_resolve_fn(ira, instruction->fn->child);
25784 if (fn == nullptr)26713 if (fn == nullptr)
25785 return ira->codegen->invalid_instruction;26714 return ira->codegen->invalid_inst_gen;
2578626715
25787 if (fn->type_entry->data.fn.is_generic) {26716 if (fn->type_entry->data.fn.is_generic) {
25788 ir_add_error(ira, &instruction->base,26717 ir_add_error(ira, &instruction->base.base,
25789 buf_sprintf("@Frame() of generic function"));26718 buf_sprintf("@Frame() of generic function"));
25790 return ira->codegen->invalid_instruction;26719 return ira->codegen->invalid_inst_gen;
25791 }26720 }
2579226721
25793 ZigType *ty = get_fn_frame_type(ira->codegen, fn);26722 ZigType *ty = get_fn_frame_type(ira->codegen, fn);
25794 return ir_const_type(ira, &instruction->base, ty);26723 return ir_const_type(ira, &instruction->base.base, ty);
25795}26724}
2579626725
25797static IrInstruction *ir_analyze_instruction_frame_size(IrAnalyze *ira, IrInstructionFrameSizeSrc *instruction) {26726static IrInstGen *ir_analyze_instruction_frame_size(IrAnalyze *ira, IrInstSrcFrameSize *instruction) {
25798 IrInstruction *fn = instruction->fn->child;26727 IrInstGen *fn = instruction->fn->child;
25799 if (type_is_invalid(fn->value->type))26728 if (type_is_invalid(fn->value->type))
25800 return ira->codegen->invalid_instruction;26729 return ira->codegen->invalid_inst_gen;
2580126730
25802 if (fn->value->type->id != ZigTypeIdFn) {26731 if (fn->value->type->id != ZigTypeIdFn) {
25803 ir_add_error(ira, fn,26732 ir_add_error(ira, &fn->base,
25804 buf_sprintf("expected function, found '%s'", buf_ptr(&fn->value->type->name)));26733 buf_sprintf("expected function, found '%s'", buf_ptr(&fn->value->type->name)));
25805 return ira->codegen->invalid_instruction;26734 return ira->codegen->invalid_inst_gen;
25806 }26735 }
2580726736
25808 ira->codegen->need_frame_size_prefix_data = true;26737 ira->codegen->need_frame_size_prefix_data = true;
2580926738
25810 IrInstruction *result = ir_build_frame_size_gen(&ira->new_irb, instruction->base.scope,26739 return ir_build_frame_size_gen(ira, &instruction->base.base, fn);
25811 instruction->base.source_node, fn);
25812 result->value->type = ira->codegen->builtin_types.entry_usize;
25813 return result;
25814}26740}
2581526741
25816static IrInstruction *ir_analyze_instruction_align_of(IrAnalyze *ira, IrInstructionAlignOf *instruction) {26742static IrInstGen *ir_analyze_instruction_align_of(IrAnalyze *ira, IrInstSrcAlignOf *instruction) {
25817 // Here we create a lazy value in order to avoid resolving the alignment of the type26743 // Here we create a lazy value in order to avoid resolving the alignment of the type
25818 // immediately. This avoids false positive dependency loops such as:26744 // immediately. This avoids false positive dependency loops such as:
25819 // const Node = struct {26745 // const Node = struct {
25820 // field: []align(@alignOf(Node)) Node,26746 // field: []align(@alignOf(Node)) Node,
25821 // };26747 // };
25822 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);26748 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
25823 result->value->special = ConstValSpecialLazy;26749 result->value->special = ConstValSpecialLazy;
2582426750
25825 LazyValueAlignOf *lazy_align_of = allocate<LazyValueAlignOf>(1, "LazyValueAlignOf");26751 LazyValueAlignOf *lazy_align_of = allocate<LazyValueAlignOf>(1, "LazyValueAlignOf");
...@@ -25829,41 +26755,41 @@ static IrInstruction *ir_analyze_instruction_align_of(IrAnalyze *ira, IrInstruct...@@ -25829,41 +26755,41 @@ static IrInstruction *ir_analyze_instruction_align_of(IrAnalyze *ira, IrInstruct
2582926755
25830 lazy_align_of->target_type = instruction->type_value->child;26756 lazy_align_of->target_type = instruction->type_value->child;
25831 if (ir_resolve_type_lazy(ira, lazy_align_of->target_type) == nullptr)26757 if (ir_resolve_type_lazy(ira, lazy_align_of->target_type) == nullptr)
25832 return ira->codegen->invalid_instruction;26758 return ira->codegen->invalid_inst_gen;
2583326759
25834 return result;26760 return result;
25835}26761}
2583626762
25837static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstructionOverflowOp *instruction) {26763static IrInstGen *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstSrcOverflowOp *instruction) {
25838 Error err;26764 Error err;
2583926765
25840 IrInstruction *type_value = instruction->type_value->child;26766 IrInstGen *type_value = instruction->type_value->child;
25841 if (type_is_invalid(type_value->value->type))26767 if (type_is_invalid(type_value->value->type))
25842 return ira->codegen->invalid_instruction;26768 return ira->codegen->invalid_inst_gen;
2584326769
25844 ZigType *dest_type = ir_resolve_type(ira, type_value);26770 ZigType *dest_type = ir_resolve_type(ira, type_value);
25845 if (type_is_invalid(dest_type))26771 if (type_is_invalid(dest_type))
25846 return ira->codegen->invalid_instruction;26772 return ira->codegen->invalid_inst_gen;
2584726773
25848 if (dest_type->id != ZigTypeIdInt) {26774 if (dest_type->id != ZigTypeIdInt) {
25849 ir_add_error(ira, type_value,26775 ir_add_error(ira, &type_value->base,
25850 buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));26776 buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
25851 return ira->codegen->invalid_instruction;26777 return ira->codegen->invalid_inst_gen;
25852 }26778 }
2585326779
25854 IrInstruction *op1 = instruction->op1->child;26780 IrInstGen *op1 = instruction->op1->child;
25855 if (type_is_invalid(op1->value->type))26781 if (type_is_invalid(op1->value->type))
25856 return ira->codegen->invalid_instruction;26782 return ira->codegen->invalid_inst_gen;
2585726783
25858 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, dest_type);26784 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
25859 if (type_is_invalid(casted_op1->value->type))26785 if (type_is_invalid(casted_op1->value->type))
25860 return ira->codegen->invalid_instruction;26786 return ira->codegen->invalid_inst_gen;
2586126787
25862 IrInstruction *op2 = instruction->op2->child;26788 IrInstGen *op2 = instruction->op2->child;
25863 if (type_is_invalid(op2->value->type))26789 if (type_is_invalid(op2->value->type))
25864 return ira->codegen->invalid_instruction;26790 return ira->codegen->invalid_inst_gen;
2586526791
25866 IrInstruction *casted_op2;26792 IrInstGen *casted_op2;
25867 if (instruction->op == IrOverflowOpShl) {26793 if (instruction->op == IrOverflowOpShl) {
25868 ZigType *shift_amt_type = get_smallest_unsigned_int_type(ira->codegen,26794 ZigType *shift_amt_type = get_smallest_unsigned_int_type(ira->codegen,
25869 dest_type->data.integral.bit_count - 1);26795 dest_type->data.integral.bit_count - 1);
...@@ -25872,17 +26798,17 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr...@@ -25872,17 +26798,17 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
25872 casted_op2 = ir_implicit_cast(ira, op2, dest_type);26798 casted_op2 = ir_implicit_cast(ira, op2, dest_type);
25873 }26799 }
25874 if (type_is_invalid(casted_op2->value->type))26800 if (type_is_invalid(casted_op2->value->type))
25875 return ira->codegen->invalid_instruction;26801 return ira->codegen->invalid_inst_gen;
2587626802
25877 IrInstruction *result_ptr = instruction->result_ptr->child;26803 IrInstGen *result_ptr = instruction->result_ptr->child;
25878 if (type_is_invalid(result_ptr->value->type))26804 if (type_is_invalid(result_ptr->value->type))
25879 return ira->codegen->invalid_instruction;26805 return ira->codegen->invalid_inst_gen;
2588026806
25881 ZigType *expected_ptr_type;26807 ZigType *expected_ptr_type;
25882 if (result_ptr->value->type->id == ZigTypeIdPointer) {26808 if (result_ptr->value->type->id == ZigTypeIdPointer) {
25883 uint32_t alignment;26809 uint32_t alignment;
25884 if ((err = resolve_ptr_align(ira, result_ptr->value->type, &alignment)))26810 if ((err = resolve_ptr_align(ira, result_ptr->value->type, &alignment)))
25885 return ira->codegen->invalid_instruction;26811 return ira->codegen->invalid_inst_gen;
25886 expected_ptr_type = get_pointer_to_type_extra(ira->codegen, dest_type,26812 expected_ptr_type = get_pointer_to_type_extra(ira->codegen, dest_type,
25887 false, result_ptr->value->type->data.pointer.is_volatile,26813 false, result_ptr->value->type->data.pointer.is_volatile,
25888 PtrLenSingle,26814 PtrLenSingle,
...@@ -25891,9 +26817,9 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr...@@ -25891,9 +26817,9 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
25891 expected_ptr_type = get_pointer_to_type(ira->codegen, dest_type, false);26817 expected_ptr_type = get_pointer_to_type(ira->codegen, dest_type, false);
25892 }26818 }
2589326819
25894 IrInstruction *casted_result_ptr = ir_implicit_cast(ira, result_ptr, expected_ptr_type);26820 IrInstGen *casted_result_ptr = ir_implicit_cast(ira, result_ptr, expected_ptr_type);
25895 if (type_is_invalid(casted_result_ptr->value->type))26821 if (type_is_invalid(casted_result_ptr->value->type))
25896 return ira->codegen->invalid_instruction;26822 return ira->codegen->invalid_inst_gen;
2589726823
25898 if (instr_is_comptime(casted_op1) &&26824 if (instr_is_comptime(casted_op1) &&
25899 instr_is_comptime(casted_op2) &&26825 instr_is_comptime(casted_op2) &&
...@@ -25901,22 +26827,22 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr...@@ -25901,22 +26827,22 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
25901 {26827 {
25902 ZigValue *op1_val = ir_resolve_const(ira, casted_op1, UndefBad);26828 ZigValue *op1_val = ir_resolve_const(ira, casted_op1, UndefBad);
25903 if (op1_val == nullptr)26829 if (op1_val == nullptr)
25904 return ira->codegen->invalid_instruction;26830 return ira->codegen->invalid_inst_gen;
2590526831
25906 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);26832 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
25907 if (op2_val == nullptr)26833 if (op2_val == nullptr)
25908 return ira->codegen->invalid_instruction;26834 return ira->codegen->invalid_inst_gen;
2590926835
25910 ZigValue *result_val = ir_resolve_const(ira, casted_result_ptr, UndefBad);26836 ZigValue *result_val = ir_resolve_const(ira, casted_result_ptr, UndefBad);
25911 if (result_val == nullptr)26837 if (result_val == nullptr)
25912 return ira->codegen->invalid_instruction;26838 return ira->codegen->invalid_inst_gen;
2591326839
25914 BigInt *op1_bigint = &op1_val->data.x_bigint;26840 BigInt *op1_bigint = &op1_val->data.x_bigint;
25915 BigInt *op2_bigint = &op2_val->data.x_bigint;26841 BigInt *op2_bigint = &op2_val->data.x_bigint;
25916 ZigValue *pointee_val = const_ptr_pointee(ira, ira->codegen, result_val,26842 ZigValue *pointee_val = const_ptr_pointee(ira, ira->codegen, result_val,
25917 casted_result_ptr->source_node);26843 casted_result_ptr->base.source_node);
25918 if (pointee_val == nullptr)26844 if (pointee_val == nullptr)
25919 return ira->codegen->invalid_instruction;26845 return ira->codegen->invalid_inst_gen;
25920 BigInt *dest_bigint = &pointee_val->data.x_bigint;26846 BigInt *dest_bigint = &pointee_val->data.x_bigint;
25921 switch (instruction->op) {26847 switch (instruction->op) {
25922 case IrOverflowOpAdd:26848 case IrOverflowOpAdd:
...@@ -25943,17 +26869,14 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr...@@ -25943,17 +26869,14 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
25943 dest_type->data.integral.is_signed);26869 dest_type->data.integral.is_signed);
25944 }26870 }
25945 pointee_val->special = ConstValSpecialStatic;26871 pointee_val->special = ConstValSpecialStatic;
25946 return ir_const_bool(ira, &instruction->base, result_bool);26872 return ir_const_bool(ira, &instruction->base.base, result_bool);
25947 }26873 }
2594826874
25949 IrInstruction *result = ir_build_overflow_op(&ira->new_irb,26875 return ir_build_overflow_op_gen(ira, &instruction->base.base, instruction->op,
25950 instruction->base.scope, instruction->base.source_node,26876 casted_op1, casted_op2, casted_result_ptr, dest_type);
25951 instruction->op, type_value, casted_op1, casted_op2, casted_result_ptr, dest_type);
25952 result->value->type = ira->codegen->builtin_types.entry_bool;
25953 return result;
25954}26877}
2595526878
25956static void ir_eval_mul_add(IrAnalyze *ira, IrInstructionMulAdd *source_instr, ZigType *float_type,26879static void ir_eval_mul_add(IrAnalyze *ira, IrInstSrcMulAdd *source_instr, ZigType *float_type,
25957 ZigValue *op1, ZigValue *op2, ZigValue *op3, ZigValue *out_val) {26880 ZigValue *op1, ZigValue *op2, ZigValue *op3, ZigValue *out_val) {
25958 if (float_type->id == ZigTypeIdComptimeFloat) {26881 if (float_type->id == ZigTypeIdComptimeFloat) {
25959 f128M_mulAdd(&out_val->data.x_bigfloat.value, &op1->data.x_bigfloat.value, &op2->data.x_bigfloat.value,26882 f128M_mulAdd(&out_val->data.x_bigfloat.value, &op1->data.x_bigfloat.value, &op2->data.x_bigfloat.value,
...@@ -25980,61 +26903,61 @@ static void ir_eval_mul_add(IrAnalyze *ira, IrInstructionMulAdd *source_instr, Z...@@ -25980,61 +26903,61 @@ static void ir_eval_mul_add(IrAnalyze *ira, IrInstructionMulAdd *source_instr, Z
25980 }26903 }
25981}26904}
2598226905
25983static IrInstruction *ir_analyze_instruction_mul_add(IrAnalyze *ira, IrInstructionMulAdd *instruction) {26906static IrInstGen *ir_analyze_instruction_mul_add(IrAnalyze *ira, IrInstSrcMulAdd *instruction) {
25984 IrInstruction *type_value = instruction->type_value->child;26907 IrInstGen *type_value = instruction->type_value->child;
25985 if (type_is_invalid(type_value->value->type))26908 if (type_is_invalid(type_value->value->type))
25986 return ira->codegen->invalid_instruction;26909 return ira->codegen->invalid_inst_gen;
2598726910
25988 ZigType *expr_type = ir_resolve_type(ira, type_value);26911 ZigType *expr_type = ir_resolve_type(ira, type_value);
25989 if (type_is_invalid(expr_type))26912 if (type_is_invalid(expr_type))
25990 return ira->codegen->invalid_instruction;26913 return ira->codegen->invalid_inst_gen;
2599126914
25992 // Only allow float types, and vectors of floats.26915 // Only allow float types, and vectors of floats.
25993 ZigType *float_type = (expr_type->id == ZigTypeIdVector) ? expr_type->data.vector.elem_type : expr_type;26916 ZigType *float_type = (expr_type->id == ZigTypeIdVector) ? expr_type->data.vector.elem_type : expr_type;
25994 if (float_type->id != ZigTypeIdFloat) {26917 if (float_type->id != ZigTypeIdFloat) {
25995 ir_add_error(ira, type_value,26918 ir_add_error(ira, &type_value->base,
25996 buf_sprintf("expected float or vector of float type, found '%s'", buf_ptr(&float_type->name)));26919 buf_sprintf("expected float or vector of float type, found '%s'", buf_ptr(&float_type->name)));
25997 return ira->codegen->invalid_instruction;26920 return ira->codegen->invalid_inst_gen;
25998 }26921 }
2599926922
26000 IrInstruction *op1 = instruction->op1->child;26923 IrInstGen *op1 = instruction->op1->child;
26001 if (type_is_invalid(op1->value->type))26924 if (type_is_invalid(op1->value->type))
26002 return ira->codegen->invalid_instruction;26925 return ira->codegen->invalid_inst_gen;
2600326926
26004 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, expr_type);26927 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, expr_type);
26005 if (type_is_invalid(casted_op1->value->type))26928 if (type_is_invalid(casted_op1->value->type))
26006 return ira->codegen->invalid_instruction;26929 return ira->codegen->invalid_inst_gen;
2600726930
26008 IrInstruction *op2 = instruction->op2->child;26931 IrInstGen *op2 = instruction->op2->child;
26009 if (type_is_invalid(op2->value->type))26932 if (type_is_invalid(op2->value->type))
26010 return ira->codegen->invalid_instruction;26933 return ira->codegen->invalid_inst_gen;
2601126934
26012 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, expr_type);26935 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, expr_type);
26013 if (type_is_invalid(casted_op2->value->type))26936 if (type_is_invalid(casted_op2->value->type))
26014 return ira->codegen->invalid_instruction;26937 return ira->codegen->invalid_inst_gen;
2601526938
26016 IrInstruction *op3 = instruction->op3->child;26939 IrInstGen *op3 = instruction->op3->child;
26017 if (type_is_invalid(op3->value->type))26940 if (type_is_invalid(op3->value->type))
26018 return ira->codegen->invalid_instruction;26941 return ira->codegen->invalid_inst_gen;
2601926942
26020 IrInstruction *casted_op3 = ir_implicit_cast(ira, op3, expr_type);26943 IrInstGen *casted_op3 = ir_implicit_cast(ira, op3, expr_type);
26021 if (type_is_invalid(casted_op3->value->type))26944 if (type_is_invalid(casted_op3->value->type))
26022 return ira->codegen->invalid_instruction;26945 return ira->codegen->invalid_inst_gen;
2602326946
26024 if (instr_is_comptime(casted_op1) &&26947 if (instr_is_comptime(casted_op1) &&
26025 instr_is_comptime(casted_op2) &&26948 instr_is_comptime(casted_op2) &&
26026 instr_is_comptime(casted_op3)) {26949 instr_is_comptime(casted_op3)) {
26027 ZigValue *op1_const = ir_resolve_const(ira, casted_op1, UndefBad);26950 ZigValue *op1_const = ir_resolve_const(ira, casted_op1, UndefBad);
26028 if (!op1_const)26951 if (!op1_const)
26029 return ira->codegen->invalid_instruction;26952 return ira->codegen->invalid_inst_gen;
26030 ZigValue *op2_const = ir_resolve_const(ira, casted_op2, UndefBad);26953 ZigValue *op2_const = ir_resolve_const(ira, casted_op2, UndefBad);
26031 if (!op2_const)26954 if (!op2_const)
26032 return ira->codegen->invalid_instruction;26955 return ira->codegen->invalid_inst_gen;
26033 ZigValue *op3_const = ir_resolve_const(ira, casted_op3, UndefBad);26956 ZigValue *op3_const = ir_resolve_const(ira, casted_op3, UndefBad);
26034 if (!op3_const)26957 if (!op3_const)
26035 return ira->codegen->invalid_instruction;26958 return ira->codegen->invalid_inst_gen;
2603626959
26037 IrInstruction *result = ir_const(ira, &instruction->base, expr_type);26960 IrInstGen *result = ir_const(ira, &instruction->base.base, expr_type);
26038 ZigValue *out_val = result->value;26961 ZigValue *out_val = result->value;
2603926962
26040 if (expr_type->id == ZigTypeIdVector) {26963 if (expr_type->id == ZigTypeIdVector) {
...@@ -26065,63 +26988,59 @@ static IrInstruction *ir_analyze_instruction_mul_add(IrAnalyze *ira, IrInstructi...@@ -26065,63 +26988,59 @@ static IrInstruction *ir_analyze_instruction_mul_add(IrAnalyze *ira, IrInstructi
26065 return result;26988 return result;
26066 }26989 }
2606726990
26068 IrInstruction *result = ir_build_mul_add(&ira->new_irb,26991 return ir_build_mul_add_gen(ira, &instruction->base.base, casted_op1, casted_op2, casted_op3, expr_type);
26069 instruction->base.scope, instruction->base.source_node,
26070 type_value, casted_op1, casted_op2, casted_op3);
26071 result->value->type = expr_type;
26072 return result;
26073}26992}
2607426993
26075static IrInstruction *ir_analyze_instruction_test_err(IrAnalyze *ira, IrInstructionTestErrSrc *instruction) {26994static IrInstGen *ir_analyze_instruction_test_err(IrAnalyze *ira, IrInstSrcTestErr *instruction) {
26076 IrInstruction *base_ptr = instruction->base_ptr->child;26995 IrInstGen *base_ptr = instruction->base_ptr->child;
26077 if (type_is_invalid(base_ptr->value->type))26996 if (type_is_invalid(base_ptr->value->type))
26078 return ira->codegen->invalid_instruction;26997 return ira->codegen->invalid_inst_gen;
2607926998
26080 IrInstruction *value;26999 IrInstGen *value;
26081 if (instruction->base_ptr_is_payload) {27000 if (instruction->base_ptr_is_payload) {
26082 value = base_ptr;27001 value = base_ptr;
26083 } else {27002 } else {
26084 value = ir_get_deref(ira, &instruction->base, base_ptr, nullptr);27003 value = ir_get_deref(ira, &instruction->base.base, base_ptr, nullptr);
26085 }27004 }
2608627005
26087 ZigType *type_entry = value->value->type;27006 ZigType *type_entry = value->value->type;
26088 if (type_is_invalid(type_entry))27007 if (type_is_invalid(type_entry))
26089 return ira->codegen->invalid_instruction;27008 return ira->codegen->invalid_inst_gen;
26090 if (type_entry->id == ZigTypeIdErrorUnion) {27009 if (type_entry->id == ZigTypeIdErrorUnion) {
26091 if (instr_is_comptime(value)) {27010 if (instr_is_comptime(value)) {
26092 ZigValue *err_union_val = ir_resolve_const(ira, value, UndefBad);27011 ZigValue *err_union_val = ir_resolve_const(ira, value, UndefBad);
26093 if (!err_union_val)27012 if (!err_union_val)
26094 return ira->codegen->invalid_instruction;27013 return ira->codegen->invalid_inst_gen;
2609527014
26096 if (err_union_val->special != ConstValSpecialRuntime) {27015 if (err_union_val->special != ConstValSpecialRuntime) {
26097 ErrorTableEntry *err = err_union_val->data.x_err_union.error_set->data.x_err_set;27016 ErrorTableEntry *err = err_union_val->data.x_err_union.error_set->data.x_err_set;
26098 return ir_const_bool(ira, &instruction->base, (err != nullptr));27017 return ir_const_bool(ira, &instruction->base.base, (err != nullptr));
26099 }27018 }
26100 }27019 }
2610127020
26102 if (instruction->resolve_err_set) {27021 if (instruction->resolve_err_set) {
26103 ZigType *err_set_type = type_entry->data.error_union.err_set_type;27022 ZigType *err_set_type = type_entry->data.error_union.err_set_type;
26104 if (!resolve_inferred_error_set(ira->codegen, err_set_type, instruction->base.source_node)) {27023 if (!resolve_inferred_error_set(ira->codegen, err_set_type, instruction->base.base.source_node)) {
26105 return ira->codegen->invalid_instruction;27024 return ira->codegen->invalid_inst_gen;
26106 }27025 }
26107 if (!type_is_global_error_set(err_set_type) &&27026 if (!type_is_global_error_set(err_set_type) &&
26108 err_set_type->data.error_set.err_count == 0)27027 err_set_type->data.error_set.err_count == 0)
26109 {27028 {
26110 assert(!err_set_type->data.error_set.incomplete);27029 assert(!err_set_type->data.error_set.incomplete);
26111 return ir_const_bool(ira, &instruction->base, false);27030 return ir_const_bool(ira, &instruction->base.base, false);
26112 }27031 }
26113 }27032 }
2611427033
26115 return ir_build_test_err_gen(ira, &instruction->base, value);27034 return ir_build_test_err_gen(ira, &instruction->base.base, value);
26116 } else if (type_entry->id == ZigTypeIdErrorSet) {27035 } else if (type_entry->id == ZigTypeIdErrorSet) {
26117 return ir_const_bool(ira, &instruction->base, true);27036 return ir_const_bool(ira, &instruction->base.base, true);
26118 } else {27037 } else {
26119 return ir_const_bool(ira, &instruction->base, false);27038 return ir_const_bool(ira, &instruction->base.base, false);
26120 }27039 }
26121}27040}
2612227041
26123static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *source_instr,27042static IrInstGen *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInst* source_instr,
26124 IrInstruction *base_ptr, bool initializing)27043 IrInstGen *base_ptr, bool initializing)
26125{27044{
26126 ZigType *ptr_type = base_ptr->value->type;27045 ZigType *ptr_type = base_ptr->value->type;
2612727046
...@@ -26130,12 +27049,12 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *...@@ -26130,12 +27049,12 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
2613027049
26131 ZigType *type_entry = ptr_type->data.pointer.child_type;27050 ZigType *type_entry = ptr_type->data.pointer.child_type;
26132 if (type_is_invalid(type_entry))27051 if (type_is_invalid(type_entry))
26133 return ira->codegen->invalid_instruction;27052 return ira->codegen->invalid_inst_gen;
2613427053
26135 if (type_entry->id != ZigTypeIdErrorUnion) {27054 if (type_entry->id != ZigTypeIdErrorUnion) {
26136 ir_add_error(ira, base_ptr,27055 ir_add_error(ira, &base_ptr->base,
26137 buf_sprintf("expected error union type, found '%s'", buf_ptr(&type_entry->name)));27056 buf_sprintf("expected error union type, found '%s'", buf_ptr(&type_entry->name)));
26138 return ira->codegen->invalid_instruction;27057 return ira->codegen->invalid_inst_gen;
26139 }27058 }
2614027059
26141 ZigType *err_set_type = type_entry->data.error_union.err_set_type;27060 ZigType *err_set_type = type_entry->data.error_union.err_set_type;
...@@ -26146,13 +27065,13 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *...@@ -26146,13 +27065,13 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
26146 if (instr_is_comptime(base_ptr)) {27065 if (instr_is_comptime(base_ptr)) {
26147 ZigValue *ptr_val = ir_resolve_const(ira, base_ptr, UndefBad);27066 ZigValue *ptr_val = ir_resolve_const(ira, base_ptr, UndefBad);
26148 if (!ptr_val)27067 if (!ptr_val)
26149 return ira->codegen->invalid_instruction;27068 return ira->codegen->invalid_inst_gen;
26150 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar &&27069 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar &&
26151 ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr)27070 ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr)
26152 {27071 {
26153 ZigValue *err_union_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);27072 ZigValue *err_union_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
26154 if (err_union_val == nullptr)27073 if (err_union_val == nullptr)
26155 return ira->codegen->invalid_instruction;27074 return ira->codegen->invalid_inst_gen;
2615627075
26157 if (initializing && err_union_val->special == ConstValSpecialUndef) {27076 if (initializing && err_union_val->special == ConstValSpecialUndef) {
26158 ZigValue *vals = create_const_vals(2);27077 ZigValue *vals = create_const_vals(2);
...@@ -26175,11 +27094,10 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *...@@ -26175,11 +27094,10 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
26175 }27094 }
26176 ir_assert(err_union_val->special != ConstValSpecialRuntime, source_instr);27095 ir_assert(err_union_val->special != ConstValSpecialRuntime, source_instr);
2617727096
26178 IrInstruction *result;27097 IrInstGen *result;
26179 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {27098 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
26180 result = ir_build_unwrap_err_code(&ira->new_irb, source_instr->scope,27099 result = ir_build_unwrap_err_code_gen(ira, source_instr->scope,
26181 source_instr->source_node, base_ptr);27100 source_instr->source_node, base_ptr, result_type);
26182 result->value->type = result_type;
26183 result->value->special = ConstValSpecialStatic;27101 result->value->special = ConstValSpecialStatic;
26184 } else {27102 } else {
26185 result = ir_const(ira, source_instr, result_type);27103 result = ir_const(ira, source_instr, result_type);
...@@ -26192,23 +27110,18 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *...@@ -26192,23 +27110,18 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
26192 }27110 }
26193 }27111 }
2619427112
26195 IrInstruction *result = ir_build_unwrap_err_code(&ira->new_irb,27113 return ir_build_unwrap_err_code_gen(ira, source_instr->scope, source_instr->source_node, base_ptr, result_type);
26196 source_instr->scope, source_instr->source_node, base_ptr);
26197 result->value->type = result_type;
26198 return result;
26199}27114}
2620027115
26201static IrInstruction *ir_analyze_instruction_unwrap_err_code(IrAnalyze *ira,27116static IrInstGen *ir_analyze_instruction_unwrap_err_code(IrAnalyze *ira, IrInstSrcUnwrapErrCode *instruction) {
26202 IrInstructionUnwrapErrCode *instruction)27117 IrInstGen *base_ptr = instruction->err_union_ptr->child;
26203{
26204 IrInstruction *base_ptr = instruction->err_union_ptr->child;
26205 if (type_is_invalid(base_ptr->value->type))27118 if (type_is_invalid(base_ptr->value->type))
26206 return ira->codegen->invalid_instruction;27119 return ira->codegen->invalid_inst_gen;
26207 return ir_analyze_unwrap_err_code(ira, &instruction->base, base_ptr, false);27120 return ir_analyze_unwrap_err_code(ira, &instruction->base.base, base_ptr, false);
26208}27121}
2620927122
26210static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruction *source_instr,27123static IrInstGen *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInst* source_instr,
26211 IrInstruction *base_ptr, bool safety_check_on, bool initializing)27124 IrInstGen *base_ptr, bool safety_check_on, bool initializing)
26212{27125{
26213 ZigType *ptr_type = base_ptr->value->type;27126 ZigType *ptr_type = base_ptr->value->type;
2621427127
...@@ -26217,17 +27130,17 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct...@@ -26217,17 +27130,17 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
2621727130
26218 ZigType *type_entry = ptr_type->data.pointer.child_type;27131 ZigType *type_entry = ptr_type->data.pointer.child_type;
26219 if (type_is_invalid(type_entry))27132 if (type_is_invalid(type_entry))
26220 return ira->codegen->invalid_instruction;27133 return ira->codegen->invalid_inst_gen;
2622127134
26222 if (type_entry->id != ZigTypeIdErrorUnion) {27135 if (type_entry->id != ZigTypeIdErrorUnion) {
26223 ir_add_error(ira, base_ptr,27136 ir_add_error(ira, &base_ptr->base,
26224 buf_sprintf("expected error union type, found '%s'", buf_ptr(&type_entry->name)));27137 buf_sprintf("expected error union type, found '%s'", buf_ptr(&type_entry->name)));
26225 return ira->codegen->invalid_instruction;27138 return ira->codegen->invalid_inst_gen;
26226 }27139 }
2622727140
26228 ZigType *payload_type = type_entry->data.error_union.payload_type;27141 ZigType *payload_type = type_entry->data.error_union.payload_type;
26229 if (type_is_invalid(payload_type))27142 if (type_is_invalid(payload_type))
26230 return ira->codegen->invalid_instruction;27143 return ira->codegen->invalid_inst_gen;
2623127144
26232 ZigType *result_type = get_pointer_to_type_extra(ira->codegen, payload_type,27145 ZigType *result_type = get_pointer_to_type_extra(ira->codegen, payload_type,
26233 ptr_type->data.pointer.is_const, ptr_type->data.pointer.is_volatile,27146 ptr_type->data.pointer.is_const, ptr_type->data.pointer.is_volatile,
...@@ -26236,11 +27149,11 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct...@@ -26236,11 +27149,11 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
26236 if (instr_is_comptime(base_ptr)) {27149 if (instr_is_comptime(base_ptr)) {
26237 ZigValue *ptr_val = ir_resolve_const(ira, base_ptr, UndefBad);27150 ZigValue *ptr_val = ir_resolve_const(ira, base_ptr, UndefBad);
26238 if (!ptr_val)27151 if (!ptr_val)
26239 return ira->codegen->invalid_instruction;27152 return ira->codegen->invalid_inst_gen;
26240 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {27153 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
26241 ZigValue *err_union_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);27154 ZigValue *err_union_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
26242 if (err_union_val == nullptr)27155 if (err_union_val == nullptr)
26243 return ira->codegen->invalid_instruction;27156 return ira->codegen->invalid_inst_gen;
26244 if (initializing && err_union_val->special == ConstValSpecialUndef) {27157 if (initializing && err_union_val->special == ConstValSpecialUndef) {
26245 ZigValue *vals = create_const_vals(2);27158 ZigValue *vals = create_const_vals(2);
26246 ZigValue *err_set_val = &vals[0];27159 ZigValue *err_set_val = &vals[0];
...@@ -26263,14 +27176,13 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct...@@ -26263,14 +27176,13 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
26263 if (err != nullptr) {27176 if (err != nullptr) {
26264 ir_add_error(ira, source_instr,27177 ir_add_error(ira, source_instr,
26265 buf_sprintf("caught unexpected error '%s'", buf_ptr(&err->name)));27178 buf_sprintf("caught unexpected error '%s'", buf_ptr(&err->name)));
26266 return ira->codegen->invalid_instruction;27179 return ira->codegen->invalid_inst_gen;
26267 }27180 }
2626827181
26269 IrInstruction *result;27182 IrInstGen *result;
26270 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {27183 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
26271 result = ir_build_unwrap_err_payload(&ira->new_irb, source_instr->scope,27184 result = ir_build_unwrap_err_payload_gen(ira, source_instr->scope,
26272 source_instr->source_node, base_ptr, safety_check_on, initializing);27185 source_instr->source_node, base_ptr, safety_check_on, initializing, result_type);
26273 result->value->type = result_type;
26274 result->value->special = ConstValSpecialStatic;27186 result->value->special = ConstValSpecialStatic;
26275 } else {27187 } else {
26276 result = ir_const(ira, source_instr, result_type);27188 result = ir_const(ira, source_instr, result_type);
...@@ -26283,28 +27195,26 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct...@@ -26283,28 +27195,26 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
26283 }27195 }
26284 }27196 }
2628527197
26286 IrInstruction *result = ir_build_unwrap_err_payload(&ira->new_irb, source_instr->scope,27198 return ir_build_unwrap_err_payload_gen(ira, source_instr->scope, source_instr->source_node,
26287 source_instr->source_node, base_ptr, safety_check_on, initializing);27199 base_ptr, safety_check_on, initializing, result_type);
26288 result->value->type = result_type;
26289 return result;
26290}27200}
2629127201
26292static IrInstruction *ir_analyze_instruction_unwrap_err_payload(IrAnalyze *ira,27202static IrInstGen *ir_analyze_instruction_unwrap_err_payload(IrAnalyze *ira,
26293 IrInstructionUnwrapErrPayload *instruction)27203 IrInstSrcUnwrapErrPayload *instruction)
26294{27204{
26295 assert(instruction->value->child);27205 assert(instruction->value->child);
26296 IrInstruction *value = instruction->value->child;27206 IrInstGen *value = instruction->value->child;
26297 if (type_is_invalid(value->value->type))27207 if (type_is_invalid(value->value->type))
26298 return ira->codegen->invalid_instruction;27208 return ira->codegen->invalid_inst_gen;
2629927209
26300 return ir_analyze_unwrap_error_payload(ira, &instruction->base, value, instruction->safety_check_on, false);27210 return ir_analyze_unwrap_error_payload(ira, &instruction->base.base, value, instruction->safety_check_on, false);
26301}27211}
2630227212
26303static IrInstruction *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstructionFnProto *instruction) {27213static IrInstGen *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstSrcFnProto *instruction) {
26304 AstNode *proto_node = instruction->base.source_node;27214 AstNode *proto_node = instruction->base.base.source_node;
26305 assert(proto_node->type == NodeTypeFnProto);27215 assert(proto_node->type == NodeTypeFnProto);
2630627216
26307 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);27217 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
26308 result->value->special = ConstValSpecialLazy;27218 result->value->special = ConstValSpecialLazy;
2630927219
26310 LazyValueFnType *lazy_fn_type = allocate<LazyValueFnType>(1, "LazyValueFnType");27220 LazyValueFnType *lazy_fn_type = allocate<LazyValueFnType>(1, "LazyValueFnType");
...@@ -26313,29 +27223,29 @@ static IrInstruction *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstruct...@@ -26313,29 +27223,29 @@ static IrInstruction *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstruct
26313 lazy_fn_type->base.id = LazyValueIdFnType;27223 lazy_fn_type->base.id = LazyValueIdFnType;
2631427224
26315 if (proto_node->data.fn_proto.auto_err_set) {27225 if (proto_node->data.fn_proto.auto_err_set) {
26316 ir_add_error(ira, &instruction->base,27226 ir_add_error(ira, &instruction->base.base,
26317 buf_sprintf("inferring error set of return type valid only for function definitions"));27227 buf_sprintf("inferring error set of return type valid only for function definitions"));
26318 return ira->codegen->invalid_instruction;27228 return ira->codegen->invalid_inst_gen;
26319 }27229 }
2632027230
26321 lazy_fn_type->cc = cc_from_fn_proto(&proto_node->data.fn_proto);27231 lazy_fn_type->cc = cc_from_fn_proto(&proto_node->data.fn_proto);
26322 if (instruction->callconv_value != nullptr) {27232 if (instruction->callconv_value != nullptr) {
26323 ZigType *cc_enum_type = get_builtin_type(ira->codegen, "CallingConvention");27233 ZigType *cc_enum_type = get_builtin_type(ira->codegen, "CallingConvention");
2632427234
26325 IrInstruction *casted_value = ir_implicit_cast(ira, instruction->callconv_value, cc_enum_type);27235 IrInstGen *casted_value = ir_implicit_cast(ira, instruction->callconv_value->child, cc_enum_type);
26326 if (type_is_invalid(casted_value->value->type))27236 if (type_is_invalid(casted_value->value->type))
26327 return ira->codegen->invalid_instruction;27237 return ira->codegen->invalid_inst_gen;
2632827238
26329 ZigValue *const_value = ir_resolve_const(ira, casted_value, UndefBad);27239 ZigValue *const_value = ir_resolve_const(ira, casted_value, UndefBad);
26330 if (const_value == nullptr)27240 if (const_value == nullptr)
26331 return ira->codegen->invalid_instruction;27241 return ira->codegen->invalid_inst_gen;
2633227242
26333 lazy_fn_type->cc = (CallingConvention)bigint_as_u32(&const_value->data.x_enum_tag);27243 lazy_fn_type->cc = (CallingConvention)bigint_as_u32(&const_value->data.x_enum_tag);
26334 }27244 }
2633527245
26336 size_t param_count = proto_node->data.fn_proto.params.length;27246 size_t param_count = proto_node->data.fn_proto.params.length;
26337 lazy_fn_type->proto_node = proto_node;27247 lazy_fn_type->proto_node = proto_node;
26338 lazy_fn_type->param_types = allocate<IrInstruction *>(param_count);27248 lazy_fn_type->param_types = allocate<IrInstGen *>(param_count);
2633927249
26340 for (size_t param_index = 0; param_index < param_count; param_index += 1) {27250 for (size_t param_index = 0; param_index < param_count; param_index += 1) {
26341 AstNode *param_node = proto_node->data.fn_proto.params.at(param_index);27251 AstNode *param_node = proto_node->data.fn_proto.params.at(param_index);
...@@ -26360,63 +27270,63 @@ static IrInstruction *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstruct...@@ -26360,63 +27270,63 @@ static IrInstruction *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstruct
26360 return result;27270 return result;
26361 }27271 }
2636227272
26363 IrInstruction *param_type_value = instruction->param_types[param_index]->child;27273 IrInstGen *param_type_value = instruction->param_types[param_index]->child;
26364 if (type_is_invalid(param_type_value->value->type))27274 if (type_is_invalid(param_type_value->value->type))
26365 return ira->codegen->invalid_instruction;27275 return ira->codegen->invalid_inst_gen;
26366 if (ir_resolve_const(ira, param_type_value, LazyOk) == nullptr)27276 if (ir_resolve_const(ira, param_type_value, LazyOk) == nullptr)
26367 return ira->codegen->invalid_instruction;27277 return ira->codegen->invalid_inst_gen;
26368 lazy_fn_type->param_types[param_index] = param_type_value;27278 lazy_fn_type->param_types[param_index] = param_type_value;
26369 }27279 }
2637027280
26371 if (instruction->align_value != nullptr) {27281 if (instruction->align_value != nullptr) {
26372 lazy_fn_type->align_inst = instruction->align_value->child;27282 lazy_fn_type->align_inst = instruction->align_value->child;
26373 if (ir_resolve_const(ira, lazy_fn_type->align_inst, LazyOk) == nullptr)27283 if (ir_resolve_const(ira, lazy_fn_type->align_inst, LazyOk) == nullptr)
26374 return ira->codegen->invalid_instruction;27284 return ira->codegen->invalid_inst_gen;
26375 }27285 }
2637627286
26377 lazy_fn_type->return_type = instruction->return_type->child;27287 lazy_fn_type->return_type = instruction->return_type->child;
26378 if (ir_resolve_const(ira, lazy_fn_type->return_type, LazyOk) == nullptr)27288 if (ir_resolve_const(ira, lazy_fn_type->return_type, LazyOk) == nullptr)
26379 return ira->codegen->invalid_instruction;27289 return ira->codegen->invalid_inst_gen;
2638027290
26381 return result;27291 return result;
26382}27292}
2638327293
26384static IrInstruction *ir_analyze_instruction_test_comptime(IrAnalyze *ira, IrInstructionTestComptime *instruction) {27294static IrInstGen *ir_analyze_instruction_test_comptime(IrAnalyze *ira, IrInstSrcTestComptime *instruction) {
26385 IrInstruction *value = instruction->value->child;27295 IrInstGen *value = instruction->value->child;
26386 if (type_is_invalid(value->value->type))27296 if (type_is_invalid(value->value->type))
26387 return ira->codegen->invalid_instruction;27297 return ira->codegen->invalid_inst_gen;
2638827298
26389 return ir_const_bool(ira, &instruction->base, instr_is_comptime(value));27299 return ir_const_bool(ira, &instruction->base.base, instr_is_comptime(value));
26390}27300}
2639127301
26392static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,27302static IrInstGen *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
26393 IrInstructionCheckSwitchProngs *instruction)27303 IrInstSrcCheckSwitchProngs *instruction)
26394{27304{
26395 IrInstruction *target_value = instruction->target_value->child;27305 IrInstGen *target_value = instruction->target_value->child;
26396 ZigType *switch_type = target_value->value->type;27306 ZigType *switch_type = target_value->value->type;
26397 if (type_is_invalid(switch_type))27307 if (type_is_invalid(switch_type))
26398 return ira->codegen->invalid_instruction;27308 return ira->codegen->invalid_inst_gen;
2639927309
26400 if (switch_type->id == ZigTypeIdEnum) {27310 if (switch_type->id == ZigTypeIdEnum) {
26401 HashMap<BigInt, AstNode *, bigint_hash, bigint_eql> field_prev_uses = {};27311 HashMap<BigInt, AstNode *, bigint_hash, bigint_eql> field_prev_uses = {};
26402 field_prev_uses.init(switch_type->data.enumeration.src_field_count);27312 field_prev_uses.init(switch_type->data.enumeration.src_field_count);
2640327313
26404 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {27314 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
26405 IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];27315 IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
2640627316
26407 IrInstruction *start_value_uncasted = range->start->child;27317 IrInstGen *start_value_uncasted = range->start->child;
26408 if (type_is_invalid(start_value_uncasted->value->type))27318 if (type_is_invalid(start_value_uncasted->value->type))
26409 return ira->codegen->invalid_instruction;27319 return ira->codegen->invalid_inst_gen;
26410 IrInstruction *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);27320 IrInstGen *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);
26411 if (type_is_invalid(start_value->value->type))27321 if (type_is_invalid(start_value->value->type))
26412 return ira->codegen->invalid_instruction;27322 return ira->codegen->invalid_inst_gen;
2641327323
26414 IrInstruction *end_value_uncasted = range->end->child;27324 IrInstGen *end_value_uncasted = range->end->child;
26415 if (type_is_invalid(end_value_uncasted->value->type))27325 if (type_is_invalid(end_value_uncasted->value->type))
26416 return ira->codegen->invalid_instruction;27326 return ira->codegen->invalid_inst_gen;
26417 IrInstruction *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);27327 IrInstGen *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);
26418 if (type_is_invalid(end_value->value->type))27328 if (type_is_invalid(end_value->value->type))
26419 return ira->codegen->invalid_instruction;27329 return ira->codegen->invalid_inst_gen;
2642027330
26421 assert(start_value->value->type->id == ZigTypeIdEnum);27331 assert(start_value->value->type->id == ZigTypeIdEnum);
26422 BigInt start_index;27332 BigInt start_index;
...@@ -26427,7 +27337,7 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,...@@ -26427,7 +27337,7 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
26427 bigint_init_bigint(&end_index, &end_value->value->data.x_enum_tag);27337 bigint_init_bigint(&end_index, &end_value->value->data.x_enum_tag);
2642827338
26429 if (bigint_cmp(&start_index, &end_index) == CmpGT) {27339 if (bigint_cmp(&start_index, &end_index) == CmpGT) {
26430 ir_add_error(ira, start_value,27340 ir_add_error(ira, &start_value->base,
26431 buf_sprintf("range start value is greater than the end value"));27341 buf_sprintf("range start value is greater than the end value"));
26432 }27342 }
2643327343
...@@ -26438,12 +27348,12 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,...@@ -26438,12 +27348,12 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
26438 if (cmp == CmpGT) {27348 if (cmp == CmpGT) {
26439 break;27349 break;
26440 }27350 }
26441 auto entry = field_prev_uses.put_unique(field_index, start_value->source_node);27351 auto entry = field_prev_uses.put_unique(field_index, start_value->base.source_node);
26442 if (entry) {27352 if (entry) {
26443 AstNode *prev_node = entry->value;27353 AstNode *prev_node = entry->value;
26444 TypeEnumField *enum_field = find_enum_field_by_tag(switch_type, &field_index);27354 TypeEnumField *enum_field = find_enum_field_by_tag(switch_type, &field_index);
26445 assert(enum_field != nullptr);27355 assert(enum_field != nullptr);
26446 ErrorMsg *msg = ir_add_error(ira, start_value,27356 ErrorMsg *msg = ir_add_error(ira, &start_value->base,
26447 buf_sprintf("duplicate switch value: '%s.%s'", buf_ptr(&switch_type->name),27357 buf_sprintf("duplicate switch value: '%s.%s'", buf_ptr(&switch_type->name),
26448 buf_ptr(enum_field->name)));27358 buf_ptr(enum_field->name)));
26449 add_error_note(ira->codegen, msg, prev_node, buf_sprintf("other value is here"));27359 add_error_note(ira->codegen, msg, prev_node, buf_sprintf("other value is here"));
...@@ -26451,79 +27361,96 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,...@@ -26451,79 +27361,96 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
26451 bigint_incr(&field_index);27361 bigint_incr(&field_index);
26452 }27362 }
26453 }27363 }
26454 if (!instruction->have_else_prong) {27364 if (instruction->have_underscore_prong) {
26455 if (switch_type->data.enumeration.layout == ContainerLayoutExtern) {27365 if (!switch_type->data.enumeration.non_exhaustive){
26456 ir_add_error(ira, &instruction->base,27366 ir_add_error(ira, &instruction->base.base,
26457 buf_sprintf("switch on an extern enum must have an else prong"));27367 buf_sprintf("switch on non-exhaustive enum has `_` prong"));
27368 }
27369 for (uint32_t i = 0; i < switch_type->data.enumeration.src_field_count; i += 1) {
27370 TypeEnumField *enum_field = &switch_type->data.enumeration.fields[i];
27371 if (buf_eql_str(enum_field->name, "_"))
27372 continue;
27373
27374 auto entry = field_prev_uses.maybe_get(enum_field->value);
27375 if (!entry) {
27376 ir_add_error(ira, &instruction->base.base,
27377 buf_sprintf("enumeration value '%s.%s' not handled in switch", buf_ptr(&switch_type->name),
27378 buf_ptr(enum_field->name)));
27379 }
27380 }
27381 } else if (!instruction->have_else_prong) {
27382 if (switch_type->data.enumeration.non_exhaustive) {
27383 ir_add_error(ira, &instruction->base.base,
27384 buf_sprintf("switch on non-exhaustive enum must include `else` or `_` prong"));
26458 }27385 }
26459 for (uint32_t i = 0; i < switch_type->data.enumeration.src_field_count; i += 1) {27386 for (uint32_t i = 0; i < switch_type->data.enumeration.src_field_count; i += 1) {
26460 TypeEnumField *enum_field = &switch_type->data.enumeration.fields[i];27387 TypeEnumField *enum_field = &switch_type->data.enumeration.fields[i];
2646127388
26462 auto entry = field_prev_uses.maybe_get(enum_field->value);27389 auto entry = field_prev_uses.maybe_get(enum_field->value);
26463 if (!entry) {27390 if (!entry) {
26464 ir_add_error(ira, &instruction->base,27391 ir_add_error(ira, &instruction->base.base,
26465 buf_sprintf("enumeration value '%s.%s' not handled in switch", buf_ptr(&switch_type->name),27392 buf_sprintf("enumeration value '%s.%s' not handled in switch", buf_ptr(&switch_type->name),
26466 buf_ptr(enum_field->name)));27393 buf_ptr(enum_field->name)));
26467 }27394 }
26468 }27395 }
26469 }27396 }
26470 } else if (switch_type->id == ZigTypeIdErrorSet) {27397 } else if (switch_type->id == ZigTypeIdErrorSet) {
26471 if (!resolve_inferred_error_set(ira->codegen, switch_type, target_value->source_node)) {27398 if (!resolve_inferred_error_set(ira->codegen, switch_type, target_value->base.source_node)) {
26472 return ira->codegen->invalid_instruction;27399 return ira->codegen->invalid_inst_gen;
26473 }27400 }
2647427401
26475 size_t field_prev_uses_count = ira->codegen->errors_by_index.length;27402 size_t field_prev_uses_count = ira->codegen->errors_by_index.length;
26476 AstNode **field_prev_uses = allocate<AstNode *>(field_prev_uses_count, "AstNode *");27403 AstNode **field_prev_uses = allocate<AstNode *>(field_prev_uses_count, "AstNode *");
2647727404
26478 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {27405 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
26479 IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];27406 IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
2648027407
26481 IrInstruction *start_value_uncasted = range->start->child;27408 IrInstGen *start_value_uncasted = range->start->child;
26482 if (type_is_invalid(start_value_uncasted->value->type))27409 if (type_is_invalid(start_value_uncasted->value->type))
26483 return ira->codegen->invalid_instruction;27410 return ira->codegen->invalid_inst_gen;
26484 IrInstruction *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);27411 IrInstGen *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);
26485 if (type_is_invalid(start_value->value->type))27412 if (type_is_invalid(start_value->value->type))
26486 return ira->codegen->invalid_instruction;27413 return ira->codegen->invalid_inst_gen;
2648727414
26488 IrInstruction *end_value_uncasted = range->end->child;27415 IrInstGen *end_value_uncasted = range->end->child;
26489 if (type_is_invalid(end_value_uncasted->value->type))27416 if (type_is_invalid(end_value_uncasted->value->type))
26490 return ira->codegen->invalid_instruction;27417 return ira->codegen->invalid_inst_gen;
26491 IrInstruction *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);27418 IrInstGen *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);
26492 if (type_is_invalid(end_value->value->type))27419 if (type_is_invalid(end_value->value->type))
26493 return ira->codegen->invalid_instruction;27420 return ira->codegen->invalid_inst_gen;
2649427421
26495 ir_assert(start_value->value->type->id == ZigTypeIdErrorSet, &instruction->base);27422 ir_assert(start_value->value->type->id == ZigTypeIdErrorSet, &instruction->base.base);
26496 uint32_t start_index = start_value->value->data.x_err_set->value;27423 uint32_t start_index = start_value->value->data.x_err_set->value;
2649727424
26498 ir_assert(end_value->value->type->id == ZigTypeIdErrorSet, &instruction->base);27425 ir_assert(end_value->value->type->id == ZigTypeIdErrorSet, &instruction->base.base);
26499 uint32_t end_index = end_value->value->data.x_err_set->value;27426 uint32_t end_index = end_value->value->data.x_err_set->value;
2650027427
26501 if (start_index != end_index) {27428 if (start_index != end_index) {
26502 ir_add_error(ira, end_value, buf_sprintf("ranges not allowed when switching on errors"));27429 ir_add_error(ira, &end_value->base, buf_sprintf("ranges not allowed when switching on errors"));
26503 return ira->codegen->invalid_instruction;27430 return ira->codegen->invalid_inst_gen;
26504 }27431 }
2650527432
26506 AstNode *prev_node = field_prev_uses[start_index];27433 AstNode *prev_node = field_prev_uses[start_index];
26507 if (prev_node != nullptr) {27434 if (prev_node != nullptr) {
26508 Buf *err_name = &ira->codegen->errors_by_index.at(start_index)->name;27435 Buf *err_name = &ira->codegen->errors_by_index.at(start_index)->name;
26509 ErrorMsg *msg = ir_add_error(ira, start_value,27436 ErrorMsg *msg = ir_add_error(ira, &start_value->base,
26510 buf_sprintf("duplicate switch value: '%s.%s'", buf_ptr(&switch_type->name), buf_ptr(err_name)));27437 buf_sprintf("duplicate switch value: '%s.%s'", buf_ptr(&switch_type->name), buf_ptr(err_name)));
26511 add_error_note(ira->codegen, msg, prev_node, buf_sprintf("other value is here"));27438 add_error_note(ira->codegen, msg, prev_node, buf_sprintf("other value is here"));
26512 }27439 }
26513 field_prev_uses[start_index] = start_value->source_node;27440 field_prev_uses[start_index] = start_value->base.source_node;
26514 }27441 }
26515 if (!instruction->have_else_prong) {27442 if (!instruction->have_else_prong) {
26516 if (type_is_global_error_set(switch_type)) {27443 if (type_is_global_error_set(switch_type)) {
26517 ir_add_error(ira, &instruction->base,27444 ir_add_error(ira, &instruction->base.base,
26518 buf_sprintf("else prong required when switching on type 'anyerror'"));27445 buf_sprintf("else prong required when switching on type 'anyerror'"));
26519 return ira->codegen->invalid_instruction;27446 return ira->codegen->invalid_inst_gen;
26520 } else {27447 } else {
26521 for (uint32_t i = 0; i < switch_type->data.error_set.err_count; i += 1) {27448 for (uint32_t i = 0; i < switch_type->data.error_set.err_count; i += 1) {
26522 ErrorTableEntry *err_entry = switch_type->data.error_set.errors[i];27449 ErrorTableEntry *err_entry = switch_type->data.error_set.errors[i];
2652327450
26524 AstNode *prev_node = field_prev_uses[err_entry->value];27451 AstNode *prev_node = field_prev_uses[err_entry->value];
26525 if (prev_node == nullptr) {27452 if (prev_node == nullptr) {
26526 ir_add_error(ira, &instruction->base,27453 ir_add_error(ira, &instruction->base.base,
26527 buf_sprintf("error.%s not handled in switch", buf_ptr(&err_entry->name)));27454 buf_sprintf("error.%s not handled in switch", buf_ptr(&err_entry->name)));
26528 }27455 }
26529 }27456 }
...@@ -26534,44 +27461,44 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,...@@ -26534,44 +27461,44 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
26534 } else if (switch_type->id == ZigTypeIdInt) {27461 } else if (switch_type->id == ZigTypeIdInt) {
26535 RangeSet rs = {0};27462 RangeSet rs = {0};
26536 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {27463 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
26537 IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];27464 IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
2653827465
26539 IrInstruction *start_value = range->start->child;27466 IrInstGen *start_value = range->start->child;
26540 if (type_is_invalid(start_value->value->type))27467 if (type_is_invalid(start_value->value->type))
26541 return ira->codegen->invalid_instruction;27468 return ira->codegen->invalid_inst_gen;
26542 IrInstruction *casted_start_value = ir_implicit_cast(ira, start_value, switch_type);27469 IrInstGen *casted_start_value = ir_implicit_cast(ira, start_value, switch_type);
26543 if (type_is_invalid(casted_start_value->value->type))27470 if (type_is_invalid(casted_start_value->value->type))
26544 return ira->codegen->invalid_instruction;27471 return ira->codegen->invalid_inst_gen;
2654527472
26546 IrInstruction *end_value = range->end->child;27473 IrInstGen *end_value = range->end->child;
26547 if (type_is_invalid(end_value->value->type))27474 if (type_is_invalid(end_value->value->type))
26548 return ira->codegen->invalid_instruction;27475 return ira->codegen->invalid_inst_gen;
26549 IrInstruction *casted_end_value = ir_implicit_cast(ira, end_value, switch_type);27476 IrInstGen *casted_end_value = ir_implicit_cast(ira, end_value, switch_type);
26550 if (type_is_invalid(casted_end_value->value->type))27477 if (type_is_invalid(casted_end_value->value->type))
26551 return ira->codegen->invalid_instruction;27478 return ira->codegen->invalid_inst_gen;
2655227479
26553 ZigValue *start_val = ir_resolve_const(ira, casted_start_value, UndefBad);27480 ZigValue *start_val = ir_resolve_const(ira, casted_start_value, UndefBad);
26554 if (!start_val)27481 if (!start_val)
26555 return ira->codegen->invalid_instruction;27482 return ira->codegen->invalid_inst_gen;
2655627483
26557 ZigValue *end_val = ir_resolve_const(ira, casted_end_value, UndefBad);27484 ZigValue *end_val = ir_resolve_const(ira, casted_end_value, UndefBad);
26558 if (!end_val)27485 if (!end_val)
26559 return ira->codegen->invalid_instruction;27486 return ira->codegen->invalid_inst_gen;
2656027487
26561 assert(start_val->type->id == ZigTypeIdInt || start_val->type->id == ZigTypeIdComptimeInt);27488 assert(start_val->type->id == ZigTypeIdInt || start_val->type->id == ZigTypeIdComptimeInt);
26562 assert(end_val->type->id == ZigTypeIdInt || end_val->type->id == ZigTypeIdComptimeInt);27489 assert(end_val->type->id == ZigTypeIdInt || end_val->type->id == ZigTypeIdComptimeInt);
2656327490
26564 if (bigint_cmp(&start_val->data.x_bigint, &end_val->data.x_bigint) == CmpGT) {27491 if (bigint_cmp(&start_val->data.x_bigint, &end_val->data.x_bigint) == CmpGT) {
26565 ir_add_error(ira, start_value,27492 ir_add_error(ira, &start_value->base,
26566 buf_sprintf("range start value is greater than the end value"));27493 buf_sprintf("range start value is greater than the end value"));
26567 }27494 }
2656827495
26569 AstNode *prev_node = rangeset_add_range(&rs, &start_val->data.x_bigint, &end_val->data.x_bigint,27496 AstNode *prev_node = rangeset_add_range(&rs, &start_val->data.x_bigint, &end_val->data.x_bigint,
26570 start_value->source_node);27497 start_value->base.source_node);
26571 if (prev_node != nullptr) {27498 if (prev_node != nullptr) {
26572 ErrorMsg *msg = ir_add_error(ira, start_value, buf_sprintf("duplicate switch value"));27499 ErrorMsg *msg = ir_add_error(ira, &start_value->base, buf_sprintf("duplicate switch value"));
26573 add_error_note(ira->codegen, msg, prev_node, buf_sprintf("previous value is here"));27500 add_error_note(ira->codegen, msg, prev_node, buf_sprintf("previous value is here"));
26574 return ira->codegen->invalid_instruction;27501 return ira->codegen->invalid_inst_gen;
26575 }27502 }
26576 }27503 }
26577 if (!instruction->have_else_prong) {27504 if (!instruction->have_else_prong) {
...@@ -26580,25 +27507,25 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,...@@ -26580,25 +27507,25 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
26580 BigInt max_val;27507 BigInt max_val;
26581 eval_min_max_value_int(ira->codegen, switch_type, &max_val, true);27508 eval_min_max_value_int(ira->codegen, switch_type, &max_val, true);
26582 if (!rangeset_spans(&rs, &min_val, &max_val)) {27509 if (!rangeset_spans(&rs, &min_val, &max_val)) {
26583 ir_add_error(ira, &instruction->base, buf_sprintf("switch must handle all possibilities"));27510 ir_add_error(ira, &instruction->base.base, buf_sprintf("switch must handle all possibilities"));
26584 return ira->codegen->invalid_instruction;27511 return ira->codegen->invalid_inst_gen;
26585 }27512 }
26586 }27513 }
26587 } else if (switch_type->id == ZigTypeIdBool) {27514 } else if (switch_type->id == ZigTypeIdBool) {
26588 int seenTrue = 0;27515 int seenTrue = 0;
26589 int seenFalse = 0;27516 int seenFalse = 0;
26590 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {27517 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
26591 IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];27518 IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
2659227519
26593 IrInstruction *value = range->start->child;27520 IrInstGen *value = range->start->child;
2659427521
26595 IrInstruction *casted_value = ir_implicit_cast(ira, value, switch_type);27522 IrInstGen *casted_value = ir_implicit_cast(ira, value, switch_type);
26596 if (type_is_invalid(casted_value->value->type))27523 if (type_is_invalid(casted_value->value->type))
26597 return ira->codegen->invalid_instruction;27524 return ira->codegen->invalid_inst_gen;
2659827525
26599 ZigValue *const_expr_val = ir_resolve_const(ira, casted_value, UndefBad);27526 ZigValue *const_expr_val = ir_resolve_const(ira, casted_value, UndefBad);
26600 if (!const_expr_val)27527 if (!const_expr_val)
26601 return ira->codegen->invalid_instruction;27528 return ira->codegen->invalid_inst_gen;
2660227529
26603 assert(const_expr_val->type->id == ZigTypeIdBool);27530 assert(const_expr_val->type->id == ZigTypeIdBool);
2660427531
...@@ -26609,60 +27536,59 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,...@@ -26609,60 +27536,59 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
26609 }27536 }
2661027537
26611 if ((seenTrue > 1) || (seenFalse > 1)) {27538 if ((seenTrue > 1) || (seenFalse > 1)) {
26612 ir_add_error(ira, value, buf_sprintf("duplicate switch value"));27539 ir_add_error(ira, &value->base, buf_sprintf("duplicate switch value"));
26613 return ira->codegen->invalid_instruction;27540 return ira->codegen->invalid_inst_gen;
26614 }27541 }
26615 }27542 }
26616 if (((seenTrue < 1) || (seenFalse < 1)) && !instruction->have_else_prong) {27543 if (((seenTrue < 1) || (seenFalse < 1)) && !instruction->have_else_prong) {
26617 ir_add_error(ira, &instruction->base, buf_sprintf("switch must handle all possibilities"));27544 ir_add_error(ira, &instruction->base.base, buf_sprintf("switch must handle all possibilities"));
26618 return ira->codegen->invalid_instruction;27545 return ira->codegen->invalid_inst_gen;
26619 }27546 }
26620 } else if (!instruction->have_else_prong) {27547 } else if (!instruction->have_else_prong) {
26621 ir_add_error(ira, &instruction->base,27548 ir_add_error(ira, &instruction->base.base,
26622 buf_sprintf("else prong required when switching on type '%s'", buf_ptr(&switch_type->name)));27549 buf_sprintf("else prong required when switching on type '%s'", buf_ptr(&switch_type->name)));
26623 return ira->codegen->invalid_instruction;27550 return ira->codegen->invalid_inst_gen;
26624 }27551 }
26625 return ir_const_void(ira, &instruction->base);27552 return ir_const_void(ira, &instruction->base.base);
26626}27553}
2662727554
26628static IrInstruction *ir_analyze_instruction_check_statement_is_void(IrAnalyze *ira,27555static IrInstGen *ir_analyze_instruction_check_statement_is_void(IrAnalyze *ira,
26629 IrInstructionCheckStatementIsVoid *instruction)27556 IrInstSrcCheckStatementIsVoid *instruction)
26630{27557{
26631 IrInstruction *statement_value = instruction->statement_value->child;27558 IrInstGen *statement_value = instruction->statement_value->child;
26632 ZigType *statement_type = statement_value->value->type;27559 ZigType *statement_type = statement_value->value->type;
26633 if (type_is_invalid(statement_type))27560 if (type_is_invalid(statement_type))
26634 return ira->codegen->invalid_instruction;27561 return ira->codegen->invalid_inst_gen;
2663527562
26636 if (statement_type->id != ZigTypeIdVoid && statement_type->id != ZigTypeIdUnreachable) {27563 if (statement_type->id != ZigTypeIdVoid && statement_type->id != ZigTypeIdUnreachable) {
26637 ir_add_error(ira, &instruction->base, buf_sprintf("expression value is ignored"));27564 ir_add_error(ira, &instruction->base.base, buf_sprintf("expression value is ignored"));
26638 }27565 }
2663927566
26640 return ir_const_void(ira, &instruction->base);27567 return ir_const_void(ira, &instruction->base.base);
26641}27568}
2664227569
26643static IrInstruction *ir_analyze_instruction_panic(IrAnalyze *ira, IrInstructionPanic *instruction) {27570static IrInstGen *ir_analyze_instruction_panic(IrAnalyze *ira, IrInstSrcPanic *instruction) {
26644 IrInstruction *msg = instruction->msg->child;27571 IrInstGen *msg = instruction->msg->child;
26645 if (type_is_invalid(msg->value->type))27572 if (type_is_invalid(msg->value->type))
26646 return ir_unreach_error(ira);27573 return ir_unreach_error(ira);
2664727574
26648 if (ir_should_inline(ira->new_irb.exec, instruction->base.scope)) {27575 if (ir_should_inline(ira->old_irb.exec, instruction->base.base.scope)) {
26649 ir_add_error(ira, &instruction->base, buf_sprintf("encountered @panic at compile-time"));27576 ir_add_error(ira, &instruction->base.base, buf_sprintf("encountered @panic at compile-time"));
26650 return ir_unreach_error(ira);27577 return ir_unreach_error(ira);
26651 }27578 }
2665227579
26653 ZigType *u8_ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,27580 ZigType *u8_ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
26654 true, false, PtrLenUnknown, 0, 0, 0, false);27581 true, false, PtrLenUnknown, 0, 0, 0, false);
26655 ZigType *str_type = get_slice_type(ira->codegen, u8_ptr_type);27582 ZigType *str_type = get_slice_type(ira->codegen, u8_ptr_type);
26656 IrInstruction *casted_msg = ir_implicit_cast(ira, msg, str_type);27583 IrInstGen *casted_msg = ir_implicit_cast(ira, msg, str_type);
26657 if (type_is_invalid(casted_msg->value->type))27584 if (type_is_invalid(casted_msg->value->type))
26658 return ir_unreach_error(ira);27585 return ir_unreach_error(ira);
2665927586
26660 IrInstruction *new_instruction = ir_build_panic(&ira->new_irb, instruction->base.scope,27587 IrInstGen *new_instruction = ir_build_panic_gen(ira, &instruction->base.base, casted_msg);
26661 instruction->base.source_node, casted_msg);
26662 return ir_finish_anal(ira, new_instruction);27588 return ir_finish_anal(ira, new_instruction);
26663}27589}
2666427590
26665static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint32_t align_bytes, bool safety_check_on) {27591static IrInstGen *ir_align_cast(IrAnalyze *ira, IrInstGen *target, uint32_t align_bytes, bool safety_check_on) {
26666 Error err;27592 Error err;
2666727593
26668 ZigType *target_type = target->value->type;27594 ZigType *target_type = target->value->type;
...@@ -26674,7 +27600,7 @@ static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint3...@@ -26674,7 +27600,7 @@ static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint3
26674 if (target_type->id == ZigTypeIdPointer) {27600 if (target_type->id == ZigTypeIdPointer) {
26675 result_type = adjust_ptr_align(ira->codegen, target_type, align_bytes);27601 result_type = adjust_ptr_align(ira->codegen, target_type, align_bytes);
26676 if ((err = resolve_ptr_align(ira, target_type, &old_align_bytes)))27602 if ((err = resolve_ptr_align(ira, target_type, &old_align_bytes)))
26677 return ira->codegen->invalid_instruction;27603 return ira->codegen->invalid_inst_gen;
26678 } else if (target_type->id == ZigTypeIdFn) {27604 } else if (target_type->id == ZigTypeIdFn) {
26679 FnTypeId fn_type_id = target_type->data.fn.fn_type_id;27605 FnTypeId fn_type_id = target_type->data.fn.fn_type_id;
26680 old_align_bytes = fn_type_id.alignment;27606 old_align_bytes = fn_type_id.alignment;
...@@ -26685,7 +27611,7 @@ static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint3...@@ -26685,7 +27611,7 @@ static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint3
26685 {27611 {
26686 ZigType *ptr_type = target_type->data.maybe.child_type;27612 ZigType *ptr_type = target_type->data.maybe.child_type;
26687 if ((err = resolve_ptr_align(ira, ptr_type, &old_align_bytes)))27613 if ((err = resolve_ptr_align(ira, ptr_type, &old_align_bytes)))
26688 return ira->codegen->invalid_instruction;27614 return ira->codegen->invalid_inst_gen;
26689 ZigType *better_ptr_type = adjust_ptr_align(ira->codegen, ptr_type, align_bytes);27615 ZigType *better_ptr_type = adjust_ptr_align(ira->codegen, ptr_type, align_bytes);
2669027616
26691 result_type = get_optional_type(ira->codegen, better_ptr_type);27617 result_type = get_optional_type(ira->codegen, better_ptr_type);
...@@ -26700,47 +27626,44 @@ static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint3...@@ -26700,47 +27626,44 @@ static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint3
26700 } else if (is_slice(target_type)) {27626 } else if (is_slice(target_type)) {
26701 ZigType *slice_ptr_type = target_type->data.structure.fields[slice_ptr_index]->type_entry;27627 ZigType *slice_ptr_type = target_type->data.structure.fields[slice_ptr_index]->type_entry;
26702 if ((err = resolve_ptr_align(ira, slice_ptr_type, &old_align_bytes)))27628 if ((err = resolve_ptr_align(ira, slice_ptr_type, &old_align_bytes)))
26703 return ira->codegen->invalid_instruction;27629 return ira->codegen->invalid_inst_gen;
26704 ZigType *result_ptr_type = adjust_ptr_align(ira->codegen, slice_ptr_type, align_bytes);27630 ZigType *result_ptr_type = adjust_ptr_align(ira->codegen, slice_ptr_type, align_bytes);
26705 result_type = get_slice_type(ira->codegen, result_ptr_type);27631 result_type = get_slice_type(ira->codegen, result_ptr_type);
26706 } else {27632 } else {
26707 ir_add_error(ira, target,27633 ir_add_error(ira, &target->base,
26708 buf_sprintf("expected pointer or slice, found '%s'", buf_ptr(&target_type->name)));27634 buf_sprintf("expected pointer or slice, found '%s'", buf_ptr(&target_type->name)));
26709 return ira->codegen->invalid_instruction;27635 return ira->codegen->invalid_inst_gen;
26710 }27636 }
2671127637
26712 if (instr_is_comptime(target)) {27638 if (instr_is_comptime(target)) {
26713 ZigValue *val = ir_resolve_const(ira, target, UndefBad);27639 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
26714 if (!val)27640 if (!val)
26715 return ira->codegen->invalid_instruction;27641 return ira->codegen->invalid_inst_gen;
2671627642
26717 if (val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr &&27643 if (val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr &&
26718 val->data.x_ptr.data.hard_coded_addr.addr % align_bytes != 0)27644 val->data.x_ptr.data.hard_coded_addr.addr % align_bytes != 0)
26719 {27645 {
26720 ir_add_error(ira, target,27646 ir_add_error(ira, &target->base,
26721 buf_sprintf("pointer address 0x%" ZIG_PRI_x64 " is not aligned to %" PRIu32 " bytes",27647 buf_sprintf("pointer address 0x%" ZIG_PRI_x64 " is not aligned to %" PRIu32 " bytes",
26722 val->data.x_ptr.data.hard_coded_addr.addr, align_bytes));27648 val->data.x_ptr.data.hard_coded_addr.addr, align_bytes));
26723 return ira->codegen->invalid_instruction;27649 return ira->codegen->invalid_inst_gen;
26724 }27650 }
2672527651
26726 IrInstruction *result = ir_const(ira, target, result_type);27652 IrInstGen *result = ir_const(ira, &target->base, result_type);
26727 copy_const_val(result->value, val);27653 copy_const_val(result->value, val);
26728 result->value->type = result_type;27654 result->value->type = result_type;
26729 return result;27655 return result;
26730 }27656 }
2673127657
26732 IrInstruction *result;
26733 if (safety_check_on && align_bytes > old_align_bytes && align_bytes != 1) {27658 if (safety_check_on && align_bytes > old_align_bytes && align_bytes != 1) {
26734 result = ir_build_align_cast(&ira->new_irb, target->scope, target->source_node, nullptr, target);27659 return ir_build_align_cast_gen(ira, target->base.scope, target->base.source_node, target, result_type);
26735 } else {27660 } else {
26736 result = ir_build_cast(&ira->new_irb, target->scope, target->source_node, result_type, target, CastOpNoop);27661 return ir_build_cast(ira, &target->base, result_type, target, CastOpNoop);
26737 }27662 }
26738 result->value->type = result_type;
26739 return result;
26740}27663}
2674127664
26742static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *ptr,27665static IrInstGen *ir_analyze_ptr_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *ptr,
26743 ZigType *dest_type, IrInstruction *dest_type_src, bool safety_check_on)27666 ZigType *dest_type, IrInst *dest_type_src, bool safety_check_on)
26744{27667{
26745 Error err;27668 Error err;
2674627669
...@@ -26756,44 +27679,44 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_...@@ -26756,44 +27679,44 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
2675627679
26757 ZigType *src_ptr_type = get_src_ptr_type(src_type);27680 ZigType *src_ptr_type = get_src_ptr_type(src_type);
26758 if (src_ptr_type == nullptr) {27681 if (src_ptr_type == nullptr) {
26759 ir_add_error(ira, ptr, buf_sprintf("expected pointer, found '%s'", buf_ptr(&src_type->name)));27682 ir_add_error(ira, &ptr->base, buf_sprintf("expected pointer, found '%s'", buf_ptr(&src_type->name)));
26760 return ira->codegen->invalid_instruction;27683 return ira->codegen->invalid_inst_gen;
26761 }27684 }
2676227685
26763 ZigType *dest_ptr_type = get_src_ptr_type(dest_type);27686 ZigType *dest_ptr_type = get_src_ptr_type(dest_type);
26764 if (dest_ptr_type == nullptr) {27687 if (dest_ptr_type == nullptr) {
26765 ir_add_error(ira, dest_type_src,27688 ir_add_error(ira, dest_type_src,
26766 buf_sprintf("expected pointer, found '%s'", buf_ptr(&dest_type->name)));27689 buf_sprintf("expected pointer, found '%s'", buf_ptr(&dest_type->name)));
26767 return ira->codegen->invalid_instruction;27690 return ira->codegen->invalid_inst_gen;
26768 }27691 }
2676927692
26770 if (get_ptr_const(src_type) && !get_ptr_const(dest_type)) {27693 if (get_ptr_const(src_type) && !get_ptr_const(dest_type)) {
26771 ir_add_error(ira, source_instr, buf_sprintf("cast discards const qualifier"));27694 ir_add_error(ira, source_instr, buf_sprintf("cast discards const qualifier"));
26772 return ira->codegen->invalid_instruction;27695 return ira->codegen->invalid_inst_gen;
26773 }27696 }
26774 uint32_t src_align_bytes;27697 uint32_t src_align_bytes;
26775 if ((err = resolve_ptr_align(ira, src_type, &src_align_bytes)))27698 if ((err = resolve_ptr_align(ira, src_type, &src_align_bytes)))
26776 return ira->codegen->invalid_instruction;27699 return ira->codegen->invalid_inst_gen;
2677727700
26778 uint32_t dest_align_bytes;27701 uint32_t dest_align_bytes;
26779 if ((err = resolve_ptr_align(ira, dest_type, &dest_align_bytes)))27702 if ((err = resolve_ptr_align(ira, dest_type, &dest_align_bytes)))
26780 return ira->codegen->invalid_instruction;27703 return ira->codegen->invalid_inst_gen;
2678127704
26782 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))27705 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))
26783 return ira->codegen->invalid_instruction;27706 return ira->codegen->invalid_inst_gen;
2678427707
26785 if ((err = type_resolve(ira->codegen, src_type, ResolveStatusZeroBitsKnown)))27708 if ((err = type_resolve(ira->codegen, src_type, ResolveStatusZeroBitsKnown)))
26786 return ira->codegen->invalid_instruction;27709 return ira->codegen->invalid_inst_gen;
2678727710
26788 if (type_has_bits(dest_type) && !type_has_bits(src_type)) {27711 if (type_has_bits(dest_type) && !type_has_bits(src_type)) {
26789 ErrorMsg *msg = ir_add_error(ira, source_instr,27712 ErrorMsg *msg = ir_add_error(ira, source_instr,
26790 buf_sprintf("'%s' and '%s' do not have the same in-memory representation",27713 buf_sprintf("'%s' and '%s' do not have the same in-memory representation",
26791 buf_ptr(&src_type->name), buf_ptr(&dest_type->name)));27714 buf_ptr(&src_type->name), buf_ptr(&dest_type->name)));
26792 add_error_note(ira->codegen, msg, ptr->source_node,27715 add_error_note(ira->codegen, msg, ptr->base.source_node,
26793 buf_sprintf("'%s' has no in-memory bits", buf_ptr(&src_type->name)));27716 buf_sprintf("'%s' has no in-memory bits", buf_ptr(&src_type->name)));
26794 add_error_note(ira->codegen, msg, dest_type_src->source_node,27717 add_error_note(ira->codegen, msg, dest_type_src->source_node,
26795 buf_sprintf("'%s' has in-memory bits", buf_ptr(&dest_type->name)));27718 buf_sprintf("'%s' has in-memory bits", buf_ptr(&dest_type->name)));
26796 return ira->codegen->invalid_instruction;27719 return ira->codegen->invalid_inst_gen;
26797 }27720 }
2679827721
26799 if (instr_is_comptime(ptr)) {27722 if (instr_is_comptime(ptr)) {
...@@ -26801,7 +27724,7 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_...@@ -26801,7 +27724,7 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
26801 UndefAllowed is_undef_allowed = dest_allows_addr_zero ? UndefOk : UndefBad;27724 UndefAllowed is_undef_allowed = dest_allows_addr_zero ? UndefOk : UndefBad;
26802 ZigValue *val = ir_resolve_const(ira, ptr, is_undef_allowed);27725 ZigValue *val = ir_resolve_const(ira, ptr, is_undef_allowed);
26803 if (!val)27726 if (!val)
26804 return ira->codegen->invalid_instruction;27727 return ira->codegen->invalid_inst_gen;
2680527728
26806 if (value_is_comptime(val) && val->special != ConstValSpecialUndef) {27729 if (value_is_comptime(val) && val->special != ConstValSpecialUndef) {
26807 bool is_addr_zero = val->data.x_ptr.special == ConstPtrSpecialNull ||27730 bool is_addr_zero = val->data.x_ptr.special == ConstPtrSpecialNull ||
...@@ -26810,16 +27733,16 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_...@@ -26810,16 +27733,16 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
26810 if (is_addr_zero && !dest_allows_addr_zero) {27733 if (is_addr_zero && !dest_allows_addr_zero) {
26811 ir_add_error(ira, source_instr,27734 ir_add_error(ira, source_instr,
26812 buf_sprintf("null pointer casted to type '%s'", buf_ptr(&dest_type->name)));27735 buf_sprintf("null pointer casted to type '%s'", buf_ptr(&dest_type->name)));
26813 return ira->codegen->invalid_instruction;27736 return ira->codegen->invalid_inst_gen;
26814 }27737 }
26815 }27738 }
2681627739
26817 IrInstruction *result;27740 IrInstGen *result;
26818 if (ptr->value->data.x_ptr.mut == ConstPtrMutInfer) {27741 if (ptr->value->data.x_ptr.mut == ConstPtrMutInfer) {
26819 result = ir_build_ptr_cast_gen(ira, source_instr, dest_type, ptr, safety_check_on);27742 result = ir_build_ptr_cast_gen(ira, source_instr, dest_type, ptr, safety_check_on);
2682027743
26821 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))27744 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))
26822 return ira->codegen->invalid_instruction;27745 return ira->codegen->invalid_inst_gen;
26823 } else {27746 } else {
26824 result = ir_const(ira, source_instr, dest_type);27747 result = ir_const(ira, source_instr, dest_type);
26825 }27748 }
...@@ -26837,40 +27760,40 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_...@@ -26837,40 +27760,40 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
2683727760
26838 if (dest_align_bytes > src_align_bytes) {27761 if (dest_align_bytes > src_align_bytes) {
26839 ErrorMsg *msg = ir_add_error(ira, source_instr, buf_sprintf("cast increases pointer alignment"));27762 ErrorMsg *msg = ir_add_error(ira, source_instr, buf_sprintf("cast increases pointer alignment"));
26840 add_error_note(ira->codegen, msg, ptr->source_node,27763 add_error_note(ira->codegen, msg, ptr->base.source_node,
26841 buf_sprintf("'%s' has alignment %" PRIu32, buf_ptr(&src_type->name), src_align_bytes));27764 buf_sprintf("'%s' has alignment %" PRIu32, buf_ptr(&src_type->name), src_align_bytes));
26842 add_error_note(ira->codegen, msg, dest_type_src->source_node,27765 add_error_note(ira->codegen, msg, dest_type_src->source_node,
26843 buf_sprintf("'%s' has alignment %" PRIu32, buf_ptr(&dest_type->name), dest_align_bytes));27766 buf_sprintf("'%s' has alignment %" PRIu32, buf_ptr(&dest_type->name), dest_align_bytes));
26844 return ira->codegen->invalid_instruction;27767 return ira->codegen->invalid_inst_gen;
26845 }27768 }
2684627769
26847 IrInstruction *casted_ptr = ir_build_ptr_cast_gen(ira, source_instr, dest_type, ptr, safety_check_on);27770 IrInstGen *casted_ptr = ir_build_ptr_cast_gen(ira, source_instr, dest_type, ptr, safety_check_on);
2684827771
26849 // Keep the bigger alignment, it can only help-27772 // Keep the bigger alignment, it can only help-
26850 // unless the target is zero bits.27773 // unless the target is zero bits.
26851 IrInstruction *result;27774 IrInstGen *result;
26852 if (src_align_bytes > dest_align_bytes && type_has_bits(dest_type)) {27775 if (src_align_bytes > dest_align_bytes && type_has_bits(dest_type)) {
26853 result = ir_align_cast(ira, casted_ptr, src_align_bytes, false);27776 result = ir_align_cast(ira, casted_ptr, src_align_bytes, false);
26854 if (type_is_invalid(result->value->type))27777 if (type_is_invalid(result->value->type))
26855 return ira->codegen->invalid_instruction;27778 return ira->codegen->invalid_inst_gen;
26856 } else {27779 } else {
26857 result = casted_ptr;27780 result = casted_ptr;
26858 }27781 }
26859 return result;27782 return result;
26860}27783}
2686127784
26862static IrInstruction *ir_analyze_instruction_ptr_cast(IrAnalyze *ira, IrInstructionPtrCastSrc *instruction) {27785static IrInstGen *ir_analyze_instruction_ptr_cast(IrAnalyze *ira, IrInstSrcPtrCast *instruction) {
26863 IrInstruction *dest_type_value = instruction->dest_type->child;27786 IrInstGen *dest_type_value = instruction->dest_type->child;
26864 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);27787 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
26865 if (type_is_invalid(dest_type))27788 if (type_is_invalid(dest_type))
26866 return ira->codegen->invalid_instruction;27789 return ira->codegen->invalid_inst_gen;
2686727790
26868 IrInstruction *ptr = instruction->ptr->child;27791 IrInstGen *ptr = instruction->ptr->child;
26869 ZigType *src_type = ptr->value->type;27792 ZigType *src_type = ptr->value->type;
26870 if (type_is_invalid(src_type))27793 if (type_is_invalid(src_type))
26871 return ira->codegen->invalid_instruction;27794 return ira->codegen->invalid_inst_gen;
2687227795
26873 return ir_analyze_ptr_cast(ira, &instruction->base, ptr, dest_type, dest_type_value,27796 return ir_analyze_ptr_cast(ira, &instruction->base.base, ptr, dest_type, &dest_type_value->base,
26874 instruction->safety_check_on);27797 instruction->safety_check_on);
26875}27798}
2687627799
...@@ -27201,7 +28124,7 @@ static Error buf_read_value_bytes(IrAnalyze *ira, CodeGen *codegen, AstNode *sou...@@ -27201,7 +28124,7 @@ static Error buf_read_value_bytes(IrAnalyze *ira, CodeGen *codegen, AstNode *sou
27201 zig_unreachable();28124 zig_unreachable();
27202}28125}
2720328126
27204static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,28127static IrInstGen *ir_analyze_bit_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
27205 ZigType *dest_type)28128 ZigType *dest_type)
27206{28129{
27207 Error err;28130 Error err;
...@@ -27217,14 +28140,14 @@ static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_...@@ -27217,14 +28140,14 @@ static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_
27217 buf_sprintf("cannot cast a value of type '%s'", buf_ptr(&dest_type->name)));28140 buf_sprintf("cannot cast a value of type '%s'", buf_ptr(&dest_type->name)));
27218 add_error_note(ira->codegen, msg, source_instr->source_node,28141 add_error_note(ira->codegen, msg, source_instr->source_node,
27219 buf_sprintf("use @intToEnum for type coercion"));28142 buf_sprintf("use @intToEnum for type coercion"));
27220 return ira->codegen->invalid_instruction;28143 return ira->codegen->invalid_inst_gen;
27221 }28144 }
2722228145
27223 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusSizeKnown)))28146 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusSizeKnown)))
27224 return ira->codegen->invalid_instruction;28147 return ira->codegen->invalid_inst_gen;
2722528148
27226 if ((err = type_resolve(ira->codegen, src_type, ResolveStatusSizeKnown)))28149 if ((err = type_resolve(ira->codegen, src_type, ResolveStatusSizeKnown)))
27227 return ira->codegen->invalid_instruction;28150 return ira->codegen->invalid_inst_gen;
2722828151
27229 uint64_t dest_size_bytes = type_size(ira->codegen, dest_type);28152 uint64_t dest_size_bytes = type_size(ira->codegen, dest_type);
27230 uint64_t src_size_bytes = type_size(ira->codegen, src_type);28153 uint64_t src_size_bytes = type_size(ira->codegen, src_type);
...@@ -27233,7 +28156,7 @@ static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_...@@ -27233,7 +28156,7 @@ static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_
27233 buf_sprintf("destination type '%s' has size %" ZIG_PRI_u64 " but source type '%s' has size %" ZIG_PRI_u64,28156 buf_sprintf("destination type '%s' has size %" ZIG_PRI_u64 " but source type '%s' has size %" ZIG_PRI_u64,
27234 buf_ptr(&dest_type->name), dest_size_bytes,28157 buf_ptr(&dest_type->name), dest_size_bytes,
27235 buf_ptr(&src_type->name), src_size_bytes));28158 buf_ptr(&src_type->name), src_size_bytes));
27236 return ira->codegen->invalid_instruction;28159 return ira->codegen->invalid_inst_gen;
27237 }28160 }
2723828161
27239 uint64_t dest_size_bits = type_size_bits(ira->codegen, dest_type);28162 uint64_t dest_size_bits = type_size_bits(ira->codegen, dest_type);
...@@ -27243,26 +28166,26 @@ static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_...@@ -27243,26 +28166,26 @@ static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_
27243 buf_sprintf("destination type '%s' has %" ZIG_PRI_u64 " bits but source type '%s' has %" ZIG_PRI_u64 " bits",28166 buf_sprintf("destination type '%s' has %" ZIG_PRI_u64 " bits but source type '%s' has %" ZIG_PRI_u64 " bits",
27244 buf_ptr(&dest_type->name), dest_size_bits,28167 buf_ptr(&dest_type->name), dest_size_bits,
27245 buf_ptr(&src_type->name), src_size_bits));28168 buf_ptr(&src_type->name), src_size_bits));
27246 return ira->codegen->invalid_instruction;28169 return ira->codegen->invalid_inst_gen;
27247 }28170 }
2724828171
27249 if (instr_is_comptime(value)) {28172 if (instr_is_comptime(value)) {
27250 ZigValue *val = ir_resolve_const(ira, value, UndefBad);28173 ZigValue *val = ir_resolve_const(ira, value, UndefBad);
27251 if (!val)28174 if (!val)
27252 return ira->codegen->invalid_instruction;28175 return ira->codegen->invalid_inst_gen;
2725328176
27254 IrInstruction *result = ir_const(ira, source_instr, dest_type);28177 IrInstGen *result = ir_const(ira, source_instr, dest_type);
27255 uint8_t *buf = allocate_nonzero<uint8_t>(src_size_bytes);28178 uint8_t *buf = allocate_nonzero<uint8_t>(src_size_bytes);
27256 buf_write_value_bytes(ira->codegen, buf, val);28179 buf_write_value_bytes(ira->codegen, buf, val);
27257 if ((err = buf_read_value_bytes(ira, ira->codegen, source_instr->source_node, buf, result->value)))28180 if ((err = buf_read_value_bytes(ira, ira->codegen, source_instr->source_node, buf, result->value)))
27258 return ira->codegen->invalid_instruction;28181 return ira->codegen->invalid_inst_gen;
27259 return result;28182 return result;
27260 }28183 }
2726128184
27262 return ir_build_bit_cast_gen(ira, source_instr, value, dest_type);28185 return ir_build_bit_cast_gen(ira, source_instr, value, dest_type);
27263}28186}
2726428187
27265static IrInstruction *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,28188static IrInstGen *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
27266 ZigType *ptr_type)28189 ZigType *ptr_type)
27267{28190{
27268 Error err;28191 Error err;
...@@ -27270,136 +28193,128 @@ static IrInstruction *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInstruction *sourc...@@ -27270,136 +28193,128 @@ static IrInstruction *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInstruction *sourc
27270 ir_assert(get_src_ptr_type(ptr_type) != nullptr, source_instr);28193 ir_assert(get_src_ptr_type(ptr_type) != nullptr, source_instr);
27271 ir_assert(type_has_bits(ptr_type), source_instr);28194 ir_assert(type_has_bits(ptr_type), source_instr);
2727228195
27273 IrInstruction *casted_int = ir_implicit_cast(ira, target, ira->codegen->builtin_types.entry_usize);28196 IrInstGen *casted_int = ir_implicit_cast(ira, target, ira->codegen->builtin_types.entry_usize);
27274 if (type_is_invalid(casted_int->value->type))28197 if (type_is_invalid(casted_int->value->type))
27275 return ira->codegen->invalid_instruction;28198 return ira->codegen->invalid_inst_gen;
2727628199
27277 if (instr_is_comptime(casted_int)) {28200 if (instr_is_comptime(casted_int)) {
27278 ZigValue *val = ir_resolve_const(ira, casted_int, UndefBad);28201 ZigValue *val = ir_resolve_const(ira, casted_int, UndefBad);
27279 if (!val)28202 if (!val)
27280 return ira->codegen->invalid_instruction;28203 return ira->codegen->invalid_inst_gen;
2728128204
27282 uint64_t addr = bigint_as_u64(&val->data.x_bigint);28205 uint64_t addr = bigint_as_u64(&val->data.x_bigint);
27283 if (!ptr_allows_addr_zero(ptr_type) && addr == 0) {28206 if (!ptr_allows_addr_zero(ptr_type) && addr == 0) {
27284 ir_add_error(ira, source_instr,28207 ir_add_error(ira, source_instr,
27285 buf_sprintf("pointer type '%s' does not allow address zero", buf_ptr(&ptr_type->name)));28208 buf_sprintf("pointer type '%s' does not allow address zero", buf_ptr(&ptr_type->name)));
27286 return ira->codegen->invalid_instruction;28209 return ira->codegen->invalid_inst_gen;
27287 }28210 }
2728828211
27289 uint32_t align_bytes;28212 uint32_t align_bytes;
27290 if ((err = resolve_ptr_align(ira, ptr_type, &align_bytes)))28213 if ((err = resolve_ptr_align(ira, ptr_type, &align_bytes)))
27291 return ira->codegen->invalid_instruction;28214 return ira->codegen->invalid_inst_gen;
2729228215
27293 if (addr != 0 && addr % align_bytes != 0) {28216 if (addr != 0 && addr % align_bytes != 0) {
27294 ir_add_error(ira, source_instr,28217 ir_add_error(ira, source_instr,
27295 buf_sprintf("pointer type '%s' requires aligned address",28218 buf_sprintf("pointer type '%s' requires aligned address",
27296 buf_ptr(&ptr_type->name)));28219 buf_ptr(&ptr_type->name)));
27297 return ira->codegen->invalid_instruction;28220 return ira->codegen->invalid_inst_gen;
27298 }28221 }
2729928222
27300 IrInstruction *result = ir_const(ira, source_instr, ptr_type);28223 IrInstGen *result = ir_const(ira, source_instr, ptr_type);
27301 result->value->data.x_ptr.special = ConstPtrSpecialHardCodedAddr;28224 result->value->data.x_ptr.special = ConstPtrSpecialHardCodedAddr;
27302 result->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;28225 result->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;
27303 result->value->data.x_ptr.data.hard_coded_addr.addr = addr;28226 result->value->data.x_ptr.data.hard_coded_addr.addr = addr;
27304 return result;28227 return result;
27305 }28228 }
2730628229
27307 IrInstruction *result = ir_build_int_to_ptr(&ira->new_irb, source_instr->scope,28230 return ir_build_int_to_ptr_gen(ira, source_instr->scope, source_instr->source_node, casted_int, ptr_type);
27308 source_instr->source_node, nullptr, casted_int);
27309 result->value->type = ptr_type;
27310 return result;
27311}28231}
2731228232
27313static IrInstruction *ir_analyze_instruction_int_to_ptr(IrAnalyze *ira, IrInstructionIntToPtr *instruction) {28233static IrInstGen *ir_analyze_instruction_int_to_ptr(IrAnalyze *ira, IrInstSrcIntToPtr *instruction) {
27314 Error err;28234 Error err;
27315 IrInstruction *dest_type_value = instruction->dest_type->child;28235 IrInstGen *dest_type_value = instruction->dest_type->child;
27316 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);28236 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
27317 if (type_is_invalid(dest_type))28237 if (type_is_invalid(dest_type))
27318 return ira->codegen->invalid_instruction;28238 return ira->codegen->invalid_inst_gen;
2731928239
27320 // We explicitly check for the size, so we can use get_src_ptr_type28240 // We explicitly check for the size, so we can use get_src_ptr_type
27321 if (get_src_ptr_type(dest_type) == nullptr) {28241 if (get_src_ptr_type(dest_type) == nullptr) {
27322 ir_add_error(ira, dest_type_value, buf_sprintf("expected pointer, found '%s'", buf_ptr(&dest_type->name)));28242 ir_add_error(ira, &dest_type_value->base, buf_sprintf("expected pointer, found '%s'", buf_ptr(&dest_type->name)));
27323 return ira->codegen->invalid_instruction;28243 return ira->codegen->invalid_inst_gen;
27324 }28244 }
2732528245
27326 bool has_bits;28246 bool has_bits;
27327 if ((err = type_has_bits2(ira->codegen, dest_type, &has_bits)))28247 if ((err = type_has_bits2(ira->codegen, dest_type, &has_bits)))
27328 return ira->codegen->invalid_instruction;28248 return ira->codegen->invalid_inst_gen;
2732928249
27330 if (!has_bits) {28250 if (!has_bits) {
27331 ir_add_error(ira, dest_type_value,28251 ir_add_error(ira, &dest_type_value->base,
27332 buf_sprintf("type '%s' has 0 bits and cannot store information", buf_ptr(&dest_type->name)));28252 buf_sprintf("type '%s' has 0 bits and cannot store information", buf_ptr(&dest_type->name)));
27333 return ira->codegen->invalid_instruction;28253 return ira->codegen->invalid_inst_gen;
27334 }28254 }
2733528255
27336 IrInstruction *target = instruction->target->child;28256 IrInstGen *target = instruction->target->child;
27337 if (type_is_invalid(target->value->type))28257 if (type_is_invalid(target->value->type))
27338 return ira->codegen->invalid_instruction;28258 return ira->codegen->invalid_inst_gen;
2733928259
27340 return ir_analyze_int_to_ptr(ira, &instruction->base, target, dest_type);28260 return ir_analyze_int_to_ptr(ira, &instruction->base.base, target, dest_type);
27341}28261}
2734228262
27343static IrInstruction *ir_analyze_instruction_decl_ref(IrAnalyze *ira,28263static IrInstGen *ir_analyze_instruction_decl_ref(IrAnalyze *ira, IrInstSrcDeclRef *instruction) {
27344 IrInstructionDeclRef *instruction)28264 IrInstGen *ref_instruction = ir_analyze_decl_ref(ira, &instruction->base.base, instruction->tld);
27345{
27346 IrInstruction *ref_instruction = ir_analyze_decl_ref(ira, &instruction->base, instruction->tld);
27347 if (type_is_invalid(ref_instruction->value->type)) {28265 if (type_is_invalid(ref_instruction->value->type)) {
27348 return ira->codegen->invalid_instruction;28266 return ira->codegen->invalid_inst_gen;
27349 }28267 }
2735028268
27351 if (instruction->lval == LValPtr) {28269 if (instruction->lval == LValPtr) {
27352 return ref_instruction;28270 return ref_instruction;
27353 } else {28271 } else {
27354 return ir_get_deref(ira, &instruction->base, ref_instruction, nullptr);28272 return ir_get_deref(ira, &instruction->base.base, ref_instruction, nullptr);
27355 }28273 }
27356}28274}
2735728275
27358static IrInstruction *ir_analyze_instruction_ptr_to_int(IrAnalyze *ira, IrInstructionPtrToInt *instruction) {28276static IrInstGen *ir_analyze_instruction_ptr_to_int(IrAnalyze *ira, IrInstSrcPtrToInt *instruction) {
27359 Error err;28277 Error err;
27360 IrInstruction *target = instruction->target->child;28278 IrInstGen *target = instruction->target->child;
27361 if (type_is_invalid(target->value->type))28279 if (type_is_invalid(target->value->type))
27362 return ira->codegen->invalid_instruction;28280 return ira->codegen->invalid_inst_gen;
2736328281
27364 ZigType *usize = ira->codegen->builtin_types.entry_usize;28282 ZigType *usize = ira->codegen->builtin_types.entry_usize;
2736528283
27366 // We check size explicitly so we can use get_src_ptr_type here.28284 // We check size explicitly so we can use get_src_ptr_type here.
27367 if (get_src_ptr_type(target->value->type) == nullptr) {28285 if (get_src_ptr_type(target->value->type) == nullptr) {
27368 ir_add_error(ira, target,28286 ir_add_error(ira, &target->base,
27369 buf_sprintf("expected pointer, found '%s'", buf_ptr(&target->value->type->name)));28287 buf_sprintf("expected pointer, found '%s'", buf_ptr(&target->value->type->name)));
27370 return ira->codegen->invalid_instruction;28288 return ira->codegen->invalid_inst_gen;
27371 }28289 }
2737228290
27373 bool has_bits;28291 bool has_bits;
27374 if ((err = type_has_bits2(ira->codegen, target->value->type, &has_bits)))28292 if ((err = type_has_bits2(ira->codegen, target->value->type, &has_bits)))
27375 return ira->codegen->invalid_instruction;28293 return ira->codegen->invalid_inst_gen;
2737628294
27377 if (!has_bits) {28295 if (!has_bits) {
27378 ir_add_error(ira, target,28296 ir_add_error(ira, &target->base,
27379 buf_sprintf("pointer to size 0 type has no address"));28297 buf_sprintf("pointer to size 0 type has no address"));
27380 return ira->codegen->invalid_instruction;28298 return ira->codegen->invalid_inst_gen;
27381 }28299 }
2738228300
27383 if (instr_is_comptime(target)) {28301 if (instr_is_comptime(target)) {
27384 ZigValue *val = ir_resolve_const(ira, target, UndefBad);28302 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
27385 if (!val)28303 if (!val)
27386 return ira->codegen->invalid_instruction;28304 return ira->codegen->invalid_inst_gen;
27387 if (val->type->id == ZigTypeIdPointer && val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr) {28305 if (val->type->id == ZigTypeIdPointer && val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr) {
27388 IrInstruction *result = ir_const(ira, &instruction->base, usize);28306 IrInstGen *result = ir_const(ira, &instruction->base.base, usize);
27389 bigint_init_unsigned(&result->value->data.x_bigint, val->data.x_ptr.data.hard_coded_addr.addr);28307 bigint_init_unsigned(&result->value->data.x_bigint, val->data.x_ptr.data.hard_coded_addr.addr);
27390 result->value->type = usize;28308 result->value->type = usize;
27391 return result;28309 return result;
27392 }28310 }
27393 }28311 }
2739428312
27395 IrInstruction *result = ir_build_ptr_to_int(&ira->new_irb, instruction->base.scope,28313 return ir_build_ptr_to_int_gen(ira, &instruction->base.base, target);
27396 instruction->base.source_node, target);
27397 result->value->type = usize;
27398 return result;
27399}28314}
2740028315
27401static IrInstruction *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstructionPtrType *instruction) {28316static IrInstGen *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstSrcPtrType *instruction) {
27402 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);28317 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
27403 result->value->special = ConstValSpecialLazy;28318 result->value->special = ConstValSpecialLazy;
2740428319
27405 LazyValuePtrType *lazy_ptr_type = allocate<LazyValuePtrType>(1, "LazyValuePtrType");28320 LazyValuePtrType *lazy_ptr_type = allocate<LazyValuePtrType>(1, "LazyValuePtrType");
...@@ -27410,17 +28325,17 @@ static IrInstruction *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstruct...@@ -27410,17 +28325,17 @@ static IrInstruction *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstruct
27410 if (instruction->sentinel != nullptr) {28325 if (instruction->sentinel != nullptr) {
27411 lazy_ptr_type->sentinel = instruction->sentinel->child;28326 lazy_ptr_type->sentinel = instruction->sentinel->child;
27412 if (ir_resolve_const(ira, lazy_ptr_type->sentinel, LazyOk) == nullptr)28327 if (ir_resolve_const(ira, lazy_ptr_type->sentinel, LazyOk) == nullptr)
27413 return ira->codegen->invalid_instruction;28328 return ira->codegen->invalid_inst_gen;
27414 }28329 }
2741528330
27416 lazy_ptr_type->elem_type = instruction->child_type->child;28331 lazy_ptr_type->elem_type = instruction->child_type->child;
27417 if (ir_resolve_type_lazy(ira, lazy_ptr_type->elem_type) == nullptr)28332 if (ir_resolve_type_lazy(ira, lazy_ptr_type->elem_type) == nullptr)
27418 return ira->codegen->invalid_instruction;28333 return ira->codegen->invalid_inst_gen;
2741928334
27420 if (instruction->align_value != nullptr) {28335 if (instruction->align_value != nullptr) {
27421 lazy_ptr_type->align_inst = instruction->align_value->child;28336 lazy_ptr_type->align_inst = instruction->align_value->child;
27422 if (ir_resolve_const(ira, lazy_ptr_type->align_inst, LazyOk) == nullptr)28337 if (ir_resolve_const(ira, lazy_ptr_type->align_inst, LazyOk) == nullptr)
27423 return ira->codegen->invalid_instruction;28338 return ira->codegen->invalid_inst_gen;
27424 }28339 }
2742528340
27426 lazy_ptr_type->ptr_len = instruction->ptr_len;28341 lazy_ptr_type->ptr_len = instruction->ptr_len;
...@@ -27433,10 +28348,10 @@ static IrInstruction *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstruct...@@ -27433,10 +28348,10 @@ static IrInstruction *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstruct
27433 return result;28348 return result;
27434}28349}
2743528350
27436static IrInstruction *ir_analyze_instruction_align_cast(IrAnalyze *ira, IrInstructionAlignCast *instruction) {28351static IrInstGen *ir_analyze_instruction_align_cast(IrAnalyze *ira, IrInstSrcAlignCast *instruction) {
27437 IrInstruction *target = instruction->target->child;28352 IrInstGen *target = instruction->target->child;
27438 if (type_is_invalid(target->value->type))28353 if (type_is_invalid(target->value->type))
27439 return ira->codegen->invalid_instruction;28354 return ira->codegen->invalid_inst_gen;
2744028355
27441 ZigType *elem_type = nullptr;28356 ZigType *elem_type = nullptr;
27442 if (is_slice(target->value->type)) {28357 if (is_slice(target->value->type)) {
...@@ -27447,192 +28362,192 @@ static IrInstruction *ir_analyze_instruction_align_cast(IrAnalyze *ira, IrInstru...@@ -27447,192 +28362,192 @@ static IrInstruction *ir_analyze_instruction_align_cast(IrAnalyze *ira, IrInstru
27447 }28362 }
2744828363
27449 uint32_t align_bytes;28364 uint32_t align_bytes;
27450 IrInstruction *align_bytes_inst = instruction->align_bytes->child;28365 IrInstGen *align_bytes_inst = instruction->align_bytes->child;
27451 if (!ir_resolve_align(ira, align_bytes_inst, elem_type, &align_bytes))28366 if (!ir_resolve_align(ira, align_bytes_inst, elem_type, &align_bytes))
27452 return ira->codegen->invalid_instruction;28367 return ira->codegen->invalid_inst_gen;
2745328368
27454 IrInstruction *result = ir_align_cast(ira, target, align_bytes, true);28369 IrInstGen *result = ir_align_cast(ira, target, align_bytes, true);
27455 if (type_is_invalid(result->value->type))28370 if (type_is_invalid(result->value->type))
27456 return ira->codegen->invalid_instruction;28371 return ira->codegen->invalid_inst_gen;
2745728372
27458 return result;28373 return result;
27459}28374}
2746028375
27461static IrInstruction *ir_analyze_instruction_opaque_type(IrAnalyze *ira, IrInstructionOpaqueType *instruction) {28376static IrInstGen *ir_analyze_instruction_opaque_type(IrAnalyze *ira, IrInstSrcOpaqueType *instruction) {
27462 Buf *bare_name = buf_alloc();28377 Buf *bare_name = buf_alloc();
27463 Buf *full_name = get_anon_type_name(ira->codegen, ira->new_irb.exec, "opaque",28378 Buf *full_name = get_anon_type_name(ira->codegen, ira->old_irb.exec, "opaque",
27464 instruction->base.scope, instruction->base.source_node, bare_name);28379 instruction->base.base.scope, instruction->base.base.source_node, bare_name);
27465 ZigType *result_type = get_opaque_type(ira->codegen, instruction->base.scope, instruction->base.source_node,28380 ZigType *result_type = get_opaque_type(ira->codegen, instruction->base.base.scope,
27466 buf_ptr(full_name), bare_name);28381 instruction->base.base.source_node, buf_ptr(full_name), bare_name);
27467 return ir_const_type(ira, &instruction->base, result_type);28382 return ir_const_type(ira, &instruction->base.base, result_type);
27468}28383}
2746928384
27470static IrInstruction *ir_analyze_instruction_set_align_stack(IrAnalyze *ira, IrInstructionSetAlignStack *instruction) {28385static IrInstGen *ir_analyze_instruction_set_align_stack(IrAnalyze *ira, IrInstSrcSetAlignStack *instruction) {
27471 uint32_t align_bytes;28386 uint32_t align_bytes;
27472 IrInstruction *align_bytes_inst = instruction->align_bytes->child;28387 IrInstGen *align_bytes_inst = instruction->align_bytes->child;
27473 if (!ir_resolve_align(ira, align_bytes_inst, nullptr, &align_bytes))28388 if (!ir_resolve_align(ira, align_bytes_inst, nullptr, &align_bytes))
27474 return ira->codegen->invalid_instruction;28389 return ira->codegen->invalid_inst_gen;
2747528390
27476 if (align_bytes > 256) {28391 if (align_bytes > 256) {
27477 ir_add_error(ira, &instruction->base, buf_sprintf("attempt to @setAlignStack(%" PRIu32 "); maximum is 256", align_bytes));28392 ir_add_error(ira, &instruction->base.base, buf_sprintf("attempt to @setAlignStack(%" PRIu32 "); maximum is 256", align_bytes));
27478 return ira->codegen->invalid_instruction;28393 return ira->codegen->invalid_inst_gen;
27479 }28394 }
2748028395
27481 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);28396 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
27482 if (fn_entry == nullptr) {28397 if (fn_entry == nullptr) {
27483 ir_add_error(ira, &instruction->base, buf_sprintf("@setAlignStack outside function"));28398 ir_add_error(ira, &instruction->base.base, buf_sprintf("@setAlignStack outside function"));
27484 return ira->codegen->invalid_instruction;28399 return ira->codegen->invalid_inst_gen;
27485 }28400 }
27486 if (fn_entry->type_entry->data.fn.fn_type_id.cc == CallingConventionNaked) {28401 if (fn_entry->type_entry->data.fn.fn_type_id.cc == CallingConventionNaked) {
27487 ir_add_error(ira, &instruction->base, buf_sprintf("@setAlignStack in naked function"));28402 ir_add_error(ira, &instruction->base.base, buf_sprintf("@setAlignStack in naked function"));
27488 return ira->codegen->invalid_instruction;28403 return ira->codegen->invalid_inst_gen;
27489 }28404 }
2749028405
27491 if (fn_entry->fn_inline == FnInlineAlways) {28406 if (fn_entry->fn_inline == FnInlineAlways) {
27492 ir_add_error(ira, &instruction->base, buf_sprintf("@setAlignStack in inline function"));28407 ir_add_error(ira, &instruction->base.base, buf_sprintf("@setAlignStack in inline function"));
27493 return ira->codegen->invalid_instruction;28408 return ira->codegen->invalid_inst_gen;
27494 }28409 }
2749528410
27496 if (fn_entry->set_alignstack_node != nullptr) {28411 if (fn_entry->set_alignstack_node != nullptr) {
27497 ErrorMsg *msg = ir_add_error_node(ira, instruction->base.source_node,28412 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
27498 buf_sprintf("alignstack set twice"));28413 buf_sprintf("alignstack set twice"));
27499 add_error_note(ira->codegen, msg, fn_entry->set_alignstack_node, buf_sprintf("first set here"));28414 add_error_note(ira->codegen, msg, fn_entry->set_alignstack_node, buf_sprintf("first set here"));
27500 return ira->codegen->invalid_instruction;28415 return ira->codegen->invalid_inst_gen;
27501 }28416 }
2750228417
27503 fn_entry->set_alignstack_node = instruction->base.source_node;28418 fn_entry->set_alignstack_node = instruction->base.base.source_node;
27504 fn_entry->alignstack_value = align_bytes;28419 fn_entry->alignstack_value = align_bytes;
2750528420
27506 return ir_const_void(ira, &instruction->base);28421 return ir_const_void(ira, &instruction->base.base);
27507}28422}
2750828423
27509static IrInstruction *ir_analyze_instruction_arg_type(IrAnalyze *ira, IrInstructionArgType *instruction) {28424static IrInstGen *ir_analyze_instruction_arg_type(IrAnalyze *ira, IrInstSrcArgType *instruction) {
27510 IrInstruction *fn_type_inst = instruction->fn_type->child;28425 IrInstGen *fn_type_inst = instruction->fn_type->child;
27511 ZigType *fn_type = ir_resolve_type(ira, fn_type_inst);28426 ZigType *fn_type = ir_resolve_type(ira, fn_type_inst);
27512 if (type_is_invalid(fn_type))28427 if (type_is_invalid(fn_type))
27513 return ira->codegen->invalid_instruction;28428 return ira->codegen->invalid_inst_gen;
2751428429
27515 IrInstruction *arg_index_inst = instruction->arg_index->child;28430 IrInstGen *arg_index_inst = instruction->arg_index->child;
27516 uint64_t arg_index;28431 uint64_t arg_index;
27517 if (!ir_resolve_usize(ira, arg_index_inst, &arg_index))28432 if (!ir_resolve_usize(ira, arg_index_inst, &arg_index))
27518 return ira->codegen->invalid_instruction;28433 return ira->codegen->invalid_inst_gen;
2751928434
27520 if (fn_type->id == ZigTypeIdBoundFn) {28435 if (fn_type->id == ZigTypeIdBoundFn) {
27521 fn_type = fn_type->data.bound_fn.fn_type;28436 fn_type = fn_type->data.bound_fn.fn_type;
27522 arg_index += 1;28437 arg_index += 1;
27523 }28438 }
27524 if (fn_type->id != ZigTypeIdFn) {28439 if (fn_type->id != ZigTypeIdFn) {
27525 ir_add_error(ira, fn_type_inst, buf_sprintf("expected function, found '%s'", buf_ptr(&fn_type->name)));28440 ir_add_error(ira, &fn_type_inst->base, buf_sprintf("expected function, found '%s'", buf_ptr(&fn_type->name)));
27526 return ira->codegen->invalid_instruction;28441 return ira->codegen->invalid_inst_gen;
27527 }28442 }
2752828443
27529 FnTypeId *fn_type_id = &fn_type->data.fn.fn_type_id;28444 FnTypeId *fn_type_id = &fn_type->data.fn.fn_type_id;
27530 if (arg_index >= fn_type_id->param_count) {28445 if (arg_index >= fn_type_id->param_count) {
27531 if (instruction->allow_var) {28446 if (instruction->allow_var) {
27532 // TODO remove this with var args28447 // TODO remove this with var args
27533 return ir_const_type(ira, &instruction->base, ira->codegen->builtin_types.entry_var);28448 return ir_const_type(ira, &instruction->base.base, ira->codegen->builtin_types.entry_var);
27534 }28449 }
27535 ir_add_error(ira, arg_index_inst,28450 ir_add_error(ira, &arg_index_inst->base,
27536 buf_sprintf("arg index %" ZIG_PRI_u64 " out of bounds; '%s' has %" ZIG_PRI_usize " arguments",28451 buf_sprintf("arg index %" ZIG_PRI_u64 " out of bounds; '%s' has %" ZIG_PRI_usize " arguments",
27537 arg_index, buf_ptr(&fn_type->name), fn_type_id->param_count));28452 arg_index, buf_ptr(&fn_type->name), fn_type_id->param_count));
27538 return ira->codegen->invalid_instruction;28453 return ira->codegen->invalid_inst_gen;
27539 }28454 }
2754028455
27541 ZigType *result_type = fn_type_id->param_info[arg_index].type;28456 ZigType *result_type = fn_type_id->param_info[arg_index].type;
27542 if (result_type == nullptr) {28457 if (result_type == nullptr) {
27543 // Args are only unresolved if our function is generic.28458 // Args are only unresolved if our function is generic.
27544 ir_assert(fn_type->data.fn.is_generic, &instruction->base);28459 ir_assert(fn_type->data.fn.is_generic, &instruction->base.base);
2754528460
27546 if (instruction->allow_var) {28461 if (instruction->allow_var) {
27547 return ir_const_type(ira, &instruction->base, ira->codegen->builtin_types.entry_var);28462 return ir_const_type(ira, &instruction->base.base, ira->codegen->builtin_types.entry_var);
27548 } else {28463 } else {
27549 ir_add_error(ira, arg_index_inst,28464 ir_add_error(ira, &arg_index_inst->base,
27550 buf_sprintf("@ArgType could not resolve the type of arg %" ZIG_PRI_u64 " because '%s' is generic",28465 buf_sprintf("@ArgType could not resolve the type of arg %" ZIG_PRI_u64 " because '%s' is generic",
27551 arg_index, buf_ptr(&fn_type->name)));28466 arg_index, buf_ptr(&fn_type->name)));
27552 return ira->codegen->invalid_instruction;28467 return ira->codegen->invalid_inst_gen;
27553 }28468 }
27554 }28469 }
27555 return ir_const_type(ira, &instruction->base, result_type);28470 return ir_const_type(ira, &instruction->base.base, result_type);
27556}28471}
2755728472
27558static IrInstruction *ir_analyze_instruction_tag_type(IrAnalyze *ira, IrInstructionTagType *instruction) {28473static IrInstGen *ir_analyze_instruction_tag_type(IrAnalyze *ira, IrInstSrcTagType *instruction) {
27559 Error err;28474 Error err;
27560 IrInstruction *target_inst = instruction->target->child;28475 IrInstGen *target_inst = instruction->target->child;
27561 ZigType *enum_type = ir_resolve_type(ira, target_inst);28476 ZigType *enum_type = ir_resolve_type(ira, target_inst);
27562 if (type_is_invalid(enum_type))28477 if (type_is_invalid(enum_type))
27563 return ira->codegen->invalid_instruction;28478 return ira->codegen->invalid_inst_gen;
2756428479
27565 if (enum_type->id == ZigTypeIdEnum) {28480 if (enum_type->id == ZigTypeIdEnum) {
27566 if ((err = type_resolve(ira->codegen, enum_type, ResolveStatusSizeKnown)))28481 if ((err = type_resolve(ira->codegen, enum_type, ResolveStatusSizeKnown)))
27567 return ira->codegen->invalid_instruction;28482 return ira->codegen->invalid_inst_gen;
2756828483
27569 return ir_const_type(ira, &instruction->base, enum_type->data.enumeration.tag_int_type);28484 return ir_const_type(ira, &instruction->base.base, enum_type->data.enumeration.tag_int_type);
27570 } else if (enum_type->id == ZigTypeIdUnion) {28485 } else if (enum_type->id == ZigTypeIdUnion) {
27571 ZigType *tag_type = ir_resolve_union_tag_type(ira, instruction->target, enum_type);28486 ZigType *tag_type = ir_resolve_union_tag_type(ira, instruction->target->base.source_node, enum_type);
27572 if (type_is_invalid(tag_type))28487 if (type_is_invalid(tag_type))
27573 return ira->codegen->invalid_instruction;28488 return ira->codegen->invalid_inst_gen;
27574 return ir_const_type(ira, &instruction->base, tag_type);28489 return ir_const_type(ira, &instruction->base.base, tag_type);
27575 } else {28490 } else {
27576 ir_add_error(ira, target_inst, buf_sprintf("expected enum or union, found '%s'",28491 ir_add_error(ira, &target_inst->base, buf_sprintf("expected enum or union, found '%s'",
27577 buf_ptr(&enum_type->name)));28492 buf_ptr(&enum_type->name)));
27578 return ira->codegen->invalid_instruction;28493 return ira->codegen->invalid_inst_gen;
27579 }28494 }
27580}28495}
2758128496
27582static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstruction *op) {28497static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op) {
27583 ZigType *operand_type = ir_resolve_type(ira, op);28498 ZigType *operand_type = ir_resolve_type(ira, op);
27584 if (type_is_invalid(operand_type))28499 if (type_is_invalid(operand_type))
27585 return ira->codegen->builtin_types.entry_invalid;28500 return ira->codegen->builtin_types.entry_invalid;
2758628501
27587 if (operand_type->id == ZigTypeIdInt) {28502 if (operand_type->id == ZigTypeIdInt) {
27588 if (operand_type->data.integral.bit_count < 8) {28503 if (operand_type->data.integral.bit_count < 8) {
27589 ir_add_error(ira, op,28504 ir_add_error(ira, &op->base,
27590 buf_sprintf("expected integer type 8 bits or larger, found %" PRIu32 "-bit integer type",28505 buf_sprintf("expected integer type 8 bits or larger, found %" PRIu32 "-bit integer type",
27591 operand_type->data.integral.bit_count));28506 operand_type->data.integral.bit_count));
27592 return ira->codegen->builtin_types.entry_invalid;28507 return ira->codegen->builtin_types.entry_invalid;
27593 }28508 }
27594 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);28509 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
27595 if (operand_type->data.integral.bit_count > max_atomic_bits) {28510 if (operand_type->data.integral.bit_count > max_atomic_bits) {
27596 ir_add_error(ira, op,28511 ir_add_error(ira, &op->base,
27597 buf_sprintf("expected %" PRIu32 "-bit integer type or smaller, found %" PRIu32 "-bit integer type",28512 buf_sprintf("expected %" PRIu32 "-bit integer type or smaller, found %" PRIu32 "-bit integer type",
27598 max_atomic_bits, operand_type->data.integral.bit_count));28513 max_atomic_bits, operand_type->data.integral.bit_count));
27599 return ira->codegen->builtin_types.entry_invalid;28514 return ira->codegen->builtin_types.entry_invalid;
27600 }28515 }
27601 if (!is_power_of_2(operand_type->data.integral.bit_count)) {28516 if (!is_power_of_2(operand_type->data.integral.bit_count)) {
27602 ir_add_error(ira, op,28517 ir_add_error(ira, &op->base,
27603 buf_sprintf("%" PRIu32 "-bit integer type is not a power of 2", operand_type->data.integral.bit_count));28518 buf_sprintf("%" PRIu32 "-bit integer type is not a power of 2", operand_type->data.integral.bit_count));
27604 return ira->codegen->builtin_types.entry_invalid;28519 return ira->codegen->builtin_types.entry_invalid;
27605 }28520 }
27606 } else if (operand_type->id == ZigTypeIdEnum) {28521 } else if (operand_type->id == ZigTypeIdEnum) {
27607 ZigType *int_type = operand_type->data.enumeration.tag_int_type;28522 ZigType *int_type = operand_type->data.enumeration.tag_int_type;
27608 if (int_type->data.integral.bit_count < 8) {28523 if (int_type->data.integral.bit_count < 8) {
27609 ir_add_error(ira, op,28524 ir_add_error(ira, &op->base,
27610 buf_sprintf("expected enum tag type 8 bits or larger, found %" PRIu32 "-bit tag type",28525 buf_sprintf("expected enum tag type 8 bits or larger, found %" PRIu32 "-bit tag type",
27611 int_type->data.integral.bit_count));28526 int_type->data.integral.bit_count));
27612 return ira->codegen->builtin_types.entry_invalid;28527 return ira->codegen->builtin_types.entry_invalid;
27613 }28528 }
27614 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);28529 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
27615 if (int_type->data.integral.bit_count > max_atomic_bits) {28530 if (int_type->data.integral.bit_count > max_atomic_bits) {
27616 ir_add_error(ira, op,28531 ir_add_error(ira, &op->base,
27617 buf_sprintf("expected %" PRIu32 "-bit enum tag type or smaller, found %" PRIu32 "-bit tag type",28532 buf_sprintf("expected %" PRIu32 "-bit enum tag type or smaller, found %" PRIu32 "-bit tag type",
27618 max_atomic_bits, int_type->data.integral.bit_count));28533 max_atomic_bits, int_type->data.integral.bit_count));
27619 return ira->codegen->builtin_types.entry_invalid;28534 return ira->codegen->builtin_types.entry_invalid;
27620 }28535 }
27621 if (!is_power_of_2(int_type->data.integral.bit_count)) {28536 if (!is_power_of_2(int_type->data.integral.bit_count)) {
27622 ir_add_error(ira, op,28537 ir_add_error(ira, &op->base,
27623 buf_sprintf("%" PRIu32 "-bit enum tag type is not a power of 2", int_type->data.integral.bit_count));28538 buf_sprintf("%" PRIu32 "-bit enum tag type is not a power of 2", int_type->data.integral.bit_count));
27624 return ira->codegen->builtin_types.entry_invalid;28539 return ira->codegen->builtin_types.entry_invalid;
27625 }28540 }
27626 } else if (operand_type->id == ZigTypeIdFloat) {28541 } else if (operand_type->id == ZigTypeIdFloat) {
27627 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);28542 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
27628 if (operand_type->data.floating.bit_count > max_atomic_bits) {28543 if (operand_type->data.floating.bit_count > max_atomic_bits) {
27629 ir_add_error(ira, op,28544 ir_add_error(ira, &op->base,
27630 buf_sprintf("expected %" PRIu32 "-bit float or smaller, found %" PRIu32 "-bit float",28545 buf_sprintf("expected %" PRIu32 "-bit float or smaller, found %" PRIu32 "-bit float",
27631 max_atomic_bits, (uint32_t) operand_type->data.floating.bit_count));28546 max_atomic_bits, (uint32_t) operand_type->data.floating.bit_count));
27632 return ira->codegen->builtin_types.entry_invalid;28547 return ira->codegen->builtin_types.entry_invalid;
27633 }28548 }
27634 } else if (get_codegen_ptr_type(operand_type) == nullptr) {28549 } else if (get_codegen_ptr_type(operand_type) == nullptr) {
27635 ir_add_error(ira, op,28550 ir_add_error(ira, &op->base,
27636 buf_sprintf("expected integer, float, enum or pointer type, found '%s'", buf_ptr(&operand_type->name)));28551 buf_sprintf("expected integer, float, enum or pointer type, found '%s'", buf_ptr(&operand_type->name)));
27637 return ira->codegen->builtin_types.entry_invalid;28552 return ira->codegen->builtin_types.entry_invalid;
27638 }28553 }
...@@ -27640,172 +28555,146 @@ static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstruction *op...@@ -27640,172 +28555,146 @@ static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstruction *op
27640 return operand_type;28555 return operand_type;
27641}28556}
2764228557
27643static IrInstruction *ir_analyze_instruction_atomic_rmw(IrAnalyze *ira, IrInstructionAtomicRmw *instruction) {28558static IrInstGen *ir_analyze_instruction_atomic_rmw(IrAnalyze *ira, IrInstSrcAtomicRmw *instruction) {
27644 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);28559 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
27645 if (type_is_invalid(operand_type))28560 if (type_is_invalid(operand_type))
27646 return ira->codegen->invalid_instruction;28561 return ira->codegen->invalid_inst_gen;
2764728562
27648 IrInstruction *ptr_inst = instruction->ptr->child;28563 IrInstGen *ptr_inst = instruction->ptr->child;
27649 if (type_is_invalid(ptr_inst->value->type))28564 if (type_is_invalid(ptr_inst->value->type))
27650 return ira->codegen->invalid_instruction;28565 return ira->codegen->invalid_inst_gen;
2765128566
27652 // TODO let this be volatile28567 // TODO let this be volatile
27653 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, false);28568 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, false);
27654 IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);28569 IrInstGen *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
27655 if (type_is_invalid(casted_ptr->value->type))28570 if (type_is_invalid(casted_ptr->value->type))
27656 return ira->codegen->invalid_instruction;28571 return ira->codegen->invalid_inst_gen;
2765728572
27658 AtomicRmwOp op;28573 AtomicRmwOp op;
27659 if (instruction->op == nullptr) {28574 if (!ir_resolve_atomic_rmw_op(ira, instruction->op->child, &op)) {
27660 op = instruction->resolved_op;28575 return ira->codegen->invalid_inst_gen;
27661 } else {
27662 if (!ir_resolve_atomic_rmw_op(ira, instruction->op->child, &op)) {
27663 return ira->codegen->invalid_instruction;
27664 }
27665 }28576 }
2766628577
27667 if (operand_type->id == ZigTypeIdEnum && op != AtomicRmwOp_xchg) {28578 if (operand_type->id == ZigTypeIdEnum && op != AtomicRmwOp_xchg) {
27668 ir_add_error(ira, instruction->op,28579 ir_add_error(ira, &instruction->op->base,
27669 buf_sprintf("@atomicRmw on enum only works with .Xchg"));28580 buf_sprintf("@atomicRmw on enum only works with .Xchg"));
27670 return ira->codegen->invalid_instruction;28581 return ira->codegen->invalid_inst_gen;
27671 } else if (operand_type->id == ZigTypeIdFloat && op > AtomicRmwOp_sub) {28582 } else if (operand_type->id == ZigTypeIdFloat && op > AtomicRmwOp_sub) {
27672 ir_add_error(ira, instruction->op,28583 ir_add_error(ira, &instruction->op->base,
27673 buf_sprintf("@atomicRmw with float only works with .Xchg, .Add and .Sub"));28584 buf_sprintf("@atomicRmw with float only works with .Xchg, .Add and .Sub"));
27674 return ira->codegen->invalid_instruction;28585 return ira->codegen->invalid_inst_gen;
27675 }28586 }
2767628587
27677 IrInstruction *operand = instruction->operand->child;28588 IrInstGen *operand = instruction->operand->child;
27678 if (type_is_invalid(operand->value->type))28589 if (type_is_invalid(operand->value->type))
27679 return ira->codegen->invalid_instruction;28590 return ira->codegen->invalid_inst_gen;
2768028591
27681 IrInstruction *casted_operand = ir_implicit_cast(ira, operand, operand_type);28592 IrInstGen *casted_operand = ir_implicit_cast(ira, operand, operand_type);
27682 if (type_is_invalid(casted_operand->value->type))28593 if (type_is_invalid(casted_operand->value->type))
27683 return ira->codegen->invalid_instruction;28594 return ira->codegen->invalid_inst_gen;
2768428595
27685 AtomicOrder ordering;28596 AtomicOrder ordering;
27686 if (instruction->ordering == nullptr) {28597 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
27687 ordering = instruction->resolved_ordering;28598 return ira->codegen->invalid_inst_gen;
27688 } else {28599 if (ordering == AtomicOrderUnordered) {
27689 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))28600 ir_add_error(ira, &instruction->ordering->base,
27690 return ira->codegen->invalid_instruction;28601 buf_sprintf("@atomicRmw atomic ordering must not be Unordered"));
27691 if (ordering == AtomicOrderUnordered) {28602 return ira->codegen->invalid_inst_gen;
27692 ir_add_error(ira, instruction->ordering,
27693 buf_sprintf("@atomicRmw atomic ordering must not be Unordered"));
27694 return ira->codegen->invalid_instruction;
27695 }
27696 }28603 }
2769728604
27698 if (instr_is_comptime(casted_operand) && instr_is_comptime(casted_ptr) && casted_ptr->value->data.x_ptr.mut == ConstPtrMutComptimeVar)28605 if (instr_is_comptime(casted_operand) && instr_is_comptime(casted_ptr) && casted_ptr->value->data.x_ptr.mut == ConstPtrMutComptimeVar)
27699 {28606 {
27700 zig_panic("TODO compile-time execution of atomicRmw");28607 ir_add_error(ira, &instruction->base.base,
28608 buf_sprintf("compiler bug: TODO compile-time execution of @atomicRmw"));
28609 return ira->codegen->invalid_inst_gen;
27701 }28610 }
2770228611
27703 IrInstruction *result = ir_build_atomic_rmw(&ira->new_irb, instruction->base.scope,28612 return ir_build_atomic_rmw_gen(ira, &instruction->base.base, casted_ptr, casted_operand, op,
27704 instruction->base.source_node, nullptr, casted_ptr, nullptr, casted_operand, nullptr,28613 ordering, operand_type);
27705 op, ordering);
27706 result->value->type = operand_type;
27707 return result;
27708}28614}
2770928615
27710static IrInstruction *ir_analyze_instruction_atomic_load(IrAnalyze *ira, IrInstructionAtomicLoad *instruction) {28616static IrInstGen *ir_analyze_instruction_atomic_load(IrAnalyze *ira, IrInstSrcAtomicLoad *instruction) {
27711 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);28617 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
27712 if (type_is_invalid(operand_type))28618 if (type_is_invalid(operand_type))
27713 return ira->codegen->invalid_instruction;28619 return ira->codegen->invalid_inst_gen;
2771428620
27715 IrInstruction *ptr_inst = instruction->ptr->child;28621 IrInstGen *ptr_inst = instruction->ptr->child;
27716 if (type_is_invalid(ptr_inst->value->type))28622 if (type_is_invalid(ptr_inst->value->type))
27717 return ira->codegen->invalid_instruction;28623 return ira->codegen->invalid_inst_gen;
2771828624
27719 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, true);28625 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, true);
27720 IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);28626 IrInstGen *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
27721 if (type_is_invalid(casted_ptr->value->type))28627 if (type_is_invalid(casted_ptr->value->type))
27722 return ira->codegen->invalid_instruction;28628 return ira->codegen->invalid_inst_gen;
2772328629
27724 AtomicOrder ordering;28630 AtomicOrder ordering;
27725 if (instruction->ordering == nullptr) {28631 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
27726 ordering = instruction->resolved_ordering;28632 return ira->codegen->invalid_inst_gen;
27727 } else {
27728 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
27729 return ira->codegen->invalid_instruction;
27730 }
2773128633
27732 if (ordering == AtomicOrderRelease || ordering == AtomicOrderAcqRel) {28634 if (ordering == AtomicOrderRelease || ordering == AtomicOrderAcqRel) {
27733 ir_assert(instruction->ordering != nullptr, &instruction->base);28635 ir_assert(instruction->ordering != nullptr, &instruction->base.base);
27734 ir_add_error(ira, instruction->ordering,28636 ir_add_error(ira, &instruction->ordering->base,
27735 buf_sprintf("@atomicLoad atomic ordering must not be Release or AcqRel"));28637 buf_sprintf("@atomicLoad atomic ordering must not be Release or AcqRel"));
27736 return ira->codegen->invalid_instruction;28638 return ira->codegen->invalid_inst_gen;
27737 }28639 }
2773828640
27739 if (instr_is_comptime(casted_ptr)) {28641 if (instr_is_comptime(casted_ptr)) {
27740 IrInstruction *result = ir_get_deref(ira, &instruction->base, casted_ptr, nullptr);28642 IrInstGen *result = ir_get_deref(ira, &instruction->base.base, casted_ptr, nullptr);
27741 ir_assert(result->value->type != nullptr, &instruction->base);28643 ir_assert(result->value->type != nullptr, &instruction->base.base);
27742 return result;28644 return result;
27743 }28645 }
2774428646
27745 IrInstruction *result = ir_build_atomic_load(&ira->new_irb, instruction->base.scope,28647 return ir_build_atomic_load_gen(ira, &instruction->base.base, casted_ptr, ordering, operand_type);
27746 instruction->base.source_node, nullptr, casted_ptr, nullptr, ordering);
27747 result->value->type = operand_type;
27748 return result;
27749}28648}
2775028649
27751static IrInstruction *ir_analyze_instruction_atomic_store(IrAnalyze *ira, IrInstructionAtomicStore *instruction) {28650static IrInstGen *ir_analyze_instruction_atomic_store(IrAnalyze *ira, IrInstSrcAtomicStore *instruction) {
27752 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);28651 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
27753 if (type_is_invalid(operand_type))28652 if (type_is_invalid(operand_type))
27754 return ira->codegen->invalid_instruction;28653 return ira->codegen->invalid_inst_gen;
2775528654
27756 IrInstruction *ptr_inst = instruction->ptr->child;28655 IrInstGen *ptr_inst = instruction->ptr->child;
27757 if (type_is_invalid(ptr_inst->value->type))28656 if (type_is_invalid(ptr_inst->value->type))
27758 return ira->codegen->invalid_instruction;28657 return ira->codegen->invalid_inst_gen;
2775928658
27760 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, false);28659 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, false);
27761 IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);28660 IrInstGen *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
27762 if (type_is_invalid(casted_ptr->value->type))28661 if (type_is_invalid(casted_ptr->value->type))
27763 return ira->codegen->invalid_instruction;28662 return ira->codegen->invalid_inst_gen;
2776428663
27765 IrInstruction *value = instruction->value->child;28664 IrInstGen *value = instruction->value->child;
27766 if (type_is_invalid(value->value->type))28665 if (type_is_invalid(value->value->type))
27767 return ira->codegen->invalid_instruction;28666 return ira->codegen->invalid_inst_gen;
2776828667
27769 IrInstruction *casted_value = ir_implicit_cast(ira, value, operand_type);28668 IrInstGen *casted_value = ir_implicit_cast(ira, value, operand_type);
27770 if (type_is_invalid(casted_value->value->type))28669 if (type_is_invalid(casted_value->value->type))
27771 return ira->codegen->invalid_instruction;28670 return ira->codegen->invalid_inst_gen;
2777228671
2777328672
27774 AtomicOrder ordering;28673 AtomicOrder ordering;
27775 if (instruction->ordering == nullptr) {28674 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
27776 ordering = instruction->resolved_ordering;28675 return ira->codegen->invalid_inst_gen;
27777 } else {
27778 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
27779 return ira->codegen->invalid_instruction;
27780 }
2778128676
27782 if (ordering == AtomicOrderAcquire || ordering == AtomicOrderAcqRel) {28677 if (ordering == AtomicOrderAcquire || ordering == AtomicOrderAcqRel) {
27783 ir_assert(instruction->ordering != nullptr, &instruction->base);28678 ir_assert(instruction->ordering != nullptr, &instruction->base.base);
27784 ir_add_error(ira, instruction->ordering,28679 ir_add_error(ira, &instruction->ordering->base,
27785 buf_sprintf("@atomicStore atomic ordering must not be Acquire or AcqRel"));28680 buf_sprintf("@atomicStore atomic ordering must not be Acquire or AcqRel"));
27786 return ira->codegen->invalid_instruction;28681 return ira->codegen->invalid_inst_gen;
27787 }28682 }
2778828683
27789 if (instr_is_comptime(casted_value) && instr_is_comptime(casted_ptr)) {28684 if (instr_is_comptime(casted_value) && instr_is_comptime(casted_ptr)) {
27790 IrInstruction *result = ir_analyze_store_ptr(ira, &instruction->base, casted_ptr, value, false);28685 IrInstGen *result = ir_analyze_store_ptr(ira, &instruction->base.base, casted_ptr, value, false);
27791 result->value->type = ira->codegen->builtin_types.entry_void;28686 result->value->type = ira->codegen->builtin_types.entry_void;
27792 return result;28687 return result;
27793 }28688 }
2779428689
27795 IrInstruction *result = ir_build_atomic_store(&ira->new_irb, instruction->base.scope,28690 return ir_build_atomic_store_gen(ira, &instruction->base.base, casted_ptr, casted_value, ordering);
27796 instruction->base.source_node, nullptr, casted_ptr, casted_value, nullptr, ordering);
27797 result->value->type = ira->codegen->builtin_types.entry_void;
27798 return result;
27799}28691}
2780028692
27801static IrInstruction *ir_analyze_instruction_save_err_ret_addr(IrAnalyze *ira, IrInstructionSaveErrRetAddr *instruction) {28693static IrInstGen *ir_analyze_instruction_save_err_ret_addr(IrAnalyze *ira, IrInstSrcSaveErrRetAddr *instruction) {
27802 IrInstruction *result = ir_build_save_err_ret_addr(&ira->new_irb, instruction->base.scope,28694 return ir_build_save_err_ret_addr_gen(ira, &instruction->base.base);
27803 instruction->base.source_node);
27804 result->value->type = ira->codegen->builtin_types.entry_void;
27805 return result;
27806}28695}
2780728696
27808static ErrorMsg *ir_eval_float_op(IrAnalyze *ira, IrInstruction *source_instr, BuiltinFnId fop, ZigType *float_type,28697static ErrorMsg *ir_eval_float_op(IrAnalyze *ira, IrInst* source_instr, BuiltinFnId fop, ZigType *float_type,
27809 ZigValue *op, ZigValue *out_val)28698 ZigValue *op, ZigValue *out_val)
27810{28699{
27811 assert(ira && source_instr && float_type && out_val && op);28700 assert(ira && source_instr && float_type && out_val && op);
...@@ -28018,30 +28907,30 @@ static ErrorMsg *ir_eval_float_op(IrAnalyze *ira, IrInstruction *source_instr, B...@@ -28018,30 +28907,30 @@ static ErrorMsg *ir_eval_float_op(IrAnalyze *ira, IrInstruction *source_instr, B
28018 return nullptr;28907 return nullptr;
28019}28908}
2802028909
28021static IrInstruction *ir_analyze_instruction_float_op(IrAnalyze *ira, IrInstructionFloatOp *instruction) {28910static IrInstGen *ir_analyze_instruction_float_op(IrAnalyze *ira, IrInstSrcFloatOp *instruction) {
28022 IrInstruction *operand = instruction->operand->child;28911 IrInstGen *operand = instruction->operand->child;
28023 ZigType *operand_type = operand->value->type;28912 ZigType *operand_type = operand->value->type;
28024 if (type_is_invalid(operand_type))28913 if (type_is_invalid(operand_type))
28025 return ira->codegen->invalid_instruction;28914 return ira->codegen->invalid_inst_gen;
2802628915
28027 // This instruction accepts floats and vectors of floats.28916 // This instruction accepts floats and vectors of floats.
28028 ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ?28917 ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ?
28029 operand_type->data.vector.elem_type : operand_type;28918 operand_type->data.vector.elem_type : operand_type;
2803028919
28031 if (scalar_type->id != ZigTypeIdFloat && scalar_type->id != ZigTypeIdComptimeFloat) {28920 if (scalar_type->id != ZigTypeIdFloat && scalar_type->id != ZigTypeIdComptimeFloat) {
28032 ir_add_error(ira, operand,28921 ir_add_error(ira, &operand->base,
28033 buf_sprintf("expected float type, found '%s'", buf_ptr(&scalar_type->name)));28922 buf_sprintf("expected float type, found '%s'", buf_ptr(&scalar_type->name)));
28034 return ira->codegen->invalid_instruction;28923 return ira->codegen->invalid_inst_gen;
28035 }28924 }
2803628925
28037 if (instr_is_comptime(operand)) {28926 if (instr_is_comptime(operand)) {
28038 ZigValue *operand_val = ir_resolve_const(ira, operand, UndefOk);28927 ZigValue *operand_val = ir_resolve_const(ira, operand, UndefOk);
28039 if (operand_val == nullptr)28928 if (operand_val == nullptr)
28040 return ira->codegen->invalid_instruction;28929 return ira->codegen->invalid_inst_gen;
28041 if (operand_val->special == ConstValSpecialUndef)28930 if (operand_val->special == ConstValSpecialUndef)
28042 return ir_const_undef(ira, &instruction->base, operand_type);28931 return ir_const_undef(ira, &instruction->base.base, operand_type);
2804328932
28044 IrInstruction *result = ir_const(ira, &instruction->base, operand_type);28933 IrInstGen *result = ir_const(ira, &instruction->base.base, operand_type);
28045 ZigValue *out_val = result->value;28934 ZigValue *out_val = result->value;
2804628935
28047 if (operand_type->id == ZigTypeIdVector) {28936 if (operand_type->id == ZigTypeIdVector) {
...@@ -28052,47 +28941,44 @@ static IrInstruction *ir_analyze_instruction_float_op(IrAnalyze *ira, IrInstruct...@@ -28052,47 +28941,44 @@ static IrInstruction *ir_analyze_instruction_float_op(IrAnalyze *ira, IrInstruct
28052 for (size_t i = 0; i < len; i += 1) {28941 for (size_t i = 0; i < len; i += 1) {
28053 ZigValue *elem_operand = &operand_val->data.x_array.data.s_none.elements[i];28942 ZigValue *elem_operand = &operand_val->data.x_array.data.s_none.elements[i];
28054 ZigValue *float_out_val = &out_val->data.x_array.data.s_none.elements[i];28943 ZigValue *float_out_val = &out_val->data.x_array.data.s_none.elements[i];
28055 ir_assert(elem_operand->type == scalar_type, &instruction->base);28944 ir_assert(elem_operand->type == scalar_type, &instruction->base.base);
28056 ir_assert(float_out_val->type == scalar_type, &instruction->base);28945 ir_assert(float_out_val->type == scalar_type, &instruction->base.base);
28057 ErrorMsg *msg = ir_eval_float_op(ira, &instruction->base, instruction->fn_id, scalar_type,28946 ErrorMsg *msg = ir_eval_float_op(ira, &instruction->base.base, instruction->fn_id, scalar_type,
28058 elem_operand, float_out_val);28947 elem_operand, float_out_val);
28059 if (msg != nullptr) {28948 if (msg != nullptr) {
28060 add_error_note(ira->codegen, msg, instruction->base.source_node,28949 add_error_note(ira->codegen, msg, instruction->base.base.source_node,
28061 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));28950 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
28062 return ira->codegen->invalid_instruction;28951 return ira->codegen->invalid_inst_gen;
28063 }28952 }
28064 float_out_val->type = scalar_type;28953 float_out_val->type = scalar_type;
28065 }28954 }
28066 out_val->type = operand_type;28955 out_val->type = operand_type;
28067 out_val->special = ConstValSpecialStatic;28956 out_val->special = ConstValSpecialStatic;
28068 } else {28957 } else {
28069 if (ir_eval_float_op(ira, &instruction->base, instruction->fn_id, scalar_type,28958 if (ir_eval_float_op(ira, &instruction->base.base, instruction->fn_id, scalar_type,
28070 operand_val, out_val) != nullptr)28959 operand_val, out_val) != nullptr)
28071 {28960 {
28072 return ira->codegen->invalid_instruction;28961 return ira->codegen->invalid_inst_gen;
28073 }28962 }
28074 }28963 }
28075 return result;28964 return result;
28076 }28965 }
2807728966
28078 ir_assert(scalar_type->id == ZigTypeIdFloat, &instruction->base);28967 ir_assert(scalar_type->id == ZigTypeIdFloat, &instruction->base.base);
2807928968
28080 IrInstruction *result = ir_build_float_op(&ira->new_irb, instruction->base.scope,28969 return ir_build_float_op_gen(ira, &instruction->base.base, operand, instruction->fn_id, operand_type);
28081 instruction->base.source_node, operand, instruction->fn_id);
28082 result->value->type = operand_type;
28083 return result;
28084}28970}
2808528971
28086static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstructionBswap *instruction) {28972static IrInstGen *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstSrcBswap *instruction) {
28087 Error err;28973 Error err;
2808828974
28089 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);28975 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
28090 if (type_is_invalid(int_type))28976 if (type_is_invalid(int_type))
28091 return ira->codegen->invalid_instruction;28977 return ira->codegen->invalid_inst_gen;
2809228978
28093 IrInstruction *uncasted_op = instruction->op->child;28979 IrInstGen *uncasted_op = instruction->op->child;
28094 if (type_is_invalid(uncasted_op->value->type))28980 if (type_is_invalid(uncasted_op->value->type))
28095 return ira->codegen->invalid_instruction;28981 return ira->codegen->invalid_inst_gen;
2809628982
28097 uint32_t vector_len; // UINT32_MAX means not a vector28983 uint32_t vector_len; // UINT32_MAX means not a vector
28098 if (uncasted_op->value->type->id == ZigTypeIdArray &&28984 if (uncasted_op->value->type->id == ZigTypeIdArray &&
...@@ -28108,28 +28994,28 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction...@@ -28108,28 +28994,28 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction
28108 bool is_vector = (vector_len != UINT32_MAX);28994 bool is_vector = (vector_len != UINT32_MAX);
28109 ZigType *op_type = is_vector ? get_vector_type(ira->codegen, vector_len, int_type) : int_type;28995 ZigType *op_type = is_vector ? get_vector_type(ira->codegen, vector_len, int_type) : int_type;
2811028996
28111 IrInstruction *op = ir_implicit_cast(ira, uncasted_op, op_type);28997 IrInstGen *op = ir_implicit_cast(ira, uncasted_op, op_type);
28112 if (type_is_invalid(op->value->type))28998 if (type_is_invalid(op->value->type))
28113 return ira->codegen->invalid_instruction;28999 return ira->codegen->invalid_inst_gen;
2811429000
28115 if (int_type->data.integral.bit_count == 8 || int_type->data.integral.bit_count == 0)29001 if (int_type->data.integral.bit_count == 8 || int_type->data.integral.bit_count == 0)
28116 return op;29002 return op;
2811729003
28118 if (int_type->data.integral.bit_count % 8 != 0) {29004 if (int_type->data.integral.bit_count % 8 != 0) {
28119 ir_add_error(ira, instruction->op,29005 ir_add_error(ira, &instruction->op->base,
28120 buf_sprintf("@byteSwap integer type '%s' has %" PRIu32 " bits which is not evenly divisible by 8",29006 buf_sprintf("@byteSwap integer type '%s' has %" PRIu32 " bits which is not evenly divisible by 8",
28121 buf_ptr(&int_type->name), int_type->data.integral.bit_count));29007 buf_ptr(&int_type->name), int_type->data.integral.bit_count));
28122 return ira->codegen->invalid_instruction;29008 return ira->codegen->invalid_inst_gen;
28123 }29009 }
2812429010
28125 if (instr_is_comptime(op)) {29011 if (instr_is_comptime(op)) {
28126 ZigValue *val = ir_resolve_const(ira, op, UndefOk);29012 ZigValue *val = ir_resolve_const(ira, op, UndefOk);
28127 if (val == nullptr)29013 if (val == nullptr)
28128 return ira->codegen->invalid_instruction;29014 return ira->codegen->invalid_inst_gen;
28129 if (val->special == ConstValSpecialUndef)29015 if (val->special == ConstValSpecialUndef)
28130 return ir_const_undef(ira, &instruction->base, op_type);29016 return ir_const_undef(ira, &instruction->base.base, op_type);
2813129017
28132 IrInstruction *result = ir_const(ira, &instruction->base, op_type);29018 IrInstGen *result = ir_const(ira, &instruction->base.base, op_type);
28133 size_t buf_size = int_type->data.integral.bit_count / 8;29019 size_t buf_size = int_type->data.integral.bit_count / 8;
28134 uint8_t *buf = allocate_nonzero<uint8_t>(buf_size);29020 uint8_t *buf = allocate_nonzero<uint8_t>(buf_size);
28135 if (is_vector) {29021 if (is_vector) {
...@@ -28137,10 +29023,10 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction...@@ -28137,10 +29023,10 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction
28137 result->value->data.x_array.data.s_none.elements = create_const_vals(op_type->data.vector.len);29023 result->value->data.x_array.data.s_none.elements = create_const_vals(op_type->data.vector.len);
28138 for (unsigned i = 0; i < op_type->data.vector.len; i += 1) {29024 for (unsigned i = 0; i < op_type->data.vector.len; i += 1) {
28139 ZigValue *op_elem_val = &val->data.x_array.data.s_none.elements[i];29025 ZigValue *op_elem_val = &val->data.x_array.data.s_none.elements[i];
28140 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, instruction->base.source_node,29026 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, instruction->base.base.source_node,
28141 op_elem_val, UndefOk)))29027 op_elem_val, UndefOk)))
28142 {29028 {
28143 return ira->codegen->invalid_instruction;29029 return ira->codegen->invalid_inst_gen;
28144 }29030 }
28145 ZigValue *result_elem_val = &result->value->data.x_array.data.s_none.elements[i];29031 ZigValue *result_elem_val = &result->value->data.x_array.data.s_none.elements[i];
28146 result_elem_val->type = int_type;29032 result_elem_val->type = int_type;
...@@ -28162,23 +29048,20 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction...@@ -28162,23 +29048,20 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction
28162 return result;29048 return result;
28163 }29049 }
2816429050
28165 IrInstruction *result = ir_build_bswap(&ira->new_irb, instruction->base.scope,29051 return ir_build_bswap_gen(ira, &instruction->base.base, op_type, op);
28166 instruction->base.source_node, nullptr, op);
28167 result->value->type = op_type;
28168 return result;
28169}29052}
2817029053
28171static IrInstruction *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstructionBitReverse *instruction) {29054static IrInstGen *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstSrcBitReverse *instruction) {
28172 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);29055 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
28173 if (type_is_invalid(int_type))29056 if (type_is_invalid(int_type))
28174 return ira->codegen->invalid_instruction;29057 return ira->codegen->invalid_inst_gen;
2817529058
28176 IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);29059 IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
28177 if (type_is_invalid(op->value->type))29060 if (type_is_invalid(op->value->type))
28178 return ira->codegen->invalid_instruction;29061 return ira->codegen->invalid_inst_gen;
2817929062
28180 if (int_type->data.integral.bit_count == 0) {29063 if (int_type->data.integral.bit_count == 0) {
28181 IrInstruction *result = ir_const(ira, &instruction->base, int_type);29064 IrInstGen *result = ir_const(ira, &instruction->base.base, int_type);
28182 bigint_init_unsigned(&result->value->data.x_bigint, 0);29065 bigint_init_unsigned(&result->value->data.x_bigint, 0);
28183 return result;29066 return result;
28184 }29067 }
...@@ -28186,11 +29069,11 @@ static IrInstruction *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstr...@@ -28186,11 +29069,11 @@ static IrInstruction *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstr
28186 if (instr_is_comptime(op)) {29069 if (instr_is_comptime(op)) {
28187 ZigValue *val = ir_resolve_const(ira, op, UndefOk);29070 ZigValue *val = ir_resolve_const(ira, op, UndefOk);
28188 if (val == nullptr)29071 if (val == nullptr)
28189 return ira->codegen->invalid_instruction;29072 return ira->codegen->invalid_inst_gen;
28190 if (val->special == ConstValSpecialUndef)29073 if (val->special == ConstValSpecialUndef)
28191 return ir_const_undef(ira, &instruction->base, int_type);29074 return ir_const_undef(ira, &instruction->base.base, int_type);
2819229075
28193 IrInstruction *result = ir_const(ira, &instruction->base, int_type);29076 IrInstGen *result = ir_const(ira, &instruction->base.base, int_type);
28194 size_t num_bits = int_type->data.integral.bit_count;29077 size_t num_bits = int_type->data.integral.bit_count;
28195 size_t buf_size = (num_bits + 7) / 8;29078 size_t buf_size = (num_bits + 7) / 8;
28196 uint8_t *comptime_buf = allocate_nonzero<uint8_t>(buf_size);29079 uint8_t *comptime_buf = allocate_nonzero<uint8_t>(buf_size);
...@@ -28217,128 +29100,125 @@ static IrInstruction *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstr...@@ -28217,128 +29100,125 @@ static IrInstruction *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstr
28217 return result;29100 return result;
28218 }29101 }
2821929102
28220 IrInstruction *result = ir_build_bit_reverse(&ira->new_irb, instruction->base.scope,29103 return ir_build_bit_reverse_gen(ira, &instruction->base.base, int_type, op);
28221 instruction->base.source_node, nullptr, op);
28222 result->value->type = int_type;
28223 return result;
28224}29104}
2822529105
2822629106
28227static IrInstruction *ir_analyze_instruction_enum_to_int(IrAnalyze *ira, IrInstructionEnumToInt *instruction) {29107static IrInstGen *ir_analyze_instruction_enum_to_int(IrAnalyze *ira, IrInstSrcEnumToInt *instruction) {
28228 IrInstruction *target = instruction->target->child;29108 IrInstGen *target = instruction->target->child;
28229 if (type_is_invalid(target->value->type))29109 if (type_is_invalid(target->value->type))
28230 return ira->codegen->invalid_instruction;29110 return ira->codegen->invalid_inst_gen;
2823129111
28232 return ir_analyze_enum_to_int(ira, &instruction->base, target);29112 return ir_analyze_enum_to_int(ira, &instruction->base.base, target);
28233}29113}
2823429114
28235static IrInstruction *ir_analyze_instruction_int_to_enum(IrAnalyze *ira, IrInstructionIntToEnum *instruction) {29115static IrInstGen *ir_analyze_instruction_int_to_enum(IrAnalyze *ira, IrInstSrcIntToEnum *instruction) {
28236 Error err;29116 Error err;
28237 IrInstruction *dest_type_value = instruction->dest_type->child;29117 IrInstGen *dest_type_value = instruction->dest_type->child;
28238 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);29118 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
28239 if (type_is_invalid(dest_type))29119 if (type_is_invalid(dest_type))
28240 return ira->codegen->invalid_instruction;29120 return ira->codegen->invalid_inst_gen;
2824129121
28242 if (dest_type->id != ZigTypeIdEnum) {29122 if (dest_type->id != ZigTypeIdEnum) {
28243 ir_add_error(ira, instruction->dest_type,29123 ir_add_error(ira, &instruction->dest_type->base,
28244 buf_sprintf("expected enum, found type '%s'", buf_ptr(&dest_type->name)));29124 buf_sprintf("expected enum, found type '%s'", buf_ptr(&dest_type->name)));
28245 return ira->codegen->invalid_instruction;29125 return ira->codegen->invalid_inst_gen;
28246 }29126 }
2824729127
28248 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))29128 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))
28249 return ira->codegen->invalid_instruction;29129 return ira->codegen->invalid_inst_gen;
2825029130
28251 ZigType *tag_type = dest_type->data.enumeration.tag_int_type;29131 ZigType *tag_type = dest_type->data.enumeration.tag_int_type;
2825229132
28253 IrInstruction *target = instruction->target->child;29133 IrInstGen *target = instruction->target->child;
28254 if (type_is_invalid(target->value->type))29134 if (type_is_invalid(target->value->type))
28255 return ira->codegen->invalid_instruction;29135 return ira->codegen->invalid_inst_gen;
2825629136
28257 IrInstruction *casted_target = ir_implicit_cast(ira, target, tag_type);29137 IrInstGen *casted_target = ir_implicit_cast(ira, target, tag_type);
28258 if (type_is_invalid(casted_target->value->type))29138 if (type_is_invalid(casted_target->value->type))
28259 return ira->codegen->invalid_instruction;29139 return ira->codegen->invalid_inst_gen;
2826029140
28261 return ir_analyze_int_to_enum(ira, &instruction->base, casted_target, dest_type);29141 return ir_analyze_int_to_enum(ira, &instruction->base.base, casted_target, dest_type);
28262}29142}
2826329143
28264static IrInstruction *ir_analyze_instruction_check_runtime_scope(IrAnalyze *ira, IrInstructionCheckRuntimeScope *instruction) {29144static IrInstGen *ir_analyze_instruction_check_runtime_scope(IrAnalyze *ira, IrInstSrcCheckRuntimeScope *instruction) {
28265 IrInstruction *block_comptime_inst = instruction->scope_is_comptime->child;29145 IrInstGen *block_comptime_inst = instruction->scope_is_comptime->child;
28266 bool scope_is_comptime;29146 bool scope_is_comptime;
28267 if (!ir_resolve_bool(ira, block_comptime_inst, &scope_is_comptime))29147 if (!ir_resolve_bool(ira, block_comptime_inst, &scope_is_comptime))
28268 return ira->codegen->invalid_instruction;29148 return ira->codegen->invalid_inst_gen;
2826929149
28270 IrInstruction *is_comptime_inst = instruction->is_comptime->child;29150 IrInstGen *is_comptime_inst = instruction->is_comptime->child;
28271 bool is_comptime;29151 bool is_comptime;
28272 if (!ir_resolve_bool(ira, is_comptime_inst, &is_comptime))29152 if (!ir_resolve_bool(ira, is_comptime_inst, &is_comptime))
28273 return ira->codegen->invalid_instruction;29153 return ira->codegen->invalid_inst_gen;
2827429154
28275 if (!scope_is_comptime && is_comptime) {29155 if (!scope_is_comptime && is_comptime) {
28276 ErrorMsg *msg = ir_add_error(ira, &instruction->base,29156 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
28277 buf_sprintf("comptime control flow inside runtime block"));29157 buf_sprintf("comptime control flow inside runtime block"));
28278 add_error_note(ira->codegen, msg, block_comptime_inst->source_node,29158 add_error_note(ira->codegen, msg, block_comptime_inst->base.source_node,
28279 buf_sprintf("runtime block created here"));29159 buf_sprintf("runtime block created here"));
28280 return ira->codegen->invalid_instruction;29160 return ira->codegen->invalid_inst_gen;
28281 }29161 }
2828229162
28283 return ir_const_void(ira, &instruction->base);29163 return ir_const_void(ira, &instruction->base.base);
28284}29164}
2828529165
28286static IrInstruction *ir_analyze_instruction_has_decl(IrAnalyze *ira, IrInstructionHasDecl *instruction) {29166static IrInstGen *ir_analyze_instruction_has_decl(IrAnalyze *ira, IrInstSrcHasDecl *instruction) {
28287 ZigType *container_type = ir_resolve_type(ira, instruction->container->child);29167 ZigType *container_type = ir_resolve_type(ira, instruction->container->child);
28288 if (type_is_invalid(container_type))29168 if (type_is_invalid(container_type))
28289 return ira->codegen->invalid_instruction;29169 return ira->codegen->invalid_inst_gen;
2829029170
28291 Buf *name = ir_resolve_str(ira, instruction->name->child);29171 Buf *name = ir_resolve_str(ira, instruction->name->child);
28292 if (name == nullptr)29172 if (name == nullptr)
28293 return ira->codegen->invalid_instruction;29173 return ira->codegen->invalid_inst_gen;
2829429174
28295 if (!is_container(container_type)) {29175 if (!is_container(container_type)) {
28296 ir_add_error(ira, instruction->container,29176 ir_add_error(ira, &instruction->container->base,
28297 buf_sprintf("expected struct, enum, or union; found '%s'", buf_ptr(&container_type->name)));29177 buf_sprintf("expected struct, enum, or union; found '%s'", buf_ptr(&container_type->name)));
28298 return ira->codegen->invalid_instruction;29178 return ira->codegen->invalid_inst_gen;
28299 }29179 }
2830029180
28301 ScopeDecls *container_scope = get_container_scope(container_type);29181 ScopeDecls *container_scope = get_container_scope(container_type);
28302 Tld *tld = find_container_decl(ira->codegen, container_scope, name);29182 Tld *tld = find_container_decl(ira->codegen, container_scope, name);
28303 if (tld == nullptr)29183 if (tld == nullptr)
28304 return ir_const_bool(ira, &instruction->base, false);29184 return ir_const_bool(ira, &instruction->base.base, false);
2830529185
28306 if (tld->visib_mod == VisibModPrivate && tld->import != get_scope_import(instruction->base.scope)) {29186 if (tld->visib_mod == VisibModPrivate && tld->import != get_scope_import(instruction->base.base.scope)) {
28307 return ir_const_bool(ira, &instruction->base, false);29187 return ir_const_bool(ira, &instruction->base.base, false);
28308 }29188 }
2830929189
28310 return ir_const_bool(ira, &instruction->base, true);29190 return ir_const_bool(ira, &instruction->base.base, true);
28311}29191}
2831229192
28313static IrInstruction *ir_analyze_instruction_undeclared_ident(IrAnalyze *ira, IrInstructionUndeclaredIdent *instruction) {29193static IrInstGen *ir_analyze_instruction_undeclared_ident(IrAnalyze *ira, IrInstSrcUndeclaredIdent *instruction) {
28314 // put a variable of same name with invalid type in global scope29194 // put a variable of same name with invalid type in global scope
28315 // so that future references to this same name will find a variable with an invalid type29195 // so that future references to this same name will find a variable with an invalid type
28316 populate_invalid_variable_in_scope(ira->codegen, instruction->base.scope, instruction->base.source_node,29196 populate_invalid_variable_in_scope(ira->codegen, instruction->base.base.scope,
28317 instruction->name);29197 instruction->base.base.source_node, instruction->name);
28318 ir_add_error(ira, &instruction->base,29198 ir_add_error(ira, &instruction->base.base,
28319 buf_sprintf("use of undeclared identifier '%s'", buf_ptr(instruction->name)));29199 buf_sprintf("use of undeclared identifier '%s'", buf_ptr(instruction->name)));
28320 return ira->codegen->invalid_instruction;29200 return ira->codegen->invalid_inst_gen;
28321}29201}
2832229202
28323static IrInstruction *ir_analyze_instruction_end_expr(IrAnalyze *ira, IrInstructionEndExpr *instruction) {29203static IrInstGen *ir_analyze_instruction_end_expr(IrAnalyze *ira, IrInstSrcEndExpr *instruction) {
28324 IrInstruction *value = instruction->value->child;29204 IrInstGen *value = instruction->value->child;
28325 if (type_is_invalid(value->value->type))29205 if (type_is_invalid(value->value->type))
28326 return ira->codegen->invalid_instruction;29206 return ira->codegen->invalid_inst_gen;
2832729207
28328 bool was_written = instruction->result_loc->written;29208 bool was_written = instruction->result_loc->written;
28329 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,29209 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
28330 value->value->type, value, false, true);29210 value->value->type, value, false, true);
28331 if (result_loc != nullptr) {29211 if (result_loc != nullptr) {
28332 if (type_is_invalid(result_loc->value->type))29212 if (type_is_invalid(result_loc->value->type))
28333 return ira->codegen->invalid_instruction;29213 return ira->codegen->invalid_inst_gen;
28334 if (result_loc->value->type->id == ZigTypeIdUnreachable)29214 if (result_loc->value->type->id == ZigTypeIdUnreachable)
28335 return result_loc;29215 return result_loc;
2833629216
28337 if (!was_written || instruction->result_loc->id == ResultLocIdPeer) {29217 if (!was_written || instruction->result_loc->id == ResultLocIdPeer) {
28338 IrInstruction *store_ptr = ir_analyze_store_ptr(ira, &instruction->base, result_loc, value,29218 IrInstGen *store_ptr = ir_analyze_store_ptr(ira, &instruction->base.base, result_loc, value,
28339 instruction->result_loc->allow_write_through_const);29219 instruction->result_loc->allow_write_through_const);
28340 if (type_is_invalid(store_ptr->value->type)) {29220 if (type_is_invalid(store_ptr->value->type)) {
28341 return ira->codegen->invalid_instruction;29221 return ira->codegen->invalid_inst_gen;
28342 }29222 }
28343 }29223 }
2834429224
...@@ -28353,101 +29233,100 @@ static IrInstruction *ir_analyze_instruction_end_expr(IrAnalyze *ira, IrInstruct...@@ -28353,101 +29233,100 @@ static IrInstruction *ir_analyze_instruction_end_expr(IrAnalyze *ira, IrInstruct
28353 }29233 }
28354 }29234 }
2835529235
28356 return ir_const_void(ira, &instruction->base);29236 return ir_const_void(ira, &instruction->base.base);
28357}29237}
2835829238
28359static IrInstruction *ir_analyze_instruction_implicit_cast(IrAnalyze *ira, IrInstructionImplicitCast *instruction) {29239static IrInstGen *ir_analyze_instruction_implicit_cast(IrAnalyze *ira, IrInstSrcImplicitCast *instruction) {
28360 IrInstruction *operand = instruction->operand->child;29240 IrInstGen *operand = instruction->operand->child;
28361 if (type_is_invalid(operand->value->type))29241 if (type_is_invalid(operand->value->type))
28362 return operand;29242 return operand;
2836329243
28364 ZigType *dest_type = ir_resolve_type(ira, instruction->result_loc_cast->base.source_instruction->child);29244 ZigType *dest_type = ir_resolve_type(ira, instruction->result_loc_cast->base.source_instruction->child);
28365 if (type_is_invalid(dest_type))29245 if (type_is_invalid(dest_type))
28366 return ira->codegen->invalid_instruction;29246 return ira->codegen->invalid_inst_gen;
28367 return ir_implicit_cast2(ira, &instruction->base, operand, dest_type);29247 return ir_implicit_cast2(ira, &instruction->base.base, operand, dest_type);
28368}29248}
2836929249
28370static IrInstruction *ir_analyze_instruction_bit_cast_src(IrAnalyze *ira, IrInstructionBitCastSrc *instruction) {29250static IrInstGen *ir_analyze_instruction_bit_cast_src(IrAnalyze *ira, IrInstSrcBitCast *instruction) {
28371 IrInstruction *operand = instruction->operand->child;29251 IrInstGen *operand = instruction->operand->child;
28372 if (type_is_invalid(operand->value->type))29252 if (type_is_invalid(operand->value->type))
28373 return operand;29253 return operand;
2837429254
28375 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base,29255 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base,
28376 &instruction->result_loc_bit_cast->base, operand->value->type, operand, false, true);29256 &instruction->result_loc_bit_cast->base, operand->value->type, operand, false, true);
28377 if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)))29257 if (result_loc != nullptr &&
29258 (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable))
29259 {
28378 return result_loc;29260 return result_loc;
29261 }
2837929262
28380 ZigType *dest_type = ir_resolve_type(ira,29263 ZigType *dest_type = ir_resolve_type(ira,
28381 instruction->result_loc_bit_cast->base.source_instruction->child);29264 instruction->result_loc_bit_cast->base.source_instruction->child);
28382 if (type_is_invalid(dest_type))29265 if (type_is_invalid(dest_type))
28383 return ira->codegen->invalid_instruction;29266 return ira->codegen->invalid_inst_gen;
28384 return ir_analyze_bit_cast(ira, &instruction->base, operand, dest_type);29267 return ir_analyze_bit_cast(ira, &instruction->base.base, operand, dest_type);
28385}29268}
2838629269
28387static IrInstruction *ir_analyze_instruction_union_init_named_field(IrAnalyze *ira,29270static IrInstGen *ir_analyze_instruction_union_init_named_field(IrAnalyze *ira,
28388 IrInstructionUnionInitNamedField *instruction)29271 IrInstSrcUnionInitNamedField *instruction)
28389{29272{
28390 ZigType *union_type = ir_resolve_type(ira, instruction->union_type->child);29273 ZigType *union_type = ir_resolve_type(ira, instruction->union_type->child);
28391 if (type_is_invalid(union_type))29274 if (type_is_invalid(union_type))
28392 return ira->codegen->invalid_instruction;29275 return ira->codegen->invalid_inst_gen;
2839329276
28394 if (union_type->id != ZigTypeIdUnion) {29277 if (union_type->id != ZigTypeIdUnion) {
28395 ir_add_error(ira, instruction->union_type,29278 ir_add_error(ira, &instruction->union_type->base,
28396 buf_sprintf("non-union type '%s' passed to @unionInit", buf_ptr(&union_type->name)));29279 buf_sprintf("non-union type '%s' passed to @unionInit", buf_ptr(&union_type->name)));
28397 return ira->codegen->invalid_instruction;29280 return ira->codegen->invalid_inst_gen;
28398 }29281 }
2839929282
28400 Buf *field_name = ir_resolve_str(ira, instruction->field_name->child);29283 Buf *field_name = ir_resolve_str(ira, instruction->field_name->child);
28401 if (field_name == nullptr)29284 if (field_name == nullptr)
28402 return ira->codegen->invalid_instruction;29285 return ira->codegen->invalid_inst_gen;
2840329286
28404 IrInstruction *field_result_loc = instruction->field_result_loc->child;29287 IrInstGen *field_result_loc = instruction->field_result_loc->child;
28405 if (type_is_invalid(field_result_loc->value->type))29288 if (type_is_invalid(field_result_loc->value->type))
28406 return ira->codegen->invalid_instruction;29289 return ira->codegen->invalid_inst_gen;
2840729290
28408 IrInstruction *result_loc = instruction->result_loc->child;29291 IrInstGen *result_loc = instruction->result_loc->child;
28409 if (type_is_invalid(result_loc->value->type))29292 if (type_is_invalid(result_loc->value->type))
28410 return ira->codegen->invalid_instruction;29293 return ira->codegen->invalid_inst_gen;
2841129294
28412 return ir_analyze_union_init(ira, &instruction->base, instruction->base.source_node,29295 return ir_analyze_union_init(ira, &instruction->base.base, instruction->base.base.source_node,
28413 union_type, field_name, field_result_loc, result_loc);29296 union_type, field_name, field_result_loc, result_loc);
28414}29297}
2841529298
28416static IrInstruction *ir_analyze_instruction_suspend_begin(IrAnalyze *ira, IrInstructionSuspendBegin *instruction) {29299static IrInstGen *ir_analyze_instruction_suspend_begin(IrAnalyze *ira, IrInstSrcSuspendBegin *instruction) {
28417 IrInstructionSuspendBegin *result = ir_build_suspend_begin(&ira->new_irb, instruction->base.scope,29300 return ir_build_suspend_begin_gen(ira, &instruction->base.base);
28418 instruction->base.source_node);
28419 return &result->base;
28420}29301}
2842129302
28422static IrInstruction *ir_analyze_instruction_suspend_finish(IrAnalyze *ira,29303static IrInstGen *ir_analyze_instruction_suspend_finish(IrAnalyze *ira, IrInstSrcSuspendFinish *instruction) {
28423 IrInstructionSuspendFinish *instruction)29304 IrInstGen *begin_base = instruction->begin->base.child;
28424{
28425 IrInstruction *begin_base = instruction->begin->base.child;
28426 if (type_is_invalid(begin_base->value->type))29305 if (type_is_invalid(begin_base->value->type))
28427 return ira->codegen->invalid_instruction;29306 return ira->codegen->invalid_inst_gen;
28428 ir_assert(begin_base->id == IrInstructionIdSuspendBegin, &instruction->base);29307 ir_assert(begin_base->id == IrInstGenIdSuspendBegin, &instruction->base.base);
28429 IrInstructionSuspendBegin *begin = reinterpret_cast<IrInstructionSuspendBegin *>(begin_base);29308 IrInstGenSuspendBegin *begin = reinterpret_cast<IrInstGenSuspendBegin *>(begin_base);
2843029309
28431 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);29310 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
28432 ir_assert(fn_entry != nullptr, &instruction->base);29311 ir_assert(fn_entry != nullptr, &instruction->base.base);
2843329312
28434 if (fn_entry->inferred_async_node == nullptr) {29313 if (fn_entry->inferred_async_node == nullptr) {
28435 fn_entry->inferred_async_node = instruction->base.source_node;29314 fn_entry->inferred_async_node = instruction->base.base.source_node;
28436 }29315 }
2843729316
28438 return ir_build_suspend_finish(&ira->new_irb, instruction->base.scope, instruction->base.source_node, begin);29317 return ir_build_suspend_finish_gen(ira, &instruction->base.base, begin);
28439}29318}
2844029319
28441static IrInstruction *analyze_frame_ptr_to_anyframe_T(IrAnalyze *ira, IrInstruction *source_instr,29320static IrInstGen *analyze_frame_ptr_to_anyframe_T(IrAnalyze *ira, IrInst* source_instr,
28442 IrInstruction *frame_ptr, ZigFn **target_fn)29321 IrInstGen *frame_ptr, ZigFn **target_fn)
28443{29322{
28444 if (type_is_invalid(frame_ptr->value->type))29323 if (type_is_invalid(frame_ptr->value->type))
28445 return ira->codegen->invalid_instruction;29324 return ira->codegen->invalid_inst_gen;
2844629325
28447 *target_fn = nullptr;29326 *target_fn = nullptr;
2844829327
28449 ZigType *result_type;29328 ZigType *result_type;
28450 IrInstruction *frame;29329 IrInstGen *frame;
28451 if (frame_ptr->value->type->id == ZigTypeIdPointer &&29330 if (frame_ptr->value->type->id == ZigTypeIdPointer &&
28452 frame_ptr->value->type->data.pointer.ptr_len == PtrLenSingle &&29331 frame_ptr->value->type->data.pointer.ptr_len == PtrLenSingle &&
28453 frame_ptr->value->type->data.pointer.child_type->id == ZigTypeIdFnFrame)29332 frame_ptr->value->type->data.pointer.child_type->id == ZigTypeIdFnFrame)
...@@ -28470,38 +29349,38 @@ static IrInstruction *analyze_frame_ptr_to_anyframe_T(IrAnalyze *ira, IrInstruct...@@ -28470,38 +29349,38 @@ static IrInstruction *analyze_frame_ptr_to_anyframe_T(IrAnalyze *ira, IrInstruct
28470 {29349 {
28471 ir_add_error(ira, source_instr,29350 ir_add_error(ira, source_instr,
28472 buf_sprintf("expected anyframe->T, found '%s'", buf_ptr(&frame->value->type->name)));29351 buf_sprintf("expected anyframe->T, found '%s'", buf_ptr(&frame->value->type->name)));
28473 return ira->codegen->invalid_instruction;29352 return ira->codegen->invalid_inst_gen;
28474 } else {29353 } else {
28475 result_type = frame->value->type->data.any_frame.result_type;29354 result_type = frame->value->type->data.any_frame.result_type;
28476 }29355 }
28477 }29356 }
2847829357
28479 ZigType *any_frame_type = get_any_frame_type(ira->codegen, result_type);29358 ZigType *any_frame_type = get_any_frame_type(ira->codegen, result_type);
28480 IrInstruction *casted_frame = ir_implicit_cast(ira, frame, any_frame_type);29359 IrInstGen *casted_frame = ir_implicit_cast(ira, frame, any_frame_type);
28481 if (type_is_invalid(casted_frame->value->type))29360 if (type_is_invalid(casted_frame->value->type))
28482 return ira->codegen->invalid_instruction;29361 return ira->codegen->invalid_inst_gen;
2848329362
28484 return casted_frame;29363 return casted_frame;
28485}29364}
2848629365
28487static IrInstruction *ir_analyze_instruction_await(IrAnalyze *ira, IrInstructionAwaitSrc *instruction) {29366static IrInstGen *ir_analyze_instruction_await(IrAnalyze *ira, IrInstSrcAwait *instruction) {
28488 IrInstruction *operand = instruction->frame->child;29367 IrInstGen *operand = instruction->frame->child;
28489 if (type_is_invalid(operand->value->type))29368 if (type_is_invalid(operand->value->type))
28490 return ira->codegen->invalid_instruction;29369 return ira->codegen->invalid_inst_gen;
28491 ZigFn *target_fn;29370 ZigFn *target_fn;
28492 IrInstruction *frame = analyze_frame_ptr_to_anyframe_T(ira, &instruction->base, operand, &target_fn);29371 IrInstGen *frame = analyze_frame_ptr_to_anyframe_T(ira, &instruction->base.base, operand, &target_fn);
28493 if (type_is_invalid(frame->value->type))29372 if (type_is_invalid(frame->value->type))
28494 return ira->codegen->invalid_instruction;29373 return ira->codegen->invalid_inst_gen;
2849529374
28496 ZigType *result_type = frame->value->type->data.any_frame.result_type;29375 ZigType *result_type = frame->value->type->data.any_frame.result_type;
2849729376
28498 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);29377 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
28499 ir_assert(fn_entry != nullptr, &instruction->base);29378 ir_assert(fn_entry != nullptr, &instruction->base.base);
2850029379
28501 // If it's not @Frame(func) then it's definitely a suspend point29380 // If it's not @Frame(func) then it's definitely a suspend point
28502 if (target_fn == nullptr) {29381 if (target_fn == nullptr) {
28503 if (fn_entry->inferred_async_node == nullptr) {29382 if (fn_entry->inferred_async_node == nullptr) {
28504 fn_entry->inferred_async_node = instruction->base.source_node;29383 fn_entry->inferred_async_node = instruction->base.base.source_node;
28505 }29384 }
28506 }29385 }
2850729386
...@@ -28509,401 +29388,367 @@ static IrInstruction *ir_analyze_instruction_await(IrAnalyze *ira, IrInstruction...@@ -28509,401 +29388,367 @@ static IrInstruction *ir_analyze_instruction_await(IrAnalyze *ira, IrInstruction
28509 fn_entry->calls_or_awaits_errorable_fn = true;29388 fn_entry->calls_or_awaits_errorable_fn = true;
28510 }29389 }
2851129390
28512 IrInstruction *result_loc;29391 IrInstGen *result_loc;
28513 if (type_has_bits(result_type)) {29392 if (type_has_bits(result_type)) {
28514 result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,29393 result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
28515 result_type, nullptr, true, true);29394 result_type, nullptr, true, true);
28516 if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)))29395 if (result_loc != nullptr &&
29396 (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable))
29397 {
28517 return result_loc;29398 return result_loc;
29399 }
28518 } else {29400 } else {
28519 result_loc = nullptr;29401 result_loc = nullptr;
28520 }29402 }
2852129403
28522 IrInstructionAwaitGen *result = ir_build_await_gen(ira, &instruction->base, frame, result_type, result_loc);29404 IrInstGenAwait *result = ir_build_await_gen(ira, &instruction->base.base, frame, result_type, result_loc);
28523 result->target_fn = target_fn;29405 result->target_fn = target_fn;
28524 fn_entry->await_list.append(result);29406 fn_entry->await_list.append(result);
28525 return ir_finish_anal(ira, &result->base);29407 return ir_finish_anal(ira, &result->base);
28526}29408}
2852729409
28528static IrInstruction *ir_analyze_instruction_resume(IrAnalyze *ira, IrInstructionResume *instruction) {29410static IrInstGen *ir_analyze_instruction_resume(IrAnalyze *ira, IrInstSrcResume *instruction) {
28529 IrInstruction *frame_ptr = instruction->frame->child;29411 IrInstGen *frame_ptr = instruction->frame->child;
28530 if (type_is_invalid(frame_ptr->value->type))29412 if (type_is_invalid(frame_ptr->value->type))
28531 return ira->codegen->invalid_instruction;29413 return ira->codegen->invalid_inst_gen;
2853229414
28533 IrInstruction *frame;29415 IrInstGen *frame;
28534 if (frame_ptr->value->type->id == ZigTypeIdPointer &&29416 if (frame_ptr->value->type->id == ZigTypeIdPointer &&
28535 frame_ptr->value->type->data.pointer.ptr_len == PtrLenSingle &&29417 frame_ptr->value->type->data.pointer.ptr_len == PtrLenSingle &&
28536 frame_ptr->value->type->data.pointer.child_type->id == ZigTypeIdFnFrame)29418 frame_ptr->value->type->data.pointer.child_type->id == ZigTypeIdFnFrame)
28537 {29419 {
28538 frame = frame_ptr;29420 frame = frame_ptr;
28539 } else {29421 } else {
28540 frame = ir_get_deref(ira, &instruction->base, frame_ptr, nullptr);29422 frame = ir_get_deref(ira, &instruction->base.base, frame_ptr, nullptr);
28541 }29423 }
2854229424
28543 ZigType *any_frame_type = get_any_frame_type(ira->codegen, nullptr);29425 ZigType *any_frame_type = get_any_frame_type(ira->codegen, nullptr);
28544 IrInstruction *casted_frame = ir_implicit_cast(ira, frame, any_frame_type);29426 IrInstGen *casted_frame = ir_implicit_cast(ira, frame, any_frame_type);
28545 if (type_is_invalid(casted_frame->value->type))29427 if (type_is_invalid(casted_frame->value->type))
28546 return ira->codegen->invalid_instruction;29428 return ira->codegen->invalid_inst_gen;
2854729429
28548 return ir_build_resume(&ira->new_irb, instruction->base.scope, instruction->base.source_node, casted_frame);29430 return ir_build_resume_gen(ira, &instruction->base.base, casted_frame);
28549}29431}
2855029432
28551static IrInstruction *ir_analyze_instruction_spill_begin(IrAnalyze *ira, IrInstructionSpillBegin *instruction) {29433static IrInstGen *ir_analyze_instruction_spill_begin(IrAnalyze *ira, IrInstSrcSpillBegin *instruction) {
28552 if (ir_should_inline(ira->new_irb.exec, instruction->base.scope))29434 if (ir_should_inline(ira->old_irb.exec, instruction->base.base.scope))
28553 return ir_const_void(ira, &instruction->base);29435 return ir_const_void(ira, &instruction->base.base);
2855429436
28555 IrInstruction *operand = instruction->operand->child;29437 IrInstGen *operand = instruction->operand->child;
28556 if (type_is_invalid(operand->value->type))29438 if (type_is_invalid(operand->value->type))
28557 return ira->codegen->invalid_instruction;29439 return ira->codegen->invalid_inst_gen;
2855829440
28559 if (!type_has_bits(operand->value->type))29441 if (!type_has_bits(operand->value->type))
28560 return ir_const_void(ira, &instruction->base);29442 return ir_const_void(ira, &instruction->base.base);
2856129443
28562 ir_assert(instruction->spill_id == SpillIdRetErrCode, &instruction->base);29444 ir_assert(instruction->spill_id == SpillIdRetErrCode, &instruction->base.base);
28563 ira->new_irb.exec->need_err_code_spill = true;29445 ira->new_irb.exec->need_err_code_spill = true;
2856429446
28565 IrInstructionSpillBegin *result = ir_build_spill_begin(&ira->new_irb, instruction->base.scope,29447 return ir_build_spill_begin_gen(ira, &instruction->base.base, operand, instruction->spill_id);
28566 instruction->base.source_node, operand, instruction->spill_id);
28567 return &result->base;
28568}29448}
2856929449
28570static IrInstruction *ir_analyze_instruction_spill_end(IrAnalyze *ira, IrInstructionSpillEnd *instruction) {29450static IrInstGen *ir_analyze_instruction_spill_end(IrAnalyze *ira, IrInstSrcSpillEnd *instruction) {
28571 IrInstruction *operand = instruction->begin->operand->child;29451 IrInstGen *operand = instruction->begin->operand->child;
28572 if (type_is_invalid(operand->value->type))29452 if (type_is_invalid(operand->value->type))
28573 return ira->codegen->invalid_instruction;29453 return ira->codegen->invalid_inst_gen;
2857429454
28575 if (ir_should_inline(ira->new_irb.exec, instruction->base.scope) || !type_has_bits(operand->value->type))29455 if (ir_should_inline(ira->old_irb.exec, instruction->base.base.scope) || !type_has_bits(operand->value->type))
28576 return operand;29456 return operand;
2857729457
28578 ir_assert(instruction->begin->base.child->id == IrInstructionIdSpillBegin, &instruction->base);29458 ir_assert(instruction->begin->base.child->id == IrInstGenIdSpillBegin, &instruction->base.base);
28579 IrInstructionSpillBegin *begin = reinterpret_cast<IrInstructionSpillBegin *>(instruction->begin->base.child);29459 IrInstGenSpillBegin *begin = reinterpret_cast<IrInstGenSpillBegin *>(instruction->begin->base.child);
2858029460
28581 IrInstruction *result = ir_build_spill_end(&ira->new_irb, instruction->base.scope,29461 return ir_build_spill_end_gen(ira, &instruction->base.base, begin, operand->value->type);
28582 instruction->base.source_node, begin);
28583 result->value->type = operand->value->type;
28584 return result;
28585}29462}
2858629463
28587static IrInstruction *ir_analyze_instruction_base(IrAnalyze *ira, IrInstruction *instruction) {29464static IrInstGen *ir_analyze_instruction_base(IrAnalyze *ira, IrInstSrc *instruction) {
28588 switch (instruction->id) {29465 switch (instruction->id) {
28589 case IrInstructionIdInvalid:29466 case IrInstSrcIdInvalid:
28590 case IrInstructionIdWidenOrShorten:
28591 case IrInstructionIdStructFieldPtr:
28592 case IrInstructionIdUnionFieldPtr:
28593 case IrInstructionIdOptionalWrap:
28594 case IrInstructionIdErrWrapCode:
28595 case IrInstructionIdErrWrapPayload:
28596 case IrInstructionIdCast:
28597 case IrInstructionIdDeclVarGen:
28598 case IrInstructionIdPtrCastGen:
28599 case IrInstructionIdCmpxchgGen:
28600 case IrInstructionIdArrayToVector:
28601 case IrInstructionIdVectorToArray:
28602 case IrInstructionIdPtrOfArrayToSlice:
28603 case IrInstructionIdAssertZero:
28604 case IrInstructionIdAssertNonNull:
28605 case IrInstructionIdResizeSlice:
28606 case IrInstructionIdLoadPtrGen:
28607 case IrInstructionIdBitCastGen:
28608 case IrInstructionIdCallGen:
28609 case IrInstructionIdReturnPtr:
28610 case IrInstructionIdAllocaGen:
28611 case IrInstructionIdSliceGen:
28612 case IrInstructionIdRefGen:
28613 case IrInstructionIdTestErrGen:
28614 case IrInstructionIdFrameSizeGen:
28615 case IrInstructionIdAwaitGen:
28616 case IrInstructionIdSplatGen:
28617 case IrInstructionIdVectorExtractElem:
28618 case IrInstructionIdVectorStoreElem:
28619 case IrInstructionIdAsmGen:
28620 zig_unreachable();29467 zig_unreachable();
2862129468
28622 case IrInstructionIdReturn:29469 case IrInstSrcIdReturn:
28623 return ir_analyze_instruction_return(ira, (IrInstructionReturn *)instruction);29470 return ir_analyze_instruction_return(ira, (IrInstSrcReturn *)instruction);
28624 case IrInstructionIdConst:29471 case IrInstSrcIdConst:
28625 return ir_analyze_instruction_const(ira, (IrInstructionConst *)instruction);29472 return ir_analyze_instruction_const(ira, (IrInstSrcConst *)instruction);
28626 case IrInstructionIdUnOp:29473 case IrInstSrcIdUnOp:
28627 return ir_analyze_instruction_un_op(ira, (IrInstructionUnOp *)instruction);29474 return ir_analyze_instruction_un_op(ira, (IrInstSrcUnOp *)instruction);
28628 case IrInstructionIdBinOp:29475 case IrInstSrcIdBinOp:
28629 return ir_analyze_instruction_bin_op(ira, (IrInstructionBinOp *)instruction);29476 return ir_analyze_instruction_bin_op(ira, (IrInstSrcBinOp *)instruction);
28630 case IrInstructionIdMergeErrSets:29477 case IrInstSrcIdMergeErrSets:
28631 return ir_analyze_instruction_merge_err_sets(ira, (IrInstructionMergeErrSets *)instruction);29478 return ir_analyze_instruction_merge_err_sets(ira, (IrInstSrcMergeErrSets *)instruction);
28632 case IrInstructionIdDeclVarSrc:29479 case IrInstSrcIdDeclVar:
28633 return ir_analyze_instruction_decl_var(ira, (IrInstructionDeclVarSrc *)instruction);29480 return ir_analyze_instruction_decl_var(ira, (IrInstSrcDeclVar *)instruction);
28634 case IrInstructionIdLoadPtr:29481 case IrInstSrcIdLoadPtr:
28635 return ir_analyze_instruction_load_ptr(ira, (IrInstructionLoadPtr *)instruction);29482 return ir_analyze_instruction_load_ptr(ira, (IrInstSrcLoadPtr *)instruction);
28636 case IrInstructionIdStorePtr:29483 case IrInstSrcIdStorePtr:
28637 return ir_analyze_instruction_store_ptr(ira, (IrInstructionStorePtr *)instruction);29484 return ir_analyze_instruction_store_ptr(ira, (IrInstSrcStorePtr *)instruction);
28638 case IrInstructionIdElemPtr:29485 case IrInstSrcIdElemPtr:
28639 return ir_analyze_instruction_elem_ptr(ira, (IrInstructionElemPtr *)instruction);29486 return ir_analyze_instruction_elem_ptr(ira, (IrInstSrcElemPtr *)instruction);
28640 case IrInstructionIdVarPtr:29487 case IrInstSrcIdVarPtr:
28641 return ir_analyze_instruction_var_ptr(ira, (IrInstructionVarPtr *)instruction);29488 return ir_analyze_instruction_var_ptr(ira, (IrInstSrcVarPtr *)instruction);
28642 case IrInstructionIdFieldPtr:29489 case IrInstSrcIdFieldPtr:
28643 return ir_analyze_instruction_field_ptr(ira, (IrInstructionFieldPtr *)instruction);29490 return ir_analyze_instruction_field_ptr(ira, (IrInstSrcFieldPtr *)instruction);
28644 case IrInstructionIdCallSrc:29491 case IrInstSrcIdCall:
28645 return ir_analyze_instruction_call(ira, (IrInstructionCallSrc *)instruction);29492 return ir_analyze_instruction_call(ira, (IrInstSrcCall *)instruction);
28646 case IrInstructionIdCallSrcArgs:29493 case IrInstSrcIdCallArgs:
28647 return ir_analyze_instruction_call_args(ira, (IrInstructionCallSrcArgs *)instruction);29494 return ir_analyze_instruction_call_args(ira, (IrInstSrcCallArgs *)instruction);
28648 case IrInstructionIdCallExtra:29495 case IrInstSrcIdCallExtra:
28649 return ir_analyze_instruction_call_extra(ira, (IrInstructionCallExtra *)instruction);29496 return ir_analyze_instruction_call_extra(ira, (IrInstSrcCallExtra *)instruction);
28650 case IrInstructionIdBr:29497 case IrInstSrcIdBr:
28651 return ir_analyze_instruction_br(ira, (IrInstructionBr *)instruction);29498 return ir_analyze_instruction_br(ira, (IrInstSrcBr *)instruction);
28652 case IrInstructionIdCondBr:29499 case IrInstSrcIdCondBr:
28653 return ir_analyze_instruction_cond_br(ira, (IrInstructionCondBr *)instruction);29500 return ir_analyze_instruction_cond_br(ira, (IrInstSrcCondBr *)instruction);
28654 case IrInstructionIdUnreachable:29501 case IrInstSrcIdUnreachable:
28655 return ir_analyze_instruction_unreachable(ira, (IrInstructionUnreachable *)instruction);29502 return ir_analyze_instruction_unreachable(ira, (IrInstSrcUnreachable *)instruction);
28656 case IrInstructionIdPhi:29503 case IrInstSrcIdPhi:
28657 return ir_analyze_instruction_phi(ira, (IrInstructionPhi *)instruction);29504 return ir_analyze_instruction_phi(ira, (IrInstSrcPhi *)instruction);
28658 case IrInstructionIdTypeOf:29505 case IrInstSrcIdTypeOf:
28659 return ir_analyze_instruction_typeof(ira, (IrInstructionTypeOf *)instruction);29506 return ir_analyze_instruction_typeof(ira, (IrInstSrcTypeOf *)instruction);
28660 case IrInstructionIdSetCold:29507 case IrInstSrcIdSetCold:
28661 return ir_analyze_instruction_set_cold(ira, (IrInstructionSetCold *)instruction);29508 return ir_analyze_instruction_set_cold(ira, (IrInstSrcSetCold *)instruction);
28662 case IrInstructionIdSetRuntimeSafety:29509 case IrInstSrcIdSetRuntimeSafety:
28663 return ir_analyze_instruction_set_runtime_safety(ira, (IrInstructionSetRuntimeSafety *)instruction);29510 return ir_analyze_instruction_set_runtime_safety(ira, (IrInstSrcSetRuntimeSafety *)instruction);
28664 case IrInstructionIdSetFloatMode:29511 case IrInstSrcIdSetFloatMode:
28665 return ir_analyze_instruction_set_float_mode(ira, (IrInstructionSetFloatMode *)instruction);29512 return ir_analyze_instruction_set_float_mode(ira, (IrInstSrcSetFloatMode *)instruction);
28666 case IrInstructionIdAnyFrameType:29513 case IrInstSrcIdAnyFrameType:
28667 return ir_analyze_instruction_any_frame_type(ira, (IrInstructionAnyFrameType *)instruction);29514 return ir_analyze_instruction_any_frame_type(ira, (IrInstSrcAnyFrameType *)instruction);
28668 case IrInstructionIdSliceType:29515 case IrInstSrcIdSliceType:
28669 return ir_analyze_instruction_slice_type(ira, (IrInstructionSliceType *)instruction);29516 return ir_analyze_instruction_slice_type(ira, (IrInstSrcSliceType *)instruction);
28670 case IrInstructionIdAsmSrc:29517 case IrInstSrcIdAsm:
28671 return ir_analyze_instruction_asm(ira, (IrInstructionAsmSrc *)instruction);29518 return ir_analyze_instruction_asm(ira, (IrInstSrcAsm *)instruction);
28672 case IrInstructionIdArrayType:29519 case IrInstSrcIdArrayType:
28673 return ir_analyze_instruction_array_type(ira, (IrInstructionArrayType *)instruction);29520 return ir_analyze_instruction_array_type(ira, (IrInstSrcArrayType *)instruction);
28674 case IrInstructionIdSizeOf:29521 case IrInstSrcIdSizeOf:
28675 return ir_analyze_instruction_size_of(ira, (IrInstructionSizeOf *)instruction);29522 return ir_analyze_instruction_size_of(ira, (IrInstSrcSizeOf *)instruction);
28676 case IrInstructionIdTestNonNull:29523 case IrInstSrcIdTestNonNull:
28677 return ir_analyze_instruction_test_non_null(ira, (IrInstructionTestNonNull *)instruction);29524 return ir_analyze_instruction_test_non_null(ira, (IrInstSrcTestNonNull *)instruction);
28678 case IrInstructionIdOptionalUnwrapPtr:29525 case IrInstSrcIdOptionalUnwrapPtr:
28679 return ir_analyze_instruction_optional_unwrap_ptr(ira, (IrInstructionOptionalUnwrapPtr *)instruction);29526 return ir_analyze_instruction_optional_unwrap_ptr(ira, (IrInstSrcOptionalUnwrapPtr *)instruction);
28680 case IrInstructionIdClz:29527 case IrInstSrcIdClz:
28681 return ir_analyze_instruction_clz(ira, (IrInstructionClz *)instruction);29528 return ir_analyze_instruction_clz(ira, (IrInstSrcClz *)instruction);
28682 case IrInstructionIdCtz:29529 case IrInstSrcIdCtz:
28683 return ir_analyze_instruction_ctz(ira, (IrInstructionCtz *)instruction);29530 return ir_analyze_instruction_ctz(ira, (IrInstSrcCtz *)instruction);
28684 case IrInstructionIdPopCount:29531 case IrInstSrcIdPopCount:
28685 return ir_analyze_instruction_pop_count(ira, (IrInstructionPopCount *)instruction);29532 return ir_analyze_instruction_pop_count(ira, (IrInstSrcPopCount *)instruction);
28686 case IrInstructionIdBswap:29533 case IrInstSrcIdBswap:
28687 return ir_analyze_instruction_bswap(ira, (IrInstructionBswap *)instruction);29534 return ir_analyze_instruction_bswap(ira, (IrInstSrcBswap *)instruction);
28688 case IrInstructionIdBitReverse:29535 case IrInstSrcIdBitReverse:
28689 return ir_analyze_instruction_bit_reverse(ira, (IrInstructionBitReverse *)instruction);29536 return ir_analyze_instruction_bit_reverse(ira, (IrInstSrcBitReverse *)instruction);
28690 case IrInstructionIdSwitchBr:29537 case IrInstSrcIdSwitchBr:
28691 return ir_analyze_instruction_switch_br(ira, (IrInstructionSwitchBr *)instruction);29538 return ir_analyze_instruction_switch_br(ira, (IrInstSrcSwitchBr *)instruction);
28692 case IrInstructionIdSwitchTarget:29539 case IrInstSrcIdSwitchTarget:
28693 return ir_analyze_instruction_switch_target(ira, (IrInstructionSwitchTarget *)instruction);29540 return ir_analyze_instruction_switch_target(ira, (IrInstSrcSwitchTarget *)instruction);
28694 case IrInstructionIdSwitchVar:29541 case IrInstSrcIdSwitchVar:
28695 return ir_analyze_instruction_switch_var(ira, (IrInstructionSwitchVar *)instruction);29542 return ir_analyze_instruction_switch_var(ira, (IrInstSrcSwitchVar *)instruction);
28696 case IrInstructionIdSwitchElseVar:29543 case IrInstSrcIdSwitchElseVar:
28697 return ir_analyze_instruction_switch_else_var(ira, (IrInstructionSwitchElseVar *)instruction);29544 return ir_analyze_instruction_switch_else_var(ira, (IrInstSrcSwitchElseVar *)instruction);
28698 case IrInstructionIdUnionTag:29545 case IrInstSrcIdImport:
28699 return ir_analyze_instruction_union_tag(ira, (IrInstructionUnionTag *)instruction);29546 return ir_analyze_instruction_import(ira, (IrInstSrcImport *)instruction);
28700 case IrInstructionIdImport:29547 case IrInstSrcIdRef:
28701 return ir_analyze_instruction_import(ira, (IrInstructionImport *)instruction);29548 return ir_analyze_instruction_ref(ira, (IrInstSrcRef *)instruction);
28702 case IrInstructionIdRef:29549 case IrInstSrcIdContainerInitList:
28703 return ir_analyze_instruction_ref(ira, (IrInstructionRef *)instruction);29550 return ir_analyze_instruction_container_init_list(ira, (IrInstSrcContainerInitList *)instruction);
28704 case IrInstructionIdContainerInitList:29551 case IrInstSrcIdContainerInitFields:
28705 return ir_analyze_instruction_container_init_list(ira, (IrInstructionContainerInitList *)instruction);29552 return ir_analyze_instruction_container_init_fields(ira, (IrInstSrcContainerInitFields *)instruction);
28706 case IrInstructionIdContainerInitFields:29553 case IrInstSrcIdCompileErr:
28707 return ir_analyze_instruction_container_init_fields(ira, (IrInstructionContainerInitFields *)instruction);29554 return ir_analyze_instruction_compile_err(ira, (IrInstSrcCompileErr *)instruction);
28708 case IrInstructionIdCompileErr:29555 case IrInstSrcIdCompileLog:
28709 return ir_analyze_instruction_compile_err(ira, (IrInstructionCompileErr *)instruction);29556 return ir_analyze_instruction_compile_log(ira, (IrInstSrcCompileLog *)instruction);
28710 case IrInstructionIdCompileLog:29557 case IrInstSrcIdErrName:
28711 return ir_analyze_instruction_compile_log(ira, (IrInstructionCompileLog *)instruction);29558 return ir_analyze_instruction_err_name(ira, (IrInstSrcErrName *)instruction);
28712 case IrInstructionIdErrName:29559 case IrInstSrcIdTypeName:
28713 return ir_analyze_instruction_err_name(ira, (IrInstructionErrName *)instruction);29560 return ir_analyze_instruction_type_name(ira, (IrInstSrcTypeName *)instruction);
28714 case IrInstructionIdTypeName:29561 case IrInstSrcIdCImport:
28715 return ir_analyze_instruction_type_name(ira, (IrInstructionTypeName *)instruction);29562 return ir_analyze_instruction_c_import(ira, (IrInstSrcCImport *)instruction);
28716 case IrInstructionIdCImport:29563 case IrInstSrcIdCInclude:
28717 return ir_analyze_instruction_c_import(ira, (IrInstructionCImport *)instruction);29564 return ir_analyze_instruction_c_include(ira, (IrInstSrcCInclude *)instruction);
28718 case IrInstructionIdCInclude:29565 case IrInstSrcIdCDefine:
28719 return ir_analyze_instruction_c_include(ira, (IrInstructionCInclude *)instruction);29566 return ir_analyze_instruction_c_define(ira, (IrInstSrcCDefine *)instruction);
28720 case IrInstructionIdCDefine:29567 case IrInstSrcIdCUndef:
28721 return ir_analyze_instruction_c_define(ira, (IrInstructionCDefine *)instruction);29568 return ir_analyze_instruction_c_undef(ira, (IrInstSrcCUndef *)instruction);
28722 case IrInstructionIdCUndef:29569 case IrInstSrcIdEmbedFile:
28723 return ir_analyze_instruction_c_undef(ira, (IrInstructionCUndef *)instruction);29570 return ir_analyze_instruction_embed_file(ira, (IrInstSrcEmbedFile *)instruction);
28724 case IrInstructionIdEmbedFile:29571 case IrInstSrcIdCmpxchg:
28725 return ir_analyze_instruction_embed_file(ira, (IrInstructionEmbedFile *)instruction);29572 return ir_analyze_instruction_cmpxchg(ira, (IrInstSrcCmpxchg *)instruction);
28726 case IrInstructionIdCmpxchgSrc:29573 case IrInstSrcIdFence:
28727 return ir_analyze_instruction_cmpxchg(ira, (IrInstructionCmpxchgSrc *)instruction);29574 return ir_analyze_instruction_fence(ira, (IrInstSrcFence *)instruction);
28728 case IrInstructionIdFence:29575 case IrInstSrcIdTruncate:
28729 return ir_analyze_instruction_fence(ira, (IrInstructionFence *)instruction);29576 return ir_analyze_instruction_truncate(ira, (IrInstSrcTruncate *)instruction);
28730 case IrInstructionIdTruncate:29577 case IrInstSrcIdIntCast:
28731 return ir_analyze_instruction_truncate(ira, (IrInstructionTruncate *)instruction);29578 return ir_analyze_instruction_int_cast(ira, (IrInstSrcIntCast *)instruction);
28732 case IrInstructionIdIntCast:29579 case IrInstSrcIdFloatCast:
28733 return ir_analyze_instruction_int_cast(ira, (IrInstructionIntCast *)instruction);29580 return ir_analyze_instruction_float_cast(ira, (IrInstSrcFloatCast *)instruction);
28734 case IrInstructionIdFloatCast:29581 case IrInstSrcIdErrSetCast:
28735 return ir_analyze_instruction_float_cast(ira, (IrInstructionFloatCast *)instruction);29582 return ir_analyze_instruction_err_set_cast(ira, (IrInstSrcErrSetCast *)instruction);
28736 case IrInstructionIdErrSetCast:29583 case IrInstSrcIdFromBytes:
28737 return ir_analyze_instruction_err_set_cast(ira, (IrInstructionErrSetCast *)instruction);29584 return ir_analyze_instruction_from_bytes(ira, (IrInstSrcFromBytes *)instruction);
28738 case IrInstructionIdFromBytes:29585 case IrInstSrcIdToBytes:
28739 return ir_analyze_instruction_from_bytes(ira, (IrInstructionFromBytes *)instruction);29586 return ir_analyze_instruction_to_bytes(ira, (IrInstSrcToBytes *)instruction);
28740 case IrInstructionIdToBytes:29587 case IrInstSrcIdIntToFloat:
28741 return ir_analyze_instruction_to_bytes(ira, (IrInstructionToBytes *)instruction);29588 return ir_analyze_instruction_int_to_float(ira, (IrInstSrcIntToFloat *)instruction);
28742 case IrInstructionIdIntToFloat:29589 case IrInstSrcIdFloatToInt:
28743 return ir_analyze_instruction_int_to_float(ira, (IrInstructionIntToFloat *)instruction);29590 return ir_analyze_instruction_float_to_int(ira, (IrInstSrcFloatToInt *)instruction);
28744 case IrInstructionIdFloatToInt:29591 case IrInstSrcIdBoolToInt:
28745 return ir_analyze_instruction_float_to_int(ira, (IrInstructionFloatToInt *)instruction);29592 return ir_analyze_instruction_bool_to_int(ira, (IrInstSrcBoolToInt *)instruction);
28746 case IrInstructionIdBoolToInt:29593 case IrInstSrcIdIntType:
28747 return ir_analyze_instruction_bool_to_int(ira, (IrInstructionBoolToInt *)instruction);29594 return ir_analyze_instruction_int_type(ira, (IrInstSrcIntType *)instruction);
28748 case IrInstructionIdIntType:29595 case IrInstSrcIdVectorType:
28749 return ir_analyze_instruction_int_type(ira, (IrInstructionIntType *)instruction);29596 return ir_analyze_instruction_vector_type(ira, (IrInstSrcVectorType *)instruction);
28750 case IrInstructionIdVectorType:29597 case IrInstSrcIdShuffleVector:
28751 return ir_analyze_instruction_vector_type(ira, (IrInstructionVectorType *)instruction);29598 return ir_analyze_instruction_shuffle_vector(ira, (IrInstSrcShuffleVector *)instruction);
28752 case IrInstructionIdShuffleVector:29599 case IrInstSrcIdSplat:
28753 return ir_analyze_instruction_shuffle_vector(ira, (IrInstructionShuffleVector *)instruction);29600 return ir_analyze_instruction_splat(ira, (IrInstSrcSplat *)instruction);
28754 case IrInstructionIdSplatSrc:29601 case IrInstSrcIdBoolNot:
28755 return ir_analyze_instruction_splat(ira, (IrInstructionSplatSrc *)instruction);29602 return ir_analyze_instruction_bool_not(ira, (IrInstSrcBoolNot *)instruction);
28756 case IrInstructionIdBoolNot:29603 case IrInstSrcIdMemset:
28757 return ir_analyze_instruction_bool_not(ira, (IrInstructionBoolNot *)instruction);29604 return ir_analyze_instruction_memset(ira, (IrInstSrcMemset *)instruction);
28758 case IrInstructionIdMemset:29605 case IrInstSrcIdMemcpy:
28759 return ir_analyze_instruction_memset(ira, (IrInstructionMemset *)instruction);29606 return ir_analyze_instruction_memcpy(ira, (IrInstSrcMemcpy *)instruction);
28760 case IrInstructionIdMemcpy:29607 case IrInstSrcIdSlice:
28761 return ir_analyze_instruction_memcpy(ira, (IrInstructionMemcpy *)instruction);29608 return ir_analyze_instruction_slice(ira, (IrInstSrcSlice *)instruction);
28762 case IrInstructionIdSliceSrc:29609 case IrInstSrcIdMemberCount:
28763 return ir_analyze_instruction_slice(ira, (IrInstructionSliceSrc *)instruction);29610 return ir_analyze_instruction_member_count(ira, (IrInstSrcMemberCount *)instruction);
28764 case IrInstructionIdMemberCount:29611 case IrInstSrcIdMemberType:
28765 return ir_analyze_instruction_member_count(ira, (IrInstructionMemberCount *)instruction);29612 return ir_analyze_instruction_member_type(ira, (IrInstSrcMemberType *)instruction);
28766 case IrInstructionIdMemberType:29613 case IrInstSrcIdMemberName:
28767 return ir_analyze_instruction_member_type(ira, (IrInstructionMemberType *)instruction);29614 return ir_analyze_instruction_member_name(ira, (IrInstSrcMemberName *)instruction);
28768 case IrInstructionIdMemberName:29615 case IrInstSrcIdBreakpoint:
28769 return ir_analyze_instruction_member_name(ira, (IrInstructionMemberName *)instruction);29616 return ir_analyze_instruction_breakpoint(ira, (IrInstSrcBreakpoint *)instruction);
28770 case IrInstructionIdBreakpoint:29617 case IrInstSrcIdReturnAddress:
28771 return ir_analyze_instruction_breakpoint(ira, (IrInstructionBreakpoint *)instruction);29618 return ir_analyze_instruction_return_address(ira, (IrInstSrcReturnAddress *)instruction);
28772 case IrInstructionIdReturnAddress:29619 case IrInstSrcIdFrameAddress:
28773 return ir_analyze_instruction_return_address(ira, (IrInstructionReturnAddress *)instruction);29620 return ir_analyze_instruction_frame_address(ira, (IrInstSrcFrameAddress *)instruction);
28774 case IrInstructionIdFrameAddress:29621 case IrInstSrcIdFrameHandle:
28775 return ir_analyze_instruction_frame_address(ira, (IrInstructionFrameAddress *)instruction);29622 return ir_analyze_instruction_frame_handle(ira, (IrInstSrcFrameHandle *)instruction);
28776 case IrInstructionIdFrameHandle:29623 case IrInstSrcIdFrameType:
28777 return ir_analyze_instruction_frame_handle(ira, (IrInstructionFrameHandle *)instruction);29624 return ir_analyze_instruction_frame_type(ira, (IrInstSrcFrameType *)instruction);
28778 case IrInstructionIdFrameType:29625 case IrInstSrcIdFrameSize:
28779 return ir_analyze_instruction_frame_type(ira, (IrInstructionFrameType *)instruction);29626 return ir_analyze_instruction_frame_size(ira, (IrInstSrcFrameSize *)instruction);
28780 case IrInstructionIdFrameSizeSrc:29627 case IrInstSrcIdAlignOf:
28781 return ir_analyze_instruction_frame_size(ira, (IrInstructionFrameSizeSrc *)instruction);29628 return ir_analyze_instruction_align_of(ira, (IrInstSrcAlignOf *)instruction);
28782 case IrInstructionIdAlignOf:29629 case IrInstSrcIdOverflowOp:
28783 return ir_analyze_instruction_align_of(ira, (IrInstructionAlignOf *)instruction);29630 return ir_analyze_instruction_overflow_op(ira, (IrInstSrcOverflowOp *)instruction);
28784 case IrInstructionIdOverflowOp:29631 case IrInstSrcIdTestErr:
28785 return ir_analyze_instruction_overflow_op(ira, (IrInstructionOverflowOp *)instruction);29632 return ir_analyze_instruction_test_err(ira, (IrInstSrcTestErr *)instruction);
28786 case IrInstructionIdTestErrSrc:29633 case IrInstSrcIdUnwrapErrCode:
28787 return ir_analyze_instruction_test_err(ira, (IrInstructionTestErrSrc *)instruction);29634 return ir_analyze_instruction_unwrap_err_code(ira, (IrInstSrcUnwrapErrCode *)instruction);
28788 case IrInstructionIdUnwrapErrCode:29635 case IrInstSrcIdUnwrapErrPayload:
28789 return ir_analyze_instruction_unwrap_err_code(ira, (IrInstructionUnwrapErrCode *)instruction);29636 return ir_analyze_instruction_unwrap_err_payload(ira, (IrInstSrcUnwrapErrPayload *)instruction);
28790 case IrInstructionIdUnwrapErrPayload:29637 case IrInstSrcIdFnProto:
28791 return ir_analyze_instruction_unwrap_err_payload(ira, (IrInstructionUnwrapErrPayload *)instruction);29638 return ir_analyze_instruction_fn_proto(ira, (IrInstSrcFnProto *)instruction);
28792 case IrInstructionIdFnProto:29639 case IrInstSrcIdTestComptime:
28793 return ir_analyze_instruction_fn_proto(ira, (IrInstructionFnProto *)instruction);29640 return ir_analyze_instruction_test_comptime(ira, (IrInstSrcTestComptime *)instruction);
28794 case IrInstructionIdTestComptime:29641 case IrInstSrcIdCheckSwitchProngs:
28795 return ir_analyze_instruction_test_comptime(ira, (IrInstructionTestComptime *)instruction);29642 return ir_analyze_instruction_check_switch_prongs(ira, (IrInstSrcCheckSwitchProngs *)instruction);
28796 case IrInstructionIdCheckSwitchProngs:29643 case IrInstSrcIdCheckStatementIsVoid:
28797 return ir_analyze_instruction_check_switch_prongs(ira, (IrInstructionCheckSwitchProngs *)instruction);29644 return ir_analyze_instruction_check_statement_is_void(ira, (IrInstSrcCheckStatementIsVoid *)instruction);
28798 case IrInstructionIdCheckStatementIsVoid:29645 case IrInstSrcIdDeclRef:
28799 return ir_analyze_instruction_check_statement_is_void(ira, (IrInstructionCheckStatementIsVoid *)instruction);29646 return ir_analyze_instruction_decl_ref(ira, (IrInstSrcDeclRef *)instruction);
28800 case IrInstructionIdDeclRef:29647 case IrInstSrcIdPanic:
28801 return ir_analyze_instruction_decl_ref(ira, (IrInstructionDeclRef *)instruction);29648 return ir_analyze_instruction_panic(ira, (IrInstSrcPanic *)instruction);
28802 case IrInstructionIdPanic:29649 case IrInstSrcIdPtrCast:
28803 return ir_analyze_instruction_panic(ira, (IrInstructionPanic *)instruction);29650 return ir_analyze_instruction_ptr_cast(ira, (IrInstSrcPtrCast *)instruction);
28804 case IrInstructionIdPtrCastSrc:29651 case IrInstSrcIdIntToPtr:
28805 return ir_analyze_instruction_ptr_cast(ira, (IrInstructionPtrCastSrc *)instruction);29652 return ir_analyze_instruction_int_to_ptr(ira, (IrInstSrcIntToPtr *)instruction);
28806 case IrInstructionIdIntToPtr:29653 case IrInstSrcIdPtrToInt:
28807 return ir_analyze_instruction_int_to_ptr(ira, (IrInstructionIntToPtr *)instruction);29654 return ir_analyze_instruction_ptr_to_int(ira, (IrInstSrcPtrToInt *)instruction);
28808 case IrInstructionIdPtrToInt:29655 case IrInstSrcIdTagName:
28809 return ir_analyze_instruction_ptr_to_int(ira, (IrInstructionPtrToInt *)instruction);29656 return ir_analyze_instruction_enum_tag_name(ira, (IrInstSrcTagName *)instruction);
28810 case IrInstructionIdTagName:29657 case IrInstSrcIdFieldParentPtr:
28811 return ir_analyze_instruction_enum_tag_name(ira, (IrInstructionTagName *)instruction);29658 return ir_analyze_instruction_field_parent_ptr(ira, (IrInstSrcFieldParentPtr *)instruction);
28812 case IrInstructionIdFieldParentPtr:29659 case IrInstSrcIdByteOffsetOf:
28813 return ir_analyze_instruction_field_parent_ptr(ira, (IrInstructionFieldParentPtr *)instruction);29660 return ir_analyze_instruction_byte_offset_of(ira, (IrInstSrcByteOffsetOf *)instruction);
28814 case IrInstructionIdByteOffsetOf:29661 case IrInstSrcIdBitOffsetOf:
28815 return ir_analyze_instruction_byte_offset_of(ira, (IrInstructionByteOffsetOf *)instruction);29662 return ir_analyze_instruction_bit_offset_of(ira, (IrInstSrcBitOffsetOf *)instruction);
28816 case IrInstructionIdBitOffsetOf:29663 case IrInstSrcIdTypeInfo:
28817 return ir_analyze_instruction_bit_offset_of(ira, (IrInstructionBitOffsetOf *)instruction);29664 return ir_analyze_instruction_type_info(ira, (IrInstSrcTypeInfo *) instruction);
28818 case IrInstructionIdTypeInfo:29665 case IrInstSrcIdType:
28819 return ir_analyze_instruction_type_info(ira, (IrInstructionTypeInfo *) instruction);29666 return ir_analyze_instruction_type(ira, (IrInstSrcType *)instruction);
28820 case IrInstructionIdType:29667 case IrInstSrcIdHasField:
28821 return ir_analyze_instruction_type(ira, (IrInstructionType *)instruction);29668 return ir_analyze_instruction_has_field(ira, (IrInstSrcHasField *) instruction);
28822 case IrInstructionIdHasField:29669 case IrInstSrcIdTypeId:
28823 return ir_analyze_instruction_has_field(ira, (IrInstructionHasField *) instruction);29670 return ir_analyze_instruction_type_id(ira, (IrInstSrcTypeId *)instruction);
28824 case IrInstructionIdTypeId:29671 case IrInstSrcIdSetEvalBranchQuota:
28825 return ir_analyze_instruction_type_id(ira, (IrInstructionTypeId *)instruction);29672 return ir_analyze_instruction_set_eval_branch_quota(ira, (IrInstSrcSetEvalBranchQuota *)instruction);
28826 case IrInstructionIdSetEvalBranchQuota:29673 case IrInstSrcIdPtrType:
28827 return ir_analyze_instruction_set_eval_branch_quota(ira, (IrInstructionSetEvalBranchQuota *)instruction);29674 return ir_analyze_instruction_ptr_type(ira, (IrInstSrcPtrType *)instruction);
28828 case IrInstructionIdPtrType:29675 case IrInstSrcIdAlignCast:
28829 return ir_analyze_instruction_ptr_type(ira, (IrInstructionPtrType *)instruction);29676 return ir_analyze_instruction_align_cast(ira, (IrInstSrcAlignCast *)instruction);
28830 case IrInstructionIdAlignCast:29677 case IrInstSrcIdImplicitCast:
28831 return ir_analyze_instruction_align_cast(ira, (IrInstructionAlignCast *)instruction);29678 return ir_analyze_instruction_implicit_cast(ira, (IrInstSrcImplicitCast *)instruction);
28832 case IrInstructionIdImplicitCast:29679 case IrInstSrcIdResolveResult:
28833 return ir_analyze_instruction_implicit_cast(ira, (IrInstructionImplicitCast *)instruction);29680 return ir_analyze_instruction_resolve_result(ira, (IrInstSrcResolveResult *)instruction);
28834 case IrInstructionIdResolveResult:29681 case IrInstSrcIdResetResult:
28835 return ir_analyze_instruction_resolve_result(ira, (IrInstructionResolveResult *)instruction);29682 return ir_analyze_instruction_reset_result(ira, (IrInstSrcResetResult *)instruction);
28836 case IrInstructionIdResetResult:29683 case IrInstSrcIdOpaqueType:
28837 return ir_analyze_instruction_reset_result(ira, (IrInstructionResetResult *)instruction);29684 return ir_analyze_instruction_opaque_type(ira, (IrInstSrcOpaqueType *)instruction);
28838 case IrInstructionIdOpaqueType:29685 case IrInstSrcIdSetAlignStack:
28839 return ir_analyze_instruction_opaque_type(ira, (IrInstructionOpaqueType *)instruction);29686 return ir_analyze_instruction_set_align_stack(ira, (IrInstSrcSetAlignStack *)instruction);
28840 case IrInstructionIdSetAlignStack:29687 case IrInstSrcIdArgType:
28841 return ir_analyze_instruction_set_align_stack(ira, (IrInstructionSetAlignStack *)instruction);29688 return ir_analyze_instruction_arg_type(ira, (IrInstSrcArgType *)instruction);
28842 case IrInstructionIdArgType:29689 case IrInstSrcIdTagType:
28843 return ir_analyze_instruction_arg_type(ira, (IrInstructionArgType *)instruction);29690 return ir_analyze_instruction_tag_type(ira, (IrInstSrcTagType *)instruction);
28844 case IrInstructionIdTagType:29691 case IrInstSrcIdExport:
28845 return ir_analyze_instruction_tag_type(ira, (IrInstructionTagType *)instruction);29692 return ir_analyze_instruction_export(ira, (IrInstSrcExport *)instruction);
28846 case IrInstructionIdExport:29693 case IrInstSrcIdErrorReturnTrace:
28847 return ir_analyze_instruction_export(ira, (IrInstructionExport *)instruction);29694 return ir_analyze_instruction_error_return_trace(ira, (IrInstSrcErrorReturnTrace *)instruction);
28848 case IrInstructionIdErrorReturnTrace:29695 case IrInstSrcIdErrorUnion:
28849 return ir_analyze_instruction_error_return_trace(ira, (IrInstructionErrorReturnTrace *)instruction);29696 return ir_analyze_instruction_error_union(ira, (IrInstSrcErrorUnion *)instruction);
28850 case IrInstructionIdErrorUnion:29697 case IrInstSrcIdAtomicRmw:
28851 return ir_analyze_instruction_error_union(ira, (IrInstructionErrorUnion *)instruction);29698 return ir_analyze_instruction_atomic_rmw(ira, (IrInstSrcAtomicRmw *)instruction);
28852 case IrInstructionIdAtomicRmw:29699 case IrInstSrcIdAtomicLoad:
28853 return ir_analyze_instruction_atomic_rmw(ira, (IrInstructionAtomicRmw *)instruction);29700 return ir_analyze_instruction_atomic_load(ira, (IrInstSrcAtomicLoad *)instruction);
28854 case IrInstructionIdAtomicLoad:29701 case IrInstSrcIdAtomicStore:
28855 return ir_analyze_instruction_atomic_load(ira, (IrInstructionAtomicLoad *)instruction);29702 return ir_analyze_instruction_atomic_store(ira, (IrInstSrcAtomicStore *)instruction);
28856 case IrInstructionIdAtomicStore:29703 case IrInstSrcIdSaveErrRetAddr:
28857 return ir_analyze_instruction_atomic_store(ira, (IrInstructionAtomicStore *)instruction);29704 return ir_analyze_instruction_save_err_ret_addr(ira, (IrInstSrcSaveErrRetAddr *)instruction);
28858 case IrInstructionIdSaveErrRetAddr:29705 case IrInstSrcIdAddImplicitReturnType:
28859 return ir_analyze_instruction_save_err_ret_addr(ira, (IrInstructionSaveErrRetAddr *)instruction);29706 return ir_analyze_instruction_add_implicit_return_type(ira, (IrInstSrcAddImplicitReturnType *)instruction);
28860 case IrInstructionIdAddImplicitReturnType:29707 case IrInstSrcIdFloatOp:
28861 return ir_analyze_instruction_add_implicit_return_type(ira, (IrInstructionAddImplicitReturnType *)instruction);29708 return ir_analyze_instruction_float_op(ira, (IrInstSrcFloatOp *)instruction);
28862 case IrInstructionIdFloatOp:29709 case IrInstSrcIdMulAdd:
28863 return ir_analyze_instruction_float_op(ira, (IrInstructionFloatOp *)instruction);29710 return ir_analyze_instruction_mul_add(ira, (IrInstSrcMulAdd *)instruction);
28864 case IrInstructionIdMulAdd:29711 case IrInstSrcIdIntToErr:
28865 return ir_analyze_instruction_mul_add(ira, (IrInstructionMulAdd *)instruction);29712 return ir_analyze_instruction_int_to_err(ira, (IrInstSrcIntToErr *)instruction);
28866 case IrInstructionIdIntToErr:29713 case IrInstSrcIdErrToInt:
28867 return ir_analyze_instruction_int_to_err(ira, (IrInstructionIntToErr *)instruction);29714 return ir_analyze_instruction_err_to_int(ira, (IrInstSrcErrToInt *)instruction);
28868 case IrInstructionIdErrToInt:29715 case IrInstSrcIdIntToEnum:
28869 return ir_analyze_instruction_err_to_int(ira, (IrInstructionErrToInt *)instruction);29716 return ir_analyze_instruction_int_to_enum(ira, (IrInstSrcIntToEnum *)instruction);
28870 case IrInstructionIdIntToEnum:29717 case IrInstSrcIdEnumToInt:
28871 return ir_analyze_instruction_int_to_enum(ira, (IrInstructionIntToEnum *)instruction);29718 return ir_analyze_instruction_enum_to_int(ira, (IrInstSrcEnumToInt *)instruction);
28872 case IrInstructionIdEnumToInt:29719 case IrInstSrcIdCheckRuntimeScope:
28873 return ir_analyze_instruction_enum_to_int(ira, (IrInstructionEnumToInt *)instruction);29720 return ir_analyze_instruction_check_runtime_scope(ira, (IrInstSrcCheckRuntimeScope *)instruction);
28874 case IrInstructionIdCheckRuntimeScope:29721 case IrInstSrcIdHasDecl:
28875 return ir_analyze_instruction_check_runtime_scope(ira, (IrInstructionCheckRuntimeScope *)instruction);29722 return ir_analyze_instruction_has_decl(ira, (IrInstSrcHasDecl *)instruction);
28876 case IrInstructionIdHasDecl:29723 case IrInstSrcIdUndeclaredIdent:
28877 return ir_analyze_instruction_has_decl(ira, (IrInstructionHasDecl *)instruction);29724 return ir_analyze_instruction_undeclared_ident(ira, (IrInstSrcUndeclaredIdent *)instruction);
28878 case IrInstructionIdUndeclaredIdent:29725 case IrInstSrcIdAlloca:
28879 return ir_analyze_instruction_undeclared_ident(ira, (IrInstructionUndeclaredIdent *)instruction);
28880 case IrInstructionIdAllocaSrc:
28881 return nullptr;29726 return nullptr;
28882 case IrInstructionIdEndExpr:29727 case IrInstSrcIdEndExpr:
28883 return ir_analyze_instruction_end_expr(ira, (IrInstructionEndExpr *)instruction);29728 return ir_analyze_instruction_end_expr(ira, (IrInstSrcEndExpr *)instruction);
28884 case IrInstructionIdBitCastSrc:29729 case IrInstSrcIdBitCast:
28885 return ir_analyze_instruction_bit_cast_src(ira, (IrInstructionBitCastSrc *)instruction);29730 return ir_analyze_instruction_bit_cast_src(ira, (IrInstSrcBitCast *)instruction);
28886 case IrInstructionIdUnionInitNamedField:29731 case IrInstSrcIdUnionInitNamedField:
28887 return ir_analyze_instruction_union_init_named_field(ira, (IrInstructionUnionInitNamedField *)instruction);29732 return ir_analyze_instruction_union_init_named_field(ira, (IrInstSrcUnionInitNamedField *)instruction);
28888 case IrInstructionIdSuspendBegin:29733 case IrInstSrcIdSuspendBegin:
28889 return ir_analyze_instruction_suspend_begin(ira, (IrInstructionSuspendBegin *)instruction);29734 return ir_analyze_instruction_suspend_begin(ira, (IrInstSrcSuspendBegin *)instruction);
28890 case IrInstructionIdSuspendFinish:29735 case IrInstSrcIdSuspendFinish:
28891 return ir_analyze_instruction_suspend_finish(ira, (IrInstructionSuspendFinish *)instruction);29736 return ir_analyze_instruction_suspend_finish(ira, (IrInstSrcSuspendFinish *)instruction);
28892 case IrInstructionIdResume:29737 case IrInstSrcIdResume:
28893 return ir_analyze_instruction_resume(ira, (IrInstructionResume *)instruction);29738 return ir_analyze_instruction_resume(ira, (IrInstSrcResume *)instruction);
28894 case IrInstructionIdAwaitSrc:29739 case IrInstSrcIdAwait:
28895 return ir_analyze_instruction_await(ira, (IrInstructionAwaitSrc *)instruction);29740 return ir_analyze_instruction_await(ira, (IrInstSrcAwait *)instruction);
28896 case IrInstructionIdSpillBegin:29741 case IrInstSrcIdSpillBegin:
28897 return ir_analyze_instruction_spill_begin(ira, (IrInstructionSpillBegin *)instruction);29742 return ir_analyze_instruction_spill_begin(ira, (IrInstSrcSpillBegin *)instruction);
28898 case IrInstructionIdSpillEnd:29743 case IrInstSrcIdSpillEnd:
28899 return ir_analyze_instruction_spill_end(ira, (IrInstructionSpillEnd *)instruction);29744 return ir_analyze_instruction_spill_end(ira, (IrInstSrcSpillEnd *)instruction);
28900 }29745 }
28901 zig_unreachable();29746 zig_unreachable();
28902}29747}
2890329748
28904// This function attempts to evaluate IR code while doing type checking and other analysis.29749// This function attempts to evaluate IR code while doing type checking and other analysis.
28905// It emits a new IrExecutable which is partially evaluated IR code.29750// It emits to a new IrExecutableGen which is partially evaluated IR code.
28906ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_exec,29751ZigType *ir_analyze(CodeGen *codegen, IrExecutableSrc *old_exec, IrExecutableGen *new_exec,
28907 ZigType *expected_type, AstNode *expected_type_source_node, ZigValue *result_ptr)29752 ZigType *expected_type, AstNode *expected_type_source_node, ZigValue *result_ptr)
28908{29753{
28909 assert(old_exec->first_err_trace_msg == nullptr);29754 assert(old_exec->first_err_trace_msg == nullptr);
...@@ -28923,9 +29768,9 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_...@@ -28923,9 +29768,9 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
28923 ira->new_irb.codegen = codegen;29768 ira->new_irb.codegen = codegen;
28924 ira->new_irb.exec = new_exec;29769 ira->new_irb.exec = new_exec;
2892529770
28926 IrBasicBlock *old_entry_bb = ira->old_irb.exec->basic_block_list.at(0);29771 IrBasicBlockSrc *old_entry_bb = ira->old_irb.exec->basic_block_list.at(0);
28927 IrBasicBlock *new_entry_bb = ir_get_new_bb(ira, old_entry_bb, nullptr);29772 IrBasicBlockGen *new_entry_bb = ir_get_new_bb(ira, old_entry_bb, nullptr);
28928 ir_ref_bb(new_entry_bb);29773 ir_ref_bb_gen(new_entry_bb);
28929 ira->new_irb.current_basic_block = new_entry_bb;29774 ira->new_irb.current_basic_block = new_entry_bb;
28930 ira->old_bb_index = 0;29775 ira->old_bb_index = 0;
2893129776
...@@ -28933,7 +29778,7 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_...@@ -28933,7 +29778,7 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
2893329778
28934 if (result_ptr != nullptr) {29779 if (result_ptr != nullptr) {
28935 assert(result_ptr->type->id == ZigTypeIdPointer);29780 assert(result_ptr->type->id == ZigTypeIdPointer);
28936 IrInstructionConst *const_inst = ir_create_instruction<IrInstructionConst>(29781 IrInstGenConst *const_inst = ir_create_inst_noval<IrInstGenConst>(
28937 &ira->new_irb, new_exec->begin_scope, new_exec->source_node);29782 &ira->new_irb, new_exec->begin_scope, new_exec->source_node);
28938 const_inst->base.value = result_ptr;29783 const_inst->base.value = result_ptr;
28939 ira->return_ptr = &const_inst->base;29784 ira->return_ptr = &const_inst->base;
...@@ -28945,9 +29790,9 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_...@@ -28945,9 +29790,9 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
28945 }29790 }
2894629791
28947 while (ira->old_bb_index < ira->old_irb.exec->basic_block_list.length) {29792 while (ira->old_bb_index < ira->old_irb.exec->basic_block_list.length) {
28948 IrInstruction *old_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);29793 IrInstSrc *old_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);
2894929794
28950 if (old_instruction->ref_count == 0 && !ir_has_side_effects(old_instruction)) {29795 if (old_instruction->base.ref_count == 0 && !ir_inst_src_has_side_effects(old_instruction)) {
28951 ira->instruction_index += 1;29796 ira->instruction_index += 1;
28952 continue;29797 continue;
28953 }29798 }
...@@ -28956,14 +29801,14 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_...@@ -28956,14 +29801,14 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
28956 fprintf(stderr, "~ ");29801 fprintf(stderr, "~ ");
28957 old_instruction->src();29802 old_instruction->src();
28958 fprintf(stderr, "~ ");29803 fprintf(stderr, "~ ");
28959 ir_print_instruction(codegen, stderr, old_instruction, 0, IrPassSrc);29804 ir_print_inst_src(codegen, stderr, old_instruction, 0);
28960 bool want_break = false;29805 bool want_break = false;
28961 if (ira->break_debug_id == old_instruction->debug_id) {29806 if (ira->break_debug_id == old_instruction->base.debug_id) {
28962 want_break = true;29807 want_break = true;
28963 } else if (old_instruction->source_node != nullptr) {29808 } else if (old_instruction->base.source_node != nullptr) {
28964 for (size_t i = 0; i < dbg_ir_breakpoints_count; i += 1) {29809 for (size_t i = 0; i < dbg_ir_breakpoints_count; i += 1) {
28965 if (dbg_ir_breakpoints_buf[i].line == old_instruction->source_node->line + 1 &&29810 if (dbg_ir_breakpoints_buf[i].line == old_instruction->base.source_node->line + 1 &&
28966 buf_ends_with_str(old_instruction->source_node->owner->data.structure.root_struct->path,29811 buf_ends_with_str(old_instruction->base.source_node->owner->data.structure.root_struct->path,
28967 dbg_ir_breakpoints_buf[i].src_file))29812 dbg_ir_breakpoints_buf[i].src_file))
28968 {29813 {
28969 want_break = true;29814 want_break = true;
...@@ -28972,9 +29817,9 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_...@@ -28972,9 +29817,9 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
28972 }29817 }
28973 if (want_break) BREAKPOINT;29818 if (want_break) BREAKPOINT;
28974 }29819 }
28975 IrInstruction *new_instruction = ir_analyze_instruction_base(ira, old_instruction);29820 IrInstGen *new_instruction = ir_analyze_instruction_base(ira, old_instruction);
28976 if (new_instruction != nullptr) {29821 if (new_instruction != nullptr) {
28977 ir_assert(new_instruction->value->type != nullptr || new_instruction->value->type != nullptr, old_instruction);29822 ir_assert(new_instruction->value->type != nullptr || new_instruction->value->type != nullptr, &old_instruction->base);
28978 old_instruction->child = new_instruction;29823 old_instruction->child = new_instruction;
2897929824
28980 if (type_is_invalid(new_instruction->value->type)) {29825 if (type_is_invalid(new_instruction->value->type)) {
...@@ -28988,19 +29833,19 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_...@@ -28988,19 +29833,19 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
28988 new_exec->first_err_trace_msg = ira->codegen->trace_err;29833 new_exec->first_err_trace_msg = ira->codegen->trace_err;
28989 }29834 }
28990 if (new_exec->first_err_trace_msg != nullptr &&29835 if (new_exec->first_err_trace_msg != nullptr &&
28991 !old_instruction->source_node->already_traced_this_node)29836 !old_instruction->base.source_node->already_traced_this_node)
28992 {29837 {
28993 old_instruction->source_node->already_traced_this_node = true;29838 old_instruction->base.source_node->already_traced_this_node = true;
28994 new_exec->first_err_trace_msg = add_error_note(ira->codegen, new_exec->first_err_trace_msg,29839 new_exec->first_err_trace_msg = add_error_note(ira->codegen, new_exec->first_err_trace_msg,
28995 old_instruction->source_node, buf_create_from_str("referenced here"));29840 old_instruction->base.source_node, buf_create_from_str("referenced here"));
28996 }29841 }
28997 return ira->codegen->builtin_types.entry_invalid;29842 return ira->codegen->builtin_types.entry_invalid;
28998 } else if (ira->codegen->verbose_ir) {29843 } else if (ira->codegen->verbose_ir) {
28999 fprintf(stderr, "-> ");29844 fprintf(stderr, "-> ");
29000 if (instr_is_unreachable(new_instruction)) {29845 if (new_instruction->value->type->id == ZigTypeIdUnreachable) {
29001 fprintf(stderr, "(noreturn)\n");29846 fprintf(stderr, "(noreturn)\n");
29002 } else {29847 } else {
29003 ir_print_instruction(codegen, stderr, new_instruction, 0, IrPassGen);29848 ir_print_inst_gen(codegen, stderr, new_instruction, 0);
29004 }29849 }
29005 }29850 }
2900629851
...@@ -29040,204 +29885,279 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_...@@ -29040,204 +29885,279 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
29040 return res_type;29885 return res_type;
29041}29886}
2904229887
29043bool ir_has_side_effects(IrInstruction *instruction) {29888bool ir_inst_gen_has_side_effects(IrInstGen *instruction) {
29044 switch (instruction->id) {29889 switch (instruction->id) {
29045 case IrInstructionIdInvalid:29890 case IrInstGenIdInvalid:
29046 zig_unreachable();29891 zig_unreachable();
29047 case IrInstructionIdBr:29892 case IrInstGenIdBr:
29048 case IrInstructionIdCondBr:29893 case IrInstGenIdCondBr:
29049 case IrInstructionIdSwitchBr:29894 case IrInstGenIdSwitchBr:
29050 case IrInstructionIdDeclVarSrc:29895 case IrInstGenIdDeclVar:
29051 case IrInstructionIdDeclVarGen:29896 case IrInstGenIdStorePtr:
29052 case IrInstructionIdStorePtr:29897 case IrInstGenIdVectorStoreElem:
29053 case IrInstructionIdVectorStoreElem:29898 case IrInstGenIdCall:
29054 case IrInstructionIdCallExtra:29899 case IrInstGenIdReturn:
29055 case IrInstructionIdCallSrc:29900 case IrInstGenIdUnreachable:
29056 case IrInstructionIdCallSrcArgs:29901 case IrInstGenIdFence:
29057 case IrInstructionIdCallGen:29902 case IrInstGenIdMemset:
29058 case IrInstructionIdReturn:29903 case IrInstGenIdMemcpy:
29059 case IrInstructionIdUnreachable:29904 case IrInstGenIdBreakpoint:
29060 case IrInstructionIdSetCold:29905 case IrInstGenIdOverflowOp: // TODO when we support multiple returns this can be side effect free
29061 case IrInstructionIdSetRuntimeSafety:29906 case IrInstGenIdPanic:
29062 case IrInstructionIdSetFloatMode:29907 case IrInstGenIdSaveErrRetAddr:
29063 case IrInstructionIdImport:29908 case IrInstGenIdAtomicRmw:
29064 case IrInstructionIdCompileErr:29909 case IrInstGenIdAtomicStore:
29065 case IrInstructionIdCompileLog:29910 case IrInstGenIdCmpxchg:
29066 case IrInstructionIdCImport:29911 case IrInstGenIdAssertZero:
29067 case IrInstructionIdCInclude:29912 case IrInstGenIdAssertNonNull:
29068 case IrInstructionIdCDefine:29913 case IrInstGenIdResizeSlice:
29069 case IrInstructionIdCUndef:29914 case IrInstGenIdPtrOfArrayToSlice:
29070 case IrInstructionIdFence:29915 case IrInstGenIdSlice:
29071 case IrInstructionIdMemset:29916 case IrInstGenIdOptionalWrap:
29072 case IrInstructionIdMemcpy:29917 case IrInstGenIdVectorToArray:
29073 case IrInstructionIdBreakpoint:29918 case IrInstGenIdSuspendBegin:
29074 case IrInstructionIdOverflowOp: // TODO when we support multiple returns this can be side effect free29919 case IrInstGenIdSuspendFinish:
29075 case IrInstructionIdCheckSwitchProngs:29920 case IrInstGenIdResume:
29076 case IrInstructionIdCheckStatementIsVoid:29921 case IrInstGenIdAwait:
29077 case IrInstructionIdCheckRuntimeScope:29922 case IrInstGenIdSpillBegin:
29078 case IrInstructionIdPanic:
29079 case IrInstructionIdSetEvalBranchQuota:
29080 case IrInstructionIdPtrType:
29081 case IrInstructionIdSetAlignStack:
29082 case IrInstructionIdExport:
29083 case IrInstructionIdSaveErrRetAddr:
29084 case IrInstructionIdAddImplicitReturnType:
29085 case IrInstructionIdAtomicRmw:
29086 case IrInstructionIdAtomicStore:
29087 case IrInstructionIdCmpxchgGen:
29088 case IrInstructionIdCmpxchgSrc:
29089 case IrInstructionIdAssertZero:
29090 case IrInstructionIdAssertNonNull:
29091 case IrInstructionIdResizeSlice:
29092 case IrInstructionIdUndeclaredIdent:
29093 case IrInstructionIdEndExpr:
29094 case IrInstructionIdPtrOfArrayToSlice:
29095 case IrInstructionIdSliceGen:
29096 case IrInstructionIdOptionalWrap:
29097 case IrInstructionIdVectorToArray:
29098 case IrInstructionIdResetResult:
29099 case IrInstructionIdSuspendBegin:
29100 case IrInstructionIdSuspendFinish:
29101 case IrInstructionIdResume:
29102 case IrInstructionIdAwaitSrc:
29103 case IrInstructionIdAwaitGen:
29104 case IrInstructionIdSpillBegin:
29105 return true;29923 return true;
2910629924
29107 case IrInstructionIdPhi:29925 case IrInstGenIdPhi:
29108 case IrInstructionIdUnOp:29926 case IrInstGenIdBinOp:
29109 case IrInstructionIdBinOp:29927 case IrInstGenIdConst:
29110 case IrInstructionIdMergeErrSets:29928 case IrInstGenIdCast:
29111 case IrInstructionIdLoadPtr:29929 case IrInstGenIdElemPtr:
29112 case IrInstructionIdConst:29930 case IrInstGenIdVarPtr:
29113 case IrInstructionIdCast:29931 case IrInstGenIdReturnPtr:
29114 case IrInstructionIdContainerInitList:29932 case IrInstGenIdStructFieldPtr:
29115 case IrInstructionIdContainerInitFields:29933 case IrInstGenIdTestNonNull:
29116 case IrInstructionIdUnionInitNamedField:29934 case IrInstGenIdOptionalUnwrapPtr:
29117 case IrInstructionIdFieldPtr:29935 case IrInstGenIdClz:
29118 case IrInstructionIdElemPtr:29936 case IrInstGenIdCtz:
29119 case IrInstructionIdVarPtr:29937 case IrInstGenIdPopCount:
29120 case IrInstructionIdReturnPtr:29938 case IrInstGenIdBswap:
29121 case IrInstructionIdTypeOf:29939 case IrInstGenIdBitReverse:
29122 case IrInstructionIdStructFieldPtr:29940 case IrInstGenIdUnionTag:
29123 case IrInstructionIdArrayType:29941 case IrInstGenIdTruncate:
29124 case IrInstructionIdSliceType:29942 case IrInstGenIdShuffleVector:
29125 case IrInstructionIdAnyFrameType:29943 case IrInstGenIdSplat:
29126 case IrInstructionIdSizeOf:29944 case IrInstGenIdBoolNot:
29127 case IrInstructionIdTestNonNull:29945 case IrInstGenIdReturnAddress:
29128 case IrInstructionIdOptionalUnwrapPtr:29946 case IrInstGenIdFrameAddress:
29129 case IrInstructionIdClz:29947 case IrInstGenIdFrameHandle:
29130 case IrInstructionIdCtz:29948 case IrInstGenIdFrameSize:
29131 case IrInstructionIdPopCount:29949 case IrInstGenIdTestErr:
29132 case IrInstructionIdBswap:29950 case IrInstGenIdPtrCast:
29133 case IrInstructionIdBitReverse:29951 case IrInstGenIdBitCast:
29134 case IrInstructionIdSwitchVar:29952 case IrInstGenIdWidenOrShorten:
29135 case IrInstructionIdSwitchElseVar:29953 case IrInstGenIdPtrToInt:
29136 case IrInstructionIdSwitchTarget:29954 case IrInstGenIdIntToPtr:
29137 case IrInstructionIdUnionTag:29955 case IrInstGenIdIntToEnum:
29138 case IrInstructionIdRef:29956 case IrInstGenIdIntToErr:
29139 case IrInstructionIdEmbedFile:29957 case IrInstGenIdErrToInt:
29140 case IrInstructionIdTruncate:29958 case IrInstGenIdErrName:
29141 case IrInstructionIdIntType:29959 case IrInstGenIdTagName:
29142 case IrInstructionIdVectorType:29960 case IrInstGenIdFieldParentPtr:
29143 case IrInstructionIdShuffleVector:29961 case IrInstGenIdAlignCast:
29144 case IrInstructionIdSplatSrc:29962 case IrInstGenIdErrorReturnTrace:
29145 case IrInstructionIdSplatGen:29963 case IrInstGenIdFloatOp:
29146 case IrInstructionIdBoolNot:29964 case IrInstGenIdMulAdd:
29147 case IrInstructionIdSliceSrc:29965 case IrInstGenIdAtomicLoad:
29148 case IrInstructionIdMemberCount:29966 case IrInstGenIdArrayToVector:
29149 case IrInstructionIdMemberType:29967 case IrInstGenIdAlloca:
29150 case IrInstructionIdMemberName:29968 case IrInstGenIdSpillEnd:
29151 case IrInstructionIdAlignOf:29969 case IrInstGenIdVectorExtractElem:
29152 case IrInstructionIdReturnAddress:29970 case IrInstGenIdBinaryNot:
29153 case IrInstructionIdFrameAddress:29971 case IrInstGenIdNegation:
29154 case IrInstructionIdFrameHandle:29972 case IrInstGenIdNegationWrapping:
29155 case IrInstructionIdFrameType:
29156 case IrInstructionIdFrameSizeSrc:
29157 case IrInstructionIdFrameSizeGen:
29158 case IrInstructionIdTestErrSrc:
29159 case IrInstructionIdTestErrGen:
29160 case IrInstructionIdFnProto:
29161 case IrInstructionIdTestComptime:
29162 case IrInstructionIdPtrCastSrc:
29163 case IrInstructionIdPtrCastGen:
29164 case IrInstructionIdBitCastSrc:
29165 case IrInstructionIdBitCastGen:
29166 case IrInstructionIdWidenOrShorten:
29167 case IrInstructionIdPtrToInt:
29168 case IrInstructionIdIntToPtr:
29169 case IrInstructionIdIntToEnum:
29170 case IrInstructionIdIntToErr:
29171 case IrInstructionIdErrToInt:
29172 case IrInstructionIdDeclRef:
29173 case IrInstructionIdErrName:
29174 case IrInstructionIdTypeName:
29175 case IrInstructionIdTagName:
29176 case IrInstructionIdFieldParentPtr:
29177 case IrInstructionIdByteOffsetOf:
29178 case IrInstructionIdBitOffsetOf:
29179 case IrInstructionIdTypeInfo:
29180 case IrInstructionIdType:
29181 case IrInstructionIdHasField:
29182 case IrInstructionIdTypeId:
29183 case IrInstructionIdAlignCast:
29184 case IrInstructionIdImplicitCast:
29185 case IrInstructionIdResolveResult:
29186 case IrInstructionIdOpaqueType:
29187 case IrInstructionIdArgType:
29188 case IrInstructionIdTagType:
29189 case IrInstructionIdErrorReturnTrace:
29190 case IrInstructionIdErrorUnion:
29191 case IrInstructionIdFloatOp:
29192 case IrInstructionIdMulAdd:
29193 case IrInstructionIdAtomicLoad:
29194 case IrInstructionIdIntCast:
29195 case IrInstructionIdFloatCast:
29196 case IrInstructionIdErrSetCast:
29197 case IrInstructionIdIntToFloat:
29198 case IrInstructionIdFloatToInt:
29199 case IrInstructionIdBoolToInt:
29200 case IrInstructionIdFromBytes:
29201 case IrInstructionIdToBytes:
29202 case IrInstructionIdEnumToInt:
29203 case IrInstructionIdArrayToVector:
29204 case IrInstructionIdHasDecl:
29205 case IrInstructionIdAllocaSrc:
29206 case IrInstructionIdAllocaGen:
29207 case IrInstructionIdSpillEnd:
29208 case IrInstructionIdVectorExtractElem:
29209 return false;29973 return false;
2921029974
29211 case IrInstructionIdAsmSrc:29975 case IrInstGenIdAsm:
29212 {29976 {
29213 IrInstructionAsmSrc *asm_instruction = (IrInstructionAsmSrc *)instruction;29977 IrInstGenAsm *asm_instruction = (IrInstGenAsm *)instruction;
29214 return asm_instruction->has_side_effects;29978 return asm_instruction->has_side_effects;
29215 }29979 }
29980 case IrInstGenIdUnwrapErrPayload:
29981 {
29982 IrInstGenUnwrapErrPayload *unwrap_err_payload_instruction =
29983 (IrInstGenUnwrapErrPayload *)instruction;
29984 return unwrap_err_payload_instruction->safety_check_on ||
29985 unwrap_err_payload_instruction->initializing;
29986 }
29987 case IrInstGenIdUnwrapErrCode:
29988 return reinterpret_cast<IrInstGenUnwrapErrCode *>(instruction)->initializing;
29989 case IrInstGenIdUnionFieldPtr:
29990 return reinterpret_cast<IrInstGenUnionFieldPtr *>(instruction)->initializing;
29991 case IrInstGenIdErrWrapPayload:
29992 return reinterpret_cast<IrInstGenErrWrapPayload *>(instruction)->result_loc != nullptr;
29993 case IrInstGenIdErrWrapCode:
29994 return reinterpret_cast<IrInstGenErrWrapCode *>(instruction)->result_loc != nullptr;
29995 case IrInstGenIdLoadPtr:
29996 return reinterpret_cast<IrInstGenLoadPtr *>(instruction)->result_loc != nullptr;
29997 case IrInstGenIdRef:
29998 return reinterpret_cast<IrInstGenRef *>(instruction)->result_loc != nullptr;
29999 }
30000 zig_unreachable();
30001}
30002
30003bool ir_inst_src_has_side_effects(IrInstSrc *instruction) {
30004 switch (instruction->id) {
30005 case IrInstSrcIdInvalid:
30006 zig_unreachable();
30007 case IrInstSrcIdBr:
30008 case IrInstSrcIdCondBr:
30009 case IrInstSrcIdSwitchBr:
30010 case IrInstSrcIdDeclVar:
30011 case IrInstSrcIdStorePtr:
30012 case IrInstSrcIdCallExtra:
30013 case IrInstSrcIdCall:
30014 case IrInstSrcIdCallArgs:
30015 case IrInstSrcIdReturn:
30016 case IrInstSrcIdUnreachable:
30017 case IrInstSrcIdSetCold:
30018 case IrInstSrcIdSetRuntimeSafety:
30019 case IrInstSrcIdSetFloatMode:
30020 case IrInstSrcIdImport:
30021 case IrInstSrcIdCompileErr:
30022 case IrInstSrcIdCompileLog:
30023 case IrInstSrcIdCImport:
30024 case IrInstSrcIdCInclude:
30025 case IrInstSrcIdCDefine:
30026 case IrInstSrcIdCUndef:
30027 case IrInstSrcIdFence:
30028 case IrInstSrcIdMemset:
30029 case IrInstSrcIdMemcpy:
30030 case IrInstSrcIdBreakpoint:
30031 case IrInstSrcIdOverflowOp: // TODO when we support multiple returns this can be side effect free
30032 case IrInstSrcIdCheckSwitchProngs:
30033 case IrInstSrcIdCheckStatementIsVoid:
30034 case IrInstSrcIdCheckRuntimeScope:
30035 case IrInstSrcIdPanic:
30036 case IrInstSrcIdSetEvalBranchQuota:
30037 case IrInstSrcIdPtrType:
30038 case IrInstSrcIdSetAlignStack:
30039 case IrInstSrcIdExport:
30040 case IrInstSrcIdSaveErrRetAddr:
30041 case IrInstSrcIdAddImplicitReturnType:
30042 case IrInstSrcIdAtomicRmw:
30043 case IrInstSrcIdAtomicStore:
30044 case IrInstSrcIdCmpxchg:
30045 case IrInstSrcIdUndeclaredIdent:
30046 case IrInstSrcIdEndExpr:
30047 case IrInstSrcIdResetResult:
30048 case IrInstSrcIdSuspendBegin:
30049 case IrInstSrcIdSuspendFinish:
30050 case IrInstSrcIdResume:
30051 case IrInstSrcIdAwait:
30052 case IrInstSrcIdSpillBegin:
30053 return true;
30054
30055 case IrInstSrcIdPhi:
30056 case IrInstSrcIdUnOp:
30057 case IrInstSrcIdBinOp:
30058 case IrInstSrcIdMergeErrSets:
30059 case IrInstSrcIdLoadPtr:
30060 case IrInstSrcIdConst:
30061 case IrInstSrcIdContainerInitList:
30062 case IrInstSrcIdContainerInitFields:
30063 case IrInstSrcIdUnionInitNamedField:
30064 case IrInstSrcIdFieldPtr:
30065 case IrInstSrcIdElemPtr:
30066 case IrInstSrcIdVarPtr:
30067 case IrInstSrcIdTypeOf:
30068 case IrInstSrcIdArrayType:
30069 case IrInstSrcIdSliceType:
30070 case IrInstSrcIdAnyFrameType:
30071 case IrInstSrcIdSizeOf:
30072 case IrInstSrcIdTestNonNull:
30073 case IrInstSrcIdOptionalUnwrapPtr:
30074 case IrInstSrcIdClz:
30075 case IrInstSrcIdCtz:
30076 case IrInstSrcIdPopCount:
30077 case IrInstSrcIdBswap:
30078 case IrInstSrcIdBitReverse:
30079 case IrInstSrcIdSwitchVar:
30080 case IrInstSrcIdSwitchElseVar:
30081 case IrInstSrcIdSwitchTarget:
30082 case IrInstSrcIdRef:
30083 case IrInstSrcIdEmbedFile:
30084 case IrInstSrcIdTruncate:
30085 case IrInstSrcIdIntType:
30086 case IrInstSrcIdVectorType:
30087 case IrInstSrcIdShuffleVector:
30088 case IrInstSrcIdSplat:
30089 case IrInstSrcIdBoolNot:
30090 case IrInstSrcIdSlice:
30091 case IrInstSrcIdMemberCount:
30092 case IrInstSrcIdMemberType:
30093 case IrInstSrcIdMemberName:
30094 case IrInstSrcIdAlignOf:
30095 case IrInstSrcIdReturnAddress:
30096 case IrInstSrcIdFrameAddress:
30097 case IrInstSrcIdFrameHandle:
30098 case IrInstSrcIdFrameType:
30099 case IrInstSrcIdFrameSize:
30100 case IrInstSrcIdTestErr:
30101 case IrInstSrcIdFnProto:
30102 case IrInstSrcIdTestComptime:
30103 case IrInstSrcIdPtrCast:
30104 case IrInstSrcIdBitCast:
30105 case IrInstSrcIdPtrToInt:
30106 case IrInstSrcIdIntToPtr:
30107 case IrInstSrcIdIntToEnum:
30108 case IrInstSrcIdIntToErr:
30109 case IrInstSrcIdErrToInt:
30110 case IrInstSrcIdDeclRef:
30111 case IrInstSrcIdErrName:
30112 case IrInstSrcIdTypeName:
30113 case IrInstSrcIdTagName:
30114 case IrInstSrcIdFieldParentPtr:
30115 case IrInstSrcIdByteOffsetOf:
30116 case IrInstSrcIdBitOffsetOf:
30117 case IrInstSrcIdTypeInfo:
30118 case IrInstSrcIdType:
30119 case IrInstSrcIdHasField:
30120 case IrInstSrcIdTypeId:
30121 case IrInstSrcIdAlignCast:
30122 case IrInstSrcIdImplicitCast:
30123 case IrInstSrcIdResolveResult:
30124 case IrInstSrcIdOpaqueType:
30125 case IrInstSrcIdArgType:
30126 case IrInstSrcIdTagType:
30127 case IrInstSrcIdErrorReturnTrace:
30128 case IrInstSrcIdErrorUnion:
30129 case IrInstSrcIdFloatOp:
30130 case IrInstSrcIdMulAdd:
30131 case IrInstSrcIdAtomicLoad:
30132 case IrInstSrcIdIntCast:
30133 case IrInstSrcIdFloatCast:
30134 case IrInstSrcIdErrSetCast:
30135 case IrInstSrcIdIntToFloat:
30136 case IrInstSrcIdFloatToInt:
30137 case IrInstSrcIdBoolToInt:
30138 case IrInstSrcIdFromBytes:
30139 case IrInstSrcIdToBytes:
30140 case IrInstSrcIdEnumToInt:
30141 case IrInstSrcIdHasDecl:
30142 case IrInstSrcIdAlloca:
30143 case IrInstSrcIdSpillEnd:
30144 return false;
2921630145
29217 case IrInstructionIdAsmGen:30146 case IrInstSrcIdAsm:
29218 {30147 {
29219 IrInstructionAsmGen *asm_instruction = (IrInstructionAsmGen *)instruction;30148 IrInstSrcAsm *asm_instruction = (IrInstSrcAsm *)instruction;
29220 return asm_instruction->has_side_effects;30149 return asm_instruction->has_side_effects;
29221 }30150 }
29222 case IrInstructionIdUnwrapErrPayload:30151
30152 case IrInstSrcIdUnwrapErrPayload:
29223 {30153 {
29224 IrInstructionUnwrapErrPayload *unwrap_err_payload_instruction =30154 IrInstSrcUnwrapErrPayload *unwrap_err_payload_instruction =
29225 (IrInstructionUnwrapErrPayload *)instruction;30155 (IrInstSrcUnwrapErrPayload *)instruction;
29226 return unwrap_err_payload_instruction->safety_check_on ||30156 return unwrap_err_payload_instruction->safety_check_on ||
29227 unwrap_err_payload_instruction->initializing;30157 unwrap_err_payload_instruction->initializing;
29228 }30158 }
29229 case IrInstructionIdUnwrapErrCode:30159 case IrInstSrcIdUnwrapErrCode:
29230 return reinterpret_cast<IrInstructionUnwrapErrCode *>(instruction)->initializing;30160 return reinterpret_cast<IrInstSrcUnwrapErrCode *>(instruction)->initializing;
29231 case IrInstructionIdUnionFieldPtr:
29232 return reinterpret_cast<IrInstructionUnionFieldPtr *>(instruction)->initializing;
29233 case IrInstructionIdErrWrapPayload:
29234 return reinterpret_cast<IrInstructionErrWrapPayload *>(instruction)->result_loc != nullptr;
29235 case IrInstructionIdErrWrapCode:
29236 return reinterpret_cast<IrInstructionErrWrapCode *>(instruction)->result_loc != nullptr;
29237 case IrInstructionIdLoadPtrGen:
29238 return reinterpret_cast<IrInstructionLoadPtrGen *>(instruction)->result_loc != nullptr;
29239 case IrInstructionIdRefGen:
29240 return reinterpret_cast<IrInstructionRefGen *>(instruction)->result_loc != nullptr;
29241 }30161 }
29242 zig_unreachable();30162 zig_unreachable();
29243}30163}
...@@ -29271,14 +30191,14 @@ static ZigType *ir_resolve_lazy_fn_type(IrAnalyze *ira, AstNode *source_node, La...@@ -29271,14 +30191,14 @@ static ZigType *ir_resolve_lazy_fn_type(IrAnalyze *ira, AstNode *source_node, La
29271 param_info->type = nullptr;30191 param_info->type = nullptr;
29272 return get_generic_fn_type(ira->codegen, &fn_type_id);30192 return get_generic_fn_type(ira->codegen, &fn_type_id);
29273 } else {30193 } else {
29274 IrInstruction *param_type_inst = lazy_fn_type->param_types[fn_type_id.next_param_index];30194 IrInstGen *param_type_inst = lazy_fn_type->param_types[fn_type_id.next_param_index];
29275 ZigType *param_type = ir_resolve_type(ira, param_type_inst);30195 ZigType *param_type = ir_resolve_type(ira, param_type_inst);
29276 if (type_is_invalid(param_type))30196 if (type_is_invalid(param_type))
29277 return nullptr;30197 return nullptr;
29278 switch (type_requires_comptime(ira->codegen, param_type)) {30198 switch (type_requires_comptime(ira->codegen, param_type)) {
29279 case ReqCompTimeYes:30199 case ReqCompTimeYes:
29280 if (!calling_convention_allows_zig_types(fn_type_id.cc)) {30200 if (!calling_convention_allows_zig_types(fn_type_id.cc)) {
29281 ir_add_error(ira, param_type_inst,30201 ir_add_error(ira, &param_type_inst->base,
29282 buf_sprintf("parameter of type '%s' not allowed in function with calling convention '%s'",30202 buf_sprintf("parameter of type '%s' not allowed in function with calling convention '%s'",
29283 buf_ptr(&param_type->name), calling_convention_name(fn_type_id.cc)));30203 buf_ptr(&param_type->name), calling_convention_name(fn_type_id.cc)));
29284 return nullptr;30204 return nullptr;
...@@ -29296,7 +30216,7 @@ static ZigType *ir_resolve_lazy_fn_type(IrAnalyze *ira, AstNode *source_node, La...@@ -29296,7 +30216,7 @@ static ZigType *ir_resolve_lazy_fn_type(IrAnalyze *ira, AstNode *source_node, La
29296 if ((err = type_has_bits2(ira->codegen, param_type, &has_bits)))30216 if ((err = type_has_bits2(ira->codegen, param_type, &has_bits)))
29297 return nullptr;30217 return nullptr;
29298 if (!has_bits) {30218 if (!has_bits) {
29299 ir_add_error(ira, param_type_inst,30219 ir_add_error(ira, &param_type_inst->base,
29300 buf_sprintf("parameter of type '%s' has 0 bits; not allowed in function with calling convention '%s'",30220 buf_sprintf("parameter of type '%s' has 0 bits; not allowed in function with calling convention '%s'",
29301 buf_ptr(&param_type->name), calling_convention_name(fn_type_id.cc)));30221 buf_ptr(&param_type->name), calling_convention_name(fn_type_id.cc)));
29302 return nullptr;30222 return nullptr;
...@@ -29315,7 +30235,7 @@ static ZigType *ir_resolve_lazy_fn_type(IrAnalyze *ira, AstNode *source_node, La...@@ -29315,7 +30235,7 @@ static ZigType *ir_resolve_lazy_fn_type(IrAnalyze *ira, AstNode *source_node, La
29315 if (type_is_invalid(fn_type_id.return_type))30235 if (type_is_invalid(fn_type_id.return_type))
29316 return nullptr;30236 return nullptr;
29317 if (fn_type_id.return_type->id == ZigTypeIdOpaque) {30237 if (fn_type_id.return_type->id == ZigTypeIdOpaque) {
29318 ir_add_error(ira, lazy_fn_type->return_type, buf_create_from_str("return type cannot be opaque"));30238 ir_add_error(ira, &lazy_fn_type->return_type->base, buf_create_from_str("return type cannot be opaque"));
29319 return nullptr;30239 return nullptr;
29320 }30240 }
2932130241
...@@ -29347,7 +30267,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {...@@ -29347,7 +30267,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
29347 case ZigTypeIdBoundFn:30267 case ZigTypeIdBoundFn:
29348 case ZigTypeIdVoid:30268 case ZigTypeIdVoid:
29349 case ZigTypeIdOpaque:30269 case ZigTypeIdOpaque:
29350 ir_add_error(ira, lazy_align_of->target_type,30270 ir_add_error(ira, &lazy_align_of->target_type->base,
29351 buf_sprintf("no align available for type '%s'",30271 buf_sprintf("no align available for type '%s'",
29352 buf_ptr(&lazy_align_of->target_type->value->data.x_type->name)));30272 buf_ptr(&lazy_align_of->target_type->value->data.x_type->name)));
29353 return ErrorSemanticAnalyzeFail;30273 return ErrorSemanticAnalyzeFail;
...@@ -29397,7 +30317,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {...@@ -29397,7 +30317,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
29397 case ZigTypeIdNull:30317 case ZigTypeIdNull:
29398 case ZigTypeIdBoundFn:30318 case ZigTypeIdBoundFn:
29399 case ZigTypeIdOpaque:30319 case ZigTypeIdOpaque:
29400 ir_add_error(ira, lazy_size_of->target_type,30320 ir_add_error(ira, &lazy_size_of->target_type->base,
29401 buf_sprintf("no size available for type '%s'",30321 buf_sprintf("no size available for type '%s'",
29402 buf_ptr(&lazy_size_of->target_type->value->data.x_type->name)));30322 buf_ptr(&lazy_size_of->target_type->value->data.x_type->name)));
29403 return ErrorSemanticAnalyzeFail;30323 return ErrorSemanticAnalyzeFail;
...@@ -29455,7 +30375,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {...@@ -29455,7 +30375,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
29455 if (lazy_slice_type->sentinel != nullptr) {30375 if (lazy_slice_type->sentinel != nullptr) {
29456 if (type_is_invalid(lazy_slice_type->sentinel->value->type))30376 if (type_is_invalid(lazy_slice_type->sentinel->value->type))
29457 return ErrorSemanticAnalyzeFail;30377 return ErrorSemanticAnalyzeFail;
29458 IrInstruction *sentinel = ir_implicit_cast(ira, lazy_slice_type->sentinel, elem_type);30378 IrInstGen *sentinel = ir_implicit_cast(ira, lazy_slice_type->sentinel, elem_type);
29459 if (type_is_invalid(sentinel->value->type))30379 if (type_is_invalid(sentinel->value->type))
29460 return ErrorSemanticAnalyzeFail;30380 return ErrorSemanticAnalyzeFail;
29461 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);30381 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
...@@ -29478,7 +30398,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {...@@ -29478,7 +30398,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
29478 case ZigTypeIdUndefined:30398 case ZigTypeIdUndefined:
29479 case ZigTypeIdNull:30399 case ZigTypeIdNull:
29480 case ZigTypeIdOpaque:30400 case ZigTypeIdOpaque:
29481 ir_add_error(ira, lazy_slice_type->elem_type,30401 ir_add_error(ira, &lazy_slice_type->elem_type->base,
29482 buf_sprintf("slice of type '%s' not allowed", buf_ptr(&elem_type->name)));30402 buf_sprintf("slice of type '%s' not allowed", buf_ptr(&elem_type->name)));
29483 return ErrorSemanticAnalyzeFail;30403 return ErrorSemanticAnalyzeFail;
29484 case ZigTypeIdMetaType:30404 case ZigTypeIdMetaType:
...@@ -29534,7 +30454,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {...@@ -29534,7 +30454,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
29534 if (lazy_ptr_type->sentinel != nullptr) {30454 if (lazy_ptr_type->sentinel != nullptr) {
29535 if (type_is_invalid(lazy_ptr_type->sentinel->value->type))30455 if (type_is_invalid(lazy_ptr_type->sentinel->value->type))
29536 return ErrorSemanticAnalyzeFail;30456 return ErrorSemanticAnalyzeFail;
29537 IrInstruction *sentinel = ir_implicit_cast(ira, lazy_ptr_type->sentinel, elem_type);30457 IrInstGen *sentinel = ir_implicit_cast(ira, lazy_ptr_type->sentinel, elem_type);
29538 if (type_is_invalid(sentinel->value->type))30458 if (type_is_invalid(sentinel->value->type))
29539 return ErrorSemanticAnalyzeFail;30459 return ErrorSemanticAnalyzeFail;
29540 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);30460 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
...@@ -29551,11 +30471,11 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {...@@ -29551,11 +30471,11 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
29551 }30471 }
2955230472
29553 if (elem_type->id == ZigTypeIdUnreachable) {30473 if (elem_type->id == ZigTypeIdUnreachable) {
29554 ir_add_error(ira, lazy_ptr_type->elem_type,30474 ir_add_error(ira, &lazy_ptr_type->elem_type->base,
29555 buf_create_from_str("pointer to noreturn not allowed"));30475 buf_create_from_str("pointer to noreturn not allowed"));
29556 return ErrorSemanticAnalyzeFail;30476 return ErrorSemanticAnalyzeFail;
29557 } else if (elem_type->id == ZigTypeIdOpaque && lazy_ptr_type->ptr_len == PtrLenUnknown) {30477 } else if (elem_type->id == ZigTypeIdOpaque && lazy_ptr_type->ptr_len == PtrLenUnknown) {
29558 ir_add_error(ira, lazy_ptr_type->elem_type,30478 ir_add_error(ira, &lazy_ptr_type->elem_type->base,
29559 buf_create_from_str("unknown-length pointer to opaque"));30479 buf_create_from_str("unknown-length pointer to opaque"));
29560 return ErrorSemanticAnalyzeFail;30480 return ErrorSemanticAnalyzeFail;
29561 } else if (lazy_ptr_type->ptr_len == PtrLenC) {30481 } else if (lazy_ptr_type->ptr_len == PtrLenC) {
...@@ -29563,16 +30483,16 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {...@@ -29563,16 +30483,16 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
29563 if ((err = type_allowed_in_extern(ira->codegen, elem_type, &ok_type)))30483 if ((err = type_allowed_in_extern(ira->codegen, elem_type, &ok_type)))
29564 return err;30484 return err;
29565 if (!ok_type) {30485 if (!ok_type) {
29566 ir_add_error(ira, lazy_ptr_type->elem_type,30486 ir_add_error(ira, &lazy_ptr_type->elem_type->base,
29567 buf_sprintf("C pointers cannot point to non-C-ABI-compatible type '%s'",30487 buf_sprintf("C pointers cannot point to non-C-ABI-compatible type '%s'",
29568 buf_ptr(&elem_type->name)));30488 buf_ptr(&elem_type->name)));
29569 return ErrorSemanticAnalyzeFail;30489 return ErrorSemanticAnalyzeFail;
29570 } else if (elem_type->id == ZigTypeIdOpaque) {30490 } else if (elem_type->id == ZigTypeIdOpaque) {
29571 ir_add_error(ira, lazy_ptr_type->elem_type,30491 ir_add_error(ira, &lazy_ptr_type->elem_type->base,
29572 buf_sprintf("C pointers cannot point opaque types"));30492 buf_sprintf("C pointers cannot point opaque types"));
29573 return ErrorSemanticAnalyzeFail;30493 return ErrorSemanticAnalyzeFail;
29574 } else if (lazy_ptr_type->is_allowzero) {30494 } else if (lazy_ptr_type->is_allowzero) {
29575 ir_add_error(ira, lazy_ptr_type->elem_type,30495 ir_add_error(ira, &lazy_ptr_type->elem_type->base,
29576 buf_sprintf("C pointers always allow address zero"));30496 buf_sprintf("C pointers always allow address zero"));
29577 return ErrorSemanticAnalyzeFail;30497 return ErrorSemanticAnalyzeFail;
29578 }30498 }
...@@ -29610,7 +30530,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {...@@ -29610,7 +30530,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
29610 case ZigTypeIdUndefined:30530 case ZigTypeIdUndefined:
29611 case ZigTypeIdNull:30531 case ZigTypeIdNull:
29612 case ZigTypeIdOpaque:30532 case ZigTypeIdOpaque:
29613 ir_add_error(ira, lazy_array_type->elem_type,30533 ir_add_error(ira, &lazy_array_type->elem_type->base,
29614 buf_sprintf("array of type '%s' not allowed",30534 buf_sprintf("array of type '%s' not allowed",
29615 buf_ptr(&elem_type->name)));30535 buf_ptr(&elem_type->name)));
29616 return ErrorSemanticAnalyzeFail;30536 return ErrorSemanticAnalyzeFail;
...@@ -29645,7 +30565,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {...@@ -29645,7 +30565,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
29645 if (lazy_array_type->sentinel != nullptr) {30565 if (lazy_array_type->sentinel != nullptr) {
29646 if (type_is_invalid(lazy_array_type->sentinel->value->type))30566 if (type_is_invalid(lazy_array_type->sentinel->value->type))
29647 return ErrorSemanticAnalyzeFail;30567 return ErrorSemanticAnalyzeFail;
29648 IrInstruction *sentinel = ir_implicit_cast(ira, lazy_array_type->sentinel, elem_type);30568 IrInstGen *sentinel = ir_implicit_cast(ira, lazy_array_type->sentinel, elem_type);
29649 if (type_is_invalid(sentinel->value->type))30569 if (type_is_invalid(sentinel->value->type))
29650 return ErrorSemanticAnalyzeFail;30570 return ErrorSemanticAnalyzeFail;
29651 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);30571 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
...@@ -29669,7 +30589,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {...@@ -29669,7 +30589,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
29669 return ErrorSemanticAnalyzeFail;30589 return ErrorSemanticAnalyzeFail;
2967030590
29671 if (payload_type->id == ZigTypeIdOpaque || payload_type->id == ZigTypeIdUnreachable) {30591 if (payload_type->id == ZigTypeIdOpaque || payload_type->id == ZigTypeIdUnreachable) {
29672 ir_add_error(ira, lazy_opt_type->payload_type,30592 ir_add_error(ira, &lazy_opt_type->payload_type->base,
29673 buf_sprintf("type '%s' cannot be optional", buf_ptr(&payload_type->name)));30593 buf_sprintf("type '%s' cannot be optional", buf_ptr(&payload_type->name)));
29674 return ErrorSemanticAnalyzeFail;30594 return ErrorSemanticAnalyzeFail;
29675 }30595 }
...@@ -29711,7 +30631,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {...@@ -29711,7 +30631,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
29711 return ErrorSemanticAnalyzeFail;30631 return ErrorSemanticAnalyzeFail;
2971230632
29713 if (err_set_type->id != ZigTypeIdErrorSet) {30633 if (err_set_type->id != ZigTypeIdErrorSet) {
29714 ir_add_error(ira, lazy_err_union_type->err_set_type,30634 ir_add_error(ira, &lazy_err_union_type->err_set_type->base,
29715 buf_sprintf("expected error set type, found type '%s'",30635 buf_sprintf("expected error set type, found type '%s'",
29716 buf_ptr(&err_set_type->name)));30636 buf_ptr(&err_set_type->name)));
29717 return ErrorSemanticAnalyzeFail;30637 return ErrorSemanticAnalyzeFail;
...@@ -29747,8 +30667,8 @@ Error ir_resolve_lazy(CodeGen *codegen, AstNode *source_node, ZigValue *val) {...@@ -29747,8 +30667,8 @@ Error ir_resolve_lazy(CodeGen *codegen, AstNode *source_node, ZigValue *val) {
29747 return ErrorNone;30667 return ErrorNone;
29748}30668}
2974930669
29750void IrInstruction::src() {30670void IrInst::src() {
29751 IrInstruction *inst = this;30671 IrInst *inst = this;
29752 if (inst->source_node != nullptr) {30672 if (inst->source_node != nullptr) {
29753 inst->source_node->src();30673 inst->source_node->src();
29754 } else {30674 } else {
...@@ -29756,26 +30676,45 @@ void IrInstruction::src() {...@@ -29756,26 +30676,45 @@ void IrInstruction::src() {
29756 }30676 }
29757}30677}
2975830678
29759void IrInstruction::dump() {30679void IrInst::dump() {
29760 IrInstruction *inst = this;30680 this->src();
30681 fprintf(stderr, "IrInst(#%" PRIu32 ")\n", this->debug_id);
30682}
30683
30684void IrInstSrc::src() {
30685 this->base.src();
30686}
30687
30688void IrInstGen::src() {
30689 this->base.src();
30690}
30691
30692void IrInstSrc::dump() {
30693 IrInstSrc *inst = this;
29761 inst->src();30694 inst->src();
29762 IrPass pass = (inst->child == nullptr) ? IrPassGen : IrPassSrc;30695 if (inst->base.scope == nullptr) {
29763 if (inst->scope == nullptr) {
29764 fprintf(stderr, "(null scope)\n");30696 fprintf(stderr, "(null scope)\n");
29765 } else {30697 } else {
29766 ir_print_instruction(inst->scope->codegen, stderr, inst, 0, pass);30698 ir_print_inst_src(inst->base.scope->codegen, stderr, inst, 0);
29767 if (pass == IrPassSrc) {30699 fprintf(stderr, "-> ");
29768 fprintf(stderr, "-> ");30700 ir_print_inst_gen(inst->base.scope->codegen, stderr, inst->child, 0);
29769 ir_print_instruction(inst->scope->codegen, stderr, inst->child, 0, IrPassGen);30701 }
29770 }30702}
30703void IrInstGen::dump() {
30704 IrInstGen *inst = this;
30705 inst->src();
30706 if (inst->base.scope == nullptr) {
30707 fprintf(stderr, "(null scope)\n");
30708 } else {
30709 ir_print_inst_gen(inst->base.scope->codegen, stderr, inst, 0);
29771 }30710 }
29772}30711}
2977330712
29774void IrAnalyze::dump() {30713void IrAnalyze::dump() {
29775 ir_print(this->codegen, stderr, this->new_irb.exec, 0, IrPassGen);30714 ir_print_gen(this->codegen, stderr, this->new_irb.exec, 0);
29776 if (this->new_irb.current_basic_block != nullptr) {30715 if (this->new_irb.current_basic_block != nullptr) {
29777 fprintf(stderr, "Current basic block:\n");30716 fprintf(stderr, "Current basic block:\n");
29778 ir_print_basic_block(this->codegen, stderr, this->new_irb.current_basic_block, 1, IrPassGen);30717 ir_print_basic_block_gen(this->codegen, stderr, this->new_irb.current_basic_block, 1);
29779 }30718 }
29780}30719}
2978130720
src/ir.hpp+10-10
...@@ -10,33 +10,33 @@...@@ -10,33 +10,33 @@
1010
11#include "all_types.hpp"11#include "all_types.hpp"
1212
13enum IrPass {13bool ir_gen(CodeGen *g, AstNode *node, Scope *scope, IrExecutableSrc *ir_executable);
14 IrPassSrc,
15 IrPassGen,
16};
17
18bool ir_gen(CodeGen *g, AstNode *node, Scope *scope, IrExecutable *ir_executable);
19bool ir_gen_fn(CodeGen *g, ZigFn *fn_entry);14bool ir_gen_fn(CodeGen *g, ZigFn *fn_entry);
2015
16IrInstGen *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
17 ZigType *var_type, const char *name_hint);
18
21Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,19Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
22 ZigValue *return_ptr, size_t *backward_branch_count, size_t *backward_branch_quota,20 ZigValue *return_ptr, size_t *backward_branch_count, size_t *backward_branch_quota,
23 ZigFn *fn_entry, Buf *c_import_buf, AstNode *source_node, Buf *exec_name,21 ZigFn *fn_entry, Buf *c_import_buf, AstNode *source_node, Buf *exec_name,
24 IrExecutable *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef);22 IrExecutableGen *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef);
2523
26Error ir_resolve_lazy(CodeGen *codegen, AstNode *source_node, ZigValue *val);24Error ir_resolve_lazy(CodeGen *codegen, AstNode *source_node, ZigValue *val);
2725
28ZigType *ir_analyze(CodeGen *g, IrExecutable *old_executable, IrExecutable *new_executable,26ZigType *ir_analyze(CodeGen *g, IrExecutableSrc *old_executable, IrExecutableGen *new_executable,
29 ZigType *expected_type, AstNode *expected_type_source_node, ZigValue *return_ptr);27 ZigType *expected_type, AstNode *expected_type_source_node, ZigValue *return_ptr);
3028
31bool ir_has_side_effects(IrInstruction *instruction);29bool ir_inst_gen_has_side_effects(IrInstGen *inst);
30bool ir_inst_src_has_side_effects(IrInstSrc *inst);
3231
33struct IrAnalyze;32struct IrAnalyze;
34ZigValue *const_ptr_pointee(IrAnalyze *ira, CodeGen *codegen, ZigValue *const_val,33ZigValue *const_ptr_pointee(IrAnalyze *ira, CodeGen *codegen, ZigValue *const_val,
35 AstNode *source_node);34 AstNode *source_node);
36const char *float_op_to_name(BuiltinFnId op);
3735
38// for debugging purposes36// for debugging purposes
39void dbg_ir_break(const char *src_file, uint32_t line);37void dbg_ir_break(const char *src_file, uint32_t line);
40void dbg_ir_clear(void);38void dbg_ir_clear(void);
4139
40void destroy_instruction_gen(IrInstGen *inst);
41
42#endif42#endif
src/ir_print.cpp+1998-1281
...@@ -10,19 +10,35 @@...@@ -10,19 +10,35 @@
10#include "ir_print.hpp"10#include "ir_print.hpp"
11#include "os.hpp"11#include "os.hpp"
1212
13static uint32_t hash_instruction_ptr(IrInstruction* instruction) {13static uint32_t hash_inst_src_ptr(IrInstSrc* instruction) {
14 return (uint32_t)(uintptr_t)instruction;14 return (uint32_t)(uintptr_t)instruction;
15}15}
1616
17static bool instruction_ptr_equal(IrInstruction* a, IrInstruction* b) {17static uint32_t hash_inst_gen_ptr(IrInstGen* instruction) {
18 return (uint32_t)(uintptr_t)instruction;
19}
20
21static bool inst_src_ptr_eql(IrInstSrc* a, IrInstSrc* b) {
18 return a == b;22 return a == b;
19}23}
2024
21using InstructionSet = HashMap<IrInstruction*, uint8_t, hash_instruction_ptr, instruction_ptr_equal>;25static bool inst_gen_ptr_eql(IrInstGen* a, IrInstGen* b) {
22using InstructionList = ZigList<IrInstruction*>;26 return a == b;
27}
28
29using InstSetSrc = HashMap<IrInstSrc*, uint8_t, hash_inst_src_ptr, inst_src_ptr_eql>;
30using InstSetGen = HashMap<IrInstGen*, uint8_t, hash_inst_gen_ptr, inst_gen_ptr_eql>;
31using InstListSrc = ZigList<IrInstSrc*>;
32using InstListGen = ZigList<IrInstGen*>;
33
34struct IrPrintSrc {
35 CodeGen *codegen;
36 FILE *f;
37 int indent;
38 int indent_size;
39};
2340
24struct IrPrint {41struct IrPrintGen {
25 IrPass pass;
26 CodeGen *codegen;42 CodeGen *codegen;
27 FILE *f;43 FILE *f;
28 int indent;44 int indent;
...@@ -32,417 +48,590 @@ struct IrPrint {...@@ -32,417 +48,590 @@ struct IrPrint {
32 // present in the instruction list. Thus we track which instructions48 // present in the instruction list. Thus we track which instructions
33 // are printed (per executable) and after each pass 2 instruction those49 // are printed (per executable) and after each pass 2 instruction those
34 // var instructions are rendered in a trailing fashion.50 // var instructions are rendered in a trailing fashion.
35 InstructionSet printed;51 InstSetGen printed;
36 InstructionList pending;52 InstListGen pending;
37};53};
3854
39static void ir_print_other_instruction(IrPrint *irp, IrInstruction *instruction);55static void ir_print_other_inst_src(IrPrintSrc *irp, IrInstSrc *inst);
56static void ir_print_other_inst_gen(IrPrintGen *irp, IrInstGen *inst);
4057
41const char* ir_instruction_type_str(IrInstructionId id) {58const char* ir_inst_src_type_str(IrInstSrcId id) {
42 switch (id) {59 switch (id) {
43 case IrInstructionIdInvalid:60 case IrInstSrcIdInvalid:
44 return "Invalid";61 return "SrcInvalid";
45 case IrInstructionIdShuffleVector:62 case IrInstSrcIdShuffleVector:
46 return "Shuffle";63 return "SrcShuffle";
47 case IrInstructionIdSplatSrc:64 case IrInstSrcIdSplat:
48 return "SplatSrc";65 return "SrcSplat";
49 case IrInstructionIdSplatGen:66 case IrInstSrcIdDeclVar:
50 return "SplatGen";67 return "SrcDeclVar";
51 case IrInstructionIdDeclVarSrc:68 case IrInstSrcIdBr:
52 return "DeclVarSrc";69 return "SrcBr";
53 case IrInstructionIdDeclVarGen:70 case IrInstSrcIdCondBr:
54 return "DeclVarGen";71 return "SrcCondBr";
55 case IrInstructionIdBr:72 case IrInstSrcIdSwitchBr:
56 return "Br";73 return "SrcSwitchBr";
57 case IrInstructionIdCondBr:74 case IrInstSrcIdSwitchVar:
58 return "CondBr";75 return "SrcSwitchVar";
59 case IrInstructionIdSwitchBr:76 case IrInstSrcIdSwitchElseVar:
60 return "SwitchBr";77 return "SrcSwitchElseVar";
61 case IrInstructionIdSwitchVar:78 case IrInstSrcIdSwitchTarget:
62 return "SwitchVar";79 return "SrcSwitchTarget";
63 case IrInstructionIdSwitchElseVar:80 case IrInstSrcIdPhi:
64 return "SwitchElseVar";81 return "SrcPhi";
65 case IrInstructionIdSwitchTarget:82 case IrInstSrcIdUnOp:
66 return "SwitchTarget";83 return "SrcUnOp";
67 case IrInstructionIdPhi:84 case IrInstSrcIdBinOp:
68 return "Phi";85 return "SrcBinOp";
69 case IrInstructionIdUnOp:86 case IrInstSrcIdMergeErrSets:
70 return "UnOp";87 return "SrcMergeErrSets";
71 case IrInstructionIdBinOp:88 case IrInstSrcIdLoadPtr:
72 return "BinOp";89 return "SrcLoadPtr";
73 case IrInstructionIdMergeErrSets:90 case IrInstSrcIdStorePtr:
74 return "MergeErrSets";91 return "SrcStorePtr";
75 case IrInstructionIdLoadPtr:92 case IrInstSrcIdFieldPtr:
76 return "LoadPtr";93 return "SrcFieldPtr";
77 case IrInstructionIdLoadPtrGen:94 case IrInstSrcIdElemPtr:
78 return "LoadPtrGen";95 return "SrcElemPtr";
79 case IrInstructionIdStorePtr:96 case IrInstSrcIdVarPtr:
80 return "StorePtr";97 return "SrcVarPtr";
81 case IrInstructionIdVectorStoreElem:98 case IrInstSrcIdCallExtra:
82 return "VectorStoreElem";99 return "SrcCallExtra";
83 case IrInstructionIdFieldPtr:100 case IrInstSrcIdCall:
84 return "FieldPtr";101 return "SrcCall";
85 case IrInstructionIdStructFieldPtr:102 case IrInstSrcIdCallArgs:
86 return "StructFieldPtr";103 return "SrcCallArgs";
87 case IrInstructionIdUnionFieldPtr:104 case IrInstSrcIdConst:
88 return "UnionFieldPtr";105 return "SrcConst";
89 case IrInstructionIdElemPtr:106 case IrInstSrcIdReturn:
90 return "ElemPtr";107 return "SrcReturn";
91 case IrInstructionIdVarPtr:108 case IrInstSrcIdContainerInitList:
92 return "VarPtr";109 return "SrcContainerInitList";
93 case IrInstructionIdReturnPtr:110 case IrInstSrcIdContainerInitFields:
94 return "ReturnPtr";111 return "SrcContainerInitFields";
95 case IrInstructionIdCallExtra:112 case IrInstSrcIdUnreachable:
96 return "CallExtra";113 return "SrcUnreachable";
97 case IrInstructionIdCallSrc:114 case IrInstSrcIdTypeOf:
98 return "CallSrc";115 return "SrcTypeOf";
99 case IrInstructionIdCallSrcArgs:116 case IrInstSrcIdSetCold:
100 return "CallSrcArgs";117 return "SrcSetCold";
101 case IrInstructionIdCallGen:118 case IrInstSrcIdSetRuntimeSafety:
102 return "CallGen";119 return "SrcSetRuntimeSafety";
103 case IrInstructionIdConst:120 case IrInstSrcIdSetFloatMode:
104 return "Const";121 return "SrcSetFloatMode";
105 case IrInstructionIdReturn:122 case IrInstSrcIdArrayType:
106 return "Return";123 return "SrcArrayType";
107 case IrInstructionIdCast:124 case IrInstSrcIdAnyFrameType:
108 return "Cast";125 return "SrcAnyFrameType";
109 case IrInstructionIdResizeSlice:126 case IrInstSrcIdSliceType:
110 return "ResizeSlice";127 return "SrcSliceType";
111 case IrInstructionIdContainerInitList:128 case IrInstSrcIdAsm:
112 return "ContainerInitList";129 return "SrcAsm";
113 case IrInstructionIdContainerInitFields:130 case IrInstSrcIdSizeOf:
114 return "ContainerInitFields";131 return "SrcSizeOf";
115 case IrInstructionIdUnreachable:132 case IrInstSrcIdTestNonNull:
116 return "Unreachable";133 return "SrcTestNonNull";
117 case IrInstructionIdTypeOf:134 case IrInstSrcIdOptionalUnwrapPtr:
118 return "TypeOf";135 return "SrcOptionalUnwrapPtr";
119 case IrInstructionIdSetCold:136 case IrInstSrcIdClz:
120 return "SetCold";137 return "SrcClz";
121 case IrInstructionIdSetRuntimeSafety:138 case IrInstSrcIdCtz:
122 return "SetRuntimeSafety";139 return "SrcCtz";
123 case IrInstructionIdSetFloatMode:140 case IrInstSrcIdPopCount:
124 return "SetFloatMode";141 return "SrcPopCount";
125 case IrInstructionIdArrayType:142 case IrInstSrcIdBswap:
126 return "ArrayType";143 return "SrcBswap";
127 case IrInstructionIdAnyFrameType:144 case IrInstSrcIdBitReverse:
128 return "AnyFrameType";145 return "SrcBitReverse";
129 case IrInstructionIdSliceType:146 case IrInstSrcIdImport:
130 return "SliceType";147 return "SrcImport";
131 case IrInstructionIdAsmSrc:148 case IrInstSrcIdCImport:
132 return "AsmSrc";149 return "SrcCImport";
133 case IrInstructionIdAsmGen:150 case IrInstSrcIdCInclude:
134 return "AsmGen";151 return "SrcCInclude";
135 case IrInstructionIdSizeOf:152 case IrInstSrcIdCDefine:
136 return "SizeOf";153 return "SrcCDefine";
137 case IrInstructionIdTestNonNull:154 case IrInstSrcIdCUndef:
138 return "TestNonNull";155 return "SrcCUndef";
139 case IrInstructionIdOptionalUnwrapPtr:156 case IrInstSrcIdRef:
140 return "OptionalUnwrapPtr";157 return "SrcRef";
141 case IrInstructionIdOptionalWrap:158 case IrInstSrcIdCompileErr:
142 return "OptionalWrap";159 return "SrcCompileErr";
143 case IrInstructionIdUnionTag:160 case IrInstSrcIdCompileLog:
144 return "UnionTag";161 return "SrcCompileLog";
145 case IrInstructionIdClz:162 case IrInstSrcIdErrName:
146 return "Clz";163 return "SrcErrName";
147 case IrInstructionIdCtz:164 case IrInstSrcIdEmbedFile:
148 return "Ctz";165 return "SrcEmbedFile";
149 case IrInstructionIdPopCount:166 case IrInstSrcIdCmpxchg:
150 return "PopCount";167 return "SrcCmpxchg";
151 case IrInstructionIdBswap:168 case IrInstSrcIdFence:
152 return "Bswap";169 return "SrcFence";
153 case IrInstructionIdBitReverse:170 case IrInstSrcIdTruncate:
154 return "BitReverse";171 return "SrcTruncate";
155 case IrInstructionIdImport:172 case IrInstSrcIdIntCast:
156 return "Import";173 return "SrcIntCast";
157 case IrInstructionIdCImport:174 case IrInstSrcIdFloatCast:
158 return "CImport";175 return "SrcFloatCast";
159 case IrInstructionIdCInclude:176 case IrInstSrcIdIntToFloat:
160 return "CInclude";177 return "SrcIntToFloat";
161 case IrInstructionIdCDefine:178 case IrInstSrcIdFloatToInt:
162 return "CDefine";179 return "SrcFloatToInt";
163 case IrInstructionIdCUndef:180 case IrInstSrcIdBoolToInt:
164 return "CUndef";181 return "SrcBoolToInt";
165 case IrInstructionIdRef:182 case IrInstSrcIdIntType:
166 return "Ref";183 return "SrcIntType";
167 case IrInstructionIdRefGen:184 case IrInstSrcIdVectorType:
168 return "RefGen";185 return "SrcVectorType";
169 case IrInstructionIdCompileErr:186 case IrInstSrcIdBoolNot:
170 return "CompileErr";187 return "SrcBoolNot";
171 case IrInstructionIdCompileLog:188 case IrInstSrcIdMemset:
172 return "CompileLog";189 return "SrcMemset";
173 case IrInstructionIdErrName:190 case IrInstSrcIdMemcpy:
174 return "ErrName";191 return "SrcMemcpy";
175 case IrInstructionIdEmbedFile:192 case IrInstSrcIdSlice:
176 return "EmbedFile";193 return "SrcSlice";
177 case IrInstructionIdCmpxchgSrc:194 case IrInstSrcIdMemberCount:
178 return "CmpxchgSrc";195 return "SrcMemberCount";
179 case IrInstructionIdCmpxchgGen:196 case IrInstSrcIdMemberType:
180 return "CmpxchgGen";197 return "SrcMemberType";
181 case IrInstructionIdFence:198 case IrInstSrcIdMemberName:
182 return "Fence";199 return "SrcMemberName";
183 case IrInstructionIdTruncate:200 case IrInstSrcIdBreakpoint:
184 return "Truncate";201 return "SrcBreakpoint";
185 case IrInstructionIdIntCast:202 case IrInstSrcIdReturnAddress:
186 return "IntCast";203 return "SrcReturnAddress";
187 case IrInstructionIdFloatCast:204 case IrInstSrcIdFrameAddress:
188 return "FloatCast";205 return "SrcFrameAddress";
189 case IrInstructionIdIntToFloat:206 case IrInstSrcIdFrameHandle:
190 return "IntToFloat";207 return "SrcFrameHandle";
191 case IrInstructionIdFloatToInt:208 case IrInstSrcIdFrameType:
192 return "FloatToInt";209 return "SrcFrameType";
193 case IrInstructionIdBoolToInt:210 case IrInstSrcIdFrameSize:
194 return "BoolToInt";211 return "SrcFrameSize";
195 case IrInstructionIdIntType:212 case IrInstSrcIdAlignOf:
196 return "IntType";213 return "SrcAlignOf";
197 case IrInstructionIdVectorType:214 case IrInstSrcIdOverflowOp:
198 return "VectorType";215 return "SrcOverflowOp";
199 case IrInstructionIdBoolNot:216 case IrInstSrcIdTestErr:
200 return "BoolNot";217 return "SrcTestErr";
201 case IrInstructionIdMemset:218 case IrInstSrcIdMulAdd:
202 return "Memset";219 return "SrcMulAdd";
203 case IrInstructionIdMemcpy:220 case IrInstSrcIdFloatOp:
204 return "Memcpy";221 return "SrcFloatOp";
205 case IrInstructionIdSliceSrc:222 case IrInstSrcIdUnwrapErrCode:
206 return "SliceSrc";223 return "SrcUnwrapErrCode";
207 case IrInstructionIdSliceGen:224 case IrInstSrcIdUnwrapErrPayload:
208 return "SliceGen";225 return "SrcUnwrapErrPayload";
209 case IrInstructionIdMemberCount:226 case IrInstSrcIdFnProto:
210 return "MemberCount";227 return "SrcFnProto";
211 case IrInstructionIdMemberType:228 case IrInstSrcIdTestComptime:
212 return "MemberType";229 return "SrcTestComptime";
213 case IrInstructionIdMemberName:230 case IrInstSrcIdPtrCast:
214 return "MemberName";231 return "SrcPtrCast";
215 case IrInstructionIdBreakpoint:232 case IrInstSrcIdBitCast:
216 return "Breakpoint";233 return "SrcBitCast";
217 case IrInstructionIdReturnAddress:234 case IrInstSrcIdIntToPtr:
218 return "ReturnAddress";235 return "SrcIntToPtr";
219 case IrInstructionIdFrameAddress:236 case IrInstSrcIdPtrToInt:
220 return "FrameAddress";237 return "SrcPtrToInt";
221 case IrInstructionIdFrameHandle:238 case IrInstSrcIdIntToEnum:
222 return "FrameHandle";239 return "SrcIntToEnum";
223 case IrInstructionIdFrameType:240 case IrInstSrcIdEnumToInt:
224 return "FrameType";241 return "SrcEnumToInt";
225 case IrInstructionIdFrameSizeSrc:242 case IrInstSrcIdIntToErr:
226 return "FrameSizeSrc";243 return "SrcIntToErr";
227 case IrInstructionIdFrameSizeGen:244 case IrInstSrcIdErrToInt:
228 return "FrameSizeGen";245 return "SrcErrToInt";
229 case IrInstructionIdAlignOf:246 case IrInstSrcIdCheckSwitchProngs:
230 return "AlignOf";247 return "SrcCheckSwitchProngs";
231 case IrInstructionIdOverflowOp:248 case IrInstSrcIdCheckStatementIsVoid:
232 return "OverflowOp";249 return "SrcCheckStatementIsVoid";
233 case IrInstructionIdTestErrSrc:250 case IrInstSrcIdTypeName:
234 return "TestErrSrc";251 return "SrcTypeName";
235 case IrInstructionIdTestErrGen:252 case IrInstSrcIdDeclRef:
236 return "TestErrGen";253 return "SrcDeclRef";
237 case IrInstructionIdMulAdd:254 case IrInstSrcIdPanic:
238 return "MulAdd";255 return "SrcPanic";
239 case IrInstructionIdFloatOp:256 case IrInstSrcIdTagName:
240 return "FloatOp";257 return "SrcTagName";
241 case IrInstructionIdUnwrapErrCode:258 case IrInstSrcIdTagType:
242 return "UnwrapErrCode";259 return "SrcTagType";
243 case IrInstructionIdUnwrapErrPayload:260 case IrInstSrcIdFieldParentPtr:
244 return "UnwrapErrPayload";261 return "SrcFieldParentPtr";
245 case IrInstructionIdErrWrapCode:262 case IrInstSrcIdByteOffsetOf:
246 return "ErrWrapCode";263 return "SrcByteOffsetOf";
247 case IrInstructionIdErrWrapPayload:264 case IrInstSrcIdBitOffsetOf:
248 return "ErrWrapPayload";265 return "SrcBitOffsetOf";
249 case IrInstructionIdFnProto:266 case IrInstSrcIdTypeInfo:
250 return "FnProto";267 return "SrcTypeInfo";
251 case IrInstructionIdTestComptime:268 case IrInstSrcIdType:
252 return "TestComptime";269 return "SrcType";
253 case IrInstructionIdPtrCastSrc:270 case IrInstSrcIdHasField:
254 return "PtrCastSrc";271 return "SrcHasField";
255 case IrInstructionIdPtrCastGen:272 case IrInstSrcIdTypeId:
256 return "PtrCastGen";273 return "SrcTypeId";
257 case IrInstructionIdBitCastSrc:274 case IrInstSrcIdSetEvalBranchQuota:
258 return "BitCastSrc";275 return "SrcSetEvalBranchQuota";
259 case IrInstructionIdBitCastGen:276 case IrInstSrcIdPtrType:
260 return "BitCastGen";277 return "SrcPtrType";
261 case IrInstructionIdWidenOrShorten:278 case IrInstSrcIdAlignCast:
262 return "WidenOrShorten";279 return "SrcAlignCast";
263 case IrInstructionIdIntToPtr:280 case IrInstSrcIdImplicitCast:
264 return "IntToPtr";281 return "SrcImplicitCast";
265 case IrInstructionIdPtrToInt:282 case IrInstSrcIdResolveResult:
266 return "PtrToInt";283 return "SrcResolveResult";
267 case IrInstructionIdIntToEnum:284 case IrInstSrcIdResetResult:
268 return "IntToEnum";285 return "SrcResetResult";
269 case IrInstructionIdEnumToInt:286 case IrInstSrcIdOpaqueType:
270 return "EnumToInt";287 return "SrcOpaqueType";
271 case IrInstructionIdIntToErr:288 case IrInstSrcIdSetAlignStack:
272 return "IntToErr";289 return "SrcSetAlignStack";
273 case IrInstructionIdErrToInt:290 case IrInstSrcIdArgType:
274 return "ErrToInt";291 return "SrcArgType";
275 case IrInstructionIdCheckSwitchProngs:292 case IrInstSrcIdExport:
276 return "CheckSwitchProngs";293 return "SrcExport";
277 case IrInstructionIdCheckStatementIsVoid:294 case IrInstSrcIdErrorReturnTrace:
278 return "CheckStatementIsVoid";295 return "SrcErrorReturnTrace";
279 case IrInstructionIdTypeName:296 case IrInstSrcIdErrorUnion:
280 return "TypeName";297 return "SrcErrorUnion";
281 case IrInstructionIdDeclRef:298 case IrInstSrcIdAtomicRmw:
282 return "DeclRef";299 return "SrcAtomicRmw";
283 case IrInstructionIdPanic:300 case IrInstSrcIdAtomicLoad:
284 return "Panic";301 return "SrcAtomicLoad";
285 case IrInstructionIdTagName:302 case IrInstSrcIdAtomicStore:
286 return "TagName";303 return "SrcAtomicStore";
287 case IrInstructionIdTagType:304 case IrInstSrcIdSaveErrRetAddr:
288 return "TagType";305 return "SrcSaveErrRetAddr";
289 case IrInstructionIdFieldParentPtr:306 case IrInstSrcIdAddImplicitReturnType:
290 return "FieldParentPtr";307 return "SrcAddImplicitReturnType";
291 case IrInstructionIdByteOffsetOf:308 case IrInstSrcIdErrSetCast:
292 return "ByteOffsetOf";309 return "SrcErrSetCast";
293 case IrInstructionIdBitOffsetOf:310 case IrInstSrcIdToBytes:
294 return "BitOffsetOf";311 return "SrcToBytes";
295 case IrInstructionIdTypeInfo:312 case IrInstSrcIdFromBytes:
296 return "TypeInfo";313 return "SrcFromBytes";
297 case IrInstructionIdType:314 case IrInstSrcIdCheckRuntimeScope:
298 return "Type";315 return "SrcCheckRuntimeScope";
299 case IrInstructionIdHasField:316 case IrInstSrcIdHasDecl:
300 return "HasField";317 return "SrcHasDecl";
301 case IrInstructionIdTypeId:318 case IrInstSrcIdUndeclaredIdent:
302 return "TypeId";319 return "SrcUndeclaredIdent";
303 case IrInstructionIdSetEvalBranchQuota:320 case IrInstSrcIdAlloca:
304 return "SetEvalBranchQuota";321 return "SrcAlloca";
305 case IrInstructionIdPtrType:322 case IrInstSrcIdEndExpr:
306 return "PtrType";323 return "SrcEndExpr";
307 case IrInstructionIdAlignCast:324 case IrInstSrcIdUnionInitNamedField:
308 return "AlignCast";325 return "SrcUnionInitNamedField";
309 case IrInstructionIdImplicitCast:326 case IrInstSrcIdSuspendBegin:
310 return "ImplicitCast";327 return "SrcSuspendBegin";
311 case IrInstructionIdResolveResult:328 case IrInstSrcIdSuspendFinish:
312 return "ResolveResult";329 return "SrcSuspendFinish";
313 case IrInstructionIdResetResult:330 case IrInstSrcIdAwait:
314 return "ResetResult";331 return "SrcAwaitSr";
315 case IrInstructionIdOpaqueType:332 case IrInstSrcIdResume:
316 return "OpaqueType";333 return "SrcResume";
317 case IrInstructionIdSetAlignStack:334 case IrInstSrcIdSpillBegin:
318 return "SetAlignStack";335 return "SrcSpillBegin";
319 case IrInstructionIdArgType:336 case IrInstSrcIdSpillEnd:
320 return "ArgType";337 return "SrcSpillEnd";
321 case IrInstructionIdExport:
322 return "Export";
323 case IrInstructionIdErrorReturnTrace:
324 return "ErrorReturnTrace";
325 case IrInstructionIdErrorUnion:
326 return "ErrorUnion";
327 case IrInstructionIdAtomicRmw:
328 return "AtomicRmw";
329 case IrInstructionIdAtomicLoad:
330 return "AtomicLoad";
331 case IrInstructionIdAtomicStore:
332 return "AtomicStore";
333 case IrInstructionIdSaveErrRetAddr:
334 return "SaveErrRetAddr";
335 case IrInstructionIdAddImplicitReturnType:
336 return "AddImplicitReturnType";
337 case IrInstructionIdErrSetCast:
338 return "ErrSetCast";
339 case IrInstructionIdToBytes:
340 return "ToBytes";
341 case IrInstructionIdFromBytes:
342 return "FromBytes";
343 case IrInstructionIdCheckRuntimeScope:
344 return "CheckRuntimeScope";
345 case IrInstructionIdVectorToArray:
346 return "VectorToArray";
347 case IrInstructionIdArrayToVector:
348 return "ArrayToVector";
349 case IrInstructionIdAssertZero:
350 return "AssertZero";
351 case IrInstructionIdAssertNonNull:
352 return "AssertNonNull";
353 case IrInstructionIdHasDecl:
354 return "HasDecl";
355 case IrInstructionIdUndeclaredIdent:
356 return "UndeclaredIdent";
357 case IrInstructionIdAllocaSrc:
358 return "AllocaSrc";
359 case IrInstructionIdAllocaGen:
360 return "AllocaGen";
361 case IrInstructionIdEndExpr:
362 return "EndExpr";
363 case IrInstructionIdPtrOfArrayToSlice:
364 return "PtrOfArrayToSlice";
365 case IrInstructionIdUnionInitNamedField:
366 return "UnionInitNamedField";
367 case IrInstructionIdSuspendBegin:
368 return "SuspendBegin";
369 case IrInstructionIdSuspendFinish:
370 return "SuspendFinish";
371 case IrInstructionIdAwaitSrc:
372 return "AwaitSrc";
373 case IrInstructionIdAwaitGen:
374 return "AwaitGen";
375 case IrInstructionIdResume:
376 return "Resume";
377 case IrInstructionIdSpillBegin:
378 return "SpillBegin";
379 case IrInstructionIdSpillEnd:
380 return "SpillEnd";
381 case IrInstructionIdVectorExtractElem:
382 return "VectorExtractElem";
383 }338 }
384 zig_unreachable();339 zig_unreachable();
385}340}
386341
387static void ir_print_indent(IrPrint *irp) {342const char* ir_inst_gen_type_str(IrInstGenId id) {
343 switch (id) {
344 case IrInstGenIdInvalid:
345 return "GenInvalid";
346 case IrInstGenIdShuffleVector:
347 return "GenShuffle";
348 case IrInstGenIdSplat:
349 return "GenSplat";
350 case IrInstGenIdDeclVar:
351 return "GenDeclVar";
352 case IrInstGenIdBr:
353 return "GenBr";
354 case IrInstGenIdCondBr:
355 return "GenCondBr";
356 case IrInstGenIdSwitchBr:
357 return "GenSwitchBr";
358 case IrInstGenIdPhi:
359 return "GenPhi";
360 case IrInstGenIdBinOp:
361 return "GenBinOp";
362 case IrInstGenIdLoadPtr:
363 return "GenLoadPtr";
364 case IrInstGenIdStorePtr:
365 return "GenStorePtr";
366 case IrInstGenIdVectorStoreElem:
367 return "GenVectorStoreElem";
368 case IrInstGenIdStructFieldPtr:
369 return "GenStructFieldPtr";
370 case IrInstGenIdUnionFieldPtr:
371 return "GenUnionFieldPtr";
372 case IrInstGenIdElemPtr:
373 return "GenElemPtr";
374 case IrInstGenIdVarPtr:
375 return "GenVarPtr";
376 case IrInstGenIdReturnPtr:
377 return "GenReturnPtr";
378 case IrInstGenIdCall:
379 return "GenCall";
380 case IrInstGenIdConst:
381 return "GenConst";
382 case IrInstGenIdReturn:
383 return "GenReturn";
384 case IrInstGenIdCast:
385 return "GenCast";
386 case IrInstGenIdResizeSlice:
387 return "GenResizeSlice";
388 case IrInstGenIdUnreachable:
389 return "GenUnreachable";
390 case IrInstGenIdAsm:
391 return "GenAsm";
392 case IrInstGenIdTestNonNull:
393 return "GenTestNonNull";
394 case IrInstGenIdOptionalUnwrapPtr:
395 return "GenOptionalUnwrapPtr";
396 case IrInstGenIdOptionalWrap:
397 return "GenOptionalWrap";
398 case IrInstGenIdUnionTag:
399 return "GenUnionTag";
400 case IrInstGenIdClz:
401 return "GenClz";
402 case IrInstGenIdCtz:
403 return "GenCtz";
404 case IrInstGenIdPopCount:
405 return "GenPopCount";
406 case IrInstGenIdBswap:
407 return "GenBswap";
408 case IrInstGenIdBitReverse:
409 return "GenBitReverse";
410 case IrInstGenIdRef:
411 return "GenRef";
412 case IrInstGenIdErrName:
413 return "GenErrName";
414 case IrInstGenIdCmpxchg:
415 return "GenCmpxchg";
416 case IrInstGenIdFence:
417 return "GenFence";
418 case IrInstGenIdTruncate:
419 return "GenTruncate";
420 case IrInstGenIdBoolNot:
421 return "GenBoolNot";
422 case IrInstGenIdMemset:
423 return "GenMemset";
424 case IrInstGenIdMemcpy:
425 return "GenMemcpy";
426 case IrInstGenIdSlice:
427 return "GenSlice";
428 case IrInstGenIdBreakpoint:
429 return "GenBreakpoint";
430 case IrInstGenIdReturnAddress:
431 return "GenReturnAddress";
432 case IrInstGenIdFrameAddress:
433 return "GenFrameAddress";
434 case IrInstGenIdFrameHandle:
435 return "GenFrameHandle";
436 case IrInstGenIdFrameSize:
437 return "GenFrameSize";
438 case IrInstGenIdOverflowOp:
439 return "GenOverflowOp";
440 case IrInstGenIdTestErr:
441 return "GenTestErr";
442 case IrInstGenIdMulAdd:
443 return "GenMulAdd";
444 case IrInstGenIdFloatOp:
445 return "GenFloatOp";
446 case IrInstGenIdUnwrapErrCode:
447 return "GenUnwrapErrCode";
448 case IrInstGenIdUnwrapErrPayload:
449 return "GenUnwrapErrPayload";
450 case IrInstGenIdErrWrapCode:
451 return "GenErrWrapCode";
452 case IrInstGenIdErrWrapPayload:
453 return "GenErrWrapPayload";
454 case IrInstGenIdPtrCast:
455 return "GenPtrCast";
456 case IrInstGenIdBitCast:
457 return "GenBitCast";
458 case IrInstGenIdWidenOrShorten:
459 return "GenWidenOrShorten";
460 case IrInstGenIdIntToPtr:
461 return "GenIntToPtr";
462 case IrInstGenIdPtrToInt:
463 return "GenPtrToInt";
464 case IrInstGenIdIntToEnum:
465 return "GenIntToEnum";
466 case IrInstGenIdIntToErr:
467 return "GenIntToErr";
468 case IrInstGenIdErrToInt:
469 return "GenErrToInt";
470 case IrInstGenIdPanic:
471 return "GenPanic";
472 case IrInstGenIdTagName:
473 return "GenTagName";
474 case IrInstGenIdFieldParentPtr:
475 return "GenFieldParentPtr";
476 case IrInstGenIdAlignCast:
477 return "GenAlignCast";
478 case IrInstGenIdErrorReturnTrace:
479 return "GenErrorReturnTrace";
480 case IrInstGenIdAtomicRmw:
481 return "GenAtomicRmw";
482 case IrInstGenIdAtomicLoad:
483 return "GenAtomicLoad";
484 case IrInstGenIdAtomicStore:
485 return "GenAtomicStore";
486 case IrInstGenIdSaveErrRetAddr:
487 return "GenSaveErrRetAddr";
488 case IrInstGenIdVectorToArray:
489 return "GenVectorToArray";
490 case IrInstGenIdArrayToVector:
491 return "GenArrayToVector";
492 case IrInstGenIdAssertZero:
493 return "GenAssertZero";
494 case IrInstGenIdAssertNonNull:
495 return "GenAssertNonNull";
496 case IrInstGenIdAlloca:
497 return "GenAlloca";
498 case IrInstGenIdPtrOfArrayToSlice:
499 return "GenPtrOfArrayToSlice";
500 case IrInstGenIdSuspendBegin:
501 return "GenSuspendBegin";
502 case IrInstGenIdSuspendFinish:
503 return "GenSuspendFinish";
504 case IrInstGenIdAwait:
505 return "GenAwait";
506 case IrInstGenIdResume:
507 return "GenResume";
508 case IrInstGenIdSpillBegin:
509 return "GenSpillBegin";
510 case IrInstGenIdSpillEnd:
511 return "GenSpillEnd";
512 case IrInstGenIdVectorExtractElem:
513 return "GenVectorExtractElem";
514 case IrInstGenIdBinaryNot:
515 return "GenBinaryNot";
516 case IrInstGenIdNegation:
517 return "GenNegation";
518 case IrInstGenIdNegationWrapping:
519 return "GenNegationWrapping";
520 }
521 zig_unreachable();
522}
523
524static void ir_print_indent_src(IrPrintSrc *irp) {
388 for (int i = 0; i < irp->indent; i += 1) {525 for (int i = 0; i < irp->indent; i += 1) {
389 fprintf(irp->f, " ");526 fprintf(irp->f, " ");
390 }527 }
391}528}
392529
393static void ir_print_prefix(IrPrint *irp, IrInstruction *instruction, bool trailing) {530static void ir_print_indent_gen(IrPrintGen *irp) {
394 ir_print_indent(irp);531 for (int i = 0; i < irp->indent; i += 1) {
532 fprintf(irp->f, " ");
533 }
534}
535
536static void ir_print_prefix_src(IrPrintSrc *irp, IrInstSrc *instruction, bool trailing) {
537 ir_print_indent_src(irp);
538 const char mark = trailing ? ':' : '#';
539 const char *type_name;
540 if (instruction->id == IrInstSrcIdConst) {
541 type_name = buf_ptr(&reinterpret_cast<IrInstSrcConst *>(instruction)->value->type->name);
542 } else if (instruction->is_noreturn) {
543 type_name = "noreturn";
544 } else {
545 type_name = "(unknown)";
546 }
547 const char *ref_count = ir_inst_src_has_side_effects(instruction) ?
548 "-" : buf_ptr(buf_sprintf("%" PRIu32 "", instruction->base.ref_count));
549 fprintf(irp->f, "%c%-3" PRIu32 "| %-22s| %-12s| %-2s| ", mark, instruction->base.debug_id,
550 ir_inst_src_type_str(instruction->id), type_name, ref_count);
551}
552
553static void ir_print_prefix_gen(IrPrintGen *irp, IrInstGen *instruction, bool trailing) {
554 ir_print_indent_gen(irp);
395 const char mark = trailing ? ':' : '#';555 const char mark = trailing ? ':' : '#';
396 const char *type_name = instruction->value->type ? buf_ptr(&instruction->value->type->name) : "(unknown)";556 const char *type_name = instruction->value->type ? buf_ptr(&instruction->value->type->name) : "(unknown)";
397 const char *ref_count = ir_has_side_effects(instruction) ?557 const char *ref_count = ir_inst_gen_has_side_effects(instruction) ?
398 "-" : buf_ptr(buf_sprintf("%" PRIu32 "", instruction->ref_count));558 "-" : buf_ptr(buf_sprintf("%" PRIu32 "", instruction->base.ref_count));
399 fprintf(irp->f, "%c%-3" PRIu32 "| %-22s| %-12s| %-2s| ", mark, instruction->debug_id,559 fprintf(irp->f, "%c%-3" PRIu32 "| %-22s| %-12s| %-2s| ", mark, instruction->base.debug_id,
400 ir_instruction_type_str(instruction->id), type_name, ref_count);560 ir_inst_gen_type_str(instruction->id), type_name, ref_count);
401}561}
402562
403static void ir_print_const_value(IrPrint *irp, ZigValue *const_val) {563static void ir_print_var_src(IrPrintSrc *irp, IrInstSrc *inst) {
404 Buf buf = BUF_INIT;564 fprintf(irp->f, "#%" PRIu32 "", inst->base.debug_id);
405 buf_resize(&buf, 0);
406 render_const_value(irp->codegen, &buf, const_val);
407 fprintf(irp->f, "%s", buf_ptr(&buf));
408}565}
409566
410static void ir_print_var_instruction(IrPrint *irp, IrInstruction *instruction) {567static void ir_print_var_gen(IrPrintGen *irp, IrInstGen *inst) {
411 fprintf(irp->f, "#%" PRIu32 "", instruction->debug_id);568 fprintf(irp->f, "#%" PRIu32 "", inst->base.debug_id);
412 if (irp->pass != IrPassSrc && irp->printed.maybe_get(instruction) == nullptr) {569 if (irp->printed.maybe_get(inst) == nullptr) {
413 irp->printed.put(instruction, 0);570 irp->printed.put(inst, 0);
414 irp->pending.append(instruction);571 irp->pending.append(inst);
415 }572 }
416}573}
417574
418static void ir_print_other_instruction(IrPrint *irp, IrInstruction *instruction) {575static void ir_print_other_inst_src(IrPrintSrc *irp, IrInstSrc *inst) {
419 if (instruction == nullptr) {576 if (inst == nullptr) {
420 fprintf(irp->f, "(null)");577 fprintf(irp->f, "(null)");
421 return;578 return;
422 }579 }
580 ir_print_var_src(irp, inst);
581}
582
583static void ir_print_const_value(CodeGen *g, FILE *f, ZigValue *const_val) {
584 Buf buf = BUF_INIT;
585 buf_resize(&buf, 0);
586 render_const_value(g, &buf, const_val);
587 fprintf(f, "%s", buf_ptr(&buf));
588}
589
590static void ir_print_other_inst_gen(IrPrintGen *irp, IrInstGen *inst) {
591 if (inst == nullptr) {
592 fprintf(irp->f, "(null)");
593 return;
594 }
595
596 if (inst->value->special != ConstValSpecialRuntime) {
597 ir_print_const_value(irp->codegen, irp->f, inst->value);
598 } else {
599 ir_print_var_gen(irp, inst);
600 }
601}
423602
424 if (instruction->value->special != ConstValSpecialRuntime) {603static void ir_print_other_block(IrPrintSrc *irp, IrBasicBlockSrc *bb) {
425 ir_print_const_value(irp, instruction->value);604 if (bb == nullptr) {
605 fprintf(irp->f, "(null block)");
426 } else {606 } else {
427 ir_print_var_instruction(irp, instruction);607 fprintf(irp->f, "$%s_%" PRIu32 "", bb->name_hint, bb->debug_id);
428 }608 }
429}609}
430610
431static void ir_print_other_block(IrPrint *irp, IrBasicBlock *bb) {611static void ir_print_other_block_gen(IrPrintGen *irp, IrBasicBlockGen *bb) {
432 if (bb == nullptr) {612 if (bb == nullptr) {
433 fprintf(irp->f, "(null block)");613 fprintf(irp->f, "(null block)");
434 } else {614 } else {
435 fprintf(irp->f, "$%s_%" ZIG_PRI_usize "", bb->name_hint, bb->debug_id);615 fprintf(irp->f, "$%s_%" PRIu32 "", bb->name_hint, bb->debug_id);
436 }616 }
437}617}
438618
439static void ir_print_return(IrPrint *irp, IrInstructionReturn *instruction) {619static void ir_print_return_src(IrPrintSrc *irp, IrInstSrcReturn *inst) {
440 fprintf(irp->f, "return ");620 fprintf(irp->f, "return ");
441 ir_print_other_instruction(irp, instruction->operand);621 ir_print_other_inst_src(irp, inst->operand);
442}622}
443623
444static void ir_print_const(IrPrint *irp, IrInstructionConst *const_instruction) {624static void ir_print_return_gen(IrPrintGen *irp, IrInstGenReturn *inst) {
445 ir_print_const_value(irp, const_instruction->base.value);625 fprintf(irp->f, "return ");
626 ir_print_other_inst_gen(irp, inst->operand);
627}
628
629static void ir_print_const(IrPrintSrc *irp, IrInstSrcConst *const_instruction) {
630 ir_print_const_value(irp->codegen, irp->f, const_instruction->value);
631}
632
633static void ir_print_const(IrPrintGen *irp, IrInstGenConst *const_instruction) {
634 ir_print_const_value(irp->codegen, irp->f, const_instruction->base.value);
446}635}
447636
448static const char *ir_bin_op_id_str(IrBinOp op_id) {637static const char *ir_bin_op_id_str(IrBinOp op_id) {
...@@ -531,89 +720,111 @@ static const char *ir_un_op_id_str(IrUnOp op_id) {...@@ -531,89 +720,111 @@ static const char *ir_un_op_id_str(IrUnOp op_id) {
531 zig_unreachable();720 zig_unreachable();
532}721}
533722
534static void ir_print_un_op(IrPrint *irp, IrInstructionUnOp *un_op_instruction) {723static void ir_print_un_op(IrPrintSrc *irp, IrInstSrcUnOp *inst) {
535 fprintf(irp->f, "%s ", ir_un_op_id_str(un_op_instruction->op_id));724 fprintf(irp->f, "%s ", ir_un_op_id_str(inst->op_id));
536 ir_print_other_instruction(irp, un_op_instruction->value);725 ir_print_other_inst_src(irp, inst->value);
726}
727
728static void ir_print_bin_op(IrPrintSrc *irp, IrInstSrcBinOp *bin_op_instruction) {
729 ir_print_other_inst_src(irp, bin_op_instruction->op1);
730 fprintf(irp->f, " %s ", ir_bin_op_id_str(bin_op_instruction->op_id));
731 ir_print_other_inst_src(irp, bin_op_instruction->op2);
732 if (!bin_op_instruction->safety_check_on) {
733 fprintf(irp->f, " // no safety");
734 }
537}735}
538736
539static void ir_print_bin_op(IrPrint *irp, IrInstructionBinOp *bin_op_instruction) {737static void ir_print_bin_op(IrPrintGen *irp, IrInstGenBinOp *bin_op_instruction) {
540 ir_print_other_instruction(irp, bin_op_instruction->op1);738 ir_print_other_inst_gen(irp, bin_op_instruction->op1);
541 fprintf(irp->f, " %s ", ir_bin_op_id_str(bin_op_instruction->op_id));739 fprintf(irp->f, " %s ", ir_bin_op_id_str(bin_op_instruction->op_id));
542 ir_print_other_instruction(irp, bin_op_instruction->op2);740 ir_print_other_inst_gen(irp, bin_op_instruction->op2);
543 if (!bin_op_instruction->safety_check_on) {741 if (!bin_op_instruction->safety_check_on) {
544 fprintf(irp->f, " // no safety");742 fprintf(irp->f, " // no safety");
545 }743 }
546}744}
547745
548static void ir_print_merge_err_sets(IrPrint *irp, IrInstructionMergeErrSets *instruction) {746static void ir_print_merge_err_sets(IrPrintSrc *irp, IrInstSrcMergeErrSets *instruction) {
549 ir_print_other_instruction(irp, instruction->op1);747 ir_print_other_inst_src(irp, instruction->op1);
550 fprintf(irp->f, " || ");748 fprintf(irp->f, " || ");
551 ir_print_other_instruction(irp, instruction->op2);749 ir_print_other_inst_src(irp, instruction->op2);
552 if (instruction->type_name != nullptr) {750 if (instruction->type_name != nullptr) {
553 fprintf(irp->f, " // name=%s", buf_ptr(instruction->type_name));751 fprintf(irp->f, " // name=%s", buf_ptr(instruction->type_name));
554 }752 }
555}753}
556754
557static void ir_print_decl_var_src(IrPrint *irp, IrInstructionDeclVarSrc *decl_var_instruction) {755static void ir_print_decl_var_src(IrPrintSrc *irp, IrInstSrcDeclVar *decl_var_instruction) {
558 const char *var_or_const = decl_var_instruction->var->gen_is_const ? "const" : "var";756 const char *var_or_const = decl_var_instruction->var->gen_is_const ? "const" : "var";
559 const char *name = decl_var_instruction->var->name;757 const char *name = decl_var_instruction->var->name;
560 if (decl_var_instruction->var_type) {758 if (decl_var_instruction->var_type) {
561 fprintf(irp->f, "%s %s: ", var_or_const, name);759 fprintf(irp->f, "%s %s: ", var_or_const, name);
562 ir_print_other_instruction(irp, decl_var_instruction->var_type);760 ir_print_other_inst_src(irp, decl_var_instruction->var_type);
563 fprintf(irp->f, " ");761 fprintf(irp->f, " ");
564 } else {762 } else {
565 fprintf(irp->f, "%s %s ", var_or_const, name);763 fprintf(irp->f, "%s %s ", var_or_const, name);
566 }764 }
567 if (decl_var_instruction->align_value) {765 if (decl_var_instruction->align_value) {
568 fprintf(irp->f, "align ");766 fprintf(irp->f, "align ");
569 ir_print_other_instruction(irp, decl_var_instruction->align_value);767 ir_print_other_inst_src(irp, decl_var_instruction->align_value);
570 fprintf(irp->f, " ");768 fprintf(irp->f, " ");
571 }769 }
572 fprintf(irp->f, "= ");770 fprintf(irp->f, "= ");
573 ir_print_other_instruction(irp, decl_var_instruction->ptr);771 ir_print_other_inst_src(irp, decl_var_instruction->ptr);
574 if (decl_var_instruction->var->is_comptime != nullptr) {772 if (decl_var_instruction->var->is_comptime != nullptr) {
575 fprintf(irp->f, " // comptime = ");773 fprintf(irp->f, " // comptime = ");
576 ir_print_other_instruction(irp, decl_var_instruction->var->is_comptime);774 ir_print_other_inst_src(irp, decl_var_instruction->var->is_comptime);
577 }775 }
578}776}
579777
580static void ir_print_cast(IrPrint *irp, IrInstructionCast *cast_instruction) {778static const char *cast_op_str(CastOp op) {
581 fprintf(irp->f, "cast ");779 switch (op) {
582 ir_print_other_instruction(irp, cast_instruction->value);780 case CastOpNoCast: return "NoCast";
583 fprintf(irp->f, " to %s", buf_ptr(&cast_instruction->dest_type->name));781 case CastOpNoop: return "NoOp";
782 case CastOpIntToFloat: return "IntToFloat";
783 case CastOpFloatToInt: return "FloatToInt";
784 case CastOpBoolToInt: return "BoolToInt";
785 case CastOpNumLitToConcrete: return "NumLitToConcrate";
786 case CastOpErrSet: return "ErrSet";
787 case CastOpBitCast: return "BitCast";
788 }
789 zig_unreachable();
790}
791
792static void ir_print_cast(IrPrintGen *irp, IrInstGenCast *cast_instruction) {
793 fprintf(irp->f, "%s cast ", cast_op_str(cast_instruction->cast_op));
794 ir_print_other_inst_gen(irp, cast_instruction->value);
584}795}
585796
586static void ir_print_result_loc_var(IrPrint *irp, ResultLocVar *result_loc_var) {797static void ir_print_result_loc_var(IrPrintSrc *irp, ResultLocVar *result_loc_var) {
587 fprintf(irp->f, "var(");798 fprintf(irp->f, "var(");
588 ir_print_other_instruction(irp, result_loc_var->base.source_instruction);799 ir_print_other_inst_src(irp, result_loc_var->base.source_instruction);
589 fprintf(irp->f, ")");800 fprintf(irp->f, ")");
590}801}
591802
592static void ir_print_result_loc_instruction(IrPrint *irp, ResultLocInstruction *result_loc_inst) {803static void ir_print_result_loc_instruction(IrPrintSrc *irp, ResultLocInstruction *result_loc_inst) {
593 fprintf(irp->f, "inst(");804 fprintf(irp->f, "inst(");
594 ir_print_other_instruction(irp, result_loc_inst->base.source_instruction);805 ir_print_other_inst_src(irp, result_loc_inst->base.source_instruction);
595 fprintf(irp->f, ")");806 fprintf(irp->f, ")");
596}807}
597808
598static void ir_print_result_loc_peer(IrPrint *irp, ResultLocPeer *result_loc_peer) {809static void ir_print_result_loc_peer(IrPrintSrc *irp, ResultLocPeer *result_loc_peer) {
599 fprintf(irp->f, "peer(next=");810 fprintf(irp->f, "peer(next=");
600 ir_print_other_block(irp, result_loc_peer->next_bb);811 ir_print_other_block(irp, result_loc_peer->next_bb);
601 fprintf(irp->f, ")");812 fprintf(irp->f, ")");
602}813}
603814
604static void ir_print_result_loc_bit_cast(IrPrint *irp, ResultLocBitCast *result_loc_bit_cast) {815static void ir_print_result_loc_bit_cast(IrPrintSrc *irp, ResultLocBitCast *result_loc_bit_cast) {
605 fprintf(irp->f, "bitcast(ty=");816 fprintf(irp->f, "bitcast(ty=");
606 ir_print_other_instruction(irp, result_loc_bit_cast->base.source_instruction);817 ir_print_other_inst_src(irp, result_loc_bit_cast->base.source_instruction);
607 fprintf(irp->f, ")");818 fprintf(irp->f, ")");
608}819}
609820
610static void ir_print_result_loc_cast(IrPrint *irp, ResultLocCast *result_loc_cast) {821static void ir_print_result_loc_cast(IrPrintSrc *irp, ResultLocCast *result_loc_cast) {
611 fprintf(irp->f, "cast(ty=");822 fprintf(irp->f, "cast(ty=");
612 ir_print_other_instruction(irp, result_loc_cast->base.source_instruction);823 ir_print_other_inst_src(irp, result_loc_cast->base.source_instruction);
613 fprintf(irp->f, ")");824 fprintf(irp->f, ")");
614}825}
615826
616static void ir_print_result_loc(IrPrint *irp, ResultLoc *result_loc) {827static void ir_print_result_loc(IrPrintSrc *irp, ResultLoc *result_loc) {
617 switch (result_loc->id) {828 switch (result_loc->id) {
618 case ResultLocIdInvalid:829 case ResultLocIdInvalid:
619 zig_unreachable();830 zig_unreachable();
...@@ -640,34 +851,34 @@ static void ir_print_result_loc(IrPrint *irp, ResultLoc *result_loc) {...@@ -640,34 +851,34 @@ static void ir_print_result_loc(IrPrint *irp, ResultLoc *result_loc) {
640 zig_unreachable();851 zig_unreachable();
641}852}
642853
643static void ir_print_call_extra(IrPrint *irp, IrInstructionCallExtra *instruction) {854static void ir_print_call_extra(IrPrintSrc *irp, IrInstSrcCallExtra *instruction) {
644 fprintf(irp->f, "opts=");855 fprintf(irp->f, "opts=");
645 ir_print_other_instruction(irp, instruction->options);856 ir_print_other_inst_src(irp, instruction->options);
646 fprintf(irp->f, ", fn=");857 fprintf(irp->f, ", fn=");
647 ir_print_other_instruction(irp, instruction->fn_ref);858 ir_print_other_inst_src(irp, instruction->fn_ref);
648 fprintf(irp->f, ", args=");859 fprintf(irp->f, ", args=");
649 ir_print_other_instruction(irp, instruction->args);860 ir_print_other_inst_src(irp, instruction->args);
650 fprintf(irp->f, ", result=");861 fprintf(irp->f, ", result=");
651 ir_print_result_loc(irp, instruction->result_loc);862 ir_print_result_loc(irp, instruction->result_loc);
652}863}
653864
654static void ir_print_call_src_args(IrPrint *irp, IrInstructionCallSrcArgs *instruction) {865static void ir_print_call_args(IrPrintSrc *irp, IrInstSrcCallArgs *instruction) {
655 fprintf(irp->f, "opts=");866 fprintf(irp->f, "opts=");
656 ir_print_other_instruction(irp, instruction->options);867 ir_print_other_inst_src(irp, instruction->options);
657 fprintf(irp->f, ", fn=");868 fprintf(irp->f, ", fn=");
658 ir_print_other_instruction(irp, instruction->fn_ref);869 ir_print_other_inst_src(irp, instruction->fn_ref);
659 fprintf(irp->f, ", args=(");870 fprintf(irp->f, ", args=(");
660 for (size_t i = 0; i < instruction->args_len; i += 1) {871 for (size_t i = 0; i < instruction->args_len; i += 1) {
661 IrInstruction *arg = instruction->args_ptr[i];872 IrInstSrc *arg = instruction->args_ptr[i];
662 if (i != 0)873 if (i != 0)
663 fprintf(irp->f, ", ");874 fprintf(irp->f, ", ");
664 ir_print_other_instruction(irp, arg);875 ir_print_other_inst_src(irp, arg);
665 }876 }
666 fprintf(irp->f, "), result=");877 fprintf(irp->f, "), result=");
667 ir_print_result_loc(irp, instruction->result_loc);878 ir_print_result_loc(irp, instruction->result_loc);
668}879}
669880
670static void ir_print_call_src(IrPrint *irp, IrInstructionCallSrc *call_instruction) {881static void ir_print_call_src(IrPrintSrc *irp, IrInstSrcCall *call_instruction) {
671 switch (call_instruction->modifier) {882 switch (call_instruction->modifier) {
672 case CallModifierNone:883 case CallModifierNone:
673 break;884 break;
...@@ -699,20 +910,20 @@ static void ir_print_call_src(IrPrint *irp, IrInstructionCallSrc *call_instructi...@@ -699,20 +910,20 @@ static void ir_print_call_src(IrPrint *irp, IrInstructionCallSrc *call_instructi
699 fprintf(irp->f, "%s", buf_ptr(&call_instruction->fn_entry->symbol_name));910 fprintf(irp->f, "%s", buf_ptr(&call_instruction->fn_entry->symbol_name));
700 } else {911 } else {
701 assert(call_instruction->fn_ref);912 assert(call_instruction->fn_ref);
702 ir_print_other_instruction(irp, call_instruction->fn_ref);913 ir_print_other_inst_src(irp, call_instruction->fn_ref);
703 }914 }
704 fprintf(irp->f, "(");915 fprintf(irp->f, "(");
705 for (size_t i = 0; i < call_instruction->arg_count; i += 1) {916 for (size_t i = 0; i < call_instruction->arg_count; i += 1) {
706 IrInstruction *arg = call_instruction->args[i];917 IrInstSrc *arg = call_instruction->args[i];
707 if (i != 0)918 if (i != 0)
708 fprintf(irp->f, ", ");919 fprintf(irp->f, ", ");
709 ir_print_other_instruction(irp, arg);920 ir_print_other_inst_src(irp, arg);
710 }921 }
711 fprintf(irp->f, ")result=");922 fprintf(irp->f, ")result=");
712 ir_print_result_loc(irp, call_instruction->result_loc);923 ir_print_result_loc(irp, call_instruction->result_loc);
713}924}
714925
715static void ir_print_call_gen(IrPrint *irp, IrInstructionCallGen *call_instruction) {926static void ir_print_call_gen(IrPrintGen *irp, IrInstGenCall *call_instruction) {
716 switch (call_instruction->modifier) {927 switch (call_instruction->modifier) {
717 case CallModifierNone:928 case CallModifierNone:
718 break;929 break;
...@@ -744,221 +955,291 @@ static void ir_print_call_gen(IrPrint *irp, IrInstructionCallGen *call_instructi...@@ -744,221 +955,291 @@ static void ir_print_call_gen(IrPrint *irp, IrInstructionCallGen *call_instructi
744 fprintf(irp->f, "%s", buf_ptr(&call_instruction->fn_entry->symbol_name));955 fprintf(irp->f, "%s", buf_ptr(&call_instruction->fn_entry->symbol_name));
745 } else {956 } else {
746 assert(call_instruction->fn_ref);957 assert(call_instruction->fn_ref);
747 ir_print_other_instruction(irp, call_instruction->fn_ref);958 ir_print_other_inst_gen(irp, call_instruction->fn_ref);
748 }959 }
749 fprintf(irp->f, "(");960 fprintf(irp->f, "(");
750 for (size_t i = 0; i < call_instruction->arg_count; i += 1) {961 for (size_t i = 0; i < call_instruction->arg_count; i += 1) {
751 IrInstruction *arg = call_instruction->args[i];962 IrInstGen *arg = call_instruction->args[i];
752 if (i != 0)963 if (i != 0)
753 fprintf(irp->f, ", ");964 fprintf(irp->f, ", ");
754 ir_print_other_instruction(irp, arg);965 ir_print_other_inst_gen(irp, arg);
755 }966 }
756 fprintf(irp->f, ")result=");967 fprintf(irp->f, ")result=");
757 ir_print_other_instruction(irp, call_instruction->result_loc);968 ir_print_other_inst_gen(irp, call_instruction->result_loc);
758}969}
759970
760static void ir_print_cond_br(IrPrint *irp, IrInstructionCondBr *cond_br_instruction) {971static void ir_print_cond_br(IrPrintSrc *irp, IrInstSrcCondBr *inst) {
761 fprintf(irp->f, "if (");972 fprintf(irp->f, "if (");
762 ir_print_other_instruction(irp, cond_br_instruction->condition);973 ir_print_other_inst_src(irp, inst->condition);
763 fprintf(irp->f, ") ");974 fprintf(irp->f, ") ");
764 ir_print_other_block(irp, cond_br_instruction->then_block);975 ir_print_other_block(irp, inst->then_block);
765 fprintf(irp->f, " else ");976 fprintf(irp->f, " else ");
766 ir_print_other_block(irp, cond_br_instruction->else_block);977 ir_print_other_block(irp, inst->else_block);
767 if (cond_br_instruction->is_comptime != nullptr) {978 if (inst->is_comptime != nullptr) {
768 fprintf(irp->f, " // comptime = ");979 fprintf(irp->f, " // comptime = ");
769 ir_print_other_instruction(irp, cond_br_instruction->is_comptime);980 ir_print_other_inst_src(irp, inst->is_comptime);
770 }981 }
771}982}
772983
773static void ir_print_br(IrPrint *irp, IrInstructionBr *br_instruction) {984static void ir_print_cond_br(IrPrintGen *irp, IrInstGenCondBr *inst) {
985 fprintf(irp->f, "if (");
986 ir_print_other_inst_gen(irp, inst->condition);
987 fprintf(irp->f, ") ");
988 ir_print_other_block_gen(irp, inst->then_block);
989 fprintf(irp->f, " else ");
990 ir_print_other_block_gen(irp, inst->else_block);
991}
992
993static void ir_print_br(IrPrintSrc *irp, IrInstSrcBr *br_instruction) {
774 fprintf(irp->f, "goto ");994 fprintf(irp->f, "goto ");
775 ir_print_other_block(irp, br_instruction->dest_block);995 ir_print_other_block(irp, br_instruction->dest_block);
776 if (br_instruction->is_comptime != nullptr) {996 if (br_instruction->is_comptime != nullptr) {
777 fprintf(irp->f, " // comptime = ");997 fprintf(irp->f, " // comptime = ");
778 ir_print_other_instruction(irp, br_instruction->is_comptime);998 ir_print_other_inst_src(irp, br_instruction->is_comptime);
779 }999 }
780}1000}
7811001
782static void ir_print_phi(IrPrint *irp, IrInstructionPhi *phi_instruction) {1002static void ir_print_br(IrPrintGen *irp, IrInstGenBr *inst) {
1003 fprintf(irp->f, "goto ");
1004 ir_print_other_block_gen(irp, inst->dest_block);
1005}
1006
1007static void ir_print_phi(IrPrintSrc *irp, IrInstSrcPhi *phi_instruction) {
783 assert(phi_instruction->incoming_count != 0);1008 assert(phi_instruction->incoming_count != 0);
784 assert(phi_instruction->incoming_count != SIZE_MAX);1009 assert(phi_instruction->incoming_count != SIZE_MAX);
785 for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {1010 for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
786 IrBasicBlock *incoming_block = phi_instruction->incoming_blocks[i];1011 IrBasicBlockSrc *incoming_block = phi_instruction->incoming_blocks[i];
787 IrInstruction *incoming_value = phi_instruction->incoming_values[i];1012 IrInstSrc *incoming_value = phi_instruction->incoming_values[i];
788 if (i != 0)1013 if (i != 0)
789 fprintf(irp->f, " ");1014 fprintf(irp->f, " ");
790 ir_print_other_block(irp, incoming_block);1015 ir_print_other_block(irp, incoming_block);
791 fprintf(irp->f, ":");1016 fprintf(irp->f, ":");
792 ir_print_other_instruction(irp, incoming_value);1017 ir_print_other_inst_src(irp, incoming_value);
793 }1018 }
794}1019}
7951020
796static void ir_print_container_init_list(IrPrint *irp, IrInstructionContainerInitList *instruction) {1021static void ir_print_phi(IrPrintGen *irp, IrInstGenPhi *phi_instruction) {
1022 assert(phi_instruction->incoming_count != 0);
1023 assert(phi_instruction->incoming_count != SIZE_MAX);
1024 for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
1025 IrBasicBlockGen *incoming_block = phi_instruction->incoming_blocks[i];
1026 IrInstGen *incoming_value = phi_instruction->incoming_values[i];
1027 if (i != 0)
1028 fprintf(irp->f, " ");
1029 ir_print_other_block_gen(irp, incoming_block);
1030 fprintf(irp->f, ":");
1031 ir_print_other_inst_gen(irp, incoming_value);
1032 }
1033}
1034
1035static void ir_print_container_init_list(IrPrintSrc *irp, IrInstSrcContainerInitList *instruction) {
797 fprintf(irp->f, "{");1036 fprintf(irp->f, "{");
798 if (instruction->item_count > 50) {1037 if (instruction->item_count > 50) {
799 fprintf(irp->f, "...(%" ZIG_PRI_usize " items)...", instruction->item_count);1038 fprintf(irp->f, "...(%" ZIG_PRI_usize " items)...", instruction->item_count);
800 } else {1039 } else {
801 for (size_t i = 0; i < instruction->item_count; i += 1) {1040 for (size_t i = 0; i < instruction->item_count; i += 1) {
802 IrInstruction *result_loc = instruction->elem_result_loc_list[i];1041 IrInstSrc *result_loc = instruction->elem_result_loc_list[i];
803 if (i != 0)1042 if (i != 0)
804 fprintf(irp->f, ", ");1043 fprintf(irp->f, ", ");
805 ir_print_other_instruction(irp, result_loc);1044 ir_print_other_inst_src(irp, result_loc);
806 }1045 }
807 }1046 }
808 fprintf(irp->f, "}result=");1047 fprintf(irp->f, "}result=");
809 ir_print_other_instruction(irp, instruction->result_loc);1048 ir_print_other_inst_src(irp, instruction->result_loc);
810}1049}
8111050
812static void ir_print_container_init_fields(IrPrint *irp, IrInstructionContainerInitFields *instruction) {1051static void ir_print_container_init_fields(IrPrintSrc *irp, IrInstSrcContainerInitFields *instruction) {
813 fprintf(irp->f, "{");1052 fprintf(irp->f, "{");
814 for (size_t i = 0; i < instruction->field_count; i += 1) {1053 for (size_t i = 0; i < instruction->field_count; i += 1) {
815 IrInstructionContainerInitFieldsField *field = &instruction->fields[i];1054 IrInstSrcContainerInitFieldsField *field = &instruction->fields[i];
816 const char *comma = (i == 0) ? "" : ", ";1055 const char *comma = (i == 0) ? "" : ", ";
817 fprintf(irp->f, "%s.%s = ", comma, buf_ptr(field->name));1056 fprintf(irp->f, "%s.%s = ", comma, buf_ptr(field->name));
818 ir_print_other_instruction(irp, field->result_loc);1057 ir_print_other_inst_src(irp, field->result_loc);
819 }1058 }
820 fprintf(irp->f, "}result=");1059 fprintf(irp->f, "}result=");
821 ir_print_other_instruction(irp, instruction->result_loc);1060 ir_print_other_inst_src(irp, instruction->result_loc);
1061}
1062
1063static void ir_print_unreachable(IrPrintSrc *irp, IrInstSrcUnreachable *instruction) {
1064 fprintf(irp->f, "unreachable");
822}1065}
8231066
824static void ir_print_unreachable(IrPrint *irp, IrInstructionUnreachable *instruction) {1067static void ir_print_unreachable(IrPrintGen *irp, IrInstGenUnreachable *instruction) {
825 fprintf(irp->f, "unreachable");1068 fprintf(irp->f, "unreachable");
826}1069}
8271070
828static void ir_print_elem_ptr(IrPrint *irp, IrInstructionElemPtr *instruction) {1071static void ir_print_elem_ptr(IrPrintSrc *irp, IrInstSrcElemPtr *instruction) {
829 fprintf(irp->f, "&");1072 fprintf(irp->f, "&");
830 ir_print_other_instruction(irp, instruction->array_ptr);1073 ir_print_other_inst_src(irp, instruction->array_ptr);
831 fprintf(irp->f, "[");1074 fprintf(irp->f, "[");
832 ir_print_other_instruction(irp, instruction->elem_index);1075 ir_print_other_inst_src(irp, instruction->elem_index);
833 fprintf(irp->f, "]");1076 fprintf(irp->f, "]");
834 if (!instruction->safety_check_on) {1077 if (!instruction->safety_check_on) {
835 fprintf(irp->f, " // no safety");1078 fprintf(irp->f, " // no safety");
836 }1079 }
837}1080}
8381081
839static void ir_print_var_ptr(IrPrint *irp, IrInstructionVarPtr *instruction) {1082static void ir_print_elem_ptr(IrPrintGen *irp, IrInstGenElemPtr *instruction) {
1083 fprintf(irp->f, "&");
1084 ir_print_other_inst_gen(irp, instruction->array_ptr);
1085 fprintf(irp->f, "[");
1086 ir_print_other_inst_gen(irp, instruction->elem_index);
1087 fprintf(irp->f, "]");
1088 if (!instruction->safety_check_on) {
1089 fprintf(irp->f, " // no safety");
1090 }
1091}
1092
1093static void ir_print_var_ptr(IrPrintSrc *irp, IrInstSrcVarPtr *instruction) {
1094 fprintf(irp->f, "&%s", instruction->var->name);
1095}
1096
1097static void ir_print_var_ptr(IrPrintGen *irp, IrInstGenVarPtr *instruction) {
840 fprintf(irp->f, "&%s", instruction->var->name);1098 fprintf(irp->f, "&%s", instruction->var->name);
841}1099}
8421100
843static void ir_print_return_ptr(IrPrint *irp, IrInstructionReturnPtr *instruction) {1101static void ir_print_return_ptr(IrPrintGen *irp, IrInstGenReturnPtr *instruction) {
844 fprintf(irp->f, "@ReturnPtr");1102 fprintf(irp->f, "@ReturnPtr");
845}1103}
8461104
847static void ir_print_load_ptr(IrPrint *irp, IrInstructionLoadPtr *instruction) {1105static void ir_print_load_ptr(IrPrintSrc *irp, IrInstSrcLoadPtr *instruction) {
848 ir_print_other_instruction(irp, instruction->ptr);1106 ir_print_other_inst_src(irp, instruction->ptr);
849 fprintf(irp->f, ".*");1107 fprintf(irp->f, ".*");
850}1108}
8511109
852static void ir_print_load_ptr_gen(IrPrint *irp, IrInstructionLoadPtrGen *instruction) {1110static void ir_print_load_ptr_gen(IrPrintGen *irp, IrInstGenLoadPtr *instruction) {
853 fprintf(irp->f, "loadptr(");1111 fprintf(irp->f, "loadptr(");
854 ir_print_other_instruction(irp, instruction->ptr);1112 ir_print_other_inst_gen(irp, instruction->ptr);
855 fprintf(irp->f, ")result=");1113 fprintf(irp->f, ")result=");
856 ir_print_other_instruction(irp, instruction->result_loc);1114 ir_print_other_inst_gen(irp, instruction->result_loc);
1115}
1116
1117static void ir_print_store_ptr(IrPrintSrc *irp, IrInstSrcStorePtr *instruction) {
1118 fprintf(irp->f, "*");
1119 ir_print_var_src(irp, instruction->ptr);
1120 fprintf(irp->f, " = ");
1121 ir_print_other_inst_src(irp, instruction->value);
857}1122}
8581123
859static void ir_print_store_ptr(IrPrint *irp, IrInstructionStorePtr *instruction) {1124static void ir_print_store_ptr(IrPrintGen *irp, IrInstGenStorePtr *instruction) {
860 fprintf(irp->f, "*");1125 fprintf(irp->f, "*");
861 ir_print_var_instruction(irp, instruction->ptr);1126 ir_print_var_gen(irp, instruction->ptr);
862 fprintf(irp->f, " = ");1127 fprintf(irp->f, " = ");
863 ir_print_other_instruction(irp, instruction->value);1128 ir_print_other_inst_gen(irp, instruction->value);
864}1129}
8651130
866static void ir_print_vector_store_elem(IrPrint *irp, IrInstructionVectorStoreElem *instruction) {1131static void ir_print_vector_store_elem(IrPrintGen *irp, IrInstGenVectorStoreElem *instruction) {
867 fprintf(irp->f, "vector_ptr=");1132 fprintf(irp->f, "vector_ptr=");
868 ir_print_var_instruction(irp, instruction->vector_ptr);1133 ir_print_var_gen(irp, instruction->vector_ptr);
869 fprintf(irp->f, ",index=");1134 fprintf(irp->f, ",index=");
870 ir_print_var_instruction(irp, instruction->index);1135 ir_print_var_gen(irp, instruction->index);
871 fprintf(irp->f, ",value=");1136 fprintf(irp->f, ",value=");
872 ir_print_other_instruction(irp, instruction->value);1137 ir_print_other_inst_gen(irp, instruction->value);
873}1138}
8741139
875static void ir_print_typeof(IrPrint *irp, IrInstructionTypeOf *instruction) {1140static void ir_print_typeof(IrPrintSrc *irp, IrInstSrcTypeOf *instruction) {
876 fprintf(irp->f, "@TypeOf(");1141 fprintf(irp->f, "@TypeOf(");
877 ir_print_other_instruction(irp, instruction->value);1142 ir_print_other_inst_src(irp, instruction->value);
878 fprintf(irp->f, ")");1143 fprintf(irp->f, ")");
879}1144}
8801145
881static void ir_print_field_ptr(IrPrint *irp, IrInstructionFieldPtr *instruction) {1146static void ir_print_binary_not(IrPrintGen *irp, IrInstGenBinaryNot *instruction) {
1147 fprintf(irp->f, "~");
1148 ir_print_other_inst_gen(irp, instruction->operand);
1149}
1150
1151static void ir_print_negation(IrPrintGen *irp, IrInstGenNegation *instruction) {
1152 fprintf(irp->f, "-");
1153 ir_print_other_inst_gen(irp, instruction->operand);
1154}
1155
1156static void ir_print_negation_wrapping(IrPrintGen *irp, IrInstGenNegationWrapping *instruction) {
1157 fprintf(irp->f, "-%%");
1158 ir_print_other_inst_gen(irp, instruction->operand);
1159}
1160
1161
1162static void ir_print_field_ptr(IrPrintSrc *irp, IrInstSrcFieldPtr *instruction) {
882 if (instruction->field_name_buffer) {1163 if (instruction->field_name_buffer) {
883 fprintf(irp->f, "fieldptr ");1164 fprintf(irp->f, "fieldptr ");
884 ir_print_other_instruction(irp, instruction->container_ptr);1165 ir_print_other_inst_src(irp, instruction->container_ptr);
885 fprintf(irp->f, ".%s", buf_ptr(instruction->field_name_buffer));1166 fprintf(irp->f, ".%s", buf_ptr(instruction->field_name_buffer));
886 } else {1167 } else {
887 assert(instruction->field_name_expr);1168 assert(instruction->field_name_expr);
888 fprintf(irp->f, "@field(");1169 fprintf(irp->f, "@field(");
889 ir_print_other_instruction(irp, instruction->container_ptr);1170 ir_print_other_inst_src(irp, instruction->container_ptr);
890 fprintf(irp->f, ", ");1171 fprintf(irp->f, ", ");
891 ir_print_other_instruction(irp, instruction->field_name_expr);1172 ir_print_other_inst_src(irp, instruction->field_name_expr);
892 fprintf(irp->f, ")");1173 fprintf(irp->f, ")");
893 }1174 }
894}1175}
8951176
896static void ir_print_struct_field_ptr(IrPrint *irp, IrInstructionStructFieldPtr *instruction) {1177static void ir_print_struct_field_ptr(IrPrintGen *irp, IrInstGenStructFieldPtr *instruction) {
897 fprintf(irp->f, "@StructFieldPtr(&");1178 fprintf(irp->f, "@StructFieldPtr(&");
898 ir_print_other_instruction(irp, instruction->struct_ptr);1179 ir_print_other_inst_gen(irp, instruction->struct_ptr);
899 fprintf(irp->f, ".%s", buf_ptr(instruction->field->name));1180 fprintf(irp->f, ".%s", buf_ptr(instruction->field->name));
900 fprintf(irp->f, ")");1181 fprintf(irp->f, ")");
901}1182}
9021183
903static void ir_print_union_field_ptr(IrPrint *irp, IrInstructionUnionFieldPtr *instruction) {1184static void ir_print_union_field_ptr(IrPrintGen *irp, IrInstGenUnionFieldPtr *instruction) {
904 fprintf(irp->f, "@UnionFieldPtr(&");1185 fprintf(irp->f, "@UnionFieldPtr(&");
905 ir_print_other_instruction(irp, instruction->union_ptr);1186 ir_print_other_inst_gen(irp, instruction->union_ptr);
906 fprintf(irp->f, ".%s", buf_ptr(instruction->field->enum_field->name));1187 fprintf(irp->f, ".%s", buf_ptr(instruction->field->enum_field->name));
907 fprintf(irp->f, ")");1188 fprintf(irp->f, ")");
908}1189}
9091190
910static void ir_print_set_cold(IrPrint *irp, IrInstructionSetCold *instruction) {1191static void ir_print_set_cold(IrPrintSrc *irp, IrInstSrcSetCold *instruction) {
911 fprintf(irp->f, "@setCold(");1192 fprintf(irp->f, "@setCold(");
912 ir_print_other_instruction(irp, instruction->is_cold);1193 ir_print_other_inst_src(irp, instruction->is_cold);
913 fprintf(irp->f, ")");1194 fprintf(irp->f, ")");
914}1195}
9151196
916static void ir_print_set_runtime_safety(IrPrint *irp, IrInstructionSetRuntimeSafety *instruction) {1197static void ir_print_set_runtime_safety(IrPrintSrc *irp, IrInstSrcSetRuntimeSafety *instruction) {
917 fprintf(irp->f, "@setRuntimeSafety(");1198 fprintf(irp->f, "@setRuntimeSafety(");
918 ir_print_other_instruction(irp, instruction->safety_on);1199 ir_print_other_inst_src(irp, instruction->safety_on);
919 fprintf(irp->f, ")");1200 fprintf(irp->f, ")");
920}1201}
9211202
922static void ir_print_set_float_mode(IrPrint *irp, IrInstructionSetFloatMode *instruction) {1203static void ir_print_set_float_mode(IrPrintSrc *irp, IrInstSrcSetFloatMode *instruction) {
923 fprintf(irp->f, "@setFloatMode(");1204 fprintf(irp->f, "@setFloatMode(");
924 ir_print_other_instruction(irp, instruction->scope_value);1205 ir_print_other_inst_src(irp, instruction->scope_value);
925 fprintf(irp->f, ", ");1206 fprintf(irp->f, ", ");
926 ir_print_other_instruction(irp, instruction->mode_value);1207 ir_print_other_inst_src(irp, instruction->mode_value);
927 fprintf(irp->f, ")");1208 fprintf(irp->f, ")");
928}1209}
9291210
930static void ir_print_array_type(IrPrint *irp, IrInstructionArrayType *instruction) {1211static void ir_print_array_type(IrPrintSrc *irp, IrInstSrcArrayType *instruction) {
931 fprintf(irp->f, "[");1212 fprintf(irp->f, "[");
932 ir_print_other_instruction(irp, instruction->size);1213 ir_print_other_inst_src(irp, instruction->size);
933 if (instruction->sentinel != nullptr) {1214 if (instruction->sentinel != nullptr) {
934 fprintf(irp->f, ":");1215 fprintf(irp->f, ":");
935 ir_print_other_instruction(irp, instruction->sentinel);1216 ir_print_other_inst_src(irp, instruction->sentinel);
936 }1217 }
937 fprintf(irp->f, "]");1218 fprintf(irp->f, "]");
938 ir_print_other_instruction(irp, instruction->child_type);1219 ir_print_other_inst_src(irp, instruction->child_type);
939}1220}
9401221
941static void ir_print_slice_type(IrPrint *irp, IrInstructionSliceType *instruction) {1222static void ir_print_slice_type(IrPrintSrc *irp, IrInstSrcSliceType *instruction) {
942 const char *const_kw = instruction->is_const ? "const " : "";1223 const char *const_kw = instruction->is_const ? "const " : "";
943 fprintf(irp->f, "[]%s", const_kw);1224 fprintf(irp->f, "[]%s", const_kw);
944 ir_print_other_instruction(irp, instruction->child_type);1225 ir_print_other_inst_src(irp, instruction->child_type);
945}1226}
9461227
947static void ir_print_any_frame_type(IrPrint *irp, IrInstructionAnyFrameType *instruction) {1228static void ir_print_any_frame_type(IrPrintSrc *irp, IrInstSrcAnyFrameType *instruction) {
948 if (instruction->payload_type == nullptr) {1229 if (instruction->payload_type == nullptr) {
949 fprintf(irp->f, "anyframe");1230 fprintf(irp->f, "anyframe");
950 } else {1231 } else {
951 fprintf(irp->f, "anyframe->");1232 fprintf(irp->f, "anyframe->");
952 ir_print_other_instruction(irp, instruction->payload_type);1233 ir_print_other_inst_src(irp, instruction->payload_type);
953 }1234 }
954}1235}
9551236
956static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {1237static void ir_print_asm_src(IrPrintSrc *irp, IrInstSrcAsm *instruction) {
957 assert(instruction->base.source_node->type == NodeTypeAsmExpr);1238 assert(instruction->base.base.source_node->type == NodeTypeAsmExpr);
958 AstNodeAsmExpr *asm_expr = &instruction->base.source_node->data.asm_expr;1239 AstNodeAsmExpr *asm_expr = &instruction->base.base.source_node->data.asm_expr;
959 const char *volatile_kw = instruction->has_side_effects ? " volatile" : "";1240 const char *volatile_kw = instruction->has_side_effects ? " volatile" : "";
960 fprintf(irp->f, "asm%s (", volatile_kw);1241 fprintf(irp->f, "asm%s (", volatile_kw);
961 ir_print_other_instruction(irp, instruction->asm_template);1242 ir_print_other_inst_src(irp, instruction->asm_template);
9621243
963 for (size_t i = 0; i < asm_expr->output_list.length; i += 1) {1244 for (size_t i = 0; i < asm_expr->output_list.length; i += 1) {
964 AsmOutput *asm_output = asm_expr->output_list.at(i);1245 AsmOutput *asm_output = asm_expr->output_list.at(i);
...@@ -969,7 +1250,7 @@ static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {...@@ -969,7 +1250,7 @@ static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {
969 buf_ptr(asm_output->constraint));1250 buf_ptr(asm_output->constraint));
970 if (asm_output->return_type) {1251 if (asm_output->return_type) {
971 fprintf(irp->f, "-> ");1252 fprintf(irp->f, "-> ");
972 ir_print_other_instruction(irp, instruction->output_types[i]);1253 ir_print_other_inst_src(irp, instruction->output_types[i]);
973 } else {1254 } else {
974 fprintf(irp->f, "%s", buf_ptr(asm_output->variable_name));1255 fprintf(irp->f, "%s", buf_ptr(asm_output->variable_name));
975 }1256 }
...@@ -984,7 +1265,7 @@ static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {...@@ -984,7 +1265,7 @@ static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {
984 fprintf(irp->f, "[%s] \"%s\" (",1265 fprintf(irp->f, "[%s] \"%s\" (",
985 buf_ptr(asm_input->asm_symbolic_name),1266 buf_ptr(asm_input->asm_symbolic_name),
986 buf_ptr(asm_input->constraint));1267 buf_ptr(asm_input->constraint));
987 ir_print_other_instruction(irp, instruction->input_list[i]);1268 ir_print_other_inst_src(irp, instruction->input_list[i]);
988 fprintf(irp->f, ")");1269 fprintf(irp->f, ")");
989 }1270 }
990 fprintf(irp->f, " : ");1271 fprintf(irp->f, " : ");
...@@ -996,9 +1277,9 @@ static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {...@@ -996,9 +1277,9 @@ static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {
996 fprintf(irp->f, ")");1277 fprintf(irp->f, ")");
997}1278}
9981279
999static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {1280static void ir_print_asm_gen(IrPrintGen *irp, IrInstGenAsm *instruction) {
1000 assert(instruction->base.source_node->type == NodeTypeAsmExpr);1281 assert(instruction->base.base.source_node->type == NodeTypeAsmExpr);
1001 AstNodeAsmExpr *asm_expr = &instruction->base.source_node->data.asm_expr;1282 AstNodeAsmExpr *asm_expr = &instruction->base.base.source_node->data.asm_expr;
1002 const char *volatile_kw = instruction->has_side_effects ? " volatile" : "";1283 const char *volatile_kw = instruction->has_side_effects ? " volatile" : "";
1003 fprintf(irp->f, "asm%s (\"%s\") : ", volatile_kw, buf_ptr(instruction->asm_template));1284 fprintf(irp->f, "asm%s (\"%s\") : ", volatile_kw, buf_ptr(instruction->asm_template));
10041285
...@@ -1011,7 +1292,7 @@ static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {...@@ -1011,7 +1292,7 @@ static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {
1011 buf_ptr(asm_output->constraint));1292 buf_ptr(asm_output->constraint));
1012 if (asm_output->return_type) {1293 if (asm_output->return_type) {
1013 fprintf(irp->f, "-> ");1294 fprintf(irp->f, "-> ");
1014 ir_print_other_instruction(irp, instruction->output_types[i]);1295 ir_print_other_inst_gen(irp, instruction->output_types[i]);
1015 } else {1296 } else {
1016 fprintf(irp->f, "%s", buf_ptr(asm_output->variable_name));1297 fprintf(irp->f, "%s", buf_ptr(asm_output->variable_name));
1017 }1298 }
...@@ -1026,7 +1307,7 @@ static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {...@@ -1026,7 +1307,7 @@ static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {
1026 fprintf(irp->f, "[%s] \"%s\" (",1307 fprintf(irp->f, "[%s] \"%s\" (",
1027 buf_ptr(asm_input->asm_symbolic_name),1308 buf_ptr(asm_input->asm_symbolic_name),
1028 buf_ptr(asm_input->constraint));1309 buf_ptr(asm_input->constraint));
1029 ir_print_other_instruction(irp, instruction->input_list[i]);1310 ir_print_other_inst_gen(irp, instruction->input_list[i]);
1030 fprintf(irp->f, ")");1311 fprintf(irp->f, ")");
1031 }1312 }
1032 fprintf(irp->f, " : ");1313 fprintf(irp->f, " : ");
...@@ -1038,96 +1319,120 @@ static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {...@@ -1038,96 +1319,120 @@ static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {
1038 fprintf(irp->f, ")");1319 fprintf(irp->f, ")");
1039}1320}
10401321
1041static void ir_print_size_of(IrPrint *irp, IrInstructionSizeOf *instruction) {1322static void ir_print_size_of(IrPrintSrc *irp, IrInstSrcSizeOf *instruction) {
1042 if (instruction->bit_size)1323 if (instruction->bit_size)
1043 fprintf(irp->f, "@bitSizeOf(");1324 fprintf(irp->f, "@bitSizeOf(");
1044 else1325 else
1045 fprintf(irp->f, "@sizeOf(");1326 fprintf(irp->f, "@sizeOf(");
1046 ir_print_other_instruction(irp, instruction->type_value);1327 ir_print_other_inst_src(irp, instruction->type_value);
1047 fprintf(irp->f, ")");1328 fprintf(irp->f, ")");
1048}1329}
10491330
1050static void ir_print_test_non_null(IrPrint *irp, IrInstructionTestNonNull *instruction) {1331static void ir_print_test_non_null(IrPrintSrc *irp, IrInstSrcTestNonNull *instruction) {
1051 ir_print_other_instruction(irp, instruction->value);1332 ir_print_other_inst_src(irp, instruction->value);
1333 fprintf(irp->f, " != null");
1334}
1335
1336static void ir_print_test_non_null(IrPrintGen *irp, IrInstGenTestNonNull *instruction) {
1337 ir_print_other_inst_gen(irp, instruction->value);
1052 fprintf(irp->f, " != null");1338 fprintf(irp->f, " != null");
1053}1339}
10541340
1055static void ir_print_optional_unwrap_ptr(IrPrint *irp, IrInstructionOptionalUnwrapPtr *instruction) {1341static void ir_print_optional_unwrap_ptr(IrPrintSrc *irp, IrInstSrcOptionalUnwrapPtr *instruction) {
1056 fprintf(irp->f, "&");1342 fprintf(irp->f, "&");
1057 ir_print_other_instruction(irp, instruction->base_ptr);1343 ir_print_other_inst_src(irp, instruction->base_ptr);
1058 fprintf(irp->f, ".*.?");1344 fprintf(irp->f, ".*.?");
1059 if (!instruction->safety_check_on) {1345 if (!instruction->safety_check_on) {
1060 fprintf(irp->f, " // no safety");1346 fprintf(irp->f, " // no safety");
1061 }1347 }
1062}1348}
10631349
1064static void ir_print_clz(IrPrint *irp, IrInstructionClz *instruction) {1350static void ir_print_optional_unwrap_ptr(IrPrintGen *irp, IrInstGenOptionalUnwrapPtr *instruction) {
1065 fprintf(irp->f, "@clz(");1351 fprintf(irp->f, "&");
1066 if (instruction->type != nullptr) {1352 ir_print_other_inst_gen(irp, instruction->base_ptr);
1067 ir_print_other_instruction(irp, instruction->type);1353 fprintf(irp->f, ".*.?");
1068 } else {1354 if (!instruction->safety_check_on) {
1069 fprintf(irp->f, "null");1355 fprintf(irp->f, " // no safety");
1070 }1356 }
1357}
1358
1359static void ir_print_clz(IrPrintSrc *irp, IrInstSrcClz *instruction) {
1360 fprintf(irp->f, "@clz(");
1361 ir_print_other_inst_src(irp, instruction->type);
1071 fprintf(irp->f, ",");1362 fprintf(irp->f, ",");
1072 ir_print_other_instruction(irp, instruction->op);1363 ir_print_other_inst_src(irp, instruction->op);
1073 fprintf(irp->f, ")");1364 fprintf(irp->f, ")");
1074}1365}
10751366
1076static void ir_print_ctz(IrPrint *irp, IrInstructionCtz *instruction) {1367static void ir_print_clz(IrPrintGen *irp, IrInstGenClz *instruction) {
1368 fprintf(irp->f, "@clz(");
1369 ir_print_other_inst_gen(irp, instruction->op);
1370 fprintf(irp->f, ")");
1371}
1372
1373static void ir_print_ctz(IrPrintSrc *irp, IrInstSrcCtz *instruction) {
1077 fprintf(irp->f, "@ctz(");1374 fprintf(irp->f, "@ctz(");
1078 if (instruction->type != nullptr) {1375 ir_print_other_inst_src(irp, instruction->type);
1079 ir_print_other_instruction(irp, instruction->type);
1080 } else {
1081 fprintf(irp->f, "null");
1082 }
1083 fprintf(irp->f, ",");1376 fprintf(irp->f, ",");
1084 ir_print_other_instruction(irp, instruction->op);1377 ir_print_other_inst_src(irp, instruction->op);
1085 fprintf(irp->f, ")");1378 fprintf(irp->f, ")");
1086}1379}
10871380
1088static void ir_print_pop_count(IrPrint *irp, IrInstructionPopCount *instruction) {1381static void ir_print_ctz(IrPrintGen *irp, IrInstGenCtz *instruction) {
1382 fprintf(irp->f, "@ctz(");
1383 ir_print_other_inst_gen(irp, instruction->op);
1384 fprintf(irp->f, ")");
1385}
1386
1387static void ir_print_pop_count(IrPrintSrc *irp, IrInstSrcPopCount *instruction) {
1089 fprintf(irp->f, "@popCount(");1388 fprintf(irp->f, "@popCount(");
1090 if (instruction->type != nullptr) {1389 ir_print_other_inst_src(irp, instruction->type);
1091 ir_print_other_instruction(irp, instruction->type);
1092 } else {
1093 fprintf(irp->f, "null");
1094 }
1095 fprintf(irp->f, ",");1390 fprintf(irp->f, ",");
1096 ir_print_other_instruction(irp, instruction->op);1391 ir_print_other_inst_src(irp, instruction->op);
1097 fprintf(irp->f, ")");1392 fprintf(irp->f, ")");
1098}1393}
10991394
1100static void ir_print_bswap(IrPrint *irp, IrInstructionBswap *instruction) {1395static void ir_print_pop_count(IrPrintGen *irp, IrInstGenPopCount *instruction) {
1396 fprintf(irp->f, "@popCount(");
1397 ir_print_other_inst_gen(irp, instruction->op);
1398 fprintf(irp->f, ")");
1399}
1400
1401static void ir_print_bswap(IrPrintSrc *irp, IrInstSrcBswap *instruction) {
1101 fprintf(irp->f, "@byteSwap(");1402 fprintf(irp->f, "@byteSwap(");
1102 if (instruction->type != nullptr) {1403 ir_print_other_inst_src(irp, instruction->type);
1103 ir_print_other_instruction(irp, instruction->type);
1104 } else {
1105 fprintf(irp->f, "null");
1106 }
1107 fprintf(irp->f, ",");1404 fprintf(irp->f, ",");
1108 ir_print_other_instruction(irp, instruction->op);1405 ir_print_other_inst_src(irp, instruction->op);
1109 fprintf(irp->f, ")");1406 fprintf(irp->f, ")");
1110}1407}
11111408
1112static void ir_print_bit_reverse(IrPrint *irp, IrInstructionBitReverse *instruction) {1409static void ir_print_bswap(IrPrintGen *irp, IrInstGenBswap *instruction) {
1410 fprintf(irp->f, "@byteSwap(");
1411 ir_print_other_inst_gen(irp, instruction->op);
1412 fprintf(irp->f, ")");
1413}
1414
1415static void ir_print_bit_reverse(IrPrintSrc *irp, IrInstSrcBitReverse *instruction) {
1113 fprintf(irp->f, "@bitReverse(");1416 fprintf(irp->f, "@bitReverse(");
1114 if (instruction->type != nullptr) {1417 ir_print_other_inst_src(irp, instruction->type);
1115 ir_print_other_instruction(irp, instruction->type);
1116 } else {
1117 fprintf(irp->f, "null");
1118 }
1119 fprintf(irp->f, ",");1418 fprintf(irp->f, ",");
1120 ir_print_other_instruction(irp, instruction->op);1419 ir_print_other_inst_src(irp, instruction->op);
1121 fprintf(irp->f, ")");1420 fprintf(irp->f, ")");
1122}1421}
11231422
1124static void ir_print_switch_br(IrPrint *irp, IrInstructionSwitchBr *instruction) {1423static void ir_print_bit_reverse(IrPrintGen *irp, IrInstGenBitReverse *instruction) {
1424 fprintf(irp->f, "@bitReverse(");
1425 ir_print_other_inst_gen(irp, instruction->op);
1426 fprintf(irp->f, ")");
1427}
1428
1429static void ir_print_switch_br(IrPrintSrc *irp, IrInstSrcSwitchBr *instruction) {
1125 fprintf(irp->f, "switch (");1430 fprintf(irp->f, "switch (");
1126 ir_print_other_instruction(irp, instruction->target_value);1431 ir_print_other_inst_src(irp, instruction->target_value);
1127 fprintf(irp->f, ") ");1432 fprintf(irp->f, ") ");
1128 for (size_t i = 0; i < instruction->case_count; i += 1) {1433 for (size_t i = 0; i < instruction->case_count; i += 1) {
1129 IrInstructionSwitchBrCase *this_case = &instruction->cases[i];1434 IrInstSrcSwitchBrCase *this_case = &instruction->cases[i];
1130 ir_print_other_instruction(irp, this_case->value);1435 ir_print_other_inst_src(irp, this_case->value);
1131 fprintf(irp->f, " => ");1436 fprintf(irp->f, " => ");
1132 ir_print_other_block(irp, this_case->block);1437 ir_print_other_block(irp, this_case->block);
1133 fprintf(irp->f, ", ");1438 fprintf(irp->f, ", ");
...@@ -1136,359 +1441,453 @@ static void ir_print_switch_br(IrPrint *irp, IrInstructionSwitchBr *instruction)...@@ -1136,359 +1441,453 @@ static void ir_print_switch_br(IrPrint *irp, IrInstructionSwitchBr *instruction)
1136 ir_print_other_block(irp, instruction->else_block);1441 ir_print_other_block(irp, instruction->else_block);
1137 if (instruction->is_comptime != nullptr) {1442 if (instruction->is_comptime != nullptr) {
1138 fprintf(irp->f, " // comptime = ");1443 fprintf(irp->f, " // comptime = ");
1139 ir_print_other_instruction(irp, instruction->is_comptime);1444 ir_print_other_inst_src(irp, instruction->is_comptime);
1445 }
1446}
1447
1448static void ir_print_switch_br(IrPrintGen *irp, IrInstGenSwitchBr *instruction) {
1449 fprintf(irp->f, "switch (");
1450 ir_print_other_inst_gen(irp, instruction->target_value);
1451 fprintf(irp->f, ") ");
1452 for (size_t i = 0; i < instruction->case_count; i += 1) {
1453 IrInstGenSwitchBrCase *this_case = &instruction->cases[i];
1454 ir_print_other_inst_gen(irp, this_case->value);
1455 fprintf(irp->f, " => ");
1456 ir_print_other_block_gen(irp, this_case->block);
1457 fprintf(irp->f, ", ");
1140 }1458 }
1459 fprintf(irp->f, "else => ");
1460 ir_print_other_block_gen(irp, instruction->else_block);
1141}1461}
11421462
1143static void ir_print_switch_var(IrPrint *irp, IrInstructionSwitchVar *instruction) {1463static void ir_print_switch_var(IrPrintSrc *irp, IrInstSrcSwitchVar *instruction) {
1144 fprintf(irp->f, "switchvar ");1464 fprintf(irp->f, "switchvar ");
1145 ir_print_other_instruction(irp, instruction->target_value_ptr);1465 ir_print_other_inst_src(irp, instruction->target_value_ptr);
1146 for (size_t i = 0; i < instruction->prongs_len; i += 1) {1466 for (size_t i = 0; i < instruction->prongs_len; i += 1) {
1147 fprintf(irp->f, ", ");1467 fprintf(irp->f, ", ");
1148 ir_print_other_instruction(irp, instruction->prongs_ptr[i]);1468 ir_print_other_inst_src(irp, instruction->prongs_ptr[i]);
1149 }1469 }
1150}1470}
11511471
1152static void ir_print_switch_else_var(IrPrint *irp, IrInstructionSwitchElseVar *instruction) {1472static void ir_print_switch_else_var(IrPrintSrc *irp, IrInstSrcSwitchElseVar *instruction) {
1153 fprintf(irp->f, "switchelsevar ");1473 fprintf(irp->f, "switchelsevar ");
1154 ir_print_other_instruction(irp, &instruction->switch_br->base);1474 ir_print_other_inst_src(irp, &instruction->switch_br->base);
1155}1475}
11561476
1157static void ir_print_switch_target(IrPrint *irp, IrInstructionSwitchTarget *instruction) {1477static void ir_print_switch_target(IrPrintSrc *irp, IrInstSrcSwitchTarget *instruction) {
1158 fprintf(irp->f, "switchtarget ");1478 fprintf(irp->f, "switchtarget ");
1159 ir_print_other_instruction(irp, instruction->target_value_ptr);1479 ir_print_other_inst_src(irp, instruction->target_value_ptr);
1160}1480}
11611481
1162static void ir_print_union_tag(IrPrint *irp, IrInstructionUnionTag *instruction) {1482static void ir_print_union_tag(IrPrintGen *irp, IrInstGenUnionTag *instruction) {
1163 fprintf(irp->f, "uniontag ");1483 fprintf(irp->f, "uniontag ");
1164 ir_print_other_instruction(irp, instruction->value);1484 ir_print_other_inst_gen(irp, instruction->value);
1165}1485}
11661486
1167static void ir_print_import(IrPrint *irp, IrInstructionImport *instruction) {1487static void ir_print_import(IrPrintSrc *irp, IrInstSrcImport *instruction) {
1168 fprintf(irp->f, "@import(");1488 fprintf(irp->f, "@import(");
1169 ir_print_other_instruction(irp, instruction->name);1489 ir_print_other_inst_src(irp, instruction->name);
1170 fprintf(irp->f, ")");1490 fprintf(irp->f, ")");
1171}1491}
11721492
1173static void ir_print_ref(IrPrint *irp, IrInstructionRef *instruction) {1493static void ir_print_ref(IrPrintSrc *irp, IrInstSrcRef *instruction) {
1174 const char *const_str = instruction->is_const ? "const " : "";1494 const char *const_str = instruction->is_const ? "const " : "";
1175 const char *volatile_str = instruction->is_volatile ? "volatile " : "";1495 const char *volatile_str = instruction->is_volatile ? "volatile " : "";
1176 fprintf(irp->f, "%s%sref ", const_str, volatile_str);1496 fprintf(irp->f, "%s%sref ", const_str, volatile_str);
1177 ir_print_other_instruction(irp, instruction->value);1497 ir_print_other_inst_src(irp, instruction->value);
1178}1498}
11791499
1180static void ir_print_ref_gen(IrPrint *irp, IrInstructionRefGen *instruction) {1500static void ir_print_ref_gen(IrPrintGen *irp, IrInstGenRef *instruction) {
1181 fprintf(irp->f, "@ref(");1501 fprintf(irp->f, "@ref(");
1182 ir_print_other_instruction(irp, instruction->operand);1502 ir_print_other_inst_gen(irp, instruction->operand);
1183 fprintf(irp->f, ")result=");1503 fprintf(irp->f, ")result=");
1184 ir_print_other_instruction(irp, instruction->result_loc);1504 ir_print_other_inst_gen(irp, instruction->result_loc);
1185}1505}
11861506
1187static void ir_print_compile_err(IrPrint *irp, IrInstructionCompileErr *instruction) {1507static void ir_print_compile_err(IrPrintSrc *irp, IrInstSrcCompileErr *instruction) {
1188 fprintf(irp->f, "@compileError(");1508 fprintf(irp->f, "@compileError(");
1189 ir_print_other_instruction(irp, instruction->msg);1509 ir_print_other_inst_src(irp, instruction->msg);
1190 fprintf(irp->f, ")");1510 fprintf(irp->f, ")");
1191}1511}
11921512
1193static void ir_print_compile_log(IrPrint *irp, IrInstructionCompileLog *instruction) {1513static void ir_print_compile_log(IrPrintSrc *irp, IrInstSrcCompileLog *instruction) {
1194 fprintf(irp->f, "@compileLog(");1514 fprintf(irp->f, "@compileLog(");
1195 for (size_t i = 0; i < instruction->msg_count; i += 1) {1515 for (size_t i = 0; i < instruction->msg_count; i += 1) {
1196 if (i != 0)1516 if (i != 0)
1197 fprintf(irp->f, ",");1517 fprintf(irp->f, ",");
1198 IrInstruction *msg = instruction->msg_list[i];1518 IrInstSrc *msg = instruction->msg_list[i];
1199 ir_print_other_instruction(irp, msg);1519 ir_print_other_inst_src(irp, msg);
1200 }1520 }
1201 fprintf(irp->f, ")");1521 fprintf(irp->f, ")");
1202}1522}
12031523
1204static void ir_print_err_name(IrPrint *irp, IrInstructionErrName *instruction) {1524static void ir_print_err_name(IrPrintSrc *irp, IrInstSrcErrName *instruction) {
1205 fprintf(irp->f, "@errorName(");1525 fprintf(irp->f, "@errorName(");
1206 ir_print_other_instruction(irp, instruction->value);1526 ir_print_other_inst_src(irp, instruction->value);
1207 fprintf(irp->f, ")");1527 fprintf(irp->f, ")");
1208}1528}
12091529
1210static void ir_print_c_import(IrPrint *irp, IrInstructionCImport *instruction) {1530static void ir_print_err_name(IrPrintGen *irp, IrInstGenErrName *instruction) {
1531 fprintf(irp->f, "@errorName(");
1532 ir_print_other_inst_gen(irp, instruction->value);
1533 fprintf(irp->f, ")");
1534}
1535
1536static void ir_print_c_import(IrPrintSrc *irp, IrInstSrcCImport *instruction) {
1211 fprintf(irp->f, "@cImport(...)");1537 fprintf(irp->f, "@cImport(...)");
1212}1538}
12131539
1214static void ir_print_c_include(IrPrint *irp, IrInstructionCInclude *instruction) {1540static void ir_print_c_include(IrPrintSrc *irp, IrInstSrcCInclude *instruction) {
1215 fprintf(irp->f, "@cInclude(");1541 fprintf(irp->f, "@cInclude(");
1216 ir_print_other_instruction(irp, instruction->name);1542 ir_print_other_inst_src(irp, instruction->name);
1217 fprintf(irp->f, ")");1543 fprintf(irp->f, ")");
1218}1544}
12191545
1220static void ir_print_c_define(IrPrint *irp, IrInstructionCDefine *instruction) {1546static void ir_print_c_define(IrPrintSrc *irp, IrInstSrcCDefine *instruction) {
1221 fprintf(irp->f, "@cDefine(");1547 fprintf(irp->f, "@cDefine(");
1222 ir_print_other_instruction(irp, instruction->name);1548 ir_print_other_inst_src(irp, instruction->name);
1223 fprintf(irp->f, ", ");1549 fprintf(irp->f, ", ");
1224 ir_print_other_instruction(irp, instruction->value);1550 ir_print_other_inst_src(irp, instruction->value);
1225 fprintf(irp->f, ")");1551 fprintf(irp->f, ")");
1226}1552}
12271553
1228static void ir_print_c_undef(IrPrint *irp, IrInstructionCUndef *instruction) {1554static void ir_print_c_undef(IrPrintSrc *irp, IrInstSrcCUndef *instruction) {
1229 fprintf(irp->f, "@cUndef(");1555 fprintf(irp->f, "@cUndef(");
1230 ir_print_other_instruction(irp, instruction->name);1556 ir_print_other_inst_src(irp, instruction->name);
1231 fprintf(irp->f, ")");1557 fprintf(irp->f, ")");
1232}1558}
12331559
1234static void ir_print_embed_file(IrPrint *irp, IrInstructionEmbedFile *instruction) {1560static void ir_print_embed_file(IrPrintSrc *irp, IrInstSrcEmbedFile *instruction) {
1235 fprintf(irp->f, "@embedFile(");1561 fprintf(irp->f, "@embedFile(");
1236 ir_print_other_instruction(irp, instruction->name);1562 ir_print_other_inst_src(irp, instruction->name);
1237 fprintf(irp->f, ")");1563 fprintf(irp->f, ")");
1238}1564}
12391565
1240static void ir_print_cmpxchg_src(IrPrint *irp, IrInstructionCmpxchgSrc *instruction) {1566static void ir_print_cmpxchg_src(IrPrintSrc *irp, IrInstSrcCmpxchg *instruction) {
1241 fprintf(irp->f, "@cmpxchg(");1567 fprintf(irp->f, "@cmpxchg(");
1242 ir_print_other_instruction(irp, instruction->ptr);1568 ir_print_other_inst_src(irp, instruction->ptr);
1243 fprintf(irp->f, ", ");1569 fprintf(irp->f, ", ");
1244 ir_print_other_instruction(irp, instruction->cmp_value);1570 ir_print_other_inst_src(irp, instruction->cmp_value);
1245 fprintf(irp->f, ", ");1571 fprintf(irp->f, ", ");
1246 ir_print_other_instruction(irp, instruction->new_value);1572 ir_print_other_inst_src(irp, instruction->new_value);
1247 fprintf(irp->f, ", ");1573 fprintf(irp->f, ", ");
1248 ir_print_other_instruction(irp, instruction->success_order_value);1574 ir_print_other_inst_src(irp, instruction->success_order_value);
1249 fprintf(irp->f, ", ");1575 fprintf(irp->f, ", ");
1250 ir_print_other_instruction(irp, instruction->failure_order_value);1576 ir_print_other_inst_src(irp, instruction->failure_order_value);
1251 fprintf(irp->f, ")result=");1577 fprintf(irp->f, ")result=");
1252 ir_print_result_loc(irp, instruction->result_loc);1578 ir_print_result_loc(irp, instruction->result_loc);
1253}1579}
12541580
1255static void ir_print_cmpxchg_gen(IrPrint *irp, IrInstructionCmpxchgGen *instruction) {1581static void ir_print_cmpxchg_gen(IrPrintGen *irp, IrInstGenCmpxchg *instruction) {
1256 fprintf(irp->f, "@cmpxchg(");1582 fprintf(irp->f, "@cmpxchg(");
1257 ir_print_other_instruction(irp, instruction->ptr);1583 ir_print_other_inst_gen(irp, instruction->ptr);
1258 fprintf(irp->f, ", ");1584 fprintf(irp->f, ", ");
1259 ir_print_other_instruction(irp, instruction->cmp_value);1585 ir_print_other_inst_gen(irp, instruction->cmp_value);
1260 fprintf(irp->f, ", ");1586 fprintf(irp->f, ", ");
1261 ir_print_other_instruction(irp, instruction->new_value);1587 ir_print_other_inst_gen(irp, instruction->new_value);
1262 fprintf(irp->f, ", TODO print atomic orders)result=");1588 fprintf(irp->f, ", TODO print atomic orders)result=");
1263 ir_print_other_instruction(irp, instruction->result_loc);1589 ir_print_other_inst_gen(irp, instruction->result_loc);
1264}1590}
12651591
1266static void ir_print_fence(IrPrint *irp, IrInstructionFence *instruction) {1592static void ir_print_fence(IrPrintSrc *irp, IrInstSrcFence *instruction) {
1267 fprintf(irp->f, "@fence(");1593 fprintf(irp->f, "@fence(");
1268 ir_print_other_instruction(irp, instruction->order_value);1594 ir_print_other_inst_src(irp, instruction->order);
1269 fprintf(irp->f, ")");1595 fprintf(irp->f, ")");
1270}1596}
12711597
1272static void ir_print_truncate(IrPrint *irp, IrInstructionTruncate *instruction) {1598static const char *atomic_order_str(AtomicOrder order) {
1599 switch (order) {
1600 case AtomicOrderUnordered: return "Unordered";
1601 case AtomicOrderMonotonic: return "Monotonic";
1602 case AtomicOrderAcquire: return "Acquire";
1603 case AtomicOrderRelease: return "Release";
1604 case AtomicOrderAcqRel: return "AcqRel";
1605 case AtomicOrderSeqCst: return "SeqCst";
1606 }
1607 zig_unreachable();
1608}
1609
1610static void ir_print_fence(IrPrintGen *irp, IrInstGenFence *instruction) {
1611 fprintf(irp->f, "fence %s", atomic_order_str(instruction->order));
1612}
1613
1614static void ir_print_truncate(IrPrintSrc *irp, IrInstSrcTruncate *instruction) {
1273 fprintf(irp->f, "@truncate(");1615 fprintf(irp->f, "@truncate(");
1274 ir_print_other_instruction(irp, instruction->dest_type);1616 ir_print_other_inst_src(irp, instruction->dest_type);
1275 fprintf(irp->f, ", ");1617 fprintf(irp->f, ", ");
1276 ir_print_other_instruction(irp, instruction->target);1618 ir_print_other_inst_src(irp, instruction->target);
1277 fprintf(irp->f, ")");1619 fprintf(irp->f, ")");
1278}1620}
12791621
1280static void ir_print_int_cast(IrPrint *irp, IrInstructionIntCast *instruction) {1622static void ir_print_truncate(IrPrintGen *irp, IrInstGenTruncate *instruction) {
1623 fprintf(irp->f, "@truncate(");
1624 ir_print_other_inst_gen(irp, instruction->target);
1625 fprintf(irp->f, ")");
1626}
1627
1628static void ir_print_int_cast(IrPrintSrc *irp, IrInstSrcIntCast *instruction) {
1281 fprintf(irp->f, "@intCast(");1629 fprintf(irp->f, "@intCast(");
1282 ir_print_other_instruction(irp, instruction->dest_type);1630 ir_print_other_inst_src(irp, instruction->dest_type);
1283 fprintf(irp->f, ", ");1631 fprintf(irp->f, ", ");
1284 ir_print_other_instruction(irp, instruction->target);1632 ir_print_other_inst_src(irp, instruction->target);
1285 fprintf(irp->f, ")");1633 fprintf(irp->f, ")");
1286}1634}
12871635
1288static void ir_print_float_cast(IrPrint *irp, IrInstructionFloatCast *instruction) {1636static void ir_print_float_cast(IrPrintSrc *irp, IrInstSrcFloatCast *instruction) {
1289 fprintf(irp->f, "@floatCast(");1637 fprintf(irp->f, "@floatCast(");
1290 ir_print_other_instruction(irp, instruction->dest_type);1638 ir_print_other_inst_src(irp, instruction->dest_type);
1291 fprintf(irp->f, ", ");1639 fprintf(irp->f, ", ");
1292 ir_print_other_instruction(irp, instruction->target);1640 ir_print_other_inst_src(irp, instruction->target);
1293 fprintf(irp->f, ")");1641 fprintf(irp->f, ")");
1294}1642}
12951643
1296static void ir_print_err_set_cast(IrPrint *irp, IrInstructionErrSetCast *instruction) {1644static void ir_print_err_set_cast(IrPrintSrc *irp, IrInstSrcErrSetCast *instruction) {
1297 fprintf(irp->f, "@errSetCast(");1645 fprintf(irp->f, "@errSetCast(");
1298 ir_print_other_instruction(irp, instruction->dest_type);1646 ir_print_other_inst_src(irp, instruction->dest_type);
1299 fprintf(irp->f, ", ");1647 fprintf(irp->f, ", ");
1300 ir_print_other_instruction(irp, instruction->target);1648 ir_print_other_inst_src(irp, instruction->target);
1301 fprintf(irp->f, ")");1649 fprintf(irp->f, ")");
1302}1650}
13031651
1304static void ir_print_from_bytes(IrPrint *irp, IrInstructionFromBytes *instruction) {1652static void ir_print_from_bytes(IrPrintSrc *irp, IrInstSrcFromBytes *instruction) {
1305 fprintf(irp->f, "@bytesToSlice(");1653 fprintf(irp->f, "@bytesToSlice(");
1306 ir_print_other_instruction(irp, instruction->dest_child_type);1654 ir_print_other_inst_src(irp, instruction->dest_child_type);
1307 fprintf(irp->f, ", ");1655 fprintf(irp->f, ", ");
1308 ir_print_other_instruction(irp, instruction->target);1656 ir_print_other_inst_src(irp, instruction->target);
1309 fprintf(irp->f, ")");1657 fprintf(irp->f, ")");
1310}1658}
13111659
1312static void ir_print_to_bytes(IrPrint *irp, IrInstructionToBytes *instruction) {1660static void ir_print_to_bytes(IrPrintSrc *irp, IrInstSrcToBytes *instruction) {
1313 fprintf(irp->f, "@sliceToBytes(");1661 fprintf(irp->f, "@sliceToBytes(");
1314 ir_print_other_instruction(irp, instruction->target);1662 ir_print_other_inst_src(irp, instruction->target);
1315 fprintf(irp->f, ")");1663 fprintf(irp->f, ")");
1316}1664}
13171665
1318static void ir_print_int_to_float(IrPrint *irp, IrInstructionIntToFloat *instruction) {1666static void ir_print_int_to_float(IrPrintSrc *irp, IrInstSrcIntToFloat *instruction) {
1319 fprintf(irp->f, "@intToFloat(");1667 fprintf(irp->f, "@intToFloat(");
1320 ir_print_other_instruction(irp, instruction->dest_type);1668 ir_print_other_inst_src(irp, instruction->dest_type);
1321 fprintf(irp->f, ", ");1669 fprintf(irp->f, ", ");
1322 ir_print_other_instruction(irp, instruction->target);1670 ir_print_other_inst_src(irp, instruction->target);
1323 fprintf(irp->f, ")");1671 fprintf(irp->f, ")");
1324}1672}
13251673
1326static void ir_print_float_to_int(IrPrint *irp, IrInstructionFloatToInt *instruction) {1674static void ir_print_float_to_int(IrPrintSrc *irp, IrInstSrcFloatToInt *instruction) {
1327 fprintf(irp->f, "@floatToInt(");1675 fprintf(irp->f, "@floatToInt(");
1328 ir_print_other_instruction(irp, instruction->dest_type);1676 ir_print_other_inst_src(irp, instruction->dest_type);
1329 fprintf(irp->f, ", ");1677 fprintf(irp->f, ", ");
1330 ir_print_other_instruction(irp, instruction->target);1678 ir_print_other_inst_src(irp, instruction->target);
1331 fprintf(irp->f, ")");1679 fprintf(irp->f, ")");
1332}1680}
13331681
1334static void ir_print_bool_to_int(IrPrint *irp, IrInstructionBoolToInt *instruction) {1682static void ir_print_bool_to_int(IrPrintSrc *irp, IrInstSrcBoolToInt *instruction) {
1335 fprintf(irp->f, "@boolToInt(");1683 fprintf(irp->f, "@boolToInt(");
1336 ir_print_other_instruction(irp, instruction->target);1684 ir_print_other_inst_src(irp, instruction->target);
1337 fprintf(irp->f, ")");1685 fprintf(irp->f, ")");
1338}1686}
13391687
1340static void ir_print_int_type(IrPrint *irp, IrInstructionIntType *instruction) {1688static void ir_print_int_type(IrPrintSrc *irp, IrInstSrcIntType *instruction) {
1341 fprintf(irp->f, "@IntType(");1689 fprintf(irp->f, "@IntType(");
1342 ir_print_other_instruction(irp, instruction->is_signed);1690 ir_print_other_inst_src(irp, instruction->is_signed);
1343 fprintf(irp->f, ", ");1691 fprintf(irp->f, ", ");
1344 ir_print_other_instruction(irp, instruction->bit_count);1692 ir_print_other_inst_src(irp, instruction->bit_count);
1345 fprintf(irp->f, ")");1693 fprintf(irp->f, ")");
1346}1694}
13471695
1348static void ir_print_vector_type(IrPrint *irp, IrInstructionVectorType *instruction) {1696static void ir_print_vector_type(IrPrintSrc *irp, IrInstSrcVectorType *instruction) {
1349 fprintf(irp->f, "@Vector(");1697 fprintf(irp->f, "@Vector(");
1350 ir_print_other_instruction(irp, instruction->len);1698 ir_print_other_inst_src(irp, instruction->len);
1351 fprintf(irp->f, ", ");1699 fprintf(irp->f, ", ");
1352 ir_print_other_instruction(irp, instruction->elem_type);1700 ir_print_other_inst_src(irp, instruction->elem_type);
1353 fprintf(irp->f, ")");1701 fprintf(irp->f, ")");
1354}1702}
13551703
1356static void ir_print_shuffle_vector(IrPrint *irp, IrInstructionShuffleVector *instruction) {1704static void ir_print_shuffle_vector(IrPrintSrc *irp, IrInstSrcShuffleVector *instruction) {
1357 fprintf(irp->f, "@shuffle(");1705 fprintf(irp->f, "@shuffle(");
1358 ir_print_other_instruction(irp, instruction->scalar_type);1706 ir_print_other_inst_src(irp, instruction->scalar_type);
1359 fprintf(irp->f, ", ");1707 fprintf(irp->f, ", ");
1360 ir_print_other_instruction(irp, instruction->a);1708 ir_print_other_inst_src(irp, instruction->a);
1361 fprintf(irp->f, ", ");1709 fprintf(irp->f, ", ");
1362 ir_print_other_instruction(irp, instruction->b);1710 ir_print_other_inst_src(irp, instruction->b);
1363 fprintf(irp->f, ", ");1711 fprintf(irp->f, ", ");
1364 ir_print_other_instruction(irp, instruction->mask);1712 ir_print_other_inst_src(irp, instruction->mask);
1365 fprintf(irp->f, ")");1713 fprintf(irp->f, ")");
1366}1714}
13671715
1368static void ir_print_splat_src(IrPrint *irp, IrInstructionSplatSrc *instruction) {1716static void ir_print_shuffle_vector(IrPrintGen *irp, IrInstGenShuffleVector *instruction) {
1717 fprintf(irp->f, "@shuffle(");
1718 ir_print_other_inst_gen(irp, instruction->a);
1719 fprintf(irp->f, ", ");
1720 ir_print_other_inst_gen(irp, instruction->b);
1721 fprintf(irp->f, ", ");
1722 ir_print_other_inst_gen(irp, instruction->mask);
1723 fprintf(irp->f, ")");
1724}
1725
1726static void ir_print_splat_src(IrPrintSrc *irp, IrInstSrcSplat *instruction) {
1369 fprintf(irp->f, "@splat(");1727 fprintf(irp->f, "@splat(");
1370 ir_print_other_instruction(irp, instruction->len);1728 ir_print_other_inst_src(irp, instruction->len);
1371 fprintf(irp->f, ", ");1729 fprintf(irp->f, ", ");
1372 ir_print_other_instruction(irp, instruction->scalar);1730 ir_print_other_inst_src(irp, instruction->scalar);
1373 fprintf(irp->f, ")");1731 fprintf(irp->f, ")");
1374}1732}
13751733
1376static void ir_print_splat_gen(IrPrint *irp, IrInstructionSplatGen *instruction) {1734static void ir_print_splat_gen(IrPrintGen *irp, IrInstGenSplat *instruction) {
1377 fprintf(irp->f, "@splat(");1735 fprintf(irp->f, "@splat(");
1378 ir_print_other_instruction(irp, instruction->scalar);1736 ir_print_other_inst_gen(irp, instruction->scalar);
1379 fprintf(irp->f, ")");1737 fprintf(irp->f, ")");
1380}1738}
13811739
1382static void ir_print_bool_not(IrPrint *irp, IrInstructionBoolNot *instruction) {1740static void ir_print_bool_not(IrPrintSrc *irp, IrInstSrcBoolNot *instruction) {
1741 fprintf(irp->f, "! ");
1742 ir_print_other_inst_src(irp, instruction->value);
1743}
1744
1745static void ir_print_bool_not(IrPrintGen *irp, IrInstGenBoolNot *instruction) {
1383 fprintf(irp->f, "! ");1746 fprintf(irp->f, "! ");
1384 ir_print_other_instruction(irp, instruction->value);1747 ir_print_other_inst_gen(irp, instruction->value);
1385}1748}
13861749
1387static void ir_print_memset(IrPrint *irp, IrInstructionMemset *instruction) {1750static void ir_print_memset(IrPrintSrc *irp, IrInstSrcMemset *instruction) {
1388 fprintf(irp->f, "@memset(");1751 fprintf(irp->f, "@memset(");
1389 ir_print_other_instruction(irp, instruction->dest_ptr);1752 ir_print_other_inst_src(irp, instruction->dest_ptr);
1753 fprintf(irp->f, ", ");
1754 ir_print_other_inst_src(irp, instruction->byte);
1755 fprintf(irp->f, ", ");
1756 ir_print_other_inst_src(irp, instruction->count);
1757 fprintf(irp->f, ")");
1758}
1759
1760static void ir_print_memset(IrPrintGen *irp, IrInstGenMemset *instruction) {
1761 fprintf(irp->f, "@memset(");
1762 ir_print_other_inst_gen(irp, instruction->dest_ptr);
1763 fprintf(irp->f, ", ");
1764 ir_print_other_inst_gen(irp, instruction->byte);
1765 fprintf(irp->f, ", ");
1766 ir_print_other_inst_gen(irp, instruction->count);
1767 fprintf(irp->f, ")");
1768}
1769
1770static void ir_print_memcpy(IrPrintSrc *irp, IrInstSrcMemcpy *instruction) {
1771 fprintf(irp->f, "@memcpy(");
1772 ir_print_other_inst_src(irp, instruction->dest_ptr);
1390 fprintf(irp->f, ", ");1773 fprintf(irp->f, ", ");
1391 ir_print_other_instruction(irp, instruction->byte);1774 ir_print_other_inst_src(irp, instruction->src_ptr);
1392 fprintf(irp->f, ", ");1775 fprintf(irp->f, ", ");
1393 ir_print_other_instruction(irp, instruction->count);1776 ir_print_other_inst_src(irp, instruction->count);
1394 fprintf(irp->f, ")");1777 fprintf(irp->f, ")");
1395}1778}
13961779
1397static void ir_print_memcpy(IrPrint *irp, IrInstructionMemcpy *instruction) {1780static void ir_print_memcpy(IrPrintGen *irp, IrInstGenMemcpy *instruction) {
1398 fprintf(irp->f, "@memcpy(");1781 fprintf(irp->f, "@memcpy(");
1399 ir_print_other_instruction(irp, instruction->dest_ptr);1782 ir_print_other_inst_gen(irp, instruction->dest_ptr);
1400 fprintf(irp->f, ", ");1783 fprintf(irp->f, ", ");
1401 ir_print_other_instruction(irp, instruction->src_ptr);1784 ir_print_other_inst_gen(irp, instruction->src_ptr);
1402 fprintf(irp->f, ", ");1785 fprintf(irp->f, ", ");
1403 ir_print_other_instruction(irp, instruction->count);1786 ir_print_other_inst_gen(irp, instruction->count);
1404 fprintf(irp->f, ")");1787 fprintf(irp->f, ")");
1405}1788}
14061789
1407static void ir_print_slice_src(IrPrint *irp, IrInstructionSliceSrc *instruction) {1790static void ir_print_slice_src(IrPrintSrc *irp, IrInstSrcSlice *instruction) {
1408 ir_print_other_instruction(irp, instruction->ptr);1791 ir_print_other_inst_src(irp, instruction->ptr);
1409 fprintf(irp->f, "[");1792 fprintf(irp->f, "[");
1410 ir_print_other_instruction(irp, instruction->start);1793 ir_print_other_inst_src(irp, instruction->start);
1411 fprintf(irp->f, "..");1794 fprintf(irp->f, "..");
1412 if (instruction->end)1795 if (instruction->end)
1413 ir_print_other_instruction(irp, instruction->end);1796 ir_print_other_inst_src(irp, instruction->end);
1414 fprintf(irp->f, "]result=");1797 fprintf(irp->f, "]result=");
1415 ir_print_result_loc(irp, instruction->result_loc);1798 ir_print_result_loc(irp, instruction->result_loc);
1416}1799}
14171800
1418static void ir_print_slice_gen(IrPrint *irp, IrInstructionSliceGen *instruction) {1801static void ir_print_slice_gen(IrPrintGen *irp, IrInstGenSlice *instruction) {
1419 ir_print_other_instruction(irp, instruction->ptr);1802 ir_print_other_inst_gen(irp, instruction->ptr);
1420 fprintf(irp->f, "[");1803 fprintf(irp->f, "[");
1421 ir_print_other_instruction(irp, instruction->start);1804 ir_print_other_inst_gen(irp, instruction->start);
1422 fprintf(irp->f, "..");1805 fprintf(irp->f, "..");
1423 if (instruction->end)1806 if (instruction->end)
1424 ir_print_other_instruction(irp, instruction->end);1807 ir_print_other_inst_gen(irp, instruction->end);
1425 fprintf(irp->f, "]result=");1808 fprintf(irp->f, "]result=");
1426 ir_print_other_instruction(irp, instruction->result_loc);1809 ir_print_other_inst_gen(irp, instruction->result_loc);
1427}1810}
14281811
1429static void ir_print_member_count(IrPrint *irp, IrInstructionMemberCount *instruction) {1812static void ir_print_member_count(IrPrintSrc *irp, IrInstSrcMemberCount *instruction) {
1430 fprintf(irp->f, "@memberCount(");1813 fprintf(irp->f, "@memberCount(");
1431 ir_print_other_instruction(irp, instruction->container);1814 ir_print_other_inst_src(irp, instruction->container);
1432 fprintf(irp->f, ")");1815 fprintf(irp->f, ")");
1433}1816}
14341817
1435static void ir_print_member_type(IrPrint *irp, IrInstructionMemberType *instruction) {1818static void ir_print_member_type(IrPrintSrc *irp, IrInstSrcMemberType *instruction) {
1436 fprintf(irp->f, "@memberType(");1819 fprintf(irp->f, "@memberType(");
1437 ir_print_other_instruction(irp, instruction->container_type);1820 ir_print_other_inst_src(irp, instruction->container_type);
1438 fprintf(irp->f, ", ");1821 fprintf(irp->f, ", ");
1439 ir_print_other_instruction(irp, instruction->member_index);1822 ir_print_other_inst_src(irp, instruction->member_index);
1440 fprintf(irp->f, ")");1823 fprintf(irp->f, ")");
1441}1824}
14421825
1443static void ir_print_member_name(IrPrint *irp, IrInstructionMemberName *instruction) {1826static void ir_print_member_name(IrPrintSrc *irp, IrInstSrcMemberName *instruction) {
1444 fprintf(irp->f, "@memberName(");1827 fprintf(irp->f, "@memberName(");
1445 ir_print_other_instruction(irp, instruction->container_type);1828 ir_print_other_inst_src(irp, instruction->container_type);
1446 fprintf(irp->f, ", ");1829 fprintf(irp->f, ", ");
1447 ir_print_other_instruction(irp, instruction->member_index);1830 ir_print_other_inst_src(irp, instruction->member_index);
1448 fprintf(irp->f, ")");1831 fprintf(irp->f, ")");
1449}1832}
14501833
1451static void ir_print_breakpoint(IrPrint *irp, IrInstructionBreakpoint *instruction) {1834static void ir_print_breakpoint(IrPrintSrc *irp, IrInstSrcBreakpoint *instruction) {
1835 fprintf(irp->f, "@breakpoint()");
1836}
1837
1838static void ir_print_breakpoint(IrPrintGen *irp, IrInstGenBreakpoint *instruction) {
1452 fprintf(irp->f, "@breakpoint()");1839 fprintf(irp->f, "@breakpoint()");
1453}1840}
14541841
1455static void ir_print_frame_address(IrPrint *irp, IrInstructionFrameAddress *instruction) {1842static void ir_print_frame_address(IrPrintSrc *irp, IrInstSrcFrameAddress *instruction) {
1843 fprintf(irp->f, "@frameAddress()");
1844}
1845
1846static void ir_print_frame_address(IrPrintGen *irp, IrInstGenFrameAddress *instruction) {
1456 fprintf(irp->f, "@frameAddress()");1847 fprintf(irp->f, "@frameAddress()");
1457}1848}
14581849
1459static void ir_print_handle(IrPrint *irp, IrInstructionFrameHandle *instruction) {1850static void ir_print_handle(IrPrintSrc *irp, IrInstSrcFrameHandle *instruction) {
1460 fprintf(irp->f, "@frame()");1851 fprintf(irp->f, "@frame()");
1461}1852}
14621853
1463static void ir_print_frame_type(IrPrint *irp, IrInstructionFrameType *instruction) {1854static void ir_print_handle(IrPrintGen *irp, IrInstGenFrameHandle *instruction) {
1855 fprintf(irp->f, "@frame()");
1856}
1857
1858static void ir_print_frame_type(IrPrintSrc *irp, IrInstSrcFrameType *instruction) {
1464 fprintf(irp->f, "@Frame(");1859 fprintf(irp->f, "@Frame(");
1465 ir_print_other_instruction(irp, instruction->fn);1860 ir_print_other_inst_src(irp, instruction->fn);
1466 fprintf(irp->f, ")");1861 fprintf(irp->f, ")");
1467}1862}
14681863
1469static void ir_print_frame_size_src(IrPrint *irp, IrInstructionFrameSizeSrc *instruction) {1864static void ir_print_frame_size_src(IrPrintSrc *irp, IrInstSrcFrameSize *instruction) {
1470 fprintf(irp->f, "@frameSize(");1865 fprintf(irp->f, "@frameSize(");
1471 ir_print_other_instruction(irp, instruction->fn);1866 ir_print_other_inst_src(irp, instruction->fn);
1472 fprintf(irp->f, ")");1867 fprintf(irp->f, ")");
1473}1868}
14741869
1475static void ir_print_frame_size_gen(IrPrint *irp, IrInstructionFrameSizeGen *instruction) {1870static void ir_print_frame_size_gen(IrPrintGen *irp, IrInstGenFrameSize *instruction) {
1476 fprintf(irp->f, "@frameSize(");1871 fprintf(irp->f, "@frameSize(");
1477 ir_print_other_instruction(irp, instruction->fn);1872 ir_print_other_inst_gen(irp, instruction->fn);
1478 fprintf(irp->f, ")");1873 fprintf(irp->f, ")");
1479}1874}
14801875
1481static void ir_print_return_address(IrPrint *irp, IrInstructionReturnAddress *instruction) {1876static void ir_print_return_address(IrPrintSrc *irp, IrInstSrcReturnAddress *instruction) {
1877 fprintf(irp->f, "@returnAddress()");
1878}
1879
1880static void ir_print_return_address(IrPrintGen *irp, IrInstGenReturnAddress *instruction) {
1482 fprintf(irp->f, "@returnAddress()");1881 fprintf(irp->f, "@returnAddress()");
1483}1882}
14841883
1485static void ir_print_align_of(IrPrint *irp, IrInstructionAlignOf *instruction) {1884static void ir_print_align_of(IrPrintSrc *irp, IrInstSrcAlignOf *instruction) {
1486 fprintf(irp->f, "@alignOf(");1885 fprintf(irp->f, "@alignOf(");
1487 ir_print_other_instruction(irp, instruction->type_value);1886 ir_print_other_inst_src(irp, instruction->type_value);
1488 fprintf(irp->f, ")");1887 fprintf(irp->f, ")");
1489}1888}
14901889
1491static void ir_print_overflow_op(IrPrint *irp, IrInstructionOverflowOp *instruction) {1890static void ir_print_overflow_op(IrPrintSrc *irp, IrInstSrcOverflowOp *instruction) {
1492 switch (instruction->op) {1891 switch (instruction->op) {
1493 case IrOverflowOpAdd:1892 case IrOverflowOpAdd:
1494 fprintf(irp->f, "@addWithOverflow(");1893 fprintf(irp->f, "@addWithOverflow(");
...@@ -1503,1146 +1902,1457 @@ static void ir_print_overflow_op(IrPrint *irp, IrInstructionOverflowOp *instruct...@@ -1503,1146 +1902,1457 @@ static void ir_print_overflow_op(IrPrint *irp, IrInstructionOverflowOp *instruct
1503 fprintf(irp->f, "@shlWithOverflow(");1902 fprintf(irp->f, "@shlWithOverflow(");
1504 break;1903 break;
1505 }1904 }
1506 ir_print_other_instruction(irp, instruction->type_value);1905 ir_print_other_inst_src(irp, instruction->type_value);
1507 fprintf(irp->f, ", ");1906 fprintf(irp->f, ", ");
1508 ir_print_other_instruction(irp, instruction->op1);1907 ir_print_other_inst_src(irp, instruction->op1);
1908 fprintf(irp->f, ", ");
1909 ir_print_other_inst_src(irp, instruction->op2);
1910 fprintf(irp->f, ", ");
1911 ir_print_other_inst_src(irp, instruction->result_ptr);
1912 fprintf(irp->f, ")");
1913}
1914
1915static void ir_print_overflow_op(IrPrintGen *irp, IrInstGenOverflowOp *instruction) {
1916 switch (instruction->op) {
1917 case IrOverflowOpAdd:
1918 fprintf(irp->f, "@addWithOverflow(");
1919 break;
1920 case IrOverflowOpSub:
1921 fprintf(irp->f, "@subWithOverflow(");
1922 break;
1923 case IrOverflowOpMul:
1924 fprintf(irp->f, "@mulWithOverflow(");
1925 break;
1926 case IrOverflowOpShl:
1927 fprintf(irp->f, "@shlWithOverflow(");
1928 break;
1929 }
1930 ir_print_other_inst_gen(irp, instruction->op1);
1509 fprintf(irp->f, ", ");1931 fprintf(irp->f, ", ");
1510 ir_print_other_instruction(irp, instruction->op2);1932 ir_print_other_inst_gen(irp, instruction->op2);
1511 fprintf(irp->f, ", ");1933 fprintf(irp->f, ", ");
1512 ir_print_other_instruction(irp, instruction->result_ptr);1934 ir_print_other_inst_gen(irp, instruction->result_ptr);
1513 fprintf(irp->f, ")");1935 fprintf(irp->f, ")");
1514}1936}
15151937
1516static void ir_print_test_err_src(IrPrint *irp, IrInstructionTestErrSrc *instruction) {1938static void ir_print_test_err_src(IrPrintSrc *irp, IrInstSrcTestErr *instruction) {
1517 fprintf(irp->f, "@testError(");1939 fprintf(irp->f, "@testError(");
1518 ir_print_other_instruction(irp, instruction->base_ptr);1940 ir_print_other_inst_src(irp, instruction->base_ptr);
1519 fprintf(irp->f, ")");1941 fprintf(irp->f, ")");
1520}1942}
15211943
1522static void ir_print_test_err_gen(IrPrint *irp, IrInstructionTestErrGen *instruction) {1944static void ir_print_test_err_gen(IrPrintGen *irp, IrInstGenTestErr *instruction) {
1523 fprintf(irp->f, "@testError(");1945 fprintf(irp->f, "@testError(");
1524 ir_print_other_instruction(irp, instruction->err_union);1946 ir_print_other_inst_gen(irp, instruction->err_union);
1947 fprintf(irp->f, ")");
1948}
1949
1950static void ir_print_unwrap_err_code(IrPrintSrc *irp, IrInstSrcUnwrapErrCode *instruction) {
1951 fprintf(irp->f, "UnwrapErrorCode(");
1952 ir_print_other_inst_src(irp, instruction->err_union_ptr);
1525 fprintf(irp->f, ")");1953 fprintf(irp->f, ")");
1526}1954}
15271955
1528static void ir_print_unwrap_err_code(IrPrint *irp, IrInstructionUnwrapErrCode *instruction) {1956static void ir_print_unwrap_err_code(IrPrintGen *irp, IrInstGenUnwrapErrCode *instruction) {
1529 fprintf(irp->f, "UnwrapErrorCode(");1957 fprintf(irp->f, "UnwrapErrorCode(");
1530 ir_print_other_instruction(irp, instruction->err_union_ptr);1958 ir_print_other_inst_gen(irp, instruction->err_union_ptr);
1531 fprintf(irp->f, ")");1959 fprintf(irp->f, ")");
1532}1960}
15331961
1534static void ir_print_unwrap_err_payload(IrPrint *irp, IrInstructionUnwrapErrPayload *instruction) {1962static void ir_print_unwrap_err_payload(IrPrintSrc *irp, IrInstSrcUnwrapErrPayload *instruction) {
1963 fprintf(irp->f, "ErrorUnionFieldPayload(");
1964 ir_print_other_inst_src(irp, instruction->value);
1965 fprintf(irp->f, ")safety=%d,init=%d",instruction->safety_check_on, instruction->initializing);
1966}
1967
1968static void ir_print_unwrap_err_payload(IrPrintGen *irp, IrInstGenUnwrapErrPayload *instruction) {
1535 fprintf(irp->f, "ErrorUnionFieldPayload(");1969 fprintf(irp->f, "ErrorUnionFieldPayload(");
1536 ir_print_other_instruction(irp, instruction->value);1970 ir_print_other_inst_gen(irp, instruction->value);
1537 fprintf(irp->f, ")safety=%d,init=%d",instruction->safety_check_on, instruction->initializing);1971 fprintf(irp->f, ")safety=%d,init=%d",instruction->safety_check_on, instruction->initializing);
1538}1972}
15391973
1540static void ir_print_optional_wrap(IrPrint *irp, IrInstructionOptionalWrap *instruction) {1974static void ir_print_optional_wrap(IrPrintGen *irp, IrInstGenOptionalWrap *instruction) {
1541 fprintf(irp->f, "@optionalWrap(");1975 fprintf(irp->f, "@optionalWrap(");
1542 ir_print_other_instruction(irp, instruction->operand);1976 ir_print_other_inst_gen(irp, instruction->operand);
1543 fprintf(irp->f, ")result=");1977 fprintf(irp->f, ")result=");
1544 ir_print_other_instruction(irp, instruction->result_loc);1978 ir_print_other_inst_gen(irp, instruction->result_loc);
1545}1979}
15461980
1547static void ir_print_err_wrap_code(IrPrint *irp, IrInstructionErrWrapCode *instruction) {1981static void ir_print_err_wrap_code(IrPrintGen *irp, IrInstGenErrWrapCode *instruction) {
1548 fprintf(irp->f, "@errWrapCode(");1982 fprintf(irp->f, "@errWrapCode(");
1549 ir_print_other_instruction(irp, instruction->operand);1983 ir_print_other_inst_gen(irp, instruction->operand);
1550 fprintf(irp->f, ")result=");1984 fprintf(irp->f, ")result=");
1551 ir_print_other_instruction(irp, instruction->result_loc);1985 ir_print_other_inst_gen(irp, instruction->result_loc);
1552}1986}
15531987
1554static void ir_print_err_wrap_payload(IrPrint *irp, IrInstructionErrWrapPayload *instruction) {1988static void ir_print_err_wrap_payload(IrPrintGen *irp, IrInstGenErrWrapPayload *instruction) {
1555 fprintf(irp->f, "@errWrapPayload(");1989 fprintf(irp->f, "@errWrapPayload(");
1556 ir_print_other_instruction(irp, instruction->operand);1990 ir_print_other_inst_gen(irp, instruction->operand);
1557 fprintf(irp->f, ")result=");1991 fprintf(irp->f, ")result=");
1558 ir_print_other_instruction(irp, instruction->result_loc);1992 ir_print_other_inst_gen(irp, instruction->result_loc);
1559}1993}
15601994
1561static void ir_print_fn_proto(IrPrint *irp, IrInstructionFnProto *instruction) {1995static void ir_print_fn_proto(IrPrintSrc *irp, IrInstSrcFnProto *instruction) {
1562 fprintf(irp->f, "fn(");1996 fprintf(irp->f, "fn(");
1563 for (size_t i = 0; i < instruction->base.source_node->data.fn_proto.params.length; i += 1) {1997 for (size_t i = 0; i < instruction->base.base.source_node->data.fn_proto.params.length; i += 1) {
1564 if (i != 0)1998 if (i != 0)
1565 fprintf(irp->f, ",");1999 fprintf(irp->f, ",");
1566 if (instruction->is_var_args && i == instruction->base.source_node->data.fn_proto.params.length - 1) {2000 if (instruction->is_var_args && i == instruction->base.base.source_node->data.fn_proto.params.length - 1) {
1567 fprintf(irp->f, "...");2001 fprintf(irp->f, "...");
1568 } else {2002 } else {
1569 ir_print_other_instruction(irp, instruction->param_types[i]);2003 ir_print_other_inst_src(irp, instruction->param_types[i]);
1570 }2004 }
1571 }2005 }
1572 fprintf(irp->f, ")");2006 fprintf(irp->f, ")");
1573 if (instruction->align_value != nullptr) {2007 if (instruction->align_value != nullptr) {
1574 fprintf(irp->f, " align ");2008 fprintf(irp->f, " align ");
1575 ir_print_other_instruction(irp, instruction->align_value);2009 ir_print_other_inst_src(irp, instruction->align_value);
1576 fprintf(irp->f, " ");2010 fprintf(irp->f, " ");
1577 }2011 }
1578 fprintf(irp->f, "->");2012 fprintf(irp->f, "->");
1579 ir_print_other_instruction(irp, instruction->return_type);2013 ir_print_other_inst_src(irp, instruction->return_type);
1580}2014}
15812015
1582static void ir_print_test_comptime(IrPrint *irp, IrInstructionTestComptime *instruction) {2016static void ir_print_test_comptime(IrPrintSrc *irp, IrInstSrcTestComptime *instruction) {
1583 fprintf(irp->f, "@testComptime(");2017 fprintf(irp->f, "@testComptime(");
1584 ir_print_other_instruction(irp, instruction->value);2018 ir_print_other_inst_src(irp, instruction->value);
1585 fprintf(irp->f, ")");2019 fprintf(irp->f, ")");
1586}2020}
15872021
1588static void ir_print_ptr_cast_src(IrPrint *irp, IrInstructionPtrCastSrc *instruction) {2022static void ir_print_ptr_cast_src(IrPrintSrc *irp, IrInstSrcPtrCast *instruction) {
1589 fprintf(irp->f, "@ptrCast(");2023 fprintf(irp->f, "@ptrCast(");
1590 if (instruction->dest_type) {2024 if (instruction->dest_type) {
1591 ir_print_other_instruction(irp, instruction->dest_type);2025 ir_print_other_inst_src(irp, instruction->dest_type);
1592 }2026 }
1593 fprintf(irp->f, ",");2027 fprintf(irp->f, ",");
1594 ir_print_other_instruction(irp, instruction->ptr);2028 ir_print_other_inst_src(irp, instruction->ptr);
1595 fprintf(irp->f, ")");2029 fprintf(irp->f, ")");
1596}2030}
15972031
1598static void ir_print_ptr_cast_gen(IrPrint *irp, IrInstructionPtrCastGen *instruction) {2032static void ir_print_ptr_cast_gen(IrPrintGen *irp, IrInstGenPtrCast *instruction) {
1599 fprintf(irp->f, "@ptrCast(");2033 fprintf(irp->f, "@ptrCast(");
1600 ir_print_other_instruction(irp, instruction->ptr);2034 ir_print_other_inst_gen(irp, instruction->ptr);
1601 fprintf(irp->f, ")");2035 fprintf(irp->f, ")");
1602}2036}
16032037
1604static void ir_print_implicit_cast(IrPrint *irp, IrInstructionImplicitCast *instruction) {2038static void ir_print_implicit_cast(IrPrintSrc *irp, IrInstSrcImplicitCast *instruction) {
1605 fprintf(irp->f, "@implicitCast(");2039 fprintf(irp->f, "@implicitCast(");
1606 ir_print_other_instruction(irp, instruction->operand);2040 ir_print_other_inst_src(irp, instruction->operand);
1607 fprintf(irp->f, ")result=");2041 fprintf(irp->f, ")result=");
1608 ir_print_result_loc(irp, &instruction->result_loc_cast->base);2042 ir_print_result_loc(irp, &instruction->result_loc_cast->base);
1609}2043}
16102044
1611static void ir_print_bit_cast_src(IrPrint *irp, IrInstructionBitCastSrc *instruction) {2045static void ir_print_bit_cast_src(IrPrintSrc *irp, IrInstSrcBitCast *instruction) {
1612 fprintf(irp->f, "@bitCast(");2046 fprintf(irp->f, "@bitCast(");
1613 ir_print_other_instruction(irp, instruction->operand);2047 ir_print_other_inst_src(irp, instruction->operand);
1614 fprintf(irp->f, ")result=");2048 fprintf(irp->f, ")result=");
1615 ir_print_result_loc(irp, &instruction->result_loc_bit_cast->base);2049 ir_print_result_loc(irp, &instruction->result_loc_bit_cast->base);
1616}2050}
16172051
1618static void ir_print_bit_cast_gen(IrPrint *irp, IrInstructionBitCastGen *instruction) {2052static void ir_print_bit_cast_gen(IrPrintGen *irp, IrInstGenBitCast *instruction) {
1619 fprintf(irp->f, "@bitCast(");2053 fprintf(irp->f, "@bitCast(");
1620 ir_print_other_instruction(irp, instruction->operand);2054 ir_print_other_inst_gen(irp, instruction->operand);
1621 fprintf(irp->f, ")");2055 fprintf(irp->f, ")");
1622}2056}
16232057
1624static void ir_print_widen_or_shorten(IrPrint *irp, IrInstructionWidenOrShorten *instruction) {2058static void ir_print_widen_or_shorten(IrPrintGen *irp, IrInstGenWidenOrShorten *instruction) {
1625 fprintf(irp->f, "WidenOrShorten(");2059 fprintf(irp->f, "WidenOrShorten(");
1626 ir_print_other_instruction(irp, instruction->target);2060 ir_print_other_inst_gen(irp, instruction->target);
1627 fprintf(irp->f, ")");2061 fprintf(irp->f, ")");
1628}2062}
16292063
1630static void ir_print_ptr_to_int(IrPrint *irp, IrInstructionPtrToInt *instruction) {2064static void ir_print_ptr_to_int(IrPrintSrc *irp, IrInstSrcPtrToInt *instruction) {
1631 fprintf(irp->f, "@ptrToInt(");2065 fprintf(irp->f, "@ptrToInt(");
1632 ir_print_other_instruction(irp, instruction->target);2066 ir_print_other_inst_src(irp, instruction->target);
1633 fprintf(irp->f, ")");2067 fprintf(irp->f, ")");
1634}2068}
16352069
1636static void ir_print_int_to_ptr(IrPrint *irp, IrInstructionIntToPtr *instruction) {2070static void ir_print_ptr_to_int(IrPrintGen *irp, IrInstGenPtrToInt *instruction) {
2071 fprintf(irp->f, "@ptrToInt(");
2072 ir_print_other_inst_gen(irp, instruction->target);
2073 fprintf(irp->f, ")");
2074}
2075
2076static void ir_print_int_to_ptr(IrPrintSrc *irp, IrInstSrcIntToPtr *instruction) {
1637 fprintf(irp->f, "@intToPtr(");2077 fprintf(irp->f, "@intToPtr(");
1638 if (instruction->dest_type == nullptr) {2078 ir_print_other_inst_src(irp, instruction->dest_type);
1639 fprintf(irp->f, "(null)");
1640 } else {
1641 ir_print_other_instruction(irp, instruction->dest_type);
1642 }
1643 fprintf(irp->f, ",");2079 fprintf(irp->f, ",");
1644 ir_print_other_instruction(irp, instruction->target);2080 ir_print_other_inst_src(irp, instruction->target);
1645 fprintf(irp->f, ")");2081 fprintf(irp->f, ")");
1646}2082}
16472083
1648static void ir_print_int_to_enum(IrPrint *irp, IrInstructionIntToEnum *instruction) {2084static void ir_print_int_to_ptr(IrPrintGen *irp, IrInstGenIntToPtr *instruction) {
2085 fprintf(irp->f, "@intToPtr(");
2086 ir_print_other_inst_gen(irp, instruction->target);
2087 fprintf(irp->f, ")");
2088}
2089
2090static void ir_print_int_to_enum(IrPrintSrc *irp, IrInstSrcIntToEnum *instruction) {
1649 fprintf(irp->f, "@intToEnum(");2091 fprintf(irp->f, "@intToEnum(");
1650 if (instruction->dest_type == nullptr) {2092 ir_print_other_inst_src(irp, instruction->dest_type);
1651 fprintf(irp->f, "(null)");2093 fprintf(irp->f, ",");
1652 } else {2094 ir_print_other_inst_src(irp, instruction->target);
1653 ir_print_other_instruction(irp, instruction->dest_type);
1654 }
1655 ir_print_other_instruction(irp, instruction->target);
1656 fprintf(irp->f, ")");2095 fprintf(irp->f, ")");
1657}2096}
16582097
1659static void ir_print_enum_to_int(IrPrint *irp, IrInstructionEnumToInt *instruction) {2098static void ir_print_int_to_enum(IrPrintGen *irp, IrInstGenIntToEnum *instruction) {
2099 fprintf(irp->f, "@intToEnum(");
2100 ir_print_other_inst_gen(irp, instruction->target);
2101 fprintf(irp->f, ")");
2102}
2103
2104static void ir_print_enum_to_int(IrPrintSrc *irp, IrInstSrcEnumToInt *instruction) {
1660 fprintf(irp->f, "@enumToInt(");2105 fprintf(irp->f, "@enumToInt(");
1661 ir_print_other_instruction(irp, instruction->target);2106 ir_print_other_inst_src(irp, instruction->target);
1662 fprintf(irp->f, ")");2107 fprintf(irp->f, ")");
1663}2108}
16642109
1665static void ir_print_check_runtime_scope(IrPrint *irp, IrInstructionCheckRuntimeScope *instruction) {2110static void ir_print_check_runtime_scope(IrPrintSrc *irp, IrInstSrcCheckRuntimeScope *instruction) {
1666 fprintf(irp->f, "@checkRuntimeScope(");2111 fprintf(irp->f, "@checkRuntimeScope(");
1667 ir_print_other_instruction(irp, instruction->scope_is_comptime);2112 ir_print_other_inst_src(irp, instruction->scope_is_comptime);
1668 fprintf(irp->f, ",");2113 fprintf(irp->f, ",");
1669 ir_print_other_instruction(irp, instruction->is_comptime);2114 ir_print_other_inst_src(irp, instruction->is_comptime);
1670 fprintf(irp->f, ")");2115 fprintf(irp->f, ")");
1671}2116}
16722117
1673static void ir_print_array_to_vector(IrPrint *irp, IrInstructionArrayToVector *instruction) {2118static void ir_print_array_to_vector(IrPrintGen *irp, IrInstGenArrayToVector *instruction) {
1674 fprintf(irp->f, "ArrayToVector(");2119 fprintf(irp->f, "ArrayToVector(");
1675 ir_print_other_instruction(irp, instruction->array);2120 ir_print_other_inst_gen(irp, instruction->array);
1676 fprintf(irp->f, ")");2121 fprintf(irp->f, ")");
1677}2122}
16782123
1679static void ir_print_vector_to_array(IrPrint *irp, IrInstructionVectorToArray *instruction) {2124static void ir_print_vector_to_array(IrPrintGen *irp, IrInstGenVectorToArray *instruction) {
1680 fprintf(irp->f, "VectorToArray(");2125 fprintf(irp->f, "VectorToArray(");
1681 ir_print_other_instruction(irp, instruction->vector);2126 ir_print_other_inst_gen(irp, instruction->vector);
1682 fprintf(irp->f, ")result=");2127 fprintf(irp->f, ")result=");
1683 ir_print_other_instruction(irp, instruction->result_loc);2128 ir_print_other_inst_gen(irp, instruction->result_loc);
1684}2129}
16852130
1686static void ir_print_ptr_of_array_to_slice(IrPrint *irp, IrInstructionPtrOfArrayToSlice *instruction) {2131static void ir_print_ptr_of_array_to_slice(IrPrintGen *irp, IrInstGenPtrOfArrayToSlice *instruction) {
1687 fprintf(irp->f, "PtrOfArrayToSlice(");2132 fprintf(irp->f, "PtrOfArrayToSlice(");
1688 ir_print_other_instruction(irp, instruction->operand);2133 ir_print_other_inst_gen(irp, instruction->operand);
1689 fprintf(irp->f, ")result=");2134 fprintf(irp->f, ")result=");
1690 ir_print_other_instruction(irp, instruction->result_loc);2135 ir_print_other_inst_gen(irp, instruction->result_loc);
1691}2136}
16922137
1693static void ir_print_assert_zero(IrPrint *irp, IrInstructionAssertZero *instruction) {2138static void ir_print_assert_zero(IrPrintGen *irp, IrInstGenAssertZero *instruction) {
1694 fprintf(irp->f, "AssertZero(");2139 fprintf(irp->f, "AssertZero(");
1695 ir_print_other_instruction(irp, instruction->target);2140 ir_print_other_inst_gen(irp, instruction->target);
1696 fprintf(irp->f, ")");2141 fprintf(irp->f, ")");
1697}2142}
16982143
1699static void ir_print_assert_non_null(IrPrint *irp, IrInstructionAssertNonNull *instruction) {2144static void ir_print_assert_non_null(IrPrintGen *irp, IrInstGenAssertNonNull *instruction) {
1700 fprintf(irp->f, "AssertNonNull(");2145 fprintf(irp->f, "AssertNonNull(");
1701 ir_print_other_instruction(irp, instruction->target);2146 ir_print_other_inst_gen(irp, instruction->target);
1702 fprintf(irp->f, ")");2147 fprintf(irp->f, ")");
1703}2148}
17042149
1705static void ir_print_resize_slice(IrPrint *irp, IrInstructionResizeSlice *instruction) {2150static void ir_print_resize_slice(IrPrintGen *irp, IrInstGenResizeSlice *instruction) {
1706 fprintf(irp->f, "@resizeSlice(");2151 fprintf(irp->f, "@resizeSlice(");
1707 ir_print_other_instruction(irp, instruction->operand);2152 ir_print_other_inst_gen(irp, instruction->operand);
1708 fprintf(irp->f, ")result=");2153 fprintf(irp->f, ")result=");
1709 ir_print_other_instruction(irp, instruction->result_loc);2154 ir_print_other_inst_gen(irp, instruction->result_loc);
1710}2155}
17112156
1712static void ir_print_alloca_src(IrPrint *irp, IrInstructionAllocaSrc *instruction) {2157static void ir_print_alloca_src(IrPrintSrc *irp, IrInstSrcAlloca *instruction) {
1713 fprintf(irp->f, "Alloca(align=");2158 fprintf(irp->f, "Alloca(align=");
1714 ir_print_other_instruction(irp, instruction->align);2159 ir_print_other_inst_src(irp, instruction->align);
1715 fprintf(irp->f, ",name=%s)", instruction->name_hint);2160 fprintf(irp->f, ",name=%s)", instruction->name_hint);
1716}2161}
17172162
1718static void ir_print_alloca_gen(IrPrint *irp, IrInstructionAllocaGen *instruction) {2163static void ir_print_alloca_gen(IrPrintGen *irp, IrInstGenAlloca *instruction) {
1719 fprintf(irp->f, "Alloca(align=%" PRIu32 ",name=%s)", instruction->align, instruction->name_hint);2164 fprintf(irp->f, "Alloca(align=%" PRIu32 ",name=%s)", instruction->align, instruction->name_hint);
1720}2165}
17212166
1722static void ir_print_end_expr(IrPrint *irp, IrInstructionEndExpr *instruction) {2167static void ir_print_end_expr(IrPrintSrc *irp, IrInstSrcEndExpr *instruction) {
1723 fprintf(irp->f, "EndExpr(result=");2168 fprintf(irp->f, "EndExpr(result=");
1724 ir_print_result_loc(irp, instruction->result_loc);2169 ir_print_result_loc(irp, instruction->result_loc);
1725 fprintf(irp->f, ",value=");2170 fprintf(irp->f, ",value=");
1726 ir_print_other_instruction(irp, instruction->value);2171 ir_print_other_inst_src(irp, instruction->value);
1727 fprintf(irp->f, ")");2172 fprintf(irp->f, ")");
1728}2173}
17292174
1730static void ir_print_int_to_err(IrPrint *irp, IrInstructionIntToErr *instruction) {2175static void ir_print_int_to_err(IrPrintSrc *irp, IrInstSrcIntToErr *instruction) {
1731 fprintf(irp->f, "inttoerr ");2176 fprintf(irp->f, "inttoerr ");
1732 ir_print_other_instruction(irp, instruction->target);2177 ir_print_other_inst_src(irp, instruction->target);
1733}2178}
17342179
1735static void ir_print_err_to_int(IrPrint *irp, IrInstructionErrToInt *instruction) {2180static void ir_print_int_to_err(IrPrintGen *irp, IrInstGenIntToErr *instruction) {
2181 fprintf(irp->f, "inttoerr ");
2182 ir_print_other_inst_gen(irp, instruction->target);
2183}
2184
2185static void ir_print_err_to_int(IrPrintSrc *irp, IrInstSrcErrToInt *instruction) {
2186 fprintf(irp->f, "errtoint ");
2187 ir_print_other_inst_src(irp, instruction->target);
2188}
2189
2190static void ir_print_err_to_int(IrPrintGen *irp, IrInstGenErrToInt *instruction) {
1736 fprintf(irp->f, "errtoint ");2191 fprintf(irp->f, "errtoint ");
1737 ir_print_other_instruction(irp, instruction->target);2192 ir_print_other_inst_gen(irp, instruction->target);
1738}2193}
17392194
1740static void ir_print_check_switch_prongs(IrPrint *irp, IrInstructionCheckSwitchProngs *instruction) {2195static void ir_print_check_switch_prongs(IrPrintSrc *irp, IrInstSrcCheckSwitchProngs *instruction) {
1741 fprintf(irp->f, "@checkSwitchProngs(");2196 fprintf(irp->f, "@checkSwitchProngs(");
1742 ir_print_other_instruction(irp, instruction->target_value);2197 ir_print_other_inst_src(irp, instruction->target_value);
1743 fprintf(irp->f, ",");2198 fprintf(irp->f, ",");
1744 for (size_t i = 0; i < instruction->range_count; i += 1) {2199 for (size_t i = 0; i < instruction->range_count; i += 1) {
1745 if (i != 0)2200 if (i != 0)
1746 fprintf(irp->f, ",");2201 fprintf(irp->f, ",");
1747 ir_print_other_instruction(irp, instruction->ranges[i].start);2202 ir_print_other_inst_src(irp, instruction->ranges[i].start);
1748 fprintf(irp->f, "...");2203 fprintf(irp->f, "...");
1749 ir_print_other_instruction(irp, instruction->ranges[i].end);2204 ir_print_other_inst_src(irp, instruction->ranges[i].end);
1750 }2205 }
1751 const char *have_else_str = instruction->have_else_prong ? "yes" : "no";2206 const char *have_else_str = instruction->have_else_prong ? "yes" : "no";
1752 fprintf(irp->f, ")else:%s", have_else_str);2207 fprintf(irp->f, ")else:%s", have_else_str);
1753}2208}
17542209
1755static void ir_print_check_statement_is_void(IrPrint *irp, IrInstructionCheckStatementIsVoid *instruction) {2210static void ir_print_check_statement_is_void(IrPrintSrc *irp, IrInstSrcCheckStatementIsVoid *instruction) {
1756 fprintf(irp->f, "@checkStatementIsVoid(");2211 fprintf(irp->f, "@checkStatementIsVoid(");
1757 ir_print_other_instruction(irp, instruction->statement_value);2212 ir_print_other_inst_src(irp, instruction->statement_value);
1758 fprintf(irp->f, ")");2213 fprintf(irp->f, ")");
1759}2214}
17602215
1761static void ir_print_type_name(IrPrint *irp, IrInstructionTypeName *instruction) {2216static void ir_print_type_name(IrPrintSrc *irp, IrInstSrcTypeName *instruction) {
1762 fprintf(irp->f, "typename ");2217 fprintf(irp->f, "typename ");
1763 ir_print_other_instruction(irp, instruction->type_value);2218 ir_print_other_inst_src(irp, instruction->type_value);
2219}
2220
2221static void ir_print_tag_name(IrPrintSrc *irp, IrInstSrcTagName *instruction) {
2222 fprintf(irp->f, "tagname ");
2223 ir_print_other_inst_src(irp, instruction->target);
1764}2224}
17652225
1766static void ir_print_tag_name(IrPrint *irp, IrInstructionTagName *instruction) {2226static void ir_print_tag_name(IrPrintGen *irp, IrInstGenTagName *instruction) {
1767 fprintf(irp->f, "tagname ");2227 fprintf(irp->f, "tagname ");
1768 ir_print_other_instruction(irp, instruction->target);2228 ir_print_other_inst_gen(irp, instruction->target);
1769}2229}
17702230
1771static void ir_print_ptr_type(IrPrint *irp, IrInstructionPtrType *instruction) {2231static void ir_print_ptr_type(IrPrintSrc *irp, IrInstSrcPtrType *instruction) {
1772 fprintf(irp->f, "&");2232 fprintf(irp->f, "&");
1773 if (instruction->align_value != nullptr) {2233 if (instruction->align_value != nullptr) {
1774 fprintf(irp->f, "align(");2234 fprintf(irp->f, "align(");
1775 ir_print_other_instruction(irp, instruction->align_value);2235 ir_print_other_inst_src(irp, instruction->align_value);
1776 fprintf(irp->f, ")");2236 fprintf(irp->f, ")");
1777 }2237 }
1778 const char *const_str = instruction->is_const ? "const " : "";2238 const char *const_str = instruction->is_const ? "const " : "";
1779 const char *volatile_str = instruction->is_volatile ? "volatile " : "";2239 const char *volatile_str = instruction->is_volatile ? "volatile " : "";
1780 fprintf(irp->f, ":%" PRIu32 ":%" PRIu32 " %s%s", instruction->bit_offset_start, instruction->host_int_bytes,2240 fprintf(irp->f, ":%" PRIu32 ":%" PRIu32 " %s%s", instruction->bit_offset_start, instruction->host_int_bytes,
1781 const_str, volatile_str);2241 const_str, volatile_str);
1782 ir_print_other_instruction(irp, instruction->child_type);2242 ir_print_other_inst_src(irp, instruction->child_type);
1783}2243}
17842244
1785static void ir_print_decl_ref(IrPrint *irp, IrInstructionDeclRef *instruction) {2245static void ir_print_decl_ref(IrPrintSrc *irp, IrInstSrcDeclRef *instruction) {
1786 const char *ptr_str = (instruction->lval == LValPtr) ? "ptr " : "";2246 const char *ptr_str = (instruction->lval == LValPtr) ? "ptr " : "";
1787 fprintf(irp->f, "declref %s%s", ptr_str, buf_ptr(instruction->tld->name));2247 fprintf(irp->f, "declref %s%s", ptr_str, buf_ptr(instruction->tld->name));
1788}2248}
17892249
1790static void ir_print_panic(IrPrint *irp, IrInstructionPanic *instruction) {2250static void ir_print_panic(IrPrintSrc *irp, IrInstSrcPanic *instruction) {
1791 fprintf(irp->f, "@panic(");2251 fprintf(irp->f, "@panic(");
1792 ir_print_other_instruction(irp, instruction->msg);2252 ir_print_other_inst_src(irp, instruction->msg);
1793 fprintf(irp->f, ")");2253 fprintf(irp->f, ")");
1794}2254}
17952255
1796static void ir_print_field_parent_ptr(IrPrint *irp, IrInstructionFieldParentPtr *instruction) {2256static void ir_print_panic(IrPrintGen *irp, IrInstGenPanic *instruction) {
2257 fprintf(irp->f, "@panic(");
2258 ir_print_other_inst_gen(irp, instruction->msg);
2259 fprintf(irp->f, ")");
2260}
2261
2262static void ir_print_field_parent_ptr(IrPrintSrc *irp, IrInstSrcFieldParentPtr *instruction) {
1797 fprintf(irp->f, "@fieldParentPtr(");2263 fprintf(irp->f, "@fieldParentPtr(");
1798 ir_print_other_instruction(irp, instruction->type_value);2264 ir_print_other_inst_src(irp, instruction->type_value);
1799 fprintf(irp->f, ",");2265 fprintf(irp->f, ",");
1800 ir_print_other_instruction(irp, instruction->field_name);2266 ir_print_other_inst_src(irp, instruction->field_name);
1801 fprintf(irp->f, ",");2267 fprintf(irp->f, ",");
1802 ir_print_other_instruction(irp, instruction->field_ptr);2268 ir_print_other_inst_src(irp, instruction->field_ptr);
1803 fprintf(irp->f, ")");2269 fprintf(irp->f, ")");
1804}2270}
18052271
1806static void ir_print_byte_offset_of(IrPrint *irp, IrInstructionByteOffsetOf *instruction) {2272static void ir_print_field_parent_ptr(IrPrintGen *irp, IrInstGenFieldParentPtr *instruction) {
2273 fprintf(irp->f, "@fieldParentPtr(%s,", buf_ptr(instruction->field->name));
2274 ir_print_other_inst_gen(irp, instruction->field_ptr);
2275 fprintf(irp->f, ")");
2276}
2277
2278static void ir_print_byte_offset_of(IrPrintSrc *irp, IrInstSrcByteOffsetOf *instruction) {
1807 fprintf(irp->f, "@byte_offset_of(");2279 fprintf(irp->f, "@byte_offset_of(");
1808 ir_print_other_instruction(irp, instruction->type_value);2280 ir_print_other_inst_src(irp, instruction->type_value);
1809 fprintf(irp->f, ",");2281 fprintf(irp->f, ",");
1810 ir_print_other_instruction(irp, instruction->field_name);2282 ir_print_other_inst_src(irp, instruction->field_name);
1811 fprintf(irp->f, ")");2283 fprintf(irp->f, ")");
1812}2284}
18132285
1814static void ir_print_bit_offset_of(IrPrint *irp, IrInstructionBitOffsetOf *instruction) {2286static void ir_print_bit_offset_of(IrPrintSrc *irp, IrInstSrcBitOffsetOf *instruction) {
1815 fprintf(irp->f, "@bit_offset_of(");2287 fprintf(irp->f, "@bit_offset_of(");
1816 ir_print_other_instruction(irp, instruction->type_value);2288 ir_print_other_inst_src(irp, instruction->type_value);
1817 fprintf(irp->f, ",");2289 fprintf(irp->f, ",");
1818 ir_print_other_instruction(irp, instruction->field_name);2290 ir_print_other_inst_src(irp, instruction->field_name);
1819 fprintf(irp->f, ")");2291 fprintf(irp->f, ")");
1820}2292}
18212293
1822static void ir_print_type_info(IrPrint *irp, IrInstructionTypeInfo *instruction) {2294static void ir_print_type_info(IrPrintSrc *irp, IrInstSrcTypeInfo *instruction) {
1823 fprintf(irp->f, "@typeInfo(");2295 fprintf(irp->f, "@typeInfo(");
1824 ir_print_other_instruction(irp, instruction->type_value);2296 ir_print_other_inst_src(irp, instruction->type_value);
1825 fprintf(irp->f, ")");2297 fprintf(irp->f, ")");
1826}2298}
18272299
1828static void ir_print_type(IrPrint *irp, IrInstructionType *instruction) {2300static void ir_print_type(IrPrintSrc *irp, IrInstSrcType *instruction) {
1829 fprintf(irp->f, "@Type(");2301 fprintf(irp->f, "@Type(");
1830 ir_print_other_instruction(irp, instruction->type_info);2302 ir_print_other_inst_src(irp, instruction->type_info);
1831 fprintf(irp->f, ")");2303 fprintf(irp->f, ")");
1832}2304}
18332305
1834static void ir_print_has_field(IrPrint *irp, IrInstructionHasField *instruction) {2306static void ir_print_has_field(IrPrintSrc *irp, IrInstSrcHasField *instruction) {
1835 fprintf(irp->f, "@hasField(");2307 fprintf(irp->f, "@hasField(");
1836 ir_print_other_instruction(irp, instruction->container_type);2308 ir_print_other_inst_src(irp, instruction->container_type);
1837 fprintf(irp->f, ",");2309 fprintf(irp->f, ",");
1838 ir_print_other_instruction(irp, instruction->field_name);2310 ir_print_other_inst_src(irp, instruction->field_name);
1839 fprintf(irp->f, ")");2311 fprintf(irp->f, ")");
1840}2312}
18412313
1842static void ir_print_type_id(IrPrint *irp, IrInstructionTypeId *instruction) {2314static void ir_print_type_id(IrPrintSrc *irp, IrInstSrcTypeId *instruction) {
1843 fprintf(irp->f, "@typeId(");2315 fprintf(irp->f, "@typeId(");
1844 ir_print_other_instruction(irp, instruction->type_value);2316 ir_print_other_inst_src(irp, instruction->type_value);
1845 fprintf(irp->f, ")");2317 fprintf(irp->f, ")");
1846}2318}
18472319
1848static void ir_print_set_eval_branch_quota(IrPrint *irp, IrInstructionSetEvalBranchQuota *instruction) {2320static void ir_print_set_eval_branch_quota(IrPrintSrc *irp, IrInstSrcSetEvalBranchQuota *instruction) {
1849 fprintf(irp->f, "@setEvalBranchQuota(");2321 fprintf(irp->f, "@setEvalBranchQuota(");
1850 ir_print_other_instruction(irp, instruction->new_quota);2322 ir_print_other_inst_src(irp, instruction->new_quota);
1851 fprintf(irp->f, ")");2323 fprintf(irp->f, ")");
1852}2324}
18532325
1854static void ir_print_align_cast(IrPrint *irp, IrInstructionAlignCast *instruction) {2326static void ir_print_align_cast(IrPrintSrc *irp, IrInstSrcAlignCast *instruction) {
1855 fprintf(irp->f, "@alignCast(");2327 fprintf(irp->f, "@alignCast(");
1856 if (instruction->align_bytes == nullptr) {2328 ir_print_other_inst_src(irp, instruction->align_bytes);
1857 fprintf(irp->f, "null");
1858 } else {
1859 ir_print_other_instruction(irp, instruction->align_bytes);
1860 }
1861 fprintf(irp->f, ",");2329 fprintf(irp->f, ",");
1862 ir_print_other_instruction(irp, instruction->target);2330 ir_print_other_inst_src(irp, instruction->target);
2331 fprintf(irp->f, ")");
2332}
2333
2334static void ir_print_align_cast(IrPrintGen *irp, IrInstGenAlignCast *instruction) {
2335 fprintf(irp->f, "@alignCast(");
2336 ir_print_other_inst_gen(irp, instruction->target);
1863 fprintf(irp->f, ")");2337 fprintf(irp->f, ")");
1864}2338}
18652339
1866static void ir_print_resolve_result(IrPrint *irp, IrInstructionResolveResult *instruction) {2340static void ir_print_resolve_result(IrPrintSrc *irp, IrInstSrcResolveResult *instruction) {
1867 fprintf(irp->f, "ResolveResult(");2341 fprintf(irp->f, "ResolveResult(");
1868 ir_print_result_loc(irp, instruction->result_loc);2342 ir_print_result_loc(irp, instruction->result_loc);
1869 fprintf(irp->f, ")");2343 fprintf(irp->f, ")");
1870}2344}
18712345
1872static void ir_print_reset_result(IrPrint *irp, IrInstructionResetResult *instruction) {2346static void ir_print_reset_result(IrPrintSrc *irp, IrInstSrcResetResult *instruction) {
1873 fprintf(irp->f, "ResetResult(");2347 fprintf(irp->f, "ResetResult(");
1874 ir_print_result_loc(irp, instruction->result_loc);2348 ir_print_result_loc(irp, instruction->result_loc);
1875 fprintf(irp->f, ")");2349 fprintf(irp->f, ")");
1876}2350}
18772351
1878static void ir_print_opaque_type(IrPrint *irp, IrInstructionOpaqueType *instruction) {2352static void ir_print_opaque_type(IrPrintSrc *irp, IrInstSrcOpaqueType *instruction) {
1879 fprintf(irp->f, "@OpaqueType()");2353 fprintf(irp->f, "@OpaqueType()");
1880}2354}
18812355
1882static void ir_print_set_align_stack(IrPrint *irp, IrInstructionSetAlignStack *instruction) {2356static void ir_print_set_align_stack(IrPrintSrc *irp, IrInstSrcSetAlignStack *instruction) {
1883 fprintf(irp->f, "@setAlignStack(");2357 fprintf(irp->f, "@setAlignStack(");
1884 ir_print_other_instruction(irp, instruction->align_bytes);2358 ir_print_other_inst_src(irp, instruction->align_bytes);
1885 fprintf(irp->f, ")");2359 fprintf(irp->f, ")");
1886}2360}
18872361
1888static void ir_print_arg_type(IrPrint *irp, IrInstructionArgType *instruction) {2362static void ir_print_arg_type(IrPrintSrc *irp, IrInstSrcArgType *instruction) {
1889 fprintf(irp->f, "@ArgType(");2363 fprintf(irp->f, "@ArgType(");
1890 ir_print_other_instruction(irp, instruction->fn_type);2364 ir_print_other_inst_src(irp, instruction->fn_type);
1891 fprintf(irp->f, ",");2365 fprintf(irp->f, ",");
1892 ir_print_other_instruction(irp, instruction->arg_index);2366 ir_print_other_inst_src(irp, instruction->arg_index);
1893 fprintf(irp->f, ")");2367 fprintf(irp->f, ")");
1894}2368}
18952369
1896static void ir_print_enum_tag_type(IrPrint *irp, IrInstructionTagType *instruction) {2370static void ir_print_enum_tag_type(IrPrintSrc *irp, IrInstSrcTagType *instruction) {
1897 fprintf(irp->f, "@TagType(");2371 fprintf(irp->f, "@TagType(");
1898 ir_print_other_instruction(irp, instruction->target);2372 ir_print_other_inst_src(irp, instruction->target);
1899 fprintf(irp->f, ")");2373 fprintf(irp->f, ")");
1900}2374}
19012375
1902static void ir_print_export(IrPrint *irp, IrInstructionExport *instruction) {2376static void ir_print_export(IrPrintSrc *irp, IrInstSrcExport *instruction) {
1903 fprintf(irp->f, "@export(");2377 fprintf(irp->f, "@export(");
1904 ir_print_other_instruction(irp, instruction->target);2378 ir_print_other_inst_src(irp, instruction->target);
1905 fprintf(irp->f, ",");2379 fprintf(irp->f, ",");
1906 ir_print_other_instruction(irp, instruction->options);2380 ir_print_other_inst_src(irp, instruction->options);
2381 fprintf(irp->f, ")");
2382}
2383
2384static void ir_print_error_return_trace(IrPrintSrc *irp, IrInstSrcErrorReturnTrace *instruction) {
2385 fprintf(irp->f, "@errorReturnTrace(");
2386 switch (instruction->optional) {
2387 case IrInstErrorReturnTraceNull:
2388 fprintf(irp->f, "Null");
2389 break;
2390 case IrInstErrorReturnTraceNonNull:
2391 fprintf(irp->f, "NonNull");
2392 break;
2393 }
1907 fprintf(irp->f, ")");2394 fprintf(irp->f, ")");
1908}2395}
19092396
1910static void ir_print_error_return_trace(IrPrint *irp, IrInstructionErrorReturnTrace *instruction) {2397static void ir_print_error_return_trace(IrPrintGen *irp, IrInstGenErrorReturnTrace *instruction) {
1911 fprintf(irp->f, "@errorReturnTrace(");2398 fprintf(irp->f, "@errorReturnTrace(");
1912 switch (instruction->optional) {2399 switch (instruction->optional) {
1913 case IrInstructionErrorReturnTrace::Null:2400 case IrInstErrorReturnTraceNull:
1914 fprintf(irp->f, "Null");2401 fprintf(irp->f, "Null");
1915 break;2402 break;
1916 case IrInstructionErrorReturnTrace::NonNull:2403 case IrInstErrorReturnTraceNonNull:
1917 fprintf(irp->f, "NonNull");2404 fprintf(irp->f, "NonNull");
1918 break;2405 break;
1919 }2406 }
1920 fprintf(irp->f, ")");2407 fprintf(irp->f, ")");
1921}2408}
19222409
1923static void ir_print_error_union(IrPrint *irp, IrInstructionErrorUnion *instruction) {2410static void ir_print_error_union(IrPrintSrc *irp, IrInstSrcErrorUnion *instruction) {
1924 ir_print_other_instruction(irp, instruction->err_set);2411 ir_print_other_inst_src(irp, instruction->err_set);
1925 fprintf(irp->f, "!");2412 fprintf(irp->f, "!");
1926 ir_print_other_instruction(irp, instruction->payload);2413 ir_print_other_inst_src(irp, instruction->payload);
1927}2414}
19282415
1929static void ir_print_atomic_rmw(IrPrint *irp, IrInstructionAtomicRmw *instruction) {2416static void ir_print_atomic_rmw(IrPrintSrc *irp, IrInstSrcAtomicRmw *instruction) {
1930 fprintf(irp->f, "@atomicRmw(");2417 fprintf(irp->f, "@atomicRmw(");
1931 if (instruction->operand_type != nullptr) {2418 ir_print_other_inst_src(irp, instruction->operand_type);
1932 ir_print_other_instruction(irp, instruction->operand_type);
1933 } else {
1934 fprintf(irp->f, "[TODO print]");
1935 }
1936 fprintf(irp->f, ",");2419 fprintf(irp->f, ",");
1937 ir_print_other_instruction(irp, instruction->ptr);2420 ir_print_other_inst_src(irp, instruction->ptr);
1938 fprintf(irp->f, ",");2421 fprintf(irp->f, ",");
1939 if (instruction->op != nullptr) {2422 ir_print_other_inst_src(irp, instruction->op);
1940 ir_print_other_instruction(irp, instruction->op);
1941 } else {
1942 fprintf(irp->f, "[TODO print]");
1943 }
1944 fprintf(irp->f, ",");2423 fprintf(irp->f, ",");
1945 ir_print_other_instruction(irp, instruction->operand);2424 ir_print_other_inst_src(irp, instruction->operand);
1946 fprintf(irp->f, ",");2425 fprintf(irp->f, ",");
1947 if (instruction->ordering != nullptr) {2426 ir_print_other_inst_src(irp, instruction->ordering);
1948 ir_print_other_instruction(irp, instruction->ordering);
1949 } else {
1950 fprintf(irp->f, "[TODO print]");
1951 }
1952 fprintf(irp->f, ")");2427 fprintf(irp->f, ")");
1953}2428}
19542429
1955static void ir_print_atomic_load(IrPrint *irp, IrInstructionAtomicLoad *instruction) {2430static void ir_print_atomic_rmw(IrPrintGen *irp, IrInstGenAtomicRmw *instruction) {
2431 fprintf(irp->f, "@atomicRmw(");
2432 ir_print_other_inst_gen(irp, instruction->ptr);
2433 fprintf(irp->f, ",[TODO print op],");
2434 ir_print_other_inst_gen(irp, instruction->operand);
2435 fprintf(irp->f, ",%s)", atomic_order_str(instruction->ordering));
2436}
2437
2438static void ir_print_atomic_load(IrPrintSrc *irp, IrInstSrcAtomicLoad *instruction) {
1956 fprintf(irp->f, "@atomicLoad(");2439 fprintf(irp->f, "@atomicLoad(");
1957 if (instruction->operand_type != nullptr) {2440 ir_print_other_inst_src(irp, instruction->operand_type);
1958 ir_print_other_instruction(irp, instruction->operand_type);
1959 } else {
1960 fprintf(irp->f, "[TODO print]");
1961 }
1962 fprintf(irp->f, ",");2441 fprintf(irp->f, ",");
1963 ir_print_other_instruction(irp, instruction->ptr);2442 ir_print_other_inst_src(irp, instruction->ptr);
1964 fprintf(irp->f, ",");2443 fprintf(irp->f, ",");
1965 if (instruction->ordering != nullptr) {2444 ir_print_other_inst_src(irp, instruction->ordering);
1966 ir_print_other_instruction(irp, instruction->ordering);
1967 } else {
1968 fprintf(irp->f, "[TODO print]");
1969 }
1970 fprintf(irp->f, ")");2445 fprintf(irp->f, ")");
1971}2446}
19722447
1973static void ir_print_atomic_store(IrPrint *irp, IrInstructionAtomicStore *instruction) {2448static void ir_print_atomic_load(IrPrintGen *irp, IrInstGenAtomicLoad *instruction) {
2449 fprintf(irp->f, "@atomicLoad(");
2450 ir_print_other_inst_gen(irp, instruction->ptr);
2451 fprintf(irp->f, ",%s)", atomic_order_str(instruction->ordering));
2452}
2453
2454static void ir_print_atomic_store(IrPrintSrc *irp, IrInstSrcAtomicStore *instruction) {
1974 fprintf(irp->f, "@atomicStore(");2455 fprintf(irp->f, "@atomicStore(");
1975 if (instruction->operand_type != nullptr) {2456 ir_print_other_inst_src(irp, instruction->operand_type);
1976 ir_print_other_instruction(irp, instruction->operand_type);
1977 } else {
1978 fprintf(irp->f, "[TODO print]");
1979 }
1980 fprintf(irp->f, ",");2457 fprintf(irp->f, ",");
1981 ir_print_other_instruction(irp, instruction->ptr);2458 ir_print_other_inst_src(irp, instruction->ptr);
1982 fprintf(irp->f, ",");2459 fprintf(irp->f, ",");
1983 ir_print_other_instruction(irp, instruction->value);2460 ir_print_other_inst_src(irp, instruction->value);
1984 fprintf(irp->f, ",");2461 fprintf(irp->f, ",");
1985 if (instruction->ordering != nullptr) {2462 ir_print_other_inst_src(irp, instruction->ordering);
1986 ir_print_other_instruction(irp, instruction->ordering);
1987 } else {
1988 fprintf(irp->f, "[TODO print]");
1989 }
1990 fprintf(irp->f, ")");2463 fprintf(irp->f, ")");
1991}2464}
19922465
2466static void ir_print_atomic_store(IrPrintGen *irp, IrInstGenAtomicStore *instruction) {
2467 fprintf(irp->f, "@atomicStore(");
2468 ir_print_other_inst_gen(irp, instruction->ptr);
2469 fprintf(irp->f, ",");
2470 ir_print_other_inst_gen(irp, instruction->value);
2471 fprintf(irp->f, ",%s)", atomic_order_str(instruction->ordering));
2472}
2473
2474
2475static void ir_print_save_err_ret_addr(IrPrintSrc *irp, IrInstSrcSaveErrRetAddr *instruction) {
2476 fprintf(irp->f, "@saveErrRetAddr()");
2477}
19932478
1994static void ir_print_save_err_ret_addr(IrPrint *irp, IrInstructionSaveErrRetAddr *instruction) {2479static void ir_print_save_err_ret_addr(IrPrintGen *irp, IrInstGenSaveErrRetAddr *instruction) {
1995 fprintf(irp->f, "@saveErrRetAddr()");2480 fprintf(irp->f, "@saveErrRetAddr()");
1996}2481}
19972482
1998static void ir_print_add_implicit_return_type(IrPrint *irp, IrInstructionAddImplicitReturnType *instruction) {2483static void ir_print_add_implicit_return_type(IrPrintSrc *irp, IrInstSrcAddImplicitReturnType *instruction) {
1999 fprintf(irp->f, "@addImplicitReturnType(");2484 fprintf(irp->f, "@addImplicitReturnType(");
2000 ir_print_other_instruction(irp, instruction->value);2485 ir_print_other_inst_src(irp, instruction->value);
2486 fprintf(irp->f, ")");
2487}
2488
2489static void ir_print_float_op(IrPrintSrc *irp, IrInstSrcFloatOp *instruction) {
2490 fprintf(irp->f, "@%s(", float_op_to_name(instruction->fn_id));
2491 ir_print_other_inst_src(irp, instruction->operand);
2001 fprintf(irp->f, ")");2492 fprintf(irp->f, ")");
2002}2493}
20032494
2004static void ir_print_float_op(IrPrint *irp, IrInstructionFloatOp *instruction) {2495static void ir_print_float_op(IrPrintGen *irp, IrInstGenFloatOp *instruction) {
2005 fprintf(irp->f, "@%s(", float_op_to_name(instruction->fn_id));2496 fprintf(irp->f, "@%s(", float_op_to_name(instruction->fn_id));
2006 ir_print_other_instruction(irp, instruction->operand);2497 ir_print_other_inst_gen(irp, instruction->operand);
2007 fprintf(irp->f, ")");2498 fprintf(irp->f, ")");
2008}2499}
20092500
2010static void ir_print_mul_add(IrPrint *irp, IrInstructionMulAdd *instruction) {2501static void ir_print_mul_add(IrPrintSrc *irp, IrInstSrcMulAdd *instruction) {
2011 fprintf(irp->f, "@mulAdd(");2502 fprintf(irp->f, "@mulAdd(");
2012 if (instruction->type_value != nullptr) {2503 ir_print_other_inst_src(irp, instruction->type_value);
2013 ir_print_other_instruction(irp, instruction->type_value);
2014 } else {
2015 fprintf(irp->f, "null");
2016 }
2017 fprintf(irp->f, ",");2504 fprintf(irp->f, ",");
2018 ir_print_other_instruction(irp, instruction->op1);2505 ir_print_other_inst_src(irp, instruction->op1);
2019 fprintf(irp->f, ",");2506 fprintf(irp->f, ",");
2020 ir_print_other_instruction(irp, instruction->op2);2507 ir_print_other_inst_src(irp, instruction->op2);
2021 fprintf(irp->f, ",");2508 fprintf(irp->f, ",");
2022 ir_print_other_instruction(irp, instruction->op3);2509 ir_print_other_inst_src(irp, instruction->op3);
2023 fprintf(irp->f, ")");2510 fprintf(irp->f, ")");
2024}2511}
20252512
2026static void ir_print_decl_var_gen(IrPrint *irp, IrInstructionDeclVarGen *decl_var_instruction) {2513static void ir_print_mul_add(IrPrintGen *irp, IrInstGenMulAdd *instruction) {
2514 fprintf(irp->f, "@mulAdd(");
2515 ir_print_other_inst_gen(irp, instruction->op1);
2516 fprintf(irp->f, ",");
2517 ir_print_other_inst_gen(irp, instruction->op2);
2518 fprintf(irp->f, ",");
2519 ir_print_other_inst_gen(irp, instruction->op3);
2520 fprintf(irp->f, ")");
2521}
2522
2523static void ir_print_decl_var_gen(IrPrintGen *irp, IrInstGenDeclVar *decl_var_instruction) {
2027 ZigVar *var = decl_var_instruction->var;2524 ZigVar *var = decl_var_instruction->var;
2028 const char *var_or_const = decl_var_instruction->var->gen_is_const ? "const" : "var";2525 const char *var_or_const = decl_var_instruction->var->gen_is_const ? "const" : "var";
2029 const char *name = decl_var_instruction->var->name;2526 const char *name = decl_var_instruction->var->name;
2030 fprintf(irp->f, "%s %s: %s align(%u) = ", var_or_const, name, buf_ptr(&var->var_type->name),2527 fprintf(irp->f, "%s %s: %s align(%u) = ", var_or_const, name, buf_ptr(&var->var_type->name),
2031 var->align_bytes);2528 var->align_bytes);
20322529
2033 ir_print_other_instruction(irp, decl_var_instruction->var_ptr);2530 ir_print_other_inst_gen(irp, decl_var_instruction->var_ptr);
2034 if (decl_var_instruction->var->is_comptime != nullptr) {
2035 fprintf(irp->f, " // comptime = ");
2036 ir_print_other_instruction(irp, decl_var_instruction->var->is_comptime);
2037 }
2038}2531}
20392532
2040static void ir_print_has_decl(IrPrint *irp, IrInstructionHasDecl *instruction) {2533static void ir_print_has_decl(IrPrintSrc *irp, IrInstSrcHasDecl *instruction) {
2041 fprintf(irp->f, "@hasDecl(");2534 fprintf(irp->f, "@hasDecl(");
2042 ir_print_other_instruction(irp, instruction->container);2535 ir_print_other_inst_src(irp, instruction->container);
2043 fprintf(irp->f, ",");2536 fprintf(irp->f, ",");
2044 ir_print_other_instruction(irp, instruction->name);2537 ir_print_other_inst_src(irp, instruction->name);
2045 fprintf(irp->f, ")");2538 fprintf(irp->f, ")");
2046}2539}
20472540
2048static void ir_print_undeclared_ident(IrPrint *irp, IrInstructionUndeclaredIdent *instruction) {2541static void ir_print_undeclared_ident(IrPrintSrc *irp, IrInstSrcUndeclaredIdent *instruction) {
2049 fprintf(irp->f, "@undeclaredIdent(%s)", buf_ptr(instruction->name));2542 fprintf(irp->f, "@undeclaredIdent(%s)", buf_ptr(instruction->name));
2050}2543}
20512544
2052static void ir_print_union_init_named_field(IrPrint *irp, IrInstructionUnionInitNamedField *instruction) {2545static void ir_print_union_init_named_field(IrPrintSrc *irp, IrInstSrcUnionInitNamedField *instruction) {
2053 fprintf(irp->f, "@unionInit(");2546 fprintf(irp->f, "@unionInit(");
2054 ir_print_other_instruction(irp, instruction->union_type);2547 ir_print_other_inst_src(irp, instruction->union_type);
2055 fprintf(irp->f, ", ");2548 fprintf(irp->f, ", ");
2056 ir_print_other_instruction(irp, instruction->field_name);2549 ir_print_other_inst_src(irp, instruction->field_name);
2057 fprintf(irp->f, ", ");2550 fprintf(irp->f, ", ");
2058 ir_print_other_instruction(irp, instruction->field_result_loc);2551 ir_print_other_inst_src(irp, instruction->field_result_loc);
2059 fprintf(irp->f, ", ");2552 fprintf(irp->f, ", ");
2060 ir_print_other_instruction(irp, instruction->result_loc);2553 ir_print_other_inst_src(irp, instruction->result_loc);
2061 fprintf(irp->f, ")");2554 fprintf(irp->f, ")");
2062}2555}
20632556
2064static void ir_print_suspend_begin(IrPrint *irp, IrInstructionSuspendBegin *instruction) {2557static void ir_print_suspend_begin(IrPrintSrc *irp, IrInstSrcSuspendBegin *instruction) {
2558 fprintf(irp->f, "@suspendBegin()");
2559}
2560
2561static void ir_print_suspend_begin(IrPrintGen *irp, IrInstGenSuspendBegin *instruction) {
2065 fprintf(irp->f, "@suspendBegin()");2562 fprintf(irp->f, "@suspendBegin()");
2066}2563}
20672564
2068static void ir_print_suspend_finish(IrPrint *irp, IrInstructionSuspendFinish *instruction) {2565static void ir_print_suspend_finish(IrPrintSrc *irp, IrInstSrcSuspendFinish *instruction) {
2566 fprintf(irp->f, "@suspendFinish()");
2567}
2568
2569static void ir_print_suspend_finish(IrPrintGen *irp, IrInstGenSuspendFinish *instruction) {
2069 fprintf(irp->f, "@suspendFinish()");2570 fprintf(irp->f, "@suspendFinish()");
2070}2571}
20712572
2072static void ir_print_resume(IrPrint *irp, IrInstructionResume *instruction) {2573static void ir_print_resume(IrPrintSrc *irp, IrInstSrcResume *instruction) {
2073 fprintf(irp->f, "resume ");2574 fprintf(irp->f, "resume ");
2074 ir_print_other_instruction(irp, instruction->frame);2575 ir_print_other_inst_src(irp, instruction->frame);
2075}2576}
20762577
2077static void ir_print_await_src(IrPrint *irp, IrInstructionAwaitSrc *instruction) {2578static void ir_print_resume(IrPrintGen *irp, IrInstGenResume *instruction) {
2579 fprintf(irp->f, "resume ");
2580 ir_print_other_inst_gen(irp, instruction->frame);
2581}
2582
2583static void ir_print_await_src(IrPrintSrc *irp, IrInstSrcAwait *instruction) {
2078 fprintf(irp->f, "@await(");2584 fprintf(irp->f, "@await(");
2079 ir_print_other_instruction(irp, instruction->frame);2585 ir_print_other_inst_src(irp, instruction->frame);
2080 fprintf(irp->f, ",");2586 fprintf(irp->f, ",");
2081 ir_print_result_loc(irp, instruction->result_loc);2587 ir_print_result_loc(irp, instruction->result_loc);
2082 fprintf(irp->f, ")");2588 fprintf(irp->f, ")");
2083}2589}
20842590
2085static void ir_print_await_gen(IrPrint *irp, IrInstructionAwaitGen *instruction) {2591static void ir_print_await_gen(IrPrintGen *irp, IrInstGenAwait *instruction) {
2086 fprintf(irp->f, "@await(");2592 fprintf(irp->f, "@await(");
2087 ir_print_other_instruction(irp, instruction->frame);2593 ir_print_other_inst_gen(irp, instruction->frame);
2088 fprintf(irp->f, ",");2594 fprintf(irp->f, ",");
2089 ir_print_other_instruction(irp, instruction->result_loc);2595 ir_print_other_inst_gen(irp, instruction->result_loc);
2596 fprintf(irp->f, ")");
2597}
2598
2599static void ir_print_spill_begin(IrPrintSrc *irp, IrInstSrcSpillBegin *instruction) {
2600 fprintf(irp->f, "@spillBegin(");
2601 ir_print_other_inst_src(irp, instruction->operand);
2090 fprintf(irp->f, ")");2602 fprintf(irp->f, ")");
2091}2603}
20922604
2093static void ir_print_spill_begin(IrPrint *irp, IrInstructionSpillBegin *instruction) {2605static void ir_print_spill_begin(IrPrintGen *irp, IrInstGenSpillBegin *instruction) {
2094 fprintf(irp->f, "@spillBegin(");2606 fprintf(irp->f, "@spillBegin(");
2095 ir_print_other_instruction(irp, instruction->operand);2607 ir_print_other_inst_gen(irp, instruction->operand);
2096 fprintf(irp->f, ")");2608 fprintf(irp->f, ")");
2097}2609}
20982610
2099static void ir_print_spill_end(IrPrint *irp, IrInstructionSpillEnd *instruction) {2611static void ir_print_spill_end(IrPrintSrc *irp, IrInstSrcSpillEnd *instruction) {
2100 fprintf(irp->f, "@spillEnd(");2612 fprintf(irp->f, "@spillEnd(");
2101 ir_print_other_instruction(irp, &instruction->begin->base);2613 ir_print_other_inst_src(irp, &instruction->begin->base);
2102 fprintf(irp->f, ")");2614 fprintf(irp->f, ")");
2103}2615}
21042616
2105static void ir_print_vector_extract_elem(IrPrint *irp, IrInstructionVectorExtractElem *instruction) {2617static void ir_print_spill_end(IrPrintGen *irp, IrInstGenSpillEnd *instruction) {
2618 fprintf(irp->f, "@spillEnd(");
2619 ir_print_other_inst_gen(irp, &instruction->begin->base);
2620 fprintf(irp->f, ")");
2621}
2622
2623static void ir_print_vector_extract_elem(IrPrintGen *irp, IrInstGenVectorExtractElem *instruction) {
2106 fprintf(irp->f, "@vectorExtractElem(");2624 fprintf(irp->f, "@vectorExtractElem(");
2107 ir_print_other_instruction(irp, instruction->vector);2625 ir_print_other_inst_gen(irp, instruction->vector);
2108 fprintf(irp->f, ",");2626 fprintf(irp->f, ",");
2109 ir_print_other_instruction(irp, instruction->index);2627 ir_print_other_inst_gen(irp, instruction->index);
2110 fprintf(irp->f, ")");2628 fprintf(irp->f, ")");
2111}2629}
21122630
2113static void ir_print_instruction(IrPrint *irp, IrInstruction *instruction, bool trailing) {2631static void ir_print_inst_src(IrPrintSrc *irp, IrInstSrc *instruction, bool trailing) {
2114 ir_print_prefix(irp, instruction, trailing);2632 ir_print_prefix_src(irp, instruction, trailing);
2115 switch (instruction->id) {2633 switch (instruction->id) {
2116 case IrInstructionIdInvalid:2634 case IrInstSrcIdInvalid:
2117 zig_unreachable();2635 zig_unreachable();
2118 case IrInstructionIdReturn:2636 case IrInstSrcIdReturn:
2119 ir_print_return(irp, (IrInstructionReturn *)instruction);2637 ir_print_return_src(irp, (IrInstSrcReturn *)instruction);
2638 break;
2639 case IrInstSrcIdConst:
2640 ir_print_const(irp, (IrInstSrcConst *)instruction);
2641 break;
2642 case IrInstSrcIdBinOp:
2643 ir_print_bin_op(irp, (IrInstSrcBinOp *)instruction);
2644 break;
2645 case IrInstSrcIdMergeErrSets:
2646 ir_print_merge_err_sets(irp, (IrInstSrcMergeErrSets *)instruction);
2647 break;
2648 case IrInstSrcIdDeclVar:
2649 ir_print_decl_var_src(irp, (IrInstSrcDeclVar *)instruction);
2650 break;
2651 case IrInstSrcIdCallExtra:
2652 ir_print_call_extra(irp, (IrInstSrcCallExtra *)instruction);
2653 break;
2654 case IrInstSrcIdCall:
2655 ir_print_call_src(irp, (IrInstSrcCall *)instruction);
2656 break;
2657 case IrInstSrcIdCallArgs:
2658 ir_print_call_args(irp, (IrInstSrcCallArgs *)instruction);
2659 break;
2660 case IrInstSrcIdUnOp:
2661 ir_print_un_op(irp, (IrInstSrcUnOp *)instruction);
2662 break;
2663 case IrInstSrcIdCondBr:
2664 ir_print_cond_br(irp, (IrInstSrcCondBr *)instruction);
2120 break;2665 break;
2121 case IrInstructionIdConst:2666 case IrInstSrcIdBr:
2122 ir_print_const(irp, (IrInstructionConst *)instruction);2667 ir_print_br(irp, (IrInstSrcBr *)instruction);
2123 break;2668 break;
2124 case IrInstructionIdBinOp:2669 case IrInstSrcIdPhi:
2125 ir_print_bin_op(irp, (IrInstructionBinOp *)instruction);2670 ir_print_phi(irp, (IrInstSrcPhi *)instruction);
2126 break;2671 break;
2127 case IrInstructionIdMergeErrSets:2672 case IrInstSrcIdContainerInitList:
2128 ir_print_merge_err_sets(irp, (IrInstructionMergeErrSets *)instruction);2673 ir_print_container_init_list(irp, (IrInstSrcContainerInitList *)instruction);
2129 break;2674 break;
2130 case IrInstructionIdDeclVarSrc:2675 case IrInstSrcIdContainerInitFields:
2131 ir_print_decl_var_src(irp, (IrInstructionDeclVarSrc *)instruction);2676 ir_print_container_init_fields(irp, (IrInstSrcContainerInitFields *)instruction);
2132 break;2677 break;
2133 case IrInstructionIdCast:2678 case IrInstSrcIdUnreachable:
2134 ir_print_cast(irp, (IrInstructionCast *)instruction);2679 ir_print_unreachable(irp, (IrInstSrcUnreachable *)instruction);
2135 break;2680 break;
2136 case IrInstructionIdCallExtra:2681 case IrInstSrcIdElemPtr:
2137 ir_print_call_extra(irp, (IrInstructionCallExtra *)instruction);2682 ir_print_elem_ptr(irp, (IrInstSrcElemPtr *)instruction);
2138 break;2683 break;
2139 case IrInstructionIdCallSrc:2684 case IrInstSrcIdVarPtr:
2140 ir_print_call_src(irp, (IrInstructionCallSrc *)instruction);2685 ir_print_var_ptr(irp, (IrInstSrcVarPtr *)instruction);
2141 break;2686 break;
2142 case IrInstructionIdCallSrcArgs:2687 case IrInstSrcIdLoadPtr:
2143 ir_print_call_src_args(irp, (IrInstructionCallSrcArgs *)instruction);2688 ir_print_load_ptr(irp, (IrInstSrcLoadPtr *)instruction);
2144 break;2689 break;
2145 case IrInstructionIdCallGen:2690 case IrInstSrcIdStorePtr:
2146 ir_print_call_gen(irp, (IrInstructionCallGen *)instruction);2691 ir_print_store_ptr(irp, (IrInstSrcStorePtr *)instruction);
2147 break;2692 break;
2148 case IrInstructionIdUnOp:2693 case IrInstSrcIdTypeOf:
2149 ir_print_un_op(irp, (IrInstructionUnOp *)instruction);2694 ir_print_typeof(irp, (IrInstSrcTypeOf *)instruction);
2150 break;2695 break;
2151 case IrInstructionIdCondBr:2696 case IrInstSrcIdFieldPtr:
2152 ir_print_cond_br(irp, (IrInstructionCondBr *)instruction);2697 ir_print_field_ptr(irp, (IrInstSrcFieldPtr *)instruction);
2153 break;2698 break;
2154 case IrInstructionIdBr:2699 case IrInstSrcIdSetCold:
2155 ir_print_br(irp, (IrInstructionBr *)instruction);2700 ir_print_set_cold(irp, (IrInstSrcSetCold *)instruction);
2156 break;2701 break;
2157 case IrInstructionIdPhi:2702 case IrInstSrcIdSetRuntimeSafety:
2158 ir_print_phi(irp, (IrInstructionPhi *)instruction);2703 ir_print_set_runtime_safety(irp, (IrInstSrcSetRuntimeSafety *)instruction);
2159 break;2704 break;
2160 case IrInstructionIdContainerInitList:2705 case IrInstSrcIdSetFloatMode:
2161 ir_print_container_init_list(irp, (IrInstructionContainerInitList *)instruction);2706 ir_print_set_float_mode(irp, (IrInstSrcSetFloatMode *)instruction);
2162 break;2707 break;
2163 case IrInstructionIdContainerInitFields:2708 case IrInstSrcIdArrayType:
2164 ir_print_container_init_fields(irp, (IrInstructionContainerInitFields *)instruction);2709 ir_print_array_type(irp, (IrInstSrcArrayType *)instruction);
2165 break;2710 break;
2166 case IrInstructionIdUnreachable:2711 case IrInstSrcIdSliceType:
2167 ir_print_unreachable(irp, (IrInstructionUnreachable *)instruction);2712 ir_print_slice_type(irp, (IrInstSrcSliceType *)instruction);
2168 break;2713 break;
2169 case IrInstructionIdElemPtr:2714 case IrInstSrcIdAnyFrameType:
2170 ir_print_elem_ptr(irp, (IrInstructionElemPtr *)instruction);2715 ir_print_any_frame_type(irp, (IrInstSrcAnyFrameType *)instruction);
2171 break;2716 break;
2172 case IrInstructionIdVarPtr:2717 case IrInstSrcIdAsm:
2173 ir_print_var_ptr(irp, (IrInstructionVarPtr *)instruction);2718 ir_print_asm_src(irp, (IrInstSrcAsm *)instruction);
2174 break;2719 break;
2175 case IrInstructionIdReturnPtr:2720 case IrInstSrcIdSizeOf:
2176 ir_print_return_ptr(irp, (IrInstructionReturnPtr *)instruction);2721 ir_print_size_of(irp, (IrInstSrcSizeOf *)instruction);
2177 break;2722 break;
2178 case IrInstructionIdLoadPtr:2723 case IrInstSrcIdTestNonNull:
2179 ir_print_load_ptr(irp, (IrInstructionLoadPtr *)instruction);2724 ir_print_test_non_null(irp, (IrInstSrcTestNonNull *)instruction);
2180 break;2725 break;
2181 case IrInstructionIdLoadPtrGen:2726 case IrInstSrcIdOptionalUnwrapPtr:
2182 ir_print_load_ptr_gen(irp, (IrInstructionLoadPtrGen *)instruction);2727 ir_print_optional_unwrap_ptr(irp, (IrInstSrcOptionalUnwrapPtr *)instruction);
2183 break;2728 break;
2184 case IrInstructionIdStorePtr:2729 case IrInstSrcIdPopCount:
2185 ir_print_store_ptr(irp, (IrInstructionStorePtr *)instruction);2730 ir_print_pop_count(irp, (IrInstSrcPopCount *)instruction);
2186 break;2731 break;
2187 case IrInstructionIdVectorStoreElem:2732 case IrInstSrcIdCtz:
2188 ir_print_vector_store_elem(irp, (IrInstructionVectorStoreElem *)instruction);2733 ir_print_ctz(irp, (IrInstSrcCtz *)instruction);
2189 break;2734 break;
2190 case IrInstructionIdTypeOf:2735 case IrInstSrcIdBswap:
2191 ir_print_typeof(irp, (IrInstructionTypeOf *)instruction);2736 ir_print_bswap(irp, (IrInstSrcBswap *)instruction);
2192 break;2737 break;
2193 case IrInstructionIdFieldPtr:2738 case IrInstSrcIdBitReverse:
2194 ir_print_field_ptr(irp, (IrInstructionFieldPtr *)instruction);2739 ir_print_bit_reverse(irp, (IrInstSrcBitReverse *)instruction);
2195 break;2740 break;
2196 case IrInstructionIdStructFieldPtr:2741 case IrInstSrcIdSwitchBr:
2197 ir_print_struct_field_ptr(irp, (IrInstructionStructFieldPtr *)instruction);2742 ir_print_switch_br(irp, (IrInstSrcSwitchBr *)instruction);
2198 break;2743 break;
2199 case IrInstructionIdUnionFieldPtr:2744 case IrInstSrcIdSwitchVar:
2200 ir_print_union_field_ptr(irp, (IrInstructionUnionFieldPtr *)instruction);2745 ir_print_switch_var(irp, (IrInstSrcSwitchVar *)instruction);
2201 break;2746 break;
2202 case IrInstructionIdSetCold:2747 case IrInstSrcIdSwitchElseVar:
2203 ir_print_set_cold(irp, (IrInstructionSetCold *)instruction);2748 ir_print_switch_else_var(irp, (IrInstSrcSwitchElseVar *)instruction);
2204 break;2749 break;
2205 case IrInstructionIdSetRuntimeSafety:2750 case IrInstSrcIdSwitchTarget:
2206 ir_print_set_runtime_safety(irp, (IrInstructionSetRuntimeSafety *)instruction);2751 ir_print_switch_target(irp, (IrInstSrcSwitchTarget *)instruction);
2207 break;2752 break;
2208 case IrInstructionIdSetFloatMode:2753 case IrInstSrcIdImport:
2209 ir_print_set_float_mode(irp, (IrInstructionSetFloatMode *)instruction);2754 ir_print_import(irp, (IrInstSrcImport *)instruction);
2210 break;2755 break;
2211 case IrInstructionIdArrayType:2756 case IrInstSrcIdRef:
2212 ir_print_array_type(irp, (IrInstructionArrayType *)instruction);2757 ir_print_ref(irp, (IrInstSrcRef *)instruction);
2213 break;2758 break;
2214 case IrInstructionIdSliceType:2759 case IrInstSrcIdCompileErr:
2215 ir_print_slice_type(irp, (IrInstructionSliceType *)instruction);2760 ir_print_compile_err(irp, (IrInstSrcCompileErr *)instruction);
2216 break;2761 break;
2217 case IrInstructionIdAnyFrameType:2762 case IrInstSrcIdCompileLog:
2218 ir_print_any_frame_type(irp, (IrInstructionAnyFrameType *)instruction);2763 ir_print_compile_log(irp, (IrInstSrcCompileLog *)instruction);
2219 break;2764 break;
2220 case IrInstructionIdAsmSrc:2765 case IrInstSrcIdErrName:
2221 ir_print_asm_src(irp, (IrInstructionAsmSrc *)instruction);2766 ir_print_err_name(irp, (IrInstSrcErrName *)instruction);
2222 break;2767 break;
2223 case IrInstructionIdAsmGen:2768 case IrInstSrcIdCImport:
2224 ir_print_asm_gen(irp, (IrInstructionAsmGen *)instruction);2769 ir_print_c_import(irp, (IrInstSrcCImport *)instruction);
2225 break;2770 break;
2226 case IrInstructionIdSizeOf:2771 case IrInstSrcIdCInclude:
2227 ir_print_size_of(irp, (IrInstructionSizeOf *)instruction);2772 ir_print_c_include(irp, (IrInstSrcCInclude *)instruction);
2228 break;2773 break;
2229 case IrInstructionIdTestNonNull:2774 case IrInstSrcIdCDefine:
2230 ir_print_test_non_null(irp, (IrInstructionTestNonNull *)instruction);2775 ir_print_c_define(irp, (IrInstSrcCDefine *)instruction);
2231 break;2776 break;
2232 case IrInstructionIdOptionalUnwrapPtr:2777 case IrInstSrcIdCUndef:
2233 ir_print_optional_unwrap_ptr(irp, (IrInstructionOptionalUnwrapPtr *)instruction);2778 ir_print_c_undef(irp, (IrInstSrcCUndef *)instruction);
2234 break;2779 break;
2235 case IrInstructionIdPopCount:2780 case IrInstSrcIdEmbedFile:
2236 ir_print_pop_count(irp, (IrInstructionPopCount *)instruction);2781 ir_print_embed_file(irp, (IrInstSrcEmbedFile *)instruction);
2237 break;2782 break;
2238 case IrInstructionIdClz:2783 case IrInstSrcIdCmpxchg:
2239 ir_print_clz(irp, (IrInstructionClz *)instruction);2784 ir_print_cmpxchg_src(irp, (IrInstSrcCmpxchg *)instruction);
2240 break;2785 break;
2241 case IrInstructionIdCtz:2786 case IrInstSrcIdFence:
2242 ir_print_ctz(irp, (IrInstructionCtz *)instruction);2787 ir_print_fence(irp, (IrInstSrcFence *)instruction);
2243 break;2788 break;
2244 case IrInstructionIdBswap:2789 case IrInstSrcIdTruncate:
2245 ir_print_bswap(irp, (IrInstructionBswap *)instruction);2790 ir_print_truncate(irp, (IrInstSrcTruncate *)instruction);
2246 break;2791 break;
2247 case IrInstructionIdBitReverse:2792 case IrInstSrcIdIntCast:
2248 ir_print_bit_reverse(irp, (IrInstructionBitReverse *)instruction);2793 ir_print_int_cast(irp, (IrInstSrcIntCast *)instruction);
2249 break;2794 break;
2250 case IrInstructionIdSwitchBr:2795 case IrInstSrcIdFloatCast:
2251 ir_print_switch_br(irp, (IrInstructionSwitchBr *)instruction);2796 ir_print_float_cast(irp, (IrInstSrcFloatCast *)instruction);
2252 break;2797 break;
2253 case IrInstructionIdSwitchVar:2798 case IrInstSrcIdErrSetCast:
2254 ir_print_switch_var(irp, (IrInstructionSwitchVar *)instruction);2799 ir_print_err_set_cast(irp, (IrInstSrcErrSetCast *)instruction);
2255 break;2800 break;
2256 case IrInstructionIdSwitchElseVar:2801 case IrInstSrcIdFromBytes:
2257 ir_print_switch_else_var(irp, (IrInstructionSwitchElseVar *)instruction);2802 ir_print_from_bytes(irp, (IrInstSrcFromBytes *)instruction);
2258 break;2803 break;
2259 case IrInstructionIdSwitchTarget:2804 case IrInstSrcIdToBytes:
2260 ir_print_switch_target(irp, (IrInstructionSwitchTarget *)instruction);2805 ir_print_to_bytes(irp, (IrInstSrcToBytes *)instruction);
2261 break;2806 break;
2262 case IrInstructionIdUnionTag:2807 case IrInstSrcIdIntToFloat:
2263 ir_print_union_tag(irp, (IrInstructionUnionTag *)instruction);2808 ir_print_int_to_float(irp, (IrInstSrcIntToFloat *)instruction);
2264 break;2809 break;
2265 case IrInstructionIdImport:2810 case IrInstSrcIdFloatToInt:
2266 ir_print_import(irp, (IrInstructionImport *)instruction);2811 ir_print_float_to_int(irp, (IrInstSrcFloatToInt *)instruction);
2267 break;2812 break;
2268 case IrInstructionIdRef:2813 case IrInstSrcIdBoolToInt:
2269 ir_print_ref(irp, (IrInstructionRef *)instruction);2814 ir_print_bool_to_int(irp, (IrInstSrcBoolToInt *)instruction);
2270 break;2815 break;
2271 case IrInstructionIdRefGen:2816 case IrInstSrcIdIntType:
2272 ir_print_ref_gen(irp, (IrInstructionRefGen *)instruction);2817 ir_print_int_type(irp, (IrInstSrcIntType *)instruction);
2273 break;2818 break;
2274 case IrInstructionIdCompileErr:2819 case IrInstSrcIdVectorType:
2275 ir_print_compile_err(irp, (IrInstructionCompileErr *)instruction);2820 ir_print_vector_type(irp, (IrInstSrcVectorType *)instruction);
2276 break;2821 break;
2277 case IrInstructionIdCompileLog:2822 case IrInstSrcIdShuffleVector:
2278 ir_print_compile_log(irp, (IrInstructionCompileLog *)instruction);2823 ir_print_shuffle_vector(irp, (IrInstSrcShuffleVector *)instruction);
2279 break;2824 break;
2280 case IrInstructionIdErrName:2825 case IrInstSrcIdSplat:
2281 ir_print_err_name(irp, (IrInstructionErrName *)instruction);2826 ir_print_splat_src(irp, (IrInstSrcSplat *)instruction);
2282 break;2827 break;
2283 case IrInstructionIdCImport:2828 case IrInstSrcIdBoolNot:
2284 ir_print_c_import(irp, (IrInstructionCImport *)instruction);2829 ir_print_bool_not(irp, (IrInstSrcBoolNot *)instruction);
2285 break;2830 break;
2286 case IrInstructionIdCInclude:2831 case IrInstSrcIdMemset:
2287 ir_print_c_include(irp, (IrInstructionCInclude *)instruction);2832 ir_print_memset(irp, (IrInstSrcMemset *)instruction);
2288 break;2833 break;
2289 case IrInstructionIdCDefine:2834 case IrInstSrcIdMemcpy:
2290 ir_print_c_define(irp, (IrInstructionCDefine *)instruction);2835 ir_print_memcpy(irp, (IrInstSrcMemcpy *)instruction);
2291 break;2836 break;
2292 case IrInstructionIdCUndef:2837 case IrInstSrcIdSlice:
2293 ir_print_c_undef(irp, (IrInstructionCUndef *)instruction);2838 ir_print_slice_src(irp, (IrInstSrcSlice *)instruction);
2294 break;2839 break;
2295 case IrInstructionIdEmbedFile:2840 case IrInstSrcIdMemberCount:
2296 ir_print_embed_file(irp, (IrInstructionEmbedFile *)instruction);2841 ir_print_member_count(irp, (IrInstSrcMemberCount *)instruction);
2297 break;2842 break;
2298 case IrInstructionIdCmpxchgSrc:2843 case IrInstSrcIdMemberType:
2299 ir_print_cmpxchg_src(irp, (IrInstructionCmpxchgSrc *)instruction);2844 ir_print_member_type(irp, (IrInstSrcMemberType *)instruction);
2300 break;2845 break;
2301 case IrInstructionIdCmpxchgGen:2846 case IrInstSrcIdMemberName:
2302 ir_print_cmpxchg_gen(irp, (IrInstructionCmpxchgGen *)instruction);2847 ir_print_member_name(irp, (IrInstSrcMemberName *)instruction);
2303 break;2848 break;
2304 case IrInstructionIdFence:2849 case IrInstSrcIdBreakpoint:
2305 ir_print_fence(irp, (IrInstructionFence *)instruction);2850 ir_print_breakpoint(irp, (IrInstSrcBreakpoint *)instruction);
2306 break;2851 break;
2307 case IrInstructionIdTruncate:2852 case IrInstSrcIdReturnAddress:
2308 ir_print_truncate(irp, (IrInstructionTruncate *)instruction);2853 ir_print_return_address(irp, (IrInstSrcReturnAddress *)instruction);
2309 break;2854 break;
2310 case IrInstructionIdIntCast:2855 case IrInstSrcIdFrameAddress:
2311 ir_print_int_cast(irp, (IrInstructionIntCast *)instruction);2856 ir_print_frame_address(irp, (IrInstSrcFrameAddress *)instruction);
2312 break;2857 break;
2313 case IrInstructionIdFloatCast:2858 case IrInstSrcIdFrameHandle:
2314 ir_print_float_cast(irp, (IrInstructionFloatCast *)instruction);2859 ir_print_handle(irp, (IrInstSrcFrameHandle *)instruction);
2315 break;2860 break;
2316 case IrInstructionIdErrSetCast:2861 case IrInstSrcIdFrameType:
2317 ir_print_err_set_cast(irp, (IrInstructionErrSetCast *)instruction);2862 ir_print_frame_type(irp, (IrInstSrcFrameType *)instruction);
2318 break;2863 break;
2319 case IrInstructionIdFromBytes:2864 case IrInstSrcIdFrameSize:
2320 ir_print_from_bytes(irp, (IrInstructionFromBytes *)instruction);2865 ir_print_frame_size_src(irp, (IrInstSrcFrameSize *)instruction);
2321 break;2866 break;
2322 case IrInstructionIdToBytes:2867 case IrInstSrcIdAlignOf:
2323 ir_print_to_bytes(irp, (IrInstructionToBytes *)instruction);2868 ir_print_align_of(irp, (IrInstSrcAlignOf *)instruction);
2324 break;2869 break;
2325 case IrInstructionIdIntToFloat:2870 case IrInstSrcIdOverflowOp:
2326 ir_print_int_to_float(irp, (IrInstructionIntToFloat *)instruction);2871 ir_print_overflow_op(irp, (IrInstSrcOverflowOp *)instruction);
2327 break;2872 break;
2328 case IrInstructionIdFloatToInt:2873 case IrInstSrcIdTestErr:
2329 ir_print_float_to_int(irp, (IrInstructionFloatToInt *)instruction);2874 ir_print_test_err_src(irp, (IrInstSrcTestErr *)instruction);
2330 break;2875 break;
2331 case IrInstructionIdBoolToInt:2876 case IrInstSrcIdUnwrapErrCode:
2332 ir_print_bool_to_int(irp, (IrInstructionBoolToInt *)instruction);2877 ir_print_unwrap_err_code(irp, (IrInstSrcUnwrapErrCode *)instruction);
2333 break;2878 break;
2334 case IrInstructionIdIntType:2879 case IrInstSrcIdUnwrapErrPayload:
2335 ir_print_int_type(irp, (IrInstructionIntType *)instruction);2880 ir_print_unwrap_err_payload(irp, (IrInstSrcUnwrapErrPayload *)instruction);
2336 break;2881 break;
2337 case IrInstructionIdVectorType:2882 case IrInstSrcIdFnProto:
2338 ir_print_vector_type(irp, (IrInstructionVectorType *)instruction);2883 ir_print_fn_proto(irp, (IrInstSrcFnProto *)instruction);
2339 break;2884 break;
2340 case IrInstructionIdShuffleVector:2885 case IrInstSrcIdTestComptime:
2341 ir_print_shuffle_vector(irp, (IrInstructionShuffleVector *)instruction);2886 ir_print_test_comptime(irp, (IrInstSrcTestComptime *)instruction);
2342 break;2887 break;
2343 case IrInstructionIdSplatSrc:2888 case IrInstSrcIdPtrCast:
2344 ir_print_splat_src(irp, (IrInstructionSplatSrc *)instruction);2889 ir_print_ptr_cast_src(irp, (IrInstSrcPtrCast *)instruction);
2345 break;2890 break;
2346 case IrInstructionIdSplatGen:2891 case IrInstSrcIdBitCast:
2347 ir_print_splat_gen(irp, (IrInstructionSplatGen *)instruction);2892 ir_print_bit_cast_src(irp, (IrInstSrcBitCast *)instruction);
2348 break;2893 break;
2349 case IrInstructionIdBoolNot:2894 case IrInstSrcIdPtrToInt:
2350 ir_print_bool_not(irp, (IrInstructionBoolNot *)instruction);2895 ir_print_ptr_to_int(irp, (IrInstSrcPtrToInt *)instruction);
2351 break;2896 break;
2352 case IrInstructionIdMemset:2897 case IrInstSrcIdIntToPtr:
2353 ir_print_memset(irp, (IrInstructionMemset *)instruction);2898 ir_print_int_to_ptr(irp, (IrInstSrcIntToPtr *)instruction);
2354 break;2899 break;
2355 case IrInstructionIdMemcpy:2900 case IrInstSrcIdIntToEnum:
2356 ir_print_memcpy(irp, (IrInstructionMemcpy *)instruction);2901 ir_print_int_to_enum(irp, (IrInstSrcIntToEnum *)instruction);
2357 break;2902 break;
2358 case IrInstructionIdSliceSrc:2903 case IrInstSrcIdIntToErr:
2359 ir_print_slice_src(irp, (IrInstructionSliceSrc *)instruction);2904 ir_print_int_to_err(irp, (IrInstSrcIntToErr *)instruction);
2360 break;2905 break;
2361 case IrInstructionIdSliceGen:2906 case IrInstSrcIdErrToInt:
2362 ir_print_slice_gen(irp, (IrInstructionSliceGen *)instruction);2907 ir_print_err_to_int(irp, (IrInstSrcErrToInt *)instruction);
2363 break;2908 break;
2364 case IrInstructionIdMemberCount:2909 case IrInstSrcIdCheckSwitchProngs:
2365 ir_print_member_count(irp, (IrInstructionMemberCount *)instruction);2910 ir_print_check_switch_prongs(irp, (IrInstSrcCheckSwitchProngs *)instruction);
2366 break;2911 break;
2367 case IrInstructionIdMemberType:2912 case IrInstSrcIdCheckStatementIsVoid:
2368 ir_print_member_type(irp, (IrInstructionMemberType *)instruction);2913 ir_print_check_statement_is_void(irp, (IrInstSrcCheckStatementIsVoid *)instruction);
2369 break;2914 break;
2370 case IrInstructionIdMemberName:2915 case IrInstSrcIdTypeName:
2371 ir_print_member_name(irp, (IrInstructionMemberName *)instruction);2916 ir_print_type_name(irp, (IrInstSrcTypeName *)instruction);
2372 break;2917 break;
2373 case IrInstructionIdBreakpoint:2918 case IrInstSrcIdTagName:
2374 ir_print_breakpoint(irp, (IrInstructionBreakpoint *)instruction);2919 ir_print_tag_name(irp, (IrInstSrcTagName *)instruction);
2375 break;2920 break;
2376 case IrInstructionIdReturnAddress:2921 case IrInstSrcIdPtrType:
2377 ir_print_return_address(irp, (IrInstructionReturnAddress *)instruction);2922 ir_print_ptr_type(irp, (IrInstSrcPtrType *)instruction);
2378 break;2923 break;
2379 case IrInstructionIdFrameAddress:2924 case IrInstSrcIdDeclRef:
2380 ir_print_frame_address(irp, (IrInstructionFrameAddress *)instruction);2925 ir_print_decl_ref(irp, (IrInstSrcDeclRef *)instruction);
2381 break;2926 break;
2382 case IrInstructionIdFrameHandle:2927 case IrInstSrcIdPanic:
2383 ir_print_handle(irp, (IrInstructionFrameHandle *)instruction);2928 ir_print_panic(irp, (IrInstSrcPanic *)instruction);
2384 break;2929 break;
2385 case IrInstructionIdFrameType:2930 case IrInstSrcIdFieldParentPtr:
2386 ir_print_frame_type(irp, (IrInstructionFrameType *)instruction);2931 ir_print_field_parent_ptr(irp, (IrInstSrcFieldParentPtr *)instruction);
2387 break;2932 break;
2388 case IrInstructionIdFrameSizeSrc:2933 case IrInstSrcIdByteOffsetOf:
2389 ir_print_frame_size_src(irp, (IrInstructionFrameSizeSrc *)instruction);2934 ir_print_byte_offset_of(irp, (IrInstSrcByteOffsetOf *)instruction);
2390 break;2935 break;
2391 case IrInstructionIdFrameSizeGen:2936 case IrInstSrcIdBitOffsetOf:
2392 ir_print_frame_size_gen(irp, (IrInstructionFrameSizeGen *)instruction);2937 ir_print_bit_offset_of(irp, (IrInstSrcBitOffsetOf *)instruction);
2393 break;2938 break;
2394 case IrInstructionIdAlignOf:2939 case IrInstSrcIdTypeInfo:
2395 ir_print_align_of(irp, (IrInstructionAlignOf *)instruction);2940 ir_print_type_info(irp, (IrInstSrcTypeInfo *)instruction);
2396 break;2941 break;
2397 case IrInstructionIdOverflowOp:2942 case IrInstSrcIdType:
2398 ir_print_overflow_op(irp, (IrInstructionOverflowOp *)instruction);2943 ir_print_type(irp, (IrInstSrcType *)instruction);
2399 break;2944 break;
2400 case IrInstructionIdTestErrSrc:2945 case IrInstSrcIdHasField:
2401 ir_print_test_err_src(irp, (IrInstructionTestErrSrc *)instruction);2946 ir_print_has_field(irp, (IrInstSrcHasField *)instruction);
2402 break;2947 break;
2403 case IrInstructionIdTestErrGen:2948 case IrInstSrcIdTypeId:
2404 ir_print_test_err_gen(irp, (IrInstructionTestErrGen *)instruction);2949 ir_print_type_id(irp, (IrInstSrcTypeId *)instruction);
2405 break;2950 break;
2406 case IrInstructionIdUnwrapErrCode:2951 case IrInstSrcIdSetEvalBranchQuota:
2407 ir_print_unwrap_err_code(irp, (IrInstructionUnwrapErrCode *)instruction);2952 ir_print_set_eval_branch_quota(irp, (IrInstSrcSetEvalBranchQuota *)instruction);
2408 break;2953 break;
2409 case IrInstructionIdUnwrapErrPayload:2954 case IrInstSrcIdAlignCast:
2410 ir_print_unwrap_err_payload(irp, (IrInstructionUnwrapErrPayload *)instruction);2955 ir_print_align_cast(irp, (IrInstSrcAlignCast *)instruction);
2411 break;2956 break;
2412 case IrInstructionIdOptionalWrap:2957 case IrInstSrcIdImplicitCast:
2413 ir_print_optional_wrap(irp, (IrInstructionOptionalWrap *)instruction);2958 ir_print_implicit_cast(irp, (IrInstSrcImplicitCast *)instruction);
2414 break;2959 break;
2415 case IrInstructionIdErrWrapCode:2960 case IrInstSrcIdResolveResult:
2416 ir_print_err_wrap_code(irp, (IrInstructionErrWrapCode *)instruction);2961 ir_print_resolve_result(irp, (IrInstSrcResolveResult *)instruction);
2417 break;2962 break;
2418 case IrInstructionIdErrWrapPayload:2963 case IrInstSrcIdResetResult:
2419 ir_print_err_wrap_payload(irp, (IrInstructionErrWrapPayload *)instruction);2964 ir_print_reset_result(irp, (IrInstSrcResetResult *)instruction);
2420 break;2965 break;
2421 case IrInstructionIdFnProto:2966 case IrInstSrcIdOpaqueType:
2422 ir_print_fn_proto(irp, (IrInstructionFnProto *)instruction);2967 ir_print_opaque_type(irp, (IrInstSrcOpaqueType *)instruction);
2423 break;2968 break;
2424 case IrInstructionIdTestComptime:2969 case IrInstSrcIdSetAlignStack:
2425 ir_print_test_comptime(irp, (IrInstructionTestComptime *)instruction);2970 ir_print_set_align_stack(irp, (IrInstSrcSetAlignStack *)instruction);
2426 break;2971 break;
2427 case IrInstructionIdPtrCastSrc:2972 case IrInstSrcIdArgType:
2428 ir_print_ptr_cast_src(irp, (IrInstructionPtrCastSrc *)instruction);2973 ir_print_arg_type(irp, (IrInstSrcArgType *)instruction);
2429 break;2974 break;
2430 case IrInstructionIdPtrCastGen:2975 case IrInstSrcIdTagType:
2431 ir_print_ptr_cast_gen(irp, (IrInstructionPtrCastGen *)instruction);2976 ir_print_enum_tag_type(irp, (IrInstSrcTagType *)instruction);
2432 break;2977 break;
2433 case IrInstructionIdBitCastSrc:2978 case IrInstSrcIdExport:
2434 ir_print_bit_cast_src(irp, (IrInstructionBitCastSrc *)instruction);2979 ir_print_export(irp, (IrInstSrcExport *)instruction);
2435 break;2980 break;
2436 case IrInstructionIdBitCastGen:2981 case IrInstSrcIdErrorReturnTrace:
2437 ir_print_bit_cast_gen(irp, (IrInstructionBitCastGen *)instruction);2982 ir_print_error_return_trace(irp, (IrInstSrcErrorReturnTrace *)instruction);
2438 break;2983 break;
2439 case IrInstructionIdWidenOrShorten:2984 case IrInstSrcIdErrorUnion:
2440 ir_print_widen_or_shorten(irp, (IrInstructionWidenOrShorten *)instruction);2985 ir_print_error_union(irp, (IrInstSrcErrorUnion *)instruction);
2441 break;2986 break;
2442 case IrInstructionIdPtrToInt:2987 case IrInstSrcIdAtomicRmw:
2443 ir_print_ptr_to_int(irp, (IrInstructionPtrToInt *)instruction);2988 ir_print_atomic_rmw(irp, (IrInstSrcAtomicRmw *)instruction);
2444 break;2989 break;
2445 case IrInstructionIdIntToPtr:2990 case IrInstSrcIdSaveErrRetAddr:
2446 ir_print_int_to_ptr(irp, (IrInstructionIntToPtr *)instruction);2991 ir_print_save_err_ret_addr(irp, (IrInstSrcSaveErrRetAddr *)instruction);
2992 break;
2993 case IrInstSrcIdAddImplicitReturnType:
2994 ir_print_add_implicit_return_type(irp, (IrInstSrcAddImplicitReturnType *)instruction);
2995 break;
2996 case IrInstSrcIdFloatOp:
2997 ir_print_float_op(irp, (IrInstSrcFloatOp *)instruction);
2998 break;
2999 case IrInstSrcIdMulAdd:
3000 ir_print_mul_add(irp, (IrInstSrcMulAdd *)instruction);
3001 break;
3002 case IrInstSrcIdAtomicLoad:
3003 ir_print_atomic_load(irp, (IrInstSrcAtomicLoad *)instruction);
3004 break;
3005 case IrInstSrcIdAtomicStore:
3006 ir_print_atomic_store(irp, (IrInstSrcAtomicStore *)instruction);
3007 break;
3008 case IrInstSrcIdEnumToInt:
3009 ir_print_enum_to_int(irp, (IrInstSrcEnumToInt *)instruction);
3010 break;
3011 case IrInstSrcIdCheckRuntimeScope:
3012 ir_print_check_runtime_scope(irp, (IrInstSrcCheckRuntimeScope *)instruction);
3013 break;
3014 case IrInstSrcIdHasDecl:
3015 ir_print_has_decl(irp, (IrInstSrcHasDecl *)instruction);
3016 break;
3017 case IrInstSrcIdUndeclaredIdent:
3018 ir_print_undeclared_ident(irp, (IrInstSrcUndeclaredIdent *)instruction);
3019 break;
3020 case IrInstSrcIdAlloca:
3021 ir_print_alloca_src(irp, (IrInstSrcAlloca *)instruction);
3022 break;
3023 case IrInstSrcIdEndExpr:
3024 ir_print_end_expr(irp, (IrInstSrcEndExpr *)instruction);
3025 break;
3026 case IrInstSrcIdUnionInitNamedField:
3027 ir_print_union_init_named_field(irp, (IrInstSrcUnionInitNamedField *)instruction);
3028 break;
3029 case IrInstSrcIdSuspendBegin:
3030 ir_print_suspend_begin(irp, (IrInstSrcSuspendBegin *)instruction);
3031 break;
3032 case IrInstSrcIdSuspendFinish:
3033 ir_print_suspend_finish(irp, (IrInstSrcSuspendFinish *)instruction);
3034 break;
3035 case IrInstSrcIdResume:
3036 ir_print_resume(irp, (IrInstSrcResume *)instruction);
3037 break;
3038 case IrInstSrcIdAwait:
3039 ir_print_await_src(irp, (IrInstSrcAwait *)instruction);
3040 break;
3041 case IrInstSrcIdSpillBegin:
3042 ir_print_spill_begin(irp, (IrInstSrcSpillBegin *)instruction);
3043 break;
3044 case IrInstSrcIdSpillEnd:
3045 ir_print_spill_end(irp, (IrInstSrcSpillEnd *)instruction);
3046 break;
3047 case IrInstSrcIdClz:
3048 ir_print_clz(irp, (IrInstSrcClz *)instruction);
3049 break;
3050 }
3051 fprintf(irp->f, "\n");
3052}
3053
3054static void ir_print_inst_gen(IrPrintGen *irp, IrInstGen *instruction, bool trailing) {
3055 ir_print_prefix_gen(irp, instruction, trailing);
3056 switch (instruction->id) {
3057 case IrInstGenIdInvalid:
3058 zig_unreachable();
3059 case IrInstGenIdReturn:
3060 ir_print_return_gen(irp, (IrInstGenReturn *)instruction);
2447 break;3061 break;
2448 case IrInstructionIdIntToEnum:3062 case IrInstGenIdConst:
2449 ir_print_int_to_enum(irp, (IrInstructionIntToEnum *)instruction);3063 ir_print_const(irp, (IrInstGenConst *)instruction);
2450 break;3064 break;
2451 case IrInstructionIdIntToErr:3065 case IrInstGenIdBinOp:
2452 ir_print_int_to_err(irp, (IrInstructionIntToErr *)instruction);3066 ir_print_bin_op(irp, (IrInstGenBinOp *)instruction);
2453 break;3067 break;
2454 case IrInstructionIdErrToInt:3068 case IrInstGenIdDeclVar:
2455 ir_print_err_to_int(irp, (IrInstructionErrToInt *)instruction);3069 ir_print_decl_var_gen(irp, (IrInstGenDeclVar *)instruction);
2456 break;3070 break;
2457 case IrInstructionIdCheckSwitchProngs:3071 case IrInstGenIdCast:
2458 ir_print_check_switch_prongs(irp, (IrInstructionCheckSwitchProngs *)instruction);3072 ir_print_cast(irp, (IrInstGenCast *)instruction);
2459 break;3073 break;
2460 case IrInstructionIdCheckStatementIsVoid:3074 case IrInstGenIdCall:
2461 ir_print_check_statement_is_void(irp, (IrInstructionCheckStatementIsVoid *)instruction);3075 ir_print_call_gen(irp, (IrInstGenCall *)instruction);
2462 break;3076 break;
2463 case IrInstructionIdTypeName:3077 case IrInstGenIdCondBr:
2464 ir_print_type_name(irp, (IrInstructionTypeName *)instruction);3078 ir_print_cond_br(irp, (IrInstGenCondBr *)instruction);
2465 break;3079 break;
2466 case IrInstructionIdTagName:3080 case IrInstGenIdBr:
2467 ir_print_tag_name(irp, (IrInstructionTagName *)instruction);3081 ir_print_br(irp, (IrInstGenBr *)instruction);
2468 break;3082 break;
2469 case IrInstructionIdPtrType:3083 case IrInstGenIdPhi:
2470 ir_print_ptr_type(irp, (IrInstructionPtrType *)instruction);3084 ir_print_phi(irp, (IrInstGenPhi *)instruction);
2471 break;3085 break;
2472 case IrInstructionIdDeclRef:3086 case IrInstGenIdUnreachable:
2473 ir_print_decl_ref(irp, (IrInstructionDeclRef *)instruction);3087 ir_print_unreachable(irp, (IrInstGenUnreachable *)instruction);
2474 break;3088 break;
2475 case IrInstructionIdPanic:3089 case IrInstGenIdElemPtr:
2476 ir_print_panic(irp, (IrInstructionPanic *)instruction);3090 ir_print_elem_ptr(irp, (IrInstGenElemPtr *)instruction);
2477 break;3091 break;
2478 case IrInstructionIdFieldParentPtr:3092 case IrInstGenIdVarPtr:
2479 ir_print_field_parent_ptr(irp, (IrInstructionFieldParentPtr *)instruction);3093 ir_print_var_ptr(irp, (IrInstGenVarPtr *)instruction);
2480 break;3094 break;
2481 case IrInstructionIdByteOffsetOf:3095 case IrInstGenIdReturnPtr:
2482 ir_print_byte_offset_of(irp, (IrInstructionByteOffsetOf *)instruction);3096 ir_print_return_ptr(irp, (IrInstGenReturnPtr *)instruction);
2483 break;3097 break;
2484 case IrInstructionIdBitOffsetOf:3098 case IrInstGenIdLoadPtr:
2485 ir_print_bit_offset_of(irp, (IrInstructionBitOffsetOf *)instruction);3099 ir_print_load_ptr_gen(irp, (IrInstGenLoadPtr *)instruction);
2486 break;3100 break;
2487 case IrInstructionIdTypeInfo:3101 case IrInstGenIdStorePtr:
2488 ir_print_type_info(irp, (IrInstructionTypeInfo *)instruction);3102 ir_print_store_ptr(irp, (IrInstGenStorePtr *)instruction);
2489 break;3103 break;
2490 case IrInstructionIdType:3104 case IrInstGenIdStructFieldPtr:
2491 ir_print_type(irp, (IrInstructionType *)instruction);3105 ir_print_struct_field_ptr(irp, (IrInstGenStructFieldPtr *)instruction);
2492 break;3106 break;
2493 case IrInstructionIdHasField:3107 case IrInstGenIdUnionFieldPtr:
2494 ir_print_has_field(irp, (IrInstructionHasField *)instruction);3108 ir_print_union_field_ptr(irp, (IrInstGenUnionFieldPtr *)instruction);
2495 break;3109 break;
2496 case IrInstructionIdTypeId:3110 case IrInstGenIdAsm:
2497 ir_print_type_id(irp, (IrInstructionTypeId *)instruction);3111 ir_print_asm_gen(irp, (IrInstGenAsm *)instruction);
2498 break;3112 break;
2499 case IrInstructionIdSetEvalBranchQuota:3113 case IrInstGenIdTestNonNull:
2500 ir_print_set_eval_branch_quota(irp, (IrInstructionSetEvalBranchQuota *)instruction);3114 ir_print_test_non_null(irp, (IrInstGenTestNonNull *)instruction);
2501 break;3115 break;
2502 case IrInstructionIdAlignCast:3116 case IrInstGenIdOptionalUnwrapPtr:
2503 ir_print_align_cast(irp, (IrInstructionAlignCast *)instruction);3117 ir_print_optional_unwrap_ptr(irp, (IrInstGenOptionalUnwrapPtr *)instruction);
2504 break;3118 break;
2505 case IrInstructionIdImplicitCast:3119 case IrInstGenIdPopCount:
2506 ir_print_implicit_cast(irp, (IrInstructionImplicitCast *)instruction);3120 ir_print_pop_count(irp, (IrInstGenPopCount *)instruction);
2507 break;3121 break;
2508 case IrInstructionIdResolveResult:3122 case IrInstGenIdClz:
2509 ir_print_resolve_result(irp, (IrInstructionResolveResult *)instruction);3123 ir_print_clz(irp, (IrInstGenClz *)instruction);
2510 break;3124 break;
2511 case IrInstructionIdResetResult:3125 case IrInstGenIdCtz:
2512 ir_print_reset_result(irp, (IrInstructionResetResult *)instruction);3126 ir_print_ctz(irp, (IrInstGenCtz *)instruction);
2513 break;3127 break;
2514 case IrInstructionIdOpaqueType:3128 case IrInstGenIdBswap:
2515 ir_print_opaque_type(irp, (IrInstructionOpaqueType *)instruction);3129 ir_print_bswap(irp, (IrInstGenBswap *)instruction);
2516 break;3130 break;
2517 case IrInstructionIdSetAlignStack:3131 case IrInstGenIdBitReverse:
2518 ir_print_set_align_stack(irp, (IrInstructionSetAlignStack *)instruction);3132 ir_print_bit_reverse(irp, (IrInstGenBitReverse *)instruction);
2519 break;3133 break;
2520 case IrInstructionIdArgType:3134 case IrInstGenIdSwitchBr:
2521 ir_print_arg_type(irp, (IrInstructionArgType *)instruction);3135 ir_print_switch_br(irp, (IrInstGenSwitchBr *)instruction);
2522 break;3136 break;
2523 case IrInstructionIdTagType:3137 case IrInstGenIdUnionTag:
2524 ir_print_enum_tag_type(irp, (IrInstructionTagType *)instruction);3138 ir_print_union_tag(irp, (IrInstGenUnionTag *)instruction);
2525 break;3139 break;
2526 case IrInstructionIdExport:3140 case IrInstGenIdRef:
2527 ir_print_export(irp, (IrInstructionExport *)instruction);3141 ir_print_ref_gen(irp, (IrInstGenRef *)instruction);
2528 break;3142 break;
2529 case IrInstructionIdErrorReturnTrace:3143 case IrInstGenIdErrName:
2530 ir_print_error_return_trace(irp, (IrInstructionErrorReturnTrace *)instruction);3144 ir_print_err_name(irp, (IrInstGenErrName *)instruction);
2531 break;3145 break;
2532 case IrInstructionIdErrorUnion:3146 case IrInstGenIdCmpxchg:
2533 ir_print_error_union(irp, (IrInstructionErrorUnion *)instruction);3147 ir_print_cmpxchg_gen(irp, (IrInstGenCmpxchg *)instruction);
2534 break;3148 break;
2535 case IrInstructionIdAtomicRmw:3149 case IrInstGenIdFence:
2536 ir_print_atomic_rmw(irp, (IrInstructionAtomicRmw *)instruction);3150 ir_print_fence(irp, (IrInstGenFence *)instruction);
2537 break;3151 break;
2538 case IrInstructionIdSaveErrRetAddr:3152 case IrInstGenIdTruncate:
2539 ir_print_save_err_ret_addr(irp, (IrInstructionSaveErrRetAddr *)instruction);3153 ir_print_truncate(irp, (IrInstGenTruncate *)instruction);
2540 break;3154 break;
2541 case IrInstructionIdAddImplicitReturnType:3155 case IrInstGenIdShuffleVector:
2542 ir_print_add_implicit_return_type(irp, (IrInstructionAddImplicitReturnType *)instruction);3156 ir_print_shuffle_vector(irp, (IrInstGenShuffleVector *)instruction);
2543 break;3157 break;
2544 case IrInstructionIdFloatOp:3158 case IrInstGenIdSplat:
2545 ir_print_float_op(irp, (IrInstructionFloatOp *)instruction);3159 ir_print_splat_gen(irp, (IrInstGenSplat *)instruction);
2546 break;3160 break;
2547 case IrInstructionIdMulAdd:3161 case IrInstGenIdBoolNot:
2548 ir_print_mul_add(irp, (IrInstructionMulAdd *)instruction);3162 ir_print_bool_not(irp, (IrInstGenBoolNot *)instruction);
2549 break;3163 break;
2550 case IrInstructionIdAtomicLoad:3164 case IrInstGenIdMemset:
2551 ir_print_atomic_load(irp, (IrInstructionAtomicLoad *)instruction);3165 ir_print_memset(irp, (IrInstGenMemset *)instruction);
2552 break;3166 break;
2553 case IrInstructionIdAtomicStore:3167 case IrInstGenIdMemcpy:
2554 ir_print_atomic_store(irp, (IrInstructionAtomicStore *)instruction);3168 ir_print_memcpy(irp, (IrInstGenMemcpy *)instruction);
2555 break;3169 break;
2556 case IrInstructionIdEnumToInt:3170 case IrInstGenIdSlice:
2557 ir_print_enum_to_int(irp, (IrInstructionEnumToInt *)instruction);3171 ir_print_slice_gen(irp, (IrInstGenSlice *)instruction);
2558 break;3172 break;
2559 case IrInstructionIdCheckRuntimeScope:3173 case IrInstGenIdBreakpoint:
2560 ir_print_check_runtime_scope(irp, (IrInstructionCheckRuntimeScope *)instruction);3174 ir_print_breakpoint(irp, (IrInstGenBreakpoint *)instruction);
2561 break;3175 break;
2562 case IrInstructionIdDeclVarGen:3176 case IrInstGenIdReturnAddress:
2563 ir_print_decl_var_gen(irp, (IrInstructionDeclVarGen *)instruction);3177 ir_print_return_address(irp, (IrInstGenReturnAddress *)instruction);
2564 break;3178 break;
2565 case IrInstructionIdArrayToVector:3179 case IrInstGenIdFrameAddress:
2566 ir_print_array_to_vector(irp, (IrInstructionArrayToVector *)instruction);3180 ir_print_frame_address(irp, (IrInstGenFrameAddress *)instruction);
2567 break;3181 break;
2568 case IrInstructionIdVectorToArray:3182 case IrInstGenIdFrameHandle:
2569 ir_print_vector_to_array(irp, (IrInstructionVectorToArray *)instruction);3183 ir_print_handle(irp, (IrInstGenFrameHandle *)instruction);
2570 break;3184 break;
2571 case IrInstructionIdPtrOfArrayToSlice:3185 case IrInstGenIdFrameSize:
2572 ir_print_ptr_of_array_to_slice(irp, (IrInstructionPtrOfArrayToSlice *)instruction);3186 ir_print_frame_size_gen(irp, (IrInstGenFrameSize *)instruction);
2573 break;3187 break;
2574 case IrInstructionIdAssertZero:3188 case IrInstGenIdOverflowOp:
2575 ir_print_assert_zero(irp, (IrInstructionAssertZero *)instruction);3189 ir_print_overflow_op(irp, (IrInstGenOverflowOp *)instruction);
2576 break;3190 break;
2577 case IrInstructionIdAssertNonNull:3191 case IrInstGenIdTestErr:
2578 ir_print_assert_non_null(irp, (IrInstructionAssertNonNull *)instruction);3192 ir_print_test_err_gen(irp, (IrInstGenTestErr *)instruction);
2579 break;3193 break;
2580 case IrInstructionIdResizeSlice:3194 case IrInstGenIdUnwrapErrCode:
2581 ir_print_resize_slice(irp, (IrInstructionResizeSlice *)instruction);3195 ir_print_unwrap_err_code(irp, (IrInstGenUnwrapErrCode *)instruction);
2582 break;3196 break;
2583 case IrInstructionIdHasDecl:3197 case IrInstGenIdUnwrapErrPayload:
2584 ir_print_has_decl(irp, (IrInstructionHasDecl *)instruction);3198 ir_print_unwrap_err_payload(irp, (IrInstGenUnwrapErrPayload *)instruction);
2585 break;3199 break;
2586 case IrInstructionIdUndeclaredIdent:3200 case IrInstGenIdOptionalWrap:
2587 ir_print_undeclared_ident(irp, (IrInstructionUndeclaredIdent *)instruction);3201 ir_print_optional_wrap(irp, (IrInstGenOptionalWrap *)instruction);
2588 break;3202 break;
2589 case IrInstructionIdAllocaSrc:3203 case IrInstGenIdErrWrapCode:
2590 ir_print_alloca_src(irp, (IrInstructionAllocaSrc *)instruction);3204 ir_print_err_wrap_code(irp, (IrInstGenErrWrapCode *)instruction);
2591 break;3205 break;
2592 case IrInstructionIdAllocaGen:3206 case IrInstGenIdErrWrapPayload:
2593 ir_print_alloca_gen(irp, (IrInstructionAllocaGen *)instruction);3207 ir_print_err_wrap_payload(irp, (IrInstGenErrWrapPayload *)instruction);
2594 break;3208 break;
2595 case IrInstructionIdEndExpr:3209 case IrInstGenIdPtrCast:
2596 ir_print_end_expr(irp, (IrInstructionEndExpr *)instruction);3210 ir_print_ptr_cast_gen(irp, (IrInstGenPtrCast *)instruction);
2597 break;3211 break;
2598 case IrInstructionIdUnionInitNamedField:3212 case IrInstGenIdBitCast:
2599 ir_print_union_init_named_field(irp, (IrInstructionUnionInitNamedField *)instruction);3213 ir_print_bit_cast_gen(irp, (IrInstGenBitCast *)instruction);
2600 break;3214 break;
2601 case IrInstructionIdSuspendBegin:3215 case IrInstGenIdWidenOrShorten:
2602 ir_print_suspend_begin(irp, (IrInstructionSuspendBegin *)instruction);3216 ir_print_widen_or_shorten(irp, (IrInstGenWidenOrShorten *)instruction);
2603 break;3217 break;
2604 case IrInstructionIdSuspendFinish:3218 case IrInstGenIdPtrToInt:
2605 ir_print_suspend_finish(irp, (IrInstructionSuspendFinish *)instruction);3219 ir_print_ptr_to_int(irp, (IrInstGenPtrToInt *)instruction);
2606 break;3220 break;
2607 case IrInstructionIdResume:3221 case IrInstGenIdIntToPtr:
2608 ir_print_resume(irp, (IrInstructionResume *)instruction);3222 ir_print_int_to_ptr(irp, (IrInstGenIntToPtr *)instruction);
2609 break;3223 break;
2610 case IrInstructionIdAwaitSrc:3224 case IrInstGenIdIntToEnum:
2611 ir_print_await_src(irp, (IrInstructionAwaitSrc *)instruction);3225 ir_print_int_to_enum(irp, (IrInstGenIntToEnum *)instruction);
2612 break;3226 break;
2613 case IrInstructionIdAwaitGen:3227 case IrInstGenIdIntToErr:
2614 ir_print_await_gen(irp, (IrInstructionAwaitGen *)instruction);3228 ir_print_int_to_err(irp, (IrInstGenIntToErr *)instruction);
2615 break;3229 break;
2616 case IrInstructionIdSpillBegin:3230 case IrInstGenIdErrToInt:
2617 ir_print_spill_begin(irp, (IrInstructionSpillBegin *)instruction);3231 ir_print_err_to_int(irp, (IrInstGenErrToInt *)instruction);
2618 break;3232 break;
2619 case IrInstructionIdSpillEnd:3233 case IrInstGenIdTagName:
2620 ir_print_spill_end(irp, (IrInstructionSpillEnd *)instruction);3234 ir_print_tag_name(irp, (IrInstGenTagName *)instruction);
2621 break;3235 break;
2622 case IrInstructionIdVectorExtractElem:3236 case IrInstGenIdPanic:
2623 ir_print_vector_extract_elem(irp, (IrInstructionVectorExtractElem *)instruction);3237 ir_print_panic(irp, (IrInstGenPanic *)instruction);
3238 break;
3239 case IrInstGenIdFieldParentPtr:
3240 ir_print_field_parent_ptr(irp, (IrInstGenFieldParentPtr *)instruction);
3241 break;
3242 case IrInstGenIdAlignCast:
3243 ir_print_align_cast(irp, (IrInstGenAlignCast *)instruction);
3244 break;
3245 case IrInstGenIdErrorReturnTrace:
3246 ir_print_error_return_trace(irp, (IrInstGenErrorReturnTrace *)instruction);
3247 break;
3248 case IrInstGenIdAtomicRmw:
3249 ir_print_atomic_rmw(irp, (IrInstGenAtomicRmw *)instruction);
3250 break;
3251 case IrInstGenIdSaveErrRetAddr:
3252 ir_print_save_err_ret_addr(irp, (IrInstGenSaveErrRetAddr *)instruction);
3253 break;
3254 case IrInstGenIdFloatOp:
3255 ir_print_float_op(irp, (IrInstGenFloatOp *)instruction);
3256 break;
3257 case IrInstGenIdMulAdd:
3258 ir_print_mul_add(irp, (IrInstGenMulAdd *)instruction);
3259 break;
3260 case IrInstGenIdAtomicLoad:
3261 ir_print_atomic_load(irp, (IrInstGenAtomicLoad *)instruction);
3262 break;
3263 case IrInstGenIdAtomicStore:
3264 ir_print_atomic_store(irp, (IrInstGenAtomicStore *)instruction);
3265 break;
3266 case IrInstGenIdArrayToVector:
3267 ir_print_array_to_vector(irp, (IrInstGenArrayToVector *)instruction);
3268 break;
3269 case IrInstGenIdVectorToArray:
3270 ir_print_vector_to_array(irp, (IrInstGenVectorToArray *)instruction);
3271 break;
3272 case IrInstGenIdPtrOfArrayToSlice:
3273 ir_print_ptr_of_array_to_slice(irp, (IrInstGenPtrOfArrayToSlice *)instruction);
3274 break;
3275 case IrInstGenIdAssertZero:
3276 ir_print_assert_zero(irp, (IrInstGenAssertZero *)instruction);
3277 break;
3278 case IrInstGenIdAssertNonNull:
3279 ir_print_assert_non_null(irp, (IrInstGenAssertNonNull *)instruction);
3280 break;
3281 case IrInstGenIdResizeSlice:
3282 ir_print_resize_slice(irp, (IrInstGenResizeSlice *)instruction);
3283 break;
3284 case IrInstGenIdAlloca:
3285 ir_print_alloca_gen(irp, (IrInstGenAlloca *)instruction);
3286 break;
3287 case IrInstGenIdSuspendBegin:
3288 ir_print_suspend_begin(irp, (IrInstGenSuspendBegin *)instruction);
3289 break;
3290 case IrInstGenIdSuspendFinish:
3291 ir_print_suspend_finish(irp, (IrInstGenSuspendFinish *)instruction);
3292 break;
3293 case IrInstGenIdResume:
3294 ir_print_resume(irp, (IrInstGenResume *)instruction);
3295 break;
3296 case IrInstGenIdAwait:
3297 ir_print_await_gen(irp, (IrInstGenAwait *)instruction);
3298 break;
3299 case IrInstGenIdSpillBegin:
3300 ir_print_spill_begin(irp, (IrInstGenSpillBegin *)instruction);
3301 break;
3302 case IrInstGenIdSpillEnd:
3303 ir_print_spill_end(irp, (IrInstGenSpillEnd *)instruction);
3304 break;
3305 case IrInstGenIdVectorExtractElem:
3306 ir_print_vector_extract_elem(irp, (IrInstGenVectorExtractElem *)instruction);
3307 break;
3308 case IrInstGenIdVectorStoreElem:
3309 ir_print_vector_store_elem(irp, (IrInstGenVectorStoreElem *)instruction);
3310 break;
3311 case IrInstGenIdBinaryNot:
3312 ir_print_binary_not(irp, (IrInstGenBinaryNot *)instruction);
3313 break;
3314 case IrInstGenIdNegation:
3315 ir_print_negation(irp, (IrInstGenNegation *)instruction);
3316 break;
3317 case IrInstGenIdNegationWrapping:
3318 ir_print_negation_wrapping(irp, (IrInstGenNegationWrapping *)instruction);
2624 break;3319 break;
2625 }3320 }
2626 fprintf(irp->f, "\n");3321 fprintf(irp->f, "\n");
2627}3322}
26283323
2629static void irp_print_basic_block(IrPrint *irp, IrBasicBlock *current_block) {3324static void irp_print_basic_block_src(IrPrintSrc *irp, IrBasicBlockSrc *current_block) {
2630 fprintf(irp->f, "%s_%" ZIG_PRI_usize ":\n", current_block->name_hint, current_block->debug_id);3325 fprintf(irp->f, "%s_%" PRIu32 ":\n", current_block->name_hint, current_block->debug_id);
2631 for (size_t instr_i = 0; instr_i < current_block->instruction_list.length; instr_i += 1) {3326 for (size_t instr_i = 0; instr_i < current_block->instruction_list.length; instr_i += 1) {
2632 IrInstruction *instruction = current_block->instruction_list.at(instr_i);3327 IrInstSrc *instruction = current_block->instruction_list.at(instr_i);
2633 if (irp->pass != IrPassSrc) {3328 ir_print_inst_src(irp, instruction, false);
2634 irp->printed.put(instruction, 0);3329 }
2635 irp->pending.clear();3330}
2636 }3331
2637 ir_print_instruction(irp, instruction, false);3332static void irp_print_basic_block_gen(IrPrintGen *irp, IrBasicBlockGen *current_block) {
3333 fprintf(irp->f, "%s_%" PRIu32 ":\n", current_block->name_hint, current_block->debug_id);
3334 for (size_t instr_i = 0; instr_i < current_block->instruction_list.length; instr_i += 1) {
3335 IrInstGen *instruction = current_block->instruction_list.at(instr_i);
3336 irp->printed.put(instruction, 0);
3337 irp->pending.clear();
3338 ir_print_inst_gen(irp, instruction, false);
2638 for (size_t j = 0; j < irp->pending.length; ++j)3339 for (size_t j = 0; j < irp->pending.length; ++j)
2639 ir_print_instruction(irp, irp->pending.at(j), true);3340 ir_print_inst_gen(irp, irp->pending.at(j), true);
2640 }3341 }
2641}3342}
26423343
2643void ir_print_basic_block(CodeGen *codegen, FILE *f, IrBasicBlock *bb, int indent_size, IrPass pass) {3344void ir_print_basic_block_src(CodeGen *codegen, FILE *f, IrBasicBlockSrc *bb, int indent_size) {
2644 IrPrint ir_print = {};3345 IrPrintSrc ir_print = {};
2645 ir_print.pass = pass;3346 ir_print.codegen = codegen;
3347 ir_print.f = f;
3348 ir_print.indent = indent_size;
3349 ir_print.indent_size = indent_size;
3350
3351 irp_print_basic_block_src(&ir_print, bb);
3352}
3353
3354void ir_print_basic_block_gen(CodeGen *codegen, FILE *f, IrBasicBlockGen *bb, int indent_size) {
3355 IrPrintGen ir_print = {};
2646 ir_print.codegen = codegen;3356 ir_print.codegen = codegen;
2647 ir_print.f = f;3357 ir_print.f = f;
2648 ir_print.indent = indent_size;3358 ir_print.indent = indent_size;
...@@ -2651,16 +3361,28 @@ void ir_print_basic_block(CodeGen *codegen, FILE *f, IrBasicBlock *bb, int inden...@@ -2651,16 +3361,28 @@ void ir_print_basic_block(CodeGen *codegen, FILE *f, IrBasicBlock *bb, int inden
2651 ir_print.printed.init(64);3361 ir_print.printed.init(64);
2652 ir_print.pending = {};3362 ir_print.pending = {};
26533363
2654 irp_print_basic_block(&ir_print, bb);3364 irp_print_basic_block_gen(&ir_print, bb);
26553365
2656 ir_print.pending.deinit();3366 ir_print.pending.deinit();
2657 ir_print.printed.deinit();3367 ir_print.printed.deinit();
2658}3368}
26593369
2660void ir_print(CodeGen *codegen, FILE *f, IrExecutable *executable, int indent_size, IrPass pass) {3370void ir_print_src(CodeGen *codegen, FILE *f, IrExecutableSrc *executable, int indent_size) {
2661 IrPrint ir_print = {};3371 IrPrintSrc ir_print = {};
2662 IrPrint *irp = &ir_print;3372 IrPrintSrc *irp = &ir_print;
2663 irp->pass = pass;3373 irp->codegen = codegen;
3374 irp->f = f;
3375 irp->indent = indent_size;
3376 irp->indent_size = indent_size;
3377
3378 for (size_t bb_i = 0; bb_i < executable->basic_block_list.length; bb_i += 1) {
3379 irp_print_basic_block_src(irp, executable->basic_block_list.at(bb_i));
3380 }
3381}
3382
3383void ir_print_gen(CodeGen *codegen, FILE *f, IrExecutableGen *executable, int indent_size) {
3384 IrPrintGen ir_print = {};
3385 IrPrintGen *irp = &ir_print;
2664 irp->codegen = codegen;3386 irp->codegen = codegen;
2665 irp->f = f;3387 irp->f = f;
2666 irp->indent = indent_size;3388 irp->indent = indent_size;
...@@ -2670,32 +3392,27 @@ void ir_print(CodeGen *codegen, FILE *f, IrExecutable *executable, int indent_si...@@ -2670,32 +3392,27 @@ void ir_print(CodeGen *codegen, FILE *f, IrExecutable *executable, int indent_si
2670 irp->pending = {};3392 irp->pending = {};
26713393
2672 for (size_t bb_i = 0; bb_i < executable->basic_block_list.length; bb_i += 1) {3394 for (size_t bb_i = 0; bb_i < executable->basic_block_list.length; bb_i += 1) {
2673 irp_print_basic_block(irp, executable->basic_block_list.at(bb_i));3395 irp_print_basic_block_gen(irp, executable->basic_block_list.at(bb_i));
2674 }3396 }
26753397
2676 irp->pending.deinit();3398 irp->pending.deinit();
2677 irp->printed.deinit();3399 irp->printed.deinit();
2678}3400}
26793401
2680void ir_print_instruction(CodeGen *codegen, FILE *f, IrInstruction *instruction, int indent_size, IrPass pass) {3402void ir_print_inst_src(CodeGen *codegen, FILE *f, IrInstSrc *instruction, int indent_size) {
2681 IrPrint ir_print = {};3403 IrPrintSrc ir_print = {};
2682 IrPrint *irp = &ir_print;3404 IrPrintSrc *irp = &ir_print;
2683 irp->pass = pass;
2684 irp->codegen = codegen;3405 irp->codegen = codegen;
2685 irp->f = f;3406 irp->f = f;
2686 irp->indent = indent_size;3407 irp->indent = indent_size;
2687 irp->indent_size = indent_size;3408 irp->indent_size = indent_size;
2688 irp->printed = {};
2689 irp->printed.init(4);
2690 irp->pending = {};
26913409
2692 ir_print_instruction(irp, instruction, false);3410 ir_print_inst_src(irp, instruction, false);
2693}3411}
26943412
2695void ir_print_const_expr(CodeGen *codegen, FILE *f, ZigValue *value, int indent_size, IrPass pass) {3413void ir_print_inst_gen(CodeGen *codegen, FILE *f, IrInstGen *instruction, int indent_size) {
2696 IrPrint ir_print = {};3414 IrPrintGen ir_print = {};
2697 IrPrint *irp = &ir_print;3415 IrPrintGen *irp = &ir_print;
2698 irp->pass = pass;
2699 irp->codegen = codegen;3416 irp->codegen = codegen;
2700 irp->f = f;3417 irp->f = f;
2701 irp->indent = indent_size;3418 irp->indent = indent_size;
...@@ -2704,5 +3421,5 @@ void ir_print_const_expr(CodeGen *codegen, FILE *f, ZigValue *value, int indent_...@@ -2704,5 +3421,5 @@ void ir_print_const_expr(CodeGen *codegen, FILE *f, ZigValue *value, int indent_
2704 irp->printed.init(4);3421 irp->printed.init(4);
2705 irp->pending = {};3422 irp->pending = {};
27063423
2707 ir_print_const_value(irp, value);3424 ir_print_inst_gen(irp, instruction, false);
2708}3425}
src/ir_print.hpp+8-5
...@@ -12,11 +12,14 @@...@@ -12,11 +12,14 @@
1212
13#include <stdio.h>13#include <stdio.h>
1414
15void ir_print(CodeGen *codegen, FILE *f, IrExecutable *executable, int indent_size, IrPass pass);15void ir_print_src(CodeGen *codegen, FILE *f, IrExecutableSrc *executable, int indent_size);
16void ir_print_instruction(CodeGen *codegen, FILE *f, IrInstruction *instruction, int indent_size, IrPass pass);16void ir_print_gen(CodeGen *codegen, FILE *f, IrExecutableGen *executable, int indent_size);
17void ir_print_const_expr(CodeGen *codegen, FILE *f, ZigValue *value, int indent_size, IrPass pass);17void ir_print_inst_src(CodeGen *codegen, FILE *f, IrInstSrc *inst, int indent_size);
18void ir_print_basic_block(CodeGen *codegen, FILE *f, IrBasicBlock *bb, int indent_size, IrPass pass);18void ir_print_inst_gen(CodeGen *codegen, FILE *f, IrInstGen *inst, int indent_size);
19void ir_print_basic_block_src(CodeGen *codegen, FILE *f, IrBasicBlockSrc *bb, int indent_size);
20void ir_print_basic_block_gen(CodeGen *codegen, FILE *f, IrBasicBlockGen *bb, int indent_size);
1921
20const char* ir_instruction_type_str(IrInstructionId id);22const char* ir_inst_src_type_str(IrInstSrcId id);
23const char* ir_inst_gen_type_str(IrInstGenId id);
2124
22#endif25#endif
src/main.cpp+30-91
...@@ -93,6 +93,7 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {...@@ -93,6 +93,7 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {
93 " --verbose-llvm-ir enable compiler debug output for LLVM IR\n"93 " --verbose-llvm-ir enable compiler debug output for LLVM IR\n"
94 " --verbose-cimport enable compiler debug output for C imports\n"94 " --verbose-cimport enable compiler debug output for C imports\n"
95 " --verbose-cc enable compiler debug output for C compilation\n"95 " --verbose-cc enable compiler debug output for C compilation\n"
96 " --verbose-llvm-cpu-features enable compiler debug output for LLVM CPU features\n"
96 " -dirafter [dir] add directory to AFTER include search path\n"97 " -dirafter [dir] add directory to AFTER include search path\n"
97 " -isystem [dir] add directory to SYSTEM include search path\n"98 " -isystem [dir] add directory to SYSTEM include search path\n"
98 " -I[dir] add directory to include search path\n"99 " -I[dir] add directory to include search path\n"
...@@ -100,6 +101,8 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {...@@ -100,6 +101,8 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {
100 " --override-lib-dir [arg] override path to Zig lib directory\n"101 " --override-lib-dir [arg] override path to Zig lib directory\n"
101 " -ffunction-sections places each function in a separate section\n"102 " -ffunction-sections places each function in a separate section\n"
102 " -D[macro]=[value] define C [macro] to [value] (1 if [value] omitted)\n"103 " -D[macro]=[value] define C [macro] to [value] (1 if [value] omitted)\n"
104 " -target-cpu [cpu] target one specific CPU by name\n"
105 " -target-feature [features] specify the set of CPU features to target\n"
103 "\n"106 "\n"
104 "Link Options:\n"107 "Link Options:\n"
105 " --bundle-compiler-rt for static libraries, include compiler-rt symbols\n"108 " --bundle-compiler-rt for static libraries, include compiler-rt symbols\n"
...@@ -141,100 +144,18 @@ static int print_libc_usage(const char *arg0, FILE *file, int return_code) {...@@ -141,100 +144,18 @@ static int print_libc_usage(const char *arg0, FILE *file, int return_code) {
141 "You can save this into a file and then edit the paths to create a cross\n"144 "You can save this into a file and then edit the paths to create a cross\n"
142 "compilation libc kit. Then you can pass `--libc [file]` for Zig to use it.\n"145 "compilation libc kit. Then you can pass `--libc [file]` for Zig to use it.\n"
143 "\n"146 "\n"
144 "When compiling natively and no `--libc` argument provided, Zig automatically\n"147 "When compiling natively and no `--libc` argument provided, Zig will create\n"
145 "creates zig-cache/native_libc.txt so that it does not have to detect libc\n"148 "`%s/native_libc.txt`\n"
146 "on every invocation. You can remove this file to have Zig re-detect the\n"149 "so that it does not have to detect libc on every invocation. You can remove\n"
147 "native libc.\n"150 "this file to have Zig re-detect the native libc.\n"
148 "\n\n"151 "\n\n"
149 "Usage: %s libc [file]\n"152 "Usage: %s libc [file]\n"
150 "\n"153 "\n"
151 "Parse a libc installation text file and validate it.\n"154 "Parse a libc installation text file and validate it.\n"
152 , arg0, arg0);155 , arg0, buf_ptr(get_global_cache_dir()), arg0);
153 return return_code;156 return return_code;
154}157}
155158
156static bool arch_available_in_llvm(ZigLLVM_ArchType arch) {
157 LLVMTargetRef target_ref;
158 char *err_msg = nullptr;
159 char triple_string[128];
160 sprintf(triple_string, "%s-unknown-unknown-unknown", ZigLLVMGetArchTypeName(arch));
161 return !LLVMGetTargetFromTriple(triple_string, &target_ref, &err_msg);
162}
163
164static int print_target_list(FILE *f) {
165 ZigTarget native;
166 get_native_target(&native);
167
168 fprintf(f, "Architectures:\n");
169 size_t arch_count = target_arch_count();
170 for (size_t arch_i = 0; arch_i < arch_count; arch_i += 1) {
171 ZigLLVM_ArchType arch = target_arch_enum(arch_i);
172 if (!arch_available_in_llvm(arch))
173 continue;
174 const char *arch_name = target_arch_name(arch);
175 SubArchList sub_arch_list = target_subarch_list(arch);
176 size_t sub_count = target_subarch_count(sub_arch_list);
177 const char *arch_native_str = (native.arch == arch) ? " (native)" : "";
178 fprintf(f, " %s%s\n", arch_name, arch_native_str);
179 for (size_t sub_i = 0; sub_i < sub_count; sub_i += 1) {
180 ZigLLVM_SubArchType sub = target_subarch_enum(sub_arch_list, sub_i);
181 const char *sub_name = target_subarch_name(sub);
182 const char *sub_native_str = (native.arch == arch && native.sub_arch == sub) ? " (native)" : "";
183 fprintf(f, " %s%s\n", sub_name, sub_native_str);
184 }
185 }
186
187 fprintf(f, "\nOperating Systems:\n");
188 size_t os_count = target_os_count();
189 for (size_t i = 0; i < os_count; i += 1) {
190 Os os_type = target_os_enum(i);
191 const char *native_str = (native.os == os_type) ? " (native)" : "";
192 fprintf(f, " %s%s\n", target_os_name(os_type), native_str);
193 }
194
195 fprintf(f, "\nC ABIs:\n");
196 size_t abi_count = target_abi_count();
197 for (size_t i = 0; i < abi_count; i += 1) {
198 ZigLLVM_EnvironmentType abi = target_abi_enum(i);
199 const char *native_str = (native.abi == abi) ? " (native)" : "";
200 fprintf(f, " %s%s\n", target_abi_name(abi), native_str);
201 }
202
203 fprintf(f, "\nAvailable libcs:\n");
204 size_t libc_count = target_libc_count();
205 for (size_t i = 0; i < libc_count; i += 1) {
206 ZigTarget libc_target;
207 target_libc_enum(i, &libc_target);
208 bool is_native = native.arch == libc_target.arch &&
209 native.os == libc_target.os &&
210 native.abi == libc_target.abi;
211 const char *native_str = is_native ? " (native)" : "";
212 fprintf(f, " %s-%s-%s%s\n", target_arch_name(libc_target.arch),
213 target_os_name(libc_target.os), target_abi_name(libc_target.abi), native_str);
214 }
215
216 fprintf(f, "\nAvailable glibc versions:\n");
217 ZigGLibCAbi *glibc_abi;
218 Error err;
219 if ((err = glibc_load_metadata(&glibc_abi, get_zig_lib_dir(), true))) {
220 return EXIT_FAILURE;
221 }
222 for (size_t i = 0; i < glibc_abi->all_versions.length; i += 1) {
223 ZigGLibCVersion *this_ver = &glibc_abi->all_versions.at(i);
224 bool is_native = native.glibc_version != nullptr &&
225 native.glibc_version->major == this_ver->major &&
226 native.glibc_version->minor == this_ver->minor &&
227 native.glibc_version->patch == this_ver->patch;
228 const char *native_str = is_native ? " (native)" : "";
229 if (this_ver->patch == 0) {
230 fprintf(f, " %d.%d%s\n", this_ver->major, this_ver->minor, native_str);
231 } else {
232 fprintf(f, " %d.%d.%d%s\n", this_ver->major, this_ver->minor, this_ver->patch, native_str);
233 }
234 }
235 return EXIT_SUCCESS;
236}
237
238enum Cmd {159enum Cmd {
239 CmdNone,160 CmdNone,
240 CmdBuild,161 CmdBuild,
...@@ -478,6 +399,7 @@ int main(int argc, char **argv) {...@@ -478,6 +399,7 @@ int main(int argc, char **argv) {
478 bool verbose_llvm_ir = false;399 bool verbose_llvm_ir = false;
479 bool verbose_cimport = false;400 bool verbose_cimport = false;
480 bool verbose_cc = false;401 bool verbose_cc = false;
402 bool verbose_llvm_cpu_features = false;
481 bool link_eh_frame_hdr = false;403 bool link_eh_frame_hdr = false;
482 ErrColor color = ErrColorAuto;404 ErrColor color = ErrColorAuto;
483 CacheOpt enable_cache = CacheOptAuto;405 CacheOpt enable_cache = CacheOptAuto;
...@@ -528,6 +450,8 @@ int main(int argc, char **argv) {...@@ -528,6 +450,8 @@ int main(int argc, char **argv) {
528 WantStackCheck want_stack_check = WantStackCheckAuto;450 WantStackCheck want_stack_check = WantStackCheckAuto;
529 WantCSanitize want_sanitize_c = WantCSanitizeAuto;451 WantCSanitize want_sanitize_c = WantCSanitizeAuto;
530 bool function_sections = false;452 bool function_sections = false;
453 const char *cpu = nullptr;
454 const char *features = nullptr;
531455
532 ZigList<const char *> llvm_argv = {0};456 ZigList<const char *> llvm_argv = {0};
533 llvm_argv.append("zig (LLVM option parsing)");457 llvm_argv.append("zig (LLVM option parsing)");
...@@ -692,6 +616,8 @@ int main(int argc, char **argv) {...@@ -692,6 +616,8 @@ int main(int argc, char **argv) {
692 verbose_cimport = true;616 verbose_cimport = true;
693 } else if (strcmp(arg, "--verbose-cc") == 0) {617 } else if (strcmp(arg, "--verbose-cc") == 0) {
694 verbose_cc = true;618 verbose_cc = true;
619 } else if (strcmp(arg, "--verbose-llvm-cpu-features") == 0) {
620 verbose_llvm_cpu_features = true;
695 } else if (strcmp(arg, "-rdynamic") == 0) {621 } else if (strcmp(arg, "-rdynamic") == 0) {
696 rdynamic = true;622 rdynamic = true;
697 } else if (strcmp(arg, "--each-lib-rpath") == 0) {623 } else if (strcmp(arg, "--each-lib-rpath") == 0) {
...@@ -936,6 +862,10 @@ int main(int argc, char **argv) {...@@ -936,6 +862,10 @@ int main(int argc, char **argv) {
936 , argv[i]);862 , argv[i]);
937 return EXIT_FAILURE;863 return EXIT_FAILURE;
938 }864 }
865 } else if (strcmp(arg, "-target-cpu") == 0) {
866 cpu = argv[i];
867 } else if (strcmp(arg, "-target-feature") == 0) {
868 features = argv[i];
939 } else {869 } else {
940 fprintf(stderr, "Invalid argument: %s\n", arg);870 fprintf(stderr, "Invalid argument: %s\n", arg);
941 return print_error_usage(arg0);871 return print_error_usage(arg0);
...@@ -1051,15 +981,22 @@ int main(int argc, char **argv) {...@@ -1051,15 +981,22 @@ int main(int argc, char **argv) {
1051 }981 }
1052 }982 }
1053983
984 Buf zig_triple_buf = BUF_INIT;
985 target_triple_zig(&zig_triple_buf, &target);
986
987 const char *stage2_triple_arg = target.is_native ? nullptr : buf_ptr(&zig_triple_buf);
988 if ((err = stage2_cpu_features_parse(&target.cpu_features, stage2_triple_arg, cpu, features))) {
989 fprintf(stderr, "unable to initialize CPU features: %s\n", err_str(err));
990 return main_exit(root_progress_node, EXIT_FAILURE);
991 }
992
1054 if (output_dir != nullptr && enable_cache == CacheOptOn) {993 if (output_dir != nullptr && enable_cache == CacheOptOn) {
1055 fprintf(stderr, "`--output-dir` is incompatible with --cache on.\n");994 fprintf(stderr, "`--output-dir` is incompatible with --cache on.\n");
1056 return print_error_usage(arg0);995 return print_error_usage(arg0);
1057 }996 }
1058997
1059 if (target_requires_pic(&target, have_libc) && want_pic == WantPICDisabled) {998 if (target_requires_pic(&target, have_libc) && want_pic == WantPICDisabled) {
1060 Buf triple_buf = BUF_INIT;999 fprintf(stderr, "`--disable-pic` is incompatible with target '%s'\n", buf_ptr(&zig_triple_buf));
1061 target_triple_zig(&triple_buf, &target);
1062 fprintf(stderr, "`--disable-pic` is incompatible with target '%s'\n", buf_ptr(&triple_buf));
1063 return print_error_usage(arg0);1000 return print_error_usage(arg0);
1064 }1001 }
10651002
...@@ -1226,6 +1163,7 @@ int main(int argc, char **argv) {...@@ -1226,6 +1163,7 @@ int main(int argc, char **argv) {
1226 g->verbose_llvm_ir = verbose_llvm_ir;1163 g->verbose_llvm_ir = verbose_llvm_ir;
1227 g->verbose_cimport = verbose_cimport;1164 g->verbose_cimport = verbose_cimport;
1228 g->verbose_cc = verbose_cc;1165 g->verbose_cc = verbose_cc;
1166 g->verbose_llvm_cpu_features = verbose_llvm_cpu_features;
1229 g->output_dir = output_dir;1167 g->output_dir = output_dir;
1230 g->disable_gen_h = disable_gen_h;1168 g->disable_gen_h = disable_gen_h;
1231 g->bundle_compiler_rt = bundle_compiler_rt;1169 g->bundle_compiler_rt = bundle_compiler_rt;
...@@ -1233,6 +1171,7 @@ int main(int argc, char **argv) {...@@ -1233,6 +1171,7 @@ int main(int argc, char **argv) {
1233 g->system_linker_hack = system_linker_hack;1171 g->system_linker_hack = system_linker_hack;
1234 g->function_sections = function_sections;1172 g->function_sections = function_sections;
12351173
1174
1236 for (size_t i = 0; i < lib_dirs.length; i += 1) {1175 for (size_t i = 0; i < lib_dirs.length; i += 1) {
1237 codegen_add_lib_dir(g, lib_dirs.at(i));1176 codegen_add_lib_dir(g, lib_dirs.at(i));
1238 }1177 }
...@@ -1413,7 +1352,7 @@ int main(int argc, char **argv) {...@@ -1413,7 +1352,7 @@ int main(int argc, char **argv) {
1413 return main_exit(root_progress_node, EXIT_SUCCESS);1352 return main_exit(root_progress_node, EXIT_SUCCESS);
1414 }1353 }
1415 case CmdTargets:1354 case CmdTargets:
1416 return print_target_list(stdout);1355 return stage2_cmd_targets(buf_ptr(&zig_triple_buf));
1417 case CmdNone:1356 case CmdNone:
1418 return print_full_usage(arg0, stderr, EXIT_FAILURE);1357 return print_full_usage(arg0, stderr, EXIT_FAILURE);
1419 }1358 }
src/parser.cpp+1-1
...@@ -147,7 +147,7 @@ static void ast_invalid_token_error(ParseContext *pc, Token *token) {...@@ -147,7 +147,7 @@ static void ast_invalid_token_error(ParseContext *pc, Token *token) {
147}147}
148148
149static AstNode *ast_create_node_no_line_info(ParseContext *pc, NodeType type) {149static AstNode *ast_create_node_no_line_info(ParseContext *pc, NodeType type) {
150 AstNode *node = allocate<AstNode>(1);150 AstNode *node = allocate<AstNode>(1, "AstNode");
151 node->type = type;151 node->type = type;
152 node->owner = pc->owner;152 node->owner = pc->owner;
153 return node;153 return node;
src/target.cpp+6-9
...@@ -57,9 +57,6 @@ static const ZigLLVM_SubArchType subarch_list_arm64[] = {...@@ -57,9 +57,6 @@ static const ZigLLVM_SubArchType subarch_list_arm64[] = {
57 ZigLLVM_ARMSubArch_v8_2a,57 ZigLLVM_ARMSubArch_v8_2a,
58 ZigLLVM_ARMSubArch_v8_1a,58 ZigLLVM_ARMSubArch_v8_1a,
59 ZigLLVM_ARMSubArch_v8,59 ZigLLVM_ARMSubArch_v8,
60 ZigLLVM_ARMSubArch_v8r,
61 ZigLLVM_ARMSubArch_v8m_baseline,
62 ZigLLVM_ARMSubArch_v8m_mainline,
63};60};
6461
65static const ZigLLVM_SubArchType subarch_list_kalimba[] = {62static const ZigLLVM_SubArchType subarch_list_kalimba[] = {
...@@ -683,7 +680,7 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) {...@@ -683,7 +680,7 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) {
683 case ZigLLVM_ARMSubArch_v8_1a:680 case ZigLLVM_ARMSubArch_v8_1a:
684 return "v8_1a";681 return "v8_1a";
685 case ZigLLVM_ARMSubArch_v8:682 case ZigLLVM_ARMSubArch_v8:
686 return "v8";683 return "v8a";
687 case ZigLLVM_ARMSubArch_v8r:684 case ZigLLVM_ARMSubArch_v8r:
688 return "v8r";685 return "v8r";
689 case ZigLLVM_ARMSubArch_v8m_baseline:686 case ZigLLVM_ARMSubArch_v8m_baseline:
...@@ -693,7 +690,7 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) {...@@ -693,7 +690,7 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) {
693 case ZigLLVM_ARMSubArch_v8_1m_mainline:690 case ZigLLVM_ARMSubArch_v8_1m_mainline:
694 return "v8_1m_mainline";691 return "v8_1m_mainline";
695 case ZigLLVM_ARMSubArch_v7:692 case ZigLLVM_ARMSubArch_v7:
696 return "v7";693 return "v7a";
697 case ZigLLVM_ARMSubArch_v7em:694 case ZigLLVM_ARMSubArch_v7em:
698 return "v7em";695 return "v7em";
699 case ZigLLVM_ARMSubArch_v7m:696 case ZigLLVM_ARMSubArch_v7m:
...@@ -832,10 +829,10 @@ void init_all_targets(void) {...@@ -832,10 +829,10 @@ void init_all_targets(void) {
832void target_triple_zig(Buf *triple, const ZigTarget *target) {829void target_triple_zig(Buf *triple, const ZigTarget *target) {
833 buf_resize(triple, 0);830 buf_resize(triple, 0);
834 buf_appendf(triple, "%s%s-%s-%s",831 buf_appendf(triple, "%s%s-%s-%s",
835 ZigLLVMGetArchTypeName(target->arch),832 target_arch_name(target->arch),
836 ZigLLVMGetSubArchTypeName(target->sub_arch),833 target_subarch_name(target->sub_arch),
837 ZigLLVMGetOSTypeName(get_llvm_os_type(target->os)),834 target_os_name(target->os),
838 ZigLLVMGetEnvironmentTypeName(target->abi));835 target_abi_name(target->abi));
839}836}
840837
841void target_triple_llvm(Buf *triple, const ZigTarget *target) {838void target_triple_llvm(Buf *triple, const ZigTarget *target) {
src/target.hpp+1
...@@ -91,6 +91,7 @@ struct ZigTarget {...@@ -91,6 +91,7 @@ struct ZigTarget {
91 Os os;91 Os os;
92 ZigLLVM_EnvironmentType abi;92 ZigLLVM_EnvironmentType abi;
93 ZigGLibCVersion *glibc_version; // null means default93 ZigGLibCVersion *glibc_version; // null means default
94 Stage2CpuFeatures *cpu_features;
94 bool is_native;95 bool is_native;
95};96};
9697
src/userland.cpp+57-1
...@@ -2,7 +2,8 @@...@@ -2,7 +2,8 @@
2// src-self-hosted/stage1.zig2// src-self-hosted/stage1.zig
33
4#include "userland.h"4#include "userland.h"
5#include "ast_render.hpp"5#include "util.hpp"
6#include "zig_llvm.h"
6#include <stdio.h>7#include <stdio.h>
7#include <stdlib.h>8#include <stdlib.h>
8#include <string.h>9#include <string.h>
...@@ -88,3 +89,58 @@ void stage2_progress_end(Stage2ProgressNode *node) {}...@@ -88,3 +89,58 @@ void stage2_progress_end(Stage2ProgressNode *node) {}
88void stage2_progress_complete_one(Stage2ProgressNode *node) {}89void stage2_progress_complete_one(Stage2ProgressNode *node) {}
89void stage2_progress_disable_tty(Stage2Progress *progress) {}90void stage2_progress_disable_tty(Stage2Progress *progress) {}
90void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items){}91void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items){}
92
93struct Stage2CpuFeatures {
94 const char *llvm_cpu_name;
95 const char *llvm_cpu_features;
96 const char *builtin_str;
97 const char *cache_hash;
98};
99
100Error stage2_cpu_features_parse(struct Stage2CpuFeatures **out, const char *zig_triple,
101 const char *cpu_name, const char *cpu_features)
102{
103 if (zig_triple == nullptr) {
104 Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
105 result->llvm_cpu_name = ZigLLVMGetHostCPUName();
106 result->llvm_cpu_features = ZigLLVMGetNativeFeatures();
107 result->builtin_str = "arch.getBaselineCpuFeatures();\n";
108 result->cache_hash = "native\n\n";
109 *out = result;
110 return ErrorNone;
111 }
112 if (cpu_name == nullptr && cpu_features == nullptr) {
113 Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
114 result->builtin_str = "arch.getBaselineCpuFeatures();\n";
115 result->cache_hash = "\n\n";
116 *out = result;
117 return ErrorNone;
118 }
119
120 const char *msg = "stage0 called stage2_cpu_features_parse with non-null cpu name or features";
121 stage2_panic(msg, strlen(msg));
122}
123
124void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features,
125 const char **ptr, size_t *len)
126{
127 *ptr = cpu_features->cache_hash;
128 *len = strlen(cpu_features->cache_hash);
129}
130const char *stage2_cpu_features_get_llvm_cpu(const Stage2CpuFeatures *cpu_features) {
131 return cpu_features->llvm_cpu_name;
132}
133const char *stage2_cpu_features_get_llvm_features(const Stage2CpuFeatures *cpu_features) {
134 return cpu_features->llvm_cpu_features;
135}
136void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features,
137 const char **ptr, size_t *len)
138{
139 *ptr = cpu_features->builtin_str;
140 *len = strlen(cpu_features->builtin_str);
141}
142
143int stage2_cmd_targets(const char *zig_triple) {
144 const char *msg = "stage0 called stage2_cmd_targets";
145 stage2_panic(msg, strlen(msg));
146}
src/userland.h+31
...@@ -78,6 +78,12 @@ enum Error {...@@ -78,6 +78,12 @@ enum Error {
78 ErrorNotLazy,78 ErrorNotLazy,
79 ErrorIsAsync,79 ErrorIsAsync,
80 ErrorImportOutsidePkgPath,80 ErrorImportOutsidePkgPath,
81 ErrorUnknownCpu,
82 ErrorUnknownSubArchitecture,
83 ErrorUnknownCpuFeature,
84 ErrorInvalidCpuFeatures,
85 ErrorInvalidLlvmCpuFeaturesFormat,
86 ErrorUnknownApplicationBinaryInterface,
81};87};
8288
83// ABI warning89// ABI warning
...@@ -174,4 +180,29 @@ ZIG_EXTERN_C void stage2_progress_complete_one(Stage2ProgressNode *node);...@@ -174,4 +180,29 @@ ZIG_EXTERN_C void stage2_progress_complete_one(Stage2ProgressNode *node);
174ZIG_EXTERN_C void stage2_progress_update_node(Stage2ProgressNode *node,180ZIG_EXTERN_C void stage2_progress_update_node(Stage2ProgressNode *node,
175 size_t completed_count, size_t estimated_total_items);181 size_t completed_count, size_t estimated_total_items);
176182
183// ABI warning
184struct Stage2CpuFeatures;
185
186// ABI warning
187ZIG_EXTERN_C Error stage2_cpu_features_parse(struct Stage2CpuFeatures **result,
188 const char *zig_triple, const char *cpu_name, const char *cpu_features);
189
190// ABI warning
191ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_cpu(const struct Stage2CpuFeatures *cpu_features);
192
193// ABI warning
194ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_features(const struct Stage2CpuFeatures *cpu_features);
195
196// ABI warning
197ZIG_EXTERN_C void stage2_cpu_features_get_builtin_str(const struct Stage2CpuFeatures *cpu_features,
198 const char **ptr, size_t *len);
199
200// ABI warning
201ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const struct Stage2CpuFeatures *cpu_features,
202 const char **ptr, size_t *len);
203
204// ABI warning
205ZIG_EXTERN_C int stage2_cmd_targets(const char *zig_triple);
206
207
177#endif208#endif
src/zig_clang.cpp+9
...@@ -1625,6 +1625,10 @@ unsigned ZigClangFunctionDecl_getAlignedAttribute(const struct ZigClangFunctionD...@@ -1625,6 +1625,10 @@ unsigned ZigClangFunctionDecl_getAlignedAttribute(const struct ZigClangFunctionD
1625 return 0;1625 return 0;
1626}1626}
16271627
1628ZigClangQualType ZigClangParmVarDecl_getOriginalType(const struct ZigClangParmVarDecl *self) {
1629 return bitcast(reinterpret_cast<const clang::ParmVarDecl *>(self)->getOriginalType());
1630}
1631
1628const ZigClangRecordDecl *ZigClangRecordDecl_getDefinition(const ZigClangRecordDecl *zig_record_decl) {1632const ZigClangRecordDecl *ZigClangRecordDecl_getDefinition(const ZigClangRecordDecl *zig_record_decl) {
1629 const clang::RecordDecl *record_decl = reinterpret_cast<const clang::RecordDecl *>(zig_record_decl);1633 const clang::RecordDecl *record_decl = reinterpret_cast<const clang::RecordDecl *>(zig_record_decl);
1630 const clang::RecordDecl *definition = record_decl->getDefinition();1634 const clang::RecordDecl *definition = record_decl->getDefinition();
...@@ -1877,6 +1881,11 @@ bool ZigClangType_isRecordType(const ZigClangType *self) {...@@ -1877,6 +1881,11 @@ bool ZigClangType_isRecordType(const ZigClangType *self) {
1877 return casted->isRecordType();1881 return casted->isRecordType();
1878}1882}
18791883
1884bool ZigClangType_isConstantArrayType(const ZigClangType *self) {
1885 auto casted = reinterpret_cast<const clang::Type *>(self);
1886 return casted->isConstantArrayType();
1887}
1888
1880const char *ZigClangType_getTypeClassName(const ZigClangType *self) {1889const char *ZigClangType_getTypeClassName(const ZigClangType *self) {
1881 auto casted = reinterpret_cast<const clang::Type *>(self);1890 auto casted = reinterpret_cast<const clang::Type *>(self);
1882 return casted->getTypeClassName();1891 return casted->getTypeClassName();
src/zig_clang.h+3
...@@ -866,6 +866,8 @@ ZIG_EXTERN_C const char* ZigClangVarDecl_getSectionAttribute(const struct ZigCla...@@ -866,6 +866,8 @@ ZIG_EXTERN_C const char* ZigClangVarDecl_getSectionAttribute(const struct ZigCla
866ZIG_EXTERN_C unsigned ZigClangVarDecl_getAlignedAttribute(const struct ZigClangVarDecl *self, const ZigClangASTContext* ctx);866ZIG_EXTERN_C unsigned ZigClangVarDecl_getAlignedAttribute(const struct ZigClangVarDecl *self, const ZigClangASTContext* ctx);
867ZIG_EXTERN_C unsigned ZigClangFunctionDecl_getAlignedAttribute(const struct ZigClangFunctionDecl *self, const ZigClangASTContext* ctx);867ZIG_EXTERN_C unsigned ZigClangFunctionDecl_getAlignedAttribute(const struct ZigClangFunctionDecl *self, const ZigClangASTContext* ctx);
868868
869ZIG_EXTERN_C struct ZigClangQualType ZigClangParmVarDecl_getOriginalType(const struct ZigClangParmVarDecl *self);
870
869ZIG_EXTERN_C bool ZigClangRecordDecl_getPackedAttribute(const struct ZigClangRecordDecl *);871ZIG_EXTERN_C bool ZigClangRecordDecl_getPackedAttribute(const struct ZigClangRecordDecl *);
870ZIG_EXTERN_C const struct ZigClangRecordDecl *ZigClangRecordDecl_getDefinition(const struct ZigClangRecordDecl *);872ZIG_EXTERN_C const struct ZigClangRecordDecl *ZigClangRecordDecl_getDefinition(const struct ZigClangRecordDecl *);
871ZIG_EXTERN_C const struct ZigClangEnumDecl *ZigClangEnumDecl_getDefinition(const struct ZigClangEnumDecl *);873ZIG_EXTERN_C const struct ZigClangEnumDecl *ZigClangEnumDecl_getDefinition(const struct ZigClangEnumDecl *);
...@@ -945,6 +947,7 @@ ZIG_EXTERN_C bool ZigClangType_isBooleanType(const struct ZigClangType *self);...@@ -945,6 +947,7 @@ ZIG_EXTERN_C bool ZigClangType_isBooleanType(const struct ZigClangType *self);
945ZIG_EXTERN_C bool ZigClangType_isVoidType(const struct ZigClangType *self);947ZIG_EXTERN_C bool ZigClangType_isVoidType(const struct ZigClangType *self);
946ZIG_EXTERN_C bool ZigClangType_isArrayType(const struct ZigClangType *self);948ZIG_EXTERN_C bool ZigClangType_isArrayType(const struct ZigClangType *self);
947ZIG_EXTERN_C bool ZigClangType_isRecordType(const struct ZigClangType *self);949ZIG_EXTERN_C bool ZigClangType_isRecordType(const struct ZigClangType *self);
950ZIG_EXTERN_C bool ZigClangType_isConstantArrayType(const ZigClangType *self);
948ZIG_EXTERN_C const char *ZigClangType_getTypeClassName(const struct ZigClangType *self);951ZIG_EXTERN_C const char *ZigClangType_getTypeClassName(const struct ZigClangType *self);
949ZIG_EXTERN_C const struct ZigClangArrayType *ZigClangType_getAsArrayTypeUnsafe(const struct ZigClangType *self);952ZIG_EXTERN_C const struct ZigClangArrayType *ZigClangType_getAsArrayTypeUnsafe(const struct ZigClangType *self);
950ZIG_EXTERN_C const ZigClangRecordType *ZigClangType_getAsRecordType(const ZigClangType *self);953ZIG_EXTERN_C const ZigClangRecordType *ZigClangType_getAsRecordType(const ZigClangType *self);
src/zig_llvm.cpp+2-2
...@@ -821,7 +821,7 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {...@@ -821,7 +821,7 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {
821 case ZigLLVM_ARMSubArch_v8_1a:821 case ZigLLVM_ARMSubArch_v8_1a:
822 return "v8.1a";822 return "v8.1a";
823 case ZigLLVM_ARMSubArch_v8:823 case ZigLLVM_ARMSubArch_v8:
824 return "v8";824 return "v8a";
825 case ZigLLVM_ARMSubArch_v8r:825 case ZigLLVM_ARMSubArch_v8r:
826 return "v8r";826 return "v8r";
827 case ZigLLVM_ARMSubArch_v8m_baseline:827 case ZigLLVM_ARMSubArch_v8m_baseline:
...@@ -831,7 +831,7 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {...@@ -831,7 +831,7 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {
831 case ZigLLVM_ARMSubArch_v8_1m_mainline:831 case ZigLLVM_ARMSubArch_v8_1m_mainline:
832 return "v8.1m.main";832 return "v8.1m.main";
833 case ZigLLVM_ARMSubArch_v7:833 case ZigLLVM_ARMSubArch_v7:
834 return "v7";834 return "v7a";
835 case ZigLLVM_ARMSubArch_v7em:835 case ZigLLVM_ARMSubArch_v7em:
836 return "v7em";836 return "v7em";
837 case ZigLLVM_ARMSubArch_v7m:837 case ZigLLVM_ARMSubArch_v7m:
test/compile_errors.zig+63-23
...@@ -1,7 +1,64 @@...@@ -1,7 +1,64 @@
1const tests = @import("tests.zig");1const tests = @import("tests.zig");
2const builtin = @import("builtin");2const builtin = @import("builtin");
3const Target = @import("std").Target;
34
4pub fn addCases(cases: *tests.CompileErrorContext) void {5pub fn addCases(cases: *tests.CompileErrorContext) void {
6 cases.addTest("dependency loop in top-level decl with @TypeInfo",
7 \\export const foo = @typeInfo(@This());
8 , &[_][]const u8{
9 "tmp.zig:1:20: error: dependency loop detected",
10 });
11
12 cases.addTest("non-exhaustive enums",
13 \\const A = enum {
14 \\ a,
15 \\ b,
16 \\ _ = 1,
17 \\};
18 \\const B = enum(u1) {
19 \\ a,
20 \\ _,
21 \\ b,
22 \\};
23 \\const C = enum(u1) {
24 \\ a,
25 \\ b,
26 \\ _,
27 \\};
28 \\pub export fn entry() void {
29 \\ _ = A;
30 \\ _ = B;
31 \\ _ = C;
32 \\}
33 , &[_][]const u8{
34 "tmp.zig:4:5: error: non-exhaustive enum must specify size",
35 "error: value assigned to '_' field of non-exhaustive enum",
36 "error: non-exhaustive enum specifies every value",
37 "error: '_' field of non-exhaustive enum must be last",
38 });
39
40 cases.addTest("switching with non-exhaustive enums",
41 \\const E = enum(u8) {
42 \\ a,
43 \\ b,
44 \\ _,
45 \\};
46 \\pub export fn entry() void {
47 \\ var e: E = .b;
48 \\ switch (e) { // error: switch not handling the tag `b`
49 \\ .a => {},
50 \\ _ => {},
51 \\ }
52 \\ switch (e) { // error: switch on non-exhaustive enum must include `else` or `_` prong
53 \\ .a => {},
54 \\ .b => {},
55 \\ }
56 \\}
57 , &[_][]const u8{
58 "tmp.zig:8:5: error: enumeration value 'E.b' not handled in switch",
59 "tmp.zig:12:5: error: switch on non-exhaustive enum must include `else` or `_` prong",
60 });
61
5 cases.addTest("@export with empty name string",62 cases.addTest("@export with empty name string",
6 \\pub export fn entry() void { }63 \\pub export fn entry() void { }
7 \\comptime {64 \\comptime {
...@@ -139,25 +196,6 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {...@@ -139,25 +196,6 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
139 "tmp.zig:2:13: error: pointer type '[*]align(4) u8' requires aligned address",196 "tmp.zig:2:13: error: pointer type '[*]align(4) u8' requires aligned address",
140 });197 });
141198
142 cases.add("switch on extern enum missing else prong",
143 \\const i = extern enum {
144 \\ n = 0,
145 \\ o = 2,
146 \\ p = 4,
147 \\ q = 4,
148 \\};
149 \\pub fn main() void {
150 \\ var x = @intToEnum(i, 52);
151 \\ switch (x) {
152 \\ .n,
153 \\ .o,
154 \\ .p => unreachable,
155 \\ }
156 \\}
157 , &[_][]const u8{
158 "tmp.zig:9:5: error: switch on an extern enum must have an else prong",
159 });
160
161 cases.add("invalid float literal",199 cases.add("invalid float literal",
162 \\const std = @import("std");200 \\const std = @import("std");
163 \\201 \\
...@@ -241,9 +279,10 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {...@@ -241,9 +279,10 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
241 , &[_][]const u8{279 , &[_][]const u8{
242 "tmp.zig:3:5: error: target arch 'wasm32' does not support calling with a new stack",280 "tmp.zig:3:5: error: target arch 'wasm32' does not support calling with a new stack",
243 });281 });
244 tc.target = tests.Target{282 tc.target = Target{
245 .Cross = tests.CrossTarget{283 .Cross = .{
246 .arch = .wasm32,284 .arch = .wasm32,
285 .cpu_features = Target.Arch.wasm32.getBaselineCpuFeatures(),
247 .os = .wasi,286 .os = .wasi,
248 .abi = .none,287 .abi = .none,
249 },288 },
...@@ -642,9 +681,10 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {...@@ -642,9 +681,10 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
642 , &[_][]const u8{681 , &[_][]const u8{
643 "tmp.zig:2:14: error: could not find 'foo' in the inputs or outputs",682 "tmp.zig:2:14: error: could not find 'foo' in the inputs or outputs",
644 });683 });
645 tc.target = tests.Target{684 tc.target = Target{
646 .Cross = tests.CrossTarget{685 .Cross = .{
647 .arch = .x86_64,686 .arch = .x86_64,
687 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
648 .os = .linux,688 .os = .linux,
649 .abi = .gnu,689 .abi = .gnu,
650 },690 },
test/stack_traces.zig+98
...@@ -51,11 +51,15 @@ pub fn addCases(cases: *tests.StackTracesContext) void {...@@ -51,11 +51,15 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
51 // debug51 // debug
52 \\error: TheSkyIsFalling52 \\error: TheSkyIsFalling
53 \\source.zig:4:5: [address] in main (test)53 \\source.zig:4:5: [address] in main (test)
54 \\ return error.TheSkyIsFalling;
55 \\ ^
54 \\56 \\
55 ,57 ,
56 // release-safe58 // release-safe
57 \\error: TheSkyIsFalling59 \\error: TheSkyIsFalling
58 \\source.zig:4:5: [address] in std.start.main (test)60 \\source.zig:4:5: [address] in std.start.main (test)
61 \\ return error.TheSkyIsFalling;
62 \\ ^
59 \\63 \\
60 ,64 ,
61 // release-fast65 // release-fast
...@@ -74,13 +78,21 @@ pub fn addCases(cases: *tests.StackTracesContext) void {...@@ -74,13 +78,21 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
74 // debug78 // debug
75 \\error: TheSkyIsFalling79 \\error: TheSkyIsFalling
76 \\source.zig:4:5: [address] in foo (test)80 \\source.zig:4:5: [address] in foo (test)
81 \\ return error.TheSkyIsFalling;
82 \\ ^
77 \\source.zig:8:5: [address] in main (test)83 \\source.zig:8:5: [address] in main (test)
84 \\ try foo();
85 \\ ^
78 \\86 \\
79 ,87 ,
80 // release-safe88 // release-safe
81 \\error: TheSkyIsFalling89 \\error: TheSkyIsFalling
82 \\source.zig:4:5: [address] in std.start.main (test)90 \\source.zig:4:5: [address] in std.start.main (test)
91 \\ return error.TheSkyIsFalling;
92 \\ ^
83 \\source.zig:8:5: [address] in std.start.main (test)93 \\source.zig:8:5: [address] in std.start.main (test)
94 \\ try foo();
95 \\ ^
84 \\96 \\
85 ,97 ,
86 // release-fast98 // release-fast
...@@ -99,17 +111,33 @@ pub fn addCases(cases: *tests.StackTracesContext) void {...@@ -99,17 +111,33 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
99 // debug111 // debug
100 \\error: TheSkyIsFalling112 \\error: TheSkyIsFalling
101 \\source.zig:12:5: [address] in make_error (test)113 \\source.zig:12:5: [address] in make_error (test)
114 \\ return error.TheSkyIsFalling;
115 \\ ^
102 \\source.zig:8:5: [address] in bar (test)116 \\source.zig:8:5: [address] in bar (test)
117 \\ return make_error();
118 \\ ^
103 \\source.zig:4:5: [address] in foo (test)119 \\source.zig:4:5: [address] in foo (test)
120 \\ try bar();
121 \\ ^
104 \\source.zig:16:5: [address] in main (test)122 \\source.zig:16:5: [address] in main (test)
123 \\ try foo();
124 \\ ^
105 \\125 \\
106 ,126 ,
107 // release-safe127 // release-safe
108 \\error: TheSkyIsFalling128 \\error: TheSkyIsFalling
109 \\source.zig:12:5: [address] in std.start.main (test)129 \\source.zig:12:5: [address] in std.start.main (test)
130 \\ return error.TheSkyIsFalling;
131 \\ ^
110 \\source.zig:8:5: [address] in std.start.main (test)132 \\source.zig:8:5: [address] in std.start.main (test)
133 \\ return make_error();
134 \\ ^
111 \\source.zig:4:5: [address] in std.start.main (test)135 \\source.zig:4:5: [address] in std.start.main (test)
136 \\ try bar();
137 \\ ^
112 \\source.zig:16:5: [address] in std.start.main (test)138 \\source.zig:16:5: [address] in std.start.main (test)
139 \\ try foo();
140 \\ ^
113 \\141 \\
114 ,142 ,
115 // release-fast143 // release-fast
...@@ -130,11 +158,15 @@ pub fn addCases(cases: *tests.StackTracesContext) void {...@@ -130,11 +158,15 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
130 // debug158 // debug
131 \\error: TheSkyIsFalling159 \\error: TheSkyIsFalling
132 \\source.zig:4:5: [address] in main (test)160 \\source.zig:4:5: [address] in main (test)
161 \\ return error.TheSkyIsFalling;
162 \\ ^
133 \\163 \\
134 ,164 ,
135 // release-safe165 // release-safe
136 \\error: TheSkyIsFalling166 \\error: TheSkyIsFalling
137 \\source.zig:4:5: [address] in std.start.posixCallMainAndExit (test)167 \\source.zig:4:5: [address] in std.start.posixCallMainAndExit (test)
168 \\ return error.TheSkyIsFalling;
169 \\ ^
138 \\170 \\
139 ,171 ,
140 // release-fast172 // release-fast
...@@ -153,13 +185,21 @@ pub fn addCases(cases: *tests.StackTracesContext) void {...@@ -153,13 +185,21 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
153 // debug185 // debug
154 \\error: TheSkyIsFalling186 \\error: TheSkyIsFalling
155 \\source.zig:4:5: [address] in foo (test)187 \\source.zig:4:5: [address] in foo (test)
188 \\ return error.TheSkyIsFalling;
189 \\ ^
156 \\source.zig:8:5: [address] in main (test)190 \\source.zig:8:5: [address] in main (test)
191 \\ try foo();
192 \\ ^
157 \\193 \\
158 ,194 ,
159 // release-safe195 // release-safe
160 \\error: TheSkyIsFalling196 \\error: TheSkyIsFalling
161 \\source.zig:4:5: [address] in std.start.posixCallMainAndExit (test)197 \\source.zig:4:5: [address] in std.start.posixCallMainAndExit (test)
198 \\ return error.TheSkyIsFalling;
199 \\ ^
162 \\source.zig:8:5: [address] in std.start.posixCallMainAndExit (test)200 \\source.zig:8:5: [address] in std.start.posixCallMainAndExit (test)
201 \\ try foo();
202 \\ ^
163 \\203 \\
164 ,204 ,
165 // release-fast205 // release-fast
...@@ -178,17 +218,33 @@ pub fn addCases(cases: *tests.StackTracesContext) void {...@@ -178,17 +218,33 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
178 // debug218 // debug
179 \\error: TheSkyIsFalling219 \\error: TheSkyIsFalling
180 \\source.zig:12:5: [address] in make_error (test)220 \\source.zig:12:5: [address] in make_error (test)
221 \\ return error.TheSkyIsFalling;
222 \\ ^
181 \\source.zig:8:5: [address] in bar (test)223 \\source.zig:8:5: [address] in bar (test)
224 \\ return make_error();
225 \\ ^
182 \\source.zig:4:5: [address] in foo (test)226 \\source.zig:4:5: [address] in foo (test)
227 \\ try bar();
228 \\ ^
183 \\source.zig:16:5: [address] in main (test)229 \\source.zig:16:5: [address] in main (test)
230 \\ try foo();
231 \\ ^
184 \\232 \\
185 ,233 ,
186 // release-safe234 // release-safe
187 \\error: TheSkyIsFalling235 \\error: TheSkyIsFalling
188 \\source.zig:12:5: [address] in std.start.posixCallMainAndExit (test)236 \\source.zig:12:5: [address] in std.start.posixCallMainAndExit (test)
237 \\ return error.TheSkyIsFalling;
238 \\ ^
189 \\source.zig:8:5: [address] in std.start.posixCallMainAndExit (test)239 \\source.zig:8:5: [address] in std.start.posixCallMainAndExit (test)
240 \\ return make_error();
241 \\ ^
190 \\source.zig:4:5: [address] in std.start.posixCallMainAndExit (test)242 \\source.zig:4:5: [address] in std.start.posixCallMainAndExit (test)
243 \\ try bar();
244 \\ ^
191 \\source.zig:16:5: [address] in std.start.posixCallMainAndExit (test)245 \\source.zig:16:5: [address] in std.start.posixCallMainAndExit (test)
246 \\ try foo();
247 \\ ^
192 \\248 \\
193 ,249 ,
194 // release-fast250 // release-fast
...@@ -209,11 +265,15 @@ pub fn addCases(cases: *tests.StackTracesContext) void {...@@ -209,11 +265,15 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
209 // debug265 // debug
210 \\error: TheSkyIsFalling266 \\error: TheSkyIsFalling
211 \\source.zig:4:5: [address] in _main.0 (test.o)267 \\source.zig:4:5: [address] in _main.0 (test.o)
268 \\ return error.TheSkyIsFalling;
269 \\ ^
212 \\270 \\
213 ,271 ,
214 // release-safe272 // release-safe
215 \\error: TheSkyIsFalling273 \\error: TheSkyIsFalling
216 \\source.zig:4:5: [address] in _main (test.o)274 \\source.zig:4:5: [address] in _main (test.o)
275 \\ return error.TheSkyIsFalling;
276 \\ ^
217 \\277 \\
218 ,278 ,
219 // release-fast279 // release-fast
...@@ -232,13 +292,21 @@ pub fn addCases(cases: *tests.StackTracesContext) void {...@@ -232,13 +292,21 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
232 // debug292 // debug
233 \\error: TheSkyIsFalling293 \\error: TheSkyIsFalling
234 \\source.zig:4:5: [address] in _foo (test.o)294 \\source.zig:4:5: [address] in _foo (test.o)
295 \\ return error.TheSkyIsFalling;
296 \\ ^
235 \\source.zig:8:5: [address] in _main.0 (test.o)297 \\source.zig:8:5: [address] in _main.0 (test.o)
298 \\ try foo();
299 \\ ^
236 \\300 \\
237 ,301 ,
238 // release-safe302 // release-safe
239 \\error: TheSkyIsFalling303 \\error: TheSkyIsFalling
240 \\source.zig:4:5: [address] in _main (test.o)304 \\source.zig:4:5: [address] in _main (test.o)
305 \\ return error.TheSkyIsFalling;
306 \\ ^
241 \\source.zig:8:5: [address] in _main (test.o)307 \\source.zig:8:5: [address] in _main (test.o)
308 \\ try foo();
309 \\ ^
242 \\310 \\
243 ,311 ,
244 // release-fast312 // release-fast
...@@ -257,17 +325,33 @@ pub fn addCases(cases: *tests.StackTracesContext) void {...@@ -257,17 +325,33 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
257 // debug325 // debug
258 \\error: TheSkyIsFalling326 \\error: TheSkyIsFalling
259 \\source.zig:12:5: [address] in _make_error (test.o)327 \\source.zig:12:5: [address] in _make_error (test.o)
328 \\ return error.TheSkyIsFalling;
329 \\ ^
260 \\source.zig:8:5: [address] in _bar (test.o)330 \\source.zig:8:5: [address] in _bar (test.o)
331 \\ return make_error();
332 \\ ^
261 \\source.zig:4:5: [address] in _foo (test.o)333 \\source.zig:4:5: [address] in _foo (test.o)
334 \\ try bar();
335 \\ ^
262 \\source.zig:16:5: [address] in _main.0 (test.o)336 \\source.zig:16:5: [address] in _main.0 (test.o)
337 \\ try foo();
338 \\ ^
263 \\339 \\
264 ,340 ,
265 // release-safe341 // release-safe
266 \\error: TheSkyIsFalling342 \\error: TheSkyIsFalling
267 \\source.zig:12:5: [address] in _main (test.o)343 \\source.zig:12:5: [address] in _main (test.o)
344 \\ return error.TheSkyIsFalling;
345 \\ ^
268 \\source.zig:8:5: [address] in _main (test.o)346 \\source.zig:8:5: [address] in _main (test.o)
347 \\ return make_error();
348 \\ ^
269 \\source.zig:4:5: [address] in _main (test.o)349 \\source.zig:4:5: [address] in _main (test.o)
350 \\ try bar();
351 \\ ^
270 \\source.zig:16:5: [address] in _main (test.o)352 \\source.zig:16:5: [address] in _main (test.o)
353 \\ try foo();
354 \\ ^
271 \\355 \\
272 ,356 ,
273 // release-fast357 // release-fast
...@@ -288,6 +372,8 @@ pub fn addCases(cases: *tests.StackTracesContext) void {...@@ -288,6 +372,8 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
288 // debug372 // debug
289 \\error: TheSkyIsFalling373 \\error: TheSkyIsFalling
290 \\source.zig:4:5: [address] in main (test.obj)374 \\source.zig:4:5: [address] in main (test.obj)
375 \\ return error.TheSkyIsFalling;
376 \\ ^
291 \\377 \\
292 ,378 ,
293 // release-safe379 // release-safe
...@@ -309,7 +395,11 @@ pub fn addCases(cases: *tests.StackTracesContext) void {...@@ -309,7 +395,11 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
309 // debug395 // debug
310 \\error: TheSkyIsFalling396 \\error: TheSkyIsFalling
311 \\source.zig:4:5: [address] in foo (test.obj)397 \\source.zig:4:5: [address] in foo (test.obj)
398 \\ return error.TheSkyIsFalling;
399 \\ ^
312 \\source.zig:8:5: [address] in main (test.obj)400 \\source.zig:8:5: [address] in main (test.obj)
401 \\ try foo();
402 \\ ^
313 \\403 \\
314 ,404 ,
315 // release-safe405 // release-safe
...@@ -331,9 +421,17 @@ pub fn addCases(cases: *tests.StackTracesContext) void {...@@ -331,9 +421,17 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
331 // debug421 // debug
332 \\error: TheSkyIsFalling422 \\error: TheSkyIsFalling
333 \\source.zig:12:5: [address] in make_error (test.obj)423 \\source.zig:12:5: [address] in make_error (test.obj)
424 \\ return error.TheSkyIsFalling;
425 \\ ^
334 \\source.zig:8:5: [address] in bar (test.obj)426 \\source.zig:8:5: [address] in bar (test.obj)
427 \\ return make_error();
428 \\ ^
335 \\source.zig:4:5: [address] in foo (test.obj)429 \\source.zig:4:5: [address] in foo (test.obj)
430 \\ try bar();
431 \\ ^
336 \\source.zig:16:5: [address] in main (test.obj)432 \\source.zig:16:5: [address] in main (test.obj)
433 \\ try foo();
434 \\ ^
337 \\435 \\
338 ,436 ,
339 // release-safe437 // release-safe
test/stage1/behavior/bitcast.zig+8-8
...@@ -168,11 +168,11 @@ test "nested bitcast" {...@@ -168,11 +168,11 @@ test "nested bitcast" {
168 comptime S.foo(42);168 comptime S.foo(42);
169}169}
170170
171test "bitcast passed as tuple element" {171//test "bitcast passed as tuple element" {
172 const S = struct {172// const S = struct {
173 fn foo(args: var) void {173// fn foo(args: var) void {
174 expect(args[0] == 1.00000e-09);174// expect(args[0] == 1.00000e-09);
175 }175// }
176 };176// };
177 S.foo(.{@bitCast(f32, @as(u32, 814313563))});177// S.foo(.{@bitCast(f32, @as(u32, 814313563))});
178}178//}
test/stage1/behavior/cast.zig-1
...@@ -618,7 +618,6 @@ test "peer resolution of string literals" {...@@ -618,7 +618,6 @@ test "peer resolution of string literals" {
618 .b => "two",618 .b => "two",
619 .c => "three",619 .c => "three",
620 .d => "four",620 .d => "four",
621 else => unreachable,
622 };621 };
623 expect(mem.eql(u8, cmd, "two"));622 expect(mem.eql(u8, cmd, "two"));
624 }623 }
test/stage1/behavior/enum.zig+71-9
...@@ -11,16 +11,9 @@ test "extern enum" {...@@ -11,16 +11,9 @@ test "extern enum" {
11 };11 };
12 fn doTheTest(y: c_int) void {12 fn doTheTest(y: c_int) void {
13 var x = i.o;13 var x = i.o;
14 expect(@enumToInt(x) == 2);
15 x = @intToEnum(i, 12);
16 expect(@enumToInt(x) == 12);
17 x = @intToEnum(i, y);
18 expect(@enumToInt(x) == 52);
19 switch (x) {14 switch (x) {
20 .n,15 .n, .p => unreachable,
21 .o,16 .o => {},
22 .p => unreachable,
23 else => {},
24 }17 }
25 }18 }
26 };19 };
...@@ -28,6 +21,70 @@ test "extern enum" {...@@ -28,6 +21,70 @@ test "extern enum" {
28 comptime S.doTheTest(52);21 comptime S.doTheTest(52);
29}22}
3023
24test "non-exhaustive enum" {
25 const S = struct {
26 const E = enum(u8) {
27 a,
28 b,
29 _,
30 };
31 fn doTheTest(y: u8) void {
32 var e: E = .b;
33 expect(switch (e) {
34 .a => false,
35 .b => true,
36 _ => false,
37 });
38 e = @intToEnum(E, 12);
39 expect(switch (e) {
40 .a => false,
41 .b => false,
42 _ => true,
43 });
44
45 expect(switch (e) {
46 .a => false,
47 .b => false,
48 else => true,
49 });
50 e = .b;
51 expect(switch (e) {
52 .a => false,
53 else => true,
54 });
55
56 expect(@typeInfo(E).Enum.fields.len == 2);
57 e = @intToEnum(E, 12);
58 expect(@enumToInt(e) == 12);
59 e = @intToEnum(E, y);
60 expect(@enumToInt(e) == 52);
61 expect(@typeInfo(E).Enum.is_exhaustive == false);
62 }
63 };
64 S.doTheTest(52);
65 comptime S.doTheTest(52);
66}
67
68test "empty non-exhaustive enum" {
69 const S = struct {
70 const E = enum(u8) {
71 _,
72 };
73 fn doTheTest(y: u8) void {
74 var e = @intToEnum(E, y);
75 expect(switch (e) {
76 _ => true,
77 });
78 expect(@enumToInt(e) == y);
79
80 expect(@typeInfo(E).Enum.fields.len == 0);
81 expect(@typeInfo(E).Enum.is_exhaustive == false);
82 }
83 };
84 S.doTheTest(42);
85 comptime S.doTheTest(42);
86}
87
31test "enum type" {88test "enum type" {
32 const foo1 = Foo{ .One = 13 };89 const foo1 = Foo{ .One = 13 };
33 const foo2 = Foo{90 const foo2 = Foo{
...@@ -1057,3 +1114,8 @@ test "enum with one member default to u0 tag type" {...@@ -1057,3 +1114,8 @@ test "enum with one member default to u0 tag type" {
1057 };1114 };
1058 comptime expect(@TagType(E0) == u0);1115 comptime expect(@TagType(E0) == u0);
1059}1116}
1117
1118test "tagName on enum literals" {
1119 expect(mem.eql(u8, @tagName(.FooBar), "FooBar"));
1120 comptime expect(mem.eql(u8, @tagName(.FooBar), "FooBar"));
1121}
test/stage1/behavior/math.zig+8
...@@ -529,6 +529,10 @@ test "comptime_int xor" {...@@ -529,6 +529,10 @@ test "comptime_int xor" {
529}529}
530530
531test "f128" {531test "f128" {
532 if (std.Target.current.isWindows()) {
533 // TODO https://github.com/ziglang/zig/issues/508
534 return error.SkipZigTest;
535 }
532 test_f128();536 test_f128();
533 comptime test_f128();537 comptime test_f128();
534}538}
...@@ -627,6 +631,10 @@ test "NaN comparison" {...@@ -627,6 +631,10 @@ test "NaN comparison" {
627 // TODO: https://github.com/ziglang/zig/issues/3338631 // TODO: https://github.com/ziglang/zig/issues/3338
628 return error.SkipZigTest;632 return error.SkipZigTest;
629 }633 }
634 if (std.Target.current.isWindows()) {
635 // TODO https://github.com/ziglang/zig/issues/508
636 return error.SkipZigTest;
637 }
630 testNanEqNan(f16);638 testNanEqNan(f16);
631 testNanEqNan(f32);639 testNanEqNan(f32);
632 testNanEqNan(f64);640 testNanEqNan(f64);
test/stage1/behavior/union.zig+9
...@@ -629,3 +629,12 @@ test "union initializer generates padding only if needed" {...@@ -629,3 +629,12 @@ test "union initializer generates padding only if needed" {
629 var v = U{ .A = 532 };629 var v = U{ .A = 532 };
630 expect(v.A == 532);630 expect(v.A == 532);
631}631}
632
633test "runtime tag name with single field" {
634 const U = union(enum) {
635 A: i32,
636 };
637
638 var v = U{ .A = 42 };
639 expect(std.mem.eql(u8, @tagName(v), "A"));
640}
test/tests.zig+223-196
...@@ -38,236 +38,260 @@ const TestTarget = struct {...@@ -38,236 +38,260 @@ const TestTarget = struct {
38 disable_native: bool = false,38 disable_native: bool = false,
39};39};
4040
41const test_targets = [_]TestTarget{41const test_targets = blk: {
42 TestTarget{},42 // getBaselineCpuFeatures calls populateDependencies which has a O(N ^ 2) algorithm
43 TestTarget{43 // (where N is roughly 160, which technically makes it O(1), but it adds up to a
44 .link_libc = true,44 // lot of branches)
45 },45 @setEvalBranchQuota(50000);
46 TestTarget{46 break :blk [_]TestTarget{
47 .single_threaded = true,47 TestTarget{},
48 },48 TestTarget{
4949 .link_libc = true,
50 TestTarget{50 },
51 .target = Target{51 TestTarget{
52 .Cross = CrossTarget{52 .single_threaded = true,
53 .os = .linux,53 },
54 .arch = .x86_64,54
55 .abi = .none,55 TestTarget{
56 .target = Target{
57 .Cross = CrossTarget{
58 .os = .linux,
59 .arch = .x86_64,
60 .abi = .none,
61 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
62 },
56 },63 },
57 },64 },
58 },65 TestTarget{
59 TestTarget{66 .target = Target{
60 .target = Target{67 .Cross = CrossTarget{
61 .Cross = CrossTarget{68 .os = .linux,
62 .os = .linux,69 .arch = .x86_64,
63 .arch = .x86_64,70 .abi = .gnu,
64 .abi = .gnu,71 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
72 },
65 },73 },
74 .link_libc = true,
66 },75 },
67 .link_libc = true,76 TestTarget{
68 },77 .target = Target{
69 TestTarget{78 .Cross = CrossTarget{
70 .target = Target{79 .os = .linux,
71 .Cross = CrossTarget{80 .arch = .x86_64,
72 .os = .linux,81 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
73 .arch = .x86_64,82 .abi = .musl,
74 .abi = .musl,83 },
75 },84 },
85 .link_libc = true,
76 },86 },
77 .link_libc = true,87
78 },88 TestTarget{
7989 .target = Target{
80 TestTarget{90 .Cross = CrossTarget{
81 .target = Target{91 .os = .linux,
82 .Cross = CrossTarget{92 .arch = .i386,
83 .os = .linux,93 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
84 .arch = .i386,94 .abi = .none,
85 .abi = .none,95 },
86 },96 },
87 },97 },
88 },98 TestTarget{
89 TestTarget{99 .target = Target{
90 .target = Target{100 .Cross = CrossTarget{
91 .Cross = CrossTarget{101 .os = .linux,
92 .os = .linux,102 .arch = .i386,
93 .arch = .i386,103 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
94 .abi = .musl,104 .abi = .musl,
105 },
95 },106 },
107 .link_libc = true,
96 },108 },
97 .link_libc = true,109
98 },110 TestTarget{
99111 .target = Target{
100 TestTarget{112 .Cross = CrossTarget{
101 .target = Target{113 .os = .linux,
102 .Cross = CrossTarget{114 .arch = Target.Arch{ .aarch64 = .v8a },
103 .os = .linux,115 .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
104 .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },116 .abi = .none,
105 .abi = .none,117 },
106 },118 },
107 },119 },
108 },120 TestTarget{
109 TestTarget{121 .target = Target{
110 .target = Target{122 .Cross = CrossTarget{
111 .Cross = CrossTarget{123 .os = .linux,
112 .os = .linux,124 .arch = Target.Arch{ .aarch64 = .v8a },
113 .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },125 .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
114 .abi = .musl,126 .abi = .musl,
127 },
115 },128 },
129 .link_libc = true,
116 },130 },
117 .link_libc = true,131 TestTarget{
118 },132 .target = Target{
119 TestTarget{133 .Cross = CrossTarget{
120 .target = Target{134 .os = .linux,
121 .Cross = CrossTarget{135 .arch = Target.Arch{ .aarch64 = .v8a },
122 .os = .linux,136 .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
123 .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },137 .abi = .gnu,
124 .abi = .gnu,138 },
125 },139 },
140 .link_libc = true,
126 },141 },
127 .link_libc = true,142
128 },143 TestTarget{
129144 .target = Target{
130 TestTarget{145 .Cross = CrossTarget{
131 .target = Target{146 .os = .linux,
132 .Cross = CrossTarget{147 .arch = Target.Arch{ .arm = .v8a },
133 .os = .linux,148 .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
134 .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a },149 .abi = .none,
135 .abi = .none,150 },
136 },151 },
137 },152 },
138 },153 TestTarget{
139 TestTarget{154 .target = Target{
140 .target = Target{155 .Cross = CrossTarget{
141 .Cross = CrossTarget{156 .os = .linux,
142 .os = .linux,157 .arch = Target.Arch{ .arm = .v8a },
143 .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a },158 .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
144 .abi = .musleabihf,159 .abi = .musleabihf,
160 },
145 },161 },
162 .link_libc = true,
146 },163 },
147 .link_libc = true,164 // TODO https://github.com/ziglang/zig/issues/3287
148 },165 //TestTarget{
149 // TODO https://github.com/ziglang/zig/issues/3287166 // .target = Target{
150 //TestTarget{167 // .Cross = CrossTarget{
151 // .target = Target{168 // .os = .linux,
152 // .Cross = CrossTarget{169 // .arch = Target.Arch{ .arm = .v8a },
153 // .os = .linux,170 // .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
154 // .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a },171 // .abi = .gnueabihf,
155 // .abi = .gnueabihf,172 // },
156 // },173 // },
157 // },174 // .link_libc = true,
158 // .link_libc = true,175 //},
159 //},176
160177 TestTarget{
161 TestTarget{178 .target = Target{
162 .target = Target{179 .Cross = CrossTarget{
163 .Cross = CrossTarget{180 .os = .linux,
164 .os = .linux,181 .arch = .mipsel,
165 .arch = .mipsel,182 .cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(),
166 .abi = .none,183 .abi = .none,
184 },
167 },185 },
168 },186 },
169 },187 TestTarget{
170 TestTarget{188 .target = Target{
171 .target = Target{189 .Cross = CrossTarget{
172 .Cross = CrossTarget{190 .os = .linux,
173 .os = .linux,191 .arch = .mipsel,
174 .arch = .mipsel,192 .cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(),
175 .abi = .musl,193 .abi = .musl,
194 },
176 },195 },
196 .link_libc = true,
177 },197 },
178 .link_libc = true,198
179 },199 TestTarget{
180200 .target = Target{
181 TestTarget{201 .Cross = CrossTarget{
182 .target = Target{202 .os = .macosx,
183 .Cross = CrossTarget{203 .arch = .x86_64,
184 .os = .macosx,204 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
185 .arch = .x86_64,205 .abi = .gnu,
186 .abi = .gnu,206 },
187 },207 },
208 // TODO https://github.com/ziglang/zig/issues/3295
209 .disable_native = true,
188 },210 },
189 // TODO https://github.com/ziglang/zig/issues/3295211
190 .disable_native = true,212 TestTarget{
191 },213 .target = Target{
192214 .Cross = CrossTarget{
193 TestTarget{215 .os = .windows,
194 .target = Target{216 .arch = .i386,
195 .Cross = CrossTarget{217 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
196 .os = .windows,218 .abi = .msvc,
197 .arch = .i386,219 },
198 .abi = .msvc,
199 },220 },
200 },221 },
201 },222
202223 TestTarget{
203 TestTarget{224 .target = Target{
204 .target = Target{225 .Cross = CrossTarget{
205 .Cross = CrossTarget{226 .os = .windows,
206 .os = .windows,227 .arch = .x86_64,
207 .arch = .x86_64,228 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
208 .abi = .msvc,229 .abi = .msvc,
230 },
209 },231 },
210 },232 },
211 },233
212234 TestTarget{
213 TestTarget{235 .target = Target{
214 .target = Target{236 .Cross = CrossTarget{
215 .Cross = CrossTarget{237 .os = .windows,
216 .os = .windows,238 .arch = .i386,
217 .arch = .i386,239 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
218 .abi = .gnu,240 .abi = .gnu,
241 },
219 },242 },
243 .link_libc = true,
220 },244 },
221 .link_libc = true,245
222 },246 TestTarget{
223247 .target = Target{
224 TestTarget{248 .Cross = CrossTarget{
225 .target = Target{249 .os = .windows,
226 .Cross = CrossTarget{250 .arch = .x86_64,
227 .os = .windows,251 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
228 .arch = .x86_64,252 .abi = .gnu,
229 .abi = .gnu,253 },
230 },254 },
255 .link_libc = true,
231 },256 },
232 .link_libc = true,257
233 },258 // Do the release tests last because they take a long time
234259 TestTarget{
235 // Do the release tests last because they take a long time260 .mode = .ReleaseFast,
236 TestTarget{261 },
237 .mode = .ReleaseFast,262 TestTarget{
238 },263 .link_libc = true,
239 TestTarget{264 .mode = .ReleaseFast,
240 .link_libc = true,265 },
241 .mode = .ReleaseFast,266 TestTarget{
242 },267 .mode = .ReleaseFast,
243 TestTarget{268 .single_threaded = true,
244 .mode = .ReleaseFast,269 },
245 .single_threaded = true,270
246 },271 TestTarget{
247272 .mode = .ReleaseSafe,
248 TestTarget{273 },
249 .mode = .ReleaseSafe,274 TestTarget{
250 },275 .link_libc = true,
251 TestTarget{276 .mode = .ReleaseSafe,
252 .link_libc = true,277 },
253 .mode = .ReleaseSafe,278 TestTarget{
254 },279 .mode = .ReleaseSafe,
255 TestTarget{280 .single_threaded = true,
256 .mode = .ReleaseSafe,281 },
257 .single_threaded = true,282
258 },283 TestTarget{
259284 .mode = .ReleaseSmall,
260 TestTarget{285 },
261 .mode = .ReleaseSmall,286 TestTarget{
262 },287 .link_libc = true,
263 TestTarget{288 .mode = .ReleaseSmall,
264 .link_libc = true,289 },
265 .mode = .ReleaseSmall,290 TestTarget{
266 },291 .mode = .ReleaseSmall,
267 TestTarget{292 .single_threaded = true,
268 .mode = .ReleaseSmall,293 },
269 .single_threaded = true,294 };
270 },
271};295};
272296
273const max_stdout_size = 1 * 1024 * 1024; // 1 MB297const max_stdout_size = 1 * 1024 * 1024; // 1 MB
...@@ -598,6 +622,9 @@ pub const StackTracesContext = struct {...@@ -598,6 +622,9 @@ pub const StackTracesContext = struct {
598 child.stderr_behavior = .Pipe;622 child.stderr_behavior = .Pipe;
599 child.env_map = b.env_map;623 child.env_map = b.env_map;
600624
625 if (b.verbose) {
626 printInvocation(args.toSliceConst());
627 }
601 child.spawn() catch |err| debug.panic("Unable to spawn {}: {}\n", .{ full_exe_path, @errorName(err) });628 child.spawn() catch |err| debug.panic("Unable to spawn {}: {}\n", .{ full_exe_path, @errorName(err) });
602629
603 var stdout = Buffer.initNull(b.allocator);630 var stdout = Buffer.initNull(b.allocator);
test/translate_c.zig+77-13
...@@ -1,7 +1,33 @@...@@ -1,7 +1,33 @@
1const tests = @import("tests.zig");1const tests = @import("tests.zig");
2const builtin = @import("builtin");2const builtin = @import("builtin");
3const Target = @import("std").Target;
34
4pub fn addCases(cases: *tests.TranslateCContext) void {5pub fn addCases(cases: *tests.TranslateCContext) void {
6 cases.add("array initializer w/ typedef",
7 \\typedef unsigned char uuid_t[16];
8 \\static const uuid_t UUID_NULL __attribute__ ((unused)) = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
9 , &[_][]const u8{
10 \\pub const uuid_t = [16]u8;
11 \\pub const UUID_NULL: uuid_t = .{
12 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
13 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
14 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
15 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
16 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
17 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
18 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
19 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
20 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
21 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
22 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
23 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
24 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
25 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
26 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
27 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
28 \\};
29 });
30
5 cases.add("empty declaration",31 cases.add("empty declaration",
6 \\;32 \\;
7 , &[_][]const u8{""});33 , &[_][]const u8{""});
...@@ -629,6 +655,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {...@@ -629,6 +655,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
629 \\ VAL21 = 6917529027641081853,655 \\ VAL21 = 6917529027641081853,
630 \\ VAL22 = 0,656 \\ VAL22 = 0,
631 \\ VAL23 = -1,657 \\ VAL23 = -1,
658 \\ _,
632 \\};659 \\};
633 });660 });
634 }661 }
...@@ -988,8 +1015,9 @@ pub fn addCases(cases: *tests.TranslateCContext) void {...@@ -988,8 +1015,9 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
988 \\enum enum_ty { FOO };1015 \\enum enum_ty { FOO };
989 , &[_][]const u8{1016 , &[_][]const u8{
990 \\pub const FOO = @enumToInt(enum_enum_ty.FOO);1017 \\pub const FOO = @enumToInt(enum_enum_ty.FOO);
991 \\pub const enum_enum_ty = extern enum {1018 \\pub const enum_enum_ty = extern enum(c_int) {
992 \\ FOO,1019 \\ FOO,
1020 \\ _,
993 \\};1021 \\};
994 \\pub extern var my_enum: enum_enum_ty;1022 \\pub extern var my_enum: enum_enum_ty;
995 });1023 });
...@@ -1003,7 +1031,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {...@@ -1003,7 +1031,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
1003 });1031 });
10041032
1005 cases.addWithTarget("Calling convention", tests.Target{1033 cases.addWithTarget("Calling convention", tests.Target{
1006 .Cross = .{ .os = .linux, .arch = .i386, .abi = .none },1034 .Cross = .{
1035 .os = .linux,
1036 .arch = .i386,
1037 .abi = .none,
1038 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
1039 },
1007 },1040 },
1008 \\void __attribute__((fastcall)) foo1(float *a);1041 \\void __attribute__((fastcall)) foo1(float *a);
1009 \\void __attribute__((stdcall)) foo2(float *a);1042 \\void __attribute__((stdcall)) foo2(float *a);
...@@ -1019,7 +1052,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {...@@ -1019,7 +1052,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
1019 });1052 });
10201053
1021 cases.addWithTarget("Calling convention", tests.Target{1054 cases.addWithTarget("Calling convention", tests.Target{
1022 .Cross = .{ .os = .linux, .arch = .{ .arm = .v8_5a }, .abi = .none },1055 .Cross = .{
1056 .os = .linux,
1057 .arch = .{ .arm = .v8_5a },
1058 .abi = .none,
1059 .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(),
1060 },
1023 },1061 },
1024 \\void __attribute__((pcs("aapcs"))) foo1(float *a);1062 \\void __attribute__((pcs("aapcs"))) foo1(float *a);
1025 \\void __attribute__((pcs("aapcs-vfp"))) foo2(float *a);1063 \\void __attribute__((pcs("aapcs-vfp"))) foo2(float *a);
...@@ -1029,7 +1067,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {...@@ -1029,7 +1067,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
1029 });1067 });
10301068
1031 cases.addWithTarget("Calling convention", tests.Target{1069 cases.addWithTarget("Calling convention", tests.Target{
1032 .Cross = .{ .os = .linux, .arch = .{ .aarch64 = .v8_5a }, .abi = .none },1070 .Cross = .{
1071 .os = .linux,
1072 .arch = .{ .aarch64 = .v8_5a },
1073 .abi = .none,
1074 .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(),
1075 },
1033 },1076 },
1034 \\void __attribute__((aarch64_vector_pcs)) foo1(float *a);1077 \\void __attribute__((aarch64_vector_pcs)) foo1(float *a);
1035 , &[_][]const u8{1078 , &[_][]const u8{
...@@ -1102,28 +1145,31 @@ pub fn addCases(cases: *tests.TranslateCContext) void {...@@ -1102,28 +1145,31 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
1102 \\pub const a = @enumToInt(enum_unnamed_1.a);1145 \\pub const a = @enumToInt(enum_unnamed_1.a);
1103 \\pub const b = @enumToInt(enum_unnamed_1.b);1146 \\pub const b = @enumToInt(enum_unnamed_1.b);
1104 \\pub const c = @enumToInt(enum_unnamed_1.c);1147 \\pub const c = @enumToInt(enum_unnamed_1.c);
1105 \\const enum_unnamed_1 = extern enum {1148 \\const enum_unnamed_1 = extern enum(c_int) {
1106 \\ a,1149 \\ a,
1107 \\ b,1150 \\ b,
1108 \\ c,1151 \\ c,
1152 \\ _,
1109 \\};1153 \\};
1110 \\pub const d = enum_unnamed_1;1154 \\pub const d = enum_unnamed_1;
1111 \\pub const e = @enumToInt(enum_unnamed_2.e);1155 \\pub const e = @enumToInt(enum_unnamed_2.e);
1112 \\pub const f = @enumToInt(enum_unnamed_2.f);1156 \\pub const f = @enumToInt(enum_unnamed_2.f);
1113 \\pub const g = @enumToInt(enum_unnamed_2.g);1157 \\pub const g = @enumToInt(enum_unnamed_2.g);
1114 \\const enum_unnamed_2 = extern enum {1158 \\const enum_unnamed_2 = extern enum(c_int) {
1115 \\ e = 0,1159 \\ e = 0,
1116 \\ f = 4,1160 \\ f = 4,
1117 \\ g = 5,1161 \\ g = 5,
1162 \\ _,
1118 \\};1163 \\};
1119 \\pub export var h: enum_unnamed_2 = @intToEnum(enum_unnamed_2, e);1164 \\pub export var h: enum_unnamed_2 = @intToEnum(enum_unnamed_2, e);
1120 \\pub const i = @enumToInt(enum_unnamed_3.i);1165 \\pub const i = @enumToInt(enum_unnamed_3.i);
1121 \\pub const j = @enumToInt(enum_unnamed_3.j);1166 \\pub const j = @enumToInt(enum_unnamed_3.j);
1122 \\pub const k = @enumToInt(enum_unnamed_3.k);1167 \\pub const k = @enumToInt(enum_unnamed_3.k);
1123 \\const enum_unnamed_3 = extern enum {1168 \\const enum_unnamed_3 = extern enum(c_int) {
1124 \\ i,1169 \\ i,
1125 \\ j,1170 \\ j,
1126 \\ k,1171 \\ k,
1172 \\ _,
1127 \\};1173 \\};
1128 \\pub const struct_Baz = extern struct {1174 \\pub const struct_Baz = extern struct {
1129 \\ l: enum_unnamed_3,1175 \\ l: enum_unnamed_3,
...@@ -1132,10 +1178,11 @@ pub fn addCases(cases: *tests.TranslateCContext) void {...@@ -1132,10 +1178,11 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
1132 \\pub const n = @enumToInt(enum_i.n);1178 \\pub const n = @enumToInt(enum_i.n);
1133 \\pub const o = @enumToInt(enum_i.o);1179 \\pub const o = @enumToInt(enum_i.o);
1134 \\pub const p = @enumToInt(enum_i.p);1180 \\pub const p = @enumToInt(enum_i.p);
1135 \\pub const enum_i = extern enum {1181 \\pub const enum_i = extern enum(c_int) {
1136 \\ n,1182 \\ n,
1137 \\ o,1183 \\ o,
1138 \\ p,1184 \\ p,
1185 \\ _,
1139 \\};1186 \\};
1140 ,1187 ,
1141 \\pub const Baz = struct_Baz;1188 \\pub const Baz = struct_Baz;
...@@ -1563,9 +1610,10 @@ pub fn addCases(cases: *tests.TranslateCContext) void {...@@ -1563,9 +1610,10 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
1563 , &[_][]const u8{1610 , &[_][]const u8{
1564 \\pub const One = @enumToInt(enum_unnamed_1.One);1611 \\pub const One = @enumToInt(enum_unnamed_1.One);
1565 \\pub const Two = @enumToInt(enum_unnamed_1.Two);1612 \\pub const Two = @enumToInt(enum_unnamed_1.Two);
1566 \\const enum_unnamed_1 = extern enum {1613 \\const enum_unnamed_1 = extern enum(c_int) {
1567 \\ One,1614 \\ One,
1568 \\ Two,1615 \\ Two,
1616 \\ _,
1569 \\};1617 \\};
1570 });1618 });
15711619
...@@ -1665,10 +1713,11 @@ pub fn addCases(cases: *tests.TranslateCContext) void {...@@ -1665,10 +1713,11 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
1665 \\ return ((((((((((e + f) + g) + h) + i) + j) + k) + l) + m) + o) + p);1713 \\ return ((((((((((e + f) + g) + h) + i) + j) + k) + l) + m) + o) + p);
1666 \\}1714 \\}
1667 , &[_][]const u8{1715 , &[_][]const u8{
1668 \\pub const enum_Foo = extern enum {1716 \\pub const enum_Foo = extern enum(c_int) {
1669 \\ A,1717 \\ A,
1670 \\ B,1718 \\ B,
1671 \\ C,1719 \\ C,
1720 \\ _,
1672 \\};1721 \\};
1673 \\pub const SomeTypedef = c_int;1722 \\pub const SomeTypedef = c_int;
1674 \\pub export fn and_or_non_bool(arg_a: c_int, arg_b: f32, arg_c: ?*c_void) c_int {1723 \\pub export fn and_or_non_bool(arg_a: c_int, arg_b: f32, arg_c: ?*c_void) c_int {
...@@ -1710,9 +1759,10 @@ pub fn addCases(cases: *tests.TranslateCContext) void {...@@ -1710,9 +1759,10 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
1710 \\ y: c_int,1759 \\ y: c_int,
1711 \\};1760 \\};
1712 ,1761 ,
1713 \\pub const enum_Bar = extern enum {1762 \\pub const enum_Bar = extern enum(c_int) {
1714 \\ A,1763 \\ A,
1715 \\ B,1764 \\ B,
1765 \\ _,
1716 \\};1766 \\};
1717 \\pub extern fn func(a: [*c]struct_Foo, b: [*c][*c]enum_Bar) void;1767 \\pub extern fn func(a: [*c]struct_Foo, b: [*c][*c]enum_Bar) void;
1718 ,1768 ,
...@@ -1973,10 +2023,11 @@ pub fn addCases(cases: *tests.TranslateCContext) void {...@@ -1973,10 +2023,11 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
1973 \\ return 4;2023 \\ return 4;
1974 \\}2024 \\}
1975 , &[_][]const u8{2025 , &[_][]const u8{
1976 \\pub const enum_SomeEnum = extern enum {2026 \\pub const enum_SomeEnum = extern enum(c_int) {
1977 \\ A,2027 \\ A,
1978 \\ B,2028 \\ B,
1979 \\ C,2029 \\ C,
2030 \\ _,
1980 \\};2031 \\};
1981 \\pub export fn if_none_bool(arg_a: c_int, arg_b: f32, arg_c: ?*c_void, arg_d: enum_SomeEnum) c_int {2032 \\pub export fn if_none_bool(arg_a: c_int, arg_b: f32, arg_c: ?*c_void, arg_d: enum_SomeEnum) c_int {
1982 \\ var a = arg_a;2033 \\ var a = arg_a;
...@@ -2414,10 +2465,11 @@ pub fn addCases(cases: *tests.TranslateCContext) void {...@@ -2414,10 +2465,11 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
2414 \\pub const FooA = @enumToInt(enum_Foo.A);2465 \\pub const FooA = @enumToInt(enum_Foo.A);
2415 \\pub const FooB = @enumToInt(enum_Foo.B);2466 \\pub const FooB = @enumToInt(enum_Foo.B);
2416 \\pub const Foo1 = @enumToInt(enum_Foo.@"1");2467 \\pub const Foo1 = @enumToInt(enum_Foo.@"1");
2417 \\pub const enum_Foo = extern enum {2468 \\pub const enum_Foo = extern enum(c_int) {
2418 \\ A = 2,2469 \\ A = 2,
2419 \\ B = 5,2470 \\ B = 5,
2420 \\ @"1" = 6,2471 \\ @"1" = 6,
2472 \\ _,
2421 \\};2473 \\};
2422 ,2474 ,
2423 \\pub const Foo = enum_Foo;2475 \\pub const Foo = enum_Foo;
...@@ -2579,4 +2631,16 @@ pub fn addCases(cases: *tests.TranslateCContext) void {...@@ -2579,4 +2631,16 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
2579 \\ return foo((@intCast(c_int, @bitCast(i1, @intCast(u1, @boolToInt(c)))) != @intCast(c_int, @bitCast(i1, @intCast(u1, @boolToInt(b))))));2631 \\ return foo((@intCast(c_int, @bitCast(i1, @intCast(u1, @boolToInt(c)))) != @intCast(c_int, @bitCast(i1, @intCast(u1, @boolToInt(b))))));
2580 \\}2632 \\}
2581 });2633 });
2634
2635 cases.add("Don't make const parameters mutable",
2636 \\int max(const int x, int y) {
2637 \\ return (x > y) ? x : y;
2638 \\}
2639 , &[_][]const u8{
2640 \\pub export fn max(x: c_int, arg_y: c_int) c_int {
2641 \\ var y = arg_y;
2642 \\ return if (x > y) x else y;
2643 \\}
2644 });
2645
2582}2646}