authorgravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-05-10 19:34:20+02:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-05-10 19:34:20+02:00
logf131e41db9f8b1b1bbd678b52ef377821d83bddc
treecea3ed7aabb22c3decdc7934fa1019b5799b3e92
parent9725205859517ce81e201b79b55f7a7c2cb87f20

x64: implement shl_exact and shr_exact

2 files changed, 28 insertions(+), 30 deletions(-)

src/arch/x86_64/CodeGen.zig+28-26
......@@ -1708,7 +1708,7 @@ fn airOptionalPayload(self: *Self, inst: Air.Inst.Index) !void {
17081708 // TODO reuse the operand
17091709 const result = try self.copyToRegisterWithInstTracking(inst, optional_ty, operand);
17101710 const shift = @intCast(u8, offset * @sizeOf(usize));
1711 try self.genShiftBinOpMir(optional_ty, result.register, .{ .immediate = @intCast(u8, shift) }, .right);
1711 try self.genShiftBinOpMir(.shr, optional_ty, result.register, .{ .immediate = @intCast(u8, shift) });
17121712 break :result result;
17131713 },
17141714 else => return self.fail("TODO implement optional_payload when operand is {}", .{operand}),
......@@ -1795,7 +1795,7 @@ fn airUnwrapErrPayload(self: *Self, inst: Air.Inst.Index) !void {
17951795 // TODO reuse operand
17961796 const shift = @intCast(u6, err_abi_size * @sizeOf(usize));
17971797 const result = try self.copyToRegisterWithInstTracking(inst, err_union_ty, operand);
1798 try self.genShiftBinOpMir(Type.usize, result.register, .{ .immediate = shift }, .right);
1798 try self.genShiftBinOpMir(.shr, Type.usize, result.register, .{ .immediate = shift });
17991799 break :result MCValue{
18001800 .register = registerAlias(result.register, @intCast(u32, payload_ty.abiSize(self.target.*))),
18011801 };
......@@ -2307,7 +2307,7 @@ fn airGetUnionTag(self: *Self, inst: Air.Inst.Index) !void {
23072307 else
23082308 0;
23092309 const result = try self.copyToRegisterWithInstTracking(inst, union_ty, operand);
2310 try self.genShiftBinOpMir(Type.usize, result.register, .{ .immediate = shift }, .right);
2310 try self.genShiftBinOpMir(.shr, Type.usize, result.register, .{ .immediate = shift });
23112311 break :blk MCValue{
23122312 .register = registerAlias(result.register, @intCast(u32, layout.tag_size)),
23132313 };
......@@ -2906,7 +2906,7 @@ fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void {
29062906
29072907 // Shift by struct_field_offset.
29082908 const shift = @intCast(u8, struct_field_offset * @sizeOf(usize));
2909 try self.genShiftBinOpMir(Type.usize, dst_mcv.register, .{ .immediate = shift }, .right);
2909 try self.genShiftBinOpMir(.shr, Type.usize, dst_mcv.register, .{ .immediate = shift });
29102910
29112911 // Mask with reg.size() - struct_field_size
29122912 const max_reg_bit_width = Register.rax.size();
......@@ -2983,26 +2983,15 @@ fn airFieldParentPtr(self: *Self, inst: Air.Inst.Index) !void {
29832983}
29842984
29852985/// Clobbers .rcx for non-immediate shift value.
2986fn genShiftBinOpMir(self: *Self, ty: Type, reg: Register, shift: MCValue, direction: enum { left, right }) !void {
2986fn genShiftBinOpMir(self: *Self, tag: Mir.Inst.Tag, ty: Type, reg: Register, shift: MCValue) !void {
29872987 assert(reg.to64() != .rcx);
29882988
2989 const abi_size = @intCast(u32, ty.abiSize(self.target.*));
2990 const signedness: std.builtin.Signedness = blk: {
2991 if (ty.zigTypeTag() != .Int) break :blk .unsigned;
2992 break :blk ty.intInfo(self.target.*).signedness;
2993 };
2994
2995 const tag: Mir.Inst.Tag = switch (signedness) {
2996 .signed => switch (direction) {
2997 .left => Mir.Inst.Tag.sal,
2998 .right => Mir.Inst.Tag.sar,
2999 },
3000 .unsigned => switch (direction) {
3001 .left => Mir.Inst.Tag.shl,
3002 .right => Mir.Inst.Tag.shr,
3003 },
3004 };
2989 switch (tag) {
2990 .sal, .sar, .shl, .shr => {},
2991 else => unreachable,
2992 }
30052993
2994 const abi_size = @intCast(u32, ty.abiSize(self.target.*));
30062995 blk: {
30072996 switch (shift) {
30082997 .immediate => |imm| switch (imm) {
......@@ -3100,9 +3089,22 @@ fn genShiftBinOp(
31003089 break :blk MCValue{ .register = try self.copyToTmpRegister(lhs_ty, lhs) };
31013090 };
31023091
3092 const signedness = lhs_ty.intInfo(self.target.*).signedness;
31033093 switch (tag) {
3104 .shl => try self.genShiftBinOpMir(lhs_ty, dst.register, rhs, .left),
3105 .shr => try self.genShiftBinOpMir(lhs_ty, dst.register, rhs, .right),
3094 .shl => try self.genShiftBinOpMir(switch (signedness) {
3095 .signed => .sal,
3096 .unsigned => .shl,
3097 }, lhs_ty, dst.register, rhs),
3098
3099 .shl_exact => try self.genShiftBinOpMir(.shl, lhs_ty, dst.register, rhs),
3100
3101 .shr,
3102 .shr_exact,
3103 => try self.genShiftBinOpMir(switch (signedness) {
3104 .signed => .sar,
3105 .unsigned => .shr,
3106 }, lhs_ty, dst.register, rhs),
3107
31063108 else => unreachable,
31073109 }
31083110
......@@ -5427,7 +5429,7 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue, opts: Inl
54275429 });
54285430
54295431 if (nearest_power_of_two > 1) {
5430 try self.genShiftBinOpMir(ty, tmp_reg, .{ .immediate = nearest_power_of_two * 8 }, .right);
5432 try self.genShiftBinOpMir(.shr, ty, tmp_reg, .{ .immediate = nearest_power_of_two * 8 });
54315433 }
54325434
54335435 remainder -= nearest_power_of_two;
......@@ -6804,8 +6806,8 @@ fn truncateRegister(self: *Self, ty: Type, reg: Register) !void {
68046806 switch (int_info.signedness) {
68056807 .signed => {
68066808 const shift = @intCast(u6, max_reg_bit_width - int_info.bits);
6807 try self.genShiftBinOpMir(Type.isize, reg, .{ .immediate = shift }, .left);
6808 try self.genShiftBinOpMir(Type.isize, reg, .{ .immediate = shift }, .right);
6809 try self.genShiftBinOpMir(.sal, Type.isize, reg, .{ .immediate = shift });
6810 try self.genShiftBinOpMir(.sar, Type.isize, reg, .{ .immediate = shift });
68096811 },
68106812 .unsigned => {
68116813 const shift = @intCast(u6, max_reg_bit_width - int_info.bits);
test/behavior/math.zig-4
......@@ -1065,8 +1065,6 @@ fn testShlTrunc(x: u16) !void {
10651065}
10661066
10671067test "exact shift left" {
1068 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
1069
10701068 try testShlExact(0b00110101);
10711069 comptime try testShlExact(0b00110101);
10721070}
......@@ -1076,8 +1074,6 @@ fn testShlExact(x: u8) !void {
10761074}
10771075
10781076test "exact shift right" {
1079 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
1080
10811077 try testShrExact(0b10110100);
10821078 comptime try testShrExact(0b10110100);
10831079}