authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-08-23 15:15:48+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-08-31 23:15:49+02:00
logf167348661a96d73a8c4d90b21e71b0c6950d7fa
treeb8d12016e504bd5d63bc4d8cd86caf9394b05df4
parentc0363560f1fe9591e7b9ba5ccd4bf4b7bd520952
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

llvm: add updated issue links for targets with @prefetch crashes

Also lift the restriction for ARM which seems to work now. * https://github.com/llvm/llvm-project/issues/218236 * https://github.com/llvm/llvm-project/issues/218239

1 files changed, 2 insertions(+), 11 deletions(-)

src/codegen/llvm/FuncGen.zig+2-11
...@@ -6542,28 +6542,19 @@ fn airPrefetch(self: *FuncGen, inst: Air.Inst.Index) Allocator.Error!Builder.Val...@@ -6542,28 +6542,19 @@ fn airPrefetch(self: *FuncGen, inst: Air.Inst.Index) Allocator.Error!Builder.Val
6542 comptime assert(@backingInt(std.lang.PrefetchOptions.Cache.instruction) == 0);6542 comptime assert(@backingInt(std.lang.PrefetchOptions.Cache.instruction) == 0);
6543 comptime assert(@backingInt(std.lang.PrefetchOptions.Cache.data) == 1);6543 comptime assert(@backingInt(std.lang.PrefetchOptions.Cache.data) == 1);
65446544
6545 // LLVM fails during codegen of instruction cache prefetchs for these architectures.
6546 // This is an LLVM bug as the prefetch intrinsic should be a noop if not supported
6547 // by the target.
6548 // To work around this, don't emit llvm.prefetch in this case.
6549 // See https://bugs.llvm.org/show_bug.cgi?id=21037
6550 const zcu = self.object.zcu;6545 const zcu = self.object.zcu;
6551 const target = zcu.getTarget();6546 const target = zcu.getTarget();
6552 switch (prefetch.cache) {6547 switch (prefetch.cache) {
6553 .instruction => switch (target.cpu.arch) {6548 .instruction => switch (target.cpu.arch) {
6549 // https://github.com/llvm/llvm-project/issues/218236
6554 .x86_64,6550 .x86_64,
6555 .x86,6551 .x86,
6552 // https://github.com/llvm/llvm-project/issues/218239
6556 .powerpc,6553 .powerpc,
6557 .powerpcle,6554 .powerpcle,
6558 .powerpc64,6555 .powerpc64,
6559 .powerpc64le,6556 .powerpc64le,
6560 => return .none,6557 => return .none,
6561 .arm, .armeb, .thumb, .thumbeb => {
6562 switch (prefetch.rw) {
6563 .write => return .none,
6564 else => {},
6565 }
6566 },
6567 else => {},6558 else => {},
6568 },6559 },
6569 .data => {},6560 .data => {},