authorgravatar for vesim809@pm.meMaciej 'vesim' Kuliński <vesim809@pm.me> 2024-09-07 17:29:43+02:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2024-09-07 23:46:30-07:00
logfb0028a0d7b43a2a5dd05f075ded22746f92faf6
treee7fad4715b811acd7e51fd44b2d078c9b37b9d94
parentfb81522e0ba97294a475df040ccfea493342498d

mips: fix C ABI compatibility


4 files changed, 145 insertions(+), 43 deletions(-)

src/arch/mips/abi.zig created+86
...@@ -0,0 +1,86 @@
1const std = @import("std");
2const Type = @import("../../Type.zig");
3const Zcu = @import("../../Zcu.zig");
4const assert = std.debug.assert;
5
6pub const Class = union(enum) {
7 memory,
8 byval,
9 i32_array: u8,
10};
11
12pub const Context = enum { ret, arg };
13
14pub fn classifyType(ty: Type, zcu: *Zcu, ctx: Context) Class {
15 const target = zcu.getTarget();
16 std.debug.assert(ty.hasRuntimeBitsIgnoreComptime(zcu));
17
18 const max_direct_size = target.ptrBitWidth() * 2;
19 switch (ty.zigTypeTag(zcu)) {
20 .@"struct" => {
21 const bit_size = ty.bitSize(zcu);
22 if (ty.containerLayout(zcu) == .@"packed") {
23 if (bit_size > max_direct_size) return .memory;
24 return .byval;
25 }
26 if (bit_size > max_direct_size) return .memory;
27 // TODO: for bit_size <= 32 using byval is more correct, but that needs inreg argument attribute
28 const count = @as(u8, @intCast(std.mem.alignForward(u64, bit_size, 32) / 32));
29 return .{ .i32_array = count };
30 },
31 .@"union" => {
32 const bit_size = ty.bitSize(zcu);
33 if (ty.containerLayout(zcu) == .@"packed") {
34 if (bit_size > max_direct_size) return .memory;
35 return .byval;
36 }
37 if (bit_size > max_direct_size) return .memory;
38
39 return .byval;
40 },
41 .bool => return .byval,
42 .float => return .byval,
43 .int, .@"enum", .error_set => {
44 const bit_size = ty.bitSize(zcu);
45 if (bit_size > max_direct_size) return .memory;
46 return .byval;
47 },
48 .vector => {
49 const elem_type = ty.elemType2(zcu);
50 switch (elem_type.zigTypeTag(zcu)) {
51 .bool, .int => {
52 const bit_size = ty.bitSize(zcu);
53 if (ctx == .ret and bit_size > 128) return .memory;
54 if (bit_size > 512) return .memory;
55 // TODO: byval vector arguments with non power of 2 size need inreg attribute
56 return .byval;
57 },
58 .float => return .memory,
59 else => unreachable,
60 }
61 },
62 .optional => {
63 std.debug.assert(ty.isPtrLikeOptional(zcu));
64 return .byval;
65 },
66 .pointer => {
67 std.debug.assert(!ty.isSlice(zcu));
68 return .byval;
69 },
70 .error_union,
71 .frame,
72 .@"anyframe",
73 .noreturn,
74 .void,
75 .type,
76 .comptime_float,
77 .comptime_int,
78 .undefined,
79 .null,
80 .@"fn",
81 .@"opaque",
82 .enum_literal,
83 .array,
84 => unreachable,
85 }
86}
src/codegen/llvm.zig+19-3
...@@ -26,6 +26,7 @@ const wasm_c_abi = @import("../arch/wasm/abi.zig");...@@ -26,6 +26,7 @@ const wasm_c_abi = @import("../arch/wasm/abi.zig");
26const aarch64_c_abi = @import("../arch/aarch64/abi.zig");26const aarch64_c_abi = @import("../arch/aarch64/abi.zig");
27const arm_c_abi = @import("../arch/arm/abi.zig");27const arm_c_abi = @import("../arch/arm/abi.zig");
28const riscv_c_abi = @import("../arch/riscv64/abi.zig");28const riscv_c_abi = @import("../arch/riscv64/abi.zig");
29const mips_c_abi = @import("../arch/mips/abi.zig");
29const dev = @import("../dev.zig");30const dev = @import("../dev.zig");
3031
31const target_util = @import("../target.zig");32const target_util = @import("../target.zig");
...@@ -11681,7 +11682,10 @@ fn firstParamSRet(fn_info: InternPool.Key.FuncType, zcu: *Zcu, target: std.Targe...@@ -11681,7 +11682,10 @@ fn firstParamSRet(fn_info: InternPool.Key.FuncType, zcu: *Zcu, target: std.Targe
11681 return switch (fn_info.cc) {11682 return switch (fn_info.cc) {
11682 .Unspecified, .Inline => returnTypeByRef(zcu, target, return_type),11683 .Unspecified, .Inline => returnTypeByRef(zcu, target, return_type),
11683 .C => switch (target.cpu.arch) {11684 .C => switch (target.cpu.arch) {
11684 .mips, .mipsel => false,11685 .mips, .mipsel => switch (mips_c_abi.classifyType(return_type, zcu, .ret)) {
11686 .memory, .i32_array => true,
11687 .byval => false,
11688 },
11685 .x86 => isByRef(return_type, zcu),11689 .x86 => isByRef(return_type, zcu),
11686 .x86_64 => switch (target.os.tag) {11690 .x86_64 => switch (target.os.tag) {
11687 .windows => x86_64_abi.classifyWindows(return_type, zcu) == .memory,11691 .windows => x86_64_abi.classifyWindows(return_type, zcu) == .memory,
...@@ -11732,7 +11736,12 @@ fn lowerFnRetTy(o: *Object, fn_info: InternPool.Key.FuncType) Allocator.Error!Bu...@@ -11732,7 +11736,12 @@ fn lowerFnRetTy(o: *Object, fn_info: InternPool.Key.FuncType) Allocator.Error!Bu
1173211736
11733 .C => {11737 .C => {
11734 switch (target.cpu.arch) {11738 switch (target.cpu.arch) {
11735 .mips, .mipsel => return o.lowerType(return_type),11739 .mips, .mipsel => {
11740 switch (mips_c_abi.classifyType(return_type, zcu, .ret)) {
11741 .memory, .i32_array => return .void,
11742 .byval => return o.lowerType(return_type),
11743 }
11744 },
11736 .x86 => return if (isByRef(return_type, zcu)) .void else o.lowerType(return_type),11745 .x86 => return if (isByRef(return_type, zcu)) .void else o.lowerType(return_type),
11737 .x86_64 => switch (target.os.tag) {11746 .x86_64 => switch (target.os.tag) {
11738 .windows => return lowerWin64FnRetTy(o, fn_info),11747 .windows => return lowerWin64FnRetTy(o, fn_info),
...@@ -11978,7 +11987,14 @@ const ParamTypeIterator = struct {...@@ -11978,7 +11987,14 @@ const ParamTypeIterator = struct {
11978 .mips, .mipsel => {11987 .mips, .mipsel => {
11979 it.zig_index += 1;11988 it.zig_index += 1;
11980 it.llvm_index += 1;11989 it.llvm_index += 1;
11981 return .byval;11990 switch (mips_c_abi.classifyType(ty, zcu, .arg)) {
11991 .memory => {
11992 it.byval_attr = true;
11993 return .byref;
11994 },
11995 .byval => return .byval,
11996 .i32_array => |size| return Lowering{ .i32_array = size },
11997 }
11982 },11998 },
11983 .x86_64 => switch (target.os.tag) {11999 .x86_64 => switch (target.os.tag) {
11984 .windows => return it.nextWin64(ty),12000 .windows => return it.nextWin64(ty),
test/c_abi/cfuncs.c+7-7
...@@ -2657,7 +2657,7 @@ void run_c_tests(void) {...@@ -2657,7 +2657,7 @@ void run_c_tests(void) {
2657 }2657 }
2658#endif2658#endif
26592659
2660#if !defined(__mips__) && !defined(ZIG_PPC32)2660#if !defined(ZIG_PPC32)
2661 {2661 {
2662 struct Struct_u64_u64 s = zig_ret_struct_u64_u64();2662 struct Struct_u64_u64 s = zig_ret_struct_u64_u64();
2663 assert_or_panic(s.a == 1);2663 assert_or_panic(s.a == 1);
...@@ -2708,7 +2708,7 @@ void run_c_tests(void) {...@@ -2708,7 +2708,7 @@ void run_c_tests(void) {
2708#endif2708#endif
27092709
2710#if !defined __i386__ && !defined __arm__ && !defined __aarch64__ && \2710#if !defined __i386__ && !defined __arm__ && !defined __aarch64__ && \
2711 !defined __mips__ && !defined __powerpc__ && !defined ZIG_RISCV642711 !defined __powerpc__ && !defined ZIG_RISCV64
2712 {2712 {
2713 struct SmallStructInts s = {1, 2, 3, 4};2713 struct SmallStructInts s = {1, 2, 3, 4};
2714 zig_small_struct_ints(s);2714 zig_small_struct_ints(s);
...@@ -2716,7 +2716,7 @@ void run_c_tests(void) {...@@ -2716,7 +2716,7 @@ void run_c_tests(void) {
2716#endif2716#endif
27172717
2718#if !defined __arm__ && !defined __aarch64__ && \2718#if !defined __arm__ && !defined __aarch64__ && \
2719 !defined __mips__ && !defined __powerpc__ && !defined ZIG_RISCV642719 !defined __powerpc__ && !defined ZIG_RISCV64
2720 {2720 {
2721 struct MedStructInts s = {1, 2, 3};2721 struct MedStructInts s = {1, 2, 3};
2722 zig_med_struct_ints(s);2722 zig_med_struct_ints(s);
...@@ -2741,7 +2741,7 @@ void run_c_tests(void) {...@@ -2741,7 +2741,7 @@ void run_c_tests(void) {
2741 zig_small_packed_struct(s);2741 zig_small_packed_struct(s);
2742 }2742 }
27432743
2744#if !defined __i386__ && !defined __arm__ && !defined __mips__ && \2744#if !defined __i386__ && !defined __arm__ && \
2745 !defined ZIG_PPC32 && !defined _ARCH_PPC642745 !defined ZIG_PPC32 && !defined _ARCH_PPC64
2746 {2746 {
2747 struct SplitStructInts s = {1234, 100, 1337};2747 struct SplitStructInts s = {1234, 100, 1337};
...@@ -2756,7 +2756,7 @@ void run_c_tests(void) {...@@ -2756,7 +2756,7 @@ void run_c_tests(void) {
2756 }2756 }
2757#endif2757#endif
27582758
2759#if !defined __i386__ && !defined __arm__ && !defined __mips__ && \2759#if !defined __i386__ && !defined __arm__ && \
2760 !defined ZIG_PPC32 && !defined _ARCH_PPC642760 !defined ZIG_PPC32 && !defined _ARCH_PPC64
2761 {2761 {
2762 struct SplitStructMixed s = {1234, 100, 1337.0f};2762 struct SplitStructMixed s = {1234, 100, 1337.0f};
...@@ -2764,7 +2764,7 @@ void run_c_tests(void) {...@@ -2764,7 +2764,7 @@ void run_c_tests(void) {
2764 }2764 }
2765#endif2765#endif
27662766
2767#if !defined __mips__ && !defined ZIG_PPC322767#if !defined ZIG_PPC32
2768 {2768 {
2769 struct BigStruct s = {30, 31, 32, 33, 34};2769 struct BigStruct s = {30, 31, 32, 33, 34};
2770 struct BigStruct res = zig_big_struct_both(s);2770 struct BigStruct res = zig_big_struct_both(s);
...@@ -2784,7 +2784,7 @@ void run_c_tests(void) {...@@ -2784,7 +2784,7 @@ void run_c_tests(void) {
2784 }2784 }
2785#endif2785#endif
27862786
2787#if !defined __mips__ && !defined ZIG_PPC322787#if !defined ZIG_PPC32
2788 {2788 {
2789 struct FloatRect r1 = {1, 21, 16, 4};2789 struct FloatRect r1 = {1, 21, 16, 4};
2790 struct FloatRect r2 = {178, 189, 21, 15};2790 struct FloatRect r2 = {178, 189, 21, 15};
test/c_abi/main.zig+33-33
...@@ -322,7 +322,7 @@ extern fn c_struct_u64_u64_7(usize, usize, usize, usize, usize, usize, usize, St...@@ -322,7 +322,7 @@ extern fn c_struct_u64_u64_7(usize, usize, usize, usize, usize, usize, usize, St
322extern fn c_struct_u64_u64_8(usize, usize, usize, usize, usize, usize, usize, usize, Struct_u64_u64) void;322extern fn c_struct_u64_u64_8(usize, usize, usize, usize, usize, usize, usize, usize, Struct_u64_u64) void;
323323
324test "C ABI struct u64 u64" {324test "C ABI struct u64 u64" {
325 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;325 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
326 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;326 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
327327
328 const s = c_ret_struct_u64_u64();328 const s = c_ret_struct_u64_u64();
...@@ -359,7 +359,7 @@ extern fn c_ret_struct_f32f32_f32() Struct_f32f32_f32;...@@ -359,7 +359,7 @@ extern fn c_ret_struct_f32f32_f32() Struct_f32f32_f32;
359extern fn c_struct_f32f32_f32(Struct_f32f32_f32) void;359extern fn c_struct_f32f32_f32(Struct_f32f32_f32) void;
360360
361test "C ABI struct {f32,f32} f32" {361test "C ABI struct {f32,f32} f32" {
362 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;362 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
363 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;363 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
364364
365 const s = c_ret_struct_f32f32_f32();365 const s = c_ret_struct_f32f32_f32();
...@@ -389,7 +389,7 @@ extern fn c_ret_struct_f32_f32f32() Struct_f32_f32f32;...@@ -389,7 +389,7 @@ extern fn c_ret_struct_f32_f32f32() Struct_f32_f32f32;
389extern fn c_struct_f32_f32f32(Struct_f32_f32f32) void;389extern fn c_struct_f32_f32f32(Struct_f32_f32f32) void;
390390
391test "C ABI struct f32 {f32,f32}" {391test "C ABI struct f32 {f32,f32}" {
392 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;392 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
393 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;393 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
394394
395 const s = c_ret_struct_f32_f32f32();395 const s = c_ret_struct_f32_f32f32();
...@@ -424,7 +424,7 @@ extern fn c_ret_struct_u32_union_u32_u32u32() Struct_u32_Union_u32_u32u32;...@@ -424,7 +424,7 @@ extern fn c_ret_struct_u32_union_u32_u32u32() Struct_u32_Union_u32_u32u32;
424extern fn c_struct_u32_union_u32_u32u32(Struct_u32_Union_u32_u32u32) void;424extern fn c_struct_u32_union_u32_u32u32(Struct_u32_Union_u32_u32u32) void;
425425
426test "C ABI struct{u32,union{u32,struct{u32,u32}}}" {426test "C ABI struct{u32,union{u32,struct{u32,u32}}}" {
427 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;427 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
428 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;428 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
429429
430 const s = c_ret_struct_u32_union_u32_u32u32();430 const s = c_ret_struct_u32_union_u32_u32u32();
...@@ -444,7 +444,7 @@ const BigStruct = extern struct {...@@ -444,7 +444,7 @@ const BigStruct = extern struct {
444extern fn c_big_struct(BigStruct) void;444extern fn c_big_struct(BigStruct) void;
445445
446test "C ABI big struct" {446test "C ABI big struct" {
447 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;447 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
448 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;448 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
449449
450 const s = BigStruct{450 const s = BigStruct{
...@@ -503,7 +503,7 @@ extern fn c_med_struct_mixed(MedStructMixed) void;...@@ -503,7 +503,7 @@ extern fn c_med_struct_mixed(MedStructMixed) void;
503extern fn c_ret_med_struct_mixed() MedStructMixed;503extern fn c_ret_med_struct_mixed() MedStructMixed;
504504
505test "C ABI medium struct of ints and floats" {505test "C ABI medium struct of ints and floats" {
506 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;506 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
507 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;507 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
508508
509 const s = MedStructMixed{509 const s = MedStructMixed{
...@@ -535,7 +535,7 @@ extern fn c_ret_small_struct_ints() SmallStructInts;...@@ -535,7 +535,7 @@ extern fn c_ret_small_struct_ints() SmallStructInts;
535535
536test "C ABI small struct of ints" {536test "C ABI small struct of ints" {
537 if (builtin.cpu.arch == .x86) return error.SkipZigTest;537 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
538 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;538 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
539 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;539 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
540540
541 const s = SmallStructInts{541 const s = SmallStructInts{
...@@ -568,7 +568,7 @@ extern fn c_med_struct_ints(MedStructInts) void;...@@ -568,7 +568,7 @@ extern fn c_med_struct_ints(MedStructInts) void;
568extern fn c_ret_med_struct_ints() MedStructInts;568extern fn c_ret_med_struct_ints() MedStructInts;
569569
570test "C ABI medium struct of ints" {570test "C ABI medium struct of ints" {
571 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;571 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
572 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;572 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
573573
574 const s = MedStructInts{574 const s = MedStructInts{
...@@ -646,7 +646,7 @@ extern fn c_split_struct_ints(SplitStructInt) void;...@@ -646,7 +646,7 @@ extern fn c_split_struct_ints(SplitStructInt) void;
646646
647test "C ABI split struct of ints" {647test "C ABI split struct of ints" {
648 if (builtin.cpu.arch == .x86) return error.SkipZigTest;648 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
649 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;649 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
650 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;650 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
651651
652 const s = SplitStructInt{652 const s = SplitStructInt{
...@@ -673,7 +673,7 @@ extern fn c_ret_split_struct_mixed() SplitStructMixed;...@@ -673,7 +673,7 @@ extern fn c_ret_split_struct_mixed() SplitStructMixed;
673673
674test "C ABI split struct of ints and floats" {674test "C ABI split struct of ints and floats" {
675 if (builtin.cpu.arch == .x86) return error.SkipZigTest;675 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
676 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;676 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
677 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;677 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
678678
679 const s = SplitStructMixed{679 const s = SplitStructMixed{
...@@ -700,7 +700,7 @@ extern fn c_multiple_struct_ints(Rect, Rect) void;...@@ -700,7 +700,7 @@ extern fn c_multiple_struct_ints(Rect, Rect) void;
700extern fn c_multiple_struct_floats(FloatRect, FloatRect) void;700extern fn c_multiple_struct_floats(FloatRect, FloatRect) void;
701701
702test "C ABI sret and byval together" {702test "C ABI sret and byval together" {
703 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;703 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
704 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;704 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
705705
706 const s = BigStruct{706 const s = BigStruct{
...@@ -752,7 +752,7 @@ const Vector5 = extern struct {...@@ -752,7 +752,7 @@ const Vector5 = extern struct {
752extern fn c_big_struct_floats(Vector5) void;752extern fn c_big_struct_floats(Vector5) void;
753753
754test "C ABI structs of floats as parameter" {754test "C ABI structs of floats as parameter" {
755 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;755 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
756 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;756 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
757757
758 const v3 = Vector3{758 const v3 = Vector3{
...@@ -828,7 +828,7 @@ export fn zig_multiple_struct_floats(x: FloatRect, y: FloatRect) void {...@@ -828,7 +828,7 @@ export fn zig_multiple_struct_floats(x: FloatRect, y: FloatRect) void {
828}828}
829829
830test "C ABI structs of floats as multiple parameters" {830test "C ABI structs of floats as multiple parameters" {
831 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;831 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
832 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;832 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
833833
834 const r1 = FloatRect{834 const r1 = FloatRect{
...@@ -941,7 +941,7 @@ extern fn c_ret_struct_with_array() StructWithArray;...@@ -941,7 +941,7 @@ extern fn c_ret_struct_with_array() StructWithArray;
941941
942test "Struct with array as padding." {942test "Struct with array as padding." {
943 if (builtin.cpu.arch == .x86) return error.SkipZigTest;943 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
944 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;944 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
945 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;945 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
946946
947 c_struct_with_array(.{ .a = 1, .padding = undefined, .b = 2 });947 c_struct_with_array(.{ .a = 1, .padding = undefined, .b = 2 });
...@@ -966,7 +966,7 @@ extern fn c_float_array_struct(FloatArrayStruct) void;...@@ -966,7 +966,7 @@ extern fn c_float_array_struct(FloatArrayStruct) void;
966extern fn c_ret_float_array_struct() FloatArrayStruct;966extern fn c_ret_float_array_struct() FloatArrayStruct;
967967
968test "Float array like struct" {968test "Float array like struct" {
969 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;969 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
970 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;970 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
971971
972 c_float_array_struct(.{972 c_float_array_struct(.{
...@@ -1031,7 +1031,7 @@ extern fn c_ret_big_vec() BigVec;...@@ -1031,7 +1031,7 @@ extern fn c_ret_big_vec() BigVec;
1031test "big simd vector" {1031test "big simd vector" {
1032 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;1032 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
10331033
1034 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;1034 if (builtin.cpu.arch.isMIPS64() and builtin.mode != .Debug) return error.SkipZigTest;
1035 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;1035 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
1036 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag == .macos and builtin.mode != .Debug) return error.SkipZigTest;1036 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag == .macos and builtin.mode != .Debug) return error.SkipZigTest;
10371037
...@@ -5340,7 +5340,7 @@ extern fn c_ptr_size_float_struct(Vector2) void;...@@ -5340,7 +5340,7 @@ extern fn c_ptr_size_float_struct(Vector2) void;
5340extern fn c_ret_ptr_size_float_struct() Vector2;5340extern fn c_ret_ptr_size_float_struct() Vector2;
53415341
5342test "C ABI pointer sized float struct" {5342test "C ABI pointer sized float struct" {
5343 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5343 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
5344 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;5344 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
5345 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;5345 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
53465346
...@@ -5362,25 +5362,25 @@ pub inline fn expectOk(c_err: c_int) !void {...@@ -5362,25 +5362,25 @@ pub inline fn expectOk(c_err: c_int) !void {
5362/// Tests for Double + Char struct5362/// Tests for Double + Char struct
5363const DC = extern struct { v1: f64, v2: u8 };5363const DC = extern struct { v1: f64, v2: u8 };
5364test "DC: Zig passes to C" {5364test "DC: Zig passes to C" {
5365 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5365 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
5366 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;5366 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
5367 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;5367 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5368 try expectOk(c_assert_DC(.{ .v1 = -0.25, .v2 = 15 }));5368 try expectOk(c_assert_DC(.{ .v1 = -0.25, .v2 = 15 }));
5369}5369}
5370test "DC: Zig returns to C" {5370test "DC: Zig returns to C" {
5371 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;5371 if (builtin.cpu.arch.isMIPS64() and builtin.mode != .Debug) return error.SkipZigTest;
5372 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;5372 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
5373 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;5373 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5374 try expectOk(c_assert_ret_DC());5374 try expectOk(c_assert_ret_DC());
5375}5375}
5376test "DC: C passes to Zig" {5376test "DC: C passes to Zig" {
5377 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5377 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
5378 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;5378 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
5379 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;5379 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5380 try expectOk(c_send_DC());5380 try expectOk(c_send_DC());
5381}5381}
5382test "DC: C returns to Zig" {5382test "DC: C returns to Zig" {
5383 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;5383 if (builtin.cpu.arch.isMIPS64() and builtin.mode != .Debug) return error.SkipZigTest;
5384 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;5384 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
5385 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;5385 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5386 try expectEqual(DC{ .v1 = -0.25, .v2 = 15 }, c_ret_DC());5386 try expectEqual(DC{ .v1 = -0.25, .v2 = 15 }, c_ret_DC());
...@@ -5406,12 +5406,12 @@ const CFF = extern struct { v1: u8, v2: f32, v3: f32 };...@@ -5406,12 +5406,12 @@ const CFF = extern struct { v1: u8, v2: f32, v3: f32 };
54065406
5407test "CFF: Zig passes to C" {5407test "CFF: Zig passes to C" {
5408 if (builtin.target.cpu.arch == .x86) return error.SkipZigTest;5408 if (builtin.target.cpu.arch == .x86) return error.SkipZigTest;
5409 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5409 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
5410 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;5410 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5411 try expectOk(c_assert_CFF(.{ .v1 = 39, .v2 = 0.875, .v3 = 1.0 }));5411 try expectOk(c_assert_CFF(.{ .v1 = 39, .v2 = 0.875, .v3 = 1.0 }));
5412}5412}
5413test "CFF: Zig returns to C" {5413test "CFF: Zig returns to C" {
5414 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5414 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
5415 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;5415 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5416 try expectOk(c_assert_ret_CFF());5416 try expectOk(c_assert_ret_CFF());
5417}5417}
...@@ -5419,7 +5419,7 @@ test "CFF: C passes to Zig" {...@@ -5419,7 +5419,7 @@ test "CFF: C passes to Zig" {
5419 if (builtin.target.cpu.arch == .x86) return error.SkipZigTest;5419 if (builtin.target.cpu.arch == .x86) return error.SkipZigTest;
5420 if (builtin.cpu.arch.isRISCV() and builtin.mode != .Debug) return error.SkipZigTest;5420 if (builtin.cpu.arch.isRISCV() and builtin.mode != .Debug) return error.SkipZigTest;
5421 if (builtin.cpu.arch == .aarch64 and builtin.mode != .Debug) return error.SkipZigTest;5421 if (builtin.cpu.arch == .aarch64 and builtin.mode != .Debug) return error.SkipZigTest;
5422 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5422 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
5423 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;5423 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
54245424
5425 try expectOk(c_send_CFF());5425 try expectOk(c_send_CFF());
...@@ -5427,7 +5427,7 @@ test "CFF: C passes to Zig" {...@@ -5427,7 +5427,7 @@ test "CFF: C passes to Zig" {
5427test "CFF: C returns to Zig" {5427test "CFF: C returns to Zig" {
5428 if (builtin.cpu.arch == .aarch64 and builtin.mode != .Debug) return error.SkipZigTest;5428 if (builtin.cpu.arch == .aarch64 and builtin.mode != .Debug) return error.SkipZigTest;
5429 if (builtin.cpu.arch.isRISCV() and builtin.mode != .Debug) return error.SkipZigTest;5429 if (builtin.cpu.arch.isRISCV() and builtin.mode != .Debug) return error.SkipZigTest;
5430 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5430 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
5431 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;5431 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5432 try expectEqual(CFF{ .v1 = 39, .v2 = 0.875, .v3 = 1.0 }, c_ret_CFF());5432 try expectEqual(CFF{ .v1 = 39, .v2 = 0.875, .v3 = 1.0 }, c_ret_CFF());
5433}5433}
...@@ -5451,22 +5451,22 @@ pub export fn zig_ret_CFF() CFF {...@@ -5451,22 +5451,22 @@ pub export fn zig_ret_CFF() CFF {
5451const PD = extern struct { v1: ?*anyopaque, v2: f64 };5451const PD = extern struct { v1: ?*anyopaque, v2: f64 };
54525452
5453test "PD: Zig passes to C" {5453test "PD: Zig passes to C" {
5454 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5454 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
5455 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;5455 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5456 try expectOk(c_assert_PD(.{ .v1 = null, .v2 = 0.5 }));5456 try expectOk(c_assert_PD(.{ .v1 = null, .v2 = 0.5 }));
5457}5457}
5458test "PD: Zig returns to C" {5458test "PD: Zig returns to C" {
5459 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;5459 if (builtin.cpu.arch.isMIPS64() and builtin.mode != .Debug) return error.SkipZigTest;
5460 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;5460 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5461 try expectOk(c_assert_ret_PD());5461 try expectOk(c_assert_ret_PD());
5462}5462}
5463test "PD: C passes to Zig" {5463test "PD: C passes to Zig" {
5464 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5464 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
5465 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;5465 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5466 try expectOk(c_send_PD());5466 try expectOk(c_send_PD());
5467}5467}
5468test "PD: C returns to Zig" {5468test "PD: C returns to Zig" {
5469 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;5469 if (builtin.cpu.arch.isMIPS64() and builtin.mode != .Debug) return error.SkipZigTest;
5470 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;5470 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5471 try expectEqual(PD{ .v1 = null, .v2 = 0.5 }, c_ret_PD());5471 try expectEqual(PD{ .v1 = null, .v2 = 0.5 }, c_ret_PD());
5472}5472}
...@@ -5520,7 +5520,7 @@ const ByVal = extern struct {...@@ -5520,7 +5520,7 @@ const ByVal = extern struct {
55205520
5521extern fn c_func_ptr_byval(*anyopaque, *anyopaque, ByVal, c_ulong, *anyopaque, c_ulong) void;5521extern fn c_func_ptr_byval(*anyopaque, *anyopaque, ByVal, c_ulong, *anyopaque, c_ulong) void;
5522test "C function that takes byval struct called via function pointer" {5522test "C function that takes byval struct called via function pointer" {
5523 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;5523 if (builtin.cpu.arch.isMIPS64() and builtin.mode != .Debug) return error.SkipZigTest;
5524 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;5524 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
55255525
5526 var fn_ptr = &c_func_ptr_byval;5526 var fn_ptr = &c_func_ptr_byval;
...@@ -5551,7 +5551,7 @@ const f16_struct = extern struct {...@@ -5551,7 +5551,7 @@ const f16_struct = extern struct {
5551};5551};
5552extern fn c_f16_struct(f16_struct) f16_struct;5552extern fn c_f16_struct(f16_struct) f16_struct;
5553test "f16 struct" {5553test "f16 struct" {
5554 if (builtin.target.cpu.arch.isMIPS()) return error.SkipZigTest;5554 if (builtin.target.cpu.arch.isMIPS64()) return error.SkipZigTest;
5555 if (builtin.target.cpu.arch.isPowerPC32()) return error.SkipZigTest;5555 if (builtin.target.cpu.arch.isPowerPC32()) return error.SkipZigTest;
5556 if (builtin.cpu.arch.isARM() and builtin.mode != .Debug) return error.SkipZigTest;5556 if (builtin.cpu.arch.isARM() and builtin.mode != .Debug) return error.SkipZigTest;
55575557
...@@ -5666,7 +5666,7 @@ const Coord2 = extern struct {...@@ -5666,7 +5666,7 @@ const Coord2 = extern struct {
56665666
5667extern fn stdcall_coord2(Coord2, Coord2, Coord2) callconv(stdcall_callconv) Coord2;5667extern fn stdcall_coord2(Coord2, Coord2, Coord2) callconv(stdcall_callconv) Coord2;
5668test "Stdcall ABI structs" {5668test "Stdcall ABI structs" {
5669 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5669 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
5670 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;5670 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
56715671
5672 const res = stdcall_coord2(5672 const res = stdcall_coord2(
...@@ -5751,7 +5751,7 @@ const byval_tail_callsite_attr = struct {...@@ -5751,7 +5751,7 @@ const byval_tail_callsite_attr = struct {
5751};5751};
57525752
5753test "byval tail callsite attribute" {5753test "byval tail callsite attribute" {
5754 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5754 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
5755 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;5755 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
57565756
5757 // Originally reported at https://github.com/ziglang/zig/issues/162905757 // Originally reported at https://github.com/ziglang/zig/issues/16290