| author |  Alex Rønne Petersen <alex@alexrp.com> 2024-11-02 02:34:10+01:00 |
| committer | Alex Rønne Petersen <alex@alexrp.com> 2024-11-02 10:25:40+01:00 |
| log | fccf15fc9f77001c513946cd1f37e8f6a57188e1 |
| tree | 8036188dfb3166fd0c5bf33ec7f6097334d0b8ad |
| parent | ab89af3d397291f0126ad17d3787a51284457884 |
std.Target: Remove armv7k/armv7s.
Like d1d95294fd657f771657ea671a6984b860347fb0, this is more Apple nonsense where
they abused the arch component of the triple to encode what's really an ABI.
Handling this correctly in Zig's target triple model would take quite a bit of
work. Fortunately, the last Armv7-based Apple Watch was released in 2017 and
these targets are now considered legacy. By the time Zig hits 1.0, they will be
a distant memory. So just remove them.3 files changed, 2 insertions(+), 21 deletions(-)
lib/std/Target/arm.zig-16
| ... | @@ -158,10 +158,8 @@ pub const Feature = enum { | ... | @@ -158,10 +158,8 @@ pub const Feature = enum { |
| 158 | v6t2, | 158 | v6t2, |
| 159 | v7a, | 159 | v7a, |
| 160 | v7em, | 160 | v7em, |
| 161 | v7k, | ||
| 162 | v7m, | 161 | v7m, |
| 163 | v7r, | 162 | v7r, |
| 164 | v7s, | ||
| 165 | v7ve, | 163 | v7ve, |
| 166 | v8_1a, | 164 | v8_1a, |
| 167 | v8_1m_main, | 165 | v8_1m_main, |
| ... | @@ -1177,13 +1175,6 @@ pub const all_features = blk: { | ... | @@ -1177,13 +1175,6 @@ pub const all_features = blk: { |
| 1177 | .thumb_mode, | 1175 | .thumb_mode, |
| 1178 | }), | 1176 | }), |
| 1179 | }; | 1177 | }; |
| 1180 | result[@intFromEnum(Feature.v7k)] = .{ | ||
| 1181 | .llvm_name = "armv7k", | ||
| 1182 | .description = "ARMv7a architecture", | ||
| 1183 | .dependencies = featureSet(&[_]Feature{ | ||
| 1184 | .v7a, | ||
| 1185 | }), | ||
| 1186 | }; | ||
| 1187 | result[@intFromEnum(Feature.v7m)] = .{ | 1178 | result[@intFromEnum(Feature.v7m)] = .{ |
| 1188 | .llvm_name = "armv7-m", | 1179 | .llvm_name = "armv7-m", |
| 1189 | .description = "ARMv7m architecture", | 1180 | .description = "ARMv7m architecture", |
| ... | @@ -1208,13 +1199,6 @@ pub const all_features = blk: { | ... | @@ -1208,13 +1199,6 @@ pub const all_features = blk: { |
| 1208 | .rclass, | 1199 | .rclass, |
| 1209 | }), | 1200 | }), |
| 1210 | }; | 1201 | }; |
| 1211 | result[@intFromEnum(Feature.v7s)] = .{ | ||
| 1212 | .llvm_name = "armv7s", | ||
| 1213 | .description = "ARMv7a architecture", | ||
| 1214 | .dependencies = featureSet(&[_]Feature{ | ||
| 1215 | .v7a, | ||
| 1216 | }), | ||
| 1217 | }; | ||
| 1218 | result[@intFromEnum(Feature.v7ve)] = .{ | 1202 | result[@intFromEnum(Feature.v7ve)] = .{ |
| 1219 | .llvm_name = "armv7ve", | 1203 | .llvm_name = "armv7ve", |
| 1220 | .description = "ARMv7ve architecture", | 1204 | .description = "ARMv7ve architecture", |
src/codegen/llvm.zig-3
| ... | @@ -118,9 +118,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 { | ... | @@ -118,9 +118,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 { |
| 118 | .{ .v6kz, "v6kz" }, | 118 | .{ .v6kz, "v6kz" }, |
| 119 | .{ .v6m, "v6m" }, | 119 | .{ .v6m, "v6m" }, |
| 120 | .{ .v6t2, "v6t2" }, | 120 | .{ .v6t2, "v6t2" }, |
| 121 | // v7k and v7s imply v7a so they have to be tested first. | ||
| 122 | .{ .v7k, "v7k" }, | ||
| 123 | .{ .v7s, "v7s" }, | ||
| 124 | .{ .v7a, "v7a" }, | 121 | .{ .v7a, "v7a" }, |
| 125 | .{ .v7em, "v7em" }, | 122 | .{ .v7em, "v7em" }, |
| 126 | .{ .v7m, "v7m" }, | 123 | .{ .v7m, "v7m" }, |
tools/update_cpu_features.zig+2-2
| ... | @@ -699,11 +699,11 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -699,11 +699,11 @@ const llvm_targets = [_]LlvmTarget{ |
| 699 | }, | 699 | }, |
| 700 | .{ | 700 | .{ |
| 701 | .llvm_name = "armv7k", | 701 | .llvm_name = "armv7k", |
| 702 | .zig_name = "v7k", | 702 | .omit = true, |
| 703 | }, | 703 | }, |
| 704 | .{ | 704 | .{ |
| 705 | .llvm_name = "armv7s", | 705 | .llvm_name = "armv7s", |
| 706 | .zig_name = "v7s", | 706 | .omit = true, |
| 707 | }, | 707 | }, |
| 708 | .{ | 708 | .{ |
| 709 | .llvm_name = "armv7ve", | 709 | .llvm_name = "armv7ve", |