1/* $OpenBSD: bus.h,v 1.11 2024/11/18 05:32:39 jsg Exp $ */
2/*
3 * Copyright (c) 2003-2004 Opsycon AB Sweden. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25
26#ifndef _MACHINE_BUS_H_
27#define _MACHINE_BUS_H_
28
29#ifdef __STDC__
30#define CAT(a,b) a##b
31#define CAT3(a,b,c) a##b##c
32#else
33#define CAT(a,b) a/**/b
34#define CAT3(a,b,c) a/**/b/**/c
35#endif
36
37/*
38 * Bus access types.
39 */
40struct bus_space;
41typedef u_long bus_addr_t;
42typedef u_long bus_size_t;
43typedef u_long bus_space_handle_t;
44typedef struct bus_space *bus_space_tag_t;
45typedef struct bus_space bus_space_t;
46
47struct bus_space {
48 bus_addr_t bus_base;
49 void *bus_private;
50 u_int8_t (*_space_read_1)(bus_space_tag_t , bus_space_handle_t,
51 bus_size_t);
52 void (*_space_write_1)(bus_space_tag_t , bus_space_handle_t,
53 bus_size_t, u_int8_t);
54 u_int16_t (*_space_read_2)(bus_space_tag_t , bus_space_handle_t,
55 bus_size_t);
56 void (*_space_write_2)(bus_space_tag_t , bus_space_handle_t,
57 bus_size_t, u_int16_t);
58 u_int32_t (*_space_read_4)(bus_space_tag_t , bus_space_handle_t,
59 bus_size_t);
60 void (*_space_write_4)(bus_space_tag_t , bus_space_handle_t,
61 bus_size_t, u_int32_t);
62 u_int64_t (*_space_read_8)(bus_space_tag_t , bus_space_handle_t,
63 bus_size_t);
64 void (*_space_write_8)(bus_space_tag_t , bus_space_handle_t,
65 bus_size_t, u_int64_t);
66 void (*_space_read_raw_2)(bus_space_tag_t, bus_space_handle_t,
67 bus_addr_t, u_int8_t *, bus_size_t);
68 void (*_space_write_raw_2)(bus_space_tag_t, bus_space_handle_t,
69 bus_addr_t, const u_int8_t *, bus_size_t);
70 void (*_space_read_raw_4)(bus_space_tag_t, bus_space_handle_t,
71 bus_addr_t, u_int8_t *, bus_size_t);
72 void (*_space_write_raw_4)(bus_space_tag_t, bus_space_handle_t,
73 bus_addr_t, const u_int8_t *, bus_size_t);
74 void (*_space_read_raw_8)(bus_space_tag_t, bus_space_handle_t,
75 bus_addr_t, u_int8_t *, bus_size_t);
76 void (*_space_write_raw_8)(bus_space_tag_t, bus_space_handle_t,
77 bus_addr_t, const u_int8_t *, bus_size_t);
78 int (*_space_map)(bus_space_tag_t , bus_addr_t,
79 bus_size_t, int, bus_space_handle_t *);
80 void (*_space_unmap)(bus_space_tag_t, bus_space_handle_t,
81 bus_size_t);
82 int (*_space_subregion)(bus_space_tag_t, bus_space_handle_t,
83 bus_size_t, bus_size_t, bus_space_handle_t *);
84 void * (*_space_vaddr)(bus_space_tag_t, bus_space_handle_t);
85 paddr_t (*_space_mmap)(bus_space_tag_t, bus_addr_t, off_t,
86 int, int);
87};
88
89#define bus_space_read_1(t, h, o) (*(t)->_space_read_1)((t), (h), (o))
90#define bus_space_read_2(t, h, o) (*(t)->_space_read_2)((t), (h), (o))
91#define bus_space_read_4(t, h, o) (*(t)->_space_read_4)((t), (h), (o))
92#define bus_space_read_8(t, h, o) (*(t)->_space_read_8)((t), (h), (o))
93
94#define bus_space_write_1(t, h, o, v) (*(t)->_space_write_1)((t), (h), (o), (v))
95#define bus_space_write_2(t, h, o, v) (*(t)->_space_write_2)((t), (h), (o), (v))
96#define bus_space_write_4(t, h, o, v) (*(t)->_space_write_4)((t), (h), (o), (v))
97#define bus_space_write_8(t, h, o, v) (*(t)->_space_write_8)((t), (h), (o), (v))
98
99#define bus_space_read_raw_2(t, h, o) \
100 (*(t)->_space_read_2)((t), (h), (o))
101#define bus_space_read_raw_4(t, h, o) \
102 (*(t)->_space_read_4)((t), (h), (o))
103#define bus_space_read_raw_8(t, h, o) \
104 (*(t)->_space_read_8)((t), (h), (o))
105
106#define bus_space_write_raw_2(t, h, o, v) \
107 (*(t)->_space_write_2)((t), (h), (o), (v))
108#define bus_space_write_raw_4(t, h, o, v) \
109 (*(t)->_space_write_4)((t), (h), (o), (v))
110#define bus_space_write_raw_8(t, h, o, v) \
111 (*(t)->_space_write_8)((t), (h), (o), (v))
112
113#define bus_space_read_raw_multi_2(t, h, a, b, l) \
114 (*(t)->_space_read_raw_2)((t), (h), (a), (b), (l))
115#define bus_space_read_raw_multi_4(t, h, a, b, l) \
116 (*(t)->_space_read_raw_4)((t), (h), (a), (b), (l))
117#define bus_space_read_raw_multi_8(t, h, a, b, l) \
118 (*(t)->_space_read_raw_8)((t), (h), (a), (b), (l))
119
120#define bus_space_write_raw_multi_2(t, h, a, b, l) \
121 (*(t)->_space_write_raw_2)((t), (h), (a), (b), (l))
122#define bus_space_write_raw_multi_4(t, h, a, b, l) \
123 (*(t)->_space_write_raw_4)((t), (h), (a), (b), (l))
124#define bus_space_write_raw_multi_8(t, h, a, b, l) \
125 (*(t)->_space_write_raw_8)((t), (h), (a), (b), (l))
126
127#define bus_space_map(t, o, s, c, p) (*(t)->_space_map)((t), (o), (s), (c), (p))
128#define bus_space_unmap(t, h, s) (*(t)->_space_unmap)((t), (h), (s))
129#define bus_space_subregion(t, h, o, s, p) \
130 (*(t)->_space_subregion)((t), (h), (o), (s), (p))
131
132#define BUS_SPACE_MAP_CACHEABLE 0x01
133#define BUS_SPACE_MAP_POSTED 0x02
134#define BUS_SPACE_MAP_LINEAR 0x04
135#define BUS_SPACE_MAP_PREFETCHABLE 0x08
136
137extern bus_space_t arm64_bs_tag;
138
139#define bus_space_vaddr(t, h) (*(t)->_space_vaddr)((t), (h))
140#define bus_space_mmap(t, a, o, p, f) \
141 (*(t)->_space_mmap)((t), (a), (o), (p), (f))
142
143/*----------------------------------------------------------------------------*/
144#define bus_space_read_multi(n,m) \
145static __inline void \
146CAT(bus_space_read_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
147 bus_size_t o, CAT3(u_int,m,_t) *x, size_t cnt) \
148{ \
149 while (cnt--) \
150 *x++ = CAT(bus_space_read_,n)(bst, bsh, o); \
151}
152
153bus_space_read_multi(1,8)
154bus_space_read_multi(2,16)
155bus_space_read_multi(4,32)
156bus_space_read_multi(8,64)
157
158/*----------------------------------------------------------------------------*/
159#define bus_space_read_region(n,m) \
160static __inline void \
161CAT(bus_space_read_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
162 bus_addr_t ba, CAT3(u_int,m,_t) *x, size_t cnt) \
163{ \
164 while (cnt--) { \
165 *x++ = CAT(bus_space_read_,n)(bst, bsh, ba); \
166 ba += (n); \
167 } \
168}
169
170bus_space_read_region(1,8)
171bus_space_read_region(2,16)
172bus_space_read_region(4,32)
173bus_space_read_region(8,64)
174
175/*----------------------------------------------------------------------------*/
176#define bus_space_read_raw_region(n,m) \
177static __inline void \
178CAT(bus_space_read_raw_region_,n)(bus_space_tag_t bst, \
179 bus_space_handle_t bsh, \
180 bus_addr_t ba, u_int8_t *x, size_t cnt) \
181{ \
182 cnt >>= ((n) >> 1); \
183 while (cnt--) { \
184 CAT(bus_space_read_raw_multi_,n)(bst, bsh, ba, x, (n)); \
185 ba += (n); \
186 x += (n); \
187 } \
188}
189
190bus_space_read_raw_region(2,16)
191bus_space_read_raw_region(4,32)
192bus_space_read_raw_region(8,64)
193
194/*----------------------------------------------------------------------------*/
195#define bus_space_write_multi(n,m) \
196static __inline void \
197CAT(bus_space_write_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
198 bus_size_t o, const CAT3(u_int,m,_t) *x, size_t cnt) \
199{ \
200 while (cnt--) \
201 CAT(bus_space_write_,n)(bst, bsh, o, *x++); \
202}
203
204bus_space_write_multi(1,8)
205bus_space_write_multi(2,16)
206bus_space_write_multi(4,32)
207bus_space_write_multi(8,64)
208
209/*----------------------------------------------------------------------------*/
210#define bus_space_write_region(n,m) \
211static __inline void \
212CAT(bus_space_write_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
213 bus_addr_t ba, const CAT3(u_int,m,_t) *x, size_t cnt) \
214{ \
215 while (cnt--) { \
216 CAT(bus_space_write_,n)(bst, bsh, ba, *x++); \
217 ba += (n); \
218 } \
219}
220
221bus_space_write_region(1,8)
222bus_space_write_region(2,16)
223bus_space_write_region(4,32)
224bus_space_write_region(8,64)
225
226/*----------------------------------------------------------------------------*/
227#define bus_space_write_raw_region(n,m) \
228static __inline void \
229CAT(bus_space_write_raw_region_,n)(bus_space_tag_t bst, \
230 bus_space_handle_t bsh, \
231 bus_addr_t ba, const u_int8_t *x, size_t cnt) \
232{ \
233 cnt >>= ((n) >> 1); \
234 while (cnt--) { \
235 CAT(bus_space_write_raw_multi_,n)(bst, bsh, ba, x, (n)); \
236 ba += (n); \
237 x += (n); \
238 } \
239}
240
241bus_space_write_raw_region(2,16)
242bus_space_write_raw_region(4,32)
243bus_space_write_raw_region(8,64)
244
245/*----------------------------------------------------------------------------*/
246#define bus_space_set_region(n,m) \
247static __inline void \
248CAT(bus_space_set_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
249 bus_addr_t ba, CAT3(u_int,m,_t) x, size_t cnt) \
250{ \
251 while (cnt--) { \
252 CAT(bus_space_write_,n)(bst, bsh, ba, x); \
253 ba += (n); \
254 } \
255}
256
257bus_space_set_region(1,8)
258bus_space_set_region(2,16)
259bus_space_set_region(4,32)
260bus_space_set_region(8,64)
261
262/*----------------------------------------------------------------------------*/
263static __inline void
264bus_space_copy_1(void *v, bus_space_handle_t h1, bus_size_t o1,
265 bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
266{
267 char *s = (char *)(h1 + o1);
268 char *d = (char *)(h2 + o2);
269
270 while (c--)
271 *d++ = *s++;
272}
273
274
275static __inline void
276bus_space_copy_2(void *v, bus_space_handle_t h1, bus_size_t o1,
277 bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
278{
279 short *s = (short *)(h1 + o1);
280 short *d = (short *)(h2 + o2);
281
282 while (c--)
283 *d++ = *s++;
284}
285
286static __inline void
287bus_space_copy_4(void *v, bus_space_handle_t h1, bus_size_t o1,
288 bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
289{
290 int *s = (int *)(h1 + o1);
291 int *d = (int *)(h2 + o2);
292
293 while (c--)
294 *d++ = *s++;
295}
296
297static __inline void
298bus_space_copy_8(void *v, bus_space_handle_t h1, bus_size_t o1,
299 bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
300{
301 int64_t *s = (int64_t *)(h1 + o1);
302 int64_t *d = (int64_t *)(h2 + o2);
303
304 while (c--)
305 *d++ = *s++;
306}
307
308/*----------------------------------------------------------------------------*/
309/*
310 * Bus read/write barrier methods.
311 *
312 * void bus_space_barrier(bus_space_tag_t tag,
313 * bus_space_handle_t bsh, bus_size_t offset,
314 * bus_size_t len, int flags);
315 *
316 */
317static inline void
318bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset,
319 bus_size_t length, int flags)
320{
321 __asm__ volatile ("dsb sy" ::: "memory");
322}
323#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
324#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
325
326#define BUS_DMA_WAITOK 0x0000
327#define BUS_DMA_NOWAIT 0x0001
328#define BUS_DMA_ALLOCNOW 0x0002
329#define BUS_DMA_COHERENT 0x0008
330#define BUS_DMA_BUS1 0x0010 /* placeholders for bus functions... */
331#define BUS_DMA_BUS2 0x0020
332#define BUS_DMA_BUS3 0x0040
333#define BUS_DMA_BUS4 0x0080
334#define BUS_DMA_READ 0x0100 /* mapping is device -> memory only */
335#define BUS_DMA_WRITE 0x0200 /* mapping is memory -> device only */
336#define BUS_DMA_STREAMING 0x0400 /* hint: sequential, unidirectional */
337#define BUS_DMA_ZERO 0x0800 /* zero memory in dmamem_alloc */
338#define BUS_DMA_NOCACHE 0x1000
339#define BUS_DMA_64BIT 0x2000 /* device handles 64bit dva */
340#define BUS_DMA_FIXED 0x4000 /* place mapping at specified dva */
341
342/* Forwards needed by prototypes below. */
343struct mbuf;
344struct proc;
345struct uio;
346
347#define BUS_DMASYNC_POSTREAD 0x0001
348#define BUS_DMASYNC_POSTWRITE 0x0002
349#define BUS_DMASYNC_PREREAD 0x0004
350#define BUS_DMASYNC_PREWRITE 0x0008
351
352typedef struct machine_bus_dma_tag *bus_dma_tag_t;
353typedef struct machine_bus_dmamap *bus_dmamap_t;
354
355/*
356 * bus_dma_segment_t
357 *
358 * Describes a single contiguous DMA transaction. Values
359 * are suitable for programming into DMA registers.
360 */
361struct machine_bus_dma_segment {
362 bus_addr_t ds_addr; /* DMA address */
363 bus_size_t ds_len; /* length of transfer */
364
365 paddr_t _ds_paddr; /* CPU address */
366 vaddr_t _ds_vaddr; /* CPU address */
367};
368typedef struct machine_bus_dma_segment bus_dma_segment_t;
369
370/*
371 * bus_dma_tag_t
372 *
373 * A machine-dependent opaque type describing the implementation of
374 * DMA for a given bus.
375 */
376
377struct machine_bus_dma_tag {
378 void *_cookie; /* cookie used in the guts */
379 int _flags; /* misc. flags */
380
381 /*
382 * DMA mapping methods.
383 */
384 int (*_dmamap_create)(bus_dma_tag_t , bus_size_t, int,
385 bus_size_t, bus_size_t, int, bus_dmamap_t *);
386 void (*_dmamap_destroy)(bus_dma_tag_t , bus_dmamap_t);
387 int (*_dmamap_load)(bus_dma_tag_t , bus_dmamap_t, void *,
388 bus_size_t, struct proc *, int);
389 int (*_dmamap_load_mbuf)(bus_dma_tag_t , bus_dmamap_t,
390 struct mbuf *, int);
391 int (*_dmamap_load_uio)(bus_dma_tag_t , bus_dmamap_t,
392 struct uio *, int);
393 int (*_dmamap_load_raw)(bus_dma_tag_t , bus_dmamap_t,
394 bus_dma_segment_t *, int, bus_size_t, int);
395 int (*_dmamap_load_buffer)(bus_dma_tag_t, bus_dmamap_t, void *,
396 bus_size_t, struct proc *, int, paddr_t *, int *, int);
397 void (*_dmamap_unload)(bus_dma_tag_t , bus_dmamap_t);
398 void (*_dmamap_sync)(bus_dma_tag_t , bus_dmamap_t,
399 bus_addr_t, bus_size_t, int);
400
401 /*
402 * DMA memory utility functions.
403 */
404 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
405 bus_size_t, bus_dma_segment_t *, int, int *, int);
406 int (*_dmamem_alloc_range)(bus_dma_tag_t, bus_size_t, bus_size_t,
407 bus_size_t, bus_dma_segment_t *, int, int *, int,
408 bus_addr_t, bus_addr_t);
409 void (*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int);
410 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
411 int, size_t, caddr_t *, int);
412 void (*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t);
413 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
414 int, off_t, int, int);
415
416 /*
417 * internal memory address translation information.
418 */
419 bus_addr_t _dma_mask;
420};
421
422#define bus_dmamap_create(t, s, n, m, b, f, p) \
423 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
424#define bus_dmamap_destroy(t, p) \
425 (*(t)->_dmamap_destroy)((t), (p))
426#define bus_dmamap_load(t, m, b, s, p, f) \
427 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
428#define bus_dmamap_load_mbuf(t, m, b, f) \
429 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
430#define bus_dmamap_load_uio(t, m, u, f) \
431 (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
432#define bus_dmamap_load_raw(t, m, sg, n, s, f) \
433 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
434#define bus_dmamap_unload(t, p) \
435 (*(t)->_dmamap_unload)((t), (p))
436#define bus_dmamap_sync(t, p, a, l, o) \
437 (void)((t)->_dmamap_sync ? \
438 (*(t)->_dmamap_sync)((t), (p), (a), (l), (o)) : (void)0)
439
440#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
441 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
442#define bus_dmamem_alloc_range(t, s, a, b, sg, n, r, f, l, h) \
443 (*(t)->_dmamem_alloc_range)((t), (s), (a), (b), (sg), \
444 (n), (r), (f), (l), (h))
445#define bus_dmamem_free(t, sg, n) \
446 (*(t)->_dmamem_free)((t), (sg), (n))
447#define bus_dmamem_map(t, sg, n, s, k, f) \
448 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
449#define bus_dmamem_unmap(t, k, s) \
450 (*(t)->_dmamem_unmap)((t), (k), (s))
451#define bus_dmamem_mmap(t, sg, n, o, p, f) \
452 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
453
454int _dmamap_create(bus_dma_tag_t, bus_size_t, int,
455 bus_size_t, bus_size_t, int, bus_dmamap_t *);
456void _dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
457int _dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
458 bus_size_t, struct proc *, int);
459int _dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int);
460int _dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int);
461int _dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
462 bus_dma_segment_t *, int, bus_size_t, int);
463int _dmamap_load_buffer(bus_dma_tag_t, bus_dmamap_t, void *,
464 bus_size_t, struct proc *, int, paddr_t *, int *, int);
465void _dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
466void _dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
467 bus_size_t, int);
468
469int _dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
470 bus_size_t, bus_dma_segment_t *, int, int *, int);
471void _dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int);
472int _dmamem_map(bus_dma_tag_t, bus_dma_segment_t *,
473 int, size_t, caddr_t *, int);
474void _dmamem_unmap(bus_dma_tag_t, caddr_t, size_t);
475paddr_t _dmamem_mmap(bus_dma_tag_t, bus_dma_segment_t *, int, off_t, int, int);
476int _dmamem_alloc_range(bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t,
477 bus_dma_segment_t *, int, int *, int, paddr_t, paddr_t);
478
479/*
480 * bus_dmamap_t
481 *
482 * Describes a DMA mapping.
483 */
484struct machine_bus_dmamap {
485 /*
486 * PRIVATE MEMBERS: not for use by machine-independent code.
487 */
488 bus_size_t _dm_size; /* largest DMA transfer mappable */
489 int _dm_segcnt; /* number of segs this map can map */
490 bus_size_t _dm_maxsegsz; /* largest possible segment */
491 bus_size_t _dm_boundary; /* don't cross this */
492 int _dm_flags; /* misc. flags */
493
494 void *_dm_cookie; /* cookie for bus-specific functions */
495
496 /*
497 * PUBLIC MEMBERS: these are used by machine-independent code.
498 */
499 bus_size_t dm_mapsize; /* size of the mapping */
500 int dm_nsegs; /* # valid segments in mapping */
501 bus_dma_segment_t dm_segs[1]; /* segments; variable length */
502};
503
504int generic_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
505 bus_space_handle_t *);
506void generic_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
507int generic_space_region(bus_space_tag_t, bus_space_handle_t, bus_size_t,
508 bus_size_t, bus_space_handle_t *);
509void *generic_space_vaddr(bus_space_tag_t, bus_space_handle_t);
510paddr_t generic_space_mmap(bus_space_tag_t, bus_addr_t, off_t, int, int);
511uint8_t generic_space_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
512uint16_t generic_space_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
513uint32_t generic_space_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t);
514uint64_t generic_space_read_8(bus_space_tag_t, bus_space_handle_t, bus_size_t);
515void generic_space_read_raw_2(bus_space_tag_t, bus_space_handle_t,
516 bus_addr_t, uint8_t *, bus_size_t);
517void generic_space_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
518 uint8_t);
519void generic_space_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
520 uint16_t);
521void generic_space_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
522 uint32_t);
523void generic_space_write_8(bus_space_tag_t, bus_space_handle_t, bus_size_t,
524 uint64_t);
525void generic_space_write_raw_2(bus_space_tag_t, bus_space_handle_t,
526 bus_addr_t, const uint8_t *, bus_size_t);
527void generic_space_read_raw_4(bus_space_tag_t, bus_space_handle_t,
528 bus_addr_t, uint8_t *, bus_size_t);
529void generic_space_write_raw_4(bus_space_tag_t, bus_space_handle_t,
530 bus_addr_t, const uint8_t *, bus_size_t);
531void generic_space_read_raw_8(bus_space_tag_t, bus_space_handle_t,
532 bus_addr_t, uint8_t *, bus_size_t);
533void generic_space_write_raw_8(bus_space_tag_t, bus_space_handle_t,
534 bus_addr_t, const uint8_t *, bus_size_t);
535
536#endif /* _MACHINE_BUS_H_ */