1/* $OpenBSD: intr.h,v 1.26 2025/12/15 01:39:32 dlg Exp $ */
2
3/*
4 * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
16 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
19 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28
29#ifndef _MACHINE_INTR_H_
30#define _MACHINE_INTR_H_
31
32/*
33 * The interrupt level ipl is a logical level; per-platform interrupt
34 * code will turn it into the appropriate hardware interrupt masks
35 * values.
36 *
37 * Interrupt sources on the CPU are kept enabled regardless of the
38 * current ipl value; individual hardware sources interrupting while
39 * logically masked are masked on the fly, remembered as pending, and
40 * unmasked at the first splx() opportunity.
41 */
42#ifdef _KERNEL
43
44/* Interrupt priority `levels'; not mutually exclusive. */
45#define IPL_NONE 0 /* nothing */
46#define IPL_SOFTCLOCK 2 /* soft clock interrupts */
47#define IPL_SOFTNET 3 /* soft network interrupts */
48#define IPL_SOFTTTY 4 /* soft terminal interrupts */
49#define IPL_BIO 5 /* block I/O */
50#define IPL_NET 6 /* network */
51#define IPL_TTY 7 /* terminal */
52#define IPL_VM 8 /* memory allocation */
53#define IPL_AUDIO 9 /* audio */
54#define IPL_CLOCK 10 /* clock */
55#define IPL_SCHED IPL_CLOCK
56#define IPL_STATCLOCK IPL_CLOCK
57#define IPL_HIGH 11 /* everything */
58#define IPL_IPI 12 /* interprocessor interrupt */
59#define NIPL 13 /* number of levels */
60
61#define IPL_MPFLOOR IPL_TTY
62/* Interrupt priority 'flags'. */
63#define IPL_IRQMASK 0xf /* priority only */
64#define IPL_FLAGMASK 0xf00 /* flags only*/
65#define IPL_MPSAFE 0x100 /* 'mpsafe' interrupt, no kernel lock */
66#define IPL_WAKEUP 0x200 /* 'wakeup' interrupt */
67
68/* Interrupt sharing types. */
69#define IST_NONE 0 /* none */
70#define IST_PULSE 1 /* pulsed */
71#define IST_EDGE 2 /* edge-triggered */
72#define IST_LEVEL 3 /* level-triggered */
73
74#define IST_LEVEL_LOW IST_LEVEL
75#define IST_LEVEL_HIGH 4
76#define IST_EDGE_FALLING IST_EDGE
77#define IST_EDGE_RISING 5
78#define IST_EDGE_BOTH 6
79
80#define __USE_MI_SOFTINTR
81
82#include <sys/softintr.h>
83
84#ifndef _LOCORE
85#include <sys/queue.h>
86
87#define SOFTINTR_XCALL NSOFTINTR
88
89void softintr(int);
90
91int splraise(int);
92int spllower(int);
93void splx(int);
94
95void arm_do_pending_intr(int);
96void arm_set_intr_handler(int (*)(int), int (*)(int), void (*)(int),
97 void (*)(int), void (*)(void *), void (*)(void *),
98 void (*)(void), void (*)(void));
99
100struct machine_intr_handle {
101 struct interrupt_controller *ih_ic;
102 void *ih_ih;
103};
104
105struct arm_intr_func {
106 int (*raise)(int);
107 int (*lower)(int);
108 void (*x)(int);
109 void (*setipl)(int);
110 void (*enable_wakeup)(void);
111 void (*disable_wakeup)(void);
112};
113
114extern struct arm_intr_func arm_intr_func;
115
116#define splraise(cpl) (arm_intr_func.raise(cpl))
117#define _splraise(cpl) (arm_intr_func.raise(cpl))
118#define spllower(cpl) (arm_intr_func.lower(cpl))
119#define splx(cpl) (arm_intr_func.x(cpl))
120
121#define splsoftclock() splraise(IPL_SOFTCLOCK)
122#define splsoftnet() splraise(IPL_SOFTNET)
123#define splsofttty() splraise(IPL_SOFTTTY)
124#define splbio() splraise(IPL_BIO)
125#define splnet() splraise(IPL_NET)
126#define spltty() splraise(IPL_TTY)
127#define splvm() splraise(IPL_VM)
128#define splaudio() splraise(IPL_AUDIO)
129#define splclock() splraise(IPL_CLOCK)
130#define splsched() splraise(IPL_SCHED)
131#define splstatclock() splraise(IPL_STATCLOCK)
132#define splhigh() splraise(IPL_HIGH)
133
134#define spl0() spllower(IPL_NONE)
135
136void intr_barrier(void *);
137void intr_set_wakeup(void *);
138void intr_enable_wakeup(void);
139void intr_disable_wakeup(void);
140
141void arm_init_smask(void); /* XXX */
142extern uint32_t arm_smask[NIPL];
143
144/* XXX - this is probably the wrong location for this */
145void arm_clock_register(void (*)(void), void (*)(u_int), void (*)(int),
146 void (*)(void));
147
148struct cpu_info;
149
150struct interrupt_controller {
151 int ic_node;
152 void *ic_cookie;
153 void *(*ic_establish)(void *, int *, int, struct cpu_info *,
154 int (*)(void *), void *, char *);
155 void *(*ic_establish_msi)(void *, uint64_t *, uint64_t *, int,
156 struct cpu_info *, int (*)(void *), void *, char *);
157 void (*ic_disestablish)(void *);
158 void (*ic_enable)(void *);
159 void (*ic_disable)(void *);
160 void (*ic_route)(void *, int, struct cpu_info *);
161 void (*ic_cpu_enable)(void);
162 void (*ic_barrier)(void *);
163 void (*ic_set_wakeup)(void *);
164
165 LIST_ENTRY(interrupt_controller) ic_list;
166 uint32_t ic_phandle;
167 uint32_t ic_cells;
168 uint32_t ic_gic_its_id;
169};
170
171void arm_intr_init_fdt(void);
172void arm_intr_register_fdt(struct interrupt_controller *);
173void *arm_intr_establish_fdt(int, int, int (*)(void *),
174 void *, char *);
175void *arm_intr_establish_fdt_cpu(int, int, struct cpu_info *,
176 int (*)(void *), void *, char *);
177void *arm_intr_establish_fdt_idx(int, int, int, int (*)(void *),
178 void *, char *);
179void *arm_intr_establish_fdt_idx_cpu(int, int, int, struct cpu_info *,
180 int (*)(void *), void *, char *);
181void *arm_intr_establish_fdt_imap(int, int *, int, int, int (*)(void *),
182 void *, char *);
183void *arm_intr_establish_fdt_imap_cpu(int, int *, int, int,
184 struct cpu_info *, int (*)(void *), void *, char *);
185void *arm_intr_establish_fdt_msi(int, uint64_t *, uint64_t *, int,
186 int (*)(void *), void *, char *);
187void *arm_intr_establish_fdt_msi_cpu(int, uint64_t *, uint64_t *, int,
188 struct cpu_info *, int (*)(void *), void *, char *);
189void arm_intr_disestablish_fdt(void *);
190void arm_intr_enable(void *);
191void arm_intr_disable(void *);
192void arm_intr_route(void *, int, struct cpu_info *);
193void arm_intr_cpu_enable(void);
194void *arm_intr_parent_establish_fdt(void *, int *, int,
195 struct cpu_info *ci, int (*)(void *), void *, char *);
196void arm_intr_parent_disestablish_fdt(void *);
197
198void arm_send_ipi(struct cpu_info *, int);
199extern void (*intr_send_ipi_func)(struct cpu_info *, int);
200
201#define ARM_IPI_NOP 0
202#define ARM_IPI_DDB 1
203#define ARM_IPI_HALT 2
204#define ARM_IPI_XCALL 3
205
206/* kern_xcall calls this to dispatch xcalls */
207#define cpu_xcall_ipi(_ci) arm_send_ipi((_ci), ARM_IPI_XCALL)
208/* interrupt controllers call this to get cpu_xcall_dispatch run */
209#define arm_cpu_xcall_dispatch() softintr(SOFTINTR_XCALL)
210
211#ifdef DIAGNOSTIC
212/*
213 * Although this function is implemented in MI code, it must be in this MD
214 * header because we don't want this header to include MI includes.
215 */
216void splassert_fail(int, int, const char *);
217extern int splassert_ctl;
218void arm_splassert_check(int, const char *);
219#define splassert(__wantipl) do { \
220 if (splassert_ctl > 0) { \
221 arm_splassert_check(__wantipl, __func__); \
222 } \
223} while (0)
224#define splsoftassert(wantipl) splassert(wantipl)
225#else
226#define splassert(wantipl) do { /* nothing */ } while (0)
227#define splsoftassert(wantipl) do { /* nothing */ } while (0)
228#endif
229
230#endif /* ! _LOCORE */
231
232#endif /* _KERNEL */
233
234#endif /* _MACHINE_INTR_H_ */