1/**
2 * This file is part of the mingw-w64 runtime package.
3 * No warranty is given; refer to the file DISCLAIMER within this package.
4 */
5
6#ifndef _WINHVAPIDEFS_H_
7#define _WINHVAPIDEFS_H_
8
9#if defined(__x86_64__) || defined(__aarch64__)
10
11#if defined(__x86_64__)
12
13typedef enum WHV_REGISTER_NAME {
14 WHvX64RegisterRax = 0x00000000,
15 WHvX64RegisterRcx = 0x00000001,
16 WHvX64RegisterRdx = 0x00000002,
17 WHvX64RegisterRbx = 0x00000003,
18 WHvX64RegisterRsp = 0x00000004,
19 WHvX64RegisterRbp = 0x00000005,
20 WHvX64RegisterRsi = 0x00000006,
21 WHvX64RegisterRdi = 0x00000007,
22 WHvX64RegisterR8 = 0x00000008,
23 WHvX64RegisterR9 = 0x00000009,
24 WHvX64RegisterR10 = 0x0000000A,
25 WHvX64RegisterR11 = 0x0000000B,
26 WHvX64RegisterR12 = 0x0000000C,
27 WHvX64RegisterR13 = 0x0000000D,
28 WHvX64RegisterR14 = 0x0000000E,
29 WHvX64RegisterR15 = 0x0000000F,
30 WHvX64RegisterRip = 0x00000010,
31 WHvX64RegisterRflags = 0x00000011,
32 WHvX64RegisterEs = 0x00000012,
33 WHvX64RegisterCs = 0x00000013,
34 WHvX64RegisterSs = 0x00000014,
35 WHvX64RegisterDs = 0x00000015,
36 WHvX64RegisterFs = 0x00000016,
37 WHvX64RegisterGs = 0x00000017,
38 WHvX64RegisterLdtr = 0x00000018,
39 WHvX64RegisterTr = 0x00000019,
40 WHvX64RegisterIdtr = 0x0000001A,
41 WHvX64RegisterGdtr = 0x0000001B,
42 WHvX64RegisterCr0 = 0x0000001C,
43 WHvX64RegisterCr2 = 0x0000001D,
44 WHvX64RegisterCr3 = 0x0000001E,
45 WHvX64RegisterCr4 = 0x0000001F,
46 WHvX64RegisterCr8 = 0x00000020,
47 WHvX64RegisterDr0 = 0x00000021,
48 WHvX64RegisterDr1 = 0x00000022,
49 WHvX64RegisterDr2 = 0x00000023,
50 WHvX64RegisterDr3 = 0x00000024,
51 WHvX64RegisterDr6 = 0x00000025,
52 WHvX64RegisterDr7 = 0x00000026,
53 WHvX64RegisterXCr0 = 0x00000027,
54 WHvX64RegisterVirtualCr0 = 0x00000028,
55 WHvX64RegisterVirtualCr3 = 0x00000029,
56 WHvX64RegisterVirtualCr4 = 0x0000002A,
57 WHvX64RegisterVirtualCr8 = 0x0000002B,
58 WHvX64RegisterXmm0 = 0x00001000,
59 WHvX64RegisterXmm1 = 0x00001001,
60 WHvX64RegisterXmm2 = 0x00001002,
61 WHvX64RegisterXmm3 = 0x00001003,
62 WHvX64RegisterXmm4 = 0x00001004,
63 WHvX64RegisterXmm5 = 0x00001005,
64 WHvX64RegisterXmm6 = 0x00001006,
65 WHvX64RegisterXmm7 = 0x00001007,
66 WHvX64RegisterXmm8 = 0x00001008,
67 WHvX64RegisterXmm9 = 0x00001009,
68 WHvX64RegisterXmm10 = 0x0000100A,
69 WHvX64RegisterXmm11 = 0x0000100B,
70 WHvX64RegisterXmm12 = 0x0000100C,
71 WHvX64RegisterXmm13 = 0x0000100D,
72 WHvX64RegisterXmm14 = 0x0000100E,
73 WHvX64RegisterXmm15 = 0x0000100F,
74 WHvX64RegisterFpMmx0 = 0x00001010,
75 WHvX64RegisterFpMmx1 = 0x00001011,
76 WHvX64RegisterFpMmx2 = 0x00001012,
77 WHvX64RegisterFpMmx3 = 0x00001013,
78 WHvX64RegisterFpMmx4 = 0x00001014,
79 WHvX64RegisterFpMmx5 = 0x00001015,
80 WHvX64RegisterFpMmx6 = 0x00001016,
81 WHvX64RegisterFpMmx7 = 0x00001017,
82 WHvX64RegisterFpControlStatus = 0x00001018,
83 WHvX64RegisterXmmControlStatus = 0x00001019,
84 WHvX64RegisterTsc = 0x00002000,
85 WHvX64RegisterEfer = 0x00002001,
86 WHvX64RegisterKernelGsBase = 0x00002002,
87 WHvX64RegisterApicBase = 0x00002003,
88 WHvX64RegisterPat = 0x00002004,
89 WHvX64RegisterSysenterCs = 0x00002005,
90 WHvX64RegisterSysenterEip = 0x00002006,
91 WHvX64RegisterSysenterEsp = 0x00002007,
92 WHvX64RegisterStar = 0x00002008,
93 WHvX64RegisterLstar = 0x00002009,
94 WHvX64RegisterCstar = 0x0000200A,
95 WHvX64RegisterSfmask = 0x0000200B,
96 WHvX64RegisterInitialApicId = 0x0000200C,
97 WHvX64RegisterMsrMtrrCap = 0x0000200D,
98 WHvX64RegisterMsrMtrrDefType = 0x0000200E,
99 WHvX64RegisterMsrMtrrPhysBase0 = 0x00002010,
100 WHvX64RegisterMsrMtrrPhysBase1 = 0x00002011,
101 WHvX64RegisterMsrMtrrPhysBase2 = 0x00002012,
102 WHvX64RegisterMsrMtrrPhysBase3 = 0x00002013,
103 WHvX64RegisterMsrMtrrPhysBase4 = 0x00002014,
104 WHvX64RegisterMsrMtrrPhysBase5 = 0x00002015,
105 WHvX64RegisterMsrMtrrPhysBase6 = 0x00002016,
106 WHvX64RegisterMsrMtrrPhysBase7 = 0x00002017,
107 WHvX64RegisterMsrMtrrPhysBase8 = 0x00002018,
108 WHvX64RegisterMsrMtrrPhysBase9 = 0x00002019,
109 WHvX64RegisterMsrMtrrPhysBaseA = 0x0000201A,
110 WHvX64RegisterMsrMtrrPhysBaseB = 0x0000201B,
111 WHvX64RegisterMsrMtrrPhysBaseC = 0x0000201C,
112 WHvX64RegisterMsrMtrrPhysBaseD = 0x0000201D,
113 WHvX64RegisterMsrMtrrPhysBaseE = 0x0000201E,
114 WHvX64RegisterMsrMtrrPhysBaseF = 0x0000201F,
115 WHvX64RegisterMsrMtrrPhysMask0 = 0x00002040,
116 WHvX64RegisterMsrMtrrPhysMask1 = 0x00002041,
117 WHvX64RegisterMsrMtrrPhysMask2 = 0x00002042,
118 WHvX64RegisterMsrMtrrPhysMask3 = 0x00002043,
119 WHvX64RegisterMsrMtrrPhysMask4 = 0x00002044,
120 WHvX64RegisterMsrMtrrPhysMask5 = 0x00002045,
121 WHvX64RegisterMsrMtrrPhysMask6 = 0x00002046,
122 WHvX64RegisterMsrMtrrPhysMask7 = 0x00002047,
123 WHvX64RegisterMsrMtrrPhysMask8 = 0x00002048,
124 WHvX64RegisterMsrMtrrPhysMask9 = 0x00002049,
125 WHvX64RegisterMsrMtrrPhysMaskA = 0x0000204A,
126 WHvX64RegisterMsrMtrrPhysMaskB = 0x0000204B,
127 WHvX64RegisterMsrMtrrPhysMaskC = 0x0000204C,
128 WHvX64RegisterMsrMtrrPhysMaskD = 0x0000204D,
129 WHvX64RegisterMsrMtrrPhysMaskE = 0x0000204E,
130 WHvX64RegisterMsrMtrrPhysMaskF = 0x0000204F,
131 WHvX64RegisterMsrMtrrFix64k00000 = 0x00002070,
132 WHvX64RegisterMsrMtrrFix16k80000 = 0x00002071,
133 WHvX64RegisterMsrMtrrFix16kA0000 = 0x00002072,
134 WHvX64RegisterMsrMtrrFix4kC0000 = 0x00002073,
135 WHvX64RegisterMsrMtrrFix4kC8000 = 0x00002074,
136 WHvX64RegisterMsrMtrrFix4kD0000 = 0x00002075,
137 WHvX64RegisterMsrMtrrFix4kD8000 = 0x00002076,
138 WHvX64RegisterMsrMtrrFix4kE0000 = 0x00002077,
139 WHvX64RegisterMsrMtrrFix4kE8000 = 0x00002078,
140 WHvX64RegisterMsrMtrrFix4kF0000 = 0x00002079,
141 WHvX64RegisterMsrMtrrFix4kF8000 = 0x0000207A,
142 WHvX64RegisterTscAux = 0x0000207B,
143 WHvX64RegisterBndcfgs = 0x0000207C,
144 WHvX64RegisterMCount = 0x0000207E,
145 WHvX64RegisterACount = 0x0000207F,
146 WHvX64RegisterSpecCtrl = 0x00002084,
147 WHvX64RegisterPredCmd = 0x00002085,
148 WHvX64RegisterTscVirtualOffset = 0x00002087,
149 WHvX64RegisterTsxCtrl = 0x00002088,
150 WHvX64RegisterXss = 0x0000208B,
151 WHvX64RegisterUCet = 0x0000208C,
152 WHvX64RegisterSCet = 0x0000208D,
153 WHvX64RegisterSsp = 0x0000208E,
154 WHvX64RegisterPl0Ssp = 0x0000208F,
155 WHvX64RegisterPl1Ssp = 0x00002090,
156 WHvX64RegisterPl2Ssp = 0x00002091,
157 WHvX64RegisterPl3Ssp = 0x00002092,
158 WHvX64RegisterInterruptSspTableAddr = 0x00002093,
159 WHvX64RegisterTscDeadline = 0x00002095,
160 WHvX64RegisterTscAdjust = 0x00002096,
161 WHvX64RegisterUmwaitControl = 0x00002098,
162 WHvX64RegisterXfd = 0x00002099,
163 WHvX64RegisterXfdErr = 0x0000209A,
164 WHvX64RegisterMsrIa32MiscEnable = 0x000020A0,
165 WHvX64RegisterIa32FeatureControl = 0x000020A1,
166 WHvX64RegisterIa32VmxBasic = 0x000020A2,
167 WHvX64RegisterIa32VmxPinbasedCtls = 0x000020A3,
168 WHvX64RegisterIa32VmxProcbasedCtls = 0x000020A4,
169 WHvX64RegisterIa32VmxExitCtls = 0x000020A5,
170 WHvX64RegisterIa32VmxEntryCtls = 0x000020A6,
171 WHvX64RegisterIa32VmxMisc = 0x000020A7,
172 WHvX64RegisterIa32VmxCr0Fixed0 = 0x000020A8,
173 WHvX64RegisterIa32VmxCr0Fixed1 = 0x000020A9,
174 WHvX64RegisterIa32VmxCr4Fixed0 = 0x000020AA,
175 WHvX64RegisterIa32VmxCr4Fixed1 = 0x000020AB,
176 WHvX64RegisterIa32VmxVmcsEnum = 0x000020AC,
177 WHvX64RegisterIa32VmxProcbasedCtls2 = 0x000020AD,
178 WHvX64RegisterIa32VmxEptVpidCap = 0x000020AE,
179 WHvX64RegisterIa32VmxTruePinbasedCtls = 0x000020AF,
180 WHvX64RegisterIa32VmxTrueProcbasedCtls = 0x000020B0,
181 WHvX64RegisterIa32VmxTrueExitCtls = 0x000020B1,
182 WHvX64RegisterIa32VmxTrueEntryCtls = 0x000020B2,
183 WHvX64RegisterAmdVmHsavePa = 0x000020B3,
184 WHvX64RegisterAmdVmCr = 0x000020B4,
185 WHvX64RegisterApicId = 0x00003002,
186 WHvX64RegisterApicVersion = 0x00003003,
187 WHvX64RegisterApicTpr = 0x00003008,
188 WHvX64RegisterApicPpr = 0x0000300A,
189 WHvX64RegisterApicEoi = 0x0000300B,
190 WHvX64RegisterApicLdr = 0x0000300D,
191 WHvX64RegisterApicSpurious = 0x0000300F,
192 WHvX64RegisterApicIsr0 = 0x00003010,
193 WHvX64RegisterApicIsr1 = 0x00003011,
194 WHvX64RegisterApicIsr2 = 0x00003012,
195 WHvX64RegisterApicIsr3 = 0x00003013,
196 WHvX64RegisterApicIsr4 = 0x00003014,
197 WHvX64RegisterApicIsr5 = 0x00003015,
198 WHvX64RegisterApicIsr6 = 0x00003016,
199 WHvX64RegisterApicIsr7 = 0x00003017,
200 WHvX64RegisterApicTmr0 = 0x00003018,
201 WHvX64RegisterApicTmr1 = 0x00003019,
202 WHvX64RegisterApicTmr2 = 0x0000301A,
203 WHvX64RegisterApicTmr3 = 0x0000301B,
204 WHvX64RegisterApicTmr4 = 0x0000301C,
205 WHvX64RegisterApicTmr5 = 0x0000301D,
206 WHvX64RegisterApicTmr6 = 0x0000301E,
207 WHvX64RegisterApicTmr7 = 0x0000301F,
208 WHvX64RegisterApicIrr0 = 0x00003020,
209 WHvX64RegisterApicIrr1 = 0x00003021,
210 WHvX64RegisterApicIrr2 = 0x00003022,
211 WHvX64RegisterApicIrr3 = 0x00003023,
212 WHvX64RegisterApicIrr4 = 0x00003024,
213 WHvX64RegisterApicIrr5 = 0x00003025,
214 WHvX64RegisterApicIrr6 = 0x00003026,
215 WHvX64RegisterApicIrr7 = 0x00003027,
216 WHvX64RegisterApicEse = 0x00003028,
217 WHvX64RegisterApicIcr = 0x00003030,
218 WHvX64RegisterApicLvtTimer = 0x00003032,
219 WHvX64RegisterApicLvtThermal = 0x00003033,
220 WHvX64RegisterApicLvtPerfmon = 0x00003034,
221 WHvX64RegisterApicLvtLint0 = 0x00003035,
222 WHvX64RegisterApicLvtLint1 = 0x00003036,
223 WHvX64RegisterApicLvtError = 0x00003037,
224 WHvX64RegisterApicInitCount = 0x00003038,
225 WHvX64RegisterApicCurrentCount = 0x00003039,
226 WHvX64RegisterApicDivide = 0x0000303E,
227 WHvX64RegisterApicSelfIpi = 0x0000303F,
228 WHvRegisterSint0 = 0x00004000,
229 WHvRegisterSint1 = 0x00004001,
230 WHvRegisterSint2 = 0x00004002,
231 WHvRegisterSint3 = 0x00004003,
232 WHvRegisterSint4 = 0x00004004,
233 WHvRegisterSint5 = 0x00004005,
234 WHvRegisterSint6 = 0x00004006,
235 WHvRegisterSint7 = 0x00004007,
236 WHvRegisterSint8 = 0x00004008,
237 WHvRegisterSint9 = 0x00004009,
238 WHvRegisterSint10 = 0x0000400A,
239 WHvRegisterSint11 = 0x0000400B,
240 WHvRegisterSint12 = 0x0000400C,
241 WHvRegisterSint13 = 0x0000400D,
242 WHvRegisterSint14 = 0x0000400E,
243 WHvRegisterSint15 = 0x0000400F,
244 WHvRegisterScontrol = 0x00004010,
245 WHvRegisterSversion = 0x00004011,
246 WHvRegisterSiefp = 0x00004012,
247 WHvRegisterSimp = 0x00004013,
248 WHvRegisterEom = 0x00004014,
249 WHvRegisterVpRuntime = 0x00005000,
250 WHvX64RegisterHypercall = 0x00005001,
251 WHvRegisterGuestOsId = 0x00005002,
252 WHvRegisterVpAssistPage = 0x00005013,
253 WHvRegisterReferenceTsc = 0x00005017,
254 WHvRegisterReferenceTscSequence = 0x0000501A,
255 WHvX64RegisterNestedGuestState = 0x00005050,
256 WHvX64RegisterNestedCurrentVmGpa = 0x00005051,
257 WHvX64RegisterNestedVmxInvEpt = 0x00005052,
258 WHvX64RegisterNestedVmxInvVpid = 0x00005053,
259 WHvRegisterPendingInterruption = 0x80000000,
260 WHvRegisterInterruptState = 0x80000001,
261 WHvRegisterPendingEvent = 0x80000002,
262 WHvRegisterPendingEvent1 = 0x80000003,
263 WHvX64RegisterDeliverabilityNotifications = 0x80000004,
264 WHvRegisterDeliverabilityNotifications = 0x80000004,
265 WHvRegisterInternalActivityState = 0x80000005,
266 WHvX64RegisterPendingDebugException = 0x80000006,
267 WHvRegisterPendingEvent2 = 0x80000007,
268 WHvRegisterPendingEvent3 = 0x80000008
269} WHV_REGISTER_NAME;
270
271#elif defined (__aarch64__)
272
273typedef enum WHV_REGISTER_NAME {
274 WHvArm64RegisterX0 = 0x00020000,
275 WHvArm64RegisterX1 = 0x00020001,
276 WHvArm64RegisterX2 = 0x00020002,
277 WHvArm64RegisterX3 = 0x00020003,
278 WHvArm64RegisterX4 = 0x00020004,
279 WHvArm64RegisterX5 = 0x00020005,
280 WHvArm64RegisterX6 = 0x00020006,
281 WHvArm64RegisterX7 = 0x00020007,
282 WHvArm64RegisterX8 = 0x00020008,
283 WHvArm64RegisterX9 = 0x00020009,
284 WHvArm64RegisterX10 = 0x0002000A,
285 WHvArm64RegisterX11 = 0x0002000B,
286 WHvArm64RegisterX12 = 0x0002000C,
287 WHvArm64RegisterX13 = 0x0002000D,
288 WHvArm64RegisterX14 = 0x0002000E,
289 WHvArm64RegisterX15 = 0x0002000F,
290 WHvArm64RegisterX16 = 0x00020010,
291 WHvArm64RegisterX17 = 0x00020011,
292 WHvArm64RegisterX18 = 0x00020012,
293 WHvArm64RegisterX19 = 0x00020013,
294 WHvArm64RegisterX20 = 0x00020014,
295 WHvArm64RegisterX21 = 0x00020015,
296 WHvArm64RegisterX22 = 0x00020016,
297 WHvArm64RegisterX23 = 0x00020017,
298 WHvArm64RegisterX24 = 0x00020018,
299 WHvArm64RegisterX25 = 0x00020019,
300 WHvArm64RegisterX26 = 0x0002001A,
301 WHvArm64RegisterX27 = 0x0002001B,
302 WHvArm64RegisterX28 = 0x0002001C,
303 WHvArm64RegisterFp = 0x0002001D,
304 WHvArm64RegisterLr = 0x0002001E,
305 WHvArm64RegisterPc = 0x00020022,
306 WHvArm64RegisterQ0 = 0x00030000,
307 WHvArm64RegisterQ1 = 0x00030001,
308 WHvArm64RegisterQ2 = 0x00030002,
309 WHvArm64RegisterQ3 = 0x00030003,
310 WHvArm64RegisterQ4 = 0x00030004,
311 WHvArm64RegisterQ5 = 0x00030005,
312 WHvArm64RegisterQ6 = 0x00030006,
313 WHvArm64RegisterQ7 = 0x00030007,
314 WHvArm64RegisterQ8 = 0x00030008,
315 WHvArm64RegisterQ9 = 0x00030009,
316 WHvArm64RegisterQ10 = 0x0003000A,
317 WHvArm64RegisterQ11 = 0x0003000B,
318 WHvArm64RegisterQ12 = 0x0003000C,
319 WHvArm64RegisterQ13 = 0x0003000D,
320 WHvArm64RegisterQ14 = 0x0003000E,
321 WHvArm64RegisterQ15 = 0x0003000F,
322 WHvArm64RegisterQ16 = 0x00030010,
323 WHvArm64RegisterQ17 = 0x00030011,
324 WHvArm64RegisterQ18 = 0x00030012,
325 WHvArm64RegisterQ19 = 0x00030013,
326 WHvArm64RegisterQ20 = 0x00030014,
327 WHvArm64RegisterQ21 = 0x00030015,
328 WHvArm64RegisterQ22 = 0x00030016,
329 WHvArm64RegisterQ23 = 0x00030017,
330 WHvArm64RegisterQ24 = 0x00030018,
331 WHvArm64RegisterQ25 = 0x00030019,
332 WHvArm64RegisterQ26 = 0x0003001A,
333 WHvArm64RegisterQ27 = 0x0003001B,
334 WHvArm64RegisterQ28 = 0x0003001C,
335 WHvArm64RegisterQ29 = 0x0003001D,
336 WHvArm64RegisterQ30 = 0x0003001E,
337 WHvArm64RegisterQ31 = 0x0003001F,
338 WHvArm64RegisterPstate = 0x00020023,
339 WHvArm64RegisterElrEl1 = 0x00040015,
340 WHvArm64RegisterFpcr = 0x00040012,
341 WHvArm64RegisterFpsr = 0x00040013,
342 WHvArm64RegisterSp = 0x0002001F,
343 WHvArm64RegisterSpEl0 = 0x00020020,
344 WHvArm64RegisterSpEl1 = 0x00020021,
345 WHvArm64RegisterSpsrEl1 = 0x00040014,
346 WHvArm64RegisterIdMidrEl1 = 0x00022000,
347 WHvArm64RegisterIdRes01El1 = 0x00022001,
348 WHvArm64RegisterIdRes02El1 = 0x00022002,
349 WHvArm64RegisterIdRes03El1 = 0x00022003,
350 WHvArm64RegisterIdRes04El1 = 0x00022004,
351 WHvArm64RegisterIdMpidrEl1 = 0x00022005,
352 WHvArm64RegisterIdRevidrEl1 = 0x00022006,
353 WHvArm64RegisterIdRes07El1 = 0x00022007,
354 WHvArm64RegisterIdPfr0El1 = 0x00022008,
355 WHvArm64RegisterIdPfr1El1 = 0x00022009,
356 WHvArm64RegisterIdDfr0El1 = 0x0002200A,
357 WHvArm64RegisterIdRes13El1 = 0x0002200B,
358 WHvArm64RegisterIdMmfr0El1 = 0x0002200C,
359 WHvArm64RegisterIdMmfr1El1 = 0x0002200D,
360 WHvArm64RegisterIdMmfr2El1 = 0x0002200E,
361 WHvArm64RegisterIdMmfr3El1 = 0x0002200F,
362 WHvArm64RegisterIdIsar0El1 = 0x00022010,
363 WHvArm64RegisterIdIsar1El1 = 0x00022011,
364 WHvArm64RegisterIdIsar2El1 = 0x00022012,
365 WHvArm64RegisterIdIsar3El1 = 0x00022013,
366 WHvArm64RegisterIdIsar4El1 = 0x00022014,
367 WHvArm64RegisterIdIsar5El1 = 0x00022015,
368 WHvArm64RegisterIdRes26El1 = 0x00022016,
369 WHvArm64RegisterIdRes27El1 = 0x00022017,
370 WHvArm64RegisterIdMvfr0El1 = 0x00022018,
371 WHvArm64RegisterIdMvfr1El1 = 0x00022019,
372 WHvArm64RegisterIdMvfr2El1 = 0x0002201A,
373 WHvArm64RegisterIdRes33El1 = 0x0002201B,
374 WHvArm64RegisterIdPfr2El1 = 0x0002201C,
375 WHvArm64RegisterIdRes35El1 = 0x0002201D,
376 WHvArm64RegisterIdRes36El1 = 0x0002201E,
377 WHvArm64RegisterIdRes37El1 = 0x0002201F,
378 WHvArm64RegisterIdAa64Pfr0El1 = 0x00022020,
379 WHvArm64RegisterIdAa64Pfr1El1 = 0x00022021,
380 WHvArm64RegisterIdAa64Pfr2El1 = 0x00022022,
381 WHvArm64RegisterIdRes43El1 = 0x00022023,
382 WHvArm64RegisterIdAa64Zfr0El1 = 0x00022024,
383 WHvArm64RegisterIdAa64Smfr0El1 = 0x00022025,
384 WHvArm64RegisterIdRes46El1 = 0x00022026,
385 WHvArm64RegisterIdRes47El1 = 0x00022027,
386 WHvArm64RegisterIdAa64Dfr0El1 = 0x00022028,
387 WHvArm64RegisterIdAa64Dfr1El1 = 0x00022029,
388 WHvArm64RegisterIdRes52El1 = 0x0002202A,
389 WHvArm64RegisterIdRes53El1 = 0x0002202B,
390 WHvArm64RegisterIdRes54El1 = 0x0002202C,
391 WHvArm64RegisterIdRes55El1 = 0x0002202D,
392 WHvArm64RegisterIdRes56El1 = 0x0002202E,
393 WHvArm64RegisterIdRes57El1 = 0x0002202F,
394 WHvArm64RegisterIdAa64Isar0El1 = 0x00022030,
395 WHvArm64RegisterIdAa64Isar1El1 = 0x00022031,
396 WHvArm64RegisterIdAa64Isar2El1 = 0x00022032,
397 WHvArm64RegisterIdRes63El1 = 0x00022033,
398 WHvArm64RegisterIdRes64El1 = 0x00022034,
399 WHvArm64RegisterIdRes65El1 = 0x00022035,
400 WHvArm64RegisterIdRes66El1 = 0x00022036,
401 WHvArm64RegisterIdRes67El1 = 0x00022037,
402 WHvArm64RegisterIdAa64Mmfr0El1 = 0x00022038,
403 WHvArm64RegisterIdAa64Mmfr1El1 = 0x00022039,
404 WHvArm64RegisterIdAa64Mmfr2El1 = 0x0002203A,
405 WHvArm64RegisterIdAa64Mmfr3El1 = 0x0002203B,
406 WHvArm64RegisterIdAa64Mmfr4El1 = 0x0002203C,
407 WHvArm64RegisterIdRes75El1 = 0x0002203D,
408 WHvArm64RegisterIdRes76El1 = 0x0002203E,
409 WHvArm64RegisterIdRes77El1 = 0x0002203F,
410 WHvArm64RegisterIdRes80El1 = 0x00022040,
411 WHvArm64RegisterIdRes81El1 = 0x00022041,
412 WHvArm64RegisterIdRes82El1 = 0x00022042,
413 WHvArm64RegisterIdRes83El1 = 0x00022043,
414 WHvArm64RegisterIdRes84El1 = 0x00022044,
415 WHvArm64RegisterIdRes85El1 = 0x00022045,
416 WHvArm64RegisterIdRes86El1 = 0x00022046,
417 WHvArm64RegisterIdRes87El1 = 0x00022047,
418 WHvArm64RegisterIdRes90El1 = 0x00022048,
419 WHvArm64RegisterIdRes91El1 = 0x00022049,
420 WHvArm64RegisterIdRes92El1 = 0x0002204A,
421 WHvArm64RegisterIdRes93El1 = 0x0002204B,
422 WHvArm64RegisterIdRes94El1 = 0x0002204C,
423 WHvArm64RegisterIdRes95El1 = 0x0002204D,
424 WHvArm64RegisterIdRes96El1 = 0x0002204E,
425 WHvArm64RegisterIdRes97El1 = 0x0002204F,
426 WHvArm64RegisterIdRes100El1 = 0x00022050,
427 WHvArm64RegisterIdRes101El1 = 0x00022051,
428 WHvArm64RegisterIdRes102El1 = 0x00022052,
429 WHvArm64RegisterIdRes103El1 = 0x00022053,
430 WHvArm64RegisterIdRes104El1 = 0x00022054,
431 WHvArm64RegisterIdRes105El1 = 0x00022055,
432 WHvArm64RegisterIdRes106El1 = 0x00022056,
433 WHvArm64RegisterIdRes107El1 = 0x00022057,
434 WHvArm64RegisterIdRes110El1 = 0x00022058,
435 WHvArm64RegisterIdRes111El1 = 0x00022059,
436 WHvArm64RegisterIdRes112El1 = 0x0002205A,
437 WHvArm64RegisterIdRes113El1 = 0x0002205B,
438 WHvArm64RegisterIdRes114El1 = 0x0002205C,
439 WHvArm64RegisterIdRes115El1 = 0x0002205D,
440 WHvArm64RegisterIdRes116El1 = 0x0002205E,
441 WHvArm64RegisterIdRes117El1 = 0x0002205F,
442 WHvArm64RegisterIdRes120El1 = 0x00022060,
443 WHvArm64RegisterIdRes121El1 = 0x00022061,
444 WHvArm64RegisterIdRes122El1 = 0x00022062,
445 WHvArm64RegisterIdRes123El1 = 0x00022063,
446 WHvArm64RegisterIdRes124El1 = 0x00022064,
447 WHvArm64RegisterIdRes125El1 = 0x00022065,
448 WHvArm64RegisterIdRes126El1 = 0x00022066,
449 WHvArm64RegisterIdRes127El1 = 0x00022067,
450 WHvArm64RegisterIdRes130El1 = 0x00022068,
451 WHvArm64RegisterIdRes131El1 = 0x00022069,
452 WHvArm64RegisterIdRes132El1 = 0x0002206A,
453 WHvArm64RegisterIdRes133El1 = 0x0002206B,
454 WHvArm64RegisterIdRes134El1 = 0x0002206C,
455 WHvArm64RegisterIdRes135El1 = 0x0002206D,
456 WHvArm64RegisterIdRes136El1 = 0x0002206E,
457 WHvArm64RegisterIdRes137El1 = 0x0002206F,
458 WHvArm64RegisterIdRes140El1 = 0x00022070,
459 WHvArm64RegisterIdRes141El1 = 0x00022071,
460 WHvArm64RegisterIdRes142El1 = 0x00022072,
461 WHvArm64RegisterIdRes143El1 = 0x00022073,
462 WHvArm64RegisterIdRes144El1 = 0x00022074,
463 WHvArm64RegisterIdRes145El1 = 0x00022075,
464 WHvArm64RegisterIdRes146El1 = 0x00022076,
465 WHvArm64RegisterIdRes147El1 = 0x00022077,
466 WHvArm64RegisterIdRes150El1 = 0x00022078,
467 WHvArm64RegisterIdRes151El1 = 0x00022079,
468 WHvArm64RegisterIdRes152El1 = 0x0002207A,
469 WHvArm64RegisterIdRes153El1 = 0x0002207B,
470 WHvArm64RegisterIdRes154El1 = 0x0002207C,
471 WHvArm64RegisterIdRes155El1 = 0x0002207D,
472 WHvArm64RegisterIdRes156El1 = 0x0002207E,
473 WHvArm64RegisterIdRes157El1 = 0x0002207F,
474 WHvArm64RegisterActlrEl1 = 0x00040003,
475 WHvArm64RegisterApdAKeyHiEl1 = 0x00040026,
476 WHvArm64RegisterApdAKeyLoEl1 = 0x00040027,
477 WHvArm64RegisterApdBKeyHiEl1 = 0x00040028,
478 WHvArm64RegisterApdBKeyLoEl1 = 0x00040029,
479 WHvArm64RegisterApgAKeyHiEl1 = 0x0004002A,
480 WHvArm64RegisterApgAKeyLoEl1 = 0x0004002B,
481 WHvArm64RegisterApiAKeyHiEl1 = 0x0004002C,
482 WHvArm64RegisterApiAKeyLoEl1 = 0x0004002D,
483 WHvArm64RegisterApiBKeyHiEl1 = 0x0004002E,
484 WHvArm64RegisterApiBKeyLoEl1 = 0x0004002F,
485 WHvArm64RegisterContextidrEl1 = 0x0004000D,
486 WHvArm64RegisterCpacrEl1 = 0x00040004,
487 WHvArm64RegisterCsselrEl1 = 0x00040035,
488 WHvArm64RegisterEsrEl1 = 0x00040008,
489 WHvArm64RegisterFarEl1 = 0x00040009,
490 WHvArm64RegisterMairEl1 = 0x0004000B,
491 WHvArm64RegisterMidrEl1 = 0x00040051,
492 WHvArm64RegisterMpidrEl1 = 0x00040001,
493 WHvArm64RegisterParEl1 = 0x0004000A,
494 WHvArm64RegisterSctlrEl1 = 0x00040002,
495 WHvArm64RegisterTcrEl1 = 0x00040007,
496 WHvArm64RegisterTpidrEl0 = 0x00040011,
497 WHvArm64RegisterTpidrEl1 = 0x0004000E,
498 WHvArm64RegisterTpidrroEl0 = 0x00040010,
499 WHvArm64RegisterTtbr0El1 = 0x00040005,
500 WHvArm64RegisterTtbr1El1 = 0x00040006,
501 WHvArm64RegisterVbarEl1 = 0x0004000C,
502 WHvArm64RegisterZcrEl1 = 0x00040071,
503 WHvArm64RegisterDbgbcr0El1 = 0x00050000,
504 WHvArm64RegisterDbgbcr1El1 = 0x00050001,
505 WHvArm64RegisterDbgbcr2El1 = 0x00050002,
506 WHvArm64RegisterDbgbcr3El1 = 0x00050003,
507 WHvArm64RegisterDbgbcr4El1 = 0x00050004,
508 WHvArm64RegisterDbgbcr5El1 = 0x00050005,
509 WHvArm64RegisterDbgbcr6El1 = 0x00050006,
510 WHvArm64RegisterDbgbcr7El1 = 0x00050007,
511 WHvArm64RegisterDbgbcr8El1 = 0x00050008,
512 WHvArm64RegisterDbgbcr9El1 = 0x00050009,
513 WHvArm64RegisterDbgbcr10El1 = 0x0005000A,
514 WHvArm64RegisterDbgbcr11El1 = 0x0005000B,
515 WHvArm64RegisterDbgbcr12El1 = 0x0005000C,
516 WHvArm64RegisterDbgbcr13El1 = 0x0005000D,
517 WHvArm64RegisterDbgbcr14El1 = 0x0005000E,
518 WHvArm64RegisterDbgbcr15El1 = 0x0005000F,
519 WHvArm64RegisterDbgbvr0El1 = 0x00050020,
520 WHvArm64RegisterDbgbvr1El1 = 0x00050021,
521 WHvArm64RegisterDbgbvr2El1 = 0x00050022,
522 WHvArm64RegisterDbgbvr3El1 = 0x00050023,
523 WHvArm64RegisterDbgbvr4El1 = 0x00050024,
524 WHvArm64RegisterDbgbvr5El1 = 0x00050025,
525 WHvArm64RegisterDbgbvr6El1 = 0x00050026,
526 WHvArm64RegisterDbgbvr7El1 = 0x00050027,
527 WHvArm64RegisterDbgbvr8El1 = 0x00050028,
528 WHvArm64RegisterDbgbvr9El1 = 0x00050029,
529 WHvArm64RegisterDbgbvr10El1 = 0x0005002A,
530 WHvArm64RegisterDbgbvr11El1 = 0x0005002B,
531 WHvArm64RegisterDbgbvr12El1 = 0x0005002C,
532 WHvArm64RegisterDbgbvr13El1 = 0x0005002D,
533 WHvArm64RegisterDbgbvr14El1 = 0x0005002E,
534 WHvArm64RegisterDbgbvr15El1 = 0x0005002F,
535 WHvArm64RegisterDbgprcrEl1 = 0x00050045,
536 WHvArm64RegisterDbgwcr0El1 = 0x00050010,
537 WHvArm64RegisterDbgwcr1El1 = 0x00050011,
538 WHvArm64RegisterDbgwcr2El1 = 0x00050012,
539 WHvArm64RegisterDbgwcr3El1 = 0x00050013,
540 WHvArm64RegisterDbgwcr4El1 = 0x00050014,
541 WHvArm64RegisterDbgwcr5El1 = 0x00050015,
542 WHvArm64RegisterDbgwcr6El1 = 0x00050016,
543 WHvArm64RegisterDbgwcr7El1 = 0x00050017,
544 WHvArm64RegisterDbgwcr8El1 = 0x00050018,
545 WHvArm64RegisterDbgwcr9El1 = 0x00050019,
546 WHvArm64RegisterDbgwcr10El1 = 0x0005001A,
547 WHvArm64RegisterDbgwcr11El1 = 0x0005001B,
548 WHvArm64RegisterDbgwcr12El1 = 0x0005001C,
549 WHvArm64RegisterDbgwcr13El1 = 0x0005001D,
550 WHvArm64RegisterDbgwcr14El1 = 0x0005001E,
551 WHvArm64RegisterDbgwcr15El1 = 0x0005001F,
552 WHvArm64RegisterDbgwvr0El1 = 0x00050030,
553 WHvArm64RegisterDbgwvr1El1 = 0x00050031,
554 WHvArm64RegisterDbgwvr2El1 = 0x00050032,
555 WHvArm64RegisterDbgwvr3El1 = 0x00050033,
556 WHvArm64RegisterDbgwvr4El1 = 0x00050034,
557 WHvArm64RegisterDbgwvr5El1 = 0x00050035,
558 WHvArm64RegisterDbgwvr6El1 = 0x00050036,
559 WHvArm64RegisterDbgwvr7El1 = 0x00050037,
560 WHvArm64RegisterDbgwvr8El1 = 0x00050038,
561 WHvArm64RegisterDbgwvr9El1 = 0x00050039,
562 WHvArm64RegisterDbgwvr10El1 = 0x0005003A,
563 WHvArm64RegisterDbgwvr11El1 = 0x0005003B,
564 WHvArm64RegisterDbgwvr12El1 = 0x0005003C,
565 WHvArm64RegisterDbgwvr13El1 = 0x0005003D,
566 WHvArm64RegisterDbgwvr14El1 = 0x0005003E,
567 WHvArm64RegisterDbgwvr15El1 = 0x0005003F,
568 WHvArm64RegisterMdrarEl1 = 0x0005004C,
569 WHvArm64RegisterMdscrEl1 = 0x0005004D,
570 WHvArm64RegisterOsdlrEl1 = 0x0005004E,
571 WHvArm64RegisterOslarEl1 = 0x00050052,
572 WHvArm64RegisterOslsrEl1 = 0x00050053,
573 WHvArm64RegisterPmccfiltrEl0 = 0x00052000,
574 WHvArm64RegisterPmccntrEl0 = 0x00052001,
575 WHvArm64RegisterPmceid0El0 = 0x00052002,
576 WHvArm64RegisterPmceid1El0 = 0x00052003,
577 WHvArm64RegisterPmcntenclrEl0 = 0x00052004,
578 WHvArm64RegisterPmcntensetEl0 = 0x00052005,
579 WHvArm64RegisterPmcrEl0 = 0x00052006,
580 WHvArm64RegisterPmevcntr0El0 = 0x00052007,
581 WHvArm64RegisterPmevcntr1El0 = 0x00052008,
582 WHvArm64RegisterPmevcntr2El0 = 0x00052009,
583 WHvArm64RegisterPmevcntr3El0 = 0x0005200A,
584 WHvArm64RegisterPmevcntr4El0 = 0x0005200B,
585 WHvArm64RegisterPmevcntr5El0 = 0x0005200C,
586 WHvArm64RegisterPmevcntr6El0 = 0x0005200D,
587 WHvArm64RegisterPmevcntr7El0 = 0x0005200E,
588 WHvArm64RegisterPmevcntr8El0 = 0x0005200F,
589 WHvArm64RegisterPmevcntr9El0 = 0x00052010,
590 WHvArm64RegisterPmevcntr10El0 = 0x00052011,
591 WHvArm64RegisterPmevcntr11El0 = 0x00052012,
592 WHvArm64RegisterPmevcntr12El0 = 0x00052013,
593 WHvArm64RegisterPmevcntr13El0 = 0x00052014,
594 WHvArm64RegisterPmevcntr14El0 = 0x00052015,
595 WHvArm64RegisterPmevcntr15El0 = 0x00052016,
596 WHvArm64RegisterPmevcntr16El0 = 0x00052017,
597 WHvArm64RegisterPmevcntr17El0 = 0x00052018,
598 WHvArm64RegisterPmevcntr18El0 = 0x00052019,
599 WHvArm64RegisterPmevcntr19El0 = 0x0005201A,
600 WHvArm64RegisterPmevcntr20El0 = 0x0005201B,
601 WHvArm64RegisterPmevcntr21El0 = 0x0005201C,
602 WHvArm64RegisterPmevcntr22El0 = 0x0005201D,
603 WHvArm64RegisterPmevcntr23El0 = 0x0005201E,
604 WHvArm64RegisterPmevcntr24El0 = 0x0005201F,
605 WHvArm64RegisterPmevcntr25El0 = 0x00052020,
606 WHvArm64RegisterPmevcntr26El0 = 0x00052021,
607 WHvArm64RegisterPmevcntr27El0 = 0x00052022,
608 WHvArm64RegisterPmevcntr28El0 = 0x00052023,
609 WHvArm64RegisterPmevcntr29El0 = 0x00052024,
610 WHvArm64RegisterPmevcntr30El0 = 0x00052025,
611 WHvArm64RegisterPmevtyper0El0 = 0x00052026,
612 WHvArm64RegisterPmevtyper1El0 = 0x00052027,
613 WHvArm64RegisterPmevtyper2El0 = 0x00052028,
614 WHvArm64RegisterPmevtyper3El0 = 0x00052029,
615 WHvArm64RegisterPmevtyper4El0 = 0x0005202A,
616 WHvArm64RegisterPmevtyper5El0 = 0x0005202B,
617 WHvArm64RegisterPmevtyper6El0 = 0x0005202C,
618 WHvArm64RegisterPmevtyper7El0 = 0x0005202D,
619 WHvArm64RegisterPmevtyper8El0 = 0x0005202E,
620 WHvArm64RegisterPmevtyper9El0 = 0x0005202F,
621 WHvArm64RegisterPmevtyper10El0 = 0x00052030,
622 WHvArm64RegisterPmevtyper11El0 = 0x00052031,
623 WHvArm64RegisterPmevtyper12El0 = 0x00052032,
624 WHvArm64RegisterPmevtyper13El0 = 0x00052033,
625 WHvArm64RegisterPmevtyper14El0 = 0x00052034,
626 WHvArm64RegisterPmevtyper15El0 = 0x00052035,
627 WHvArm64RegisterPmevtyper16El0 = 0x00052036,
628 WHvArm64RegisterPmevtyper17El0 = 0x00052037,
629 WHvArm64RegisterPmevtyper18El0 = 0x00052038,
630 WHvArm64RegisterPmevtyper19El0 = 0x00052039,
631 WHvArm64RegisterPmevtyper20El0 = 0x0005203A,
632 WHvArm64RegisterPmevtyper21El0 = 0x0005203B,
633 WHvArm64RegisterPmevtyper22El0 = 0x0005203C,
634 WHvArm64RegisterPmevtyper23El0 = 0x0005203D,
635 WHvArm64RegisterPmevtyper24El0 = 0x0005203E,
636 WHvArm64RegisterPmevtyper25El0 = 0x0005203F,
637 WHvArm64RegisterPmevtyper26El0 = 0x00052040,
638 WHvArm64RegisterPmevtyper27El0 = 0x00052041,
639 WHvArm64RegisterPmevtyper28El0 = 0x00052042,
640 WHvArm64RegisterPmevtyper29El0 = 0x00052043,
641 WHvArm64RegisterPmevtyper30El0 = 0x00052044,
642 WHvArm64RegisterPmintenclrEl1 = 0x00052045,
643 WHvArm64RegisterPmintensetEl1 = 0x00052046,
644 WHvArm64RegisterPmovsclrEl0 = 0x00052048,
645 WHvArm64RegisterPmovssetEl0 = 0x00052049,
646 WHvArm64RegisterPmselrEl0 = 0x0005204A,
647 WHvArm64RegisterPmuserenrEl0 = 0x0005204C,
648 WHvArm64RegisterCntkctlEl1 = 0x00058008,
649 WHvArm64RegisterCntvCtlEl0 = 0x0005800E,
650 WHvArm64RegisterCntvCvalEl0 = 0x0005800F,
651 WHvArm64RegisterCntvctEl0 = 0x00058011,
652 WHvArm64RegisterGicrBaseGpa = 0x00063000,
653 WHvRegisterSint0 = 0x000A0000,
654 WHvRegisterSint1 = 0x000A0001,
655 WHvRegisterSint2 = 0x000A0002,
656 WHvRegisterSint3 = 0x000A0003,
657 WHvRegisterSint4 = 0x000A0004,
658 WHvRegisterSint5 = 0x000A0005,
659 WHvRegisterSint6 = 0x000A0006,
660 WHvRegisterSint7 = 0x000A0007,
661 WHvRegisterSint8 = 0x000A0008,
662 WHvRegisterSint9 = 0x000A0009,
663 WHvRegisterSint10 = 0x000A000A,
664 WHvRegisterSint11 = 0x000A000B,
665 WHvRegisterSint12 = 0x000A000C,
666 WHvRegisterSint13 = 0x000A000D,
667 WHvRegisterSint14 = 0x000A000E,
668 WHvRegisterSint15 = 0x000A000F,
669 WHvRegisterScontrol = 0x000A0010,
670 WHvRegisterSversion = 0x000A0011,
671 WHvRegisterSifp = 0x000A0012,
672 WHvRegisterSipp = 0x000A0013,
673 WHvRegisterEom = 0x000A0014,
674 WHvRegisterHypervisorVersion = 0x00000100,
675 WHvRegisterPrivilegesAndFeaturesInfo = 0x00000200,
676 WHvRegisterFeaturesInfo = 0x00000201,
677 WHvRegisterImplementationLimitsInfo = 0x00000202,
678 WHvRegisterHardwareFeaturesInfo = 0x00000203,
679 WHvRegisterCpuManagementFeaturesInfo = 0x00000204,
680 WHvRegisterPasidFeaturesInfo = 0x00000205,
681 WHvRegisterGuestCrashP0 = 0x00000210,
682 WHvRegisterGuestCrashP1 = 0x00000211,
683 WHvRegisterGuestCrashP2 = 0x00000212,
684 WHvRegisterGuestCrashP3 = 0x00000213,
685 WHvRegisterGuestCrashP4 = 0x00000214,
686 WHvRegisterGuestCrashCtl = 0x00000215,
687 WHvRegisterVpRuntime = 0x00090000,
688 WHvRegisterGuestOsId = 0x00090002,
689 WHvRegisterVpAssistPage = 0x00090013,
690 WHvArm64RegisterPartitionInfoPage = 0x00090015,
691 WHvRegisterReferenceTsc = 0x00090017,
692 WHvRegisterReferenceTscSequence = 0x0009001A,
693 WHvRegisterPendingEvent0 = 0x00010004,
694 WHvRegisterPendingEvent1 = 0x00010005,
695 WHvRegisterDeliverabilityNotifications = 0x00010006,
696 WHvRegisterInternalActivityState = 0x00000004,
697 WHvRegisterPendingEvent2 = 0x00010008,
698 WHvRegisterPendingEvent3 = 0x00010009
699} WHV_REGISTER_NAME;
700
701#define WHvRegisterSiefp WHvRegisterSifp
702#define WHvRegisterSimp WHvRegisterSipp
703#define WHvRegisterPendingEvent WHvRegisterPendingEvent0
704
705#endif /* __x86_64__ || __aarch64__ */
706
707typedef UINT64 WHV_GUEST_PHYSICAL_ADDRESS;
708typedef UINT64 WHV_GUEST_VIRTUAL_ADDRESS;
709
710typedef union DECLSPEC_ALIGN(16) WHV_UINT128 {
711 __C89_NAMELESS struct {
712 UINT64 Low64;
713 UINT64 High64;
714 };
715 UINT32 Dword[4];
716} WHV_UINT128;
717
718C_ASSERT(sizeof(WHV_UINT128) == 16);
719
720#if defined(__x86_64__)
721
722typedef union WHV_X64_FP_REGISTER {
723 __C89_NAMELESS struct {
724 UINT64 Mantissa;
725 UINT64 BiasedExponent:15;
726 UINT64 Sign:1;
727 UINT64 Reserved:48;
728 };
729 WHV_UINT128 AsUINT128;
730} WHV_X64_FP_REGISTER;
731
732C_ASSERT(sizeof(WHV_X64_FP_REGISTER) == 16);
733
734typedef union WHV_X64_FP_CONTROL_STATUS_REGISTER {
735 __C89_NAMELESS struct {
736 UINT16 FpControl;
737 UINT16 FpStatus;
738 UINT8 FpTag;
739 UINT8 Reserved;
740 UINT16 LastFpOp;
741 __C89_NAMELESS union {
742 UINT64 LastFpRip;
743 __C89_NAMELESS struct {
744 UINT32 LastFpEip;
745 UINT16 LastFpCs;
746 UINT16 Reserved2;
747 };
748 };
749 };
750 WHV_UINT128 AsUINT128;
751} WHV_X64_FP_CONTROL_STATUS_REGISTER;
752
753C_ASSERT(sizeof(WHV_X64_FP_CONTROL_STATUS_REGISTER) == 16);
754
755typedef union WHV_X64_XMM_CONTROL_STATUS_REGISTER {
756 __C89_NAMELESS struct {
757 __C89_NAMELESS union {
758 UINT64 LastFpRdp;
759 __C89_NAMELESS struct {
760 UINT32 LastFpDp;
761 UINT16 LastFpDs;
762 UINT16 Reserved;
763 };
764 };
765 UINT32 XmmStatusControl;
766 UINT32 XmmStatusControlMask;
767 };
768 WHV_UINT128 AsUINT128;
769} WHV_X64_XMM_CONTROL_STATUS_REGISTER;
770
771C_ASSERT(sizeof(WHV_X64_XMM_CONTROL_STATUS_REGISTER) == 16);
772
773typedef struct WHV_X64_SEGMENT_REGISTER {
774 UINT64 Base;
775 UINT32 Limit;
776 UINT16 Selector;
777 __C89_NAMELESS union {
778 __C89_NAMELESS struct {
779 UINT16 SegmentType:4;
780 UINT16 NonSystemSegment:1;
781 UINT16 DescriptorPrivilegeLevel:2;
782 UINT16 Present:1;
783 UINT16 Reserved:4;
784 UINT16 Available:1;
785 UINT16 Long:1;
786 UINT16 Default:1;
787 UINT16 Granularity:1;
788 };
789 UINT16 Attributes;
790 };
791} WHV_X64_SEGMENT_REGISTER;
792
793C_ASSERT(sizeof(WHV_X64_SEGMENT_REGISTER) == 16);
794
795typedef struct WHV_X64_TABLE_REGISTER {
796 UINT16 Pad[3];
797 UINT16 Limit;
798 UINT64 Base;
799} WHV_X64_TABLE_REGISTER;
800
801C_ASSERT(sizeof(WHV_X64_TABLE_REGISTER) == 16);
802
803typedef union WHV_X64_INTERRUPT_STATE_REGISTER {
804 __C89_NAMELESS struct {
805 UINT64 InterruptShadow:1;
806 UINT64 NmiMasked:1;
807 UINT64 Reserved:62;
808 };
809 UINT64 AsUINT64;
810} WHV_X64_INTERRUPT_STATE_REGISTER;
811
812C_ASSERT(sizeof(WHV_X64_INTERRUPT_STATE_REGISTER) == 8);
813
814typedef union WHV_X64_PENDING_INTERRUPTION_REGISTER {
815 __C89_NAMELESS struct {
816 UINT32 InterruptionPending:1;
817 UINT32 InterruptionType:3;
818 UINT32 DeliverErrorCode:1;
819 UINT32 InstructionLength:4;
820 UINT32 NestedEvent:1;
821 UINT32 Reserved:6;
822 UINT32 InterruptionVector:16;
823 UINT32 ErrorCode;
824 };
825 UINT64 AsUINT64;
826} WHV_X64_PENDING_INTERRUPTION_REGISTER;
827
828C_ASSERT(sizeof(WHV_X64_PENDING_INTERRUPTION_REGISTER) == sizeof(UINT64));
829
830typedef enum WHV_X64_PENDING_EVENT_TYPE {
831 WHvX64PendingEventException = 0,
832 WHvX64PendingEventExtInt = 5,
833 WHvX64PendingEventSvmNestedExit = 7,
834 WHvX64PendingEventVmxNestedExit = 8
835} WHV_X64_PENDING_EVENT_TYPE;
836
837typedef union WHV_X64_PENDING_EXCEPTION_EVENT {
838 __C89_NAMELESS struct {
839 UINT32 EventPending : 1;
840 UINT32 EventType : 3;
841 UINT32 Reserved0 : 4;
842 UINT32 DeliverErrorCode : 1;
843 UINT32 Reserved1 : 7;
844 UINT32 Vector : 16;
845 UINT32 ErrorCode;
846 UINT64 ExceptionParameter;
847 };
848 WHV_UINT128 AsUINT128;
849} WHV_X64_PENDING_EXCEPTION_EVENT;
850
851C_ASSERT(sizeof(WHV_X64_PENDING_EXCEPTION_EVENT) == sizeof(WHV_UINT128));
852
853typedef union WHV_X64_PENDING_EXT_INT_EVENT {
854 __C89_NAMELESS struct {
855 UINT64 EventPending : 1;
856 UINT64 EventType : 3;
857 UINT64 Reserved0 : 4;
858 UINT64 Vector : 8;
859 UINT64 Reserved1 : 48;
860 UINT64 Reserved2;
861 };
862 WHV_UINT128 AsUINT128;
863} WHV_X64_PENDING_EXT_INT_EVENT;
864
865C_ASSERT(sizeof(WHV_X64_PENDING_EXT_INT_EVENT) == sizeof(WHV_UINT128));
866
867typedef union WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT0 {
868 __C89_NAMELESS struct {
869 UINT64 EventPending : 1;
870 UINT64 EventType : 4;
871 UINT64 Reserved0 : 3;
872 UINT64 InstructionBytesValid : 1;
873 UINT64 Reserved1 : 55;
874 UINT64 ExitCode;
875 };
876 WHV_UINT128 AsUINT128;
877} WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT0;
878
879typedef union WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT1 {
880 __C89_NAMELESS struct {
881 UINT64 ExitInfo1;
882 UINT64 ExitInfo2;
883 };
884 WHV_UINT128 AsUINT128;
885} WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT1;
886
887typedef union WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT2 {
888 __C89_NAMELESS struct {
889 UINT64 NextRip;
890 UINT8 InstructionBytesFetchedCount;
891 UINT8 InstructionBytes[7];
892 };
893 WHV_UINT128 AsUINT128;
894} WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT2;
895
896typedef union WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT3 {
897 __C89_NAMELESS struct {
898 UINT8 InstructionBytes[8];
899 UINT64 Reserved2;
900 };
901 WHV_UINT128 AsUINT128;
902} WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT3;
903
904C_ASSERT(sizeof(WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT0) == 16);
905C_ASSERT(sizeof(WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT1) == 16);
906C_ASSERT(sizeof(WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT2) == 16);
907C_ASSERT(sizeof(WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT3) == 16);
908
909typedef union WHV_X64_PENDING_VMX_NESTED_EXIT_EVENT0 {
910 __C89_NAMELESS struct {
911 UINT32 EventPending : 1;
912 UINT32 EventType : 4;
913 UINT32 Reserved0 : 27;
914 UINT32 ExitReason;
915 UINT64 ExitQualification;
916 };
917 WHV_UINT128 AsUINT128;
918} WHV_X64_PENDING_VMX_NESTED_EXIT_EVENT0;
919
920typedef union WHV_X64_PENDING_VMX_NESTED_EXIT_EVENT1 {
921 __C89_NAMELESS struct {
922 UINT32 InstructionLength;
923 UINT32 InstructionInfo;
924 UINT32 ExitInterruptionInfo;
925 UINT32 ExitExceptionErrorCode;
926 };
927 WHV_UINT128 AsUINT128;
928} WHV_X64_PENDING_VMX_NESTED_EXIT_EVENT1;
929
930typedef union WHV_X64_PENDING_VMX_NESTED_EXIT_EVENT2 {
931 __C89_NAMELESS struct {
932 UINT64 GuestLinearAddress;
933 UINT64 GuestPhysicalAddress;
934 };
935 WHV_UINT128 AsUINT128;
936} WHV_X64_PENDING_VMX_NESTED_EXIT_EVENT2;
937
938C_ASSERT(sizeof(WHV_X64_PENDING_VMX_NESTED_EXIT_EVENT0) == 16);
939C_ASSERT(sizeof(WHV_X64_PENDING_VMX_NESTED_EXIT_EVENT1) == 16);
940C_ASSERT(sizeof(WHV_X64_PENDING_VMX_NESTED_EXIT_EVENT2) == 16);
941
942typedef union WHV_X64_NESTED_INVEPT_REGISTER {
943 __C89_NAMELESS struct {
944 UINT8 Type;
945 UINT8 Reserved[7];
946 UINT64 Eptp;
947 };
948 WHV_UINT128 AsUINT128;
949} WHV_X64_NESTED_INVEPT_REGISTER;
950
951C_ASSERT(sizeof(WHV_X64_NESTED_INVEPT_REGISTER) == 16);
952
953typedef union WHV_X64_NESTED_INVVPID_REGISTER {
954 __C89_NAMELESS struct {
955 UINT8 Type;
956 UINT8 Reserved[3];
957 UINT32 Vpid;
958 UINT64 LinearAddress;
959 };
960 WHV_UINT128 AsUINT128;
961} WHV_X64_NESTED_INVVPID_REGISTER;
962
963C_ASSERT(sizeof(WHV_X64_NESTED_INVVPID_REGISTER) == 16);
964
965typedef union WHV_X64_NESTED_GUEST_STATE {
966 __C89_NAMELESS struct {
967 UINT64 NestedVirtActive : 1;
968 UINT64 NestedGuestMode : 1;
969 UINT64 VmEntryPending : 1;
970 UINT64 Reserved0 : 61;
971 UINT64 Reserved1;
972 };
973 WHV_UINT128 AsUINT128;
974} WHV_X64_NESTED_GUEST_STATE;
975
976C_ASSERT(sizeof(WHV_X64_NESTED_GUEST_STATE) == 16);
977
978#endif /* defined(__x86_64__) */
979
980typedef union WHV_DELIVERABILITY_NOTIFICATIONS_REGISTER {
981 __C89_NAMELESS struct {
982#if defined(__x86_64__)
983 UINT64 NmiNotification:1;
984 UINT64 InterruptNotification:1;
985 UINT64 InterruptPriority:4;
986 UINT64 Reserved:42;
987#elif defined(__aarch64__)
988 UINT64 Reserved:48;
989#endif
990 UINT64 Sint:16;
991 };
992 UINT64 AsUINT64;
993} WHV_DELIVERABILITY_NOTIFICATIONS_REGISTER, WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER;
994
995C_ASSERT(sizeof(WHV_DELIVERABILITY_NOTIFICATIONS_REGISTER) == 8);
996
997typedef union WHV_INTERNAL_ACTIVITY_REGISTER {
998 __C89_NAMELESS struct {
999 UINT64 StartupSuspend : 1;
1000 UINT64 HaltSuspend : 1;
1001 UINT64 IdleSuspend : 1;
1002 UINT64 Reserved :61;
1003 };
1004 UINT64 AsUINT64;
1005} WHV_INTERNAL_ACTIVITY_REGISTER;
1006
1007C_ASSERT(sizeof(WHV_INTERNAL_ACTIVITY_REGISTER) == 8);
1008
1009#if defined(__x86_64__)
1010
1011typedef union WHV_X64_PENDING_DEBUG_EXCEPTION {
1012 UINT64 AsUINT64;
1013 __C89_NAMELESS struct {
1014 UINT64 Breakpoint0 : 1;
1015 UINT64 Breakpoint1 : 1;
1016 UINT64 Breakpoint2 : 1;
1017 UINT64 Breakpoint3 : 1;
1018 UINT64 SingleStep : 1;
1019 UINT64 Reserved0 : 59;
1020 };
1021} WHV_X64_PENDING_DEBUG_EXCEPTION;
1022
1023C_ASSERT(sizeof(WHV_X64_PENDING_DEBUG_EXCEPTION) == 8);
1024
1025#elif defined(__aarch64__)
1026
1027typedef enum WHV_ARM64_PENDING_EVENT_TYPE {
1028 WHvArm64PendingEventException = 0,
1029 WHvArm64PendingEventSyntheticException = 1
1030} WHV_ARM64_PENDING_EVENT_TYPE;
1031
1032#define WHV_ARM64_PENDING_EVENT_HEADER \
1033 UINT8 EventPending : 1; \
1034 UINT8 EventType : 3; \
1035 UINT8 Reserved : 4
1036
1037typedef union WHV_ARM64_PENDING_EXCEPTION_EVENT {
1038 UINT64 AsUINT64[3];
1039 __C89_NAMELESS struct {
1040 WHV_ARM64_PENDING_EVENT_HEADER;
1041 UINT8 Reserved1;
1042 UINT16 Reserved2;
1043 UINT32 Reserved3;
1044 UINT64 EsrElx;
1045 UINT64 FarElx;
1046 };
1047} WHV_ARM64_PENDING_EXCEPTION_EVENT;
1048
1049typedef enum WHV_ARM64_SYNTHETIC_EXCEPTION_TYPE {
1050 WHvArm64SyntheticExceptionTypeSmc = 0x0,
1051 WHvArm64SyntheticExceptionTypeSecure = 0x1,
1052 WHvArm64SyntheticExceptionTypeCrashdump = 0x2,
1053 WHvArm64SyntheticExceptionTypeVirtualizationFault = 0x3,
1054 WHvArm64SyntheticExceptionTypeMax = 0x3F + 1
1055} WHV_ARM64_SYNTHETIC_EXCEPTION_TYPE;
1056
1057typedef union WHV_ARM64_PENDING_SYNTHETIC_EXCEPTION_EVENT {
1058 UINT64 AsUINT64[2];
1059 __C89_NAMELESS struct {
1060 WHV_ARM64_PENDING_EVENT_HEADER;
1061 UINT8 Reserved1;
1062 UINT16 Reserved2;
1063 UINT32 ExceptionType;
1064 UINT64 Context;
1065 };
1066} WHV_ARM64_PENDING_SYNTHETIC_EXCEPTION_EVENT;
1067
1068typedef union WHV_ARM64_PENDING_EVENT {
1069 __C89_NAMELESS struct {
1070 WHV_UINT128 Reg0;
1071 WHV_UINT128 Reg1;
1072 };
1073 __C89_NAMELESS struct {
1074 WHV_ARM64_PENDING_EVENT_HEADER;
1075 UINT8 EventData[15];
1076 };
1077 WHV_ARM64_PENDING_EXCEPTION_EVENT Exception;
1078 WHV_ARM64_PENDING_SYNTHETIC_EXCEPTION_EVENT SyntheticException;
1079} WHV_ARM64_PENDING_EVENT;
1080
1081#endif /* defined(__x86_64__) || defined(__aarch64__) */
1082
1083typedef union WHV_REGISTER_VALUE {
1084 WHV_UINT128 Reg128;
1085 UINT64 Reg64;
1086 UINT32 Reg32;
1087 UINT16 Reg16;
1088 UINT8 Reg8;
1089 WHV_INTERNAL_ACTIVITY_REGISTER InternalActivity;
1090 WHV_DELIVERABILITY_NOTIFICATIONS_REGISTER DeliverabilityNotifications;
1091#if defined(__x86_64__)
1092 WHV_X64_FP_REGISTER Fp;
1093 WHV_X64_FP_CONTROL_STATUS_REGISTER FpControlStatus;
1094 WHV_X64_XMM_CONTROL_STATUS_REGISTER XmmControlStatus;
1095 WHV_X64_SEGMENT_REGISTER Segment;
1096 WHV_X64_TABLE_REGISTER Table;
1097 WHV_X64_INTERRUPT_STATE_REGISTER InterruptState;
1098 WHV_X64_PENDING_INTERRUPTION_REGISTER PendingInterruption;
1099 WHV_X64_PENDING_EXCEPTION_EVENT ExceptionEvent;
1100 WHV_X64_PENDING_EXT_INT_EVENT ExtIntEvent;
1101 WHV_X64_PENDING_DEBUG_EXCEPTION PendingDebugException;
1102 WHV_X64_NESTED_GUEST_STATE NestedState;
1103 WHV_X64_NESTED_INVEPT_REGISTER InvEpt;
1104 WHV_X64_NESTED_INVVPID_REGISTER InvVpid;
1105 WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT0 SvmNestedExit0;
1106 WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT1 SvmNestedExit1;
1107 WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT2 SvmNestedExit2;
1108 WHV_X64_PENDING_SVM_NESTED_EXIT_EVENT3 SvmNestedExit3;
1109 WHV_X64_PENDING_VMX_NESTED_EXIT_EVENT0 VmxNestedExit0;
1110 WHV_X64_PENDING_VMX_NESTED_EXIT_EVENT1 VmxNestedExit1;
1111 WHV_X64_PENDING_VMX_NESTED_EXIT_EVENT2 VmxNestedExit2;
1112#endif
1113} WHV_REGISTER_VALUE;
1114
1115C_ASSERT(sizeof(WHV_REGISTER_VALUE) == 16);
1116
1117typedef enum WHV_CAPABILITY_CODE {
1118 WHvCapabilityCodeHypervisorPresent = 0x00000000
1119 ,WHvCapabilityCodeFeatures = 0x00000001
1120 ,WHvCapabilityCodeExtendedVmExits = 0x00000002
1121#if defined(__x86_64__)
1122 ,WHvCapabilityCodeExceptionExitBitmap = 0x00000003
1123 ,WHvCapabilityCodeX64MsrExitBitmap = 0x00000004
1124#endif
1125 ,WHvCapabilityCodeGpaRangePopulateFlags = 0x00000005
1126 ,WHvCapabilityCodeSchedulerFeatures = 0x00000006
1127 ,WHvCapabilityCodeProcessorVendor = 0x00001000
1128 ,WHvCapabilityCodeProcessorFeatures = 0x00001001
1129 ,WHvCapabilityCodeProcessorClFlushSize = 0x00001002
1130#if defined(__x86_64__)
1131 ,WHvCapabilityCodeProcessorXsaveFeatures = 0x00001003
1132#endif
1133 ,WHvCapabilityCodeProcessorClockFrequency = 0x00001004
1134#if defined(__x86_64__)
1135 ,WHvCapabilityCodeInterruptClockFrequency = 0x00001005
1136#endif
1137 ,WHvCapabilityCodeProcessorFeaturesBanks = 0x00001006
1138 ,WHvCapabilityCodeProcessorFrequencyCap = 0x00001007
1139 ,WHvCapabilityCodeSyntheticProcessorFeaturesBanks = 0x00001008
1140#if defined(__x86_64__)
1141 ,WHvCapabilityCodeProcessorPerfmonFeatures = 0x00001009
1142#endif
1143 ,WHvCapabilityCodePhysicalAddressWidth = 0x0000100A
1144#if defined(__x86_64__)
1145 ,WHvCapabilityCodeVmxBasic = 0x00002000
1146 ,WHvCapabilityCodeVmxPinbasedCtls = 0x00002001
1147 ,WHvCapabilityCodeVmxProcbasedCtls = 0x00002002
1148 ,WHvCapabilityCodeVmxExitCtls = 0x00002003
1149 ,WHvCapabilityCodeVmxEntryCtls = 0x00002004
1150 ,WHvCapabilityCodeVmxMisc = 0x00002005
1151 ,WHvCapabilityCodeVmxCr0Fixed0 = 0x00002006
1152 ,WHvCapabilityCodeVmxCr0Fixed1 = 0x00002007
1153 ,WHvCapabilityCodeVmxCr4Fixed0 = 0x00002008
1154 ,WHvCapabilityCodeVmxCr4Fixed1 = 0x00002009
1155 ,WHvCapabilityCodeVmxVmcsEnum = 0x0000200A
1156 ,WHvCapabilityCodeVmxProcbasedCtls2 = 0x0000200B
1157 ,WHvCapabilityCodeVmxEptVpidCap = 0x0000200C
1158 ,WHvCapabilityCodeVmxTruePinbasedCtls = 0x0000200D
1159 ,WHvCapabilityCodeVmxTrueProcbasedCtls = 0x0000200E
1160 ,WHvCapabilityCodeVmxTrueExitCtls = 0x0000200F
1161 ,WHvCapabilityCodeVmxTrueEntryCtls = 0x00002010
1162#elif defined (__aarch64__)
1163 ,WHvCapabilityCodeGicLpiIntIdBits = 0x00002011
1164 ,WHvCapabilityCodeMaxSveVectorLength = 0x00002012
1165#endif
1166} WHV_CAPABILITY_CODE;
1167
1168typedef union WHV_CAPABILITY_FEATURES {
1169 __C89_NAMELESS struct {
1170 UINT64 PartialUnmap : 1;
1171#if defined(__x86_64__)
1172 UINT64 LocalApicEmulation : 1;
1173 UINT64 Xsave : 1;
1174#else
1175 UINT64 ReservedArm0 : 2;
1176#endif
1177 UINT64 DirtyPageTracking : 1;
1178 UINT64 SpeculationControl : 1;
1179#if defined(__x86_64__)
1180 UINT64 ApicRemoteRead : 1;
1181#else
1182 UINT64 ReservedArm1 : 1;
1183#endif
1184 UINT64 IdleSuspend : 1;
1185 UINT64 VirtualPciDeviceSupport : 1;
1186 UINT64 IommuSupport : 1;
1187 UINT64 VpHotAddRemove : 1;
1188 UINT64 DeviceAccessTracking : 1;
1189#if defined(__x86_64__)
1190 UINT64 ReservedX640 : 1;
1191#else
1192 UINT64 Arm64Support : 1;
1193#endif
1194 UINT64 Reserved : 52;
1195 };
1196 UINT64 AsUINT64;
1197} WHV_CAPABILITY_FEATURES;
1198
1199C_ASSERT(sizeof(WHV_CAPABILITY_FEATURES) == sizeof(UINT64));
1200
1201typedef union WHV_EXTENDED_VM_EXITS {
1202 __C89_NAMELESS struct {
1203#if defined(__x86_64__)
1204 UINT64 X64CpuidExit : 1;
1205 UINT64 X64MsrExit : 1;
1206 UINT64 ExceptionExit : 1;
1207 UINT64 X64RdtscExit : 1;
1208 UINT64 X64ApicSmiExitTrap : 1;
1209#else
1210 UINT64 ReservedArm0 : 5;
1211#endif
1212 UINT64 HypercallExit : 1;
1213#if defined(__x86_64__)
1214 UINT64 X64ApicInitSipiExitTrap : 1;
1215 UINT64 X64ApicWriteLint0ExitTrap : 1;
1216 UINT64 X64ApicWriteLint1ExitTrap : 1;
1217 UINT64 X64ApicWriteSvrExitTrap : 1;
1218#else
1219 UINT64 ReservedArm1 : 4;
1220#endif
1221 UINT64 UnknownSynicConnection : 1;
1222 UINT64 RetargetUnknownVpciDevice : 1;
1223#if defined(__x86_64__)
1224 UINT64 X64ApicWriteLdrExitTrap : 1;
1225 UINT64 X64ApicWriteDfrExitTrap : 1;
1226#else
1227 UINT64 ReservedArm2 : 2;
1228#endif
1229 UINT64 GpaAccessFaultExit : 1;
1230 UINT64 Reserved : 49;
1231 };
1232 UINT64 AsUINT64;
1233} WHV_EXTENDED_VM_EXITS;
1234
1235C_ASSERT(sizeof(WHV_EXTENDED_VM_EXITS) == sizeof(UINT64));
1236
1237typedef enum WHV_PROCESSOR_VENDOR {
1238 WHvProcessorVendorAmd = 0x0000,
1239 WHvProcessorVendorIntel = 0x0001,
1240 WHvProcessorVendorHygon = 0x0002,
1241 WHvProcessorVendorArm = 0x0010
1242} WHV_PROCESSOR_VENDOR;
1243
1244#if defined(__x86_64__)
1245
1246typedef union WHV_X64_PROCESSOR_FEATURES {
1247 __C89_NAMELESS struct {
1248 UINT64 Sse3Support : 1;
1249 UINT64 LahfSahfSupport : 1;
1250 UINT64 Ssse3Support : 1;
1251 UINT64 Sse4_1Support : 1;
1252 UINT64 Sse4_2Support : 1;
1253 UINT64 Sse4aSupport : 1;
1254 UINT64 XopSupport : 1;
1255 UINT64 PopCntSupport : 1;
1256 UINT64 Cmpxchg16bSupport : 1;
1257 UINT64 Altmovcr8Support : 1;
1258 UINT64 LzcntSupport : 1;
1259 UINT64 MisAlignSseSupport : 1;
1260 UINT64 MmxExtSupport : 1;
1261 UINT64 Amd3DNowSupport : 1;
1262 UINT64 ExtendedAmd3DNowSupport : 1;
1263 UINT64 Page1GbSupport : 1;
1264 UINT64 AesSupport : 1;
1265 UINT64 PclmulqdqSupport : 1;
1266 UINT64 PcidSupport : 1;
1267 UINT64 Fma4Support : 1;
1268 UINT64 F16CSupport : 1;
1269 UINT64 RdRandSupport : 1;
1270 UINT64 RdWrFsGsSupport : 1;
1271 UINT64 SmepSupport : 1;
1272 UINT64 EnhancedFastStringSupport : 1;
1273 UINT64 Bmi1Support : 1;
1274 UINT64 Bmi2Support : 1;
1275 UINT64 Reserved1 : 2;
1276 UINT64 MovbeSupport : 1;
1277 UINT64 Npiep1Support : 1;
1278 UINT64 DepX87FPUSaveSupport : 1;
1279 UINT64 RdSeedSupport : 1;
1280 UINT64 AdxSupport : 1;
1281 UINT64 IntelPrefetchSupport : 1;
1282 UINT64 SmapSupport : 1;
1283 UINT64 HleSupport : 1;
1284 UINT64 RtmSupport : 1;
1285 UINT64 RdtscpSupport : 1;
1286 UINT64 ClflushoptSupport : 1;
1287 UINT64 ClwbSupport : 1;
1288 UINT64 ShaSupport : 1;
1289 UINT64 X87PointersSavedSupport : 1;
1290 UINT64 InvpcidSupport : 1;
1291 UINT64 IbrsSupport : 1;
1292 UINT64 StibpSupport : 1;
1293 UINT64 IbpbSupport : 1;
1294 UINT64 UnrestrictedGuestSupport : 1;
1295 UINT64 SsbdSupport : 1;
1296 UINT64 FastShortRepMovSupport : 1;
1297 UINT64 Reserved3 : 1;
1298 UINT64 RdclNo : 1;
1299 UINT64 IbrsAllSupport : 1;
1300 UINT64 Reserved4 : 1;
1301 UINT64 SsbNo : 1;
1302 UINT64 RsbANo : 1;
1303 UINT64 Reserved5 : 1;
1304 UINT64 RdPidSupport : 1;
1305 UINT64 UmipSupport : 1;
1306 UINT64 MdsNoSupport : 1;
1307 UINT64 MdClearSupport : 1;
1308 UINT64 TaaNoSupport : 1;
1309 UINT64 TsxCtrlSupport : 1;
1310 UINT64 Reserved6 : 1;
1311 };
1312 UINT64 AsUINT64;
1313} WHV_X64_PROCESSOR_FEATURES, WHV_PROCESSOR_FEATURES;
1314
1315C_ASSERT(sizeof(WHV_X64_PROCESSOR_FEATURES) == sizeof(UINT64));
1316
1317typedef union WHV_X64_PROCESSOR_FEATURES1 {
1318 __C89_NAMELESS struct {
1319 UINT64 ACountMCountSupport : 1;
1320 UINT64 TscInvariantSupport : 1;
1321 UINT64 ClZeroSupport : 1;
1322 UINT64 RdpruSupport : 1;
1323 UINT64 La57Support : 1;
1324 UINT64 MbecSupport : 1;
1325 UINT64 NestedVirtSupport : 1;
1326 UINT64 PsfdSupport: 1;
1327 UINT64 CetSsSupport : 1;
1328 UINT64 CetIbtSupport : 1;
1329 UINT64 VmxExceptionInjectSupport : 1;
1330 UINT64 Reserved2 : 1;
1331 UINT64 UmwaitTpauseSupport : 1;
1332 UINT64 MovdiriSupport : 1;
1333 UINT64 Movdir64bSupport : 1;
1334 UINT64 CldemoteSupport : 1;
1335 UINT64 SerializeSupport : 1;
1336 UINT64 TscDeadlineTmrSupport : 1;
1337 UINT64 TscAdjustSupport : 1;
1338 UINT64 FZLRepMovsb : 1;
1339 UINT64 FSRepStosb : 1;
1340 UINT64 FSRepCmpsb : 1;
1341 UINT64 TsxLdTrkSupport : 1;
1342 UINT64 VmxInsOutsExitInfoSupport : 1;
1343 UINT64 Reserved3 : 1;
1344 UINT64 SbdrSsdpNoSupport : 1;
1345 UINT64 FbsdpNoSupport : 1;
1346 UINT64 PsdpNoSupport : 1;
1347 UINT64 FbClearSupport : 1;
1348 UINT64 BtcNoSupport : 1;
1349 UINT64 IbpbRsbFlushSupport : 1;
1350 UINT64 StibpAlwaysOnSupport : 1;
1351 UINT64 PerfGlobalCtrlSupport : 1;
1352 UINT64 NptExecuteOnlySupport : 1;
1353 UINT64 NptADFlagsSupport : 1;
1354 UINT64 Npt1GbPageSupport : 1;
1355 UINT64 Reserved4 : 1;
1356 UINT64 Reserved5 : 1;
1357 UINT64 Reserved6 : 1;
1358 UINT64 Reserved7 : 1;
1359 UINT64 CmpccxaddSupport : 1;
1360 UINT64 Reserved8 : 1;
1361 UINT64 Reserved9 : 1;
1362 UINT64 Reserved10 : 1;
1363 UINT64 Reserved11 : 1;
1364 UINT64 PrefetchISupport : 1;
1365 UINT64 Sha512Support : 1;
1366 UINT64 Reserved12 : 1;
1367 UINT64 Reserved13 : 1;
1368 UINT64 Reserved14 : 1;
1369 UINT64 SM3Support : 1;
1370 UINT64 SM4Support : 1;
1371 UINT64 Reserved15 : 1;
1372 UINT64 Reserved16 : 1;
1373 UINT64 SbpbSupported : 1;
1374 UINT64 IbpbBrTypeSupported : 1;
1375 UINT64 SrsoNoSupported : 1;
1376 UINT64 SrsoUserKernelNoSupported : 1;
1377 UINT64 Reserved17 : 1;
1378 UINT64 Reserved18 : 1;
1379 UINT64 Reserved19 : 1;
1380 UINT64 Reserved20 : 3;
1381 };
1382 UINT64 AsUINT64;
1383} WHV_X64_PROCESSOR_FEATURES1, WHV_PROCESSOR_FEATURES1;
1384
1385C_ASSERT(sizeof(WHV_X64_PROCESSOR_FEATURES1) == sizeof(UINT64));
1386
1387#elif defined(__aarch64__)
1388
1389typedef union WHV_ARM64_PROCESSOR_FEATURES {
1390 __C89_NAMELESS struct {
1391 UINT64 Asid16 : 1;
1392 UINT64 TGran16 : 1;
1393 UINT64 TGran64 : 1;
1394 UINT64 Haf : 1;
1395 UINT64 Hdbs : 1;
1396 UINT64 Pan : 1;
1397 UINT64 AtS1E1 : 1;
1398 UINT64 Uao : 1;
1399 UINT64 El0Aarch32 : 1;
1400 UINT64 Fp : 1;
1401 UINT64 FpHp : 1;
1402 UINT64 AdvSimd : 1;
1403 UINT64 AdvSimdHp : 1;
1404 UINT64 GicV3V4 : 1;
1405 UINT64 GicV41 : 1;
1406 UINT64 Ras : 1;
1407 UINT64 PmuV3 : 1;
1408 UINT64 PmuV3ArmV81 : 1;
1409 UINT64 PmuV3ArmV84 : 1;
1410 UINT64 PmuV3ArmV85 : 1;
1411 UINT64 Aes : 1;
1412 UINT64 PolyMul : 1;
1413 UINT64 Sha1 : 1;
1414 UINT64 Sha256 : 1;
1415 UINT64 Sha512 : 1;
1416 UINT64 Crc32 : 1;
1417 UINT64 Atomic : 1;
1418 UINT64 Rdm : 1;
1419 UINT64 Sha3 : 1;
1420 UINT64 Sm3 : 1;
1421 UINT64 Sm4 : 1;
1422 UINT64 Dp : 1;
1423 UINT64 Fhm : 1;
1424 UINT64 DcCvap : 1;
1425 UINT64 DcCvadp : 1;
1426 UINT64 ApaBase : 1;
1427 UINT64 ApaEp : 1;
1428 UINT64 ApaEp2 : 1;
1429 UINT64 ApaEp2Fp : 1;
1430 UINT64 ApaEp2Fpc : 1;
1431 UINT64 Jscvt : 1;
1432 UINT64 Fcma : 1;
1433 UINT64 RcpcV83 : 1;
1434 UINT64 RcpcV84 : 1;
1435 UINT64 Gpa : 1;
1436 UINT64 L1ipPipt : 1;
1437 UINT64 DzPermitted : 1;
1438 UINT64 Ssbs : 1;
1439 UINT64 SsbsRw : 1;
1440 UINT64 Reserved49 : 1;
1441 UINT64 Reserved50 : 1;
1442 UINT64 Reserved51 : 1;
1443 UINT64 Reserved52 : 1;
1444 UINT64 Csv2 : 1;
1445 UINT64 Csv3 : 1;
1446 UINT64 Sb : 1;
1447 UINT64 Idc : 1;
1448 UINT64 Dic : 1;
1449 UINT64 TlbiOs : 1;
1450 UINT64 TlbiOsRange : 1;
1451 UINT64 FlagsM : 1;
1452 UINT64 FlagsM2 : 1;
1453 UINT64 Bf16 : 1;
1454 UINT64 Ebf16 : 1;
1455 };
1456 UINT64 AsUINT64;
1457} WHV_ARM64_PROCESSOR_FEATURES, WHV_PROCESSOR_FEATURES;
1458
1459typedef union WHV_ARM64_PROCESSOR_FEATURES1 {
1460 __C89_NAMELESS struct {
1461 UINT64 SveBf16 : 1;
1462 UINT64 SveEbf16 : 1;
1463 UINT64 I8mm : 1;
1464 UINT64 SveI8mm : 1;
1465 UINT64 Frintts : 1;
1466 UINT64 Specres : 1;
1467 UINT64 Reserved6 : 1;
1468 UINT64 Rpres : 1;
1469 UINT64 Exs : 1;
1470 UINT64 SpecSei : 1;
1471 UINT64 Ets : 1;
1472 UINT64 Afp : 1;
1473 UINT64 Iesb : 1;
1474 UINT64 Rng : 1;
1475 UINT64 Lse2 : 1;
1476 UINT64 Idst : 1;
1477 UINT64 Reserved16 : 1;
1478 UINT64 Reserved17 : 1;
1479 UINT64 Reserved18 : 1;
1480 UINT64 Reserved19 : 1;
1481 UINT64 Reserved20 : 1;
1482 UINT64 Reserved21 : 1;
1483 UINT64 Ccidx : 1;
1484 UINT64 Reserved23 : 1;
1485 UINT64 Reserved24 : 1;
1486 UINT64 Reserved25 : 1;
1487 UINT64 Reserved26 : 1;
1488 UINT64 Reserved27 : 1;
1489 UINT64 Reserved28 : 1;
1490 UINT64 Reserved29 : 1;
1491 UINT64 Reserved30 : 1;
1492 UINT64 Reserved31 : 1;
1493 UINT64 Reserved32 : 1;
1494 UINT64 Reserved33 : 1;
1495 UINT64 Reserved34 : 1;
1496 UINT64 TtCnp : 1;
1497 UINT64 Hpds : 1;
1498 UINT64 Sve : 1;
1499 UINT64 SveV2 : 1;
1500 UINT64 SveV2P1 : 1;
1501 UINT64 SpecFpacc : 1;
1502 UINT64 SveAes : 1;
1503 UINT64 SveBitPerm : 1;
1504 UINT64 SveSha3 : 1;
1505 UINT64 SveSm4 : 1;
1506 UINT64 E0PD : 1;
1507 UINT64 Reserved : 8;
1508 };
1509 UINT64 AsUINT64;
1510} WHV_ARM64_PROCESSOR_FEATURES1, WHV_PROCESSOR_FEATURES1;
1511
1512#endif /* __x86_64__ || __aarch64__ */
1513
1514#define WHV_PROCESSOR_FEATURES_BANKS_COUNT 2
1515
1516typedef struct WHV_PROCESSOR_FEATURES_BANKS {
1517 UINT32 BanksCount;
1518 UINT32 Reserved0;
1519 __C89_NAMELESS union {
1520 __C89_NAMELESS struct {
1521 WHV_PROCESSOR_FEATURES Bank0;
1522 WHV_PROCESSOR_FEATURES1 Bank1;
1523 };
1524 UINT64 AsUINT64[WHV_PROCESSOR_FEATURES_BANKS_COUNT];
1525 };
1526} WHV_PROCESSOR_FEATURES_BANKS;
1527
1528C_ASSERT(sizeof(WHV_PROCESSOR_FEATURES_BANKS) == sizeof(UINT64) * (WHV_PROCESSOR_FEATURES_BANKS_COUNT + 1));
1529
1530typedef union WHV_SYNTHETIC_PROCESSOR_FEATURES {
1531 __C89_NAMELESS struct {
1532 UINT64 HypervisorPresent : 1;
1533 UINT64 Hv1 : 1;
1534 UINT64 AccessVpRunTimeReg : 1;
1535 UINT64 AccessPartitionReferenceCounter : 1;
1536 UINT64 AccessSynicRegs : 1;
1537 UINT64 AccessSyntheticTimerRegs : 1;
1538 UINT64 AccessIntrCtrlRegs : 1;
1539 UINT64 AccessHypercallRegs : 1;
1540 UINT64 AccessVpIndex : 1;
1541 UINT64 AccessPartitionReferenceTsc : 1;
1542#ifdef __x86_64__
1543 UINT64 AccessGuestIdleReg : 1;
1544 UINT64 AccessFrequencyRegs : 1;
1545#else
1546 UINT64 ReservedZ10 : 1;
1547 UINT64 ReservedZ11 : 1;
1548#endif
1549 UINT64 ReservedZ12 : 1;
1550 UINT64 ReservedZ13 : 1;
1551 UINT64 ReservedZ14 : 1;
1552#ifdef __x86_64__
1553 UINT64 EnableExtendedGvaRangesForFlushVirtualAddressList : 1;
1554#else
1555 UINT64 ReservedZ15 : 1;
1556#endif
1557 UINT64 ReservedZ16 : 1;
1558 UINT64 ReservedZ17 : 1;
1559 UINT64 FastHypercallOutput : 1;
1560 UINT64 ReservedZ19 : 1;
1561 UINT64 ReservedZ20 : 1;
1562 UINT64 ReservedZ21 : 1;
1563 UINT64 DirectSyntheticTimers : 1;
1564 UINT64 ReservedZ23 : 1;
1565 UINT64 ExtendedProcessorMasks : 1;
1566 UINT64 TbFlushHypercalls : 1;
1567 UINT64 SyntheticClusterIpi : 1;
1568 UINT64 NotifyLongSpinWait : 1;
1569 UINT64 QueryNumaDistance : 1;
1570 UINT64 SignalEvents : 1;
1571 UINT64 RetargetDeviceInterrupt : 1;
1572#ifdef __x86_64__
1573 UINT64 RestoreTime : 1;
1574 UINT64 EnlightenedVmcs : 1;
1575 UINT64 NestedDebugCtl : 1;
1576 UINT64 SyntheticTimeUnhaltedTimer : 1;
1577 UINT64 IdleSpecCtrl : 1;
1578#else
1579 UINT64 ReservedZ31 : 1;
1580 UINT64 ReservedZ32 : 1;
1581 UINT64 ReservedZ33 : 1;
1582 UINT64 ReservedZ34 : 1;
1583 UINT64 ReservedZ35 : 1;
1584#endif
1585 UINT64 ReservedZ36 : 1;
1586 UINT64 WakeVps : 1;
1587 UINT64 AccessVpRegs : 1;
1588#ifdef __aarch64__
1589 UINT64 SyncContext : 1;
1590#else
1591 UINT64 ReservedZ39 : 1;
1592#endif
1593 UINT64 ReservedZ40 : 1;
1594 UINT64 ReservedZ41 : 1;
1595 UINT64 ReservedZ42 : 1;
1596 UINT64 ReservedZ43 : 1;
1597 UINT64 ReservedZ44 : 1;
1598 UINT64 Reserved : 19;
1599 };
1600 UINT64 AsUINT64;
1601} WHV_SYNTHETIC_PROCESSOR_FEATURES;
1602
1603C_ASSERT(sizeof(WHV_SYNTHETIC_PROCESSOR_FEATURES) == 8);
1604
1605#define WHV_SYNTHETIC_PROCESSOR_FEATURES_BANKS_COUNT 1
1606
1607typedef struct WHV_SYNTHETIC_PROCESSOR_FEATURES_BANKS {
1608 UINT32 BanksCount;
1609 UINT32 Reserved0;
1610 __C89_NAMELESS union {
1611 __C89_NAMELESS struct {
1612 WHV_SYNTHETIC_PROCESSOR_FEATURES Bank0;
1613 };
1614 UINT64 AsUINT64[WHV_SYNTHETIC_PROCESSOR_FEATURES_BANKS_COUNT];
1615 };
1616} WHV_SYNTHETIC_PROCESSOR_FEATURES_BANKS;
1617
1618C_ASSERT(sizeof(WHV_SYNTHETIC_PROCESSOR_FEATURES_BANKS) == 16);
1619
1620typedef UINT8 WHV_VTL;
1621
1622#define WHV_VTL_ALL 0xF
1623
1624typedef union WHV_INPUT_VTL {
1625 UINT8 AsUINT8;
1626 __C89_NAMELESS struct {
1627 UINT8 TargetVtl : 4;
1628 UINT8 UseTargetVtl : 1;
1629 UINT8 Reserved : 3;
1630 };
1631} WHV_INPUT_VTL;
1632
1633typedef union WHV_ENABLE_PARTITION_VTL_FLAGS {
1634 UINT8 AsUINT8;
1635 __C89_NAMELESS struct {
1636 UINT8 EnableMbec : 1;
1637 UINT8 EnableSupervisorShadowStack : 1;
1638 UINT8 EnableHardwareHvpt : 1;
1639 UINT8 Reserved : 5;
1640 };
1641} WHV_ENABLE_PARTITION_VTL_FLAGS;
1642
1643typedef union WHV_DISABLE_PARTITION_VTL_FLAGS {
1644 UINT8 AsUINT8;
1645 __C89_NAMELESS struct {
1646 UINT8 ScrubOnly : 1;
1647 UINT8 Reserved : 7;
1648 };
1649} WHV_DISABLE_PARTITION_VTL_FLAGS;
1650
1651typedef struct WHV_INITIAL_VP_CONTEXT {
1652#if defined(__aarch64__)
1653 UINT64 Pc;
1654 UINT64 Sp_ELh;
1655 UINT64 SCTLR_EL1;
1656 UINT64 MAIR_EL1;
1657 UINT64 TCR_EL1;
1658 UINT64 VBAR_EL1;
1659 UINT64 TTBR0_EL1;
1660 UINT64 TTBR1_EL1;
1661 UINT64 X18;
1662#else
1663 UINT64 Rip;
1664 UINT64 Rsp;
1665 UINT64 Rflags;
1666 WHV_X64_SEGMENT_REGISTER Cs;
1667 WHV_X64_SEGMENT_REGISTER Ds;
1668 WHV_X64_SEGMENT_REGISTER Es;
1669 WHV_X64_SEGMENT_REGISTER Fs;
1670 WHV_X64_SEGMENT_REGISTER Gs;
1671 WHV_X64_SEGMENT_REGISTER Ss;
1672 WHV_X64_SEGMENT_REGISTER Tr;
1673 WHV_X64_SEGMENT_REGISTER Ldtr;
1674 WHV_X64_TABLE_REGISTER Idtr;
1675 WHV_X64_TABLE_REGISTER Gdtr;
1676 UINT64 Efer;
1677 UINT64 Cr0;
1678 UINT64 Cr3;
1679 UINT64 Cr4;
1680 UINT64 MsrCrPat;
1681#endif
1682} WHV_INITIAL_VP_CONTEXT;
1683
1684typedef union WHV_DISABLE_VP_VTL_FLAGS {
1685 UINT8 AsUINT8;
1686 __C89_NAMELESS struct {
1687 UINT8 ScrubOnly : 1;
1688 UINT8 Reserved : 7;
1689 };
1690} WHV_DISABLE_VP_VTL_FLAGS;
1691
1692typedef VOID* WHV_PARTITION_HANDLE;
1693
1694typedef enum WHV_PARTITION_PROPERTY_CODE {
1695 WHvPartitionPropertyCodeExtendedVmExits = 0x00000001,
1696#if defined(__x86_64__)
1697 WHvPartitionPropertyCodeExceptionExitBitmap = 0x00000002,
1698#endif
1699 WHvPartitionPropertyCodeSeparateSecurityDomain = 0x00000003,
1700 WHvPartitionPropertyCodeNestedVirtualization = 0x00000004,
1701#if defined(__x86_64__)
1702 WHvPartitionPropertyCodeX64MsrExitBitmap = 0x00000005,
1703#endif
1704 WHvPartitionPropertyCodePrimaryNumaNode = 0x00000006,
1705 WHvPartitionPropertyCodeCpuReserve = 0x00000007,
1706 WHvPartitionPropertyCodeCpuCap = 0x00000008,
1707 WHvPartitionPropertyCodeCpuWeight = 0x00000009,
1708 WHvPartitionPropertyCodeCpuGroupId = 0x0000000A,
1709 WHvPartitionPropertyCodeProcessorFrequencyCap = 0x0000000B,
1710 WHvPartitionPropertyCodeAllowDeviceAssignment = 0x0000000C,
1711 WHvPartitionPropertyCodeDisableSmt = 0x0000000D,
1712 WHvPartitionPropertyCodeProcessorFeatures = 0x00001001,
1713 WHvPartitionPropertyCodeProcessorClFlushSize = 0x00001002,
1714#if defined(__x86_64__)
1715 WHvPartitionPropertyCodeCpuidExitList = 0x00001003,
1716 WHvPartitionPropertyCodeCpuidResultList = 0x00001004,
1717 WHvPartitionPropertyCodeLocalApicEmulationMode = 0x00001005,
1718 WHvPartitionPropertyCodeProcessorXsaveFeatures = 0x00001006,
1719#endif
1720 WHvPartitionPropertyCodeProcessorClockFrequency = 0x00001007,
1721#if defined(__x86_64__)
1722 WHvPartitionPropertyCodeInterruptClockFrequency = 0x00001008,
1723 WHvPartitionPropertyCodeApicRemoteReadSupport = 0x00001009,
1724#endif
1725 WHvPartitionPropertyCodeProcessorFeaturesBanks = 0x0000100A,
1726 WHvPartitionPropertyCodeReferenceTime = 0x0000100B,
1727 WHvPartitionPropertyCodeSyntheticProcessorFeaturesBanks = 0x0000100C,
1728#if defined(__x86_64__)
1729 WHvPartitionPropertyCodeCpuidResultList2 = 0x0000100D,
1730 WHvPartitionPropertyCodeProcessorPerfmonFeatures = 0x0000100E,
1731 WHvPartitionPropertyCodeMsrActionList = 0x0000100F,
1732 WHvPartitionPropertyCodeUnimplementedMsrAction = 0x00001010,
1733#endif
1734 WHvPartitionPropertyCodePhysicalAddressWidth = 0x00001011,
1735#if defined(__aarch64__)
1736 WHvPartitionPropertyCodeArm64IcParameters = 0x00001012,
1737#endif
1738 WHvPartitionPropertyCodeProcessorCount = 0x00001fff
1739} WHV_PARTITION_PROPERTY_CODE;
1740
1741#if defined(__x86_64__)
1742
1743typedef union WHV_PROCESSOR_XSAVE_FEATURES {
1744 __C89_NAMELESS struct {
1745 UINT64 XsaveSupport : 1;
1746 UINT64 XsaveoptSupport : 1;
1747 UINT64 AvxSupport : 1;
1748 UINT64 Avx2Support : 1;
1749 UINT64 FmaSupport : 1;
1750 UINT64 MpxSupport : 1;
1751 UINT64 Avx512Support : 1;
1752 UINT64 Avx512DQSupport : 1;
1753 UINT64 Avx512CDSupport : 1;
1754 UINT64 Avx512BWSupport : 1;
1755 UINT64 Avx512VLSupport : 1;
1756 UINT64 XsaveCompSupport : 1;
1757 UINT64 XsaveSupervisorSupport : 1;
1758 UINT64 Xcr1Support : 1;
1759 UINT64 Avx512BitalgSupport : 1;
1760 UINT64 Avx512IfmaSupport : 1;
1761 UINT64 Avx512VBmiSupport : 1;
1762 UINT64 Avx512VBmi2Support : 1;
1763 UINT64 Avx512VnniSupport : 1;
1764 UINT64 GfniSupport : 1;
1765 UINT64 VaesSupport : 1;
1766 UINT64 Avx512VPopcntdqSupport : 1;
1767 UINT64 VpclmulqdqSupport : 1;
1768 UINT64 Avx512Bf16Support : 1;
1769 UINT64 Avx512Vp2IntersectSupport : 1;
1770 UINT64 Avx512Fp16Support : 1;
1771 UINT64 XfdSupport : 1;
1772 UINT64 AmxTileSupport : 1;
1773 UINT64 AmxBf16Support : 1;
1774 UINT64 AmxInt8Support : 1;
1775 UINT64 AvxVnniSupport : 1;
1776 UINT64 AvxIfmaSupport : 1;
1777 UINT64 AvxNeConvertSupport : 1;
1778 UINT64 AvxVnniInt8Support : 1;
1779 UINT64 AvxVnniInt16Support : 1;
1780 UINT64 Avx10_1_256Support : 1;
1781 UINT64 Avx10_1_512Support : 1;
1782 UINT64 AmxFp16Support : 1;
1783 UINT64 Reserved : 26;
1784 };
1785 UINT64 AsUINT64;
1786} WHV_PROCESSOR_XSAVE_FEATURES, *PWHV_PROCESSOR_XSAVE_FEATURES;
1787
1788C_ASSERT(sizeof(WHV_PROCESSOR_XSAVE_FEATURES) == sizeof(UINT64));
1789
1790typedef union WHV_PROCESSOR_PERFMON_FEATURES {
1791 __C89_NAMELESS struct {
1792 UINT64 PmuSupport : 1;
1793 UINT64 LbrSupport : 1;
1794 UINT64 Reserved : 62;
1795 };
1796 UINT64 AsUINT64;
1797} WHV_PROCESSOR_PERFMON_FEATURES, *PWHV_PROCESSOR_PERFMON_FEATURES;
1798
1799C_ASSERT(sizeof(WHV_PROCESSOR_PERFMON_FEATURES) == 8);
1800
1801typedef union WHV_X64_MSR_EXIT_BITMAP {
1802 UINT64 AsUINT64;
1803 __C89_NAMELESS struct {
1804 UINT64 UnhandledMsrs : 1;
1805 UINT64 TscMsrWrite : 1;
1806 UINT64 TscMsrRead : 1;
1807 UINT64 ApicBaseMsrWrite : 1;
1808 UINT64 MiscEnableMsrRead : 1;
1809 UINT64 McUpdatePatchLevelMsrRead : 1;
1810 UINT64 Reserved : 58;
1811 };
1812} WHV_X64_MSR_EXIT_BITMAP;
1813
1814C_ASSERT(sizeof(WHV_X64_MSR_EXIT_BITMAP) == sizeof(UINT64));
1815
1816#endif /* defined(__x86_64__) */
1817
1818typedef enum WHV_MAP_GPA_RANGE_FLAGS {
1819 WHvMapGpaRangeFlagNone = 0x00000000,
1820 WHvMapGpaRangeFlagRead = 0x00000001,
1821 WHvMapGpaRangeFlagWrite = 0x00000002,
1822 WHvMapGpaRangeFlagExecute = 0x00000004,
1823 WHvMapGpaRangeFlagTrackDirtyPages = 0x00000008
1824} WHV_MAP_GPA_RANGE_FLAGS;
1825
1826DEFINE_ENUM_FLAG_OPERATORS(WHV_MAP_GPA_RANGE_FLAGS);
1827
1828typedef enum WHV_TRANSLATE_GVA_FLAGS {
1829 WHvTranslateGvaFlagNone = 0x00000000,
1830 WHvTranslateGvaFlagValidateRead = 0x00000001,
1831 WHvTranslateGvaFlagValidateWrite = 0x00000002,
1832 WHvTranslateGvaFlagValidateExecute = 0x00000004
1833#if defined(__x86_64__)
1834 ,WHvTranslateGvaFlagPrivilegeExempt = 0x00000008
1835#endif
1836 ,WHvTranslateGvaFlagSetPageTableBits = 0x00000010
1837#if defined(__x86_64__)
1838 ,WHvTranslateGvaFlagEnforceSmap = 0x00000100
1839 ,WHvTranslateGvaFlagOverrideSmap = 0x00000200
1840#endif
1841} WHV_TRANSLATE_GVA_FLAGS;
1842
1843DEFINE_ENUM_FLAG_OPERATORS(WHV_TRANSLATE_GVA_FLAGS);
1844
1845typedef union WHV_TRANSLATE_GVA_2_FLAGS {
1846 __C89_NAMELESS struct {
1847 UINT64 ValidateRead : 1;
1848 UINT64 ValidateWrite : 1;
1849 UINT64 ValidateExecute : 1;
1850#if defined(__x86_64__)
1851 UINT64 PrivilegeExempt : 1;
1852#else
1853 UINT64 Reserved0 : 1;
1854#endif
1855 UINT64 SetPageTableBits : 1;
1856 UINT64 Reserved1 : 3;
1857#if defined(__x86_64__)
1858 UINT64 EnforceSmap : 1;
1859 UINT64 OverrideSmap : 1;
1860#else
1861 UINT64 Reserved2 : 1;
1862 UINT64 Reserved3 : 1;
1863#endif
1864 UINT64 Reserved4 : 46;
1865 UINT64 InputVtl : 8;
1866 };
1867 UINT64 AsUINT64;
1868} WHV_TRANSLATE_GVA_2_FLAGS;
1869
1870C_ASSERT(sizeof(WHV_TRANSLATE_GVA_2_FLAGS) == 8);
1871
1872typedef enum WHV_TRANSLATE_GVA_RESULT_CODE {
1873 WHvTranslateGvaResultSuccess = 0,
1874 WHvTranslateGvaResultPageNotPresent = 1,
1875 WHvTranslateGvaResultPrivilegeViolation = 2,
1876 WHvTranslateGvaResultInvalidPageTableFlags = 3,
1877 WHvTranslateGvaResultGpaUnmapped = 4,
1878 WHvTranslateGvaResultGpaNoReadAccess = 5,
1879 WHvTranslateGvaResultGpaNoWriteAccess = 6,
1880 WHvTranslateGvaResultGpaIllegalOverlayAccess = 7,
1881 WHvTranslateGvaResultIntercept = 8
1882} WHV_TRANSLATE_GVA_RESULT_CODE;
1883
1884typedef struct WHV_TRANSLATE_GVA_RESULT {
1885 WHV_TRANSLATE_GVA_RESULT_CODE ResultCode;
1886 UINT32 Reserved;
1887} WHV_TRANSLATE_GVA_RESULT;
1888
1889C_ASSERT(sizeof(WHV_TRANSLATE_GVA_RESULT) == 8);
1890
1891#define WHV_READ_WRITE_GPA_RANGE_MAX_SIZE 16
1892
1893typedef struct WHV_MEMORY_RANGE_ENTRY {
1894 UINT64 GuestAddress;
1895 UINT64 SizeInBytes;
1896} WHV_MEMORY_RANGE_ENTRY;
1897
1898C_ASSERT(sizeof(WHV_MEMORY_RANGE_ENTRY) == 16);
1899
1900typedef union WHV_ADVISE_GPA_RANGE_POPULATE_FLAGS {
1901 UINT32 AsUINT32;
1902 __C89_NAMELESS struct {
1903 UINT32 Prefetch:1;
1904 UINT32 AvoidHardFaults:1;
1905 UINT32 Reserved:30;
1906 };
1907} WHV_ADVISE_GPA_RANGE_POPULATE_FLAGS;
1908
1909C_ASSERT(sizeof(WHV_ADVISE_GPA_RANGE_POPULATE_FLAGS) == 4);
1910
1911typedef enum WHV_MEMORY_ACCESS_TYPE {
1912 WHvMemoryAccessRead = 0,
1913 WHvMemoryAccessWrite = 1,
1914 WHvMemoryAccessExecute = 2
1915} WHV_MEMORY_ACCESS_TYPE;
1916
1917typedef struct WHV_ADVISE_GPA_RANGE_POPULATE {
1918 WHV_ADVISE_GPA_RANGE_POPULATE_FLAGS Flags;
1919 WHV_MEMORY_ACCESS_TYPE AccessType;
1920} WHV_ADVISE_GPA_RANGE_POPULATE;
1921
1922C_ASSERT(sizeof(WHV_ADVISE_GPA_RANGE_POPULATE) == 8);
1923
1924typedef union WHV_ADVISE_GPA_RANGE {
1925 WHV_ADVISE_GPA_RANGE_POPULATE Populate;
1926} WHV_ADVISE_GPA_RANGE;
1927
1928C_ASSERT(sizeof(WHV_ADVISE_GPA_RANGE) == 8);
1929
1930typedef enum WHV_CACHE_TYPE {
1931 WHvCacheTypeUncached = 0,
1932 WHvCacheTypeWriteCombining = 1,
1933 WHvCacheTypeWriteThrough = 4,
1934#ifdef __x86_64__
1935 WHvCacheTypeWriteProtected = 5,
1936#endif
1937 WHvCacheTypeWriteBack = 6
1938} WHV_CACHE_TYPE;
1939
1940typedef union WHV_ACCESS_GPA_CONTROLS {
1941 UINT64 AsUINT64;
1942 __C89_NAMELESS struct {
1943 WHV_CACHE_TYPE CacheType;
1944 WHV_INPUT_VTL InputVtl;
1945 UINT8 Reserved;
1946 UINT16 Reserved1;
1947 };
1948} WHV_ACCESS_GPA_CONTROLS;
1949
1950C_ASSERT(sizeof(WHV_ACCESS_GPA_CONTROLS) == 8);
1951
1952typedef struct WHV_CAPABILITY_PROCESSOR_FREQUENCY_CAP {
1953 UINT32 IsSupported:1;
1954 UINT32 Reserved:31;
1955 UINT32 HighestFrequencyMhz;
1956 UINT32 NominalFrequencyMhz;
1957 UINT32 LowestFrequencyMhz;
1958 UINT32 FrequencyStepMhz;
1959} WHV_CAPABILITY_PROCESSOR_FREQUENCY_CAP;
1960
1961C_ASSERT(sizeof(WHV_CAPABILITY_PROCESSOR_FREQUENCY_CAP) == 20);
1962
1963typedef union WHV_SCHEDULER_FEATURES {
1964 __C89_NAMELESS struct {
1965 UINT64 CpuReserve: 1;
1966 UINT64 CpuCap: 1;
1967 UINT64 CpuWeight: 1;
1968 UINT64 CpuGroupId: 1;
1969 UINT64 DisableSmt: 1;
1970 UINT64 Reserved: 59;
1971 };
1972 UINT64 AsUINT64;
1973} WHV_SCHEDULER_FEATURES;
1974
1975C_ASSERT(sizeof(WHV_SCHEDULER_FEATURES) == 8);
1976
1977typedef union WHV_CAPABILITY {
1978 WINBOOL HypervisorPresent;
1979 WHV_CAPABILITY_FEATURES Features;
1980 WHV_EXTENDED_VM_EXITS ExtendedVmExits;
1981 WHV_PROCESSOR_VENDOR ProcessorVendor;
1982 WHV_PROCESSOR_FEATURES ProcessorFeatures;
1983 WHV_SYNTHETIC_PROCESSOR_FEATURES_BANKS SyntheticProcessorFeaturesBanks;
1984 UINT8 ProcessorClFlushSize;
1985 UINT64 ProcessorClockFrequency;
1986 WHV_PROCESSOR_FEATURES_BANKS ProcessorFeaturesBanks;
1987 WHV_ADVISE_GPA_RANGE_POPULATE_FLAGS GpaRangePopulateFlags;
1988 WHV_CAPABILITY_PROCESSOR_FREQUENCY_CAP ProcessorFrequencyCap;
1989 WHV_SCHEDULER_FEATURES SchedulerFeatures;
1990 UINT32 PhysicalAddressWidth;
1991 UINT64 NestedFeatureRegister;
1992#if defined(__x86_64__)
1993 WHV_PROCESSOR_XSAVE_FEATURES ProcessorXsaveFeatures;
1994 UINT64 InterruptClockFrequency;
1995 WHV_PROCESSOR_PERFMON_FEATURES ProcessorPerfmonFeatures;
1996 WHV_X64_MSR_EXIT_BITMAP X64MsrExitBitmap;
1997 UINT64 ExceptionExitBitmap;
1998#elif defined (__aarch64__)
1999 UINT32 GicLpiIntIdBits;
2000 UINT32 MaxSveVectorLength;
2001#endif
2002} WHV_CAPABILITY;
2003
2004#if defined(__x86_64__)
2005
2006typedef struct WHV_X64_CPUID_RESULT {
2007 UINT32 Function;
2008 UINT32 Reserved[3];
2009 UINT32 Eax;
2010 UINT32 Ebx;
2011 UINT32 Ecx;
2012 UINT32 Edx;
2013} WHV_X64_CPUID_RESULT;
2014
2015C_ASSERT(sizeof(WHV_X64_CPUID_RESULT) == 32);
2016
2017typedef enum WHV_X64_CPUID_RESULT2_FLAGS {
2018 WHvX64CpuidResult2FlagSubleafSpecific = 0x00000001,
2019 WHvX64CpuidResult2FlagVpSpecific = 0x00000002
2020} WHV_X64_CPUID_RESULT2_FLAGS;
2021
2022DEFINE_ENUM_FLAG_OPERATORS(WHV_X64_CPUID_RESULT2_FLAGS);
2023
2024typedef struct WHV_CPUID_OUTPUT {
2025 UINT32 Eax;
2026 UINT32 Ebx;
2027 UINT32 Ecx;
2028 UINT32 Edx;
2029} WHV_CPUID_OUTPUT;
2030
2031C_ASSERT(sizeof(WHV_CPUID_OUTPUT) == 16);
2032
2033typedef struct WHV_X64_CPUID_RESULT2 {
2034 UINT32 Function;
2035 UINT32 Index;
2036 UINT32 VpIndex;
2037 WHV_X64_CPUID_RESULT2_FLAGS Flags;
2038 WHV_CPUID_OUTPUT Output;
2039 WHV_CPUID_OUTPUT Mask;
2040} WHV_X64_CPUID_RESULT2;
2041
2042C_ASSERT(sizeof(WHV_X64_CPUID_RESULT2) == 48);
2043
2044typedef struct WHV_MSR_ACTION_ENTRY {
2045 UINT32 Index;
2046 UINT8 ReadAction;
2047 UINT8 WriteAction;
2048 UINT16 Reserved;
2049} WHV_MSR_ACTION_ENTRY;
2050
2051C_ASSERT(sizeof(WHV_MSR_ACTION_ENTRY) == 8);
2052
2053typedef enum WHV_MSR_ACTION {
2054 WHvMsrActionArchitectureDefault = 0,
2055 WHvMsrActionIgnoreWriteReadZero = 1,
2056 WHvMsrActionExit = 2
2057} WHV_MSR_ACTION;
2058
2059typedef enum WHV_EXCEPTION_TYPE {
2060 WHvX64ExceptionTypeDivideErrorFault = 0x0,
2061 WHvX64ExceptionTypeDebugTrapOrFault = 0x1,
2062 WHvX64ExceptionTypeBreakpointTrap = 0x3,
2063 WHvX64ExceptionTypeOverflowTrap = 0x4,
2064 WHvX64ExceptionTypeBoundRangeFault = 0x5,
2065 WHvX64ExceptionTypeInvalidOpcodeFault = 0x6,
2066 WHvX64ExceptionTypeDeviceNotAvailableFault = 0x7,
2067 WHvX64ExceptionTypeDoubleFaultAbort = 0x8,
2068 WHvX64ExceptionTypeInvalidTaskStateSegmentFault = 0x0A,
2069 WHvX64ExceptionTypeSegmentNotPresentFault = 0x0B,
2070 WHvX64ExceptionTypeStackFault = 0x0C,
2071 WHvX64ExceptionTypeGeneralProtectionFault = 0x0D,
2072 WHvX64ExceptionTypePageFault = 0x0E,
2073 WHvX64ExceptionTypeFloatingPointErrorFault = 0x10,
2074 WHvX64ExceptionTypeAlignmentCheckFault = 0x11,
2075 WHvX64ExceptionTypeMachineCheckAbort = 0x12,
2076 WHvX64ExceptionTypeSimdFloatingPointFault = 0x13,
2077 WHvX64ExceptionTypeControlProtectionFault = 0x15
2078} WHV_EXCEPTION_TYPE;
2079
2080typedef enum WHV_X64_LOCAL_APIC_EMULATION_MODE {
2081 WHvX64LocalApicEmulationModeNone,
2082 WHvX64LocalApicEmulationModeXApic,
2083 WHvX64LocalApicEmulationModeX2Apic
2084} WHV_X64_LOCAL_APIC_EMULATION_MODE;
2085
2086#elif defined(__aarch64__)
2087
2088typedef enum WHV_ARM64_IC_EMULATION_MODE {
2089 WHvArm64IcEmulationModeNone = 0,
2090 WHvArm64IcEmulationModeGicV3
2091} WHV_ARM64_IC_EMULATION_MODE;
2092
2093typedef UINT32 WHV_ARM64_INTERRUPT_VECTOR;
2094
2095typedef struct WHV_ARM64_IC_GIC_V3_PARAMETERS {
2096 WHV_GUEST_PHYSICAL_ADDRESS GicdBaseAddress;
2097 WHV_GUEST_PHYSICAL_ADDRESS GitsTranslaterBaseAddress;
2098 UINT32 Reserved;
2099 UINT32 GicLpiIntIdBits;
2100 WHV_ARM64_INTERRUPT_VECTOR GicPpiOverflowInterruptFromCntv;
2101 WHV_ARM64_INTERRUPT_VECTOR GicPpiPerformanceMonitorsInterrupt;
2102 UINT32 Reserved1[6];
2103} WHV_ARM64_IC_GIC_V3_PARAMETERS;
2104
2105C_ASSERT(sizeof(WHV_ARM64_IC_GIC_V3_PARAMETERS) == 56);
2106
2107typedef struct WHV_ARM64_IC_PARAMETERS {
2108 WHV_ARM64_IC_EMULATION_MODE EmulationMode;
2109 UINT32 Reserved;
2110 __C89_NAMELESS union {
2111 WHV_ARM64_IC_GIC_V3_PARAMETERS GicV3Parameters;
2112 };
2113} WHV_ARM64_IC_PARAMETERS;
2114
2115C_ASSERT(sizeof(WHV_ARM64_IC_PARAMETERS) == 64);
2116
2117#endif /* defined(__x86_64__) || defined(__aarch64__) */
2118
2119typedef union WHV_PARTITION_PROPERTY {
2120 WHV_EXTENDED_VM_EXITS ExtendedVmExits;
2121 WHV_PROCESSOR_FEATURES ProcessorFeatures;
2122 WHV_SYNTHETIC_PROCESSOR_FEATURES_BANKS SyntheticProcessorFeaturesBanks;
2123 UINT8 ProcessorClFlushSize;
2124 UINT32 ProcessorCount;
2125 WINBOOL SeparateSecurityDomain;
2126 WINBOOL NestedVirtualization;
2127 UINT64 ProcessorClockFrequency;
2128 WHV_PROCESSOR_FEATURES_BANKS ProcessorFeaturesBanks;
2129 UINT64 ReferenceTime;
2130 USHORT PrimaryNumaNode;
2131 UINT32 CpuReserve;
2132 UINT32 CpuCap;
2133 UINT32 CpuWeight;
2134 UINT64 CpuGroupId;
2135 UINT32 ProcessorFrequencyCap;
2136 WINBOOL AllowDeviceAssignment;
2137 WINBOOL DisableSmt;
2138 UINT32 PhysicalAddressWidth;
2139#if defined(__x86_64__)
2140 WHV_PROCESSOR_XSAVE_FEATURES ProcessorXsaveFeatures;
2141 UINT32 CpuidExitList[1];
2142 UINT64 ExceptionExitBitmap;
2143 WINBOOL ApicRemoteRead;
2144 WHV_X64_MSR_EXIT_BITMAP X64MsrExitBitmap;
2145 WHV_PROCESSOR_PERFMON_FEATURES ProcessorPerfmonFeatures;
2146 UINT64 InterruptClockFrequency;
2147 WHV_X64_CPUID_RESULT CpuidResultList[1];
2148 WHV_X64_CPUID_RESULT2 CpuidResultList2[1];
2149 WHV_MSR_ACTION_ENTRY MsrActionList[1];
2150 WHV_MSR_ACTION UnimplementedMsrAction;
2151 WHV_X64_LOCAL_APIC_EMULATION_MODE LocalApicEmulationMode;
2152#elif defined(__aarch64__)
2153 WHV_ARM64_IC_PARAMETERS Arm64IcParameters;
2154#endif
2155} WHV_PARTITION_PROPERTY;
2156
2157#if defined(__x86_64__)
2158
2159typedef enum WHV_RUN_VP_EXIT_REASON {
2160 WHvRunVpExitReasonNone = 0x00000000,
2161 WHvRunVpExitReasonMemoryAccess = 0x00000001,
2162 WHvRunVpExitReasonX64IoPortAccess = 0x00000002,
2163 WHvRunVpExitReasonUnrecoverableException = 0x00000004,
2164 WHvRunVpExitReasonInvalidVpRegisterValue = 0x00000005,
2165 WHvRunVpExitReasonUnsupportedFeature = 0x00000006,
2166 WHvRunVpExitReasonX64InterruptWindow = 0x00000007,
2167 WHvRunVpExitReasonX64Halt = 0x00000008,
2168 WHvRunVpExitReasonX64ApicEoi = 0x00000009,
2169 WHvRunVpExitReasonSynicSintDeliverable = 0x0000000A,
2170 WHvRunVpExitReasonX64MsrAccess = 0x00001000,
2171 WHvRunVpExitReasonX64Cpuid = 0x00001001,
2172 WHvRunVpExitReasonException = 0x00001002,
2173 WHvRunVpExitReasonX64Rdtsc = 0x00001003,
2174 WHvRunVpExitReasonX64ApicSmiTrap = 0x00001004,
2175 WHvRunVpExitReasonHypercall = 0x00001005,
2176 WHvRunVpExitReasonX64ApicInitSipiTrap = 0x00001006,
2177 WHvRunVpExitReasonX64ApicWriteTrap = 0x00001007,
2178 WHvRunVpExitReasonCanceled = 0x00002001
2179} WHV_RUN_VP_EXIT_REASON;
2180
2181#elif defined(__aarch64__)
2182
2183typedef enum WHV_RUN_VP_EXIT_REASON {
2184 WHvRunVpExitReasonNone = 0x00000000,
2185 WHvRunVpExitReasonUnmappedGpa = 0x80000000,
2186 WHvRunVpExitReasonGpaIntercept = 0x80000001,
2187 WHvRunVpExitReasonUnrecoverableException = 0x80000021,
2188 WHvRunVpExitReasonInvalidVpRegisterValue = 0x80000020,
2189 WHvRunVpExitReasonUnsupportedFeature = 0x80000022,
2190 WHvRunVpExitReasonSynicSintDeliverable = 0x80000062,
2191 WHvMessageTypeRegisterIntercept = 0x80010006,
2192 WHvRunVpExitReasonArm64Reset = 0x8001000c,
2193 WHvRunVpExitReasonHypercall = 0x80000050,
2194 WHvRunVpExitReasonCanceled = 0xFFFFFFFF
2195} WHV_RUN_VP_EXIT_REASON;
2196
2197#endif /* defined(__x86_64__) || defined(__aarch64__) */
2198
2199#if defined(__x86_64__)
2200
2201typedef union WHV_X64_VP_EXECUTION_STATE {
2202 __C89_NAMELESS struct {
2203 UINT16 Cpl : 2;
2204 UINT16 Cr0Pe : 1;
2205 UINT16 Cr0Am : 1;
2206 UINT16 EferLma : 1;
2207 UINT16 DebugActive : 1;
2208 UINT16 InterruptionPending : 1;
2209 UINT16 Reserved0 : 5;
2210 UINT16 InterruptShadow : 1;
2211 UINT16 Reserved1 : 3;
2212 };
2213 UINT16 AsUINT16;
2214} WHV_X64_VP_EXECUTION_STATE;
2215
2216C_ASSERT(sizeof(WHV_X64_VP_EXECUTION_STATE) == sizeof(UINT16));
2217
2218typedef struct WHV_X64_VP_EXIT_CONTEXT {
2219 WHV_X64_VP_EXECUTION_STATE ExecutionState;
2220 UINT8 InstructionLength : 4;
2221 UINT8 Cr8 : 4;
2222 UINT8 Reserved;
2223 UINT32 Reserved2;
2224 WHV_X64_SEGMENT_REGISTER Cs;
2225 UINT64 Rip;
2226 UINT64 Rflags;
2227} WHV_X64_VP_EXIT_CONTEXT, WHV_VP_EXIT_CONTEXT;
2228
2229C_ASSERT(sizeof(WHV_X64_VP_EXIT_CONTEXT) == 40);
2230
2231typedef struct WHV_SYNIC_SINT_DELIVERABLE_CONTEXT {
2232 UINT16 DeliverableSints;
2233 UINT16 Reserved1;
2234 UINT32 Reserved2;
2235} WHV_SYNIC_SINT_DELIVERABLE_CONTEXT;
2236
2237C_ASSERT(sizeof(WHV_SYNIC_SINT_DELIVERABLE_CONTEXT) == 8);
2238
2239typedef union WHV_MEMORY_ACCESS_INFO {
2240 __C89_NAMELESS struct {
2241 UINT32 AccessType : 2;
2242 UINT32 GpaUnmapped : 1;
2243 UINT32 GvaValid : 1;
2244 UINT32 Reserved : 28;
2245 };
2246 UINT32 AsUINT32;
2247} WHV_MEMORY_ACCESS_INFO;
2248
2249C_ASSERT(sizeof(WHV_MEMORY_ACCESS_INFO) == 4);
2250
2251typedef struct WHV_MEMORY_ACCESS_CONTEXT {
2252 UINT8 InstructionByteCount;
2253 UINT8 Reserved[3];
2254 UINT8 InstructionBytes[16];
2255 WHV_MEMORY_ACCESS_INFO AccessInfo;
2256 WHV_GUEST_PHYSICAL_ADDRESS Gpa;
2257 WHV_GUEST_VIRTUAL_ADDRESS Gva;
2258} WHV_MEMORY_ACCESS_CONTEXT;
2259
2260C_ASSERT(sizeof(WHV_MEMORY_ACCESS_CONTEXT) == 40);
2261
2262typedef union WHV_X64_IO_PORT_ACCESS_INFO {
2263 __C89_NAMELESS struct {
2264 UINT32 IsWrite : 1;
2265 UINT32 AccessSize: 3;
2266 UINT32 StringOp : 1;
2267 UINT32 RepPrefix : 1;
2268 UINT32 Reserved : 26;
2269 };
2270 UINT32 AsUINT32;
2271} WHV_X64_IO_PORT_ACCESS_INFO;
2272
2273C_ASSERT(sizeof(WHV_X64_IO_PORT_ACCESS_INFO) == 4);
2274
2275typedef struct WHV_X64_IO_PORT_ACCESS_CONTEXT {
2276 UINT8 InstructionByteCount;
2277 UINT8 Reserved[3];
2278 UINT8 InstructionBytes[16];
2279 WHV_X64_IO_PORT_ACCESS_INFO AccessInfo;
2280 UINT16 PortNumber;
2281 UINT16 Reserved2[3];
2282 UINT64 Rax;
2283 UINT64 Rcx;
2284 UINT64 Rsi;
2285 UINT64 Rdi;
2286 WHV_X64_SEGMENT_REGISTER Ds;
2287 WHV_X64_SEGMENT_REGISTER Es;
2288} WHV_X64_IO_PORT_ACCESS_CONTEXT;
2289
2290C_ASSERT(sizeof(WHV_X64_IO_PORT_ACCESS_CONTEXT) == 96);
2291
2292typedef union WHV_X64_MSR_ACCESS_INFO {
2293 __C89_NAMELESS struct {
2294 UINT32 IsWrite : 1;
2295 UINT32 Reserved : 31;
2296 };
2297 UINT32 AsUINT32;
2298} WHV_X64_MSR_ACCESS_INFO;
2299
2300C_ASSERT(sizeof(WHV_X64_MSR_ACCESS_INFO) == sizeof(UINT32));
2301
2302typedef struct WHV_X64_MSR_ACCESS_CONTEXT {
2303 WHV_X64_MSR_ACCESS_INFO AccessInfo;
2304 UINT32 MsrNumber;
2305 UINT64 Rax;
2306 UINT64 Rdx;
2307} WHV_X64_MSR_ACCESS_CONTEXT;
2308
2309C_ASSERT(sizeof(WHV_X64_MSR_ACCESS_CONTEXT) == 24);
2310
2311typedef struct WHV_X64_CPUID_ACCESS_CONTEXT {
2312 UINT64 Rax;
2313 UINT64 Rcx;
2314 UINT64 Rdx;
2315 UINT64 Rbx;
2316 UINT64 DefaultResultRax;
2317 UINT64 DefaultResultRcx;
2318 UINT64 DefaultResultRdx;
2319 UINT64 DefaultResultRbx;
2320} WHV_X64_CPUID_ACCESS_CONTEXT;
2321
2322C_ASSERT(sizeof(WHV_X64_CPUID_ACCESS_CONTEXT) == 64);
2323
2324typedef union WHV_VP_EXCEPTION_INFO {
2325 __C89_NAMELESS struct {
2326 UINT32 ErrorCodeValid : 1;
2327 UINT32 SoftwareException : 1;
2328 UINT32 Reserved : 30;
2329 };
2330 UINT32 AsUINT32;
2331} WHV_VP_EXCEPTION_INFO;
2332
2333C_ASSERT(sizeof(WHV_VP_EXCEPTION_INFO) == 4);
2334
2335typedef struct WHV_VP_EXCEPTION_CONTEXT {
2336 UINT8 InstructionByteCount;
2337 UINT8 Reserved[3];
2338 UINT8 InstructionBytes[16];
2339 WHV_VP_EXCEPTION_INFO ExceptionInfo;
2340 UINT8 ExceptionType;
2341 UINT8 Reserved2[3];
2342 UINT32 ErrorCode;
2343 UINT64 ExceptionParameter;
2344} WHV_VP_EXCEPTION_CONTEXT;
2345
2346C_ASSERT(sizeof(WHV_VP_EXCEPTION_CONTEXT) == 40);
2347
2348typedef enum WHV_X64_UNSUPPORTED_FEATURE_CODE {
2349 WHvUnsupportedFeatureIntercept = 1,
2350 WHvUnsupportedFeatureTaskSwitchTss = 2
2351} WHV_X64_UNSUPPORTED_FEATURE_CODE;
2352
2353typedef struct WHV_X64_UNSUPPORTED_FEATURE_CONTEXT {
2354 WHV_X64_UNSUPPORTED_FEATURE_CODE FeatureCode;
2355 UINT32 Reserved;
2356 UINT64 FeatureParameter;
2357} WHV_X64_UNSUPPORTED_FEATURE_CONTEXT;
2358
2359C_ASSERT(sizeof(WHV_X64_UNSUPPORTED_FEATURE_CONTEXT) == 16);
2360
2361#elif defined(__aarch64__)
2362
2363typedef union WHV_VP_EXECUTION_STATE {
2364 UINT16 AsUINT16;
2365 __C89_NAMELESS struct {
2366 UINT16 Cpl : 2;
2367 UINT16 DebugActive : 1;
2368 UINT16 InterruptionPending : 1;
2369 UINT16 Vtl : 4;
2370 UINT16 VirtualizationFaultActive : 1;
2371 UINT16 Reserved : 7;
2372 };
2373} WHV_VP_EXECUTION_STATE;
2374
2375C_ASSERT(sizeof(WHV_VP_EXECUTION_STATE) == 2);
2376
2377typedef struct WHV_INTERCEPT_MESSAGE_HEADER {
2378 UINT32 VpIndex;
2379 UINT8 InstructionLength;
2380 UINT8 InterceptAccessType;
2381 WHV_VP_EXECUTION_STATE ExecutionState;
2382 UINT64 Pc;
2383 UINT64 Cpsr;
2384} WHV_INTERCEPT_MESSAGE_HEADER;
2385
2386C_ASSERT(sizeof(WHV_INTERCEPT_MESSAGE_HEADER) == 24);
2387
2388typedef union WHV_MEMORY_ACCESS_INFO {
2389 UINT8 AsUINT8;
2390 __C89_NAMELESS struct {
2391 UINT8 GvaValid : 1;
2392 UINT8 GvaGpaValid : 1;
2393 UINT8 HypercallOutputPending : 1;
2394 UINT8 Reserved : 5;
2395 };
2396} WHV_MEMORY_ACCESS_INFO;
2397
2398typedef struct WHV_MEMORY_ACCESS_CONTEXT {
2399 WHV_INTERCEPT_MESSAGE_HEADER Header;
2400 UINT32 Reserved0;
2401 UINT8 InstructionByteCount;
2402 WHV_MEMORY_ACCESS_INFO AccessInfo;
2403 UINT16 Reserved1;
2404 UINT8 InstructionBytes[4];
2405 UINT32 Reserved2;
2406 UINT64 Gva;
2407 UINT64 Gpa;
2408 UINT64 Syndrome;
2409} WHV_MEMORY_ACCESS_CONTEXT;
2410
2411C_ASSERT(sizeof(WHV_MEMORY_ACCESS_CONTEXT) == 64);
2412
2413typedef struct WHV_UNRECOVERABLE_EXCEPTION_CONTEXT {
2414 WHV_INTERCEPT_MESSAGE_HEADER Header;
2415} WHV_UNRECOVERABLE_EXCEPTION_CONTEXT;
2416
2417C_ASSERT(sizeof(WHV_UNRECOVERABLE_EXCEPTION_CONTEXT) == 24);
2418
2419typedef struct WHV_INVALID_VP_REGISTER_CONTEXT {
2420 UINT32 VpIndex;
2421 UINT32 Reserved;
2422} WHV_INVALID_VP_REGISTER_CONTEXT;
2423
2424C_ASSERT(sizeof(WHV_INVALID_VP_REGISTER_CONTEXT) == 8);
2425
2426typedef struct WHV_SYNIC_SINT_DELIVERABLE_CONTEXT {
2427 WHV_INTERCEPT_MESSAGE_HEADER Header;
2428 UINT16 DeliverableSints;
2429 UINT16 Reserved1;
2430 UINT32 Reserved2;
2431} WHV_SYNIC_SINT_DELIVERABLE_CONTEXT;
2432
2433C_ASSERT(sizeof(WHV_SYNIC_SINT_DELIVERABLE_CONTEXT) == 32);
2434
2435typedef union WHV_REGISTER_ACCESS_INFO {
2436 WHV_REGISTER_VALUE SourceValue;
2437 WHV_REGISTER_NAME DestinationRegister;
2438} WHV_REGISTER_ACCESS_INFO;
2439
2440typedef struct WHV_REGISTER_CONTEXT {
2441 WHV_INTERCEPT_MESSAGE_HEADER Header;
2442 __C89_NAMELESS struct {
2443 UINT8 IsMemoryOp:1;
2444 UINT8 Reserved:7;
2445 };
2446 UINT8 Reserved8;
2447 UINT16 Reserved16;
2448 WHV_REGISTER_NAME RegisterName;
2449 WHV_REGISTER_ACCESS_INFO AccessInfo;
2450} WHV_REGISTER_CONTEXT;
2451
2452C_ASSERT(sizeof(WHV_REGISTER_CONTEXT) == 48);
2453
2454typedef enum WHV_ARM64_RESET_TYPE {
2455 WHvArm64ResetTypePowerOff = 0,
2456 WHvArm64ResetTypeReboot
2457} WHV_ARM64_RESET_TYPE;
2458
2459typedef struct WHV_ARM64_RESET_CONTEXT {
2460 WHV_INTERCEPT_MESSAGE_HEADER Header;
2461 WHV_ARM64_RESET_TYPE ResetType;
2462 UINT32 Reserved;
2463} WHV_ARM64_RESET_CONTEXT;
2464
2465C_ASSERT(sizeof(WHV_ARM64_RESET_CONTEXT) == 32);
2466
2467#endif /* defined(__x86_64__) || defined(__aarch64__) */
2468
2469typedef enum WHV_RUN_VP_CANCEL_REASON {
2470 WHvRunVpCancelReasonUser = 0
2471} WHV_RUN_VP_CANCEL_REASON;
2472
2473#define WhvRunVpCancelReasonUser WHvRunVpCancelReasonUser
2474
2475typedef struct WHV_RUN_VP_CANCELED_CONTEXT {
2476 WHV_RUN_VP_CANCEL_REASON CancelReason;
2477} WHV_RUN_VP_CANCELED_CONTEXT;
2478
2479C_ASSERT(sizeof(WHV_RUN_VP_CANCELED_CONTEXT) == 4);
2480
2481#if defined(__x86_64__)
2482
2483typedef enum WHV_X64_PENDING_INTERRUPTION_TYPE {
2484 WHvX64PendingInterrupt = 0,
2485 WHvX64PendingNmi = 2,
2486 WHvX64PendingException = 3
2487} WHV_X64_PENDING_INTERRUPTION_TYPE, *PWHV_X64_PENDING_INTERRUPTION_TYPE;
2488
2489typedef struct WHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT {
2490 WHV_X64_PENDING_INTERRUPTION_TYPE DeliverableType;
2491} WHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT, *PWHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT;
2492
2493C_ASSERT(sizeof(WHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT) == 4);
2494
2495typedef struct WHV_X64_APIC_EOI_CONTEXT {
2496 UINT32 InterruptVector;
2497} WHV_X64_APIC_EOI_CONTEXT;
2498
2499C_ASSERT(sizeof(WHV_X64_APIC_EOI_CONTEXT) == 4);
2500
2501typedef union WHV_X64_RDTSC_INFO {
2502 __C89_NAMELESS struct {
2503 UINT64 IsRdtscp : 1;
2504 UINT64 Reserved : 63;
2505 };
2506 UINT64 AsUINT64;
2507} WHV_X64_RDTSC_INFO;
2508
2509C_ASSERT(sizeof(WHV_X64_RDTSC_INFO) == 8);
2510
2511typedef struct WHV_X64_RDTSC_CONTEXT {
2512 UINT64 TscAux;
2513 UINT64 VirtualOffset;
2514 UINT64 Tsc;
2515 UINT64 ReferenceTime;
2516 WHV_X64_RDTSC_INFO RdtscInfo;
2517} WHV_X64_RDTSC_CONTEXT;
2518
2519C_ASSERT(sizeof(WHV_X64_RDTSC_CONTEXT) == 40);
2520
2521typedef struct WHV_X64_APIC_SMI_CONTEXT {
2522 UINT64 ApicIcr;
2523} WHV_X64_APIC_SMI_CONTEXT;
2524
2525C_ASSERT(sizeof(WHV_X64_APIC_SMI_CONTEXT) == 8);
2526
2527#endif /* defined(__x86_64__) */
2528
2529#if defined(__x86_64__)
2530
2531#define WHV_HYPERCALL_CONTEXT_MAX_XMM_REGISTERS 6
2532
2533typedef struct WHV_X64_HYPERCALL_CONTEXT {
2534 UINT64 Rax;
2535 UINT64 Rbx;
2536 UINT64 Rcx;
2537 UINT64 Rdx;
2538 UINT64 R8;
2539 UINT64 Rsi;
2540 UINT64 Rdi;
2541 UINT64 Reserved0;
2542 WHV_UINT128 XmmRegisters[WHV_HYPERCALL_CONTEXT_MAX_XMM_REGISTERS];
2543 UINT64 Reserved1[2];
2544} WHV_X64_HYPERCALL_CONTEXT, WHV_HYPERCALL_CONTEXT, *PWHV_HYPERCALL_CONTEXT;
2545
2546C_ASSERT(sizeof(WHV_HYPERCALL_CONTEXT) == 176);
2547
2548#elif defined(__aarch64__)
2549
2550typedef struct WHV_ARM64_HYPERCALL_CONTEXT {
2551 WHV_INTERCEPT_MESSAGE_HEADER Header;
2552 UINT16 Immediate;
2553 UINT16 Reserved1;
2554 UINT32 Reserved2;
2555 UINT64 X[18];
2556} WHV_ARM64_HYPERCALL_CONTEXT, WHV_HYPERCALL_CONTEXT, *PWHV_HYPERCALL_CONTEXT;
2557
2558#endif /* defined(__x86_64__) || defined(__aarch64__) */
2559
2560#if defined(__x86_64__)
2561
2562typedef struct WHV_X64_APIC_INIT_SIPI_CONTEXT {
2563 UINT64 ApicIcr;
2564} WHV_X64_APIC_INIT_SIPI_CONTEXT;
2565
2566C_ASSERT(sizeof(WHV_X64_APIC_INIT_SIPI_CONTEXT) == 8);
2567
2568typedef enum WHV_X64_APIC_WRITE_TYPE {
2569 WHvX64ApicWriteTypeLdr = 0xD0,
2570 WHvX64ApicWriteTypeDfr = 0xE0,
2571 WHvX64ApicWriteTypeSvr = 0xF0,
2572 WHvX64ApicWriteTypeLint0 = 0x350,
2573 WHvX64ApicWriteTypeLint1 = 0x360
2574} WHV_X64_APIC_WRITE_TYPE;
2575
2576typedef struct WHV_X64_APIC_WRITE_CONTEXT {
2577 WHV_X64_APIC_WRITE_TYPE Type;
2578 UINT32 Reserved;
2579 UINT64 WriteValue;
2580} WHV_X64_APIC_WRITE_CONTEXT;
2581
2582C_ASSERT(sizeof(WHV_X64_APIC_WRITE_CONTEXT) == 16);
2583
2584#endif /* defined(__x86_64__) */
2585
2586typedef struct WHV_RUN_VP_EXIT_CONTEXT {
2587 WHV_RUN_VP_EXIT_REASON ExitReason;
2588 UINT32 Reserved;
2589#if defined(__x86_64__)
2590 WHV_VP_EXIT_CONTEXT VpContext;
2591#elif defined(__aarch64__)
2592 UINT64 Reserved1;
2593#endif
2594 __C89_NAMELESS union {
2595 WHV_MEMORY_ACCESS_CONTEXT MemoryAccess;
2596 WHV_RUN_VP_CANCELED_CONTEXT CancelReason;
2597 WHV_HYPERCALL_CONTEXT Hypercall;
2598 WHV_SYNIC_SINT_DELIVERABLE_CONTEXT SynicSintDeliverable;
2599#if defined(__x86_64__)
2600 WHV_X64_IO_PORT_ACCESS_CONTEXT IoPortAccess;
2601 WHV_X64_MSR_ACCESS_CONTEXT MsrAccess;
2602 WHV_X64_CPUID_ACCESS_CONTEXT CpuidAccess;
2603 WHV_VP_EXCEPTION_CONTEXT VpException;
2604 WHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT InterruptWindow;
2605 WHV_X64_UNSUPPORTED_FEATURE_CONTEXT UnsupportedFeature;
2606 WHV_X64_APIC_EOI_CONTEXT ApicEoi;
2607 WHV_X64_RDTSC_CONTEXT ReadTsc;
2608 WHV_X64_APIC_SMI_CONTEXT ApicSmi;
2609 WHV_X64_APIC_INIT_SIPI_CONTEXT ApicInitSipi;
2610 WHV_X64_APIC_WRITE_CONTEXT ApicWrite;
2611 UINT64 AsUINT64[22];
2612#elif defined(__aarch64__)
2613 WHV_UNRECOVERABLE_EXCEPTION_CONTEXT UnrecoverableException;
2614 WHV_INVALID_VP_REGISTER_CONTEXT InvalidVpRegister;
2615 WHV_REGISTER_CONTEXT Register;
2616 WHV_ARM64_RESET_CONTEXT Arm64Reset;
2617 UINT64 AsUINT64[32];
2618#endif
2619 };
2620} WHV_RUN_VP_EXIT_CONTEXT;
2621
2622#if defined(__x86_64__)
2623C_ASSERT(sizeof(WHV_RUN_VP_EXIT_CONTEXT) == 224);
2624#elif defined(__aarch64__)
2625C_ASSERT(sizeof(WHV_RUN_VP_EXIT_CONTEXT) == 272);
2626#endif
2627
2628#if defined(__x86_64__)
2629
2630typedef enum WHV_INTERRUPT_TYPE {
2631 WHvX64InterruptTypeFixed = 0,
2632 WHvX64InterruptTypeLowestPriority = 1,
2633 WHvX64InterruptTypeNmi = 4,
2634 WHvX64InterruptTypeInit = 5,
2635 WHvX64InterruptTypeSipi = 6,
2636 WHvX64InterruptTypeLocalInt1 = 9
2637} WHV_INTERRUPT_TYPE;
2638
2639typedef enum WHV_INTERRUPT_DESTINATION_MODE {
2640 WHvX64InterruptDestinationModePhysical,
2641 WHvX64InterruptDestinationModeLogical
2642} WHV_INTERRUPT_DESTINATION_MODE;
2643
2644typedef enum WHV_INTERRUPT_TRIGGER_MODE {
2645 WHvX64InterruptTriggerModeEdge,
2646 WHvX64InterruptTriggerModeLevel
2647} WHV_INTERRUPT_TRIGGER_MODE;
2648
2649typedef struct WHV_INTERRUPT_CONTROL {
2650 UINT64 Type : 8;
2651 UINT64 DestinationMode : 4;
2652 UINT64 TriggerMode : 4;
2653 UINT64 TargetVtl : 8;
2654 UINT64 Reserved : 40;
2655 UINT32 Destination;
2656 UINT32 Vector;
2657} WHV_INTERRUPT_CONTROL;
2658
2659C_ASSERT(sizeof(WHV_INTERRUPT_CONTROL) == 16);
2660
2661#elif defined(__aarch64__)
2662
2663typedef enum WHV_INTERRUPT_TYPE {
2664 WHvArm64InterruptTypeFixed = 0x0000,
2665 WHvArm64InterruptTypeMaximum = 0x0008
2666} WHV_INTERRUPT_TYPE;
2667
2668typedef union WHV_INTERRUPT_CONTROL2 {
2669 UINT64 AsUINT64;
2670 __C89_NAMELESS struct {
2671 WHV_INTERRUPT_TYPE InterruptType;
2672 UINT32 Reserved1 : 2;
2673 UINT32 Asserted : 1;
2674 UINT32 Retarget : 1;
2675 UINT32 Reserved2 : 28;
2676 };
2677} WHV_INTERRUPT_CONTROL2;
2678
2679C_ASSERT(sizeof(WHV_INTERRUPT_CONTROL2) == 8);
2680
2681typedef struct WHV_INTERRUPT_CONTROL {
2682 UINT64 TargetPartition;
2683 WHV_INTERRUPT_CONTROL2 InterruptControl;
2684 UINT64 DestinationAddress;
2685 UINT32 RequestedVector;
2686 UINT8 TargetVtl;
2687 UINT8 ReservedZ0;
2688 UINT16 ReservedZ1;
2689} WHV_INTERRUPT_CONTROL;
2690
2691C_ASSERT(sizeof(WHV_INTERRUPT_CONTROL) == 32);
2692
2693#endif /* defined(__x86_64__) || defined(__aarch64__) */
2694
2695typedef struct WHV_DOORBELL_MATCH_DATA {
2696 WHV_GUEST_PHYSICAL_ADDRESS GuestAddress;
2697 UINT64 Value;
2698 UINT32 Length;
2699 UINT32 MatchOnValue : 1;
2700 UINT32 MatchOnLength : 1;
2701 UINT32 Reserved : 30;
2702} WHV_DOORBELL_MATCH_DATA;
2703
2704C_ASSERT(sizeof(WHV_DOORBELL_MATCH_DATA) == 24);
2705
2706typedef enum WHV_PARTITION_COUNTER_SET {
2707 WHvPartitionCounterSetMemory
2708} WHV_PARTITION_COUNTER_SET;
2709
2710typedef struct WHV_PARTITION_MEMORY_COUNTERS {
2711 UINT64 Mapped4KPageCount;
2712 UINT64 Mapped2MPageCount;
2713 UINT64 Mapped1GPageCount;
2714} WHV_PARTITION_MEMORY_COUNTERS;
2715
2716C_ASSERT(sizeof(WHV_PARTITION_MEMORY_COUNTERS) == 24);
2717
2718typedef enum WHV_PROCESSOR_COUNTER_SET {
2719 WHvProcessorCounterSetRuntime = 0,
2720 WHvProcessorCounterSetIntercepts = 1,
2721 WHvProcessorCounterSetEvents = 2,
2722#if defined(__x86_64__)
2723 WHvProcessorCounterSetApic = 3,
2724#endif
2725 WHvProcessorCounterSetSyntheticFeatures = 4
2726} WHV_PROCESSOR_COUNTER_SET;
2727
2728typedef struct WHV_PROCESSOR_RUNTIME_COUNTERS {
2729 UINT64 TotalRuntime100ns;
2730 UINT64 HypervisorRuntime100ns;
2731} WHV_PROCESSOR_RUNTIME_COUNTERS;
2732
2733C_ASSERT(sizeof(WHV_PROCESSOR_RUNTIME_COUNTERS) == 16);
2734
2735typedef struct WHV_PROCESSOR_INTERCEPT_COUNTER {
2736 UINT64 Count;
2737 UINT64 Time100ns;
2738} WHV_PROCESSOR_INTERCEPT_COUNTER;
2739
2740C_ASSERT(sizeof(WHV_PROCESSOR_INTERCEPT_COUNTER) == 16);
2741
2742typedef struct WHV_PROCESSOR_INTERCEPT_COUNTERS {
2743#if defined(__x86_64__)
2744 WHV_PROCESSOR_INTERCEPT_COUNTER PageInvalidations;
2745 WHV_PROCESSOR_INTERCEPT_COUNTER ControlRegisterAccesses;
2746 WHV_PROCESSOR_INTERCEPT_COUNTER IoInstructions;
2747 WHV_PROCESSOR_INTERCEPT_COUNTER HaltInstructions;
2748 WHV_PROCESSOR_INTERCEPT_COUNTER CpuidInstructions;
2749 WHV_PROCESSOR_INTERCEPT_COUNTER MsrAccesses;
2750 WHV_PROCESSOR_INTERCEPT_COUNTER OtherIntercepts;
2751 WHV_PROCESSOR_INTERCEPT_COUNTER PendingInterrupts;
2752 WHV_PROCESSOR_INTERCEPT_COUNTER EmulatedInstructions;
2753 WHV_PROCESSOR_INTERCEPT_COUNTER DebugRegisterAccesses;
2754 WHV_PROCESSOR_INTERCEPT_COUNTER PageFaultIntercepts;
2755 WHV_PROCESSOR_INTERCEPT_COUNTER NestedPageFaultIntercepts;
2756 WHV_PROCESSOR_INTERCEPT_COUNTER Hypercalls;
2757 WHV_PROCESSOR_INTERCEPT_COUNTER RdpmcInstructions;
2758#elif defined(__aarch64__)
2759 WHV_PROCESSOR_INTERCEPT_COUNTER OtherIntercepts;
2760 WHV_PROCESSOR_INTERCEPT_COUNTER PendingInterrupts;
2761 WHV_PROCESSOR_INTERCEPT_COUNTER NestedPageFaultIntercepts;
2762 WHV_PROCESSOR_INTERCEPT_COUNTER Hypercalls;
2763 WHV_PROCESSOR_INTERCEPT_COUNTER Reserved[10];
2764#endif /* defined(__x86_64__) || defined(__aarch64__) */
2765} WHV_PROCESSOR_ACTIVITY_COUNTERS;
2766
2767C_ASSERT(sizeof(WHV_PROCESSOR_ACTIVITY_COUNTERS) == 224);
2768
2769typedef struct WHV_PROCESSOR_EVENT_COUNTERS {
2770 UINT64 PageFaultCount;
2771 UINT64 ExceptionCount;
2772 UINT64 InterruptCount;
2773} WHV_PROCESSOR_GUEST_EVENT_COUNTERS;
2774
2775C_ASSERT(sizeof(WHV_PROCESSOR_GUEST_EVENT_COUNTERS) == 24);
2776
2777#if defined(__x86_64__)
2778
2779typedef struct WHV_PROCESSOR_APIC_COUNTERS {
2780 UINT64 MmioAccessCount;
2781 UINT64 EoiAccessCount;
2782 UINT64 TprAccessCount;
2783 UINT64 SentIpiCount;
2784 UINT64 SelfIpiCount;
2785} WHV_PROCESSOR_APIC_COUNTERS;
2786
2787C_ASSERT(sizeof(WHV_PROCESSOR_APIC_COUNTERS) == 40);
2788
2789#endif /* defined(__x86_64__) */
2790
2791typedef struct WHV_PROCESSOR_SYNTHETIC_FEATURES_COUNTERS {
2792 UINT64 SyntheticInterruptsCount;
2793 UINT64 LongSpinWaitHypercallsCount;
2794 UINT64 OtherHypercallsCount;
2795 UINT64 SyntheticInterruptHypercallsCount;
2796 UINT64 VirtualInterruptHypercallsCount;
2797 UINT64 VirtualMmuHypercallsCount;
2798} WHV_PROCESSOR_SYNTHETIC_FEATURES_COUNTERS;
2799
2800C_ASSERT(sizeof(WHV_PROCESSOR_SYNTHETIC_FEATURES_COUNTERS) == 48);
2801
2802typedef union WHV_VTL_PERMISSION_SET {
2803 UINT32 AsUINT32;
2804 __C89_NAMELESS struct {
2805 UINT16 VtlPermissionFrom1[2];
2806 };
2807} WHV_VTL_PERMISSION_SET;
2808
2809typedef enum WHV_ADVISE_GPA_RANGE_CODE {
2810 WHvAdviseGpaRangeCodePopulate = 0x00000000,
2811 WHvAdviseGpaRangeCodePin = 0x00000001,
2812 WHvAdviseGpaRangeCodeUnpin = 0x00000002
2813} WHV_ADVISE_GPA_RANGE_CODE;
2814
2815#if defined(__x86_64__)
2816
2817typedef enum WHV_VIRTUAL_PROCESSOR_STATE_TYPE {
2818 WHvVirtualProcessorStateTypeSynicMessagePage = 0x00000000,
2819 WHvVirtualProcessorStateTypeSynicEventFlagPage = 0x00000001,
2820 WHvVirtualProcessorStateTypeSynicTimerState = 0x00000002,
2821 WHvVirtualProcessorStateTypeInterruptControllerState2 = 0x00001000,
2822 WHvVirtualProcessorStateTypeXsaveState = 0x00001001,
2823 WHvVirtualProcessorStateTypeNestedState = 0x00001002
2824} WHV_VIRTUAL_PROCESSOR_STATE_TYPE;
2825
2826#elif defined(__aarch64__)
2827
2828#define WHV_VIRTUAL_PROCESSOR_STATE_TYPE_PFN (1U << 31)
2829#define WHV_VIRTUAL_PROCESSOR_STATE_TYPE_ANY_VP (1U << 30)
2830
2831typedef enum WHV_VIRTUAL_PROCESSOR_STATE_TYPE {
2832 WHvVirtualProcessorStateTypeInterruptControllerState = 0x00000000 | WHV_VIRTUAL_PROCESSOR_STATE_TYPE_PFN,
2833 WHvVirtualProcessorStateTypeSynicMessagePage = 0x00000002 | WHV_VIRTUAL_PROCESSOR_STATE_TYPE_PFN,
2834 WHvVirtualProcessorStateTypeSynicEventFlagPage = 0x00000003 | WHV_VIRTUAL_PROCESSOR_STATE_TYPE_PFN,
2835 WHvVirtualProcessorStateTypeSynicTimerState = 0x00000004,
2836 WHvVirtualProcessorStateTypeGlobalInterruptState = 0x00000006 | WHV_VIRTUAL_PROCESSOR_STATE_TYPE_PFN | WHV_VIRTUAL_PROCESSOR_STATE_TYPE_ANY_VP,
2837 WHvVirtualProcessorStateTypeSveState = 0x00000007 | WHV_VIRTUAL_PROCESSOR_STATE_TYPE_PFN
2838} WHV_VIRTUAL_PROCESSOR_STATE_TYPE;
2839
2840#endif /* defined(__x86_64__) || defined(__aarch64__) */
2841
2842typedef enum WHV_NESTED_STATE_TYPE {
2843 WHvNestedStateTypeVmx,
2844 WHvNestedStateTypeSvm
2845} WHV_NESTED_STATE_TYPE;
2846
2847typedef struct WHV_NESTED_ENLIGHTENMENTS_CONTROL {
2848 __C89_NAMELESS union {
2849 UINT32 AsUINT32;
2850 __C89_NAMELESS struct {
2851 UINT32 DirectHypercall:1;
2852 UINT32 VirtualizationException:1;
2853 UINT32 Reserved:30;
2854 };
2855 } Features;
2856 __C89_NAMELESS union {
2857 UINT32 AsUINT32;
2858 __C89_NAMELESS struct {
2859 UINT32 InterPartitionCommunication:1;
2860 UINT32 Reserved:31;
2861 };
2862 } HypercallControls;
2863} WHV_NESTED_ENLIGHTENMENTS_CONTROL;
2864
2865typedef struct WHV_X64_VMX_NESTED_STATE {
2866 WHV_NESTED_STATE_TYPE Vendor;
2867 __C89_NAMELESS struct {
2868 UINT32 GuestMode : 1;
2869 UINT32 Vmxon : 1;
2870 UINT32 CurrentVmcsValid : 1;
2871 UINT32 VmEntryPending : 1;
2872 UINT32 VmcsEnlightened : 1;
2873 UINT32 EnlightenedVmEntry : 1;
2874 UINT32 Reserved : 26;
2875 } Flags;
2876 WHV_NESTED_ENLIGHTENMENTS_CONTROL NestedEnlightenmentsControl;
2877 UINT64 Pdpt[4];
2878 UINT64 VmxonRegionGpa;
2879 UINT64 VmcsGpa;
2880 UINT64 CurrentEnlightenedVmcs;
2881 __C89_NAMELESS struct {
2882 UINT32 Tpr;
2883 UINT32 Ppr;
2884 UINT32 Isr[8];
2885 UINT32 Irr[8];
2886 UINT32 IcrLow;
2887 UINT32 IcrHigh;
2888 } VirtualApicRegs;
2889 UINT8 Reserved[3944];
2890 DECLSPEC_ALIGN(4096) UINT8 VmcsBytes[4096];
2891} WHV_X64_VMX_NESTED_STATE;
2892
2893typedef struct WHV_SVM_VMCB_SELECTOR {
2894 UINT16 Selector;
2895 UINT16 Attrib;
2896 UINT32 Limit;
2897 UINT64 Base;
2898} WHV_SVM_VMCB_SELECTOR;
2899
2900typedef struct WHV_SVM_NESTED_HOST_STATE {
2901 UINT64 Rip;
2902 UINT64 Rsp;
2903 UINT64 Rflags;
2904 UINT64 Rax;
2905 WHV_SVM_VMCB_SELECTOR Es;
2906 WHV_SVM_VMCB_SELECTOR Cs;
2907 WHV_SVM_VMCB_SELECTOR Ss;
2908 WHV_SVM_VMCB_SELECTOR Ds;
2909 WHV_SVM_VMCB_SELECTOR Gdtr;
2910 WHV_SVM_VMCB_SELECTOR Idtr;
2911 UINT64 Efer;
2912 UINT64 Cr0;
2913 UINT64 Cr3;
2914 UINT64 Cr4;
2915 UINT64 VirtualTpr;
2916 UINT64 Reserved[6];
2917} WHV_SVM_NESTED_HOST_STATE;
2918
2919typedef struct WHV_X64_SVM_NESTED_STATE {
2920 WHV_NESTED_STATE_TYPE Vendor;
2921 __C89_NAMELESS struct {
2922 UINT32 GuestMode : 1;
2923 UINT32 VmEntryPending : 1;
2924 UINT32 HostSaveGpaValid : 1;
2925 UINT32 CurrentVmcbValid : 1;
2926 UINT32 Reserved : 28;
2927 } Flags;
2928 WHV_NESTED_ENLIGHTENMENTS_CONTROL NestedEnlightenmentsControl;
2929 UINT64 HostSaveGpa;
2930 UINT64 VmControlMsr;
2931 UINT64 VirtualTscRatioMsr;
2932 UINT64 VmcbGpa;
2933 WHV_SVM_NESTED_HOST_STATE HostState;
2934 UINT8 Reserved[3832];
2935 DECLSPEC_ALIGN(4096) UINT8 VmcbBytes[4096];
2936} WHV_X64_SVM_NESTED_STATE;
2937
2938typedef union WHV_X64_NESTED_STATE {
2939 WHV_X64_VMX_NESTED_STATE Vmx;
2940 WHV_X64_SVM_NESTED_STATE Svm;
2941} WHV_X64_NESTED_STATE;
2942
2943C_ASSERT(sizeof(WHV_X64_NESTED_STATE) == (2 * 4096));
2944
2945#if defined (__aarch64__)
2946
2947typedef struct WHV_ARM64_INTERRUPT_STATE {
2948 __C89_NAMELESS struct {
2949 UINT8 Enabled : 1;
2950 UINT8 EdgeTriggered : 1;
2951 UINT8 Asserted : 1;
2952 UINT8 SetPending : 1;
2953 UINT8 Active : 1;
2954 UINT8 Direct : 1;
2955 UINT8 Reserved0 : 2;
2956 };
2957 UINT8 GicrIpriorityrConfigured;
2958 UINT8 GicrIpriorityrActive;
2959 UINT8 Reserved1;
2960} WHV_ARM64_INTERRUPT_STATE;
2961
2962typedef struct WHV_ARM64_GLOBAL_INTERRUPT_STATE {
2963 UINT32 InterruptId;
2964 UINT32 ActiveVpIndex;
2965 __C89_NAMELESS union {
2966 UINT32 TargetMpidr;
2967 UINT32 TargetVpIndex;
2968 };
2969 WHV_ARM64_INTERRUPT_STATE InterruptState;
2970} WHV_ARM64_GLOBAL_INTERRUPT_STATE;
2971
2972#define WHV_ARM64_GLOBAL_INTERRUPT_CONTROLLER_STATE_VERSION_CURRENT (1)
2973
2974typedef struct WHV_ARM64_GLOBAL_INTERRUPT_CONTROLLER_STATE {
2975 UINT8 Version;
2976 UINT8 GicVersion;
2977 UINT8 Reserved0[2];
2978 UINT32 NumInterrupts;
2979 UINT64 GicdCtlrEnableGrp1A;
2980 WHV_ARM64_GLOBAL_INTERRUPT_STATE Interrupts[ANYSIZE_ARRAY];
2981} WHV_ARM64_GLOBAL_INTERRUPT_CONTROLLER_STATE;
2982
2983#define WHV_ARM64_INTERRUPT_CONTROLLER_STATE_VERSION_CURRENT (1)
2984
2985typedef struct WHV_ARM64_LOCAL_INTERRUPT_CONTROLLER_STATE {
2986 UINT8 Version;
2987 UINT8 GicVersion;
2988 UINT8 Reserved0[6];
2989 UINT64 IccIgrpen1El1;
2990 UINT64 GicrCtlrEnableLpis;
2991 UINT64 IccBpr1El1;
2992 UINT64 IccPmrEl1;
2993 UINT64 GicrPropbaser;
2994 UINT64 GicrPendbaser;
2995 UINT32 IchAp1REl2[4];
2996 WHV_ARM64_INTERRUPT_STATE BankedInterruptState[32];
2997} WHV_ARM64_LOCAL_INTERRUPT_CONTROLLER_STATE;
2998
2999typedef struct WHV_ARM64_VP_STATE_SVE {
3000 USHORT Version;
3001 USHORT RegisterDataOffset;
3002 UINT32 VectorLength;
3003 UINT64 Reserved0;
3004} WHV_ARM64_VP_STATE_SVE;
3005
3006#endif /* defined(__aarch64__) */
3007
3008typedef struct WHV_SYNIC_EVENT_PARAMETERS {
3009 UINT32 VpIndex;
3010 UINT8 TargetSint;
3011 WHV_VTL TargetVtl;
3012 UINT16 FlagNumber;
3013} WHV_SYNIC_EVENT_PARAMETERS;
3014
3015C_ASSERT(sizeof(WHV_SYNIC_EVENT_PARAMETERS) == 8);
3016
3017typedef enum WHV_ALLOCATE_VPCI_RESOURCE_FLAGS {
3018 WHvAllocateVpciResourceFlagNone = 0x00000000,
3019 WHvAllocateVpciResourceFlagAllowDirectP2P = 0x00000001
3020} WHV_ALLOCATE_VPCI_RESOURCE_FLAGS;
3021
3022DEFINE_ENUM_FLAG_OPERATORS(WHV_ALLOCATE_VPCI_RESOURCE_FLAGS);
3023
3024#define WHV_MAX_DEVICE_ID_SIZE_IN_CHARS 200
3025
3026typedef struct WHV_SRIOV_RESOURCE_DESCRIPTOR {
3027 WCHAR PnpInstanceId[WHV_MAX_DEVICE_ID_SIZE_IN_CHARS];
3028 LUID VirtualFunctionId;
3029 UINT16 VirtualFunctionIndex;
3030 UINT16 Reserved;
3031} WHV_SRIOV_RESOURCE_DESCRIPTOR;
3032
3033C_ASSERT(sizeof(WHV_SRIOV_RESOURCE_DESCRIPTOR) == 412);
3034
3035typedef enum WHV_VPCI_DEVICE_NOTIFICATION_TYPE {
3036 WHvVpciDeviceNotificationUndefined = 0,
3037 WHvVpciDeviceNotificationMmioRemapping = 1,
3038 WHvVpciDeviceNotificationSurpriseRemoval = 2
3039} WHV_VPCI_DEVICE_NOTIFICATION_TYPE;
3040
3041typedef struct WHV_VPCI_DEVICE_NOTIFICATION {
3042 WHV_VPCI_DEVICE_NOTIFICATION_TYPE NotificationType;
3043 UINT32 Reserved1;
3044 __C89_NAMELESS union {
3045 UINT64 Reserved2;
3046 };
3047} WHV_VPCI_DEVICE_NOTIFICATION;
3048
3049C_ASSERT(sizeof(WHV_VPCI_DEVICE_NOTIFICATION) == 16);
3050
3051typedef enum WHV_CREATE_VPCI_DEVICE_FLAGS {
3052 WHvCreateVpciDeviceFlagNone = 0x00000000,
3053 WHvCreateVpciDeviceFlagPhysicallyBacked = 0x00000001,
3054 WHvCreateVpciDeviceFlagUseLogicalInterrupts = 0x00000002
3055} WHV_CREATE_VPCI_DEVICE_FLAGS;
3056
3057DEFINE_ENUM_FLAG_OPERATORS(WHV_CREATE_VPCI_DEVICE_FLAGS);
3058
3059typedef enum WHV_VPCI_DEVICE_PROPERTY_CODE {
3060 WHvVpciDevicePropertyCodeUndefined = 0,
3061 WHvVpciDevicePropertyCodeHardwareIDs = 1,
3062 WHvVpciDevicePropertyCodeProbedBARs = 2
3063} WHV_VPCI_DEVICE_PROPERTY_CODE;
3064
3065typedef struct WHV_VPCI_HARDWARE_IDS {
3066 UINT16 VendorID;
3067 UINT16 DeviceID;
3068 UINT8 RevisionID;
3069 UINT8 ProgIf;
3070 UINT8 SubClass;
3071 UINT8 BaseClass;
3072 UINT16 SubVendorID;
3073 UINT16 SubSystemID;
3074} WHV_VPCI_HARDWARE_IDS;
3075
3076C_ASSERT(sizeof(WHV_VPCI_HARDWARE_IDS) == 12);
3077
3078#define WHV_VPCI_TYPE0_BAR_COUNT 6
3079
3080typedef struct WHV_VPCI_PROBED_BARS {
3081 UINT32 Value[WHV_VPCI_TYPE0_BAR_COUNT];
3082} WHV_VPCI_PROBED_BARS;
3083
3084C_ASSERT(sizeof(WHV_VPCI_PROBED_BARS) == 24);
3085
3086typedef enum WHV_VPCI_MMIO_RANGE_FLAGS {
3087 WHvVpciMmioRangeFlagReadAccess = 0x00000001,
3088 WHvVpciMmioRangeFlagWriteAccess = 0x00000002
3089} WHV_VPCI_MMIO_RANGE_FLAGS;
3090
3091DEFINE_ENUM_FLAG_OPERATORS(WHV_VPCI_MMIO_RANGE_FLAGS);
3092
3093typedef enum WHV_VPCI_DEVICE_REGISTER_SPACE {
3094 WHvVpciConfigSpace = -1,
3095 WHvVpciBar0 = 0,
3096 WHvVpciBar1 = 1,
3097 WHvVpciBar2 = 2,
3098 WHvVpciBar3 = 3,
3099 WHvVpciBar4 = 4,
3100 WHvVpciBar5 = 5
3101} WHV_VPCI_DEVICE_REGISTER_SPACE;
3102
3103typedef struct WHV_VPCI_MMIO_MAPPING {
3104 WHV_VPCI_DEVICE_REGISTER_SPACE Location;
3105 WHV_VPCI_MMIO_RANGE_FLAGS Flags;
3106 UINT64 SizeInBytes;
3107 UINT64 OffsetInBytes;
3108 PVOID VirtualAddress;
3109} WHV_VPCI_MMIO_MAPPING;
3110
3111C_ASSERT(sizeof(WHV_VPCI_MMIO_MAPPING) == 32);
3112
3113typedef struct WHV_VPCI_DEVICE_REGISTER {
3114 WHV_VPCI_DEVICE_REGISTER_SPACE Location;
3115 UINT32 SizeInBytes;
3116 UINT64 OffsetInBytes;
3117} WHV_VPCI_DEVICE_REGISTER;
3118
3119C_ASSERT(sizeof(WHV_VPCI_DEVICE_REGISTER) == 16);
3120
3121typedef enum WHV_VPCI_INTERRUPT_TARGET_FLAGS {
3122 WHvVpciInterruptTargetFlagNone = 0x00000000,
3123 WHvVpciInterruptTargetFlagMulticast = 0x00000001
3124} WHV_VPCI_INTERRUPT_TARGET_FLAGS;
3125
3126DEFINE_ENUM_FLAG_OPERATORS(WHV_VPCI_INTERRUPT_TARGET_FLAGS);
3127
3128typedef struct WHV_VPCI_INTERRUPT_TARGET {
3129 UINT32 Vector;
3130 WHV_VPCI_INTERRUPT_TARGET_FLAGS Flags;
3131 UINT32 ProcessorCount;
3132 UINT32 Processors[ANYSIZE_ARRAY];
3133} WHV_VPCI_INTERRUPT_TARGET;
3134
3135C_ASSERT(sizeof(WHV_VPCI_INTERRUPT_TARGET) == 16);
3136
3137typedef enum WHV_TRIGGER_TYPE {
3138#if defined(__x86_64__)
3139 WHvTriggerTypeInterrupt = 0,
3140#endif
3141 WHvTriggerTypeSynicEvent = 1,
3142 WHvTriggerTypeDeviceInterrupt = 2
3143} WHV_TRIGGER_TYPE;
3144
3145typedef struct WHV_TRIGGER_PARAMETERS {
3146 WHV_TRIGGER_TYPE TriggerType;
3147 UINT32 Reserved;
3148 __C89_NAMELESS union {
3149#if defined(__x86_64__)
3150 WHV_INTERRUPT_CONTROL Interrupt;
3151#endif
3152 WHV_SYNIC_EVENT_PARAMETERS SynicEvent;
3153 __C89_NAMELESS struct {
3154 UINT64 LogicalDeviceId;
3155 UINT64 MsiAddress;
3156 UINT32 MsiData;
3157 UINT32 Reserved;
3158 } DeviceInterrupt;
3159 };
3160} WHV_TRIGGER_PARAMETERS;
3161
3162C_ASSERT(sizeof(WHV_TRIGGER_PARAMETERS) == 32);
3163
3164typedef PVOID WHV_TRIGGER_HANDLE;
3165
3166typedef enum WHV_VIRTUAL_PROCESSOR_PROPERTY_CODE {
3167 WHvVirtualProcessorPropertyCodeNumaNode = 0x00000000
3168} WHV_VIRTUAL_PROCESSOR_PROPERTY_CODE;
3169
3170typedef struct WHV_VIRTUAL_PROCESSOR_PROPERTY {
3171 WHV_VIRTUAL_PROCESSOR_PROPERTY_CODE PropertyCode;
3172 UINT32 Reserved;
3173 __C89_NAMELESS union {
3174 USHORT NumaNode;
3175 UINT64 Padding;
3176 };
3177} WHV_VIRTUAL_PROCESSOR_PROPERTY;
3178
3179C_ASSERT(sizeof(WHV_VIRTUAL_PROCESSOR_PROPERTY) == 16);
3180
3181typedef enum WHV_NOTIFICATION_PORT_TYPE {
3182 WHvNotificationPortTypeEvent = 2,
3183 WHvNotificationPortTypeDoorbell = 4
3184} WHV_NOTIFICATION_PORT_TYPE;
3185
3186typedef struct WHV_NOTIFICATION_PORT_PARAMETERS {
3187 WHV_NOTIFICATION_PORT_TYPE NotificationPortType;
3188 UINT16 Reserved;
3189 UINT8 Reserved1;
3190 UINT8 ConnectionVtl;
3191 __C89_NAMELESS union {
3192 WHV_DOORBELL_MATCH_DATA Doorbell;
3193 __C89_NAMELESS struct {
3194 UINT32 ConnectionId;
3195 } Event;
3196 };
3197} WHV_NOTIFICATION_PORT_PARAMETERS;
3198
3199C_ASSERT(sizeof(WHV_NOTIFICATION_PORT_PARAMETERS) == 32);
3200
3201typedef enum WHV_NOTIFICATION_PORT_PROPERTY_CODE {
3202 WHvNotificationPortPropertyPreferredTargetVp = 1,
3203 WHvNotificationPortPropertyPreferredTargetDuration = 5
3204} WHV_NOTIFICATION_PORT_PROPERTY_CODE;
3205
3206typedef UINT64 WHV_NOTIFICATION_PORT_PROPERTY;
3207
3208#define WHV_ANY_VP (0xFFFFFFFF)
3209
3210#define WHV_NOTIFICATION_PORT_PREFERRED_DURATION_MAX (0xFFFFFFFFFFFFFFFFULL)
3211
3212typedef PVOID WHV_NOTIFICATION_PORT_HANDLE;
3213
3214#define WHV_SYNIC_MESSAGE_SIZE 256
3215
3216#endif /* defined(__x86_64__) || defined(__aarch64__) */
3217
3218#endif /* _WINHVAPIDEFS_H_ */