1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2/*
3 * arch/arm/include/asm/ptrace.h
4 *
5 * Copyright (C) 1996-2003 Russell King
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef __ASM_ARM_PTRACE_H
12#define __ASM_ARM_PTRACE_H
13
14#include <asm/hwcap.h>
15
16#define PTRACE_GETREGS 12
17#define PTRACE_SETREGS 13
18#define PTRACE_GETFPREGS 14
19#define PTRACE_SETFPREGS 15
20/* PTRACE_ATTACH is 16 */
21/* PTRACE_DETACH is 17 */
22#define PTRACE_GETWMMXREGS 18
23#define PTRACE_SETWMMXREGS 19
24/* 20 is unused */
25#define PTRACE_OLDSETOPTIONS 21
26#define PTRACE_GET_THREAD_AREA 22
27#define PTRACE_SET_SYSCALL 23
28/* PTRACE_SYSCALL is 24 */
29#define PTRACE_GETCRUNCHREGS 25 /* obsolete */
30#define PTRACE_SETCRUNCHREGS 26 /* obsolete */
31#define PTRACE_GETVFPREGS 27
32#define PTRACE_SETVFPREGS 28
33#define PTRACE_GETHBPREGS 29
34#define PTRACE_SETHBPREGS 30
35#define PTRACE_GETFDPIC 31
36
37#define PTRACE_GETFDPIC_EXEC 0
38#define PTRACE_GETFDPIC_INTERP 1
39
40/*
41 * PSR bits
42 * Note on V7M there is no mode contained in the PSR
43 */
44#define USR26_MODE 0x00000000
45#define FIQ26_MODE 0x00000001
46#define IRQ26_MODE 0x00000002
47#define SVC26_MODE 0x00000003
48#define USR_MODE 0x00000010
49#define SVC_MODE 0x00000013
50#define FIQ_MODE 0x00000011
51#define IRQ_MODE 0x00000012
52#define MON_MODE 0x00000016
53#define ABT_MODE 0x00000017
54#define HYP_MODE 0x0000001a
55#define UND_MODE 0x0000001b
56#define SYSTEM_MODE 0x0000001f
57#define MODE32_BIT 0x00000010
58#define MODE_MASK 0x0000001f
59
60#define V4_PSR_T_BIT 0x00000020 /* >= V4T, but not V7M */
61#define V7M_PSR_T_BIT 0x01000000
62/* for compatibility */
63#define PSR_T_BIT V4_PSR_T_BIT
64
65#define PSR_F_BIT 0x00000040 /* >= V4, but not V7M */
66#define PSR_I_BIT 0x00000080 /* >= V4, but not V7M */
67#define PSR_A_BIT 0x00000100 /* >= V6, but not V7M */
68#define PSR_E_BIT 0x00000200 /* >= V6, but not V7M */
69#define PSR_J_BIT 0x01000000 /* >= V5J, but not V7M */
70#define PSR_Q_BIT 0x08000000 /* >= V5E, including V7M */
71#define PSR_V_BIT 0x10000000
72#define PSR_C_BIT 0x20000000
73#define PSR_Z_BIT 0x40000000
74#define PSR_N_BIT 0x80000000
75
76/*
77 * Groups of PSR bits
78 */
79#define PSR_f 0xff000000 /* Flags */
80#define PSR_s 0x00ff0000 /* Status */
81#define PSR_x 0x0000ff00 /* Extension */
82#define PSR_c 0x000000ff /* Control */
83
84/*
85 * ARMv7 groups of PSR bits
86 */
87#define APSR_MASK 0xf80f0000 /* N, Z, C, V, Q and GE flags */
88#define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */
89#define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */
90#define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */
91
92/*
93 * These are 'magic' values for PTRACE_PEEKUSR that return info about where a
94 * process is located in memory.
95 */
96#define PT_TEXT_ADDR 0x10000
97#define PT_DATA_ADDR 0x10004
98#define PT_TEXT_END_ADDR 0x10008
99
100#ifndef __ASSEMBLY__
101
102/*
103 * This struct defines the way the registers are stored on the
104 * stack during a system call. Note that sizeof(struct pt_regs)
105 * has to be a multiple of 8.
106 */
107struct pt_regs {
108 long uregs[18];
109};
110
111#define ARM_cpsr uregs[16]
112#define ARM_pc uregs[15]
113#define ARM_lr uregs[14]
114#define ARM_sp uregs[13]
115#define ARM_ip uregs[12]
116#define ARM_fp uregs[11]
117#define ARM_r10 uregs[10]
118#define ARM_r9 uregs[9]
119#define ARM_r8 uregs[8]
120#define ARM_r7 uregs[7]
121#define ARM_r6 uregs[6]
122#define ARM_r5 uregs[5]
123#define ARM_r4 uregs[4]
124#define ARM_r3 uregs[3]
125#define ARM_r2 uregs[2]
126#define ARM_r1 uregs[1]
127#define ARM_r0 uregs[0]
128#define ARM_ORIG_r0 uregs[17]
129
130/*
131 * The size of the user-visible VFP state as seen by PTRACE_GET/SETVFPREGS
132 * and core dumps.
133 */
134#define ARM_VFPREGS_SIZE ( 32 * 8 /*fpregs*/ + 4 /*fpscr*/ )
135
136
137#endif /* __ASSEMBLY__ */
138
139#endif /* __ASM_ARM_PTRACE_H */