1/* $NetBSD: gpio.h,v 1.16 2018/05/19 13:59:06 thorpej Exp $ */
2/* $OpenBSD: gpio.h,v 1.7 2008/11/26 14:51:20 mbalmer Exp $ */
3/*
4 * Copyright (c) 2009, 2011 Marc Balmer <marc@msys.ch>
5 * Copyright (c) 2004 Alexander Yurchenko <grange@openbsd.org>
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20#ifndef _SYS_GPIO_H_
21#define _SYS_GPIO_H_
22
23#include <sys/ioccom.h>
24#include <sys/time.h>
25
26/* GPIO pin states */
27#define GPIO_PIN_LOW 0x00 /* low level (logical 0) */
28#define GPIO_PIN_HIGH 0x01 /* high level (logical 1) */
29
30/* Max name length of a pin */
31#define GPIOMAXNAME 64
32
33/* GPIO pin configuration flags */
34#define GPIO_PIN_INPUT 0x00000001 /* input direction */
35#define GPIO_PIN_OUTPUT 0x00000002 /* output direction */
36#define GPIO_PIN_INOUT 0x00000004 /* bi-directional */
37#define GPIO_PIN_OPENDRAIN 0x00000008 /* open-drain output */
38#define GPIO_PIN_PUSHPULL 0x00000010 /* push-pull output */
39#define GPIO_PIN_TRISTATE 0x00000020 /* output disabled */
40#define GPIO_PIN_PULLUP 0x00000040 /* internal pull-up enabled */
41#define GPIO_PIN_PULLDOWN 0x00000080 /* internal pull-down enabled */
42#define GPIO_PIN_INVIN 0x00000100 /* invert input */
43#define GPIO_PIN_INVOUT 0x00000200 /* invert output */
44#define GPIO_PIN_USER 0x00000400 /* user != 0 can access */
45#define GPIO_PIN_PULSATE 0x00000800 /* pulsate in hardware */
46#define GPIO_PIN_SET 0x00008000 /* set for securelevel access */
47#define GPIO_PIN_ALT0 0x00010000 /* alternate function 0 */
48#define GPIO_PIN_ALT1 0x00020000 /* alternate function 1 */
49#define GPIO_PIN_ALT2 0x00040000 /* alternate function 2 */
50#define GPIO_PIN_ALT3 0x00080000 /* alternate function 3 */
51#define GPIO_PIN_ALT4 0x00100000 /* alternate function 4 */
52#define GPIO_PIN_ALT5 0x00200000 /* alternate function 5 */
53#define GPIO_PIN_ALT6 0x00400000 /* alternate function 6 */
54#define GPIO_PIN_ALT7 0x00800000 /* alternate function 7 */
55
56#define GPIO_PIN_HWCAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \
57 GPIO_PIN_INOUT | GPIO_PIN_OPENDRAIN | \
58 GPIO_PIN_PUSHPULL | GPIO_PIN_TRISTATE | \
59 GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN | \
60 GPIO_PIN_PULSATE | GPIO_PIN_ALT0 | \
61 GPIO_PIN_ALT1 | GPIO_PIN_ALT2 | \
62 GPIO_PIN_ALT3 | GPIO_PIN_ALT4 | \
63 GPIO_PIN_ALT5 | GPIO_PIN_ALT6 | \
64 GPIO_PIN_ALT7)
65
66/* GPIO interrupt flags */
67#define GPIO_INTR_POS_EDGE 0x00000001 /* interrupt on rising edge */
68#define GPIO_INTR_NEG_EDGE 0x00000002 /* interrupt on falling edge */
69#define GPIO_INTR_DOUBLE_EDGE 0x00000004 /* interrupt on both edges */
70#define GPIO_INTR_HIGH_LEVEL 0x00000008 /* interrupt on high level */
71#define GPIO_INTR_LOW_LEVEL 0x00000010 /* interrupt on low level */
72#define GPIO_INTR_MPSAFE 0x80000000 /* MP-safe handling */
73
74#define GPIO_INTR_EDGE_MASK (GPIO_INTR_POS_EDGE | \
75 GPIO_INTR_NEG_EDGE | \
76 GPIO_INTR_DOUBLE_EDGE)
77#define GPIO_INTR_LEVEL_MASK (GPIO_INTR_HIGH_LEVEL | \
78 GPIO_INTR_LOW_LEVEL)
79#define GPIO_INTR_MODE_MASK (GPIO_INTR_EDGE_MASK | \
80 GPIO_INTR_LEVEL_MASK)
81
82/* GPIO controller description */
83struct gpio_info {
84 int gpio_npins; /* total number of pins available */
85};
86
87/* GPIO pin request (read/write/toggle) */
88struct gpio_req {
89 char gp_name[GPIOMAXNAME]; /* pin name */
90 int gp_pin; /* pin number */
91 int gp_value; /* value */
92};
93
94/* GPIO pin configuration */
95struct gpio_set {
96 char gp_name[GPIOMAXNAME];
97 int gp_pin;
98 int gp_caps;
99 int gp_flags;
100 char gp_name2[GPIOMAXNAME]; /* new name */
101};
102
103/* Attach device drivers that use GPIO pins */
104struct gpio_attach {
105 char ga_dvname[16]; /* device name */
106 int ga_offset; /* pin number */
107 uint32_t ga_mask; /* binary mask */
108 uint32_t ga_flags; /* driver dependent flags */
109};
110
111/* gpio(4) API */
112#define GPIOINFO _IOR('G', 0, struct gpio_info)
113#define GPIOSET _IOWR('G', 5, struct gpio_set)
114#define GPIOUNSET _IOWR('G', 6, struct gpio_set)
115#define GPIOREAD _IOWR('G', 7, struct gpio_req)
116#define GPIOWRITE _IOWR('G', 8, struct gpio_req)
117#define GPIOTOGGLE _IOWR('G', 9, struct gpio_req)
118#define GPIOATTACH _IOWR('G', 10, struct gpio_attach)
119
120#ifdef COMPAT_50
121/* Old structure to attach/detach devices */
122struct gpio_attach50 {
123 char ga_dvname[16]; /* device name */
124 int ga_offset; /* pin number */
125 uint32_t ga_mask; /* binary mask */
126};
127
128/* GPIO pin control (old API) */
129struct gpio_pin_ctl {
130 int gp_pin; /* pin number */
131 int gp_caps; /* pin capabilities (read-only) */
132 int gp_flags; /* pin configuration flags */
133};
134
135/* GPIO pin operation (read/write/toggle) (old API) */
136struct gpio_pin_op {
137 int gp_pin; /* pin number */
138 int gp_value; /* value */
139};
140
141/* the old API */
142#define GPIOPINREAD _IOWR('G', 1, struct gpio_pin_op)
143#define GPIOPINWRITE _IOWR('G', 2, struct gpio_pin_op)
144#define GPIOPINTOGGLE _IOWR('G', 3, struct gpio_pin_op)
145#define GPIOPINCTL _IOWR('G', 4, struct gpio_pin_ctl)
146#define GPIOATTACH50 _IOWR('G', 10, struct gpio_attach50)
147#define GPIODETACH50 _IOWR('G', 11, struct gpio_attach50)
148#define GPIODETACH _IOWR('G', 11, struct gpio_attach)
149#endif /* COMPAT_50 */
150
151#endif /* !_SYS_GPIO_H_ */