1/* $OpenBSD: trap.h,v 1.17 2022/01/28 16:20:09 visa Exp $ */
2
3/*
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1992, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department and Ralph Campbell.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * from: Utah Hdr: trap.h 1.1 90/07/09
37 * from: @(#)trap.h 8.1 (Berkeley) 6/10/93
38 */
39
40#ifndef _MIPS64_TRAP_H_
41#define _MIPS64_TRAP_H_
42
43/*
44 * Trap codes (ExcCode in the cause register); also known in trap.c for
45 * name strings.
46 */
47
48#define T_INT 0 /* Interrupt pending */
49#define T_TLB_MOD 1 /* TLB modified fault */
50#define T_TLB_LD_MISS 2 /* TLB miss on load or ifetch */
51#define T_TLB_ST_MISS 3 /* TLB miss on a store */
52#define T_ADDR_ERR_LD 4 /* Address error on a load or ifetch */
53#define T_ADDR_ERR_ST 5 /* Address error on a store */
54#define T_BUS_ERR_IFETCH 6 /* Bus error on an ifetch */
55#define T_BUS_ERR_LD_ST 7 /* Bus error on a load or store */
56#define T_SYSCALL 8 /* System call */
57#define T_BREAK 9 /* Breakpoint */
58#define T_RES_INST 10 /* Reserved instruction exception */
59#define T_COP_UNUSABLE 11 /* Coprocessor unusable */
60#define T_OVFLOW 12 /* Arithmetic overflow */
61#define T_TRAP 13 /* Trap instruction */
62#define T_VCEI 14 /* R4k Virtual coherency instruction */
63#define T_FPE 15 /* Floating point exception */
64#define T_IWATCH 16 /* R4k Inst. Watch address reference */
65#define T_C2E 18 /* R5k Coprocessor 2 exception */
66#define T_MDMX 22 /* R5k MDMX unusable */
67#define T_DWATCH 23 /* Data Watch address reference */
68#define T_MCHECK 24 /* Machine check */
69#define T_CACHEERR 30 /* Cache error */
70#define T_VCED 31 /* R4k Virtual coherency data */
71
72#define T_USER 0x20 /* user-mode flag or'ed with type */
73
74/*
75 * Defines for trap handler catching kernel accessing memory.
76 */
77#define KT_COPYERR 1 /* User space copy error */
78#define KT_KCOPYERR 2 /* Kernel space copy error */
79#define KT_DDBERR 3 /* DDB access error */
80
81#ifndef _LOCORE
82
83#if defined(DDB) || defined(DEBUG)
84
85struct trapdebug { /* trap history buffer for debugging */
86 register_t status;
87 register_t cause;
88 register_t vadr;
89 register_t pc;
90 register_t ra;
91 register_t sp;
92 u_int code;
93 u_int ipl;
94};
95
96#define trapdebug_enter(ci, frame, cd) \
97do { \
98 register_t sr = disableintr(); \
99 u_long cpuid = ci->ci_cpuid; \
100 struct trapdebug *t; \
101 \
102 t = trapdebug + TRAPSIZE * cpuid + trppos[cpuid]; \
103 t->status = frame->sr; \
104 t->cause = frame->cause; \
105 t->vadr = frame->badvaddr; \
106 t->pc = frame->pc; \
107 t->sp = frame->sp; \
108 t->ra = frame->ra; \
109 t->ipl = frame->ipl; \
110 t->code = cd; \
111 if (++trppos[cpuid] == TRAPSIZE) \
112 trppos[cpuid] = 0; \
113 setsr(sr); \
114} while (0)
115
116#define TRAPSIZE 10 /* Trap log buffer length */
117extern struct trapdebug trapdebug[MAXCPUS * TRAPSIZE];
118extern uint trppos[MAXCPUS];
119
120void trapDump(const char *, int (*)(const char *, ...));
121
122#else
123#define trapdebug_enter(ci, frame, code)
124#endif
125#endif /* _LOCORE */
126
127#endif /* !_MIPS64_TRAP_H_ */