| 1 | /*	$NetBSD: mmu_30.h,v 1.3 2025/07/08 11:45:25 thorpej Exp $	*/ |
| 2 | |
| 3 | /*- |
| 4 | * Copyright (c) 2023 The NetBSD Foundation, Inc. |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * This code is derived from software contributed to The NetBSD Foundation |
| 8 | * by Jason R. Thorpe. |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or without |
| 11 | * modification, are permitted provided that the following conditions |
| 12 | * are met: |
| 13 | * 1. Redistributions of source code must retain the above copyright |
| 14 | * notice, this list of conditions and the following disclaimer. |
| 15 | * 2. Redistributions in binary form must reproduce the above copyright |
| 16 | * notice, this list of conditions and the following disclaimer in the |
| 17 | * documentation and/or other materials provided with the distribution. |
| 18 | * |
| 19 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
| 20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
| 21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
| 23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 29 | * POSSIBILITY OF SUCH DAMAGE. |
| 30 | */ |
| 31 | |
| 32 | #ifndef _M68K_MMU_30_H_ |
| 33 | #define	_M68K_MMU_30_H_ |
| 34 | |
| 35 | #include <machine/fcode.h> |
| 36 | |
| 37 | /* |
| 38 | * The built-in MMU in the 68030 is a subset of the 68851. Section 9.6 |
| 39 | * of the 68030 User's Manual describes the differences: |
| 40 | * |
| 41 | * The following 68851 functions are not present on the 68030: |
| 42 | * - Access levels |
| 43 | * - Breakpoint registers |
| 44 | * - DMA Root Pointer |
| 45 | * - Task aliases |
| 46 | * - Lockable ATC entries |
| 47 | * - ATC entries defined as Shared Globally |
| 48 | * |
| 49 | * Furthermore, the 68030 has some functional differences: |
| 50 | * - Only 22 ATC entries |
| 51 | * - Reduced instruction set for MMU operations |
| 52 | * - Reduced addressing modes for MMU instructions. |
| 53 | * |
| 54 | * Instructions removed: PVALID, PFLUSHR, PFLUSHS, PBcc, PDBcc, PScc, |
| 55 | * PTRAPcc, PSAVE, PRESTORE. |
| 56 | * |
| 57 | * Registers removed: CAL, VAL, BAD, BACx, DRP, AC. |
| 58 | * |
| 59 | * The 68030 does, however, add a pair of Transparent Translation |
| 60 | * registers |
| 61 | */ |
| 62 | |
| 63 | /* |
| 64 | * 9.7.3 -- Transparent Translation registers |
| 65 | * |
| 66 | * These registers define blocks of logical address space that are |
| 67 | * transparently translated VA==PA. The minimum block size is 16MB, |
| 68 | * and the blocks may overlap. The mode in which the transparent |
| 69 | * translation is applied is specified by the Function Code base and |
| 70 | * mask fields. |
| 71 | * |
| 72 | * The Logical Address Base specifies the address of the block and |
| 73 | * the Logical Address Mask field specifies the address bits to *ignore*. |
| 74 | * |
| 75 | */ |
| 76 | #define	TT30_LAB	__BITS(31,24)	/* Logical Address Base */ |
| 77 | #define	TT30_LAM	__BITS(16,23)	/* Logical Address Mask */ |
| 78 | #define	TT30_E		__BIT(15)	/* Enable transparent translation */ |
| 79 | #define	TT30_CI		__BIT(10)	/* Cache Inhibit */ |
| 80 | #define	TT30_RW		__BIT(9)	/* Read(1) or Write(0) translated */ |
| 81 | #define	TT30_RWM	__BIT(8)	/* RW field used(0) or ignored(1) */ |
| 82 | #define	TT30_FCBASE	__BITS(4,6)	/* Function Code base */ |
| 83 | #define	TT30_FCMASK	__BITS(0,2)	/* Function Code bits to ignore */ |
| 84 | |
| 85 | /* Convenience definitions for address space selection. */ |
| 86 | #define	TT30_USERD	__SHIFTIN(FC_USERD,TT30_FCBASE) |
| 87 | #define	TT30_USERP	__SHIFTIN(FC_USERP,TT30_FCBASE) |
| 88 | #define	TT30_SUPERD	__SHIFTIN(FC_SUPERD,TT30_FCBASE) |
| 89 | #define	TT30_SUPERP	__SHIFTIN(FC_SUPERP,TT30_FCBASE) |
| 90 | |
| 91 | #ifdef _KERNEL |
| 92 | /* |
| 93 | * TT register value indices in the mmu_ttregs[] array. Note that asm |
| 94 | * code makes assumptions about these indices, to change them at your |
| 95 | * peril. |
| 96 | */ |
| 97 | extern uint32_t mmu_tt30[]; |
| 98 | #define	MMU_TTREG_TT0	0 |
| 99 | #define	MMU_TTREG_TT1	1 |
| 100 | #define	MMU_NTTREGS30	2 |
| 101 | |
| 102 | void	mmu_load_tt30(uint32_t *); |
| 103 | #endif /* _KERNEL */ |
| 104 | |
| 105 | #endif /* _M68K_MMU_30_H_ */ |