| 1 | /*	$NetBSD: cpu.h,v 1.27 2021/11/02 11:21:24 ryo Exp $	*/ |
| 2 | |
| 3 | /* |
| 4 | * Copyright 2002 Wasabi Systems, Inc. |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * Written by Eduardo Horvath for Wasabi Systems, Inc. |
| 8 | * |
| 9 | * Redistribution and use in source and binary forms, with or without |
| 10 | * modification, are permitted provided that the following conditions |
| 11 | * are met: |
| 12 | * 1. Redistributions of source code must retain the above copyright |
| 13 | * notice, this list of conditions and the following disclaimer. |
| 14 | * 2. Redistributions in binary form must reproduce the above copyright |
| 15 | * notice, this list of conditions and the following disclaimer in the |
| 16 | * documentation and/or other materials provided with the distribution. |
| 17 | * 3. All advertising materials mentioning features or use of this software |
| 18 | * must display the following acknowledgement: |
| 19 | * This product includes software developed for the NetBSD Project by |
| 20 | * Wasabi Systems, Inc. |
| 21 | * 4. The name of Wasabi Systems, Inc. may not be used to endorse |
| 22 | * or promote products derived from this software without specific prior |
| 23 | * written permission. |
| 24 | * |
| 25 | * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND |
| 26 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
| 27 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 28 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC |
| 29 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 30 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 31 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 32 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 33 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 34 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 35 | * POSSIBILITY OF SUCH DAMAGE. |
| 36 | */ |
| 37 | |
| 38 | #ifndef	_IBM4XX_CPU_H_ |
| 39 | #define	_IBM4XX_CPU_H_ |
| 40 | |
| 41 | #ifdef _KERNEL_OPT |
| 42 | #include "opt_param.h" |
| 43 | #endif |
| 44 | |
| 45 | #include <powerpc/psl.h> |
| 46 | #include <powerpc/spr.h> |
| 47 | #include <powerpc/ibm4xx/spr.h> |
| 48 | #include <powerpc/ibm4xx/dcr4xx.h> |
| 49 | |
| 50 | #if defined(_KERNEL) |
| 51 | struct exc_info { |
| 52 | 	vaddr_t exc_vector; |
| 53 | 	const uint32_t *exc_addr; |
| 54 | 	uintptr_t exc_size; |
| 55 | }; |
| 56 | |
| 57 | #include <sys/param.h> |
| 58 | #include <sys/device.h> |
| 59 | #include <prop/proplib.h> |
| 60 | |
| 61 | /* export from ibm4xx/autoconf.c */ |
| 62 | extern void (*md_device_register)(device_t dev, void *aux); |
| 63 | |
| 64 | /* export from ibm4xx/machdep.c */ |
| 65 | extern void (*md_consinit)(void); |
| 66 | extern void (*md_cpu_startup)(void); |
| 67 | |
| 68 | /* export from ibm4xx/ibm40x_machdep.c */ |
| 69 | extern void ibm40x_memsize_init(u_int, u_int); |
| 70 | |
| 71 | /* export from ibm4xx/ibm4xx_machdep.c */ |
| 72 | extern void ibm4xx_init(vaddr_t, vaddr_t, void (*)(void)); |
| 73 | extern void ibm4xx_cpu_startup(const char *); |
| 74 | extern void ibm4xx_dumpsys(void); |
| 75 | extern void ibm4xx_install_extint(void (*)(void)); |
| 76 | |
| 77 | /* export from ibm4xx/ibm4xx_autoconf.c */ |
| 78 | extern void ibm4xx_device_register(device_t, void *, int); |
| 79 | |
| 80 | /* export from ibm4xx/clock.c */ |
| 81 | extern void calc_delayconst(void); |
| 82 | |
| 83 | /* export from ibm4xx/4xx_locore.S */ |
| 84 | extern void ppc4xx_reset(void) __dead; |
| 85 | |
| 86 | extern void intr_init(void); |
| 87 | |
| 88 | /* |
| 89 | * DCR (Device Control Register) access. These have to be |
| 90 | * macros because register address is encoded as immediate |
| 91 | * operand. |
| 92 | */ |
| 93 | static __inline __always_inline void |
| 94 | mtdcr(const int reg, uint32_t val) |
| 95 | { |
| 96 | 	__asm volatile("mtdcr %0,%1" : : "K"(reg), "r"(val)); |
| 97 | } |
| 98 | |
| 99 | static __inline __always_inline uint32_t |
| 100 | mfdcr(const int reg) |
| 101 | { |
| 102 | 	uint32_t val;	 |
| 103 | 	 |
| 104 | 	__asm volatile("mfdcr %0,%1" : "=r"(val) : "K"(reg)); |
| 105 | 	return val; |
| 106 | } |
| 107 | |
| 108 | static __inline void |
| 109 | mtcpr(int reg, uint32_t val) |
| 110 | { |
| 111 | 	mtdcr(DCR_CPR0_CFGADDR, reg); |
| 112 | 	mtdcr(DCR_CPR0_CFGDATA, val); |
| 113 | } |
| 114 | |
| 115 | static __inline uint32_t |
| 116 | mfcpr(int reg) |
| 117 | { |
| 118 | 	mtdcr(DCR_CPR0_CFGADDR, reg); |
| 119 | 	return mfdcr(DCR_CPR0_CFGDATA); |
| 120 | } |
| 121 | |
| 122 | static void inline |
| 123 | mtsdr(int reg, uint32_t val) |
| 124 | { |
| 125 | 	mtdcr(DCR_SDR0_CFGADDR, reg); |
| 126 | 	mtdcr(DCR_SDR0_CFGDATA, val); |
| 127 | } |
| 128 | |
| 129 | static __inline uint32_t |
| 130 | mfsdr(int reg) |
| 131 | { |
| 132 | 	mtdcr(DCR_SDR0_CFGADDR, reg); |
| 133 | 	return mfdcr(DCR_SDR0_CFGDATA); |
| 134 | } |
| 135 | |
| 136 | #include <powerpc/pic/picvar.h> |
| 137 | |
| 138 | extern struct pic_ops pic_uic403; |
| 139 | extern struct pic_ops pic_uic0; |
| 140 | extern struct pic_ops pic_uic1; |
| 141 | extern struct pic_ops pic_uic2; |
| 142 | |
| 143 | extern paddr_t msgbuf_paddr; |
| 144 | extern vaddr_t msgbuf_vaddr; |
| 145 | extern char msgbuf[MSGBUFSIZE]; |
| 146 | #endif /* _KERNEL */ |
| 147 | |
| 148 | /* Board info dictionary */ |
| 149 | extern prop_dictionary_t board_properties; |
| 150 | extern void board_info_init(void); |
| 151 | |
| 152 | #endif	/* _IBM4XX_CPU_H_ */ |