1/*-
2 * SPDX-License-Identifier: BSD-4-Clause
3 *
4 * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed under OpenBSD by
17 * Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
22 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $NetBSD: pio.h,v 1.1 1998/05/15 10:15:54 tsubai Exp $
34 * $OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $
35 */
36
37#ifndef _MACHINE_PIO_H_
38#define _MACHINE_PIO_H_
39/*
40 * I/O macros.
41 */
42
43/*
44 * Use sync so that bus space operations cannot sneak out the bottom of
45 * mutex-protected sections (mutex release does not guarantee completion of
46 * accesses to caching-inhibited memory on some systems)
47 */
48#define powerpc_iomb() __asm __volatile("sync" : : : "memory")
49
50static __inline void
51__outb(volatile u_int8_t *a, u_int8_t v)
52{
53 *a = v;
54 powerpc_iomb();
55}
56
57static __inline void
58__outw(volatile u_int16_t *a, u_int16_t v)
59{
60 *a = v;
61 powerpc_iomb();
62}
63
64static __inline void
65__outl(volatile u_int32_t *a, u_int32_t v)
66{
67 *a = v;
68 powerpc_iomb();
69}
70
71static __inline void
72__outll(volatile u_int64_t *a, u_int64_t v)
73{
74 *a = v;
75 powerpc_iomb();
76}
77
78static __inline void
79__outwrb(volatile u_int16_t *a, u_int16_t v)
80{
81 __asm__ volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a));
82 powerpc_iomb();
83}
84
85static __inline void
86__outlrb(volatile u_int32_t *a, u_int32_t v)
87{
88 __asm__ volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a));
89 powerpc_iomb();
90}
91
92static __inline u_int8_t
93__inb(volatile u_int8_t *a)
94{
95 u_int8_t _v_;
96
97 _v_ = *a;
98 powerpc_iomb();
99 return _v_;
100}
101
102static __inline u_int16_t
103__inw(volatile u_int16_t *a)
104{
105 u_int16_t _v_;
106
107 _v_ = *a;
108 powerpc_iomb();
109 return _v_;
110}
111
112static __inline u_int32_t
113__inl(volatile u_int32_t *a)
114{
115 u_int32_t _v_;
116
117 _v_ = *a;
118 powerpc_iomb();
119 return _v_;
120}
121
122static __inline u_int64_t
123__inll(volatile u_int64_t *a)
124{
125 u_int64_t _v_;
126
127 _v_ = *a;
128 powerpc_iomb();
129 return _v_;
130}
131
132static __inline u_int16_t
133__inwrb(volatile u_int16_t *a)
134{
135 u_int16_t _v_;
136
137 __asm__ volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
138 powerpc_iomb();
139 return _v_;
140}
141
142static __inline u_int32_t
143__inlrb(volatile u_int32_t *a)
144{
145 u_int32_t _v_;
146
147 __asm__ volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
148 powerpc_iomb();
149 return _v_;
150}
151
152#define outb(a,v) (__outb((volatile u_int8_t *)(a), v))
153#define out8(a,v) outb(a,v)
154#define outw(a,v) (__outw((volatile u_int16_t *)(a), v))
155#define out16(a,v) outw(a,v)
156#define outl(a,v) (__outl((volatile u_int32_t *)(a), v))
157#define out32(a,v) outl(a,v)
158#define outll(a,v) (__outll((volatile u_int64_t *)(a), v))
159#define out64(a,v) outll(a,v)
160#define inb(a) (__inb((volatile u_int8_t *)(a)))
161#define in8(a) inb(a)
162#define inw(a) (__inw((volatile u_int16_t *)(a)))
163#define in16(a) inw(a)
164#define inl(a) (__inl((volatile u_int32_t *)(a)))
165#define in32(a) inl(a)
166#define inll(a) (__inll((volatile u_int64_t *)(a)))
167#define in64(a) inll(a)
168
169#define out8rb(a,v) outb(a,v)
170#define outwrb(a,v) (__outwrb((volatile u_int16_t *)(a), v))
171#define out16rb(a,v) outwrb(a,v)
172#define outlrb(a,v) (__outlrb((volatile u_int32_t *)(a), v))
173#define out32rb(a,v) outlrb(a,v)
174#define in8rb(a) inb(a)
175#define inwrb(a) (__inwrb((volatile u_int16_t *)(a)))
176#define in16rb(a) inwrb(a)
177#define inlrb(a) (__inlrb((volatile u_int32_t *)(a)))
178#define in32rb(a) inlrb(a)
179
180static __inline void
181__outsb(volatile u_int8_t *a, const u_int8_t *s, size_t c)
182{
183 while (c--)
184 *a = *s++;
185 powerpc_iomb();
186}
187
188static __inline void
189__outsw(volatile u_int16_t *a, const u_int16_t *s, size_t c)
190{
191 while (c--)
192 *a = *s++;
193 powerpc_iomb();
194}
195
196static __inline void
197__outsl(volatile u_int32_t *a, const u_int32_t *s, size_t c)
198{
199 while (c--)
200 *a = *s++;
201 powerpc_iomb();
202}
203
204static __inline void
205__outsll(volatile u_int64_t *a, const u_int64_t *s, size_t c)
206{
207 while (c--)
208 *a = *s++;
209 powerpc_iomb();
210}
211
212static __inline void
213__outswrb(volatile u_int16_t *a, const u_int16_t *s, size_t c)
214{
215 while (c--)
216 __asm__ volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a));
217 powerpc_iomb();
218}
219
220static __inline void
221__outslrb(volatile u_int32_t *a, const u_int32_t *s, size_t c)
222{
223 while (c--)
224 __asm__ volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a));
225 powerpc_iomb();
226}
227
228static __inline void
229__insb(volatile u_int8_t *a, u_int8_t *d, size_t c)
230{
231 while (c--)
232 *d++ = *a;
233 powerpc_iomb();
234}
235
236static __inline void
237__insw(volatile u_int16_t *a, u_int16_t *d, size_t c)
238{
239 while (c--)
240 *d++ = *a;
241 powerpc_iomb();
242}
243
244static __inline void
245__insl(volatile u_int32_t *a, u_int32_t *d, size_t c)
246{
247 while (c--)
248 *d++ = *a;
249 powerpc_iomb();
250}
251
252static __inline void
253__insll(volatile u_int64_t *a, u_int64_t *d, size_t c)
254{
255 while (c--)
256 *d++ = *a;
257 powerpc_iomb();
258}
259
260static __inline void
261__inswrb(volatile u_int16_t *a, u_int16_t *d, size_t c)
262{
263 while (c--)
264 __asm__ volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
265 powerpc_iomb();
266}
267
268static __inline void
269__inslrb(volatile u_int32_t *a, u_int32_t *d, size_t c)
270{
271 while (c--)
272 __asm__ volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
273 powerpc_iomb();
274}
275
276#define outsb(a,s,c) (__outsb((volatile u_int8_t *)(a), s, c))
277#define outs8(a,s,c) outsb(a,s,c)
278#define outsw(a,s,c) (__outsw((volatile u_int16_t *)(a), s, c))
279#define outs16(a,s,c) outsw(a,s,c)
280#define outsl(a,s,c) (__outsl((volatile u_int32_t *)(a), s, c))
281#define outs32(a,s,c) outsl(a,s,c)
282#define outsll(a,s,c) (__outsll((volatile u_int64_t *)(a), s, c))
283#define outs64(a,s,c) outsll(a,s,c)
284#define insb(a,d,c) (__insb((volatile u_int8_t *)(a), d, c))
285#define ins8(a,d,c) insb(a,d,c)
286#define insw(a,d,c) (__insw((volatile u_int16_t *)(a), d, c))
287#define ins16(a,d,c) insw(a,d,c)
288#define insl(a,d,c) (__insl((volatile u_int32_t *)(a), d, c))
289#define ins32(a,d,c) insl(a,d,c)
290#define insll(a,d,c) (__insll((volatile u_int64_t *)(a), d, c))
291#define ins64(a,d,c) insll(a,d,c)
292
293#define outs8rb(a,s,c) outsb(a,s,c)
294#define outswrb(a,s,c) (__outswrb((volatile u_int16_t *)(a), s, c))
295#define outs16rb(a,s,c) outswrb(a,s,c)
296#define outslrb(a,s,c) (__outslrb((volatile u_int32_t *)(a), s, c))
297#define outs32rb(a,s,c) outslrb(a,s,c)
298#define ins8rb(a,d,c) insb(a,d,c)
299#define inswrb(a,d,c) (__inswrb((volatile u_int16_t *)(a), d, c))
300#define ins16rb(a,d,c) inswrb(a,d,c)
301#define inslrb(a,d,c) (__inslrb((volatile u_int32_t *)(a), d, c))
302#define ins32rb(a,d,c) inslrb(a,d,c)
303
304#endif /*_MACHINE_PIO_H_*/