| 1 | /* $OpenBSD: psl.h,v 1.3 2021/01/09 13:14:02 kettenis Exp $ */ |
| 2 | |
| 3 | /*- |
| 4 | * SPDX-License-Identifier: BSD-4-Clause |
| 5 | * |
| 6 | * Copyright (C) 1995, 1996 Wolfgang Solfrank. |
| 7 | * Copyright (C) 1995, 1996 TooLs GmbH. |
| 8 | * All rights reserved. |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or without |
| 11 | * modification, are permitted provided that the following conditions |
| 12 | * are met: |
| 13 | * 1. Redistributions of source code must retain the above copyright |
| 14 | * notice, this list of conditions and the following disclaimer. |
| 15 | * 2. Redistributions in binary form must reproduce the above copyright |
| 16 | * notice, this list of conditions and the following disclaimer in the |
| 17 | * documentation and/or other materials provided with the distribution. |
| 18 | * 3. All advertising materials mentioning features or use of this software |
| 19 | * must display the following acknowledgement: |
| 20 | * This product includes software developed by TooLs GmbH. |
| 21 | * 4. The name of TooLs GmbH may not be used to endorse or promote products |
| 22 | * derived from this software without specific prior written permission. |
| 23 | * |
| 24 | * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR |
| 25 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 26 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 27 | * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 28 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
| 29 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; |
| 30 | * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 31 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR |
| 32 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF |
| 33 | * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 34 | * |
| 35 | * $NetBSD: psl.h,v 1.5 2000/11/19 19:52:37 matt Exp $ |
| 36 | */ |
| 37 | |
| 38 | #ifndef _MACHINE_PSL_H_ |
| 39 | #define _MACHINE_PSL_H_ |
| 40 | |
| 41 | /* |
| 42 | * Machine State Register (MSR) - All cores |
| 43 | */ |
| 44 | #define PSL_VEC 0x02000000UL /* AltiVec/SPE vector unit available */ |
| 45 | #define PSL_VSX 0x00800000UL /* Vector-Scalar unit available */ |
| 46 | #define PSL_EE 0x00008000UL /* external interrupt enable */ |
| 47 | #define PSL_PR 0x00004000UL /* privilege mode (1 == user) */ |
| 48 | #define PSL_FP 0x00002000UL /* floating point enable */ |
| 49 | #define PSL_ME 0x00001000UL /* machine check enable */ |
| 50 | #define PSL_FE0 0x00000800UL /* floating point interrupt mode 0 */ |
| 51 | #define PSL_FE1 0x00000100UL /* floating point interrupt mode 1 */ |
| 52 | #define PSL_PMM 0x00000004UL /* performance monitor mark */ |
| 53 | #define PSL_RI 0x00000002UL /* recoverable interrupt */ |
| 54 | |
| 55 | #define PSL_GS 0x10000000UL /* Guest state */ |
| 56 | #define PSL_UCLE 0x04000000UL /* User mode cache lock enable */ |
| 57 | #define PSL_WE 0x00040000UL /* Wait state enable */ |
| 58 | #define PSL_CE 0x00020000UL /* Critical interrupt enable */ |
| 59 | #define PSL_UBLE 0x00000400UL /* BTB lock enable - e500 only */ |
| 60 | #define PSL_DWE 0x00000400UL /* Debug Wait Enable - 440 only*/ |
| 61 | #define PSL_DE 0x00000200UL /* Debug interrupt enable */ |
| 62 | #define PSL_IS 0x00000020UL /* Instruction address space */ |
| 63 | #define PSL_DS 0x00000010UL /* Data address space */ |
| 64 | |
| 65 | #define PSL_SF 0x8000000000000000UL /* 64-bit addressing */ |
| 66 | #define PSL_HV 0x1000000000000000UL /* hyper-privileged mode */ |
| 67 | |
| 68 | #define PSL_POW 0x00040000UL /* power management */ |
| 69 | #define PSL_ILE 0x00010000UL /* interrupt endian mode (1 == le) */ |
| 70 | #define PSL_SE 0x00000400UL /* single-step trace enable */ |
| 71 | #define PSL_BE 0x00000200UL /* branch trace enable */ |
| 72 | #define PSL_IP 0x00000040UL /* interrupt prefix - 601 only */ |
| 73 | #define PSL_IR 0x00000020UL /* instruction address relocation */ |
| 74 | #define PSL_DR 0x00000010UL /* data address relocation */ |
| 75 | #define PSL_LE 0x00000001UL /* endian mode (1 == le) */ |
| 76 | |
| 77 | /* |
| 78 | * Floating-point exception modes: |
| 79 | */ |
| 80 | #define PSL_FE_DIS 0 /* none */ |
| 81 | #define PSL_FE_NONREC PSL_FE1 /* imprecise non-recoverable */ |
| 82 | #define PSL_FE_REC PSL_FE0 /* imprecise recoverable */ |
| 83 | #define PSL_FE_PREC (PSL_FE0 | PSL_FE1) /* precise */ |
| 84 | #define PSL_FE_DFLT PSL_FE_DIS /* default == none */ |
| 85 | |
| 86 | #define PSL_FPU (PSL_FP | PSL_FE_PREC) |
| 87 | |
| 88 | #endif /* _MACHINE_PSL_H_ */ |