| 1 | /*	$OpenBSD: param.h,v 1.42 2023/12/14 13:26:49 claudio Exp $	*/ |
| 2 | |
| 3 | /* |
| 4 | * Copyright (c) 1992, 1993 |
| 5 | *	The Regents of the University of California. All rights reserved. |
| 6 | * |
| 7 | * This software was developed by the Computer Systems Engineering group |
| 8 | * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and |
| 9 | * contributed to Berkeley. |
| 10 | * |
| 11 | * All advertising materials mentioning features or use of this software |
| 12 | * must display the following acknowledgement: |
| 13 | *	This product includes software developed by the University of |
| 14 | *	California, Lawrence Berkeley Laboratory. |
| 15 | * |
| 16 | * Redistribution and use in source and binary forms, with or without |
| 17 | * modification, are permitted provided that the following conditions |
| 18 | * are met: |
| 19 | * 1. Redistributions of source code must retain the above copyright |
| 20 | * notice, this list of conditions and the following disclaimer. |
| 21 | * 2. Redistributions in binary form must reproduce the above copyright |
| 22 | * notice, this list of conditions and the following disclaimer in the |
| 23 | * documentation and/or other materials provided with the distribution. |
| 24 | * 3. Neither the name of the University nor the names of its contributors |
| 25 | * may be used to endorse or promote products derived from this software |
| 26 | * without specific prior written permission. |
| 27 | * |
| 28 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND |
| 29 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 30 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 31 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE |
| 32 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 37 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 38 | * SUCH DAMAGE. |
| 39 | */ |
| 40 | |
| 41 | /* |
| 42 | * Copyright (c) 1996-1999 Eduardo Horvath |
| 43 | * |
| 44 | * Redistribution and use in source and binary forms, with or without |
| 45 | * modification, are permitted provided that the following conditions |
| 46 | * are met: |
| 47 | * 1. Redistributions of source code must retain the above copyright |
| 48 | * notice, this list of conditions and the following disclaimer. |
| 49 | * |
| 50 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND |
| 51 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 52 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 53 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE |
| 54 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 55 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 56 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 57 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 58 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 59 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 60 | * SUCH DAMAGE. |
| 61 | * |
| 62 | */ |
| 63 | |
| 64 | #ifndef	_MACHINE_PARAM_H_ |
| 65 | #define	_MACHINE_PARAM_H_ |
| 66 | |
| 67 | #define	_MACHINE	sparc64 |
| 68 | #define	MACHINE		"sparc64" |
| 69 | #define	_MACHINE_ARCH	sparc64 |
| 70 | #define	MACHINE_ARCH	"sparc64" |
| 71 | #define	MID_MACHINE	MID_SPARC64 |
| 72 | |
| 73 | #define	PAGE_SHIFT	13 |
| 74 | #define	PAGE_SIZE	(1 << PAGE_SHIFT) |
| 75 | #define	PAGE_MASK	(PAGE_SIZE - 1) |
| 76 | |
| 77 | /* |
| 78 | * Here are all the magic kernel virtual addresses and how they're allocated. |
| 79 | * |
| 80 | * First, the PROM is usually a fixed-sized block from 0x00000000f0000000 to |
| 81 | * 0x00000000f0100000. It also uses some space around 0x00000000fff00000 to |
| 82 | * map in device registers. The rest is pretty much ours to play with. |
| 83 | * |
| 84 | * The kernel starts at KERNBASE. Here's the layout. We use macros to set |
| 85 | * the addresses so we can relocate everything easily. We use 4MB locked TTEs |
| 86 | * to map in the kernel text and data segments. Any extra pages are recycled, |
| 87 | * so they can potentially be double-mapped. This shouldn't really be a |
| 88 | * problem since they're unused, but wild pointers can cause silent data |
| 89 | * corruption if they are in those segments. |
| 90 | * |
| 91 | * 0x0000000000000000:	64K NFO page zero |
| 92 | * 0x0000000000010000:	Userland or PROM |
| 93 | * KERNBASE:		4MB kernel text and read only data |
| 94 | *				This is mapped in the ITLB and |
| 95 | *				Read-Only in the DTLB |
| 96 | * KERNBASE+0x400000:	4MB kernel data and BSS -- not in ITLB |
| 97 | *				Contains context table, kernel pmap, |
| 98 | *				and other important structures. |
| 99 | * KERNBASE+0x800000:	Unmapped page -- redzone |
| 100 | * KERNBASE+0x802000:	Process 0 stack and u-area |
| 101 | * KERNBASE+0x806000:	2 pages for pmap_copy_page and /dev/mem |
| 102 | * KERNBASE+0x80a000:	Start of kernel VA segment |
| 103 | * KERNEND:		End of kernel VA segment |
| 104 | * KERNEND+0x02000:	Auxreg_va (unused?) |
| 105 | * KERNEND+0x04000:	TMPMAP_VA (unused?) |
| 106 | * KERNEND+0x06000:	message buffer. |
| 107 | * KERNEND+0x010000:	64K locked TTE -- different for each CPU |
| 108 | *			Contains interrupt stack, cpu_info structure, |
| 109 | *			and 32KB kernel TSB. |
| 110 | * |
| 111 | */ |
| 112 | #define	KERNBASE	0x001000000	/* start of kernel virtual space */ |
| 113 | |
| 114 | #ifdef _KERNEL |
| 115 | |
| 116 | #define	KERNEND		0x0e0000000	/* end of kernel virtual space */ |
| 117 | |
| 118 | #define	_MAXNBPG	8192	/* fixed VAs, independent of actual NBPG */ |
| 119 | |
| 120 | #define	AUXREG_VA	( KERNEND + _MAXNBPG) /* 1 page REDZONE */ |
| 121 | #define	TMPMAP_VA	( AUXREG_VA + _MAXNBPG) |
| 122 | #define	MSGBUF_VA	( TMPMAP_VA + _MAXNBPG) |
| 123 | /* |
| 124 | * Here's the location of the interrupt stack and CPU structure. |
| 125 | */ |
| 126 | #define	INTSTACK	( KERNEND + 8*_MAXNBPG)/* 64K after kernel end */ |
| 127 | #define	EINTSTACK	( INTSTACK + 2*USPACE)	/* 32KB */ |
| 128 | #define	CPUINFO_VA	( EINTSTACK) |
| 129 | |
| 130 | #define	NBPG		PAGE_SIZE		/* bytes/page */ |
| 131 | #define	PGSHIFT		PAGE_SHIFT		/* LOG2(PAGE_SIZE) */ |
| 132 | #define	PGOFSET		PAGE_MASK		/* byte offset into page */ |
| 133 | |
| 134 | #define	UPAGES		2			/* pages of u-area */ |
| 135 | #define	USPACE		(UPAGES * PAGE_SIZE)	/* total size of u-area */ |
| 136 | #define	USPACE_ALIGN	0			/* u-area alignment 0-none */ |
| 137 | |
| 138 | #define	NMBCLUSTERS	(64 * 1024)		/* max cluster allocation */ |
| 139 | |
| 140 | #ifndef	MSGBUFSIZE |
| 141 | #define	MSGBUFSIZE	(1 * PAGE_SIZE) |
| 142 | #endif |
| 143 | |
| 144 | #ifndef _LOCORE |
| 145 | |
| 146 | extern void	delay(unsigned int); |
| 147 | #define	DELAY(n)	delay(n) |
| 148 | |
| 149 | extern int cputyp; |
| 150 | |
| 151 | #if defined (SUN4US) || defined (SUN4V) |
| 152 | #define	CPU_ISSUN4U	(cputyp == CPU_SUN4U) |
| 153 | #define	CPU_ISSUN4US	(cputyp == CPU_SUN4US) |
| 154 | #define	CPU_ISSUN4V	(cputyp == CPU_SUN4V) |
| 155 | #else |
| 156 | #define	CPU_ISSUN4U	(1) |
| 157 | #define	CPU_ISSUN4US	(0) |
| 158 | #define	CPU_ISSUN4V	(0) |
| 159 | #endif |
| 160 | |
| 161 | #endif /* _LOCORE */ |
| 162 | |
| 163 | /* |
| 164 | * Values for the cputyp variable. |
| 165 | */ |
| 166 | #define	CPU_SUN4	0 |
| 167 | #define	CPU_SUN4C	1 |
| 168 | #define	CPU_SUN4M	2 |
| 169 | #define	CPU_SUN4U	3 |
| 170 | #define	CPU_SUN4US	4 |
| 171 | #define	CPU_SUN4V	5 |
| 172 | |
| 173 | /* |
| 174 | * On a sun4u machine, the page size is 8192. |
| 175 | */ |
| 176 | |
| 177 | #ifndef _LOCORE |
| 178 | #include <machine/cpu.h> |
| 179 | #endif |
| 180 | |
| 181 | #endif /* _KERNEL */ |
| 182 | |
| 183 | #endif /* _MACHINE_PARAM_H_ */ |