| 1 | /*- |
| 2 | * SPDX-License-Identifier: BSD-2-Clause |
| 3 | * |
| 4 | * Copyright (c) Peter Wemm |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * Redistribution and use in source and binary forms, with or without |
| 8 | * modification, are permitted provided that the following conditions |
| 9 | * are met: |
| 10 | * 1. Redistributions of source code must retain the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer. |
| 12 | * 2. Redistributions in binary form must reproduce the above copyright |
| 13 | * notice, this list of conditions and the following disclaimer in the |
| 14 | * documentation and/or other materials provided with the distribution. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
| 17 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
| 20 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 21 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 22 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 23 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 24 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 26 | * SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #ifndef _MACHINE_PCPU_H_ |
| 30 | #define	_MACHINE_PCPU_H_ |
| 31 | |
| 32 | #include <machine/segments.h> |
| 33 | #include <machine/tss.h> |
| 34 | |
| 35 | #include <sys/_lock.h> |
| 36 | #include <sys/_mutex.h> |
| 37 | |
| 38 | struct monitorbuf { |
| 39 | 	int idle_state;		/* Used by cpu_idle_mwait. */ |
| 40 | 	int stop_state;		/* Used by cpustop_handler. */ |
| 41 | 	char padding[128 - (2 * sizeof(int))]; |
| 42 | }; |
| 43 | _Static_assert(sizeof(struct monitorbuf) == 128, "2x cache line"); |
| 44 | |
| 45 | /* |
| 46 | * The SMP parts are setup in pmap.c and machdep.c for the BSP, and |
| 47 | * pmap.c and mp_machdep.c sets up the data for the AP's to "see" when |
| 48 | * they awake. The reason for doing it via a struct is so that an |
| 49 | * array of pointers to each CPU's data can be set up for things like |
| 50 | * "check curproc on all other processors" |
| 51 | */ |
| 52 | |
| 53 | #define	PCPU_MD_FIELDS							\ |
| 54 | 	struct monitorbuf pc_monitorbuf __aligned(128);	/* cache line */\ |
| 55 | 	struct	pcpu *pc_prvspace;	/* Self-reference */		\ |
| 56 | 	struct	pmap *pc_curpmap;					\ |
| 57 | 	struct	segment_descriptor pc_common_tssd;			\ |
| 58 | 	struct	segment_descriptor *pc_tss_gdt;				\ |
| 59 | 	struct	segment_descriptor *pc_fsgs_gdt;			\ |
| 60 | 	struct	i386tss *pc_common_tssp;				\ |
| 61 | 	u_int	pc_kesp0;						\ |
| 62 | 	u_int	pc_trampstk;						\ |
| 63 | 	int	pc_currentldt;						\ |
| 64 | 	u_int pc_acpi_id;		/* ACPI CPU id */		\ |
| 65 | 	u_int	pc_apic_id;						\ |
| 66 | 	int	pc_private_tss;		/* Flag indicating private tss*/\ |
| 67 | 	u_int	pc_cmci_mask;		/* MCx banks for CMCI */	\ |
| 68 | 	u_int	pc_vcpu_id;		/* Xen vCPU ID */		\ |
| 69 | 	struct	mtx pc_cmap_lock;					\ |
| 70 | 	void	*pc_cmap_pte1;						\ |
| 71 | 	void	*pc_cmap_pte2;						\ |
| 72 | 	caddr_t	pc_cmap_addr1;						\ |
| 73 | 	caddr_t	pc_cmap_addr2;						\ |
| 74 | 	vm_offset_t pc_qmap_addr;	/* KVA for temporary mappings */\ |
| 75 | 	vm_offset_t pc_copyout_maddr;					\ |
| 76 | 	vm_offset_t pc_copyout_saddr;					\ |
| 77 | 	struct	mtx pc_copyout_mlock;					\ |
| 78 | 	struct	sx pc_copyout_slock;					\ |
| 79 | 	char	*pc_copyout_buf;					\ |
| 80 | 	vm_offset_t pc_pmap_eh_va;					\ |
| 81 | 	caddr_t pc_pmap_eh_ptep;					\ |
| 82 | 	uint32_t pc_smp_tlb_done;	/* TLB op acknowledgement */	\ |
| 83 | 	uint32_t pc_ibpb_set;						\ |
| 84 | 	void	*pc_mds_buf;						\ |
| 85 | 	void	*pc_mds_buf64;						\ |
| 86 | 	uint32_t pc_pad[4];						\ |
| 87 | 	uint8_t	pc_mds_tmp[64];						\ |
| 88 | 	u_int	pc_ipi_bitmap;						\ |
| 89 | 	char	__pad[3518] |
| 90 | |
| 91 | #ifdef _KERNEL |
| 92 | |
| 93 | #define MONITOR_STOPSTATE_RUNNING	0 |
| 94 | #define MONITOR_STOPSTATE_STOPPED	1 |
| 95 | |
| 96 | /* |
| 97 | * Evaluates to the byte offset of the per-cpu variable name. |
| 98 | */ |
| 99 | #define	__pcpu_offset(name)						\ |
| 100 | 	__offsetof(struct pcpu, name) |
| 101 | |
| 102 | /* |
| 103 | * Evaluates to the type of the per-cpu variable name. |
| 104 | */ |
| 105 | #define	__pcpu_type(name)						\ |
| 106 | 	__typeof(((struct pcpu *)0)->name) |
| 107 | |
| 108 | /* |
| 109 | * Evaluates to the address of the per-cpu variable name. |
| 110 | */ |
| 111 | #define	__PCPU_PTR(name)						\ |
| 112 | 	(&get_pcpu()->name) |
| 113 | |
| 114 | /* |
| 115 | * Evaluates to the value of the per-cpu variable name. |
| 116 | */ |
| 117 | #define	__PCPU_GET(name) __extension__ ({				\ |
| 118 | 	__pcpu_type(name) __res;					\ |
| 119 | 	struct __s {							\ |
| 120 | 		u_char	__b[MIN(sizeof(__res), 4)];			\ |
| 121 | 	};								\ |
| 122 | 									\ |
| 123 | 	if (sizeof(__res) == 1 || sizeof(__res) == 2 ||			\ |
| 124 | 	 sizeof(__res) == 4) {					\ |
| 125 | 		__asm __volatile("mov %%fs:%c1,%0"			\ |
| 126 | 		 : "=r" (*(struct __s *)(void *)&__res)		\ |
| 127 | 		 : "i" (__pcpu_offset(name)));			\ |
| 128 | 	} else {							\ |
| 129 | 		__res = *__PCPU_PTR(name);				\ |
| 130 | 	}								\ |
| 131 | 	__res;								\ |
| 132 | }) |
| 133 | |
| 134 | /* |
| 135 | * Adds a value of the per-cpu counter name. The implementation |
| 136 | * must be atomic with respect to interrupts. |
| 137 | */ |
| 138 | #define	__PCPU_ADD(name, val) do {					\ |
| 139 | 	__pcpu_type(name) __val;					\ |
| 140 | 	struct __s {							\ |
| 141 | 		u_char	__b[MIN(sizeof(__val), 4)];			\ |
| 142 | 	};								\ |
| 143 | 									\ |
| 144 | 	__val = (val);							\ |
| 145 | 	if (sizeof(__val) == 1 || sizeof(__val) == 2 ||			\ |
| 146 | 	 sizeof(__val) == 4) {					\ |
| 147 | 		__asm __volatile("add %1,%%fs:%c0"			\ |
| 148 | 		 :							\ |
| 149 | 		 : "i" (__pcpu_offset(name)),			\ |
| 150 | 		 "r" (*(struct __s *)(void *)&__val)		\ |
| 151 | 		 : "cc", "memory");					\ |
| 152 | 	} else								\ |
| 153 | 		*__PCPU_PTR(name) += __val;				\ |
| 154 | } while (0) |
| 155 | |
| 156 | /* |
| 157 | * Sets the value of the per-cpu variable name to value val. |
| 158 | */ |
| 159 | #define	__PCPU_SET(name, val) do {					\ |
| 160 | 	__pcpu_type(name) __val;					\ |
| 161 | 	struct __s {							\ |
| 162 | 		u_char	__b[MIN(sizeof(__val), 4)];			\ |
| 163 | 	};								\ |
| 164 | 									\ |
| 165 | 	__val = (val);							\ |
| 166 | 	if (sizeof(__val) == 1 || sizeof(__val) == 2 ||			\ |
| 167 | 	 sizeof(__val) == 4) {					\ |
| 168 | 		__asm __volatile("mov %1,%%fs:%c0"			\ |
| 169 | 		 :							\ |
| 170 | 		 : "i" (__pcpu_offset(name)),			\ |
| 171 | 		 "r" (*(struct __s *)(void *)&__val)		\ |
| 172 | 		 : "memory");					\ |
| 173 | 	} else {							\ |
| 174 | 		*__PCPU_PTR(name) = __val;				\ |
| 175 | 	}								\ |
| 176 | } while (0) |
| 177 | |
| 178 | #define	get_pcpu() __extension__ ({					\ |
| 179 | 	struct pcpu *__pc;						\ |
| 180 | 									\ |
| 181 | 	__asm __volatile("movl %%fs:%c1,%0"				\ |
| 182 | 	 : "=r" (__pc)						\ |
| 183 | 	 : "i" (__pcpu_offset(pc_prvspace)));			\ |
| 184 | 	__pc;								\ |
| 185 | }) |
| 186 | |
| 187 | #define	PCPU_GET(member)	__PCPU_GET(pc_ ## member) |
| 188 | #define	PCPU_ADD(member, val)	__PCPU_ADD(pc_ ## member, val) |
| 189 | #define	PCPU_PTR(member)	__PCPU_PTR(pc_ ## member) |
| 190 | #define	PCPU_SET(member, val)	__PCPU_SET(pc_ ## member, val) |
| 191 | |
| 192 | #define	IS_BSP()	(PCPU_GET(cpuid) == 0) |
| 193 | |
| 194 | #endif /* _KERNEL */ |
| 195 | |
| 196 | #endif /* !_MACHINE_PCPU_H_ */ |