1/* $OpenBSD: pte.h,v 1.23 2019/01/18 01:34:50 pd Exp $ */
2/* $NetBSD: pte.h,v 1.11 1998/02/06 21:58:05 thorpej Exp $ */
3
4/*
5 * Copyright (c) 1997 Charles D. Cranor and Washington University.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 * pte.h rewritten by chuck based on the jolitz version, plus random
31 * info on the pentium and other processors found on the net. the
32 * goal of this rewrite is to provide enough documentation on the MMU
33 * hardware that the reader will be able to understand it without having
34 * to refer to a hardware manual.
35 */
36
37#ifndef _MACHINE_PTE_H_
38#define _MACHINE_PTE_H_
39
40/*
41 * now we define various for playing with virtual addresses
42 */
43
44#define PDSHIFT 22 /* offset of PD index in VA */
45#define NBPD (1 << PDSHIFT) /* # bytes mapped by PD (4MB) */
46
47/*
48 * here we define the bits of the PDE/PTE, as described above:
49 *
50 * XXXCDC: need to rename these (PG_u == ugly).
51 */
52
53#define PG_V 0x00000001 /* valid entry */
54#define PG_RO 0x00000000 /* read-only page */
55#define PG_RW 0x00000002 /* read-write page */
56#define PG_u 0x00000004 /* user accessible page */
57#define PG_PROT 0x00000806 /* all protection bits */
58#define PG_WT 0x00000008 /* write through */
59#define PG_N 0x00000010 /* non-cacheable */
60#define PG_U 0x00000020 /* has been used */
61#define PG_M 0x00000040 /* has been modified */
62#define PG_PAT 0x00000080 /* PAT bit. (on pte) */
63#define PG_PS 0x00000080 /* 4MB page size (on pde) */
64#define PG_G 0x00000100 /* global, don't TLB flush */
65#define PG_AVAIL1 0x00000200 /* ignored by hardware */
66#define PG_AVAIL2 0x00000400 /* ignored by hardware */
67#define PG_AVAIL3 0x00000800 /* ignored by hardware */
68#define PG_PATLG 0x00001000 /* PAT on large pages */
69
70/* Cacheability bits when we are using PAT */
71#define PG_WB (0) /* The default */
72#define PG_WC (PG_WT) /* WT and CD is WC */
73#define PG_UCMINUS (PG_N) /* UC but mtrr can override */
74#define PG_UC (PG_WT | PG_N) /* hard UC */
75
76/*
77 * various shorthand protection codes
78 */
79
80#define PG_KR 0x00000000 /* kernel read-only */
81#define PG_KW 0x00000002 /* kernel read-write */
82
83/*
84 * page protection exception bits
85 */
86
87#define PGEX_P 0x01 /* protection violation (vs. no mapping) */
88#define PGEX_W 0x02 /* exception during a write cycle */
89#define PGEX_U 0x04 /* exception while in user mode (upl) */
90#define PGEX_I 0x10 /* instruction fetch blocked by NX */
91
92#endif /* _MACHINE_PTE_H_ */