1/*-
2 * SPDX-License-Identifier: BSD-4-Clause
3 *
4 * Copyright (c) 1990 The Regents of the University of California.
5 * All rights reserved.
6 * Copyright (c) 1994 John S. Dyson
7 * All rights reserved.
8 * Copyright (c) 2003 Peter Wemm
9 * All rights reserved.
10 *
11 * This code is derived from software contributed to Berkeley by
12 * William Jolitz.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 * 3. All advertising materials mentioning features or use of this software
23 * must display the following acknowledgement:
24 * This product includes software developed by the University of
25 * California, Berkeley and its contributors.
26 * 4. Neither the name of the University nor the names of its contributors
27 * may be used to endorse or promote products derived from this software
28 * without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40 * SUCH DAMAGE.
41 */
42
43#ifdef __i386__
44#include <i386/vmparam.h>
45#else /* !__i386__ */
46
47#ifndef _MACHINE_VMPARAM_H_
48#define _MACHINE_VMPARAM_H_ 1
49
50/*
51 * Machine dependent constants for AMD64.
52 */
53
54/*
55 * Virtual memory related constants, all in bytes
56 */
57#define MAXTSIZ (32768UL*1024*1024) /* max text size */
58#ifndef DFLDSIZ
59#define DFLDSIZ (32768UL*1024*1024) /* initial data size limit */
60#endif
61#ifndef MAXDSIZ
62#define MAXDSIZ (32768UL*1024*1024) /* max data size */
63#endif
64#ifndef DFLSSIZ
65#define DFLSSIZ (8UL*1024*1024) /* initial stack size limit */
66#endif
67#ifndef MAXSSIZ
68#define MAXSSIZ (512UL*1024*1024) /* max stack size */
69#endif
70#ifndef SGROWSIZ
71#define SGROWSIZ (128UL*1024) /* amount to grow stack */
72#endif
73
74/*
75 * We provide a single page allocator through the use of the
76 * direct mapped segment. This uses 2MB pages for reduced
77 * TLB pressure.
78 */
79#if !defined(KASAN) && !defined(KMSAN)
80#define UMA_USE_DMAP
81#endif
82
83/*
84 * The physical address space is densely populated.
85 */
86#define VM_PHYSSEG_DENSE
87
88/*
89 * The number of PHYSSEG entries must be one greater than the number
90 * of phys_avail entries because the phys_avail entry that spans the
91 * largest physical address that is accessible by ISA DMA is split
92 * into two PHYSSEG entries.
93 */
94#define VM_PHYSSEG_MAX 63
95
96/*
97 * Create three free page pools: VM_FREEPOOL_DEFAULT is the default pool from
98 * which physical pages are allocated and VM_FREEPOOL_DIRECT is the pool from
99 * which physical pages for page tables and small UMA objects are allocated.
100 * VM_FREEPOOL_LAZYINIT is a special-purpose pool that is populated only during
101 * boot and is used to implement deferred initialization of page structures.
102 */
103#define VM_NFREEPOOL 3
104#define VM_FREEPOOL_LAZYINIT 0
105#define VM_FREEPOOL_DEFAULT 1
106#define VM_FREEPOOL_DIRECT 2
107
108/*
109 * Create up to three free page lists: VM_FREELIST_DMA32 is for physical pages
110 * that have physical addresses below 4G but are not accessible by ISA DMA,
111 * and VM_FREELIST_ISADMA is for physical pages that are accessible by ISA
112 * DMA.
113 */
114#define VM_NFREELIST 3
115#define VM_FREELIST_DEFAULT 0
116#define VM_FREELIST_DMA32 1
117#define VM_FREELIST_LOWMEM 2
118
119#define VM_LOWMEM_BOUNDARY (16 << 20) /* 16MB ISA DMA limit */
120
121/*
122 * Create the DMA32 free list only if the number of physical pages above
123 * physical address 4G is at least 16M, which amounts to 64GB of physical
124 * memory.
125 */
126#define VM_DMA32_NPAGES_THRESHOLD 16777216
127
128/*
129 * An allocation size of 16MB is supported in order to optimize the
130 * use of the direct map by UMA. Specifically, a cache line contains
131 * at most 8 PDEs, collectively mapping 16MB of physical memory. By
132 * reducing the number of distinct 16MB "pages" that are used by UMA,
133 * the physical memory allocator reduces the likelihood of both 2MB
134 * page TLB misses and cache misses caused by 2MB page TLB misses.
135 */
136#define VM_NFREEORDER 13
137
138/*
139 * Enable superpage reservations: 1 level.
140 */
141#ifndef VM_NRESERVLEVEL
142#define VM_NRESERVLEVEL 1
143#endif
144
145/*
146 * Level 0 reservations consist of 512 pages.
147 */
148#ifndef VM_LEVEL_0_ORDER
149#define VM_LEVEL_0_ORDER 9
150#endif
151
152/*
153 * Kernel physical load address for non-UEFI boot and for legacy UEFI loader.
154 * Newer UEFI loader loads kernel anywhere below 4G, with memory allocated
155 * by boot services.
156 * Needs to be aligned at 2MB superpage boundary.
157 */
158#ifndef KERNLOAD
159#define KERNLOAD 0x200000
160#endif
161
162/*
163 * Virtual addresses of things. Derived from the page directory and
164 * page table indexes from pmap.h for precision.
165 *
166 * LA48:
167 * 0x0000000000000000 - 0x00007fffffffffff user map
168 * 0x0000800000000000 - 0xffff7fffffffffff does not exist (hole)
169 * 0xffff800000000000 - 0xffff804020100fff recursive page table (512GB slot)
170 * 0xffff804020100fff - 0xffff807fffffffff unused
171 * 0xffff808000000000 - 0xffff847fffffffff large map (can be tuned up)
172 * 0xffff848000000000 - 0xfffff77fffffffff unused (large map extends there)
173 * 0xfffff60000000000 - 0xfffff7ffffffffff 2TB KMSAN origin map, optional
174 * 0xfffff78000000000 - 0xfffff7bfffffffff 512GB KASAN shadow map, optional
175 * 0xfffff80000000000 - 0xfffffbffffffffff 4TB direct map
176 * 0xfffffc0000000000 - 0xfffffdffffffffff 2TB KMSAN shadow map, optional
177 * 0xfffffe0000000000 - 0xffffffffffffffff 2TB kernel map
178 *
179 * LA57:
180 * 0x0000000000000000 - 0x00ffffffffffffff user map
181 * 0x0100000000000000 - 0xf0ffffffffffffff does not exist (hole)
182 * 0xff00000000000000 - 0xff00ffffffffffff recursive page table (2048TB slot)
183 * 0xff01000000000000 - 0xff20ffffffffffff direct map (32 x 2048TB slots)
184 * 0xff21000000000000 - 0xff40ffffffffffff large map
185 * 0xff41000000000000 - 0xffff7fffffffffff unused
186 * 0xffff800000000000 - 0xfffff5ffffffffff unused (start of kernel pml4 entry)
187 * 0xfffff60000000000 - 0xfffff7ffffffffff 2TB KMSAN origin map, optional
188 * 0xfffff78000000000 - 0xfffff7bfffffffff 512GB KASAN shadow map, optional
189 * 0xfffff80000000000 - 0xfffffbffffffffff 4TB unused
190 * 0xfffffc0000000000 - 0xfffffdffffffffff 2TB KMSAN shadow map, optional
191 * 0xfffffe0000000000 - 0xffffffffffffffff 2TB kernel map
192 *
193 * Within the kernel map:
194 *
195 * 0xfffffe0000000000 vm_page_array
196 * 0xffffffff80000000 KERNBASE
197 */
198
199#define VM_MIN_KERNEL_ADDRESS_LA48 KV4ADDR(KPML4BASE, 0, 0, 0)
200#define VM_MIN_KERNEL_ADDRESS kva_layout.km_low
201#define VM_MAX_KERNEL_ADDRESS kva_layout.km_high
202
203#define KASAN_MIN_ADDRESS (kva_layout.kasan_shadow_low)
204#define KASAN_MAX_ADDRESS (kva_layout.kasan_shadow_high)
205
206#define KMSAN_SHAD_MIN_ADDRESS (kva_layout.kmsan_shadow_low)
207#define KMSAN_SHAD_MAX_ADDRESS (kva_layout.kmsan_shadow_high)
208
209#define KMSAN_ORIG_MIN_ADDRESS (kva_layout.kmsan_origin_low)
210#define KMSAN_ORIG_MAX_ADDRESS (kva_layout.kmsan_origin_high)
211
212/*
213 * Formally kernel mapping starts at KERNBASE, but kernel linker
214 * script leaves first PDE reserved. For legacy BIOS boot, kernel is
215 * loaded at KERNLOAD = 2M, and initial kernel page table maps
216 * physical memory from zero to KERNend starting at KERNBASE.
217 *
218 * KERNSTART is where the first actual kernel page is mapped, after
219 * the compatibility mapping.
220 */
221#define KERNBASE KV4ADDR(KPML4I, KPDPI, 0, 0)
222#define KERNSTART (KERNBASE + NBPDR)
223
224#define UPT_MAX_ADDRESS KV4ADDR(PML4PML4I, PML4PML4I, PML4PML4I, PML4PML4I)
225#define UPT_MIN_ADDRESS KV4ADDR(PML4PML4I, 0, 0, 0)
226
227#define VM_MAXUSER_ADDRESS_LA57 UVADDR(NUPML5E, 0, 0, 0, 0)
228#define VM_MAXUSER_ADDRESS_LA48 UVADDR(0, NUP4ML4E, 0, 0, 0)
229#define VM_MAXUSER_ADDRESS VM_MAXUSER_ADDRESS_LA57
230
231#define SHAREDPAGE_LA57 (VM_MAXUSER_ADDRESS_LA57 - PAGE_SIZE)
232#define SHAREDPAGE_LA48 (VM_MAXUSER_ADDRESS_LA48 - PAGE_SIZE)
233#define USRSTACK_LA57 SHAREDPAGE_LA57
234#define USRSTACK_LA48 SHAREDPAGE_LA48
235#define USRSTACK USRSTACK_LA48
236#define PS_STRINGS_LA57 (USRSTACK_LA57 - sizeof(struct ps_strings))
237#define PS_STRINGS_LA48 (USRSTACK_LA48 - sizeof(struct ps_strings))
238
239#define VM_MAX_ADDRESS UPT_MAX_ADDRESS
240#define VM_MIN_ADDRESS (0)
241
242/*
243 * XXX Allowing dmaplimit == 0 is a temporary workaround for vt(4) efifb's
244 * early use of PHYS_TO_DMAP before the mapping is actually setup. This works
245 * because the result is not actually accessed until later, but the early
246 * vt fb startup needs to be reworked.
247 */
248#define PHYS_IN_DMAP(pa) (dmaplimit == 0 || (pa) < dmaplimit)
249#define VIRT_IN_DMAP(va) \
250 ((va) >= kva_layout.dmap_low && (va) < kva_layout.dmap_low + dmaplimit)
251
252#define PMAP_HAS_DMAP 1
253#define PHYS_TO_DMAP(x) __extension__ ({ \
254 KASSERT(PHYS_IN_DMAP(x), \
255 ("physical address %#jx not covered by the DMAP", \
256 (uintmax_t)x)); \
257 (x) + kva_layout.dmap_low; })
258
259#define DMAP_TO_PHYS(x) __extension__ ({ \
260 KASSERT(VIRT_IN_DMAP(x), \
261 ("virtual address %#jx not covered by the DMAP", \
262 (uintmax_t)x)); \
263 (x) - kva_layout.dmap_low; })
264
265/*
266 * amd64 maps the page array into KVA so that it can be more easily
267 * allocated on the correct memory domains.
268 */
269#define PMAP_HAS_PAGE_ARRAY 1
270
271/*
272 * How many physical pages per kmem arena virtual page.
273 */
274#ifndef VM_KMEM_SIZE_SCALE
275#define VM_KMEM_SIZE_SCALE (1)
276#endif
277
278/*
279 * Optional ceiling (in bytes) on the size of the kmem arena: 60% of the
280 * kernel map.
281 */
282#ifndef VM_KMEM_SIZE_MAX
283#define VM_KMEM_SIZE_MAX ((VM_MAX_KERNEL_ADDRESS - \
284 kva_layout.km_low + 1) * 3 / 5)
285#endif
286
287/* initial pagein size of beginning of executable file */
288#ifndef VM_INITIAL_PAGEIN
289#define VM_INITIAL_PAGEIN 16
290#endif
291
292#define ZERO_REGION_SIZE (2 * 1024 * 1024) /* 2MB */
293
294/*
295 * The pmap can create non-transparent large page mappings.
296 */
297#define PMAP_HAS_LARGEPAGES 1
298
299/*
300 * Need a page dump array for minidump.
301 */
302#define MINIDUMP_PAGE_TRACKING 1
303#define MINIDUMP_STARTUP_PAGE_TRACKING 1
304
305#endif /* _MACHINE_VMPARAM_H_ */
306
307#endif /* __i386__ */