1//! This file is auto-generated by tools/update_cpu_features.zig.
2
3const std = @import("../std.zig");
4const CpuFeature = std.Target.Cpu.Feature;
5const CpuModel = std.Target.Cpu.Model;
6
7pub const Feature = enum {
8 @"32bit",
9 @"8msecext",
10 aapcs_frame_chain,
11 aclass,
12 acquire_release,
13 aes,
14 atomics_32,
15 avoid_movs_shop,
16 avoid_muls,
17 avoid_partial_cpsr,
18 bf16,
19 big_endian_instructions,
20 branch_align_64,
21 cde,
22 cdecp0,
23 cdecp1,
24 cdecp2,
25 cdecp3,
26 cdecp4,
27 cdecp5,
28 cdecp6,
29 cdecp7,
30 cheap_predicable_cpsr,
31 clrbhb,
32 cortex_a510,
33 crc,
34 crypto,
35 d32,
36 db,
37 dfb,
38 disable_postra_scheduler,
39 dont_widen_vmovs,
40 dotprod,
41 dsp,
42 execute_only,
43 expand_fp_mlx,
44 fix_cmse_cve_2021_35465,
45 fix_cortex_a57_aes_1742098,
46 fp16,
47 fp16fml,
48 fp64,
49 fp_armv8,
50 fp_armv8d16,
51 fp_armv8d16sp,
52 fp_armv8sp,
53 fpao,
54 fpregs,
55 fpregs16,
56 fpregs64,
57 fullfp16,
58 fuse_aes,
59 fuse_literals,
60 harden_sls_blr,
61 harden_sls_nocomdat,
62 harden_sls_retbr,
63 has_v4t,
64 has_v5t,
65 has_v5te,
66 has_v6,
67 has_v6k,
68 has_v6m,
69 has_v6t2,
70 has_v7,
71 has_v7clrex,
72 has_v8,
73 has_v8_1a,
74 has_v8_1m_main,
75 has_v8_2a,
76 has_v8_3a,
77 has_v8_4a,
78 has_v8_5a,
79 has_v8_6a,
80 has_v8_7a,
81 has_v8_8a,
82 has_v8_9a,
83 has_v8m,
84 has_v8m_main,
85 has_v9_1a,
86 has_v9_2a,
87 has_v9_3a,
88 has_v9_4a,
89 has_v9_5a,
90 has_v9_6a,
91 has_v9_7a,
92 has_v9a,
93 hwdiv,
94 hwdiv_arm,
95 i8mm,
96 iwmmxt,
97 iwmmxt2,
98 lob,
99 long_calls,
100 loop_align,
101 m55,
102 m85,
103 mclass,
104 mp,
105 muxed_units,
106 mve,
107 mve1beat,
108 mve2beat,
109 mve4beat,
110 mve_fp,
111 neon,
112 neon_fpmovs,
113 neonfp,
114 no_branch_predictor,
115 no_bti_at_return_twice,
116 no_movt,
117 no_neg_immediates,
118 noarm,
119 nonpipelined_vfp,
120 pacbti,
121 perfmon,
122 prefer_ishst,
123 prefer_vmovsr,
124 prof_unpr,
125 ras,
126 rclass,
127 read_tp_tpidrprw,
128 read_tp_tpidruro,
129 read_tp_tpidrurw,
130 reserve_r9,
131 ret_addr_stack,
132 sb,
133 sha2,
134 slow_fp_brcc,
135 slow_load_D_subreg,
136 slow_odd_reg,
137 slow_vdup32,
138 slow_vgetlni32,
139 slowfpvfmx,
140 slowfpvmlx,
141 soft_float,
142 splat_vfp_neon,
143 strict_align,
144 thumb2,
145 thumb_mode,
146 trustzone,
147 use_mipipeliner,
148 use_misched,
149 v2,
150 v2a,
151 v3,
152 v3m,
153 v4,
154 v4t,
155 v5t,
156 v5te,
157 v5tej,
158 v6,
159 v6j,
160 v6k,
161 v6kz,
162 v6m,
163 v6sm,
164 v6t2,
165 v7a,
166 v7em,
167 v7m,
168 v7r,
169 v7ve,
170 v8_1a,
171 v8_1m_main,
172 v8_2a,
173 v8_3a,
174 v8_4a,
175 v8_5a,
176 v8_6a,
177 v8_7a,
178 v8_8a,
179 v8_9a,
180 v8a,
181 v8m,
182 v8m_main,
183 v8r,
184 v9_1a,
185 v9_2a,
186 v9_3a,
187 v9_4a,
188 v9_5a,
189 v9_6a,
190 v9_7a,
191 v9a,
192 vfp2,
193 vfp2sp,
194 vfp3,
195 vfp3d16,
196 vfp3d16sp,
197 vfp3sp,
198 vfp4,
199 vfp4d16,
200 vfp4d16sp,
201 vfp4sp,
202 virtualization,
203 vldn_align,
204 vmlx_forwarding,
205 vmlx_hazards,
206 wide_stride_vfp,
207 xscale,
208 zcz,
209};
210
211pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
212pub const featureSetHas = CpuFeature.FeatureSetFns(Feature).featureSetHas;
213pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny;
214pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll;
215
216pub const all_features = blk: {
217 @setEvalBranchQuota(10000);
218 const len = @typeInfo(Feature).@"enum".field_names.len;
219 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
220 var result: [len]CpuFeature = undefined;
221 result[@backingInt(Feature.@"32bit")] = .{
222 .llvm_name = "32bit",
223 .description = "Prefer 32-bit Thumb instrs",
224 .dependencies = featureSet(&[_]Feature{}),
225 };
226 result[@backingInt(Feature.@"8msecext")] = .{
227 .llvm_name = "8msecext",
228 .description = "Enable support for ARMv8-M Security Extensions",
229 .dependencies = featureSet(&[_]Feature{}),
230 };
231 result[@backingInt(Feature.aapcs_frame_chain)] = .{
232 .llvm_name = "aapcs-frame-chain",
233 .description = "Create an AAPCS compliant frame chain",
234 .dependencies = featureSet(&[_]Feature{}),
235 };
236 result[@backingInt(Feature.aclass)] = .{
237 .llvm_name = "aclass",
238 .description = "Is application profile ('A' series)",
239 .dependencies = featureSet(&[_]Feature{}),
240 };
241 result[@backingInt(Feature.acquire_release)] = .{
242 .llvm_name = "acquire-release",
243 .description = "Has v8 acquire/release (lda/ldaex etc) instructions",
244 .dependencies = featureSet(&[_]Feature{}),
245 };
246 result[@backingInt(Feature.aes)] = .{
247 .llvm_name = "aes",
248 .description = "Enable AES support",
249 .dependencies = featureSet(&[_]Feature{
250 .neon,
251 }),
252 };
253 result[@backingInt(Feature.atomics_32)] = .{
254 .llvm_name = "atomics-32",
255 .description = "Assume that lock-free 32-bit atomics are available",
256 .dependencies = featureSet(&[_]Feature{}),
257 };
258 result[@backingInt(Feature.avoid_movs_shop)] = .{
259 .llvm_name = "avoid-movs-shop",
260 .description = "Avoid movs instructions with shifter operand",
261 .dependencies = featureSet(&[_]Feature{}),
262 };
263 result[@backingInt(Feature.avoid_muls)] = .{
264 .llvm_name = "avoid-muls",
265 .description = "Avoid MULS instructions for M class cores",
266 .dependencies = featureSet(&[_]Feature{}),
267 };
268 result[@backingInt(Feature.avoid_partial_cpsr)] = .{
269 .llvm_name = "avoid-partial-cpsr",
270 .description = "Avoid CPSR partial update for OOO execution",
271 .dependencies = featureSet(&[_]Feature{}),
272 };
273 result[@backingInt(Feature.bf16)] = .{
274 .llvm_name = "bf16",
275 .description = "Enable support for BFloat16 instructions",
276 .dependencies = featureSet(&[_]Feature{
277 .neon,
278 }),
279 };
280 result[@backingInt(Feature.big_endian_instructions)] = .{
281 .llvm_name = "big-endian-instructions",
282 .description = "Expect instructions to be stored big-endian.",
283 .dependencies = featureSet(&[_]Feature{}),
284 };
285 result[@backingInt(Feature.branch_align_64)] = .{
286 .llvm_name = "branch-align-64",
287 .description = "Prefer 64-bit alignment for branch targets",
288 .dependencies = featureSet(&[_]Feature{}),
289 };
290 result[@backingInt(Feature.cde)] = .{
291 .llvm_name = "cde",
292 .description = "Support CDE instructions",
293 .dependencies = featureSet(&[_]Feature{
294 .has_v8m_main,
295 }),
296 };
297 result[@backingInt(Feature.cdecp0)] = .{
298 .llvm_name = "cdecp0",
299 .description = "Coprocessor 0 ISA is CDEv1",
300 .dependencies = featureSet(&[_]Feature{
301 .cde,
302 }),
303 };
304 result[@backingInt(Feature.cdecp1)] = .{
305 .llvm_name = "cdecp1",
306 .description = "Coprocessor 1 ISA is CDEv1",
307 .dependencies = featureSet(&[_]Feature{
308 .cde,
309 }),
310 };
311 result[@backingInt(Feature.cdecp2)] = .{
312 .llvm_name = "cdecp2",
313 .description = "Coprocessor 2 ISA is CDEv1",
314 .dependencies = featureSet(&[_]Feature{
315 .cde,
316 }),
317 };
318 result[@backingInt(Feature.cdecp3)] = .{
319 .llvm_name = "cdecp3",
320 .description = "Coprocessor 3 ISA is CDEv1",
321 .dependencies = featureSet(&[_]Feature{
322 .cde,
323 }),
324 };
325 result[@backingInt(Feature.cdecp4)] = .{
326 .llvm_name = "cdecp4",
327 .description = "Coprocessor 4 ISA is CDEv1",
328 .dependencies = featureSet(&[_]Feature{
329 .cde,
330 }),
331 };
332 result[@backingInt(Feature.cdecp5)] = .{
333 .llvm_name = "cdecp5",
334 .description = "Coprocessor 5 ISA is CDEv1",
335 .dependencies = featureSet(&[_]Feature{
336 .cde,
337 }),
338 };
339 result[@backingInt(Feature.cdecp6)] = .{
340 .llvm_name = "cdecp6",
341 .description = "Coprocessor 6 ISA is CDEv1",
342 .dependencies = featureSet(&[_]Feature{
343 .cde,
344 }),
345 };
346 result[@backingInt(Feature.cdecp7)] = .{
347 .llvm_name = "cdecp7",
348 .description = "Coprocessor 7 ISA is CDEv1",
349 .dependencies = featureSet(&[_]Feature{
350 .cde,
351 }),
352 };
353 result[@backingInt(Feature.cheap_predicable_cpsr)] = .{
354 .llvm_name = "cheap-predicable-cpsr",
355 .description = "Disable +1 predication cost for instructions updating CPSR",
356 .dependencies = featureSet(&[_]Feature{}),
357 };
358 result[@backingInt(Feature.clrbhb)] = .{
359 .llvm_name = "clrbhb",
360 .description = "Enable Clear BHB instruction",
361 .dependencies = featureSet(&[_]Feature{}),
362 };
363 result[@backingInt(Feature.cortex_a510)] = .{
364 .llvm_name = "cortex-a510",
365 .description = "Cortex-A510 ARM processors",
366 .dependencies = featureSet(&[_]Feature{}),
367 };
368 result[@backingInt(Feature.crc)] = .{
369 .llvm_name = "crc",
370 .description = "Enable support for CRC instructions",
371 .dependencies = featureSet(&[_]Feature{}),
372 };
373 result[@backingInt(Feature.crypto)] = .{
374 .llvm_name = "crypto",
375 .description = "Enable support for Cryptography extensions",
376 .dependencies = featureSet(&[_]Feature{
377 .aes,
378 .sha2,
379 }),
380 };
381 result[@backingInt(Feature.d32)] = .{
382 .llvm_name = "d32",
383 .description = "Extend FP to 32 double registers",
384 .dependencies = featureSet(&[_]Feature{}),
385 };
386 result[@backingInt(Feature.db)] = .{
387 .llvm_name = "db",
388 .description = "Has data barrier (dmb/dsb) instructions",
389 .dependencies = featureSet(&[_]Feature{}),
390 };
391 result[@backingInt(Feature.dfb)] = .{
392 .llvm_name = "dfb",
393 .description = "Has full data barrier (dfb) instruction",
394 .dependencies = featureSet(&[_]Feature{}),
395 };
396 result[@backingInt(Feature.disable_postra_scheduler)] = .{
397 .llvm_name = "disable-postra-scheduler",
398 .description = "Don't schedule again after register allocation",
399 .dependencies = featureSet(&[_]Feature{}),
400 };
401 result[@backingInt(Feature.dont_widen_vmovs)] = .{
402 .llvm_name = "dont-widen-vmovs",
403 .description = "Don't widen VMOVS to VMOVD",
404 .dependencies = featureSet(&[_]Feature{}),
405 };
406 result[@backingInt(Feature.dotprod)] = .{
407 .llvm_name = "dotprod",
408 .description = "Enable support for dot product instructions",
409 .dependencies = featureSet(&[_]Feature{
410 .neon,
411 }),
412 };
413 result[@backingInt(Feature.dsp)] = .{
414 .llvm_name = "dsp",
415 .description = "Supports DSP instructions in ARM and/or Thumb2",
416 .dependencies = featureSet(&[_]Feature{}),
417 };
418 result[@backingInt(Feature.execute_only)] = .{
419 .llvm_name = "execute-only",
420 .description = "Enable the generation of execute only code.",
421 .dependencies = featureSet(&[_]Feature{}),
422 };
423 result[@backingInt(Feature.expand_fp_mlx)] = .{
424 .llvm_name = "expand-fp-mlx",
425 .description = "Expand VFP/NEON MLA/MLS instructions",
426 .dependencies = featureSet(&[_]Feature{}),
427 };
428 result[@backingInt(Feature.fix_cmse_cve_2021_35465)] = .{
429 .llvm_name = "fix-cmse-cve-2021-35465",
430 .description = "Mitigate against the cve-2021-35465 security vulnurability",
431 .dependencies = featureSet(&[_]Feature{}),
432 };
433 result[@backingInt(Feature.fix_cortex_a57_aes_1742098)] = .{
434 .llvm_name = "fix-cortex-a57-aes-1742098",
435 .description = "Work around Cortex-A57 Erratum 1742098 / Cortex-A72 Erratum 1655431 (AES)",
436 .dependencies = featureSet(&[_]Feature{}),
437 };
438 result[@backingInt(Feature.fp16)] = .{
439 .llvm_name = "fp16",
440 .description = "Enable half-precision floating point",
441 .dependencies = featureSet(&[_]Feature{}),
442 };
443 result[@backingInt(Feature.fp16fml)] = .{
444 .llvm_name = "fp16fml",
445 .description = "Enable full half-precision floating point fml instructions",
446 .dependencies = featureSet(&[_]Feature{
447 .fullfp16,
448 }),
449 };
450 result[@backingInt(Feature.fp64)] = .{
451 .llvm_name = "fp64",
452 .description = "Floating point unit supports double precision",
453 .dependencies = featureSet(&[_]Feature{
454 .fpregs64,
455 }),
456 };
457 result[@backingInt(Feature.fp_armv8)] = .{
458 .llvm_name = "fp-armv8",
459 .description = "Enable ARMv8 FP",
460 .dependencies = featureSet(&[_]Feature{
461 .fp_armv8d16,
462 .fp_armv8sp,
463 .vfp4,
464 }),
465 };
466 result[@backingInt(Feature.fp_armv8d16)] = .{
467 .llvm_name = "fp-armv8d16",
468 .description = "Enable ARMv8 FP with only 16 d-registers",
469 .dependencies = featureSet(&[_]Feature{
470 .fp_armv8d16sp,
471 .vfp4d16,
472 }),
473 };
474 result[@backingInt(Feature.fp_armv8d16sp)] = .{
475 .llvm_name = "fp-armv8d16sp",
476 .description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
477 .dependencies = featureSet(&[_]Feature{
478 .vfp4d16sp,
479 }),
480 };
481 result[@backingInt(Feature.fp_armv8sp)] = .{
482 .llvm_name = "fp-armv8sp",
483 .description = "Enable ARMv8 FP with no double precision",
484 .dependencies = featureSet(&[_]Feature{
485 .fp_armv8d16sp,
486 .vfp4sp,
487 }),
488 };
489 result[@backingInt(Feature.fpao)] = .{
490 .llvm_name = "fpao",
491 .description = "Enable fast computation of positive address offsets",
492 .dependencies = featureSet(&[_]Feature{}),
493 };
494 result[@backingInt(Feature.fpregs)] = .{
495 .llvm_name = "fpregs",
496 .description = "Enable FP registers",
497 .dependencies = featureSet(&[_]Feature{}),
498 };
499 result[@backingInt(Feature.fpregs16)] = .{
500 .llvm_name = "fpregs16",
501 .description = "Enable 16-bit FP registers",
502 .dependencies = featureSet(&[_]Feature{
503 .fpregs,
504 }),
505 };
506 result[@backingInt(Feature.fpregs64)] = .{
507 .llvm_name = "fpregs64",
508 .description = "Enable 64-bit FP registers",
509 .dependencies = featureSet(&[_]Feature{
510 .fpregs,
511 }),
512 };
513 result[@backingInt(Feature.fullfp16)] = .{
514 .llvm_name = "fullfp16",
515 .description = "Enable full half-precision floating point",
516 .dependencies = featureSet(&[_]Feature{
517 .fp_armv8d16sp,
518 .fpregs16,
519 }),
520 };
521 result[@backingInt(Feature.fuse_aes)] = .{
522 .llvm_name = "fuse-aes",
523 .description = "CPU fuses AES crypto operations",
524 .dependencies = featureSet(&[_]Feature{}),
525 };
526 result[@backingInt(Feature.fuse_literals)] = .{
527 .llvm_name = "fuse-literals",
528 .description = "CPU fuses literal generation operations",
529 .dependencies = featureSet(&[_]Feature{}),
530 };
531 result[@backingInt(Feature.harden_sls_blr)] = .{
532 .llvm_name = "harden-sls-blr",
533 .description = "Harden against straight line speculation across indirect calls",
534 .dependencies = featureSet(&[_]Feature{}),
535 };
536 result[@backingInt(Feature.harden_sls_nocomdat)] = .{
537 .llvm_name = "harden-sls-nocomdat",
538 .description = "Generate thunk code for SLS mitigation in the normal text section",
539 .dependencies = featureSet(&[_]Feature{}),
540 };
541 result[@backingInt(Feature.harden_sls_retbr)] = .{
542 .llvm_name = "harden-sls-retbr",
543 .description = "Harden against straight line speculation across RETurn and BranchRegister instructions",
544 .dependencies = featureSet(&[_]Feature{}),
545 };
546 result[@backingInt(Feature.has_v4t)] = .{
547 .llvm_name = "v4t",
548 .description = "Support ARM v4T instructions",
549 .dependencies = featureSet(&[_]Feature{}),
550 };
551 result[@backingInt(Feature.has_v5t)] = .{
552 .llvm_name = "v5t",
553 .description = "Support ARM v5T instructions",
554 .dependencies = featureSet(&[_]Feature{
555 .has_v4t,
556 }),
557 };
558 result[@backingInt(Feature.has_v5te)] = .{
559 .llvm_name = "v5te",
560 .description = "Support ARM v5TE, v5TEj, and v5TExp instructions",
561 .dependencies = featureSet(&[_]Feature{
562 .has_v5t,
563 }),
564 };
565 result[@backingInt(Feature.has_v6)] = .{
566 .llvm_name = "v6",
567 .description = "Support ARM v6 instructions",
568 .dependencies = featureSet(&[_]Feature{
569 .has_v5te,
570 }),
571 };
572 result[@backingInt(Feature.has_v6k)] = .{
573 .llvm_name = "v6k",
574 .description = "Support ARM v6k instructions",
575 .dependencies = featureSet(&[_]Feature{
576 .has_v6,
577 }),
578 };
579 result[@backingInt(Feature.has_v6m)] = .{
580 .llvm_name = "v6m",
581 .description = "Support ARM v6M instructions",
582 .dependencies = featureSet(&[_]Feature{
583 .has_v6,
584 }),
585 };
586 result[@backingInt(Feature.has_v6t2)] = .{
587 .llvm_name = "v6t2",
588 .description = "Support ARM v6t2 instructions",
589 .dependencies = featureSet(&[_]Feature{
590 .has_v6k,
591 .has_v8m,
592 .thumb2,
593 }),
594 };
595 result[@backingInt(Feature.has_v7)] = .{
596 .llvm_name = "v7",
597 .description = "Support ARM v7 instructions",
598 .dependencies = featureSet(&[_]Feature{
599 .has_v6t2,
600 .has_v7clrex,
601 }),
602 };
603 result[@backingInt(Feature.has_v7clrex)] = .{
604 .llvm_name = "v7clrex",
605 .description = "Has v7 clrex instruction",
606 .dependencies = featureSet(&[_]Feature{}),
607 };
608 result[@backingInt(Feature.has_v8)] = .{
609 .llvm_name = "v8",
610 .description = "Support ARM v8 instructions",
611 .dependencies = featureSet(&[_]Feature{
612 .acquire_release,
613 .has_v7,
614 .perfmon,
615 }),
616 };
617 result[@backingInt(Feature.has_v8_1a)] = .{
618 .llvm_name = "v8.1a",
619 .description = "Support ARM v8.1a instructions",
620 .dependencies = featureSet(&[_]Feature{
621 .has_v8,
622 }),
623 };
624 result[@backingInt(Feature.has_v8_1m_main)] = .{
625 .llvm_name = "v8.1m.main",
626 .description = "Support ARM v8-1M Mainline instructions",
627 .dependencies = featureSet(&[_]Feature{
628 .has_v8m_main,
629 }),
630 };
631 result[@backingInt(Feature.has_v8_2a)] = .{
632 .llvm_name = "v8.2a",
633 .description = "Support ARM v8.2a instructions",
634 .dependencies = featureSet(&[_]Feature{
635 .has_v8_1a,
636 }),
637 };
638 result[@backingInt(Feature.has_v8_3a)] = .{
639 .llvm_name = "v8.3a",
640 .description = "Support ARM v8.3a instructions",
641 .dependencies = featureSet(&[_]Feature{
642 .has_v8_2a,
643 }),
644 };
645 result[@backingInt(Feature.has_v8_4a)] = .{
646 .llvm_name = "v8.4a",
647 .description = "Support ARM v8.4a instructions",
648 .dependencies = featureSet(&[_]Feature{
649 .dotprod,
650 .has_v8_3a,
651 }),
652 };
653 result[@backingInt(Feature.has_v8_5a)] = .{
654 .llvm_name = "v8.5a",
655 .description = "Support ARM v8.5a instructions",
656 .dependencies = featureSet(&[_]Feature{
657 .has_v8_4a,
658 .sb,
659 }),
660 };
661 result[@backingInt(Feature.has_v8_6a)] = .{
662 .llvm_name = "v8.6a",
663 .description = "Support ARM v8.6a instructions",
664 .dependencies = featureSet(&[_]Feature{
665 .bf16,
666 .has_v8_5a,
667 .i8mm,
668 }),
669 };
670 result[@backingInt(Feature.has_v8_7a)] = .{
671 .llvm_name = "v8.7a",
672 .description = "Support ARM v8.7a instructions",
673 .dependencies = featureSet(&[_]Feature{
674 .has_v8_6a,
675 }),
676 };
677 result[@backingInt(Feature.has_v8_8a)] = .{
678 .llvm_name = "v8.8a",
679 .description = "Support ARM v8.8a instructions",
680 .dependencies = featureSet(&[_]Feature{
681 .has_v8_7a,
682 }),
683 };
684 result[@backingInt(Feature.has_v8_9a)] = .{
685 .llvm_name = "v8.9a",
686 .description = "Support ARM v8.9a instructions",
687 .dependencies = featureSet(&[_]Feature{
688 .clrbhb,
689 .has_v8_8a,
690 }),
691 };
692 result[@backingInt(Feature.has_v8m)] = .{
693 .llvm_name = "v8m",
694 .description = "Support ARM v8M Baseline instructions",
695 .dependencies = featureSet(&[_]Feature{
696 .has_v6m,
697 }),
698 };
699 result[@backingInt(Feature.has_v8m_main)] = .{
700 .llvm_name = "v8m.main",
701 .description = "Support ARM v8M Mainline instructions",
702 .dependencies = featureSet(&[_]Feature{
703 .has_v7,
704 }),
705 };
706 result[@backingInt(Feature.has_v9_1a)] = .{
707 .llvm_name = "v9.1a",
708 .description = "Support ARM v9.1a instructions",
709 .dependencies = featureSet(&[_]Feature{
710 .has_v8_6a,
711 .has_v9a,
712 }),
713 };
714 result[@backingInt(Feature.has_v9_2a)] = .{
715 .llvm_name = "v9.2a",
716 .description = "Support ARM v9.2a instructions",
717 .dependencies = featureSet(&[_]Feature{
718 .has_v8_7a,
719 .has_v9_1a,
720 }),
721 };
722 result[@backingInt(Feature.has_v9_3a)] = .{
723 .llvm_name = "v9.3a",
724 .description = "Support ARM v9.3a instructions",
725 .dependencies = featureSet(&[_]Feature{
726 .has_v8_8a,
727 .has_v9_2a,
728 }),
729 };
730 result[@backingInt(Feature.has_v9_4a)] = .{
731 .llvm_name = "v9.4a",
732 .description = "Support ARM v9.4a instructions",
733 .dependencies = featureSet(&[_]Feature{
734 .has_v8_9a,
735 .has_v9_3a,
736 }),
737 };
738 result[@backingInt(Feature.has_v9_5a)] = .{
739 .llvm_name = "v9.5a",
740 .description = "Support ARM v9.5a instructions",
741 .dependencies = featureSet(&[_]Feature{
742 .has_v9_4a,
743 }),
744 };
745 result[@backingInt(Feature.has_v9_6a)] = .{
746 .llvm_name = "v9.6a",
747 .description = "Support ARM v9.6a instructions",
748 .dependencies = featureSet(&[_]Feature{
749 .has_v9_5a,
750 }),
751 };
752 result[@backingInt(Feature.has_v9_7a)] = .{
753 .llvm_name = "v9.7a",
754 .description = "Support ARM v9.7a instructions",
755 .dependencies = featureSet(&[_]Feature{
756 .has_v9_6a,
757 }),
758 };
759 result[@backingInt(Feature.has_v9a)] = .{
760 .llvm_name = "v9a",
761 .description = "Support ARM v9a instructions",
762 .dependencies = featureSet(&[_]Feature{
763 .has_v8_5a,
764 }),
765 };
766 result[@backingInt(Feature.hwdiv)] = .{
767 .llvm_name = "hwdiv",
768 .description = "Enable divide instructions in Thumb",
769 .dependencies = featureSet(&[_]Feature{}),
770 };
771 result[@backingInt(Feature.hwdiv_arm)] = .{
772 .llvm_name = "hwdiv-arm",
773 .description = "Enable divide instructions in ARM mode",
774 .dependencies = featureSet(&[_]Feature{}),
775 };
776 result[@backingInt(Feature.i8mm)] = .{
777 .llvm_name = "i8mm",
778 .description = "Enable Matrix Multiply Int8 Extension",
779 .dependencies = featureSet(&[_]Feature{
780 .neon,
781 }),
782 };
783 result[@backingInt(Feature.iwmmxt)] = .{
784 .llvm_name = "iwmmxt",
785 .description = "ARMv5te architecture",
786 .dependencies = featureSet(&[_]Feature{
787 .v5te,
788 }),
789 };
790 result[@backingInt(Feature.iwmmxt2)] = .{
791 .llvm_name = "iwmmxt2",
792 .description = "ARMv5te architecture",
793 .dependencies = featureSet(&[_]Feature{
794 .v5te,
795 }),
796 };
797 result[@backingInt(Feature.lob)] = .{
798 .llvm_name = "lob",
799 .description = "Enable Low Overhead Branch extensions",
800 .dependencies = featureSet(&[_]Feature{}),
801 };
802 result[@backingInt(Feature.long_calls)] = .{
803 .llvm_name = "long-calls",
804 .description = "Generate calls via indirect call instructions",
805 .dependencies = featureSet(&[_]Feature{}),
806 };
807 result[@backingInt(Feature.loop_align)] = .{
808 .llvm_name = "loop-align",
809 .description = "Prefer 32-bit alignment for branch targets",
810 .dependencies = featureSet(&[_]Feature{}),
811 };
812 result[@backingInt(Feature.m55)] = .{
813 .llvm_name = "m55",
814 .description = "Cortex-M55 ARM processors",
815 .dependencies = featureSet(&[_]Feature{}),
816 };
817 result[@backingInt(Feature.m85)] = .{
818 .llvm_name = "m85",
819 .description = "Cortex-M85 ARM processors",
820 .dependencies = featureSet(&[_]Feature{}),
821 };
822 result[@backingInt(Feature.mclass)] = .{
823 .llvm_name = "mclass",
824 .description = "Is microcontroller profile ('M' series)",
825 .dependencies = featureSet(&[_]Feature{}),
826 };
827 result[@backingInt(Feature.mp)] = .{
828 .llvm_name = "mp",
829 .description = "Supports Multiprocessing extension",
830 .dependencies = featureSet(&[_]Feature{}),
831 };
832 result[@backingInt(Feature.muxed_units)] = .{
833 .llvm_name = "muxed-units",
834 .description = "Has muxed AGU and NEON/FPU",
835 .dependencies = featureSet(&[_]Feature{}),
836 };
837 result[@backingInt(Feature.mve)] = .{
838 .llvm_name = "mve",
839 .description = "Support M-Class Vector Extension with integer ops",
840 .dependencies = featureSet(&[_]Feature{
841 .dsp,
842 .fpregs16,
843 .fpregs64,
844 .has_v8_1m_main,
845 }),
846 };
847 result[@backingInt(Feature.mve1beat)] = .{
848 .llvm_name = "mve1beat",
849 .description = "Model MVE instructions as a 1 beat per tick architecture",
850 .dependencies = featureSet(&[_]Feature{}),
851 };
852 result[@backingInt(Feature.mve2beat)] = .{
853 .llvm_name = "mve2beat",
854 .description = "Model MVE instructions as a 2 beats per tick architecture",
855 .dependencies = featureSet(&[_]Feature{}),
856 };
857 result[@backingInt(Feature.mve4beat)] = .{
858 .llvm_name = "mve4beat",
859 .description = "Model MVE instructions as a 4 beats per tick architecture",
860 .dependencies = featureSet(&[_]Feature{}),
861 };
862 result[@backingInt(Feature.mve_fp)] = .{
863 .llvm_name = "mve.fp",
864 .description = "Support M-Class Vector Extension with integer and floating ops",
865 .dependencies = featureSet(&[_]Feature{
866 .fullfp16,
867 .mve,
868 }),
869 };
870 result[@backingInt(Feature.neon)] = .{
871 .llvm_name = "neon",
872 .description = "Enable NEON instructions",
873 .dependencies = featureSet(&[_]Feature{
874 .vfp3,
875 }),
876 };
877 result[@backingInt(Feature.neon_fpmovs)] = .{
878 .llvm_name = "neon-fpmovs",
879 .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
880 .dependencies = featureSet(&[_]Feature{}),
881 };
882 result[@backingInt(Feature.neonfp)] = .{
883 .llvm_name = "neonfp",
884 .description = "Use NEON for single precision FP",
885 .dependencies = featureSet(&[_]Feature{}),
886 };
887 result[@backingInt(Feature.no_branch_predictor)] = .{
888 .llvm_name = "no-branch-predictor",
889 .description = "Has no branch predictor",
890 .dependencies = featureSet(&[_]Feature{}),
891 };
892 result[@backingInt(Feature.no_bti_at_return_twice)] = .{
893 .llvm_name = "no-bti-at-return-twice",
894 .description = "Don't place a BTI instruction after a return-twice",
895 .dependencies = featureSet(&[_]Feature{}),
896 };
897 result[@backingInt(Feature.no_movt)] = .{
898 .llvm_name = "no-movt",
899 .description = "Don't use movt/movw pairs for 32-bit imms",
900 .dependencies = featureSet(&[_]Feature{}),
901 };
902 result[@backingInt(Feature.no_neg_immediates)] = .{
903 .llvm_name = "no-neg-immediates",
904 .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
905 .dependencies = featureSet(&[_]Feature{}),
906 };
907 result[@backingInt(Feature.noarm)] = .{
908 .llvm_name = "noarm",
909 .description = "Does not support ARM mode execution",
910 .dependencies = featureSet(&[_]Feature{}),
911 };
912 result[@backingInt(Feature.nonpipelined_vfp)] = .{
913 .llvm_name = "nonpipelined-vfp",
914 .description = "VFP instructions are not pipelined",
915 .dependencies = featureSet(&[_]Feature{}),
916 };
917 result[@backingInt(Feature.pacbti)] = .{
918 .llvm_name = "pacbti",
919 .description = "Enable Pointer Authentication and Branch Target Identification",
920 .dependencies = featureSet(&[_]Feature{}),
921 };
922 result[@backingInt(Feature.perfmon)] = .{
923 .llvm_name = "perfmon",
924 .description = "Enable support for Performance Monitor extensions",
925 .dependencies = featureSet(&[_]Feature{}),
926 };
927 result[@backingInt(Feature.prefer_ishst)] = .{
928 .llvm_name = "prefer-ishst",
929 .description = "Prefer ISHST barriers",
930 .dependencies = featureSet(&[_]Feature{}),
931 };
932 result[@backingInt(Feature.prefer_vmovsr)] = .{
933 .llvm_name = "prefer-vmovsr",
934 .description = "Prefer VMOVSR",
935 .dependencies = featureSet(&[_]Feature{}),
936 };
937 result[@backingInt(Feature.prof_unpr)] = .{
938 .llvm_name = "prof-unpr",
939 .description = "Is profitable to unpredicate",
940 .dependencies = featureSet(&[_]Feature{}),
941 };
942 result[@backingInt(Feature.ras)] = .{
943 .llvm_name = "ras",
944 .description = "Enable Reliability, Availability and Serviceability extensions",
945 .dependencies = featureSet(&[_]Feature{}),
946 };
947 result[@backingInt(Feature.rclass)] = .{
948 .llvm_name = "rclass",
949 .description = "Is realtime profile ('R' series)",
950 .dependencies = featureSet(&[_]Feature{}),
951 };
952 result[@backingInt(Feature.read_tp_tpidrprw)] = .{
953 .llvm_name = "read-tp-tpidrprw",
954 .description = "Reading thread pointer from TPIDRPRW register",
955 .dependencies = featureSet(&[_]Feature{}),
956 };
957 result[@backingInt(Feature.read_tp_tpidruro)] = .{
958 .llvm_name = "read-tp-tpidruro",
959 .description = "Reading thread pointer from TPIDRURO register",
960 .dependencies = featureSet(&[_]Feature{}),
961 };
962 result[@backingInt(Feature.read_tp_tpidrurw)] = .{
963 .llvm_name = "read-tp-tpidrurw",
964 .description = "Reading thread pointer from TPIDRURW register",
965 .dependencies = featureSet(&[_]Feature{}),
966 };
967 result[@backingInt(Feature.reserve_r9)] = .{
968 .llvm_name = "reserve-r9",
969 .description = "Reserve R9, making it unavailable as GPR",
970 .dependencies = featureSet(&[_]Feature{}),
971 };
972 result[@backingInt(Feature.ret_addr_stack)] = .{
973 .llvm_name = "ret-addr-stack",
974 .description = "Has return address stack",
975 .dependencies = featureSet(&[_]Feature{}),
976 };
977 result[@backingInt(Feature.sb)] = .{
978 .llvm_name = "sb",
979 .description = "Enable v8.5a Speculation Barrier",
980 .dependencies = featureSet(&[_]Feature{}),
981 };
982 result[@backingInt(Feature.sha2)] = .{
983 .llvm_name = "sha2",
984 .description = "Enable SHA1 and SHA256 support",
985 .dependencies = featureSet(&[_]Feature{
986 .neon,
987 }),
988 };
989 result[@backingInt(Feature.slow_fp_brcc)] = .{
990 .llvm_name = "slow-fp-brcc",
991 .description = "FP compare + branch is slow",
992 .dependencies = featureSet(&[_]Feature{}),
993 };
994 result[@backingInt(Feature.slow_load_D_subreg)] = .{
995 .llvm_name = "slow-load-D-subreg",
996 .description = "Loading into D subregs is slow",
997 .dependencies = featureSet(&[_]Feature{}),
998 };
999 result[@backingInt(Feature.slow_odd_reg)] = .{
1000 .llvm_name = "slow-odd-reg",
1001 .description = "VLDM/VSTM starting with an odd register is slow",
1002 .dependencies = featureSet(&[_]Feature{}),
1003 };
1004 result[@backingInt(Feature.slow_vdup32)] = .{
1005 .llvm_name = "slow-vdup32",
1006 .description = "Has slow VDUP32 - prefer VMOV",
1007 .dependencies = featureSet(&[_]Feature{}),
1008 };
1009 result[@backingInt(Feature.slow_vgetlni32)] = .{
1010 .llvm_name = "slow-vgetlni32",
1011 .description = "Has slow VGETLNi32 - prefer VMOV",
1012 .dependencies = featureSet(&[_]Feature{}),
1013 };
1014 result[@backingInt(Feature.slowfpvfmx)] = .{
1015 .llvm_name = "slowfpvfmx",
1016 .description = "Disable VFP / NEON FMA instructions",
1017 .dependencies = featureSet(&[_]Feature{}),
1018 };
1019 result[@backingInt(Feature.slowfpvmlx)] = .{
1020 .llvm_name = "slowfpvmlx",
1021 .description = "Disable VFP / NEON MAC instructions",
1022 .dependencies = featureSet(&[_]Feature{}),
1023 };
1024 result[@backingInt(Feature.soft_float)] = .{
1025 .llvm_name = "soft-float",
1026 .description = "Use software floating point features.",
1027 .dependencies = featureSet(&[_]Feature{}),
1028 };
1029 result[@backingInt(Feature.splat_vfp_neon)] = .{
1030 .llvm_name = "splat-vfp-neon",
1031 .description = "Splat register from VFP to NEON",
1032 .dependencies = featureSet(&[_]Feature{
1033 .dont_widen_vmovs,
1034 }),
1035 };
1036 result[@backingInt(Feature.strict_align)] = .{
1037 .llvm_name = "strict-align",
1038 .description = "Disallow all unaligned memory access",
1039 .dependencies = featureSet(&[_]Feature{}),
1040 };
1041 result[@backingInt(Feature.thumb2)] = .{
1042 .llvm_name = "thumb2",
1043 .description = "Enable Thumb2 instructions",
1044 .dependencies = featureSet(&[_]Feature{}),
1045 };
1046 result[@backingInt(Feature.thumb_mode)] = .{
1047 .llvm_name = "thumb-mode",
1048 .description = "Thumb mode",
1049 .dependencies = featureSet(&[_]Feature{}),
1050 };
1051 result[@backingInt(Feature.trustzone)] = .{
1052 .llvm_name = "trustzone",
1053 .description = "Enable support for TrustZone security extensions",
1054 .dependencies = featureSet(&[_]Feature{}),
1055 };
1056 result[@backingInt(Feature.use_mipipeliner)] = .{
1057 .llvm_name = "use-mipipeliner",
1058 .description = "Use the MachinePipeliner",
1059 .dependencies = featureSet(&[_]Feature{}),
1060 };
1061 result[@backingInt(Feature.use_misched)] = .{
1062 .llvm_name = "use-misched",
1063 .description = "Use the MachineScheduler",
1064 .dependencies = featureSet(&[_]Feature{}),
1065 };
1066 result[@backingInt(Feature.v2)] = .{
1067 .llvm_name = null,
1068 .description = "ARMv2 architecture",
1069 .dependencies = featureSet(&[_]Feature{
1070 .strict_align,
1071 }),
1072 };
1073 result[@backingInt(Feature.v2a)] = .{
1074 .llvm_name = null,
1075 .description = "ARMv2a architecture",
1076 .dependencies = featureSet(&[_]Feature{
1077 .strict_align,
1078 }),
1079 };
1080 result[@backingInt(Feature.v3)] = .{
1081 .llvm_name = null,
1082 .description = "ARMv3 architecture",
1083 .dependencies = featureSet(&[_]Feature{
1084 .strict_align,
1085 }),
1086 };
1087 result[@backingInt(Feature.v3m)] = .{
1088 .llvm_name = null,
1089 .description = "ARMv3m architecture",
1090 .dependencies = featureSet(&[_]Feature{
1091 .strict_align,
1092 }),
1093 };
1094 result[@backingInt(Feature.v4)] = .{
1095 .llvm_name = "armv4",
1096 .description = "ARMv4 architecture",
1097 .dependencies = featureSet(&[_]Feature{
1098 .strict_align,
1099 }),
1100 };
1101 result[@backingInt(Feature.v4t)] = .{
1102 .llvm_name = "armv4t",
1103 .description = "ARMv4t architecture",
1104 .dependencies = featureSet(&[_]Feature{
1105 .has_v4t,
1106 .strict_align,
1107 }),
1108 };
1109 result[@backingInt(Feature.v5t)] = .{
1110 .llvm_name = "armv5t",
1111 .description = "ARMv5t architecture",
1112 .dependencies = featureSet(&[_]Feature{
1113 .has_v5t,
1114 .strict_align,
1115 }),
1116 };
1117 result[@backingInt(Feature.v5te)] = .{
1118 .llvm_name = "armv5te",
1119 .description = "ARMv5te architecture",
1120 .dependencies = featureSet(&[_]Feature{
1121 .has_v5te,
1122 .strict_align,
1123 }),
1124 };
1125 result[@backingInt(Feature.v5tej)] = .{
1126 .llvm_name = "armv5tej",
1127 .description = "ARMv5tej architecture",
1128 .dependencies = featureSet(&[_]Feature{
1129 .has_v5te,
1130 .strict_align,
1131 }),
1132 };
1133 result[@backingInt(Feature.v6)] = .{
1134 .llvm_name = "armv6",
1135 .description = "ARMv6 architecture",
1136 .dependencies = featureSet(&[_]Feature{
1137 .dsp,
1138 .has_v6,
1139 }),
1140 };
1141 result[@backingInt(Feature.v6j)] = .{
1142 .llvm_name = "armv6j",
1143 .description = "ARMv7a architecture",
1144 .dependencies = featureSet(&[_]Feature{
1145 .v6,
1146 }),
1147 };
1148 result[@backingInt(Feature.v6k)] = .{
1149 .llvm_name = "armv6k",
1150 .description = "ARMv6k architecture",
1151 .dependencies = featureSet(&[_]Feature{
1152 .has_v6k,
1153 }),
1154 };
1155 result[@backingInt(Feature.v6kz)] = .{
1156 .llvm_name = "armv6kz",
1157 .description = "ARMv6kz architecture",
1158 .dependencies = featureSet(&[_]Feature{
1159 .has_v6k,
1160 .trustzone,
1161 }),
1162 };
1163 result[@backingInt(Feature.v6m)] = .{
1164 .llvm_name = "armv6-m",
1165 .description = "ARMv6m architecture",
1166 .dependencies = featureSet(&[_]Feature{
1167 .db,
1168 .has_v6m,
1169 .mclass,
1170 .noarm,
1171 .strict_align,
1172 .thumb_mode,
1173 }),
1174 };
1175 result[@backingInt(Feature.v6sm)] = .{
1176 .llvm_name = "armv6s-m",
1177 .description = "ARMv6sm architecture",
1178 .dependencies = featureSet(&[_]Feature{
1179 .db,
1180 .has_v6m,
1181 .mclass,
1182 .noarm,
1183 .strict_align,
1184 .thumb_mode,
1185 }),
1186 };
1187 result[@backingInt(Feature.v6t2)] = .{
1188 .llvm_name = "armv6t2",
1189 .description = "ARMv6t2 architecture",
1190 .dependencies = featureSet(&[_]Feature{
1191 .dsp,
1192 .has_v6t2,
1193 }),
1194 };
1195 result[@backingInt(Feature.v7a)] = .{
1196 .llvm_name = "armv7-a",
1197 .description = "ARMv7a architecture",
1198 .dependencies = featureSet(&[_]Feature{
1199 .aclass,
1200 .db,
1201 .dsp,
1202 .has_v7,
1203 .neon,
1204 .perfmon,
1205 }),
1206 };
1207 result[@backingInt(Feature.v7em)] = .{
1208 .llvm_name = "armv7e-m",
1209 .description = "ARMv7em architecture",
1210 .dependencies = featureSet(&[_]Feature{
1211 .db,
1212 .dsp,
1213 .has_v7,
1214 .hwdiv,
1215 .mclass,
1216 .noarm,
1217 .thumb_mode,
1218 }),
1219 };
1220 result[@backingInt(Feature.v7m)] = .{
1221 .llvm_name = "armv7-m",
1222 .description = "ARMv7m architecture",
1223 .dependencies = featureSet(&[_]Feature{
1224 .db,
1225 .has_v7,
1226 .hwdiv,
1227 .mclass,
1228 .noarm,
1229 .thumb_mode,
1230 }),
1231 };
1232 result[@backingInt(Feature.v7r)] = .{
1233 .llvm_name = "armv7-r",
1234 .description = "ARMv7r architecture",
1235 .dependencies = featureSet(&[_]Feature{
1236 .db,
1237 .dsp,
1238 .has_v7,
1239 .hwdiv,
1240 .perfmon,
1241 .rclass,
1242 }),
1243 };
1244 result[@backingInt(Feature.v7ve)] = .{
1245 .llvm_name = "armv7ve",
1246 .description = "ARMv7ve architecture",
1247 .dependencies = featureSet(&[_]Feature{
1248 .aclass,
1249 .db,
1250 .dsp,
1251 .has_v7,
1252 .mp,
1253 .neon,
1254 .perfmon,
1255 .trustzone,
1256 .virtualization,
1257 }),
1258 };
1259 result[@backingInt(Feature.v8_1a)] = .{
1260 .llvm_name = "armv8.1-a",
1261 .description = "ARMv81a architecture",
1262 .dependencies = featureSet(&[_]Feature{
1263 .aclass,
1264 .crc,
1265 .crypto,
1266 .db,
1267 .dsp,
1268 .fp_armv8,
1269 .has_v8_1a,
1270 .mp,
1271 .trustzone,
1272 .virtualization,
1273 }),
1274 };
1275 result[@backingInt(Feature.v8_1m_main)] = .{
1276 .llvm_name = "armv8.1-m.main",
1277 .description = "ARMv81mMainline architecture",
1278 .dependencies = featureSet(&[_]Feature{
1279 .@"8msecext",
1280 .acquire_release,
1281 .db,
1282 .has_v8_1m_main,
1283 .hwdiv,
1284 .lob,
1285 .mclass,
1286 .noarm,
1287 .ras,
1288 .thumb_mode,
1289 }),
1290 };
1291 result[@backingInt(Feature.v8_2a)] = .{
1292 .llvm_name = "armv8.2-a",
1293 .description = "ARMv82a architecture",
1294 .dependencies = featureSet(&[_]Feature{
1295 .aclass,
1296 .crc,
1297 .crypto,
1298 .db,
1299 .dsp,
1300 .fp_armv8,
1301 .has_v8_2a,
1302 .mp,
1303 .ras,
1304 .trustzone,
1305 .virtualization,
1306 }),
1307 };
1308 result[@backingInt(Feature.v8_3a)] = .{
1309 .llvm_name = "armv8.3-a",
1310 .description = "ARMv83a architecture",
1311 .dependencies = featureSet(&[_]Feature{
1312 .aclass,
1313 .crc,
1314 .crypto,
1315 .db,
1316 .dsp,
1317 .fp_armv8,
1318 .has_v8_3a,
1319 .mp,
1320 .ras,
1321 .trustzone,
1322 .virtualization,
1323 }),
1324 };
1325 result[@backingInt(Feature.v8_4a)] = .{
1326 .llvm_name = "armv8.4-a",
1327 .description = "ARMv84a architecture",
1328 .dependencies = featureSet(&[_]Feature{
1329 .aclass,
1330 .crc,
1331 .crypto,
1332 .db,
1333 .dsp,
1334 .fp_armv8,
1335 .has_v8_4a,
1336 .mp,
1337 .ras,
1338 .trustzone,
1339 .virtualization,
1340 }),
1341 };
1342 result[@backingInt(Feature.v8_5a)] = .{
1343 .llvm_name = "armv8.5-a",
1344 .description = "ARMv85a architecture",
1345 .dependencies = featureSet(&[_]Feature{
1346 .aclass,
1347 .crc,
1348 .crypto,
1349 .db,
1350 .dsp,
1351 .fp_armv8,
1352 .has_v8_5a,
1353 .mp,
1354 .ras,
1355 .trustzone,
1356 .virtualization,
1357 }),
1358 };
1359 result[@backingInt(Feature.v8_6a)] = .{
1360 .llvm_name = "armv8.6-a",
1361 .description = "ARMv86a architecture",
1362 .dependencies = featureSet(&[_]Feature{
1363 .aclass,
1364 .crc,
1365 .crypto,
1366 .db,
1367 .dsp,
1368 .fp_armv8,
1369 .has_v8_6a,
1370 .mp,
1371 .ras,
1372 .trustzone,
1373 .virtualization,
1374 }),
1375 };
1376 result[@backingInt(Feature.v8_7a)] = .{
1377 .llvm_name = "armv8.7-a",
1378 .description = "ARMv87a architecture",
1379 .dependencies = featureSet(&[_]Feature{
1380 .aclass,
1381 .crc,
1382 .crypto,
1383 .db,
1384 .dsp,
1385 .fp_armv8,
1386 .has_v8_7a,
1387 .mp,
1388 .ras,
1389 .trustzone,
1390 .virtualization,
1391 }),
1392 };
1393 result[@backingInt(Feature.v8_8a)] = .{
1394 .llvm_name = "armv8.8-a",
1395 .description = "ARMv88a architecture",
1396 .dependencies = featureSet(&[_]Feature{
1397 .aclass,
1398 .crc,
1399 .crypto,
1400 .db,
1401 .dsp,
1402 .fp_armv8,
1403 .has_v8_8a,
1404 .mp,
1405 .ras,
1406 .trustzone,
1407 .virtualization,
1408 }),
1409 };
1410 result[@backingInt(Feature.v8_9a)] = .{
1411 .llvm_name = "armv8.9-a",
1412 .description = "ARMv89a architecture",
1413 .dependencies = featureSet(&[_]Feature{
1414 .aclass,
1415 .crc,
1416 .crypto,
1417 .db,
1418 .dsp,
1419 .fp_armv8,
1420 .has_v8_9a,
1421 .mp,
1422 .ras,
1423 .trustzone,
1424 .virtualization,
1425 }),
1426 };
1427 result[@backingInt(Feature.v8a)] = .{
1428 .llvm_name = "armv8-a",
1429 .description = "ARMv8a architecture",
1430 .dependencies = featureSet(&[_]Feature{
1431 .aclass,
1432 .crc,
1433 .crypto,
1434 .db,
1435 .dsp,
1436 .fp_armv8,
1437 .has_v8,
1438 .mp,
1439 .trustzone,
1440 .virtualization,
1441 }),
1442 };
1443 result[@backingInt(Feature.v8m)] = .{
1444 .llvm_name = "armv8-m.base",
1445 .description = "ARMv8mBaseline architecture",
1446 .dependencies = featureSet(&[_]Feature{
1447 .@"8msecext",
1448 .acquire_release,
1449 .db,
1450 .has_v7clrex,
1451 .has_v8m,
1452 .hwdiv,
1453 .mclass,
1454 .noarm,
1455 .strict_align,
1456 .thumb_mode,
1457 }),
1458 };
1459 result[@backingInt(Feature.v8m_main)] = .{
1460 .llvm_name = "armv8-m.main",
1461 .description = "ARMv8mMainline architecture",
1462 .dependencies = featureSet(&[_]Feature{
1463 .@"8msecext",
1464 .acquire_release,
1465 .db,
1466 .has_v8m_main,
1467 .hwdiv,
1468 .mclass,
1469 .noarm,
1470 .thumb_mode,
1471 }),
1472 };
1473 result[@backingInt(Feature.v8r)] = .{
1474 .llvm_name = "armv8-r",
1475 .description = "ARMv8r architecture",
1476 .dependencies = featureSet(&[_]Feature{
1477 .crc,
1478 .db,
1479 .dfb,
1480 .dsp,
1481 .fp_armv8d16sp,
1482 .has_v8,
1483 .mp,
1484 .rclass,
1485 .virtualization,
1486 }),
1487 };
1488 result[@backingInt(Feature.v9_1a)] = .{
1489 .llvm_name = "armv9.1-a",
1490 .description = "ARMv91a architecture",
1491 .dependencies = featureSet(&[_]Feature{
1492 .aclass,
1493 .crc,
1494 .db,
1495 .dsp,
1496 .fp_armv8,
1497 .has_v9_1a,
1498 .mp,
1499 .ras,
1500 .trustzone,
1501 .virtualization,
1502 }),
1503 };
1504 result[@backingInt(Feature.v9_2a)] = .{
1505 .llvm_name = "armv9.2-a",
1506 .description = "ARMv92a architecture",
1507 .dependencies = featureSet(&[_]Feature{
1508 .aclass,
1509 .crc,
1510 .db,
1511 .dsp,
1512 .fp_armv8,
1513 .has_v9_2a,
1514 .mp,
1515 .ras,
1516 .trustzone,
1517 .virtualization,
1518 }),
1519 };
1520 result[@backingInt(Feature.v9_3a)] = .{
1521 .llvm_name = "armv9.3-a",
1522 .description = "ARMv93a architecture",
1523 .dependencies = featureSet(&[_]Feature{
1524 .aclass,
1525 .crc,
1526 .crypto,
1527 .db,
1528 .dsp,
1529 .fp_armv8,
1530 .has_v9_3a,
1531 .mp,
1532 .ras,
1533 .trustzone,
1534 .virtualization,
1535 }),
1536 };
1537 result[@backingInt(Feature.v9_4a)] = .{
1538 .llvm_name = "armv9.4-a",
1539 .description = "ARMv94a architecture",
1540 .dependencies = featureSet(&[_]Feature{
1541 .aclass,
1542 .crc,
1543 .db,
1544 .dsp,
1545 .fp_armv8,
1546 .has_v9_4a,
1547 .mp,
1548 .ras,
1549 .trustzone,
1550 .virtualization,
1551 }),
1552 };
1553 result[@backingInt(Feature.v9_5a)] = .{
1554 .llvm_name = "armv9.5-a",
1555 .description = "ARMv95a architecture",
1556 .dependencies = featureSet(&[_]Feature{
1557 .aclass,
1558 .crc,
1559 .db,
1560 .dsp,
1561 .fp_armv8,
1562 .has_v9_5a,
1563 .mp,
1564 .ras,
1565 .trustzone,
1566 .virtualization,
1567 }),
1568 };
1569 result[@backingInt(Feature.v9_6a)] = .{
1570 .llvm_name = "armv9.6-a",
1571 .description = "ARMv96a architecture",
1572 .dependencies = featureSet(&[_]Feature{
1573 .aclass,
1574 .crc,
1575 .db,
1576 .dsp,
1577 .fp_armv8,
1578 .has_v9_6a,
1579 .mp,
1580 .ras,
1581 .trustzone,
1582 .virtualization,
1583 }),
1584 };
1585 result[@backingInt(Feature.v9_7a)] = .{
1586 .llvm_name = "armv9.7-a",
1587 .description = "ARMv97a architecture",
1588 .dependencies = featureSet(&[_]Feature{
1589 .aclass,
1590 .crc,
1591 .db,
1592 .dsp,
1593 .fp_armv8,
1594 .has_v9_7a,
1595 .mp,
1596 .ras,
1597 .trustzone,
1598 .virtualization,
1599 }),
1600 };
1601 result[@backingInt(Feature.v9a)] = .{
1602 .llvm_name = "armv9-a",
1603 .description = "ARMv9a architecture",
1604 .dependencies = featureSet(&[_]Feature{
1605 .aclass,
1606 .crc,
1607 .db,
1608 .dsp,
1609 .fp_armv8,
1610 .has_v9a,
1611 .mp,
1612 .ras,
1613 .trustzone,
1614 .virtualization,
1615 }),
1616 };
1617 result[@backingInt(Feature.vfp2)] = .{
1618 .llvm_name = "vfp2",
1619 .description = "Enable VFP2 instructions",
1620 .dependencies = featureSet(&[_]Feature{
1621 .fp64,
1622 .vfp2sp,
1623 }),
1624 };
1625 result[@backingInt(Feature.vfp2sp)] = .{
1626 .llvm_name = "vfp2sp",
1627 .description = "Enable VFP2 instructions with no double precision",
1628 .dependencies = featureSet(&[_]Feature{
1629 .fpregs,
1630 }),
1631 };
1632 result[@backingInt(Feature.vfp3)] = .{
1633 .llvm_name = "vfp3",
1634 .description = "Enable VFP3 instructions",
1635 .dependencies = featureSet(&[_]Feature{
1636 .vfp3d16,
1637 .vfp3sp,
1638 }),
1639 };
1640 result[@backingInt(Feature.vfp3d16)] = .{
1641 .llvm_name = "vfp3d16",
1642 .description = "Enable VFP3 instructions with only 16 d-registers",
1643 .dependencies = featureSet(&[_]Feature{
1644 .vfp2,
1645 .vfp3d16sp,
1646 }),
1647 };
1648 result[@backingInt(Feature.vfp3d16sp)] = .{
1649 .llvm_name = "vfp3d16sp",
1650 .description = "Enable VFP3 instructions with only 16 d-registers and no double precision",
1651 .dependencies = featureSet(&[_]Feature{
1652 .vfp2sp,
1653 }),
1654 };
1655 result[@backingInt(Feature.vfp3sp)] = .{
1656 .llvm_name = "vfp3sp",
1657 .description = "Enable VFP3 instructions with no double precision",
1658 .dependencies = featureSet(&[_]Feature{
1659 .d32,
1660 .vfp3d16sp,
1661 }),
1662 };
1663 result[@backingInt(Feature.vfp4)] = .{
1664 .llvm_name = "vfp4",
1665 .description = "Enable VFP4 instructions",
1666 .dependencies = featureSet(&[_]Feature{
1667 .vfp3,
1668 .vfp4d16,
1669 .vfp4sp,
1670 }),
1671 };
1672 result[@backingInt(Feature.vfp4d16)] = .{
1673 .llvm_name = "vfp4d16",
1674 .description = "Enable VFP4 instructions with only 16 d-registers",
1675 .dependencies = featureSet(&[_]Feature{
1676 .vfp3d16,
1677 .vfp4d16sp,
1678 }),
1679 };
1680 result[@backingInt(Feature.vfp4d16sp)] = .{
1681 .llvm_name = "vfp4d16sp",
1682 .description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
1683 .dependencies = featureSet(&[_]Feature{
1684 .fp16,
1685 .vfp3d16sp,
1686 }),
1687 };
1688 result[@backingInt(Feature.vfp4sp)] = .{
1689 .llvm_name = "vfp4sp",
1690 .description = "Enable VFP4 instructions with no double precision",
1691 .dependencies = featureSet(&[_]Feature{
1692 .vfp3sp,
1693 .vfp4d16sp,
1694 }),
1695 };
1696 result[@backingInt(Feature.virtualization)] = .{
1697 .llvm_name = "virtualization",
1698 .description = "Supports Virtualization extension",
1699 .dependencies = featureSet(&[_]Feature{
1700 .hwdiv,
1701 .hwdiv_arm,
1702 }),
1703 };
1704 result[@backingInt(Feature.vldn_align)] = .{
1705 .llvm_name = "vldn-align",
1706 .description = "Check for VLDn unaligned access",
1707 .dependencies = featureSet(&[_]Feature{}),
1708 };
1709 result[@backingInt(Feature.vmlx_forwarding)] = .{
1710 .llvm_name = "vmlx-forwarding",
1711 .description = "Has multiplier accumulator forwarding",
1712 .dependencies = featureSet(&[_]Feature{}),
1713 };
1714 result[@backingInt(Feature.vmlx_hazards)] = .{
1715 .llvm_name = "vmlx-hazards",
1716 .description = "Has VMLx hazards",
1717 .dependencies = featureSet(&[_]Feature{}),
1718 };
1719 result[@backingInt(Feature.wide_stride_vfp)] = .{
1720 .llvm_name = "wide-stride-vfp",
1721 .description = "Use a wide stride when allocating VFP registers",
1722 .dependencies = featureSet(&[_]Feature{}),
1723 };
1724 result[@backingInt(Feature.xscale)] = .{
1725 .llvm_name = "xscale",
1726 .description = "ARMv5te architecture",
1727 .dependencies = featureSet(&[_]Feature{
1728 .v5te,
1729 }),
1730 };
1731 result[@backingInt(Feature.zcz)] = .{
1732 .llvm_name = "zcz",
1733 .description = "Has zero-cycle zeroing instructions",
1734 .dependencies = featureSet(&[_]Feature{}),
1735 };
1736 const ti = @typeInfo(Feature);
1737 for (&result, 0..) |*elem, i| {
1738 elem.index = i;
1739 elem.name = ti.@"enum".field_names[i];
1740 }
1741 break :blk result;
1742};
1743
1744pub const cpu = struct {
1745 pub const arm1020e: CpuModel = .{
1746 .name = "arm1020e",
1747 .llvm_name = "arm1020e",
1748 .features = featureSet(&[_]Feature{
1749 .v5te,
1750 }),
1751 };
1752 pub const arm1020t: CpuModel = .{
1753 .name = "arm1020t",
1754 .llvm_name = "arm1020t",
1755 .features = featureSet(&[_]Feature{
1756 .v5t,
1757 }),
1758 };
1759 pub const arm1022e: CpuModel = .{
1760 .name = "arm1022e",
1761 .llvm_name = "arm1022e",
1762 .features = featureSet(&[_]Feature{
1763 .v5te,
1764 }),
1765 };
1766 pub const arm10e: CpuModel = .{
1767 .name = "arm10e",
1768 .llvm_name = "arm10e",
1769 .features = featureSet(&[_]Feature{
1770 .v5te,
1771 }),
1772 };
1773 pub const arm10tdmi: CpuModel = .{
1774 .name = "arm10tdmi",
1775 .llvm_name = "arm10tdmi",
1776 .features = featureSet(&[_]Feature{
1777 .v5t,
1778 }),
1779 };
1780 pub const arm1136j_s: CpuModel = .{
1781 .name = "arm1136j_s",
1782 .llvm_name = "arm1136j-s",
1783 .features = featureSet(&[_]Feature{
1784 .v6,
1785 }),
1786 };
1787 pub const arm1136jf_s: CpuModel = .{
1788 .name = "arm1136jf_s",
1789 .llvm_name = "arm1136jf-s",
1790 .features = featureSet(&[_]Feature{
1791 .slowfpvmlx,
1792 .v6,
1793 .vfp2,
1794 }),
1795 };
1796 pub const arm1156t2_s: CpuModel = .{
1797 .name = "arm1156t2_s",
1798 .llvm_name = "arm1156t2-s",
1799 .features = featureSet(&[_]Feature{
1800 .v6t2,
1801 }),
1802 };
1803 pub const arm1156t2f_s: CpuModel = .{
1804 .name = "arm1156t2f_s",
1805 .llvm_name = "arm1156t2f-s",
1806 .features = featureSet(&[_]Feature{
1807 .slowfpvmlx,
1808 .v6t2,
1809 .vfp2,
1810 }),
1811 };
1812 pub const arm1176jz_s: CpuModel = .{
1813 .name = "arm1176jz_s",
1814 .llvm_name = "arm1176jz-s",
1815 .features = featureSet(&[_]Feature{
1816 .v6kz,
1817 }),
1818 };
1819 pub const arm1176jzf_s: CpuModel = .{
1820 .name = "arm1176jzf_s",
1821 .llvm_name = "arm1176jzf-s",
1822 .features = featureSet(&[_]Feature{
1823 .slowfpvmlx,
1824 .v6kz,
1825 .vfp2,
1826 }),
1827 };
1828 pub const arm710t: CpuModel = .{
1829 .name = "arm710t",
1830 .llvm_name = "arm710t",
1831 .features = featureSet(&[_]Feature{
1832 .v4t,
1833 }),
1834 };
1835 pub const arm720t: CpuModel = .{
1836 .name = "arm720t",
1837 .llvm_name = "arm720t",
1838 .features = featureSet(&[_]Feature{
1839 .v4t,
1840 }),
1841 };
1842 pub const arm7tdmi: CpuModel = .{
1843 .name = "arm7tdmi",
1844 .llvm_name = "arm7tdmi",
1845 .features = featureSet(&[_]Feature{
1846 .v4t,
1847 }),
1848 };
1849 pub const arm7tdmi_s: CpuModel = .{
1850 .name = "arm7tdmi_s",
1851 .llvm_name = "arm7tdmi-s",
1852 .features = featureSet(&[_]Feature{
1853 .v4t,
1854 }),
1855 };
1856 pub const arm8: CpuModel = .{
1857 .name = "arm8",
1858 .llvm_name = "arm8",
1859 .features = featureSet(&[_]Feature{
1860 .v4,
1861 }),
1862 };
1863 pub const arm810: CpuModel = .{
1864 .name = "arm810",
1865 .llvm_name = "arm810",
1866 .features = featureSet(&[_]Feature{
1867 .v4,
1868 }),
1869 };
1870 pub const arm9: CpuModel = .{
1871 .name = "arm9",
1872 .llvm_name = "arm9",
1873 .features = featureSet(&[_]Feature{
1874 .v4t,
1875 }),
1876 };
1877 pub const arm920: CpuModel = .{
1878 .name = "arm920",
1879 .llvm_name = "arm920",
1880 .features = featureSet(&[_]Feature{
1881 .v4t,
1882 }),
1883 };
1884 pub const arm920t: CpuModel = .{
1885 .name = "arm920t",
1886 .llvm_name = "arm920t",
1887 .features = featureSet(&[_]Feature{
1888 .v4t,
1889 }),
1890 };
1891 pub const arm922t: CpuModel = .{
1892 .name = "arm922t",
1893 .llvm_name = "arm922t",
1894 .features = featureSet(&[_]Feature{
1895 .v4t,
1896 }),
1897 };
1898 pub const arm926ej_s: CpuModel = .{
1899 .name = "arm926ej_s",
1900 .llvm_name = "arm926ej-s",
1901 .features = featureSet(&[_]Feature{
1902 .v5te,
1903 }),
1904 };
1905 pub const arm940t: CpuModel = .{
1906 .name = "arm940t",
1907 .llvm_name = "arm940t",
1908 .features = featureSet(&[_]Feature{
1909 .v4t,
1910 }),
1911 };
1912 pub const arm946e_s: CpuModel = .{
1913 .name = "arm946e_s",
1914 .llvm_name = "arm946e-s",
1915 .features = featureSet(&[_]Feature{
1916 .v5te,
1917 }),
1918 };
1919 pub const arm966e_s: CpuModel = .{
1920 .name = "arm966e_s",
1921 .llvm_name = "arm966e-s",
1922 .features = featureSet(&[_]Feature{
1923 .v5te,
1924 }),
1925 };
1926 pub const arm968e_s: CpuModel = .{
1927 .name = "arm968e_s",
1928 .llvm_name = "arm968e-s",
1929 .features = featureSet(&[_]Feature{
1930 .v5te,
1931 }),
1932 };
1933 pub const arm9e: CpuModel = .{
1934 .name = "arm9e",
1935 .llvm_name = "arm9e",
1936 .features = featureSet(&[_]Feature{
1937 .v5te,
1938 }),
1939 };
1940 pub const arm9tdmi: CpuModel = .{
1941 .name = "arm9tdmi",
1942 .llvm_name = "arm9tdmi",
1943 .features = featureSet(&[_]Feature{
1944 .v4t,
1945 }),
1946 };
1947 pub const baseline: CpuModel = .{
1948 .name = "baseline",
1949 .llvm_name = "generic",
1950 .features = featureSet(&[_]Feature{
1951 .v7a,
1952 }),
1953 };
1954 pub const cortex_a12: CpuModel = .{
1955 .name = "cortex_a12",
1956 .llvm_name = "cortex-a12",
1957 .features = featureSet(&[_]Feature{
1958 .avoid_partial_cpsr,
1959 .mp,
1960 .ret_addr_stack,
1961 .trustzone,
1962 .v7a,
1963 .vfp4,
1964 .virtualization,
1965 .vmlx_forwarding,
1966 }),
1967 };
1968 pub const cortex_a15: CpuModel = .{
1969 .name = "cortex_a15",
1970 .llvm_name = "cortex-a15",
1971 .features = featureSet(&[_]Feature{
1972 .avoid_partial_cpsr,
1973 .mp,
1974 .muxed_units,
1975 .ret_addr_stack,
1976 .splat_vfp_neon,
1977 .trustzone,
1978 .v7a,
1979 .vfp4,
1980 .virtualization,
1981 .vldn_align,
1982 }),
1983 };
1984 pub const cortex_a17: CpuModel = .{
1985 .name = "cortex_a17",
1986 .llvm_name = "cortex-a17",
1987 .features = featureSet(&[_]Feature{
1988 .avoid_partial_cpsr,
1989 .mp,
1990 .ret_addr_stack,
1991 .trustzone,
1992 .v7a,
1993 .vfp4,
1994 .virtualization,
1995 .vmlx_forwarding,
1996 }),
1997 };
1998 pub const cortex_a32: CpuModel = .{
1999 .name = "cortex_a32",
2000 .llvm_name = "cortex-a32",
2001 .features = featureSet(&[_]Feature{
2002 .v8a,
2003 }),
2004 };
2005 pub const cortex_a35: CpuModel = .{
2006 .name = "cortex_a35",
2007 .llvm_name = "cortex-a35",
2008 .features = featureSet(&[_]Feature{
2009 .v8a,
2010 }),
2011 };
2012 pub const cortex_a5: CpuModel = .{
2013 .name = "cortex_a5",
2014 .llvm_name = "cortex-a5",
2015 .features = featureSet(&[_]Feature{
2016 .mp,
2017 .ret_addr_stack,
2018 .slow_fp_brcc,
2019 .slowfpvfmx,
2020 .slowfpvmlx,
2021 .trustzone,
2022 .v7a,
2023 .vfp4,
2024 .vmlx_forwarding,
2025 }),
2026 };
2027 pub const cortex_a510: CpuModel = .{
2028 .name = "cortex_a510",
2029 .llvm_name = "cortex-a510",
2030 .features = featureSet(&[_]Feature{
2031 .bf16,
2032 .fp16fml,
2033 .i8mm,
2034 .v9a,
2035 }),
2036 };
2037 pub const cortex_a53: CpuModel = .{
2038 .name = "cortex_a53",
2039 .llvm_name = "cortex-a53",
2040 .features = featureSet(&[_]Feature{
2041 .fpao,
2042 .v8a,
2043 }),
2044 };
2045 pub const cortex_a55: CpuModel = .{
2046 .name = "cortex_a55",
2047 .llvm_name = "cortex-a55",
2048 .features = featureSet(&[_]Feature{
2049 .dotprod,
2050 .v8_2a,
2051 }),
2052 };
2053 pub const cortex_a57: CpuModel = .{
2054 .name = "cortex_a57",
2055 .llvm_name = "cortex-a57",
2056 .features = featureSet(&[_]Feature{
2057 .avoid_partial_cpsr,
2058 .cheap_predicable_cpsr,
2059 .fix_cortex_a57_aes_1742098,
2060 .fpao,
2061 .v8a,
2062 }),
2063 };
2064 pub const cortex_a7: CpuModel = .{
2065 .name = "cortex_a7",
2066 .llvm_name = "cortex-a7",
2067 .features = featureSet(&[_]Feature{
2068 .mp,
2069 .ret_addr_stack,
2070 .slow_fp_brcc,
2071 .slowfpvfmx,
2072 .slowfpvmlx,
2073 .trustzone,
2074 .v7a,
2075 .vfp4,
2076 .virtualization,
2077 .vmlx_forwarding,
2078 .vmlx_hazards,
2079 }),
2080 };
2081 pub const cortex_a710: CpuModel = .{
2082 .name = "cortex_a710",
2083 .llvm_name = "cortex-a710",
2084 .features = featureSet(&[_]Feature{
2085 .bf16,
2086 .fp16fml,
2087 .i8mm,
2088 .v9a,
2089 }),
2090 };
2091 pub const cortex_a72: CpuModel = .{
2092 .name = "cortex_a72",
2093 .llvm_name = "cortex-a72",
2094 .features = featureSet(&[_]Feature{
2095 .fix_cortex_a57_aes_1742098,
2096 .v8a,
2097 }),
2098 };
2099 pub const cortex_a73: CpuModel = .{
2100 .name = "cortex_a73",
2101 .llvm_name = "cortex-a73",
2102 .features = featureSet(&[_]Feature{
2103 .v8a,
2104 }),
2105 };
2106 pub const cortex_a75: CpuModel = .{
2107 .name = "cortex_a75",
2108 .llvm_name = "cortex-a75",
2109 .features = featureSet(&[_]Feature{
2110 .dotprod,
2111 .v8_2a,
2112 }),
2113 };
2114 pub const cortex_a76: CpuModel = .{
2115 .name = "cortex_a76",
2116 .llvm_name = "cortex-a76",
2117 .features = featureSet(&[_]Feature{
2118 .dotprod,
2119 .fullfp16,
2120 .v8_2a,
2121 }),
2122 };
2123 pub const cortex_a76ae: CpuModel = .{
2124 .name = "cortex_a76ae",
2125 .llvm_name = "cortex-a76ae",
2126 .features = featureSet(&[_]Feature{
2127 .dotprod,
2128 .fullfp16,
2129 .v8_2a,
2130 }),
2131 };
2132 pub const cortex_a77: CpuModel = .{
2133 .name = "cortex_a77",
2134 .llvm_name = "cortex-a77",
2135 .features = featureSet(&[_]Feature{
2136 .dotprod,
2137 .fullfp16,
2138 .v8_2a,
2139 }),
2140 };
2141 pub const cortex_a78: CpuModel = .{
2142 .name = "cortex_a78",
2143 .llvm_name = "cortex-a78",
2144 .features = featureSet(&[_]Feature{
2145 .dotprod,
2146 .fullfp16,
2147 .v8_2a,
2148 }),
2149 };
2150 pub const cortex_a78ae: CpuModel = .{
2151 .name = "cortex_a78ae",
2152 .llvm_name = "cortex-a78ae",
2153 .features = featureSet(&[_]Feature{
2154 .dotprod,
2155 .fullfp16,
2156 .v8_2a,
2157 }),
2158 };
2159 pub const cortex_a78c: CpuModel = .{
2160 .name = "cortex_a78c",
2161 .llvm_name = "cortex-a78c",
2162 .features = featureSet(&[_]Feature{
2163 .dotprod,
2164 .fullfp16,
2165 .v8_2a,
2166 }),
2167 };
2168 pub const cortex_a8: CpuModel = .{
2169 .name = "cortex_a8",
2170 .llvm_name = "cortex-a8",
2171 .features = featureSet(&[_]Feature{
2172 .nonpipelined_vfp,
2173 .ret_addr_stack,
2174 .slow_fp_brcc,
2175 .slowfpvfmx,
2176 .slowfpvmlx,
2177 .trustzone,
2178 .v7a,
2179 .vmlx_forwarding,
2180 .vmlx_hazards,
2181 }),
2182 };
2183 pub const cortex_a9: CpuModel = .{
2184 .name = "cortex_a9",
2185 .llvm_name = "cortex-a9",
2186 .features = featureSet(&[_]Feature{
2187 .avoid_partial_cpsr,
2188 .expand_fp_mlx,
2189 .fp16,
2190 .mp,
2191 .muxed_units,
2192 .neon_fpmovs,
2193 .prefer_vmovsr,
2194 .ret_addr_stack,
2195 .trustzone,
2196 .v7a,
2197 .vldn_align,
2198 .vmlx_forwarding,
2199 .vmlx_hazards,
2200 }),
2201 };
2202 pub const cortex_m0: CpuModel = .{
2203 .name = "cortex_m0",
2204 .llvm_name = "cortex-m0",
2205 .features = featureSet(&[_]Feature{
2206 .no_branch_predictor,
2207 .v6m,
2208 }),
2209 };
2210 pub const cortex_m0plus: CpuModel = .{
2211 .name = "cortex_m0plus",
2212 .llvm_name = "cortex-m0plus",
2213 .features = featureSet(&[_]Feature{
2214 .no_branch_predictor,
2215 .v6m,
2216 }),
2217 };
2218 pub const cortex_m1: CpuModel = .{
2219 .name = "cortex_m1",
2220 .llvm_name = "cortex-m1",
2221 .features = featureSet(&[_]Feature{
2222 .no_branch_predictor,
2223 .v6m,
2224 }),
2225 };
2226 pub const cortex_m23: CpuModel = .{
2227 .name = "cortex_m23",
2228 .llvm_name = "cortex-m23",
2229 .features = featureSet(&[_]Feature{
2230 .no_branch_predictor,
2231 .no_movt,
2232 .v8m,
2233 }),
2234 };
2235 pub const cortex_m3: CpuModel = .{
2236 .name = "cortex_m3",
2237 .llvm_name = "cortex-m3",
2238 .features = featureSet(&[_]Feature{
2239 .loop_align,
2240 .no_branch_predictor,
2241 .use_misched,
2242 .v7m,
2243 }),
2244 };
2245 pub const cortex_m33: CpuModel = .{
2246 .name = "cortex_m33",
2247 .llvm_name = "cortex-m33",
2248 .features = featureSet(&[_]Feature{
2249 .avoid_muls,
2250 .fix_cmse_cve_2021_35465,
2251 .loop_align,
2252 .no_branch_predictor,
2253 .slowfpvfmx,
2254 .slowfpvmlx,
2255 .use_misched,
2256 .v8m_main,
2257 }),
2258 };
2259 pub const cortex_m35p: CpuModel = .{
2260 .name = "cortex_m35p",
2261 .llvm_name = "cortex-m35p",
2262 .features = featureSet(&[_]Feature{
2263 .fix_cmse_cve_2021_35465,
2264 .loop_align,
2265 .no_branch_predictor,
2266 .slowfpvfmx,
2267 .slowfpvmlx,
2268 .use_misched,
2269 .v8m_main,
2270 }),
2271 };
2272 pub const cortex_m4: CpuModel = .{
2273 .name = "cortex_m4",
2274 .llvm_name = "cortex-m4",
2275 .features = featureSet(&[_]Feature{
2276 .loop_align,
2277 .no_branch_predictor,
2278 .slowfpvfmx,
2279 .slowfpvmlx,
2280 .use_misched,
2281 .v7em,
2282 }),
2283 };
2284 pub const cortex_m52: CpuModel = .{
2285 .name = "cortex_m52",
2286 .llvm_name = "cortex-m52",
2287 .features = featureSet(&[_]Feature{
2288 .fp_armv8d16,
2289 .loop_align,
2290 .mve1beat,
2291 .mve_fp,
2292 .no_branch_predictor,
2293 .pacbti,
2294 .slowfpvmlx,
2295 .use_misched,
2296 .v8_1m_main,
2297 }),
2298 };
2299 pub const cortex_m55: CpuModel = .{
2300 .name = "cortex_m55",
2301 .llvm_name = "cortex-m55",
2302 .features = featureSet(&[_]Feature{
2303 .dsp,
2304 .fix_cmse_cve_2021_35465,
2305 .loop_align,
2306 .m55,
2307 .no_branch_predictor,
2308 .slowfpvmlx,
2309 .use_misched,
2310 .v8_1m_main,
2311 }),
2312 };
2313 pub const cortex_m7: CpuModel = .{
2314 .name = "cortex_m7",
2315 .llvm_name = "cortex-m7",
2316 .features = featureSet(&[_]Feature{
2317 .branch_align_64,
2318 .use_mipipeliner,
2319 .use_misched,
2320 .v7em,
2321 }),
2322 };
2323 pub const cortex_m85: CpuModel = .{
2324 .name = "cortex_m85",
2325 .llvm_name = "cortex-m85",
2326 .features = featureSet(&[_]Feature{
2327 .branch_align_64,
2328 .dsp,
2329 .m85,
2330 .use_misched,
2331 .v8_1m_main,
2332 }),
2333 };
2334 pub const cortex_r4: CpuModel = .{
2335 .name = "cortex_r4",
2336 .llvm_name = "cortex-r4",
2337 .features = featureSet(&[_]Feature{
2338 .avoid_partial_cpsr,
2339 .ret_addr_stack,
2340 .v7r,
2341 }),
2342 };
2343 pub const cortex_r4f: CpuModel = .{
2344 .name = "cortex_r4f",
2345 .llvm_name = "cortex-r4f",
2346 .features = featureSet(&[_]Feature{
2347 .avoid_partial_cpsr,
2348 .ret_addr_stack,
2349 .slow_fp_brcc,
2350 .slowfpvfmx,
2351 .slowfpvmlx,
2352 .v7r,
2353 .vfp3d16,
2354 }),
2355 };
2356 pub const cortex_r5: CpuModel = .{
2357 .name = "cortex_r5",
2358 .llvm_name = "cortex-r5",
2359 .features = featureSet(&[_]Feature{
2360 .avoid_partial_cpsr,
2361 .hwdiv_arm,
2362 .ret_addr_stack,
2363 .slow_fp_brcc,
2364 .slowfpvfmx,
2365 .slowfpvmlx,
2366 .v7r,
2367 .vfp3d16,
2368 }),
2369 };
2370 pub const cortex_r52: CpuModel = .{
2371 .name = "cortex_r52",
2372 .llvm_name = "cortex-r52",
2373 .features = featureSet(&[_]Feature{
2374 .fp_armv8,
2375 .fpao,
2376 .neon,
2377 .use_misched,
2378 .v8r,
2379 }),
2380 };
2381 pub const cortex_r52plus: CpuModel = .{
2382 .name = "cortex_r52plus",
2383 .llvm_name = "cortex-r52plus",
2384 .features = featureSet(&[_]Feature{
2385 .fp_armv8,
2386 .fpao,
2387 .neon,
2388 .use_misched,
2389 .v8r,
2390 }),
2391 };
2392 pub const cortex_r7: CpuModel = .{
2393 .name = "cortex_r7",
2394 .llvm_name = "cortex-r7",
2395 .features = featureSet(&[_]Feature{
2396 .avoid_partial_cpsr,
2397 .fp16,
2398 .hwdiv_arm,
2399 .mp,
2400 .ret_addr_stack,
2401 .slow_fp_brcc,
2402 .slowfpvfmx,
2403 .slowfpvmlx,
2404 .v7r,
2405 .vfp3d16,
2406 }),
2407 };
2408 pub const cortex_r8: CpuModel = .{
2409 .name = "cortex_r8",
2410 .llvm_name = "cortex-r8",
2411 .features = featureSet(&[_]Feature{
2412 .avoid_partial_cpsr,
2413 .fp16,
2414 .hwdiv_arm,
2415 .mp,
2416 .ret_addr_stack,
2417 .slow_fp_brcc,
2418 .slowfpvfmx,
2419 .slowfpvmlx,
2420 .v7r,
2421 .vfp3d16,
2422 }),
2423 };
2424 pub const cortex_x1: CpuModel = .{
2425 .name = "cortex_x1",
2426 .llvm_name = "cortex-x1",
2427 .features = featureSet(&[_]Feature{
2428 .dotprod,
2429 .fullfp16,
2430 .v8_2a,
2431 }),
2432 };
2433 pub const cortex_x1c: CpuModel = .{
2434 .name = "cortex_x1c",
2435 .llvm_name = "cortex-x1c",
2436 .features = featureSet(&[_]Feature{
2437 .dotprod,
2438 .fullfp16,
2439 .v8_2a,
2440 }),
2441 };
2442 pub const cyclone: CpuModel = .{
2443 .name = "cyclone",
2444 .llvm_name = "cyclone",
2445 .features = featureSet(&[_]Feature{
2446 .avoid_movs_shop,
2447 .avoid_partial_cpsr,
2448 .disable_postra_scheduler,
2449 .neonfp,
2450 .ret_addr_stack,
2451 .slowfpvfmx,
2452 .slowfpvmlx,
2453 .use_misched,
2454 .v8a,
2455 .zcz,
2456 }),
2457 };
2458 pub const ep9312: CpuModel = .{
2459 .name = "ep9312",
2460 .llvm_name = "ep9312",
2461 .features = featureSet(&[_]Feature{
2462 .v4t,
2463 }),
2464 };
2465 pub const exynos_m1: CpuModel = .{
2466 .name = "exynos_m1",
2467 .llvm_name = null,
2468 .features = featureSet(&[_]Feature{
2469 .expand_fp_mlx,
2470 .fuse_aes,
2471 .fuse_literals,
2472 .prof_unpr,
2473 .ret_addr_stack,
2474 .slow_fp_brcc,
2475 .slow_vdup32,
2476 .slow_vgetlni32,
2477 .slowfpvfmx,
2478 .slowfpvmlx,
2479 .splat_vfp_neon,
2480 .v8a,
2481 .wide_stride_vfp,
2482 .zcz,
2483 }),
2484 };
2485 pub const exynos_m2: CpuModel = .{
2486 .name = "exynos_m2",
2487 .llvm_name = null,
2488 .features = featureSet(&[_]Feature{
2489 .expand_fp_mlx,
2490 .fuse_aes,
2491 .fuse_literals,
2492 .prof_unpr,
2493 .ret_addr_stack,
2494 .slow_fp_brcc,
2495 .slow_vdup32,
2496 .slow_vgetlni32,
2497 .slowfpvfmx,
2498 .slowfpvmlx,
2499 .splat_vfp_neon,
2500 .v8a,
2501 .wide_stride_vfp,
2502 .zcz,
2503 }),
2504 };
2505 pub const exynos_m3: CpuModel = .{
2506 .name = "exynos_m3",
2507 .llvm_name = "exynos-m3",
2508 .features = featureSet(&[_]Feature{
2509 .expand_fp_mlx,
2510 .fuse_aes,
2511 .fuse_literals,
2512 .prof_unpr,
2513 .ret_addr_stack,
2514 .slow_fp_brcc,
2515 .slow_vdup32,
2516 .slow_vgetlni32,
2517 .slowfpvfmx,
2518 .slowfpvmlx,
2519 .splat_vfp_neon,
2520 .v8a,
2521 .wide_stride_vfp,
2522 .zcz,
2523 }),
2524 };
2525 pub const exynos_m4: CpuModel = .{
2526 .name = "exynos_m4",
2527 .llvm_name = "exynos-m4",
2528 .features = featureSet(&[_]Feature{
2529 .dotprod,
2530 .expand_fp_mlx,
2531 .fullfp16,
2532 .fuse_aes,
2533 .fuse_literals,
2534 .prof_unpr,
2535 .ret_addr_stack,
2536 .slow_fp_brcc,
2537 .slow_vdup32,
2538 .slow_vgetlni32,
2539 .slowfpvfmx,
2540 .slowfpvmlx,
2541 .splat_vfp_neon,
2542 .v8_2a,
2543 .wide_stride_vfp,
2544 .zcz,
2545 }),
2546 };
2547 pub const exynos_m5: CpuModel = .{
2548 .name = "exynos_m5",
2549 .llvm_name = "exynos-m5",
2550 .features = featureSet(&[_]Feature{
2551 .dotprod,
2552 .expand_fp_mlx,
2553 .fullfp16,
2554 .fuse_aes,
2555 .fuse_literals,
2556 .prof_unpr,
2557 .ret_addr_stack,
2558 .slow_fp_brcc,
2559 .slow_vdup32,
2560 .slow_vgetlni32,
2561 .slowfpvfmx,
2562 .slowfpvmlx,
2563 .splat_vfp_neon,
2564 .v8_2a,
2565 .wide_stride_vfp,
2566 .zcz,
2567 }),
2568 };
2569 pub const generic: CpuModel = .{
2570 .name = "generic",
2571 .llvm_name = "generic",
2572 .features = featureSet(&[_]Feature{}),
2573 };
2574 pub const iwmmxt: CpuModel = .{
2575 .name = "iwmmxt",
2576 .llvm_name = "iwmmxt",
2577 .features = featureSet(&[_]Feature{
2578 .v5te,
2579 }),
2580 };
2581 pub const krait: CpuModel = .{
2582 .name = "krait",
2583 .llvm_name = "krait",
2584 .features = featureSet(&[_]Feature{
2585 .avoid_partial_cpsr,
2586 .hwdiv,
2587 .hwdiv_arm,
2588 .muxed_units,
2589 .ret_addr_stack,
2590 .v7a,
2591 .vfp4,
2592 .vldn_align,
2593 .vmlx_forwarding,
2594 }),
2595 };
2596 pub const kryo: CpuModel = .{
2597 .name = "kryo",
2598 .llvm_name = "kryo",
2599 .features = featureSet(&[_]Feature{
2600 .v8a,
2601 }),
2602 };
2603 pub const mpcore: CpuModel = .{
2604 .name = "mpcore",
2605 .llvm_name = "mpcore",
2606 .features = featureSet(&[_]Feature{
2607 .slowfpvmlx,
2608 .v6k,
2609 .vfp2,
2610 }),
2611 };
2612 pub const mpcorenovfp: CpuModel = .{
2613 .name = "mpcorenovfp",
2614 .llvm_name = "mpcorenovfp",
2615 .features = featureSet(&[_]Feature{
2616 .v6k,
2617 }),
2618 };
2619 pub const neoverse_n1: CpuModel = .{
2620 .name = "neoverse_n1",
2621 .llvm_name = "neoverse-n1",
2622 .features = featureSet(&[_]Feature{
2623 .dotprod,
2624 .v8_2a,
2625 }),
2626 };
2627 pub const neoverse_n2: CpuModel = .{
2628 .name = "neoverse_n2",
2629 .llvm_name = "neoverse-n2",
2630 .features = featureSet(&[_]Feature{
2631 .bf16,
2632 .fp16fml,
2633 .i8mm,
2634 .v9a,
2635 }),
2636 };
2637 pub const neoverse_v1: CpuModel = .{
2638 .name = "neoverse_v1",
2639 .llvm_name = "neoverse-v1",
2640 .features = featureSet(&[_]Feature{
2641 .bf16,
2642 .fullfp16,
2643 .i8mm,
2644 .v8_4a,
2645 }),
2646 };
2647 pub const sc000: CpuModel = .{
2648 .name = "sc000",
2649 .llvm_name = "sc000",
2650 .features = featureSet(&[_]Feature{
2651 .no_branch_predictor,
2652 .v6m,
2653 }),
2654 };
2655 pub const sc300: CpuModel = .{
2656 .name = "sc300",
2657 .llvm_name = "sc300",
2658 .features = featureSet(&[_]Feature{
2659 .no_branch_predictor,
2660 .use_misched,
2661 .v7m,
2662 }),
2663 };
2664 pub const star_mc1: CpuModel = .{
2665 .name = "star_mc1",
2666 .llvm_name = "star-mc1",
2667 .features = featureSet(&[_]Feature{
2668 .avoid_muls,
2669 .dsp,
2670 .fix_cmse_cve_2021_35465,
2671 .fp_armv8d16sp,
2672 .loop_align,
2673 .no_branch_predictor,
2674 .slowfpvfmx,
2675 .slowfpvmlx,
2676 .use_misched,
2677 .v8m_main,
2678 }),
2679 };
2680 pub const star_mc3: CpuModel = .{
2681 .name = "star_mc3",
2682 .llvm_name = "star-mc3",
2683 .features = featureSet(&[_]Feature{
2684 .fp_armv8d16,
2685 .loop_align,
2686 .mve1beat,
2687 .mve_fp,
2688 .no_branch_predictor,
2689 .pacbti,
2690 .slowfpvmlx,
2691 .use_misched,
2692 .v8_1m_main,
2693 }),
2694 };
2695 pub const strongarm: CpuModel = .{
2696 .name = "strongarm",
2697 .llvm_name = "strongarm",
2698 .features = featureSet(&[_]Feature{
2699 .v4,
2700 }),
2701 };
2702 pub const strongarm110: CpuModel = .{
2703 .name = "strongarm110",
2704 .llvm_name = "strongarm110",
2705 .features = featureSet(&[_]Feature{
2706 .v4,
2707 }),
2708 };
2709 pub const strongarm1100: CpuModel = .{
2710 .name = "strongarm1100",
2711 .llvm_name = "strongarm1100",
2712 .features = featureSet(&[_]Feature{
2713 .v4,
2714 }),
2715 };
2716 pub const strongarm1110: CpuModel = .{
2717 .name = "strongarm1110",
2718 .llvm_name = "strongarm1110",
2719 .features = featureSet(&[_]Feature{
2720 .v4,
2721 }),
2722 };
2723 pub const swift: CpuModel = .{
2724 .name = "swift",
2725 .llvm_name = "swift",
2726 .features = featureSet(&[_]Feature{
2727 .avoid_movs_shop,
2728 .avoid_partial_cpsr,
2729 .disable_postra_scheduler,
2730 .hwdiv,
2731 .hwdiv_arm,
2732 .mp,
2733 .neonfp,
2734 .prefer_ishst,
2735 .prof_unpr,
2736 .ret_addr_stack,
2737 .slow_load_D_subreg,
2738 .slow_odd_reg,
2739 .slow_vdup32,
2740 .slow_vgetlni32,
2741 .slowfpvfmx,
2742 .slowfpvmlx,
2743 .use_misched,
2744 .v7a,
2745 .vfp4,
2746 .vmlx_hazards,
2747 .wide_stride_vfp,
2748 }),
2749 };
2750 pub const xscale: CpuModel = .{
2751 .name = "xscale",
2752 .llvm_name = "xscale",
2753 .features = featureSet(&[_]Feature{
2754 .v5te,
2755 }),
2756 };
2757};