1//! This file is auto-generated by tools/update_cpu_features.zig.
2
3const std = @import("../std.zig");
4const CpuFeature = std.Target.Cpu.Feature;
5const CpuModel = std.Target.Cpu.Model;
6
7pub const Feature = enum {
8 @"16bit_mode",
9 @"32bit_mode",
10 @"3dnow",
11 @"3dnowa",
12 @"64bit",
13 adx,
14 aes,
15 allow_light_256_bit,
16 amx_avx512,
17 amx_bf16,
18 amx_complex,
19 amx_fp16,
20 amx_fp8,
21 amx_int8,
22 amx_movrs,
23 amx_tf32,
24 amx_tile,
25 avx,
26 avx10_1,
27 avx10_2,
28 avx2,
29 avx512bf16,
30 avx512bitalg,
31 avx512bw,
32 avx512cd,
33 avx512dq,
34 avx512er,
35 avx512f,
36 avx512fp16,
37 avx512ifma,
38 avx512pf,
39 avx512vbmi,
40 avx512vbmi2,
41 avx512vl,
42 avx512vnni,
43 avx512vp2intersect,
44 avx512vpopcntdq,
45 avxifma,
46 avxneconvert,
47 avxvnni,
48 avxvnniint16,
49 avxvnniint8,
50 bmi,
51 bmi2,
52 branch_hint,
53 branchfusion,
54 bsf_bsr_0_clobbers_result,
55 ccmp,
56 cf,
57 cldemote,
58 clflushopt,
59 clwb,
60 clzero,
61 cmov,
62 cmpccxadd,
63 crc32,
64 cx16,
65 cx8,
66 egpr,
67 enqcmd,
68 ermsb,
69 f16c,
70 false_deps_getmant,
71 false_deps_lzcnt_tzcnt,
72 false_deps_mulc,
73 false_deps_mullq,
74 false_deps_perm,
75 false_deps_popcnt,
76 false_deps_range,
77 fast_11bytenop,
78 fast_15bytenop,
79 fast_7bytenop,
80 fast_bextr,
81 fast_dpwssd,
82 fast_gather,
83 fast_hops,
84 fast_imm16,
85 fast_lzcnt,
86 fast_movbe,
87 fast_scalar_fsqrt,
88 fast_scalar_shift_masks,
89 fast_shld_rotate,
90 fast_variable_crosslane_shuffle,
91 fast_variable_perlane_shuffle,
92 fast_vector_fsqrt,
93 fast_vector_shift_masks,
94 faster_shift_than_shuffle,
95 fma,
96 fma4,
97 fsgsbase,
98 fsrm,
99 fxsr,
100 gfni,
101 harden_sls_ijmp,
102 harden_sls_ret,
103 hreset,
104 idivl_to_divb,
105 idivq_to_divl,
106 inline_asm_use_gpr32,
107 invpcid,
108 kl,
109 lea_sp,
110 lea_uses_ag,
111 lvi_cfi,
112 lvi_load_hardening,
113 lwp,
114 lzcnt,
115 macrofusion,
116 mmx,
117 movbe,
118 movdir64b,
119 movdiri,
120 movrs,
121 mwaitx,
122 ndd,
123 nf,
124 no_bypass_delay,
125 no_bypass_delay_blend,
126 no_bypass_delay_mov,
127 no_bypass_delay_shuffle,
128 nopl,
129 pad_short_functions,
130 pclmul,
131 pconfig,
132 pku,
133 popcnt,
134 ppx,
135 prefer_128_bit,
136 prefer_256_bit,
137 prefer_legacy_setcc,
138 prefer_mask_registers,
139 prefer_movmsk_over_vtest,
140 prefer_no_gather,
141 prefer_no_scatter,
142 prefetchi,
143 prefetchwt1,
144 prfchw,
145 ptwrite,
146 push2pop2,
147 raoint,
148 rdpid,
149 rdpru,
150 rdrnd,
151 rdseed,
152 retpoline,
153 retpoline_external_thunk,
154 retpoline_indirect_branches,
155 retpoline_indirect_calls,
156 rtm,
157 sahf,
158 sbb_dep_breaking,
159 serialize,
160 seses,
161 sgx,
162 sha,
163 sha512,
164 shstk,
165 slow_3ops_lea,
166 slow_incdec,
167 slow_lea,
168 slow_pmaddwd,
169 slow_pmulld,
170 slow_pmullq,
171 slow_shld,
172 slow_two_mem_ops,
173 slow_unaligned_mem_16,
174 slow_unaligned_mem_32,
175 sm3,
176 sm4,
177 smap,
178 smep,
179 soft_float,
180 sse,
181 sse2,
182 sse3,
183 sse4_1,
184 sse4_2,
185 sse4a,
186 sse_unaligned_mem,
187 ssse3,
188 tagged_globals,
189 tbm,
190 tsxldtrk,
191 tuning_fast_imm_vector_shift,
192 uintr,
193 use_glm_div_sqrt_costs,
194 use_slm_arith_costs,
195 usermsr,
196 vaes,
197 vpclmulqdq,
198 vzeroupper,
199 waitpkg,
200 wbnoinvd,
201 widekl,
202 x32,
203 x87,
204 xop,
205 xsave,
206 xsavec,
207 xsaveopt,
208 xsaves,
209 zu,
210};
211
212pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
213pub const featureSetHas = CpuFeature.FeatureSetFns(Feature).featureSetHas;
214pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny;
215pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll;
216
217pub const all_features = blk: {
218 const len = @typeInfo(Feature).@"enum".field_names.len;
219 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
220 var result: [len]CpuFeature = undefined;
221 result[@backingInt(Feature.@"16bit_mode")] = .{
222 .llvm_name = "16bit-mode",
223 .description = "16-bit mode (i8086)",
224 .dependencies = featureSet(&[_]Feature{}),
225 };
226 result[@backingInt(Feature.@"32bit_mode")] = .{
227 .llvm_name = "32bit-mode",
228 .description = "32-bit mode (80386)",
229 .dependencies = featureSet(&[_]Feature{}),
230 };
231 result[@backingInt(Feature.@"3dnow")] = .{
232 .llvm_name = null,
233 .description = "Enable 3DNow! instructions",
234 .dependencies = featureSet(&[_]Feature{
235 .mmx,
236 }),
237 };
238 result[@backingInt(Feature.@"3dnowa")] = .{
239 .llvm_name = null,
240 .description = "Enable 3DNow! Athlon instructions",
241 .dependencies = featureSet(&[_]Feature{
242 .@"3dnow",
243 }),
244 };
245 result[@backingInt(Feature.@"64bit")] = .{
246 .llvm_name = "64bit",
247 .description = "Support 64-bit instructions",
248 .dependencies = featureSet(&[_]Feature{}),
249 };
250 result[@backingInt(Feature.adx)] = .{
251 .llvm_name = "adx",
252 .description = "Support ADX instructions",
253 .dependencies = featureSet(&[_]Feature{}),
254 };
255 result[@backingInt(Feature.aes)] = .{
256 .llvm_name = "aes",
257 .description = "Enable AES instructions",
258 .dependencies = featureSet(&[_]Feature{
259 .sse2,
260 }),
261 };
262 result[@backingInt(Feature.allow_light_256_bit)] = .{
263 .llvm_name = "allow-light-256-bit",
264 .description = "Enable generation of 256-bit load/stores even if we prefer 128-bit",
265 .dependencies = featureSet(&[_]Feature{}),
266 };
267 result[@backingInt(Feature.amx_avx512)] = .{
268 .llvm_name = "amx-avx512",
269 .description = "Support AMX-AVX512 instructions",
270 .dependencies = featureSet(&[_]Feature{
271 .amx_tile,
272 }),
273 };
274 result[@backingInt(Feature.amx_bf16)] = .{
275 .llvm_name = "amx-bf16",
276 .description = "Support AMX-BF16 instructions",
277 .dependencies = featureSet(&[_]Feature{
278 .amx_tile,
279 }),
280 };
281 result[@backingInt(Feature.amx_complex)] = .{
282 .llvm_name = "amx-complex",
283 .description = "Support AMX-COMPLEX instructions",
284 .dependencies = featureSet(&[_]Feature{
285 .amx_tile,
286 }),
287 };
288 result[@backingInt(Feature.amx_fp16)] = .{
289 .llvm_name = "amx-fp16",
290 .description = "Support AMX amx-fp16 instructions",
291 .dependencies = featureSet(&[_]Feature{
292 .amx_tile,
293 }),
294 };
295 result[@backingInt(Feature.amx_fp8)] = .{
296 .llvm_name = "amx-fp8",
297 .description = "Support AMX-FP8 instructions",
298 .dependencies = featureSet(&[_]Feature{
299 .amx_tile,
300 }),
301 };
302 result[@backingInt(Feature.amx_int8)] = .{
303 .llvm_name = "amx-int8",
304 .description = "Support AMX-INT8 instructions",
305 .dependencies = featureSet(&[_]Feature{
306 .amx_tile,
307 }),
308 };
309 result[@backingInt(Feature.amx_movrs)] = .{
310 .llvm_name = "amx-movrs",
311 .description = "Support AMX-MOVRS instructions",
312 .dependencies = featureSet(&[_]Feature{
313 .amx_tile,
314 }),
315 };
316 result[@backingInt(Feature.amx_tf32)] = .{
317 .llvm_name = "amx-tf32",
318 .description = "Support AMX-TF32 instructions",
319 .dependencies = featureSet(&[_]Feature{
320 .amx_tile,
321 }),
322 };
323 result[@backingInt(Feature.amx_tile)] = .{
324 .llvm_name = "amx-tile",
325 .description = "Support AMX-TILE instructions",
326 .dependencies = featureSet(&[_]Feature{}),
327 };
328 result[@backingInt(Feature.avx)] = .{
329 .llvm_name = "avx",
330 .description = "Enable AVX instructions",
331 .dependencies = featureSet(&[_]Feature{
332 .sse4_2,
333 }),
334 };
335 result[@backingInt(Feature.avx10_1)] = .{
336 .llvm_name = "avx10.1",
337 .description = "Support AVX10.1 instruction",
338 .dependencies = featureSet(&[_]Feature{
339 .avx512bf16,
340 .avx512bitalg,
341 .avx512cd,
342 .avx512dq,
343 .avx512fp16,
344 .avx512ifma,
345 .avx512vbmi,
346 .avx512vbmi2,
347 .avx512vl,
348 .avx512vnni,
349 .avx512vpopcntdq,
350 }),
351 };
352 result[@backingInt(Feature.avx10_2)] = .{
353 .llvm_name = "avx10.2",
354 .description = "Support AVX10.2 instruction",
355 .dependencies = featureSet(&[_]Feature{
356 .avx10_1,
357 }),
358 };
359 result[@backingInt(Feature.avx2)] = .{
360 .llvm_name = "avx2",
361 .description = "Enable AVX2 instructions",
362 .dependencies = featureSet(&[_]Feature{
363 .avx,
364 }),
365 };
366 result[@backingInt(Feature.avx512bf16)] = .{
367 .llvm_name = "avx512bf16",
368 .description = "Support bfloat16 floating point",
369 .dependencies = featureSet(&[_]Feature{
370 .avx512bw,
371 }),
372 };
373 result[@backingInt(Feature.avx512bitalg)] = .{
374 .llvm_name = "avx512bitalg",
375 .description = "Enable AVX-512 Bit Algorithms",
376 .dependencies = featureSet(&[_]Feature{
377 .avx512bw,
378 }),
379 };
380 result[@backingInt(Feature.avx512bw)] = .{
381 .llvm_name = "avx512bw",
382 .description = "Enable AVX-512 Byte and Word Instructions",
383 .dependencies = featureSet(&[_]Feature{
384 .avx512f,
385 }),
386 };
387 result[@backingInt(Feature.avx512cd)] = .{
388 .llvm_name = "avx512cd",
389 .description = "Enable AVX-512 Conflict Detection Instructions",
390 .dependencies = featureSet(&[_]Feature{
391 .avx512f,
392 }),
393 };
394 result[@backingInt(Feature.avx512dq)] = .{
395 .llvm_name = "avx512dq",
396 .description = "Enable AVX-512 Doubleword and Quadword Instructions",
397 .dependencies = featureSet(&[_]Feature{
398 .avx512f,
399 }),
400 };
401 result[@backingInt(Feature.avx512er)] = .{
402 .llvm_name = null,
403 .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
404 .dependencies = featureSet(&[_]Feature{
405 .avx512f,
406 }),
407 };
408 result[@backingInt(Feature.avx512f)] = .{
409 .llvm_name = "avx512f",
410 .description = "Enable AVX-512 instructions",
411 .dependencies = featureSet(&[_]Feature{
412 .avx2,
413 .f16c,
414 .fma,
415 }),
416 };
417 result[@backingInt(Feature.avx512fp16)] = .{
418 .llvm_name = "avx512fp16",
419 .description = "Support 16-bit floating point",
420 .dependencies = featureSet(&[_]Feature{
421 .avx512bw,
422 }),
423 };
424 result[@backingInt(Feature.avx512ifma)] = .{
425 .llvm_name = "avx512ifma",
426 .description = "Enable AVX-512 Integer Fused Multiple-Add",
427 .dependencies = featureSet(&[_]Feature{
428 .avx512f,
429 }),
430 };
431 result[@backingInt(Feature.avx512pf)] = .{
432 .llvm_name = null,
433 .description = "Enable AVX-512 PreFetch Instructions",
434 .dependencies = featureSet(&[_]Feature{
435 .avx512f,
436 }),
437 };
438 result[@backingInt(Feature.avx512vbmi)] = .{
439 .llvm_name = "avx512vbmi",
440 .description = "Enable AVX-512 Vector Byte Manipulation Instructions",
441 .dependencies = featureSet(&[_]Feature{
442 .avx512bw,
443 }),
444 };
445 result[@backingInt(Feature.avx512vbmi2)] = .{
446 .llvm_name = "avx512vbmi2",
447 .description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
448 .dependencies = featureSet(&[_]Feature{
449 .avx512bw,
450 }),
451 };
452 result[@backingInt(Feature.avx512vl)] = .{
453 .llvm_name = "avx512vl",
454 .description = "Enable AVX-512 Vector Length eXtensions",
455 .dependencies = featureSet(&[_]Feature{
456 .avx512f,
457 }),
458 };
459 result[@backingInt(Feature.avx512vnni)] = .{
460 .llvm_name = "avx512vnni",
461 .description = "Enable AVX-512 Vector Neural Network Instructions",
462 .dependencies = featureSet(&[_]Feature{
463 .avx512f,
464 }),
465 };
466 result[@backingInt(Feature.avx512vp2intersect)] = .{
467 .llvm_name = "avx512vp2intersect",
468 .description = "Enable AVX-512 vp2intersect",
469 .dependencies = featureSet(&[_]Feature{
470 .avx512f,
471 }),
472 };
473 result[@backingInt(Feature.avx512vpopcntdq)] = .{
474 .llvm_name = "avx512vpopcntdq",
475 .description = "Enable AVX-512 Population Count Instructions",
476 .dependencies = featureSet(&[_]Feature{
477 .avx512f,
478 }),
479 };
480 result[@backingInt(Feature.avxifma)] = .{
481 .llvm_name = "avxifma",
482 .description = "Enable AVX-IFMA",
483 .dependencies = featureSet(&[_]Feature{
484 .avx2,
485 }),
486 };
487 result[@backingInt(Feature.avxneconvert)] = .{
488 .llvm_name = "avxneconvert",
489 .description = "Support AVX-NE-CONVERT instructions",
490 .dependencies = featureSet(&[_]Feature{
491 .avx2,
492 }),
493 };
494 result[@backingInt(Feature.avxvnni)] = .{
495 .llvm_name = "avxvnni",
496 .description = "Support AVX_VNNI encoding",
497 .dependencies = featureSet(&[_]Feature{
498 .avx2,
499 }),
500 };
501 result[@backingInt(Feature.avxvnniint16)] = .{
502 .llvm_name = "avxvnniint16",
503 .description = "Enable AVX-VNNI-INT16",
504 .dependencies = featureSet(&[_]Feature{
505 .avx2,
506 }),
507 };
508 result[@backingInt(Feature.avxvnniint8)] = .{
509 .llvm_name = "avxvnniint8",
510 .description = "Enable AVX-VNNI-INT8",
511 .dependencies = featureSet(&[_]Feature{
512 .avx2,
513 }),
514 };
515 result[@backingInt(Feature.bmi)] = .{
516 .llvm_name = "bmi",
517 .description = "Support BMI instructions",
518 .dependencies = featureSet(&[_]Feature{}),
519 };
520 result[@backingInt(Feature.bmi2)] = .{
521 .llvm_name = "bmi2",
522 .description = "Support BMI2 instructions",
523 .dependencies = featureSet(&[_]Feature{}),
524 };
525 result[@backingInt(Feature.branch_hint)] = .{
526 .llvm_name = "branch-hint",
527 .description = "Target has branch hint feature",
528 .dependencies = featureSet(&[_]Feature{}),
529 };
530 result[@backingInt(Feature.branchfusion)] = .{
531 .llvm_name = "branchfusion",
532 .description = "CMP/TEST can be fused with conditional branches",
533 .dependencies = featureSet(&[_]Feature{}),
534 };
535 result[@backingInt(Feature.bsf_bsr_0_clobbers_result)] = .{
536 .llvm_name = null,
537 .description = "BSF/BSR may clobber the lower 32-bits of the result register when the source is zero",
538 .dependencies = featureSet(&[_]Feature{}),
539 };
540 result[@backingInt(Feature.ccmp)] = .{
541 .llvm_name = "ccmp",
542 .description = "Support conditional cmp & test instructions",
543 .dependencies = featureSet(&[_]Feature{}),
544 };
545 result[@backingInt(Feature.cf)] = .{
546 .llvm_name = "cf",
547 .description = "Support conditional faulting",
548 .dependencies = featureSet(&[_]Feature{}),
549 };
550 result[@backingInt(Feature.cldemote)] = .{
551 .llvm_name = "cldemote",
552 .description = "Enable Cache Line Demote",
553 .dependencies = featureSet(&[_]Feature{}),
554 };
555 result[@backingInt(Feature.clflushopt)] = .{
556 .llvm_name = "clflushopt",
557 .description = "Flush A Cache Line Optimized",
558 .dependencies = featureSet(&[_]Feature{}),
559 };
560 result[@backingInt(Feature.clwb)] = .{
561 .llvm_name = "clwb",
562 .description = "Cache Line Write Back",
563 .dependencies = featureSet(&[_]Feature{}),
564 };
565 result[@backingInt(Feature.clzero)] = .{
566 .llvm_name = "clzero",
567 .description = "Enable Cache Line Zero",
568 .dependencies = featureSet(&[_]Feature{}),
569 };
570 result[@backingInt(Feature.cmov)] = .{
571 .llvm_name = "cmov",
572 .description = "Enable conditional move instructions",
573 .dependencies = featureSet(&[_]Feature{}),
574 };
575 result[@backingInt(Feature.cmpccxadd)] = .{
576 .llvm_name = "cmpccxadd",
577 .description = "Support CMPCCXADD instructions",
578 .dependencies = featureSet(&[_]Feature{}),
579 };
580 result[@backingInt(Feature.crc32)] = .{
581 .llvm_name = "crc32",
582 .description = "Enable SSE 4.2 CRC32 instruction (used when SSE4.2 is supported but function is GPR only)",
583 .dependencies = featureSet(&[_]Feature{}),
584 };
585 result[@backingInt(Feature.cx16)] = .{
586 .llvm_name = "cx16",
587 .description = "64-bit with cmpxchg16b (this is true for most x86-64 chips, but not the first AMD chips)",
588 .dependencies = featureSet(&[_]Feature{
589 .cx8,
590 }),
591 };
592 result[@backingInt(Feature.cx8)] = .{
593 .llvm_name = "cx8",
594 .description = "Support CMPXCHG8B instructions",
595 .dependencies = featureSet(&[_]Feature{}),
596 };
597 result[@backingInt(Feature.egpr)] = .{
598 .llvm_name = "egpr",
599 .description = "Support extended general purpose register",
600 .dependencies = featureSet(&[_]Feature{}),
601 };
602 result[@backingInt(Feature.enqcmd)] = .{
603 .llvm_name = "enqcmd",
604 .description = "Has ENQCMD instructions",
605 .dependencies = featureSet(&[_]Feature{}),
606 };
607 result[@backingInt(Feature.ermsb)] = .{
608 .llvm_name = "ermsb",
609 .description = "REP MOVS/STOS are fast",
610 .dependencies = featureSet(&[_]Feature{}),
611 };
612 result[@backingInt(Feature.f16c)] = .{
613 .llvm_name = "f16c",
614 .description = "Support 16-bit floating point conversion instructions",
615 .dependencies = featureSet(&[_]Feature{
616 .avx,
617 }),
618 };
619 result[@backingInt(Feature.false_deps_getmant)] = .{
620 .llvm_name = "false-deps-getmant",
621 .description = "VGETMANTSS/SD/SH and VGETMANDPS/PD(memory version) has a false dependency on dest register",
622 .dependencies = featureSet(&[_]Feature{}),
623 };
624 result[@backingInt(Feature.false_deps_lzcnt_tzcnt)] = .{
625 .llvm_name = "false-deps-lzcnt-tzcnt",
626 .description = "LZCNT/TZCNT have a false dependency on dest register",
627 .dependencies = featureSet(&[_]Feature{}),
628 };
629 result[@backingInt(Feature.false_deps_mulc)] = .{
630 .llvm_name = "false-deps-mulc",
631 .description = "VF[C]MULCPH/SH has a false dependency on dest register",
632 .dependencies = featureSet(&[_]Feature{}),
633 };
634 result[@backingInt(Feature.false_deps_mullq)] = .{
635 .llvm_name = "false-deps-mullq",
636 .description = "VPMULLQ has a false dependency on dest register",
637 .dependencies = featureSet(&[_]Feature{}),
638 };
639 result[@backingInt(Feature.false_deps_perm)] = .{
640 .llvm_name = "false-deps-perm",
641 .description = "VPERMD/Q/PS/PD has a false dependency on dest register",
642 .dependencies = featureSet(&[_]Feature{}),
643 };
644 result[@backingInt(Feature.false_deps_popcnt)] = .{
645 .llvm_name = "false-deps-popcnt",
646 .description = "POPCNT has a false dependency on dest register",
647 .dependencies = featureSet(&[_]Feature{}),
648 };
649 result[@backingInt(Feature.false_deps_range)] = .{
650 .llvm_name = "false-deps-range",
651 .description = "VRANGEPD/PS/SD/SS has a false dependency on dest register",
652 .dependencies = featureSet(&[_]Feature{}),
653 };
654 result[@backingInt(Feature.fast_11bytenop)] = .{
655 .llvm_name = "fast-11bytenop",
656 .description = "Target can quickly decode up to 11 byte NOPs",
657 .dependencies = featureSet(&[_]Feature{}),
658 };
659 result[@backingInt(Feature.fast_15bytenop)] = .{
660 .llvm_name = "fast-15bytenop",
661 .description = "Target can quickly decode up to 15 byte NOPs",
662 .dependencies = featureSet(&[_]Feature{}),
663 };
664 result[@backingInt(Feature.fast_7bytenop)] = .{
665 .llvm_name = "fast-7bytenop",
666 .description = "Target can quickly decode up to 7 byte NOPs",
667 .dependencies = featureSet(&[_]Feature{}),
668 };
669 result[@backingInt(Feature.fast_bextr)] = .{
670 .llvm_name = "fast-bextr",
671 .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
672 .dependencies = featureSet(&[_]Feature{}),
673 };
674 result[@backingInt(Feature.fast_dpwssd)] = .{
675 .llvm_name = "fast-dpwssd",
676 .description = "Prefer vpdpwssd instruction over vpmaddwd+vpaddd instruction sequence",
677 .dependencies = featureSet(&[_]Feature{}),
678 };
679 result[@backingInt(Feature.fast_gather)] = .{
680 .llvm_name = "fast-gather",
681 .description = "Indicates if gather is reasonably fast (this is true for Skylake client and all AVX-512 CPUs)",
682 .dependencies = featureSet(&[_]Feature{}),
683 };
684 result[@backingInt(Feature.fast_hops)] = .{
685 .llvm_name = "fast-hops",
686 .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
687 .dependencies = featureSet(&[_]Feature{}),
688 };
689 result[@backingInt(Feature.fast_imm16)] = .{
690 .llvm_name = "fast-imm16",
691 .description = "Prefer a i16 instruction with i16 immediate over extension to i32",
692 .dependencies = featureSet(&[_]Feature{}),
693 };
694 result[@backingInt(Feature.fast_lzcnt)] = .{
695 .llvm_name = "fast-lzcnt",
696 .description = "LZCNT instructions are as fast as most simple integer ops",
697 .dependencies = featureSet(&[_]Feature{}),
698 };
699 result[@backingInt(Feature.fast_movbe)] = .{
700 .llvm_name = "fast-movbe",
701 .description = "Prefer a movbe over a single-use load + bswap / single-use bswap + store",
702 .dependencies = featureSet(&[_]Feature{}),
703 };
704 result[@backingInt(Feature.fast_scalar_fsqrt)] = .{
705 .llvm_name = "fast-scalar-fsqrt",
706 .description = "Scalar SQRT is fast (disable Newton-Raphson)",
707 .dependencies = featureSet(&[_]Feature{}),
708 };
709 result[@backingInt(Feature.fast_scalar_shift_masks)] = .{
710 .llvm_name = "fast-scalar-shift-masks",
711 .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
712 .dependencies = featureSet(&[_]Feature{}),
713 };
714 result[@backingInt(Feature.fast_shld_rotate)] = .{
715 .llvm_name = "fast-shld-rotate",
716 .description = "SHLD can be used as a faster rotate",
717 .dependencies = featureSet(&[_]Feature{}),
718 };
719 result[@backingInt(Feature.fast_variable_crosslane_shuffle)] = .{
720 .llvm_name = "fast-variable-crosslane-shuffle",
721 .description = "Cross-lane shuffles with variable masks are fast",
722 .dependencies = featureSet(&[_]Feature{}),
723 };
724 result[@backingInt(Feature.fast_variable_perlane_shuffle)] = .{
725 .llvm_name = "fast-variable-perlane-shuffle",
726 .description = "Per-lane shuffles with variable masks are fast",
727 .dependencies = featureSet(&[_]Feature{}),
728 };
729 result[@backingInt(Feature.fast_vector_fsqrt)] = .{
730 .llvm_name = "fast-vector-fsqrt",
731 .description = "Vector SQRT is fast (disable Newton-Raphson)",
732 .dependencies = featureSet(&[_]Feature{}),
733 };
734 result[@backingInt(Feature.fast_vector_shift_masks)] = .{
735 .llvm_name = "fast-vector-shift-masks",
736 .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
737 .dependencies = featureSet(&[_]Feature{}),
738 };
739 result[@backingInt(Feature.faster_shift_than_shuffle)] = .{
740 .llvm_name = "faster-shift-than-shuffle",
741 .description = "Shifts are faster (or as fast) as shuffle",
742 .dependencies = featureSet(&[_]Feature{}),
743 };
744 result[@backingInt(Feature.fma)] = .{
745 .llvm_name = "fma",
746 .description = "Enable three-operand fused multiple-add",
747 .dependencies = featureSet(&[_]Feature{
748 .avx,
749 }),
750 };
751 result[@backingInt(Feature.fma4)] = .{
752 .llvm_name = "fma4",
753 .description = "Enable four-operand fused multiple-add",
754 .dependencies = featureSet(&[_]Feature{
755 .avx,
756 .sse4a,
757 }),
758 };
759 result[@backingInt(Feature.fsgsbase)] = .{
760 .llvm_name = "fsgsbase",
761 .description = "Support FS/GS Base instructions",
762 .dependencies = featureSet(&[_]Feature{}),
763 };
764 result[@backingInt(Feature.fsrm)] = .{
765 .llvm_name = "fsrm",
766 .description = "REP MOVSB of short lengths is faster",
767 .dependencies = featureSet(&[_]Feature{}),
768 };
769 result[@backingInt(Feature.fxsr)] = .{
770 .llvm_name = "fxsr",
771 .description = "Support fxsave/fxrestore instructions",
772 .dependencies = featureSet(&[_]Feature{}),
773 };
774 result[@backingInt(Feature.gfni)] = .{
775 .llvm_name = "gfni",
776 .description = "Enable Galois Field Arithmetic Instructions",
777 .dependencies = featureSet(&[_]Feature{
778 .sse2,
779 }),
780 };
781 result[@backingInt(Feature.harden_sls_ijmp)] = .{
782 .llvm_name = "harden-sls-ijmp",
783 .description = "Harden against straight line speculation across indirect JMP instructions.",
784 .dependencies = featureSet(&[_]Feature{}),
785 };
786 result[@backingInt(Feature.harden_sls_ret)] = .{
787 .llvm_name = "harden-sls-ret",
788 .description = "Harden against straight line speculation across RET instructions.",
789 .dependencies = featureSet(&[_]Feature{}),
790 };
791 result[@backingInt(Feature.hreset)] = .{
792 .llvm_name = "hreset",
793 .description = "Has hreset instruction",
794 .dependencies = featureSet(&[_]Feature{}),
795 };
796 result[@backingInt(Feature.idivl_to_divb)] = .{
797 .llvm_name = "idivl-to-divb",
798 .description = "Use 8-bit divide for positive values less than 256",
799 .dependencies = featureSet(&[_]Feature{}),
800 };
801 result[@backingInt(Feature.idivq_to_divl)] = .{
802 .llvm_name = "idivq-to-divl",
803 .description = "Use 32-bit divide for positive values less than 2^32",
804 .dependencies = featureSet(&[_]Feature{}),
805 };
806 result[@backingInt(Feature.inline_asm_use_gpr32)] = .{
807 .llvm_name = "inline-asm-use-gpr32",
808 .description = "Enable use of GPR32 in inline assembly for APX",
809 .dependencies = featureSet(&[_]Feature{}),
810 };
811 result[@backingInt(Feature.invpcid)] = .{
812 .llvm_name = "invpcid",
813 .description = "Invalidate Process-Context Identifier",
814 .dependencies = featureSet(&[_]Feature{}),
815 };
816 result[@backingInt(Feature.kl)] = .{
817 .llvm_name = "kl",
818 .description = "Support Key Locker kl Instructions",
819 .dependencies = featureSet(&[_]Feature{
820 .sse2,
821 }),
822 };
823 result[@backingInt(Feature.lea_sp)] = .{
824 .llvm_name = "lea-sp",
825 .description = "Use LEA for adjusting the stack pointer (this is an optimization for Intel Atom processors)",
826 .dependencies = featureSet(&[_]Feature{}),
827 };
828 result[@backingInt(Feature.lea_uses_ag)] = .{
829 .llvm_name = "lea-uses-ag",
830 .description = "LEA instruction needs inputs at AG stage",
831 .dependencies = featureSet(&[_]Feature{}),
832 };
833 result[@backingInt(Feature.lvi_cfi)] = .{
834 .llvm_name = "lvi-cfi",
835 .description = "Prevent indirect calls/branches from using a memory operand, and precede all indirect calls/branches from a register with an LFENCE instruction to serialize control flow. Also decompose RET instructions into a POP+LFENCE+JMP sequence.",
836 .dependencies = featureSet(&[_]Feature{}),
837 };
838 result[@backingInt(Feature.lvi_load_hardening)] = .{
839 .llvm_name = "lvi-load-hardening",
840 .description = "Insert LFENCE instructions to prevent data speculatively injected into loads from being used maliciously.",
841 .dependencies = featureSet(&[_]Feature{}),
842 };
843 result[@backingInt(Feature.lwp)] = .{
844 .llvm_name = "lwp",
845 .description = "Enable LWP instructions",
846 .dependencies = featureSet(&[_]Feature{}),
847 };
848 result[@backingInt(Feature.lzcnt)] = .{
849 .llvm_name = "lzcnt",
850 .description = "Support LZCNT instruction",
851 .dependencies = featureSet(&[_]Feature{}),
852 };
853 result[@backingInt(Feature.macrofusion)] = .{
854 .llvm_name = "macrofusion",
855 .description = "Various instructions can be fused with conditional branches",
856 .dependencies = featureSet(&[_]Feature{}),
857 };
858 result[@backingInt(Feature.mmx)] = .{
859 .llvm_name = "mmx",
860 .description = "Enable MMX instructions",
861 .dependencies = featureSet(&[_]Feature{}),
862 };
863 result[@backingInt(Feature.movbe)] = .{
864 .llvm_name = "movbe",
865 .description = "Support MOVBE instruction",
866 .dependencies = featureSet(&[_]Feature{}),
867 };
868 result[@backingInt(Feature.movdir64b)] = .{
869 .llvm_name = "movdir64b",
870 .description = "Support movdir64b instruction (direct store 64 bytes)",
871 .dependencies = featureSet(&[_]Feature{}),
872 };
873 result[@backingInt(Feature.movdiri)] = .{
874 .llvm_name = "movdiri",
875 .description = "Support movdiri instruction (direct store integer)",
876 .dependencies = featureSet(&[_]Feature{}),
877 };
878 result[@backingInt(Feature.movrs)] = .{
879 .llvm_name = "movrs",
880 .description = "Enable MOVRS",
881 .dependencies = featureSet(&[_]Feature{}),
882 };
883 result[@backingInt(Feature.mwaitx)] = .{
884 .llvm_name = "mwaitx",
885 .description = "Enable MONITORX/MWAITX timer functionality",
886 .dependencies = featureSet(&[_]Feature{}),
887 };
888 result[@backingInt(Feature.ndd)] = .{
889 .llvm_name = "ndd",
890 .description = "Support non-destructive destination",
891 .dependencies = featureSet(&[_]Feature{}),
892 };
893 result[@backingInt(Feature.nf)] = .{
894 .llvm_name = "nf",
895 .description = "Support status flags update suppression",
896 .dependencies = featureSet(&[_]Feature{}),
897 };
898 result[@backingInt(Feature.no_bypass_delay)] = .{
899 .llvm_name = "no-bypass-delay",
900 .description = "Has no bypass delay when using the 'wrong' domain",
901 .dependencies = featureSet(&[_]Feature{}),
902 };
903 result[@backingInt(Feature.no_bypass_delay_blend)] = .{
904 .llvm_name = "no-bypass-delay-blend",
905 .description = "Has no bypass delay when using the 'wrong' blend type",
906 .dependencies = featureSet(&[_]Feature{}),
907 };
908 result[@backingInt(Feature.no_bypass_delay_mov)] = .{
909 .llvm_name = "no-bypass-delay-mov",
910 .description = "Has no bypass delay when using the 'wrong' mov type",
911 .dependencies = featureSet(&[_]Feature{}),
912 };
913 result[@backingInt(Feature.no_bypass_delay_shuffle)] = .{
914 .llvm_name = "no-bypass-delay-shuffle",
915 .description = "Has no bypass delay when using the 'wrong' shuffle type",
916 .dependencies = featureSet(&[_]Feature{}),
917 };
918 result[@backingInt(Feature.nopl)] = .{
919 .llvm_name = "nopl",
920 .description = "Enable NOPL instruction (generally pentium pro+)",
921 .dependencies = featureSet(&[_]Feature{}),
922 };
923 result[@backingInt(Feature.pad_short_functions)] = .{
924 .llvm_name = "pad-short-functions",
925 .description = "Pad short functions (to prevent a stall when returning too early)",
926 .dependencies = featureSet(&[_]Feature{}),
927 };
928 result[@backingInt(Feature.pclmul)] = .{
929 .llvm_name = "pclmul",
930 .description = "Enable packed carry-less multiplication instructions",
931 .dependencies = featureSet(&[_]Feature{
932 .sse2,
933 }),
934 };
935 result[@backingInt(Feature.pconfig)] = .{
936 .llvm_name = "pconfig",
937 .description = "platform configuration instruction",
938 .dependencies = featureSet(&[_]Feature{}),
939 };
940 result[@backingInt(Feature.pku)] = .{
941 .llvm_name = "pku",
942 .description = "Enable protection keys",
943 .dependencies = featureSet(&[_]Feature{}),
944 };
945 result[@backingInt(Feature.popcnt)] = .{
946 .llvm_name = "popcnt",
947 .description = "Support POPCNT instruction",
948 .dependencies = featureSet(&[_]Feature{}),
949 };
950 result[@backingInt(Feature.ppx)] = .{
951 .llvm_name = "ppx",
952 .description = "Support Push-Pop Acceleration",
953 .dependencies = featureSet(&[_]Feature{}),
954 };
955 result[@backingInt(Feature.prefer_128_bit)] = .{
956 .llvm_name = "prefer-128-bit",
957 .description = "Prefer 128-bit AVX instructions",
958 .dependencies = featureSet(&[_]Feature{}),
959 };
960 result[@backingInt(Feature.prefer_256_bit)] = .{
961 .llvm_name = "prefer-256-bit",
962 .description = "Prefer 256-bit AVX instructions",
963 .dependencies = featureSet(&[_]Feature{}),
964 };
965 result[@backingInt(Feature.prefer_legacy_setcc)] = .{
966 .llvm_name = "prefer-legacy-setcc",
967 .description = "Prefer to emit legacy SetCC.",
968 .dependencies = featureSet(&[_]Feature{}),
969 };
970 result[@backingInt(Feature.prefer_mask_registers)] = .{
971 .llvm_name = "prefer-mask-registers",
972 .description = "Prefer AVX512 mask registers over PTEST/MOVMSK",
973 .dependencies = featureSet(&[_]Feature{}),
974 };
975 result[@backingInt(Feature.prefer_movmsk_over_vtest)] = .{
976 .llvm_name = "prefer-movmsk-over-vtest",
977 .description = "Prefer movmsk over vtest instruction",
978 .dependencies = featureSet(&[_]Feature{}),
979 };
980 result[@backingInt(Feature.prefer_no_gather)] = .{
981 .llvm_name = "prefer-no-gather",
982 .description = "Prefer no gather instructions",
983 .dependencies = featureSet(&[_]Feature{}),
984 };
985 result[@backingInt(Feature.prefer_no_scatter)] = .{
986 .llvm_name = "prefer-no-scatter",
987 .description = "Prefer no scatter instructions",
988 .dependencies = featureSet(&[_]Feature{}),
989 };
990 result[@backingInt(Feature.prefetchi)] = .{
991 .llvm_name = "prefetchi",
992 .description = "Prefetch instruction with T0 or T1 Hint",
993 .dependencies = featureSet(&[_]Feature{}),
994 };
995 result[@backingInt(Feature.prefetchwt1)] = .{
996 .llvm_name = null,
997 .description = "Prefetch with Intent to Write and T1 Hint",
998 .dependencies = featureSet(&[_]Feature{}),
999 };
1000 result[@backingInt(Feature.prfchw)] = .{
1001 .llvm_name = "prfchw",
1002 .description = "Support PRFCHW instructions",
1003 .dependencies = featureSet(&[_]Feature{}),
1004 };
1005 result[@backingInt(Feature.ptwrite)] = .{
1006 .llvm_name = "ptwrite",
1007 .description = "Support ptwrite instruction",
1008 .dependencies = featureSet(&[_]Feature{}),
1009 };
1010 result[@backingInt(Feature.push2pop2)] = .{
1011 .llvm_name = "push2pop2",
1012 .description = "Support PUSH2/POP2 instructions",
1013 .dependencies = featureSet(&[_]Feature{}),
1014 };
1015 result[@backingInt(Feature.raoint)] = .{
1016 .llvm_name = "raoint",
1017 .description = "Support RAO-INT instructions",
1018 .dependencies = featureSet(&[_]Feature{}),
1019 };
1020 result[@backingInt(Feature.rdpid)] = .{
1021 .llvm_name = "rdpid",
1022 .description = "Support RDPID instructions",
1023 .dependencies = featureSet(&[_]Feature{}),
1024 };
1025 result[@backingInt(Feature.rdpru)] = .{
1026 .llvm_name = "rdpru",
1027 .description = "Support RDPRU instructions",
1028 .dependencies = featureSet(&[_]Feature{}),
1029 };
1030 result[@backingInt(Feature.rdrnd)] = .{
1031 .llvm_name = "rdrnd",
1032 .description = "Support RDRAND instruction",
1033 .dependencies = featureSet(&[_]Feature{}),
1034 };
1035 result[@backingInt(Feature.rdseed)] = .{
1036 .llvm_name = "rdseed",
1037 .description = "Support RDSEED instruction",
1038 .dependencies = featureSet(&[_]Feature{}),
1039 };
1040 result[@backingInt(Feature.retpoline)] = .{
1041 .llvm_name = "retpoline",
1042 .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
1043 .dependencies = featureSet(&[_]Feature{
1044 .retpoline_indirect_branches,
1045 .retpoline_indirect_calls,
1046 }),
1047 };
1048 result[@backingInt(Feature.retpoline_external_thunk)] = .{
1049 .llvm_name = "retpoline-external-thunk",
1050 .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
1051 .dependencies = featureSet(&[_]Feature{
1052 .retpoline_indirect_calls,
1053 }),
1054 };
1055 result[@backingInt(Feature.retpoline_indirect_branches)] = .{
1056 .llvm_name = "retpoline-indirect-branches",
1057 .description = "Remove speculation of indirect branches from the generated code",
1058 .dependencies = featureSet(&[_]Feature{}),
1059 };
1060 result[@backingInt(Feature.retpoline_indirect_calls)] = .{
1061 .llvm_name = "retpoline-indirect-calls",
1062 .description = "Remove speculation of indirect calls from the generated code",
1063 .dependencies = featureSet(&[_]Feature{}),
1064 };
1065 result[@backingInt(Feature.rtm)] = .{
1066 .llvm_name = "rtm",
1067 .description = "Support RTM instructions",
1068 .dependencies = featureSet(&[_]Feature{}),
1069 };
1070 result[@backingInt(Feature.sahf)] = .{
1071 .llvm_name = "sahf",
1072 .description = "Support LAHF and SAHF instructions in 64-bit mode",
1073 .dependencies = featureSet(&[_]Feature{}),
1074 };
1075 result[@backingInt(Feature.sbb_dep_breaking)] = .{
1076 .llvm_name = "sbb-dep-breaking",
1077 .description = "SBB with same register has no source dependency",
1078 .dependencies = featureSet(&[_]Feature{}),
1079 };
1080 result[@backingInt(Feature.serialize)] = .{
1081 .llvm_name = "serialize",
1082 .description = "Has serialize instruction",
1083 .dependencies = featureSet(&[_]Feature{}),
1084 };
1085 result[@backingInt(Feature.seses)] = .{
1086 .llvm_name = "seses",
1087 .description = "Prevent speculative execution side channel timing attacks by inserting a speculation barrier before memory reads, memory writes, and conditional branches. Implies LVI Control Flow integrity.",
1088 .dependencies = featureSet(&[_]Feature{
1089 .lvi_cfi,
1090 }),
1091 };
1092 result[@backingInt(Feature.sgx)] = .{
1093 .llvm_name = "sgx",
1094 .description = "Enable Software Guard Extensions",
1095 .dependencies = featureSet(&[_]Feature{}),
1096 };
1097 result[@backingInt(Feature.sha)] = .{
1098 .llvm_name = "sha",
1099 .description = "Enable SHA instructions",
1100 .dependencies = featureSet(&[_]Feature{
1101 .sse2,
1102 }),
1103 };
1104 result[@backingInt(Feature.sha512)] = .{
1105 .llvm_name = "sha512",
1106 .description = "Support SHA512 instructions",
1107 .dependencies = featureSet(&[_]Feature{
1108 .avx2,
1109 }),
1110 };
1111 result[@backingInt(Feature.shstk)] = .{
1112 .llvm_name = "shstk",
1113 .description = "Support CET Shadow-Stack instructions",
1114 .dependencies = featureSet(&[_]Feature{}),
1115 };
1116 result[@backingInt(Feature.slow_3ops_lea)] = .{
1117 .llvm_name = "slow-3ops-lea",
1118 .description = "LEA instruction with 3 ops or certain registers is slow",
1119 .dependencies = featureSet(&[_]Feature{}),
1120 };
1121 result[@backingInt(Feature.slow_incdec)] = .{
1122 .llvm_name = "slow-incdec",
1123 .description = "INC and DEC instructions are slower than ADD and SUB",
1124 .dependencies = featureSet(&[_]Feature{}),
1125 };
1126 result[@backingInt(Feature.slow_lea)] = .{
1127 .llvm_name = "slow-lea",
1128 .description = "LEA instruction with certain arguments is slow",
1129 .dependencies = featureSet(&[_]Feature{}),
1130 };
1131 result[@backingInt(Feature.slow_pmaddwd)] = .{
1132 .llvm_name = "slow-pmaddwd",
1133 .description = "PMADDWD is slower than PMULLD",
1134 .dependencies = featureSet(&[_]Feature{}),
1135 };
1136 result[@backingInt(Feature.slow_pmulld)] = .{
1137 .llvm_name = "slow-pmulld",
1138 .description = "PMULLD instruction is slow (compared to PMULLW/PMULHW and PMULUDQ)",
1139 .dependencies = featureSet(&[_]Feature{}),
1140 };
1141 result[@backingInt(Feature.slow_pmullq)] = .{
1142 .llvm_name = "slow-pmullq",
1143 .description = "PMULLQ instruction is slow",
1144 .dependencies = featureSet(&[_]Feature{}),
1145 };
1146 result[@backingInt(Feature.slow_shld)] = .{
1147 .llvm_name = "slow-shld",
1148 .description = "SHLD instruction is slow",
1149 .dependencies = featureSet(&[_]Feature{}),
1150 };
1151 result[@backingInt(Feature.slow_two_mem_ops)] = .{
1152 .llvm_name = "slow-two-mem-ops",
1153 .description = "Two memory operand instructions are slow",
1154 .dependencies = featureSet(&[_]Feature{}),
1155 };
1156 result[@backingInt(Feature.slow_unaligned_mem_16)] = .{
1157 .llvm_name = "slow-unaligned-mem-16",
1158 .description = "Slow unaligned 16-byte memory access",
1159 .dependencies = featureSet(&[_]Feature{}),
1160 };
1161 result[@backingInt(Feature.slow_unaligned_mem_32)] = .{
1162 .llvm_name = "slow-unaligned-mem-32",
1163 .description = "Slow unaligned 32-byte memory access",
1164 .dependencies = featureSet(&[_]Feature{}),
1165 };
1166 result[@backingInt(Feature.sm3)] = .{
1167 .llvm_name = "sm3",
1168 .description = "Support SM3 instructions",
1169 .dependencies = featureSet(&[_]Feature{
1170 .avx,
1171 }),
1172 };
1173 result[@backingInt(Feature.sm4)] = .{
1174 .llvm_name = "sm4",
1175 .description = "Support SM4 instructions",
1176 .dependencies = featureSet(&[_]Feature{
1177 .avx2,
1178 }),
1179 };
1180 result[@backingInt(Feature.smap)] = .{
1181 .llvm_name = null,
1182 .description = "Enable Supervisor Mode Access Prevention",
1183 .dependencies = featureSet(&[_]Feature{}),
1184 };
1185 result[@backingInt(Feature.smep)] = .{
1186 .llvm_name = null,
1187 .description = "Enable Supervisor Mode Execution Prevention",
1188 .dependencies = featureSet(&[_]Feature{}),
1189 };
1190 result[@backingInt(Feature.soft_float)] = .{
1191 .llvm_name = "soft-float",
1192 .description = "Use software floating point features",
1193 .dependencies = featureSet(&[_]Feature{}),
1194 };
1195 result[@backingInt(Feature.sse)] = .{
1196 .llvm_name = "sse",
1197 .description = "Enable SSE instructions",
1198 .dependencies = featureSet(&[_]Feature{}),
1199 };
1200 result[@backingInt(Feature.sse2)] = .{
1201 .llvm_name = "sse2",
1202 .description = "Enable SSE2 instructions",
1203 .dependencies = featureSet(&[_]Feature{
1204 .sse,
1205 }),
1206 };
1207 result[@backingInt(Feature.sse3)] = .{
1208 .llvm_name = "sse3",
1209 .description = "Enable SSE3 instructions",
1210 .dependencies = featureSet(&[_]Feature{
1211 .sse2,
1212 }),
1213 };
1214 result[@backingInt(Feature.sse4_1)] = .{
1215 .llvm_name = "sse4.1",
1216 .description = "Enable SSE 4.1 instructions",
1217 .dependencies = featureSet(&[_]Feature{
1218 .ssse3,
1219 }),
1220 };
1221 result[@backingInt(Feature.sse4_2)] = .{
1222 .llvm_name = "sse4.2",
1223 .description = "Enable SSE 4.2 instructions",
1224 .dependencies = featureSet(&[_]Feature{
1225 .crc32,
1226 .sse4_1,
1227 }),
1228 };
1229 result[@backingInt(Feature.sse4a)] = .{
1230 .llvm_name = "sse4a",
1231 .description = "Support SSE 4a instructions",
1232 .dependencies = featureSet(&[_]Feature{
1233 .sse3,
1234 }),
1235 };
1236 result[@backingInt(Feature.sse_unaligned_mem)] = .{
1237 .llvm_name = "sse-unaligned-mem",
1238 .description = "Allow unaligned memory operands with SSE instructions (this may require setting a configuration bit in the processor)",
1239 .dependencies = featureSet(&[_]Feature{}),
1240 };
1241 result[@backingInt(Feature.ssse3)] = .{
1242 .llvm_name = "ssse3",
1243 .description = "Enable SSSE3 instructions",
1244 .dependencies = featureSet(&[_]Feature{
1245 .sse3,
1246 }),
1247 };
1248 result[@backingInt(Feature.tagged_globals)] = .{
1249 .llvm_name = "tagged-globals",
1250 .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits.",
1251 .dependencies = featureSet(&[_]Feature{}),
1252 };
1253 result[@backingInt(Feature.tbm)] = .{
1254 .llvm_name = "tbm",
1255 .description = "Enable TBM instructions",
1256 .dependencies = featureSet(&[_]Feature{}),
1257 };
1258 result[@backingInt(Feature.tsxldtrk)] = .{
1259 .llvm_name = "tsxldtrk",
1260 .description = "Support TSXLDTRK instructions",
1261 .dependencies = featureSet(&[_]Feature{}),
1262 };
1263 result[@backingInt(Feature.tuning_fast_imm_vector_shift)] = .{
1264 .llvm_name = "tuning-fast-imm-vector-shift",
1265 .description = "Vector shifts are fast (2/cycle) as opposed to slow (1/cycle)",
1266 .dependencies = featureSet(&[_]Feature{}),
1267 };
1268 result[@backingInt(Feature.uintr)] = .{
1269 .llvm_name = "uintr",
1270 .description = "Has UINTR Instructions",
1271 .dependencies = featureSet(&[_]Feature{}),
1272 };
1273 result[@backingInt(Feature.use_glm_div_sqrt_costs)] = .{
1274 .llvm_name = "use-glm-div-sqrt-costs",
1275 .description = "Use Goldmont specific floating point div/sqrt costs",
1276 .dependencies = featureSet(&[_]Feature{}),
1277 };
1278 result[@backingInt(Feature.use_slm_arith_costs)] = .{
1279 .llvm_name = "use-slm-arith-costs",
1280 .description = "Use Silvermont specific arithmetic costs",
1281 .dependencies = featureSet(&[_]Feature{}),
1282 };
1283 result[@backingInt(Feature.usermsr)] = .{
1284 .llvm_name = "usermsr",
1285 .description = "Support USERMSR instructions",
1286 .dependencies = featureSet(&[_]Feature{}),
1287 };
1288 result[@backingInt(Feature.vaes)] = .{
1289 .llvm_name = "vaes",
1290 .description = "Promote selected AES instructions to AVX512/AVX registers",
1291 .dependencies = featureSet(&[_]Feature{
1292 .aes,
1293 .avx2,
1294 }),
1295 };
1296 result[@backingInt(Feature.vpclmulqdq)] = .{
1297 .llvm_name = "vpclmulqdq",
1298 .description = "Enable vpclmulqdq instructions",
1299 .dependencies = featureSet(&[_]Feature{
1300 .avx,
1301 .pclmul,
1302 }),
1303 };
1304 result[@backingInt(Feature.vzeroupper)] = .{
1305 .llvm_name = "vzeroupper",
1306 .description = "Should insert vzeroupper instructions",
1307 .dependencies = featureSet(&[_]Feature{}),
1308 };
1309 result[@backingInt(Feature.waitpkg)] = .{
1310 .llvm_name = "waitpkg",
1311 .description = "Wait and pause enhancements",
1312 .dependencies = featureSet(&[_]Feature{}),
1313 };
1314 result[@backingInt(Feature.wbnoinvd)] = .{
1315 .llvm_name = "wbnoinvd",
1316 .description = "Write Back No Invalidate",
1317 .dependencies = featureSet(&[_]Feature{}),
1318 };
1319 result[@backingInt(Feature.widekl)] = .{
1320 .llvm_name = "widekl",
1321 .description = "Support Key Locker wide Instructions",
1322 .dependencies = featureSet(&[_]Feature{
1323 .kl,
1324 }),
1325 };
1326 result[@backingInt(Feature.x32)] = .{
1327 .llvm_name = "x32",
1328 .description = "64-bit with ILP32 programming model (e.g. x32 ABI)",
1329 .dependencies = featureSet(&[_]Feature{}),
1330 };
1331 result[@backingInt(Feature.x87)] = .{
1332 .llvm_name = "x87",
1333 .description = "Enable X87 float instructions",
1334 .dependencies = featureSet(&[_]Feature{}),
1335 };
1336 result[@backingInt(Feature.xop)] = .{
1337 .llvm_name = "xop",
1338 .description = "Enable XOP instructions",
1339 .dependencies = featureSet(&[_]Feature{
1340 .fma4,
1341 }),
1342 };
1343 result[@backingInt(Feature.xsave)] = .{
1344 .llvm_name = "xsave",
1345 .description = "Support xsave instructions",
1346 .dependencies = featureSet(&[_]Feature{}),
1347 };
1348 result[@backingInt(Feature.xsavec)] = .{
1349 .llvm_name = "xsavec",
1350 .description = "Support xsavec instructions",
1351 .dependencies = featureSet(&[_]Feature{
1352 .xsave,
1353 }),
1354 };
1355 result[@backingInt(Feature.xsaveopt)] = .{
1356 .llvm_name = "xsaveopt",
1357 .description = "Support xsaveopt instructions",
1358 .dependencies = featureSet(&[_]Feature{
1359 .xsave,
1360 }),
1361 };
1362 result[@backingInt(Feature.xsaves)] = .{
1363 .llvm_name = "xsaves",
1364 .description = "Support xsaves instructions",
1365 .dependencies = featureSet(&[_]Feature{
1366 .xsave,
1367 }),
1368 };
1369 result[@backingInt(Feature.zu)] = .{
1370 .llvm_name = "zu",
1371 .description = "Support zero-upper SETcc/IMUL",
1372 .dependencies = featureSet(&[_]Feature{}),
1373 };
1374 const ti = @typeInfo(Feature);
1375 for (&result, 0..) |*elem, i| {
1376 elem.index = i;
1377 elem.name = ti.@"enum".field_names[i];
1378 }
1379 break :blk result;
1380};
1381
1382pub const cpu = struct {
1383 pub const alderlake: CpuModel = .{
1384 .name = "alderlake",
1385 .llvm_name = "alderlake",
1386 .features = featureSet(&[_]Feature{
1387 .@"64bit",
1388 .adx,
1389 .allow_light_256_bit,
1390 .avxvnni,
1391 .bmi,
1392 .bmi2,
1393 .clflushopt,
1394 .clwb,
1395 .cmov,
1396 .cx16,
1397 .f16c,
1398 .false_deps_perm,
1399 .fast_15bytenop,
1400 .fast_gather,
1401 .fast_scalar_fsqrt,
1402 .fast_shld_rotate,
1403 .fast_variable_crosslane_shuffle,
1404 .fast_variable_perlane_shuffle,
1405 .fast_vector_fsqrt,
1406 .fma,
1407 .fsgsbase,
1408 .fxsr,
1409 .gfni,
1410 .hreset,
1411 .idivq_to_divl,
1412 .invpcid,
1413 .lzcnt,
1414 .macrofusion,
1415 .mmx,
1416 .movbe,
1417 .movdir64b,
1418 .movdiri,
1419 .no_bypass_delay_blend,
1420 .no_bypass_delay_mov,
1421 .no_bypass_delay_shuffle,
1422 .nopl,
1423 .pconfig,
1424 .pku,
1425 .popcnt,
1426 .prefer_movmsk_over_vtest,
1427 .prfchw,
1428 .ptwrite,
1429 .rdpid,
1430 .rdrnd,
1431 .rdseed,
1432 .sahf,
1433 .serialize,
1434 .sha,
1435 .shstk,
1436 .slow_3ops_lea,
1437 .slow_pmullq,
1438 .smap,
1439 .smep,
1440 .tuning_fast_imm_vector_shift,
1441 .vaes,
1442 .vpclmulqdq,
1443 .vzeroupper,
1444 .waitpkg,
1445 .widekl,
1446 .x87,
1447 .xsavec,
1448 .xsaveopt,
1449 .xsaves,
1450 }),
1451 };
1452 pub const amdfam10: CpuModel = .{
1453 .name = "amdfam10",
1454 .llvm_name = "amdfam10",
1455 .features = featureSet(&[_]Feature{
1456 .@"3dnowa",
1457 .@"64bit",
1458 .cmov,
1459 .cx16,
1460 .fast_scalar_shift_masks,
1461 .fxsr,
1462 .idivq_to_divl,
1463 .lzcnt,
1464 .nopl,
1465 .popcnt,
1466 .prfchw,
1467 .sahf,
1468 .sbb_dep_breaking,
1469 .slow_shld,
1470 .sse4a,
1471 .vzeroupper,
1472 .x87,
1473 }),
1474 };
1475 pub const arrowlake: CpuModel = .{
1476 .name = "arrowlake",
1477 .llvm_name = "arrowlake",
1478 .features = featureSet(&[_]Feature{
1479 .@"64bit",
1480 .adx,
1481 .allow_light_256_bit,
1482 .avxifma,
1483 .avxneconvert,
1484 .avxvnni,
1485 .avxvnniint8,
1486 .bmi,
1487 .bmi2,
1488 .clflushopt,
1489 .clwb,
1490 .cmov,
1491 .cmpccxadd,
1492 .cx16,
1493 .enqcmd,
1494 .f16c,
1495 .false_deps_perm,
1496 .fast_15bytenop,
1497 .fast_gather,
1498 .fast_scalar_fsqrt,
1499 .fast_shld_rotate,
1500 .fast_variable_crosslane_shuffle,
1501 .fast_variable_perlane_shuffle,
1502 .fast_vector_fsqrt,
1503 .fma,
1504 .fsgsbase,
1505 .fxsr,
1506 .gfni,
1507 .hreset,
1508 .idivq_to_divl,
1509 .invpcid,
1510 .lzcnt,
1511 .macrofusion,
1512 .mmx,
1513 .movbe,
1514 .movdir64b,
1515 .movdiri,
1516 .no_bypass_delay_blend,
1517 .no_bypass_delay_mov,
1518 .no_bypass_delay_shuffle,
1519 .nopl,
1520 .pconfig,
1521 .pku,
1522 .popcnt,
1523 .prefer_movmsk_over_vtest,
1524 .prfchw,
1525 .ptwrite,
1526 .rdpid,
1527 .rdrnd,
1528 .rdseed,
1529 .sahf,
1530 .serialize,
1531 .sha,
1532 .shstk,
1533 .slow_3ops_lea,
1534 .slow_pmullq,
1535 .smap,
1536 .smep,
1537 .tuning_fast_imm_vector_shift,
1538 .uintr,
1539 .vaes,
1540 .vpclmulqdq,
1541 .vzeroupper,
1542 .waitpkg,
1543 .widekl,
1544 .x87,
1545 .xsavec,
1546 .xsaveopt,
1547 .xsaves,
1548 }),
1549 };
1550 pub const arrowlake_s: CpuModel = .{
1551 .name = "arrowlake_s",
1552 .llvm_name = "arrowlake-s",
1553 .features = featureSet(&[_]Feature{
1554 .@"64bit",
1555 .adx,
1556 .allow_light_256_bit,
1557 .avxifma,
1558 .avxneconvert,
1559 .avxvnni,
1560 .avxvnniint16,
1561 .avxvnniint8,
1562 .bmi,
1563 .bmi2,
1564 .clflushopt,
1565 .clwb,
1566 .cmov,
1567 .cmpccxadd,
1568 .cx16,
1569 .enqcmd,
1570 .f16c,
1571 .false_deps_perm,
1572 .fast_15bytenop,
1573 .fast_gather,
1574 .fast_scalar_fsqrt,
1575 .fast_shld_rotate,
1576 .fast_variable_crosslane_shuffle,
1577 .fast_variable_perlane_shuffle,
1578 .fast_vector_fsqrt,
1579 .fma,
1580 .fsgsbase,
1581 .fxsr,
1582 .gfni,
1583 .hreset,
1584 .idivq_to_divl,
1585 .invpcid,
1586 .lzcnt,
1587 .macrofusion,
1588 .mmx,
1589 .movbe,
1590 .movdir64b,
1591 .movdiri,
1592 .no_bypass_delay_blend,
1593 .no_bypass_delay_mov,
1594 .no_bypass_delay_shuffle,
1595 .nopl,
1596 .pconfig,
1597 .pku,
1598 .popcnt,
1599 .prefer_movmsk_over_vtest,
1600 .prfchw,
1601 .ptwrite,
1602 .rdpid,
1603 .rdrnd,
1604 .rdseed,
1605 .sahf,
1606 .serialize,
1607 .sha,
1608 .sha512,
1609 .shstk,
1610 .slow_3ops_lea,
1611 .slow_pmullq,
1612 .sm3,
1613 .sm4,
1614 .smap,
1615 .smep,
1616 .tuning_fast_imm_vector_shift,
1617 .uintr,
1618 .vaes,
1619 .vpclmulqdq,
1620 .vzeroupper,
1621 .waitpkg,
1622 .widekl,
1623 .x87,
1624 .xsavec,
1625 .xsaveopt,
1626 .xsaves,
1627 }),
1628 };
1629 pub const athlon: CpuModel = .{
1630 .name = "athlon",
1631 .llvm_name = "athlon",
1632 .features = featureSet(&[_]Feature{
1633 .@"3dnowa",
1634 .cmov,
1635 .cx8,
1636 .nopl,
1637 .prfchw,
1638 .slow_shld,
1639 .slow_unaligned_mem_16,
1640 .vzeroupper,
1641 .x87,
1642 }),
1643 };
1644 pub const athlon64: CpuModel = .{
1645 .name = "athlon64",
1646 .llvm_name = "athlon64",
1647 .features = featureSet(&[_]Feature{
1648 .@"3dnowa",
1649 .@"64bit",
1650 .cmov,
1651 .cx8,
1652 .fast_scalar_shift_masks,
1653 .fxsr,
1654 .nopl,
1655 .prfchw,
1656 .sbb_dep_breaking,
1657 .slow_shld,
1658 .slow_unaligned_mem_16,
1659 .sse2,
1660 .vzeroupper,
1661 .x87,
1662 }),
1663 };
1664 pub const athlon64_sse3: CpuModel = .{
1665 .name = "athlon64_sse3",
1666 .llvm_name = "athlon64-sse3",
1667 .features = featureSet(&[_]Feature{
1668 .@"3dnowa",
1669 .@"64bit",
1670 .cmov,
1671 .cx16,
1672 .fast_scalar_shift_masks,
1673 .fxsr,
1674 .nopl,
1675 .prfchw,
1676 .sbb_dep_breaking,
1677 .slow_shld,
1678 .slow_unaligned_mem_16,
1679 .sse3,
1680 .vzeroupper,
1681 .x87,
1682 }),
1683 };
1684 pub const athlon_4: CpuModel = .{
1685 .name = "athlon_4",
1686 .llvm_name = "athlon-4",
1687 .features = featureSet(&[_]Feature{
1688 .@"3dnowa",
1689 .cmov,
1690 .cx8,
1691 .fxsr,
1692 .nopl,
1693 .prfchw,
1694 .slow_shld,
1695 .slow_unaligned_mem_16,
1696 .sse,
1697 .vzeroupper,
1698 .x87,
1699 }),
1700 };
1701 pub const athlon_fx: CpuModel = .{
1702 .name = "athlon_fx",
1703 .llvm_name = "athlon-fx",
1704 .features = featureSet(&[_]Feature{
1705 .@"3dnowa",
1706 .@"64bit",
1707 .cmov,
1708 .cx8,
1709 .fast_scalar_shift_masks,
1710 .fxsr,
1711 .nopl,
1712 .prfchw,
1713 .sbb_dep_breaking,
1714 .slow_shld,
1715 .slow_unaligned_mem_16,
1716 .sse2,
1717 .vzeroupper,
1718 .x87,
1719 }),
1720 };
1721 pub const athlon_mp: CpuModel = .{
1722 .name = "athlon_mp",
1723 .llvm_name = "athlon-mp",
1724 .features = featureSet(&[_]Feature{
1725 .@"3dnowa",
1726 .cmov,
1727 .cx8,
1728 .fxsr,
1729 .nopl,
1730 .prfchw,
1731 .slow_shld,
1732 .slow_unaligned_mem_16,
1733 .sse,
1734 .vzeroupper,
1735 .x87,
1736 }),
1737 };
1738 pub const athlon_tbird: CpuModel = .{
1739 .name = "athlon_tbird",
1740 .llvm_name = "athlon-tbird",
1741 .features = featureSet(&[_]Feature{
1742 .@"3dnowa",
1743 .cmov,
1744 .cx8,
1745 .nopl,
1746 .prfchw,
1747 .slow_shld,
1748 .slow_unaligned_mem_16,
1749 .vzeroupper,
1750 .x87,
1751 }),
1752 };
1753 pub const athlon_xp: CpuModel = .{
1754 .name = "athlon_xp",
1755 .llvm_name = "athlon-xp",
1756 .features = featureSet(&[_]Feature{
1757 .@"3dnowa",
1758 .cmov,
1759 .cx8,
1760 .fxsr,
1761 .nopl,
1762 .prfchw,
1763 .slow_shld,
1764 .slow_unaligned_mem_16,
1765 .sse,
1766 .vzeroupper,
1767 .x87,
1768 }),
1769 };
1770 pub const atom: CpuModel = .{
1771 .name = "atom",
1772 .llvm_name = "atom",
1773 .features = featureSet(&[_]Feature{
1774 .@"64bit",
1775 .cmov,
1776 .cx16,
1777 .fast_imm16,
1778 .fxsr,
1779 .idivl_to_divb,
1780 .idivq_to_divl,
1781 .lea_sp,
1782 .lea_uses_ag,
1783 .mmx,
1784 .movbe,
1785 .no_bypass_delay,
1786 .nopl,
1787 .pad_short_functions,
1788 .sahf,
1789 .slow_two_mem_ops,
1790 .slow_unaligned_mem_16,
1791 .ssse3,
1792 .vzeroupper,
1793 .x87,
1794 }),
1795 };
1796 pub const atom_sse4_2_movbe: CpuModel = .{
1797 .name = "atom_sse4_2_movbe",
1798 .llvm_name = "atom_sse4_2_movbe",
1799 .features = featureSet(&[_]Feature{
1800 .@"64bit",
1801 .aes,
1802 .clflushopt,
1803 .cmov,
1804 .cx16,
1805 .false_deps_popcnt,
1806 .fast_7bytenop,
1807 .fast_imm16,
1808 .fast_movbe,
1809 .fsgsbase,
1810 .fxsr,
1811 .idivq_to_divl,
1812 .mmx,
1813 .movbe,
1814 .no_bypass_delay,
1815 .nopl,
1816 .pclmul,
1817 .popcnt,
1818 .prfchw,
1819 .rdrnd,
1820 .rdseed,
1821 .sahf,
1822 .sha,
1823 .slow_incdec,
1824 .slow_lea,
1825 .slow_pmulld,
1826 .slow_two_mem_ops,
1827 .sse4_2,
1828 .use_slm_arith_costs,
1829 .vzeroupper,
1830 .x87,
1831 .xsavec,
1832 .xsaveopt,
1833 .xsaves,
1834 }),
1835 };
1836 pub const barcelona: CpuModel = .{
1837 .name = "barcelona",
1838 .llvm_name = "barcelona",
1839 .features = featureSet(&[_]Feature{
1840 .@"3dnowa",
1841 .@"64bit",
1842 .cmov,
1843 .cx16,
1844 .fast_scalar_shift_masks,
1845 .fxsr,
1846 .idivq_to_divl,
1847 .lzcnt,
1848 .nopl,
1849 .popcnt,
1850 .prfchw,
1851 .sahf,
1852 .sbb_dep_breaking,
1853 .slow_shld,
1854 .smap,
1855 .smep,
1856 .sse4a,
1857 .vzeroupper,
1858 .x87,
1859 }),
1860 };
1861 pub const bdver1: CpuModel = .{
1862 .name = "bdver1",
1863 .llvm_name = "bdver1",
1864 .features = featureSet(&[_]Feature{
1865 .@"64bit",
1866 .aes,
1867 .branchfusion,
1868 .cmov,
1869 .cx16,
1870 .fast_11bytenop,
1871 .fast_scalar_shift_masks,
1872 .fxsr,
1873 .idivq_to_divl,
1874 .lwp,
1875 .lzcnt,
1876 .mmx,
1877 .nopl,
1878 .pclmul,
1879 .popcnt,
1880 .prfchw,
1881 .sahf,
1882 .sbb_dep_breaking,
1883 .slow_shld,
1884 .vzeroupper,
1885 .x87,
1886 .xop,
1887 .xsave,
1888 }),
1889 };
1890 pub const bdver2: CpuModel = .{
1891 .name = "bdver2",
1892 .llvm_name = "bdver2",
1893 .features = featureSet(&[_]Feature{
1894 .@"64bit",
1895 .aes,
1896 .bmi,
1897 .branchfusion,
1898 .cmov,
1899 .cx16,
1900 .f16c,
1901 .fast_11bytenop,
1902 .fast_bextr,
1903 .fast_movbe,
1904 .fast_scalar_shift_masks,
1905 .fma,
1906 .fxsr,
1907 .idivq_to_divl,
1908 .lwp,
1909 .lzcnt,
1910 .mmx,
1911 .nopl,
1912 .pclmul,
1913 .popcnt,
1914 .prfchw,
1915 .sahf,
1916 .sbb_dep_breaking,
1917 .slow_shld,
1918 .tbm,
1919 .vzeroupper,
1920 .x87,
1921 .xop,
1922 .xsave,
1923 }),
1924 };
1925 pub const bdver3: CpuModel = .{
1926 .name = "bdver3",
1927 .llvm_name = "bdver3",
1928 .features = featureSet(&[_]Feature{
1929 .@"64bit",
1930 .aes,
1931 .bmi,
1932 .branchfusion,
1933 .cmov,
1934 .cx16,
1935 .f16c,
1936 .fast_11bytenop,
1937 .fast_bextr,
1938 .fast_movbe,
1939 .fast_scalar_shift_masks,
1940 .fma,
1941 .fsgsbase,
1942 .fxsr,
1943 .idivq_to_divl,
1944 .lwp,
1945 .lzcnt,
1946 .mmx,
1947 .nopl,
1948 .pclmul,
1949 .popcnt,
1950 .prfchw,
1951 .sahf,
1952 .sbb_dep_breaking,
1953 .slow_shld,
1954 .tbm,
1955 .vzeroupper,
1956 .x87,
1957 .xop,
1958 .xsaveopt,
1959 }),
1960 };
1961 pub const bdver4: CpuModel = .{
1962 .name = "bdver4",
1963 .llvm_name = "bdver4",
1964 .features = featureSet(&[_]Feature{
1965 .@"64bit",
1966 .aes,
1967 .avx2,
1968 .bmi,
1969 .bmi2,
1970 .branchfusion,
1971 .cmov,
1972 .cx16,
1973 .f16c,
1974 .fast_11bytenop,
1975 .fast_bextr,
1976 .fast_movbe,
1977 .fast_scalar_shift_masks,
1978 .fma,
1979 .fsgsbase,
1980 .fxsr,
1981 .idivq_to_divl,
1982 .lwp,
1983 .lzcnt,
1984 .mmx,
1985 .movbe,
1986 .mwaitx,
1987 .nopl,
1988 .pclmul,
1989 .popcnt,
1990 .prfchw,
1991 .rdrnd,
1992 .sahf,
1993 .sbb_dep_breaking,
1994 .slow_shld,
1995 .tbm,
1996 .vzeroupper,
1997 .x87,
1998 .xop,
1999 .xsaveopt,
2000 }),
2001 };
2002 pub const bonnell: CpuModel = .{
2003 .name = "bonnell",
2004 .llvm_name = "bonnell",
2005 .features = featureSet(&[_]Feature{
2006 .@"64bit",
2007 .cmov,
2008 .cx16,
2009 .fast_imm16,
2010 .fxsr,
2011 .idivl_to_divb,
2012 .idivq_to_divl,
2013 .lea_sp,
2014 .lea_uses_ag,
2015 .mmx,
2016 .movbe,
2017 .no_bypass_delay,
2018 .nopl,
2019 .pad_short_functions,
2020 .sahf,
2021 .slow_two_mem_ops,
2022 .slow_unaligned_mem_16,
2023 .ssse3,
2024 .vzeroupper,
2025 .x87,
2026 }),
2027 };
2028 pub const broadwell: CpuModel = .{
2029 .name = "broadwell",
2030 .llvm_name = "broadwell",
2031 .features = featureSet(&[_]Feature{
2032 .@"64bit",
2033 .adx,
2034 .allow_light_256_bit,
2035 .avx2,
2036 .bmi,
2037 .bmi2,
2038 .cmov,
2039 .cx16,
2040 .ermsb,
2041 .f16c,
2042 .false_deps_lzcnt_tzcnt,
2043 .false_deps_popcnt,
2044 .fast_15bytenop,
2045 .fast_scalar_fsqrt,
2046 .fast_shld_rotate,
2047 .fast_variable_crosslane_shuffle,
2048 .fast_variable_perlane_shuffle,
2049 .fma,
2050 .fsgsbase,
2051 .fxsr,
2052 .idivq_to_divl,
2053 .invpcid,
2054 .lzcnt,
2055 .macrofusion,
2056 .mmx,
2057 .movbe,
2058 .no_bypass_delay_mov,
2059 .no_bypass_delay_shuffle,
2060 .nopl,
2061 .pclmul,
2062 .popcnt,
2063 .prfchw,
2064 .rdrnd,
2065 .rdseed,
2066 .sahf,
2067 .slow_3ops_lea,
2068 .smap,
2069 .smep,
2070 .vzeroupper,
2071 .x87,
2072 .xsaveopt,
2073 }),
2074 };
2075 pub const btver1: CpuModel = .{
2076 .name = "btver1",
2077 .llvm_name = "btver1",
2078 .features = featureSet(&[_]Feature{
2079 .@"64bit",
2080 .cmov,
2081 .cx16,
2082 .fast_15bytenop,
2083 .fast_imm16,
2084 .fast_scalar_shift_masks,
2085 .fast_vector_shift_masks,
2086 .fxsr,
2087 .idivq_to_divl,
2088 .lzcnt,
2089 .mmx,
2090 .nopl,
2091 .popcnt,
2092 .prfchw,
2093 .sahf,
2094 .sbb_dep_breaking,
2095 .slow_shld,
2096 .sse4a,
2097 .ssse3,
2098 .vzeroupper,
2099 .x87,
2100 }),
2101 };
2102 pub const btver2: CpuModel = .{
2103 .name = "btver2",
2104 .llvm_name = "btver2",
2105 .features = featureSet(&[_]Feature{
2106 .@"64bit",
2107 .aes,
2108 .bmi,
2109 .cmov,
2110 .cx16,
2111 .f16c,
2112 .fast_15bytenop,
2113 .fast_bextr,
2114 .fast_hops,
2115 .fast_imm16,
2116 .fast_lzcnt,
2117 .fast_movbe,
2118 .fast_scalar_shift_masks,
2119 .fast_vector_shift_masks,
2120 .fxsr,
2121 .idivq_to_divl,
2122 .lzcnt,
2123 .mmx,
2124 .movbe,
2125 .nopl,
2126 .pclmul,
2127 .popcnt,
2128 .prfchw,
2129 .sahf,
2130 .sbb_dep_breaking,
2131 .slow_shld,
2132 .sse4a,
2133 .x87,
2134 .xsaveopt,
2135 }),
2136 };
2137 pub const c3: CpuModel = .{
2138 .name = "c3",
2139 .llvm_name = "c3",
2140 .features = featureSet(&[_]Feature{
2141 .@"3dnow",
2142 .prfchw,
2143 .slow_unaligned_mem_16,
2144 .vzeroupper,
2145 .x87,
2146 }),
2147 };
2148 pub const c3_2: CpuModel = .{
2149 .name = "c3_2",
2150 .llvm_name = "c3-2",
2151 .features = featureSet(&[_]Feature{
2152 .cmov,
2153 .cx8,
2154 .fxsr,
2155 .mmx,
2156 .slow_unaligned_mem_16,
2157 .sse,
2158 .vzeroupper,
2159 .x87,
2160 }),
2161 };
2162 pub const cannonlake: CpuModel = .{
2163 .name = "cannonlake",
2164 .llvm_name = "cannonlake",
2165 .features = featureSet(&[_]Feature{
2166 .@"64bit",
2167 .adx,
2168 .aes,
2169 .allow_light_256_bit,
2170 .avx512cd,
2171 .avx512dq,
2172 .avx512ifma,
2173 .avx512vbmi,
2174 .avx512vl,
2175 .bmi,
2176 .bmi2,
2177 .clflushopt,
2178 .cmov,
2179 .cx16,
2180 .ermsb,
2181 .fast_15bytenop,
2182 .fast_gather,
2183 .fast_scalar_fsqrt,
2184 .fast_shld_rotate,
2185 .fast_variable_crosslane_shuffle,
2186 .fast_variable_perlane_shuffle,
2187 .fast_vector_fsqrt,
2188 .fsgsbase,
2189 .fxsr,
2190 .idivq_to_divl,
2191 .invpcid,
2192 .lzcnt,
2193 .macrofusion,
2194 .mmx,
2195 .movbe,
2196 .no_bypass_delay_blend,
2197 .no_bypass_delay_mov,
2198 .no_bypass_delay_shuffle,
2199 .nopl,
2200 .pclmul,
2201 .pku,
2202 .popcnt,
2203 .prefer_256_bit,
2204 .prfchw,
2205 .rdrnd,
2206 .rdseed,
2207 .sahf,
2208 .sha,
2209 .slow_3ops_lea,
2210 .slow_pmullq,
2211 .smap,
2212 .smep,
2213 .tuning_fast_imm_vector_shift,
2214 .vzeroupper,
2215 .x87,
2216 .xsavec,
2217 .xsaveopt,
2218 .xsaves,
2219 }),
2220 };
2221 pub const cascadelake: CpuModel = .{
2222 .name = "cascadelake",
2223 .llvm_name = "cascadelake",
2224 .features = featureSet(&[_]Feature{
2225 .@"64bit",
2226 .adx,
2227 .aes,
2228 .allow_light_256_bit,
2229 .avx512bw,
2230 .avx512cd,
2231 .avx512dq,
2232 .avx512vl,
2233 .avx512vnni,
2234 .bmi,
2235 .bmi2,
2236 .clflushopt,
2237 .clwb,
2238 .cmov,
2239 .cx16,
2240 .ermsb,
2241 .false_deps_popcnt,
2242 .fast_15bytenop,
2243 .fast_gather,
2244 .fast_scalar_fsqrt,
2245 .fast_shld_rotate,
2246 .fast_variable_crosslane_shuffle,
2247 .fast_variable_perlane_shuffle,
2248 .fast_vector_fsqrt,
2249 .faster_shift_than_shuffle,
2250 .fsgsbase,
2251 .fxsr,
2252 .idivq_to_divl,
2253 .invpcid,
2254 .lzcnt,
2255 .macrofusion,
2256 .mmx,
2257 .movbe,
2258 .no_bypass_delay_blend,
2259 .no_bypass_delay_mov,
2260 .no_bypass_delay_shuffle,
2261 .nopl,
2262 .pclmul,
2263 .pku,
2264 .popcnt,
2265 .prefer_256_bit,
2266 .prfchw,
2267 .rdrnd,
2268 .rdseed,
2269 .sahf,
2270 .slow_3ops_lea,
2271 .smap,
2272 .smep,
2273 .tuning_fast_imm_vector_shift,
2274 .vzeroupper,
2275 .x87,
2276 .xsavec,
2277 .xsaveopt,
2278 .xsaves,
2279 }),
2280 };
2281 pub const clearwaterforest: CpuModel = .{
2282 .name = "clearwaterforest",
2283 .llvm_name = "clearwaterforest",
2284 .features = featureSet(&[_]Feature{
2285 .@"64bit",
2286 .adx,
2287 .allow_light_256_bit,
2288 .avxifma,
2289 .avxneconvert,
2290 .avxvnni,
2291 .avxvnniint16,
2292 .avxvnniint8,
2293 .bmi,
2294 .bmi2,
2295 .cldemote,
2296 .clflushopt,
2297 .clwb,
2298 .cmov,
2299 .cmpccxadd,
2300 .cx16,
2301 .enqcmd,
2302 .f16c,
2303 .false_deps_perm,
2304 .fast_15bytenop,
2305 .fast_gather,
2306 .fast_scalar_fsqrt,
2307 .fast_shld_rotate,
2308 .fast_variable_crosslane_shuffle,
2309 .fast_variable_perlane_shuffle,
2310 .fast_vector_fsqrt,
2311 .fma,
2312 .fsgsbase,
2313 .fxsr,
2314 .gfni,
2315 .hreset,
2316 .idivq_to_divl,
2317 .invpcid,
2318 .lzcnt,
2319 .macrofusion,
2320 .mmx,
2321 .movbe,
2322 .movdir64b,
2323 .movdiri,
2324 .no_bypass_delay_blend,
2325 .no_bypass_delay_mov,
2326 .no_bypass_delay_shuffle,
2327 .nopl,
2328 .pconfig,
2329 .pku,
2330 .popcnt,
2331 .prefer_movmsk_over_vtest,
2332 .prefetchi,
2333 .prfchw,
2334 .ptwrite,
2335 .rdpid,
2336 .rdrnd,
2337 .rdseed,
2338 .sahf,
2339 .serialize,
2340 .sha,
2341 .sha512,
2342 .shstk,
2343 .slow_3ops_lea,
2344 .slow_pmullq,
2345 .sm3,
2346 .sm4,
2347 .tuning_fast_imm_vector_shift,
2348 .uintr,
2349 .usermsr,
2350 .vaes,
2351 .vpclmulqdq,
2352 .vzeroupper,
2353 .waitpkg,
2354 .x87,
2355 .xsavec,
2356 .xsaveopt,
2357 .xsaves,
2358 }),
2359 };
2360 pub const cooperlake: CpuModel = .{
2361 .name = "cooperlake",
2362 .llvm_name = "cooperlake",
2363 .features = featureSet(&[_]Feature{
2364 .@"64bit",
2365 .adx,
2366 .aes,
2367 .allow_light_256_bit,
2368 .avx512bf16,
2369 .avx512cd,
2370 .avx512dq,
2371 .avx512vl,
2372 .avx512vnni,
2373 .bmi,
2374 .bmi2,
2375 .clflushopt,
2376 .clwb,
2377 .cmov,
2378 .cx16,
2379 .ermsb,
2380 .false_deps_popcnt,
2381 .fast_15bytenop,
2382 .fast_gather,
2383 .fast_scalar_fsqrt,
2384 .fast_shld_rotate,
2385 .fast_variable_crosslane_shuffle,
2386 .fast_variable_perlane_shuffle,
2387 .fast_vector_fsqrt,
2388 .faster_shift_than_shuffle,
2389 .fsgsbase,
2390 .fxsr,
2391 .idivq_to_divl,
2392 .invpcid,
2393 .lzcnt,
2394 .macrofusion,
2395 .mmx,
2396 .movbe,
2397 .no_bypass_delay_blend,
2398 .no_bypass_delay_mov,
2399 .no_bypass_delay_shuffle,
2400 .nopl,
2401 .pclmul,
2402 .pku,
2403 .popcnt,
2404 .prefer_256_bit,
2405 .prfchw,
2406 .rdrnd,
2407 .rdseed,
2408 .sahf,
2409 .slow_3ops_lea,
2410 .tuning_fast_imm_vector_shift,
2411 .vzeroupper,
2412 .x87,
2413 .xsavec,
2414 .xsaveopt,
2415 .xsaves,
2416 }),
2417 };
2418 pub const core2: CpuModel = .{
2419 .name = "core2",
2420 .llvm_name = "core2",
2421 .features = featureSet(&[_]Feature{
2422 .@"64bit",
2423 .cmov,
2424 .cx16,
2425 .fxsr,
2426 .macrofusion,
2427 .mmx,
2428 .nopl,
2429 .sahf,
2430 .slow_unaligned_mem_16,
2431 .ssse3,
2432 .vzeroupper,
2433 .x87,
2434 }),
2435 };
2436 pub const corei7: CpuModel = .{
2437 .name = "corei7",
2438 .llvm_name = "corei7",
2439 .features = featureSet(&[_]Feature{
2440 .@"64bit",
2441 .cmov,
2442 .cx16,
2443 .fxsr,
2444 .idivq_to_divl,
2445 .macrofusion,
2446 .mmx,
2447 .no_bypass_delay_mov,
2448 .nopl,
2449 .popcnt,
2450 .sahf,
2451 .sse4_2,
2452 .vzeroupper,
2453 .x87,
2454 }),
2455 };
2456 pub const diamondrapids: CpuModel = .{
2457 .name = "diamondrapids",
2458 .llvm_name = "diamondrapids",
2459 .features = featureSet(&[_]Feature{
2460 .@"64bit",
2461 .adx,
2462 .allow_light_256_bit,
2463 .amx_avx512,
2464 .amx_bf16,
2465 .amx_complex,
2466 .amx_fp16,
2467 .amx_fp8,
2468 .amx_int8,
2469 .amx_movrs,
2470 .amx_tf32,
2471 .avx10_2,
2472 .avxifma,
2473 .avxneconvert,
2474 .avxvnni,
2475 .avxvnniint16,
2476 .avxvnniint8,
2477 .bmi,
2478 .bmi2,
2479 .branch_hint,
2480 .ccmp,
2481 .cldemote,
2482 .clflushopt,
2483 .clwb,
2484 .cmov,
2485 .cmpccxadd,
2486 .cx16,
2487 .egpr,
2488 .enqcmd,
2489 .ermsb,
2490 .false_deps_getmant,
2491 .false_deps_mulc,
2492 .false_deps_mullq,
2493 .false_deps_perm,
2494 .false_deps_range,
2495 .fast_15bytenop,
2496 .fast_gather,
2497 .fast_scalar_fsqrt,
2498 .fast_shld_rotate,
2499 .fast_variable_crosslane_shuffle,
2500 .fast_variable_perlane_shuffle,
2501 .fast_vector_fsqrt,
2502 .fsgsbase,
2503 .fsrm,
2504 .fxsr,
2505 .gfni,
2506 .idivq_to_divl,
2507 .invpcid,
2508 .lzcnt,
2509 .macrofusion,
2510 .mmx,
2511 .movbe,
2512 .movdir64b,
2513 .movdiri,
2514 .movrs,
2515 .ndd,
2516 .nf,
2517 .no_bypass_delay_blend,
2518 .no_bypass_delay_mov,
2519 .no_bypass_delay_shuffle,
2520 .nopl,
2521 .pconfig,
2522 .pku,
2523 .popcnt,
2524 .ppx,
2525 .prefer_256_bit,
2526 .prefetchi,
2527 .prfchw,
2528 .ptwrite,
2529 .push2pop2,
2530 .rdpid,
2531 .rdrnd,
2532 .rdseed,
2533 .sahf,
2534 .serialize,
2535 .sha,
2536 .sha512,
2537 .shstk,
2538 .slow_pmullq,
2539 .sm3,
2540 .sm4,
2541 .tsxldtrk,
2542 .tuning_fast_imm_vector_shift,
2543 .uintr,
2544 .vaes,
2545 .vpclmulqdq,
2546 .vzeroupper,
2547 .waitpkg,
2548 .wbnoinvd,
2549 .x87,
2550 .xsavec,
2551 .xsaveopt,
2552 .xsaves,
2553 .zu,
2554 }),
2555 };
2556 pub const emeraldrapids: CpuModel = .{
2557 .name = "emeraldrapids",
2558 .llvm_name = "emeraldrapids",
2559 .features = featureSet(&[_]Feature{
2560 .@"64bit",
2561 .adx,
2562 .allow_light_256_bit,
2563 .amx_bf16,
2564 .amx_int8,
2565 .avx512bf16,
2566 .avx512bitalg,
2567 .avx512cd,
2568 .avx512dq,
2569 .avx512fp16,
2570 .avx512ifma,
2571 .avx512vbmi,
2572 .avx512vbmi2,
2573 .avx512vl,
2574 .avx512vnni,
2575 .avx512vpopcntdq,
2576 .avxvnni,
2577 .bmi,
2578 .bmi2,
2579 .cldemote,
2580 .clflushopt,
2581 .clwb,
2582 .cmov,
2583 .cx16,
2584 .enqcmd,
2585 .ermsb,
2586 .false_deps_getmant,
2587 .false_deps_mulc,
2588 .false_deps_mullq,
2589 .false_deps_perm,
2590 .false_deps_range,
2591 .fast_15bytenop,
2592 .fast_gather,
2593 .fast_scalar_fsqrt,
2594 .fast_shld_rotate,
2595 .fast_variable_crosslane_shuffle,
2596 .fast_variable_perlane_shuffle,
2597 .fast_vector_fsqrt,
2598 .fsgsbase,
2599 .fsrm,
2600 .fxsr,
2601 .gfni,
2602 .idivq_to_divl,
2603 .invpcid,
2604 .lzcnt,
2605 .macrofusion,
2606 .mmx,
2607 .movbe,
2608 .movdir64b,
2609 .movdiri,
2610 .no_bypass_delay_blend,
2611 .no_bypass_delay_mov,
2612 .no_bypass_delay_shuffle,
2613 .nopl,
2614 .pconfig,
2615 .pku,
2616 .popcnt,
2617 .prefer_256_bit,
2618 .prfchw,
2619 .ptwrite,
2620 .rdpid,
2621 .rdrnd,
2622 .rdseed,
2623 .sahf,
2624 .serialize,
2625 .sha,
2626 .shstk,
2627 .slow_pmullq,
2628 .smap,
2629 .smep,
2630 .tsxldtrk,
2631 .tuning_fast_imm_vector_shift,
2632 .uintr,
2633 .vaes,
2634 .vpclmulqdq,
2635 .vzeroupper,
2636 .waitpkg,
2637 .wbnoinvd,
2638 .x87,
2639 .xsavec,
2640 .xsaveopt,
2641 .xsaves,
2642 }),
2643 };
2644 pub const generic: CpuModel = .{
2645 .name = "generic",
2646 .llvm_name = "generic",
2647 .features = featureSet(&[_]Feature{
2648 .@"64bit",
2649 .cx8,
2650 .fast_15bytenop,
2651 .fast_scalar_fsqrt,
2652 .idivq_to_divl,
2653 .macrofusion,
2654 .slow_3ops_lea,
2655 .vzeroupper,
2656 .x87,
2657 }),
2658 };
2659 pub const geode: CpuModel = .{
2660 .name = "geode",
2661 .llvm_name = "geode",
2662 .features = featureSet(&[_]Feature{
2663 .@"3dnowa",
2664 .cx8,
2665 .prfchw,
2666 .slow_unaligned_mem_16,
2667 .vzeroupper,
2668 .x87,
2669 }),
2670 };
2671 pub const goldmont: CpuModel = .{
2672 .name = "goldmont",
2673 .llvm_name = "goldmont",
2674 .features = featureSet(&[_]Feature{
2675 .@"64bit",
2676 .aes,
2677 .clflushopt,
2678 .cmov,
2679 .cx16,
2680 .false_deps_popcnt,
2681 .fast_imm16,
2682 .fast_movbe,
2683 .fsgsbase,
2684 .fxsr,
2685 .mmx,
2686 .movbe,
2687 .no_bypass_delay,
2688 .nopl,
2689 .pclmul,
2690 .popcnt,
2691 .prfchw,
2692 .rdrnd,
2693 .rdseed,
2694 .sahf,
2695 .sha,
2696 .slow_incdec,
2697 .slow_lea,
2698 .slow_two_mem_ops,
2699 .smap,
2700 .smep,
2701 .sse4_2,
2702 .use_glm_div_sqrt_costs,
2703 .vzeroupper,
2704 .x87,
2705 .xsavec,
2706 .xsaveopt,
2707 .xsaves,
2708 }),
2709 };
2710 pub const goldmont_plus: CpuModel = .{
2711 .name = "goldmont_plus",
2712 .llvm_name = "goldmont-plus",
2713 .features = featureSet(&[_]Feature{
2714 .@"64bit",
2715 .aes,
2716 .clflushopt,
2717 .cmov,
2718 .cx16,
2719 .fast_imm16,
2720 .fast_movbe,
2721 .fsgsbase,
2722 .fxsr,
2723 .mmx,
2724 .movbe,
2725 .no_bypass_delay,
2726 .nopl,
2727 .pclmul,
2728 .popcnt,
2729 .prfchw,
2730 .ptwrite,
2731 .rdpid,
2732 .rdrnd,
2733 .rdseed,
2734 .sahf,
2735 .sha,
2736 .slow_incdec,
2737 .slow_lea,
2738 .slow_two_mem_ops,
2739 .sse4_2,
2740 .use_glm_div_sqrt_costs,
2741 .vzeroupper,
2742 .x87,
2743 .xsavec,
2744 .xsaveopt,
2745 .xsaves,
2746 }),
2747 };
2748 pub const gracemont: CpuModel = .{
2749 .name = "gracemont",
2750 .llvm_name = "gracemont",
2751 .features = featureSet(&[_]Feature{
2752 .@"64bit",
2753 .adx,
2754 .avxvnni,
2755 .bmi,
2756 .bmi2,
2757 .clflushopt,
2758 .clwb,
2759 .cmov,
2760 .cx16,
2761 .f16c,
2762 .false_deps_popcnt,
2763 .fast_15bytenop,
2764 .fast_scalar_fsqrt,
2765 .fast_variable_perlane_shuffle,
2766 .fast_vector_fsqrt,
2767 .fma,
2768 .fsgsbase,
2769 .fxsr,
2770 .gfni,
2771 .hreset,
2772 .invpcid,
2773 .lzcnt,
2774 .macrofusion,
2775 .mmx,
2776 .movbe,
2777 .movdir64b,
2778 .movdiri,
2779 .nopl,
2780 .pconfig,
2781 .pku,
2782 .popcnt,
2783 .prfchw,
2784 .ptwrite,
2785 .rdpid,
2786 .rdrnd,
2787 .rdseed,
2788 .sahf,
2789 .serialize,
2790 .sha,
2791 .shstk,
2792 .slow_3ops_lea,
2793 .vaes,
2794 .vpclmulqdq,
2795 .vzeroupper,
2796 .waitpkg,
2797 .widekl,
2798 .x87,
2799 .xsavec,
2800 .xsaveopt,
2801 .xsaves,
2802 }),
2803 };
2804 pub const grandridge: CpuModel = .{
2805 .name = "grandridge",
2806 .llvm_name = "grandridge",
2807 .features = featureSet(&[_]Feature{
2808 .@"64bit",
2809 .adx,
2810 .avxifma,
2811 .avxneconvert,
2812 .avxvnni,
2813 .avxvnniint8,
2814 .bmi,
2815 .bmi2,
2816 .cldemote,
2817 .clflushopt,
2818 .clwb,
2819 .cmov,
2820 .cmpccxadd,
2821 .cx16,
2822 .enqcmd,
2823 .f16c,
2824 .false_deps_popcnt,
2825 .fast_15bytenop,
2826 .fast_scalar_fsqrt,
2827 .fast_variable_perlane_shuffle,
2828 .fast_vector_fsqrt,
2829 .fma,
2830 .fsgsbase,
2831 .fxsr,
2832 .gfni,
2833 .hreset,
2834 .invpcid,
2835 .lzcnt,
2836 .macrofusion,
2837 .mmx,
2838 .movbe,
2839 .movdir64b,
2840 .movdiri,
2841 .nopl,
2842 .pconfig,
2843 .pku,
2844 .popcnt,
2845 .prfchw,
2846 .ptwrite,
2847 .rdpid,
2848 .rdrnd,
2849 .rdseed,
2850 .sahf,
2851 .serialize,
2852 .sha,
2853 .shstk,
2854 .slow_3ops_lea,
2855 .uintr,
2856 .vaes,
2857 .vpclmulqdq,
2858 .vzeroupper,
2859 .waitpkg,
2860 .widekl,
2861 .x87,
2862 .xsavec,
2863 .xsaveopt,
2864 .xsaves,
2865 }),
2866 };
2867 pub const graniterapids: CpuModel = .{
2868 .name = "graniterapids",
2869 .llvm_name = "graniterapids",
2870 .features = featureSet(&[_]Feature{
2871 .@"64bit",
2872 .adx,
2873 .allow_light_256_bit,
2874 .amx_bf16,
2875 .amx_fp16,
2876 .amx_int8,
2877 .avx512bf16,
2878 .avx512bitalg,
2879 .avx512cd,
2880 .avx512dq,
2881 .avx512fp16,
2882 .avx512ifma,
2883 .avx512vbmi,
2884 .avx512vbmi2,
2885 .avx512vl,
2886 .avx512vnni,
2887 .avx512vpopcntdq,
2888 .avxvnni,
2889 .bmi,
2890 .bmi2,
2891 .branch_hint,
2892 .cldemote,
2893 .clflushopt,
2894 .clwb,
2895 .cmov,
2896 .cx16,
2897 .enqcmd,
2898 .ermsb,
2899 .false_deps_getmant,
2900 .false_deps_mulc,
2901 .false_deps_mullq,
2902 .false_deps_perm,
2903 .false_deps_range,
2904 .fast_15bytenop,
2905 .fast_gather,
2906 .fast_scalar_fsqrt,
2907 .fast_shld_rotate,
2908 .fast_variable_crosslane_shuffle,
2909 .fast_variable_perlane_shuffle,
2910 .fast_vector_fsqrt,
2911 .fsgsbase,
2912 .fsrm,
2913 .fxsr,
2914 .gfni,
2915 .idivq_to_divl,
2916 .invpcid,
2917 .lzcnt,
2918 .macrofusion,
2919 .mmx,
2920 .movbe,
2921 .movdir64b,
2922 .movdiri,
2923 .no_bypass_delay_blend,
2924 .no_bypass_delay_mov,
2925 .no_bypass_delay_shuffle,
2926 .nopl,
2927 .pconfig,
2928 .pku,
2929 .popcnt,
2930 .prefer_256_bit,
2931 .prefetchi,
2932 .prfchw,
2933 .ptwrite,
2934 .rdpid,
2935 .rdrnd,
2936 .rdseed,
2937 .sahf,
2938 .serialize,
2939 .sha,
2940 .shstk,
2941 .slow_pmullq,
2942 .tsxldtrk,
2943 .tuning_fast_imm_vector_shift,
2944 .uintr,
2945 .vaes,
2946 .vpclmulqdq,
2947 .vzeroupper,
2948 .waitpkg,
2949 .wbnoinvd,
2950 .x87,
2951 .xsavec,
2952 .xsaveopt,
2953 .xsaves,
2954 }),
2955 };
2956 pub const graniterapids_d: CpuModel = .{
2957 .name = "graniterapids_d",
2958 .llvm_name = "graniterapids-d",
2959 .features = featureSet(&[_]Feature{
2960 .@"64bit",
2961 .adx,
2962 .allow_light_256_bit,
2963 .amx_bf16,
2964 .amx_complex,
2965 .amx_fp16,
2966 .amx_int8,
2967 .avx512bf16,
2968 .avx512bitalg,
2969 .avx512cd,
2970 .avx512dq,
2971 .avx512fp16,
2972 .avx512ifma,
2973 .avx512vbmi,
2974 .avx512vbmi2,
2975 .avx512vl,
2976 .avx512vnni,
2977 .avx512vpopcntdq,
2978 .avxvnni,
2979 .bmi,
2980 .bmi2,
2981 .branch_hint,
2982 .cldemote,
2983 .clflushopt,
2984 .clwb,
2985 .cmov,
2986 .cx16,
2987 .enqcmd,
2988 .ermsb,
2989 .false_deps_getmant,
2990 .false_deps_mulc,
2991 .false_deps_mullq,
2992 .false_deps_perm,
2993 .false_deps_range,
2994 .fast_15bytenop,
2995 .fast_gather,
2996 .fast_scalar_fsqrt,
2997 .fast_shld_rotate,
2998 .fast_variable_crosslane_shuffle,
2999 .fast_variable_perlane_shuffle,
3000 .fast_vector_fsqrt,
3001 .fsgsbase,
3002 .fsrm,
3003 .fxsr,
3004 .gfni,
3005 .idivq_to_divl,
3006 .invpcid,
3007 .lzcnt,
3008 .macrofusion,
3009 .mmx,
3010 .movbe,
3011 .movdir64b,
3012 .movdiri,
3013 .no_bypass_delay_blend,
3014 .no_bypass_delay_mov,
3015 .no_bypass_delay_shuffle,
3016 .nopl,
3017 .pconfig,
3018 .pku,
3019 .popcnt,
3020 .prefer_256_bit,
3021 .prefetchi,
3022 .prfchw,
3023 .ptwrite,
3024 .rdpid,
3025 .rdrnd,
3026 .rdseed,
3027 .sahf,
3028 .serialize,
3029 .sha,
3030 .shstk,
3031 .slow_pmullq,
3032 .tsxldtrk,
3033 .tuning_fast_imm_vector_shift,
3034 .uintr,
3035 .vaes,
3036 .vpclmulqdq,
3037 .vzeroupper,
3038 .waitpkg,
3039 .wbnoinvd,
3040 .x87,
3041 .xsavec,
3042 .xsaveopt,
3043 .xsaves,
3044 }),
3045 };
3046 pub const haswell: CpuModel = .{
3047 .name = "haswell",
3048 .llvm_name = "haswell",
3049 .features = featureSet(&[_]Feature{
3050 .@"64bit",
3051 .allow_light_256_bit,
3052 .avx2,
3053 .bmi,
3054 .bmi2,
3055 .cmov,
3056 .cx16,
3057 .ermsb,
3058 .f16c,
3059 .false_deps_lzcnt_tzcnt,
3060 .false_deps_popcnt,
3061 .fast_15bytenop,
3062 .fast_scalar_fsqrt,
3063 .fast_shld_rotate,
3064 .fast_variable_crosslane_shuffle,
3065 .fast_variable_perlane_shuffle,
3066 .fma,
3067 .fsgsbase,
3068 .fxsr,
3069 .idivq_to_divl,
3070 .invpcid,
3071 .lzcnt,
3072 .macrofusion,
3073 .mmx,
3074 .movbe,
3075 .no_bypass_delay_mov,
3076 .no_bypass_delay_shuffle,
3077 .nopl,
3078 .pclmul,
3079 .popcnt,
3080 .rdrnd,
3081 .sahf,
3082 .slow_3ops_lea,
3083 .smep,
3084 .vzeroupper,
3085 .x87,
3086 .xsaveopt,
3087 }),
3088 };
3089 pub const @"i386": CpuModel = .{
3090 .name = "i386",
3091 .llvm_name = "i386",
3092 .features = featureSet(&[_]Feature{
3093 .bsf_bsr_0_clobbers_result,
3094 .slow_unaligned_mem_16,
3095 .vzeroupper,
3096 .x87,
3097 }),
3098 };
3099 pub const @"i486": CpuModel = .{
3100 .name = "i486",
3101 .llvm_name = "i486",
3102 .features = featureSet(&[_]Feature{
3103 .bsf_bsr_0_clobbers_result,
3104 .slow_unaligned_mem_16,
3105 .vzeroupper,
3106 .x87,
3107 }),
3108 };
3109 pub const @"i586": CpuModel = .{
3110 .name = "i586",
3111 .llvm_name = "i586",
3112 .features = featureSet(&[_]Feature{
3113 .cx8,
3114 .slow_unaligned_mem_16,
3115 .vzeroupper,
3116 .x87,
3117 }),
3118 };
3119 pub const @"i686": CpuModel = .{
3120 .name = "i686",
3121 .llvm_name = "i686",
3122 .features = featureSet(&[_]Feature{
3123 .cmov,
3124 .cx8,
3125 .slow_unaligned_mem_16,
3126 .vzeroupper,
3127 .x87,
3128 }),
3129 };
3130 pub const @"i86": CpuModel = .{
3131 .name = "i86",
3132 .llvm_name = null,
3133 .features = featureSet(&[_]Feature{
3134 .@"16bit_mode",
3135 }),
3136 };
3137 pub const icelake_client: CpuModel = .{
3138 .name = "icelake_client",
3139 .llvm_name = "icelake-client",
3140 .features = featureSet(&[_]Feature{
3141 .@"64bit",
3142 .adx,
3143 .allow_light_256_bit,
3144 .avx512bitalg,
3145 .avx512cd,
3146 .avx512dq,
3147 .avx512ifma,
3148 .avx512vbmi,
3149 .avx512vbmi2,
3150 .avx512vl,
3151 .avx512vnni,
3152 .avx512vpopcntdq,
3153 .bmi,
3154 .bmi2,
3155 .clflushopt,
3156 .cmov,
3157 .cx16,
3158 .ermsb,
3159 .fast_15bytenop,
3160 .fast_gather,
3161 .fast_scalar_fsqrt,
3162 .fast_shld_rotate,
3163 .fast_variable_crosslane_shuffle,
3164 .fast_variable_perlane_shuffle,
3165 .fast_vector_fsqrt,
3166 .fsgsbase,
3167 .fsrm,
3168 .fxsr,
3169 .gfni,
3170 .idivq_to_divl,
3171 .invpcid,
3172 .lzcnt,
3173 .macrofusion,
3174 .mmx,
3175 .movbe,
3176 .no_bypass_delay_blend,
3177 .no_bypass_delay_mov,
3178 .no_bypass_delay_shuffle,
3179 .nopl,
3180 .pku,
3181 .popcnt,
3182 .prefer_256_bit,
3183 .prfchw,
3184 .rdpid,
3185 .rdrnd,
3186 .rdseed,
3187 .sahf,
3188 .sha,
3189 .slow_pmullq,
3190 .tuning_fast_imm_vector_shift,
3191 .vaes,
3192 .vpclmulqdq,
3193 .vzeroupper,
3194 .x87,
3195 .xsavec,
3196 .xsaveopt,
3197 .xsaves,
3198 }),
3199 };
3200 pub const icelake_server: CpuModel = .{
3201 .name = "icelake_server",
3202 .llvm_name = "icelake-server",
3203 .features = featureSet(&[_]Feature{
3204 .@"64bit",
3205 .adx,
3206 .allow_light_256_bit,
3207 .avx512bitalg,
3208 .avx512cd,
3209 .avx512dq,
3210 .avx512ifma,
3211 .avx512vbmi,
3212 .avx512vbmi2,
3213 .avx512vl,
3214 .avx512vnni,
3215 .avx512vpopcntdq,
3216 .bmi,
3217 .bmi2,
3218 .clflushopt,
3219 .clwb,
3220 .cmov,
3221 .cx16,
3222 .ermsb,
3223 .fast_15bytenop,
3224 .fast_gather,
3225 .fast_scalar_fsqrt,
3226 .fast_shld_rotate,
3227 .fast_variable_crosslane_shuffle,
3228 .fast_variable_perlane_shuffle,
3229 .fast_vector_fsqrt,
3230 .fsgsbase,
3231 .fsrm,
3232 .fxsr,
3233 .gfni,
3234 .idivq_to_divl,
3235 .invpcid,
3236 .lzcnt,
3237 .macrofusion,
3238 .mmx,
3239 .movbe,
3240 .no_bypass_delay_blend,
3241 .no_bypass_delay_mov,
3242 .no_bypass_delay_shuffle,
3243 .nopl,
3244 .pconfig,
3245 .pku,
3246 .popcnt,
3247 .prefer_256_bit,
3248 .prfchw,
3249 .rdpid,
3250 .rdrnd,
3251 .rdseed,
3252 .sahf,
3253 .sha,
3254 .slow_pmullq,
3255 .tuning_fast_imm_vector_shift,
3256 .vaes,
3257 .vpclmulqdq,
3258 .vzeroupper,
3259 .wbnoinvd,
3260 .x87,
3261 .xsavec,
3262 .xsaveopt,
3263 .xsaves,
3264 }),
3265 };
3266 pub const ivybridge: CpuModel = .{
3267 .name = "ivybridge",
3268 .llvm_name = "ivybridge",
3269 .features = featureSet(&[_]Feature{
3270 .@"64bit",
3271 .cmov,
3272 .cx16,
3273 .f16c,
3274 .false_deps_popcnt,
3275 .fast_15bytenop,
3276 .fast_scalar_fsqrt,
3277 .fast_shld_rotate,
3278 .fsgsbase,
3279 .fxsr,
3280 .idivq_to_divl,
3281 .macrofusion,
3282 .mmx,
3283 .no_bypass_delay_mov,
3284 .nopl,
3285 .pclmul,
3286 .popcnt,
3287 .rdrnd,
3288 .sahf,
3289 .slow_3ops_lea,
3290 .slow_unaligned_mem_32,
3291 .smep,
3292 .vzeroupper,
3293 .x87,
3294 .xsaveopt,
3295 }),
3296 };
3297 pub const k6: CpuModel = .{
3298 .name = "k6",
3299 .llvm_name = "k6",
3300 .features = featureSet(&[_]Feature{
3301 .cx8,
3302 .mmx,
3303 .slow_unaligned_mem_16,
3304 .vzeroupper,
3305 .x87,
3306 }),
3307 };
3308 pub const k6_2: CpuModel = .{
3309 .name = "k6_2",
3310 .llvm_name = "k6-2",
3311 .features = featureSet(&[_]Feature{
3312 .@"3dnow",
3313 .cx8,
3314 .prfchw,
3315 .slow_unaligned_mem_16,
3316 .vzeroupper,
3317 .x87,
3318 }),
3319 };
3320 pub const k6_3: CpuModel = .{
3321 .name = "k6_3",
3322 .llvm_name = "k6-3",
3323 .features = featureSet(&[_]Feature{
3324 .@"3dnow",
3325 .cx8,
3326 .prfchw,
3327 .slow_unaligned_mem_16,
3328 .vzeroupper,
3329 .x87,
3330 }),
3331 };
3332 pub const k8: CpuModel = .{
3333 .name = "k8",
3334 .llvm_name = "k8",
3335 .features = featureSet(&[_]Feature{
3336 .@"3dnowa",
3337 .@"64bit",
3338 .cmov,
3339 .cx8,
3340 .fast_scalar_shift_masks,
3341 .fxsr,
3342 .nopl,
3343 .prfchw,
3344 .sbb_dep_breaking,
3345 .slow_shld,
3346 .slow_unaligned_mem_16,
3347 .sse2,
3348 .vzeroupper,
3349 .x87,
3350 }),
3351 };
3352 pub const k8_sse3: CpuModel = .{
3353 .name = "k8_sse3",
3354 .llvm_name = "k8-sse3",
3355 .features = featureSet(&[_]Feature{
3356 .@"3dnowa",
3357 .@"64bit",
3358 .cmov,
3359 .cx16,
3360 .fast_scalar_shift_masks,
3361 .fxsr,
3362 .nopl,
3363 .prfchw,
3364 .sbb_dep_breaking,
3365 .slow_shld,
3366 .slow_unaligned_mem_16,
3367 .sse3,
3368 .vzeroupper,
3369 .x87,
3370 }),
3371 };
3372 pub const knl: CpuModel = .{
3373 .name = "knl",
3374 .llvm_name = "knl",
3375 .features = featureSet(&[_]Feature{
3376 .@"64bit",
3377 .adx,
3378 .aes,
3379 .avx512cd,
3380 .avx512er,
3381 .avx512pf,
3382 .bmi,
3383 .bmi2,
3384 .cmov,
3385 .cx16,
3386 .fast_gather,
3387 .fast_imm16,
3388 .fast_movbe,
3389 .fsgsbase,
3390 .fxsr,
3391 .idivq_to_divl,
3392 .lzcnt,
3393 .mmx,
3394 .movbe,
3395 .nopl,
3396 .pclmul,
3397 .popcnt,
3398 .prefer_mask_registers,
3399 .prefetchwt1,
3400 .prfchw,
3401 .rdrnd,
3402 .rdseed,
3403 .sahf,
3404 .slow_3ops_lea,
3405 .slow_incdec,
3406 .slow_pmaddwd,
3407 .slow_two_mem_ops,
3408 .x87,
3409 .xsaveopt,
3410 }),
3411 };
3412 pub const knm: CpuModel = .{
3413 .name = "knm",
3414 .llvm_name = "knm",
3415 .features = featureSet(&[_]Feature{
3416 .@"64bit",
3417 .adx,
3418 .aes,
3419 .avx512cd,
3420 .avx512er,
3421 .avx512pf,
3422 .avx512vpopcntdq,
3423 .bmi,
3424 .bmi2,
3425 .cmov,
3426 .cx16,
3427 .fast_gather,
3428 .fast_imm16,
3429 .fast_movbe,
3430 .fsgsbase,
3431 .fxsr,
3432 .idivq_to_divl,
3433 .lzcnt,
3434 .mmx,
3435 .movbe,
3436 .nopl,
3437 .pclmul,
3438 .popcnt,
3439 .prefer_mask_registers,
3440 .prefetchwt1,
3441 .prfchw,
3442 .rdrnd,
3443 .rdseed,
3444 .sahf,
3445 .slow_3ops_lea,
3446 .slow_incdec,
3447 .slow_pmaddwd,
3448 .slow_two_mem_ops,
3449 .x87,
3450 .xsaveopt,
3451 }),
3452 };
3453 pub const lakemont: CpuModel = .{
3454 .name = "lakemont",
3455 .llvm_name = "lakemont",
3456 .features = featureSet(&[_]Feature{
3457 .cx8,
3458 .slow_unaligned_mem_16,
3459 .soft_float,
3460 .vzeroupper,
3461 }),
3462 };
3463 pub const lunarlake: CpuModel = .{
3464 .name = "lunarlake",
3465 .llvm_name = "lunarlake",
3466 .features = featureSet(&[_]Feature{
3467 .@"64bit",
3468 .adx,
3469 .allow_light_256_bit,
3470 .avxifma,
3471 .avxneconvert,
3472 .avxvnni,
3473 .avxvnniint16,
3474 .avxvnniint8,
3475 .bmi,
3476 .bmi2,
3477 .clflushopt,
3478 .clwb,
3479 .cmov,
3480 .cmpccxadd,
3481 .cx16,
3482 .enqcmd,
3483 .f16c,
3484 .false_deps_perm,
3485 .fast_15bytenop,
3486 .fast_gather,
3487 .fast_scalar_fsqrt,
3488 .fast_shld_rotate,
3489 .fast_variable_crosslane_shuffle,
3490 .fast_variable_perlane_shuffle,
3491 .fast_vector_fsqrt,
3492 .fma,
3493 .fsgsbase,
3494 .fxsr,
3495 .gfni,
3496 .hreset,
3497 .idivq_to_divl,
3498 .invpcid,
3499 .lzcnt,
3500 .macrofusion,
3501 .mmx,
3502 .movbe,
3503 .movdir64b,
3504 .movdiri,
3505 .no_bypass_delay_blend,
3506 .no_bypass_delay_mov,
3507 .no_bypass_delay_shuffle,
3508 .nopl,
3509 .pconfig,
3510 .pku,
3511 .popcnt,
3512 .prefer_movmsk_over_vtest,
3513 .prfchw,
3514 .ptwrite,
3515 .rdpid,
3516 .rdrnd,
3517 .rdseed,
3518 .sahf,
3519 .serialize,
3520 .sha,
3521 .sha512,
3522 .shstk,
3523 .slow_3ops_lea,
3524 .slow_pmullq,
3525 .sm3,
3526 .sm4,
3527 .tuning_fast_imm_vector_shift,
3528 .uintr,
3529 .vaes,
3530 .vpclmulqdq,
3531 .vzeroupper,
3532 .waitpkg,
3533 .widekl,
3534 .x87,
3535 .xsavec,
3536 .xsaveopt,
3537 .xsaves,
3538 }),
3539 };
3540 pub const meteorlake: CpuModel = .{
3541 .name = "meteorlake",
3542 .llvm_name = "meteorlake",
3543 .features = featureSet(&[_]Feature{
3544 .@"64bit",
3545 .adx,
3546 .allow_light_256_bit,
3547 .avxvnni,
3548 .bmi,
3549 .bmi2,
3550 .clflushopt,
3551 .clwb,
3552 .cmov,
3553 .cx16,
3554 .f16c,
3555 .false_deps_perm,
3556 .fast_15bytenop,
3557 .fast_gather,
3558 .fast_scalar_fsqrt,
3559 .fast_shld_rotate,
3560 .fast_variable_crosslane_shuffle,
3561 .fast_variable_perlane_shuffle,
3562 .fast_vector_fsqrt,
3563 .fma,
3564 .fsgsbase,
3565 .fxsr,
3566 .gfni,
3567 .hreset,
3568 .idivq_to_divl,
3569 .invpcid,
3570 .lzcnt,
3571 .macrofusion,
3572 .mmx,
3573 .movbe,
3574 .movdir64b,
3575 .movdiri,
3576 .no_bypass_delay_blend,
3577 .no_bypass_delay_mov,
3578 .no_bypass_delay_shuffle,
3579 .nopl,
3580 .pconfig,
3581 .pku,
3582 .popcnt,
3583 .prefer_movmsk_over_vtest,
3584 .prfchw,
3585 .ptwrite,
3586 .rdpid,
3587 .rdrnd,
3588 .rdseed,
3589 .sahf,
3590 .serialize,
3591 .sha,
3592 .shstk,
3593 .slow_3ops_lea,
3594 .slow_pmullq,
3595 .smap,
3596 .smep,
3597 .tuning_fast_imm_vector_shift,
3598 .vaes,
3599 .vpclmulqdq,
3600 .vzeroupper,
3601 .waitpkg,
3602 .widekl,
3603 .x87,
3604 .xsavec,
3605 .xsaveopt,
3606 .xsaves,
3607 }),
3608 };
3609 pub const nehalem: CpuModel = .{
3610 .name = "nehalem",
3611 .llvm_name = "nehalem",
3612 .features = featureSet(&[_]Feature{
3613 .@"64bit",
3614 .cmov,
3615 .cx16,
3616 .fxsr,
3617 .idivq_to_divl,
3618 .macrofusion,
3619 .mmx,
3620 .no_bypass_delay_mov,
3621 .nopl,
3622 .popcnt,
3623 .sahf,
3624 .sse4_2,
3625 .vzeroupper,
3626 .x87,
3627 }),
3628 };
3629 pub const nocona: CpuModel = .{
3630 .name = "nocona",
3631 .llvm_name = "nocona",
3632 .features = featureSet(&[_]Feature{
3633 .@"64bit",
3634 .cmov,
3635 .cx16,
3636 .fxsr,
3637 .mmx,
3638 .nopl,
3639 .slow_unaligned_mem_16,
3640 .sse3,
3641 .vzeroupper,
3642 .x87,
3643 }),
3644 };
3645 pub const novalake: CpuModel = .{
3646 .name = "novalake",
3647 .llvm_name = "novalake",
3648 .features = featureSet(&[_]Feature{
3649 .@"64bit",
3650 .adx,
3651 .allow_light_256_bit,
3652 .avx10_2,
3653 .avxifma,
3654 .avxneconvert,
3655 .avxvnni,
3656 .avxvnniint16,
3657 .avxvnniint8,
3658 .bmi,
3659 .bmi2,
3660 .ccmp,
3661 .clflushopt,
3662 .clwb,
3663 .cmov,
3664 .cmpccxadd,
3665 .cx16,
3666 .egpr,
3667 .enqcmd,
3668 .false_deps_perm,
3669 .fast_15bytenop,
3670 .fast_gather,
3671 .fast_scalar_fsqrt,
3672 .fast_shld_rotate,
3673 .fast_variable_crosslane_shuffle,
3674 .fast_variable_perlane_shuffle,
3675 .fast_vector_fsqrt,
3676 .fsgsbase,
3677 .fxsr,
3678 .gfni,
3679 .hreset,
3680 .idivq_to_divl,
3681 .invpcid,
3682 .lzcnt,
3683 .macrofusion,
3684 .mmx,
3685 .movbe,
3686 .movdir64b,
3687 .movdiri,
3688 .movrs,
3689 .ndd,
3690 .nf,
3691 .no_bypass_delay_blend,
3692 .no_bypass_delay_mov,
3693 .no_bypass_delay_shuffle,
3694 .nopl,
3695 .pconfig,
3696 .pku,
3697 .popcnt,
3698 .ppx,
3699 .prefer_movmsk_over_vtest,
3700 .prefetchi,
3701 .prfchw,
3702 .ptwrite,
3703 .push2pop2,
3704 .rdpid,
3705 .rdrnd,
3706 .rdseed,
3707 .sahf,
3708 .serialize,
3709 .sha,
3710 .sha512,
3711 .shstk,
3712 .slow_3ops_lea,
3713 .slow_pmullq,
3714 .sm3,
3715 .sm4,
3716 .tuning_fast_imm_vector_shift,
3717 .uintr,
3718 .vaes,
3719 .vpclmulqdq,
3720 .vzeroupper,
3721 .waitpkg,
3722 .x87,
3723 .xsavec,
3724 .xsaveopt,
3725 .xsaves,
3726 .zu,
3727 }),
3728 };
3729 pub const opteron: CpuModel = .{
3730 .name = "opteron",
3731 .llvm_name = "opteron",
3732 .features = featureSet(&[_]Feature{
3733 .@"3dnowa",
3734 .@"64bit",
3735 .cmov,
3736 .cx8,
3737 .fast_scalar_shift_masks,
3738 .fxsr,
3739 .nopl,
3740 .prfchw,
3741 .sbb_dep_breaking,
3742 .slow_shld,
3743 .slow_unaligned_mem_16,
3744 .sse2,
3745 .vzeroupper,
3746 .x87,
3747 }),
3748 };
3749 pub const opteron_sse3: CpuModel = .{
3750 .name = "opteron_sse3",
3751 .llvm_name = "opteron-sse3",
3752 .features = featureSet(&[_]Feature{
3753 .@"3dnowa",
3754 .@"64bit",
3755 .cmov,
3756 .cx16,
3757 .fast_scalar_shift_masks,
3758 .fxsr,
3759 .nopl,
3760 .prfchw,
3761 .sbb_dep_breaking,
3762 .slow_shld,
3763 .slow_unaligned_mem_16,
3764 .sse3,
3765 .vzeroupper,
3766 .x87,
3767 }),
3768 };
3769 pub const pantherlake: CpuModel = .{
3770 .name = "pantherlake",
3771 .llvm_name = "pantherlake",
3772 .features = featureSet(&[_]Feature{
3773 .@"64bit",
3774 .adx,
3775 .allow_light_256_bit,
3776 .avxifma,
3777 .avxneconvert,
3778 .avxvnni,
3779 .avxvnniint16,
3780 .avxvnniint8,
3781 .bmi,
3782 .bmi2,
3783 .clflushopt,
3784 .clwb,
3785 .cmov,
3786 .cmpccxadd,
3787 .cx16,
3788 .enqcmd,
3789 .f16c,
3790 .false_deps_perm,
3791 .fast_15bytenop,
3792 .fast_gather,
3793 .fast_scalar_fsqrt,
3794 .fast_shld_rotate,
3795 .fast_variable_crosslane_shuffle,
3796 .fast_variable_perlane_shuffle,
3797 .fast_vector_fsqrt,
3798 .fma,
3799 .fsgsbase,
3800 .fxsr,
3801 .gfni,
3802 .hreset,
3803 .idivq_to_divl,
3804 .invpcid,
3805 .lzcnt,
3806 .macrofusion,
3807 .mmx,
3808 .movbe,
3809 .movdir64b,
3810 .movdiri,
3811 .no_bypass_delay_blend,
3812 .no_bypass_delay_mov,
3813 .no_bypass_delay_shuffle,
3814 .nopl,
3815 .pconfig,
3816 .pku,
3817 .popcnt,
3818 .prefer_movmsk_over_vtest,
3819 .prfchw,
3820 .ptwrite,
3821 .rdpid,
3822 .rdrnd,
3823 .rdseed,
3824 .sahf,
3825 .serialize,
3826 .sha,
3827 .sha512,
3828 .shstk,
3829 .slow_3ops_lea,
3830 .slow_pmullq,
3831 .sm3,
3832 .sm4,
3833 .tuning_fast_imm_vector_shift,
3834 .uintr,
3835 .vaes,
3836 .vpclmulqdq,
3837 .vzeroupper,
3838 .waitpkg,
3839 .x87,
3840 .xsavec,
3841 .xsaveopt,
3842 .xsaves,
3843 }),
3844 };
3845 pub const penryn: CpuModel = .{
3846 .name = "penryn",
3847 .llvm_name = "penryn",
3848 .features = featureSet(&[_]Feature{
3849 .@"64bit",
3850 .cmov,
3851 .cx16,
3852 .fxsr,
3853 .macrofusion,
3854 .mmx,
3855 .nopl,
3856 .sahf,
3857 .slow_unaligned_mem_16,
3858 .sse4_1,
3859 .vzeroupper,
3860 .x87,
3861 }),
3862 };
3863 pub const pentium: CpuModel = .{
3864 .name = "pentium",
3865 .llvm_name = "pentium",
3866 .features = featureSet(&[_]Feature{
3867 .cx8,
3868 .slow_unaligned_mem_16,
3869 .vzeroupper,
3870 .x87,
3871 }),
3872 };
3873 pub const pentium2: CpuModel = .{
3874 .name = "pentium2",
3875 .llvm_name = "pentium2",
3876 .features = featureSet(&[_]Feature{
3877 .cmov,
3878 .cx8,
3879 .fxsr,
3880 .mmx,
3881 .nopl,
3882 .slow_unaligned_mem_16,
3883 .vzeroupper,
3884 .x87,
3885 }),
3886 };
3887 pub const pentium3: CpuModel = .{
3888 .name = "pentium3",
3889 .llvm_name = "pentium3",
3890 .features = featureSet(&[_]Feature{
3891 .cmov,
3892 .cx8,
3893 .fxsr,
3894 .mmx,
3895 .nopl,
3896 .slow_unaligned_mem_16,
3897 .sse,
3898 .vzeroupper,
3899 .x87,
3900 }),
3901 };
3902 pub const pentium3m: CpuModel = .{
3903 .name = "pentium3m",
3904 .llvm_name = "pentium3m",
3905 .features = featureSet(&[_]Feature{
3906 .cmov,
3907 .cx8,
3908 .fxsr,
3909 .mmx,
3910 .nopl,
3911 .slow_unaligned_mem_16,
3912 .sse,
3913 .vzeroupper,
3914 .x87,
3915 }),
3916 };
3917 pub const pentium4: CpuModel = .{
3918 .name = "pentium4",
3919 .llvm_name = "pentium4",
3920 .features = featureSet(&[_]Feature{
3921 .cmov,
3922 .cx8,
3923 .fxsr,
3924 .mmx,
3925 .nopl,
3926 .slow_unaligned_mem_16,
3927 .sse2,
3928 .vzeroupper,
3929 .x87,
3930 }),
3931 };
3932 pub const pentium_m: CpuModel = .{
3933 .name = "pentium_m",
3934 .llvm_name = "pentium-m",
3935 .features = featureSet(&[_]Feature{
3936 .cmov,
3937 .cx8,
3938 .fxsr,
3939 .mmx,
3940 .nopl,
3941 .slow_unaligned_mem_16,
3942 .sse2,
3943 .vzeroupper,
3944 .x87,
3945 }),
3946 };
3947 pub const pentium_mmx: CpuModel = .{
3948 .name = "pentium_mmx",
3949 .llvm_name = "pentium-mmx",
3950 .features = featureSet(&[_]Feature{
3951 .cx8,
3952 .mmx,
3953 .slow_unaligned_mem_16,
3954 .vzeroupper,
3955 .x87,
3956 }),
3957 };
3958 pub const pentiumpro: CpuModel = .{
3959 .name = "pentiumpro",
3960 .llvm_name = "pentiumpro",
3961 .features = featureSet(&[_]Feature{
3962 .cmov,
3963 .cx8,
3964 .nopl,
3965 .slow_unaligned_mem_16,
3966 .vzeroupper,
3967 .x87,
3968 }),
3969 };
3970 pub const prescott: CpuModel = .{
3971 .name = "prescott",
3972 .llvm_name = "prescott",
3973 .features = featureSet(&[_]Feature{
3974 .cmov,
3975 .cx8,
3976 .fxsr,
3977 .mmx,
3978 .nopl,
3979 .slow_unaligned_mem_16,
3980 .sse3,
3981 .vzeroupper,
3982 .x87,
3983 }),
3984 };
3985 pub const raptorlake: CpuModel = .{
3986 .name = "raptorlake",
3987 .llvm_name = "raptorlake",
3988 .features = featureSet(&[_]Feature{
3989 .@"64bit",
3990 .adx,
3991 .allow_light_256_bit,
3992 .avxvnni,
3993 .bmi,
3994 .bmi2,
3995 .clflushopt,
3996 .clwb,
3997 .cmov,
3998 .cx16,
3999 .f16c,
4000 .false_deps_perm,
4001 .fast_15bytenop,
4002 .fast_gather,
4003 .fast_scalar_fsqrt,
4004 .fast_shld_rotate,
4005 .fast_variable_crosslane_shuffle,
4006 .fast_variable_perlane_shuffle,
4007 .fast_vector_fsqrt,
4008 .fma,
4009 .fsgsbase,
4010 .fxsr,
4011 .gfni,
4012 .hreset,
4013 .idivq_to_divl,
4014 .invpcid,
4015 .lzcnt,
4016 .macrofusion,
4017 .mmx,
4018 .movbe,
4019 .movdir64b,
4020 .movdiri,
4021 .no_bypass_delay_blend,
4022 .no_bypass_delay_mov,
4023 .no_bypass_delay_shuffle,
4024 .nopl,
4025 .pconfig,
4026 .pku,
4027 .popcnt,
4028 .prefer_movmsk_over_vtest,
4029 .prfchw,
4030 .ptwrite,
4031 .rdpid,
4032 .rdrnd,
4033 .rdseed,
4034 .sahf,
4035 .serialize,
4036 .sha,
4037 .shstk,
4038 .slow_3ops_lea,
4039 .slow_pmullq,
4040 .smap,
4041 .smep,
4042 .tuning_fast_imm_vector_shift,
4043 .vaes,
4044 .vpclmulqdq,
4045 .vzeroupper,
4046 .waitpkg,
4047 .widekl,
4048 .x87,
4049 .xsavec,
4050 .xsaveopt,
4051 .xsaves,
4052 }),
4053 };
4054 pub const rocketlake: CpuModel = .{
4055 .name = "rocketlake",
4056 .llvm_name = "rocketlake",
4057 .features = featureSet(&[_]Feature{
4058 .@"64bit",
4059 .adx,
4060 .allow_light_256_bit,
4061 .avx512bitalg,
4062 .avx512cd,
4063 .avx512dq,
4064 .avx512ifma,
4065 .avx512vbmi,
4066 .avx512vbmi2,
4067 .avx512vl,
4068 .avx512vnni,
4069 .avx512vpopcntdq,
4070 .bmi,
4071 .bmi2,
4072 .clflushopt,
4073 .cmov,
4074 .cx16,
4075 .ermsb,
4076 .fast_15bytenop,
4077 .fast_gather,
4078 .fast_scalar_fsqrt,
4079 .fast_shld_rotate,
4080 .fast_variable_crosslane_shuffle,
4081 .fast_variable_perlane_shuffle,
4082 .fast_vector_fsqrt,
4083 .fsgsbase,
4084 .fsrm,
4085 .fxsr,
4086 .gfni,
4087 .idivq_to_divl,
4088 .invpcid,
4089 .lzcnt,
4090 .macrofusion,
4091 .mmx,
4092 .movbe,
4093 .no_bypass_delay_blend,
4094 .no_bypass_delay_mov,
4095 .no_bypass_delay_shuffle,
4096 .nopl,
4097 .pku,
4098 .popcnt,
4099 .prefer_256_bit,
4100 .prfchw,
4101 .rdpid,
4102 .rdrnd,
4103 .rdseed,
4104 .sahf,
4105 .sha,
4106 .slow_pmullq,
4107 .smap,
4108 .smep,
4109 .tuning_fast_imm_vector_shift,
4110 .vaes,
4111 .vpclmulqdq,
4112 .vzeroupper,
4113 .x87,
4114 .xsavec,
4115 .xsaveopt,
4116 .xsaves,
4117 }),
4118 };
4119 pub const sandybridge: CpuModel = .{
4120 .name = "sandybridge",
4121 .llvm_name = "sandybridge",
4122 .features = featureSet(&[_]Feature{
4123 .@"64bit",
4124 .avx,
4125 .cmov,
4126 .cx16,
4127 .false_deps_popcnt,
4128 .fast_15bytenop,
4129 .fast_scalar_fsqrt,
4130 .fast_shld_rotate,
4131 .fxsr,
4132 .idivq_to_divl,
4133 .macrofusion,
4134 .mmx,
4135 .no_bypass_delay_mov,
4136 .nopl,
4137 .pclmul,
4138 .popcnt,
4139 .sahf,
4140 .slow_3ops_lea,
4141 .slow_unaligned_mem_32,
4142 .vzeroupper,
4143 .x87,
4144 .xsaveopt,
4145 }),
4146 };
4147 pub const sapphirerapids: CpuModel = .{
4148 .name = "sapphirerapids",
4149 .llvm_name = "sapphirerapids",
4150 .features = featureSet(&[_]Feature{
4151 .@"64bit",
4152 .adx,
4153 .allow_light_256_bit,
4154 .amx_bf16,
4155 .amx_int8,
4156 .avx512bf16,
4157 .avx512bitalg,
4158 .avx512cd,
4159 .avx512dq,
4160 .avx512fp16,
4161 .avx512ifma,
4162 .avx512vbmi,
4163 .avx512vbmi2,
4164 .avx512vl,
4165 .avx512vnni,
4166 .avx512vpopcntdq,
4167 .avxvnni,
4168 .bmi,
4169 .bmi2,
4170 .cldemote,
4171 .clflushopt,
4172 .clwb,
4173 .cmov,
4174 .cx16,
4175 .enqcmd,
4176 .ermsb,
4177 .false_deps_getmant,
4178 .false_deps_mulc,
4179 .false_deps_mullq,
4180 .false_deps_perm,
4181 .false_deps_range,
4182 .fast_15bytenop,
4183 .fast_gather,
4184 .fast_scalar_fsqrt,
4185 .fast_shld_rotate,
4186 .fast_variable_crosslane_shuffle,
4187 .fast_variable_perlane_shuffle,
4188 .fast_vector_fsqrt,
4189 .fsgsbase,
4190 .fsrm,
4191 .fxsr,
4192 .gfni,
4193 .idivq_to_divl,
4194 .invpcid,
4195 .lzcnt,
4196 .macrofusion,
4197 .mmx,
4198 .movbe,
4199 .movdir64b,
4200 .movdiri,
4201 .no_bypass_delay_blend,
4202 .no_bypass_delay_mov,
4203 .no_bypass_delay_shuffle,
4204 .nopl,
4205 .pconfig,
4206 .pku,
4207 .popcnt,
4208 .prefer_256_bit,
4209 .prfchw,
4210 .ptwrite,
4211 .rdpid,
4212 .rdrnd,
4213 .rdseed,
4214 .sahf,
4215 .serialize,
4216 .sha,
4217 .shstk,
4218 .slow_pmullq,
4219 .smap,
4220 .smep,
4221 .tsxldtrk,
4222 .tuning_fast_imm_vector_shift,
4223 .uintr,
4224 .vaes,
4225 .vpclmulqdq,
4226 .vzeroupper,
4227 .waitpkg,
4228 .wbnoinvd,
4229 .x87,
4230 .xsavec,
4231 .xsaveopt,
4232 .xsaves,
4233 }),
4234 };
4235 pub const sierraforest: CpuModel = .{
4236 .name = "sierraforest",
4237 .llvm_name = "sierraforest",
4238 .features = featureSet(&[_]Feature{
4239 .@"64bit",
4240 .adx,
4241 .avxifma,
4242 .avxneconvert,
4243 .avxvnni,
4244 .avxvnniint8,
4245 .bmi,
4246 .bmi2,
4247 .cldemote,
4248 .clflushopt,
4249 .clwb,
4250 .cmov,
4251 .cmpccxadd,
4252 .cx16,
4253 .enqcmd,
4254 .f16c,
4255 .false_deps_popcnt,
4256 .fast_15bytenop,
4257 .fast_scalar_fsqrt,
4258 .fast_variable_perlane_shuffle,
4259 .fast_vector_fsqrt,
4260 .fma,
4261 .fsgsbase,
4262 .fxsr,
4263 .gfni,
4264 .hreset,
4265 .invpcid,
4266 .lzcnt,
4267 .macrofusion,
4268 .mmx,
4269 .movbe,
4270 .movdir64b,
4271 .movdiri,
4272 .nopl,
4273 .pconfig,
4274 .pku,
4275 .popcnt,
4276 .prfchw,
4277 .ptwrite,
4278 .rdpid,
4279 .rdrnd,
4280 .rdseed,
4281 .sahf,
4282 .serialize,
4283 .sha,
4284 .shstk,
4285 .slow_3ops_lea,
4286 .uintr,
4287 .vaes,
4288 .vpclmulqdq,
4289 .vzeroupper,
4290 .waitpkg,
4291 .widekl,
4292 .x87,
4293 .xsavec,
4294 .xsaveopt,
4295 .xsaves,
4296 }),
4297 };
4298 pub const silvermont: CpuModel = .{
4299 .name = "silvermont",
4300 .llvm_name = "silvermont",
4301 .features = featureSet(&[_]Feature{
4302 .@"64bit",
4303 .cmov,
4304 .cx16,
4305 .false_deps_popcnt,
4306 .fast_7bytenop,
4307 .fast_imm16,
4308 .fast_movbe,
4309 .fxsr,
4310 .idivq_to_divl,
4311 .mmx,
4312 .movbe,
4313 .no_bypass_delay,
4314 .nopl,
4315 .pclmul,
4316 .popcnt,
4317 .prfchw,
4318 .rdrnd,
4319 .sahf,
4320 .slow_incdec,
4321 .slow_lea,
4322 .slow_pmulld,
4323 .slow_two_mem_ops,
4324 .smep,
4325 .sse4_2,
4326 .use_slm_arith_costs,
4327 .vzeroupper,
4328 .x87,
4329 }),
4330 };
4331 pub const skx: CpuModel = .{
4332 .name = "skx",
4333 .llvm_name = "skx",
4334 .features = featureSet(&[_]Feature{
4335 .@"64bit",
4336 .adx,
4337 .aes,
4338 .allow_light_256_bit,
4339 .avx512bw,
4340 .avx512cd,
4341 .avx512dq,
4342 .avx512vl,
4343 .bmi,
4344 .bmi2,
4345 .clflushopt,
4346 .clwb,
4347 .cmov,
4348 .cx16,
4349 .ermsb,
4350 .false_deps_popcnt,
4351 .fast_15bytenop,
4352 .fast_gather,
4353 .fast_scalar_fsqrt,
4354 .fast_shld_rotate,
4355 .fast_variable_crosslane_shuffle,
4356 .fast_variable_perlane_shuffle,
4357 .fast_vector_fsqrt,
4358 .faster_shift_than_shuffle,
4359 .fsgsbase,
4360 .fxsr,
4361 .idivq_to_divl,
4362 .invpcid,
4363 .lzcnt,
4364 .macrofusion,
4365 .mmx,
4366 .movbe,
4367 .no_bypass_delay_blend,
4368 .no_bypass_delay_mov,
4369 .no_bypass_delay_shuffle,
4370 .nopl,
4371 .pclmul,
4372 .pku,
4373 .popcnt,
4374 .prefer_256_bit,
4375 .prfchw,
4376 .rdrnd,
4377 .rdseed,
4378 .sahf,
4379 .slow_3ops_lea,
4380 .smap,
4381 .smep,
4382 .tuning_fast_imm_vector_shift,
4383 .vzeroupper,
4384 .x87,
4385 .xsavec,
4386 .xsaveopt,
4387 .xsaves,
4388 }),
4389 };
4390 pub const skylake: CpuModel = .{
4391 .name = "skylake",
4392 .llvm_name = "skylake",
4393 .features = featureSet(&[_]Feature{
4394 .@"64bit",
4395 .adx,
4396 .aes,
4397 .allow_light_256_bit,
4398 .avx2,
4399 .bmi,
4400 .bmi2,
4401 .clflushopt,
4402 .cmov,
4403 .cx16,
4404 .ermsb,
4405 .f16c,
4406 .false_deps_popcnt,
4407 .fast_15bytenop,
4408 .fast_gather,
4409 .fast_scalar_fsqrt,
4410 .fast_shld_rotate,
4411 .fast_variable_crosslane_shuffle,
4412 .fast_variable_perlane_shuffle,
4413 .fast_vector_fsqrt,
4414 .fma,
4415 .fsgsbase,
4416 .fxsr,
4417 .idivq_to_divl,
4418 .invpcid,
4419 .lzcnt,
4420 .macrofusion,
4421 .mmx,
4422 .movbe,
4423 .no_bypass_delay_blend,
4424 .no_bypass_delay_mov,
4425 .no_bypass_delay_shuffle,
4426 .nopl,
4427 .pclmul,
4428 .popcnt,
4429 .prfchw,
4430 .rdrnd,
4431 .rdseed,
4432 .sahf,
4433 .slow_3ops_lea,
4434 .smap,
4435 .smep,
4436 .vzeroupper,
4437 .x87,
4438 .xsavec,
4439 .xsaveopt,
4440 .xsaves,
4441 }),
4442 };
4443 pub const skylake_avx512: CpuModel = .{
4444 .name = "skylake_avx512",
4445 .llvm_name = "skylake-avx512",
4446 .features = featureSet(&[_]Feature{
4447 .@"64bit",
4448 .adx,
4449 .aes,
4450 .allow_light_256_bit,
4451 .avx512bw,
4452 .avx512cd,
4453 .avx512dq,
4454 .avx512vl,
4455 .bmi,
4456 .bmi2,
4457 .clflushopt,
4458 .clwb,
4459 .cmov,
4460 .cx16,
4461 .ermsb,
4462 .false_deps_popcnt,
4463 .fast_15bytenop,
4464 .fast_gather,
4465 .fast_scalar_fsqrt,
4466 .fast_shld_rotate,
4467 .fast_variable_crosslane_shuffle,
4468 .fast_variable_perlane_shuffle,
4469 .fast_vector_fsqrt,
4470 .faster_shift_than_shuffle,
4471 .fsgsbase,
4472 .fxsr,
4473 .idivq_to_divl,
4474 .invpcid,
4475 .lzcnt,
4476 .macrofusion,
4477 .mmx,
4478 .movbe,
4479 .no_bypass_delay_blend,
4480 .no_bypass_delay_mov,
4481 .no_bypass_delay_shuffle,
4482 .nopl,
4483 .pclmul,
4484 .pku,
4485 .popcnt,
4486 .prefer_256_bit,
4487 .prfchw,
4488 .rdrnd,
4489 .rdseed,
4490 .sahf,
4491 .slow_3ops_lea,
4492 .tuning_fast_imm_vector_shift,
4493 .vzeroupper,
4494 .x87,
4495 .xsavec,
4496 .xsaveopt,
4497 .xsaves,
4498 }),
4499 };
4500 pub const slm: CpuModel = .{
4501 .name = "slm",
4502 .llvm_name = "slm",
4503 .features = featureSet(&[_]Feature{
4504 .@"64bit",
4505 .cmov,
4506 .cx16,
4507 .false_deps_popcnt,
4508 .fast_7bytenop,
4509 .fast_imm16,
4510 .fast_movbe,
4511 .fxsr,
4512 .idivq_to_divl,
4513 .mmx,
4514 .movbe,
4515 .no_bypass_delay,
4516 .nopl,
4517 .pclmul,
4518 .popcnt,
4519 .prfchw,
4520 .rdrnd,
4521 .sahf,
4522 .slow_incdec,
4523 .slow_lea,
4524 .slow_pmulld,
4525 .slow_two_mem_ops,
4526 .sse4_2,
4527 .use_slm_arith_costs,
4528 .vzeroupper,
4529 .x87,
4530 }),
4531 };
4532 pub const tigerlake: CpuModel = .{
4533 .name = "tigerlake",
4534 .llvm_name = "tigerlake",
4535 .features = featureSet(&[_]Feature{
4536 .@"64bit",
4537 .adx,
4538 .allow_light_256_bit,
4539 .avx512bitalg,
4540 .avx512cd,
4541 .avx512dq,
4542 .avx512ifma,
4543 .avx512vbmi,
4544 .avx512vbmi2,
4545 .avx512vl,
4546 .avx512vnni,
4547 .avx512vp2intersect,
4548 .avx512vpopcntdq,
4549 .bmi,
4550 .bmi2,
4551 .clflushopt,
4552 .clwb,
4553 .cmov,
4554 .cx16,
4555 .ermsb,
4556 .fast_15bytenop,
4557 .fast_gather,
4558 .fast_scalar_fsqrt,
4559 .fast_shld_rotate,
4560 .fast_variable_crosslane_shuffle,
4561 .fast_variable_perlane_shuffle,
4562 .fast_vector_fsqrt,
4563 .fsgsbase,
4564 .fsrm,
4565 .fxsr,
4566 .gfni,
4567 .idivq_to_divl,
4568 .invpcid,
4569 .lzcnt,
4570 .macrofusion,
4571 .mmx,
4572 .movbe,
4573 .movdir64b,
4574 .movdiri,
4575 .no_bypass_delay_blend,
4576 .no_bypass_delay_mov,
4577 .no_bypass_delay_shuffle,
4578 .nopl,
4579 .pku,
4580 .popcnt,
4581 .prefer_256_bit,
4582 .prfchw,
4583 .rdpid,
4584 .rdrnd,
4585 .rdseed,
4586 .sahf,
4587 .sha,
4588 .shstk,
4589 .slow_pmullq,
4590 .smap,
4591 .smep,
4592 .tuning_fast_imm_vector_shift,
4593 .vaes,
4594 .vpclmulqdq,
4595 .vzeroupper,
4596 .x87,
4597 .xsavec,
4598 .xsaveopt,
4599 .xsaves,
4600 }),
4601 };
4602 pub const tremont: CpuModel = .{
4603 .name = "tremont",
4604 .llvm_name = "tremont",
4605 .features = featureSet(&[_]Feature{
4606 .@"64bit",
4607 .aes,
4608 .clflushopt,
4609 .clwb,
4610 .cmov,
4611 .cx16,
4612 .fast_imm16,
4613 .fast_movbe,
4614 .fsgsbase,
4615 .fxsr,
4616 .gfni,
4617 .mmx,
4618 .movbe,
4619 .no_bypass_delay,
4620 .nopl,
4621 .pclmul,
4622 .popcnt,
4623 .prfchw,
4624 .ptwrite,
4625 .rdpid,
4626 .rdrnd,
4627 .rdseed,
4628 .sahf,
4629 .sha,
4630 .slow_incdec,
4631 .slow_lea,
4632 .slow_two_mem_ops,
4633 .sse4_2,
4634 .use_glm_div_sqrt_costs,
4635 .vzeroupper,
4636 .x87,
4637 .xsavec,
4638 .xsaveopt,
4639 .xsaves,
4640 }),
4641 };
4642 pub const westmere: CpuModel = .{
4643 .name = "westmere",
4644 .llvm_name = "westmere",
4645 .features = featureSet(&[_]Feature{
4646 .@"64bit",
4647 .cmov,
4648 .cx16,
4649 .fxsr,
4650 .idivq_to_divl,
4651 .macrofusion,
4652 .mmx,
4653 .no_bypass_delay_mov,
4654 .nopl,
4655 .pclmul,
4656 .popcnt,
4657 .sahf,
4658 .sse4_2,
4659 .vzeroupper,
4660 .x87,
4661 }),
4662 };
4663 pub const wildcatlake: CpuModel = .{
4664 .name = "wildcatlake",
4665 .llvm_name = "wildcatlake",
4666 .features = featureSet(&[_]Feature{
4667 .@"64bit",
4668 .adx,
4669 .allow_light_256_bit,
4670 .avxifma,
4671 .avxneconvert,
4672 .avxvnni,
4673 .avxvnniint16,
4674 .avxvnniint8,
4675 .bmi,
4676 .bmi2,
4677 .clflushopt,
4678 .clwb,
4679 .cmov,
4680 .cmpccxadd,
4681 .cx16,
4682 .enqcmd,
4683 .f16c,
4684 .false_deps_perm,
4685 .fast_15bytenop,
4686 .fast_gather,
4687 .fast_scalar_fsqrt,
4688 .fast_shld_rotate,
4689 .fast_variable_crosslane_shuffle,
4690 .fast_variable_perlane_shuffle,
4691 .fast_vector_fsqrt,
4692 .fma,
4693 .fsgsbase,
4694 .fxsr,
4695 .gfni,
4696 .hreset,
4697 .idivq_to_divl,
4698 .invpcid,
4699 .lzcnt,
4700 .macrofusion,
4701 .mmx,
4702 .movbe,
4703 .movdir64b,
4704 .movdiri,
4705 .no_bypass_delay_blend,
4706 .no_bypass_delay_mov,
4707 .no_bypass_delay_shuffle,
4708 .nopl,
4709 .pconfig,
4710 .pku,
4711 .popcnt,
4712 .prefer_movmsk_over_vtest,
4713 .prfchw,
4714 .ptwrite,
4715 .rdpid,
4716 .rdrnd,
4717 .rdseed,
4718 .sahf,
4719 .serialize,
4720 .sha,
4721 .sha512,
4722 .shstk,
4723 .slow_3ops_lea,
4724 .slow_pmullq,
4725 .sm3,
4726 .sm4,
4727 .tuning_fast_imm_vector_shift,
4728 .uintr,
4729 .vaes,
4730 .vpclmulqdq,
4731 .vzeroupper,
4732 .waitpkg,
4733 .x87,
4734 .xsavec,
4735 .xsaveopt,
4736 .xsaves,
4737 }),
4738 };
4739 pub const winchip2: CpuModel = .{
4740 .name = "winchip2",
4741 .llvm_name = "winchip2",
4742 .features = featureSet(&[_]Feature{
4743 .@"3dnow",
4744 .prfchw,
4745 .slow_unaligned_mem_16,
4746 .vzeroupper,
4747 .x87,
4748 }),
4749 };
4750 pub const winchip_c6: CpuModel = .{
4751 .name = "winchip_c6",
4752 .llvm_name = "winchip-c6",
4753 .features = featureSet(&[_]Feature{
4754 .mmx,
4755 .slow_unaligned_mem_16,
4756 .vzeroupper,
4757 .x87,
4758 }),
4759 };
4760 pub const x86_64: CpuModel = .{
4761 .name = "x86_64",
4762 .llvm_name = "x86-64",
4763 .features = featureSet(&[_]Feature{
4764 .@"64bit",
4765 .cmov,
4766 .cx8,
4767 .fxsr,
4768 .idivq_to_divl,
4769 .macrofusion,
4770 .mmx,
4771 .nopl,
4772 .slow_3ops_lea,
4773 .slow_incdec,
4774 .sse2,
4775 .vzeroupper,
4776 .x87,
4777 }),
4778 };
4779 pub const x86_64_v2: CpuModel = .{
4780 .name = "x86_64_v2",
4781 .llvm_name = "x86-64-v2",
4782 .features = featureSet(&[_]Feature{
4783 .@"64bit",
4784 .cmov,
4785 .cx16,
4786 .false_deps_popcnt,
4787 .fast_15bytenop,
4788 .fast_scalar_fsqrt,
4789 .fast_shld_rotate,
4790 .fxsr,
4791 .idivq_to_divl,
4792 .macrofusion,
4793 .mmx,
4794 .nopl,
4795 .popcnt,
4796 .sahf,
4797 .slow_3ops_lea,
4798 .slow_unaligned_mem_32,
4799 .sse4_2,
4800 .vzeroupper,
4801 .x87,
4802 }),
4803 };
4804 pub const x86_64_v3: CpuModel = .{
4805 .name = "x86_64_v3",
4806 .llvm_name = "x86-64-v3",
4807 .features = featureSet(&[_]Feature{
4808 .@"64bit",
4809 .allow_light_256_bit,
4810 .avx2,
4811 .bmi,
4812 .bmi2,
4813 .cmov,
4814 .cx16,
4815 .f16c,
4816 .false_deps_lzcnt_tzcnt,
4817 .false_deps_popcnt,
4818 .fast_15bytenop,
4819 .fast_scalar_fsqrt,
4820 .fast_shld_rotate,
4821 .fast_variable_crosslane_shuffle,
4822 .fast_variable_perlane_shuffle,
4823 .fma,
4824 .fxsr,
4825 .idivq_to_divl,
4826 .lzcnt,
4827 .macrofusion,
4828 .mmx,
4829 .movbe,
4830 .nopl,
4831 .popcnt,
4832 .sahf,
4833 .slow_3ops_lea,
4834 .vzeroupper,
4835 .x87,
4836 .xsave,
4837 }),
4838 };
4839 pub const x86_64_v4: CpuModel = .{
4840 .name = "x86_64_v4",
4841 .llvm_name = "x86-64-v4",
4842 .features = featureSet(&[_]Feature{
4843 .@"64bit",
4844 .allow_light_256_bit,
4845 .avx512bw,
4846 .avx512cd,
4847 .avx512dq,
4848 .avx512vl,
4849 .bmi,
4850 .bmi2,
4851 .cmov,
4852 .cx16,
4853 .false_deps_popcnt,
4854 .fast_15bytenop,
4855 .fast_gather,
4856 .fast_scalar_fsqrt,
4857 .fast_shld_rotate,
4858 .fast_variable_crosslane_shuffle,
4859 .fast_variable_perlane_shuffle,
4860 .fast_vector_fsqrt,
4861 .fxsr,
4862 .idivq_to_divl,
4863 .lzcnt,
4864 .macrofusion,
4865 .mmx,
4866 .movbe,
4867 .nopl,
4868 .popcnt,
4869 .prefer_256_bit,
4870 .sahf,
4871 .slow_3ops_lea,
4872 .vzeroupper,
4873 .x87,
4874 .xsave,
4875 }),
4876 };
4877 pub const yonah: CpuModel = .{
4878 .name = "yonah",
4879 .llvm_name = "yonah",
4880 .features = featureSet(&[_]Feature{
4881 .cmov,
4882 .cx8,
4883 .fxsr,
4884 .mmx,
4885 .nopl,
4886 .slow_unaligned_mem_16,
4887 .sse3,
4888 .vzeroupper,
4889 .x87,
4890 }),
4891 };
4892 pub const znver1: CpuModel = .{
4893 .name = "znver1",
4894 .llvm_name = "znver1",
4895 .features = featureSet(&[_]Feature{
4896 .@"64bit",
4897 .adx,
4898 .aes,
4899 .allow_light_256_bit,
4900 .avx2,
4901 .bmi,
4902 .bmi2,
4903 .branchfusion,
4904 .clflushopt,
4905 .clzero,
4906 .cmov,
4907 .cx16,
4908 .f16c,
4909 .fast_15bytenop,
4910 .fast_bextr,
4911 .fast_imm16,
4912 .fast_lzcnt,
4913 .fast_movbe,
4914 .fast_scalar_fsqrt,
4915 .fast_scalar_shift_masks,
4916 .fast_variable_perlane_shuffle,
4917 .fast_vector_fsqrt,
4918 .fma,
4919 .fsgsbase,
4920 .fxsr,
4921 .idivq_to_divl,
4922 .lzcnt,
4923 .mmx,
4924 .movbe,
4925 .mwaitx,
4926 .nopl,
4927 .pclmul,
4928 .popcnt,
4929 .prfchw,
4930 .rdrnd,
4931 .rdseed,
4932 .sahf,
4933 .sbb_dep_breaking,
4934 .sha,
4935 .slow_shld,
4936 .smap,
4937 .smep,
4938 .sse4a,
4939 .vzeroupper,
4940 .x87,
4941 .xsavec,
4942 .xsaveopt,
4943 .xsaves,
4944 }),
4945 };
4946 pub const znver2: CpuModel = .{
4947 .name = "znver2",
4948 .llvm_name = "znver2",
4949 .features = featureSet(&[_]Feature{
4950 .@"64bit",
4951 .adx,
4952 .aes,
4953 .allow_light_256_bit,
4954 .avx2,
4955 .bmi,
4956 .bmi2,
4957 .branchfusion,
4958 .clflushopt,
4959 .clwb,
4960 .clzero,
4961 .cmov,
4962 .cx16,
4963 .f16c,
4964 .fast_15bytenop,
4965 .fast_bextr,
4966 .fast_imm16,
4967 .fast_lzcnt,
4968 .fast_movbe,
4969 .fast_scalar_fsqrt,
4970 .fast_scalar_shift_masks,
4971 .fast_variable_perlane_shuffle,
4972 .fast_vector_fsqrt,
4973 .fma,
4974 .fsgsbase,
4975 .fxsr,
4976 .idivq_to_divl,
4977 .lzcnt,
4978 .mmx,
4979 .movbe,
4980 .mwaitx,
4981 .nopl,
4982 .pclmul,
4983 .popcnt,
4984 .prfchw,
4985 .rdpid,
4986 .rdpru,
4987 .rdrnd,
4988 .rdseed,
4989 .sahf,
4990 .sbb_dep_breaking,
4991 .sha,
4992 .slow_shld,
4993 .smap,
4994 .smep,
4995 .sse4a,
4996 .vzeroupper,
4997 .wbnoinvd,
4998 .x87,
4999 .xsavec,
5000 .xsaveopt,
5001 .xsaves,
5002 }),
5003 };
5004 pub const znver3: CpuModel = .{
5005 .name = "znver3",
5006 .llvm_name = "znver3",
5007 .features = featureSet(&[_]Feature{
5008 .@"64bit",
5009 .adx,
5010 .allow_light_256_bit,
5011 .bmi,
5012 .bmi2,
5013 .branchfusion,
5014 .clflushopt,
5015 .clwb,
5016 .clzero,
5017 .cmov,
5018 .cx16,
5019 .f16c,
5020 .fast_15bytenop,
5021 .fast_bextr,
5022 .fast_imm16,
5023 .fast_lzcnt,
5024 .fast_movbe,
5025 .fast_scalar_fsqrt,
5026 .fast_scalar_shift_masks,
5027 .fast_variable_perlane_shuffle,
5028 .fast_vector_fsqrt,
5029 .fma,
5030 .fsgsbase,
5031 .fsrm,
5032 .fxsr,
5033 .idivq_to_divl,
5034 .invpcid,
5035 .lzcnt,
5036 .macrofusion,
5037 .mmx,
5038 .movbe,
5039 .mwaitx,
5040 .nopl,
5041 .pku,
5042 .popcnt,
5043 .prfchw,
5044 .rdpid,
5045 .rdpru,
5046 .rdrnd,
5047 .rdseed,
5048 .sahf,
5049 .sbb_dep_breaking,
5050 .sha,
5051 .smap,
5052 .smep,
5053 .sse4a,
5054 .vaes,
5055 .vpclmulqdq,
5056 .vzeroupper,
5057 .wbnoinvd,
5058 .x87,
5059 .xsavec,
5060 .xsaveopt,
5061 .xsaves,
5062 }),
5063 };
5064 pub const znver4: CpuModel = .{
5065 .name = "znver4",
5066 .llvm_name = "znver4",
5067 .features = featureSet(&[_]Feature{
5068 .@"64bit",
5069 .adx,
5070 .allow_light_256_bit,
5071 .avx512bf16,
5072 .avx512bitalg,
5073 .avx512cd,
5074 .avx512dq,
5075 .avx512ifma,
5076 .avx512vbmi,
5077 .avx512vbmi2,
5078 .avx512vl,
5079 .avx512vnni,
5080 .avx512vpopcntdq,
5081 .bmi,
5082 .bmi2,
5083 .branchfusion,
5084 .clflushopt,
5085 .clwb,
5086 .clzero,
5087 .cmov,
5088 .cx16,
5089 .fast_15bytenop,
5090 .fast_bextr,
5091 .fast_dpwssd,
5092 .fast_imm16,
5093 .fast_lzcnt,
5094 .fast_movbe,
5095 .fast_scalar_fsqrt,
5096 .fast_scalar_shift_masks,
5097 .fast_variable_perlane_shuffle,
5098 .fast_vector_fsqrt,
5099 .fsgsbase,
5100 .fsrm,
5101 .fxsr,
5102 .gfni,
5103 .idivq_to_divl,
5104 .invpcid,
5105 .lzcnt,
5106 .macrofusion,
5107 .mmx,
5108 .movbe,
5109 .mwaitx,
5110 .nopl,
5111 .pku,
5112 .popcnt,
5113 .prfchw,
5114 .rdpid,
5115 .rdpru,
5116 .rdrnd,
5117 .rdseed,
5118 .sahf,
5119 .sbb_dep_breaking,
5120 .sha,
5121 .shstk,
5122 .smap,
5123 .smep,
5124 .sse4a,
5125 .vaes,
5126 .vpclmulqdq,
5127 .vzeroupper,
5128 .wbnoinvd,
5129 .x87,
5130 .xsavec,
5131 .xsaveopt,
5132 .xsaves,
5133 }),
5134 };
5135 pub const znver5: CpuModel = .{
5136 .name = "znver5",
5137 .llvm_name = "znver5",
5138 .features = featureSet(&[_]Feature{
5139 .@"64bit",
5140 .adx,
5141 .allow_light_256_bit,
5142 .avx512bf16,
5143 .avx512bitalg,
5144 .avx512cd,
5145 .avx512dq,
5146 .avx512ifma,
5147 .avx512vbmi,
5148 .avx512vbmi2,
5149 .avx512vl,
5150 .avx512vnni,
5151 .avx512vp2intersect,
5152 .avx512vpopcntdq,
5153 .avxvnni,
5154 .bmi,
5155 .bmi2,
5156 .branchfusion,
5157 .clflushopt,
5158 .clwb,
5159 .clzero,
5160 .cmov,
5161 .cx16,
5162 .fast_15bytenop,
5163 .fast_bextr,
5164 .fast_dpwssd,
5165 .fast_imm16,
5166 .fast_lzcnt,
5167 .fast_movbe,
5168 .fast_scalar_fsqrt,
5169 .fast_scalar_shift_masks,
5170 .fast_variable_perlane_shuffle,
5171 .fast_vector_fsqrt,
5172 .fsgsbase,
5173 .fsrm,
5174 .fxsr,
5175 .gfni,
5176 .idivq_to_divl,
5177 .invpcid,
5178 .lzcnt,
5179 .macrofusion,
5180 .mmx,
5181 .movbe,
5182 .movdir64b,
5183 .movdiri,
5184 .mwaitx,
5185 .nopl,
5186 .pku,
5187 .popcnt,
5188 .prefetchi,
5189 .prfchw,
5190 .rdpid,
5191 .rdpru,
5192 .rdrnd,
5193 .rdseed,
5194 .sahf,
5195 .sbb_dep_breaking,
5196 .sha,
5197 .shstk,
5198 .smap,
5199 .smep,
5200 .sse4a,
5201 .vaes,
5202 .vpclmulqdq,
5203 .vzeroupper,
5204 .wbnoinvd,
5205 .x87,
5206 .xsavec,
5207 .xsaveopt,
5208 .xsaves,
5209 }),
5210 };
5211};