authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-10-19 23:32:47+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-10-23 09:27:17+02:00
log3e2daa509a897a4e10d5e6f28731b33ac2cc3dc2
tree6475c28a83f4b9495a4554a9bf9b06c8410dbc2f
parentdda05b29c06731895970e75c7444f0d30c7d334f
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.Target: add arceb and xtensaeb Cpu.Arch tags

16 files changed, 173 insertions(+), 115 deletions(-)

lib/std/Target.zig+126-89
...@@ -860,12 +860,14 @@ pub const Abi = enum {...@@ -860,12 +860,14 @@ pub const Abi = enum {
860860
861 // No musl support.861 // No musl support.
862 .arc,862 .arc,
863 .arceb,
863 => .gnu,864 => .gnu,
864 .csky,865 .csky,
865 => .gnueabi,866 => .gnueabi,
866867
867 // No glibc or musl support.868 // No glibc or musl support.
868 .xtensa,869 .xtensa,
870 .xtensaeb,
869 => .none,871 => .none,
870872
871 else => .musl,873 else => .musl,
...@@ -1061,12 +1063,12 @@ pub const ObjectFormat = enum {...@@ -1061,12 +1063,12 @@ pub const ObjectFormat = enum {
10611063
1062pub fn toElfMachine(target: *const Target) std.elf.EM {1064pub fn toElfMachine(target: *const Target) std.elf.EM {
1063 return switch (target.cpu.arch) {1065 return switch (target.cpu.arch) {
1066 .aarch64, .aarch64_be => .AARCH64,
1064 .amdgcn => .AMDGPU,1067 .amdgcn => .AMDGPU,
1065 .arc => .ARC_COMPACT,1068 .arc, .arceb => .ARC_COMPACT,
1066 .arm, .armeb, .thumb, .thumbeb => .ARM,1069 .arm, .armeb, .thumb, .thumbeb => .ARM,
1067 .aarch64, .aarch64_be => .AARCH64,
1068 .avr => .AVR,1070 .avr => .AVR,
1069 .bpfel, .bpfeb => .BPF,1071 .bpfeb, .bpfel => .BPF,
1070 .csky => .CSKY,1072 .csky => .CSKY,
1071 .hexagon => .QDSP6,1073 .hexagon => .QDSP6,
1072 .kalimba => .CSR_KALIMBA,1074 .kalimba => .CSR_KALIMBA,
...@@ -1087,7 +1089,7 @@ pub fn toElfMachine(target: *const Target) std.elf.EM {...@@ -1087,7 +1089,7 @@ pub fn toElfMachine(target: *const Target) std.elf.EM {
1087 .x86 => .@"386",1089 .x86 => .@"386",
1088 .x86_64 => .X86_64,1090 .x86_64 => .X86_64,
1089 .xcore => .XCORE,1091 .xcore => .XCORE,
1090 .xtensa => .XTENSA,1092 .xtensa, .xtensaeb => .XTENSA,
10911093
1092 .nvptx,1094 .nvptx,
1093 .nvptx64,1095 .nvptx64,
...@@ -1118,6 +1120,7 @@ pub fn toCoffMachine(target: *const Target) std.coff.IMAGE.FILE.MACHINE {...@@ -1118,6 +1120,7 @@ pub fn toCoffMachine(target: *const Target) std.coff.IMAGE.FILE.MACHINE {
1118 .aarch64_be,1120 .aarch64_be,
1119 .amdgcn,1121 .amdgcn,
1120 .arc,1122 .arc,
1123 .arceb,
1121 .armeb,1124 .armeb,
1122 .avr,1125 .avr,
1123 .bpfeb,1126 .bpfeb,
...@@ -1149,6 +1152,7 @@ pub fn toCoffMachine(target: *const Target) std.coff.IMAGE.FILE.MACHINE {...@@ -1149,6 +1152,7 @@ pub fn toCoffMachine(target: *const Target) std.coff.IMAGE.FILE.MACHINE {
1149 .wasm64,1152 .wasm64,
1150 .xcore,1153 .xcore,
1151 .xtensa,1154 .xtensa,
1155 .xtensaeb,
1152 => .UNKNOWN,1156 => .UNKNOWN,
1153 };1157 };
1154}1158}
...@@ -1317,17 +1321,16 @@ pub const Cpu = struct {...@@ -1317,17 +1321,16 @@ pub const Cpu = struct {
1317 };1321 };
13181322
1319 pub const Arch = enum {1323 pub const Arch = enum {
1324 aarch64,
1325 aarch64_be,
1320 amdgcn,1326 amdgcn,
1321 arc,1327 arc,
1328 arceb,
1322 arm,1329 arm,
1323 armeb,1330 armeb,
1324 thumb,
1325 thumbeb,
1326 aarch64,
1327 aarch64_be,
1328 avr,1331 avr,
1329 bpfel,
1330 bpfeb,1332 bpfeb,
1333 bpfel,
1331 csky,1334 csky,
1332 hexagon,1335 hexagon,
1333 kalimba,1336 kalimba,
...@@ -1340,9 +1343,9 @@ pub const Cpu = struct {...@@ -1340,9 +1343,9 @@ pub const Cpu = struct {
1340 mips64,1343 mips64,
1341 mips64el,1344 mips64el,
1342 msp430,1345 msp430,
1343 or1k,
1344 nvptx,1346 nvptx,
1345 nvptx64,1347 nvptx64,
1348 or1k,
1346 powerpc,1349 powerpc,
1347 powerpcle,1350 powerpcle,
1348 powerpc64,1351 powerpc64,
...@@ -1357,6 +1360,8 @@ pub const Cpu = struct {...@@ -1357,6 +1360,8 @@ pub const Cpu = struct {
1357 sparc64,1360 sparc64,
1358 spirv32,1361 spirv32,
1359 spirv64,1362 spirv64,
1363 thumb,
1364 thumbeb,
1360 ve,1365 ve,
1361 wasm32,1366 wasm32,
1362 wasm64,1367 wasm64,
...@@ -1364,6 +1369,7 @@ pub const Cpu = struct {...@@ -1364,6 +1369,7 @@ pub const Cpu = struct {
1364 x86_64,1369 x86_64,
1365 xcore,1370 xcore,
1366 xtensa,1371 xtensa,
1372 xtensaeb,
13671373
1368 // LLVM tags deliberately omitted:1374 // LLVM tags deliberately omitted:
1369 // - aarch64_321375 // - aarch64_32
...@@ -1418,12 +1424,12 @@ pub const Cpu = struct {...@@ -1418,12 +1424,12 @@ pub const Cpu = struct {
14181424
1419 pub inline fn family(arch: Arch) Family {1425 pub inline fn family(arch: Arch) Family {
1420 return switch (arch) {1426 return switch (arch) {
1427 .aarch64, .aarch64_be => .aarch64,
1421 .amdgcn => .amdgcn,1428 .amdgcn => .amdgcn,
1422 .arc => .arc,1429 .arc, .arceb => .arc,
1423 .arm, .armeb, .thumb, .thumbeb => .arm,1430 .arm, .armeb, .thumb, .thumbeb => .arm,
1424 .aarch64, .aarch64_be => .aarch64,
1425 .avr => .avr,1431 .avr => .avr,
1426 .bpfel, .bpfeb => .bpf,1432 .bpfeb, .bpfel => .bpf,
1427 .csky => .csky,1433 .csky => .csky,
1428 .hexagon => .hexagon,1434 .hexagon => .hexagon,
1429 .kalimba => .kalimba,1435 .kalimba => .kalimba,
...@@ -1444,7 +1450,7 @@ pub const Cpu = struct {...@@ -1444,7 +1450,7 @@ pub const Cpu = struct {
1444 .wasm32, .wasm64 => .wasm,1450 .wasm32, .wasm64 => .wasm,
1445 .x86, .x86_64 => .x86,1451 .x86, .x86_64 => .x86,
1446 .xcore => .xcore,1452 .xcore => .xcore,
1447 .xtensa => .xtensa,1453 .xtensa, .xtensaeb => .xtensa,
1448 };1454 };
1449 }1455 }
14501456
...@@ -1477,6 +1483,13 @@ pub const Cpu = struct {...@@ -1477,6 +1483,13 @@ pub const Cpu = struct {
1477 };1483 };
1478 }1484 }
14791485
1486 pub inline fn isArc(arch: Arch) bool {
1487 return switch (arch) {
1488 .arc, .arceb => true,
1489 else => false,
1490 };
1491 }
1492
1480 pub inline fn isWasm(arch: Arch) bool {1493 pub inline fn isWasm(arch: Arch) bool {
1481 return switch (arch) {1494 return switch (arch) {
1482 .wasm32, .wasm64 => true,1495 .wasm32, .wasm64 => true,
...@@ -1573,6 +1586,13 @@ pub const Cpu = struct {...@@ -1573,6 +1586,13 @@ pub const Cpu = struct {
1573 };1586 };
1574 }1587 }
15751588
1589 pub inline fn isXtensa(arch: Arch) bool {
1590 return switch (arch) {
1591 .xtensa, .xtensaeb => true,
1592 else => false,
1593 };
1594 }
1595
1576 pub fn parseCpuModel(arch: Arch, cpu_name: []const u8) !*const Cpu.Model {1596 pub fn parseCpuModel(arch: Arch, cpu_name: []const u8) !*const Cpu.Model {
1577 for (arch.allCpuModels()) |cpu| {1597 for (arch.allCpuModels()) |cpu| {
1578 if (std.mem.eql(u8, cpu_name, cpu.name)) {1598 if (std.mem.eql(u8, cpu_name, cpu.name)) {
...@@ -1584,43 +1604,39 @@ pub const Cpu = struct {...@@ -1584,43 +1604,39 @@ pub const Cpu = struct {
15841604
1585 pub fn endian(arch: Arch) std.builtin.Endian {1605 pub fn endian(arch: Arch) std.builtin.Endian {
1586 return switch (arch) {1606 return switch (arch) {
1587 .avr,
1588 .arm,
1589 .aarch64,1607 .aarch64,
1590 .amdgcn,1608 .arm,
1609 .arc,
1610 .avr,
1591 .bpfel,1611 .bpfel,
1592 .csky,1612 .csky,
1593 .xtensa,
1594 .hexagon,1613 .hexagon,
1595 .kalimba,1614 .kalimba,
1615 .loongarch32,
1616 .loongarch64,
1596 .mipsel,1617 .mipsel,
1597 .mips64el,1618 .mips64el,
1598 .msp430,1619 .msp430,
1599 .nvptx,
1600 .nvptx64,
1601 .powerpcle,1620 .powerpcle,
1602 .powerpc64le,1621 .powerpc64le,
1622 .propeller,
1603 .riscv32,1623 .riscv32,
1604 .riscv64,1624 .riscv64,
1605 .x86,1625 .thumb,
1606 .x86_64,1626 .ve,
1607 .wasm32,1627 .wasm32,
1608 .wasm64,1628 .wasm64,
1629 .x86,
1630 .x86_64,
1609 .xcore,1631 .xcore,
1610 .thumb,1632 .xtensa,
1611 .ve,
1612 // GPU bitness is opaque. For now, assume little endian.
1613 .spirv32,
1614 .spirv64,
1615 .loongarch32,
1616 .loongarch64,
1617 .arc,
1618 .propeller,
1619 => .little,1633 => .little,
16201634
1621 .armeb,
1622 .aarch64_be,1635 .aarch64_be,
1636 .arceb,
1637 .armeb,
1623 .bpfeb,1638 .bpfeb,
1639 .lanai,
1624 .m68k,1640 .m68k,
1625 .mips,1641 .mips,
1626 .mips64,1642 .mips64,
...@@ -1629,12 +1645,20 @@ pub const Cpu = struct {...@@ -1629,12 +1645,20 @@ pub const Cpu = struct {
1629 .powerpc64,1645 .powerpc64,
1630 .riscv32be,1646 .riscv32be,
1631 .riscv64be,1647 .riscv64be,
1648 .s390x,
1632 .thumbeb,1649 .thumbeb,
1633 .sparc,1650 .sparc,
1634 .sparc64,1651 .sparc64,
1635 .lanai,1652 .xtensaeb,
1636 .s390x,
1637 => .big,1653 => .big,
1654
1655 // GPU endianness is opaque. For now, assume little endian.
1656 .amdgcn,
1657 .nvptx,
1658 .nvptx64,
1659 .spirv32,
1660 .spirv64,
1661 => .little,
1638 };1662 };
1639 }1663 }
16401664
...@@ -1770,7 +1794,7 @@ pub const Cpu = struct {...@@ -1770,7 +1794,7 @@ pub const Cpu = struct {
17701794
1771 .arc_sysv,1795 .arc_sysv,
1772 .arc_interrupt,1796 .arc_interrupt,
1773 => &.{.arc},1797 => &.{ .arc, .arceb },
17741798
1775 .avr_gnu,1799 .avr_gnu,
1776 .avr_builtin,1800 .avr_builtin,
...@@ -1826,7 +1850,7 @@ pub const Cpu = struct {...@@ -1826,7 +1850,7 @@ pub const Cpu = struct {
18261850
1827 .xtensa_call0,1851 .xtensa_call0,
1828 .xtensa_windowed,1852 .xtensa_windowed,
1829 => &.{.xtensa},1853 => &.{ .xtensa, .xtensaeb },
18301854
1831 .amdgcn_device,1855 .amdgcn_device,
1832 .amdgcn_kernel,1856 .amdgcn_kernel,
...@@ -2418,9 +2442,10 @@ pub const DynamicLinker = struct {...@@ -2418,9 +2442,10 @@ pub const DynamicLinker = struct {
2418 }2442 }
2419 else if (abi.isGnu())2443 else if (abi.isGnu())
2420 switch (cpu.arch) {2444 switch (cpu.arch) {
2421 // TODO: `eb` architecture support.
2422 // TODO: `700` ABI support.2445 // TODO: `700` ABI support.
2423 .arc => if (abi == .gnu) init("/lib/ld-linux-arc.so.2") else none,2446 .arc,
2447 .arceb,
2448 => |arch| if (abi == .gnu) initFmt("/lib/ld-linux-{t}.so.2", .{arch}) else none,
24242449
2425 .arm,2450 .arm,
2426 .armeb,2451 .armeb,
...@@ -2450,7 +2475,10 @@ pub const DynamicLinker = struct {...@@ -2450,7 +2475,10 @@ pub const DynamicLinker = struct {
2450 else => return none,2475 else => return none,
2451 }}),2476 }}),
24522477
2453 .m68k => if (abi == .gnu) init("/lib/ld.so.1") else none,2478 .m68k,
2479 .xtensa,
2480 .xtensaeb,
2481 => if (abi == .gnu) init("/lib/ld.so.1") else none,
24542482
2455 .mips,2483 .mips,
2456 .mipsel,2484 .mipsel,
...@@ -2480,6 +2508,7 @@ pub const DynamicLinker = struct {...@@ -2480,6 +2508,7 @@ pub const DynamicLinker = struct {
2480 => init("/lib/ld.so.1"),2508 => init("/lib/ld.so.1"),
2481 else => none,2509 else => none,
2482 },2510 },
2511
2483 .powerpc64,2512 .powerpc64,
2484 .powerpc64le,2513 .powerpc64le,
2485 => if (abi == .gnu) init("/lib64/ld64.so.2") else none,2514 => if (abi == .gnu) init("/lib64/ld64.so.2") else none,
...@@ -2512,8 +2541,6 @@ pub const DynamicLinker = struct {...@@ -2512,8 +2541,6 @@ pub const DynamicLinker = struct {
2512 else => none,2541 else => none,
2513 },2542 },
25142543
2515 .xtensa => if (abi == .gnu) init("/lib/ld.so.1") else none,
2516
2517 else => none,2544 else => none,
2518 }2545 }
2519 else2546 else
...@@ -2680,52 +2707,54 @@ pub fn ptrBitWidth_arch_abi(cpu_arch: Cpu.Arch, abi: Abi) u16 {...@@ -2680,52 +2707,54 @@ pub fn ptrBitWidth_arch_abi(cpu_arch: Cpu.Arch, abi: Abi) u16 {
2680 => 16,2707 => 16,
26812708
2682 .arc,2709 .arc,
2710 .arceb,
2683 .arm,2711 .arm,
2684 .armeb,2712 .armeb,
2685 .csky,2713 .csky,
2686 .hexagon,2714 .hexagon,
2715 .kalimba,
2716 .lanai,
2717 .loongarch32,
2687 .m68k,2718 .m68k,
2688 .mips,2719 .mips,
2689 .mipsel,2720 .mipsel,
2721 .nvptx,
2690 .or1k,2722 .or1k,
2691 .powerpc,2723 .powerpc,
2692 .powerpcle,2724 .powerpcle,
2725 .propeller,
2693 .riscv32,2726 .riscv32,
2694 .riscv32be,2727 .riscv32be,
2728 .sparc,
2729 .spirv32,
2695 .thumb,2730 .thumb,
2696 .thumbeb,2731 .thumbeb,
2732 .wasm32,
2697 .x86,2733 .x86,
2698 .xcore,2734 .xcore,
2699 .nvptx,
2700 .kalimba,
2701 .lanai,
2702 .wasm32,
2703 .sparc,
2704 .spirv32,
2705 .loongarch32,
2706 .xtensa,2735 .xtensa,
2707 .propeller,2736 .xtensaeb,
2708 => 32,2737 => 32,
27092738
2710 .aarch64,2739 .aarch64,
2711 .aarch64_be,2740 .aarch64_be,
2741 .amdgcn,
2742 .bpfeb,
2743 .bpfel,
2744 .loongarch64,
2712 .mips64,2745 .mips64,
2713 .mips64el,2746 .mips64el,
2747 .nvptx64,
2714 .powerpc64,2748 .powerpc64,
2715 .powerpc64le,2749 .powerpc64le,
2716 .riscv64,2750 .riscv64,
2717 .riscv64be,2751 .riscv64be,
2718 .x86_64,
2719 .nvptx64,
2720 .wasm64,
2721 .amdgcn,
2722 .bpfel,
2723 .bpfeb,
2724 .sparc64,
2725 .s390x,2752 .s390x,
2726 .ve,2753 .sparc64,
2727 .spirv64,2754 .spirv64,
2728 .loongarch64,2755 .ve,
2756 .wasm64,
2757 .x86_64,
2729 => 64,2758 => 64,
2730 };2759 };
2731}2760}
...@@ -2788,13 +2817,12 @@ pub fn cCharSignedness(target: *const Target) std.builtin.Signedness {...@@ -2788,13 +2817,12 @@ pub fn cCharSignedness(target: *const Target) std.builtin.Signedness {
2788 if (target.os.tag.isDarwin() or target.os.tag == .windows or target.os.tag == .uefi) return .signed;2817 if (target.os.tag.isDarwin() or target.os.tag == .windows or target.os.tag == .uefi) return .signed;
27892818
2790 return switch (target.cpu.arch) {2819 return switch (target.cpu.arch) {
2791 .arm,
2792 .armeb,
2793 .thumb,
2794 .thumbeb,
2795 .aarch64,2820 .aarch64,
2796 .aarch64_be,2821 .aarch64_be,
2822 .arm,
2823 .armeb,
2797 .arc,2824 .arc,
2825 .arceb,
2798 .csky,2826 .csky,
2799 .hexagon,2827 .hexagon,
2800 .msp430,2828 .msp430,
...@@ -2807,8 +2835,11 @@ pub fn cCharSignedness(target: *const Target) std.builtin.Signedness {...@@ -2807,8 +2835,11 @@ pub fn cCharSignedness(target: *const Target) std.builtin.Signedness {
2807 .riscv32be,2835 .riscv32be,
2808 .riscv64,2836 .riscv64,
2809 .riscv64be,2837 .riscv64be,
2838 .thumb,
2839 .thumbeb,
2810 .xcore,2840 .xcore,
2811 .xtensa,2841 .xtensa,
2842 .xtensaeb,
2812 => .unsigned,2843 => .unsigned,
2813 else => .signed,2844 else => .signed,
2814 };2845 };
...@@ -3217,31 +3248,33 @@ pub fn cTypeAlignment(target: *const Target, c_type: CType) u16 {...@@ -3217,31 +3248,33 @@ pub fn cTypeAlignment(target: *const Target, c_type: CType) u16 {
3217 => 2,3248 => 2,
32183249
3219 .arc,3250 .arc,
3251 .arceb,
3220 .csky,3252 .csky,
3253 .kalimba,
3254 .or1k,
3255 .propeller,
3221 .x86,3256 .x86,
3222 .xcore,3257 .xcore,
3223 .or1k,
3224 .kalimba,
3225 .xtensa,3258 .xtensa,
3226 .propeller,3259 .xtensaeb,
3227 => 4,3260 => 4,
32283261
3262 .amdgcn,
3229 .arm,3263 .arm,
3230 .armeb,3264 .armeb,
3231 .thumb,
3232 .thumbeb,
3233 .amdgcn,
3234 .bpfel,
3235 .bpfeb,3265 .bpfeb,
3266 .bpfel,
3236 .hexagon,3267 .hexagon,
3268 .lanai,
3237 .m68k,3269 .m68k,
3238 .mips,3270 .mips,
3239 .mipsel,3271 .mipsel,
3240 .sparc,
3241 .lanai,
3242 .nvptx,3272 .nvptx,
3243 .nvptx64,3273 .nvptx64,
3244 .s390x,3274 .s390x,
3275 .sparc,
3276 .thumb,
3277 .thumbeb,
3245 => 8,3278 => 8,
32463279
3247 .aarch64,3280 .aarch64,
...@@ -3261,10 +3294,10 @@ pub fn cTypeAlignment(target: *const Target, c_type: CType) u16 {...@@ -3261,10 +3294,10 @@ pub fn cTypeAlignment(target: *const Target, c_type: CType) u16 {
3261 .sparc64,3294 .sparc64,
3262 .spirv32,3295 .spirv32,
3263 .spirv64,3296 .spirv64,
3264 .x86_64,
3265 .ve,3297 .ve,
3266 .wasm32,3298 .wasm32,
3267 .wasm64,3299 .wasm64,
3300 .x86_64,
3268 => 16,3301 => 16,
32693302
3270 .avr,3303 .avr,
...@@ -3276,7 +3309,7 @@ pub fn cTypeAlignment(target: *const Target, c_type: CType) u16 {...@@ -3276,7 +3309,7 @@ pub fn cTypeAlignment(target: *const Target, c_type: CType) u16 {
3276pub fn cTypePreferredAlignment(target: *const Target, c_type: CType) u16 {3309pub fn cTypePreferredAlignment(target: *const Target, c_type: CType) u16 {
3277 // Overrides for unusual alignments3310 // Overrides for unusual alignments
3278 switch (target.cpu.arch) {3311 switch (target.cpu.arch) {
3279 .arc => switch (c_type) {3312 .arc, .arceb => switch (c_type) {
3280 .longdouble => return 4,3313 .longdouble => return 4,
3281 else => {},3314 else => {},
3282 },3315 },
...@@ -3315,31 +3348,33 @@ pub fn cTypePreferredAlignment(target: *const Target, c_type: CType) u16 {...@@ -3315,31 +3348,33 @@ pub fn cTypePreferredAlignment(target: *const Target, c_type: CType) u16 {
3315 .msp430 => 2,3348 .msp430 => 2,
33163349
3317 .arc,3350 .arc,
3351 .arceb,
3318 .csky,3352 .csky,
3319 .xcore,
3320 .or1k,
3321 .kalimba,3353 .kalimba,
3322 .xtensa,3354 .or1k,
3323 .propeller,3355 .propeller,
3356 .xcore,
3357 .xtensa,
3358 .xtensaeb,
3324 => 4,3359 => 4,
33253360
3361 .amdgcn,
3326 .arm,3362 .arm,
3327 .armeb,3363 .armeb,
3328 .thumb,
3329 .thumbeb,
3330 .amdgcn,
3331 .bpfel,
3332 .bpfeb,3364 .bpfeb,
3365 .bpfel,
3333 .hexagon,3366 .hexagon,
3334 .x86,3367 .lanai,
3335 .m68k,3368 .m68k,
3336 .mips,3369 .mips,
3337 .mipsel,3370 .mipsel,
3338 .sparc,
3339 .lanai,
3340 .nvptx,3371 .nvptx,
3341 .nvptx64,3372 .nvptx64,
3342 .s390x,3373 .s390x,
3374 .sparc,
3375 .thumb,
3376 .thumbeb,
3377 .x86,
3343 => 8,3378 => 8,
33443379
3345 .aarch64,3380 .aarch64,
...@@ -3359,10 +3394,10 @@ pub fn cTypePreferredAlignment(target: *const Target, c_type: CType) u16 {...@@ -3359,10 +3394,10 @@ pub fn cTypePreferredAlignment(target: *const Target, c_type: CType) u16 {
3359 .sparc64,3394 .sparc64,
3360 .spirv32,3395 .spirv32,
3361 .spirv64,3396 .spirv64,
3362 .x86_64,
3363 .ve,3397 .ve,
3364 .wasm32,3398 .wasm32,
3365 .wasm64,3399 .wasm64,
3400 .x86_64,
3366 => 16,3401 => 16,
33673402
3368 .avr,3403 .avr,
...@@ -3378,6 +3413,7 @@ pub fn cMaxIntAlignment(target: *const Target) u16 {...@@ -3378,6 +3413,7 @@ pub fn cMaxIntAlignment(target: *const Target) u16 {
3378 .msp430 => 2,3413 .msp430 => 2,
33793414
3380 .arc,3415 .arc,
3416 .arceb,
3381 .csky,3417 .csky,
3382 .kalimba,3418 .kalimba,
3383 .or1k,3419 .or1k,
...@@ -3403,6 +3439,7 @@ pub fn cMaxIntAlignment(target: *const Target) u16 {...@@ -3403,6 +3439,7 @@ pub fn cMaxIntAlignment(target: *const Target) u16 {
3403 .thumbeb,3439 .thumbeb,
3404 .x86,3440 .x86,
3405 .xtensa,3441 .xtensa,
3442 .xtensaeb,
3406 => 8,3443 => 8,
34073444
3408 .aarch64,3445 .aarch64,
...@@ -3440,9 +3477,9 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention...@@ -3440,9 +3477,9 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention
3440 .windows, .uefi => .{ .x86_win = .{} },3477 .windows, .uefi => .{ .x86_win = .{} },
3441 else => .{ .x86_sysv = .{} },3478 else => .{ .x86_sysv = .{} },
3442 },3479 },
3443 .aarch64, .aarch64_be => if (target.os.tag.isDarwin()) cc: {3480 .aarch64, .aarch64_be => if (target.os.tag.isDarwin())
3444 break :cc .{ .aarch64_aapcs_darwin = .{} };3481 .{ .aarch64_aapcs_darwin = .{} }
3445 } else switch (target.os.tag) {3482 else switch (target.os.tag) {
3446 .windows => .{ .aarch64_aapcs_win = .{} },3483 .windows => .{ .aarch64_aapcs_win = .{} },
3447 else => .{ .aarch64_aapcs = .{} },3484 else => .{ .aarch64_aapcs = .{} },
3448 },3485 },
...@@ -3469,7 +3506,7 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention...@@ -3469,7 +3506,7 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention
3469 else => .{ .powerpc_sysv = .{} },3506 else => .{ .powerpc_sysv = .{} },
3470 },3507 },
3471 .wasm32, .wasm64 => .{ .wasm_mvp = .{} },3508 .wasm32, .wasm64 => .{ .wasm_mvp = .{} },
3472 .arc => .{ .arc_sysv = .{} },3509 .arc, .arceb => .{ .arc_sysv = .{} },
3473 .avr => .avr_gnu,3510 .avr => .avr_gnu,
3474 .bpfel, .bpfeb => .{ .bpf_std = .{} },3511 .bpfel, .bpfeb => .{ .bpf_std = .{} },
3475 .csky => .{ .csky_sysv = .{} },3512 .csky => .{ .csky_sysv = .{} },
...@@ -3488,7 +3525,7 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention...@@ -3488,7 +3525,7 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention
3488 .s390x => .{ .s390x_sysv = .{} },3525 .s390x => .{ .s390x_sysv = .{} },
3489 .ve => .{ .ve_sysv = .{} },3526 .ve => .{ .ve_sysv = .{} },
3490 .xcore => .{ .xcore_xs1 = .{} },3527 .xcore => .{ .xcore_xs1 = .{} },
3491 .xtensa => .{ .xtensa_call0 = .{} },3528 .xtensa, .xtensaeb => .{ .xtensa_call0 = .{} },
3492 .amdgcn => .{ .amdgcn_device = .{} },3529 .amdgcn => .{ .amdgcn_device = .{} },
3493 .nvptx, .nvptx64 => .nvptx_device,3530 .nvptx, .nvptx64 => .nvptx_device,
3494 .spirv32, .spirv64 => .spirv_device,3531 .spirv32, .spirv64 => .spirv_device,
lib/std/atomic.zig+1
...@@ -419,6 +419,7 @@ pub fn cacheLineForCpu(cpu: std.Target.Cpu) u16 {...@@ -419,6 +419,7 @@ pub fn cacheLineForCpu(cpu: std.Target.Cpu) u16 {
419 .aarch64,419 .aarch64,
420 .aarch64_be,420 .aarch64_be,
421 .arc,421 .arc,
422 .arceb,
422 .powerpc64,423 .powerpc64,
423 .powerpc64le,424 .powerpc64le,
424 => 128,425 => 128,
lib/std/builtin.zig+4-3
...@@ -275,7 +275,7 @@ pub const CallingConvention = union(enum(u8)) {...@@ -275,7 +275,7 @@ pub const CallingConvention = union(enum(u8)) {
275 /// The standard `wasm32` and `wasm64` calling convention, as specified in the WebAssembly Tool Conventions.275 /// The standard `wasm32` and `wasm64` calling convention, as specified in the WebAssembly Tool Conventions.
276 wasm_mvp: CommonOptions,276 wasm_mvp: CommonOptions,
277277
278 /// The standard `arc` calling convention.278 /// The standard `arc`/`arceb` calling convention.
279 arc_sysv: CommonOptions,279 arc_sysv: CommonOptions,
280 arc_interrupt: ArcInterruptOptions,280 arc_interrupt: ArcInterruptOptions,
281281
...@@ -331,7 +331,7 @@ pub const CallingConvention = union(enum(u8)) {...@@ -331,7 +331,7 @@ pub const CallingConvention = union(enum(u8)) {
331 xcore_xs1: CommonOptions,331 xcore_xs1: CommonOptions,
332 xcore_xs2: CommonOptions,332 xcore_xs2: CommonOptions,
333333
334 // Calling conventions for the `xtensa` architecture.334 // Calling conventions for the `xtensa`/`xtensaeb` architecture.
335 xtensa_call0: CommonOptions,335 xtensa_call0: CommonOptions,
336 xtensa_windowed: CommonOptions,336 xtensa_windowed: CommonOptions,
337337
...@@ -920,6 +920,7 @@ pub const VaList = switch (builtin.cpu.arch) {...@@ -920,6 +920,7 @@ pub const VaList = switch (builtin.cpu.arch) {
920 .x86,920 .x86,
921 => *u8,921 => *u8,
922 .arc,922 .arc,
923 .arceb,
923 .avr,924 .avr,
924 .bpfel,925 .bpfel,
925 .bpfeb,926 .bpfeb,
...@@ -966,7 +967,7 @@ pub const VaList = switch (builtin.cpu.arch) {...@@ -966,7 +967,7 @@ pub const VaList = switch (builtin.cpu.arch) {
966 },967 },
967 else => VaListX86_64,968 else => VaListX86_64,
968 },969 },
969 .xtensa => VaListXtensa,970 .xtensa, .xtensaeb => VaListXtensa,
970 else => @compileError("VaList not supported for this target yet"),971 else => @compileError("VaList not supported for this target yet"),
971};972};
972973
lib/std/builtin/assembly.zig+2-2
...@@ -779,7 +779,7 @@ pub const Clobbers = switch (@import("builtin").cpu.arch) {...@@ -779,7 +779,7 @@ pub const Clobbers = switch (@import("builtin").cpu.arch) {
779 lr: bool = false,779 lr: bool = false,
780 sr: bool = false,780 sr: bool = false,
781 },781 },
782 .xtensa => packed struct {782 .xtensa, .xtensaeb => packed struct {
783 /// Whether the inline assembly code may perform stores to memory783 /// Whether the inline assembly code may perform stores to memory
784 /// addresses other than those derived from input pointer provenance.784 /// addresses other than those derived from input pointer provenance.
785 memory: bool = false,785 memory: bool = false,
...@@ -1591,7 +1591,7 @@ pub const Clobbers = switch (@import("builtin").cpu.arch) {...@@ -1591,7 +1591,7 @@ pub const Clobbers = switch (@import("builtin").cpu.arch) {
1591 vr30: bool = false,1591 vr30: bool = false,
1592 vr31: bool = false,1592 vr31: bool = false,
1593 },1593 },
1594 .arc => packed struct {1594 .arc, .arceb => packed struct {
1595 /// Whether the inline assembly code may perform stores to memory1595 /// Whether the inline assembly code may perform stores to memory
1596 /// addresses other than those derived from input pointer provenance.1596 /// addresses other than those derived from input pointer provenance.
1597 memory: bool = false,1597 memory: bool = false,
lib/std/debug/Dwarf.zig+3-3
...@@ -1430,7 +1430,7 @@ pub fn compactUnwindToDwarfRegNumber(unwind_reg_number: u3) !u16 {...@@ -1430,7 +1430,7 @@ pub fn compactUnwindToDwarfRegNumber(unwind_reg_number: u3) !u16 {
1430pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {1430pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {
1431 return switch (arch) {1431 return switch (arch) {
1432 .aarch64, .aarch64_be => 32,1432 .aarch64, .aarch64_be => 32,
1433 .arc => 160,1433 .arc, .arceb => 160,
1434 .arm, .armeb, .thumb, .thumbeb => 15,1434 .arm, .armeb, .thumb, .thumbeb => 15,
1435 .csky => 64,1435 .csky => 64,
1436 .hexagon => 76,1436 .hexagon => 76,
...@@ -1453,7 +1453,7 @@ pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {...@@ -1453,7 +1453,7 @@ pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {
1453pub fn fpRegNum(arch: std.Target.Cpu.Arch) u16 {1453pub fn fpRegNum(arch: std.Target.Cpu.Arch) u16 {
1454 return switch (arch) {1454 return switch (arch) {
1455 .aarch64, .aarch64_be => 29,1455 .aarch64, .aarch64_be => 29,
1456 .arc => 27,1456 .arc, .arceb => 27,
1457 .arm, .armeb, .thumb, .thumbeb => 11,1457 .arm, .armeb, .thumb, .thumbeb => 11,
1458 .csky => 14,1458 .csky => 14,
1459 .hexagon => 30,1459 .hexagon => 30,
...@@ -1476,7 +1476,7 @@ pub fn fpRegNum(arch: std.Target.Cpu.Arch) u16 {...@@ -1476,7 +1476,7 @@ pub fn fpRegNum(arch: std.Target.Cpu.Arch) u16 {
1476pub fn spRegNum(arch: std.Target.Cpu.Arch) u16 {1476pub fn spRegNum(arch: std.Target.Cpu.Arch) u16 {
1477 return switch (arch) {1477 return switch (arch) {
1478 .aarch64, .aarch64_be => 31,1478 .aarch64, .aarch64_be => 31,
1479 .arc => 28,1479 .arc, .arceb => 28,
1480 .arm, .armeb, .thumb, .thumbeb => 13,1480 .arm, .armeb, .thumb, .thumbeb => 13,
1481 .csky => 14,1481 .csky => 14,
1482 .hexagon => 29,1482 .hexagon => 29,
lib/std/debug/SelfInfo/Elf.zig+1-1
...@@ -102,7 +102,7 @@ pub const can_unwind: bool = s: {...@@ -102,7 +102,7 @@ pub const can_unwind: bool = s: {
102 .x86,102 .x86,
103 .x86_64,103 .x86_64,
104 },104 },
105 // Not supported yet: arm/armeb/thumb/thumbeb, xtensa105 // Not supported yet: arm/armeb/thumb/thumbeb, xtensa/xtensaeb
106 .linux => &.{106 .linux => &.{
107 .aarch64,107 .aarch64,
108 .aarch64_be,108 .aarch64_be,
lib/std/debug/cpu_context.zig+6-4
...@@ -5,7 +5,7 @@ pub const Native = if (@hasDecl(root, "debug") and @hasDecl(root.debug, "CpuCont...@@ -5,7 +5,7 @@ pub const Native = if (@hasDecl(root, "debug") and @hasDecl(root.debug, "CpuCont
5 root.debug.CpuContext5 root.debug.CpuContext
6else switch (native_arch) {6else switch (native_arch) {
7 .aarch64, .aarch64_be => Aarch64,7 .aarch64, .aarch64_be => Aarch64,
8 .arc => Arc,8 .arc, .arceb => Arc,
9 .arm, .armeb, .thumb, .thumbeb => Arm,9 .arm, .armeb, .thumb, .thumbeb => Arm,
10 .csky => Csky,10 .csky => Csky,
11 .hexagon => Hexagon,11 .hexagon => Hexagon,
...@@ -36,7 +36,7 @@ pub fn fromPosixSignalContext(ctx_ptr: ?*const anyopaque) ?Native {...@@ -36,7 +36,7 @@ pub fn fromPosixSignalContext(ctx_ptr: ?*const anyopaque) ?Native {
36 const uc: *const signal_ucontext_t = @ptrCast(@alignCast(ctx_ptr));36 const uc: *const signal_ucontext_t = @ptrCast(@alignCast(ctx_ptr));
3737
38 // Deal with some special cases first.38 // Deal with some special cases first.
39 if (native_arch == .arc and native_os == .linux) {39 if (native_arch.isArc() and native_os == .linux) {
40 var native: Native = .{40 var native: Native = .{
41 .r = [_]u32{ uc.mcontext.r31, uc.mcontext.r30, 0, uc.mcontext.r28 } ++41 .r = [_]u32{ uc.mcontext.r31, uc.mcontext.r30, 0, uc.mcontext.r28 } ++
42 uc.mcontext.r27_26 ++42 uc.mcontext.r27_26 ++
...@@ -1553,6 +1553,7 @@ const signal_ucontext_t = switch (native_os) {...@@ -1553,6 +1553,7 @@ const signal_ucontext_t = switch (native_os) {
1553 },1553 },
1554 // https://github.com/torvalds/linux/blob/cd5a0afbdf8033dc83786315d63f8b325bdba2fd/include/uapi/asm-generic/ucontext.h1554 // https://github.com/torvalds/linux/blob/cd5a0afbdf8033dc83786315d63f8b325bdba2fd/include/uapi/asm-generic/ucontext.h
1555 .arc,1555 .arc,
1556 .arceb,
1556 .csky,1557 .csky,
1557 .hexagon,1558 .hexagon,
1558 .m68k,1559 .m68k,
...@@ -1565,13 +1566,14 @@ const signal_ucontext_t = switch (native_os) {...@@ -1565,13 +1566,14 @@ const signal_ucontext_t = switch (native_os) {
1565 .x86,1566 .x86,
1566 .x86_64,1567 .x86_64,
1567 .xtensa,1568 .xtensa,
1569 .xtensaeb,
1568 => extern struct {1570 => extern struct {
1569 _flags: usize,1571 _flags: usize,
1570 _link: ?*signal_ucontext_t,1572 _link: ?*signal_ucontext_t,
1571 _stack: std.os.linux.stack_t,1573 _stack: std.os.linux.stack_t,
1572 mcontext: switch (native_arch) {1574 mcontext: switch (native_arch) {
1573 // https://github.com/torvalds/linux/blob/cd5a0afbdf8033dc83786315d63f8b325bdba2fd/arch/arc/include/uapi/asm/sigcontext.h1575 // https://github.com/torvalds/linux/blob/cd5a0afbdf8033dc83786315d63f8b325bdba2fd/arch/arc/include/uapi/asm/sigcontext.h
1574 .arc => extern struct {1576 .arc, .arceb => extern struct {
1575 _pad1: u32,1577 _pad1: u32,
1576 _bta: u32,1578 _bta: u32,
1577 _lp: extern struct {1579 _lp: extern struct {
...@@ -1691,7 +1693,7 @@ const signal_ucontext_t = switch (native_os) {...@@ -1691,7 +1693,7 @@ const signal_ucontext_t = switch (native_os) {
1691 rip: u64,1693 rip: u64,
1692 },1694 },
1693 // https://github.com/torvalds/linux/blob/cd5a0afbdf8033dc83786315d63f8b325bdba2fd/arch/xtensa/include/uapi/asm/sigcontext.h1695 // https://github.com/torvalds/linux/blob/cd5a0afbdf8033dc83786315d63f8b325bdba2fd/arch/xtensa/include/uapi/asm/sigcontext.h
1694 .xtensa => extern struct {1696 .xtensa, .xtensaeb => extern struct {
1695 pc: u32,1697 pc: u32,
1696 _ps: u32,1698 _ps: u32,
1697 _l: extern struct {1699 _l: extern struct {
lib/std/heap.zig+4-4
...@@ -824,7 +824,7 @@ const page_size_min_default: ?usize = switch (builtin.os.tag) {...@@ -824,7 +824,7 @@ const page_size_min_default: ?usize = switch (builtin.os.tag) {
824 .emscripten => 64 << 10,824 .emscripten => 64 << 10,
825 .linux => switch (builtin.cpu.arch) {825 .linux => switch (builtin.cpu.arch) {
826 // Linux/arch/*/Kconfig826 // Linux/arch/*/Kconfig
827 .arc => 4 << 10,827 .arc, .arceb => 4 << 10,
828 .thumb, .thumbeb, .arm, .armeb => 4 << 10,828 .thumb, .thumbeb, .arm, .armeb => 4 << 10,
829 .aarch64, .aarch64_be => 4 << 10,829 .aarch64, .aarch64_be => 4 << 10,
830 .csky => 4 << 10,830 .csky => 4 << 10,
...@@ -839,7 +839,7 @@ const page_size_min_default: ?usize = switch (builtin.os.tag) {...@@ -839,7 +839,7 @@ const page_size_min_default: ?usize = switch (builtin.os.tag) {
839 .sparc => 4 << 10,839 .sparc => 4 << 10,
840 .sparc64 => 8 << 10,840 .sparc64 => 8 << 10,
841 .x86, .x86_64 => 4 << 10,841 .x86, .x86_64 => 4 << 10,
842 .xtensa => 4 << 10,842 .xtensa, .xtensaeb => 4 << 10,
843 else => null,843 else => null,
844 },844 },
845 .freestanding, .other => switch (builtin.cpu.arch) {845 .freestanding, .other => switch (builtin.cpu.arch) {
...@@ -972,7 +972,7 @@ const page_size_max_default: ?usize = switch (builtin.os.tag) {...@@ -972,7 +972,7 @@ const page_size_max_default: ?usize = switch (builtin.os.tag) {
972 .emscripten => 64 << 10,972 .emscripten => 64 << 10,
973 .linux => switch (builtin.cpu.arch) {973 .linux => switch (builtin.cpu.arch) {
974 // Linux/arch/*/Kconfig974 // Linux/arch/*/Kconfig
975 .arc => 16 << 10,975 .arc, .arceb => 16 << 10,
976 .thumb, .thumbeb, .arm, .armeb => 4 << 10,976 .thumb, .thumbeb, .arm, .armeb => 4 << 10,
977 .aarch64, .aarch64_be => 64 << 10,977 .aarch64, .aarch64_be => 64 << 10,
978 .csky => 4 << 10,978 .csky => 4 << 10,
...@@ -987,7 +987,7 @@ const page_size_max_default: ?usize = switch (builtin.os.tag) {...@@ -987,7 +987,7 @@ const page_size_max_default: ?usize = switch (builtin.os.tag) {
987 .sparc => 4 << 10,987 .sparc => 4 << 10,
988 .sparc64 => 8 << 10,988 .sparc64 => 8 << 10,
989 .x86, .x86_64 => 4 << 10,989 .x86, .x86_64 => 4 << 10,
990 .xtensa => 4 << 10,990 .xtensa, .xtensaeb => 4 << 10,
991 else => null,991 else => null,
992 },992 },
993 .freestanding => switch (builtin.cpu.arch) {993 .freestanding => switch (builtin.cpu.arch) {
lib/std/os/linux.zig+8-3
...@@ -116,7 +116,7 @@ pub const SECCOMP = @import("linux/seccomp.zig");...@@ -116,7 +116,7 @@ pub const SECCOMP = @import("linux/seccomp.zig");
116116
117pub const syscalls = @import("linux/syscalls.zig");117pub const syscalls = @import("linux/syscalls.zig");
118pub const SYS = switch (native_arch) {118pub const SYS = switch (native_arch) {
119 .arc => syscalls.Arc,119 .arc, .arceb => syscalls.Arc,
120 .aarch64, .aarch64_be => syscalls.Arm64,120 .aarch64, .aarch64_be => syscalls.Arm64,
121 .arm, .armeb, .thumb, .thumbeb => syscalls.Arm,121 .arm, .armeb, .thumb, .thumbeb => syscalls.Arm,
122 .csky => syscalls.CSky,122 .csky => syscalls.CSky,
...@@ -141,7 +141,7 @@ pub const SYS = switch (native_arch) {...@@ -141,7 +141,7 @@ pub const SYS = switch (native_arch) {
141 .gnux32, .muslx32 => syscalls.X32,141 .gnux32, .muslx32 => syscalls.X32,
142 else => syscalls.X64,142 else => syscalls.X64,
143 },143 },
144 .xtensa => syscalls.Xtensa,144 .xtensa, .xtensaeb => syscalls.Xtensa,
145 else => @compileError("The Zig Standard Library is missing syscall definitions for the target CPU architecture"),145 else => @compileError("The Zig Standard Library is missing syscall definitions for the target CPU architecture"),
146};146};
147147
...@@ -3686,7 +3686,7 @@ pub const PROT = struct {...@@ -3686,7 +3686,7 @@ pub const PROT = struct {
3686 pub const EXEC = 0x4;3686 pub const EXEC = 0x4;
3687 /// page may be used for atomic ops3687 /// page may be used for atomic ops
3688 pub const SEM = switch (native_arch) {3688 pub const SEM = switch (native_arch) {
3689 .mips, .mipsel, .mips64, .mips64el, .xtensa => 0x10,3689 .mips, .mipsel, .mips64, .mips64el, .xtensa, .xtensaeb => 0x10,
3690 else => 0x8,3690 else => 0x8,
3691 };3691 };
3692 /// mprotect flag: extend change to start of growsdown vma3692 /// mprotect flag: extend change to start of growsdown vma
...@@ -6161,6 +6161,7 @@ pub fn CPU_COUNT(set: cpu_set_t) cpu_count_t {...@@ -6161,6 +6161,7 @@ pub fn CPU_COUNT(set: cpu_set_t) cpu_count_t {
61616161
6162pub const MINSIGSTKSZ = switch (native_arch) {6162pub const MINSIGSTKSZ = switch (native_arch) {
6163 .arc,6163 .arc,
6164 .arceb,
6164 .arm,6165 .arm,
6165 .armeb,6166 .armeb,
6166 .csky,6167 .csky,
...@@ -6181,6 +6182,7 @@ pub const MINSIGSTKSZ = switch (native_arch) {...@@ -6181,6 +6182,7 @@ pub const MINSIGSTKSZ = switch (native_arch) {
6181 .x86,6182 .x86,
6182 .x86_64,6183 .x86_64,
6183 .xtensa,6184 .xtensa,
6185 .xtensaeb,
6184 => 2048,6186 => 2048,
6185 .loongarch64,6187 .loongarch64,
6186 .sparc,6188 .sparc,
...@@ -6196,6 +6198,7 @@ pub const MINSIGSTKSZ = switch (native_arch) {...@@ -6196,6 +6198,7 @@ pub const MINSIGSTKSZ = switch (native_arch) {
6196};6198};
6197pub const SIGSTKSZ = switch (native_arch) {6199pub const SIGSTKSZ = switch (native_arch) {
6198 .arc,6200 .arc,
6201 .arceb,
6199 .arm,6202 .arm,
6200 .armeb,6203 .armeb,
6201 .csky,6204 .csky,
...@@ -6216,6 +6219,7 @@ pub const SIGSTKSZ = switch (native_arch) {...@@ -6216,6 +6219,7 @@ pub const SIGSTKSZ = switch (native_arch) {
6216 .x86,6219 .x86,
6217 .x86_64,6220 .x86_64,
6218 .xtensa,6221 .xtensa,
6222 .xtensaeb,
6219 => 8192,6223 => 8192,
6220 .aarch64,6224 .aarch64,
6221 .aarch64_be,6225 .aarch64_be,
...@@ -9740,6 +9744,7 @@ pub const AUDIT = struct {...@@ -9740,6 +9744,7 @@ pub const AUDIT = struct {
9740 .armeb, .thumbeb => .ARMEB,9744 .armeb, .thumbeb => .ARMEB,
9741 .aarch64 => .AARCH64,9745 .aarch64 => .AARCH64,
9742 .arc => .ARCV2,9746 .arc => .ARCV2,
9747 .arceb => .ARCV2BE,
9743 .csky => .CSKY,9748 .csky => .CSKY,
9744 .hexagon => .HEXAGON,9749 .hexagon => .HEXAGON,
9745 .loongarch32 => .LOONGARCH32,9750 .loongarch32 => .LOONGARCH32,
lib/std/os/linux/tls.zig+2-1
...@@ -64,6 +64,7 @@ const Variant = enum {...@@ -64,6 +64,7 @@ const Variant = enum {
6464
65const current_variant: Variant = switch (native_arch) {65const current_variant: Variant = switch (native_arch) {
66 .arc,66 .arc,
67 .arceb,
67 .arm,68 .arm,
68 .armeb,69 .armeb,
69 .aarch64,70 .aarch64,
...@@ -243,7 +244,7 @@ pub fn setThreadPointer(addr: usize) void {...@@ -243,7 +244,7 @@ pub fn setThreadPointer(addr: usize) void {
243 : [addr] "r" (addr),244 : [addr] "r" (addr),
244 );245 );
245 },246 },
246 .arc => {247 .arc, .arceb => {
247 // We apparently need to both set r25 (TP) *and* inform the kernel...248 // We apparently need to both set r25 (TP) *and* inform the kernel...
248 asm volatile (249 asm volatile (
249 \\ mov r25, %[addr]250 \\ mov r25, %[addr]
lib/std/pie.zig+2-2
...@@ -22,7 +22,7 @@ const R_SPARC_RELATIVE = 22;...@@ -22,7 +22,7 @@ const R_SPARC_RELATIVE = 22;
22const R_RELATIVE = switch (builtin.cpu.arch) {22const R_RELATIVE = switch (builtin.cpu.arch) {
23 .x86 => R_386_RELATIVE,23 .x86 => R_386_RELATIVE,
24 .x86_64 => R_AMD64_RELATIVE,24 .x86_64 => R_AMD64_RELATIVE,
25 .arc => R_ARC_RELATIVE,25 .arc, .arceb => R_ARC_RELATIVE,
26 .arm, .armeb, .thumb, .thumbeb => R_ARM_RELATIVE,26 .arm, .armeb, .thumb, .thumbeb => R_ARM_RELATIVE,
27 .aarch64, .aarch64_be => R_AARCH64_RELATIVE,27 .aarch64, .aarch64_be => R_AARCH64_RELATIVE,
28 .csky => R_CSKY_RELATIVE,28 .csky => R_CSKY_RELATIVE,
...@@ -58,7 +58,7 @@ inline fn getDynamicSymbol() [*]const elf.Dyn {...@@ -58,7 +58,7 @@ inline fn getDynamicSymbol() [*]const elf.Dyn {
58 \\ lea _DYNAMIC(%%rip), %[ret]58 \\ lea _DYNAMIC(%%rip), %[ret]
59 : [ret] "=r" (-> [*]const elf.Dyn),59 : [ret] "=r" (-> [*]const elf.Dyn),
60 ),60 ),
61 .arc => asm volatile (61 .arc, .arceb => asm volatile (
62 \\ .weak _DYNAMIC62 \\ .weak _DYNAMIC
63 \\ .hidden _DYNAMIC63 \\ .hidden _DYNAMIC
64 \\ add %[ret], pcl, _DYNAMIC@pcl64 \\ add %[ret], pcl, _DYNAMIC@pcl
lib/std/start.zig+2-2
...@@ -195,7 +195,7 @@ fn _start() callconv(.naked) noreturn {...@@ -195,7 +195,7 @@ fn _start() callconv(.naked) noreturn {
195 // This is the first userspace frame. Prevent DWARF-based unwinders from unwinding further. We195 // This is the first userspace frame. Prevent DWARF-based unwinders from unwinding further. We
196 // prevent FP-based unwinders from unwinding further by zeroing the register below.196 // prevent FP-based unwinders from unwinding further by zeroing the register below.
197 if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile (switch (native_arch) {197 if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile (switch (native_arch) {
198 .arc => ".cfi_undefined blink",198 .arc, .arceb => ".cfi_undefined blink",
199 .arm, .armeb, .thumb, .thumbeb => "", // https://github.com/llvm/llvm-project/issues/115891199 .arm, .armeb, .thumb, .thumbeb => "", // https://github.com/llvm/llvm-project/issues/115891
200 .aarch64, .aarch64_be => ".cfi_undefined lr",200 .aarch64, .aarch64_be => ".cfi_undefined lr",
201 .csky => ".cfi_undefined lr",201 .csky => ".cfi_undefined lr",
...@@ -253,7 +253,7 @@ fn _start() callconv(.naked) noreturn {...@@ -253,7 +253,7 @@ fn _start() callconv(.naked) noreturn {
253 \\ and sp, x0, #-16253 \\ and sp, x0, #-16
254 \\ b %[posixCallMainAndExit]254 \\ b %[posixCallMainAndExit]
255 ,255 ,
256 .arc =>256 .arc, .arceb =>
257 // ARC v1 and v2 had a very low stack alignment requirement of 4; v3 increased it to 16.257 // ARC v1 and v2 had a very low stack alignment requirement of 4; v3 increased it to 16.
258 \\ mov fp, 0258 \\ mov fp, 0
259 \\ mov blink, 0259 \\ mov blink, 0
lib/std/zig/system.zig+1
...@@ -119,6 +119,7 @@ pub fn getExternalExecutor(...@@ -119,6 +119,7 @@ pub fn getExternalExecutor(
119 .thumb,119 .thumb,
120 .thumbeb,120 .thumbeb,
121 .xtensa,121 .xtensa,
122 .xtensaeb,
122 => |t| switch (candidate.os.tag) {123 => |t| switch (candidate.os.tag) {
123 .linux,124 .linux,
124 => .{ .qemu = switch (t) {125 => .{ .qemu = switch (t) {
src/codegen/llvm.zig+6
...@@ -106,9 +106,11 @@ pub fn targetTriple(allocator: Allocator, target: *const std.Target) ![]const u8...@@ -106,9 +106,11 @@ pub fn targetTriple(allocator: Allocator, target: *const std.Target) ![]const u8
106 .wasm64 => "wasm64",106 .wasm64 => "wasm64",
107 .ve => "ve",107 .ve => "ve",
108108
109 .arceb,
109 .kalimba,110 .kalimba,
110 .or1k,111 .or1k,
111 .propeller,112 .propeller,
113 .xtensaeb,
112 => unreachable, // Gated by hasLlvmSupport().114 => unreachable, // Gated by hasLlvmSupport().
113 };115 };
114116
...@@ -473,9 +475,11 @@ pub fn dataLayout(target: *const std.Target) []const u8 {...@@ -473,9 +475,11 @@ pub fn dataLayout(target: *const std.Target) []const u8 {
473 .loongarch64 => "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128",475 .loongarch64 => "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128",
474 .xtensa => "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32",476 .xtensa => "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32",
475477
478 .arceb,
476 .kalimba,479 .kalimba,
477 .or1k,480 .or1k,
478 .propeller,481 .propeller,
482 .xtensaeb,
479 => unreachable, // Gated by hasLlvmSupport().483 => unreachable, // Gated by hasLlvmSupport().
480 };484 };
481}485}
...@@ -13107,9 +13111,11 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {...@@ -13107,9 +13111,11 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
13107 },13111 },
1310813112
13109 // LLVM does does not have a backend for these.13113 // LLVM does does not have a backend for these.
13114 .arceb,
13110 .kalimba,13115 .kalimba,
13111 .or1k,13116 .or1k,
13112 .propeller,13117 .propeller,
13118 .xtensaeb,
13113 => unreachable,13119 => unreachable,
13114 }13120 }
13115}13121}
src/target.zig+4
...@@ -216,9 +216,11 @@ pub fn hasLlvmSupport(target: *const std.Target, ofmt: std.Target.ObjectFormat)...@@ -216,9 +216,11 @@ pub fn hasLlvmSupport(target: *const std.Target, ofmt: std.Target.ObjectFormat)
216 => false,216 => false,
217217
218 // No LLVM backend exists.218 // No LLVM backend exists.
219 .arceb,
219 .kalimba,220 .kalimba,
220 .or1k,221 .or1k,
221 .propeller,222 .propeller,
223 .xtensaeb,
222 => false,224 => false,
223 };225 };
224}226}
...@@ -711,6 +713,7 @@ pub fn minFunctionAlignment(target: *const std.Target) Alignment {...@@ -711,6 +713,7 @@ pub fn minFunctionAlignment(target: *const std.Target) Alignment {
711 .xcore,713 .xcore,
712 => .@"2",714 => .@"2",
713 .arc,715 .arc,
716 .arceb,
714 .arm,717 .arm,
715 .armeb,718 .armeb,
716 .aarch64,719 .aarch64,
...@@ -728,6 +731,7 @@ pub fn minFunctionAlignment(target: *const std.Target) Alignment {...@@ -728,6 +731,7 @@ pub fn minFunctionAlignment(target: *const std.Target) Alignment {
728 .sparc,731 .sparc,
729 .sparc64,732 .sparc64,
730 .xtensa,733 .xtensa,
734 .xtensaeb,
731 => .@"4",735 => .@"4",
732 .bpfel,736 .bpfel,
733 .bpfeb,737 .bpfeb,
test/tests.zig+1-1
...@@ -1550,7 +1550,7 @@ const CAbiTarget = struct {...@@ -1550,7 +1550,7 @@ const CAbiTarget = struct {
1550};1550};
15511551
1552const c_abi_targets = blk: {1552const c_abi_targets = blk: {
1553 @setEvalBranchQuota(20000);1553 @setEvalBranchQuota(30000);
1554 break :blk [_]CAbiTarget{1554 break :blk [_]CAbiTarget{
1555 // Native Targets1555 // Native Targets
15561556